RISC-V: Add vec_init expander for masks [PR112854].

RISC-V: Add vec_init expander for masks [PR112854].

PR112854 shows a problem on rv32 with zvl1024b.  During the course of
expand_constructor we try to overlay/subreg a 64-element mask by a
scalar (Pmode) register.  This works for zvl512b and its maximum of
32 elements but fails for rv32 and 64 elements.

To circumvent this this patch adds a vec_init expander for vector masks
by initializing a QImode vector and comparing that against 0.

gcc/ChangeLog:

	PR target/112854
	PR target/112872

	* config/riscv/autovec.md (vec_init<mode>qi): New expander.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/pr112854.c: New test.
	* gcc.target/riscv/rvv/autovec/pr112872.c: New test.