1 /* Perform various loop optimizations, including strength reduction.
2 Copyright (C) 1987, 1988, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This is the loop optimization pass of the compiler.
23 It finds invariant computations within loops and moves them
24 to the beginning of the loop. Then it identifies basic and
25 general induction variables. Strength reduction is applied to the general
26 induction variables, and induction variable elimination is applied to
27 the basic induction variables.
29 It also finds cases where
30 a register is set within the loop by zero-extending a narrower value
31 and changes these to zero the entire register once before the loop
32 and merely copy the low part within the loop.
34 Most of the complexity is in heuristics to decide when it is worth
35 while to do these things. */
39 #include "coretypes.h"
45 #include "hard-reg-set.h"
46 #include "basic-block.h"
47 #include "insn-config.h"
57 #include "insn-flags.h"
61 /* Not really meaningful values, but at least something. */
62 #ifndef SIMULTANEOUS_PREFETCHES
63 #define SIMULTANEOUS_PREFETCHES 3
65 #ifndef PREFETCH_BLOCK
66 #define PREFETCH_BLOCK 32
69 #define HAVE_prefetch 0
70 #define CODE_FOR_prefetch 0
71 #define gen_prefetch(a,b,c) (abort(), NULL_RTX)
74 /* Give up the prefetch optimizations once we exceed a given threshhold.
75 It is unlikely that we would be able to optimize something in a loop
76 with so many detected prefetches. */
77 #define MAX_PREFETCHES 100
78 /* The number of prefetch blocks that are beneficial to fetch at once before
79 a loop with a known (and low) iteration count. */
80 #define PREFETCH_BLOCKS_BEFORE_LOOP_MAX 6
81 /* For very tiny loops it is not worthwhile to prefetch even before the loop,
82 since it is likely that the data are already in the cache. */
83 #define PREFETCH_BLOCKS_BEFORE_LOOP_MIN 2
85 /* Parameterize some prefetch heuristics so they can be turned on and off
86 easily for performance testing on new architectures. These can be
87 defined in target-dependent files. */
89 /* Prefetch is worthwhile only when loads/stores are dense. */
90 #ifndef PREFETCH_ONLY_DENSE_MEM
91 #define PREFETCH_ONLY_DENSE_MEM 1
94 /* Define what we mean by "dense" loads and stores; This value divided by 256
95 is the minimum percentage of memory references that worth prefetching. */
96 #ifndef PREFETCH_DENSE_MEM
97 #define PREFETCH_DENSE_MEM 220
100 /* Do not prefetch for a loop whose iteration count is known to be low. */
101 #ifndef PREFETCH_NO_LOW_LOOPCNT
102 #define PREFETCH_NO_LOW_LOOPCNT 1
105 /* Define what we mean by a "low" iteration count. */
106 #ifndef PREFETCH_LOW_LOOPCNT
107 #define PREFETCH_LOW_LOOPCNT 32
110 /* Do not prefetch for a loop that contains a function call; such a loop is
111 probably not an internal loop. */
112 #ifndef PREFETCH_NO_CALL
113 #define PREFETCH_NO_CALL 1
116 /* Do not prefetch accesses with an extreme stride. */
117 #ifndef PREFETCH_NO_EXTREME_STRIDE
118 #define PREFETCH_NO_EXTREME_STRIDE 1
121 /* Define what we mean by an "extreme" stride. */
122 #ifndef PREFETCH_EXTREME_STRIDE
123 #define PREFETCH_EXTREME_STRIDE 4096
126 /* Define a limit to how far apart indices can be and still be merged
127 into a single prefetch. */
128 #ifndef PREFETCH_EXTREME_DIFFERENCE
129 #define PREFETCH_EXTREME_DIFFERENCE 4096
132 /* Issue prefetch instructions before the loop to fetch data to be used
133 in the first few loop iterations. */
134 #ifndef PREFETCH_BEFORE_LOOP
135 #define PREFETCH_BEFORE_LOOP 1
138 /* Do not handle reversed order prefetches (negative stride). */
139 #ifndef PREFETCH_NO_REVERSE_ORDER
140 #define PREFETCH_NO_REVERSE_ORDER 1
143 /* Prefetch even if the GIV is in conditional code. */
144 #ifndef PREFETCH_CONDITIONAL
145 #define PREFETCH_CONDITIONAL 1
148 #define LOOP_REG_LIFETIME(LOOP, REGNO) \
149 ((REGNO_LAST_LUID (REGNO) - REGNO_FIRST_LUID (REGNO)))
151 #define LOOP_REG_GLOBAL_P(LOOP, REGNO) \
152 ((REGNO_LAST_LUID (REGNO) > INSN_LUID ((LOOP)->end) \
153 || REGNO_FIRST_LUID (REGNO) < INSN_LUID ((LOOP)->start)))
155 #define LOOP_REGNO_NREGS(REGNO, SET_DEST) \
156 ((REGNO) < FIRST_PSEUDO_REGISTER \
157 ? (int) HARD_REGNO_NREGS ((REGNO), GET_MODE (SET_DEST)) : 1)
160 /* Vector mapping INSN_UIDs to luids.
161 The luids are like uids but increase monotonically always.
162 We use them to see whether a jump comes from outside a given loop. */
166 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
167 number the insn is contained in. */
169 struct loop
**uid_loop
;
171 /* 1 + largest uid of any insn. */
173 int max_uid_for_loop
;
175 /* Number of loops detected in current function. Used as index to the
178 static int max_loop_num
;
180 /* Bound on pseudo register number before loop optimization.
181 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
182 unsigned int max_reg_before_loop
;
184 /* The value to pass to the next call of reg_scan_update. */
185 static int loop_max_reg
;
187 /* During the analysis of a loop, a chain of `struct movable's
188 is made to record all the movable insns found.
189 Then the entire chain can be scanned to decide which to move. */
193 rtx insn
; /* A movable insn */
194 rtx set_src
; /* The expression this reg is set from. */
195 rtx set_dest
; /* The destination of this SET. */
196 rtx dependencies
; /* When INSN is libcall, this is an EXPR_LIST
197 of any registers used within the LIBCALL. */
198 int consec
; /* Number of consecutive following insns
199 that must be moved with this one. */
200 unsigned int regno
; /* The register it sets */
201 short lifetime
; /* lifetime of that register;
202 may be adjusted when matching movables
203 that load the same value are found. */
204 short savings
; /* Number of insns we can move for this reg,
205 including other movables that force this
206 or match this one. */
207 ENUM_BITFIELD(machine_mode
) savemode
: 8; /* Nonzero means it is a mode for
208 a low part that we should avoid changing when
209 clearing the rest of the reg. */
210 unsigned int cond
: 1; /* 1 if only conditionally movable */
211 unsigned int force
: 1; /* 1 means MUST move this insn */
212 unsigned int global
: 1; /* 1 means reg is live outside this loop */
213 /* If PARTIAL is 1, GLOBAL means something different:
214 that the reg is live outside the range from where it is set
215 to the following label. */
216 unsigned int done
: 1; /* 1 inhibits further processing of this */
218 unsigned int partial
: 1; /* 1 means this reg is used for zero-extending.
219 In particular, moving it does not make it
221 unsigned int move_insn
: 1; /* 1 means that we call emit_move_insn to
222 load SRC, rather than copying INSN. */
223 unsigned int move_insn_first
:1;/* Same as above, if this is necessary for the
224 first insn of a consecutive sets group. */
225 unsigned int is_equiv
: 1; /* 1 means a REG_EQUIV is present on INSN. */
226 unsigned int insert_temp
: 1; /* 1 means we copy to a new pseudo and replace
227 the original insn with a copy from that
228 pseudo, rather than deleting it. */
229 struct movable
*match
; /* First entry for same value */
230 struct movable
*forces
; /* An insn that must be moved if this is */
231 struct movable
*next
;
235 FILE *loop_dump_stream
;
237 /* Forward declarations. */
239 static void invalidate_loops_containing_label
PARAMS ((rtx
));
240 static void find_and_verify_loops
PARAMS ((rtx
, struct loops
*));
241 static void mark_loop_jump
PARAMS ((rtx
, struct loop
*));
242 static void prescan_loop
PARAMS ((struct loop
*));
243 static int reg_in_basic_block_p
PARAMS ((rtx
, rtx
));
244 static int consec_sets_invariant_p
PARAMS ((const struct loop
*,
246 static int labels_in_range_p
PARAMS ((rtx
, int));
247 static void count_one_set
PARAMS ((struct loop_regs
*, rtx
, rtx
, rtx
*));
248 static void note_addr_stored
PARAMS ((rtx
, rtx
, void *));
249 static void note_set_pseudo_multiple_uses
PARAMS ((rtx
, rtx
, void *));
250 static int loop_reg_used_before_p
PARAMS ((const struct loop
*, rtx
, rtx
));
251 static void scan_loop
PARAMS ((struct loop
*, int));
253 static void replace_call_address
PARAMS ((rtx
, rtx
, rtx
));
255 static rtx skip_consec_insns
PARAMS ((rtx
, int));
256 static int libcall_benefit
PARAMS ((rtx
));
257 static void ignore_some_movables
PARAMS ((struct loop_movables
*));
258 static void force_movables
PARAMS ((struct loop_movables
*));
259 static void combine_movables
PARAMS ((struct loop_movables
*,
260 struct loop_regs
*));
261 static int num_unmoved_movables
PARAMS ((const struct loop
*));
262 static int regs_match_p
PARAMS ((rtx
, rtx
, struct loop_movables
*));
263 static int rtx_equal_for_loop_p
PARAMS ((rtx
, rtx
, struct loop_movables
*,
264 struct loop_regs
*));
265 static void add_label_notes
PARAMS ((rtx
, rtx
));
266 static void move_movables
PARAMS ((struct loop
*loop
, struct loop_movables
*,
268 static void loop_movables_add
PARAMS((struct loop_movables
*,
270 static void loop_movables_free
PARAMS((struct loop_movables
*));
271 static int count_nonfixed_reads
PARAMS ((const struct loop
*, rtx
));
272 static void loop_bivs_find
PARAMS((struct loop
*));
273 static void loop_bivs_init_find
PARAMS((struct loop
*));
274 static void loop_bivs_check
PARAMS((struct loop
*));
275 static void loop_givs_find
PARAMS((struct loop
*));
276 static void loop_givs_check
PARAMS((struct loop
*));
277 static int loop_biv_eliminable_p
PARAMS((struct loop
*, struct iv_class
*,
279 static int loop_giv_reduce_benefit
PARAMS((struct loop
*, struct iv_class
*,
280 struct induction
*, rtx
));
281 static void loop_givs_dead_check
PARAMS((struct loop
*, struct iv_class
*));
282 static void loop_givs_reduce
PARAMS((struct loop
*, struct iv_class
*));
283 static void loop_givs_rescan
PARAMS((struct loop
*, struct iv_class
*,
285 static void loop_ivs_free
PARAMS((struct loop
*));
286 static void strength_reduce
PARAMS ((struct loop
*, int));
287 static void find_single_use_in_loop
PARAMS ((struct loop_regs
*, rtx
, rtx
));
288 static int valid_initial_value_p
PARAMS ((rtx
, rtx
, int, rtx
));
289 static void find_mem_givs
PARAMS ((const struct loop
*, rtx
, rtx
, int, int));
290 static void record_biv
PARAMS ((struct loop
*, struct induction
*,
291 rtx
, rtx
, rtx
, rtx
, rtx
*,
293 static void check_final_value
PARAMS ((const struct loop
*,
294 struct induction
*));
295 static void loop_ivs_dump
PARAMS((const struct loop
*, FILE *, int));
296 static void loop_iv_class_dump
PARAMS((const struct iv_class
*, FILE *, int));
297 static void loop_biv_dump
PARAMS((const struct induction
*, FILE *, int));
298 static void loop_giv_dump
PARAMS((const struct induction
*, FILE *, int));
299 static void record_giv
PARAMS ((const struct loop
*, struct induction
*,
300 rtx
, rtx
, rtx
, rtx
, rtx
, rtx
, int,
301 enum g_types
, int, int, rtx
*));
302 static void update_giv_derive
PARAMS ((const struct loop
*, rtx
));
303 static void check_ext_dependent_givs
PARAMS ((struct iv_class
*,
304 struct loop_info
*));
305 static int basic_induction_var
PARAMS ((const struct loop
*, rtx
,
306 enum machine_mode
, rtx
, rtx
,
307 rtx
*, rtx
*, rtx
**));
308 static rtx simplify_giv_expr
PARAMS ((const struct loop
*, rtx
, rtx
*, int *));
309 static int general_induction_var
PARAMS ((const struct loop
*loop
, rtx
, rtx
*,
310 rtx
*, rtx
*, rtx
*, int, int *,
312 static int consec_sets_giv
PARAMS ((const struct loop
*, int, rtx
,
313 rtx
, rtx
, rtx
*, rtx
*, rtx
*, rtx
*));
314 static int check_dbra_loop
PARAMS ((struct loop
*, int));
315 static rtx express_from_1
PARAMS ((rtx
, rtx
, rtx
));
316 static rtx combine_givs_p
PARAMS ((struct induction
*, struct induction
*));
317 static int cmp_combine_givs_stats
PARAMS ((const PTR
, const PTR
));
318 static void combine_givs
PARAMS ((struct loop_regs
*, struct iv_class
*));
319 static int product_cheap_p
PARAMS ((rtx
, rtx
));
320 static int maybe_eliminate_biv
PARAMS ((const struct loop
*, struct iv_class
*,
322 static int maybe_eliminate_biv_1
PARAMS ((const struct loop
*, rtx
, rtx
,
323 struct iv_class
*, int,
325 static int last_use_this_basic_block
PARAMS ((rtx
, rtx
));
326 static void record_initial
PARAMS ((rtx
, rtx
, void *));
327 static void update_reg_last_use
PARAMS ((rtx
, rtx
));
328 static rtx next_insn_in_loop
PARAMS ((const struct loop
*, rtx
));
329 static void loop_regs_scan
PARAMS ((const struct loop
*, int));
330 static int count_insns_in_loop
PARAMS ((const struct loop
*));
331 static void load_mems
PARAMS ((const struct loop
*));
332 static int insert_loop_mem
PARAMS ((rtx
*, void *));
333 static int replace_loop_mem
PARAMS ((rtx
*, void *));
334 static void replace_loop_mems
PARAMS ((rtx
, rtx
, rtx
));
335 static int replace_loop_reg
PARAMS ((rtx
*, void *));
336 static void replace_loop_regs
PARAMS ((rtx insn
, rtx
, rtx
));
337 static void note_reg_stored
PARAMS ((rtx
, rtx
, void *));
338 static void try_copy_prop
PARAMS ((const struct loop
*, rtx
, unsigned int));
339 static void try_swap_copy_prop
PARAMS ((const struct loop
*, rtx
,
341 static int replace_label
PARAMS ((rtx
*, void *));
342 static rtx check_insn_for_givs
PARAMS((struct loop
*, rtx
, int, int));
343 static rtx check_insn_for_bivs
PARAMS((struct loop
*, rtx
, int, int));
344 static rtx gen_add_mult
PARAMS ((rtx
, rtx
, rtx
, rtx
));
345 static void loop_regs_update
PARAMS ((const struct loop
*, rtx
));
346 static int iv_add_mult_cost
PARAMS ((rtx
, rtx
, rtx
, rtx
));
348 static rtx loop_insn_emit_after
PARAMS((const struct loop
*, basic_block
,
350 static rtx loop_call_insn_emit_before
PARAMS((const struct loop
*,
351 basic_block
, rtx
, rtx
));
352 static rtx loop_call_insn_hoist
PARAMS((const struct loop
*, rtx
));
353 static rtx loop_insn_sink_or_swim
PARAMS((const struct loop
*, rtx
));
355 static void loop_dump_aux
PARAMS ((const struct loop
*, FILE *, int));
356 static void loop_delete_insns
PARAMS ((rtx
, rtx
));
357 static HOST_WIDE_INT remove_constant_addition
PARAMS ((rtx
*));
358 static rtx gen_load_of_final_value
PARAMS ((rtx
, rtx
));
359 void debug_ivs
PARAMS ((const struct loop
*));
360 void debug_iv_class
PARAMS ((const struct iv_class
*));
361 void debug_biv
PARAMS ((const struct induction
*));
362 void debug_giv
PARAMS ((const struct induction
*));
363 void debug_loop
PARAMS ((const struct loop
*));
364 void debug_loops
PARAMS ((const struct loops
*));
366 typedef struct rtx_pair
372 typedef struct loop_replace_args
379 /* Nonzero iff INSN is between START and END, inclusive. */
380 #define INSN_IN_RANGE_P(INSN, START, END) \
381 (INSN_UID (INSN) < max_uid_for_loop \
382 && INSN_LUID (INSN) >= INSN_LUID (START) \
383 && INSN_LUID (INSN) <= INSN_LUID (END))
385 /* Indirect_jump_in_function is computed once per function. */
386 static int indirect_jump_in_function
;
387 static int indirect_jump_in_function_p
PARAMS ((rtx
));
389 static int compute_luids
PARAMS ((rtx
, rtx
, int));
391 static int biv_elimination_giv_has_0_offset
PARAMS ((struct induction
*,
395 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
396 copy the value of the strength reduced giv to its original register. */
397 static int copy_cost
;
399 /* Cost of using a register, to normalize the benefits of a giv. */
400 static int reg_address_cost
;
405 rtx reg
= gen_rtx_REG (word_mode
, LAST_VIRTUAL_REGISTER
+ 1);
407 reg_address_cost
= address_cost (reg
, SImode
);
409 copy_cost
= COSTS_N_INSNS (1);
412 /* Compute the mapping from uids to luids.
413 LUIDs are numbers assigned to insns, like uids,
414 except that luids increase monotonically through the code.
415 Start at insn START and stop just before END. Assign LUIDs
416 starting with PREV_LUID + 1. Return the last assigned LUID + 1. */
418 compute_luids (start
, end
, prev_luid
)
425 for (insn
= start
, i
= prev_luid
; insn
!= end
; insn
= NEXT_INSN (insn
))
427 if (INSN_UID (insn
) >= max_uid_for_loop
)
429 /* Don't assign luids to line-number NOTEs, so that the distance in
430 luids between two insns is not affected by -g. */
431 if (GET_CODE (insn
) != NOTE
432 || NOTE_LINE_NUMBER (insn
) <= 0)
433 uid_luid
[INSN_UID (insn
)] = ++i
;
435 /* Give a line number note the same luid as preceding insn. */
436 uid_luid
[INSN_UID (insn
)] = i
;
441 /* Entry point of this file. Perform loop optimization
442 on the current function. F is the first insn of the function
443 and DUMPFILE is a stream for output of a trace of actions taken
444 (or 0 if none should be output). */
447 loop_optimize (f
, dumpfile
, flags
)
448 /* f is the first instruction of a chain of insns for one function */
455 struct loops loops_data
;
456 struct loops
*loops
= &loops_data
;
457 struct loop_info
*loops_info
;
459 loop_dump_stream
= dumpfile
;
461 init_recog_no_volatile ();
463 max_reg_before_loop
= max_reg_num ();
464 loop_max_reg
= max_reg_before_loop
;
468 /* Count the number of loops. */
471 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
473 if (GET_CODE (insn
) == NOTE
474 && NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_BEG
)
478 /* Don't waste time if no loops. */
479 if (max_loop_num
== 0)
482 loops
->num
= max_loop_num
;
484 /* Get size to use for tables indexed by uids.
485 Leave some space for labels allocated by find_and_verify_loops. */
486 max_uid_for_loop
= get_max_uid () + 1 + max_loop_num
* 32;
488 uid_luid
= (int *) xcalloc (max_uid_for_loop
, sizeof (int));
489 uid_loop
= (struct loop
**) xcalloc (max_uid_for_loop
,
490 sizeof (struct loop
*));
492 /* Allocate storage for array of loops. */
493 loops
->array
= (struct loop
*)
494 xcalloc (loops
->num
, sizeof (struct loop
));
496 /* Find and process each loop.
497 First, find them, and record them in order of their beginnings. */
498 find_and_verify_loops (f
, loops
);
500 /* Allocate and initialize auxiliary loop information. */
501 loops_info
= xcalloc (loops
->num
, sizeof (struct loop_info
));
502 for (i
= 0; i
< (int) loops
->num
; i
++)
503 loops
->array
[i
].aux
= loops_info
+ i
;
505 /* Now find all register lifetimes. This must be done after
506 find_and_verify_loops, because it might reorder the insns in the
508 reg_scan (f
, max_reg_before_loop
, 1);
510 /* This must occur after reg_scan so that registers created by gcse
511 will have entries in the register tables.
513 We could have added a call to reg_scan after gcse_main in toplev.c,
514 but moving this call to init_alias_analysis is more efficient. */
515 init_alias_analysis ();
517 /* See if we went too far. Note that get_max_uid already returns
518 one more that the maximum uid of all insn. */
519 if (get_max_uid () > max_uid_for_loop
)
521 /* Now reset it to the actual size we need. See above. */
522 max_uid_for_loop
= get_max_uid ();
524 /* find_and_verify_loops has already called compute_luids, but it
525 might have rearranged code afterwards, so we need to recompute
527 compute_luids (f
, NULL_RTX
, 0);
529 /* Don't leave gaps in uid_luid for insns that have been
530 deleted. It is possible that the first or last insn
531 using some register has been deleted by cross-jumping.
532 Make sure that uid_luid for that former insn's uid
533 points to the general area where that insn used to be. */
534 for (i
= 0; i
< max_uid_for_loop
; i
++)
536 uid_luid
[0] = uid_luid
[i
];
537 if (uid_luid
[0] != 0)
540 for (i
= 0; i
< max_uid_for_loop
; i
++)
541 if (uid_luid
[i
] == 0)
542 uid_luid
[i
] = uid_luid
[i
- 1];
544 /* Determine if the function has indirect jump. On some systems
545 this prevents low overhead loop instructions from being used. */
546 indirect_jump_in_function
= indirect_jump_in_function_p (f
);
548 /* Now scan the loops, last ones first, since this means inner ones are done
549 before outer ones. */
550 for (i
= max_loop_num
- 1; i
>= 0; i
--)
552 struct loop
*loop
= &loops
->array
[i
];
554 if (! loop
->invalid
&& loop
->end
)
555 scan_loop (loop
, flags
);
558 end_alias_analysis ();
567 /* Returns the next insn, in execution order, after INSN. START and
568 END are the NOTE_INSN_LOOP_BEG and NOTE_INSN_LOOP_END for the loop,
569 respectively. LOOP->TOP, if non-NULL, is the top of the loop in the
570 insn-stream; it is used with loops that are entered near the
574 next_insn_in_loop (loop
, insn
)
575 const struct loop
*loop
;
578 insn
= NEXT_INSN (insn
);
580 if (insn
== loop
->end
)
583 /* Go to the top of the loop, and continue there. */
590 if (insn
== loop
->scan_start
)
597 /* Optimize one loop described by LOOP. */
599 /* ??? Could also move memory writes out of loops if the destination address
600 is invariant, the source is invariant, the memory write is not volatile,
601 and if we can prove that no read inside the loop can read this address
602 before the write occurs. If there is a read of this address after the
603 write, then we can also mark the memory read as invariant. */
606 scan_loop (loop
, flags
)
610 struct loop_info
*loop_info
= LOOP_INFO (loop
);
611 struct loop_regs
*regs
= LOOP_REGS (loop
);
613 rtx loop_start
= loop
->start
;
614 rtx loop_end
= loop
->end
;
616 /* 1 if we are scanning insns that could be executed zero times. */
618 /* 1 if we are scanning insns that might never be executed
619 due to a subroutine call which might exit before they are reached. */
621 /* Number of insns in the loop. */
624 rtx temp
, update_start
, update_end
;
625 /* The SET from an insn, if it is the only SET in the insn. */
627 /* Chain describing insns movable in current loop. */
628 struct loop_movables
*movables
= LOOP_MOVABLES (loop
);
629 /* Ratio of extra register life span we can justify
630 for saving an instruction. More if loop doesn't call subroutines
631 since in that case saving an insn makes more difference
632 and more registers are available. */
634 /* Nonzero if we are scanning instructions in a sub-loop. */
643 /* Determine whether this loop starts with a jump down to a test at
644 the end. This will occur for a small number of loops with a test
645 that is too complex to duplicate in front of the loop.
647 We search for the first insn or label in the loop, skipping NOTEs.
648 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
649 (because we might have a loop executed only once that contains a
650 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
651 (in case we have a degenerate loop).
653 Note that if we mistakenly think that a loop is entered at the top
654 when, in fact, it is entered at the exit test, the only effect will be
655 slightly poorer optimization. Making the opposite error can generate
656 incorrect code. Since very few loops now start with a jump to the
657 exit test, the code here to detect that case is very conservative. */
659 for (p
= NEXT_INSN (loop_start
);
661 && GET_CODE (p
) != CODE_LABEL
&& ! INSN_P (p
)
662 && (GET_CODE (p
) != NOTE
663 || (NOTE_LINE_NUMBER (p
) != NOTE_INSN_LOOP_BEG
664 && NOTE_LINE_NUMBER (p
) != NOTE_INSN_LOOP_END
));
668 loop
->scan_start
= p
;
670 /* If loop end is the end of the current function, then emit a
671 NOTE_INSN_DELETED after loop_end and set loop->sink to the dummy
672 note insn. This is the position we use when sinking insns out of
674 if (NEXT_INSN (loop
->end
) != 0)
675 loop
->sink
= NEXT_INSN (loop
->end
);
677 loop
->sink
= emit_note_after (NOTE_INSN_DELETED
, loop
->end
);
679 /* Set up variables describing this loop. */
681 threshold
= (loop_info
->has_call
? 1 : 2) * (1 + n_non_fixed_regs
);
683 /* If loop has a jump before the first label,
684 the true entry is the target of that jump.
685 Start scan from there.
686 But record in LOOP->TOP the place where the end-test jumps
687 back to so we can scan that after the end of the loop. */
688 if (GET_CODE (p
) == JUMP_INSN
689 /* Loop entry must be unconditional jump (and not a RETURN) */
690 && any_uncondjump_p (p
)
691 && JUMP_LABEL (p
) != 0
692 /* Check to see whether the jump actually
693 jumps out of the loop (meaning it's no loop).
694 This case can happen for things like
695 do {..} while (0). If this label was generated previously
696 by loop, we can't tell anything about it and have to reject
698 && INSN_IN_RANGE_P (JUMP_LABEL (p
), loop_start
, loop_end
))
700 loop
->top
= next_label (loop
->scan_start
);
701 loop
->scan_start
= JUMP_LABEL (p
);
704 /* If LOOP->SCAN_START was an insn created by loop, we don't know its luid
705 as required by loop_reg_used_before_p. So skip such loops. (This
706 test may never be true, but it's best to play it safe.)
708 Also, skip loops where we do not start scanning at a label. This
709 test also rejects loops starting with a JUMP_INSN that failed the
712 if (INSN_UID (loop
->scan_start
) >= max_uid_for_loop
713 || GET_CODE (loop
->scan_start
) != CODE_LABEL
)
715 if (loop_dump_stream
)
716 fprintf (loop_dump_stream
, "\nLoop from %d to %d is phony.\n\n",
717 INSN_UID (loop_start
), INSN_UID (loop_end
));
721 /* Allocate extra space for REGs that might be created by load_mems.
722 We allocate a little extra slop as well, in the hopes that we
723 won't have to reallocate the regs array. */
724 loop_regs_scan (loop
, loop_info
->mems_idx
+ 16);
725 insn_count
= count_insns_in_loop (loop
);
727 if (loop_dump_stream
)
729 fprintf (loop_dump_stream
, "\nLoop from %d to %d: %d real insns.\n",
730 INSN_UID (loop_start
), INSN_UID (loop_end
), insn_count
);
732 fprintf (loop_dump_stream
, "Continue at insn %d.\n",
733 INSN_UID (loop
->cont
));
736 /* Scan through the loop finding insns that are safe to move.
737 Set REGS->ARRAY[I].SET_IN_LOOP negative for the reg I being set, so that
738 this reg will be considered invariant for subsequent insns.
739 We consider whether subsequent insns use the reg
740 in deciding whether it is worth actually moving.
742 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
743 and therefore it is possible that the insns we are scanning
744 would never be executed. At such times, we must make sure
745 that it is safe to execute the insn once instead of zero times.
746 When MAYBE_NEVER is 0, all insns will be executed at least once
747 so that is not a problem. */
749 for (in_libcall
= 0, p
= next_insn_in_loop (loop
, loop
->scan_start
);
751 p
= next_insn_in_loop (loop
, p
))
753 if (in_libcall
&& INSN_P (p
) && find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
755 if (GET_CODE (p
) == INSN
)
757 temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
);
761 && (set
= single_set (p
))
762 && GET_CODE (SET_DEST (set
)) == REG
763 #ifdef PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
764 && SET_DEST (set
) != pic_offset_table_rtx
766 && ! regs
->array
[REGNO (SET_DEST (set
))].may_not_optimize
)
772 rtx src
= SET_SRC (set
);
773 rtx dependencies
= 0;
775 /* Figure out what to use as a source of this insn. If a
776 REG_EQUIV note is given or if a REG_EQUAL note with a
777 constant operand is specified, use it as the source and
778 mark that we should move this insn by calling
779 emit_move_insn rather that duplicating the insn.
781 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL
783 temp
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
);
785 src
= XEXP (temp
, 0), move_insn
= 1;
788 temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
789 if (temp
&& CONSTANT_P (XEXP (temp
, 0)))
790 src
= XEXP (temp
, 0), move_insn
= 1;
791 if (temp
&& find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
793 src
= XEXP (temp
, 0);
794 /* A libcall block can use regs that don't appear in
795 the equivalent expression. To move the libcall,
796 we must move those regs too. */
797 dependencies
= libcall_other_reg (p
, src
);
801 /* For parallels, add any possible uses to the dependencies, as
802 we can't move the insn without resolving them first. */
803 if (GET_CODE (PATTERN (p
)) == PARALLEL
)
805 for (i
= 0; i
< XVECLEN (PATTERN (p
), 0); i
++)
807 rtx x
= XVECEXP (PATTERN (p
), 0, i
);
808 if (GET_CODE (x
) == USE
)
810 = gen_rtx_EXPR_LIST (VOIDmode
, XEXP (x
, 0),
815 if (/* The register is used in basic blocks other
816 than the one where it is set (meaning that
817 something after this point in the loop might
818 depend on its value before the set). */
819 ! reg_in_basic_block_p (p
, SET_DEST (set
))
820 /* And the set is not guaranteed to be executed once
821 the loop starts, or the value before the set is
822 needed before the set occurs...
824 ??? Note we have quadratic behavior here, mitigated
825 by the fact that the previous test will often fail for
826 large loops. Rather than re-scanning the entire loop
827 each time for register usage, we should build tables
828 of the register usage and use them here instead. */
830 || loop_reg_used_before_p (loop
, set
, p
)))
831 /* It is unsafe to move the set. However, it may be OK to
832 move the source into a new psuedo, and subsitute a
833 reg-to-reg copy for the original insn.
835 This code used to consider it OK to move a set of a variable
836 which was not created by the user and not used in an exit
838 That behavior is incorrect and was removed. */
841 /* Don't try to optimize a register that was made
842 by loop-optimization for an inner loop.
843 We don't know its life-span, so we can't compute
845 if (REGNO (SET_DEST (set
)) >= max_reg_before_loop
)
847 /* Don't move the source and add a reg-to-reg copy with -Os
848 (this certainly increases size) or if the source is
849 already a reg (the motion will gain nothing). */
851 && (optimize_size
|| GET_CODE (SET_SRC (set
)) == REG
852 || (CONSTANT_P (SET_SRC (set
))
853 && LEGITIMATE_CONSTANT_P (SET_SRC (set
)))))
855 else if ((tem
= loop_invariant_p (loop
, src
))
856 && (dependencies
== 0
858 = loop_invariant_p (loop
, dependencies
)) != 0)
859 && (regs
->array
[REGNO (SET_DEST (set
))].set_in_loop
== 1
861 = consec_sets_invariant_p
862 (loop
, SET_DEST (set
),
863 regs
->array
[REGNO (SET_DEST (set
))].set_in_loop
,
865 /* If the insn can cause a trap (such as divide by zero),
866 can't move it unless it's guaranteed to be executed
867 once loop is entered. Even a function call might
868 prevent the trap insn from being reached
869 (since it might exit!) */
870 && ! ((maybe_never
|| call_passed
)
871 && may_trap_p (src
)))
874 int regno
= REGNO (SET_DEST (set
));
876 /* A potential lossage is where we have a case where two insns
877 can be combined as long as they are both in the loop, but
878 we move one of them outside the loop. For large loops,
879 this can lose. The most common case of this is the address
880 of a function being called.
882 Therefore, if this register is marked as being used
883 exactly once if we are in a loop with calls
884 (a "large loop"), see if we can replace the usage of
885 this register with the source of this SET. If we can,
888 Don't do this if P has a REG_RETVAL note or if we have
889 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
891 if (loop_info
->has_call
892 && regs
->array
[regno
].single_usage
!= 0
893 && regs
->array
[regno
].single_usage
!= const0_rtx
894 && REGNO_FIRST_UID (regno
) == INSN_UID (p
)
895 && (REGNO_LAST_UID (regno
)
896 == INSN_UID (regs
->array
[regno
].single_usage
))
897 && regs
->array
[regno
].set_in_loop
== 1
898 && GET_CODE (SET_SRC (set
)) != ASM_OPERANDS
899 && ! side_effects_p (SET_SRC (set
))
900 && ! find_reg_note (p
, REG_RETVAL
, NULL_RTX
)
901 && (! SMALL_REGISTER_CLASSES
902 || (! (GET_CODE (SET_SRC (set
)) == REG
903 && (REGNO (SET_SRC (set
))
904 < FIRST_PSEUDO_REGISTER
))))
905 /* This test is not redundant; SET_SRC (set) might be
906 a call-clobbered register and the life of REGNO
907 might span a call. */
908 && ! modified_between_p (SET_SRC (set
), p
,
909 regs
->array
[regno
].single_usage
)
910 && no_labels_between_p (p
,
911 regs
->array
[regno
].single_usage
)
912 && validate_replace_rtx (SET_DEST (set
), SET_SRC (set
),
913 regs
->array
[regno
].single_usage
))
915 /* Replace any usage in a REG_EQUAL note. Must copy
916 the new source, so that we don't get rtx sharing
917 between the SET_SOURCE and REG_NOTES of insn p. */
918 REG_NOTES (regs
->array
[regno
].single_usage
)
920 (REG_NOTES (regs
->array
[regno
].single_usage
),
921 SET_DEST (set
), copy_rtx (SET_SRC (set
))));
924 for (i
= 0; i
< LOOP_REGNO_NREGS (regno
, SET_DEST (set
));
926 regs
->array
[regno
+i
].set_in_loop
= 0;
930 m
= (struct movable
*) xmalloc (sizeof (struct movable
));
934 m
->dependencies
= dependencies
;
935 m
->set_dest
= SET_DEST (set
);
938 = regs
->array
[REGNO (SET_DEST (set
))].set_in_loop
- 1;
942 m
->move_insn
= move_insn
;
943 m
->move_insn_first
= 0;
944 m
->insert_temp
= insert_temp
;
945 m
->is_equiv
= (find_reg_note (p
, REG_EQUIV
, NULL_RTX
) != 0);
946 m
->savemode
= VOIDmode
;
948 /* Set M->cond if either loop_invariant_p
949 or consec_sets_invariant_p returned 2
950 (only conditionally invariant). */
951 m
->cond
= ((tem
| tem1
| tem2
) > 1);
952 m
->global
= LOOP_REG_GLOBAL_P (loop
, regno
);
954 m
->lifetime
= LOOP_REG_LIFETIME (loop
, regno
);
955 m
->savings
= regs
->array
[regno
].n_times_set
;
956 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
957 m
->savings
+= libcall_benefit (p
);
958 for (i
= 0; i
< LOOP_REGNO_NREGS (regno
, SET_DEST (set
)); i
++)
959 regs
->array
[regno
+i
].set_in_loop
= move_insn
? -2 : -1;
960 /* Add M to the end of the chain MOVABLES. */
961 loop_movables_add (movables
, m
);
965 /* It is possible for the first instruction to have a
966 REG_EQUAL note but a non-invariant SET_SRC, so we must
967 remember the status of the first instruction in case
968 the last instruction doesn't have a REG_EQUAL note. */
969 m
->move_insn_first
= m
->move_insn
;
971 /* Skip this insn, not checking REG_LIBCALL notes. */
972 p
= next_nonnote_insn (p
);
973 /* Skip the consecutive insns, if there are any. */
974 p
= skip_consec_insns (p
, m
->consec
);
975 /* Back up to the last insn of the consecutive group. */
976 p
= prev_nonnote_insn (p
);
978 /* We must now reset m->move_insn, m->is_equiv, and
979 possibly m->set_src to correspond to the effects of
981 temp
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
);
983 m
->set_src
= XEXP (temp
, 0), m
->move_insn
= 1;
986 temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
987 if (temp
&& CONSTANT_P (XEXP (temp
, 0)))
988 m
->set_src
= XEXP (temp
, 0), m
->move_insn
= 1;
994 = (find_reg_note (p
, REG_EQUIV
, NULL_RTX
) != 0);
997 /* If this register is always set within a STRICT_LOW_PART
998 or set to zero, then its high bytes are constant.
999 So clear them outside the loop and within the loop
1000 just load the low bytes.
1001 We must check that the machine has an instruction to do so.
1002 Also, if the value loaded into the register
1003 depends on the same register, this cannot be done. */
1004 else if (SET_SRC (set
) == const0_rtx
1005 && GET_CODE (NEXT_INSN (p
)) == INSN
1006 && (set1
= single_set (NEXT_INSN (p
)))
1007 && GET_CODE (set1
) == SET
1008 && (GET_CODE (SET_DEST (set1
)) == STRICT_LOW_PART
)
1009 && (GET_CODE (XEXP (SET_DEST (set1
), 0)) == SUBREG
)
1010 && (SUBREG_REG (XEXP (SET_DEST (set1
), 0))
1012 && !reg_mentioned_p (SET_DEST (set
), SET_SRC (set1
)))
1014 int regno
= REGNO (SET_DEST (set
));
1015 if (regs
->array
[regno
].set_in_loop
== 2)
1018 m
= (struct movable
*) xmalloc (sizeof (struct movable
));
1021 m
->set_dest
= SET_DEST (set
);
1022 m
->dependencies
= 0;
1028 m
->move_insn_first
= 0;
1029 m
->insert_temp
= insert_temp
;
1031 /* If the insn may not be executed on some cycles,
1032 we can't clear the whole reg; clear just high part.
1033 Not even if the reg is used only within this loop.
1040 Clearing x before the inner loop could clobber a value
1041 being saved from the last time around the outer loop.
1042 However, if the reg is not used outside this loop
1043 and all uses of the register are in the same
1044 basic block as the store, there is no problem.
1046 If this insn was made by loop, we don't know its
1047 INSN_LUID and hence must make a conservative
1049 m
->global
= (INSN_UID (p
) >= max_uid_for_loop
1050 || LOOP_REG_GLOBAL_P (loop
, regno
)
1051 || (labels_in_range_p
1052 (p
, REGNO_FIRST_LUID (regno
))));
1053 if (maybe_never
&& m
->global
)
1054 m
->savemode
= GET_MODE (SET_SRC (set1
));
1056 m
->savemode
= VOIDmode
;
1060 m
->lifetime
= LOOP_REG_LIFETIME (loop
, regno
);
1063 i
< LOOP_REGNO_NREGS (regno
, SET_DEST (set
));
1065 regs
->array
[regno
+i
].set_in_loop
= -1;
1066 /* Add M to the end of the chain MOVABLES. */
1067 loop_movables_add (movables
, m
);
1072 /* Past a call insn, we get to insns which might not be executed
1073 because the call might exit. This matters for insns that trap.
1074 Constant and pure call insns always return, so they don't count. */
1075 else if (GET_CODE (p
) == CALL_INSN
&& ! CONST_OR_PURE_CALL_P (p
))
1077 /* Past a label or a jump, we get to insns for which we
1078 can't count on whether or how many times they will be
1079 executed during each iteration. Therefore, we can
1080 only move out sets of trivial variables
1081 (those not used after the loop). */
1082 /* Similar code appears twice in strength_reduce. */
1083 else if ((GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
)
1084 /* If we enter the loop in the middle, and scan around to the
1085 beginning, don't set maybe_never for that. This must be an
1086 unconditional jump, otherwise the code at the top of the
1087 loop might never be executed. Unconditional jumps are
1088 followed by a barrier then the loop_end. */
1089 && ! (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
) == loop
->top
1090 && NEXT_INSN (NEXT_INSN (p
)) == loop_end
1091 && any_uncondjump_p (p
)))
1093 else if (GET_CODE (p
) == NOTE
)
1095 /* At the virtual top of a converted loop, insns are again known to
1096 be executed: logically, the loop begins here even though the exit
1097 code has been duplicated. */
1098 if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
&& loop_depth
== 0)
1099 maybe_never
= call_passed
= 0;
1100 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
1102 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
1107 /* If one movable subsumes another, ignore that other. */
1109 ignore_some_movables (movables
);
1111 /* For each movable insn, see if the reg that it loads
1112 leads when it dies right into another conditionally movable insn.
1113 If so, record that the second insn "forces" the first one,
1114 since the second can be moved only if the first is. */
1116 force_movables (movables
);
1118 /* See if there are multiple movable insns that load the same value.
1119 If there are, make all but the first point at the first one
1120 through the `match' field, and add the priorities of them
1121 all together as the priority of the first. */
1123 combine_movables (movables
, regs
);
1125 /* Now consider each movable insn to decide whether it is worth moving.
1126 Store 0 in regs->array[I].set_in_loop for each reg I that is moved.
1128 For machines with few registers this increases code size, so do not
1129 move moveables when optimizing for code size on such machines.
1130 (The 18 below is the value for i386.) */
1133 || (reg_class_size
[GENERAL_REGS
] > 18 && !loop_info
->has_call
))
1135 move_movables (loop
, movables
, threshold
, insn_count
);
1137 /* Recalculate regs->array if move_movables has created new
1139 if (max_reg_num () > regs
->num
)
1141 loop_regs_scan (loop
, 0);
1142 for (update_start
= loop_start
;
1143 PREV_INSN (update_start
)
1144 && GET_CODE (PREV_INSN (update_start
)) != CODE_LABEL
;
1145 update_start
= PREV_INSN (update_start
))
1147 update_end
= NEXT_INSN (loop_end
);
1149 reg_scan_update (update_start
, update_end
, loop_max_reg
);
1150 loop_max_reg
= max_reg_num ();
1154 /* Now candidates that still are negative are those not moved.
1155 Change regs->array[I].set_in_loop to indicate that those are not actually
1157 for (i
= 0; i
< regs
->num
; i
++)
1158 if (regs
->array
[i
].set_in_loop
< 0)
1159 regs
->array
[i
].set_in_loop
= regs
->array
[i
].n_times_set
;
1161 /* Now that we've moved some things out of the loop, we might be able to
1162 hoist even more memory references. */
1165 /* Recalculate regs->array if load_mems has created new registers. */
1166 if (max_reg_num () > regs
->num
)
1167 loop_regs_scan (loop
, 0);
1169 for (update_start
= loop_start
;
1170 PREV_INSN (update_start
)
1171 && GET_CODE (PREV_INSN (update_start
)) != CODE_LABEL
;
1172 update_start
= PREV_INSN (update_start
))
1174 update_end
= NEXT_INSN (loop_end
);
1176 reg_scan_update (update_start
, update_end
, loop_max_reg
);
1177 loop_max_reg
= max_reg_num ();
1179 if (flag_strength_reduce
)
1181 if (update_end
&& GET_CODE (update_end
) == CODE_LABEL
)
1182 /* Ensure our label doesn't go away. */
1183 LABEL_NUSES (update_end
)++;
1185 strength_reduce (loop
, flags
);
1187 reg_scan_update (update_start
, update_end
, loop_max_reg
);
1188 loop_max_reg
= max_reg_num ();
1190 if (update_end
&& GET_CODE (update_end
) == CODE_LABEL
1191 && --LABEL_NUSES (update_end
) == 0)
1192 delete_related_insns (update_end
);
1196 /* The movable information is required for strength reduction. */
1197 loop_movables_free (movables
);
1204 /* Add elements to *OUTPUT to record all the pseudo-regs
1205 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
1208 record_excess_regs (in_this
, not_in_this
, output
)
1209 rtx in_this
, not_in_this
;
1216 code
= GET_CODE (in_this
);
1230 if (REGNO (in_this
) >= FIRST_PSEUDO_REGISTER
1231 && ! reg_mentioned_p (in_this
, not_in_this
))
1232 *output
= gen_rtx_EXPR_LIST (VOIDmode
, in_this
, *output
);
1239 fmt
= GET_RTX_FORMAT (code
);
1240 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1247 for (j
= 0; j
< XVECLEN (in_this
, i
); j
++)
1248 record_excess_regs (XVECEXP (in_this
, i
, j
), not_in_this
, output
);
1252 record_excess_regs (XEXP (in_this
, i
), not_in_this
, output
);
1258 /* Check what regs are referred to in the libcall block ending with INSN,
1259 aside from those mentioned in the equivalent value.
1260 If there are none, return 0.
1261 If there are one or more, return an EXPR_LIST containing all of them. */
1264 libcall_other_reg (insn
, equiv
)
1267 rtx note
= find_reg_note (insn
, REG_RETVAL
, NULL_RTX
);
1268 rtx p
= XEXP (note
, 0);
1271 /* First, find all the regs used in the libcall block
1272 that are not mentioned as inputs to the result. */
1276 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
1277 || GET_CODE (p
) == CALL_INSN
)
1278 record_excess_regs (PATTERN (p
), equiv
, &output
);
1285 /* Return 1 if all uses of REG
1286 are between INSN and the end of the basic block. */
1289 reg_in_basic_block_p (insn
, reg
)
1292 int regno
= REGNO (reg
);
1295 if (REGNO_FIRST_UID (regno
) != INSN_UID (insn
))
1298 /* Search this basic block for the already recorded last use of the reg. */
1299 for (p
= insn
; p
; p
= NEXT_INSN (p
))
1301 switch (GET_CODE (p
))
1308 /* Ordinary insn: if this is the last use, we win. */
1309 if (REGNO_LAST_UID (regno
) == INSN_UID (p
))
1314 /* Jump insn: if this is the last use, we win. */
1315 if (REGNO_LAST_UID (regno
) == INSN_UID (p
))
1317 /* Otherwise, it's the end of the basic block, so we lose. */
1322 /* It's the end of the basic block, so we lose. */
1330 /* The "last use" that was recorded can't be found after the first
1331 use. This can happen when the last use was deleted while
1332 processing an inner loop, this inner loop was then completely
1333 unrolled, and the outer loop is always exited after the inner loop,
1334 so that everything after the first use becomes a single basic block. */
1338 /* Compute the benefit of eliminating the insns in the block whose
1339 last insn is LAST. This may be a group of insns used to compute a
1340 value directly or can contain a library call. */
1343 libcall_benefit (last
)
1349 for (insn
= XEXP (find_reg_note (last
, REG_RETVAL
, NULL_RTX
), 0);
1350 insn
!= last
; insn
= NEXT_INSN (insn
))
1352 if (GET_CODE (insn
) == CALL_INSN
)
1353 benefit
+= 10; /* Assume at least this many insns in a library
1355 else if (GET_CODE (insn
) == INSN
1356 && GET_CODE (PATTERN (insn
)) != USE
1357 && GET_CODE (PATTERN (insn
)) != CLOBBER
)
1364 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1367 skip_consec_insns (insn
, count
)
1371 for (; count
> 0; count
--)
1375 /* If first insn of libcall sequence, skip to end. */
1376 /* Do this at start of loop, since INSN is guaranteed to
1378 if (GET_CODE (insn
) != NOTE
1379 && (temp
= find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
)))
1380 insn
= XEXP (temp
, 0);
1383 insn
= NEXT_INSN (insn
);
1384 while (GET_CODE (insn
) == NOTE
);
1390 /* Ignore any movable whose insn falls within a libcall
1391 which is part of another movable.
1392 We make use of the fact that the movable for the libcall value
1393 was made later and so appears later on the chain. */
1396 ignore_some_movables (movables
)
1397 struct loop_movables
*movables
;
1399 struct movable
*m
, *m1
;
1401 for (m
= movables
->head
; m
; m
= m
->next
)
1403 /* Is this a movable for the value of a libcall? */
1404 rtx note
= find_reg_note (m
->insn
, REG_RETVAL
, NULL_RTX
);
1408 /* Check for earlier movables inside that range,
1409 and mark them invalid. We cannot use LUIDs here because
1410 insns created by loop.c for prior loops don't have LUIDs.
1411 Rather than reject all such insns from movables, we just
1412 explicitly check each insn in the libcall (since invariant
1413 libcalls aren't that common). */
1414 for (insn
= XEXP (note
, 0); insn
!= m
->insn
; insn
= NEXT_INSN (insn
))
1415 for (m1
= movables
->head
; m1
!= m
; m1
= m1
->next
)
1416 if (m1
->insn
== insn
)
1422 /* For each movable insn, see if the reg that it loads
1423 leads when it dies right into another conditionally movable insn.
1424 If so, record that the second insn "forces" the first one,
1425 since the second can be moved only if the first is. */
1428 force_movables (movables
)
1429 struct loop_movables
*movables
;
1431 struct movable
*m
, *m1
;
1433 for (m1
= movables
->head
; m1
; m1
= m1
->next
)
1434 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1435 if (!m1
->partial
&& !m1
->done
)
1437 int regno
= m1
->regno
;
1438 for (m
= m1
->next
; m
; m
= m
->next
)
1439 /* ??? Could this be a bug? What if CSE caused the
1440 register of M1 to be used after this insn?
1441 Since CSE does not update regno_last_uid,
1442 this insn M->insn might not be where it dies.
1443 But very likely this doesn't matter; what matters is
1444 that M's reg is computed from M1's reg. */
1445 if (INSN_UID (m
->insn
) == REGNO_LAST_UID (regno
)
1448 if (m
!= 0 && m
->set_src
== m1
->set_dest
1449 /* If m->consec, m->set_src isn't valid. */
1453 /* Increase the priority of the moving the first insn
1454 since it permits the second to be moved as well. */
1458 m1
->lifetime
+= m
->lifetime
;
1459 m1
->savings
+= m
->savings
;
1464 /* Find invariant expressions that are equal and can be combined into
1468 combine_movables (movables
, regs
)
1469 struct loop_movables
*movables
;
1470 struct loop_regs
*regs
;
1473 char *matched_regs
= (char *) xmalloc (regs
->num
);
1474 enum machine_mode mode
;
1476 /* Regs that are set more than once are not allowed to match
1477 or be matched. I'm no longer sure why not. */
1478 /* Only pseudo registers are allowed to match or be matched,
1479 since move_movables does not validate the change. */
1480 /* Perhaps testing m->consec_sets would be more appropriate here? */
1482 for (m
= movables
->head
; m
; m
= m
->next
)
1483 if (m
->match
== 0 && regs
->array
[m
->regno
].n_times_set
== 1
1484 && m
->regno
>= FIRST_PSEUDO_REGISTER
1489 int regno
= m
->regno
;
1491 memset (matched_regs
, 0, regs
->num
);
1492 matched_regs
[regno
] = 1;
1494 /* We want later insns to match the first one. Don't make the first
1495 one match any later ones. So start this loop at m->next. */
1496 for (m1
= m
->next
; m1
; m1
= m1
->next
)
1497 if (m
!= m1
&& m1
->match
== 0
1499 && regs
->array
[m1
->regno
].n_times_set
== 1
1500 && m1
->regno
>= FIRST_PSEUDO_REGISTER
1501 /* A reg used outside the loop mustn't be eliminated. */
1503 /* A reg used for zero-extending mustn't be eliminated. */
1505 && (matched_regs
[m1
->regno
]
1508 /* Can combine regs with different modes loaded from the
1509 same constant only if the modes are the same or
1510 if both are integer modes with M wider or the same
1511 width as M1. The check for integer is redundant, but
1512 safe, since the only case of differing destination
1513 modes with equal sources is when both sources are
1514 VOIDmode, i.e., CONST_INT. */
1515 (GET_MODE (m
->set_dest
) == GET_MODE (m1
->set_dest
)
1516 || (GET_MODE_CLASS (GET_MODE (m
->set_dest
)) == MODE_INT
1517 && GET_MODE_CLASS (GET_MODE (m1
->set_dest
)) == MODE_INT
1518 && (GET_MODE_BITSIZE (GET_MODE (m
->set_dest
))
1519 >= GET_MODE_BITSIZE (GET_MODE (m1
->set_dest
)))))
1520 /* See if the source of M1 says it matches M. */
1521 && ((GET_CODE (m1
->set_src
) == REG
1522 && matched_regs
[REGNO (m1
->set_src
)])
1523 || rtx_equal_for_loop_p (m
->set_src
, m1
->set_src
,
1525 && ((m
->dependencies
== m1
->dependencies
)
1526 || rtx_equal_p (m
->dependencies
, m1
->dependencies
)))
1528 m
->lifetime
+= m1
->lifetime
;
1529 m
->savings
+= m1
->savings
;
1532 matched_regs
[m1
->regno
] = 1;
1536 /* Now combine the regs used for zero-extension.
1537 This can be done for those not marked `global'
1538 provided their lives don't overlap. */
1540 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
1541 mode
= GET_MODE_WIDER_MODE (mode
))
1543 struct movable
*m0
= 0;
1545 /* Combine all the registers for extension from mode MODE.
1546 Don't combine any that are used outside this loop. */
1547 for (m
= movables
->head
; m
; m
= m
->next
)
1548 if (m
->partial
&& ! m
->global
1549 && mode
== GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m
->insn
)))))
1553 int first
= REGNO_FIRST_LUID (m
->regno
);
1554 int last
= REGNO_LAST_LUID (m
->regno
);
1558 /* First one: don't check for overlap, just record it. */
1563 /* Make sure they extend to the same mode.
1564 (Almost always true.) */
1565 if (GET_MODE (m
->set_dest
) != GET_MODE (m0
->set_dest
))
1568 /* We already have one: check for overlap with those
1569 already combined together. */
1570 for (m1
= movables
->head
; m1
!= m
; m1
= m1
->next
)
1571 if (m1
== m0
|| (m1
->partial
&& m1
->match
== m0
))
1572 if (! (REGNO_FIRST_LUID (m1
->regno
) > last
1573 || REGNO_LAST_LUID (m1
->regno
) < first
))
1576 /* No overlap: we can combine this with the others. */
1577 m0
->lifetime
+= m
->lifetime
;
1578 m0
->savings
+= m
->savings
;
1588 free (matched_regs
);
1591 /* Returns the number of movable instructions in LOOP that were not
1592 moved outside the loop. */
1595 num_unmoved_movables (loop
)
1596 const struct loop
*loop
;
1601 for (m
= LOOP_MOVABLES (loop
)->head
; m
; m
= m
->next
)
1609 /* Return 1 if regs X and Y will become the same if moved. */
1612 regs_match_p (x
, y
, movables
)
1614 struct loop_movables
*movables
;
1616 unsigned int xn
= REGNO (x
);
1617 unsigned int yn
= REGNO (y
);
1618 struct movable
*mx
, *my
;
1620 for (mx
= movables
->head
; mx
; mx
= mx
->next
)
1621 if (mx
->regno
== xn
)
1624 for (my
= movables
->head
; my
; my
= my
->next
)
1625 if (my
->regno
== yn
)
1629 && ((mx
->match
== my
->match
&& mx
->match
!= 0)
1631 || mx
== my
->match
));
1634 /* Return 1 if X and Y are identical-looking rtx's.
1635 This is the Lisp function EQUAL for rtx arguments.
1637 If two registers are matching movables or a movable register and an
1638 equivalent constant, consider them equal. */
1641 rtx_equal_for_loop_p (x
, y
, movables
, regs
)
1643 struct loop_movables
*movables
;
1644 struct loop_regs
*regs
;
1654 if (x
== 0 || y
== 0)
1657 code
= GET_CODE (x
);
1659 /* If we have a register and a constant, they may sometimes be
1661 if (GET_CODE (x
) == REG
&& regs
->array
[REGNO (x
)].set_in_loop
== -2
1664 for (m
= movables
->head
; m
; m
= m
->next
)
1665 if (m
->move_insn
&& m
->regno
== REGNO (x
)
1666 && rtx_equal_p (m
->set_src
, y
))
1669 else if (GET_CODE (y
) == REG
&& regs
->array
[REGNO (y
)].set_in_loop
== -2
1672 for (m
= movables
->head
; m
; m
= m
->next
)
1673 if (m
->move_insn
&& m
->regno
== REGNO (y
)
1674 && rtx_equal_p (m
->set_src
, x
))
1678 /* Otherwise, rtx's of different codes cannot be equal. */
1679 if (code
!= GET_CODE (y
))
1682 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1683 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1685 if (GET_MODE (x
) != GET_MODE (y
))
1688 /* These three types of rtx's can be compared nonrecursively. */
1690 return (REGNO (x
) == REGNO (y
) || regs_match_p (x
, y
, movables
));
1692 if (code
== LABEL_REF
)
1693 return XEXP (x
, 0) == XEXP (y
, 0);
1694 if (code
== SYMBOL_REF
)
1695 return XSTR (x
, 0) == XSTR (y
, 0);
1697 /* Compare the elements. If any pair of corresponding elements
1698 fail to match, return 0 for the whole things. */
1700 fmt
= GET_RTX_FORMAT (code
);
1701 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1706 if (XWINT (x
, i
) != XWINT (y
, i
))
1711 if (XINT (x
, i
) != XINT (y
, i
))
1716 /* Two vectors must have the same length. */
1717 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
1720 /* And the corresponding elements must match. */
1721 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1722 if (rtx_equal_for_loop_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
),
1723 movables
, regs
) == 0)
1728 if (rtx_equal_for_loop_p (XEXP (x
, i
), XEXP (y
, i
), movables
, regs
)
1734 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
1739 /* These are just backpointers, so they don't matter. */
1745 /* It is believed that rtx's at this level will never
1746 contain anything but integers and other rtx's,
1747 except for within LABEL_REFs and SYMBOL_REFs. */
1755 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to all
1756 insns in INSNS which use the reference. LABEL_NUSES for CODE_LABEL
1757 references is incremented once for each added note. */
1760 add_label_notes (x
, insns
)
1764 enum rtx_code code
= GET_CODE (x
);
1769 if (code
== LABEL_REF
&& !LABEL_REF_NONLOCAL_P (x
))
1771 /* This code used to ignore labels that referred to dispatch tables to
1772 avoid flow generating (slighly) worse code.
1774 We no longer ignore such label references (see LABEL_REF handling in
1775 mark_jump_label for additional information). */
1776 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
1777 if (reg_mentioned_p (XEXP (x
, 0), insn
))
1779 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_LABEL
, XEXP (x
, 0),
1781 if (LABEL_P (XEXP (x
, 0)))
1782 LABEL_NUSES (XEXP (x
, 0))++;
1786 fmt
= GET_RTX_FORMAT (code
);
1787 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1790 add_label_notes (XEXP (x
, i
), insns
);
1791 else if (fmt
[i
] == 'E')
1792 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
1793 add_label_notes (XVECEXP (x
, i
, j
), insns
);
1797 /* Scan MOVABLES, and move the insns that deserve to be moved.
1798 If two matching movables are combined, replace one reg with the
1799 other throughout. */
1802 move_movables (loop
, movables
, threshold
, insn_count
)
1804 struct loop_movables
*movables
;
1808 struct loop_regs
*regs
= LOOP_REGS (loop
);
1809 int nregs
= regs
->num
;
1813 rtx loop_start
= loop
->start
;
1814 rtx loop_end
= loop
->end
;
1815 /* Map of pseudo-register replacements to handle combining
1816 when we move several insns that load the same value
1817 into different pseudo-registers. */
1818 rtx
*reg_map
= (rtx
*) xcalloc (nregs
, sizeof (rtx
));
1819 char *already_moved
= (char *) xcalloc (nregs
, sizeof (char));
1821 for (m
= movables
->head
; m
; m
= m
->next
)
1823 /* Describe this movable insn. */
1825 if (loop_dump_stream
)
1827 fprintf (loop_dump_stream
, "Insn %d: regno %d (life %d), ",
1828 INSN_UID (m
->insn
), m
->regno
, m
->lifetime
);
1830 fprintf (loop_dump_stream
, "consec %d, ", m
->consec
);
1832 fprintf (loop_dump_stream
, "cond ");
1834 fprintf (loop_dump_stream
, "force ");
1836 fprintf (loop_dump_stream
, "global ");
1838 fprintf (loop_dump_stream
, "done ");
1840 fprintf (loop_dump_stream
, "move-insn ");
1842 fprintf (loop_dump_stream
, "matches %d ",
1843 INSN_UID (m
->match
->insn
));
1845 fprintf (loop_dump_stream
, "forces %d ",
1846 INSN_UID (m
->forces
->insn
));
1849 /* Ignore the insn if it's already done (it matched something else).
1850 Otherwise, see if it is now safe to move. */
1854 || (1 == loop_invariant_p (loop
, m
->set_src
)
1855 && (m
->dependencies
== 0
1856 || 1 == loop_invariant_p (loop
, m
->dependencies
))
1858 || 1 == consec_sets_invariant_p (loop
, m
->set_dest
,
1861 && (! m
->forces
|| m
->forces
->done
))
1865 int savings
= m
->savings
;
1867 /* We have an insn that is safe to move.
1868 Compute its desirability. */
1873 if (loop_dump_stream
)
1874 fprintf (loop_dump_stream
, "savings %d ", savings
);
1876 if (regs
->array
[regno
].moved_once
&& loop_dump_stream
)
1877 fprintf (loop_dump_stream
, "halved since already moved ");
1879 /* An insn MUST be moved if we already moved something else
1880 which is safe only if this one is moved too: that is,
1881 if already_moved[REGNO] is nonzero. */
1883 /* An insn is desirable to move if the new lifetime of the
1884 register is no more than THRESHOLD times the old lifetime.
1885 If it's not desirable, it means the loop is so big
1886 that moving won't speed things up much,
1887 and it is liable to make register usage worse. */
1889 /* It is also desirable to move if it can be moved at no
1890 extra cost because something else was already moved. */
1892 if (already_moved
[regno
]
1893 || flag_move_all_movables
1894 || (threshold
* savings
* m
->lifetime
) >=
1895 (regs
->array
[regno
].moved_once
? insn_count
* 2 : insn_count
)
1896 || (m
->forces
&& m
->forces
->done
1897 && regs
->array
[m
->forces
->regno
].n_times_set
== 1))
1901 rtx first
= NULL_RTX
;
1902 rtx newreg
= NULL_RTX
;
1905 newreg
= gen_reg_rtx (GET_MODE (m
->set_dest
));
1907 /* Now move the insns that set the reg. */
1909 if (m
->partial
&& m
->match
)
1913 /* Find the end of this chain of matching regs.
1914 Thus, we load each reg in the chain from that one reg.
1915 And that reg is loaded with 0 directly,
1916 since it has ->match == 0. */
1917 for (m1
= m
; m1
->match
; m1
= m1
->match
);
1918 newpat
= gen_move_insn (SET_DEST (PATTERN (m
->insn
)),
1919 SET_DEST (PATTERN (m1
->insn
)));
1920 i1
= loop_insn_hoist (loop
, newpat
);
1922 /* Mark the moved, invariant reg as being allowed to
1923 share a hard reg with the other matching invariant. */
1924 REG_NOTES (i1
) = REG_NOTES (m
->insn
);
1925 r1
= SET_DEST (PATTERN (m
->insn
));
1926 r2
= SET_DEST (PATTERN (m1
->insn
));
1928 = gen_rtx_EXPR_LIST (VOIDmode
, r1
,
1929 gen_rtx_EXPR_LIST (VOIDmode
, r2
,
1931 delete_insn (m
->insn
);
1936 if (loop_dump_stream
)
1937 fprintf (loop_dump_stream
, " moved to %d", INSN_UID (i1
));
1939 /* If we are to re-generate the item being moved with a
1940 new move insn, first delete what we have and then emit
1941 the move insn before the loop. */
1942 else if (m
->move_insn
)
1946 for (count
= m
->consec
; count
>= 0; count
--)
1948 /* If this is the first insn of a library call sequence,
1949 something is very wrong. */
1950 if (GET_CODE (p
) != NOTE
1951 && (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
1954 /* If this is the last insn of a libcall sequence, then
1955 delete every insn in the sequence except the last.
1956 The last insn is handled in the normal manner. */
1957 if (GET_CODE (p
) != NOTE
1958 && (temp
= find_reg_note (p
, REG_RETVAL
, NULL_RTX
)))
1960 temp
= XEXP (temp
, 0);
1962 temp
= delete_insn (temp
);
1966 p
= delete_insn (p
);
1968 /* simplify_giv_expr expects that it can walk the insns
1969 at m->insn forwards and see this old sequence we are
1970 tossing here. delete_insn does preserve the next
1971 pointers, but when we skip over a NOTE we must fix
1972 it up. Otherwise that code walks into the non-deleted
1974 while (p
&& GET_CODE (p
) == NOTE
)
1975 p
= NEXT_INSN (temp
) = NEXT_INSN (p
);
1979 /* Replace the original insn with a move from
1980 our newly created temp. */
1982 emit_move_insn (m
->set_dest
, newreg
);
1985 emit_insn_before (seq
, p
);
1990 emit_move_insn (m
->insert_temp
? newreg
: m
->set_dest
,
1995 add_label_notes (m
->set_src
, seq
);
1997 i1
= loop_insn_hoist (loop
, seq
);
1998 if (! find_reg_note (i1
, REG_EQUAL
, NULL_RTX
))
1999 set_unique_reg_note (i1
,
2000 m
->is_equiv
? REG_EQUIV
: REG_EQUAL
,
2003 if (loop_dump_stream
)
2004 fprintf (loop_dump_stream
, " moved to %d", INSN_UID (i1
));
2006 /* The more regs we move, the less we like moving them. */
2011 for (count
= m
->consec
; count
>= 0; count
--)
2015 /* If first insn of libcall sequence, skip to end. */
2016 /* Do this at start of loop, since p is guaranteed to
2018 if (GET_CODE (p
) != NOTE
2019 && (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
2022 /* If last insn of libcall sequence, move all
2023 insns except the last before the loop. The last
2024 insn is handled in the normal manner. */
2025 if (GET_CODE (p
) != NOTE
2026 && (temp
= find_reg_note (p
, REG_RETVAL
, NULL_RTX
)))
2030 rtx fn_address_insn
= 0;
2033 for (temp
= XEXP (temp
, 0); temp
!= p
;
2034 temp
= NEXT_INSN (temp
))
2040 if (GET_CODE (temp
) == NOTE
)
2043 body
= PATTERN (temp
);
2045 /* Find the next insn after TEMP,
2046 not counting USE or NOTE insns. */
2047 for (next
= NEXT_INSN (temp
); next
!= p
;
2048 next
= NEXT_INSN (next
))
2049 if (! (GET_CODE (next
) == INSN
2050 && GET_CODE (PATTERN (next
)) == USE
)
2051 && GET_CODE (next
) != NOTE
)
2054 /* If that is the call, this may be the insn
2055 that loads the function address.
2057 Extract the function address from the insn
2058 that loads it into a register.
2059 If this insn was cse'd, we get incorrect code.
2061 So emit a new move insn that copies the
2062 function address into the register that the
2063 call insn will use. flow.c will delete any
2064 redundant stores that we have created. */
2065 if (GET_CODE (next
) == CALL_INSN
2066 && GET_CODE (body
) == SET
2067 && GET_CODE (SET_DEST (body
)) == REG
2068 && (n
= find_reg_note (temp
, REG_EQUAL
,
2071 fn_reg
= SET_SRC (body
);
2072 if (GET_CODE (fn_reg
) != REG
)
2073 fn_reg
= SET_DEST (body
);
2074 fn_address
= XEXP (n
, 0);
2075 fn_address_insn
= temp
;
2077 /* We have the call insn.
2078 If it uses the register we suspect it might,
2079 load it with the correct address directly. */
2080 if (GET_CODE (temp
) == CALL_INSN
2082 && reg_referenced_p (fn_reg
, body
))
2083 loop_insn_emit_after (loop
, 0, fn_address_insn
,
2085 (fn_reg
, fn_address
));
2087 if (GET_CODE (temp
) == CALL_INSN
)
2089 i1
= loop_call_insn_hoist (loop
, body
);
2090 /* Because the USAGE information potentially
2091 contains objects other than hard registers
2092 we need to copy it. */
2093 if (CALL_INSN_FUNCTION_USAGE (temp
))
2094 CALL_INSN_FUNCTION_USAGE (i1
)
2095 = copy_rtx (CALL_INSN_FUNCTION_USAGE (temp
));
2098 i1
= loop_insn_hoist (loop
, body
);
2101 if (temp
== fn_address_insn
)
2102 fn_address_insn
= i1
;
2103 REG_NOTES (i1
) = REG_NOTES (temp
);
2104 REG_NOTES (temp
) = NULL
;
2110 if (m
->savemode
!= VOIDmode
)
2112 /* P sets REG to zero; but we should clear only
2113 the bits that are not covered by the mode
2115 rtx reg
= m
->set_dest
;
2120 tem
= expand_simple_binop
2121 (GET_MODE (reg
), AND
, reg
,
2122 GEN_INT ((((HOST_WIDE_INT
) 1
2123 << GET_MODE_BITSIZE (m
->savemode
)))
2125 reg
, 1, OPTAB_LIB_WIDEN
);
2129 emit_move_insn (reg
, tem
);
2130 sequence
= get_insns ();
2132 i1
= loop_insn_hoist (loop
, sequence
);
2134 else if (GET_CODE (p
) == CALL_INSN
)
2136 i1
= loop_call_insn_hoist (loop
, PATTERN (p
));
2137 /* Because the USAGE information potentially
2138 contains objects other than hard registers
2139 we need to copy it. */
2140 if (CALL_INSN_FUNCTION_USAGE (p
))
2141 CALL_INSN_FUNCTION_USAGE (i1
)
2142 = copy_rtx (CALL_INSN_FUNCTION_USAGE (p
));
2144 else if (count
== m
->consec
&& m
->move_insn_first
)
2147 /* The SET_SRC might not be invariant, so we must
2148 use the REG_EQUAL note. */
2150 emit_move_insn (m
->set_dest
, m
->set_src
);
2154 add_label_notes (m
->set_src
, seq
);
2156 i1
= loop_insn_hoist (loop
, seq
);
2157 if (! find_reg_note (i1
, REG_EQUAL
, NULL_RTX
))
2158 set_unique_reg_note (i1
, m
->is_equiv
? REG_EQUIV
2159 : REG_EQUAL
, m
->set_src
);
2161 else if (m
->insert_temp
)
2163 rtx
*reg_map2
= (rtx
*) xcalloc (REGNO (newreg
),
2165 reg_map2
[m
->regno
] = newreg
;
2167 i1
= loop_insn_hoist (loop
, copy_rtx (PATTERN (p
)));
2168 replace_regs (i1
, reg_map2
, REGNO (newreg
), 1);
2172 i1
= loop_insn_hoist (loop
, PATTERN (p
));
2174 if (REG_NOTES (i1
) == 0)
2176 REG_NOTES (i1
) = REG_NOTES (p
);
2177 REG_NOTES (p
) = NULL
;
2179 /* If there is a REG_EQUAL note present whose value
2180 is not loop invariant, then delete it, since it
2181 may cause problems with later optimization passes.
2182 It is possible for cse to create such notes
2183 like this as a result of record_jump_cond. */
2185 if ((temp
= find_reg_note (i1
, REG_EQUAL
, NULL_RTX
))
2186 && ! loop_invariant_p (loop
, XEXP (temp
, 0)))
2187 remove_note (i1
, temp
);
2193 if (loop_dump_stream
)
2194 fprintf (loop_dump_stream
, " moved to %d",
2197 /* If library call, now fix the REG_NOTES that contain
2198 insn pointers, namely REG_LIBCALL on FIRST
2199 and REG_RETVAL on I1. */
2200 if ((temp
= find_reg_note (i1
, REG_RETVAL
, NULL_RTX
)))
2202 XEXP (temp
, 0) = first
;
2203 temp
= find_reg_note (first
, REG_LIBCALL
, NULL_RTX
);
2204 XEXP (temp
, 0) = i1
;
2211 /* simplify_giv_expr expects that it can walk the insns
2212 at m->insn forwards and see this old sequence we are
2213 tossing here. delete_insn does preserve the next
2214 pointers, but when we skip over a NOTE we must fix
2215 it up. Otherwise that code walks into the non-deleted
2217 while (p
&& GET_CODE (p
) == NOTE
)
2218 p
= NEXT_INSN (temp
) = NEXT_INSN (p
);
2223 /* Replace the original insn with a move from
2224 our newly created temp. */
2226 emit_move_insn (m
->set_dest
, newreg
);
2229 emit_insn_before (seq
, p
);
2233 /* The more regs we move, the less we like moving them. */
2239 if (!m
->insert_temp
)
2241 /* Any other movable that loads the same register
2243 already_moved
[regno
] = 1;
2245 /* This reg has been moved out of one loop. */
2246 regs
->array
[regno
].moved_once
= 1;
2248 /* The reg set here is now invariant. */
2252 for (i
= 0; i
< LOOP_REGNO_NREGS (regno
, m
->set_dest
); i
++)
2253 regs
->array
[regno
+i
].set_in_loop
= 0;
2256 /* Change the length-of-life info for the register
2257 to say it lives at least the full length of this loop.
2258 This will help guide optimizations in outer loops. */
2260 if (REGNO_FIRST_LUID (regno
) > INSN_LUID (loop_start
))
2261 /* This is the old insn before all the moved insns.
2262 We can't use the moved insn because it is out of range
2263 in uid_luid. Only the old insns have luids. */
2264 REGNO_FIRST_UID (regno
) = INSN_UID (loop_start
);
2265 if (REGNO_LAST_LUID (regno
) < INSN_LUID (loop_end
))
2266 REGNO_LAST_UID (regno
) = INSN_UID (loop_end
);
2269 /* Combine with this moved insn any other matching movables. */
2272 for (m1
= movables
->head
; m1
; m1
= m1
->next
)
2277 /* Schedule the reg loaded by M1
2278 for replacement so that shares the reg of M.
2279 If the modes differ (only possible in restricted
2280 circumstances, make a SUBREG.
2282 Note this assumes that the target dependent files
2283 treat REG and SUBREG equally, including within
2284 GO_IF_LEGITIMATE_ADDRESS and in all the
2285 predicates since we never verify that replacing the
2286 original register with a SUBREG results in a
2287 recognizable insn. */
2288 if (GET_MODE (m
->set_dest
) == GET_MODE (m1
->set_dest
))
2289 reg_map
[m1
->regno
] = m
->set_dest
;
2292 = gen_lowpart_common (GET_MODE (m1
->set_dest
),
2295 /* Get rid of the matching insn
2296 and prevent further processing of it. */
2299 /* if library call, delete all insns. */
2300 if ((temp
= find_reg_note (m1
->insn
, REG_RETVAL
,
2302 delete_insn_chain (XEXP (temp
, 0), m1
->insn
);
2304 delete_insn (m1
->insn
);
2306 /* Any other movable that loads the same register
2308 already_moved
[m1
->regno
] = 1;
2310 /* The reg merged here is now invariant,
2311 if the reg it matches is invariant. */
2316 i
< LOOP_REGNO_NREGS (regno
, m1
->set_dest
);
2318 regs
->array
[m1
->regno
+i
].set_in_loop
= 0;
2322 else if (loop_dump_stream
)
2323 fprintf (loop_dump_stream
, "not desirable");
2325 else if (loop_dump_stream
&& !m
->match
)
2326 fprintf (loop_dump_stream
, "not safe");
2328 if (loop_dump_stream
)
2329 fprintf (loop_dump_stream
, "\n");
2333 new_start
= loop_start
;
2335 /* Go through all the instructions in the loop, making
2336 all the register substitutions scheduled in REG_MAP. */
2337 for (p
= new_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
2338 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
2339 || GET_CODE (p
) == CALL_INSN
)
2341 replace_regs (PATTERN (p
), reg_map
, nregs
, 0);
2342 replace_regs (REG_NOTES (p
), reg_map
, nregs
, 0);
2348 free (already_moved
);
2353 loop_movables_add (movables
, m
)
2354 struct loop_movables
*movables
;
2357 if (movables
->head
== 0)
2360 movables
->last
->next
= m
;
2366 loop_movables_free (movables
)
2367 struct loop_movables
*movables
;
2370 struct movable
*m_next
;
2372 for (m
= movables
->head
; m
; m
= m_next
)
2380 /* Scan X and replace the address of any MEM in it with ADDR.
2381 REG is the address that MEM should have before the replacement. */
2384 replace_call_address (x
, reg
, addr
)
2393 code
= GET_CODE (x
);
2407 /* Short cut for very common case. */
2408 replace_call_address (XEXP (x
, 1), reg
, addr
);
2412 /* Short cut for very common case. */
2413 replace_call_address (XEXP (x
, 0), reg
, addr
);
2417 /* If this MEM uses a reg other than the one we expected,
2418 something is wrong. */
2419 if (XEXP (x
, 0) != reg
)
2428 fmt
= GET_RTX_FORMAT (code
);
2429 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2432 replace_call_address (XEXP (x
, i
), reg
, addr
);
2433 else if (fmt
[i
] == 'E')
2436 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2437 replace_call_address (XVECEXP (x
, i
, j
), reg
, addr
);
2443 /* Return the number of memory refs to addresses that vary
2447 count_nonfixed_reads (loop
, x
)
2448 const struct loop
*loop
;
2459 code
= GET_CODE (x
);
2473 return ((loop_invariant_p (loop
, XEXP (x
, 0)) != 1)
2474 + count_nonfixed_reads (loop
, XEXP (x
, 0)));
2481 fmt
= GET_RTX_FORMAT (code
);
2482 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2485 value
+= count_nonfixed_reads (loop
, XEXP (x
, i
));
2489 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2490 value
+= count_nonfixed_reads (loop
, XVECEXP (x
, i
, j
));
2496 /* Scan a loop setting the elements `cont', `vtop', `loops_enclosed',
2497 `has_call', `has_nonconst_call', `has_volatile', `has_tablejump',
2498 `unknown_address_altered', `unknown_constant_address_altered', and
2499 `num_mem_sets' in LOOP. Also, fill in the array `mems' and the
2500 list `store_mems' in LOOP. */
2508 struct loop_info
*loop_info
= LOOP_INFO (loop
);
2509 rtx start
= loop
->start
;
2510 rtx end
= loop
->end
;
2511 /* The label after END. Jumping here is just like falling off the
2512 end of the loop. We use next_nonnote_insn instead of next_label
2513 as a hedge against the (pathological) case where some actual insn
2514 might end up between the two. */
2515 rtx exit_target
= next_nonnote_insn (end
);
2517 loop_info
->has_indirect_jump
= indirect_jump_in_function
;
2518 loop_info
->pre_header_has_call
= 0;
2519 loop_info
->has_call
= 0;
2520 loop_info
->has_nonconst_call
= 0;
2521 loop_info
->has_prefetch
= 0;
2522 loop_info
->has_volatile
= 0;
2523 loop_info
->has_tablejump
= 0;
2524 loop_info
->has_multiple_exit_targets
= 0;
2527 loop_info
->unknown_address_altered
= 0;
2528 loop_info
->unknown_constant_address_altered
= 0;
2529 loop_info
->store_mems
= NULL_RTX
;
2530 loop_info
->first_loop_store_insn
= NULL_RTX
;
2531 loop_info
->mems_idx
= 0;
2532 loop_info
->num_mem_sets
= 0;
2533 /* If loop opts run twice, this was set on 1st pass for 2nd. */
2534 loop_info
->preconditioned
= NOTE_PRECONDITIONED (end
);
2536 for (insn
= start
; insn
&& GET_CODE (insn
) != CODE_LABEL
;
2537 insn
= PREV_INSN (insn
))
2539 if (GET_CODE (insn
) == CALL_INSN
)
2541 loop_info
->pre_header_has_call
= 1;
2546 for (insn
= NEXT_INSN (start
); insn
!= NEXT_INSN (end
);
2547 insn
= NEXT_INSN (insn
))
2549 switch (GET_CODE (insn
))
2552 if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_BEG
)
2555 /* Count number of loops contained in this one. */
2558 else if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_END
)
2563 if (! CONST_OR_PURE_CALL_P (insn
))
2565 loop_info
->unknown_address_altered
= 1;
2566 loop_info
->has_nonconst_call
= 1;
2568 else if (pure_call_p (insn
))
2569 loop_info
->has_nonconst_call
= 1;
2570 loop_info
->has_call
= 1;
2571 if (can_throw_internal (insn
))
2572 loop_info
->has_multiple_exit_targets
= 1;
2576 if (! loop_info
->has_multiple_exit_targets
)
2578 rtx set
= pc_set (insn
);
2582 rtx src
= SET_SRC (set
);
2585 if (GET_CODE (src
) == IF_THEN_ELSE
)
2587 label1
= XEXP (src
, 1);
2588 label2
= XEXP (src
, 2);
2598 if (label1
&& label1
!= pc_rtx
)
2600 if (GET_CODE (label1
) != LABEL_REF
)
2602 /* Something tricky. */
2603 loop_info
->has_multiple_exit_targets
= 1;
2606 else if (XEXP (label1
, 0) != exit_target
2607 && LABEL_OUTSIDE_LOOP_P (label1
))
2609 /* A jump outside the current loop. */
2610 loop_info
->has_multiple_exit_targets
= 1;
2622 /* A return, or something tricky. */
2623 loop_info
->has_multiple_exit_targets
= 1;
2629 if (volatile_refs_p (PATTERN (insn
)))
2630 loop_info
->has_volatile
= 1;
2632 if (GET_CODE (insn
) == JUMP_INSN
2633 && (GET_CODE (PATTERN (insn
)) == ADDR_DIFF_VEC
2634 || GET_CODE (PATTERN (insn
)) == ADDR_VEC
))
2635 loop_info
->has_tablejump
= 1;
2637 note_stores (PATTERN (insn
), note_addr_stored
, loop_info
);
2638 if (! loop_info
->first_loop_store_insn
&& loop_info
->store_mems
)
2639 loop_info
->first_loop_store_insn
= insn
;
2641 if (flag_non_call_exceptions
&& can_throw_internal (insn
))
2642 loop_info
->has_multiple_exit_targets
= 1;
2650 /* Now, rescan the loop, setting up the LOOP_MEMS array. */
2651 if (/* An exception thrown by a called function might land us
2653 ! loop_info
->has_nonconst_call
2654 /* We don't want loads for MEMs moved to a location before the
2655 one at which their stack memory becomes allocated. (Note
2656 that this is not a problem for malloc, etc., since those
2657 require actual function calls. */
2658 && ! current_function_calls_alloca
2659 /* There are ways to leave the loop other than falling off the
2661 && ! loop_info
->has_multiple_exit_targets
)
2662 for (insn
= NEXT_INSN (start
); insn
!= NEXT_INSN (end
);
2663 insn
= NEXT_INSN (insn
))
2664 for_each_rtx (&insn
, insert_loop_mem
, loop_info
);
2666 /* BLKmode MEMs are added to LOOP_STORE_MEM as necessary so
2667 that loop_invariant_p and load_mems can use true_dependence
2668 to determine what is really clobbered. */
2669 if (loop_info
->unknown_address_altered
)
2671 rtx mem
= gen_rtx_MEM (BLKmode
, const0_rtx
);
2673 loop_info
->store_mems
2674 = gen_rtx_EXPR_LIST (VOIDmode
, mem
, loop_info
->store_mems
);
2676 if (loop_info
->unknown_constant_address_altered
)
2678 rtx mem
= gen_rtx_MEM (BLKmode
, const0_rtx
);
2680 RTX_UNCHANGING_P (mem
) = 1;
2681 loop_info
->store_mems
2682 = gen_rtx_EXPR_LIST (VOIDmode
, mem
, loop_info
->store_mems
);
2686 /* Invalidate all loops containing LABEL. */
2689 invalidate_loops_containing_label (label
)
2693 for (loop
= uid_loop
[INSN_UID (label
)]; loop
; loop
= loop
->outer
)
2697 /* Scan the function looking for loops. Record the start and end of each loop.
2698 Also mark as invalid loops any loops that contain a setjmp or are branched
2699 to from outside the loop. */
2702 find_and_verify_loops (f
, loops
)
2704 struct loops
*loops
;
2709 struct loop
*current_loop
;
2710 struct loop
*next_loop
;
2713 num_loops
= loops
->num
;
2715 compute_luids (f
, NULL_RTX
, 0);
2717 /* If there are jumps to undefined labels,
2718 treat them as jumps out of any/all loops.
2719 This also avoids writing past end of tables when there are no loops. */
2722 /* Find boundaries of loops, mark which loops are contained within
2723 loops, and invalidate loops that have setjmp. */
2726 current_loop
= NULL
;
2727 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
2729 if (GET_CODE (insn
) == NOTE
)
2730 switch (NOTE_LINE_NUMBER (insn
))
2732 case NOTE_INSN_LOOP_BEG
:
2733 next_loop
= loops
->array
+ num_loops
;
2734 next_loop
->num
= num_loops
;
2736 next_loop
->start
= insn
;
2737 next_loop
->outer
= current_loop
;
2738 current_loop
= next_loop
;
2741 case NOTE_INSN_LOOP_CONT
:
2742 current_loop
->cont
= insn
;
2745 case NOTE_INSN_LOOP_VTOP
:
2746 current_loop
->vtop
= insn
;
2749 case NOTE_INSN_LOOP_END
:
2753 current_loop
->end
= insn
;
2754 current_loop
= current_loop
->outer
;
2761 if (GET_CODE (insn
) == CALL_INSN
2762 && find_reg_note (insn
, REG_SETJMP
, NULL
))
2764 /* In this case, we must invalidate our current loop and any
2766 for (loop
= current_loop
; loop
; loop
= loop
->outer
)
2769 if (loop_dump_stream
)
2770 fprintf (loop_dump_stream
,
2771 "\nLoop at %d ignored due to setjmp.\n",
2772 INSN_UID (loop
->start
));
2776 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
2777 enclosing loop, but this doesn't matter. */
2778 uid_loop
[INSN_UID (insn
)] = current_loop
;
2781 /* Any loop containing a label used in an initializer must be invalidated,
2782 because it can be jumped into from anywhere. */
2783 for (label
= forced_labels
; label
; label
= XEXP (label
, 1))
2784 invalidate_loops_containing_label (XEXP (label
, 0));
2786 /* Any loop containing a label used for an exception handler must be
2787 invalidated, because it can be jumped into from anywhere. */
2788 for_each_eh_label (invalidate_loops_containing_label
);
2790 /* Now scan all insn's in the function. If any JUMP_INSN branches into a
2791 loop that it is not contained within, that loop is marked invalid.
2792 If any INSN or CALL_INSN uses a label's address, then the loop containing
2793 that label is marked invalid, because it could be jumped into from
2796 Also look for blocks of code ending in an unconditional branch that
2797 exits the loop. If such a block is surrounded by a conditional
2798 branch around the block, move the block elsewhere (see below) and
2799 invert the jump to point to the code block. This may eliminate a
2800 label in our loop and will simplify processing by both us and a
2801 possible second cse pass. */
2803 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
2806 struct loop
*this_loop
= uid_loop
[INSN_UID (insn
)];
2808 if (GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
)
2810 rtx note
= find_reg_note (insn
, REG_LABEL
, NULL_RTX
);
2812 invalidate_loops_containing_label (XEXP (note
, 0));
2815 if (GET_CODE (insn
) != JUMP_INSN
)
2818 mark_loop_jump (PATTERN (insn
), this_loop
);
2820 /* See if this is an unconditional branch outside the loop. */
2822 && (GET_CODE (PATTERN (insn
)) == RETURN
2823 || (any_uncondjump_p (insn
)
2824 && onlyjump_p (insn
)
2825 && (uid_loop
[INSN_UID (JUMP_LABEL (insn
))]
2827 && get_max_uid () < max_uid_for_loop
)
2830 rtx our_next
= next_real_insn (insn
);
2831 rtx last_insn_to_move
= NEXT_INSN (insn
);
2832 struct loop
*dest_loop
;
2833 struct loop
*outer_loop
= NULL
;
2835 /* Go backwards until we reach the start of the loop, a label,
2837 for (p
= PREV_INSN (insn
);
2838 GET_CODE (p
) != CODE_LABEL
2839 && ! (GET_CODE (p
) == NOTE
2840 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
2841 && GET_CODE (p
) != JUMP_INSN
;
2845 /* Check for the case where we have a jump to an inner nested
2846 loop, and do not perform the optimization in that case. */
2848 if (JUMP_LABEL (insn
))
2850 dest_loop
= uid_loop
[INSN_UID (JUMP_LABEL (insn
))];
2853 for (outer_loop
= dest_loop
; outer_loop
;
2854 outer_loop
= outer_loop
->outer
)
2855 if (outer_loop
== this_loop
)
2860 /* Make sure that the target of P is within the current loop. */
2862 if (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
)
2863 && uid_loop
[INSN_UID (JUMP_LABEL (p
))] != this_loop
)
2864 outer_loop
= this_loop
;
2866 /* If we stopped on a JUMP_INSN to the next insn after INSN,
2867 we have a block of code to try to move.
2869 We look backward and then forward from the target of INSN
2870 to find a BARRIER at the same loop depth as the target.
2871 If we find such a BARRIER, we make a new label for the start
2872 of the block, invert the jump in P and point it to that label,
2873 and move the block of code to the spot we found. */
2876 && GET_CODE (p
) == JUMP_INSN
2877 && JUMP_LABEL (p
) != 0
2878 /* Just ignore jumps to labels that were never emitted.
2879 These always indicate compilation errors. */
2880 && INSN_UID (JUMP_LABEL (p
)) != 0
2881 && any_condjump_p (p
) && onlyjump_p (p
)
2882 && next_real_insn (JUMP_LABEL (p
)) == our_next
2883 /* If it's not safe to move the sequence, then we
2885 && insns_safe_to_move_p (p
, NEXT_INSN (insn
),
2886 &last_insn_to_move
))
2889 = JUMP_LABEL (insn
) ? JUMP_LABEL (insn
) : get_last_insn ();
2890 struct loop
*target_loop
= uid_loop
[INSN_UID (target
)];
2894 /* Search for possible garbage past the conditional jumps
2895 and look for the last barrier. */
2896 for (tmp
= last_insn_to_move
;
2897 tmp
&& GET_CODE (tmp
) != CODE_LABEL
; tmp
= NEXT_INSN (tmp
))
2898 if (GET_CODE (tmp
) == BARRIER
)
2899 last_insn_to_move
= tmp
;
2901 for (loc
= target
; loc
; loc
= PREV_INSN (loc
))
2902 if (GET_CODE (loc
) == BARRIER
2903 /* Don't move things inside a tablejump. */
2904 && ((loc2
= next_nonnote_insn (loc
)) == 0
2905 || GET_CODE (loc2
) != CODE_LABEL
2906 || (loc2
= next_nonnote_insn (loc2
)) == 0
2907 || GET_CODE (loc2
) != JUMP_INSN
2908 || (GET_CODE (PATTERN (loc2
)) != ADDR_VEC
2909 && GET_CODE (PATTERN (loc2
)) != ADDR_DIFF_VEC
))
2910 && uid_loop
[INSN_UID (loc
)] == target_loop
)
2914 for (loc
= target
; loc
; loc
= NEXT_INSN (loc
))
2915 if (GET_CODE (loc
) == BARRIER
2916 /* Don't move things inside a tablejump. */
2917 && ((loc2
= next_nonnote_insn (loc
)) == 0
2918 || GET_CODE (loc2
) != CODE_LABEL
2919 || (loc2
= next_nonnote_insn (loc2
)) == 0
2920 || GET_CODE (loc2
) != JUMP_INSN
2921 || (GET_CODE (PATTERN (loc2
)) != ADDR_VEC
2922 && GET_CODE (PATTERN (loc2
)) != ADDR_DIFF_VEC
))
2923 && uid_loop
[INSN_UID (loc
)] == target_loop
)
2928 rtx cond_label
= JUMP_LABEL (p
);
2929 rtx new_label
= get_label_after (p
);
2931 /* Ensure our label doesn't go away. */
2932 LABEL_NUSES (cond_label
)++;
2934 /* Verify that uid_loop is large enough and that
2936 if (invert_jump (p
, new_label
, 1))
2940 /* If no suitable BARRIER was found, create a suitable
2941 one before TARGET. Since TARGET is a fall through
2942 path, we'll need to insert a jump around our block
2943 and add a BARRIER before TARGET.
2945 This creates an extra unconditional jump outside
2946 the loop. However, the benefits of removing rarely
2947 executed instructions from inside the loop usually
2948 outweighs the cost of the extra unconditional jump
2949 outside the loop. */
2954 temp
= gen_jump (JUMP_LABEL (insn
));
2955 temp
= emit_jump_insn_before (temp
, target
);
2956 JUMP_LABEL (temp
) = JUMP_LABEL (insn
);
2957 LABEL_NUSES (JUMP_LABEL (insn
))++;
2958 loc
= emit_barrier_before (target
);
2961 /* Include the BARRIER after INSN and copy the
2963 if (squeeze_notes (&new_label
, &last_insn_to_move
))
2965 reorder_insns (new_label
, last_insn_to_move
, loc
);
2967 /* All those insns are now in TARGET_LOOP. */
2969 q
!= NEXT_INSN (last_insn_to_move
);
2971 uid_loop
[INSN_UID (q
)] = target_loop
;
2973 /* The label jumped to by INSN is no longer a loop
2974 exit. Unless INSN does not have a label (e.g.,
2975 it is a RETURN insn), search loop->exit_labels
2976 to find its label_ref, and remove it. Also turn
2977 off LABEL_OUTSIDE_LOOP_P bit. */
2978 if (JUMP_LABEL (insn
))
2980 for (q
= 0, r
= this_loop
->exit_labels
;
2982 q
= r
, r
= LABEL_NEXTREF (r
))
2983 if (XEXP (r
, 0) == JUMP_LABEL (insn
))
2985 LABEL_OUTSIDE_LOOP_P (r
) = 0;
2987 LABEL_NEXTREF (q
) = LABEL_NEXTREF (r
);
2989 this_loop
->exit_labels
= LABEL_NEXTREF (r
);
2993 for (loop
= this_loop
; loop
&& loop
!= target_loop
;
2997 /* If we didn't find it, then something is
3003 /* P is now a jump outside the loop, so it must be put
3004 in loop->exit_labels, and marked as such.
3005 The easiest way to do this is to just call
3006 mark_loop_jump again for P. */
3007 mark_loop_jump (PATTERN (p
), this_loop
);
3009 /* If INSN now jumps to the insn after it,
3011 if (JUMP_LABEL (insn
) != 0
3012 && (next_real_insn (JUMP_LABEL (insn
))
3013 == next_real_insn (insn
)))
3014 delete_related_insns (insn
);
3017 /* Continue the loop after where the conditional
3018 branch used to jump, since the only branch insn
3019 in the block (if it still remains) is an inter-loop
3020 branch and hence needs no processing. */
3021 insn
= NEXT_INSN (cond_label
);
3023 if (--LABEL_NUSES (cond_label
) == 0)
3024 delete_related_insns (cond_label
);
3026 /* This loop will be continued with NEXT_INSN (insn). */
3027 insn
= PREV_INSN (insn
);
3034 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
3035 loops it is contained in, mark the target loop invalid.
3037 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
3040 mark_loop_jump (x
, loop
)
3044 struct loop
*dest_loop
;
3045 struct loop
*outer_loop
;
3048 switch (GET_CODE (x
))
3061 /* There could be a label reference in here. */
3062 mark_loop_jump (XEXP (x
, 0), loop
);
3068 mark_loop_jump (XEXP (x
, 0), loop
);
3069 mark_loop_jump (XEXP (x
, 1), loop
);
3073 /* This may refer to a LABEL_REF or SYMBOL_REF. */
3074 mark_loop_jump (XEXP (x
, 1), loop
);
3079 mark_loop_jump (XEXP (x
, 0), loop
);
3083 dest_loop
= uid_loop
[INSN_UID (XEXP (x
, 0))];
3085 /* Link together all labels that branch outside the loop. This
3086 is used by final_[bg]iv_value and the loop unrolling code. Also
3087 mark this LABEL_REF so we know that this branch should predict
3090 /* A check to make sure the label is not in an inner nested loop,
3091 since this does not count as a loop exit. */
3094 for (outer_loop
= dest_loop
; outer_loop
;
3095 outer_loop
= outer_loop
->outer
)
3096 if (outer_loop
== loop
)
3102 if (loop
&& ! outer_loop
)
3104 LABEL_OUTSIDE_LOOP_P (x
) = 1;
3105 LABEL_NEXTREF (x
) = loop
->exit_labels
;
3106 loop
->exit_labels
= x
;
3108 for (outer_loop
= loop
;
3109 outer_loop
&& outer_loop
!= dest_loop
;
3110 outer_loop
= outer_loop
->outer
)
3111 outer_loop
->exit_count
++;
3114 /* If this is inside a loop, but not in the current loop or one enclosed
3115 by it, it invalidates at least one loop. */
3120 /* We must invalidate every nested loop containing the target of this
3121 label, except those that also contain the jump insn. */
3123 for (; dest_loop
; dest_loop
= dest_loop
->outer
)
3125 /* Stop when we reach a loop that also contains the jump insn. */
3126 for (outer_loop
= loop
; outer_loop
; outer_loop
= outer_loop
->outer
)
3127 if (dest_loop
== outer_loop
)
3130 /* If we get here, we know we need to invalidate a loop. */
3131 if (loop_dump_stream
&& ! dest_loop
->invalid
)
3132 fprintf (loop_dump_stream
,
3133 "\nLoop at %d ignored due to multiple entry points.\n",
3134 INSN_UID (dest_loop
->start
));
3136 dest_loop
->invalid
= 1;
3141 /* If this is not setting pc, ignore. */
3142 if (SET_DEST (x
) == pc_rtx
)
3143 mark_loop_jump (SET_SRC (x
), loop
);
3147 mark_loop_jump (XEXP (x
, 1), loop
);
3148 mark_loop_jump (XEXP (x
, 2), loop
);
3153 for (i
= 0; i
< XVECLEN (x
, 0); i
++)
3154 mark_loop_jump (XVECEXP (x
, 0, i
), loop
);
3158 for (i
= 0; i
< XVECLEN (x
, 1); i
++)
3159 mark_loop_jump (XVECEXP (x
, 1, i
), loop
);
3163 /* Strictly speaking this is not a jump into the loop, only a possible
3164 jump out of the loop. However, we have no way to link the destination
3165 of this jump onto the list of exit labels. To be safe we mark this
3166 loop and any containing loops as invalid. */
3169 for (outer_loop
= loop
; outer_loop
; outer_loop
= outer_loop
->outer
)
3171 if (loop_dump_stream
&& ! outer_loop
->invalid
)
3172 fprintf (loop_dump_stream
,
3173 "\nLoop at %d ignored due to unknown exit jump.\n",
3174 INSN_UID (outer_loop
->start
));
3175 outer_loop
->invalid
= 1;
3182 /* Return nonzero if there is a label in the range from
3183 insn INSN to and including the insn whose luid is END
3184 INSN must have an assigned luid (i.e., it must not have
3185 been previously created by loop.c). */
3188 labels_in_range_p (insn
, end
)
3192 while (insn
&& INSN_LUID (insn
) <= end
)
3194 if (GET_CODE (insn
) == CODE_LABEL
)
3196 insn
= NEXT_INSN (insn
);
3202 /* Record that a memory reference X is being set. */
3205 note_addr_stored (x
, y
, data
)
3207 rtx y ATTRIBUTE_UNUSED
;
3208 void *data ATTRIBUTE_UNUSED
;
3210 struct loop_info
*loop_info
= data
;
3212 if (x
== 0 || GET_CODE (x
) != MEM
)
3215 /* Count number of memory writes.
3216 This affects heuristics in strength_reduce. */
3217 loop_info
->num_mem_sets
++;
3219 /* BLKmode MEM means all memory is clobbered. */
3220 if (GET_MODE (x
) == BLKmode
)
3222 if (RTX_UNCHANGING_P (x
))
3223 loop_info
->unknown_constant_address_altered
= 1;
3225 loop_info
->unknown_address_altered
= 1;
3230 loop_info
->store_mems
= gen_rtx_EXPR_LIST (VOIDmode
, x
,
3231 loop_info
->store_mems
);
3234 /* X is a value modified by an INSN that references a biv inside a loop
3235 exit test (ie, X is somehow related to the value of the biv). If X
3236 is a pseudo that is used more than once, then the biv is (effectively)
3237 used more than once. DATA is a pointer to a loop_regs structure. */
3240 note_set_pseudo_multiple_uses (x
, y
, data
)
3242 rtx y ATTRIBUTE_UNUSED
;
3245 struct loop_regs
*regs
= (struct loop_regs
*) data
;
3250 while (GET_CODE (x
) == STRICT_LOW_PART
3251 || GET_CODE (x
) == SIGN_EXTRACT
3252 || GET_CODE (x
) == ZERO_EXTRACT
3253 || GET_CODE (x
) == SUBREG
)
3256 if (GET_CODE (x
) != REG
|| REGNO (x
) < FIRST_PSEUDO_REGISTER
)
3259 /* If we do not have usage information, or if we know the register
3260 is used more than once, note that fact for check_dbra_loop. */
3261 if (REGNO (x
) >= max_reg_before_loop
3262 || ! regs
->array
[REGNO (x
)].single_usage
3263 || regs
->array
[REGNO (x
)].single_usage
== const0_rtx
)
3264 regs
->multiple_uses
= 1;
3267 /* Return nonzero if the rtx X is invariant over the current loop.
3269 The value is 2 if we refer to something only conditionally invariant.
3271 A memory ref is invariant if it is not volatile and does not conflict
3272 with anything stored in `loop_info->store_mems'. */
3275 loop_invariant_p (loop
, x
)
3276 const struct loop
*loop
;
3279 struct loop_info
*loop_info
= LOOP_INFO (loop
);
3280 struct loop_regs
*regs
= LOOP_REGS (loop
);
3284 int conditional
= 0;
3289 code
= GET_CODE (x
);
3299 /* A LABEL_REF is normally invariant, however, if we are unrolling
3300 loops, and this label is inside the loop, then it isn't invariant.
3301 This is because each unrolled copy of the loop body will have
3302 a copy of this label. If this was invariant, then an insn loading
3303 the address of this label into a register might get moved outside
3304 the loop, and then each loop body would end up using the same label.
3306 We don't know the loop bounds here though, so just fail for all
3308 if (flag_old_unroll_loops
)
3315 case UNSPEC_VOLATILE
:
3319 /* We used to check RTX_UNCHANGING_P (x) here, but that is invalid
3320 since the reg might be set by initialization within the loop. */
3322 if ((x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
3323 || x
== arg_pointer_rtx
|| x
== pic_offset_table_rtx
)
3324 && ! current_function_has_nonlocal_goto
)
3327 if (LOOP_INFO (loop
)->has_call
3328 && REGNO (x
) < FIRST_PSEUDO_REGISTER
&& call_used_regs
[REGNO (x
)])
3331 /* Out-of-range regs can occur when we are called from unrolling.
3332 These have always been created by the unroller and are set in
3333 the loop, hence are never invariant. */
3335 if (REGNO (x
) >= (unsigned) regs
->num
)
3338 if (regs
->array
[REGNO (x
)].set_in_loop
< 0)
3341 return regs
->array
[REGNO (x
)].set_in_loop
== 0;
3344 /* Volatile memory references must be rejected. Do this before
3345 checking for read-only items, so that volatile read-only items
3346 will be rejected also. */
3347 if (MEM_VOLATILE_P (x
))
3350 /* See if there is any dependence between a store and this load. */
3351 mem_list_entry
= loop_info
->store_mems
;
3352 while (mem_list_entry
)
3354 if (true_dependence (XEXP (mem_list_entry
, 0), VOIDmode
,
3358 mem_list_entry
= XEXP (mem_list_entry
, 1);
3361 /* It's not invalidated by a store in memory
3362 but we must still verify the address is invariant. */
3366 /* Don't mess with insns declared volatile. */
3367 if (MEM_VOLATILE_P (x
))
3375 fmt
= GET_RTX_FORMAT (code
);
3376 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3380 int tem
= loop_invariant_p (loop
, XEXP (x
, i
));
3386 else if (fmt
[i
] == 'E')
3389 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
3391 int tem
= loop_invariant_p (loop
, XVECEXP (x
, i
, j
));
3401 return 1 + conditional
;
3404 /* Return nonzero if all the insns in the loop that set REG
3405 are INSN and the immediately following insns,
3406 and if each of those insns sets REG in an invariant way
3407 (not counting uses of REG in them).
3409 The value is 2 if some of these insns are only conditionally invariant.
3411 We assume that INSN itself is the first set of REG
3412 and that its source is invariant. */
3415 consec_sets_invariant_p (loop
, reg
, n_sets
, insn
)
3416 const struct loop
*loop
;
3420 struct loop_regs
*regs
= LOOP_REGS (loop
);
3422 unsigned int regno
= REGNO (reg
);
3424 /* Number of sets we have to insist on finding after INSN. */
3425 int count
= n_sets
- 1;
3426 int old
= regs
->array
[regno
].set_in_loop
;
3430 /* If N_SETS hit the limit, we can't rely on its value. */
3434 regs
->array
[regno
].set_in_loop
= 0;
3442 code
= GET_CODE (p
);
3444 /* If library call, skip to end of it. */
3445 if (code
== INSN
&& (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
3450 && (set
= single_set (p
))
3451 && GET_CODE (SET_DEST (set
)) == REG
3452 && REGNO (SET_DEST (set
)) == regno
)
3454 this = loop_invariant_p (loop
, SET_SRC (set
));
3457 else if ((temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
)))
3459 /* If this is a libcall, then any invariant REG_EQUAL note is OK.
3460 If this is an ordinary insn, then only CONSTANT_P REG_EQUAL
3462 this = (CONSTANT_P (XEXP (temp
, 0))
3463 || (find_reg_note (p
, REG_RETVAL
, NULL_RTX
)
3464 && loop_invariant_p (loop
, XEXP (temp
, 0))));
3471 else if (code
!= NOTE
)
3473 regs
->array
[regno
].set_in_loop
= old
;
3478 regs
->array
[regno
].set_in_loop
= old
;
3479 /* If loop_invariant_p ever returned 2, we return 2. */
3480 return 1 + (value
& 2);
3484 /* I don't think this condition is sufficient to allow INSN
3485 to be moved, so we no longer test it. */
3487 /* Return 1 if all insns in the basic block of INSN and following INSN
3488 that set REG are invariant according to TABLE. */
3491 all_sets_invariant_p (reg
, insn
, table
)
3496 int regno
= REGNO (reg
);
3502 code
= GET_CODE (p
);
3503 if (code
== CODE_LABEL
|| code
== JUMP_INSN
)
3505 if (code
== INSN
&& GET_CODE (PATTERN (p
)) == SET
3506 && GET_CODE (SET_DEST (PATTERN (p
))) == REG
3507 && REGNO (SET_DEST (PATTERN (p
))) == regno
)
3509 if (! loop_invariant_p (loop
, SET_SRC (PATTERN (p
)), table
))
3516 /* Look at all uses (not sets) of registers in X. For each, if it is
3517 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
3518 a different insn, set USAGE[REGNO] to const0_rtx. */
3521 find_single_use_in_loop (regs
, insn
, x
)
3522 struct loop_regs
*regs
;
3526 enum rtx_code code
= GET_CODE (x
);
3527 const char *fmt
= GET_RTX_FORMAT (code
);
3531 regs
->array
[REGNO (x
)].single_usage
3532 = (regs
->array
[REGNO (x
)].single_usage
!= 0
3533 && regs
->array
[REGNO (x
)].single_usage
!= insn
)
3534 ? const0_rtx
: insn
;
3536 else if (code
== SET
)
3538 /* Don't count SET_DEST if it is a REG; otherwise count things
3539 in SET_DEST because if a register is partially modified, it won't
3540 show up as a potential movable so we don't care how USAGE is set
3542 if (GET_CODE (SET_DEST (x
)) != REG
)
3543 find_single_use_in_loop (regs
, insn
, SET_DEST (x
));
3544 find_single_use_in_loop (regs
, insn
, SET_SRC (x
));
3547 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3549 if (fmt
[i
] == 'e' && XEXP (x
, i
) != 0)
3550 find_single_use_in_loop (regs
, insn
, XEXP (x
, i
));
3551 else if (fmt
[i
] == 'E')
3552 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3553 find_single_use_in_loop (regs
, insn
, XVECEXP (x
, i
, j
));
3557 /* Count and record any set in X which is contained in INSN. Update
3558 REGS->array[I].MAY_NOT_OPTIMIZE and LAST_SET for any register I set
3562 count_one_set (regs
, insn
, x
, last_set
)
3563 struct loop_regs
*regs
;
3567 if (GET_CODE (x
) == CLOBBER
&& GET_CODE (XEXP (x
, 0)) == REG
)
3568 /* Don't move a reg that has an explicit clobber.
3569 It's not worth the pain to try to do it correctly. */
3570 regs
->array
[REGNO (XEXP (x
, 0))].may_not_optimize
= 1;
3572 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
3574 rtx dest
= SET_DEST (x
);
3575 while (GET_CODE (dest
) == SUBREG
3576 || GET_CODE (dest
) == ZERO_EXTRACT
3577 || GET_CODE (dest
) == SIGN_EXTRACT
3578 || GET_CODE (dest
) == STRICT_LOW_PART
)
3579 dest
= XEXP (dest
, 0);
3580 if (GET_CODE (dest
) == REG
)
3583 int regno
= REGNO (dest
);
3584 for (i
= 0; i
< LOOP_REGNO_NREGS (regno
, dest
); i
++)
3586 /* If this is the first setting of this reg
3587 in current basic block, and it was set before,
3588 it must be set in two basic blocks, so it cannot
3589 be moved out of the loop. */
3590 if (regs
->array
[regno
].set_in_loop
> 0
3592 regs
->array
[regno
+i
].may_not_optimize
= 1;
3593 /* If this is not first setting in current basic block,
3594 see if reg was used in between previous one and this.
3595 If so, neither one can be moved. */
3596 if (last_set
[regno
] != 0
3597 && reg_used_between_p (dest
, last_set
[regno
], insn
))
3598 regs
->array
[regno
+i
].may_not_optimize
= 1;
3599 if (regs
->array
[regno
+i
].set_in_loop
< 127)
3600 ++regs
->array
[regno
+i
].set_in_loop
;
3601 last_set
[regno
+i
] = insn
;
3607 /* Given a loop that is bounded by LOOP->START and LOOP->END and that
3608 is entered at LOOP->SCAN_START, return 1 if the register set in SET
3609 contained in insn INSN is used by any insn that precedes INSN in
3610 cyclic order starting from the loop entry point.
3612 We don't want to use INSN_LUID here because if we restrict INSN to those
3613 that have a valid INSN_LUID, it means we cannot move an invariant out
3614 from an inner loop past two loops. */
3617 loop_reg_used_before_p (loop
, set
, insn
)
3618 const struct loop
*loop
;
3621 rtx reg
= SET_DEST (set
);
3624 /* Scan forward checking for register usage. If we hit INSN, we
3625 are done. Otherwise, if we hit LOOP->END, wrap around to LOOP->START. */
3626 for (p
= loop
->scan_start
; p
!= insn
; p
= NEXT_INSN (p
))
3628 if (INSN_P (p
) && reg_overlap_mentioned_p (reg
, PATTERN (p
)))
3639 /* Information we collect about arrays that we might want to prefetch. */
3640 struct prefetch_info
3642 struct iv_class
*class; /* Class this prefetch is based on. */
3643 struct induction
*giv
; /* GIV this prefetch is based on. */
3644 rtx base_address
; /* Start prefetching from this address plus
3646 HOST_WIDE_INT index
;
3647 HOST_WIDE_INT stride
; /* Prefetch stride in bytes in each
3649 unsigned int bytes_accessed
; /* Sum of sizes of all accesses to this
3650 prefetch area in one iteration. */
3651 unsigned int total_bytes
; /* Total bytes loop will access in this block.
3652 This is set only for loops with known
3653 iteration counts and is 0xffffffff
3655 int prefetch_in_loop
; /* Number of prefetch insns in loop. */
3656 int prefetch_before_loop
; /* Number of prefetch insns before loop. */
3657 unsigned int write
: 1; /* 1 for read/write prefetches. */
3660 /* Data used by check_store function. */
3661 struct check_store_data
3667 static void check_store
PARAMS ((rtx
, rtx
, void *));
3668 static void emit_prefetch_instructions
PARAMS ((struct loop
*));
3669 static int rtx_equal_for_prefetch_p
PARAMS ((rtx
, rtx
));
3671 /* Set mem_write when mem_address is found. Used as callback to
3674 check_store (x
, pat
, data
)
3675 rtx x
, pat ATTRIBUTE_UNUSED
;
3678 struct check_store_data
*d
= (struct check_store_data
*) data
;
3680 if ((GET_CODE (x
) == MEM
) && rtx_equal_p (d
->mem_address
, XEXP (x
, 0)))
3684 /* Like rtx_equal_p, but attempts to swap commutative operands. This is
3685 important to get some addresses combined. Later more sophisticated
3686 transformations can be added when necessary.
3688 ??? Same trick with swapping operand is done at several other places.
3689 It can be nice to develop some common way to handle this. */
3692 rtx_equal_for_prefetch_p (x
, y
)
3697 enum rtx_code code
= GET_CODE (x
);
3702 if (code
!= GET_CODE (y
))
3705 code
= GET_CODE (x
);
3707 if (GET_RTX_CLASS (code
) == 'c')
3709 return ((rtx_equal_for_prefetch_p (XEXP (x
, 0), XEXP (y
, 0))
3710 && rtx_equal_for_prefetch_p (XEXP (x
, 1), XEXP (y
, 1)))
3711 || (rtx_equal_for_prefetch_p (XEXP (x
, 0), XEXP (y
, 1))
3712 && rtx_equal_for_prefetch_p (XEXP (x
, 1), XEXP (y
, 0))));
3714 /* Compare the elements. If any pair of corresponding elements fails to
3715 match, return 0 for the whole thing. */
3717 fmt
= GET_RTX_FORMAT (code
);
3718 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3723 if (XWINT (x
, i
) != XWINT (y
, i
))
3728 if (XINT (x
, i
) != XINT (y
, i
))
3733 /* Two vectors must have the same length. */
3734 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
3737 /* And the corresponding elements must match. */
3738 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
3739 if (rtx_equal_for_prefetch_p (XVECEXP (x
, i
, j
),
3740 XVECEXP (y
, i
, j
)) == 0)
3745 if (rtx_equal_for_prefetch_p (XEXP (x
, i
), XEXP (y
, i
)) == 0)
3750 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
3755 /* These are just backpointers, so they don't matter. */
3761 /* It is believed that rtx's at this level will never
3762 contain anything but integers and other rtx's,
3763 except for within LABEL_REFs and SYMBOL_REFs. */
3771 /* Remove constant addition value from the expression X (when present)
3774 static HOST_WIDE_INT
3775 remove_constant_addition (x
)
3778 HOST_WIDE_INT addval
= 0;
3781 /* Avoid clobbering a shared CONST expression. */
3782 if (GET_CODE (exp
) == CONST
)
3784 if (GET_CODE (XEXP (exp
, 0)) == PLUS
3785 && GET_CODE (XEXP (XEXP (exp
, 0), 0)) == SYMBOL_REF
3786 && GET_CODE (XEXP (XEXP (exp
, 0), 1)) == CONST_INT
)
3788 *x
= XEXP (XEXP (exp
, 0), 0);
3789 return INTVAL (XEXP (XEXP (exp
, 0), 1));
3794 if (GET_CODE (exp
) == CONST_INT
)
3796 addval
= INTVAL (exp
);
3800 /* For plus expression recurse on ourself. */
3801 else if (GET_CODE (exp
) == PLUS
)
3803 addval
+= remove_constant_addition (&XEXP (exp
, 0));
3804 addval
+= remove_constant_addition (&XEXP (exp
, 1));
3806 /* In case our parameter was constant, remove extra zero from the
3808 if (XEXP (exp
, 0) == const0_rtx
)
3810 else if (XEXP (exp
, 1) == const0_rtx
)
3817 /* Attempt to identify accesses to arrays that are most likely to cause cache
3818 misses, and emit prefetch instructions a few prefetch blocks forward.
3820 To detect the arrays we use the GIV information that was collected by the
3821 strength reduction pass.
3823 The prefetch instructions are generated after the GIV information is done
3824 and before the strength reduction process. The new GIVs are injected into
3825 the strength reduction tables, so the prefetch addresses are optimized as
3828 GIVs are split into base address, stride, and constant addition values.
3829 GIVs with the same address, stride and close addition values are combined
3830 into a single prefetch. Also writes to GIVs are detected, so that prefetch
3831 for write instructions can be used for the block we write to, on machines
3832 that support write prefetches.
3834 Several heuristics are used to determine when to prefetch. They are
3835 controlled by defined symbols that can be overridden for each target. */
3838 emit_prefetch_instructions (loop
)
3841 int num_prefetches
= 0;
3842 int num_real_prefetches
= 0;
3843 int num_real_write_prefetches
= 0;
3844 int num_prefetches_before
= 0;
3845 int num_write_prefetches_before
= 0;
3848 struct iv_class
*bl
;
3849 struct induction
*iv
;
3850 struct prefetch_info info
[MAX_PREFETCHES
];
3851 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
3856 /* Consider only loops w/o calls. When a call is done, the loop is probably
3857 slow enough to read the memory. */
3858 if (PREFETCH_NO_CALL
&& LOOP_INFO (loop
)->has_call
)
3860 if (loop_dump_stream
)
3861 fprintf (loop_dump_stream
, "Prefetch: ignoring loop: has call.\n");
3866 /* Don't prefetch in loops known to have few iterations. */
3867 if (PREFETCH_NO_LOW_LOOPCNT
3868 && LOOP_INFO (loop
)->n_iterations
3869 && LOOP_INFO (loop
)->n_iterations
<= PREFETCH_LOW_LOOPCNT
)
3871 if (loop_dump_stream
)
3872 fprintf (loop_dump_stream
,
3873 "Prefetch: ignoring loop: not enough iterations.\n");
3877 /* Search all induction variables and pick those interesting for the prefetch
3879 for (bl
= ivs
->list
; bl
; bl
= bl
->next
)
3881 struct induction
*biv
= bl
->biv
, *biv1
;
3886 /* Expect all BIVs to be executed in each iteration. This makes our
3887 analysis more conservative. */
3890 /* Discard non-constant additions that we can't handle well yet, and
3891 BIVs that are executed multiple times; such BIVs ought to be
3892 handled in the nested loop. We accept not_every_iteration BIVs,
3893 since these only result in larger strides and make our
3894 heuristics more conservative. */
3895 if (GET_CODE (biv
->add_val
) != CONST_INT
)
3897 if (loop_dump_stream
)
3899 fprintf (loop_dump_stream
,
3900 "Prefetch: ignoring biv %d: non-constant addition at insn %d:",
3901 REGNO (biv
->src_reg
), INSN_UID (biv
->insn
));
3902 print_rtl (loop_dump_stream
, biv
->add_val
);
3903 fprintf (loop_dump_stream
, "\n");
3908 if (biv
->maybe_multiple
)
3910 if (loop_dump_stream
)
3912 fprintf (loop_dump_stream
,
3913 "Prefetch: ignoring biv %d: maybe_multiple at insn %i:",
3914 REGNO (biv
->src_reg
), INSN_UID (biv
->insn
));
3915 print_rtl (loop_dump_stream
, biv
->add_val
);
3916 fprintf (loop_dump_stream
, "\n");
3921 basestride
+= INTVAL (biv1
->add_val
);
3922 biv1
= biv1
->next_iv
;
3925 if (biv1
|| !basestride
)
3928 for (iv
= bl
->giv
; iv
; iv
= iv
->next_iv
)
3932 HOST_WIDE_INT index
= 0;
3934 HOST_WIDE_INT stride
= 0;
3935 int stride_sign
= 1;
3936 struct check_store_data d
;
3937 const char *ignore_reason
= NULL
;
3938 int size
= GET_MODE_SIZE (GET_MODE (iv
));
3940 /* See whether an induction variable is interesting to us and if
3941 not, report the reason. */
3942 if (iv
->giv_type
!= DEST_ADDR
)
3943 ignore_reason
= "giv is not a destination address";
3945 /* We are interested only in constant stride memory references
3946 in order to be able to compute density easily. */
3947 else if (GET_CODE (iv
->mult_val
) != CONST_INT
)
3948 ignore_reason
= "stride is not constant";
3952 stride
= INTVAL (iv
->mult_val
) * basestride
;
3959 /* On some targets, reversed order prefetches are not
3961 if (PREFETCH_NO_REVERSE_ORDER
&& stride_sign
< 0)
3962 ignore_reason
= "reversed order stride";
3964 /* Prefetch of accesses with an extreme stride might not be
3965 worthwhile, either. */
3966 else if (PREFETCH_NO_EXTREME_STRIDE
3967 && stride
> PREFETCH_EXTREME_STRIDE
)
3968 ignore_reason
= "extreme stride";
3970 /* Ignore GIVs with varying add values; we can't predict the
3971 value for the next iteration. */
3972 else if (!loop_invariant_p (loop
, iv
->add_val
))
3973 ignore_reason
= "giv has varying add value";
3975 /* Ignore GIVs in the nested loops; they ought to have been
3977 else if (iv
->maybe_multiple
)
3978 ignore_reason
= "giv is in nested loop";
3981 if (ignore_reason
!= NULL
)
3983 if (loop_dump_stream
)
3984 fprintf (loop_dump_stream
,
3985 "Prefetch: ignoring giv at %d: %s.\n",
3986 INSN_UID (iv
->insn
), ignore_reason
);
3990 /* Determine the pointer to the basic array we are examining. It is
3991 the sum of the BIV's initial value and the GIV's add_val. */
3992 address
= copy_rtx (iv
->add_val
);
3993 temp
= copy_rtx (bl
->initial_value
);
3995 address
= simplify_gen_binary (PLUS
, Pmode
, temp
, address
);
3996 index
= remove_constant_addition (&address
);
3999 d
.mem_address
= *iv
->location
;
4001 /* When the GIV is not always executed, we might be better off by
4002 not dirtying the cache pages. */
4003 if (PREFETCH_CONDITIONAL
|| iv
->always_executed
)
4004 note_stores (PATTERN (iv
->insn
), check_store
, &d
);
4007 if (loop_dump_stream
)
4008 fprintf (loop_dump_stream
, "Prefetch: Ignoring giv at %d: %s\n",
4009 INSN_UID (iv
->insn
), "in conditional code.");
4013 /* Attempt to find another prefetch to the same array and see if we
4014 can merge this one. */
4015 for (i
= 0; i
< num_prefetches
; i
++)
4016 if (rtx_equal_for_prefetch_p (address
, info
[i
].base_address
)
4017 && stride
== info
[i
].stride
)
4019 /* In case both access same array (same location
4020 just with small difference in constant indexes), merge
4021 the prefetches. Just do the later and the earlier will
4022 get prefetched from previous iteration.
4023 The artificial threshold should not be too small,
4024 but also not bigger than small portion of memory usually
4025 traversed by single loop. */
4026 if (index
>= info
[i
].index
4027 && index
- info
[i
].index
< PREFETCH_EXTREME_DIFFERENCE
)
4029 info
[i
].write
|= d
.mem_write
;
4030 info
[i
].bytes_accessed
+= size
;
4031 info
[i
].index
= index
;
4034 info
[num_prefetches
].base_address
= address
;
4039 if (index
< info
[i
].index
4040 && info
[i
].index
- index
< PREFETCH_EXTREME_DIFFERENCE
)
4042 info
[i
].write
|= d
.mem_write
;
4043 info
[i
].bytes_accessed
+= size
;
4049 /* Merging failed. */
4052 info
[num_prefetches
].giv
= iv
;
4053 info
[num_prefetches
].class = bl
;
4054 info
[num_prefetches
].index
= index
;
4055 info
[num_prefetches
].stride
= stride
;
4056 info
[num_prefetches
].base_address
= address
;
4057 info
[num_prefetches
].write
= d
.mem_write
;
4058 info
[num_prefetches
].bytes_accessed
= size
;
4060 if (num_prefetches
>= MAX_PREFETCHES
)
4062 if (loop_dump_stream
)
4063 fprintf (loop_dump_stream
,
4064 "Maximal number of prefetches exceeded.\n");
4071 for (i
= 0; i
< num_prefetches
; i
++)
4075 /* Attempt to calculate the total number of bytes fetched by all
4076 iterations of the loop. Avoid overflow. */
4077 if (LOOP_INFO (loop
)->n_iterations
4078 && ((unsigned HOST_WIDE_INT
) (0xffffffff / info
[i
].stride
)
4079 >= LOOP_INFO (loop
)->n_iterations
))
4080 info
[i
].total_bytes
= info
[i
].stride
* LOOP_INFO (loop
)->n_iterations
;
4082 info
[i
].total_bytes
= 0xffffffff;
4084 density
= info
[i
].bytes_accessed
* 100 / info
[i
].stride
;
4086 /* Prefetch might be worthwhile only when the loads/stores are dense. */
4087 if (PREFETCH_ONLY_DENSE_MEM
)
4088 if (density
* 256 > PREFETCH_DENSE_MEM
* 100
4089 && (info
[i
].total_bytes
/ PREFETCH_BLOCK
4090 >= PREFETCH_BLOCKS_BEFORE_LOOP_MIN
))
4092 info
[i
].prefetch_before_loop
= 1;
4093 info
[i
].prefetch_in_loop
4094 = (info
[i
].total_bytes
/ PREFETCH_BLOCK
4095 > PREFETCH_BLOCKS_BEFORE_LOOP_MAX
);
4099 info
[i
].prefetch_in_loop
= 0, info
[i
].prefetch_before_loop
= 0;
4100 if (loop_dump_stream
)
4101 fprintf (loop_dump_stream
,
4102 "Prefetch: ignoring giv at %d: %d%% density is too low.\n",
4103 INSN_UID (info
[i
].giv
->insn
), density
);
4106 info
[i
].prefetch_in_loop
= 1, info
[i
].prefetch_before_loop
= 1;
4108 /* Find how many prefetch instructions we'll use within the loop. */
4109 if (info
[i
].prefetch_in_loop
!= 0)
4111 info
[i
].prefetch_in_loop
= ((info
[i
].stride
+ PREFETCH_BLOCK
- 1)
4113 num_real_prefetches
+= info
[i
].prefetch_in_loop
;
4115 num_real_write_prefetches
+= info
[i
].prefetch_in_loop
;
4119 /* Determine how many iterations ahead to prefetch within the loop, based
4120 on how many prefetches we currently expect to do within the loop. */
4121 if (num_real_prefetches
!= 0)
4123 if ((ahead
= SIMULTANEOUS_PREFETCHES
/ num_real_prefetches
) == 0)
4125 if (loop_dump_stream
)
4126 fprintf (loop_dump_stream
,
4127 "Prefetch: ignoring prefetches within loop: ahead is zero; %d < %d\n",
4128 SIMULTANEOUS_PREFETCHES
, num_real_prefetches
);
4129 num_real_prefetches
= 0, num_real_write_prefetches
= 0;
4132 /* We'll also use AHEAD to determine how many prefetch instructions to
4133 emit before a loop, so don't leave it zero. */
4135 ahead
= PREFETCH_BLOCKS_BEFORE_LOOP_MAX
;
4137 for (i
= 0; i
< num_prefetches
; i
++)
4139 /* Update if we've decided not to prefetch anything within the loop. */
4140 if (num_real_prefetches
== 0)
4141 info
[i
].prefetch_in_loop
= 0;
4143 /* Find how many prefetch instructions we'll use before the loop. */
4144 if (info
[i
].prefetch_before_loop
!= 0)
4146 int n
= info
[i
].total_bytes
/ PREFETCH_BLOCK
;
4149 info
[i
].prefetch_before_loop
= n
;
4150 num_prefetches_before
+= n
;
4152 num_write_prefetches_before
+= n
;
4155 if (loop_dump_stream
)
4157 if (info
[i
].prefetch_in_loop
== 0
4158 && info
[i
].prefetch_before_loop
== 0)
4160 fprintf (loop_dump_stream
, "Prefetch insn: %d",
4161 INSN_UID (info
[i
].giv
->insn
));
4162 fprintf (loop_dump_stream
,
4163 "; in loop: %d; before: %d; %s\n",
4164 info
[i
].prefetch_in_loop
,
4165 info
[i
].prefetch_before_loop
,
4166 info
[i
].write
? "read/write" : "read only");
4167 fprintf (loop_dump_stream
,
4168 " density: %d%%; bytes_accessed: %u; total_bytes: %u\n",
4169 (int) (info
[i
].bytes_accessed
* 100 / info
[i
].stride
),
4170 info
[i
].bytes_accessed
, info
[i
].total_bytes
);
4171 fprintf (loop_dump_stream
, " index: ");
4172 fprintf (loop_dump_stream
, HOST_WIDE_INT_PRINT_DEC
, info
[i
].index
);
4173 fprintf (loop_dump_stream
, "; stride: ");
4174 fprintf (loop_dump_stream
, HOST_WIDE_INT_PRINT_DEC
, info
[i
].stride
);
4175 fprintf (loop_dump_stream
, "; address: ");
4176 print_rtl (loop_dump_stream
, info
[i
].base_address
);
4177 fprintf (loop_dump_stream
, "\n");
4181 if (num_real_prefetches
+ num_prefetches_before
> 0)
4183 /* Record that this loop uses prefetch instructions. */
4184 LOOP_INFO (loop
)->has_prefetch
= 1;
4186 if (loop_dump_stream
)
4188 fprintf (loop_dump_stream
, "Real prefetches needed within loop: %d (write: %d)\n",
4189 num_real_prefetches
, num_real_write_prefetches
);
4190 fprintf (loop_dump_stream
, "Real prefetches needed before loop: %d (write: %d)\n",
4191 num_prefetches_before
, num_write_prefetches_before
);
4195 for (i
= 0; i
< num_prefetches
; i
++)
4199 for (y
= 0; y
< info
[i
].prefetch_in_loop
; y
++)
4201 rtx loc
= copy_rtx (*info
[i
].giv
->location
);
4203 int bytes_ahead
= PREFETCH_BLOCK
* (ahead
+ y
);
4204 rtx before_insn
= info
[i
].giv
->insn
;
4205 rtx prev_insn
= PREV_INSN (info
[i
].giv
->insn
);
4208 /* We can save some effort by offsetting the address on
4209 architectures with offsettable memory references. */
4210 if (offsettable_address_p (0, VOIDmode
, loc
))
4211 loc
= plus_constant (loc
, bytes_ahead
);
4214 rtx reg
= gen_reg_rtx (Pmode
);
4215 loop_iv_add_mult_emit_before (loop
, loc
, const1_rtx
,
4216 GEN_INT (bytes_ahead
), reg
,
4222 /* Make sure the address operand is valid for prefetch. */
4223 if (! (*insn_data
[(int)CODE_FOR_prefetch
].operand
[0].predicate
)
4224 (loc
, insn_data
[(int)CODE_FOR_prefetch
].operand
[0].mode
))
4225 loc
= force_reg (Pmode
, loc
);
4226 emit_insn (gen_prefetch (loc
, GEN_INT (info
[i
].write
),
4230 emit_insn_before (seq
, before_insn
);
4232 /* Check all insns emitted and record the new GIV
4234 insn
= NEXT_INSN (prev_insn
);
4235 while (insn
!= before_insn
)
4237 insn
= check_insn_for_givs (loop
, insn
,
4238 info
[i
].giv
->always_executed
,
4239 info
[i
].giv
->maybe_multiple
);
4240 insn
= NEXT_INSN (insn
);
4244 if (PREFETCH_BEFORE_LOOP
)
4246 /* Emit insns before the loop to fetch the first cache lines or,
4247 if we're not prefetching within the loop, everything we expect
4249 for (y
= 0; y
< info
[i
].prefetch_before_loop
; y
++)
4251 rtx reg
= gen_reg_rtx (Pmode
);
4252 rtx loop_start
= loop
->start
;
4253 rtx init_val
= info
[i
].class->initial_value
;
4254 rtx add_val
= simplify_gen_binary (PLUS
, Pmode
,
4255 info
[i
].giv
->add_val
,
4256 GEN_INT (y
* PREFETCH_BLOCK
));
4258 /* Functions called by LOOP_IV_ADD_EMIT_BEFORE expect a
4259 non-constant INIT_VAL to have the same mode as REG, which
4260 in this case we know to be Pmode. */
4261 if (GET_MODE (init_val
) != Pmode
&& !CONSTANT_P (init_val
))
4266 init_val
= convert_to_mode (Pmode
, init_val
, 0);
4269 loop_insn_emit_before (loop
, 0, loop_start
, seq
);
4271 loop_iv_add_mult_emit_before (loop
, init_val
,
4272 info
[i
].giv
->mult_val
,
4273 add_val
, reg
, 0, loop_start
);
4274 emit_insn_before (gen_prefetch (reg
, GEN_INT (info
[i
].write
),
4284 /* A "basic induction variable" or biv is a pseudo reg that is set
4285 (within this loop) only by incrementing or decrementing it. */
4286 /* A "general induction variable" or giv is a pseudo reg whose
4287 value is a linear function of a biv. */
4289 /* Bivs are recognized by `basic_induction_var';
4290 Givs by `general_induction_var'. */
4292 /* Communication with routines called via `note_stores'. */
4294 static rtx note_insn
;
4296 /* Dummy register to have nonzero DEST_REG for DEST_ADDR type givs. */
4298 static rtx addr_placeholder
;
4300 /* ??? Unfinished optimizations, and possible future optimizations,
4301 for the strength reduction code. */
4303 /* ??? The interaction of biv elimination, and recognition of 'constant'
4304 bivs, may cause problems. */
4306 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
4307 performance problems.
4309 Perhaps don't eliminate things that can be combined with an addressing
4310 mode. Find all givs that have the same biv, mult_val, and add_val;
4311 then for each giv, check to see if its only use dies in a following
4312 memory address. If so, generate a new memory address and check to see
4313 if it is valid. If it is valid, then store the modified memory address,
4314 otherwise, mark the giv as not done so that it will get its own iv. */
4316 /* ??? Could try to optimize branches when it is known that a biv is always
4319 /* ??? When replace a biv in a compare insn, we should replace with closest
4320 giv so that an optimized branch can still be recognized by the combiner,
4321 e.g. the VAX acb insn. */
4323 /* ??? Many of the checks involving uid_luid could be simplified if regscan
4324 was rerun in loop_optimize whenever a register was added or moved.
4325 Also, some of the optimizations could be a little less conservative. */
4327 /* Scan the loop body and call FNCALL for each insn. In the addition to the
4328 LOOP and INSN parameters pass MAYBE_MULTIPLE and NOT_EVERY_ITERATION to the
4331 NOT_EVERY_ITERATION is 1 if current insn is not known to be executed at
4332 least once for every loop iteration except for the last one.
4334 MAYBE_MULTIPLE is 1 if current insn may be executed more than once for every
4338 for_each_insn_in_loop (loop
, fncall
)
4340 loop_insn_callback fncall
;
4342 int not_every_iteration
= 0;
4343 int maybe_multiple
= 0;
4344 int past_loop_latch
= 0;
4348 /* If loop_scan_start points to the loop exit test, we have to be wary of
4349 subversive use of gotos inside expression statements. */
4350 if (prev_nonnote_insn (loop
->scan_start
) != prev_nonnote_insn (loop
->start
))
4351 maybe_multiple
= back_branch_in_range_p (loop
, loop
->scan_start
);
4353 /* Scan through loop and update NOT_EVERY_ITERATION and MAYBE_MULTIPLE. */
4354 for (p
= next_insn_in_loop (loop
, loop
->scan_start
);
4356 p
= next_insn_in_loop (loop
, p
))
4358 p
= fncall (loop
, p
, not_every_iteration
, maybe_multiple
);
4360 /* Past CODE_LABEL, we get to insns that may be executed multiple
4361 times. The only way we can be sure that they can't is if every
4362 jump insn between here and the end of the loop either
4363 returns, exits the loop, is a jump to a location that is still
4364 behind the label, or is a jump to the loop start. */
4366 if (GET_CODE (p
) == CODE_LABEL
)
4374 insn
= NEXT_INSN (insn
);
4375 if (insn
== loop
->scan_start
)
4377 if (insn
== loop
->end
)
4383 if (insn
== loop
->scan_start
)
4387 if (GET_CODE (insn
) == JUMP_INSN
4388 && GET_CODE (PATTERN (insn
)) != RETURN
4389 && (!any_condjump_p (insn
)
4390 || (JUMP_LABEL (insn
) != 0
4391 && JUMP_LABEL (insn
) != loop
->scan_start
4392 && !loop_insn_first_p (p
, JUMP_LABEL (insn
)))))
4400 /* Past a jump, we get to insns for which we can't count
4401 on whether they will be executed during each iteration. */
4402 /* This code appears twice in strength_reduce. There is also similar
4403 code in scan_loop. */
4404 if (GET_CODE (p
) == JUMP_INSN
4405 /* If we enter the loop in the middle, and scan around to the
4406 beginning, don't set not_every_iteration for that.
4407 This can be any kind of jump, since we want to know if insns
4408 will be executed if the loop is executed. */
4409 && !(JUMP_LABEL (p
) == loop
->top
4410 && ((NEXT_INSN (NEXT_INSN (p
)) == loop
->end
4411 && any_uncondjump_p (p
))
4412 || (NEXT_INSN (p
) == loop
->end
&& any_condjump_p (p
)))))
4416 /* If this is a jump outside the loop, then it also doesn't
4417 matter. Check to see if the target of this branch is on the
4418 loop->exits_labels list. */
4420 for (label
= loop
->exit_labels
; label
; label
= LABEL_NEXTREF (label
))
4421 if (XEXP (label
, 0) == JUMP_LABEL (p
))
4425 not_every_iteration
= 1;
4428 else if (GET_CODE (p
) == NOTE
)
4430 /* At the virtual top of a converted loop, insns are again known to
4431 be executed each iteration: logically, the loop begins here
4432 even though the exit code has been duplicated.
4434 Insns are also again known to be executed each iteration at
4435 the LOOP_CONT note. */
4436 if ((NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
4437 || NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_CONT
)
4439 not_every_iteration
= 0;
4440 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
4442 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
4446 /* Note if we pass a loop latch. If we do, then we can not clear
4447 NOT_EVERY_ITERATION below when we pass the last CODE_LABEL in
4448 a loop since a jump before the last CODE_LABEL may have started
4449 a new loop iteration.
4451 Note that LOOP_TOP is only set for rotated loops and we need
4452 this check for all loops, so compare against the CODE_LABEL
4453 which immediately follows LOOP_START. */
4454 if (GET_CODE (p
) == JUMP_INSN
4455 && JUMP_LABEL (p
) == NEXT_INSN (loop
->start
))
4456 past_loop_latch
= 1;
4458 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
4459 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
4460 or not an insn is known to be executed each iteration of the
4461 loop, whether or not any iterations are known to occur.
4463 Therefore, if we have just passed a label and have no more labels
4464 between here and the test insn of the loop, and we have not passed
4465 a jump to the top of the loop, then we know these insns will be
4466 executed each iteration. */
4468 if (not_every_iteration
4470 && GET_CODE (p
) == CODE_LABEL
4471 && no_labels_between_p (p
, loop
->end
)
4472 && loop_insn_first_p (p
, loop
->cont
))
4473 not_every_iteration
= 0;
4478 loop_bivs_find (loop
)
4481 struct loop_regs
*regs
= LOOP_REGS (loop
);
4482 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
4483 /* Temporary list pointers for traversing ivs->list. */
4484 struct iv_class
*bl
, **backbl
;
4488 for_each_insn_in_loop (loop
, check_insn_for_bivs
);
4490 /* Scan ivs->list to remove all regs that proved not to be bivs.
4491 Make a sanity check against regs->n_times_set. */
4492 for (backbl
= &ivs
->list
, bl
= *backbl
; bl
; bl
= bl
->next
)
4494 if (REG_IV_TYPE (ivs
, bl
->regno
) != BASIC_INDUCT
4495 /* Above happens if register modified by subreg, etc. */
4496 /* Make sure it is not recognized as a basic induction var: */
4497 || regs
->array
[bl
->regno
].n_times_set
!= bl
->biv_count
4498 /* If never incremented, it is invariant that we decided not to
4499 move. So leave it alone. */
4500 || ! bl
->incremented
)
4502 if (loop_dump_stream
)
4503 fprintf (loop_dump_stream
, "Biv %d: discarded, %s\n",
4505 (REG_IV_TYPE (ivs
, bl
->regno
) != BASIC_INDUCT
4506 ? "not induction variable"
4507 : (! bl
->incremented
? "never incremented"
4510 REG_IV_TYPE (ivs
, bl
->regno
) = NOT_BASIC_INDUCT
;
4517 if (loop_dump_stream
)
4518 fprintf (loop_dump_stream
, "Biv %d: verified\n", bl
->regno
);
4524 /* Determine how BIVS are initialized by looking through pre-header
4525 extended basic block. */
4527 loop_bivs_init_find (loop
)
4530 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
4531 /* Temporary list pointers for traversing ivs->list. */
4532 struct iv_class
*bl
;
4536 /* Find initial value for each biv by searching backwards from loop_start,
4537 halting at first label. Also record any test condition. */
4540 for (p
= loop
->start
; p
&& GET_CODE (p
) != CODE_LABEL
; p
= PREV_INSN (p
))
4546 if (GET_CODE (p
) == CALL_INSN
)
4550 note_stores (PATTERN (p
), record_initial
, ivs
);
4552 /* Record any test of a biv that branches around the loop if no store
4553 between it and the start of loop. We only care about tests with
4554 constants and registers and only certain of those. */
4555 if (GET_CODE (p
) == JUMP_INSN
4556 && JUMP_LABEL (p
) != 0
4557 && next_real_insn (JUMP_LABEL (p
)) == next_real_insn (loop
->end
)
4558 && (test
= get_condition_for_loop (loop
, p
)) != 0
4559 && GET_CODE (XEXP (test
, 0)) == REG
4560 && REGNO (XEXP (test
, 0)) < max_reg_before_loop
4561 && (bl
= REG_IV_CLASS (ivs
, REGNO (XEXP (test
, 0)))) != 0
4562 && valid_initial_value_p (XEXP (test
, 1), p
, call_seen
, loop
->start
)
4563 && bl
->init_insn
== 0)
4565 /* If an NE test, we have an initial value! */
4566 if (GET_CODE (test
) == NE
)
4569 bl
->init_set
= gen_rtx_SET (VOIDmode
,
4570 XEXP (test
, 0), XEXP (test
, 1));
4573 bl
->initial_test
= test
;
4579 /* Look at the each biv and see if we can say anything better about its
4580 initial value from any initializing insns set up above. (This is done
4581 in two passes to avoid missing SETs in a PARALLEL.) */
4583 loop_bivs_check (loop
)
4586 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
4587 /* Temporary list pointers for traversing ivs->list. */
4588 struct iv_class
*bl
;
4589 struct iv_class
**backbl
;
4591 for (backbl
= &ivs
->list
; (bl
= *backbl
); backbl
= &bl
->next
)
4596 if (! bl
->init_insn
)
4599 /* IF INIT_INSN has a REG_EQUAL or REG_EQUIV note and the value
4600 is a constant, use the value of that. */
4601 if (((note
= find_reg_note (bl
->init_insn
, REG_EQUAL
, 0)) != NULL
4602 && CONSTANT_P (XEXP (note
, 0)))
4603 || ((note
= find_reg_note (bl
->init_insn
, REG_EQUIV
, 0)) != NULL
4604 && CONSTANT_P (XEXP (note
, 0))))
4605 src
= XEXP (note
, 0);
4607 src
= SET_SRC (bl
->init_set
);
4609 if (loop_dump_stream
)
4610 fprintf (loop_dump_stream
,
4611 "Biv %d: initialized at insn %d: initial value ",
4612 bl
->regno
, INSN_UID (bl
->init_insn
));
4614 if ((GET_MODE (src
) == GET_MODE (regno_reg_rtx
[bl
->regno
])
4615 || GET_MODE (src
) == VOIDmode
)
4616 && valid_initial_value_p (src
, bl
->init_insn
,
4617 LOOP_INFO (loop
)->pre_header_has_call
,
4620 bl
->initial_value
= src
;
4622 if (loop_dump_stream
)
4624 print_simple_rtl (loop_dump_stream
, src
);
4625 fputc ('\n', loop_dump_stream
);
4628 /* If we can't make it a giv,
4629 let biv keep initial value of "itself". */
4630 else if (loop_dump_stream
)
4631 fprintf (loop_dump_stream
, "is complex\n");
4636 /* Search the loop for general induction variables. */
4639 loop_givs_find (loop
)
4642 for_each_insn_in_loop (loop
, check_insn_for_givs
);
4646 /* For each giv for which we still don't know whether or not it is
4647 replaceable, check to see if it is replaceable because its final value
4648 can be calculated. */
4651 loop_givs_check (loop
)
4654 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
4655 struct iv_class
*bl
;
4657 for (bl
= ivs
->list
; bl
; bl
= bl
->next
)
4659 struct induction
*v
;
4661 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4662 if (! v
->replaceable
&& ! v
->not_replaceable
)
4663 check_final_value (loop
, v
);
4668 /* Return nonzero if it is possible to eliminate the biv BL provided
4669 all givs are reduced. This is possible if either the reg is not
4670 used outside the loop, or we can compute what its final value will
4674 loop_biv_eliminable_p (loop
, bl
, threshold
, insn_count
)
4676 struct iv_class
*bl
;
4680 /* For architectures with a decrement_and_branch_until_zero insn,
4681 don't do this if we put a REG_NONNEG note on the endtest for this
4684 #ifdef HAVE_decrement_and_branch_until_zero
4687 if (loop_dump_stream
)
4688 fprintf (loop_dump_stream
,
4689 "Cannot eliminate nonneg biv %d.\n", bl
->regno
);
4694 /* Check that biv is used outside loop or if it has a final value.
4695 Compare against bl->init_insn rather than loop->start. We aren't
4696 concerned with any uses of the biv between init_insn and
4697 loop->start since these won't be affected by the value of the biv
4698 elsewhere in the function, so long as init_insn doesn't use the
4701 if ((REGNO_LAST_LUID (bl
->regno
) < INSN_LUID (loop
->end
)
4703 && INSN_UID (bl
->init_insn
) < max_uid_for_loop
4704 && REGNO_FIRST_LUID (bl
->regno
) >= INSN_LUID (bl
->init_insn
)
4705 && ! reg_mentioned_p (bl
->biv
->dest_reg
, SET_SRC (bl
->init_set
)))
4706 || (bl
->final_value
= final_biv_value (loop
, bl
)))
4707 return maybe_eliminate_biv (loop
, bl
, 0, threshold
, insn_count
);
4709 if (loop_dump_stream
)
4711 fprintf (loop_dump_stream
,
4712 "Cannot eliminate biv %d.\n",
4714 fprintf (loop_dump_stream
,
4715 "First use: insn %d, last use: insn %d.\n",
4716 REGNO_FIRST_UID (bl
->regno
),
4717 REGNO_LAST_UID (bl
->regno
));
4723 /* Reduce each giv of BL that we have decided to reduce. */
4726 loop_givs_reduce (loop
, bl
)
4728 struct iv_class
*bl
;
4730 struct induction
*v
;
4732 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4734 struct induction
*tv
;
4735 if (! v
->ignore
&& v
->same
== 0)
4737 int auto_inc_opt
= 0;
4739 /* If the code for derived givs immediately below has already
4740 allocated a new_reg, we must keep it. */
4742 v
->new_reg
= gen_reg_rtx (v
->mode
);
4745 /* If the target has auto-increment addressing modes, and
4746 this is an address giv, then try to put the increment
4747 immediately after its use, so that flow can create an
4748 auto-increment addressing mode. */
4749 if (v
->giv_type
== DEST_ADDR
&& bl
->biv_count
== 1
4750 && bl
->biv
->always_executed
&& ! bl
->biv
->maybe_multiple
4751 /* We don't handle reversed biv's because bl->biv->insn
4752 does not have a valid INSN_LUID. */
4754 && v
->always_executed
&& ! v
->maybe_multiple
4755 && INSN_UID (v
->insn
) < max_uid_for_loop
)
4757 /* If other giv's have been combined with this one, then
4758 this will work only if all uses of the other giv's occur
4759 before this giv's insn. This is difficult to check.
4761 We simplify this by looking for the common case where
4762 there is one DEST_REG giv, and this giv's insn is the
4763 last use of the dest_reg of that DEST_REG giv. If the
4764 increment occurs after the address giv, then we can
4765 perform the optimization. (Otherwise, the increment
4766 would have to go before other_giv, and we would not be
4767 able to combine it with the address giv to get an
4768 auto-inc address.) */
4769 if (v
->combined_with
)
4771 struct induction
*other_giv
= 0;
4773 for (tv
= bl
->giv
; tv
; tv
= tv
->next_iv
)
4781 if (! tv
&& other_giv
4782 && REGNO (other_giv
->dest_reg
) < max_reg_before_loop
4783 && (REGNO_LAST_UID (REGNO (other_giv
->dest_reg
))
4784 == INSN_UID (v
->insn
))
4785 && INSN_LUID (v
->insn
) < INSN_LUID (bl
->biv
->insn
))
4788 /* Check for case where increment is before the address
4789 giv. Do this test in "loop order". */
4790 else if ((INSN_LUID (v
->insn
) > INSN_LUID (bl
->biv
->insn
)
4791 && (INSN_LUID (v
->insn
) < INSN_LUID (loop
->scan_start
)
4792 || (INSN_LUID (bl
->biv
->insn
)
4793 > INSN_LUID (loop
->scan_start
))))
4794 || (INSN_LUID (v
->insn
) < INSN_LUID (loop
->scan_start
)
4795 && (INSN_LUID (loop
->scan_start
)
4796 < INSN_LUID (bl
->biv
->insn
))))
4805 /* We can't put an insn immediately after one setting
4806 cc0, or immediately before one using cc0. */
4807 if ((auto_inc_opt
== 1 && sets_cc0_p (PATTERN (v
->insn
)))
4808 || (auto_inc_opt
== -1
4809 && (prev
= prev_nonnote_insn (v
->insn
)) != 0
4811 && sets_cc0_p (PATTERN (prev
))))
4817 v
->auto_inc_opt
= 1;
4821 /* For each place where the biv is incremented, add an insn
4822 to increment the new, reduced reg for the giv. */
4823 for (tv
= bl
->biv
; tv
; tv
= tv
->next_iv
)
4828 insert_before
= NEXT_INSN (tv
->insn
);
4829 else if (auto_inc_opt
== 1)
4830 insert_before
= NEXT_INSN (v
->insn
);
4832 insert_before
= v
->insn
;
4834 if (tv
->mult_val
== const1_rtx
)
4835 loop_iv_add_mult_emit_before (loop
, tv
->add_val
, v
->mult_val
,
4836 v
->new_reg
, v
->new_reg
,
4838 else /* tv->mult_val == const0_rtx */
4839 /* A multiply is acceptable here
4840 since this is presumed to be seldom executed. */
4841 loop_iv_add_mult_emit_before (loop
, tv
->add_val
, v
->mult_val
,
4842 v
->add_val
, v
->new_reg
,
4846 /* Add code at loop start to initialize giv's reduced reg. */
4848 loop_iv_add_mult_hoist (loop
,
4849 extend_value_for_giv (v
, bl
->initial_value
),
4850 v
->mult_val
, v
->add_val
, v
->new_reg
);
4856 /* Check for givs whose first use is their definition and whose
4857 last use is the definition of another giv. If so, it is likely
4858 dead and should not be used to derive another giv nor to
4862 loop_givs_dead_check (loop
, bl
)
4863 struct loop
*loop ATTRIBUTE_UNUSED
;
4864 struct iv_class
*bl
;
4866 struct induction
*v
;
4868 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4871 || (v
->same
&& v
->same
->ignore
))
4874 if (v
->giv_type
== DEST_REG
4875 && REGNO_FIRST_UID (REGNO (v
->dest_reg
)) == INSN_UID (v
->insn
))
4877 struct induction
*v1
;
4879 for (v1
= bl
->giv
; v1
; v1
= v1
->next_iv
)
4880 if (REGNO_LAST_UID (REGNO (v
->dest_reg
)) == INSN_UID (v1
->insn
))
4888 loop_givs_rescan (loop
, bl
, reg_map
)
4890 struct iv_class
*bl
;
4893 struct induction
*v
;
4895 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4897 if (v
->same
&& v
->same
->ignore
)
4903 /* Update expression if this was combined, in case other giv was
4906 v
->new_reg
= replace_rtx (v
->new_reg
,
4907 v
->same
->dest_reg
, v
->same
->new_reg
);
4909 /* See if this register is known to be a pointer to something. If
4910 so, see if we can find the alignment. First see if there is a
4911 destination register that is a pointer. If so, this shares the
4912 alignment too. Next see if we can deduce anything from the
4913 computational information. If not, and this is a DEST_ADDR
4914 giv, at least we know that it's a pointer, though we don't know
4916 if (GET_CODE (v
->new_reg
) == REG
4917 && v
->giv_type
== DEST_REG
4918 && REG_POINTER (v
->dest_reg
))
4919 mark_reg_pointer (v
->new_reg
,
4920 REGNO_POINTER_ALIGN (REGNO (v
->dest_reg
)));
4921 else if (GET_CODE (v
->new_reg
) == REG
4922 && REG_POINTER (v
->src_reg
))
4924 unsigned int align
= REGNO_POINTER_ALIGN (REGNO (v
->src_reg
));
4927 || GET_CODE (v
->add_val
) != CONST_INT
4928 || INTVAL (v
->add_val
) % (align
/ BITS_PER_UNIT
) != 0)
4931 mark_reg_pointer (v
->new_reg
, align
);
4933 else if (GET_CODE (v
->new_reg
) == REG
4934 && GET_CODE (v
->add_val
) == REG
4935 && REG_POINTER (v
->add_val
))
4937 unsigned int align
= REGNO_POINTER_ALIGN (REGNO (v
->add_val
));
4939 if (align
== 0 || GET_CODE (v
->mult_val
) != CONST_INT
4940 || INTVAL (v
->mult_val
) % (align
/ BITS_PER_UNIT
) != 0)
4943 mark_reg_pointer (v
->new_reg
, align
);
4945 else if (GET_CODE (v
->new_reg
) == REG
&& v
->giv_type
== DEST_ADDR
)
4946 mark_reg_pointer (v
->new_reg
, 0);
4948 if (v
->giv_type
== DEST_ADDR
)
4949 /* Store reduced reg as the address in the memref where we found
4951 validate_change (v
->insn
, v
->location
, v
->new_reg
, 0);
4952 else if (v
->replaceable
)
4954 reg_map
[REGNO (v
->dest_reg
)] = v
->new_reg
;
4958 rtx original_insn
= v
->insn
;
4961 /* Not replaceable; emit an insn to set the original giv reg from
4962 the reduced giv, same as above. */
4963 v
->insn
= loop_insn_emit_after (loop
, 0, original_insn
,
4964 gen_move_insn (v
->dest_reg
,
4967 /* The original insn may have a REG_EQUAL note. This note is
4968 now incorrect and may result in invalid substitutions later.
4969 The original insn is dead, but may be part of a libcall
4970 sequence, which doesn't seem worth the bother of handling. */
4971 note
= find_reg_note (original_insn
, REG_EQUAL
, NULL_RTX
);
4973 remove_note (original_insn
, note
);
4976 /* When a loop is reversed, givs which depend on the reversed
4977 biv, and which are live outside the loop, must be set to their
4978 correct final value. This insn is only needed if the giv is
4979 not replaceable. The correct final value is the same as the
4980 value that the giv starts the reversed loop with. */
4981 if (bl
->reversed
&& ! v
->replaceable
)
4982 loop_iv_add_mult_sink (loop
,
4983 extend_value_for_giv (v
, bl
->initial_value
),
4984 v
->mult_val
, v
->add_val
, v
->dest_reg
);
4985 else if (v
->final_value
)
4986 loop_insn_sink_or_swim (loop
,
4987 gen_load_of_final_value (v
->dest_reg
,
4990 if (loop_dump_stream
)
4992 fprintf (loop_dump_stream
, "giv at %d reduced to ",
4993 INSN_UID (v
->insn
));
4994 print_simple_rtl (loop_dump_stream
, v
->new_reg
);
4995 fprintf (loop_dump_stream
, "\n");
5002 loop_giv_reduce_benefit (loop
, bl
, v
, test_reg
)
5003 struct loop
*loop ATTRIBUTE_UNUSED
;
5004 struct iv_class
*bl
;
5005 struct induction
*v
;
5011 benefit
= v
->benefit
;
5012 PUT_MODE (test_reg
, v
->mode
);
5013 add_cost
= iv_add_mult_cost (bl
->biv
->add_val
, v
->mult_val
,
5014 test_reg
, test_reg
);
5016 /* Reduce benefit if not replaceable, since we will insert a
5017 move-insn to replace the insn that calculates this giv. Don't do
5018 this unless the giv is a user variable, since it will often be
5019 marked non-replaceable because of the duplication of the exit
5020 code outside the loop. In such a case, the copies we insert are
5021 dead and will be deleted. So they don't have a cost. Similar
5022 situations exist. */
5023 /* ??? The new final_[bg]iv_value code does a much better job of
5024 finding replaceable giv's, and hence this code may no longer be
5026 if (! v
->replaceable
&& ! bl
->eliminable
5027 && REG_USERVAR_P (v
->dest_reg
))
5028 benefit
-= copy_cost
;
5030 /* Decrease the benefit to count the add-insns that we will insert
5031 to increment the reduced reg for the giv. ??? This can
5032 overestimate the run-time cost of the additional insns, e.g. if
5033 there are multiple basic blocks that increment the biv, but only
5034 one of these blocks is executed during each iteration. There is
5035 no good way to detect cases like this with the current structure
5036 of the loop optimizer. This code is more accurate for
5037 determining code size than run-time benefits. */
5038 benefit
-= add_cost
* bl
->biv_count
;
5040 /* Decide whether to strength-reduce this giv or to leave the code
5041 unchanged (recompute it from the biv each time it is used). This
5042 decision can be made independently for each giv. */
5045 /* Attempt to guess whether autoincrement will handle some of the
5046 new add insns; if so, increase BENEFIT (undo the subtraction of
5047 add_cost that was done above). */
5048 if (v
->giv_type
== DEST_ADDR
5049 /* Increasing the benefit is risky, since this is only a guess.
5050 Avoid increasing register pressure in cases where there would
5051 be no other benefit from reducing this giv. */
5053 && GET_CODE (v
->mult_val
) == CONST_INT
)
5055 int size
= GET_MODE_SIZE (GET_MODE (v
->mem
));
5057 if (HAVE_POST_INCREMENT
5058 && INTVAL (v
->mult_val
) == size
)
5059 benefit
+= add_cost
* bl
->biv_count
;
5060 else if (HAVE_PRE_INCREMENT
5061 && INTVAL (v
->mult_val
) == size
)
5062 benefit
+= add_cost
* bl
->biv_count
;
5063 else if (HAVE_POST_DECREMENT
5064 && -INTVAL (v
->mult_val
) == size
)
5065 benefit
+= add_cost
* bl
->biv_count
;
5066 else if (HAVE_PRE_DECREMENT
5067 && -INTVAL (v
->mult_val
) == size
)
5068 benefit
+= add_cost
* bl
->biv_count
;
5076 /* Free IV structures for LOOP. */
5079 loop_ivs_free (loop
)
5082 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
5083 struct iv_class
*iv
= ivs
->list
;
5089 struct iv_class
*next
= iv
->next
;
5090 struct induction
*induction
;
5091 struct induction
*next_induction
;
5093 for (induction
= iv
->biv
; induction
; induction
= next_induction
)
5095 next_induction
= induction
->next_iv
;
5098 for (induction
= iv
->giv
; induction
; induction
= next_induction
)
5100 next_induction
= induction
->next_iv
;
5110 /* Perform strength reduction and induction variable elimination.
5112 Pseudo registers created during this function will be beyond the
5113 last valid index in several tables including
5114 REGS->ARRAY[I].N_TIMES_SET and REGNO_LAST_UID. This does not cause a
5115 problem here, because the added registers cannot be givs outside of
5116 their loop, and hence will never be reconsidered. But scan_loop
5117 must check regnos to make sure they are in bounds. */
5120 strength_reduce (loop
, flags
)
5124 struct loop_info
*loop_info
= LOOP_INFO (loop
);
5125 struct loop_regs
*regs
= LOOP_REGS (loop
);
5126 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
5128 /* Temporary list pointer for traversing ivs->list. */
5129 struct iv_class
*bl
;
5130 /* Ratio of extra register life span we can justify
5131 for saving an instruction. More if loop doesn't call subroutines
5132 since in that case saving an insn makes more difference
5133 and more registers are available. */
5134 /* ??? could set this to last value of threshold in move_movables */
5135 int threshold
= (loop_info
->has_call
? 1 : 2) * (3 + n_non_fixed_regs
);
5136 /* Map of pseudo-register replacements. */
5137 rtx
*reg_map
= NULL
;
5139 int unrolled_insn_copies
= 0;
5140 rtx test_reg
= gen_rtx_REG (word_mode
, LAST_VIRTUAL_REGISTER
+ 1);
5141 int insn_count
= count_insns_in_loop (loop
);
5143 addr_placeholder
= gen_reg_rtx (Pmode
);
5145 ivs
->n_regs
= max_reg_before_loop
;
5146 ivs
->regs
= (struct iv
*) xcalloc (ivs
->n_regs
, sizeof (struct iv
));
5148 /* Find all BIVs in loop. */
5149 loop_bivs_find (loop
);
5151 /* Exit if there are no bivs. */
5154 /* Can still unroll the loop anyways, but indicate that there is no
5155 strength reduction info available. */
5156 if (flags
& LOOP_UNROLL
)
5157 unroll_loop (loop
, insn_count
, 0);
5159 loop_ivs_free (loop
);
5163 /* Determine how BIVS are initialized by looking through pre-header
5164 extended basic block. */
5165 loop_bivs_init_find (loop
);
5167 /* Look at the each biv and see if we can say anything better about its
5168 initial value from any initializing insns set up above. */
5169 loop_bivs_check (loop
);
5171 /* Search the loop for general induction variables. */
5172 loop_givs_find (loop
);
5174 /* Try to calculate and save the number of loop iterations. This is
5175 set to zero if the actual number can not be calculated. This must
5176 be called after all giv's have been identified, since otherwise it may
5177 fail if the iteration variable is a giv. */
5178 loop_iterations (loop
);
5180 #ifdef HAVE_prefetch
5181 if (flags
& LOOP_PREFETCH
)
5182 emit_prefetch_instructions (loop
);
5185 /* Now for each giv for which we still don't know whether or not it is
5186 replaceable, check to see if it is replaceable because its final value
5187 can be calculated. This must be done after loop_iterations is called,
5188 so that final_giv_value will work correctly. */
5189 loop_givs_check (loop
);
5191 /* Try to prove that the loop counter variable (if any) is always
5192 nonnegative; if so, record that fact with a REG_NONNEG note
5193 so that "decrement and branch until zero" insn can be used. */
5194 check_dbra_loop (loop
, insn_count
);
5196 /* Create reg_map to hold substitutions for replaceable giv regs.
5197 Some givs might have been made from biv increments, so look at
5198 ivs->reg_iv_type for a suitable size. */
5199 reg_map_size
= ivs
->n_regs
;
5200 reg_map
= (rtx
*) xcalloc (reg_map_size
, sizeof (rtx
));
5202 /* Examine each iv class for feasibility of strength reduction/induction
5203 variable elimination. */
5205 for (bl
= ivs
->list
; bl
; bl
= bl
->next
)
5207 struct induction
*v
;
5210 /* Test whether it will be possible to eliminate this biv
5211 provided all givs are reduced. */
5212 bl
->eliminable
= loop_biv_eliminable_p (loop
, bl
, threshold
, insn_count
);
5214 /* This will be true at the end, if all givs which depend on this
5215 biv have been strength reduced.
5216 We can't (currently) eliminate the biv unless this is so. */
5217 bl
->all_reduced
= 1;
5219 /* Check each extension dependent giv in this class to see if its
5220 root biv is safe from wrapping in the interior mode. */
5221 check_ext_dependent_givs (bl
, loop_info
);
5223 /* Combine all giv's for this iv_class. */
5224 combine_givs (regs
, bl
);
5226 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
5228 struct induction
*tv
;
5230 if (v
->ignore
|| v
->same
)
5233 benefit
= loop_giv_reduce_benefit (loop
, bl
, v
, test_reg
);
5235 /* If an insn is not to be strength reduced, then set its ignore
5236 flag, and clear bl->all_reduced. */
5238 /* A giv that depends on a reversed biv must be reduced if it is
5239 used after the loop exit, otherwise, it would have the wrong
5240 value after the loop exit. To make it simple, just reduce all
5241 of such giv's whether or not we know they are used after the loop
5244 if (! flag_reduce_all_givs
5245 && v
->lifetime
* threshold
* benefit
< insn_count
5248 if (loop_dump_stream
)
5249 fprintf (loop_dump_stream
,
5250 "giv of insn %d not worth while, %d vs %d.\n",
5252 v
->lifetime
* threshold
* benefit
, insn_count
);
5254 bl
->all_reduced
= 0;
5258 /* Check that we can increment the reduced giv without a
5259 multiply insn. If not, reject it. */
5261 for (tv
= bl
->biv
; tv
; tv
= tv
->next_iv
)
5262 if (tv
->mult_val
== const1_rtx
5263 && ! product_cheap_p (tv
->add_val
, v
->mult_val
))
5265 if (loop_dump_stream
)
5266 fprintf (loop_dump_stream
,
5267 "giv of insn %d: would need a multiply.\n",
5268 INSN_UID (v
->insn
));
5270 bl
->all_reduced
= 0;
5276 /* Check for givs whose first use is their definition and whose
5277 last use is the definition of another giv. If so, it is likely
5278 dead and should not be used to derive another giv nor to
5280 loop_givs_dead_check (loop
, bl
);
5282 /* Reduce each giv that we decided to reduce. */
5283 loop_givs_reduce (loop
, bl
);
5285 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
5288 For each giv register that can be reduced now: if replaceable,
5289 substitute reduced reg wherever the old giv occurs;
5290 else add new move insn "giv_reg = reduced_reg". */
5291 loop_givs_rescan (loop
, bl
, reg_map
);
5293 /* All the givs based on the biv bl have been reduced if they
5296 /* For each giv not marked as maybe dead that has been combined with a
5297 second giv, clear any "maybe dead" mark on that second giv.
5298 v->new_reg will either be or refer to the register of the giv it
5301 Doing this clearing avoids problems in biv elimination where
5302 a giv's new_reg is a complex value that can't be put in the
5303 insn but the giv combined with (with a reg as new_reg) is
5304 marked maybe_dead. Since the register will be used in either
5305 case, we'd prefer it be used from the simpler giv. */
5307 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
5308 if (! v
->maybe_dead
&& v
->same
)
5309 v
->same
->maybe_dead
= 0;
5311 /* Try to eliminate the biv, if it is a candidate.
5312 This won't work if ! bl->all_reduced,
5313 since the givs we planned to use might not have been reduced.
5315 We have to be careful that we didn't initially think we could
5316 eliminate this biv because of a giv that we now think may be
5317 dead and shouldn't be used as a biv replacement.
5319 Also, there is the possibility that we may have a giv that looks
5320 like it can be used to eliminate a biv, but the resulting insn
5321 isn't valid. This can happen, for example, on the 88k, where a
5322 JUMP_INSN can compare a register only with zero. Attempts to
5323 replace it with a compare with a constant will fail.
5325 Note that in cases where this call fails, we may have replaced some
5326 of the occurrences of the biv with a giv, but no harm was done in
5327 doing so in the rare cases where it can occur. */
5329 if (bl
->all_reduced
== 1 && bl
->eliminable
5330 && maybe_eliminate_biv (loop
, bl
, 1, threshold
, insn_count
))
5332 /* ?? If we created a new test to bypass the loop entirely,
5333 or otherwise drop straight in, based on this test, then
5334 we might want to rewrite it also. This way some later
5335 pass has more hope of removing the initialization of this
5338 /* If final_value != 0, then the biv may be used after loop end
5339 and we must emit an insn to set it just in case.
5341 Reversed bivs already have an insn after the loop setting their
5342 value, so we don't need another one. We can't calculate the
5343 proper final value for such a biv here anyways. */
5344 if (bl
->final_value
&& ! bl
->reversed
)
5345 loop_insn_sink_or_swim (loop
,
5346 gen_load_of_final_value (bl
->biv
->dest_reg
,
5349 if (loop_dump_stream
)
5350 fprintf (loop_dump_stream
, "Reg %d: biv eliminated\n",
5353 /* See above note wrt final_value. But since we couldn't eliminate
5354 the biv, we must set the value after the loop instead of before. */
5355 else if (bl
->final_value
&& ! bl
->reversed
)
5356 loop_insn_sink (loop
, gen_load_of_final_value (bl
->biv
->dest_reg
,
5360 /* Go through all the instructions in the loop, making all the
5361 register substitutions scheduled in REG_MAP. */
5363 for (p
= loop
->start
; p
!= loop
->end
; p
= NEXT_INSN (p
))
5364 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
5365 || GET_CODE (p
) == CALL_INSN
)
5367 replace_regs (PATTERN (p
), reg_map
, reg_map_size
, 0);
5368 replace_regs (REG_NOTES (p
), reg_map
, reg_map_size
, 0);
5372 if (loop_info
->n_iterations
> 0)
5374 /* When we completely unroll a loop we will likely not need the increment
5375 of the loop BIV and we will not need the conditional branch at the
5377 unrolled_insn_copies
= insn_count
- 2;
5380 /* When we completely unroll a loop on a HAVE_cc0 machine we will not
5381 need the comparison before the conditional branch at the end of the
5383 unrolled_insn_copies
-= 1;
5386 /* We'll need one copy for each loop iteration. */
5387 unrolled_insn_copies
*= loop_info
->n_iterations
;
5389 /* A little slop to account for the ability to remove initialization
5390 code, better CSE, and other secondary benefits of completely
5391 unrolling some loops. */
5392 unrolled_insn_copies
-= 1;
5394 /* Clamp the value. */
5395 if (unrolled_insn_copies
< 0)
5396 unrolled_insn_copies
= 0;
5399 /* Unroll loops from within strength reduction so that we can use the
5400 induction variable information that strength_reduce has already
5401 collected. Always unroll loops that would be as small or smaller
5402 unrolled than when rolled. */
5403 if ((flags
& LOOP_UNROLL
)
5404 || ((flags
& LOOP_AUTO_UNROLL
)
5405 && loop_info
->n_iterations
> 0
5406 && unrolled_insn_copies
<= insn_count
))
5407 unroll_loop (loop
, insn_count
, 1);
5409 #ifdef HAVE_doloop_end
5410 if (HAVE_doloop_end
&& (flags
& LOOP_BCT
) && flag_branch_on_count_reg
)
5411 doloop_optimize (loop
);
5412 #endif /* HAVE_doloop_end */
5414 /* In case number of iterations is known, drop branch prediction note
5415 in the branch. Do that only in second loop pass, as loop unrolling
5416 may change the number of iterations performed. */
5417 if (flags
& LOOP_BCT
)
5419 unsigned HOST_WIDE_INT n
5420 = loop_info
->n_iterations
/ loop_info
->unroll_number
;
5422 predict_insn (prev_nonnote_insn (loop
->end
), PRED_LOOP_ITERATIONS
,
5423 REG_BR_PROB_BASE
- REG_BR_PROB_BASE
/ n
);
5426 if (loop_dump_stream
)
5427 fprintf (loop_dump_stream
, "\n");
5429 loop_ivs_free (loop
);
5434 /*Record all basic induction variables calculated in the insn. */
5436 check_insn_for_bivs (loop
, p
, not_every_iteration
, maybe_multiple
)
5439 int not_every_iteration
;
5442 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
5449 if (GET_CODE (p
) == INSN
5450 && (set
= single_set (p
))
5451 && GET_CODE (SET_DEST (set
)) == REG
)
5453 dest_reg
= SET_DEST (set
);
5454 if (REGNO (dest_reg
) < max_reg_before_loop
5455 && REGNO (dest_reg
) >= FIRST_PSEUDO_REGISTER
5456 && REG_IV_TYPE (ivs
, REGNO (dest_reg
)) != NOT_BASIC_INDUCT
)
5458 if (basic_induction_var (loop
, SET_SRC (set
),
5459 GET_MODE (SET_SRC (set
)),
5460 dest_reg
, p
, &inc_val
, &mult_val
,
5463 /* It is a possible basic induction variable.
5464 Create and initialize an induction structure for it. */
5467 = (struct induction
*) xmalloc (sizeof (struct induction
));
5469 record_biv (loop
, v
, p
, dest_reg
, inc_val
, mult_val
, location
,
5470 not_every_iteration
, maybe_multiple
);
5471 REG_IV_TYPE (ivs
, REGNO (dest_reg
)) = BASIC_INDUCT
;
5473 else if (REGNO (dest_reg
) < ivs
->n_regs
)
5474 REG_IV_TYPE (ivs
, REGNO (dest_reg
)) = NOT_BASIC_INDUCT
;
5480 /* Record all givs calculated in the insn.
5481 A register is a giv if: it is only set once, it is a function of a
5482 biv and a constant (or invariant), and it is not a biv. */
5484 check_insn_for_givs (loop
, p
, not_every_iteration
, maybe_multiple
)
5487 int not_every_iteration
;
5490 struct loop_regs
*regs
= LOOP_REGS (loop
);
5493 /* Look for a general induction variable in a register. */
5494 if (GET_CODE (p
) == INSN
5495 && (set
= single_set (p
))
5496 && GET_CODE (SET_DEST (set
)) == REG
5497 && ! regs
->array
[REGNO (SET_DEST (set
))].may_not_optimize
)
5506 rtx last_consec_insn
;
5508 dest_reg
= SET_DEST (set
);
5509 if (REGNO (dest_reg
) < FIRST_PSEUDO_REGISTER
)
5512 if (/* SET_SRC is a giv. */
5513 (general_induction_var (loop
, SET_SRC (set
), &src_reg
, &add_val
,
5514 &mult_val
, &ext_val
, 0, &benefit
, VOIDmode
)
5515 /* Equivalent expression is a giv. */
5516 || ((regnote
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
5517 && general_induction_var (loop
, XEXP (regnote
, 0), &src_reg
,
5518 &add_val
, &mult_val
, &ext_val
, 0,
5519 &benefit
, VOIDmode
)))
5520 /* Don't try to handle any regs made by loop optimization.
5521 We have nothing on them in regno_first_uid, etc. */
5522 && REGNO (dest_reg
) < max_reg_before_loop
5523 /* Don't recognize a BASIC_INDUCT_VAR here. */
5524 && dest_reg
!= src_reg
5525 /* This must be the only place where the register is set. */
5526 && (regs
->array
[REGNO (dest_reg
)].n_times_set
== 1
5527 /* or all sets must be consecutive and make a giv. */
5528 || (benefit
= consec_sets_giv (loop
, benefit
, p
,
5530 &add_val
, &mult_val
, &ext_val
,
5531 &last_consec_insn
))))
5534 = (struct induction
*) xmalloc (sizeof (struct induction
));
5536 /* If this is a library call, increase benefit. */
5537 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
5538 benefit
+= libcall_benefit (p
);
5540 /* Skip the consecutive insns, if there are any. */
5541 if (regs
->array
[REGNO (dest_reg
)].n_times_set
!= 1)
5542 p
= last_consec_insn
;
5544 record_giv (loop
, v
, p
, src_reg
, dest_reg
, mult_val
, add_val
,
5545 ext_val
, benefit
, DEST_REG
, not_every_iteration
,
5546 maybe_multiple
, (rtx
*) 0);
5551 #ifndef DONT_REDUCE_ADDR
5552 /* Look for givs which are memory addresses. */
5553 /* This resulted in worse code on a VAX 8600. I wonder if it
5555 if (GET_CODE (p
) == INSN
)
5556 find_mem_givs (loop
, PATTERN (p
), p
, not_every_iteration
,
5560 /* Update the status of whether giv can derive other givs. This can
5561 change when we pass a label or an insn that updates a biv. */
5562 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
5563 || GET_CODE (p
) == CODE_LABEL
)
5564 update_giv_derive (loop
, p
);
5568 /* Return 1 if X is a valid source for an initial value (or as value being
5569 compared against in an initial test).
5571 X must be either a register or constant and must not be clobbered between
5572 the current insn and the start of the loop.
5574 INSN is the insn containing X. */
5577 valid_initial_value_p (x
, insn
, call_seen
, loop_start
)
5586 /* Only consider pseudos we know about initialized in insns whose luids
5588 if (GET_CODE (x
) != REG
5589 || REGNO (x
) >= max_reg_before_loop
)
5592 /* Don't use call-clobbered registers across a call which clobbers it. On
5593 some machines, don't use any hard registers at all. */
5594 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
5595 && (SMALL_REGISTER_CLASSES
5596 || (call_used_regs
[REGNO (x
)] && call_seen
)))
5599 /* Don't use registers that have been clobbered before the start of the
5601 if (reg_set_between_p (x
, insn
, loop_start
))
5607 /* Scan X for memory refs and check each memory address
5608 as a possible giv. INSN is the insn whose pattern X comes from.
5609 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
5610 every loop iteration. MAYBE_MULTIPLE is 1 if the insn might be executed
5611 more than once in each loop iteration. */
5614 find_mem_givs (loop
, x
, insn
, not_every_iteration
, maybe_multiple
)
5615 const struct loop
*loop
;
5618 int not_every_iteration
, maybe_multiple
;
5627 code
= GET_CODE (x
);
5652 /* This code used to disable creating GIVs with mult_val == 1 and
5653 add_val == 0. However, this leads to lost optimizations when
5654 it comes time to combine a set of related DEST_ADDR GIVs, since
5655 this one would not be seen. */
5657 if (general_induction_var (loop
, XEXP (x
, 0), &src_reg
, &add_val
,
5658 &mult_val
, &ext_val
, 1, &benefit
,
5661 /* Found one; record it. */
5663 = (struct induction
*) xmalloc (sizeof (struct induction
));
5665 record_giv (loop
, v
, insn
, src_reg
, addr_placeholder
, mult_val
,
5666 add_val
, ext_val
, benefit
, DEST_ADDR
,
5667 not_every_iteration
, maybe_multiple
, &XEXP (x
, 0));
5678 /* Recursively scan the subexpressions for other mem refs. */
5680 fmt
= GET_RTX_FORMAT (code
);
5681 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5683 find_mem_givs (loop
, XEXP (x
, i
), insn
, not_every_iteration
,
5685 else if (fmt
[i
] == 'E')
5686 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
5687 find_mem_givs (loop
, XVECEXP (x
, i
, j
), insn
, not_every_iteration
,
5691 /* Fill in the data about one biv update.
5692 V is the `struct induction' in which we record the biv. (It is
5693 allocated by the caller, with alloca.)
5694 INSN is the insn that sets it.
5695 DEST_REG is the biv's reg.
5697 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
5698 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
5699 being set to INC_VAL.
5701 NOT_EVERY_ITERATION is nonzero if this biv update is not know to be
5702 executed every iteration; MAYBE_MULTIPLE is nonzero if this biv update
5703 can be executed more than once per iteration. If MAYBE_MULTIPLE
5704 and NOT_EVERY_ITERATION are both zero, we know that the biv update is
5705 executed exactly once per iteration. */
5708 record_biv (loop
, v
, insn
, dest_reg
, inc_val
, mult_val
, location
,
5709 not_every_iteration
, maybe_multiple
)
5711 struct induction
*v
;
5717 int not_every_iteration
;
5720 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
5721 struct iv_class
*bl
;
5724 v
->src_reg
= dest_reg
;
5725 v
->dest_reg
= dest_reg
;
5726 v
->mult_val
= mult_val
;
5727 v
->add_val
= inc_val
;
5728 v
->ext_dependent
= NULL_RTX
;
5729 v
->location
= location
;
5730 v
->mode
= GET_MODE (dest_reg
);
5731 v
->always_computable
= ! not_every_iteration
;
5732 v
->always_executed
= ! not_every_iteration
;
5733 v
->maybe_multiple
= maybe_multiple
;
5735 /* Add this to the reg's iv_class, creating a class
5736 if this is the first incrementation of the reg. */
5738 bl
= REG_IV_CLASS (ivs
, REGNO (dest_reg
));
5741 /* Create and initialize new iv_class. */
5743 bl
= (struct iv_class
*) xmalloc (sizeof (struct iv_class
));
5745 bl
->regno
= REGNO (dest_reg
);
5751 /* Set initial value to the reg itself. */
5752 bl
->initial_value
= dest_reg
;
5753 bl
->final_value
= 0;
5754 /* We haven't seen the initializing insn yet */
5757 bl
->initial_test
= 0;
5758 bl
->incremented
= 0;
5762 bl
->total_benefit
= 0;
5764 /* Add this class to ivs->list. */
5765 bl
->next
= ivs
->list
;
5768 /* Put it in the array of biv register classes. */
5769 REG_IV_CLASS (ivs
, REGNO (dest_reg
)) = bl
;
5772 /* Update IV_CLASS entry for this biv. */
5773 v
->next_iv
= bl
->biv
;
5776 if (mult_val
== const1_rtx
)
5777 bl
->incremented
= 1;
5779 if (loop_dump_stream
)
5780 loop_biv_dump (v
, loop_dump_stream
, 0);
5783 /* Fill in the data about one giv.
5784 V is the `struct induction' in which we record the giv. (It is
5785 allocated by the caller, with alloca.)
5786 INSN is the insn that sets it.
5787 BENEFIT estimates the savings from deleting this insn.
5788 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
5789 into a register or is used as a memory address.
5791 SRC_REG is the biv reg which the giv is computed from.
5792 DEST_REG is the giv's reg (if the giv is stored in a reg).
5793 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
5794 LOCATION points to the place where this giv's value appears in INSN. */
5797 record_giv (loop
, v
, insn
, src_reg
, dest_reg
, mult_val
, add_val
, ext_val
,
5798 benefit
, type
, not_every_iteration
, maybe_multiple
, location
)
5799 const struct loop
*loop
;
5800 struct induction
*v
;
5804 rtx mult_val
, add_val
, ext_val
;
5807 int not_every_iteration
, maybe_multiple
;
5810 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
5811 struct induction
*b
;
5812 struct iv_class
*bl
;
5813 rtx set
= single_set (insn
);
5816 /* Attempt to prove constantness of the values. Don't let simplify_rtx
5817 undo the MULT canonicalization that we performed earlier. */
5818 temp
= simplify_rtx (add_val
);
5820 && ! (GET_CODE (add_val
) == MULT
5821 && GET_CODE (temp
) == ASHIFT
))
5825 v
->src_reg
= src_reg
;
5827 v
->dest_reg
= dest_reg
;
5828 v
->mult_val
= mult_val
;
5829 v
->add_val
= add_val
;
5830 v
->ext_dependent
= ext_val
;
5831 v
->benefit
= benefit
;
5832 v
->location
= location
;
5834 v
->combined_with
= 0;
5835 v
->maybe_multiple
= maybe_multiple
;
5837 v
->derive_adjustment
= 0;
5843 v
->auto_inc_opt
= 0;
5847 /* The v->always_computable field is used in update_giv_derive, to
5848 determine whether a giv can be used to derive another giv. For a
5849 DEST_REG giv, INSN computes a new value for the giv, so its value
5850 isn't computable if INSN insn't executed every iteration.
5851 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
5852 it does not compute a new value. Hence the value is always computable
5853 regardless of whether INSN is executed each iteration. */
5855 if (type
== DEST_ADDR
)
5856 v
->always_computable
= 1;
5858 v
->always_computable
= ! not_every_iteration
;
5860 v
->always_executed
= ! not_every_iteration
;
5862 if (type
== DEST_ADDR
)
5864 v
->mode
= GET_MODE (*location
);
5867 else /* type == DEST_REG */
5869 v
->mode
= GET_MODE (SET_DEST (set
));
5871 v
->lifetime
= LOOP_REG_LIFETIME (loop
, REGNO (dest_reg
));
5873 /* If the lifetime is zero, it means that this register is
5874 really a dead store. So mark this as a giv that can be
5875 ignored. This will not prevent the biv from being eliminated. */
5876 if (v
->lifetime
== 0)
5879 REG_IV_TYPE (ivs
, REGNO (dest_reg
)) = GENERAL_INDUCT
;
5880 REG_IV_INFO (ivs
, REGNO (dest_reg
)) = v
;
5883 /* Add the giv to the class of givs computed from one biv. */
5885 bl
= REG_IV_CLASS (ivs
, REGNO (src_reg
));
5888 v
->next_iv
= bl
->giv
;
5890 /* Don't count DEST_ADDR. This is supposed to count the number of
5891 insns that calculate givs. */
5892 if (type
== DEST_REG
)
5894 bl
->total_benefit
+= benefit
;
5897 /* Fatal error, biv missing for this giv? */
5900 if (type
== DEST_ADDR
)
5903 v
->not_replaceable
= 0;
5907 /* The giv can be replaced outright by the reduced register only if all
5908 of the following conditions are true:
5909 - the insn that sets the giv is always executed on any iteration
5910 on which the giv is used at all
5911 (there are two ways to deduce this:
5912 either the insn is executed on every iteration,
5913 or all uses follow that insn in the same basic block),
5914 - the giv is not used outside the loop
5915 - no assignments to the biv occur during the giv's lifetime. */
5917 if (REGNO_FIRST_UID (REGNO (dest_reg
)) == INSN_UID (insn
)
5918 /* Previous line always fails if INSN was moved by loop opt. */
5919 && REGNO_LAST_LUID (REGNO (dest_reg
))
5920 < INSN_LUID (loop
->end
)
5921 && (! not_every_iteration
5922 || last_use_this_basic_block (dest_reg
, insn
)))
5924 /* Now check that there are no assignments to the biv within the
5925 giv's lifetime. This requires two separate checks. */
5927 /* Check each biv update, and fail if any are between the first
5928 and last use of the giv.
5930 If this loop contains an inner loop that was unrolled, then
5931 the insn modifying the biv may have been emitted by the loop
5932 unrolling code, and hence does not have a valid luid. Just
5933 mark the biv as not replaceable in this case. It is not very
5934 useful as a biv, because it is used in two different loops.
5935 It is very unlikely that we would be able to optimize the giv
5936 using this biv anyways. */
5939 v
->not_replaceable
= 0;
5940 for (b
= bl
->biv
; b
; b
= b
->next_iv
)
5942 if (INSN_UID (b
->insn
) >= max_uid_for_loop
5943 || ((INSN_LUID (b
->insn
)
5944 >= REGNO_FIRST_LUID (REGNO (dest_reg
)))
5945 && (INSN_LUID (b
->insn
)
5946 <= REGNO_LAST_LUID (REGNO (dest_reg
)))))
5949 v
->not_replaceable
= 1;
5954 /* If there are any backwards branches that go from after the
5955 biv update to before it, then this giv is not replaceable. */
5957 for (b
= bl
->biv
; b
; b
= b
->next_iv
)
5958 if (back_branch_in_range_p (loop
, b
->insn
))
5961 v
->not_replaceable
= 1;
5967 /* May still be replaceable, we don't have enough info here to
5970 v
->not_replaceable
= 0;
5974 /* Record whether the add_val contains a const_int, for later use by
5979 v
->no_const_addval
= 1;
5980 if (tem
== const0_rtx
)
5982 else if (CONSTANT_P (add_val
))
5983 v
->no_const_addval
= 0;
5984 if (GET_CODE (tem
) == PLUS
)
5988 if (GET_CODE (XEXP (tem
, 0)) == PLUS
)
5989 tem
= XEXP (tem
, 0);
5990 else if (GET_CODE (XEXP (tem
, 1)) == PLUS
)
5991 tem
= XEXP (tem
, 1);
5995 if (CONSTANT_P (XEXP (tem
, 1)))
5996 v
->no_const_addval
= 0;
6000 if (loop_dump_stream
)
6001 loop_giv_dump (v
, loop_dump_stream
, 0);
6004 /* All this does is determine whether a giv can be made replaceable because
6005 its final value can be calculated. This code can not be part of record_giv
6006 above, because final_giv_value requires that the number of loop iterations
6007 be known, and that can not be accurately calculated until after all givs
6008 have been identified. */
6011 check_final_value (loop
, v
)
6012 const struct loop
*loop
;
6013 struct induction
*v
;
6015 rtx final_value
= 0;
6017 /* DEST_ADDR givs will never reach here, because they are always marked
6018 replaceable above in record_giv. */
6020 /* The giv can be replaced outright by the reduced register only if all
6021 of the following conditions are true:
6022 - the insn that sets the giv is always executed on any iteration
6023 on which the giv is used at all
6024 (there are two ways to deduce this:
6025 either the insn is executed on every iteration,
6026 or all uses follow that insn in the same basic block),
6027 - its final value can be calculated (this condition is different
6028 than the one above in record_giv)
6029 - it's not used before the it's set
6030 - no assignments to the biv occur during the giv's lifetime. */
6033 /* This is only called now when replaceable is known to be false. */
6034 /* Clear replaceable, so that it won't confuse final_giv_value. */
6038 if ((final_value
= final_giv_value (loop
, v
))
6039 && (v
->always_executed
6040 || last_use_this_basic_block (v
->dest_reg
, v
->insn
)))
6042 int biv_increment_seen
= 0, before_giv_insn
= 0;
6047 v
->not_replaceable
= 0;
6049 /* When trying to determine whether or not a biv increment occurs
6050 during the lifetime of the giv, we can ignore uses of the variable
6051 outside the loop because final_value is true. Hence we can not
6052 use regno_last_uid and regno_first_uid as above in record_giv. */
6054 /* Search the loop to determine whether any assignments to the
6055 biv occur during the giv's lifetime. Start with the insn
6056 that sets the giv, and search around the loop until we come
6057 back to that insn again.
6059 Also fail if there is a jump within the giv's lifetime that jumps
6060 to somewhere outside the lifetime but still within the loop. This
6061 catches spaghetti code where the execution order is not linear, and
6062 hence the above test fails. Here we assume that the giv lifetime
6063 does not extend from one iteration of the loop to the next, so as
6064 to make the test easier. Since the lifetime isn't known yet,
6065 this requires two loops. See also record_giv above. */
6067 last_giv_use
= v
->insn
;
6074 before_giv_insn
= 1;
6075 p
= NEXT_INSN (loop
->start
);
6080 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
6081 || GET_CODE (p
) == CALL_INSN
)
6083 /* It is possible for the BIV increment to use the GIV if we
6084 have a cycle. Thus we must be sure to check each insn for
6085 both BIV and GIV uses, and we must check for BIV uses
6088 if (! biv_increment_seen
6089 && reg_set_p (v
->src_reg
, PATTERN (p
)))
6090 biv_increment_seen
= 1;
6092 if (reg_mentioned_p (v
->dest_reg
, PATTERN (p
)))
6094 if (biv_increment_seen
|| before_giv_insn
)
6097 v
->not_replaceable
= 1;
6105 /* Now that the lifetime of the giv is known, check for branches
6106 from within the lifetime to outside the lifetime if it is still
6116 p
= NEXT_INSN (loop
->start
);
6117 if (p
== last_giv_use
)
6120 if (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
)
6121 && LABEL_NAME (JUMP_LABEL (p
))
6122 && ((loop_insn_first_p (JUMP_LABEL (p
), v
->insn
)
6123 && loop_insn_first_p (loop
->start
, JUMP_LABEL (p
)))
6124 || (loop_insn_first_p (last_giv_use
, JUMP_LABEL (p
))
6125 && loop_insn_first_p (JUMP_LABEL (p
), loop
->end
))))
6128 v
->not_replaceable
= 1;
6130 if (loop_dump_stream
)
6131 fprintf (loop_dump_stream
,
6132 "Found branch outside giv lifetime.\n");
6139 /* If it is replaceable, then save the final value. */
6141 v
->final_value
= final_value
;
6144 if (loop_dump_stream
&& v
->replaceable
)
6145 fprintf (loop_dump_stream
, "Insn %d: giv reg %d final_value replaceable\n",
6146 INSN_UID (v
->insn
), REGNO (v
->dest_reg
));
6149 /* Update the status of whether a giv can derive other givs.
6151 We need to do something special if there is or may be an update to the biv
6152 between the time the giv is defined and the time it is used to derive
6155 In addition, a giv that is only conditionally set is not allowed to
6156 derive another giv once a label has been passed.
6158 The cases we look at are when a label or an update to a biv is passed. */
6161 update_giv_derive (loop
, p
)
6162 const struct loop
*loop
;
6165 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
6166 struct iv_class
*bl
;
6167 struct induction
*biv
, *giv
;
6171 /* Search all IV classes, then all bivs, and finally all givs.
6173 There are three cases we are concerned with. First we have the situation
6174 of a giv that is only updated conditionally. In that case, it may not
6175 derive any givs after a label is passed.
6177 The second case is when a biv update occurs, or may occur, after the
6178 definition of a giv. For certain biv updates (see below) that are
6179 known to occur between the giv definition and use, we can adjust the
6180 giv definition. For others, or when the biv update is conditional,
6181 we must prevent the giv from deriving any other givs. There are two
6182 sub-cases within this case.
6184 If this is a label, we are concerned with any biv update that is done
6185 conditionally, since it may be done after the giv is defined followed by
6186 a branch here (actually, we need to pass both a jump and a label, but
6187 this extra tracking doesn't seem worth it).
6189 If this is a jump, we are concerned about any biv update that may be
6190 executed multiple times. We are actually only concerned about
6191 backward jumps, but it is probably not worth performing the test
6192 on the jump again here.
6194 If this is a biv update, we must adjust the giv status to show that a
6195 subsequent biv update was performed. If this adjustment cannot be done,
6196 the giv cannot derive further givs. */
6198 for (bl
= ivs
->list
; bl
; bl
= bl
->next
)
6199 for (biv
= bl
->biv
; biv
; biv
= biv
->next_iv
)
6200 if (GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
6203 for (giv
= bl
->giv
; giv
; giv
= giv
->next_iv
)
6205 /* If cant_derive is already true, there is no point in
6206 checking all of these conditions again. */
6207 if (giv
->cant_derive
)
6210 /* If this giv is conditionally set and we have passed a label,
6211 it cannot derive anything. */
6212 if (GET_CODE (p
) == CODE_LABEL
&& ! giv
->always_computable
)
6213 giv
->cant_derive
= 1;
6215 /* Skip givs that have mult_val == 0, since
6216 they are really invariants. Also skip those that are
6217 replaceable, since we know their lifetime doesn't contain
6219 else if (giv
->mult_val
== const0_rtx
|| giv
->replaceable
)
6222 /* The only way we can allow this giv to derive another
6223 is if this is a biv increment and we can form the product
6224 of biv->add_val and giv->mult_val. In this case, we will
6225 be able to compute a compensation. */
6226 else if (biv
->insn
== p
)
6231 if (biv
->mult_val
== const1_rtx
)
6232 tem
= simplify_giv_expr (loop
,
6233 gen_rtx_MULT (giv
->mode
,
6236 &ext_val_dummy
, &dummy
);
6238 if (tem
&& giv
->derive_adjustment
)
6239 tem
= simplify_giv_expr
6241 gen_rtx_PLUS (giv
->mode
, tem
, giv
->derive_adjustment
),
6242 &ext_val_dummy
, &dummy
);
6245 giv
->derive_adjustment
= tem
;
6247 giv
->cant_derive
= 1;
6249 else if ((GET_CODE (p
) == CODE_LABEL
&& ! biv
->always_computable
)
6250 || (GET_CODE (p
) == JUMP_INSN
&& biv
->maybe_multiple
))
6251 giv
->cant_derive
= 1;
6256 /* Check whether an insn is an increment legitimate for a basic induction var.
6257 X is the source of insn P, or a part of it.
6258 MODE is the mode in which X should be interpreted.
6260 DEST_REG is the putative biv, also the destination of the insn.
6261 We accept patterns of these forms:
6262 REG = REG + INVARIANT (includes REG = REG - CONSTANT)
6263 REG = INVARIANT + REG
6265 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
6266 store the additive term into *INC_VAL, and store the place where
6267 we found the additive term into *LOCATION.
6269 If X is an assignment of an invariant into DEST_REG, we set
6270 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
6272 We also want to detect a BIV when it corresponds to a variable
6273 whose mode was promoted via PROMOTED_MODE. In that case, an increment
6274 of the variable may be a PLUS that adds a SUBREG of that variable to
6275 an invariant and then sign- or zero-extends the result of the PLUS
6278 Most GIVs in such cases will be in the promoted mode, since that is the
6279 probably the natural computation mode (and almost certainly the mode
6280 used for addresses) on the machine. So we view the pseudo-reg containing
6281 the variable as the BIV, as if it were simply incremented.
6283 Note that treating the entire pseudo as a BIV will result in making
6284 simple increments to any GIVs based on it. However, if the variable
6285 overflows in its declared mode but not its promoted mode, the result will
6286 be incorrect. This is acceptable if the variable is signed, since
6287 overflows in such cases are undefined, but not if it is unsigned, since
6288 those overflows are defined. So we only check for SIGN_EXTEND and
6291 If we cannot find a biv, we return 0. */
6294 basic_induction_var (loop
, x
, mode
, dest_reg
, p
, inc_val
, mult_val
, location
)
6295 const struct loop
*loop
;
6297 enum machine_mode mode
;
6308 code
= GET_CODE (x
);
6313 if (rtx_equal_p (XEXP (x
, 0), dest_reg
)
6314 || (GET_CODE (XEXP (x
, 0)) == SUBREG
6315 && SUBREG_PROMOTED_VAR_P (XEXP (x
, 0))
6316 && SUBREG_REG (XEXP (x
, 0)) == dest_reg
))
6318 argp
= &XEXP (x
, 1);
6320 else if (rtx_equal_p (XEXP (x
, 1), dest_reg
)
6321 || (GET_CODE (XEXP (x
, 1)) == SUBREG
6322 && SUBREG_PROMOTED_VAR_P (XEXP (x
, 1))
6323 && SUBREG_REG (XEXP (x
, 1)) == dest_reg
))
6325 argp
= &XEXP (x
, 0);
6331 if (loop_invariant_p (loop
, arg
) != 1)
6334 *inc_val
= convert_modes (GET_MODE (dest_reg
), GET_MODE (x
), arg
, 0);
6335 *mult_val
= const1_rtx
;
6340 /* If what's inside the SUBREG is a BIV, then the SUBREG. This will
6341 handle addition of promoted variables.
6342 ??? The comment at the start of this function is wrong: promoted
6343 variable increments don't look like it says they do. */
6344 return basic_induction_var (loop
, SUBREG_REG (x
),
6345 GET_MODE (SUBREG_REG (x
)),
6346 dest_reg
, p
, inc_val
, mult_val
, location
);
6349 /* If this register is assigned in a previous insn, look at its
6350 source, but don't go outside the loop or past a label. */
6352 /* If this sets a register to itself, we would repeat any previous
6353 biv increment if we applied this strategy blindly. */
6354 if (rtx_equal_p (dest_reg
, x
))
6363 insn
= PREV_INSN (insn
);
6365 while (insn
&& GET_CODE (insn
) == NOTE
6366 && NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
);
6370 set
= single_set (insn
);
6373 dest
= SET_DEST (set
);
6375 || (GET_CODE (dest
) == SUBREG
6376 && (GET_MODE_SIZE (GET_MODE (dest
)) <= UNITS_PER_WORD
)
6377 && (GET_MODE_CLASS (GET_MODE (dest
)) == MODE_INT
)
6378 && SUBREG_REG (dest
) == x
))
6379 return basic_induction_var (loop
, SET_SRC (set
),
6380 (GET_MODE (SET_SRC (set
)) == VOIDmode
6382 : GET_MODE (SET_SRC (set
))),
6384 inc_val
, mult_val
, location
);
6386 while (GET_CODE (dest
) == SIGN_EXTRACT
6387 || GET_CODE (dest
) == ZERO_EXTRACT
6388 || GET_CODE (dest
) == SUBREG
6389 || GET_CODE (dest
) == STRICT_LOW_PART
)
6390 dest
= XEXP (dest
, 0);
6396 /* Can accept constant setting of biv only when inside inner most loop.
6397 Otherwise, a biv of an inner loop may be incorrectly recognized
6398 as a biv of the outer loop,
6399 causing code to be moved INTO the inner loop. */
6401 if (loop_invariant_p (loop
, x
) != 1)
6406 /* convert_modes aborts if we try to convert to or from CCmode, so just
6407 exclude that case. It is very unlikely that a condition code value
6408 would be a useful iterator anyways. convert_modes aborts if we try to
6409 convert a float mode to non-float or vice versa too. */
6410 if (loop
->level
== 1
6411 && GET_MODE_CLASS (mode
) == GET_MODE_CLASS (GET_MODE (dest_reg
))
6412 && GET_MODE_CLASS (mode
) != MODE_CC
)
6414 /* Possible bug here? Perhaps we don't know the mode of X. */
6415 *inc_val
= convert_modes (GET_MODE (dest_reg
), mode
, x
, 0);
6416 *mult_val
= const0_rtx
;
6423 return basic_induction_var (loop
, XEXP (x
, 0), GET_MODE (XEXP (x
, 0)),
6424 dest_reg
, p
, inc_val
, mult_val
, location
);
6427 /* Similar, since this can be a sign extension. */
6428 for (insn
= PREV_INSN (p
);
6429 (insn
&& GET_CODE (insn
) == NOTE
6430 && NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
);
6431 insn
= PREV_INSN (insn
))
6435 set
= single_set (insn
);
6437 if (! rtx_equal_p (dest_reg
, XEXP (x
, 0))
6438 && set
&& SET_DEST (set
) == XEXP (x
, 0)
6439 && GET_CODE (XEXP (x
, 1)) == CONST_INT
6440 && INTVAL (XEXP (x
, 1)) >= 0
6441 && GET_CODE (SET_SRC (set
)) == ASHIFT
6442 && XEXP (x
, 1) == XEXP (SET_SRC (set
), 1))
6443 return basic_induction_var (loop
, XEXP (SET_SRC (set
), 0),
6444 GET_MODE (XEXP (x
, 0)),
6445 dest_reg
, insn
, inc_val
, mult_val
,
6454 /* A general induction variable (giv) is any quantity that is a linear
6455 function of a basic induction variable,
6456 i.e. giv = biv * mult_val + add_val.
6457 The coefficients can be any loop invariant quantity.
6458 A giv need not be computed directly from the biv;
6459 it can be computed by way of other givs. */
6461 /* Determine whether X computes a giv.
6462 If it does, return a nonzero value
6463 which is the benefit from eliminating the computation of X;
6464 set *SRC_REG to the register of the biv that it is computed from;
6465 set *ADD_VAL and *MULT_VAL to the coefficients,
6466 such that the value of X is biv * mult + add; */
6469 general_induction_var (loop
, x
, src_reg
, add_val
, mult_val
, ext_val
,
6470 is_addr
, pbenefit
, addr_mode
)
6471 const struct loop
*loop
;
6479 enum machine_mode addr_mode
;
6481 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
6484 /* If this is an invariant, forget it, it isn't a giv. */
6485 if (loop_invariant_p (loop
, x
) == 1)
6489 *ext_val
= NULL_RTX
;
6490 x
= simplify_giv_expr (loop
, x
, ext_val
, pbenefit
);
6494 switch (GET_CODE (x
))
6498 /* Since this is now an invariant and wasn't before, it must be a giv
6499 with MULT_VAL == 0. It doesn't matter which BIV we associate this
6501 *src_reg
= ivs
->list
->biv
->dest_reg
;
6502 *mult_val
= const0_rtx
;
6507 /* This is equivalent to a BIV. */
6509 *mult_val
= const1_rtx
;
6510 *add_val
= const0_rtx
;
6514 /* Either (plus (biv) (invar)) or
6515 (plus (mult (biv) (invar_1)) (invar_2)). */
6516 if (GET_CODE (XEXP (x
, 0)) == MULT
)
6518 *src_reg
= XEXP (XEXP (x
, 0), 0);
6519 *mult_val
= XEXP (XEXP (x
, 0), 1);
6523 *src_reg
= XEXP (x
, 0);
6524 *mult_val
= const1_rtx
;
6526 *add_val
= XEXP (x
, 1);
6530 /* ADD_VAL is zero. */
6531 *src_reg
= XEXP (x
, 0);
6532 *mult_val
= XEXP (x
, 1);
6533 *add_val
= const0_rtx
;
6540 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
6541 unless they are CONST_INT). */
6542 if (GET_CODE (*add_val
) == USE
)
6543 *add_val
= XEXP (*add_val
, 0);
6544 if (GET_CODE (*mult_val
) == USE
)
6545 *mult_val
= XEXP (*mult_val
, 0);
6548 *pbenefit
+= address_cost (orig_x
, addr_mode
) - reg_address_cost
;
6550 *pbenefit
+= rtx_cost (orig_x
, SET
);
6552 /* Always return true if this is a giv so it will be detected as such,
6553 even if the benefit is zero or negative. This allows elimination
6554 of bivs that might otherwise not be eliminated. */
6558 /* Given an expression, X, try to form it as a linear function of a biv.
6559 We will canonicalize it to be of the form
6560 (plus (mult (BIV) (invar_1))
6562 with possible degeneracies.
6564 The invariant expressions must each be of a form that can be used as a
6565 machine operand. We surround then with a USE rtx (a hack, but localized
6566 and certainly unambiguous!) if not a CONST_INT for simplicity in this
6567 routine; it is the caller's responsibility to strip them.
6569 If no such canonicalization is possible (i.e., two biv's are used or an
6570 expression that is neither invariant nor a biv or giv), this routine
6573 For a nonzero return, the result will have a code of CONST_INT, USE,
6574 REG (for a BIV), PLUS, or MULT. No other codes will occur.
6576 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
6578 static rtx sge_plus
PARAMS ((enum machine_mode
, rtx
, rtx
));
6579 static rtx sge_plus_constant
PARAMS ((rtx
, rtx
));
6582 simplify_giv_expr (loop
, x
, ext_val
, benefit
)
6583 const struct loop
*loop
;
6588 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
6589 struct loop_regs
*regs
= LOOP_REGS (loop
);
6590 enum machine_mode mode
= GET_MODE (x
);
6594 /* If this is not an integer mode, or if we cannot do arithmetic in this
6595 mode, this can't be a giv. */
6596 if (mode
!= VOIDmode
6597 && (GET_MODE_CLASS (mode
) != MODE_INT
6598 || GET_MODE_BITSIZE (mode
) > HOST_BITS_PER_WIDE_INT
))
6601 switch (GET_CODE (x
))
6604 arg0
= simplify_giv_expr (loop
, XEXP (x
, 0), ext_val
, benefit
);
6605 arg1
= simplify_giv_expr (loop
, XEXP (x
, 1), ext_val
, benefit
);
6606 if (arg0
== 0 || arg1
== 0)
6609 /* Put constant last, CONST_INT last if both constant. */
6610 if ((GET_CODE (arg0
) == USE
6611 || GET_CODE (arg0
) == CONST_INT
)
6612 && ! ((GET_CODE (arg0
) == USE
6613 && GET_CODE (arg1
) == USE
)
6614 || GET_CODE (arg1
) == CONST_INT
))
6615 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
6617 /* Handle addition of zero, then addition of an invariant. */
6618 if (arg1
== const0_rtx
)
6620 else if (GET_CODE (arg1
) == CONST_INT
|| GET_CODE (arg1
) == USE
)
6621 switch (GET_CODE (arg0
))
6625 /* Adding two invariants must result in an invariant, so enclose
6626 addition operation inside a USE and return it. */
6627 if (GET_CODE (arg0
) == USE
)
6628 arg0
= XEXP (arg0
, 0);
6629 if (GET_CODE (arg1
) == USE
)
6630 arg1
= XEXP (arg1
, 0);
6632 if (GET_CODE (arg0
) == CONST_INT
)
6633 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
6634 if (GET_CODE (arg1
) == CONST_INT
)
6635 tem
= sge_plus_constant (arg0
, arg1
);
6637 tem
= sge_plus (mode
, arg0
, arg1
);
6639 if (GET_CODE (tem
) != CONST_INT
)
6640 tem
= gen_rtx_USE (mode
, tem
);
6645 /* biv + invar or mult + invar. Return sum. */
6646 return gen_rtx_PLUS (mode
, arg0
, arg1
);
6649 /* (a + invar_1) + invar_2. Associate. */
6651 simplify_giv_expr (loop
,
6663 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
6664 MULT to reduce cases. */
6665 if (GET_CODE (arg0
) == REG
)
6666 arg0
= gen_rtx_MULT (mode
, arg0
, const1_rtx
);
6667 if (GET_CODE (arg1
) == REG
)
6668 arg1
= gen_rtx_MULT (mode
, arg1
, const1_rtx
);
6670 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
6671 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
6672 Recurse to associate the second PLUS. */
6673 if (GET_CODE (arg1
) == MULT
)
6674 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
6676 if (GET_CODE (arg1
) == PLUS
)
6678 simplify_giv_expr (loop
,
6680 gen_rtx_PLUS (mode
, arg0
,
6685 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
6686 if (GET_CODE (arg0
) != MULT
|| GET_CODE (arg1
) != MULT
)
6689 if (!rtx_equal_p (arg0
, arg1
))
6692 return simplify_giv_expr (loop
,
6701 /* Handle "a - b" as "a + b * (-1)". */
6702 return simplify_giv_expr (loop
,
6711 arg0
= simplify_giv_expr (loop
, XEXP (x
, 0), ext_val
, benefit
);
6712 arg1
= simplify_giv_expr (loop
, XEXP (x
, 1), ext_val
, benefit
);
6713 if (arg0
== 0 || arg1
== 0)
6716 /* Put constant last, CONST_INT last if both constant. */
6717 if ((GET_CODE (arg0
) == USE
|| GET_CODE (arg0
) == CONST_INT
)
6718 && GET_CODE (arg1
) != CONST_INT
)
6719 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
6721 /* If second argument is not now constant, not giv. */
6722 if (GET_CODE (arg1
) != USE
&& GET_CODE (arg1
) != CONST_INT
)
6725 /* Handle multiply by 0 or 1. */
6726 if (arg1
== const0_rtx
)
6729 else if (arg1
== const1_rtx
)
6732 switch (GET_CODE (arg0
))
6735 /* biv * invar. Done. */
6736 return gen_rtx_MULT (mode
, arg0
, arg1
);
6739 /* Product of two constants. */
6740 return GEN_INT (INTVAL (arg0
) * INTVAL (arg1
));
6743 /* invar * invar is a giv, but attempt to simplify it somehow. */
6744 if (GET_CODE (arg1
) != CONST_INT
)
6747 arg0
= XEXP (arg0
, 0);
6748 if (GET_CODE (arg0
) == MULT
)
6750 /* (invar_0 * invar_1) * invar_2. Associate. */
6751 return simplify_giv_expr (loop
,
6760 /* Propagate the MULT expressions to the intermost nodes. */
6761 else if (GET_CODE (arg0
) == PLUS
)
6763 /* (invar_0 + invar_1) * invar_2. Distribute. */
6764 return simplify_giv_expr (loop
,
6776 return gen_rtx_USE (mode
, gen_rtx_MULT (mode
, arg0
, arg1
));
6779 /* (a * invar_1) * invar_2. Associate. */
6780 return simplify_giv_expr (loop
,
6789 /* (a + invar_1) * invar_2. Distribute. */
6790 return simplify_giv_expr (loop
,
6805 /* Shift by constant is multiply by power of two. */
6806 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
)
6810 simplify_giv_expr (loop
,
6813 GEN_INT ((HOST_WIDE_INT
) 1
6814 << INTVAL (XEXP (x
, 1)))),
6818 /* "-a" is "a * (-1)" */
6819 return simplify_giv_expr (loop
,
6820 gen_rtx_MULT (mode
, XEXP (x
, 0), constm1_rtx
),
6824 /* "~a" is "-a - 1". Silly, but easy. */
6825 return simplify_giv_expr (loop
,
6826 gen_rtx_MINUS (mode
,
6827 gen_rtx_NEG (mode
, XEXP (x
, 0)),
6832 /* Already in proper form for invariant. */
6838 /* Conditionally recognize extensions of simple IVs. After we've
6839 computed loop traversal counts and verified the range of the
6840 source IV, we'll reevaluate this as a GIV. */
6841 if (*ext_val
== NULL_RTX
)
6843 arg0
= simplify_giv_expr (loop
, XEXP (x
, 0), ext_val
, benefit
);
6844 if (arg0
&& *ext_val
== NULL_RTX
&& GET_CODE (arg0
) == REG
)
6846 *ext_val
= gen_rtx_fmt_e (GET_CODE (x
), mode
, arg0
);
6853 /* If this is a new register, we can't deal with it. */
6854 if (REGNO (x
) >= max_reg_before_loop
)
6857 /* Check for biv or giv. */
6858 switch (REG_IV_TYPE (ivs
, REGNO (x
)))
6862 case GENERAL_INDUCT
:
6864 struct induction
*v
= REG_IV_INFO (ivs
, REGNO (x
));
6866 /* Form expression from giv and add benefit. Ensure this giv
6867 can derive another and subtract any needed adjustment if so. */
6869 /* Increasing the benefit here is risky. The only case in which it
6870 is arguably correct is if this is the only use of V. In other
6871 cases, this will artificially inflate the benefit of the current
6872 giv, and lead to suboptimal code. Thus, it is disabled, since
6873 potentially not reducing an only marginally beneficial giv is
6874 less harmful than reducing many givs that are not really
6877 rtx single_use
= regs
->array
[REGNO (x
)].single_usage
;
6878 if (single_use
&& single_use
!= const0_rtx
)
6879 *benefit
+= v
->benefit
;
6885 tem
= gen_rtx_PLUS (mode
, gen_rtx_MULT (mode
,
6886 v
->src_reg
, v
->mult_val
),
6889 if (v
->derive_adjustment
)
6890 tem
= gen_rtx_MINUS (mode
, tem
, v
->derive_adjustment
);
6891 arg0
= simplify_giv_expr (loop
, tem
, ext_val
, benefit
);
6894 if (!v
->ext_dependent
)
6899 *ext_val
= v
->ext_dependent
;
6907 /* If it isn't an induction variable, and it is invariant, we
6908 may be able to simplify things further by looking through
6909 the bits we just moved outside the loop. */
6910 if (loop_invariant_p (loop
, x
) == 1)
6913 struct loop_movables
*movables
= LOOP_MOVABLES (loop
);
6915 for (m
= movables
->head
; m
; m
= m
->next
)
6916 if (rtx_equal_p (x
, m
->set_dest
))
6918 /* Ok, we found a match. Substitute and simplify. */
6920 /* If we match another movable, we must use that, as
6921 this one is going away. */
6923 return simplify_giv_expr (loop
, m
->match
->set_dest
,
6926 /* If consec is nonzero, this is a member of a group of
6927 instructions that were moved together. We handle this
6928 case only to the point of seeking to the last insn and
6929 looking for a REG_EQUAL. Fail if we don't find one. */
6936 tem
= NEXT_INSN (tem
);
6940 tem
= find_reg_note (tem
, REG_EQUAL
, NULL_RTX
);
6942 tem
= XEXP (tem
, 0);
6946 tem
= single_set (m
->insn
);
6948 tem
= SET_SRC (tem
);
6953 /* What we are most interested in is pointer
6954 arithmetic on invariants -- only take
6955 patterns we may be able to do something with. */
6956 if (GET_CODE (tem
) == PLUS
6957 || GET_CODE (tem
) == MULT
6958 || GET_CODE (tem
) == ASHIFT
6959 || GET_CODE (tem
) == CONST_INT
6960 || GET_CODE (tem
) == SYMBOL_REF
)
6962 tem
= simplify_giv_expr (loop
, tem
, ext_val
,
6967 else if (GET_CODE (tem
) == CONST
6968 && GET_CODE (XEXP (tem
, 0)) == PLUS
6969 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == SYMBOL_REF
6970 && GET_CODE (XEXP (XEXP (tem
, 0), 1)) == CONST_INT
)
6972 tem
= simplify_giv_expr (loop
, XEXP (tem
, 0),
6984 /* Fall through to general case. */
6986 /* If invariant, return as USE (unless CONST_INT).
6987 Otherwise, not giv. */
6988 if (GET_CODE (x
) == USE
)
6991 if (loop_invariant_p (loop
, x
) == 1)
6993 if (GET_CODE (x
) == CONST_INT
)
6995 if (GET_CODE (x
) == CONST
6996 && GET_CODE (XEXP (x
, 0)) == PLUS
6997 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
6998 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
7000 return gen_rtx_USE (mode
, x
);
7007 /* This routine folds invariants such that there is only ever one
7008 CONST_INT in the summation. It is only used by simplify_giv_expr. */
7011 sge_plus_constant (x
, c
)
7014 if (GET_CODE (x
) == CONST_INT
)
7015 return GEN_INT (INTVAL (x
) + INTVAL (c
));
7016 else if (GET_CODE (x
) != PLUS
)
7017 return gen_rtx_PLUS (GET_MODE (x
), x
, c
);
7018 else if (GET_CODE (XEXP (x
, 1)) == CONST_INT
)
7020 return gen_rtx_PLUS (GET_MODE (x
), XEXP (x
, 0),
7021 GEN_INT (INTVAL (XEXP (x
, 1)) + INTVAL (c
)));
7023 else if (GET_CODE (XEXP (x
, 0)) == PLUS
7024 || GET_CODE (XEXP (x
, 1)) != PLUS
)
7026 return gen_rtx_PLUS (GET_MODE (x
),
7027 sge_plus_constant (XEXP (x
, 0), c
), XEXP (x
, 1));
7031 return gen_rtx_PLUS (GET_MODE (x
),
7032 sge_plus_constant (XEXP (x
, 1), c
), XEXP (x
, 0));
7037 sge_plus (mode
, x
, y
)
7038 enum machine_mode mode
;
7041 while (GET_CODE (y
) == PLUS
)
7043 rtx a
= XEXP (y
, 0);
7044 if (GET_CODE (a
) == CONST_INT
)
7045 x
= sge_plus_constant (x
, a
);
7047 x
= gen_rtx_PLUS (mode
, x
, a
);
7050 if (GET_CODE (y
) == CONST_INT
)
7051 x
= sge_plus_constant (x
, y
);
7053 x
= gen_rtx_PLUS (mode
, x
, y
);
7057 /* Help detect a giv that is calculated by several consecutive insns;
7061 The caller has already identified the first insn P as having a giv as dest;
7062 we check that all other insns that set the same register follow
7063 immediately after P, that they alter nothing else,
7064 and that the result of the last is still a giv.
7066 The value is 0 if the reg set in P is not really a giv.
7067 Otherwise, the value is the amount gained by eliminating
7068 all the consecutive insns that compute the value.
7070 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
7071 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
7073 The coefficients of the ultimate giv value are stored in
7074 *MULT_VAL and *ADD_VAL. */
7077 consec_sets_giv (loop
, first_benefit
, p
, src_reg
, dest_reg
,
7078 add_val
, mult_val
, ext_val
, last_consec_insn
)
7079 const struct loop
*loop
;
7087 rtx
*last_consec_insn
;
7089 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
7090 struct loop_regs
*regs
= LOOP_REGS (loop
);
7097 /* Indicate that this is a giv so that we can update the value produced in
7098 each insn of the multi-insn sequence.
7100 This induction structure will be used only by the call to
7101 general_induction_var below, so we can allocate it on our stack.
7102 If this is a giv, our caller will replace the induct var entry with
7103 a new induction structure. */
7104 struct induction
*v
;
7106 if (REG_IV_TYPE (ivs
, REGNO (dest_reg
)) != UNKNOWN_INDUCT
)
7109 v
= (struct induction
*) alloca (sizeof (struct induction
));
7110 v
->src_reg
= src_reg
;
7111 v
->mult_val
= *mult_val
;
7112 v
->add_val
= *add_val
;
7113 v
->benefit
= first_benefit
;
7115 v
->derive_adjustment
= 0;
7116 v
->ext_dependent
= NULL_RTX
;
7118 REG_IV_TYPE (ivs
, REGNO (dest_reg
)) = GENERAL_INDUCT
;
7119 REG_IV_INFO (ivs
, REGNO (dest_reg
)) = v
;
7121 count
= regs
->array
[REGNO (dest_reg
)].n_times_set
- 1;
7126 code
= GET_CODE (p
);
7128 /* If libcall, skip to end of call sequence. */
7129 if (code
== INSN
&& (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
7133 && (set
= single_set (p
))
7134 && GET_CODE (SET_DEST (set
)) == REG
7135 && SET_DEST (set
) == dest_reg
7136 && (general_induction_var (loop
, SET_SRC (set
), &src_reg
,
7137 add_val
, mult_val
, ext_val
, 0,
7139 /* Giv created by equivalent expression. */
7140 || ((temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
7141 && general_induction_var (loop
, XEXP (temp
, 0), &src_reg
,
7142 add_val
, mult_val
, ext_val
, 0,
7143 &benefit
, VOIDmode
)))
7144 && src_reg
== v
->src_reg
)
7146 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
7147 benefit
+= libcall_benefit (p
);
7150 v
->mult_val
= *mult_val
;
7151 v
->add_val
= *add_val
;
7152 v
->benefit
+= benefit
;
7154 else if (code
!= NOTE
)
7156 /* Allow insns that set something other than this giv to a
7157 constant. Such insns are needed on machines which cannot
7158 include long constants and should not disqualify a giv. */
7160 && (set
= single_set (p
))
7161 && SET_DEST (set
) != dest_reg
7162 && CONSTANT_P (SET_SRC (set
)))
7165 REG_IV_TYPE (ivs
, REGNO (dest_reg
)) = UNKNOWN_INDUCT
;
7170 REG_IV_TYPE (ivs
, REGNO (dest_reg
)) = UNKNOWN_INDUCT
;
7171 *last_consec_insn
= p
;
7175 /* Return an rtx, if any, that expresses giv G2 as a function of the register
7176 represented by G1. If no such expression can be found, or it is clear that
7177 it cannot possibly be a valid address, 0 is returned.
7179 To perform the computation, we note that
7182 where `v' is the biv.
7184 So G2 = (y/b) * G1 + (b - a*y/x).
7186 Note that MULT = y/x.
7188 Update: A and B are now allowed to be additive expressions such that
7189 B contains all variables in A. That is, computing B-A will not require
7190 subtracting variables. */
7193 express_from_1 (a
, b
, mult
)
7196 /* If MULT is zero, then A*MULT is zero, and our expression is B. */
7198 if (mult
== const0_rtx
)
7201 /* If MULT is not 1, we cannot handle A with non-constants, since we
7202 would then be required to subtract multiples of the registers in A.
7203 This is theoretically possible, and may even apply to some Fortran
7204 constructs, but it is a lot of work and we do not attempt it here. */
7206 if (mult
!= const1_rtx
&& GET_CODE (a
) != CONST_INT
)
7209 /* In general these structures are sorted top to bottom (down the PLUS
7210 chain), but not left to right across the PLUS. If B is a higher
7211 order giv than A, we can strip one level and recurse. If A is higher
7212 order, we'll eventually bail out, but won't know that until the end.
7213 If they are the same, we'll strip one level around this loop. */
7215 while (GET_CODE (a
) == PLUS
&& GET_CODE (b
) == PLUS
)
7217 rtx ra
, rb
, oa
, ob
, tmp
;
7219 ra
= XEXP (a
, 0), oa
= XEXP (a
, 1);
7220 if (GET_CODE (ra
) == PLUS
)
7221 tmp
= ra
, ra
= oa
, oa
= tmp
;
7223 rb
= XEXP (b
, 0), ob
= XEXP (b
, 1);
7224 if (GET_CODE (rb
) == PLUS
)
7225 tmp
= rb
, rb
= ob
, ob
= tmp
;
7227 if (rtx_equal_p (ra
, rb
))
7228 /* We matched: remove one reg completely. */
7230 else if (GET_CODE (ob
) != PLUS
&& rtx_equal_p (ra
, ob
))
7231 /* An alternate match. */
7233 else if (GET_CODE (oa
) != PLUS
&& rtx_equal_p (oa
, rb
))
7234 /* An alternate match. */
7238 /* Indicates an extra register in B. Strip one level from B and
7239 recurse, hoping B was the higher order expression. */
7240 ob
= express_from_1 (a
, ob
, mult
);
7243 return gen_rtx_PLUS (GET_MODE (b
), rb
, ob
);
7247 /* Here we are at the last level of A, go through the cases hoping to
7248 get rid of everything but a constant. */
7250 if (GET_CODE (a
) == PLUS
)
7254 ra
= XEXP (a
, 0), oa
= XEXP (a
, 1);
7255 if (rtx_equal_p (oa
, b
))
7257 else if (!rtx_equal_p (ra
, b
))
7260 if (GET_CODE (oa
) != CONST_INT
)
7263 return GEN_INT (-INTVAL (oa
) * INTVAL (mult
));
7265 else if (GET_CODE (a
) == CONST_INT
)
7267 return plus_constant (b
, -INTVAL (a
) * INTVAL (mult
));
7269 else if (CONSTANT_P (a
))
7271 enum machine_mode mode_a
= GET_MODE (a
);
7272 enum machine_mode mode_b
= GET_MODE (b
);
7273 enum machine_mode mode
= mode_b
== VOIDmode
? mode_a
: mode_b
;
7274 return simplify_gen_binary (MINUS
, mode
, b
, a
);
7276 else if (GET_CODE (b
) == PLUS
)
7278 if (rtx_equal_p (a
, XEXP (b
, 0)))
7280 else if (rtx_equal_p (a
, XEXP (b
, 1)))
7285 else if (rtx_equal_p (a
, b
))
7292 express_from (g1
, g2
)
7293 struct induction
*g1
, *g2
;
7297 /* The value that G1 will be multiplied by must be a constant integer. Also,
7298 the only chance we have of getting a valid address is if b*c/a (see above
7299 for notation) is also an integer. */
7300 if (GET_CODE (g1
->mult_val
) == CONST_INT
7301 && GET_CODE (g2
->mult_val
) == CONST_INT
)
7303 if (g1
->mult_val
== const0_rtx
7304 || INTVAL (g2
->mult_val
) % INTVAL (g1
->mult_val
) != 0)
7306 mult
= GEN_INT (INTVAL (g2
->mult_val
) / INTVAL (g1
->mult_val
));
7308 else if (rtx_equal_p (g1
->mult_val
, g2
->mult_val
))
7312 /* ??? Find out if the one is a multiple of the other? */
7316 add
= express_from_1 (g1
->add_val
, g2
->add_val
, mult
);
7317 if (add
== NULL_RTX
)
7319 /* Failed. If we've got a multiplication factor between G1 and G2,
7320 scale G1's addend and try again. */
7321 if (INTVAL (mult
) > 1)
7323 rtx g1_add_val
= g1
->add_val
;
7324 if (GET_CODE (g1_add_val
) == MULT
7325 && GET_CODE (XEXP (g1_add_val
, 1)) == CONST_INT
)
7328 m
= INTVAL (mult
) * INTVAL (XEXP (g1_add_val
, 1));
7329 g1_add_val
= gen_rtx_MULT (GET_MODE (g1_add_val
),
7330 XEXP (g1_add_val
, 0), GEN_INT (m
));
7334 g1_add_val
= gen_rtx_MULT (GET_MODE (g1_add_val
), g1_add_val
,
7338 add
= express_from_1 (g1_add_val
, g2
->add_val
, const1_rtx
);
7341 if (add
== NULL_RTX
)
7344 /* Form simplified final result. */
7345 if (mult
== const0_rtx
)
7347 else if (mult
== const1_rtx
)
7348 mult
= g1
->dest_reg
;
7350 mult
= gen_rtx_MULT (g2
->mode
, g1
->dest_reg
, mult
);
7352 if (add
== const0_rtx
)
7356 if (GET_CODE (add
) == PLUS
7357 && CONSTANT_P (XEXP (add
, 1)))
7359 rtx tem
= XEXP (add
, 1);
7360 mult
= gen_rtx_PLUS (g2
->mode
, mult
, XEXP (add
, 0));
7364 return gen_rtx_PLUS (g2
->mode
, mult
, add
);
7368 /* Return an rtx, if any, that expresses giv G2 as a function of the register
7369 represented by G1. This indicates that G2 should be combined with G1 and
7370 that G2 can use (either directly or via an address expression) a register
7371 used to represent G1. */
7374 combine_givs_p (g1
, g2
)
7375 struct induction
*g1
, *g2
;
7379 /* With the introduction of ext dependent givs, we must care for modes.
7380 G2 must not use a wider mode than G1. */
7381 if (GET_MODE_SIZE (g1
->mode
) < GET_MODE_SIZE (g2
->mode
))
7384 ret
= comb
= express_from (g1
, g2
);
7385 if (comb
== NULL_RTX
)
7387 if (g1
->mode
!= g2
->mode
)
7388 ret
= gen_lowpart (g2
->mode
, comb
);
7390 /* If these givs are identical, they can be combined. We use the results
7391 of express_from because the addends are not in a canonical form, so
7392 rtx_equal_p is a weaker test. */
7393 /* But don't combine a DEST_REG giv with a DEST_ADDR giv; we want the
7394 combination to be the other way round. */
7395 if (comb
== g1
->dest_reg
7396 && (g1
->giv_type
== DEST_REG
|| g2
->giv_type
== DEST_ADDR
))
7401 /* If G2 can be expressed as a function of G1 and that function is valid
7402 as an address and no more expensive than using a register for G2,
7403 the expression of G2 in terms of G1 can be used. */
7405 && g2
->giv_type
== DEST_ADDR
7406 && memory_address_p (GET_MODE (g2
->mem
), ret
))
7412 /* Check each extension dependent giv in this class to see if its
7413 root biv is safe from wrapping in the interior mode, which would
7414 make the giv illegal. */
7417 check_ext_dependent_givs (bl
, loop_info
)
7418 struct iv_class
*bl
;
7419 struct loop_info
*loop_info
;
7421 int ze_ok
= 0, se_ok
= 0, info_ok
= 0;
7422 enum machine_mode biv_mode
= GET_MODE (bl
->biv
->src_reg
);
7423 HOST_WIDE_INT start_val
;
7424 unsigned HOST_WIDE_INT u_end_val
= 0;
7425 unsigned HOST_WIDE_INT u_start_val
= 0;
7427 struct induction
*v
;
7429 /* Make sure the iteration data is available. We must have
7430 constants in order to be certain of no overflow. */
7431 /* ??? An unknown iteration count with an increment of +-1
7432 combined with friendly exit tests of against an invariant
7433 value is also amenable to optimization. Not implemented. */
7434 if (loop_info
->n_iterations
> 0
7435 && bl
->initial_value
7436 && GET_CODE (bl
->initial_value
) == CONST_INT
7437 && (incr
= biv_total_increment (bl
))
7438 && GET_CODE (incr
) == CONST_INT
7439 /* Make sure the host can represent the arithmetic. */
7440 && HOST_BITS_PER_WIDE_INT
>= GET_MODE_BITSIZE (biv_mode
))
7442 unsigned HOST_WIDE_INT abs_incr
, total_incr
;
7443 HOST_WIDE_INT s_end_val
;
7447 start_val
= INTVAL (bl
->initial_value
);
7448 u_start_val
= start_val
;
7450 neg_incr
= 0, abs_incr
= INTVAL (incr
);
7451 if (INTVAL (incr
) < 0)
7452 neg_incr
= 1, abs_incr
= -abs_incr
;
7453 total_incr
= abs_incr
* loop_info
->n_iterations
;
7455 /* Check for host arithmetic overflow. */
7456 if (total_incr
/ loop_info
->n_iterations
== abs_incr
)
7458 unsigned HOST_WIDE_INT u_max
;
7459 HOST_WIDE_INT s_max
;
7461 u_end_val
= start_val
+ (neg_incr
? -total_incr
: total_incr
);
7462 s_end_val
= u_end_val
;
7463 u_max
= GET_MODE_MASK (biv_mode
);
7466 /* Check zero extension of biv ok. */
7468 /* Check for host arithmetic overflow. */
7470 ? u_end_val
< u_start_val
7471 : u_end_val
> u_start_val
)
7472 /* Check for target arithmetic overflow. */
7474 ? 1 /* taken care of with host overflow */
7475 : u_end_val
<= u_max
))
7480 /* Check sign extension of biv ok. */
7481 /* ??? While it is true that overflow with signed and pointer
7482 arithmetic is undefined, I fear too many programmers don't
7483 keep this fact in mind -- myself included on occasion.
7484 So leave alone with the signed overflow optimizations. */
7485 if (start_val
>= -s_max
- 1
7486 /* Check for host arithmetic overflow. */
7488 ? s_end_val
< start_val
7489 : s_end_val
> start_val
)
7490 /* Check for target arithmetic overflow. */
7492 ? s_end_val
>= -s_max
- 1
7493 : s_end_val
<= s_max
))
7500 /* Invalidate givs that fail the tests. */
7501 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
7502 if (v
->ext_dependent
)
7504 enum rtx_code code
= GET_CODE (v
->ext_dependent
);
7517 /* We don't know whether this value is being used as either
7518 signed or unsigned, so to safely truncate we must satisfy
7519 both. The initial check here verifies the BIV itself;
7520 once that is successful we may check its range wrt the
7524 enum machine_mode outer_mode
= GET_MODE (v
->ext_dependent
);
7525 unsigned HOST_WIDE_INT max
= GET_MODE_MASK (outer_mode
) >> 1;
7527 /* We know from the above that both endpoints are nonnegative,
7528 and that there is no wrapping. Verify that both endpoints
7529 are within the (signed) range of the outer mode. */
7530 if (u_start_val
<= max
&& u_end_val
<= max
)
7541 if (loop_dump_stream
)
7543 fprintf (loop_dump_stream
,
7544 "Verified ext dependent giv at %d of reg %d\n",
7545 INSN_UID (v
->insn
), bl
->regno
);
7550 if (loop_dump_stream
)
7555 why
= "biv iteration values overflowed";
7559 incr
= biv_total_increment (bl
);
7560 if (incr
== const1_rtx
)
7561 why
= "biv iteration info incomplete; incr by 1";
7563 why
= "biv iteration info incomplete";
7566 fprintf (loop_dump_stream
,
7567 "Failed ext dependent giv at %d, %s\n",
7568 INSN_UID (v
->insn
), why
);
7571 bl
->all_reduced
= 0;
7576 /* Generate a version of VALUE in a mode appropriate for initializing V. */
7579 extend_value_for_giv (v
, value
)
7580 struct induction
*v
;
7583 rtx ext_dep
= v
->ext_dependent
;
7588 /* Recall that check_ext_dependent_givs verified that the known bounds
7589 of a biv did not overflow or wrap with respect to the extension for
7590 the giv. Therefore, constants need no additional adjustment. */
7591 if (CONSTANT_P (value
) && GET_MODE (value
) == VOIDmode
)
7594 /* Otherwise, we must adjust the value to compensate for the
7595 differing modes of the biv and the giv. */
7596 return gen_rtx_fmt_e (GET_CODE (ext_dep
), GET_MODE (ext_dep
), value
);
7599 struct combine_givs_stats
7606 cmp_combine_givs_stats (xp
, yp
)
7610 const struct combine_givs_stats
* const x
=
7611 (const struct combine_givs_stats
*) xp
;
7612 const struct combine_givs_stats
* const y
=
7613 (const struct combine_givs_stats
*) yp
;
7615 d
= y
->total_benefit
- x
->total_benefit
;
7616 /* Stabilize the sort. */
7618 d
= x
->giv_number
- y
->giv_number
;
7622 /* Check all pairs of givs for iv_class BL and see if any can be combined with
7623 any other. If so, point SAME to the giv combined with and set NEW_REG to
7624 be an expression (in terms of the other giv's DEST_REG) equivalent to the
7625 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
7628 combine_givs (regs
, bl
)
7629 struct loop_regs
*regs
;
7630 struct iv_class
*bl
;
7632 /* Additional benefit to add for being combined multiple times. */
7633 const int extra_benefit
= 3;
7635 struct induction
*g1
, *g2
, **giv_array
;
7636 int i
, j
, k
, giv_count
;
7637 struct combine_givs_stats
*stats
;
7640 /* Count givs, because bl->giv_count is incorrect here. */
7642 for (g1
= bl
->giv
; g1
; g1
= g1
->next_iv
)
7647 = (struct induction
**) alloca (giv_count
* sizeof (struct induction
*));
7649 for (g1
= bl
->giv
; g1
; g1
= g1
->next_iv
)
7651 giv_array
[i
++] = g1
;
7653 stats
= (struct combine_givs_stats
*) xcalloc (giv_count
, sizeof (*stats
));
7654 can_combine
= (rtx
*) xcalloc (giv_count
, giv_count
* sizeof (rtx
));
7656 for (i
= 0; i
< giv_count
; i
++)
7662 stats
[i
].giv_number
= i
;
7664 /* If a DEST_REG GIV is used only once, do not allow it to combine
7665 with anything, for in doing so we will gain nothing that cannot
7666 be had by simply letting the GIV with which we would have combined
7667 to be reduced on its own. The losage shows up in particular with
7668 DEST_ADDR targets on hosts with reg+reg addressing, though it can
7669 be seen elsewhere as well. */
7670 if (g1
->giv_type
== DEST_REG
7671 && (single_use
= regs
->array
[REGNO (g1
->dest_reg
)].single_usage
)
7672 && single_use
!= const0_rtx
)
7675 this_benefit
= g1
->benefit
;
7676 /* Add an additional weight for zero addends. */
7677 if (g1
->no_const_addval
)
7680 for (j
= 0; j
< giv_count
; j
++)
7686 && (this_combine
= combine_givs_p (g1
, g2
)) != NULL_RTX
)
7688 can_combine
[i
* giv_count
+ j
] = this_combine
;
7689 this_benefit
+= g2
->benefit
+ extra_benefit
;
7692 stats
[i
].total_benefit
= this_benefit
;
7695 /* Iterate, combining until we can't. */
7697 qsort (stats
, giv_count
, sizeof (*stats
), cmp_combine_givs_stats
);
7699 if (loop_dump_stream
)
7701 fprintf (loop_dump_stream
, "Sorted combine statistics:\n");
7702 for (k
= 0; k
< giv_count
; k
++)
7704 g1
= giv_array
[stats
[k
].giv_number
];
7705 if (!g1
->combined_with
&& !g1
->same
)
7706 fprintf (loop_dump_stream
, " {%d, %d}",
7707 INSN_UID (giv_array
[stats
[k
].giv_number
]->insn
),
7708 stats
[k
].total_benefit
);
7710 putc ('\n', loop_dump_stream
);
7713 for (k
= 0; k
< giv_count
; k
++)
7715 int g1_add_benefit
= 0;
7717 i
= stats
[k
].giv_number
;
7720 /* If it has already been combined, skip. */
7721 if (g1
->combined_with
|| g1
->same
)
7724 for (j
= 0; j
< giv_count
; j
++)
7727 if (g1
!= g2
&& can_combine
[i
* giv_count
+ j
]
7728 /* If it has already been combined, skip. */
7729 && ! g2
->same
&& ! g2
->combined_with
)
7733 g2
->new_reg
= can_combine
[i
* giv_count
+ j
];
7735 /* For destination, we now may replace by mem expression instead
7736 of register. This changes the costs considerably, so add the
7738 if (g2
->giv_type
== DEST_ADDR
)
7739 g2
->benefit
= (g2
->benefit
+ reg_address_cost
7740 - address_cost (g2
->new_reg
,
7741 GET_MODE (g2
->mem
)));
7742 g1
->combined_with
++;
7743 g1
->lifetime
+= g2
->lifetime
;
7745 g1_add_benefit
+= g2
->benefit
;
7747 /* ??? The new final_[bg]iv_value code does a much better job
7748 of finding replaceable giv's, and hence this code may no
7749 longer be necessary. */
7750 if (! g2
->replaceable
&& REG_USERVAR_P (g2
->dest_reg
))
7751 g1_add_benefit
-= copy_cost
;
7753 /* To help optimize the next set of combinations, remove
7754 this giv from the benefits of other potential mates. */
7755 for (l
= 0; l
< giv_count
; ++l
)
7757 int m
= stats
[l
].giv_number
;
7758 if (can_combine
[m
* giv_count
+ j
])
7759 stats
[l
].total_benefit
-= g2
->benefit
+ extra_benefit
;
7762 if (loop_dump_stream
)
7763 fprintf (loop_dump_stream
,
7764 "giv at %d combined with giv at %d; new benefit %d + %d, lifetime %d\n",
7765 INSN_UID (g2
->insn
), INSN_UID (g1
->insn
),
7766 g1
->benefit
, g1_add_benefit
, g1
->lifetime
);
7770 /* To help optimize the next set of combinations, remove
7771 this giv from the benefits of other potential mates. */
7772 if (g1
->combined_with
)
7774 for (j
= 0; j
< giv_count
; ++j
)
7776 int m
= stats
[j
].giv_number
;
7777 if (can_combine
[m
* giv_count
+ i
])
7778 stats
[j
].total_benefit
-= g1
->benefit
+ extra_benefit
;
7781 g1
->benefit
+= g1_add_benefit
;
7783 /* We've finished with this giv, and everything it touched.
7784 Restart the combination so that proper weights for the
7785 rest of the givs are properly taken into account. */
7786 /* ??? Ideally we would compact the arrays at this point, so
7787 as to not cover old ground. But sanely compacting
7788 can_combine is tricky. */
7798 /* Generate sequence for REG = B * M + A. */
7801 gen_add_mult (b
, m
, a
, reg
)
7802 rtx b
; /* initial value of basic induction variable */
7803 rtx m
; /* multiplicative constant */
7804 rtx a
; /* additive constant */
7805 rtx reg
; /* destination register */
7811 /* Use unsigned arithmetic. */
7812 result
= expand_mult_add (b
, reg
, m
, a
, GET_MODE (reg
), 1);
7814 emit_move_insn (reg
, result
);
7822 /* Update registers created in insn sequence SEQ. */
7825 loop_regs_update (loop
, seq
)
7826 const struct loop
*loop ATTRIBUTE_UNUSED
;
7831 /* Update register info for alias analysis. */
7833 if (seq
== NULL_RTX
)
7839 while (insn
!= NULL_RTX
)
7841 rtx set
= single_set (insn
);
7843 if (set
&& GET_CODE (SET_DEST (set
)) == REG
)
7844 record_base_value (REGNO (SET_DEST (set
)), SET_SRC (set
), 0);
7846 insn
= NEXT_INSN (insn
);
7849 else if (GET_CODE (seq
) == SET
7850 && GET_CODE (SET_DEST (seq
)) == REG
)
7851 record_base_value (REGNO (SET_DEST (seq
)), SET_SRC (seq
), 0);
7855 /* EMIT code before BEFORE_BB/BEFORE_INSN to set REG = B * M + A. */
7858 loop_iv_add_mult_emit_before (loop
, b
, m
, a
, reg
, before_bb
, before_insn
)
7859 const struct loop
*loop
;
7860 rtx b
; /* initial value of basic induction variable */
7861 rtx m
; /* multiplicative constant */
7862 rtx a
; /* additive constant */
7863 rtx reg
; /* destination register */
7864 basic_block before_bb
;
7871 loop_iv_add_mult_hoist (loop
, b
, m
, a
, reg
);
7875 /* Use copy_rtx to prevent unexpected sharing of these rtx. */
7876 seq
= gen_add_mult (copy_rtx (b
), copy_rtx (m
), copy_rtx (a
), reg
);
7878 /* Increase the lifetime of any invariants moved further in code. */
7879 update_reg_last_use (a
, before_insn
);
7880 update_reg_last_use (b
, before_insn
);
7881 update_reg_last_use (m
, before_insn
);
7883 loop_insn_emit_before (loop
, before_bb
, before_insn
, seq
);
7885 /* It is possible that the expansion created lots of new registers.
7886 Iterate over the sequence we just created and record them all. */
7887 loop_regs_update (loop
, seq
);
7891 /* Emit insns in loop pre-header to set REG = B * M + A. */
7894 loop_iv_add_mult_sink (loop
, b
, m
, a
, reg
)
7895 const struct loop
*loop
;
7896 rtx b
; /* initial value of basic induction variable */
7897 rtx m
; /* multiplicative constant */
7898 rtx a
; /* additive constant */
7899 rtx reg
; /* destination register */
7903 /* Use copy_rtx to prevent unexpected sharing of these rtx. */
7904 seq
= gen_add_mult (copy_rtx (b
), copy_rtx (m
), copy_rtx (a
), reg
);
7906 /* Increase the lifetime of any invariants moved further in code.
7907 ???? Is this really necessary? */
7908 update_reg_last_use (a
, loop
->sink
);
7909 update_reg_last_use (b
, loop
->sink
);
7910 update_reg_last_use (m
, loop
->sink
);
7912 loop_insn_sink (loop
, seq
);
7914 /* It is possible that the expansion created lots of new registers.
7915 Iterate over the sequence we just created and record them all. */
7916 loop_regs_update (loop
, seq
);
7920 /* Emit insns after loop to set REG = B * M + A. */
7923 loop_iv_add_mult_hoist (loop
, b
, m
, a
, reg
)
7924 const struct loop
*loop
;
7925 rtx b
; /* initial value of basic induction variable */
7926 rtx m
; /* multiplicative constant */
7927 rtx a
; /* additive constant */
7928 rtx reg
; /* destination register */
7932 /* Use copy_rtx to prevent unexpected sharing of these rtx. */
7933 seq
= gen_add_mult (copy_rtx (b
), copy_rtx (m
), copy_rtx (a
), reg
);
7935 loop_insn_hoist (loop
, seq
);
7937 /* It is possible that the expansion created lots of new registers.
7938 Iterate over the sequence we just created and record them all. */
7939 loop_regs_update (loop
, seq
);
7944 /* Similar to gen_add_mult, but compute cost rather than generating
7948 iv_add_mult_cost (b
, m
, a
, reg
)
7949 rtx b
; /* initial value of basic induction variable */
7950 rtx m
; /* multiplicative constant */
7951 rtx a
; /* additive constant */
7952 rtx reg
; /* destination register */
7958 result
= expand_mult_add (b
, reg
, m
, a
, GET_MODE (reg
), 1);
7960 emit_move_insn (reg
, result
);
7961 last
= get_last_insn ();
7964 rtx t
= single_set (last
);
7966 cost
+= rtx_cost (SET_SRC (t
), SET
);
7967 last
= PREV_INSN (last
);
7973 /* Test whether A * B can be computed without
7974 an actual multiply insn. Value is 1 if so.
7976 ??? This function stinks because it generates a ton of wasted RTL
7977 ??? and as a result fragments GC memory to no end. There are other
7978 ??? places in the compiler which are invoked a lot and do the same
7979 ??? thing, generate wasted RTL just to see if something is possible. */
7982 product_cheap_p (a
, b
)
7989 /* If only one is constant, make it B. */
7990 if (GET_CODE (a
) == CONST_INT
)
7991 tmp
= a
, a
= b
, b
= tmp
;
7993 /* If first constant, both constant, so don't need multiply. */
7994 if (GET_CODE (a
) == CONST_INT
)
7997 /* If second not constant, neither is constant, so would need multiply. */
7998 if (GET_CODE (b
) != CONST_INT
)
8001 /* One operand is constant, so might not need multiply insn. Generate the
8002 code for the multiply and see if a call or multiply, or long sequence
8003 of insns is generated. */
8006 expand_mult (GET_MODE (a
), a
, b
, NULL_RTX
, 1);
8014 while (tmp
!= NULL_RTX
)
8016 rtx next
= NEXT_INSN (tmp
);
8019 || GET_CODE (tmp
) != INSN
8020 || (GET_CODE (PATTERN (tmp
)) == SET
8021 && GET_CODE (SET_SRC (PATTERN (tmp
))) == MULT
)
8022 || (GET_CODE (PATTERN (tmp
)) == PARALLEL
8023 && GET_CODE (XVECEXP (PATTERN (tmp
), 0, 0)) == SET
8024 && GET_CODE (SET_SRC (XVECEXP (PATTERN (tmp
), 0, 0))) == MULT
))
8033 else if (GET_CODE (tmp
) == SET
8034 && GET_CODE (SET_SRC (tmp
)) == MULT
)
8036 else if (GET_CODE (tmp
) == PARALLEL
8037 && GET_CODE (XVECEXP (tmp
, 0, 0)) == SET
8038 && GET_CODE (SET_SRC (XVECEXP (tmp
, 0, 0))) == MULT
)
8044 /* Check to see if loop can be terminated by a "decrement and branch until
8045 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
8046 Also try reversing an increment loop to a decrement loop
8047 to see if the optimization can be performed.
8048 Value is nonzero if optimization was performed. */
8050 /* This is useful even if the architecture doesn't have such an insn,
8051 because it might change a loops which increments from 0 to n to a loop
8052 which decrements from n to 0. A loop that decrements to zero is usually
8053 faster than one that increments from zero. */
8055 /* ??? This could be rewritten to use some of the loop unrolling procedures,
8056 such as approx_final_value, biv_total_increment, loop_iterations, and
8057 final_[bg]iv_value. */
8060 check_dbra_loop (loop
, insn_count
)
8064 struct loop_info
*loop_info
= LOOP_INFO (loop
);
8065 struct loop_regs
*regs
= LOOP_REGS (loop
);
8066 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
8067 struct iv_class
*bl
;
8074 rtx before_comparison
;
8078 int compare_and_branch
;
8079 rtx loop_start
= loop
->start
;
8080 rtx loop_end
= loop
->end
;
8082 /* If last insn is a conditional branch, and the insn before tests a
8083 register value, try to optimize it. Otherwise, we can't do anything. */
8085 jump
= PREV_INSN (loop_end
);
8086 comparison
= get_condition_for_loop (loop
, jump
);
8087 if (comparison
== 0)
8089 if (!onlyjump_p (jump
))
8092 /* Try to compute whether the compare/branch at the loop end is one or
8093 two instructions. */
8094 get_condition (jump
, &first_compare
);
8095 if (first_compare
== jump
)
8096 compare_and_branch
= 1;
8097 else if (first_compare
== prev_nonnote_insn (jump
))
8098 compare_and_branch
= 2;
8103 /* If more than one condition is present to control the loop, then
8104 do not proceed, as this function does not know how to rewrite
8105 loop tests with more than one condition.
8107 Look backwards from the first insn in the last comparison
8108 sequence and see if we've got another comparison sequence. */
8111 if ((jump1
= prev_nonnote_insn (first_compare
)) != loop
->cont
)
8112 if (GET_CODE (jump1
) == JUMP_INSN
)
8116 /* Check all of the bivs to see if the compare uses one of them.
8117 Skip biv's set more than once because we can't guarantee that
8118 it will be zero on the last iteration. Also skip if the biv is
8119 used between its update and the test insn. */
8121 for (bl
= ivs
->list
; bl
; bl
= bl
->next
)
8123 if (bl
->biv_count
== 1
8124 && ! bl
->biv
->maybe_multiple
8125 && bl
->biv
->dest_reg
== XEXP (comparison
, 0)
8126 && ! reg_used_between_p (regno_reg_rtx
[bl
->regno
], bl
->biv
->insn
,
8134 /* Look for the case where the basic induction variable is always
8135 nonnegative, and equals zero on the last iteration.
8136 In this case, add a reg_note REG_NONNEG, which allows the
8137 m68k DBRA instruction to be used. */
8139 if (((GET_CODE (comparison
) == GT
8140 && GET_CODE (XEXP (comparison
, 1)) == CONST_INT
8141 && INTVAL (XEXP (comparison
, 1)) == -1)
8142 || (GET_CODE (comparison
) == NE
&& XEXP (comparison
, 1) == const0_rtx
))
8143 && GET_CODE (bl
->biv
->add_val
) == CONST_INT
8144 && INTVAL (bl
->biv
->add_val
) < 0)
8146 /* Initial value must be greater than 0,
8147 init_val % -dec_value == 0 to ensure that it equals zero on
8148 the last iteration */
8150 if (GET_CODE (bl
->initial_value
) == CONST_INT
8151 && INTVAL (bl
->initial_value
) > 0
8152 && (INTVAL (bl
->initial_value
)
8153 % (-INTVAL (bl
->biv
->add_val
))) == 0)
8155 /* register always nonnegative, add REG_NOTE to branch */
8156 if (! find_reg_note (jump
, REG_NONNEG
, NULL_RTX
))
8158 = gen_rtx_EXPR_LIST (REG_NONNEG
, bl
->biv
->dest_reg
,
8165 /* If the decrement is 1 and the value was tested as >= 0 before
8166 the loop, then we can safely optimize. */
8167 for (p
= loop_start
; p
; p
= PREV_INSN (p
))
8169 if (GET_CODE (p
) == CODE_LABEL
)
8171 if (GET_CODE (p
) != JUMP_INSN
)
8174 before_comparison
= get_condition_for_loop (loop
, p
);
8175 if (before_comparison
8176 && XEXP (before_comparison
, 0) == bl
->biv
->dest_reg
8177 && GET_CODE (before_comparison
) == LT
8178 && XEXP (before_comparison
, 1) == const0_rtx
8179 && ! reg_set_between_p (bl
->biv
->dest_reg
, p
, loop_start
)
8180 && INTVAL (bl
->biv
->add_val
) == -1)
8182 if (! find_reg_note (jump
, REG_NONNEG
, NULL_RTX
))
8184 = gen_rtx_EXPR_LIST (REG_NONNEG
, bl
->biv
->dest_reg
,
8192 else if (GET_CODE (bl
->biv
->add_val
) == CONST_INT
8193 && INTVAL (bl
->biv
->add_val
) > 0)
8195 /* Try to change inc to dec, so can apply above optimization. */
8197 all registers modified are induction variables or invariant,
8198 all memory references have non-overlapping addresses
8199 (obviously true if only one write)
8200 allow 2 insns for the compare/jump at the end of the loop. */
8201 /* Also, we must avoid any instructions which use both the reversed
8202 biv and another biv. Such instructions will fail if the loop is
8203 reversed. We meet this condition by requiring that either
8204 no_use_except_counting is true, or else that there is only
8206 int num_nonfixed_reads
= 0;
8207 /* 1 if the iteration var is used only to count iterations. */
8208 int no_use_except_counting
= 0;
8209 /* 1 if the loop has no memory store, or it has a single memory store
8210 which is reversible. */
8211 int reversible_mem_store
= 1;
8213 if (bl
->giv_count
== 0
8214 && !loop
->exit_count
8215 && !loop_info
->has_multiple_exit_targets
)
8217 rtx bivreg
= regno_reg_rtx
[bl
->regno
];
8218 struct iv_class
*blt
;
8220 /* If there are no givs for this biv, and the only exit is the
8221 fall through at the end of the loop, then
8222 see if perhaps there are no uses except to count. */
8223 no_use_except_counting
= 1;
8224 for (p
= loop_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
8227 rtx set
= single_set (p
);
8229 if (set
&& GET_CODE (SET_DEST (set
)) == REG
8230 && REGNO (SET_DEST (set
)) == bl
->regno
)
8231 /* An insn that sets the biv is okay. */
8233 else if ((p
== prev_nonnote_insn (prev_nonnote_insn (loop_end
))
8234 || p
== prev_nonnote_insn (loop_end
))
8235 && reg_mentioned_p (bivreg
, PATTERN (p
)))
8237 /* If either of these insns uses the biv and sets a pseudo
8238 that has more than one usage, then the biv has uses
8239 other than counting since it's used to derive a value
8240 that is used more than one time. */
8241 note_stores (PATTERN (p
), note_set_pseudo_multiple_uses
,
8243 if (regs
->multiple_uses
)
8245 no_use_except_counting
= 0;
8249 else if (reg_mentioned_p (bivreg
, PATTERN (p
)))
8251 no_use_except_counting
= 0;
8256 /* A biv has uses besides counting if it is used to set
8258 for (blt
= ivs
->list
; blt
; blt
= blt
->next
)
8260 && reg_mentioned_p (bivreg
, SET_SRC (blt
->init_set
)))
8262 no_use_except_counting
= 0;
8267 if (no_use_except_counting
)
8268 /* No need to worry about MEMs. */
8270 else if (loop_info
->num_mem_sets
<= 1)
8272 for (p
= loop_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
8274 num_nonfixed_reads
+= count_nonfixed_reads (loop
, PATTERN (p
));
8276 /* If the loop has a single store, and the destination address is
8277 invariant, then we can't reverse the loop, because this address
8278 might then have the wrong value at loop exit.
8279 This would work if the source was invariant also, however, in that
8280 case, the insn should have been moved out of the loop. */
8282 if (loop_info
->num_mem_sets
== 1)
8284 struct induction
*v
;
8286 /* If we could prove that each of the memory locations
8287 written to was different, then we could reverse the
8288 store -- but we don't presently have any way of
8290 reversible_mem_store
= 0;
8292 /* If the store depends on a register that is set after the
8293 store, it depends on the initial value, and is thus not
8295 for (v
= bl
->giv
; reversible_mem_store
&& v
; v
= v
->next_iv
)
8297 if (v
->giv_type
== DEST_REG
8298 && reg_mentioned_p (v
->dest_reg
,
8299 PATTERN (loop_info
->first_loop_store_insn
))
8300 && loop_insn_first_p (loop_info
->first_loop_store_insn
,
8302 reversible_mem_store
= 0;
8309 /* This code only acts for innermost loops. Also it simplifies
8310 the memory address check by only reversing loops with
8311 zero or one memory access.
8312 Two memory accesses could involve parts of the same array,
8313 and that can't be reversed.
8314 If the biv is used only for counting, than we don't need to worry
8315 about all these things. */
8317 if ((num_nonfixed_reads
<= 1
8318 && ! loop_info
->has_nonconst_call
8319 && ! loop_info
->has_prefetch
8320 && ! loop_info
->has_volatile
8321 && reversible_mem_store
8322 && (bl
->giv_count
+ bl
->biv_count
+ loop_info
->num_mem_sets
8323 + num_unmoved_movables (loop
) + compare_and_branch
== insn_count
)
8324 && (bl
== ivs
->list
&& bl
->next
== 0))
8325 || (no_use_except_counting
&& ! loop_info
->has_prefetch
))
8329 /* Loop can be reversed. */
8330 if (loop_dump_stream
)
8331 fprintf (loop_dump_stream
, "Can reverse loop\n");
8333 /* Now check other conditions:
8335 The increment must be a constant, as must the initial value,
8336 and the comparison code must be LT.
8338 This test can probably be improved since +/- 1 in the constant
8339 can be obtained by changing LT to LE and vice versa; this is
8343 /* for constants, LE gets turned into LT */
8344 && (GET_CODE (comparison
) == LT
8345 || (GET_CODE (comparison
) == LE
8346 && no_use_except_counting
)))
8348 HOST_WIDE_INT add_val
, add_adjust
, comparison_val
= 0;
8349 rtx initial_value
, comparison_value
;
8351 enum rtx_code cmp_code
;
8352 int comparison_const_width
;
8353 unsigned HOST_WIDE_INT comparison_sign_mask
;
8355 add_val
= INTVAL (bl
->biv
->add_val
);
8356 comparison_value
= XEXP (comparison
, 1);
8357 if (GET_MODE (comparison_value
) == VOIDmode
)
8358 comparison_const_width
8359 = GET_MODE_BITSIZE (GET_MODE (XEXP (comparison
, 0)));
8361 comparison_const_width
8362 = GET_MODE_BITSIZE (GET_MODE (comparison_value
));
8363 if (comparison_const_width
> HOST_BITS_PER_WIDE_INT
)
8364 comparison_const_width
= HOST_BITS_PER_WIDE_INT
;
8365 comparison_sign_mask
8366 = (unsigned HOST_WIDE_INT
) 1 << (comparison_const_width
- 1);
8368 /* If the comparison value is not a loop invariant, then we
8369 can not reverse this loop.
8371 ??? If the insns which initialize the comparison value as
8372 a whole compute an invariant result, then we could move
8373 them out of the loop and proceed with loop reversal. */
8374 if (! loop_invariant_p (loop
, comparison_value
))
8377 if (GET_CODE (comparison_value
) == CONST_INT
)
8378 comparison_val
= INTVAL (comparison_value
);
8379 initial_value
= bl
->initial_value
;
8381 /* Normalize the initial value if it is an integer and
8382 has no other use except as a counter. This will allow
8383 a few more loops to be reversed. */
8384 if (no_use_except_counting
8385 && GET_CODE (comparison_value
) == CONST_INT
8386 && GET_CODE (initial_value
) == CONST_INT
)
8388 comparison_val
= comparison_val
- INTVAL (bl
->initial_value
);
8389 /* The code below requires comparison_val to be a multiple
8390 of add_val in order to do the loop reversal, so
8391 round up comparison_val to a multiple of add_val.
8392 Since comparison_value is constant, we know that the
8393 current comparison code is LT. */
8394 comparison_val
= comparison_val
+ add_val
- 1;
8396 -= (unsigned HOST_WIDE_INT
) comparison_val
% add_val
;
8397 /* We postpone overflow checks for COMPARISON_VAL here;
8398 even if there is an overflow, we might still be able to
8399 reverse the loop, if converting the loop exit test to
8401 initial_value
= const0_rtx
;
8404 /* First check if we can do a vanilla loop reversal. */
8405 if (initial_value
== const0_rtx
8406 /* If we have a decrement_and_branch_on_count,
8407 prefer the NE test, since this will allow that
8408 instruction to be generated. Note that we must
8409 use a vanilla loop reversal if the biv is used to
8410 calculate a giv or has a non-counting use. */
8411 #if ! defined (HAVE_decrement_and_branch_until_zero) \
8412 && defined (HAVE_decrement_and_branch_on_count)
8413 && (! (add_val
== 1 && loop
->vtop
8414 && (bl
->biv_count
== 0
8415 || no_use_except_counting
)))
8417 && GET_CODE (comparison_value
) == CONST_INT
8418 /* Now do postponed overflow checks on COMPARISON_VAL. */
8419 && ! (((comparison_val
- add_val
) ^ INTVAL (comparison_value
))
8420 & comparison_sign_mask
))
8422 /* Register will always be nonnegative, with value
8423 0 on last iteration */
8424 add_adjust
= add_val
;
8428 else if (add_val
== 1 && loop
->vtop
8429 && (bl
->biv_count
== 0
8430 || no_use_except_counting
))
8438 if (GET_CODE (comparison
) == LE
)
8439 add_adjust
-= add_val
;
8441 /* If the initial value is not zero, or if the comparison
8442 value is not an exact multiple of the increment, then we
8443 can not reverse this loop. */
8444 if (initial_value
== const0_rtx
8445 && GET_CODE (comparison_value
) == CONST_INT
)
8447 if (((unsigned HOST_WIDE_INT
) comparison_val
% add_val
) != 0)
8452 if (! no_use_except_counting
|| add_val
!= 1)
8456 final_value
= comparison_value
;
8458 /* Reset these in case we normalized the initial value
8459 and comparison value above. */
8460 if (GET_CODE (comparison_value
) == CONST_INT
8461 && GET_CODE (initial_value
) == CONST_INT
)
8463 comparison_value
= GEN_INT (comparison_val
);
8465 = GEN_INT (comparison_val
+ INTVAL (bl
->initial_value
));
8467 bl
->initial_value
= initial_value
;
8469 /* Save some info needed to produce the new insns. */
8470 reg
= bl
->biv
->dest_reg
;
8471 jump_label
= condjump_label (PREV_INSN (loop_end
));
8472 new_add_val
= GEN_INT (-INTVAL (bl
->biv
->add_val
));
8474 /* Set start_value; if this is not a CONST_INT, we need
8476 Initialize biv to start_value before loop start.
8477 The old initializing insn will be deleted as a
8478 dead store by flow.c. */
8479 if (initial_value
== const0_rtx
8480 && GET_CODE (comparison_value
) == CONST_INT
)
8482 start_value
= GEN_INT (comparison_val
- add_adjust
);
8483 loop_insn_hoist (loop
, gen_move_insn (reg
, start_value
));
8485 else if (GET_CODE (initial_value
) == CONST_INT
)
8487 enum machine_mode mode
= GET_MODE (reg
);
8488 rtx offset
= GEN_INT (-INTVAL (initial_value
) - add_adjust
);
8489 rtx add_insn
= gen_add3_insn (reg
, comparison_value
, offset
);
8495 = gen_rtx_PLUS (mode
, comparison_value
, offset
);
8496 loop_insn_hoist (loop
, add_insn
);
8497 if (GET_CODE (comparison
) == LE
)
8498 final_value
= gen_rtx_PLUS (mode
, comparison_value
,
8501 else if (! add_adjust
)
8503 enum machine_mode mode
= GET_MODE (reg
);
8504 rtx sub_insn
= gen_sub3_insn (reg
, comparison_value
,
8510 = gen_rtx_MINUS (mode
, comparison_value
, initial_value
);
8511 loop_insn_hoist (loop
, sub_insn
);
8514 /* We could handle the other cases too, but it'll be
8515 better to have a testcase first. */
8518 /* We may not have a single insn which can increment a reg, so
8519 create a sequence to hold all the insns from expand_inc. */
8521 expand_inc (reg
, new_add_val
);
8525 p
= loop_insn_emit_before (loop
, 0, bl
->biv
->insn
, tem
);
8526 delete_insn (bl
->biv
->insn
);
8528 /* Update biv info to reflect its new status. */
8530 bl
->initial_value
= start_value
;
8531 bl
->biv
->add_val
= new_add_val
;
8533 /* Update loop info. */
8534 loop_info
->initial_value
= reg
;
8535 loop_info
->initial_equiv_value
= reg
;
8536 loop_info
->final_value
= const0_rtx
;
8537 loop_info
->final_equiv_value
= const0_rtx
;
8538 loop_info
->comparison_value
= const0_rtx
;
8539 loop_info
->comparison_code
= cmp_code
;
8540 loop_info
->increment
= new_add_val
;
8542 /* Inc LABEL_NUSES so that delete_insn will
8543 not delete the label. */
8544 LABEL_NUSES (XEXP (jump_label
, 0))++;
8546 /* Emit an insn after the end of the loop to set the biv's
8547 proper exit value if it is used anywhere outside the loop. */
8548 if ((REGNO_LAST_UID (bl
->regno
) != INSN_UID (first_compare
))
8550 || REGNO_FIRST_UID (bl
->regno
) != INSN_UID (bl
->init_insn
))
8551 loop_insn_sink (loop
, gen_load_of_final_value (reg
, final_value
));
8553 /* Delete compare/branch at end of loop. */
8554 delete_related_insns (PREV_INSN (loop_end
));
8555 if (compare_and_branch
== 2)
8556 delete_related_insns (first_compare
);
8558 /* Add new compare/branch insn at end of loop. */
8560 emit_cmp_and_jump_insns (reg
, const0_rtx
, cmp_code
, NULL_RTX
,
8562 XEXP (jump_label
, 0));
8565 emit_jump_insn_before (tem
, loop_end
);
8567 for (tem
= PREV_INSN (loop_end
);
8568 tem
&& GET_CODE (tem
) != JUMP_INSN
;
8569 tem
= PREV_INSN (tem
))
8573 JUMP_LABEL (tem
) = XEXP (jump_label
, 0);
8579 /* Increment of LABEL_NUSES done above. */
8580 /* Register is now always nonnegative,
8581 so add REG_NONNEG note to the branch. */
8582 REG_NOTES (tem
) = gen_rtx_EXPR_LIST (REG_NONNEG
, reg
,
8588 /* No insn may reference both the reversed and another biv or it
8589 will fail (see comment near the top of the loop reversal
8591 Earlier on, we have verified that the biv has no use except
8592 counting, or it is the only biv in this function.
8593 However, the code that computes no_use_except_counting does
8594 not verify reg notes. It's possible to have an insn that
8595 references another biv, and has a REG_EQUAL note with an
8596 expression based on the reversed biv. To avoid this case,
8597 remove all REG_EQUAL notes based on the reversed biv
8599 for (p
= loop_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
8603 rtx set
= single_set (p
);
8604 /* If this is a set of a GIV based on the reversed biv, any
8605 REG_EQUAL notes should still be correct. */
8607 || GET_CODE (SET_DEST (set
)) != REG
8608 || (size_t) REGNO (SET_DEST (set
)) >= ivs
->n_regs
8609 || REG_IV_TYPE (ivs
, REGNO (SET_DEST (set
))) != GENERAL_INDUCT
8610 || REG_IV_INFO (ivs
, REGNO (SET_DEST (set
)))->src_reg
!= bl
->biv
->src_reg
)
8611 for (pnote
= ®_NOTES (p
); *pnote
;)
8613 if (REG_NOTE_KIND (*pnote
) == REG_EQUAL
8614 && reg_mentioned_p (regno_reg_rtx
[bl
->regno
],
8616 *pnote
= XEXP (*pnote
, 1);
8618 pnote
= &XEXP (*pnote
, 1);
8622 /* Mark that this biv has been reversed. Each giv which depends
8623 on this biv, and which is also live past the end of the loop
8624 will have to be fixed up. */
8628 if (loop_dump_stream
)
8630 fprintf (loop_dump_stream
, "Reversed loop");
8632 fprintf (loop_dump_stream
, " and added reg_nonneg\n");
8634 fprintf (loop_dump_stream
, "\n");
8645 /* Verify whether the biv BL appears to be eliminable,
8646 based on the insns in the loop that refer to it.
8648 If ELIMINATE_P is nonzero, actually do the elimination.
8650 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
8651 determine whether invariant insns should be placed inside or at the
8652 start of the loop. */
8655 maybe_eliminate_biv (loop
, bl
, eliminate_p
, threshold
, insn_count
)
8656 const struct loop
*loop
;
8657 struct iv_class
*bl
;
8659 int threshold
, insn_count
;
8661 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
8662 rtx reg
= bl
->biv
->dest_reg
;
8665 /* Scan all insns in the loop, stopping if we find one that uses the
8666 biv in a way that we cannot eliminate. */
8668 for (p
= loop
->start
; p
!= loop
->end
; p
= NEXT_INSN (p
))
8670 enum rtx_code code
= GET_CODE (p
);
8671 basic_block where_bb
= 0;
8672 rtx where_insn
= threshold
>= insn_count
? 0 : p
;
8675 /* If this is a libcall that sets a giv, skip ahead to its end. */
8676 if (GET_RTX_CLASS (code
) == 'i')
8678 note
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
);
8682 rtx last
= XEXP (note
, 0);
8683 rtx set
= single_set (last
);
8685 if (set
&& GET_CODE (SET_DEST (set
)) == REG
)
8687 unsigned int regno
= REGNO (SET_DEST (set
));
8689 if (regno
< ivs
->n_regs
8690 && REG_IV_TYPE (ivs
, regno
) == GENERAL_INDUCT
8691 && REG_IV_INFO (ivs
, regno
)->src_reg
== bl
->biv
->src_reg
)
8697 /* Closely examine the insn if the biv is mentioned. */
8698 if ((code
== INSN
|| code
== JUMP_INSN
|| code
== CALL_INSN
)
8699 && reg_mentioned_p (reg
, PATTERN (p
))
8700 && ! maybe_eliminate_biv_1 (loop
, PATTERN (p
), p
, bl
,
8701 eliminate_p
, where_bb
, where_insn
))
8703 if (loop_dump_stream
)
8704 fprintf (loop_dump_stream
,
8705 "Cannot eliminate biv %d: biv used in insn %d.\n",
8706 bl
->regno
, INSN_UID (p
));
8710 /* If we are eliminating, kill REG_EQUAL notes mentioning the biv. */
8712 && (note
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
)) != NULL_RTX
8713 && reg_mentioned_p (reg
, XEXP (note
, 0)))
8714 remove_note (p
, note
);
8719 if (loop_dump_stream
)
8720 fprintf (loop_dump_stream
, "biv %d %s eliminated.\n",
8721 bl
->regno
, eliminate_p
? "was" : "can be");
8728 /* INSN and REFERENCE are instructions in the same insn chain.
8729 Return nonzero if INSN is first. */
8732 loop_insn_first_p (insn
, reference
)
8733 rtx insn
, reference
;
8737 for (p
= insn
, q
= reference
;;)
8739 /* Start with test for not first so that INSN == REFERENCE yields not
8741 if (q
== insn
|| ! p
)
8743 if (p
== reference
|| ! q
)
8746 /* Either of P or Q might be a NOTE. Notes have the same LUID as the
8747 previous insn, hence the <= comparison below does not work if
8749 if (INSN_UID (p
) < max_uid_for_loop
8750 && INSN_UID (q
) < max_uid_for_loop
8751 && GET_CODE (p
) != NOTE
)
8752 return INSN_LUID (p
) <= INSN_LUID (q
);
8754 if (INSN_UID (p
) >= max_uid_for_loop
8755 || GET_CODE (p
) == NOTE
)
8757 if (INSN_UID (q
) >= max_uid_for_loop
)
8762 /* We are trying to eliminate BIV in INSN using GIV. Return nonzero if
8763 the offset that we have to take into account due to auto-increment /
8764 div derivation is zero. */
8766 biv_elimination_giv_has_0_offset (biv
, giv
, insn
)
8767 struct induction
*biv
, *giv
;
8770 /* If the giv V had the auto-inc address optimization applied
8771 to it, and INSN occurs between the giv insn and the biv
8772 insn, then we'd have to adjust the value used here.
8773 This is rare, so we don't bother to make this possible. */
8774 if (giv
->auto_inc_opt
8775 && ((loop_insn_first_p (giv
->insn
, insn
)
8776 && loop_insn_first_p (insn
, biv
->insn
))
8777 || (loop_insn_first_p (biv
->insn
, insn
)
8778 && loop_insn_first_p (insn
, giv
->insn
))))
8784 /* If BL appears in X (part of the pattern of INSN), see if we can
8785 eliminate its use. If so, return 1. If not, return 0.
8787 If BIV does not appear in X, return 1.
8789 If ELIMINATE_P is nonzero, actually do the elimination.
8790 WHERE_INSN/WHERE_BB indicate where extra insns should be added.
8791 Depending on how many items have been moved out of the loop, it
8792 will either be before INSN (when WHERE_INSN is nonzero) or at the
8793 start of the loop (when WHERE_INSN is zero). */
8796 maybe_eliminate_biv_1 (loop
, x
, insn
, bl
, eliminate_p
, where_bb
, where_insn
)
8797 const struct loop
*loop
;
8799 struct iv_class
*bl
;
8801 basic_block where_bb
;
8804 enum rtx_code code
= GET_CODE (x
);
8805 rtx reg
= bl
->biv
->dest_reg
;
8806 enum machine_mode mode
= GET_MODE (reg
);
8807 struct induction
*v
;
8819 /* If we haven't already been able to do something with this BIV,
8820 we can't eliminate it. */
8826 /* If this sets the BIV, it is not a problem. */
8827 if (SET_DEST (x
) == reg
)
8830 /* If this is an insn that defines a giv, it is also ok because
8831 it will go away when the giv is reduced. */
8832 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
8833 if (v
->giv_type
== DEST_REG
&& SET_DEST (x
) == v
->dest_reg
)
8837 if (SET_DEST (x
) == cc0_rtx
&& SET_SRC (x
) == reg
)
8839 /* Can replace with any giv that was reduced and
8840 that has (MULT_VAL != 0) and (ADD_VAL == 0).
8841 Require a constant for MULT_VAL, so we know it's nonzero.
8842 ??? We disable this optimization to avoid potential
8845 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
8846 if (GET_CODE (v
->mult_val
) == CONST_INT
&& v
->mult_val
!= const0_rtx
8847 && v
->add_val
== const0_rtx
8848 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
8852 if (! biv_elimination_giv_has_0_offset (bl
->biv
, v
, insn
))
8858 /* If the giv has the opposite direction of change,
8859 then reverse the comparison. */
8860 if (INTVAL (v
->mult_val
) < 0)
8861 new = gen_rtx_COMPARE (GET_MODE (v
->new_reg
),
8862 const0_rtx
, v
->new_reg
);
8866 /* We can probably test that giv's reduced reg. */
8867 if (validate_change (insn
, &SET_SRC (x
), new, 0))
8871 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
8872 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
8873 Require a constant for MULT_VAL, so we know it's nonzero.
8874 ??? Do this only if ADD_VAL is a pointer to avoid a potential
8875 overflow problem. */
8877 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
8878 if (GET_CODE (v
->mult_val
) == CONST_INT
8879 && v
->mult_val
!= const0_rtx
8880 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
8882 && (GET_CODE (v
->add_val
) == SYMBOL_REF
8883 || GET_CODE (v
->add_val
) == LABEL_REF
8884 || GET_CODE (v
->add_val
) == CONST
8885 || (GET_CODE (v
->add_val
) == REG
8886 && REG_POINTER (v
->add_val
))))
8888 if (! biv_elimination_giv_has_0_offset (bl
->biv
, v
, insn
))
8894 /* If the giv has the opposite direction of change,
8895 then reverse the comparison. */
8896 if (INTVAL (v
->mult_val
) < 0)
8897 new = gen_rtx_COMPARE (VOIDmode
, copy_rtx (v
->add_val
),
8900 new = gen_rtx_COMPARE (VOIDmode
, v
->new_reg
,
8901 copy_rtx (v
->add_val
));
8903 /* Replace biv with the giv's reduced register. */
8904 update_reg_last_use (v
->add_val
, insn
);
8905 if (validate_change (insn
, &SET_SRC (PATTERN (insn
)), new, 0))
8908 /* Insn doesn't support that constant or invariant. Copy it
8909 into a register (it will be a loop invariant.) */
8910 tem
= gen_reg_rtx (GET_MODE (v
->new_reg
));
8912 loop_insn_emit_before (loop
, 0, where_insn
,
8914 copy_rtx (v
->add_val
)));
8916 /* Substitute the new register for its invariant value in
8917 the compare expression. */
8918 XEXP (new, (INTVAL (v
->mult_val
) < 0) ? 0 : 1) = tem
;
8919 if (validate_change (insn
, &SET_SRC (PATTERN (insn
)), new, 0))
8928 case GT
: case GE
: case GTU
: case GEU
:
8929 case LT
: case LE
: case LTU
: case LEU
:
8930 /* See if either argument is the biv. */
8931 if (XEXP (x
, 0) == reg
)
8932 arg
= XEXP (x
, 1), arg_operand
= 1;
8933 else if (XEXP (x
, 1) == reg
)
8934 arg
= XEXP (x
, 0), arg_operand
= 0;
8938 if (CONSTANT_P (arg
))
8940 /* First try to replace with any giv that has constant positive
8941 mult_val and constant add_val. We might be able to support
8942 negative mult_val, but it seems complex to do it in general. */
8944 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
8945 if (GET_CODE (v
->mult_val
) == CONST_INT
8946 && INTVAL (v
->mult_val
) > 0
8947 && (GET_CODE (v
->add_val
) == SYMBOL_REF
8948 || GET_CODE (v
->add_val
) == LABEL_REF
8949 || GET_CODE (v
->add_val
) == CONST
8950 || (GET_CODE (v
->add_val
) == REG
8951 && REG_POINTER (v
->add_val
)))
8952 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
8955 if (! biv_elimination_giv_has_0_offset (bl
->biv
, v
, insn
))
8958 /* Don't eliminate if the linear combination that makes up
8959 the giv overflows when it is applied to ARG. */
8960 if (GET_CODE (arg
) == CONST_INT
)
8964 if (GET_CODE (v
->add_val
) == CONST_INT
)
8965 add_val
= v
->add_val
;
8967 add_val
= const0_rtx
;
8969 if (const_mult_add_overflow_p (arg
, v
->mult_val
,
8977 /* Replace biv with the giv's reduced reg. */
8978 validate_change (insn
, &XEXP (x
, 1 - arg_operand
), v
->new_reg
, 1);
8980 /* If all constants are actually constant integers and
8981 the derived constant can be directly placed in the COMPARE,
8983 if (GET_CODE (arg
) == CONST_INT
8984 && GET_CODE (v
->add_val
) == CONST_INT
)
8986 tem
= expand_mult_add (arg
, NULL_RTX
, v
->mult_val
,
8987 v
->add_val
, mode
, 1);
8991 /* Otherwise, load it into a register. */
8992 tem
= gen_reg_rtx (mode
);
8993 loop_iv_add_mult_emit_before (loop
, arg
,
8994 v
->mult_val
, v
->add_val
,
8995 tem
, where_bb
, where_insn
);
8998 validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 1);
9000 if (apply_change_group ())
9004 /* Look for giv with positive constant mult_val and nonconst add_val.
9005 Insert insns to calculate new compare value.
9006 ??? Turn this off due to possible overflow. */
9008 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
9009 if (GET_CODE (v
->mult_val
) == CONST_INT
9010 && INTVAL (v
->mult_val
) > 0
9011 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
9017 if (! biv_elimination_giv_has_0_offset (bl
->biv
, v
, insn
))
9023 tem
= gen_reg_rtx (mode
);
9025 /* Replace biv with giv's reduced register. */
9026 validate_change (insn
, &XEXP (x
, 1 - arg_operand
),
9029 /* Compute value to compare against. */
9030 loop_iv_add_mult_emit_before (loop
, arg
,
9031 v
->mult_val
, v
->add_val
,
9032 tem
, where_bb
, where_insn
);
9033 /* Use it in this insn. */
9034 validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 1);
9035 if (apply_change_group ())
9039 else if (GET_CODE (arg
) == REG
|| GET_CODE (arg
) == MEM
)
9041 if (loop_invariant_p (loop
, arg
) == 1)
9043 /* Look for giv with constant positive mult_val and nonconst
9044 add_val. Insert insns to compute new compare value.
9045 ??? Turn this off due to possible overflow. */
9047 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
9048 if (GET_CODE (v
->mult_val
) == CONST_INT
&& INTVAL (v
->mult_val
) > 0
9049 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
9055 if (! biv_elimination_giv_has_0_offset (bl
->biv
, v
, insn
))
9061 tem
= gen_reg_rtx (mode
);
9063 /* Replace biv with giv's reduced register. */
9064 validate_change (insn
, &XEXP (x
, 1 - arg_operand
),
9067 /* Compute value to compare against. */
9068 loop_iv_add_mult_emit_before (loop
, arg
,
9069 v
->mult_val
, v
->add_val
,
9070 tem
, where_bb
, where_insn
);
9071 validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 1);
9072 if (apply_change_group ())
9077 /* This code has problems. Basically, you can't know when
9078 seeing if we will eliminate BL, whether a particular giv
9079 of ARG will be reduced. If it isn't going to be reduced,
9080 we can't eliminate BL. We can try forcing it to be reduced,
9081 but that can generate poor code.
9083 The problem is that the benefit of reducing TV, below should
9084 be increased if BL can actually be eliminated, but this means
9085 we might have to do a topological sort of the order in which
9086 we try to process biv. It doesn't seem worthwhile to do
9087 this sort of thing now. */
9090 /* Otherwise the reg compared with had better be a biv. */
9091 if (GET_CODE (arg
) != REG
9092 || REG_IV_TYPE (ivs
, REGNO (arg
)) != BASIC_INDUCT
)
9095 /* Look for a pair of givs, one for each biv,
9096 with identical coefficients. */
9097 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
9099 struct induction
*tv
;
9101 if (v
->ignore
|| v
->maybe_dead
|| v
->mode
!= mode
)
9104 for (tv
= REG_IV_CLASS (ivs
, REGNO (arg
))->giv
; tv
;
9106 if (! tv
->ignore
&& ! tv
->maybe_dead
9107 && rtx_equal_p (tv
->mult_val
, v
->mult_val
)
9108 && rtx_equal_p (tv
->add_val
, v
->add_val
)
9109 && tv
->mode
== mode
)
9111 if (! biv_elimination_giv_has_0_offset (bl
->biv
, v
, insn
))
9117 /* Replace biv with its giv's reduced reg. */
9118 XEXP (x
, 1 - arg_operand
) = v
->new_reg
;
9119 /* Replace other operand with the other giv's
9121 XEXP (x
, arg_operand
) = tv
->new_reg
;
9128 /* If we get here, the biv can't be eliminated. */
9132 /* If this address is a DEST_ADDR giv, it doesn't matter if the
9133 biv is used in it, since it will be replaced. */
9134 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
9135 if (v
->giv_type
== DEST_ADDR
&& v
->location
== &XEXP (x
, 0))
9143 /* See if any subexpression fails elimination. */
9144 fmt
= GET_RTX_FORMAT (code
);
9145 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
9150 if (! maybe_eliminate_biv_1 (loop
, XEXP (x
, i
), insn
, bl
,
9151 eliminate_p
, where_bb
, where_insn
))
9156 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
9157 if (! maybe_eliminate_biv_1 (loop
, XVECEXP (x
, i
, j
), insn
, bl
,
9158 eliminate_p
, where_bb
, where_insn
))
9167 /* Return nonzero if the last use of REG
9168 is in an insn following INSN in the same basic block. */
9171 last_use_this_basic_block (reg
, insn
)
9177 n
&& GET_CODE (n
) != CODE_LABEL
&& GET_CODE (n
) != JUMP_INSN
;
9180 if (REGNO_LAST_UID (REGNO (reg
)) == INSN_UID (n
))
9186 /* Called via `note_stores' to record the initial value of a biv. Here we
9187 just record the location of the set and process it later. */
9190 record_initial (dest
, set
, data
)
9193 void *data ATTRIBUTE_UNUSED
;
9195 struct loop_ivs
*ivs
= (struct loop_ivs
*) data
;
9196 struct iv_class
*bl
;
9198 if (GET_CODE (dest
) != REG
9199 || REGNO (dest
) >= ivs
->n_regs
9200 || REG_IV_TYPE (ivs
, REGNO (dest
)) != BASIC_INDUCT
)
9203 bl
= REG_IV_CLASS (ivs
, REGNO (dest
));
9205 /* If this is the first set found, record it. */
9206 if (bl
->init_insn
== 0)
9208 bl
->init_insn
= note_insn
;
9213 /* If any of the registers in X are "old" and currently have a last use earlier
9214 than INSN, update them to have a last use of INSN. Their actual last use
9215 will be the previous insn but it will not have a valid uid_luid so we can't
9216 use it. X must be a source expression only. */
9219 update_reg_last_use (x
, insn
)
9223 /* Check for the case where INSN does not have a valid luid. In this case,
9224 there is no need to modify the regno_last_uid, as this can only happen
9225 when code is inserted after the loop_end to set a pseudo's final value,
9226 and hence this insn will never be the last use of x.
9227 ???? This comment is not correct. See for example loop_givs_reduce.
9228 This may insert an insn before another new insn. */
9229 if (GET_CODE (x
) == REG
&& REGNO (x
) < max_reg_before_loop
9230 && INSN_UID (insn
) < max_uid_for_loop
9231 && REGNO_LAST_LUID (REGNO (x
)) < INSN_LUID (insn
))
9233 REGNO_LAST_UID (REGNO (x
)) = INSN_UID (insn
);
9238 const char *fmt
= GET_RTX_FORMAT (GET_CODE (x
));
9239 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
9242 update_reg_last_use (XEXP (x
, i
), insn
);
9243 else if (fmt
[i
] == 'E')
9244 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
9245 update_reg_last_use (XVECEXP (x
, i
, j
), insn
);
9250 /* Given an insn INSN and condition COND, return the condition in a
9251 canonical form to simplify testing by callers. Specifically:
9253 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
9254 (2) Both operands will be machine operands; (cc0) will have been replaced.
9255 (3) If an operand is a constant, it will be the second operand.
9256 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
9257 for GE, GEU, and LEU.
9259 If the condition cannot be understood, or is an inequality floating-point
9260 comparison which needs to be reversed, 0 will be returned.
9262 If REVERSE is nonzero, then reverse the condition prior to canonizing it.
9264 If EARLIEST is nonzero, it is a pointer to a place where the earliest
9265 insn used in locating the condition was found. If a replacement test
9266 of the condition is desired, it should be placed in front of that
9267 insn and we will be sure that the inputs are still valid.
9269 If WANT_REG is nonzero, we wish the condition to be relative to that
9270 register, if possible. Therefore, do not canonicalize the condition
9274 canonicalize_condition (insn
, cond
, reverse
, earliest
, want_reg
)
9286 int reverse_code
= 0;
9287 enum machine_mode mode
;
9289 code
= GET_CODE (cond
);
9290 mode
= GET_MODE (cond
);
9291 op0
= XEXP (cond
, 0);
9292 op1
= XEXP (cond
, 1);
9295 code
= reversed_comparison_code (cond
, insn
);
9296 if (code
== UNKNOWN
)
9302 /* If we are comparing a register with zero, see if the register is set
9303 in the previous insn to a COMPARE or a comparison operation. Perform
9304 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
9307 while (GET_RTX_CLASS (code
) == '<'
9308 && op1
== CONST0_RTX (GET_MODE (op0
))
9311 /* Set nonzero when we find something of interest. */
9315 /* If comparison with cc0, import actual comparison from compare
9319 if ((prev
= prev_nonnote_insn (prev
)) == 0
9320 || GET_CODE (prev
) != INSN
9321 || (set
= single_set (prev
)) == 0
9322 || SET_DEST (set
) != cc0_rtx
)
9325 op0
= SET_SRC (set
);
9326 op1
= CONST0_RTX (GET_MODE (op0
));
9332 /* If this is a COMPARE, pick up the two things being compared. */
9333 if (GET_CODE (op0
) == COMPARE
)
9335 op1
= XEXP (op0
, 1);
9336 op0
= XEXP (op0
, 0);
9339 else if (GET_CODE (op0
) != REG
)
9342 /* Go back to the previous insn. Stop if it is not an INSN. We also
9343 stop if it isn't a single set or if it has a REG_INC note because
9344 we don't want to bother dealing with it. */
9346 if ((prev
= prev_nonnote_insn (prev
)) == 0
9347 || GET_CODE (prev
) != INSN
9348 || FIND_REG_INC_NOTE (prev
, NULL_RTX
))
9351 set
= set_of (op0
, prev
);
9354 && (GET_CODE (set
) != SET
9355 || !rtx_equal_p (SET_DEST (set
), op0
)))
9358 /* If this is setting OP0, get what it sets it to if it looks
9362 enum machine_mode inner_mode
= GET_MODE (SET_DEST (set
));
9363 #ifdef FLOAT_STORE_FLAG_VALUE
9364 REAL_VALUE_TYPE fsfv
;
9367 /* ??? We may not combine comparisons done in a CCmode with
9368 comparisons not done in a CCmode. This is to aid targets
9369 like Alpha that have an IEEE compliant EQ instruction, and
9370 a non-IEEE compliant BEQ instruction. The use of CCmode is
9371 actually artificial, simply to prevent the combination, but
9372 should not affect other platforms.
9374 However, we must allow VOIDmode comparisons to match either
9375 CCmode or non-CCmode comparison, because some ports have
9376 modeless comparisons inside branch patterns.
9378 ??? This mode check should perhaps look more like the mode check
9379 in simplify_comparison in combine. */
9381 if ((GET_CODE (SET_SRC (set
)) == COMPARE
9384 && GET_MODE_CLASS (inner_mode
) == MODE_INT
9385 && (GET_MODE_BITSIZE (inner_mode
)
9386 <= HOST_BITS_PER_WIDE_INT
)
9387 && (STORE_FLAG_VALUE
9388 & ((HOST_WIDE_INT
) 1
9389 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
9390 #ifdef FLOAT_STORE_FLAG_VALUE
9392 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
9393 && (fsfv
= FLOAT_STORE_FLAG_VALUE (inner_mode
),
9394 REAL_VALUE_NEGATIVE (fsfv
)))
9397 && GET_RTX_CLASS (GET_CODE (SET_SRC (set
))) == '<'))
9398 && (((GET_MODE_CLASS (mode
) == MODE_CC
)
9399 == (GET_MODE_CLASS (inner_mode
) == MODE_CC
))
9400 || mode
== VOIDmode
|| inner_mode
== VOIDmode
))
9402 else if (((code
== EQ
9404 && (GET_MODE_BITSIZE (inner_mode
)
9405 <= HOST_BITS_PER_WIDE_INT
)
9406 && GET_MODE_CLASS (inner_mode
) == MODE_INT
9407 && (STORE_FLAG_VALUE
9408 & ((HOST_WIDE_INT
) 1
9409 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
9410 #ifdef FLOAT_STORE_FLAG_VALUE
9412 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
9413 && (fsfv
= FLOAT_STORE_FLAG_VALUE (inner_mode
),
9414 REAL_VALUE_NEGATIVE (fsfv
)))
9417 && GET_RTX_CLASS (GET_CODE (SET_SRC (set
))) == '<'
9418 && (((GET_MODE_CLASS (mode
) == MODE_CC
)
9419 == (GET_MODE_CLASS (inner_mode
) == MODE_CC
))
9420 || mode
== VOIDmode
|| inner_mode
== VOIDmode
))
9430 else if (reg_set_p (op0
, prev
))
9431 /* If this sets OP0, but not directly, we have to give up. */
9436 if (GET_RTX_CLASS (GET_CODE (x
)) == '<')
9437 code
= GET_CODE (x
);
9440 code
= reversed_comparison_code (x
, prev
);
9441 if (code
== UNKNOWN
)
9446 op0
= XEXP (x
, 0), op1
= XEXP (x
, 1);
9452 /* If constant is first, put it last. */
9453 if (CONSTANT_P (op0
))
9454 code
= swap_condition (code
), tem
= op0
, op0
= op1
, op1
= tem
;
9456 /* If OP0 is the result of a comparison, we weren't able to find what
9457 was really being compared, so fail. */
9458 if (GET_MODE_CLASS (GET_MODE (op0
)) == MODE_CC
)
9461 /* Canonicalize any ordered comparison with integers involving equality
9462 if we can do computations in the relevant mode and we do not
9465 if (GET_CODE (op1
) == CONST_INT
9466 && GET_MODE (op0
) != VOIDmode
9467 && GET_MODE_BITSIZE (GET_MODE (op0
)) <= HOST_BITS_PER_WIDE_INT
)
9469 HOST_WIDE_INT const_val
= INTVAL (op1
);
9470 unsigned HOST_WIDE_INT uconst_val
= const_val
;
9471 unsigned HOST_WIDE_INT max_val
9472 = (unsigned HOST_WIDE_INT
) GET_MODE_MASK (GET_MODE (op0
));
9477 if ((unsigned HOST_WIDE_INT
) const_val
!= max_val
>> 1)
9478 code
= LT
, op1
= gen_int_mode (const_val
+ 1, GET_MODE (op0
));
9481 /* When cross-compiling, const_val might be sign-extended from
9482 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
9484 if ((HOST_WIDE_INT
) (const_val
& max_val
)
9485 != (((HOST_WIDE_INT
) 1
9486 << (GET_MODE_BITSIZE (GET_MODE (op0
)) - 1))))
9487 code
= GT
, op1
= gen_int_mode (const_val
- 1, GET_MODE (op0
));
9491 if (uconst_val
< max_val
)
9492 code
= LTU
, op1
= gen_int_mode (uconst_val
+ 1, GET_MODE (op0
));
9496 if (uconst_val
!= 0)
9497 code
= GTU
, op1
= gen_int_mode (uconst_val
- 1, GET_MODE (op0
));
9505 /* Never return CC0; return zero instead. */
9509 return gen_rtx_fmt_ee (code
, VOIDmode
, op0
, op1
);
9512 /* Given a jump insn JUMP, return the condition that will cause it to branch
9513 to its JUMP_LABEL. If the condition cannot be understood, or is an
9514 inequality floating-point comparison which needs to be reversed, 0 will
9517 If EARLIEST is nonzero, it is a pointer to a place where the earliest
9518 insn used in locating the condition was found. If a replacement test
9519 of the condition is desired, it should be placed in front of that
9520 insn and we will be sure that the inputs are still valid. */
9523 get_condition (jump
, earliest
)
9531 /* If this is not a standard conditional jump, we can't parse it. */
9532 if (GET_CODE (jump
) != JUMP_INSN
9533 || ! any_condjump_p (jump
))
9535 set
= pc_set (jump
);
9537 cond
= XEXP (SET_SRC (set
), 0);
9539 /* If this branches to JUMP_LABEL when the condition is false, reverse
9542 = GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
9543 && XEXP (XEXP (SET_SRC (set
), 2), 0) == JUMP_LABEL (jump
);
9545 return canonicalize_condition (jump
, cond
, reverse
, earliest
, NULL_RTX
);
9548 /* Similar to above routine, except that we also put an invariant last
9549 unless both operands are invariants. */
9552 get_condition_for_loop (loop
, x
)
9553 const struct loop
*loop
;
9556 rtx comparison
= get_condition (x
, (rtx
*) 0);
9559 || ! loop_invariant_p (loop
, XEXP (comparison
, 0))
9560 || loop_invariant_p (loop
, XEXP (comparison
, 1)))
9563 return gen_rtx_fmt_ee (swap_condition (GET_CODE (comparison
)), VOIDmode
,
9564 XEXP (comparison
, 1), XEXP (comparison
, 0));
9567 /* Scan the function and determine whether it has indirect (computed) jumps.
9569 This is taken mostly from flow.c; similar code exists elsewhere
9570 in the compiler. It may be useful to put this into rtlanal.c. */
9572 indirect_jump_in_function_p (start
)
9577 for (insn
= start
; insn
; insn
= NEXT_INSN (insn
))
9578 if (computed_jump_p (insn
))
9584 /* Add MEM to the LOOP_MEMS array, if appropriate. See the
9585 documentation for LOOP_MEMS for the definition of `appropriate'.
9586 This function is called from prescan_loop via for_each_rtx. */
9589 insert_loop_mem (mem
, data
)
9591 void *data ATTRIBUTE_UNUSED
;
9593 struct loop_info
*loop_info
= data
;
9600 switch (GET_CODE (m
))
9606 /* We're not interested in MEMs that are only clobbered. */
9610 /* We're not interested in the MEM associated with a
9611 CONST_DOUBLE, so there's no need to traverse into this. */
9615 /* We're not interested in any MEMs that only appear in notes. */
9619 /* This is not a MEM. */
9623 /* See if we've already seen this MEM. */
9624 for (i
= 0; i
< loop_info
->mems_idx
; ++i
)
9625 if (rtx_equal_p (m
, loop_info
->mems
[i
].mem
))
9627 if (GET_MODE (m
) != GET_MODE (loop_info
->mems
[i
].mem
))
9628 /* The modes of the two memory accesses are different. If
9629 this happens, something tricky is going on, and we just
9630 don't optimize accesses to this MEM. */
9631 loop_info
->mems
[i
].optimize
= 0;
9636 /* Resize the array, if necessary. */
9637 if (loop_info
->mems_idx
== loop_info
->mems_allocated
)
9639 if (loop_info
->mems_allocated
!= 0)
9640 loop_info
->mems_allocated
*= 2;
9642 loop_info
->mems_allocated
= 32;
9644 loop_info
->mems
= (loop_mem_info
*)
9645 xrealloc (loop_info
->mems
,
9646 loop_info
->mems_allocated
* sizeof (loop_mem_info
));
9649 /* Actually insert the MEM. */
9650 loop_info
->mems
[loop_info
->mems_idx
].mem
= m
;
9651 /* We can't hoist this MEM out of the loop if it's a BLKmode MEM
9652 because we can't put it in a register. We still store it in the
9653 table, though, so that if we see the same address later, but in a
9654 non-BLK mode, we'll not think we can optimize it at that point. */
9655 loop_info
->mems
[loop_info
->mems_idx
].optimize
= (GET_MODE (m
) != BLKmode
);
9656 loop_info
->mems
[loop_info
->mems_idx
].reg
= NULL_RTX
;
9657 ++loop_info
->mems_idx
;
9663 /* Allocate REGS->ARRAY or reallocate it if it is too small.
9665 Increment REGS->ARRAY[I].SET_IN_LOOP at the index I of each
9666 register that is modified by an insn between FROM and TO. If the
9667 value of an element of REGS->array[I].SET_IN_LOOP becomes 127 or
9668 more, stop incrementing it, to avoid overflow.
9670 Store in REGS->ARRAY[I].SINGLE_USAGE the single insn in which
9671 register I is used, if it is only used once. Otherwise, it is set
9672 to 0 (for no uses) or const0_rtx for more than one use. This
9673 parameter may be zero, in which case this processing is not done.
9675 Set REGS->ARRAY[I].MAY_NOT_OPTIMIZE nonzero if we should not
9676 optimize register I. */
9679 loop_regs_scan (loop
, extra_size
)
9680 const struct loop
*loop
;
9683 struct loop_regs
*regs
= LOOP_REGS (loop
);
9685 /* last_set[n] is nonzero iff reg n has been set in the current
9686 basic block. In that case, it is the insn that last set reg n. */
9691 old_nregs
= regs
->num
;
9692 regs
->num
= max_reg_num ();
9694 /* Grow the regs array if not allocated or too small. */
9695 if (regs
->num
>= regs
->size
)
9697 regs
->size
= regs
->num
+ extra_size
;
9699 regs
->array
= (struct loop_reg
*)
9700 xrealloc (regs
->array
, regs
->size
* sizeof (*regs
->array
));
9702 /* Zero the new elements. */
9703 memset (regs
->array
+ old_nregs
, 0,
9704 (regs
->size
- old_nregs
) * sizeof (*regs
->array
));
9707 /* Clear previously scanned fields but do not clear n_times_set. */
9708 for (i
= 0; i
< old_nregs
; i
++)
9710 regs
->array
[i
].set_in_loop
= 0;
9711 regs
->array
[i
].may_not_optimize
= 0;
9712 regs
->array
[i
].single_usage
= NULL_RTX
;
9715 last_set
= (rtx
*) xcalloc (regs
->num
, sizeof (rtx
));
9717 /* Scan the loop, recording register usage. */
9718 for (insn
= loop
->top
? loop
->top
: loop
->start
; insn
!= loop
->end
;
9719 insn
= NEXT_INSN (insn
))
9723 /* Record registers that have exactly one use. */
9724 find_single_use_in_loop (regs
, insn
, PATTERN (insn
));
9726 /* Include uses in REG_EQUAL notes. */
9727 if (REG_NOTES (insn
))
9728 find_single_use_in_loop (regs
, insn
, REG_NOTES (insn
));
9730 if (GET_CODE (PATTERN (insn
)) == SET
9731 || GET_CODE (PATTERN (insn
)) == CLOBBER
)
9732 count_one_set (regs
, insn
, PATTERN (insn
), last_set
);
9733 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
9736 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
9737 count_one_set (regs
, insn
, XVECEXP (PATTERN (insn
), 0, i
),
9742 if (GET_CODE (insn
) == CODE_LABEL
|| GET_CODE (insn
) == JUMP_INSN
)
9743 memset (last_set
, 0, regs
->num
* sizeof (rtx
));
9745 /* Invalidate all registers used for function argument passing.
9746 We check rtx_varies_p for the same reason as below, to allow
9747 optimizing PIC calculations. */
9748 if (GET_CODE (insn
) == CALL_INSN
)
9751 for (link
= CALL_INSN_FUNCTION_USAGE (insn
);
9753 link
= XEXP (link
, 1))
9757 if (GET_CODE (op
= XEXP (link
, 0)) == USE
9758 && GET_CODE (reg
= XEXP (op
, 0)) == REG
9759 && rtx_varies_p (reg
, 1))
9760 regs
->array
[REGNO (reg
)].may_not_optimize
= 1;
9765 /* Invalidate all hard registers clobbered by calls. With one exception:
9766 a call-clobbered PIC register is still function-invariant for our
9767 purposes, since we can hoist any PIC calculations out of the loop.
9768 Thus the call to rtx_varies_p. */
9769 if (LOOP_INFO (loop
)->has_call
)
9770 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
9771 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, i
)
9772 && rtx_varies_p (regno_reg_rtx
[i
], 1))
9774 regs
->array
[i
].may_not_optimize
= 1;
9775 regs
->array
[i
].set_in_loop
= 1;
9778 #ifdef AVOID_CCMODE_COPIES
9779 /* Don't try to move insns which set CC registers if we should not
9780 create CCmode register copies. */
9781 for (i
= regs
->num
- 1; i
>= FIRST_PSEUDO_REGISTER
; i
--)
9782 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx
[i
])) == MODE_CC
)
9783 regs
->array
[i
].may_not_optimize
= 1;
9786 /* Set regs->array[I].n_times_set for the new registers. */
9787 for (i
= old_nregs
; i
< regs
->num
; i
++)
9788 regs
->array
[i
].n_times_set
= regs
->array
[i
].set_in_loop
;
9793 /* Returns the number of real INSNs in the LOOP. */
9796 count_insns_in_loop (loop
)
9797 const struct loop
*loop
;
9802 for (insn
= loop
->top
? loop
->top
: loop
->start
; insn
!= loop
->end
;
9803 insn
= NEXT_INSN (insn
))
9810 /* Move MEMs into registers for the duration of the loop. */
9814 const struct loop
*loop
;
9816 struct loop_info
*loop_info
= LOOP_INFO (loop
);
9817 struct loop_regs
*regs
= LOOP_REGS (loop
);
9818 int maybe_never
= 0;
9820 rtx p
, prev_ebb_head
;
9821 rtx label
= NULL_RTX
;
9823 /* Nonzero if the next instruction may never be executed. */
9824 int next_maybe_never
= 0;
9825 unsigned int last_max_reg
= max_reg_num ();
9827 if (loop_info
->mems_idx
== 0)
9830 /* We cannot use next_label here because it skips over normal insns. */
9831 end_label
= next_nonnote_insn (loop
->end
);
9832 if (end_label
&& GET_CODE (end_label
) != CODE_LABEL
)
9833 end_label
= NULL_RTX
;
9835 /* Check to see if it's possible that some instructions in the loop are
9836 never executed. Also check if there is a goto out of the loop other
9837 than right after the end of the loop. */
9838 for (p
= next_insn_in_loop (loop
, loop
->scan_start
);
9840 p
= next_insn_in_loop (loop
, p
))
9842 if (GET_CODE (p
) == CODE_LABEL
)
9844 else if (GET_CODE (p
) == JUMP_INSN
9845 /* If we enter the loop in the middle, and scan
9846 around to the beginning, don't set maybe_never
9847 for that. This must be an unconditional jump,
9848 otherwise the code at the top of the loop might
9849 never be executed. Unconditional jumps are
9850 followed a by barrier then loop end. */
9851 && ! (GET_CODE (p
) == JUMP_INSN
9852 && JUMP_LABEL (p
) == loop
->top
9853 && NEXT_INSN (NEXT_INSN (p
)) == loop
->end
9854 && any_uncondjump_p (p
)))
9856 /* If this is a jump outside of the loop but not right
9857 after the end of the loop, we would have to emit new fixup
9858 sequences for each such label. */
9859 if (/* If we can't tell where control might go when this
9860 JUMP_INSN is executed, we must be conservative. */
9862 || (JUMP_LABEL (p
) != end_label
9863 && (INSN_UID (JUMP_LABEL (p
)) >= max_uid_for_loop
9864 || INSN_LUID (JUMP_LABEL (p
)) < INSN_LUID (loop
->start
)
9865 || INSN_LUID (JUMP_LABEL (p
)) > INSN_LUID (loop
->end
))))
9868 if (!any_condjump_p (p
))
9869 /* Something complicated. */
9872 /* If there are any more instructions in the loop, they
9873 might not be reached. */
9874 next_maybe_never
= 1;
9876 else if (next_maybe_never
)
9880 /* Find start of the extended basic block that enters the loop. */
9881 for (p
= loop
->start
;
9882 PREV_INSN (p
) && GET_CODE (p
) != CODE_LABEL
;
9889 /* Build table of mems that get set to constant values before the
9891 for (; p
!= loop
->start
; p
= NEXT_INSN (p
))
9892 cselib_process_insn (p
);
9894 /* Actually move the MEMs. */
9895 for (i
= 0; i
< loop_info
->mems_idx
; ++i
)
9897 regset_head load_copies
;
9898 regset_head store_copies
;
9901 rtx mem
= loop_info
->mems
[i
].mem
;
9904 if (MEM_VOLATILE_P (mem
)
9905 || loop_invariant_p (loop
, XEXP (mem
, 0)) != 1)
9906 /* There's no telling whether or not MEM is modified. */
9907 loop_info
->mems
[i
].optimize
= 0;
9909 /* Go through the MEMs written to in the loop to see if this
9910 one is aliased by one of them. */
9911 mem_list_entry
= loop_info
->store_mems
;
9912 while (mem_list_entry
)
9914 if (rtx_equal_p (mem
, XEXP (mem_list_entry
, 0)))
9916 else if (true_dependence (XEXP (mem_list_entry
, 0), VOIDmode
,
9919 /* MEM is indeed aliased by this store. */
9920 loop_info
->mems
[i
].optimize
= 0;
9923 mem_list_entry
= XEXP (mem_list_entry
, 1);
9926 if (flag_float_store
&& written
9927 && GET_MODE_CLASS (GET_MODE (mem
)) == MODE_FLOAT
)
9928 loop_info
->mems
[i
].optimize
= 0;
9930 /* If this MEM is written to, we must be sure that there
9931 are no reads from another MEM that aliases this one. */
9932 if (loop_info
->mems
[i
].optimize
&& written
)
9936 for (j
= 0; j
< loop_info
->mems_idx
; ++j
)
9940 else if (true_dependence (mem
,
9942 loop_info
->mems
[j
].mem
,
9945 /* It's not safe to hoist loop_info->mems[i] out of
9946 the loop because writes to it might not be
9947 seen by reads from loop_info->mems[j]. */
9948 loop_info
->mems
[i
].optimize
= 0;
9954 if (maybe_never
&& may_trap_p (mem
))
9955 /* We can't access the MEM outside the loop; it might
9956 cause a trap that wouldn't have happened otherwise. */
9957 loop_info
->mems
[i
].optimize
= 0;
9959 if (!loop_info
->mems
[i
].optimize
)
9960 /* We thought we were going to lift this MEM out of the
9961 loop, but later discovered that we could not. */
9964 INIT_REG_SET (&load_copies
);
9965 INIT_REG_SET (&store_copies
);
9967 /* Allocate a pseudo for this MEM. We set REG_USERVAR_P in
9968 order to keep scan_loop from moving stores to this MEM
9969 out of the loop just because this REG is neither a
9970 user-variable nor used in the loop test. */
9971 reg
= gen_reg_rtx (GET_MODE (mem
));
9972 REG_USERVAR_P (reg
) = 1;
9973 loop_info
->mems
[i
].reg
= reg
;
9975 /* Now, replace all references to the MEM with the
9976 corresponding pseudos. */
9978 for (p
= next_insn_in_loop (loop
, loop
->scan_start
);
9980 p
= next_insn_in_loop (loop
, p
))
9986 set
= single_set (p
);
9988 /* See if this copies the mem into a register that isn't
9989 modified afterwards. We'll try to do copy propagation
9990 a little further on. */
9992 /* @@@ This test is _way_ too conservative. */
9994 && GET_CODE (SET_DEST (set
)) == REG
9995 && REGNO (SET_DEST (set
)) >= FIRST_PSEUDO_REGISTER
9996 && REGNO (SET_DEST (set
)) < last_max_reg
9997 && regs
->array
[REGNO (SET_DEST (set
))].n_times_set
== 1
9998 && rtx_equal_p (SET_SRC (set
), mem
))
9999 SET_REGNO_REG_SET (&load_copies
, REGNO (SET_DEST (set
)));
10001 /* See if this copies the mem from a register that isn't
10002 modified afterwards. We'll try to remove the
10003 redundant copy later on by doing a little register
10004 renaming and copy propagation. This will help
10005 to untangle things for the BIV detection code. */
10008 && GET_CODE (SET_SRC (set
)) == REG
10009 && REGNO (SET_SRC (set
)) >= FIRST_PSEUDO_REGISTER
10010 && REGNO (SET_SRC (set
)) < last_max_reg
10011 && regs
->array
[REGNO (SET_SRC (set
))].n_times_set
== 1
10012 && rtx_equal_p (SET_DEST (set
), mem
))
10013 SET_REGNO_REG_SET (&store_copies
, REGNO (SET_SRC (set
)));
10015 /* If this is a call which uses / clobbers this memory
10016 location, we must not change the interface here. */
10017 if (GET_CODE (p
) == CALL_INSN
10018 && reg_mentioned_p (loop_info
->mems
[i
].mem
,
10019 CALL_INSN_FUNCTION_USAGE (p
)))
10021 cancel_changes (0);
10022 loop_info
->mems
[i
].optimize
= 0;
10026 /* Replace the memory reference with the shadow register. */
10027 replace_loop_mems (p
, loop_info
->mems
[i
].mem
,
10028 loop_info
->mems
[i
].reg
);
10031 if (GET_CODE (p
) == CODE_LABEL
10032 || GET_CODE (p
) == JUMP_INSN
)
10036 if (! loop_info
->mems
[i
].optimize
)
10037 ; /* We found we couldn't do the replacement, so do nothing. */
10038 else if (! apply_change_group ())
10039 /* We couldn't replace all occurrences of the MEM. */
10040 loop_info
->mems
[i
].optimize
= 0;
10043 /* Load the memory immediately before LOOP->START, which is
10044 the NOTE_LOOP_BEG. */
10045 cselib_val
*e
= cselib_lookup (mem
, VOIDmode
, 0);
10049 struct elt_loc_list
*const_equiv
= 0;
10053 struct elt_loc_list
*equiv
;
10054 struct elt_loc_list
*best_equiv
= 0;
10055 for (equiv
= e
->locs
; equiv
; equiv
= equiv
->next
)
10057 if (CONSTANT_P (equiv
->loc
))
10058 const_equiv
= equiv
;
10059 else if (GET_CODE (equiv
->loc
) == REG
10060 /* Extending hard register lifetimes causes crash
10061 on SRC targets. Doing so on non-SRC is
10062 probably also not good idea, since we most
10063 probably have pseudoregister equivalence as
10065 && REGNO (equiv
->loc
) >= FIRST_PSEUDO_REGISTER
)
10066 best_equiv
= equiv
;
10068 /* Use the constant equivalence if that is cheap enough. */
10070 best_equiv
= const_equiv
;
10071 else if (const_equiv
10072 && (rtx_cost (const_equiv
->loc
, SET
)
10073 <= rtx_cost (best_equiv
->loc
, SET
)))
10075 best_equiv
= const_equiv
;
10079 /* If best_equiv is nonzero, we know that MEM is set to a
10080 constant or register before the loop. We will use this
10081 knowledge to initialize the shadow register with that
10082 constant or reg rather than by loading from MEM. */
10084 best
= copy_rtx (best_equiv
->loc
);
10087 set
= gen_move_insn (reg
, best
);
10088 set
= loop_insn_hoist (loop
, set
);
10091 for (p
= prev_ebb_head
; p
!= loop
->start
; p
= NEXT_INSN (p
))
10092 if (REGNO_LAST_UID (REGNO (best
)) == INSN_UID (p
))
10094 REGNO_LAST_UID (REGNO (best
)) = INSN_UID (set
);
10100 set_unique_reg_note (set
, REG_EQUAL
, copy_rtx (const_equiv
->loc
));
10104 if (label
== NULL_RTX
)
10106 label
= gen_label_rtx ();
10107 emit_label_after (label
, loop
->end
);
10110 /* Store the memory immediately after END, which is
10111 the NOTE_LOOP_END. */
10112 set
= gen_move_insn (copy_rtx (mem
), reg
);
10113 loop_insn_emit_after (loop
, 0, label
, set
);
10116 if (loop_dump_stream
)
10118 fprintf (loop_dump_stream
, "Hoisted regno %d %s from ",
10119 REGNO (reg
), (written
? "r/w" : "r/o"));
10120 print_rtl (loop_dump_stream
, mem
);
10121 fputc ('\n', loop_dump_stream
);
10124 /* Attempt a bit of copy propagation. This helps untangle the
10125 data flow, and enables {basic,general}_induction_var to find
10127 EXECUTE_IF_SET_IN_REG_SET
10128 (&load_copies
, FIRST_PSEUDO_REGISTER
, j
,
10130 try_copy_prop (loop
, reg
, j
);
10132 CLEAR_REG_SET (&load_copies
);
10134 EXECUTE_IF_SET_IN_REG_SET
10135 (&store_copies
, FIRST_PSEUDO_REGISTER
, j
,
10137 try_swap_copy_prop (loop
, reg
, j
);
10139 CLEAR_REG_SET (&store_copies
);
10143 if (label
!= NULL_RTX
&& end_label
!= NULL_RTX
)
10145 /* Now, we need to replace all references to the previous exit
10146 label with the new one. */
10151 for (p
= loop
->start
; p
!= loop
->end
; p
= NEXT_INSN (p
))
10153 for_each_rtx (&p
, replace_label
, &rr
);
10155 /* If this is a JUMP_INSN, then we also need to fix the JUMP_LABEL
10156 field. This is not handled by for_each_rtx because it doesn't
10157 handle unprinted ('0') fields. We need to update JUMP_LABEL
10158 because the immediately following unroll pass will use it.
10159 replace_label would not work anyways, because that only handles
10161 if (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
) == end_label
)
10162 JUMP_LABEL (p
) = label
;
10169 /* For communication between note_reg_stored and its caller. */
10170 struct note_reg_stored_arg
10176 /* Called via note_stores, record in SET_SEEN whether X, which is written,
10177 is equal to ARG. */
10179 note_reg_stored (x
, setter
, arg
)
10180 rtx x
, setter ATTRIBUTE_UNUSED
;
10183 struct note_reg_stored_arg
*t
= (struct note_reg_stored_arg
*) arg
;
10188 /* Try to replace every occurrence of pseudo REGNO with REPLACEMENT.
10189 There must be exactly one insn that sets this pseudo; it will be
10190 deleted if all replacements succeed and we can prove that the register
10191 is not used after the loop. */
10194 try_copy_prop (loop
, replacement
, regno
)
10195 const struct loop
*loop
;
10197 unsigned int regno
;
10199 /* This is the reg that we are copying from. */
10200 rtx reg_rtx
= regno_reg_rtx
[regno
];
10203 /* These help keep track of whether we replaced all uses of the reg. */
10204 int replaced_last
= 0;
10205 int store_is_first
= 0;
10207 for (insn
= next_insn_in_loop (loop
, loop
->scan_start
);
10209 insn
= next_insn_in_loop (loop
, insn
))
10213 /* Only substitute within one extended basic block from the initializing
10215 if (GET_CODE (insn
) == CODE_LABEL
&& init_insn
)
10218 if (! INSN_P (insn
))
10221 /* Is this the initializing insn? */
10222 set
= single_set (insn
);
10224 && GET_CODE (SET_DEST (set
)) == REG
10225 && REGNO (SET_DEST (set
)) == regno
)
10231 if (REGNO_FIRST_UID (regno
) == INSN_UID (insn
))
10232 store_is_first
= 1;
10235 /* Only substitute after seeing the initializing insn. */
10236 if (init_insn
&& insn
!= init_insn
)
10238 struct note_reg_stored_arg arg
;
10240 replace_loop_regs (insn
, reg_rtx
, replacement
);
10241 if (REGNO_LAST_UID (regno
) == INSN_UID (insn
))
10244 /* Stop replacing when REPLACEMENT is modified. */
10245 arg
.reg
= replacement
;
10247 note_stores (PATTERN (insn
), note_reg_stored
, &arg
);
10250 rtx note
= find_reg_note (insn
, REG_EQUAL
, NULL
);
10252 /* It is possible that we've turned previously valid REG_EQUAL to
10253 invalid, as we change the REGNO to REPLACEMENT and unlike REGNO,
10254 REPLACEMENT is modified, we get different meaning. */
10255 if (note
&& reg_mentioned_p (replacement
, XEXP (note
, 0)))
10256 remove_note (insn
, note
);
10263 if (apply_change_group ())
10265 if (loop_dump_stream
)
10266 fprintf (loop_dump_stream
, " Replaced reg %d", regno
);
10267 if (store_is_first
&& replaced_last
)
10272 /* Assume we're just deleting INIT_INSN. */
10274 /* Look for REG_RETVAL note. If we're deleting the end of
10275 the libcall sequence, the whole sequence can go. */
10276 retval_note
= find_reg_note (init_insn
, REG_RETVAL
, NULL_RTX
);
10277 /* If we found a REG_RETVAL note, find the first instruction
10278 in the sequence. */
10280 first
= XEXP (retval_note
, 0);
10282 /* Delete the instructions. */
10283 loop_delete_insns (first
, init_insn
);
10285 if (loop_dump_stream
)
10286 fprintf (loop_dump_stream
, ".\n");
10290 /* Replace all the instructions from FIRST up to and including LAST
10291 with NOTE_INSN_DELETED notes. */
10294 loop_delete_insns (first
, last
)
10300 if (loop_dump_stream
)
10301 fprintf (loop_dump_stream
, ", deleting init_insn (%d)",
10303 delete_insn (first
);
10305 /* If this was the LAST instructions we're supposed to delete,
10310 first
= NEXT_INSN (first
);
10314 /* Try to replace occurrences of pseudo REGNO with REPLACEMENT within
10315 loop LOOP if the order of the sets of these registers can be
10316 swapped. There must be exactly one insn within the loop that sets
10317 this pseudo followed immediately by a move insn that sets
10318 REPLACEMENT with REGNO. */
10320 try_swap_copy_prop (loop
, replacement
, regno
)
10321 const struct loop
*loop
;
10323 unsigned int regno
;
10326 rtx set
= NULL_RTX
;
10327 unsigned int new_regno
;
10329 new_regno
= REGNO (replacement
);
10331 for (insn
= next_insn_in_loop (loop
, loop
->scan_start
);
10333 insn
= next_insn_in_loop (loop
, insn
))
10335 /* Search for the insn that copies REGNO to NEW_REGNO? */
10337 && (set
= single_set (insn
))
10338 && GET_CODE (SET_DEST (set
)) == REG
10339 && REGNO (SET_DEST (set
)) == new_regno
10340 && GET_CODE (SET_SRC (set
)) == REG
10341 && REGNO (SET_SRC (set
)) == regno
)
10345 if (insn
!= NULL_RTX
)
10350 /* Some DEF-USE info would come in handy here to make this
10351 function more general. For now, just check the previous insn
10352 which is the most likely candidate for setting REGNO. */
10354 prev_insn
= PREV_INSN (insn
);
10357 && (prev_set
= single_set (prev_insn
))
10358 && GET_CODE (SET_DEST (prev_set
)) == REG
10359 && REGNO (SET_DEST (prev_set
)) == regno
)
10362 (set (reg regno) (expr))
10363 (set (reg new_regno) (reg regno))
10365 so try converting this to:
10366 (set (reg new_regno) (expr))
10367 (set (reg regno) (reg new_regno))
10369 The former construct is often generated when a global
10370 variable used for an induction variable is shadowed by a
10371 register (NEW_REGNO). The latter construct improves the
10372 chances of GIV replacement and BIV elimination. */
10374 validate_change (prev_insn
, &SET_DEST (prev_set
),
10376 validate_change (insn
, &SET_DEST (set
),
10378 validate_change (insn
, &SET_SRC (set
),
10381 if (apply_change_group ())
10383 if (loop_dump_stream
)
10384 fprintf (loop_dump_stream
,
10385 " Swapped set of reg %d at %d with reg %d at %d.\n",
10386 regno
, INSN_UID (insn
),
10387 new_regno
, INSN_UID (prev_insn
));
10389 /* Update first use of REGNO. */
10390 if (REGNO_FIRST_UID (regno
) == INSN_UID (prev_insn
))
10391 REGNO_FIRST_UID (regno
) = INSN_UID (insn
);
10393 /* Now perform copy propagation to hopefully
10394 remove all uses of REGNO within the loop. */
10395 try_copy_prop (loop
, replacement
, regno
);
10401 /* Replace MEM with its associated pseudo register. This function is
10402 called from load_mems via for_each_rtx. DATA is actually a pointer
10403 to a structure describing the instruction currently being scanned
10404 and the MEM we are currently replacing. */
10407 replace_loop_mem (mem
, data
)
10411 loop_replace_args
*args
= (loop_replace_args
*) data
;
10417 switch (GET_CODE (m
))
10423 /* We're not interested in the MEM associated with a
10424 CONST_DOUBLE, so there's no need to traverse into one. */
10428 /* This is not a MEM. */
10432 if (!rtx_equal_p (args
->match
, m
))
10433 /* This is not the MEM we are currently replacing. */
10436 /* Actually replace the MEM. */
10437 validate_change (args
->insn
, mem
, args
->replacement
, 1);
10443 replace_loop_mems (insn
, mem
, reg
)
10448 loop_replace_args args
;
10452 args
.replacement
= reg
;
10454 for_each_rtx (&insn
, replace_loop_mem
, &args
);
10457 /* Replace one register with another. Called through for_each_rtx; PX points
10458 to the rtx being scanned. DATA is actually a pointer to
10459 a structure of arguments. */
10462 replace_loop_reg (px
, data
)
10467 loop_replace_args
*args
= (loop_replace_args
*) data
;
10472 if (x
== args
->match
)
10473 validate_change (args
->insn
, px
, args
->replacement
, 1);
10479 replace_loop_regs (insn
, reg
, replacement
)
10484 loop_replace_args args
;
10488 args
.replacement
= replacement
;
10490 for_each_rtx (&insn
, replace_loop_reg
, &args
);
10493 /* Replace occurrences of the old exit label for the loop with the new
10494 one. DATA is an rtx_pair containing the old and new labels,
10498 replace_label (x
, data
)
10503 rtx old_label
= ((rtx_pair
*) data
)->r1
;
10504 rtx new_label
= ((rtx_pair
*) data
)->r2
;
10509 if (GET_CODE (l
) != LABEL_REF
)
10512 if (XEXP (l
, 0) != old_label
)
10515 XEXP (l
, 0) = new_label
;
10516 ++LABEL_NUSES (new_label
);
10517 --LABEL_NUSES (old_label
);
10522 /* Emit insn for PATTERN after WHERE_INSN in basic block WHERE_BB
10523 (ignored in the interim). */
10526 loop_insn_emit_after (loop
, where_bb
, where_insn
, pattern
)
10527 const struct loop
*loop ATTRIBUTE_UNUSED
;
10528 basic_block where_bb ATTRIBUTE_UNUSED
;
10532 return emit_insn_after (pattern
, where_insn
);
10536 /* If WHERE_INSN is nonzero emit insn for PATTERN before WHERE_INSN
10537 in basic block WHERE_BB (ignored in the interim) within the loop
10538 otherwise hoist PATTERN into the loop pre-header. */
10541 loop_insn_emit_before (loop
, where_bb
, where_insn
, pattern
)
10542 const struct loop
*loop
;
10543 basic_block where_bb ATTRIBUTE_UNUSED
;
10548 return loop_insn_hoist (loop
, pattern
);
10549 return emit_insn_before (pattern
, where_insn
);
10553 /* Emit call insn for PATTERN before WHERE_INSN in basic block
10554 WHERE_BB (ignored in the interim) within the loop. */
10557 loop_call_insn_emit_before (loop
, where_bb
, where_insn
, pattern
)
10558 const struct loop
*loop ATTRIBUTE_UNUSED
;
10559 basic_block where_bb ATTRIBUTE_UNUSED
;
10563 return emit_call_insn_before (pattern
, where_insn
);
10567 /* Hoist insn for PATTERN into the loop pre-header. */
10570 loop_insn_hoist (loop
, pattern
)
10571 const struct loop
*loop
;
10574 return loop_insn_emit_before (loop
, 0, loop
->start
, pattern
);
10578 /* Hoist call insn for PATTERN into the loop pre-header. */
10581 loop_call_insn_hoist (loop
, pattern
)
10582 const struct loop
*loop
;
10585 return loop_call_insn_emit_before (loop
, 0, loop
->start
, pattern
);
10589 /* Sink insn for PATTERN after the loop end. */
10592 loop_insn_sink (loop
, pattern
)
10593 const struct loop
*loop
;
10596 return loop_insn_emit_before (loop
, 0, loop
->sink
, pattern
);
10599 /* bl->final_value can be eighter general_operand or PLUS of general_operand
10600 and constant. Emit sequence of instructions to load it into REG. */
10602 gen_load_of_final_value (reg
, final_value
)
10603 rtx reg
, final_value
;
10607 final_value
= force_operand (final_value
, reg
);
10608 if (final_value
!= reg
)
10609 emit_move_insn (reg
, final_value
);
10610 seq
= get_insns ();
10615 /* If the loop has multiple exits, emit insn for PATTERN before the
10616 loop to ensure that it will always be executed no matter how the
10617 loop exits. Otherwise, emit the insn for PATTERN after the loop,
10618 since this is slightly more efficient. */
10621 loop_insn_sink_or_swim (loop
, pattern
)
10622 const struct loop
*loop
;
10625 if (loop
->exit_count
)
10626 return loop_insn_hoist (loop
, pattern
);
10628 return loop_insn_sink (loop
, pattern
);
10632 loop_ivs_dump (loop
, file
, verbose
)
10633 const struct loop
*loop
;
10637 struct iv_class
*bl
;
10640 if (! loop
|| ! file
)
10643 for (bl
= LOOP_IVS (loop
)->list
; bl
; bl
= bl
->next
)
10646 fprintf (file
, "Loop %d: %d IV classes\n", loop
->num
, iv_num
);
10648 for (bl
= LOOP_IVS (loop
)->list
; bl
; bl
= bl
->next
)
10650 loop_iv_class_dump (bl
, file
, verbose
);
10651 fputc ('\n', file
);
10657 loop_iv_class_dump (bl
, file
, verbose
)
10658 const struct iv_class
*bl
;
10660 int verbose ATTRIBUTE_UNUSED
;
10662 struct induction
*v
;
10666 if (! bl
|| ! file
)
10669 fprintf (file
, "IV class for reg %d, benefit %d\n",
10670 bl
->regno
, bl
->total_benefit
);
10672 fprintf (file
, " Init insn %d", INSN_UID (bl
->init_insn
));
10673 if (bl
->initial_value
)
10675 fprintf (file
, ", init val: ");
10676 print_simple_rtl (file
, bl
->initial_value
);
10678 if (bl
->initial_test
)
10680 fprintf (file
, ", init test: ");
10681 print_simple_rtl (file
, bl
->initial_test
);
10683 fputc ('\n', file
);
10685 if (bl
->final_value
)
10687 fprintf (file
, " Final val: ");
10688 print_simple_rtl (file
, bl
->final_value
);
10689 fputc ('\n', file
);
10692 if ((incr
= biv_total_increment (bl
)))
10694 fprintf (file
, " Total increment: ");
10695 print_simple_rtl (file
, incr
);
10696 fputc ('\n', file
);
10699 /* List the increments. */
10700 for (i
= 0, v
= bl
->biv
; v
; v
= v
->next_iv
, i
++)
10702 fprintf (file
, " Inc%d: insn %d, incr: ", i
, INSN_UID (v
->insn
));
10703 print_simple_rtl (file
, v
->add_val
);
10704 fputc ('\n', file
);
10707 /* List the givs. */
10708 for (i
= 0, v
= bl
->giv
; v
; v
= v
->next_iv
, i
++)
10710 fprintf (file
, " Giv%d: insn %d, benefit %d, ",
10711 i
, INSN_UID (v
->insn
), v
->benefit
);
10712 if (v
->giv_type
== DEST_ADDR
)
10713 print_simple_rtl (file
, v
->mem
);
10715 print_simple_rtl (file
, single_set (v
->insn
));
10716 fputc ('\n', file
);
10722 loop_biv_dump (v
, file
, verbose
)
10723 const struct induction
*v
;
10732 REGNO (v
->dest_reg
), INSN_UID (v
->insn
));
10733 fprintf (file
, " const ");
10734 print_simple_rtl (file
, v
->add_val
);
10736 if (verbose
&& v
->final_value
)
10738 fputc ('\n', file
);
10739 fprintf (file
, " final ");
10740 print_simple_rtl (file
, v
->final_value
);
10743 fputc ('\n', file
);
10748 loop_giv_dump (v
, file
, verbose
)
10749 const struct induction
*v
;
10756 if (v
->giv_type
== DEST_REG
)
10757 fprintf (file
, "Giv %d: insn %d",
10758 REGNO (v
->dest_reg
), INSN_UID (v
->insn
));
10760 fprintf (file
, "Dest address: insn %d",
10761 INSN_UID (v
->insn
));
10763 fprintf (file
, " src reg %d benefit %d",
10764 REGNO (v
->src_reg
), v
->benefit
);
10765 fprintf (file
, " lifetime %d",
10768 if (v
->replaceable
)
10769 fprintf (file
, " replaceable");
10771 if (v
->no_const_addval
)
10772 fprintf (file
, " ncav");
10774 if (v
->ext_dependent
)
10776 switch (GET_CODE (v
->ext_dependent
))
10779 fprintf (file
, " ext se");
10782 fprintf (file
, " ext ze");
10785 fprintf (file
, " ext tr");
10792 fputc ('\n', file
);
10793 fprintf (file
, " mult ");
10794 print_simple_rtl (file
, v
->mult_val
);
10796 fputc ('\n', file
);
10797 fprintf (file
, " add ");
10798 print_simple_rtl (file
, v
->add_val
);
10800 if (verbose
&& v
->final_value
)
10802 fputc ('\n', file
);
10803 fprintf (file
, " final ");
10804 print_simple_rtl (file
, v
->final_value
);
10807 fputc ('\n', file
);
10813 const struct loop
*loop
;
10815 loop_ivs_dump (loop
, stderr
, 1);
10820 debug_iv_class (bl
)
10821 const struct iv_class
*bl
;
10823 loop_iv_class_dump (bl
, stderr
, 1);
10829 const struct induction
*v
;
10831 loop_biv_dump (v
, stderr
, 1);
10837 const struct induction
*v
;
10839 loop_giv_dump (v
, stderr
, 1);
10843 #define LOOP_BLOCK_NUM_1(INSN) \
10844 ((INSN) ? (BLOCK_FOR_INSN (INSN) ? BLOCK_NUM (INSN) : - 1) : -1)
10846 /* The notes do not have an assigned block, so look at the next insn. */
10847 #define LOOP_BLOCK_NUM(INSN) \
10848 ((INSN) ? (GET_CODE (INSN) == NOTE \
10849 ? LOOP_BLOCK_NUM_1 (next_nonnote_insn (INSN)) \
10850 : LOOP_BLOCK_NUM_1 (INSN)) \
10853 #define LOOP_INSN_UID(INSN) ((INSN) ? INSN_UID (INSN) : -1)
10856 loop_dump_aux (loop
, file
, verbose
)
10857 const struct loop
*loop
;
10859 int verbose ATTRIBUTE_UNUSED
;
10863 if (! loop
|| ! file
)
10866 /* Print diagnostics to compare our concept of a loop with
10867 what the loop notes say. */
10868 if (! PREV_INSN (loop
->first
->head
)
10869 || GET_CODE (PREV_INSN (loop
->first
->head
)) != NOTE
10870 || NOTE_LINE_NUMBER (PREV_INSN (loop
->first
->head
))
10871 != NOTE_INSN_LOOP_BEG
)
10872 fprintf (file
, ";; No NOTE_INSN_LOOP_BEG at %d\n",
10873 INSN_UID (PREV_INSN (loop
->first
->head
)));
10874 if (! NEXT_INSN (loop
->last
->end
)
10875 || GET_CODE (NEXT_INSN (loop
->last
->end
)) != NOTE
10876 || NOTE_LINE_NUMBER (NEXT_INSN (loop
->last
->end
))
10877 != NOTE_INSN_LOOP_END
)
10878 fprintf (file
, ";; No NOTE_INSN_LOOP_END at %d\n",
10879 INSN_UID (NEXT_INSN (loop
->last
->end
)));
10884 ";; start %d (%d), cont dom %d (%d), cont %d (%d), vtop %d (%d), end %d (%d)\n",
10885 LOOP_BLOCK_NUM (loop
->start
),
10886 LOOP_INSN_UID (loop
->start
),
10887 LOOP_BLOCK_NUM (loop
->cont
),
10888 LOOP_INSN_UID (loop
->cont
),
10889 LOOP_BLOCK_NUM (loop
->cont
),
10890 LOOP_INSN_UID (loop
->cont
),
10891 LOOP_BLOCK_NUM (loop
->vtop
),
10892 LOOP_INSN_UID (loop
->vtop
),
10893 LOOP_BLOCK_NUM (loop
->end
),
10894 LOOP_INSN_UID (loop
->end
));
10895 fprintf (file
, ";; top %d (%d), scan start %d (%d)\n",
10896 LOOP_BLOCK_NUM (loop
->top
),
10897 LOOP_INSN_UID (loop
->top
),
10898 LOOP_BLOCK_NUM (loop
->scan_start
),
10899 LOOP_INSN_UID (loop
->scan_start
));
10900 fprintf (file
, ";; exit_count %d", loop
->exit_count
);
10901 if (loop
->exit_count
)
10903 fputs (", labels:", file
);
10904 for (label
= loop
->exit_labels
; label
; label
= LABEL_NEXTREF (label
))
10906 fprintf (file
, " %d ",
10907 LOOP_INSN_UID (XEXP (label
, 0)));
10910 fputs ("\n", file
);
10912 /* This can happen when a marked loop appears as two nested loops,
10913 say from while (a || b) {}. The inner loop won't match
10914 the loop markers but the outer one will. */
10915 if (LOOP_BLOCK_NUM (loop
->cont
) != loop
->latch
->index
)
10916 fprintf (file
, ";; NOTE_INSN_LOOP_CONT not in loop latch\n");
10920 /* Call this function from the debugger to dump LOOP. */
10924 const struct loop
*loop
;
10926 flow_loop_dump (loop
, stderr
, loop_dump_aux
, 1);
10929 /* Call this function from the debugger to dump LOOPS. */
10932 debug_loops (loops
)
10933 const struct loops
*loops
;
10935 flow_loops_dump (loops
, stderr
, loop_dump_aux
, 1);