1 2023-12-10 Fei Gao <gaofei@eswincomputing.com>
2 Xiao Zeng <zengxiao@eswincomputing.com>
4 * ifcvt.cc (noce_cond_zero_binary_op_supported): Add support for shift
7 2023-12-10 Richard Sandiford <richard.sandiford@arm.com>
11 * config/aarch64/aarch64-protos.h (aarch64_sve_reinterpret): Declare.
12 * config/aarch64/aarch64.cc (aarch64_sve_reinterpret): New function.
13 * config/aarch64/aarch64-sve-builtins-sme.cc (svread_za_impl::expand)
14 (svwrite_za_impl::expand): Use it to cast the SVE register to the
17 2023-12-10 Richard Sandiford <richard.sandiford@arm.com>
20 * config/aarch64/aarch64.cc (aarch64_sme_mode_switch_regs::add_reg):
21 Force specific SVE modes for single registers as well as structures.
23 2023-12-10 Jason Merrill <jason@redhat.com>
25 * doc/invoke.texi (-fpermissive): Mention ObjC++ for -Wnarrowing.
27 2023-12-10 Jeff Law <jlaw@ventanamicro.com>
29 * config/h8300/addsub.md (uaddv<mode>4, usubv<mode>4): New expanders.
30 (uaddv): New define_insn_and_split plus post-reload pattern.
32 2023-12-10 Jeff Law <jlaw@ventanamicro.com>
34 * config/h8300/h8300-protos.h (use_extvsi): Prototype.
35 * config/h8300/combiner.md: Two new define_insn_and_split patterns
36 to implement signed bitfield extractions.
37 * config/h8300/h8300.cc (use_extvsi): New function.
39 2023-12-10 Jeff Law <jlaw@ventanamicro.com>
41 * config/h8300/combiner.md (single bit signed bitfield extraction): Fix
42 length computation when the bit we want is in the low half word.
44 2023-12-10 Jeff Law <jlaw@ventanamicro.com>
46 * config/h8300/h8300.cc (compute_a_shift_length): Fix computation
47 of logical shifts on the H8/SX.
49 2023-12-09 Jakub Jelinek <jakub@redhat.com>
51 PR tree-optimization/112887
52 * tree-ssa-phiopt.cc (hoist_adjacent_loads): Change type of
53 param_align, param_align_bits, offset1, offset2, size2 and align1
54 variables from int or unsigned int to unsigned HOST_WIDE_INT.
56 2023-12-09 Costas Argyris <costas.argyris@gmail.com>
57 Jakub Jelinek <jakub@redhat.com>
60 * gcc.cc (driver::finalize): Call XDELETEVEC on mdswitches before
63 2023-12-09 Jakub Jelinek <jakub@redhat.com>
65 * attribs.h (any_nonignored_attribute_p): Declare.
66 * attribs.cc (any_nonignored_attribute_p): New function.
68 2023-12-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
71 * config/riscv/vector.md (movmisalign<mode>): Fix VLSmode bugs.
73 2023-12-09 Alexandre Oliva <oliva@adacore.com>
75 * tree-emutls.cc: Include diagnostic-core.h.
76 (pass_ipa_lower_emutls::gate): Skip if errors were seen.
78 2023-12-08 Vladimir N. Makarov <vmakarov@redhat.com>
80 PR rtl-optimization/112875
81 * lra-eliminations.cc (lra_eliminate_regs_1): Change an assert.
82 Add ASM_OPERANDS case.
84 2023-12-08 Robin Dapp <rdapp@ventanamicro.com>
87 * config/riscv/riscv-protos.h (expand_strcmp): Declare.
88 * config/riscv/riscv-string.cc (riscv_expand_strcmp): Add
89 strategy handling and delegation to scalar and vector expanders.
90 (expand_strcmp): Vectorized implementation.
91 * config/riscv/riscv.md: Add TARGET_VECTOR to strcmp and strncmp
94 2023-12-08 Robin Dapp <rdapp@ventanamicro.com>
97 * config/riscv/riscv-protos.h (expand_rawmemchr): Add strlen
99 * config/riscv/riscv-string.cc (riscv_expand_strlen): Call
101 (expand_rawmemchr): Add strlen handling.
102 * config/riscv/riscv.md: Add TARGET_VECTOR to strlen expander.
104 2023-12-08 Richard Sandiford <richard.sandiford@arm.com>
106 * config/aarch64/aarch64-early-ra.cc (allocno_info::chain_next):
107 Put into an enum with...
108 (allocno_info::last_def_point): ...new member variable.
109 (allocno_info::m_current_bb_point): New member variable.
110 (likely_operand_match_p): Switch based on get_constraint_type,
111 rather than based on rtx code. Handle relaxed and special memory
113 (early_ra::record_copy): Allow the source of an equivalence to be
114 assigned to more than once.
115 (early_ra::record_allocno_use): Invalidate any previous equivalence.
116 Initialize last_def_point.
117 (early_ra::record_allocno_def): Set last_def_point.
118 (early_ra::valid_equivalence_p): New function, split out from...
119 (early_ra::record_copy): ...here. Use last_def_point to handle
120 source registers that have a later definition.
121 (make_pass_aarch64_early_ra): Fix comment.
123 2023-12-08 Richard Earnshaw <rearnsha@arm.com>
126 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
128 * config/arm/arm_neon.h
129 (vld1q_u8_x2, vld1q_u16_x2, vld1q_u32_x2, vld1q_u64_x2): New.
130 (vld1q_s8_x2, vld1q_s16_x2, vld1q_s32_x2, vld1q_s64_x2): New.
131 (vld1q_f16_x2, vld1q_f32_x2): New.
132 (vld1q_p8_x2, vld1q_p16_x2, vld1q_p64_x2): New.
133 (vld1q_bf16_x2): New.
134 * config/arm/arm_neon_builtins.def (vld1_x2): New entries.
135 * config/arm/neon.md (vld1_x2<mode>): New.
137 2023-12-08 Richard Earnshaw <rearnsha@arm.com>
140 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
142 * config/arm/arm_neon.h
143 (vld1q_u8_x3, vld1q_u16_x3, vld1q_u32_x3, vld1q_u64_x3): New.
144 (vld1q_s8_x3, vld1q_s16_x3, vld1q_s32_x3, vld1q_s64_x3): New.
145 (vld1q_f16_x3, vld1q_f32_x3): New.
146 (vld1q_p8_x3, vld1q_p16_x3, vld1q_p64_x3): New.
147 (vld1q_bf16_x3): New.
148 * config/arm/arm_neon_builtins.def (vld1_x3): New entries.
149 * config/arm/neon.md (vld1_x3<mode>): New.
151 2023-12-08 Richard Earnshaw <rearnsha@arm.com>
154 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
156 * config/arm/arm_neon.h
157 (vld1q_u8_x4, vld1q_u16_x4, vld1q_u32_x4, vld1q_u64_x4): New.
158 (vld1q_s8_x4, vld1q_s16_x4, vld1q_s32_x4, vld1q_s64_x4): New.
159 (vld1q_f16_x4, vld1q_f32_x4): New.
160 (vld1q_p8_x4, vld1q_p16_x4, vld1q_p64_x4): New.
161 (vld1q_bf16_x4): New.
162 * config/arm/arm_neon_builtins.def (vld1_x4): New entries.
163 * config/arm/neon.md (vld1_x4<mode>): New.
165 2023-12-08 Richard Earnshaw <rearnsha@arm.com>
168 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
170 * config/arm/arm_neon.h
171 (vst1_u8_x2, vst1_u16_x2, vst1_u32_x2, vst1_u64_x2): New.
172 (vst1_s8_x2, vst1_s16_x2, vst1_s32_x2, vst1_s64_x2): New.
173 (vst1_f16_x2, vst1_f32_x2): New.
174 (vst1_p8_x2, vst1_p16_x2, vst1_p64_x2): New.
176 * config/arm/arm_neon_builtins.def (vst1_x2): New entries.
177 * config/arm/neon.md (vst1_x2<mode>): New.
179 2023-12-08 Richard Earnshaw <rearnsha@arm.com>
182 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
184 * config/arm/arm_neon.h
185 (vst1_u8_x3, vst1_u16_x3, vst1_u32_x3, vst1_u64_x3): New.
186 (vst1_s8_x3, vst1_s16_x3, vst1_s32_x3, vst1_s64_x3): New.
187 (vst1_f16_x3, vst1_f32_x3): New.
188 (vst1_p8_x3, vst1_p16_x3, vst1_p64_x3): New.
190 * config/arm/arm_neon_builtins.def (vst1_x3): New entries.
191 * config/arm/neon.md (vst1_x3<mode>): New.
193 2023-12-08 Richard Earnshaw <rearnsha@arm.com>
196 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
198 * config/arm/arm_neon.h
199 (vst1_u8_x4, vst1_u16_x4, vst1_u32_x4, vst1_u64_x4): New.
200 (vst1_s8_x4, vst1_s16_x4, vst1_s32_x4, vst1_s64_x4): New.
201 (vst1_f16_x4, vst1_f32_x4): New.
202 (vst1_p8_x4, vst1_p16_x4, vst1_p64_x4): New.
204 * config/arm/arm_neon_builtins.def (vst1_x4): New entries.
205 * config/arm/neon.md (vst1_x4<mode>): New.
207 2023-12-08 Richard Earnshaw <rearnsha@arm.com>
210 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
212 * config/arm/arm_neon.h
213 (vst1q_u8_x2, vst1q_u16_x2, vst1q_u32_x2, vst1q_u64_x2): New.
214 (vst1q_s8_x2, vst1q_s16_x2, vst1q_s32_x2, vst1q_s64_x2): New.
215 (vst1q_f16_x2, vst1q_f32_x2): New.
216 (vst1q_p8_x2, vst1q_p16_x2, vst1q_p64_x2): New.
217 (vst1q_bf16_x2): New.
218 * config/arm/arm_neon_builtins.def (vst1q_x2): New entries.
220 (neon_vst1<VMEMX2_q>_x2<VDQX:mode>): Updated from
222 * config/arm/iterators.md (VMEMX2): New mode iterator.
223 (VMEMX2_q): New mode attribute.
225 2023-12-08 Richard Earnshaw <rearnsha@arm.com>
228 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
230 * config/arm/arm_neon.h
231 (vst1q_u8_x3, vst1q_u16_x3, vst1q_u32_x3, vst1q_u64_x3): New.
232 (vst1q_s8_x3, vst1q_s16_x3, vst1q_s32_x3, vst1q_s64_x3): New.
233 (vst1q_f16_x3, vst1q_f32_x3): New.
234 (vst1q_p8_x3, vst1q_p16_x3, vst1q_p64_x3): New.
235 (vst1q_bf16_x3): New.
236 * config/arm/arm_neon_builtins.def (vst1q_x3): New entries.
237 * config/arm/neon.md (neon_vst1q_x3<mode>): New.
239 2023-12-08 Richard Earnshaw <rearnsha@arm.com>
242 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
244 * config/arm/arm_neon.h
245 (vst1q_u8_x4, vst1q_u16_x4, vst1q_u32_x4, vst1q_u64_x4): New.
246 (vst1q_s8_x4, vst1q_s16_x4, vst1q_s32_x4, vst1q_s64_x4): New.
247 (vst1q_f16_x4, vst1q_f32_x4): New.
248 (vst1q_p8_x4, vst1q_p16_x4, vst1q_p64_x4): New.
249 (vst1q_bf16_x4): New.
250 * config/arm/arm_neon_builtins.def (vst1q_x4): New entries.
251 * config/arm/neon.md (neon_vst1q_x4<mode>): New.
253 2023-12-08 Richard Earnshaw <rearnsha@arm.com>
256 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
258 * config/arm/arm_neon.h
259 (vld1_u8_x2, vld1_u16_x2, vld1_u32_x2, vld1_u64_x2): New
260 (vld1_s8_x2, vld1_s16_x2, vld1_s32_x2, vld1_s64_x2): New.
261 (vld1_f16_x2, vld1_f32_x2): New.
262 (vld1_p8_x2, vld1_p16_x2, vld1_p64_x2): New.
264 (vld1q_types_x2): Updated to use vld1q_x2 from
265 arm_neon_builtins.def
266 * config/arm/arm_neon_builtins.def
267 (vld1_x2): Updated entries.
268 (vld1q_x2): New entries, but comes from the old vld1_x2
270 (neon_vld1<VMEMX2_q>_x2<VDQX:mode>): Updated
271 from neon_vld1_x2<mode>.
273 2023-12-08 Richard Earnshaw <rearnsha@arm.com>
276 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
278 * config/arm/arm_neon.h
279 (vld1_u8_x3, vld1_u16_x3, vld1_u32_x3, vld1_u64_x3): New
280 (vld1_s8_x3, vld1_s16_x3, vld1_s32_x3, vld1_s64_x3): New.
281 (vld1_f16_x3, vld1_f32_x3): New.
282 (vld1_p8_x3, vld1_p16_x3, vld1_p64_x3): New.
284 (vld1q_types_x3): Updated to use vld1q_x3 from
285 arm_neon_builtins.def
286 * config/arm/arm_neon_builtins.def
287 (vld1_x3): Updated entries.
288 (vld1q_x3): New entries, but comes from the old vld1_x2
289 * config/arm/neon.md (neon_vld1q_x3<mode>): Updated from
292 2023-12-08 Richard Earnshaw <rearnsha@arm.com>
295 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
297 * config/arm/arm_neon.h
298 (vld1_u8_x4, vld1_u16_x4, vld1_u32_x4, vld1_u64_x4): New
299 (vld1_s8_x4, vld1_s16_x4, vld1_s32_x4, vld1_s64_x4): New.
300 (vld1_f16_x4, vld1_f32_x4): New.
301 (vld1_p8_x4, vld1_p16_x4, vld1_p64_x4): New.
303 (vld1q_types_x4): Updated to use vld1q_x4
304 from arm_neon_builtins.def
305 * config/arm/arm_neon_builtins.def
306 (vld1_x4): Updated entries.
307 (vld1q_x4): New entries, but comes from the old vld1_x2
308 * config/arm/neon.md (neon_vld1q_x4<mode>):
309 Updated from neon_vld1_x4<mode>.
311 2023-12-08 Tobias Burnus <tobias@codesourcery.com>
313 * builtin-types.def (BT_FN_PTR_PTR_SIZE_PTRMODE_PTRMODE): New.
314 * omp-builtins.def (BUILT_IN_GOMP_REALLOC): New.
315 * builtins.cc (builtin_fnspec): Handle it.
316 * gimple-ssa-warn-access.cc (fndecl_alloc_p,
317 matching_alloc_calls_p): Likewise.
318 * gimple.cc (nonfreeing_call_p): Likewise.
319 * predict.cc (expr_expected_value_1): Likewise.
320 * tree-ssa-ccp.cc (evaluate_stmt): Likewise.
321 * tree.cc (fndecl_dealloc_argno): Likewise.
323 2023-12-08 Richard Biener <rguenther@suse.de>
325 PR tree-optimization/112909
326 * tree-ssa-uninit.cc (find_uninit_use): Look through a
327 single level of SSA name copies with single use.
329 2023-12-08 Jiahao Xu <xujiahao@loongson.cn>
331 * config/loongarch/loongarch.cc (loongarch_try_expand_lsx_vshuf_const): Use
332 simplify_gen_subreg instead of gen_rtx_SUBREG.
333 (loongarch_expand_vec_perm_const_2): Ditto.
334 (loongarch_expand_vec_cond_expr): Ditto.
336 2023-12-08 Jiahao Xu <xujiahao@loongson.cn>
338 * config/loongarch/loongarch.cc (loongarch_vector_costs::determine_suggested_unroll_factor):
339 If m_has_recip is true, uf return 1.
340 (loongarch_vector_costs::add_stmt_cost): Detect the use of approximate instruction sequence.
342 2023-12-08 Jiahao Xu <xujiahao@loongson.cn>
344 * config/loongarch/genopts/loongarch.opt.in (recip_mask): New variable.
345 (-mrecip, -mrecip): New options.
346 * config/loongarch/lasx.md (div<mode>3): New expander.
347 (*div<mode>3): Rename.
348 (sqrt<mode>2): New expander.
349 (*sqrt<mode>2): Rename.
350 (rsqrt<mode>2): New expander.
351 * config/loongarch/loongarch-protos.h (loongarch_emit_swrsqrtsf): New prototype.
352 (loongarch_emit_swdivsf): Ditto.
353 * config/loongarch/loongarch.cc (loongarch_option_override_internal): Set
354 recip_mask for -mrecip and -mrecip= options.
355 (loongarch_emit_swrsqrtsf): New function.
356 (loongarch_emit_swdivsf): Ditto.
357 * config/loongarch/loongarch.h (RECIP_MASK_NONE, RECIP_MASK_DIV, RECIP_MASK_SQRT
358 RECIP_MASK_RSQRT, RECIP_MASK_VEC_DIV, RECIP_MASK_VEC_SQRT, RECIP_MASK_VEC_RSQRT
359 RECIP_MASK_ALL): New bitmasks.
360 (TARGET_RECIP_DIV, TARGET_RECIP_SQRT, TARGET_RECIP_RSQRT, TARGET_RECIP_VEC_DIV
361 TARGET_RECIP_VEC_SQRT, TARGET_RECIP_VEC_RSQRT): New tests.
362 * config/loongarch/loongarch.md (sqrt<mode>2): New expander.
363 (*sqrt<mode>2): Rename.
364 (rsqrt<mode>2): New expander.
365 * config/loongarch/loongarch.opt (recip_mask): New variable.
366 (-mrecip, -mrecip): New options.
367 * config/loongarch/lsx.md (div<mode>3): New expander.
368 (*div<mode>3): Rename.
369 (sqrt<mode>2): New expander.
370 (*sqrt<mode>2): Rename.
371 (rsqrt<mode>2): New expander.
372 * config/loongarch/predicates.md (reg_or_vecotr_1_operand): New predicate.
373 * doc/invoke.texi (LoongArch Options): Document new options.
375 2023-12-08 Jiahao Xu <xujiahao@loongson.cn>
377 * config/loongarch/lasx.md (lasx_xvfrecip_<flasxfmt>): Renamed to ..
378 (recip<mode>3): .. this.
379 * config/loongarch/loongarch-builtins.cc (CODE_FOR_lsx_vfrecip_d): Redefine
381 (CODE_FOR_lsx_vfrecip_s): Ditto.
382 (CODE_FOR_lasx_xvfrecip_d): Ditto.
383 (CODE_FOR_lasx_xvfrecip_s): Ditto.
384 (loongarch_expand_builtin_direct): For the vector recip instructions, construct a
385 temporary parameter const1_vector.
386 * config/loongarch/lsx.md (lsx_vfrecip_<flsxfmt>): Renamed to ..
387 (recip<mode>3): .. this.
388 * config/loongarch/predicates.md (const_vector_1_operand): New predicate.
390 2023-12-08 Jiahao Xu <xujiahao@loongson.cn>
392 * config/loongarch/lasx.md (lasx_xvfrsqrt_<flasxfmt>): Renamed to ..
393 (rsqrt<mode>2): .. this.
394 * config/loongarch/loongarch-builtins.cc
395 (CODE_FOR_lsx_vfrsqrt_d): Redefine to standard pattern name.
396 (CODE_FOR_lsx_vfrsqrt_s): Ditto.
397 (CODE_FOR_lasx_xvfrsqrt_d): Ditto.
398 (CODE_FOR_lasx_xvfrsqrt_s): Ditto.
399 * config/loongarch/loongarch.cc (use_rsqrt_p): New function.
400 (loongarch_optab_supported_p): Ditto.
401 (TARGET_OPTAB_SUPPORTED_P): New hook.
402 * config/loongarch/loongarch.md (*rsqrt<mode>a): Remove.
403 (*rsqrt<mode>2): New insn pattern.
404 (*rsqrt<mode>b): Remove.
405 * config/loongarch/lsx.md (lsx_vfrsqrt_<flsxfmt>): Renamed to ..
406 (rsqrt<mode>2): .. this.
408 2023-12-08 Jiahao Xu <xujiahao@loongson.cn>
410 * config/loongarch/genopts/isa-evolution.in (fecipe): Add.
411 * config/loongarch/larchintrin.h (__frecipe_s): New intrinsic.
412 (__frecipe_d): Ditto.
413 (__frsqrte_s): Ditto.
414 (__frsqrte_d): Ditto.
415 * config/loongarch/lasx.md (lasx_xvfrecipe_<flasxfmt>): New insn pattern.
416 (lasx_xvfrsqrte_<flasxfmt>): Ditto.
417 * config/loongarch/lasxintrin.h (__lasx_xvfrecipe_s): New intrinsic.
418 (__lasx_xvfrecipe_d): Ditto.
419 (__lasx_xvfrsqrte_s): Ditto.
420 (__lasx_xvfrsqrte_d): Ditto.
421 * config/loongarch/loongarch-builtins.cc (AVAIL_ALL): Add predicates.
422 (LSX_EXT_BUILTIN): New macro.
423 (LASX_EXT_BUILTIN): Ditto.
424 * config/loongarch/loongarch-cpucfg-map.h: Regenerate.
425 * config/loongarch/loongarch-c.cc: Add builtin macro "__loongarch_frecipe".
426 * config/loongarch/loongarch-def.cc: Regenerate.
427 * config/loongarch/loongarch-str.h (OPTSTR_FRECIPE): Regenerate.
428 * config/loongarch/loongarch.cc (loongarch_asm_code_end): Dump status for TARGET_FRECIPE.
429 * config/loongarch/loongarch.md (loongarch_frecipe_<fmt>): New insn pattern.
430 (loongarch_frsqrte_<fmt>): Ditto.
431 * config/loongarch/loongarch.opt: Regenerate.
432 * config/loongarch/lsx.md (lsx_vfrecipe_<flsxfmt>): New insn pattern.
433 (lsx_vfrsqrte_<flsxfmt>): Ditto.
434 * config/loongarch/lsxintrin.h (__lsx_vfrecipe_s): New intrinsic.
435 (__lsx_vfrecipe_d): Ditto.
436 (__lsx_vfrsqrte_s): Ditto.
437 (__lsx_vfrsqrte_d): Ditto.
438 * doc/extend.texi: Add documentation for LoongArch new builtins and intrinsics.
440 2023-12-08 Richard Biener <rguenther@suse.de>
442 * tree-outof-ssa.cc (rewrite_out_of_ssa): Dump GIMPLE once only,
443 after final IL adjustments.
445 2023-12-08 Pan Li <pan2.li@intel.com>
447 * config/riscv/vector-iterators.md: Replace RVVM2SI to RVVM2SF
448 for mode attr V_F2DI_CONVERT_BRIDGE.
450 2023-12-08 Jiahao Xu <xujiahao@loongson.cn>
452 * config/loongarch/lasx.md (xorsign<mode>3): New expander.
453 * config/loongarch/loongarch.cc (loongarch_can_change_mode_class): Allow
454 conversion between LSX vector mode and scalar fp mode.
455 * config/loongarch/loongarch.md (@xorsign<mode>3): New expander.
456 * config/loongarch/lsx.md (@xorsign<mode>3): Ditto.
458 2023-12-08 Jakub Jelinek <jakub@redhat.com>
460 PR tree-optimization/112902
461 * gimple-lower-bitint.cc (gimple_lower_bitint): For a narrowing
462 or same precision cast don't set SSA_NAME_VERSION in m_names only
463 if use_stmt is mergeable_op or fall through into the check that
464 use is a store or rhs1 is not mergeable or other reasons prevent
467 2023-12-08 Jakub Jelinek <jakub@redhat.com>
469 PR tree-optimization/112901
471 (simplify_using_ranges::simplify_float_conversion_using_ranges):
472 Return false if rhs1 has BITINT_TYPE type with BLKmode TYPE_MODE.
474 2023-12-08 Jakub Jelinek <jakub@redhat.com>
477 * haifa-sched.cc (extend_h_i_d): Use 3U instead of 3 in
478 3 * get_max_uid () / 2 calculation.
480 2023-12-08 Lulu Cheng <chenglulu@loongson.cn>
482 * config/loongarch/genopts/loongarch-strings: Delete STR_ISA_BASE_LA64V110.
483 * config/loongarch/genopts/loongarch.opt.in: Likewise.
484 * config/loongarch/loongarch-cpu.cc (ISA_BASE_LA64V110_FEATURES): Delete macro.
485 (fill_native_cpu_config): Define a new variable hw_isa_evolution record the
486 extended instruction set support read from cpucfg.
487 * config/loongarch/loongarch-def.cc: Set evolution at initialization.
488 * config/loongarch/loongarch-def.h (ISA_BASE_LA64V100): Delete.
489 (ISA_BASE_LA64V110): Likewise.
490 (N_ISA_BASE_TYPES): Likewise.
492 * config/loongarch/loongarch-opts.cc: Likewise.
493 * config/loongarch/loongarch-opts.h (TARGET_64BIT): Likewise.
494 (ISA_BASE_IS_LA64V110): Likewise.
495 * config/loongarch/loongarch-str.h (STR_ISA_BASE_LA64V110): Likewise.
496 * config/loongarch/loongarch.opt: Regenerate.
498 2023-12-08 Xi Ruoyao <xry111@xry111.site>
500 * config/loongarch/loongarch-def.h: Remove extern "C".
501 (loongarch_isa_base_strings): Declare as loongarch_def_array
502 instead of plain array.
503 (loongarch_isa_ext_strings): Likewise.
504 (loongarch_abi_base_strings): Likewise.
505 (loongarch_abi_ext_strings): Likewise.
506 (loongarch_cmodel_strings): Likewise.
507 (loongarch_cpu_strings): Likewise.
508 (loongarch_cpu_default_isa): Likewise.
509 (loongarch_cpu_issue_rate): Likewise.
510 (loongarch_cpu_multipass_dfa_lookahead): Likewise.
511 (loongarch_cpu_cache): Likewise.
512 (loongarch_cpu_align): Likewise.
513 (loongarch_cpu_rtx_cost_data): Likewise.
514 (loongarch_isa): Add a constructor and field setter functions.
515 * config/loongarch/loongarch-opts.h (loongarch-defs.h): Do not
516 include for target libraries.
517 * config/loongarch/loongarch-opts.cc: Comment code that doesn't
518 run and causes compilation errors.
519 * config/loongarch/loongarch-tune.h (LOONGARCH_TUNE_H): Likewise.
520 (struct loongarch_rtx_cost_data): Likewise.
521 (struct loongarch_cache): Likewise.
522 (struct loongarch_align): Likewise.
523 * config/loongarch/t-loongarch: Compile loongarch-def.cc with the
525 * config/loongarch/loongarch-def-array.h: New file for a
526 std:array like data structure with position setter function.
527 * config/loongarch/loongarch-def.c: Rename to ...
528 * config/loongarch/loongarch-def.cc: ... here.
529 (loongarch_cpu_strings): Define as loongarch_def_array instead
531 (loongarch_cpu_default_isa): Likewise.
532 (loongarch_cpu_cache): Likewise.
533 (loongarch_cpu_align): Likewise.
534 (loongarch_cpu_rtx_cost_data): Likewise.
535 (loongarch_cpu_issue_rate): Likewise.
536 (loongarch_cpu_multipass_dfa_lookahead): Likewise.
537 (loongarch_isa_base_strings): Likewise.
538 (loongarch_isa_ext_strings): Likewise.
539 (loongarch_abi_base_strings): Likewise.
540 (loongarch_abi_ext_strings): Likewise.
541 (loongarch_cmodel_strings): Likewise.
542 (abi_minimal_isa): Likewise.
543 (loongarch_rtx_cost_optimize_size): Use field setter functions
544 instead of designated initializers.
545 (loongarch_rtx_cost_data): Implement default constructor.
547 2023-12-08 Jakub Jelinek <jakub@redhat.com>
550 * params.opt (-param=min-nondebug-insn-uid=): Add
551 IntegerRange(0, 1073741824).
552 * lra.cc (check_and_expand_insn_recog_data): Use 3U rather than 3
553 in * 3 / 2 computation and if the result is smaller or equal to
554 index, use index + 1.
556 2023-12-08 Haochen Jiang <haochen.jiang@intel.com>
558 * config/i386/driver-i386.cc (host_detect_local_cpu):
559 Do not append "-mno-" for Xeon Phi ISAs.
560 * config/i386/i386-options.cc (ix86_option_override_internal):
561 Emit a warning for KNL/KNM targets.
562 * config/i386/i386.opt: Emit a warning for Xeon Phi ISAs.
564 2023-12-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
566 * config/riscv/riscv-vector-costs.cc (costs::better_main_loop_than_p):
567 Remove redundant check.
569 2023-12-08 Hao Liu <hliu@os.amperecomputing.com>
571 PR tree-optimization/112774
572 * tree-pretty-print.cc: if nonwrapping flag is set, chrec will be
573 printed with additional <nw> info.
574 * tree-scalar-evolution.cc: add record_nonwrapping_chrec and
575 nonwrapping_chrec_p to set and check the new flag respectively.
576 * tree-scalar-evolution.h: Likewise.
577 * tree-ssa-loop-niter.cc (idx_infer_loop_bounds,
578 infer_loop_bounds_from_pointer_arith, infer_loop_bounds_from_signedness,
579 scev_probably_wraps_p): call record_nonwrapping_chrec before
580 record_nonwrapping_iv, call nonwrapping_chrec_p to check the flag is
581 set and return false from scev_probably_wraps_p.
582 * tree-vect-loop.cc (vect_analyze_loop): call
583 free_numbers_of_iterations_estimates explicitly.
584 * tree-core.h: document the nothrow_flag usage in CHREC_NOWRAP
585 * tree.h: add CHREC_NOWRAP(NODE), base.nothrow_flag is used to
586 represent the nonwrapping info.
588 2023-12-08 Fei Gao <gaofei@eswincomputing.com>
590 * ifcvt.cc (noce_try_cond_zero_arith): New function.
591 (noce_emit_czero, get_base_reg): Likewise.
592 (noce_cond_zero_binary_op_supported): Likewise.
593 (noce_bbs_ok_for_cond_zero_arith): Likewise.
594 (noce_process_if_block): Use noce_try_cond_zero_arith.
595 Co-authored-by: Xiao Zeng<zengxiao@eswincomputing.com>
597 2023-12-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
599 * config/riscv/riscv-protos.h (expand_vec_series): Adapt function.
600 * config/riscv/riscv-v.cc (rvv_builder::double_steps_npatterns_p): New function.
601 (expand_vec_series): Adapt function.
602 (expand_const_vector): Support new interleave vector with different step.
604 2023-12-07 Richard Sandiford <richard.sandiford@arm.com>
606 PR rtl-optimization/106694
607 PR rtl-optimization/109078
608 PR rtl-optimization/109391
609 * config.gcc: Add aarch64-early-ra.o for AArch64 targets.
610 * config/aarch64/t-aarch64 (aarch64-early-ra.o): New rule.
611 * config/aarch64/aarch64-opts.h (aarch64_early_ra_scope): New enum.
612 * config/aarch64/aarch64.opt (mearly_ra): New option.
613 * doc/invoke.texi: Document it.
614 * common/config/aarch64/aarch64-common.cc
615 (aarch_option_optimization_table): Use -mearly-ra=strided by
616 default for -O2 and above.
617 * config/aarch64/aarch64-passes.def (pass_aarch64_early_ra): New pass.
618 * config/aarch64/aarch64-protos.h (aarch64_strided_registers_p)
619 (make_pass_aarch64_early_ra): Declare.
620 * config/aarch64/aarch64-sme.md (@aarch64_sme_lut<LUTI_BITS><mode>):
621 Add a stride_type attribute.
622 (@aarch64_sme_lut<LUTI_BITS><mode>_strided2): New pattern.
623 (@aarch64_sme_lut<LUTI_BITS><mode>_strided4): Likewise.
624 * config/aarch64/aarch64-sve-builtins-base.cc (svld1_impl::expand)
625 (svldnt1_impl::expand, svst1_impl::expand, svstn1_impl::expand): Handle
626 new way of defining multi-register loads and stores.
627 * config/aarch64/aarch64-sve.md (@aarch64_ld1<SVE_FULLx24:mode>)
628 (@aarch64_ldnt1<SVE_FULLx24:mode>, @aarch64_st1<SVE_FULLx24:mode>)
629 (@aarch64_stnt1<SVE_FULLx24:mode>): Delete.
630 * config/aarch64/aarch64-sve2.md (@aarch64_<LD1_COUNT:optab><mode>)
631 (@aarch64_<LD1_COUNT:optab><mode>_strided2): New patterns.
632 (@aarch64_<LD1_COUNT:optab><mode>_strided4): Likewise.
633 (@aarch64_<ST1_COUNT:optab><mode>): Likewise.
634 (@aarch64_<ST1_COUNT:optab><mode>_strided2): Likewise.
635 (@aarch64_<ST1_COUNT:optab><mode>_strided4): Likewise.
636 * config/aarch64/aarch64.cc (aarch64_strided_registers_p): New
638 * config/aarch64/aarch64.md (UNSPEC_LD1_SVE_COUNT): Delete.
639 (UNSPEC_ST1_SVE_COUNT, UNSPEC_LDNT1_SVE_COUNT): Likewise.
640 (UNSPEC_STNT1_SVE_COUNT): Likewise.
641 (stride_type): New attribute.
642 * config/aarch64/constraints.md (Uwd, Uwt): New constraints.
643 * config/aarch64/iterators.md (UNSPEC_LD1_COUNT, UNSPEC_LDNT1_COUNT)
644 (UNSPEC_ST1_COUNT, UNSPEC_STNT1_COUNT): New unspecs.
645 (optab): Handle them.
646 (LD1_COUNT, ST1_COUNT): New iterators.
647 * config/aarch64/aarch64-early-ra.cc: New file.
649 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
651 * config/arm/arm_neon.h
652 (vld1_u8_x4, vld1_u16_x4, vld1_u32_x4, vld1_u64_x4): New
653 (vld1_s8_x4, vld1_s16_x4, vld1_s32_x4, vld1_s64_x4): New.
654 (vld1_f16_x4, vld1_f32_x4): New.
655 (vld1_p8_x4, vld1_p16_x4, vld1_p64_x4): New.
657 (vld1q_types_x4): Updated to use vld1q_x4
658 from arm_neon_builtins.def
659 * config/arm/arm_neon_builtins.def
660 (vld1_x4): Updated entries.
661 (vld1q_x4): New entries, but comes from the old vld1_x2
662 * config/arm/neon.md (neon_vld1q_x4<mode>):
663 Updated from neon_vld1_x4<mode>.
665 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
667 * config/arm/arm_neon.h
668 (vld1_u8_x3, vld1_u16_x3, vld1_u32_x3, vld1_u64_x3): New
669 (vld1_s8_x3, vld1_s16_x3, vld1_s32_x3, vld1_s64_x3): New.
670 (vld1_f16_x3, vld1_f32_x3): New.
671 (vld1_p8_x3, vld1_p16_x3, vld1_p64_x3): New.
673 (vld1q_types_x3): Updated to use vld1q_x3 from
674 arm_neon_builtins.def
675 * config/arm/arm_neon_builtins.def
676 (vld1_x3): Updated entries.
677 (vld1q_x3): New entries, but comes from the old vld1_x2
678 * config/arm/neon.md (neon_vld1q_x3<mode>): Updated from
681 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
683 * config/arm/arm_neon.h
684 (vld1_u8_x2, vld1_u16_x2, vld1_u32_x2, vld1_u64_x2): New
685 (vld1_s8_x2, vld1_s16_x2, vld1_s32_x2, vld1_s64_x2): New.
686 (vld1_f16_x2, vld1_f32_x2): New.
687 (vld1_p8_x2, vld1_p16_x2, vld1_p64_x2): New.
689 (vld1q_types_x2): Updated to use vld1q_x2 from
690 arm_neon_builtins.def
691 * config/arm/arm_neon_builtins.def
692 (vld1_x2): Updated entries.
693 (vld1q_x2): New entries, but comes from the old vld1_x2
695 (neon_vld1<VMEMX2_q>_x2<VDQX:mode>): Updated
696 from neon_vld1_x2<mode>.
698 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
700 * config/arm/arm_neon.h
701 (vst1q_u8_x4, vst1q_u16_x4, vst1q_u32_x4, vst1q_u64_x4): New.
702 (vst1q_s8_x4, vst1q_s16_x4, vst1q_s32_x4, vst1q_s64_x4): New.
703 (vst1q_f16_x4, vst1q_f32_x4): New.
704 (vst1q_p8_x4, vst1q_p16_x4, vst1q_p64_x4): New.
705 (vst1q_bf16_x4): New.
706 * config/arm/arm_neon_builtins.def (vst1q_x4): New entries.
707 * config/arm/neon.md (neon_vst1q_x4<mode>): New.
709 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
711 * config/arm/arm_neon.h
712 (vst1q_u8_x3, vst1q_u16_x3, vst1q_u32_x3, vst1q_u64_x3): New.
713 (vst1q_s8_x3, vst1q_s16_x3, vst1q_s32_x3, vst1q_s64_x3): New.
714 (vst1q_f16_x3, vst1q_f32_x3): New.
715 (vst1q_p8_x3, vst1q_p16_x3, vst1q_p64_x3): New.
716 (vst1q_bf16_x3): New.
717 * config/arm/arm_neon_builtins.def (vst1q_x3): New entries.
718 * config/arm/neon.md (neon_vst1q_x3<mode>): New.
720 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
722 * config/arm/arm_neon.h
723 (vst1q_u8_x2, vst1q_u16_x2, vst1q_u32_x2, vst1q_u64_x2): New.
724 (vst1q_s8_x2, vst1q_s16_x2, vst1q_s32_x2, vst1q_s64_x2): New.
725 (vst1q_f16_x2, vst1q_f32_x2): New.
726 (vst1q_p8_x2, vst1q_p16_x2, vst1q_p64_x2): New.
727 (vst1q_bf16_x2): New.
728 * config/arm/arm_neon_builtins.def (vst1q_x2): New entries.
730 (neon_vst1<VMEMX2_q>_x2<VDQX:mode>): Updated from
732 * config/arm/iterators.md (VMEMX2): New mode iterator.
733 (VMEMX2_q): New mode attribute.
735 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
737 * config/arm/arm_neon.h
738 (vst1_u8_x4, vst1_u16_x4, vst1_u32_x4, vst1_u64_x4): New.
739 (vst1_s8_x4, vst1_s16_x4, vst1_s32_x4, vst1_s64_x4): New.
740 (vst1_f16_x4, vst1_f32_x4): New.
741 (vst1_p8_x4, vst1_p16_x4, vst1_p64_x4): New.
743 * config/arm/arm_neon_builtins.def (vst1_x4): New entries.
744 * config/arm/neon.md (vst1_x4<mode>): New.
746 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
748 * config/arm/arm_neon.h
749 (vst1_u8_x3, vst1_u16_x3, vst1_u32_x3, vst1_u64_x3): New.
750 (vst1_s8_x3, vst1_s16_x3, vst1_s32_x3, vst1_s64_x3): New.
751 (vst1_f16_x3, vst1_f32_x3): New.
752 (vst1_p8_x3, vst1_p16_x3, vst1_p64_x3): New.
754 * config/arm/arm_neon_builtins.def (vst1_x3): New entries.
755 * config/arm/neon.md (vst1_x3<mode>): New.
757 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
759 * config/arm/arm_neon.h
760 (vst1_u8_x2, vst1_u16_x2, vst1_u32_x2, vst1_u64_x2): New.
761 (vst1_s8_x2, vst1_s16_x2, vst1_s32_x2, vst1_s64_x2): New.
762 (vst1_f16_x2, vst1_f32_x2): New.
763 (vst1_p8_x2, vst1_p16_x2, vst1_p64_x2): New.
765 * config/arm/arm_neon_builtins.def (vst1_x2): New entries.
766 * config/arm/neon.md (vst1_x2<mode>): New.
768 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
770 * config/arm/arm_neon.h
771 (vld1q_u8_x4, vld1q_u16_x4, vld1q_u32_x4, vld1q_u64_x4): New.
772 (vld1q_s8_x4, vld1q_s16_x4, vld1q_s32_x4, vld1q_s64_x4): New.
773 (vld1q_f16_x4, vld1q_f32_x4): New.
774 (vld1q_p8_x4, vld1q_p16_x4, vld1q_p64_x4): New.
775 (vld1q_bf16_x4): New.
776 * config/arm/arm_neon_builtins.def (vld1_x4): New entries.
777 * config/arm/neon.md (vld1_x4<mode>): New.
779 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
781 * config/arm/arm_neon.h
782 (vld1q_u8_x3, vld1q_u16_x3, vld1q_u32_x3, vld1q_u64_x3): New.
783 (vld1q_s8_x3, vld1q_s16_x3, vld1q_s32_x3, vld1q_s64_x3): New.
784 (vld1q_f16_x3, vld1q_f32_x3): New.
785 (vld1q_p8_x3, vld1q_p16_x3, vld1q_p64_x3): New.
786 (vld1q_bf16_x3): New.
787 * config/arm/arm_neon_builtins.def (vld1_x3): New entries.
788 * config/arm/neon.md (vld1_x3<mode>): New.
790 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
792 * config/arm/arm_neon.h
793 (vld1q_u8_x2, vld1q_u16_x2, vld1q_u32_x2, vld1q_u64_x2): New.
794 (vld1q_s8_x2, vld1q_s16_x2, vld1q_s32_x2, vld1q_s64_x2): New.
795 (vld1q_f16_x2, vld1q_f32_x2): New.
796 (vld1q_p8_x2, vld1q_p16_x2, vld1q_p64_x2): New.
797 (vld1q_bf16_x2): New.
798 * config/arm/arm_neon_builtins.def (vld1_x2): New entries.
799 * config/arm/neon.md (vld1_x2<mode>): New.
801 2023-12-07 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
803 * config/s390/vecintrin.h (vec_step): Expand vec_step to
804 __builtin_s390_vec_step.
806 2023-12-07 Alexandre Oliva <oliva@adacore.com>
808 * target.def (have_strub_support_for): New hook.
809 * doc/tm.texi.in: Document it.
810 * doc/tm.texi: Rebuild.
811 * ipa-strub.cc: Include target.h.
812 (strub_target_support_p): New.
813 (can_strub_p): Call it. Test for no flag_split_stack.
814 (pass_ipa_strub::adjust_at_calls_call): Check for target
816 * config/nvptx/nvptx.cc (TARGET_HAVE_STRUB_SUPPORT_FOR):
818 * doc/sourcebuild.texi (strub): Document new effective
821 2023-12-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
823 * config/riscv/riscv-avlprop.cc (simplify_replace_avl): New function.
824 (simplify_replace_vlmax_avl): Fix bug.
825 * config/riscv/t-riscv: Add a new include file.
827 2023-12-07 Christoph Müllner <christoph.muellner@vrull.eu>
829 * config/riscv/thead.cc (th_memidx_classify_address_index):
830 Require TARGET_XTHEADMEMIDX for FP modes.
831 * config/riscv/thead.md: Require TARGET_XTHEADMEMIDX for all
832 XTheadFMemIdx pattern.
834 2023-12-07 Jakub Jelinek <jakub@redhat.com>
837 * expr.cc (count_type_elements): Handle BITINT_TYPE like INTEGER_TYPE.
839 2023-12-07 Jakub Jelinek <jakub@redhat.com>
841 PR tree-optimization/112880
842 * tree-ssa-dce.cc (maybe_optimize_arith_overflow): Use
843 unsigned_type_for instead of conditionally calling
844 build_nonstandard_integer_type.
846 2023-12-07 Victor Do Nascimento <victor.donascimento@arm.com>
848 * config/aarch64/arm_neon.h (vldap1_lane_u64): New.
849 (vldap1q_lane_u64): Likewise.
850 (vldap1_lane_s64): Likewise.
851 (vldap1q_lane_s64): Likewise.
852 (vldap1_lane_f64): Likewise.
853 (vldap1q_lane_f64): Likewise.
854 (vldap1_lane_p64): Likewise.
855 (vldap1q_lane_p64): Likewise.
856 (vstl1_lane_u64): Likewise.
857 (vstl1q_lane_u64): Likewise.
858 (vstl1_lane_s64): Likewise.
859 (vstl1q_lane_s64): Likewise.
860 (vstl1_lane_f64): Likewise.
861 (vstl1q_lane_f64): Likewise.
862 (vstl1_lane_p64): Likewise.
863 (vstl1q_lane_p64): Likewise.
865 2023-12-07 Victor Do Nascimento <victor.donascimento@arm.com>
867 * config/aarch64/aarch64-simd-builtins.def
868 (vec_ldap1_lane): New.
869 (vec_stl1_lane): Likewise.
870 * config/aarch64/aarch64-simd.md
871 (aarch64_vec_stl1_lanes<mode>_lane<Vel>): New.
872 (aarch64_vec_stl1_lane<mode>): Likewise.
873 (aarch64_vec_ldap1_lanes<mode>_lane<Vel>): Likewise.
874 (aarch64_vec_ldap1_lane<mode>): Likewise.
875 * config/aarch64/aarch64.md (UNSPEC_LDAP1_LANE): New.
876 (UNSPEC_STL1_LANE): Likewise.
878 2023-12-07 Victor Do Nascimento <victor.donascimento@arm.com>
880 * config/aarch64/iterators.md (V12DIF): New.
882 (VEL): Add support for all V12DIF-associated modes.
883 (Vetype): Add support for V1DI and V1DF.
886 2023-12-07 Victor Do Nascimento <victor.donascimento@arm.com>
888 * config/aarch64/aarch64-option-extensions.def (rcpc3): New.
889 * config/aarch64/aarch64.h (AARCH64_ISA_RCPC3): Likewise.
890 (TARGET_RCPC3): Likewise.
891 * doc/invoke.texi (rcpc3): Document feature in AArch64 Options.
893 2023-12-07 Hongyu Wang <hongyu.wang@intel.com>
895 * config/i386/i386-expand.cc (ix86_split_ashl_ndd): New
896 function to split NDD form lshift.
897 (ix86_split_rshift_ndd): Likewise for l/ashiftrt.
898 * config/i386/i386-protos.h (ix86_split_ashl_ndd): New
900 (ix86_split_rshift_ndd): Likewise.
901 * config/i386/i386.md (ashl<mode>3_doubleword): Add NDD
902 alternative, call ndd split function when operands[0]
903 not equal to operands[1].
904 (define_split for doubleword lshift): Likewise.
905 (define_peephole for doubleword lshift): Likewise.
906 (<insn><mode>3_doubleword): Likewise for l/ashiftrt.
907 (define_split for doubleword l/ashiftrt): Likewise.
908 (define_peephole for doubleword l/ashiftrt): Likewise.
910 2023-12-07 Hongyu Wang <hongyu.wang@intel.com>
912 * config/i386/i386.md (*mov<mode>cc_noc): Extend with new constraints
914 (*movsicc_noc_zext): Likewise.
915 (*movsicc_noc_zext_1): Likewise.
916 (*movqicc_noc): Likewise.
918 2023-12-07 Hongyu Wang <hongyu.wang@intel.com>
920 * config/i386/i386.md (x86_64_shld_ndd): New define_insn.
921 (x86_64_shld_ndd_1): Likewise.
922 (*x86_64_shld_ndd_2): Likewise.
923 (x86_shld_ndd): Likewise.
924 (x86_shld_ndd_1): Likewise.
925 (*x86_shld_ndd_2): Likewise.
926 (x86_64_shrd_ndd): Likewise.
927 (x86_64_shrd_ndd_1): Likewise.
928 (*x86_64_shrd_ndd_2): Likewise.
929 (x86_shrd_ndd): Likewise.
930 (x86_shrd_ndd_1): Likewise.
931 (*x86_shrd_ndd_2): Likewise.
932 (*x86_64_shld_shrd_1_nozext): Adjust codegen under TARGET_APX_NDD.
933 (*x86_shld_shrd_1_nozext): Likewise.
934 (*x86_64_shrd_shld_1_nozext): Likewise.
935 (*x86_shrd_shld_1_nozext): Likewise.
937 2023-12-07 Hongyu Wang <hongyu.wang@intel.com>
939 * config/i386/i386.md (*<insn><mode>3_1): Extend with a new
940 alternative to support NDD for SI/DI rotate, and adjust output
942 (*<insn>si3_1_zext): Likewise.
943 (*<insn><mode>3_1): Likewise for QI/HI modes.
944 (rcrsi2): Likewise, and use nonimmediate_operand for operands[1]
945 to accept memory input for NDD alternative.
948 2023-12-07 Hongyu Wang <hongyu.wang@intel.com>
950 * config/i386/i386.md (ashr<mode>3_cvt): Extend with new
951 alternatives to support NDD, and adjust output templates.
952 (*ashr<mode>3_1): Likewise for SI/DI mode.
953 (*lshr<mode>3_1): Likewise.
954 (*<insn>si3_1_zext): Likewise.
955 (*ashr<mode>3_1): Likewise for QI/HI mode.
956 (*lshrqi3_1): Likewise.
957 (*lshrhi3_1): Likewise.
958 (<insn><mode>3_cmp): Likewise.
959 (*<insn><mode>3_cconly): Likewise.
960 (*ashrsi3_cvt_zext): Likewise, and use nonimmediate_operand for
961 operands[1] to accept memory input for NDD alternative.
962 (*highpartdisi2): Likewise.
963 (*<insn>si3_cmp_zext): Likewise.
964 (<insn><mode>3_carry): Likewise.
966 2023-12-07 Hongyu Wang <hongyu.wang@intel.com>
968 * config/i386/i386.md (*ashl<mode>3_1): Extend with new
969 alternatives to support NDD, limit the new alternative to
970 generate sal only, and adjust output template for NDD.
971 (*ashlsi3_1_zext): Likewise.
972 (*ashlhi3_1): Likewise.
973 (*ashlqi3_1): Likewise.
974 (*ashl<mode>3_cmp): Likewise.
975 (*ashlsi3_cmp_zext): Likewise, and use nonimmediate_operand for
976 operands[1] to accept memory input for NDD alternative.
977 (*ashl<mode>3_cconly): Likewise.
978 (*ashl<dwi>3_doubleword_highpart): Adjust codegen for NDD.
980 2023-12-07 Kong Lingling <lingling.kong@intel.com>
982 * config/i386/i386.md (<code><mode>3): Add new alternative for NDD
983 and adjust output templates.
984 (*<code><mode>_1): Likewise.
985 (*<code>qi_1): Likewise.
986 (*notxor<mode>_1): Likewise.
987 (*<code>si_1_zext): Likewise.
988 (*notxorqi_1): Likewise.
989 (*<code><mode>_2): Likewise.
990 (*<code>si_2_zext): Likewise.
991 (*<code>si_2_zext_imm): Likewise.
992 (*<code>si_1_zext_imm): Likewise, and use nonimmediate_operand for
993 operands[1] to accept memory input for NDD alternative.
994 (*one_cmplsi2_2_zext): Likewise.
995 (define_split for *one_cmplsi2_2_zext): Use nonimmediate_operand for
997 (*<code><dwi>3_doubleword): Add NDD constraints, adopt '&' to NDD dest
998 and emit move for optimized case if operands[0] != operands[1] or
999 operands[4] != operands[5].
1000 (define_split for QI highpart OR/XOR): Prohibit splitter to split NDD
1001 form OR/XOR insn to <any_logic:code>qi_ext<mode>_3.
1002 (define_split for QI strict_lowpart optimization): Prohibit splitter to
1003 split NDD form AND insn to *<code><mode>3_1_slp.
1005 2023-12-07 Kong Lingling <lingling.kong@intel.com>
1007 * config/i386/i386.md (and<mode>3): Add NDD alternatives and adjust
1009 (*anddi_1): Likewise.
1010 (*and<mode>_1): Likewise.
1011 (*andqi_1): Likewise.
1012 (*andsi_1_zext): Likewise.
1013 (*anddi_2): Likewise.
1014 (*andsi_2_zext): Likewise.
1015 (*andqi_2_maybe_si): Likewise.
1016 (*and<mode>_2): Likewise.
1017 (*and<dwi>3_doubleword): Add NDD alternative, adopt '&' to NDD dest and
1018 emit move for optimized case if operands[0] not equal to operands[1].
1019 (define_split for QI highpart AND): Prohibit splitter to split NDD
1020 form AND insn to <any_logic:code>qi_ext<mode>_3.
1021 (define_split for QI strict_lowpart optimization): Prohibit splitter to
1022 split NDD form AND insn to *<code><mode>3_1_slp.
1023 (define_split for zero_extend and optimization): Prohibit splitter to
1024 split NDD form AND insn to zero_extend insn.
1026 2023-12-07 Kong Lingling <lingling.kong@intel.com>
1028 * config/i386/i386.md (one_cmpl<mode>2): Add new constraints for NDD
1029 and adjust output template.
1030 (*one_cmpl<mode>2_1): Likewise.
1031 (*one_cmplqi2_1): Likewise.
1032 (*one_cmpl<dwi>2_doubleword): Likewise, and adopt '&' to NDD dest.
1033 (*one_cmpl<mode>2_2): Likewise.
1034 (*one_cmplsi2_1_zext): Likewise, and use nonimmediate_operand for
1035 operands[1] to accept memory input for NDD alternative.
1037 2023-12-07 Kong Lingling <lingling.kong@intel.com>
1039 * config/i386/i386-expand.cc (ix86_expand_unary_operator): Add use_ndd
1040 parameter and adjust for NDD.
1041 * config/i386/i386-protos.h: Add use_ndd parameter for
1042 ix86_unary_operator_ok and ix86_expand_unary_operator.
1043 * config/i386/i386.cc (ix86_unary_operator_ok): Add use_ndd parameter
1045 * config/i386/i386.md (neg<mode>2): Add new constraint for NDD and
1046 adjust output template.
1047 (*neg<mode>_1): Likewise.
1048 (*neg<dwi>2_doubleword): Likewise and adopt '&' to NDD dest.
1049 (*neg<mode>_2): Likewise.
1050 (*neg<mode>_ccc_1): Likewise.
1051 (*neg<mode>_ccc_2): Likewise.
1052 (*negsi_1_zext): Likewise, and use nonimmediate_operand for operands[1]
1053 to accept memory input for NDD alternatives.
1054 (*negsi_2_zext): Likewise.
1056 2023-12-07 Kong Lingling <lingling.kong@intel.com>
1058 * config/i386/i386.md (*sub<dwi>3_doubleword): Add new alternative for
1059 NDD, adopt '&' modifier to NDD dest and emit move when operands[0] not
1060 equal to operands[1].
1061 (*sub<dwi>3_doubleword_zext): Likewise.
1062 (*subv<dwi>4_doubleword): Likewise.
1063 (*subv<dwi>4_doubleword_1): Likewise.
1064 (*subv<mode>4_overflow_1): Add NDD alternatives and adjust output
1066 (*subv<mode>4_overflow_2): Likewise.
1067 (@sub<mode>3_carry): Likewise.
1068 (*addsi3_carry_zext_0r): Likewise, and use nonimmediate_operand for
1069 operands[1] to accept memory input for NDD alternative.
1070 (*subsi3_carry_zext): Likewise.
1071 (subborrow<mode>): Parse TARGET_APX_NDD to ix86_binary_operator_ok.
1072 (subborrow<mode>_0): Likewise.
1073 (*sub<mode>3_eq): Likewise.
1074 (*sub<mode>3_ne): Likewise.
1075 (*sub<mode>3_eq_1): Likewise.
1077 2023-12-07 Kong Lingling <lingling.kong@intel.com>
1079 * config/i386/i386-expand.cc (ix86_fixup_binary_operands_no_copy):
1080 Add use_ndd parameter and parse it.
1081 * config/i386/i386-protos.h (ix86_fixup_binary_operands_no_copy):
1083 * config/i386/i386.md (sub<mode>3): Add new alternatives for NDD
1084 and adjust output templates.
1085 (*sub<mode>_1): Likewise.
1086 (*sub<mode>_2): Likewise.
1087 (subv<mode>4): Likewise.
1088 (*subv<mode>4): Likewise.
1089 (subv<mode>4_1): Likewise.
1090 (usubv<mode>4): Likewise.
1091 (*sub<mode>_3): Likewise.
1092 (*subsi_1_zext): Likewise, and use nonimmediate_operand for operands[1]
1093 to accept memory input for NDD alternatives.
1094 (*subsi_2_zext): Likewise.
1095 (*subsi_3_zext): Likewise.
1097 2023-12-07 Kong Lingling <lingling.kong@intel.com>
1099 * config/i386/i386.md (*add<dwi>3_doubleword): Add ndd alternatives,
1100 adopt '&' to ndd dest and move operands[1] to operands[0] when they are
1102 (*add<dwi>3_doubleword_cc_overflow_1): Likewise.
1103 (*addv<dwi>4_doubleword): Likewise.
1104 (*addv<dwi>4_doubleword_1): Likewise.
1105 (*add<dwi>3_doubleword_zext): Likewise.
1106 (addv<mode>4_overflow_1): Add ndd alternatives.
1107 (*addv<mode>4_overflow_2): Likewise.
1108 (@add<mode>3_carry): Likewise.
1109 (*add<mode>3_carry_0): Likewise.
1110 (*addsi3_carry_zext): Likewise.
1111 (addcarry<mode>): Likewise.
1112 (addcarry<mode>_0): Likewise.
1113 (*addcarry<mode>_1): Likewise.
1114 (*add<mode>3_eq): Likewise.
1115 (*add<mode>3_ne): Likewise.
1116 (*addsi3_carry_zext_0): Likewise, and use nonimmediate_operand for
1117 operands[1] to accept memory input for NDD alternative.
1119 2023-12-07 Hongyu Wang <hongyu.wang@intel.com>
1121 * config/i386/constraints.md (je): New constraint.
1122 * config/i386/i386-protos.h (x86_poff_operand_p): New function to
1123 check any *POFF constant in operand.
1124 * config/i386/i386.cc (x86_poff_operand_p): New prototype.
1125 * config/i386/i386.md (*add<mode>_1): Split out je alternative for add.
1127 2023-12-07 Kong Lingling <lingling.kong@intel.com>
1129 * config/i386/i386.md: (addsi_1_zext): Add new alternatives for
1130 NDD and adjust output templates.
1131 (*add<mode>_2): Likewise.
1132 (*addsi_2_zext): Likewise.
1133 (*add<mode>_3): Likewise.
1134 (*addsi_3_zext): Likewise.
1135 (*adddi_4): Likewise.
1136 (*add<mode>_4): Likewise.
1137 (*add<mode>_5): Likewise.
1138 (*addv<mode>4): Likewise.
1139 (*addv<mode>4_1): Likewise.
1140 (*add<mode>3_cconly_overflow_1): Likewise.
1141 (*add<mode>3_cc_overflow_1): Likewise.
1142 (*addsi3_zext_cc_overflow_1): Likewise.
1143 (*add<mode>3_cconly_overflow_2): Likewise.
1144 (*add<mode>3_cc_overflow_2): Likewise.
1145 (*addsi3_zext_cc_overflow_2): Likewise.
1147 2023-12-07 Kong Lingling <lingling.kong@intel.com>
1149 * config/i386/i386-expand.cc (ix86_fixup_binary_operands): Add
1150 new use_ndd flag to check whether ndd can be used for this binop
1151 and adjust operand emit.
1152 (ix86_binary_operator_ok): Likewise.
1153 (ix86_expand_binary_operator): Likewise, and void postreload
1154 expand generate lea pattern when use_ndd is explicit parsed.
1155 * config/i386/i386-options.cc (ix86_option_override_internal):
1156 Prohibit apx subfeatures when not in 64bit mode.
1157 * config/i386/i386-protos.h (ix86_binary_operator_ok):
1159 (ix86_fixup_binary_operand): Likewise.
1160 (ix86_expand_binary_operand): Likewise.
1161 * config/i386/i386.md (*add<mode>_1): Extend with new alternatives
1162 to support NDD, and adjust output template.
1163 (*addhi_1): Likewise.
1164 (*addqi_1): Likewise.
1166 2023-12-07 David Malcolm <dmalcolm@redhat.com>
1170 * doc/invoke.texi: Add -Wanalyzer-symbol-too-complex.
1172 2023-12-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1174 * config/riscv/riscv-vsetvl.cc (extract_single_source): new function.
1175 (pre_vsetvl::compute_lcm_local_properties): Fix ICE.
1177 2023-12-06 Victor Do Nascimento <victor.donascimento@arm.com>
1179 * config/aarch64/aarch64-builtins.cc (AARCH64_RSR128): New
1180 `enum aarch64_builtins' value.
1181 (AARCH64_WSR128): Likewise.
1182 (aarch64_init_rwsr_builtins): Init `__builtin_aarch64_rsr128'
1183 and `__builtin_aarch64_wsr128' builtins.
1184 (aarch64_expand_rwsr_builtin): Extend function to handle
1185 `__builtin_aarch64_{rsr|wsr}128'.
1186 * config/aarch64/aarch64-protos.h (aarch64_retrieve_sysreg):
1187 Update function signature.
1188 * config/aarch64/aarch64.cc (F_REG_128): New.
1189 (aarch64_retrieve_sysreg): Add 128-bit register mode check.
1190 * config/aarch64/aarch64.md (UNSPEC_SYSREG_RTI): New.
1191 (UNSPEC_SYSREG_WTI): Likewise.
1192 (aarch64_read_sysregti): Likewise.
1193 (aarch64_write_sysregti): Likewise.
1194 * config/aarch64/arm_acle.h (__arm_rsr128): New.
1195 (__arm_wsr128): Likewise.
1197 2023-12-06 Victor Do Nascimento <victor.donascimento@arm.com>
1199 * config/aarch64/aarch64-sys-regs.def: Copy from Binutils.
1201 2023-12-06 Victor Do Nascimento <victor.donascimento@arm.com>
1203 * config/aarch64/aarch64-option-extensions.def (gcs): New.
1204 * config/aarch64/aarch64.h (AARCH64_ISA_GCS): New.
1205 (TARGET_THE): Likewise.
1206 * doc/invoke.texi (AArch64 Options): Describe GCS.
1208 2023-12-06 Victor Do Nascimento <victor.donascimento@arm.com>
1210 * config/aarch64/aarch64-c.cc (__ARM_FEATURE_SYSREG128): New.
1211 * config/aarch64/aarch64-arches.def (armv8.9-a): New.
1212 (armv9.4-a): Likewise.
1213 * config/aarch64/aarch64-option-extensions.def (d128): Likewise.
1215 * config/aarch64/aarch64.h (AARCH64_ISA_V9_4A): Likewise.
1216 (AARCH64_ISA_V8_9A): Likewise.
1217 (TARGET_ARMV9_4): Likewise.
1218 (AARCH64_ISA_D128): Likewise.
1219 (AARCH64_ISA_THE): Likewise.
1220 (TARGET_D128): Likewise.
1221 * doc/invoke.texi (AArch64 Options): Document new -march flags
1224 2023-12-06 Eric Gallager <egallager@gcc.gnu.org>
1226 * Makefile.in: Remove qmtest-related targets.
1228 2023-12-06 David Malcolm <dmalcolm@redhat.com>
1230 * common.opt (fdiagnostics-json-formatting): New.
1231 * diagnostic-format-json.cc: Add "formatted" boolean
1232 to json_output_format and subclasses, and to the
1233 diagnostic_output_format_init_json_* functions. Use it when
1235 * diagnostic-format-sarif.cc: Likewise for sarif_builder,
1236 sarif_output_format, and the various
1237 diagnostic_output_format_init_sarif_* functions.
1238 * diagnostic.cc (diagnostic_output_format_init): Add
1239 "json_formatting" boolean and pass on to the various cases.
1240 * diagnostic.h (diagnostic_output_format_init): Add
1241 "json_formatted" param.
1242 (diagnostic_output_format_init_json_stderr): Add "formatted" param
1243 (diagnostic_output_format_init_json_file): Likewise.
1244 (diagnostic_output_format_init_sarif_stderr): Likewise.
1245 (diagnostic_output_format_init_sarif_file): Likewise.
1246 (diagnostic_output_format_init_sarif_stream): Likewise.
1247 * doc/invoke.texi (-fdiagnostics-format=json): Remove discussion
1248 about JSON output needing formatting.
1249 (-fno-diagnostics-json-formatting): Add.
1250 * gcc.cc (driver_handle_option): Use
1251 opts->x_flag_diagnostics_json_formatting.
1252 * gcov.cc (generate_results): Pass "false" for new formatting
1253 option when printing json.
1254 * json.cc (value::dump): Add new "formatted" param.
1255 (object::print): Likewise, using it to add whitespace to format
1257 (array::print): Likewise.
1258 (float_number::print): Add new "formatted" param.
1259 (integer_number::print): Likewise.
1260 (string::print): Likewise.
1261 (literal::print): Likewise.
1262 (selftest::assert_print_eq): Add "formatted" param.
1263 (ASSERT_PRINT_EQ): Add "FORMATTED" param.
1264 (selftest::test_writing_objects): Test both formatted and
1265 unformatted printing.
1266 (selftest::test_writing_arrays): Likewise.
1267 (selftest::test_writing_float_numbers): Update for new param of
1269 (selftest::test_writing_integer_numbers): Likewise.
1270 (selftest::test_writing_strings): Likewise.
1271 (selftest::test_writing_literals): Likewise.
1272 (selftest::test_formatting): New.
1273 (selftest::json_cc_tests): Call it.
1274 * json.h (value::print): Add "formatted" param.
1275 (value::dump): Likewise.
1276 (object::print): Likewise.
1277 (array::print): Likewise.
1278 (float_number::print): Likewise.
1279 (integer_number::print): Likewise.
1280 (string::print): Likewise.
1281 (literal::print): Likewise.
1282 * optinfo-emit-json.cc (optrecord_json_writer::write): Pass
1283 "false" for new formatting option when printing json.
1284 (selftest::test_building_json_from_dump_calls): Likewise.
1285 * opts.cc (common_handle_option): Use
1286 opts->x_flag_diagnostics_json_formatting.
1288 2023-12-06 David Malcolm <dmalcolm@redhat.com>
1290 * diagnostic-format-json.cc (on_begin_diagnostic): Convert param
1292 (on_end_diagnostic): Likewise.
1293 (json_output_format::on_end_diagnostic): Likewise.
1294 * diagnostic-format-sarif.cc
1295 (sarif_invocation::add_notification_for_ice): Likewise.
1296 (sarif_result::on_nested_diagnostic): Likewise.
1297 (sarif_ice_notification::sarif_ice_notification): Likewise.
1298 (sarif_builder::end_diagnostic): Likewise.
1299 (sarif_builder::make_result_object): Likewise.
1300 (make_reporting_descriptor_object_for_warning): Likewise.
1301 (sarif_builder::make_locations_arr): Likewise.
1302 (sarif_output_format::on_begin_diagnostic): Likewise.
1303 (sarif_output_format::on_end_diagnostic): Likewise.
1304 * diagnostic.cc (default_diagnostic_starter): Make diagnostic_info
1306 (default_diagnostic_finalizer): Likewise.
1307 (diagnostic_context::report_diagnostic): Pass diagnostic by
1308 reference to on_{begin,end}_diagnostic.
1309 (diagnostic_text_output_format::on_begin_diagnostic): Convert
1310 param to const reference.
1311 (diagnostic_text_output_format::on_end_diagnostic): Likewise.
1312 * diagnostic.h (diagnostic_starter_fn): Make diagnostic_info param
1314 (diagnostic_finalizer_fn): Likeewise.
1315 (diagnostic_output_format::on_begin_diagnostic): Convert param to
1317 (diagnostic_output_format::on_end_diagnostic): Likewise.
1318 (diagnostic_text_output_format::on_begin_diagnostic): Likewise.
1319 (diagnostic_text_output_format::on_end_diagnostic): Likewise.
1320 (default_diagnostic_starter): Make diagnostic_info param const.
1321 (default_diagnostic_finalizer): Likewise.
1322 * langhooks-def.h (lhd_print_error_function): Make diagnostic_info
1324 * langhooks.cc (lhd_print_error_function): Likewise.
1325 * langhooks.h (lang_hooks::print_error_function): Likewise.
1326 * tree-diagnostic.cc (diagnostic_report_current_function):
1328 (default_tree_diagnostic_starter): Likewise.
1329 (virt_loc_aware_diagnostic_finalizer): Likewise.
1330 * tree-diagnostic.h (diagnostic_report_current_function):
1332 (virt_loc_aware_diagnostic_finalizer): Likewise.
1334 2023-12-06 Andrew Stubbs <ams@codesourcery.com>
1336 * config/gcn/gcn-builtins.def (DISPATCH_PTR): New built-in.
1337 * config/gcn/gcn.cc (gcn_init_machine_status): Disable global
1339 (gcn_expand_builtin_1): Implement GCN_BUILTIN_DISPATCH_PTR.
1341 2023-12-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1344 * config/riscv/riscv-vsetvl.cc
1345 (pre_vsetvl::compute_lcm_local_properties): Fix transparant LCM data.
1346 (pre_vsetvl::earliest_fuse_vsetvl_info): Disable earliest fusion for unrelated edge.
1348 2023-12-06 Marek Polacek <polacek@redhat.com>
1351 * config/linux.h: Redefine TARGET_FORTIFY_SOURCE_DEFAULT_LEVEL for
1354 2023-12-06 Victor Do Nascimento <victor.donascimento@arm.com>
1356 * config/aarch64/aarch64.cc
1357 (aarch64_test_sysreg_encoding_clashes): New.
1358 (aarch64_run_selftests): add call to
1359 aarch64_test_sysreg_encoding_clashes selftest.
1361 2023-12-06 Victor Do Nascimento <victor.donascimento@arm.com>
1363 * config/aarch64/aarch64-builtins.cc (aarch64_general_check_builtin_call):
1365 * config/aarch64/aarch64-c.cc (aarch64_check_builtin_call):
1366 Add `aarch64_general_check_builtin_call' call.
1367 * config/aarch64/aarch64-protos.h (aarch64_general_check_builtin_call):
1370 2023-12-06 Victor Do Nascimento <victor.donascimento@arm.com>
1372 * config/aarch64/aarch64-builtins.cc (enum aarch64_builtins):
1373 Add enums for new builtins.
1374 (aarch64_init_rwsr_builtins): New.
1375 (aarch64_general_init_builtins): Call aarch64_init_rwsr_builtins.
1376 (aarch64_expand_rwsr_builtin): New.
1377 (aarch64_general_expand_builtin): Call aarch64_general_expand_builtin.
1378 * config/aarch64/aarch64.md (read_sysregdi): New insn_and_split.
1379 (write_sysregdi): Likewise.
1380 * config/aarch64/arm_acle.h (__arm_rsr): New.
1381 (__arm_rsrp): Likewise.
1382 (__arm_rsr64): Likewise.
1383 (__arm_rsrf): Likewise.
1384 (__arm_rsrf64): Likewise.
1385 (__arm_wsr): Likewise.
1386 (__arm_wsrp): Likewise.
1387 (__arm_wsr64): Likewise.
1388 (__arm_wsrf): Likewise.
1389 (__arm_wsrf64): Likewise.
1391 2023-12-06 Victor Do Nascimento <victor.donascimento@arm.com>
1393 * config/aarch64/aarch64-protos.h (aarch64_valid_sysreg_name_p): New.
1394 (aarch64_retrieve_sysreg): Likewise.
1395 * config/aarch64/aarch64.cc (is_implem_def_reg): Likewise.
1396 (aarch64_valid_sysreg_name_p): Likewise.
1397 (aarch64_retrieve_sysreg): Likewise.
1398 (aarch64_register_sysreg): Likewise.
1399 (aarch64_init_sysregs): Likewise.
1400 (aarch64_lookup_sysreg_map): Likewise.
1401 * config/aarch64/predicates.md (aarch64_sysreg_string): New.
1403 2023-12-06 Victor Do Nascimento <victor.donascimento@arm.com>
1405 * config/aarch64/aarch64.cc (sysreg_t): New.
1406 (aarch64_sysregs): Likewise.
1407 (AARCH64_FEATURE): Likewise.
1408 (AARCH64_FEATURES): Likewise.
1409 (AARCH64_NO_FEATURES): Likewise.
1410 * config/aarch64/aarch64.h (AARCH64_ISA_V8A): Add missing
1412 (AARCH64_ISA_V8_1A): Likewise.
1413 (AARCH64_ISA_V8_7A): Likewise.
1414 (AARCH64_ISA_V8_8A): Likewise.
1415 (AARCH64_NO_FEATURES): Likewise.
1416 (AARCH64_FL_RAS): New ISA flag alias.
1417 (AARCH64_FL_LOR): Likewise.
1418 (AARCH64_FL_PAN): Likewise.
1419 (AARCH64_FL_AMU): Likewise.
1420 (AARCH64_FL_SCXTNUM): Likewise.
1421 (AARCH64_FL_ID_PFR2): Likewise.
1422 (F_DEPRECATED): New.
1423 (F_REG_READ): Likewise.
1424 (F_REG_WRITE): Likewise.
1425 (F_ARCHEXT): Likewise.
1426 (F_REG_ALIAS): Likewise.
1428 2023-12-06 Victor Do Nascimento <victor.donascimento@arm.com>
1430 * config/aarch64/aarch64-sys-regs.def: New.
1432 2023-12-06 Robin Dapp <rdapp@ventanamicro.com>
1436 * config/riscv/autovec.md (vec_init<mode>qi): New expander.
1438 2023-12-06 Jakub Jelinek <jakub@redhat.com>
1440 PR rtl-optimization/112760
1441 * config/i386/i386-passes.def (pass_insert_vzeroupper): Insert
1442 after pass_postreload_cse rather than pass_reload.
1443 * config/i386/i386-features.cc (rest_of_handle_insert_vzeroupper):
1444 Adjust comment for it.
1446 2023-12-06 Jakub Jelinek <jakub@redhat.com>
1448 PR tree-optimization/112809
1449 * gimple-lower-bitint.cc (bitint_large_huge::lower_mergeable_stmt): For
1450 separate_ext in kind == bitint_prec_huge mode if rem == 0, create for
1451 i == cnt - 1 the loop rather than using size_int (end).
1453 2023-12-06 Jakub Jelinek <jakub@redhat.com>
1455 * gcc.cc (driver_handle_option): Add /* FALLTHROUGH */ comment
1456 between OPT_pie and OPT_r cases.
1458 2023-12-06 Tobias Burnus <tobias@codesourcery.com>
1460 * tsystem.h (calloc, realloc): Declare when inhibit_libc.
1462 2023-12-06 Richard Biener <rguenther@suse.de>
1464 PR tree-optimization/112843
1465 * tree-ssa-operands.cc (update_stmt_operands): Do not call
1466 update_stmt from ranger.
1467 * value-query.h (range_query::update_stmt): Remove.
1468 * gimple-range.h (gimple_ranger::update_stmt): Likewise.
1469 * gimple-range.cc (gimple_ranger::update_stmt): Likewise.
1471 2023-12-06 xuli <xuli1@eswincomputing.com>
1473 * config/riscv/riscv.md: Remove.
1475 2023-12-06 Alexandre Oliva <oliva@adacore.com>
1477 * Makefile.in (OBJS): Add ipa-strub.o.
1478 (GTFILES): Add ipa-strub.cc.
1479 * builtins.def (BUILT_IN_STACK_ADDRESS): New.
1480 (BUILT_IN___STRUB_ENTER): New.
1481 (BUILT_IN___STRUB_UPDATE): New.
1482 (BUILT_IN___STRUB_LEAVE): New.
1483 * builtins.cc: Include ipa-strub.h.
1484 (STACK_STOPS, STACK_UNSIGNED): Define.
1485 (expand_builtin_stack_address): New.
1486 (expand_builtin_strub_enter): New.
1487 (expand_builtin_strub_update): New.
1488 (expand_builtin_strub_leave): New.
1489 (expand_builtin): Call them.
1490 * common.opt (fstrub=*): New options.
1491 * doc/extend.texi (strub): New type attribute.
1492 (__builtin_stack_address): New function.
1493 (Stack Scrubbing): New section.
1494 * doc/invoke.texi (-fstrub=*): New options.
1495 (-fdump-ipa-*): New passes.
1496 * gengtype-lex.l: Ignore multi-line pp-directives.
1497 * ipa-inline.cc: Include ipa-strub.h.
1498 (can_inline_edge_p): Test strub_inlinable_to_p.
1499 * ipa-split.cc: Include ipa-strub.h.
1500 (execute_split_functions): Test strub_splittable_p.
1501 * ipa-strub.cc, ipa-strub.h: New.
1502 * passes.def: Add strub_mode and strub passes.
1503 * tree-cfg.cc (gimple_verify_flow_info): Note on debug stmts.
1504 * tree-pass.h (make_pass_ipa_strub_mode): Declare.
1505 (make_pass_ipa_strub): Declare.
1506 (make_pass_ipa_function_and_variable_visibility): Fix
1508 * tree-ssa-ccp.cc (optimize_stack_restore): Keep restores
1510 * attribs.cc: Include ipa-strub.h.
1511 (decl_attributes): Support applying attributes to function
1512 type, rather than pointer type, at handler's request.
1513 (comp_type_attributes): Combine strub_comptypes and target
1515 * doc/tm.texi.in (TARGET_STRUB_USE_DYNAMIC_ARRAY): New.
1516 (TARGET_STRUB_MAY_USE_MEMSET): New.
1517 * doc/tm.texi: Rebuilt.
1518 * cgraph.h (symtab_node::reset): Add preserve_comdat_group
1519 param, with a default.
1520 * cgraphunit.cc (symtab_node::reset): Use it.
1522 2023-12-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1526 * config/riscv/riscv-v.cc (vls_mode_valid_p): Block VLSmodes according
1527 TARGET_MAX_LMUL and BITS_PER_RISCV_VECTOR.
1529 2023-12-05 David Faust <david.faust@oracle.com>
1532 * btfout.cc (btf_collect_datasec): Avoid incorrectly creating an
1533 entry in a BTF_KIND_DATASEC record for extern variable decls without
1536 2023-12-05 Jakub Jelinek <jakub@redhat.com>
1539 * config/rs6000/rs6000.md (copysign<mode>3): Change predicate
1540 of the last argument from gpc_reg_operand to any_operand. If
1541 operands[2] is CONST_DOUBLE, emit abs or neg abs depending on
1542 its sign, otherwise if it doesn't satisfy gpc_reg_operand,
1543 force it to REG using copy_to_mode_reg.
1545 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
1547 * attribs.cc (handle_ignored_attributes_option): Add extra
1548 braces to work around PR 16333 in older compilers.
1549 * config/aarch64/aarch64.cc (aarch64_gnu_attribute_table): Likewise.
1550 (aarch64_arm_attribute_table): Likewise.
1551 * config/arm/arm.cc (arm_gnu_attribute_table): Likewise.
1552 * config/i386/i386-options.cc (ix86_gnu_attribute_table): Likewise.
1553 * config/ia64/ia64.cc (ia64_gnu_attribute_table): Likewise.
1554 * config/rs6000/rs6000.cc (rs6000_gnu_attribute_table): Likewise.
1555 * target-def.h (TARGET_GNU_ATTRIBUTES): Likewise.
1556 * genhooks.cc (emit_init_macros): Likewise, when emitting the
1557 instantiation of TARGET_ATTRIBUTE_TABLE.
1558 * langhooks-def.h (LANG_HOOKS_INITIALIZER): Likewise, when
1559 instantiating LANG_HOOKS_ATTRIBUTE_TABLE.
1560 (LANG_HOOKS_ATTRIBUTE_TABLE): Define to be empty by default.
1561 * target.def (attribute_table): Likewise.
1563 2023-12-05 Richard Biener <rguenther@suse.de>
1565 PR middle-end/112860
1566 * passes.cc (should_skip_pass_p): Do not skip ISEL.
1568 2023-12-05 Richard Biener <rguenther@suse.de>
1571 * asan.cc (asan_protect_global): Do not protect globals
1572 in non-generic address-space.
1574 2023-12-05 Richard Biener <rguenther@suse.de>
1577 * ipa-icf.cc (sem_variable::equals_wpa): Compare address-spaces.
1579 2023-12-05 Richard Biener <rguenther@suse.de>
1581 PR middle-end/112830
1582 * gimplify.cc (gimplify_modify_expr): Avoid turning aggregate
1583 copy of non-generic address-spaces to memcpy.
1584 (gimplify_modify_expr_to_memcpy): Assert we are dealing with
1585 a copy inside the generic address-space.
1586 (gimplify_modify_expr_to_memset): Likewise.
1587 * tree-cfg.cc (verify_gimple_assign_single): Allow
1588 WITH_SIZE_EXPR as part of the RHS of an assignment.
1589 * builtins.cc (get_memory_address): Assert we are dealing
1590 with the generic address-space.
1591 * tree-ssa-dce.cc (ref_may_be_aliased): Handle WITH_SIZE_EXPR.
1593 2023-12-05 Richard Biener <rguenther@suse.de>
1595 PR tree-optimization/109689
1596 PR tree-optimization/112856
1597 * cfgloopmanip.h (unloop_loops): Adjust API.
1598 * tree-ssa-loop-ivcanon.cc (unloop_loops): Take edges_to_remove
1600 (canonicalize_induction_variables): Adjust.
1601 (tree_unroll_loops_completely): Likewise.
1602 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Rewrite into
1603 LC SSA if we unlooped some loops and we are in LC SSA.
1605 2023-12-05 Jakub Jelinek <jakub@redhat.com>
1608 * config/i386/i386.md (movabsq $(i32 << shift), r64 peephole2): FAIL
1609 if the new immediate is ix86_endbr_immediate_operand.
1611 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
1613 * config/aarch64/aarch64.h (TARGET_STREAMING_SME2): New macro.
1614 (P_ALIASES): Likewise.
1615 (REGISTER_NAMES): Add pn aliases of the predicate registers.
1616 (W8_W11_REGNUM_P): New macro.
1617 (W8_W11_REGS): New register class.
1618 (REG_CLASS_NAMES, REG_CLASS_CONTENTS): Update accordingly.
1619 * config/aarch64/aarch64.cc (aarch64_print_operand): Add support
1620 for %K, which prints a predicate as a counter. Handle tuples of
1622 (aarch64_regno_regclass): Handle W8_W11_REGS.
1623 (aarch64_class_max_nregs): Likewise.
1624 * config/aarch64/constraints.md (Uci, Uw2, Uw4): New constraints.
1625 (x, y): Move further up file.
1626 (Uph): Redefine as the high predicate registers, renaming the old
1629 * config/aarch64/predicates.md (const_0_to_7_operand): New predicate.
1630 (const_0_to_4_step_4_operand, const_0_to_6_step_2_operand): Likewise.
1631 (const_0_to_12_step_4_operand, const_0_to_14_step_2_operand): Likewise.
1632 (aarch64_simd_shift_imm_qi): Use const_0_to_7_operand.
1633 * config/aarch64/iterators.md (VNx16SI_ONLY, VNx8SI_ONLY)
1634 (VNx8DI_ONLY, SVE_FULL_BHSIx2, SVE_FULL_HF, SVE_FULL_SIx2_SDIx4)
1635 (SVE_FULL_BHS, SVE_FULLx24, SVE_DIx24, SVE_BHSx24, SVE_Ix24)
1636 (SVE_Fx24, SVE_SFx24, SME_ZA_BIx24, SME_ZA_BHIx124, SME_ZA_BHIx24)
1637 (SME_ZA_HFx124, SME_ZA_HFx24, SME_ZA_HIx124, SME_ZA_HIx24)
1638 (SME_ZA_SDIx24, SME_ZA_SDFx24): New mode iterators.
1639 (UNSPEC_REVD, UNSPEC_CNTP_C, UNSPEC_PEXT, UNSPEC_PEXTx2): New unspecs.
1640 (UNSPEC_PSEL, UNSPEC_PTRUE_C, UNSPEC_SQRSHR, UNSPEC_SQRSHRN)
1641 (UNSPEC_SQRSHRU, UNSPEC_SQRSHRUN, UNSPEC_UQRSHR, UNSPEC_UQRSHRN)
1642 (UNSPEC_UZP, UNSPEC_UZPQ, UNSPEC_ZIP, UNSPEC_ZIPQ, UNSPEC_BFMLSLB)
1643 (UNSPEC_BFMLSLT, UNSPEC_FCVTN, UNSPEC_FDOT, UNSPEC_SQCVT): Likewise.
1644 (UNSPEC_SQCVTN, UNSPEC_SQCVTU, UNSPEC_SQCVTUN, UNSPEC_UQCVT): Likewise.
1645 (UNSPEC_SME_ADD, UNSPEC_SME_ADD_WRITE, UNSPEC_SME_BMOPA): Likewise.
1646 (UNSPEC_SME_BMOPS, UNSPEC_SME_FADD, UNSPEC_SME_FDOT, UNSPEC_SME_FVDOT)
1647 (UNSPEC_SME_FMLA, UNSPEC_SME_FMLS, UNSPEC_SME_FSUB, UNSPEC_SME_READ)
1648 (UNSPEC_SME_SDOT, UNSPEC_SME_SVDOT, UNSPEC_SME_SMLA, UNSPEC_SME_SMLS)
1649 (UNSPEC_SME_SUB, UNSPEC_SME_SUB_WRITE, UNSPEC_SME_SUDOT): Likewise.
1650 (UNSPEC_SME_SUVDOT, UNSPEC_SME_UDOT, UNSPEC_SME_UVDOT): Likewise.
1651 (UNSPEC_SME_UMLA, UNSPEC_SME_UMLS, UNSPEC_SME_USDOT): Likewise.
1652 (UNSPEC_SME_USVDOT, UNSPEC_SME_WRITE): Likewise.
1653 (Vetype, VNARROW, V2XWIDE, Ventype, V_INT_EQUIV, v_int_equiv)
1654 (VSINGLE, vsingle, b): Add tuple modes.
1655 (v2xwide, za32_offset_range, za64_offset_range, za32_long)
1656 (za32_last_offset, vg_modifier, z_suffix, aligned_operand)
1657 (aligned_fpr): New mode attributes.
1658 (SVE_INT_BINARY_MULTI, SVE_INT_BINARY_SINGLE, SVE_INT_BINARY_MULTI)
1659 (SVE_FP_BINARY_MULTI): New int iterators.
1660 (SVE_BFLOAT_TERNARY_LONG): Add UNSPEC_BFMLSLB and UNSPEC_BFMLSLT.
1661 (SVE_BFLOAT_TERNARY_LONG_LANE): Likewise.
1662 (SVE_WHILE_ORDER, SVE2_INT_SHIFT_IMM_NARROWxN, SVE_QCVTxN)
1663 (SVE2_SFx24_UNARY, SVE2_x24_PERMUTE, SVE2_x24_PERMUTEQ)
1664 (UNSPEC_REVD_ONLY, SME2_INT_MOP, SME2_BMOP, SME_BINARY_SLICE_SDI)
1665 (SME_BINARY_SLICE_SDF, SME_BINARY_WRITE_SLICE_SDI, SME_INT_DOTPROD)
1666 (SME_INT_DOTPROD_LANE, SME_FP_DOTPROD, SME_FP_DOTPROD_LANE)
1667 (SME_INT_TERNARY_SLICE, SME_FP_TERNARY_SLICE, BHSD_BITS)
1668 (LUTI_BITS): New int iterators.
1669 (optab, sve_int_op): Handle the new unspecs.
1670 (sme_int_op, has_16bit_form): New int attributes.
1671 (bits_etype): Handle 64.
1672 * config/aarch64/aarch64.md (UNSPEC_LD1_SVE_COUNT): New unspec.
1673 (UNSPEC_ST1_SVE_COUNT, UNSPEC_LDNT1_SVE_COUNT): Likewise.
1674 (UNSPEC_STNT1_SVE_COUNT): Likewise.
1675 * config/aarch64/atomics.md (cas_short_expected_imm): Use Uhi
1676 rather than Uph for HImode immediates.
1677 * config/aarch64/aarch64-sve.md (@aarch64_ld1<SVE_FULLx24:mode>)
1678 (@aarch64_ldnt1<SVE_FULLx24:mode>, @aarch64_st1<SVE_FULLx24:mode>)
1679 (@aarch64_stnt1<SVE_FULLx24:mode>): New patterns.
1680 (@aarch64_<sur>dot_prod_lane<vsi2qi>): Extend to...
1681 (@aarch64_<sur>dot_prod_lane<SVE_FULL_SDI:mode><SVE_FULL_BHI:mode>)
1682 (@aarch64_<sur>dot_prod_lane<VNx4SI_ONLY:mode><VNx16QI_ONLY:mode>):
1683 ...these new patterns.
1684 (SVE_WHILE_B, SVE_WHILE_B_X2, SVE_WHILE_C): New constants. Add
1685 SVE_WHILE_B to existing while patterns.
1686 * config/aarch64/aarch64-sve2.md (@aarch64_sve_ptrue_c<BHSD_BITS>)
1687 (@aarch64_sve_pext<BHSD_BITS>, @aarch64_sve_pext<BHSD_BITS>x2)
1688 (@aarch64_sve_psel<BHSD_BITS>, *aarch64_sve_psel<BHSD_BITS>_plus)
1689 (@aarch64_sve_cntp_c<BHSD_BITS>, <frint_pattern><mode>2)
1690 (<optab><mode>3, *<optab><mode>3, @aarch64_sve_single_<optab><mode>)
1691 (@aarch64_sve_<sve_int_op><mode>): New patterns.
1692 (@aarch64_sve_single_<sve_int_op><mode>, @aarch64_sve_<su>clamp<mode>)
1693 (*aarch64_sve_<su>clamp<mode>_x, @aarch64_sve_<su>clamp_single<mode>)
1694 (@aarch64_sve_fclamp<mode>, *aarch64_sve_fclamp<mode>_x)
1695 (@aarch64_sve_fclamp_single<mode>, <optab><mode><v2xwide>2)
1696 (@aarch64_sve_<sur>dotvnx4sivnx8hi): New patterns.
1697 (@aarch64_sve_<maxmin_uns_op><mode>): Likewise.
1698 (*aarch64_sve_<maxmin_uns_op><mode>): Likewise.
1699 (@aarch64_sve_single_<maxmin_uns_op><mode>): Likewise.
1700 (aarch64_sve_fdotvnx4sfvnx8hf): Likewise.
1701 (aarch64_fdot_prod_lanevnx4sfvnx8hf): Likewise.
1702 (@aarch64_sve_<optab><VNx16QI_ONLY:mode><VNx16SI_ONLY:mode>): Likewise.
1703 (@aarch64_sve_<optab><VNx8HI_ONLY:mode><VNx8SI_ONLY:mode>): Likewise.
1704 (@aarch64_sve_<optab><VNx8HI_ONLY:mode><VNx8DI_ONLY:mode>): Likewise.
1705 (truncvnx8sf<mode>2, @aarch64_sve_cvtn<mode>): Likewise.
1706 (<optab><v_int_equiv><mode>2, <optab><mode><v_int_equiv>2): Likewise.
1707 (@aarch64_sve_sel<mode>): Likewise.
1708 (@aarch64_sve_while<while_optab_cmp>_b<BHSD_BITS>_x2): Likewise.
1709 (@aarch64_sve_while<while_optab_cmp>_c<BHSD_BITS>): Likewise.
1710 (@aarch64_pred_<optab><mode>, @cond_<optab><mode>): Likewise.
1711 (@aarch64_sve_<optab><mode>): Likewise.
1712 * config/aarch64/aarch64-sme.md (@aarch64_sme_<optab><mode><mode>)
1713 (*aarch64_sme_<optab><mode><mode>_plus, @aarch64_sme_read<mode>)
1714 (*aarch64_sme_read<mode>_plus, @aarch64_sme_write<mode>): New patterns.
1715 (*aarch64_sme_write<mode>_plus aarch64_sme_zero_zt0): Likewise.
1716 (@aarch64_sme_<optab><mode>, *aarch64_sme_<optab><mode>_plus)
1717 (@aarch64_sme_single_<optab><mode>): Likewise.
1718 (*aarch64_sme_single_<optab><mode>_plus): Likewise.
1719 (@aarch64_sme_<optab><SME_ZA_SDI:mode><SME_ZA_BHIx24:mode>)
1720 (*aarch64_sme_<optab><SME_ZA_SDI:mode><SME_ZA_BHIx24:mode>_plus)
1721 (@aarch64_sme_single_<optab><SME_ZA_SDI:mode><SME_ZA_BHIx24:mode>)
1722 (*aarch64_sme_single_<optab><SME_ZA_SDI:mode><SME_ZA_BHIx24:mode>_plus)
1723 (@aarch64_sme_single_sudot<VNx4SI_ONLY:mode><SME_ZA_BIx24:mode>)
1724 (*aarch64_sme_single_sudot<VNx4SI_ONLY:mode><SME_ZA_BIx24:mode>_plus)
1725 (@aarch64_sme_lane_<optab><SME_ZA_SDI:mode><SME_ZA_BHIx24:mode>)
1726 (*aarch64_sme_lane_<optab><SME_ZA_SDI:mode><SME_ZA_BHIx24:mode>_plus)
1727 (@aarch64_sme_<optab><VNx4SI_ONLY:mode><SVE_FULL_BHI:mode>)
1728 (*aarch64_sme_<optab><VNx4SI_ONLY:mode><SVE_FULL_BHI:mode>_plus)
1729 (@aarch64_sme_<optab><VNx4SI_ONLY:mode><SME_ZA_BHIx24:mode>)
1730 (*aarch64_sme_<optab><VNx4SI_ONLY:mode><SME_ZA_BHIx24:mode>_plus)
1731 (@aarch64_sme_single_<optab><VNx4SI_ONLY:mode><SME_ZA_BHIx24:mode>)
1732 (*aarch64_sme_single_<optab><VNx4SI_ONLY:mode><SME_ZA_BHIx24:mode>_plus)
1733 (@aarch64_sme_lane_<optab><VNx4SI_ONLY:mode><SME_ZA_BHIx124:mode>)
1734 (*aarch64_sme_lane_<optab><VNx4SI_ONLY:mode><SME_ZA_BHIx124:mode>)
1735 (@aarch64_sme_<optab><VNx2DI_ONLY:mode><VNx8HI_ONLY:mode>)
1736 (*aarch64_sme_<optab><VNx2DI_ONLY:mode><VNx8HI_ONLY:mode>_plus)
1737 (@aarch64_sme_<optab><VNx2DI_ONLY:mode><SME_ZA_HIx24:mode>)
1738 (*aarch64_sme_<optab><VNx2DI_ONLY:mode><SME_ZA_HIx24:mode>_plus)
1739 (@aarch64_sme_single_<optab><VNx2DI_ONLY:mode><SME_ZA_HIx24:mode>)
1740 (*aarch64_sme_single_<optab><VNx2DI_ONLY:mode><SME_ZA_HIx24:mode>_plus)
1741 (@aarch64_sme_lane_<optab><VNx2DI_ONLY:mode><SME_ZA_HIx124:mode>)
1742 (*aarch64_sme_lane_<optab><VNx2DI_ONLY:mode><SME_ZA_HIx124:mode>)
1743 (@aarch64_sme_<optab><VNx4SI_ONLY:mode><VNx8HI_ONLY:mode>)
1744 (@aarch64_sme_<optab><VNx4SI_ONLY:mode><VNx4SI_ONLY:mode>)
1745 (@aarch64_sme_<optab><VNx4SI_ONLY:mode><SME_ZA_HFx24:mode>)
1746 (*aarch64_sme_<optab><VNx4SI_ONLY:mode><SME_ZA_HFx24:mode>_plus)
1747 (@aarch64_sme_single_<optab><VNx4SI_ONLY:mode><SME_ZA_HFx24:mode>)
1748 (*aarch64_sme_single_<optab><VNx4SI_ONLY:mode><SME_ZA_HFx24:mode>_plus)
1749 (@aarch64_sme_lane_<optab><VNx4SI_ONLY:mode><SME_ZA_HFx24:mode>)
1750 (*aarch64_sme_lane_<optab><VNx4SI_ONLY:mode><SME_ZA_HFx24:mode>_plus)
1751 (@aarch64_sme_<optab><SME_ZA_SDF_I:mode><SME_ZA_SDFx24:mode>)
1752 (*aarch64_sme_<optab><SME_ZA_SDF_I:mode><SME_ZA_SDFx24:mode>_plus)
1753 (@aarch64_sme_single_<optab><SME_ZA_SDF_I:mode><SME_ZA_SDFx24:mode>)
1754 (*aarch64_sme_single_<optab><SME_ZA_SDF_I:mode><SME_ZA_SDFx24:mode>_plus)
1755 (@aarch64_sme_lane_<optab><SME_ZA_SDF_I:mode><SME_ZA_SDFx24:mode>)
1756 (*aarch64_sme_lane_<optab><SME_ZA_SDF_I:mode><SME_ZA_SDFx24:mode>)
1757 (@aarch64_sme_<optab><VNx4SI_ONLY:mode><SVE_FULL_HF:mode>)
1758 (*aarch64_sme_<optab><VNx4SI_ONLY:mode><SVE_FULL_HF:mode>_plus)
1759 (@aarch64_sme_lane_<optab><VNx4SI_ONLY:mode><SME_ZA_HFx124:mode>)
1760 (*aarch64_sme_lane_<optab><VNx4SI_ONLY:mode><SME_ZA_HFx124:mode>)
1761 (@aarch64_sme_lut<LUTI_BITS><mode>): Likewise.
1762 (UNSPEC_SME_LUTI): New unspec.
1763 * config/aarch64/aarch64-sve-builtins.def (single): New mode suffix.
1764 (c8, c16, c32, c64): New type suffixes.
1765 (vg1x2, vg1x4, vg2, vg2x1, vg2x2, vg2x4, vg4, vg4x1, vg4x2)
1766 (vg4x4): New group suffixes.
1767 * config/aarch64/aarch64-sve-builtins.h (CP_READ_ZT0)
1768 (CP_WRITE_ZT0): New constants.
1769 (get_svbool_t): Delete.
1770 (function_resolver::report_mismatched_num_vectors): New member
1772 (function_resolver::resolve_conversion): Likewise.
1773 (function_resolver::infer_predicate_type): Likewise.
1774 (function_resolver::infer_64bit_scalar_integer_pair): Likewise.
1775 (function_resolver::require_matching_predicate_type): Likewise.
1776 (function_resolver::require_nonscalar_type): Likewise.
1777 (function_resolver::finish_opt_single_resolution): Likewise.
1778 (function_resolver::require_derived_vector_type): Add an
1779 expected_num_vectors parameter.
1780 (function_expander::map_to_rtx_codes): Add an extra parameter
1781 for unconditional FP unspecs.
1782 (function_instance::gp_type_index): New member function.
1783 (function_instance::gp_type): Likewise.
1784 (function_instance::gp_mode): Handle multi-vector operations.
1785 * config/aarch64/aarch64-sve-builtins.cc (TYPES_all_count)
1786 (TYPES_all_pred_count, TYPES_c, TYPES_bhs_data, TYPES_bhs_widen)
1787 (TYPES_hs_data, TYPES_cvt_h_s_float, TYPES_cvt_s_s, TYPES_qcvt_x2)
1788 (TYPES_qcvt_x4, TYPES_qrshr_x2, TYPES_qrshru_x2, TYPES_qrshr_x4)
1789 (TYPES_qrshru_x4, TYPES_while_x, TYPES_while_x_c, TYPES_s_narrow_fsu)
1790 (TYPES_za_s_b_signed, TYPES_za_s_b_unsigned, TYPES_za_s_b_integer)
1791 (TYPES_za_s_h_integer, TYPES_za_s_h_data, TYPES_za_s_unsigned)
1792 (TYPES_za_s_float, TYPES_za_s_data, TYPES_za_d_h_integer): New type
1794 (groups_x2, groups_x12, groups_x4, groups_x24, groups_x124)
1795 (groups_vg1x2, groups_vg1x4, groups_vg1x24, groups_vg2, groups_vg4)
1796 (groups_vg24): New group arrays.
1797 (function_instance::reads_global_state_p): Handle CP_READ_ZT0.
1798 (function_instance::modifies_global_state_p): Handle CP_WRITE_ZT0.
1799 (add_shared_state_attribute): Handle zt0 state.
1800 (function_builder::add_overloaded_functions): Skip MODE_single
1801 for non-tuple groups.
1802 (function_resolver::report_mismatched_num_vectors): New function.
1803 (function_resolver::resolve_to): Add a fallback error message for
1804 the general two-type case.
1805 (function_resolver::resolve_conversion): New function.
1806 (function_resolver::infer_predicate_type): Likewise.
1807 (function_resolver::infer_64bit_scalar_integer_pair): Likewise.
1808 (function_resolver::require_matching_predicate_type): Likewise.
1809 (function_resolver::require_matching_vector_type): Specifically
1810 diagnose mismatched vector counts.
1811 (function_resolver::require_derived_vector_type): Add an
1812 expected_num_vectors parameter. Extend to handle cases where
1813 tuples are expected.
1814 (function_resolver::require_nonscalar_type): New function.
1815 (function_resolver::check_gp_argument): Use gp_type_index rather
1816 than hard-coding VECTOR_TYPE_svbool_t.
1817 (function_resolver::finish_opt_single_resolution): New function.
1818 (function_checker::require_immediate_either_or): Remove hard-coded
1820 (function_expander::direct_optab_handler): New function.
1821 (function_expander::use_pred_x_insn): Only add a strictness flag
1822 is the insn has an operand for it.
1823 (function_expander::map_to_rtx_codes): Take an unconditional
1824 FP unspec as an extra parameter. Handle tuples and MODE_single.
1825 (function_expander::map_to_unspecs): Handle tuples and MODE_single.
1826 * config/aarch64/aarch64-sve-builtins-functions.h (read_zt0)
1827 (write_zt0): New typedefs.
1828 (full_width_access::memory_vector): Use the function's
1830 (rtx_code_function_base): Add an optional unconditional FP unspec.
1831 (rtx_code_function::expand): Update accordingly.
1832 (rtx_code_function_rotated::expand): Likewise.
1833 (unspec_based_function_exact_insn::expand): Use tuple_mode instead
1835 (unspec_based_uncond_function): New typedef.
1836 (cond_or_uncond_unspec_function): New class.
1837 (sme_1mode_function::expand): Handle single forms.
1838 (sme_2mode_function_t): Likewise, adding a template parameter for them.
1839 (sme_2mode_function): Update accordingly.
1840 (sme_2mode_lane_function): New typedef.
1841 (multireg_permute): New class.
1842 (class integer_conversion): Likewise.
1843 (while_comparison::expand): Handle svcount_t and svboolx2_t results.
1844 * config/aarch64/aarch64-sve-builtins-shapes.h
1845 (binary_int_opt_single_n, binary_opt_single_n, binary_single)
1846 (binary_za_slice_lane, binary_za_slice_int_opt_single)
1847 (binary_za_slice_opt_single, binary_za_slice_uint_opt_single)
1848 (binaryx, clamp, compare_scalar_count, count_pred_c)
1849 (dot_za_slice_int_lane, dot_za_slice_lane, dot_za_slice_uint_lane)
1850 (extract_pred, inherent_zt, ldr_zt, read_za, read_za_slice)
1851 (select_pred, shift_right_imm_narrowxn, storexn, str_zt)
1852 (unary_convertxn, unary_za_slice, unaryxn, write_za)
1853 (write_za_slice): Declare.
1854 * config/aarch64/aarch64-sve-builtins-shapes.cc
1855 (za_group_is_pure_overload): New function.
1856 (apply_predication): Use the function's gp_type for the predicate,
1857 instead of hard-coding the use of svbool_t.
1858 (parse_element_type): Add support for "c" (svcount_t).
1859 (parse_type): Add support for "c0" and "c1" (conversion destination
1861 (binary_za_slice_lane_base): New class.
1862 (binary_za_slice_opt_single_base): Likewise.
1863 (load_contiguous_base::resolve): Pass the group suffix to r.resolve.
1864 (luti_lane_zt_base): New class.
1865 (binary_int_opt_single_n, binary_opt_single_n, binary_single)
1866 (binary_za_slice_lane, binary_za_slice_int_opt_single)
1867 (binary_za_slice_opt_single, binary_za_slice_uint_opt_single)
1868 (binaryx, clamp): New shapes.
1869 (compare_scalar_def::build): Allow the return type to be a tuple.
1870 (compare_scalar_def::expand): Pass the group suffix to r.resolve.
1871 (compare_scalar_count, count_pred_c, dot_za_slice_int_lane)
1872 (dot_za_slice_lane, dot_za_slice_uint_lane, extract_pred, inherent_zt)
1873 (ldr_zt, read_za, read_za_slice, select_pred, shift_right_imm_narrowxn)
1874 (storexn, str_zt): New shapes.
1875 (ternary_qq_lane_def, ternary_qq_opt_n_def): Replace with...
1876 (ternary_qq_or_011_lane_def, ternary_qq_opt_n_or_011_def): ...these
1877 new classes. Allow a second suffix that specifies the type of the
1878 second vector argument, and that is used to derive the third.
1879 (unary_def::build): Extend to handle tuple types.
1880 (unary_convert_def::build): Use the new c0 and c1 format specifiers.
1881 (unary_convertxn, unary_za_slice, unaryxn, write_za): New shapes.
1882 (write_za_slice): Likewise.
1883 * config/aarch64/aarch64-sve-builtins-base.cc (svbic_impl::expand)
1884 (svext_bhw_impl::expand): Update call to map_to_rtx_costs.
1885 (svcntp_impl::expand): Handle svcount_t variants.
1886 (svcvt_impl::expand): Handle unpredicated conversions separately,
1887 dealing with tuples.
1888 (svdot_impl::expand): Handle 2-way dot products.
1889 (svdotprod_lane_impl::expand): Likewise.
1890 (svld1_impl::fold): Punt on tuple loads.
1891 (svld1_impl::expand): Handle tuple loads.
1892 (svldnt1_impl::expand): Likewise.
1893 (svpfalse_impl::fold): Punt on svcount_t forms.
1894 (svptrue_impl::fold): Likewise.
1895 (svptrue_impl::expand): Handle svcount_t forms.
1896 (svrint_impl): New class.
1897 (svsel_impl::fold): Punt on tuple forms.
1898 (svsel_impl::expand): Handle tuple forms.
1899 (svst1_impl::fold): Punt on tuple loads.
1900 (svst1_impl::expand): Handle tuple loads.
1901 (svstnt1_impl::expand): Likewise.
1902 (svwhilelx_impl::fold): Punt on tuple forms.
1903 (svdot_lane): Use UNSPEC_FDOT.
1904 (svmax, svmaxnm, svmin, svminmm): Add unconditional FP unspecs.
1905 (rinta, rinti, rintm, rintn, rintp, rintx, rintz): Use svrint_impl.
1906 * config/aarch64/aarch64-sve-builtins-base.def (svcreate2, svget2)
1907 (svset2, svundef2): Add _b variants.
1908 (svcvt): Use unary_convertxn.
1909 (svdot): Use ternary_qq_opt_n_or_011.
1910 (svdot_lane): Use ternary_qq_or_011_lane.
1911 (svmax, svmaxnm, svmin, svminnm): Use binary_opt_single_n.
1912 (svpfalse): Add a form that returns svcount_t results.
1913 (svrinta, svrintm, svrintn, svrintp): Use unaryxn.
1914 (svsel): Use binaryxn.
1915 (svst1, svstnt1): Use storexn.
1916 * config/aarch64/aarch64-sve-builtins-sme.h
1917 (svadd_za, svadd_write_za, svbmopa_za, svbmops_za, svdot_za)
1918 (svdot_lane_za, svldr_zt, svluti2_lane_zt, svluti4_lane_zt)
1919 (svmla_za, svmla_lane_za, svmls_za, svmls_lane_za, svread_za)
1920 (svstr_zt, svsub_za, svsub_write_za, svsudot_za, svsudot_lane_za)
1921 (svsuvdot_lane_za, svusdot_za, svusdot_lane_za, svusvdot_lane_za)
1922 (svvdot_lane_za, svwrite_za, svzero_zt): Declare.
1923 * config/aarch64/aarch64-sve-builtins-sme.cc (load_store_za_base):
1925 (load_store_za_zt0_base): ...this and extend to tuples.
1926 (load_za_base, store_za_base): Update accordingly.
1927 (expand_ldr_str_zt0): New function.
1928 (svldr_zt_impl, svluti_lane_zt_impl, svread_za_impl, svstr_zt_impl)
1929 (svsudot_za_impl, svwrite_za_impl, svzero_zt_impl): New classes.
1930 (svadd_za, svadd_write_za, svbmopa_za, svbmops_za, svdot_za)
1931 (svdot_lane_za, svldr_zt, svluti2_lane_zt, svluti4_lane_zt)
1932 (svmla_za, svmla_lane_za, svmls_za, svmls_lane_za, svread_za)
1933 (svstr_zt, svsub_za, svsub_write_za, svsudot_za, svsudot_lane_za)
1934 (svsuvdot_lane_za, svusdot_za, svusdot_lane_za, svusvdot_lane_za)
1935 (svvdot_lane_za, svwrite_za, svzero_zt): New functions.
1936 * config/aarch64/aarch64-sve-builtins-sme.def: Add SME2 intrinsics.
1937 * config/aarch64/aarch64-sve-builtins-sve2.h
1938 (svbfmlslb, svbfmlslb_lane, svbfmlslt, svbfmlslt_lane, svclamp)
1939 (svcvtn, svpext, svpsel, svqcvt, svqcvtn, svqrshr, svqrshrn)
1940 (svqrshru, svqrshrun, svrevd, svunpk, svuzp, svuzpq, svzip)
1942 * config/aarch64/aarch64-sve-builtins-sve2.cc (svclamp_impl)
1943 (svcvtn_impl, svpext_impl, svpsel_impl): New classes.
1944 (svqrshl_impl::fold): Update for change to svrshl shape.
1945 (svrshl_impl::fold): Punt on tuple forms.
1946 (svsqadd_impl::expand): Update call to map_to_rtx_codes.
1947 (svunpk_impl): New class.
1948 (svbfmlslb, svbfmlslb_lane, svbfmlslt, svbfmlslt_lane, svclamp)
1949 (svcvtn, svpext, svpsel, svqcvt, svqcvtn, svqrshr, svqrshrn)
1950 (svqrshru, svqrshrun, svrevd, svunpk, svuzp, svuzpq, svzip)
1951 (svzipq): New functions.
1952 * config/aarch64/aarch64-sve-builtins-sve2.def: Add SME2 intrinsics.
1953 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Define
1954 or undefine __ARM_FEATURE_SME2.
1956 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
1958 * config/aarch64/aarch64.md (ZT0_REGNUM): New constant.
1959 (LAST_FAKE_REGNUM): Bump to include it.
1960 * config/aarch64/aarch64.h (FIXED_REGISTERS): Add an entry for ZT0.
1961 (CALL_REALLY_USED_REGISTERS, REGISTER_NAMES): Likewise.
1962 (REG_CLASS_CONTENTS): Likewise.
1963 (machine_function): Add zt0_save_buffer.
1964 (CUMULATIVE_ARGS): Add shared_zt0_flags;
1965 * config/aarch64/aarch64.cc (aarch64_check_state_string): Handle zt0.
1966 (aarch64_fntype_pstate_za, aarch64_fndecl_pstate_za): Likewise.
1967 (aarch64_function_arg): Add the shared ZT0 flags as an extra
1968 limb of the parallel.
1969 (aarch64_init_cumulative_args): Initialize shared_zt0_flags.
1970 (aarch64_extra_live_on_entry): Handle ZT0_REGNUM.
1971 (aarch64_epilogue_uses): Likewise.
1972 (aarch64_get_zt0_save_buffer, aarch64_save_zt0): New functions.
1973 (aarch64_restore_zt0): Likewise.
1974 (aarch64_start_call_args): Reject calls to functions that share
1975 ZT0 from functions that have no ZT0 state. Save ZT0 around shared-ZA
1976 calls that do not share ZT0.
1977 (aarch64_expand_call): Handle ZT0. Reject calls to functions that
1978 share ZT0 but not ZA from functions with ZA state.
1979 (aarch64_end_call_args): Restore ZT0 after calls to shared-ZA functions
1980 that do not share ZT0.
1981 (aarch64_set_current_function): Require +sme2 for functions that
1983 (aarch64_function_attribute_inlinable_p): Don't allow functions to
1984 be inlined if they have local zt0 state.
1985 (AARCH64_IPA_CLOBBERS_ZT0): New constant.
1986 (aarch64_update_ipa_fn_target_info): Record asms that clobber ZT0.
1987 (aarch64_can_inline_p): Don't inline callees that clobber ZT0
1988 into functions that have ZT0 state.
1989 (aarch64_comp_type_attributes): Check for compatible ZT0 sharing.
1990 (aarch64_optimize_mode_switching): Use mode switching if the
1991 function has ZT0 state.
1992 (aarch64_mode_emit_local_sme_state): Save and restore ZT0 around
1993 calls to private-ZA functions.
1994 (aarch64_mode_needed_local_sme_state): Require ZA to be active
1995 for instructions that access ZT0.
1996 (aarch64_mode_entry): Mark ZA as dead on entry if the function
1997 only shares state other than "za" itself.
1998 (aarch64_mode_exit): Likewise mark ZA as dead on return.
1999 (aarch64_md_asm_adjust): Extend handling of ZA clobbers to ZT0.
2000 * config/aarch64/aarch64-c.cc (aarch64_define_unconditional_macros):
2001 Define __ARM_STATE_ZT0.
2002 * config/aarch64/aarch64-sme.md (UNSPECV_ASM_UPDATE_ZT0): New unspecv.
2003 (aarch64_asm_update_zt0): New insn.
2004 (UNSPEC_RESTORE_ZT0): New unspec.
2005 (aarch64_sme_ldr_zt0, aarch64_restore_zt0): New insns.
2006 (aarch64_sme_str_zt0): Likewise.
2008 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
2010 * config/aarch64/aarch64-modes.def (VNx32BI): New mode.
2011 * config/aarch64/aarch64-protos.h (aarch64_split_double_move): Declare.
2012 * config/aarch64/aarch64-sve-builtins.cc
2013 (register_tuple_type): Handle tuples of predicates.
2014 (handle_arm_sve_h): Define svboolx2_t as a pair of two svbool_ts.
2015 * config/aarch64/aarch64-sve.md (movvnx32bi): New insn.
2016 * config/aarch64/aarch64.cc
2017 (pure_scalable_type_info::piece::get_rtx): Use VNx32BI for pairs
2019 (pure_scalable_type_info::add_piece): Don't try to form pairs of
2021 (VEC_STRUCT): Generalize comment.
2022 (aarch64_classify_vector_mode): Handle VNx32BI.
2023 (aarch64_array_mode): Likewise. Return BLKmode for arrays of
2024 predicates that have no associated mode, rather than allowing
2025 an integer mode to be chosen.
2026 (aarch64_hard_regno_nregs): Handle VNx32BI.
2027 (aarch64_hard_regno_mode_ok): Likewise.
2028 (aarch64_split_double_move): New function, split out from...
2029 (aarch64_split_128bit_move): ...here.
2030 (aarch64_ptrue_reg): Tighten assert to aarch64_sve_pred_mode_p.
2031 (aarch64_pfalse_reg): Likewise.
2032 (aarch64_sve_same_pred_for_ptest_p): Likewise.
2033 (aarch64_sme_mode_switch_regs::add_reg): Handle VNx32BI.
2034 (aarch64_expand_mov_immediate): Restrict handling of boolean vector
2035 constants to single-predicate modes.
2036 (aarch64_classify_address): Handle VNx32BI, ensuring that both halves
2038 (aarch64_class_max_nregs): Handle VNx32BI.
2039 (aarch64_member_type_forces_blk): Don't for BLKmode for svboolx2_t.
2040 (aarch64_simd_valid_immediate): Allow all-zeros and all-ones for
2042 (aarch64_mov_operand_p): Restrict predicate constant canonicalization
2043 to single-predicate modes.
2044 (aarch64_evpc_ext): Generalize exclusion to all predicate modes.
2045 (aarch64_evpc_rev_local, aarch64_evpc_dup): Likewise.
2046 * config/aarch64/constraints.md (PR_REGS): New predicate.
2048 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
2050 * config/aarch64/aarch64-sve-builtins-base.cc
2051 (svreinterpret_impl::fold): Handle reinterprets between svbool_t
2053 (svreinterpret_impl::expand): Likewise.
2054 * config/aarch64/aarch64-sve-builtins-base.def (svreinterpret): Add
2056 * config/aarch64/aarch64-sve-builtins.cc (TYPES_reinterpret_b): New
2058 (wrap_type_in_struct, register_type_decl): New functions, split out
2060 (register_tuple_type): ...here.
2061 (register_builtin_types): Handle svcount_t.
2062 (handle_arm_sve_h): Don't create tuples of svcount_t.
2063 * config/aarch64/aarch64-sve-builtins.def (svcount_t): New type.
2064 (c): New type suffix.
2065 * config/aarch64/aarch64-sve-builtins.h (TYPE_count): New type class.
2067 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
2069 * doc/invoke.texi: Document +sme2.
2070 * doc/sourcebuild.texi: Document aarch64_sme2.
2071 * config/aarch64/aarch64-option-extensions.def (AARCH64_OPT_EXTENSION):
2073 * config/aarch64/aarch64.h (AARCH64_ISA_SME2, TARGET_SME2): New macros.
2075 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
2077 * config/aarch64/aarch64.cc (aarch64_function_ok_for_sibcall):
2078 Enforce PSTATE.SM and PSTATE.ZA restrictions.
2079 (aarch64_expand_epilogue): Save and restore the arguments
2080 to a sibcall around any change to PSTATE.SM.
2082 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
2084 * config/aarch64/aarch64.cc: Include symbol-summary.h, ipa-prop.h,
2086 (aarch64_function_attribute_inlinable_p): New function.
2087 (AARCH64_IPA_SM_FIXED, AARCH64_IPA_CLOBBERS_ZA): New constants.
2088 (aarch64_need_ipa_fn_target_info): New function.
2089 (aarch64_update_ipa_fn_target_info): Likewise.
2090 (aarch64_can_inline_p): Restrict the previous ISA flag checks
2091 to non-modal features. Prevent callees that require a particular
2092 PSTATE.SM state from being inlined into callers that can't guarantee
2093 that state. Also prevent callees that have ZA state from being
2094 inlined into callers that don't. Finally, prevent callees that
2095 clobber ZA from being inlined into callers that have ZA state.
2096 (TARGET_FUNCTION_ATTRIBUTE_INLINABLE_P): Define.
2097 (TARGET_NEED_IPA_FN_TARGET_INFO): Likewise.
2098 (TARGET_UPDATE_IPA_FN_TARGET_INFO): Likewise.
2100 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
2102 * config/aarch64/aarch64.cc: Include except.h
2103 (aarch64_sme_mode_switch_regs::add_call_preserved_reg): New function.
2104 (aarch64_sme_mode_switch_regs::add_call_preserved_regs): Likewise.
2105 (aarch64_need_old_pstate_sm): Return true if the function has
2106 a nonlocal-goto or exception receiver.
2107 (aarch64_switch_pstate_sm_for_landing_pad): New function.
2108 (aarch64_switch_pstate_sm_for_jump): Likewise.
2109 (pass_switch_pstate_sm::gate): Enable the pass for all
2110 streaming and streaming-compatible functions.
2111 (pass_switch_pstate_sm::execute): Handle non-local gotos and their
2112 receivers. Handle exception handler entry points.
2114 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
2116 * config/aarch64/aarch64.cc (aarch64_arm_attribute_table): Add
2117 arm::locally_streaming.
2118 (aarch64_fndecl_is_locally_streaming): New function.
2119 (aarch64_fndecl_sm_state): Handle locally-streaming functions.
2120 (aarch64_cfun_enables_pstate_sm): New function.
2121 (aarch64_add_offset): Add an argument that specifies whether
2122 the streaming vector length should be used instead of the
2124 (aarch64_split_add_offset, aarch64_add_sp, aarch64_sub_sp): Likewise.
2125 (aarch64_allocate_and_probe_stack_space): Likewise.
2126 (aarch64_expand_mov_immediate): Update calls accordingly.
2127 (aarch64_need_old_pstate_sm): Return true for locally-streaming
2128 streaming-compatible functions.
2129 (aarch64_layout_frame): Force all call-preserved Z and P registers
2130 to be saved and restored if the function switches PSTATE.SM in the
2132 (aarch64_get_separate_components): Disable shrink-wrapping of
2133 such Z and P saves and restores.
2134 (aarch64_use_late_prologue_epilogue): New function.
2135 (aarch64_expand_prologue): Measure SVE lengths in the streaming
2136 vector length for locally-streaming functions, then emit code
2137 to enable streaming mode.
2138 (aarch64_expand_epilogue): Likewise in reverse.
2139 (TARGET_USE_LATE_PROLOGUE_EPILOGUE): Define.
2140 * config/aarch64/aarch64-c.cc (aarch64_define_unconditional_macros):
2141 Define __arm_locally_streaming.
2143 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
2145 * doc/invoke.texi: Document +sme-i16i64 and +sme-f64f64.
2146 * config.gcc (aarch64*-*-*): Add arm_sme.h to the list of headers
2147 to install and aarch64-sve-builtins-sme.o to the list of objects
2149 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Define
2150 or undefine TARGET_SME, TARGET_SME_I16I64 and TARGET_SME_F64F64.
2151 (aarch64_pragma_aarch64): Handle arm_sme.h.
2152 * config/aarch64/aarch64-option-extensions.def (sme-i16i64)
2153 (sme-f64f64): New extensions.
2154 * config/aarch64/aarch64-protos.h (aarch64_sme_vq_immediate)
2155 (aarch64_addsvl_addspl_immediate_p, aarch64_output_addsvl_addspl)
2156 (aarch64_output_sme_zero_za): Declare.
2157 (aarch64_output_move_struct): Delete.
2158 (aarch64_sme_ldr_vnum_offset): Declare.
2159 (aarch64_sve::handle_arm_sme_h): Likewise.
2160 * config/aarch64/aarch64.h (AARCH64_ISA_SM_ON): New macro.
2161 (AARCH64_ISA_SME_I16I64, AARCH64_ISA_SME_F64F64): Likewise.
2162 (TARGET_STREAMING, TARGET_STREAMING_SME): Likewise.
2163 (TARGET_SME_I16I64, TARGET_SME_F64F64): Likewise.
2164 * config/aarch64/aarch64.cc (aarch64_sve_rdvl_factor_p): Rename to...
2165 (aarch64_sve_rdvl_addvl_factor_p): ...this.
2166 (aarch64_sve_rdvl_immediate_p): Update accordingly.
2167 (aarch64_rdsvl_immediate_p, aarch64_add_offset): Likewise.
2168 (aarch64_sme_vq_immediate): Likewise. Make public.
2169 (aarch64_sve_addpl_factor_p): New function.
2170 (aarch64_sve_addvl_addpl_immediate_p): Use
2171 aarch64_sve_rdvl_addvl_factor_p and aarch64_sve_addpl_factor_p.
2172 (aarch64_addsvl_addspl_immediate_p): New function.
2173 (aarch64_output_addsvl_addspl): Likewise.
2174 (aarch64_cannot_force_const_mem): Return true for RDSVL immediates.
2175 (aarch64_classify_index): Handle .Q scaling for VNx1TImode.
2176 (aarch64_classify_address): Likewise for vnum offsets.
2177 (aarch64_output_sme_zero_za): New function.
2178 (aarch64_sme_ldr_vnum_offset_p): Likewise.
2179 * config/aarch64/predicates.md (aarch64_addsvl_addspl_immediate):
2181 (aarch64_pluslong_operand): Include it for SME.
2182 * config/aarch64/constraints.md (Ucj, Uav): New constraints.
2183 * config/aarch64/iterators.md (VNx1TI_ONLY): New mode iterator.
2184 (SME_ZA_I, SME_ZA_SDI, SME_ZA_SDF_I, SME_MOP_BHI): Likewise.
2185 (SME_MOP_HSDF): Likewise.
2186 (UNSPEC_SME_ADDHA, UNSPEC_SME_ADDVA, UNSPEC_SME_FMOPA)
2187 (UNSPEC_SME_FMOPS, UNSPEC_SME_LD1_HOR, UNSPEC_SME_LD1_VER)
2188 (UNSPEC_SME_READ_HOR, UNSPEC_SME_READ_VER, UNSPEC_SME_SMOPA)
2189 (UNSPEC_SME_SMOPS, UNSPEC_SME_ST1_HOR, UNSPEC_SME_ST1_VER)
2190 (UNSPEC_SME_SUMOPA, UNSPEC_SME_SUMOPS, UNSPEC_SME_UMOPA)
2191 (UNSPEC_SME_UMOPS, UNSPEC_SME_USMOPA, UNSPEC_SME_USMOPS)
2192 (UNSPEC_SME_WRITE_HOR, UNSPEC_SME_WRITE_VER): New unspecs.
2193 (elem_bits): Handle x2 and x4 structure modes, plus VNx1TI.
2194 (Vetype, Vesize, VPRED): Handle VNx1TI.
2195 (b): New mode attribute.
2196 (SME_LD1, SME_READ, SME_ST1, SME_WRITE, SME_BINARY_SDI, SME_INT_MOP)
2197 (SME_FP_MOP): New int iterators.
2198 (optab): Handle SME unspecs.
2199 (hv): New int attribute.
2200 * config/aarch64/aarch64.md (*add<mode>3_aarch64): Handle ADDSVL
2202 * config/aarch64/aarch64-sme.md (UNSPEC_SME_LDR): New unspec.
2203 (@aarch64_sme_<optab><mode>, @aarch64_sme_<optab><mode>_plus)
2204 (aarch64_sme_ldr0, @aarch64_sme_ldrn<mode>): New patterns.
2205 (UNSPEC_SME_STR): New unspec.
2206 (@aarch64_sme_<optab><mode>, @aarch64_sme_<optab><mode>_plus)
2207 (aarch64_sme_str0, @aarch64_sme_strn<mode>): New patterns.
2208 (@aarch64_sme_<optab><v_int_container><mode>): Likewise.
2209 (*aarch64_sme_<optab><v_int_container><mode>_plus): Likewise.
2210 (@aarch64_sme_<optab><VNx1TI_ONLY:mode><SVE_FULL:mode>): Likewise.
2211 (@aarch64_sme_<optab><v_int_container><mode>): Likewise.
2212 (*aarch64_sme_<optab><v_int_container><mode>_plus): Likewise.
2213 (@aarch64_sme_<optab><VNx1TI_ONLY:mode><SVE_FULL:mode>): Likewise.
2214 (UNSPEC_SME_ZERO): New unspec.
2215 (aarch64_sme_zero): New pattern.
2216 (@aarch64_sme_<SME_BINARY_SDI:optab><mode>): Likewise.
2217 (@aarch64_sme_<SME_INT_MOP:optab><mode>): Likewise.
2218 (@aarch64_sme_<SME_FP_MOP:optab><mode>): Likewise.
2219 * config/aarch64/aarch64-sve-builtins.def: Add ZA type suffixes.
2220 Include aarch64-sve-builtins-sme.def.
2221 (DEF_SME_ZA_FUNCTION): New macro.
2222 * config/aarch64/aarch64-sve-builtins.h (CP_READ_ZA): New call
2224 (CP_WRITE_ZA): Likewise.
2225 (PRED_za_m): New predication type.
2226 (type_suffix_index): Handle DEF_SME_ZA_SUFFIX.
2227 (type_suffix_info): Add vector_p and za_p fields.
2228 (function_instance::num_za_tiles): New member function.
2229 (function_builder::get_attributes): Add an aarch64_feature_flags
2231 (function_expander::get_contiguous_base): Take a base argument
2232 number, a vnum argument number, and an argument that indicates
2233 whether the vnum parameter is a factor of the SME vector length
2234 or the prevailing vector length.
2235 (function_expander::add_integer_operand): Take a poly_int64.
2236 (sve_switcher::sve_switcher): Take a base set of flags.
2237 (sme_switcher): New class.
2238 (scalar_types): Add a null entry for NUM_VECTOR_TYPES.
2239 * config/aarch64/aarch64-sve-builtins.cc: Include
2240 aarch64-sve-builtins-sme.h.
2241 (pred_suffixes): Add an entry for PRED_za_m.
2242 (type_suffixes): Initialize vector_p and za_p. Handle ZA suffixes.
2243 (TYPES_all_za, TYPES_d_za, TYPES_za_bhsd_data, TYPES_za_all_data)
2244 (TYPES_za_s_integer, TYPES_za_d_integer, TYPES_mop_base)
2245 (TYPES_mop_base_signed, TYPES_mop_base_unsigned, TYPES_mop_i16i64)
2246 (TYPES_mop_i16i64_signed, TYPES_mop_i16i64_unsigned, TYPES_za): New
2248 (preds_m, preds_za_m): New predication lists.
2249 (function_groups): Handle DEF_SME_ZA_FUNCTION.
2250 (scalar_types): Add an entry for NUM_VECTOR_TYPES.
2251 (find_type_suffix_for_scalar_type): Check positively for vectors
2252 rather than negatively for predicates.
2253 (check_required_extensions): Handle PSTATE.SM and PSTATE.ZA
2255 (report_out_of_range): Handle the case where the minimum and
2256 maximum are the same.
2257 (function_instance::reads_global_state_p): Return true for functions
2259 (function_instance::modifies_global_state_p): Return true for functions
2261 (sve_switcher::sve_switcher): Add a base flags argument.
2262 (function_builder::get_name): Handle "__arm_" prefixes.
2263 (add_attribute): Add an overload that takes a namespaces.
2264 (add_shared_state_attribute): New function.
2265 (function_builder::get_attributes): Take the required feature flags
2266 as argument. Add streaming and ZA attributes where appropriate.
2267 (function_builder::add_unique_function): Update calls accordingly.
2268 (function_resolver::check_gp_argument): Assert that the predication
2269 isn't ZA _m predication.
2270 (function_checker::function_checker): Don't bias the argument
2271 number for ZA _m predication.
2272 (function_expander::get_contiguous_base): Add arguments that
2273 specify the base argument number, the vnum argument number,
2274 and an argument that indicates whether the vnum parameter is
2275 a factor of the SME vector length or the prevailing vector length.
2276 Handle the SME case.
2277 (function_expander::add_input_operand): Handle pmode_register_operand.
2278 (function_expander::add_integer_operand): Take a poly_int64.
2279 (init_builtins): Call handle_arm_sme_h for LTO.
2280 (handle_arm_sve_h): Skip SME intrinsics.
2281 (handle_arm_sme_h): New function.
2282 * config/aarch64/aarch64-sve-builtins-functions.h
2283 (read_write_za, write_za): New classes.
2284 (unspec_based_sme_function, za_arith_function): New using aliases.
2285 (quiet_za_arith_function): Likewise.
2286 * config/aarch64/aarch64-sve-builtins-shapes.h
2287 (binary_za_int_m, binary_za_m, binary_za_uint_m, bool_inherent)
2288 (inherent_za, inherent_mask_za, ldr_za, load_za, read_za_m, store_za)
2289 (str_za, unary_za_m, write_za_m): Declare.
2290 * config/aarch64/aarch64-sve-builtins-shapes.cc (apply_predication):
2291 Expect za_m functions to have an existing governing predicate.
2292 (binary_za_m_base, binary_za_int_m_def, binary_za_m_def): New classes.
2293 (binary_za_uint_m_def, bool_inherent_def, inherent_za_def): Likewise.
2294 (inherent_mask_za_def, ldr_za_def, load_za_def, read_za_m_def)
2295 (store_za_def, str_za_def, unary_za_m_def, write_za_m_def): Likewise.
2296 * config/aarch64/arm_sme.h: New file.
2297 * config/aarch64/aarch64-sve-builtins-sme.h: Likewise.
2298 * config/aarch64/aarch64-sve-builtins-sme.cc: Likewise.
2299 * config/aarch64/aarch64-sve-builtins-sme.def: Likewise.
2300 * config/aarch64/t-aarch64 (aarch64-sve-builtins.o): Depend on
2301 aarch64-sve-builtins-sme.def and aarch64-sve-builtins-sme.h.
2302 (aarch64-sve-builtins-sme.o): New rule.
2304 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
2306 * config/aarch64/aarch64-sve-builtins.h
2307 (function_shape::has_merge_argument_p): New member function.
2308 * config/aarch64/aarch64-sve-builtins.cc:
2309 (function_resolver::check_gp_argument): Use it.
2310 (function_expander::get_fallback_value): Likewise.
2311 * config/aarch64/aarch64-sve-builtins-shapes.cc
2312 (apply_predication): Likewise.
2313 (unary_convert_narrowt_def::has_merge_argument_p): New function.
2315 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
2317 * config/aarch64/aarch64-sve-builtins-functions.h
2318 (unspec_based_function_base): Allow type suffix 1 to determine
2319 the mode of the operation.
2320 (unspec_based_function): Update accordingly.
2321 (unspec_based_fused_function): Likewise.
2322 (unspec_based_fused_lane_function): Likewise.
2324 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
2326 * config/aarch64/aarch64-modes.def: Add VNx1TI.
2328 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
2330 * config/aarch64/aarch64.h (W12_W15_REGNUM_P): New macro.
2331 (W12_W15_REGS): New register class.
2332 (REG_CLASS_NAMES, REG_CLASS_CONTENTS): Add entries for it.
2333 * config/aarch64/aarch64.cc (aarch64_regno_regclass)
2334 (aarch64_class_max_nregs, aarch64_register_move_cost): Handle
2337 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
2339 * config/aarch64/aarch64-isa-modes.def (ZA_ON): New ISA mode.
2340 * config/aarch64/aarch64-protos.h (aarch64_rdsvl_immediate_p)
2341 (aarch64_output_rdsvl, aarch64_optimize_mode_switching)
2342 (aarch64_restore_za): Declare.
2343 * config/aarch64/constraints.md (UsR): New constraint.
2344 * config/aarch64/aarch64.md (LOWERING_REGNUM, TPIDR_BLOCK_REGNUM)
2345 (SME_STATE_REGNUM, TPIDR2_SETUP_REGNUM, ZA_FREE_REGNUM)
2346 (ZA_SAVED_REGNUM, ZA_REGNUM, FIRST_FAKE_REGNUM): New constants.
2347 (LAST_FAKE_REGNUM): Likewise.
2348 (UNSPEC_SAVE_NZCV, UNSPEC_RESTORE_NZCV, UNSPEC_SME_VQ): New unspecs.
2350 (arch_enabled): Handle it.
2351 (*cb<optab><mode>1): Rename to...
2352 (aarch64_cb<optab><mode>1): ...this.
2353 (*movsi_aarch64): Add an alternative for RDSVL.
2354 (*movdi_aarch64): Likewise.
2355 (aarch64_save_nzcv, aarch64_restore_nzcv): New insns.
2356 * config/aarch64/aarch64-sme.md (UNSPEC_SMSTOP_ZA)
2357 (UNSPEC_INITIAL_ZERO_ZA, UNSPEC_TPIDR2_SAVE, UNSPEC_TPIDR2_RESTORE)
2358 (UNSPEC_READ_TPIDR2, UNSPEC_WRITE_TPIDR2, UNSPEC_SETUP_LOCAL_TPIDR2)
2359 (UNSPEC_RESTORE_ZA, UNSPEC_START_PRIVATE_ZA_CALL): New unspecs.
2360 (UNSPEC_END_PRIVATE_ZA_CALL, UNSPEC_COMMIT_LAZY_SAVE): Likewise.
2361 (UNSPECV_ASM_UPDATE_ZA): New unspecv.
2362 (aarch64_tpidr2_save, aarch64_smstart_za, aarch64_smstop_za)
2363 (aarch64_initial_zero_za, aarch64_setup_local_tpidr2)
2364 (aarch64_clear_tpidr2, aarch64_write_tpidr2, aarch64_read_tpidr2)
2365 (aarch64_tpidr2_restore, aarch64_restore_za, aarch64_asm_update_za)
2366 (aarch64_start_private_za_call, aarch64_end_private_za_call)
2367 (aarch64_commit_lazy_save): New patterns.
2368 * config/aarch64/aarch64.h (AARCH64_ISA_ZA_ON, TARGET_ZA): New macros.
2369 (FIXED_REGISTERS, REGISTER_NAMES): Add the new fake ZA registers.
2370 (CALL_USED_REGISTERS): Replace with...
2371 (CALL_REALLY_USED_REGISTERS): ...this and add the fake ZA registers.
2372 (FIRST_PSEUDO_REGISTER): Bump to include the fake ZA registers.
2373 (FAKE_REGS): New register class.
2374 (REG_CLASS_NAMES): Update accordingly.
2375 (REG_CLASS_CONTENTS): Likewise.
2376 (machine_function::tpidr2_block): New member variable.
2377 (machine_function::tpidr2_block_ptr): Likewise.
2378 (machine_function::za_save_buffer): Likewise.
2379 (machine_function::next_asm_update_za_id): Likewise.
2380 (CUMULATIVE_ARGS::shared_za_flags): Likewise.
2381 (aarch64_mode_entity, aarch64_local_sme_state): New enums.
2382 (aarch64_tristate_mode): Likewise.
2383 (OPTIMIZE_MODE_SWITCHING, NUM_MODES_FOR_MODE_SWITCHING): Define.
2384 * config/aarch64/aarch64.cc (AARCH64_STATE_SHARED, AARCH64_STATE_IN)
2385 (AARCH64_STATE_OUT): New constants.
2386 (aarch64_attribute_shared_state_flags): New function.
2387 (aarch64_lookup_shared_state_flags, aarch64_fndecl_has_new_state)
2388 (aarch64_check_state_string, cmp_string_csts): Likewise.
2389 (aarch64_merge_string_arguments, aarch64_check_arm_new_against_type)
2390 (handle_arm_new, handle_arm_shared): Likewise.
2391 (handle_arm_new_za_attribute): New
2392 (aarch64_arm_attribute_table): Add new, preserves, in, out, and inout.
2393 (aarch64_hard_regno_nregs): Handle FAKE_REGS.
2394 (aarch64_hard_regno_mode_ok): Likewise.
2395 (aarch64_fntype_shared_flags, aarch64_fntype_pstate_za): New functions.
2396 (aarch64_fntype_isa_mode): Include aarch64_fntype_pstate_za.
2397 (aarch64_fndecl_has_state, aarch64_fndecl_pstate_za): New functions.
2398 (aarch64_fndecl_isa_mode): Include aarch64_fndecl_pstate_za.
2399 (aarch64_cfun_incoming_pstate_za, aarch64_cfun_shared_flags)
2400 (aarch64_cfun_has_new_state, aarch64_cfun_has_state): New functions.
2401 (aarch64_sme_vq_immediate, aarch64_sme_vq_unspec_p): Likewise.
2402 (aarch64_rdsvl_immediate_p, aarch64_output_rdsvl): Likewise.
2403 (aarch64_expand_mov_immediate): Handle RDSVL immediates.
2404 (aarch64_function_arg): Add the ZA sharing flags as a third limb
2406 (aarch64_init_cumulative_args): Record the ZA sharing flags.
2407 (aarch64_extra_live_on_entry): New function. Handle the new
2408 ZA-related fake registers.
2409 (aarch64_epilogue_uses): Handle the new ZA-related fake registers.
2410 (aarch64_cannot_force_const_mem): Handle UNSPEC_SME_VQ constants.
2411 (aarch64_get_tpidr2_block, aarch64_get_tpidr2_ptr): New functions.
2412 (aarch64_init_tpidr2_block, aarch64_restore_za): Likewise.
2413 (aarch64_layout_frame): Check whether the current function creates
2414 new ZA state. Record that it clobbers LR if so.
2415 (aarch64_expand_prologue): Handle functions that create new ZA state.
2416 (aarch64_expand_epilogue): Likewise.
2417 (aarch64_create_tpidr2_block): New function.
2418 (aarch64_restore_za): Likewise.
2419 (aarch64_start_call_args): Disallow calls to shared-ZA functions
2420 from functions that have no ZA state. Emit a marker instruction
2421 before calls to private-ZA functions from functions that have
2423 (aarch64_expand_call): Add return registers for state that is
2424 managed via attributes. Record the use and clobber information
2425 for the ZA registers.
2426 (aarch64_end_call_args): New function.
2427 (aarch64_regno_regclass): Handle FAKE_REGS.
2428 (aarch64_class_max_nregs): Likewise.
2429 (aarch64_override_options_internal): Require TARGET_SME for
2430 functions that have ZA state.
2431 (aarch64_conditional_register_usage): Handle FAKE_REGS.
2432 (aarch64_mov_operand_p): Handle RDSVL immediates.
2433 (aarch64_comp_type_attributes): Check that the ZA sharing flags
2435 (aarch64_merge_decl_attributes): New function.
2436 (aarch64_optimize_mode_switching, aarch64_mode_emit_za_save_buffer)
2437 (aarch64_mode_emit_local_sme_state, aarch64_mode_emit): Likewise.
2438 (aarch64_insn_references_sme_state_p): Likewise.
2439 (aarch64_mode_needed_local_sme_state): Likewise.
2440 (aarch64_mode_needed_za_save_buffer, aarch64_mode_needed): Likewise.
2441 (aarch64_mode_after_local_sme_state, aarch64_mode_after): Likewise.
2442 (aarch64_local_sme_confluence, aarch64_mode_confluence): Likewise.
2443 (aarch64_one_shot_backprop, aarch64_local_sme_backprop): Likewise.
2444 (aarch64_mode_backprop, aarch64_mode_entry): Likewise.
2445 (aarch64_mode_exit, aarch64_mode_eh_handler): Likewise.
2446 (aarch64_mode_priority, aarch64_md_asm_adjust): Likewise.
2447 (TARGET_END_CALL_ARGS, TARGET_MERGE_DECL_ATTRIBUTES): Define.
2448 (TARGET_MODE_EMIT, TARGET_MODE_NEEDED, TARGET_MODE_AFTER): Likewise.
2449 (TARGET_MODE_CONFLUENCE, TARGET_MODE_BACKPROP): Likewise.
2450 (TARGET_MODE_ENTRY, TARGET_MODE_EXIT): Likewise.
2451 (TARGET_MODE_EH_HANDLER, TARGET_MODE_PRIORITY): Likewise.
2452 (TARGET_EXTRA_LIVE_ON_ENTRY): Likewise.
2453 (TARGET_MD_ASM_ADJUST): Use aarch64_md_asm_adjust.
2454 * config/aarch64/aarch64-c.cc (aarch64_define_unconditional_macros):
2455 Define __arm_new, __arm_preserves,__arm_in, __arm_out, and __arm_inout.
2457 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
2459 * config/aarch64/aarch64-passes.def
2460 (pass_late_thread_prologue_and_epilogue): New pass.
2461 * config/aarch64/aarch64-sme.md: New file.
2462 * config/aarch64/aarch64.md: Include it.
2463 (*tb<optab><mode>1): Rename to...
2464 (@aarch64_tb<optab><mode>): ...this.
2465 (call, call_value, sibcall, sibcall_value): Don't require operand 2
2467 * config/aarch64/aarch64-protos.h (aarch64_emit_call_insn): Return
2469 (make_pass_switch_sm_state): Declare.
2470 * config/aarch64/aarch64.h (TARGET_STREAMING_COMPATIBLE): New macro.
2471 (CALL_USED_REGISTER): Mark VG as call-preserved.
2472 (aarch64_frame::old_svcr_offset): New member variable.
2473 (machine_function::call_switches_sm_state): Likewise.
2474 (CUMULATIVE_ARGS::num_sme_mode_switch_args): Likewise.
2475 (CUMULATIVE_ARGS::sme_mode_switch_args): Likewise.
2476 * config/aarch64/aarch64.cc: Include tree-pass.h and cfgbuild.h.
2477 (aarch64_cfun_incoming_pstate_sm): New function.
2478 (aarch64_call_switches_pstate_sm): Likewise.
2479 (aarch64_reg_save_mode): Return DImode for VG_REGNUM.
2480 (aarch64_callee_isa_mode): New function.
2481 (aarch64_insn_callee_isa_mode): Likewise.
2482 (aarch64_guard_switch_pstate_sm): Likewise.
2483 (aarch64_switch_pstate_sm): Likewise.
2484 (aarch64_sme_mode_switch_regs): New class.
2485 (aarch64_record_sme_mode_switch_args): New function.
2486 (aarch64_finish_sme_mode_switch_args): Likewise.
2487 (aarch64_function_arg): Handle the end marker by returning a
2488 PARALLEL that contains the ABI cookie that we used previously
2489 alongside the result of aarch64_finish_sme_mode_switch_args.
2490 (aarch64_init_cumulative_args): Initialize num_sme_mode_switch_args.
2491 (aarch64_function_arg_advance): If a call would switch SM state,
2492 record all argument registers that would need to be saved around
2494 (aarch64_need_old_pstate_sm): New function.
2495 (aarch64_layout_frame): Decide whether the frame needs to store the
2496 incoming value of PSTATE.SM and allocate a save slot for it if so.
2497 If a function switches SME state, arrange to save the old value
2498 of the DWARF VG register. Handle the case where this is the only
2499 register save slot above the FP.
2500 (aarch64_save_callee_saves): Handles saves of the DWARF VG register.
2501 (aarch64_get_separate_components): Prevent such saves from being
2503 (aarch64_old_svcr_mem): New function.
2504 (aarch64_read_old_svcr): Likewise.
2505 (aarch64_guard_switch_pstate_sm): Likewise.
2506 (aarch64_expand_prologue): Handle saves of the DWARF VG register.
2507 Initialize any SVCR save slot.
2508 (aarch64_expand_call): Allow the cookie to be PARALLEL that contains
2509 both the UNSPEC_CALLEE_ABI value and a list of registers that need
2510 to be preserved across a change to PSTATE.SM. If the call does
2511 involve such a change to PSTATE.SM, record the registers that
2512 would be clobbered by this process. Also emit an instruction
2513 to mark the temporary change in VG. Update call_switches_pstate_sm.
2514 (aarch64_emit_call_insn): Return the emitted instruction.
2515 (aarch64_frame_pointer_required): New function.
2516 (aarch64_conditional_register_usage): Prevent VG_REGNUM from being
2517 treated as a register operand.
2518 (aarch64_switch_pstate_sm_for_call): New function.
2519 (pass_data_switch_pstate_sm): New pass variable.
2520 (pass_switch_pstate_sm): New pass class.
2521 (make_pass_switch_pstate_sm): New function.
2522 (TARGET_FRAME_POINTER_REQUIRED): Define.
2523 * config/aarch64/t-aarch64 (s-check-sve-md): Add aarch64-sme.md.
2525 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
2527 * config/aarch64/aarch64.h (TARGET_NON_STREAMING): New macro.
2528 (TARGET_SVE2_AES, TARGET_SVE2_BITPERM): Use it.
2529 (TARGET_SVE2_SHA3, TARGET_SVE2_SM4): Likewise.
2530 * config/aarch64/aarch64-sve-builtins-base.def: Separate out
2531 the functions that require PSTATE.SM to be 0 and guard them
2532 with AARCH64_FL_SM_OFF.
2533 * config/aarch64/aarch64-sve-builtins-sve2.def: Likewise.
2534 * config/aarch64/aarch64-sve-builtins.cc (check_required_extensions):
2535 Enforce AARCH64_FL_SM_OFF requirements.
2536 * config/aarch64/aarch64-sve.md (aarch64_wrffr): Require
2537 TARGET_NON_STREAMING
2538 (aarch64_rdffr, aarch64_rdffr_z, *aarch64_rdffr_z_ptest): Likewise.
2539 (*aarch64_rdffr_ptest, *aarch64_rdffr_z_cc, *aarch64_rdffr_cc)
2540 (@aarch64_ld<fn>f1<mode>): Likewise.
2541 (@aarch64_ld<fn>f1_<ANY_EXTEND:optab><SVE_HSDI:mode><SVE_PARTIAL_I:mode>)
2542 (gather_load<mode><v_int_container>): Likewise
2543 (mask_gather_load<mode><v_int_container>): Likewise.
2544 (mask_gather_load<mode><v_int_container>): Likewise.
2545 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
2546 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
2547 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
2548 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>)
2549 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
2550 <SVE_2BHSI:mode>): Likewise.
2551 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
2552 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked)
2553 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
2554 <SVE_2BHSI:mode>_sxtw): Likewise.
2555 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
2556 <SVE_2BHSI:mode>_uxtw): Likewise.
2557 (@aarch64_ldff1_gather<mode>, @aarch64_ldff1_gather<mode>): Likewise.
2558 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
2559 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
2560 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
2561 <VNx4_NARROW:mode>): Likewise.
2562 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
2563 <VNx2_NARROW:mode>): Likewise.
2564 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
2565 <VNx2_NARROW:mode>_sxtw): Likewise.
2566 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
2567 <VNx2_NARROW:mode>_uxtw): Likewise.
2568 (@aarch64_sve_gather_prefetch<SVE_FULL_I:mode><VNx4SI_ONLY:mode>)
2569 (@aarch64_sve_gather_prefetch<SVE_FULL_I:mode><VNx2DI_ONLY:mode>)
2570 (*aarch64_sve_gather_prefetch<SVE_FULL_I:mode><VNx2DI_ONLY:mode>_sxtw)
2571 (*aarch64_sve_gather_prefetch<SVE_FULL_I:mode><VNx2DI_ONLY:mode>_uxtw)
2572 (scatter_store<mode><v_int_container>): Likewise.
2573 (mask_scatter_store<mode><v_int_container>): Likewise.
2574 (*mask_scatter_store<mode><v_int_container>_<su>xtw_unpacked)
2575 (*mask_scatter_store<mode><v_int_container>_sxtw): Likewise.
2576 (*mask_scatter_store<mode><v_int_container>_uxtw): Likewise.
2577 (@aarch64_scatter_store_trunc<VNx4_NARROW:mode><VNx4_WIDE:mode>)
2578 (@aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>)
2579 (*aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>_sxtw)
2580 (*aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>_uxtw)
2581 (@aarch64_sve_ld1ro<mode>, @aarch64_adr<mode>): Likewise.
2582 (*aarch64_adr_sxtw, *aarch64_adr_uxtw_unspec): Likewise.
2583 (*aarch64_adr_uxtw_and, @aarch64_adr<mode>_shift): Likewise.
2584 (*aarch64_adr<mode>_shift, *aarch64_adr_shift_sxtw): Likewise.
2585 (*aarch64_adr_shift_uxtw, @aarch64_sve_add_<optab><vsi2qi>): Likewise.
2586 (@aarch64_sve_<sve_fp_op><mode>, fold_left_plus_<mode>): Likewise.
2587 (mask_fold_left_plus_<mode>, @aarch64_sve_compact<mode>): Likewise.
2588 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>)
2589 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
2590 <SVE_PARTIAL_I:mode>): Likewise.
2591 (@aarch64_sve2_histcnt<mode>, @aarch64_sve2_histseg<mode>): Likewise.
2592 (@aarch64_pred_<SVE2_MATCH:sve_int_op><mode>): Likewise.
2593 (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_cc): Likewise.
2594 (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_ptest): Likewise.
2595 * config/aarch64/iterators.md (SVE_FP_UNARY_INT): Make FEXPA
2596 depend on TARGET_NON_STREAMING.
2597 (SVE_BFLOAT_TERNARY_LONG): Likewise BFMMLA.
2599 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
2601 * config/aarch64/aarch64.h (TARGET_BASE_SIMD): New macro.
2602 (TARGET_SIMD): Require PSTATE.SM to be 0.
2603 (AARCH64_ISA_SM_OFF): New macro.
2604 * config/aarch64/aarch64.cc (aarch64_array_mode_supported_p):
2605 Allow Advanced SIMD structure modes for TARGET_BASE_SIMD.
2606 (aarch64_print_operand): Support '%Z'.
2607 (aarch64_secondary_reload): Expect SVE moves to be used for
2608 Advanced SIMD modes if SVE is enabled and non-streaming
2609 Advanced SIMD isn't.
2610 (aarch64_register_move_cost): Likewise.
2611 (aarch64_simd_container_mode): Extend Advanced SIMD mode
2612 handling to TARGET_BASE_SIMD.
2613 (aarch64_expand_cpymem): Expand commentary.
2614 * config/aarch64/aarch64.md (arches): Add base_simd and nobase_simd.
2615 (arch_enabled): Handle it.
2616 (*mov<mode>_aarch64): Extend UMOV alternative to TARGET_BASE_SIMD.
2617 (*movti_aarch64): Use an SVE move instruction if non-streaming
2618 SIMD isn't available.
2619 (*mov<TFD:mode>_aarch64): Likewise.
2620 (load_pair_dw_tftf): Extend to TARGET_BASE_SIMD.
2621 (store_pair_dw_tftf): Likewise.
2622 (loadwb_pair<TX:mode>_<P:mode>): Likewise.
2623 (storewb_pair<TX:mode>_<P:mode>): Likewise.
2624 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>):
2625 Allow UMOV in streaming mode.
2626 (*aarch64_simd_mov<VQMOV:mode>): Use an SVE move instruction
2627 if non-streaming SIMD isn't available.
2628 (aarch64_store_lane0<mode>): Depend on TARGET_FLOAT rather than
2630 (aarch64_simd_mov_from_<mode>low): Likewise. Use fmov if
2631 Advanced SIMD is completely disabled.
2632 (aarch64_simd_mov_from_<mode>high): Use SVE EXT instructions if
2633 non-streaming SIMD isn't available.
2635 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
2637 * doc/invoke.texi: Document SME.
2638 * doc/sourcebuild.texi: Document aarch64_sve.
2639 * config/aarch64/aarch64-option-extensions.def (sme): Define.
2640 * config/aarch64/aarch64.h (AARCH64_ISA_SME): New macro.
2641 (TARGET_SME): Likewise.
2642 * config/aarch64/aarch64.cc (aarch64_override_options_internal):
2643 Ensure that SME is present when compiling streaming code.
2645 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
2647 * config/aarch64/aarch64-isa-modes.def: New file.
2648 * config/aarch64/aarch64.h: Include it in the feature enumerations.
2649 (AARCH64_FL_SM_STATE, AARCH64_FL_ISA_MODES): New constants.
2650 (AARCH64_FL_DEFAULT_ISA_MODE): Likewise.
2651 (AARCH64_ISA_MODE): New macro.
2652 (CUMULATIVE_ARGS): Add an isa_mode field.
2653 * config/aarch64/aarch64-protos.h (aarch64_gen_callee_cookie): Declare.
2654 (aarch64_tlsdesc_abi_id): Return an arm_pcs.
2655 * config/aarch64/aarch64.cc (attr_streaming_exclusions)
2656 (aarch64_gnu_attributes, aarch64_gnu_attribute_table)
2657 (aarch64_arm_attributes, aarch64_arm_attribute_table): New tables.
2658 (aarch64_attribute_table): Redefine to include the gnu and arm
2660 (aarch64_fntype_pstate_sm, aarch64_fntype_isa_mode): New functions.
2661 (aarch64_fndecl_pstate_sm, aarch64_fndecl_isa_mode): Likewise.
2662 (aarch64_gen_callee_cookie, aarch64_callee_abi): Likewise.
2663 (aarch64_insn_callee_cookie, aarch64_insn_callee_abi): Use them.
2664 (aarch64_function_arg, aarch64_output_mi_thunk): Likewise.
2665 (aarch64_init_cumulative_args): Initialize the isa_mode field.
2666 (aarch64_output_mi_thunk): Use aarch64_gen_callee_cookie to get
2668 (aarch64_override_options): Add the ISA mode to the feature set.
2669 (aarch64_temporary_target::copy_from_fndecl): Likewise.
2670 (aarch64_fndecl_options, aarch64_handle_attr_arch): Likewise.
2671 (aarch64_set_current_function): Maintain the correct ISA mode.
2672 (aarch64_tlsdesc_abi_id): Return an arm_pcs.
2673 (aarch64_comp_type_attributes): Handle arm::streaming and
2674 arm::streaming_compatible.
2675 * config/aarch64/aarch64-c.cc (aarch64_define_unconditional_macros):
2676 Define __arm_streaming and __arm_streaming_compatible.
2677 * config/aarch64/aarch64.md (tlsdesc_small_<mode>): Use
2678 aarch64_gen_callee_cookie to get the ABI cookie.
2679 * config/aarch64/t-aarch64 (TM_H): Add all feature-related .def files.
2681 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
2683 * config/aarch64/aarch64-sve-builtins-base.cc
2684 (svreinterpret_impl::fold): Punt on tuple forms.
2685 (svreinterpret_impl::expand): Use tuple_mode instead of vector_mode.
2686 * config/aarch64/aarch64-sve-builtins-base.def (svreinterpret):
2687 Extend to x1234 groups.
2688 * config/aarch64/aarch64-sve-builtins-functions.h
2689 (multi_vector_function::vectors_per_tuple): If the function has
2690 a group suffix, get the number of vectors from there.
2691 * config/aarch64/aarch64-sve-builtins-shapes.h (reinterpret): Declare.
2692 * config/aarch64/aarch64-sve-builtins-shapes.cc (reinterpret_def)
2693 (reinterpret): New function shape.
2694 * config/aarch64/aarch64-sve-builtins.cc (function_groups): Handle
2695 DEF_SVE_FUNCTION_GS.
2696 * config/aarch64/aarch64-sve-builtins.def (DEF_SVE_FUNCTION_GS): New
2698 (DEF_SVE_FUNCTION): Forward to DEF_SVE_FUNCTION_GS by default.
2699 * config/aarch64/aarch64-sve-builtins.h
2700 (function_instance::tuple_mode): New member function.
2701 (function_base::vectors_per_tuple): Take the function instance
2702 as argument and get the number from the group suffix.
2703 (function_instance::vectors_per_tuple): Update accordingly.
2704 * config/aarch64/iterators.md (SVE_FULLx2, SVE_FULLx3, SVE_FULLx4)
2705 (SVE_ALL_STRUCT): New mode iterators.
2706 (SVE_STRUCT): Redefine in terms of SVE_FULL*.
2707 * config/aarch64/aarch64-sve.md (@aarch64_sve_reinterpret<mode>)
2708 (*aarch64_sve_reinterpret<mode>): Extend to SVE structure modes.
2710 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
2712 * config/aarch64/aarch64-sve-builtins.cc
2713 (function_resolver::require_derived_vector_type): Add a specific
2714 error message for the case in which the caller wants a single
2715 vector whose element type matches a previous tuyple argument.
2717 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
2719 * config/aarch64/aarch64-sve-builtins.h
2720 (function_resolver::lookup_form): Add an overload that takes
2721 an sve_type rather than type and group suffixes.
2722 (function_resolver::resolve_to): Likewise.
2723 (function_resolver::infer_vector_or_tuple_type): Return an sve_type.
2724 (function_resolver::infer_tuple_type): Likewise.
2725 (function_resolver::require_matching_vector_type): Take an sve_type
2726 rather than a type_suffix_index.
2727 (function_resolver::require_derived_vector_type): Likewise.
2728 * config/aarch64/aarch64-sve-builtins.cc (num_vectors_to_group):
2730 (function_resolver::lookup_form): Add an overload that takes
2731 an sve_type rather than type and group suffixes.
2732 (function_resolver::resolve_to): Likewise.
2733 (function_resolver::infer_vector_or_tuple_type): Return an sve_type.
2734 (function_resolver::infer_tuple_type): Likewise.
2735 (function_resolver::infer_vector_type): Update accordingly.
2736 (function_resolver::require_matching_vector_type): Take an sve_type
2737 rather than a type_suffix_index.
2738 (function_resolver::require_derived_vector_type): Likewise.
2739 * config/aarch64/aarch64-sve-builtins-shapes.cc (get_def::resolve)
2740 (set_def::resolve, store_def::resolve, tbl_tuple_def::resolve): Update
2743 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
2745 * config/aarch64/aarch64-sve-builtins.h
2746 (function_resolver::require_matching_vector_type): Add a parameter
2747 that specifies the number of the earlier argument that is being
2749 * config/aarch64/aarch64-sve-builtins.cc
2750 (function_resolver::require_matching_vector_type): Likewise.
2751 (require_derived_vector_type): Update calls accordingly.
2752 (function_resolver::resolve_unary): Likewise.
2753 (function_resolver::resolve_uniform): Likewise.
2754 (function_resolver::resolve_uniform_opt_n): Likewise.
2755 * config/aarch64/aarch64-sve-builtins-shapes.cc
2756 (binary_long_lane_def::resolve): Likewise.
2757 (clast_def::resolve, ternary_uint_def::resolve): Likewise.
2759 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
2761 * config/aarch64/aarch64-sve-builtins.h
2762 (function_resolver::infer_sve_type): New member function.
2763 (function_resolver::report_incorrect_num_vectors): Likewise.
2764 * config/aarch64/aarch64-sve-builtins.cc
2765 (function_resolver::infer_sve_type): New function,.
2766 (function_resolver::report_incorrect_num_vectors): New function,
2768 (function_resolver::infer_vector_or_tuple_type): ...here. Use
2771 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
2773 * config/aarch64/aarch64-sve-builtins.h (sve_type): New struct.
2774 (sve_type::operator==): New function.
2775 (function_resolver::get_vector_type): Delete.
2776 (function_resolver::report_no_such_form): Take an sve_type rather
2777 than a type_suffix_index.
2778 * config/aarch64/aarch64-sve-builtins.cc (get_vector_type): New
2780 (function_resolver::get_vector_type): Delete.
2781 (function_resolver::report_no_such_form): Take an sve_type rather
2782 than a type_suffix_index.
2783 (find_sve_type): New function, split out from...
2784 (function_resolver::infer_vector_or_tuple_type): ...here.
2786 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
2788 * config/aarch64/aarch64-sve-builtins-shapes.cc (build_one): Take
2789 a group suffix index parameter.
2790 (build_32_64, build_all): Update accordingly. Iterate over all
2792 * config/aarch64/aarch64-sve-builtins-sve2.cc (svqrshl_impl::fold)
2793 (svqshl_impl::fold, svrshl_impl::fold): Update function_instance
2795 * config/aarch64/aarch64-sve-builtins.cc (group_suffixes): New array.
2796 (groups_none): New constant.
2797 (function_groups): Initialize the groups field.
2798 (function_instance::hash): Hash the group index.
2799 (function_builder::get_name): Add the group suffix.
2800 (function_builder::add_overloaded_functions): Iterate over all
2802 (function_resolver::lookup_form): Take a group suffix parameter.
2803 (function_resolver::resolve_to): Likewise.
2804 * config/aarch64/aarch64-sve-builtins.def (DEF_SVE_GROUP_SUFFIX): New
2806 (x2, x3, x4): New group suffixes.
2807 * config/aarch64/aarch64-sve-builtins.h (group_suffix_index): New enum.
2808 (group_suffix_info): New structure.
2809 (function_group_info::groups): New member variable.
2810 (function_instance::group_suffix_id): Likewise.
2811 (group_suffixes): New array.
2812 (function_instance::operator==): Compare the group suffixes.
2813 (function_instance::group_suffix): New function.
2815 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
2817 * config/aarch64/aarch64-sve-builtins.cc (function_groups): Remove
2818 implied requirement on SVE.
2819 * config/aarch64/aarch64-sve-builtins-base.def: Explicitly require SVE.
2820 * config/aarch64/aarch64-sve-builtins-sve2.def: Likewise.
2822 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
2824 * config/aarch64/aarch64-protos.h (aarch64_sve_rdvl_immediate_p)
2825 (aarch64_output_sve_rdvl): Declare.
2826 * config/aarch64/aarch64.cc (aarch64_sve_cnt_factor_p): New
2827 function, split out from...
2828 (aarch64_sve_cnt_immediate_p): ...here.
2829 (aarch64_sve_rdvl_factor_p): New function.
2830 (aarch64_sve_rdvl_immediate_p): Likewise.
2831 (aarch64_output_sve_rdvl): Likewise.
2832 (aarch64_offset_temporaries): Rewrite the SVE handling to use RDVL
2834 (aarch64_expand_mov_immediate): Handle RDVL immediates.
2835 (aarch64_mov_operand_p): Likewise.
2836 * config/aarch64/constraints.md (Usr): New constraint.
2837 * config/aarch64/aarch64.md (*mov<SHORT:mode>_aarch64): Add an RDVL
2839 (*movsi_aarch64, *movdi_aarch64): Likewise.
2841 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
2843 * config/aarch64/aarch64-sve-builtins.h:
2844 (function_checker::require_immediate_lane_index): Add an argument
2845 for the index of the indexed vector argument.
2846 * config/aarch64/aarch64-sve-builtins.cc
2847 (function_checker::require_immediate_lane_index): Likewise.
2848 * config/aarch64/aarch64-sve-builtins-shapes.cc
2849 (ternary_bfloat_lane_base::check): Update accordingly.
2850 (ternary_qq_lane_base::check): Likewise.
2851 (binary_lane_def::check): Likewise.
2852 (binary_long_lane_def::check): Likewise.
2853 (ternary_lane_def::check): Likewise.
2854 (ternary_lane_rotate_def::check): Likewise.
2855 (ternary_long_lane_def::check): Likewise.
2856 (ternary_qq_lane_rotate_def::check): Likewise.
2858 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
2860 * target.def (md_asm_adjust): Add a uses parameter.
2861 * doc/tm.texi: Regenerate.
2862 * cfgexpand.cc (expand_asm_loc): Update call to md_asm_adjust.
2863 Handle any USEs created by the target.
2864 (expand_asm_stmt): Likewise.
2865 * recog.cc (asm_noperands): Handle asms with USEs.
2866 (decode_asm_operands): Likewise.
2867 * config/arm/aarch-common-protos.h (arm_md_asm_adjust): Add uses
2869 * config/arm/aarch-common.cc (arm_md_asm_adjust): Likewise.
2870 * config/arm/arm.cc (thumb1_md_asm_adjust): Likewise.
2871 * config/avr/avr.cc (avr_md_asm_adjust): Likewise.
2872 * config/cris/cris.cc (cris_md_asm_adjust): Likewise.
2873 * config/i386/i386.cc (ix86_md_asm_adjust): Likewise.
2874 * config/mn10300/mn10300.cc (mn10300_md_asm_adjust): Likewise.
2875 * config/nds32/nds32.cc (nds32_md_asm_adjust): Likewise.
2876 * config/pdp11/pdp11.cc (pdp11_md_asm_adjust): Likewise.
2877 * config/rs6000/rs6000.cc (rs6000_md_asm_adjust): Likewise.
2878 * config/s390/s390.cc (s390_md_asm_adjust): Likewise.
2879 * config/vax/vax.cc (vax_md_asm_adjust): Likewise.
2880 * config/visium/visium.cc (visium_md_asm_adjust): Likewise.
2882 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
2884 * doc/tm.texi.in: Add TARGET_START_CALL_ARGS.
2885 * doc/tm.texi: Regenerate.
2886 * target.def (start_call_args): New hook.
2887 (call_args, end_call_args): Add a parameter for the cumulative
2888 argument information.
2889 * hooks.h (hook_void_rtx_tree): Delete.
2890 * hooks.cc (hook_void_rtx_tree): Likewise.
2891 * targhooks.h (hook_void_CUMULATIVE_ARGS): Declare.
2892 (hook_void_CUMULATIVE_ARGS_rtx_tree): Likewise.
2893 * targhooks.cc (hook_void_CUMULATIVE_ARGS): New function.
2894 (hook_void_CUMULATIVE_ARGS_rtx_tree): Likewise.
2895 * calls.cc (expand_call): Call start_call_args before computing
2896 and storing stack parameters. Pass the cumulative argument
2897 information to call_args and end_call_args.
2898 (emit_library_call_value_1): Likewise.
2899 * config/nvptx/nvptx.cc (nvptx_call_args): Add a cumulative
2901 (nvptx_end_call_args): Likewise.
2903 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
2905 * doc/tm.texi.in: Add TARGET_EMIT_EPILOGUE_FOR_SIBCALL.
2906 * doc/tm.texi: Regenerate.
2907 * target.def (emit_epilogue_for_sibcall): New hook.
2908 * calls.cc (can_implement_as_sibling_call_p): Use it.
2909 * function.cc (thread_prologue_and_epilogue_insns): Likewise.
2910 (reposition_prologue_and_epilogue_notes): Likewise.
2911 * config/aarch64/aarch64-protos.h (aarch64_expand_epilogue): Take
2912 an rtx_call_insn * rather than a bool.
2913 * config/aarch64/aarch64.cc (aarch64_expand_epilogue): Likewise.
2914 (TARGET_EMIT_EPILOGUE_FOR_SIBCALL): Define.
2915 * config/aarch64/aarch64.md (epilogue): Update call.
2916 (sibcall_epilogue): Delete.
2918 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
2920 * target.def (use_late_prologue_epilogue): New hook.
2921 * doc/tm.texi.in: Add TARGET_USE_LATE_PROLOGUE_EPILOGUE.
2922 * doc/tm.texi: Regenerate.
2923 * passes.def (pass_late_thread_prologue_and_epilogue): New pass.
2924 * tree-pass.h (make_pass_late_thread_prologue_and_epilogue): Declare.
2925 * function.cc (pass_thread_prologue_and_epilogue::gate): New function.
2926 (pass_data_late_thread_prologue_and_epilogue): New pass variable.
2927 (pass_late_thread_prologue_and_epilogue): New pass class.
2928 (make_pass_late_thread_prologue_and_epilogue): New function.
2930 2023-12-05 Kito Cheng <kito.cheng@sifive.com>
2932 * common/config/riscv/riscv-common.cc
2933 (riscv_subset_list::check_conflict_ext): Check zcd conflicts
2936 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
2938 PR rtl-optimization/112278
2939 * lra-int.h (lra_update_biggest_mode): New function.
2940 * lra-coalesce.cc (merge_pseudos): Use it.
2941 * lra-lives.cc (process_bb_lives): Likewise.
2942 * lra.cc (new_insn_reg): Likewise.
2944 2023-12-05 Jakub Jelinek <jakub@redhat.com>
2946 PR tree-optimization/112843
2947 * gimple-lower-bitint.cc (gimple_lower_bitint): Change lhs of stmt
2948 to lhs2 before building and inserting lhs = (cast) lhs2; assignment.
2949 Adjust stmt operands before adjusting lhs.
2951 2023-12-05 xuli <xuli1@eswincomputing.com>
2953 * config/riscv/riscv-v.cc (sew64_scalar_helper): Bugfix.
2955 2023-12-05 Jakub Jelinek <jakub@redhat.com>
2958 * config/i386/sse.md ((eq (eq (lshiftrt x elt_bits-1) 0) 0)): New
2959 splitter to turn psrld $31; pcmpeq; pcmpeq into psrad $31.
2961 2023-12-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2963 * config/riscv/autovec.md: Add blocker.
2964 * config/riscv/riscv-protos.h (gather_scatter_valid_offset_p): New function.
2965 * config/riscv/riscv-v.cc (gather_scatter_valid_offset_p): Ditto.
2967 2023-12-05 Richard Biener <rguenther@suse.de>
2969 PR tree-optimization/112827
2970 PR tree-optimization/112848
2971 * tree-scalar-evolution.cc (final_value_replacement_loop):
2972 Compute the insert location for each insert.
2974 2023-12-05 liuhongt <hongtao.liu@intel.com>
2976 * config/i386/i386.cc (ix86_vector_costs::add_stmt_cost):
2977 Count sse_reg/gpr_regs for components not loaded from memory.
2978 (ix86_vector_costs:ix86_vector_costs): New constructor.
2979 (ix86_vector_costs::m_num_gpr_needed[3]): New private memeber.
2980 (ix86_vector_costs::m_num_sse_needed[3]): Ditto.
2981 (ix86_vector_costs::finish_cost): Estimate overall register
2983 (ix86_vector_costs::ix86_vect_estimate_reg_pressure): New
2986 2023-12-05 liuhongt <hongtao.liu@intel.com>
2988 * config/i386/sse.md (udot_prodv64qi): New expander.
2989 (udot_prod<mode>): Emulates with VEC_UNPACKU_EXPR +
2990 DOT_PROD (short, int).
2992 2023-12-05 Marek Polacek <polacek@redhat.com>
2996 * doc/invoke.texi: Document -fno-immediate-escalation.
2998 2023-12-04 Andrew Pinski <quic_apinski@quicinc.com>
3000 * match.pd (zero_one_valued_p): For convert
3001 make sure type is not a signed 1-bit integer.
3003 2023-12-04 Jeff Law <jlaw@ventanamicro.com>
3005 * config/microblaze/microblaze.md (movhi): Use %i for half-word
3006 loads to properly select between lhu/lhui.
3008 2023-12-04 Robin Dapp <rdapp@ventanamicro.com>
3010 * config/riscv/riscv-string.cc (expand_rawmemchr): Increment
3011 source address by vl * element_size.
3013 2023-12-04 Robin Dapp <rdapp@ventanamicro.com>
3015 * config/riscv/riscv-opts.h (enum riscv_stringop_strategy_enum):
3017 (enum stringop_strategy_enum): ... to this.
3018 * config/riscv/riscv-string.cc (riscv_expand_block_move): New
3019 wrapper expander handling the strategies and delegation.
3020 (riscv_expand_block_move_scalar): Rename function and make
3022 (expand_block_move): Remove strategy handling.
3023 * config/riscv/riscv.md: Call expander wrapper.
3024 * config/riscv/riscv.opt: Rename.
3026 2023-12-04 Richard Biener <rguenther@suse.de>
3028 PR middle-end/112785
3029 * function.h (get_new_clique): New inline function handling
3030 last_clique overflow.
3031 * cfgrtl.cc (duplicate_insn_chain): Use it.
3032 * tree-cfg.cc (gimple_duplicate_bb): Likewise.
3033 * tree-inline.cc (remap_dependence_clique): Likewise.
3035 2023-12-04 Christoph Müllner <christoph.muellner@vrull.eu>
3038 * doc/invoke.texi: Document riscv-strcmp-inline-limit.
3040 2023-12-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3043 * config/riscv/vector.md: Fix incorrect overlap in v0.
3045 2023-12-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3048 * config/riscv/vector.md: Add highest-number overlap support.
3050 2023-12-04 Richard Biener <rguenther@suse.de>
3052 PR tree-optimization/112818
3053 * tree-vect-stmts.cc (vectorizable_bswap): Check input and
3054 output vector types have the same size.
3056 2023-12-04 Richard Biener <rguenther@suse.de>
3058 PR tree-optimization/112827
3059 * tree-scalar-evolution.cc (final_value_replacement_loop):
3060 Do not release SSA name but keep a dead initialization around.
3062 2023-12-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3065 * config/riscv/vector.md: Remove earlyclobber from widen reduction.
3067 2023-12-04 Indu Bhagat <indu.bhagat@oracle.com>
3070 * btfout.cc (btf_asm_type): Fixup ctti_name for all
3071 BTF types of kind BTF_KIND_FUNC_PROTO.
3073 2023-12-04 Indu Bhagat <indu.bhagat@oracle.com>
3076 * btfout.cc (get_btf_type_name): New definition.
3077 (btf_collect_datasec): Update dtd_name to the original type name
3079 (btf_asm_type_ref): Use the new get_btf_type_name function
3081 (btf_asm_type): Likewise.
3082 (btf_asm_func_type): Likewise.
3084 2023-12-04 Jakub Jelinek <jakub@redhat.com>
3087 * config/i386/i386.cc (ix86_elim_entry_set_got): Before checking
3088 for UNSPEC_SET_GOT check that SET_SRC is UNSPEC. Use SET_SRC and
3089 SET_DEST macros instead of XEXP, rename vec variable to set.
3091 2023-12-04 Jakub Jelinek <jakub@redhat.com>
3094 * config/i386/sse.md (signbit<mode>2): Force operands[1] into a REG.
3096 2023-12-04 Feng Wang <wangfeng@eswincomputing.com>
3098 * common/config/riscv/riscv-common.cc: Add zvkb ISA info.
3099 * config/riscv/riscv.opt: Add Mask(ZVKB)
3101 2023-12-04 Fei Gao <gaofei@eswincomputing.com>
3102 Xiao Zeng <zengxiao@eswincomputing.com>
3104 * config/riscv/riscv.md (*mov<GPR:mode><X:mode>cc):move to sfb.md
3105 * config/riscv/sfb.md: New file.
3107 2023-12-04 Kito Cheng <kito.cheng@sifive.com>
3109 * config/riscv/riscv-cores.def: Add sifive-x280.
3110 * doc/invoke.texi (RISC-V Options): Add sifive-x280
3112 2023-12-04 Kito Cheng <kito.cheng@sifive.com>
3114 * common/config/riscv/riscv-common.cc (riscv_implied_predicator_t): New.
3115 (riscv_implied_info_t::riscv_implied_info_t): New.
3116 (riscv_implied_info_t::match): New.
3117 (riscv_implied_info): New entry for zcf.
3118 (riscv_subset_list::handle_implied_ext): Use
3119 riscv_implied_info_t::match.
3120 (riscv_subset_list::check_implied_ext): Ditto.
3121 (riscv_subset_list::handle_combine_ext): Ditto.
3122 (riscv_subset_list::parse): Move zcf implication handling to
3123 riscv_implied_infos.
3125 2023-12-04 Kito Cheng <kito.cheng@sifive.com>
3127 * common/config/riscv/riscv-common.cc
3128 (riscv_subset_list::check_conflict_ext): New.
3129 (riscv_subset_list::parse): Move checking conflict ext. to
3131 * config/riscv/riscv-subset.h:
3132 Add riscv_subset_list::check_conflict_ext.
3134 2023-12-04 Hu, Lin1 <lin1.hu@intel.com>
3136 * common/config/i386/cpuinfo.h (get_available_features): Move USER_MSR
3137 to the correct location.
3139 2023-12-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3141 * config/riscv/riscv.md: Rostify the constraints.
3143 2023-12-04 chenxiaolong <chenxiaolong@loongson.cn>
3145 * doc/extend.texi: Add information about the intrinsic function of the vector
3148 2023-12-03 Jakub Jelinek <jakub@redhat.com>
3150 PR middle-end/112807
3151 * gimple-lower-bitint.cc (bitint_large_huge::lower_addsub_overflow):
3152 When choosing type0 and type1 types, if prec3 has small/middle bitint
3153 kind, use maximum of type0 and type1's precision instead of prec3.
3155 2023-12-03 Jeff Law <jlaw@ventanamicro.com>
3157 * config/frv/frv.h (TRANSFER_FROM_TRAMPOLINE): Add prototype for exit.
3159 2023-12-02 Richard Sandiford <richard.sandiford@arm.com>
3161 * attribs.cc (comp_type_attributes): Pass the full TREE_PURPOSE
3162 to lookup_attribute_spec, rather than just the name.
3163 (remove_attributes_matching): Likewise.
3165 2023-12-02 Richard Sandiford <richard.sandiford@arm.com>
3167 * attribs.cc (find_same_attribute): New function.
3168 (decl_attributes, comp_type_attributes): Use it when looking
3169 up one list's attributes in another list.
3171 2023-12-02 Richard Sandiford <richard.sandiford@arm.com>
3173 * Makefile.in (GTFILES): Add attribs.cc.
3174 * attribs.cc (gnu_namespace_cache): New variable.
3175 (get_gnu_namespace): New function.
3176 (lookup_attribute_spec): Use it instead of get_identifier ("gnu").
3177 (get_attribute_namespace, attribs_cc_tests): Likewise.
3179 2023-12-02 Richard Sandiford <richard.sandiford@arm.com>
3181 * attribs.h (scoped_attribute_specs): New structure.
3182 (register_scoped_attributes): Take a reference to a
3183 scoped_attribute_specs instead of separate namespace and array
3185 * plugin.h (register_scoped_attributes): Likewise.
3186 * attribs.cc (register_scoped_attributes): Likewise.
3187 (attribute_tables): Change into an array of scoped_attribute_specs
3188 pointers. Reduce to 1 element for frontends and 1 element for targets.
3189 (empty_attribute_table): Delete.
3190 (check_attribute_tables): Update for changes to attribute_tables.
3191 Use a hash_set to identify duplicates.
3192 (handle_ignored_attributes_option): Update for above changes.
3193 (init_attributes): Likewise.
3194 (excl_pair): Delete.
3195 (test_attribute_exclusions): Update for above changes. Don't
3196 enforce symmetry for standard attributes in the top-level namespace.
3197 * langhooks-def.h (LANG_HOOKS_COMMON_ATTRIBUTE_TABLE): Delete.
3198 (LANG_HOOKS_FORMAT_ATTRIBUTE_TABLE): Likewise.
3199 (LANG_HOOKS_INITIALIZER): Update accordingly.
3200 (LANG_HOOKS_ATTRIBUTE_TABLE): Define to an empty constructor.
3201 * langhooks.h (lang_hooks::common_attribute_table): Delete.
3202 (lang_hooks::format_attribute_table): Likewise.
3203 (lang_hooks::attribute_table): Redefine to an array of
3204 scoped_attribute_specs pointers.
3205 * target-def.h (TARGET_GNU_ATTRIBUTES): New macro.
3206 * target.def (attribute_spec): Redefine to return an array of
3207 scoped_attribute_specs pointers.
3208 * tree-inline.cc (function_attribute_inlinable_p): Update accordingly.
3209 * doc/tm.texi: Regenerate.
3210 * config/aarch64/aarch64.cc (aarch64_attribute_table): Define using
3211 TARGET_GNU_ATTRIBUTES.
3212 * config/alpha/alpha.cc (vms_attribute_table): Likewise.
3213 * config/avr/avr.cc (avr_attribute_table): Likewise.
3214 * config/bfin/bfin.cc (bfin_attribute_table): Likewise.
3215 * config/bpf/bpf.cc (bpf_attribute_table): Likewise.
3216 * config/csky/csky.cc (csky_attribute_table): Likewise.
3217 * config/epiphany/epiphany.cc (epiphany_attribute_table): Likewise.
3218 * config/gcn/gcn.cc (gcn_attribute_table): Likewise.
3219 * config/h8300/h8300.cc (h8300_attribute_table): Likewise.
3220 * config/loongarch/loongarch.cc (loongarch_attribute_table): Likewise.
3221 * config/m32c/m32c.cc (m32c_attribute_table): Likewise.
3222 * config/m32r/m32r.cc (m32r_attribute_table): Likewise.
3223 * config/m68k/m68k.cc (m68k_attribute_table): Likewise.
3224 * config/mcore/mcore.cc (mcore_attribute_table): Likewise.
3225 * config/microblaze/microblaze.cc (microblaze_attribute_table):
3227 * config/mips/mips.cc (mips_attribute_table): Likewise.
3228 * config/msp430/msp430.cc (msp430_attribute_table): Likewise.
3229 * config/nds32/nds32.cc (nds32_attribute_table): Likewise.
3230 * config/nvptx/nvptx.cc (nvptx_attribute_table): Likewise.
3231 * config/riscv/riscv.cc (riscv_attribute_table): Likewise.
3232 * config/rl78/rl78.cc (rl78_attribute_table): Likewise.
3233 * config/rx/rx.cc (rx_attribute_table): Likewise.
3234 * config/s390/s390.cc (s390_attribute_table): Likewise.
3235 * config/sh/sh.cc (sh_attribute_table): Likewise.
3236 * config/sparc/sparc.cc (sparc_attribute_table): Likewise.
3237 * config/stormy16/stormy16.cc (xstormy16_attribute_table): Likewise.
3238 * config/v850/v850.cc (v850_attribute_table): Likewise.
3239 * config/visium/visium.cc (visium_attribute_table): Likewise.
3240 * config/arc/arc.cc (arc_attribute_table): Likewise. Move further
3242 * config/arm/arm.cc (arm_attribute_table): Update for above changes,
3244 (arm_gnu_attributes, arm_gnu_attribute_table): ...these new globals.
3245 * config/i386/i386-options.h (ix86_attribute_table): Delete.
3246 (ix86_gnu_attribute_table): Declare.
3247 * config/i386/i386-options.cc (ix86_attribute_table): Replace with...
3248 (ix86_gnu_attributes, ix86_gnu_attribute_table): ...these two globals.
3249 * config/i386/i386.cc (ix86_attribute_table): Define as an array of
3250 scoped_attribute_specs pointers.
3251 * config/ia64/ia64.cc (ia64_attribute_table): Update for above changes,
3253 (ia64_gnu_attributes, ia64_gnu_attribute_table): ...these new globals.
3254 * config/rs6000/rs6000.cc (rs6000_attribute_table): Update for above
3256 (rs6000_gnu_attributes, rs6000_gnu_attribute_table): ...these new
3259 2023-12-02 Roger Sayle <roger@nextmovesoftware.com>
3261 * config/riscv/riscv-vsetvl.cc (csetvl_info::parse_insn): Rename
3262 local variable from demand_flags to dflags, to avoid conflicting
3263 with (enumeration) type of the same name.
3265 2023-12-02 Li Wei <liwei@loongson.cn>
3267 * config/loongarch/loongarch.cc (loongarch_is_odd_extraction):
3268 Supplementary function prototype.
3269 (loongarch_is_even_extraction): Adjust.
3270 (loongarch_try_expand_lsx_vshuf_const): Adjust.
3271 (loongarch_is_extraction_permutation): Adjust.
3272 (loongarch_expand_vec_perm_const_2): Adjust.
3274 2023-12-02 Li Wei <liwei@loongson.cn>
3276 * config/loongarch/loongarch.md (v2di): Used to simplify the
3277 following templates.
3278 (popcount<mode>2): New.
3280 2023-12-02 Li Wei <liwei@loongson.cn>
3282 * config/loongarch/loongarch.h (CTZ_DEFINED_VALUE_AT_ZERO): Add
3284 (CLZ_DEFINED_VALUE_AT_ZERO): Remove duplicate definition.
3286 2023-12-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3289 * config/riscv/vector.md: Add !TARGET_64BIT.
3291 2023-12-02 Pan Li <pan2.li@intel.com>
3294 * config/riscv/riscv.cc (riscv_legitimize_move): Take the
3295 exist (U *mode) and handle DFmode like DImode when EEW is
3298 2023-12-01 Andrew MacLeod <amacleod@redhat.com>
3300 * gimple-range-fold.h (range_compatible_p): Relocate.
3301 * value-range.h (range_compatible_p): Here.
3302 * range-op-mixed.h (operand_equal::operand_check_p): Call
3303 range_compatible_p rather than comparing precision.
3304 (operand_not_equal::operand_check_p): Ditto.
3305 (operand_not_lt::operand_check_p): Ditto.
3306 (operand_not_le::operand_check_p): Ditto.
3307 (operand_not_gt::operand_check_p): Ditto.
3308 (operand_not_ge::operand_check_p): Ditto.
3309 (operand_plus::operand_check_p): Ditto.
3310 (operand_abs::operand_check_p): Ditto.
3311 (operand_minus::operand_check_p): Ditto.
3312 (operand_negate::operand_check_p): Ditto.
3313 (operand_mult::operand_check_p): Ditto.
3314 (operand_bitwise_not::operand_check_p): Ditto.
3315 (operand_bitwise_xor::operand_check_p): Ditto.
3316 (operand_bitwise_and::operand_check_p): Ditto.
3317 (operand_bitwise_or::operand_check_p): Ditto.
3318 (operand_min::operand_check_p): Ditto.
3319 (operand_max::operand_check_p): Ditto.
3320 * range-op.cc (operand_lshift::operand_check_p): Ditto.
3321 (operand_rshift::operand_check_p): Ditto.
3322 (operand_logical_and::operand_check_p): Ditto.
3323 (operand_logical_or::operand_check_p): Ditto.
3324 (operand_logical_not::operand_check_p): Ditto.
3326 2023-12-01 Vladimir N. Makarov <vmakarov@redhat.com>
3329 * lra.h (lra): Add one more arg.
3330 * lra-int.h (lra_verbose, lra_dump_insns): New externals.
3331 (lra_dump_insns_if_possible): Ditto.
3332 * lra.cc (lra_dump_insns): Dump all insns.
3333 (lra_dump_insns_if_possible): Dump all insns for lra_verbose >= 7.
3334 (lra_verbose): New global.
3335 (lra): Add new arg. Setup lra_verbose from its value.
3336 * lra-assigns.cc (lra_split_hard_reg_for): Dump insns if rtl
3338 * lra-remat.cc (lra_remat): Dump insns if rtl was changed.
3339 * lra-constraints.cc (lra_inheritance): Dump insns.
3340 (lra_constraints, lra_undo_inheritance): Dump insns if rtl
3342 (remove_inheritance_pseudos): Use restore reg if it is set up.
3343 * ira.cc: (lra): Pass internal_flag_ira_verbose.
3345 2023-12-01 Jakub Jelinek <jakub@redhat.com>
3347 * doc/extend.texi (__builtin_addc, __builtin_addcl, __builtin_addcll,
3348 __builtin_subc, __builtin_subcl, __builtin_subcll,
3349 __builtin_stdc_bit_width, __builtin_stdc_count_ones,
3350 __builtin_stdc_count_zeros, __builtin_stdc_first_leading_one,
3351 __builtin_stdc_first_leading_zero, __builtin_stdc_first_trailing_one,
3352 __builtin_stdc_first_trailing_zero, __builtin_stdc_has_single_bit,
3353 __builtin_stdc_leading_ones, __builtin_stdc_leading_zeros,
3354 __builtin_stdc_trailing_ones, __builtin_stdc_trailing_zeros,
3355 __builtin_nvptx_brev, __builtin_nvptx_brevll, __builtin_darn,
3356 __builtin_darn_raw, __builtin_ia32_vec_ext_v2di,
3357 __builtin_ia32_crc32qi, __builtin_ia32_crc32hi,
3358 __builtin_ia32_crc32si, __builtin_ia32_crc32di): Put {}s around
3359 return type with spaces in it.
3360 (__builtin_rx_mvfachi, __builtin_rx_mvfacmi): Remove superfluous
3363 2023-12-01 David Malcolm <dmalcolm@redhat.com>
3365 * diagnostic-core.h (emit_diagnostic_valist): New overload decl.
3366 * diagnostic-format-sarif.cc (sarif_builder::make_result_object):
3367 When we have metadata, call its maybe_add_sarif_properties vfunc.
3368 * diagnostic-metadata.h (class sarif_object): Forward decl.
3369 (diagnostic_metadata::~diagnostic_metadata): New.
3370 (diagnostic_metadata::maybe_add_sarif_properties): New vfunc.
3371 * diagnostic.cc (emit_diagnostic_valist): New overload.
3373 2023-12-01 David Malcolm <dmalcolm@redhat.com>
3376 * doc/extend.texi: Remove stray reference to
3377 -fanalyzer-checker=taint.
3379 2023-12-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3382 * config/riscv/vector.md: Support highpart overlap for vx/vf.
3384 2023-12-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3387 * config/riscv/vector.md: Support highpart overlap for indexed load.
3389 2023-12-01 Richard Biener <rguenther@suse.de>
3391 * tree-vectorizer.h (vect_get_vec_defs): Re-order arguments.
3392 * tree-vect-stmts.cc (vect_get_vec_defs): Likewise.
3393 (vectorizable_condition): Update caller.
3394 (vectorizable_comparison_1): Likewise.
3395 (vectorizable_conversion): Specify the vector type to be
3396 used for invariant/external defs.
3397 * tree-vect-loop.cc (vect_transform_reduction): Update caller.
3399 2023-12-01 Jakub Jelinek <jakub@redhat.com>
3401 PR middle-end/112770
3402 * gimple-lower-bitint.cc (gimple_lower_bitint): When adjusting
3403 lhs of middle _BitInt setter which ends bb, insert cast on
3404 the fallthru edge rather than after stmt.
3406 2023-12-01 Jakub Jelinek <jakub@redhat.com>
3408 PR middle-end/112771
3409 * gimple-lower-bitint.cc (bitint_large_huge::handle_operand_addr):
3410 Use mp = 1 if it is zero.
3412 2023-12-01 Jose E. Marchesi <jose.marchesi@oracle.com>
3414 * config/bpf/bpf.cc (bpf_asm_named_section): New function.
3415 (TARGET_ASM_NAMED_SECTION): Set to bpf_asm_named_section.
3417 2023-12-01 Di Zhao <dizhao@os.amperecomputing.com>
3419 * config/aarch64/aarch64-tuning-flags.def
3420 (AARCH64_EXTRA_TUNING_OPTION): New tuning option to avoid
3422 * config/aarch64/aarch64.cc
3423 (aarch64_override_options_internal): Set
3424 param_avoid_fma_max_bits according to tuning option.
3425 * config/aarch64/tuning_models/ampere1.h (ampere1_tunings):
3426 Modify tunings related with FMA.
3427 * config/aarch64/tuning_models/ampere1a.h (ampere1a_tunings):
3429 * config/aarch64/tuning_models/ampere1b.h (ampere1b_tunings):
3432 2023-12-01 Richard Sandiford <richard.sandiford@arm.com>
3434 * config/aarch64/aarch64-sve-builtins.h
3435 (function_expander::result_mode): New member function.
3436 * config/aarch64/aarch64-sve-builtins-base.cc
3437 (svld234_impl::expand): Use it.
3438 * config/aarch64/aarch64-sve-builtins.cc
3439 (function_expander::get_reg_target): Likewise.
3441 2023-12-01 Jakub Jelinek <jakub@redhat.com>
3443 * gimple-lower-bitint.cc (range_to_prec): Don't return -1 for
3445 (bitint_large_huge::lower_addsub_overflow): Fix up computation of
3447 (bitint_large_huge::lower_mul_overflow): Likewise.
3449 2023-12-01 Jakub Jelinek <jakub@redhat.com>
3451 * gimple-lower-bitint.cc (bitint_large_huge::finish_arith_overflow):
3452 When replacing use_stmt which is gsi_stmt (m_gsi), update m_gsi to
3455 2023-12-01 Jakub Jelinek <jakub@redhat.com>
3457 PR middle-end/112750
3458 * gimple-lower-bitint.cc (bitint_large_huge::lower_addsub_overflow):
3459 Use NE_EXPR rather than EQ_EXPR for g2 if !single_comparison and
3460 adjust probabilities.
3462 2023-12-01 Xi Ruoyao <xry111@xry111.site>
3464 * doc/install.texi: Deem srcdir == objdir broken, but objdir
3465 as a subdirectory of srcdir fine.
3467 2023-12-01 Juergen Christ <jchrist@linux.ibm.com>
3470 * config/s390/s390.cc (s390_md_asm_adjust): Return after dealing
3471 with the outputs, if no further processing of long doubles is
3474 2023-12-01 Jakub Jelinek <jakub@redhat.com>
3477 * config/s390/s390.cc (s390_invalid_arg_for_unprototyped_fn): Return
3478 NULL for __builtin_classify_type calls with vector arguments.
3480 2023-12-01 Florian Weimer <fweimer@redhat.com>
3482 * doc/invoke.texi (Warning Options): Document
3483 -Wdeclaration-missing-parameter-type.
3485 2023-12-01 Florian Weimer <fweimer@redhat.com>
3487 * doc/invoke.texi (Warning Options): Document changes.
3489 2023-12-01 Florian Weimer <fweimer@redhat.com>
3491 * doc/invoke.texi (Warning Options): Document that
3492 -Wreturn-mismatch is a permerror in C99 and later.
3494 2023-12-01 Florian Weimer <fweimer@redhat.com>
3498 * doc/invoke.texi (Warning Options): Document changes.
3500 2023-12-01 Florian Weimer <fweimer@redhat.com>
3502 * doc/invoke.texi (Warning Options): Document changes.
3504 2023-12-01 Florian Weimer <fweimer@redhat.com>
3506 * doc/invoke.texi (Warning Options): Document changes.
3508 2023-12-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3511 * config/riscv/riscv-vsetvl.cc (pre_vsetvl::pre_global_vsetvl_info): Fix ratio.
3513 2023-11-30 Wilco Dijkstra <wilco.dijkstra@arm.com>
3516 * config/aarch64/aarch64.cc (aarch64_split_compare_and_swap):
3517 For 128-bit store the loaded value and loop if needed.
3519 2023-11-30 Wilco Dijkstra <wilco.dijkstra@arm.com>
3522 * config/aarch64/aarch64.md (cpymemdi): Remove pattern condition.
3523 (setmemdi): Likewise.
3524 * config/aarch64/aarch64.cc (aarch64_expand_cpymem): Support
3525 strict-align. Cleanup condition for using MOPS.
3526 (aarch64_expand_setmem): Likewise.
3528 2023-11-30 Richard Biener <rguenther@suse.de>
3530 PR tree-optimization/112767
3531 * tree-scalar-evolution.cc (final_value_replacement_loop):
3532 Propagate constants to immediate uses immediately.
3534 2023-11-30 Richard Biener <rguenther@suse.de>
3536 PR tree-optimization/112766
3537 * gimple-predicate-analysis.cc (find_var_cmp_const):
3538 Support continuing the iteration and report every candidate.
3539 (uninit_analysis::overlap): Iterate over all flag var
3542 2023-11-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3545 * config/riscv/vector.md: Add widening overlap of vf2/vf4.
3547 2023-11-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3550 * config/riscv/vector.md: Remove earlyclobber for wx/wf instructions.
3552 2023-11-30 Jakub Jelinek <jakub@redhat.com>
3554 PR middle-end/112733
3555 * wide-int.cc (wi::mul_internal): Don't allocate twice as much
3556 space for u, v and r as needed.
3557 (divmod_internal_2): Change return type from void to int, for n == 1
3558 return 1, otherwise before writing b_dividend into b_remainder set
3559 n to MIN (n, m) and at the end return it.
3560 (wi::divmod_internal): Don't allocate 4 times as much space for
3561 b_quotient, b_remainder, b_dividend and b_divisor. Set n to
3562 result of divmod_internal_2.
3563 (wide_int_cc_tests): Add test for unsigned widest_int
3564 wi::multiple_of_p of 1 and -128.
3566 2023-11-30 liuhongt <hongtao.liu@intel.com>
3568 * config/i386/sse.md (sdot_prodv64qi): New expander.
3569 (sseunpackmodelower): New mode attr.
3570 (sdot_prod<mode>): Emulate sdot_prodv*qi with sodt_prov*hi
3571 when TARGET_VNNIINT8 is not available.
3573 2023-11-30 liuhongt <hongtao.liu@intel.com>
3575 * config/i386/sse.md: (reduc_plus_scal_<mode>): Use
3576 vec_extract_lo instead of subreg.
3577 (reduc_<code>_scal_<mode>): Ditto.
3578 (reduc_<code>_scal_<mode>): Ditto.
3579 (reduc_<code>_scal_<mode>): Ditto.
3580 (reduc_<code>_scal_<mode>): Ditto.
3582 2023-11-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3585 * config/riscv/vector.md: Add widenning overlap.
3587 2023-11-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3589 * config/riscv/constraints.md (TARGET_VECTOR ? V_REGS : NO_REGS): Fix constraint.
3590 * config/riscv/riscv.md (no,W21,W42,W84,W41,W81,W82): Rename vconstraint into group_overlap.
3592 (none,W21,W42,W84,W43,W86,W87): Ditto.
3593 * config/riscv/vector.md: Ditto.
3595 2023-11-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3597 * config/riscv/vector.md: Support highpart overlap for vext.vf2
3599 2023-11-29 Philipp Tomsich <philipp.tomsich@vrull.eu>
3601 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add ampere-1b
3602 * config/aarch64/aarch64-cost-tables.h: Add ampere1b_extra_costs
3603 * config/aarch64/aarch64-tune.md: Regenerate
3604 * config/aarch64/aarch64.cc: Include ampere1b tuning model
3605 * doc/invoke.texi: Document -mcpu=ampere1b
3606 * config/aarch64/tuning_models/ampere1b.h: New file.
3608 2023-11-29 David Faust <david.faust@oracle.com>
3610 * config/bpf/bpf.h (ASM_COMMENT_START): Change from ';' to '#'.
3612 2023-11-29 Jakub Jelinek <jakub@redhat.com>
3615 * config/rs6000/rs6000.cc (invalid_arg_for_unprototyped_fn): Return
3616 NULL for __builtin_classify_type calls with vector arguments.
3618 2023-11-29 Andrew MacLeod <amacleod@redhat.com>
3620 PR tree-optimization/111922
3621 * ipa-cp.cc (ipa_vr_operation_and_type_effects): Check the
3622 operands are valid before calling fold_range.
3624 2023-11-29 Andrew MacLeod <amacleod@redhat.com>
3626 * range-op-mixed.h (operator_equal::operand_check_p): New.
3627 (operator_not_equal::operand_check_p): New.
3628 (operator_lt::operand_check_p): New.
3629 (operator_le::operand_check_p): New.
3630 (operator_gt::operand_check_p): New.
3631 (operator_ge::operand_check_p): New.
3632 (operator_plus::operand_check_p): New.
3633 (operator_abs::operand_check_p): New.
3634 (operator_minus::operand_check_p): New.
3635 (operator_negate::operand_check_p): New.
3636 (operator_mult::operand_check_p): New.
3637 (operator_bitwise_not::operand_check_p): New.
3638 (operator_bitwise_xor::operand_check_p): New.
3639 (operator_bitwise_and::operand_check_p): New.
3640 (operator_bitwise_or::operand_check_p): New.
3641 (operator_min::operand_check_p): New.
3642 (operator_max::operand_check_p): New.
3643 * range-op.cc (range_op_handler::fold_range): Check operand
3645 (range_op_handler::op1_range): Ditto.
3646 (range_op_handler::op2_range): Ditto.
3647 (range_op_handler::operand_check_p): New.
3648 (range_operator::operand_check_p): New.
3649 (operator_lshift::operand_check_p): New.
3650 (operator_rshift::operand_check_p): New.
3651 (operator_logical_and::operand_check_p): New.
3652 (operator_logical_or::operand_check_p): New.
3653 (operator_logical_not::operand_check_p): New.
3654 * range-op.h (range_operator::operand_check_p): New.
3655 (range_op_handler::operand_check_p): New.
3657 2023-11-29 Martin Jambor <mjambor@suse.cz>
3659 PR tree-optimization/112711
3660 PR tree-optimization/112721
3661 * tree-sra.cc (build_access_from_call_arg): New parameter
3662 CAN_BE_RETURNED, disqualify any candidate passed by reference if it is
3663 true. Adjust leading comment.
3664 (scan_function): Pass appropriate value to CAN_BE_RETURNED of
3665 build_access_from_call_arg.
3667 2023-11-29 Thomas Schwinge <thomas@codesourcery.com>
3669 * doc/sourcebuild.texi (Final Actions): Document
3670 'only_for_offload_target' wrapper.
3672 2023-11-29 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
3675 * doc/sourcebuild.texi (Effective-Target Keywords, Environment
3676 attributes): Document cfi.
3678 2023-11-29 Richard Biener <rguenther@suse.de>
3680 PR middle-end/110237
3681 * internal-fn.cc (expand_partial_load_optab_fn): Clear
3682 MEM_EXPR and MEM_OFFSET.
3683 (expand_partial_store_optab_fn): Likewise.
3685 2023-11-29 Jakub Jelinek <jakub@redhat.com>
3687 PR middle-end/112733
3688 * fold-const.cc (multiple_of_p): Pass SIGNED rather than
3689 UNSIGNED for wi::multiple_of_p on widest_int arguments.
3691 2023-11-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3692 kito-cheng <kito.cheng@sifive.com>
3693 kito-cheng <kito.cheng@gmail.com>
3696 * config/riscv/constraints.md (TARGET_VECTOR ? V_REGS : NO_REGS): New register filters.
3697 * config/riscv/riscv.md (no,W21,W42,W84,W41,W81,W82): Ditto.
3699 * config/riscv/vector.md: Support highpart register overlap for vwcvt.
3701 2023-11-29 xuli <xuli1@eswincomputing.com>
3703 * config/riscv/riscv.cc (riscv_option_override): Eliminate warning.
3705 2023-11-29 Jakub Jelinek <jakub@redhat.com>
3708 * fold-mem-offsets.cc (get_uses): Ignore DEBUG_INSN uses. Otherwise,
3709 punt if use is in a different basic block from INSN or appears before
3710 INSN in the same basic block. Formatting fixes.
3711 (get_single_def_in_bb): Formatting fixes.
3712 (fold_offsets_1, pass_fold_mem_offsets::execute): Comment formatting
3715 2023-11-29 Xi Ruoyao <xry111@xry111.site>
3717 * config/loongarch/simd.md (LSX_SCALAR_FRINT): New int iterator.
3718 (VLSX_FOR_FMODE): New mode attribute.
3719 (<simd_for_scalar_frint_pattern><mode>2): New expander,
3720 expanding to vreplvei.{w/d} + frint{rp/rz/rm/rne}.{s.d}.
3722 2023-11-29 Xi Ruoyao <xry111@xry111.site>
3724 * config/loongarch/loongarch.md (lrint_allow_inexact): Remove.
3725 (<lrint_pattern><ANYF:mode><ANYFI:mode>2): Check if <LRINT>
3726 == UNSPEC_FTINT instead of <lrint_allow_inexact>.
3728 2023-11-29 Xi Ruoyao <xry111@xry111.site>
3730 * config/loongarch/lsx.md (bitimm): Move to ...
3731 (UNSPEC_LSX_VROTR): Remove.
3732 (lsx_vrotr_<lsxfmt>): Remove.
3733 (lsx_vrotri_<lsxfmt>): Remove.
3734 * config/loongarch/lasx.md (UNSPEC_LASX_XVROTR): Remove.
3735 (lsx_vrotr_<lsxfmt>): Remove.
3736 (lsx_vrotri_<lsxfmt>): Remove.
3737 * config/loongarch/simd.md (bitimm): ... here. Expand it to
3739 (vrotr<mode>3): New define_insn.
3740 (vrotri<mode>3): New define_insn.
3741 * config/loongarch/loongarch-builtins.cc:
3742 (CODE_FOR_lsx_vrotr_b): Use standard pattern name.
3743 (CODE_FOR_lsx_vrotr_h): Likewise.
3744 (CODE_FOR_lsx_vrotr_w): Likewise.
3745 (CODE_FOR_lsx_vrotr_d): Likewise.
3746 (CODE_FOR_lasx_xvrotr_b): Likewise.
3747 (CODE_FOR_lasx_xvrotr_h): Likewise.
3748 (CODE_FOR_lasx_xvrotr_w): Likewise.
3749 (CODE_FOR_lasx_xvrotr_d): Likewise.
3750 (CODE_FOR_lsx_vrotri_b): Define to standard pattern name.
3751 (CODE_FOR_lsx_vrotri_h): Likewise.
3752 (CODE_FOR_lsx_vrotri_w): Likewise.
3753 (CODE_FOR_lsx_vrotri_d): Likewise.
3754 (CODE_FOR_lasx_xvrotri_b): Likewise.
3755 (CODE_FOR_lasx_xvrotri_h): Likewise.
3756 (CODE_FOR_lasx_xvrotri_w): Likewise.
3757 (CODE_FOR_lasx_xvrotri_d): Likewise.
3759 2023-11-29 Xi Ruoyao <xry111@xry111.site>
3761 * config/loongarch/simd.md (muh): New code attribute mapping
3762 any_extend to smul_highpart or umul_highpart.
3763 (<su>mul<mode>3_highpart): New define_insn.
3764 * config/loongarch/lsx.md (UNSPEC_LSX_VMUH_S): Remove.
3765 (UNSPEC_LSX_VMUH_U): Remove.
3766 (lsx_vmuh_s_<lsxfmt>): Remove.
3767 (lsx_vmuh_u_<lsxfmt>): Remove.
3768 * config/loongarch/lasx.md (UNSPEC_LASX_XVMUH_S): Remove.
3769 (UNSPEC_LASX_XVMUH_U): Remove.
3770 (lasx_xvmuh_s_<lasxfmt>): Remove.
3771 (lasx_xvmuh_u_<lasxfmt>): Remove.
3772 * config/loongarch/loongarch-builtins.cc (CODE_FOR_lsx_vmuh_b):
3773 Redefine to standard pattern name.
3774 (CODE_FOR_lsx_vmuh_h): Likewise.
3775 (CODE_FOR_lsx_vmuh_w): Likewise.
3776 (CODE_FOR_lsx_vmuh_d): Likewise.
3777 (CODE_FOR_lsx_vmuh_bu): Likewise.
3778 (CODE_FOR_lsx_vmuh_hu): Likewise.
3779 (CODE_FOR_lsx_vmuh_wu): Likewise.
3780 (CODE_FOR_lsx_vmuh_du): Likewise.
3781 (CODE_FOR_lasx_xvmuh_b): Likewise.
3782 (CODE_FOR_lasx_xvmuh_h): Likewise.
3783 (CODE_FOR_lasx_xvmuh_w): Likewise.
3784 (CODE_FOR_lasx_xvmuh_d): Likewise.
3785 (CODE_FOR_lasx_xvmuh_bu): Likewise.
3786 (CODE_FOR_lasx_xvmuh_hu): Likewise.
3787 (CODE_FOR_lasx_xvmuh_wu): Likewise.
3788 (CODE_FOR_lasx_xvmuh_du): Likewise.
3790 2023-11-29 Xi Ruoyao <xry111@xry111.site>
3793 * config/loongarch/lsx.md (UNSPEC_LSX_VFTINT_S,
3794 UNSPEC_LSX_VFTINTRNE, UNSPEC_LSX_VFTINTRP,
3795 UNSPEC_LSX_VFTINTRM, UNSPEC_LSX_VFRINTRNE_S,
3796 UNSPEC_LSX_VFRINTRNE_D, UNSPEC_LSX_VFRINTRZ_S,
3797 UNSPEC_LSX_VFRINTRZ_D, UNSPEC_LSX_VFRINTRP_S,
3798 UNSPEC_LSX_VFRINTRP_D, UNSPEC_LSX_VFRINTRM_S,
3799 UNSPEC_LSX_VFRINTRM_D): Remove.
3800 (ILSX, FLSX): Move into ...
3801 (VIMODE): Move into ...
3802 (FRINT_S, FRINT_D): Remove.
3803 (frint_pattern_s, frint_pattern_d, frint_suffix): Remove.
3804 (lsx_vfrint_<flsxfmt>, lsx_vftint_s_<ilsxfmt>_<flsxfmt>,
3805 lsx_vftintrne_w_s, lsx_vftintrne_l_d, lsx_vftintrp_w_s,
3806 lsx_vftintrp_l_d, lsx_vftintrm_w_s, lsx_vftintrm_l_d,
3807 lsx_vfrintrne_s, lsx_vfrintrne_d, lsx_vfrintrz_s,
3808 lsx_vfrintrz_d, lsx_vfrintrp_s, lsx_vfrintrp_d,
3809 lsx_vfrintrm_s, lsx_vfrintrm_d,
3810 <FRINT_S:frint_pattern_s>v4sf2,
3811 <FRINT_D:frint_pattern_d>v2df2, round<mode>2,
3812 fix_trunc<mode>2): Remove.
3813 * config/loongarch/lasx.md: Likewise.
3814 * config/loongarch/simd.md: New file.
3815 (ILSX, ILASX, FLSX, FLASX, VIMODE): ... here.
3816 (IVEC, FVEC): New mode iterators.
3817 (VIMODE): ... here. Extend it to work for all LSX/LASX vector
3819 (x, wu, simd_isa, WVEC, vimode, simdfmt, simdifmt_for_f,
3820 elebits): New mode attributes.
3821 (UNSPEC_SIMD_FRINTRP, UNSPEC_SIMD_FRINTRZ, UNSPEC_SIMD_FRINT,
3822 UNSPEC_SIMD_FRINTRM, UNSPEC_SIMD_FRINTRNE): New unspecs.
3823 (SIMD_FRINT): New int iterator.
3824 (simd_frint_rounding, simd_frint_pattern): New int attributes.
3825 (<simd_isa>_<x>vfrint<simd_frint_rounding>_<simdfmt>): New
3826 define_insn template for frint instructions.
3827 (<simd_isa>_<x>vftint<simd_frint_rounding>_<simdifmt_for_f>_<simdfmt>):
3828 Likewise, but for ftint instructions.
3829 (<simd_frint_pattern><mode>2): New define_expand with
3830 flag_fp_int_builtin_inexact checked.
3831 (l<simd_frint_pattern><mode><vimode>2): Likewise.
3832 (ftrunc<mode>2): New define_expand. It does not require
3833 flag_fp_int_builtin_inexact.
3834 (fix_trunc<mode><vimode>2): New define_insn_and_split. It does
3835 not require flag_fp_int_builtin_inexact.
3836 (include): Add lsx.md and lasx.md.
3837 * config/loongarch/loongarch.md (include): Include simd.md,
3838 instead of including lsx.md and lasx.md directly.
3839 * config/loongarch/loongarch-builtins.cc
3840 (CODE_FOR_lsx_vftint_w_s, CODE_FOR_lsx_vftint_l_d,
3841 CODE_FOR_lasx_xvftint_w_s, CODE_FOR_lasx_xvftint_l_d):
3844 2023-11-29 Alexandre Oliva <oliva@adacore.com>
3846 * doc/extend.texi (hardbool): New type attribute.
3847 * doc/invoke.texi (-ftrivial-auto-var-init): Document
3848 representation vs values.
3850 2023-11-29 Alexandre Oliva <oliva@adacore.com>
3852 * expr.cc (emit_block_move_hints): Take ctz of len. Obey
3853 -finline-stringops. Use oriented or sized loop.
3854 (emit_block_move): Take ctz of len, and pass it on.
3855 (emit_block_move_via_sized_loop): New.
3856 (emit_block_move_via_oriented_loop): New.
3857 (emit_block_move_via_loop): Take incr. Move an incr-sized
3858 block per iteration.
3859 (emit_block_cmp_via_cmpmem): Take ctz of len. Obey
3861 (emit_block_cmp_via_loop): New.
3862 * expr.h (emit_block_move): Add ctz of len defaulting to zero.
3863 (emit_block_move_hints): Likewise.
3864 (emit_block_cmp_hints): Likewise.
3865 * builtins.cc (expand_builtin_memory_copy_args): Pass ctz of
3866 len to emit_block_move_hints.
3867 (try_store_by_multiple_pieces): Support starting with a loop.
3868 (expand_builtin_memcmp): Pass ctz of len to
3869 emit_block_cmp_hints.
3870 (expand_builtin): Allow inline expansion of memset, memcpy,
3871 memmove and memcmp if requested.
3872 * common.opt (finline-stringops): New.
3873 (ilsop_fn): New enum.
3874 * flag-types.h (enum ilsop_fn): New.
3875 * doc/invoke.texi (-finline-stringops): Add.
3877 2023-11-29 Pan Li <pan2.li@intel.com>
3880 * config/riscv/riscv-string.cc (expand_block_move): Add
3881 precondition check for exact_div.
3883 2023-11-28 Roger Sayle <roger@nextmovesoftware.com>
3885 * config/arc/arc.md: Make output template whitespace consistent.
3887 2023-11-28 Jose E. Marchesi <jose.marchesi@oracle.com>
3889 * varasm.cc (assemble_external_libcall): Refer in assert only ifdef
3890 ASM_OUTPUT_EXTERNAL.
3892 2023-11-28 Andrew Pinski <quic_apinski@quicinc.com>
3894 PR tree-optimization/112738
3895 * match.pd (`(nop_convert)-(convert)a`): Reject
3896 when the outer type is boolean.
3898 2023-11-28 Richard Biener <rguenther@suse.de>
3900 PR middle-end/112732
3901 * tree.cc (build_opaque_vector_type): Reset TYPE_ALIAS_SET
3902 of the newly built type.
3904 2023-11-28 Uros Bizjak <ubizjak@gmail.com>
3907 * config/i386/i386.md (cmpstrnqi_1): Set FLAGS_REG to its previous
3908 value when operand 2 equals zero.
3909 (*cmpstrnqi_1): Ditto.
3910 (*cmpstrnqi_1 peephole2): Ditto.
3912 2023-11-28 Cupertino Miranda <cupertino.miranda@oracle.com>
3915 2023-11-28 Cupertino Miranda <cupertino.miranda@oracle.com>
3917 * config/bpf/bpf.cc (bpf_output_call): Report error in case the
3918 function call is for a builtin.
3919 (bpf_external_libcall): Added target hook to detect and report
3920 error when other external calls that are not builtins.
3922 2023-11-28 Jose E. Marchesi <jose.marchesi@oracle.com>
3925 * varasm.cc (pending_libcall_symbols): New variable.
3926 (process_pending_assemble_externals): Process
3927 pending_libcall_symbols.
3928 (assemble_external_libcall): Defer emitting external libcall
3929 symbols to process_pending_assemble_externals.
3931 2023-11-28 Cupertino Miranda <cupertino.miranda@oracle.com>
3933 * btfout.cc (btf_calc_num_vbytes): Fixed logic for enum64.
3934 (btf_asm_enum_const): Corrected logic for enum64 and smaller
3935 than 4 bytes values.
3937 2023-11-28 Cupertino Miranda <cupertino.miranda@oracle.com>
3939 * config/bpf/bpf.cc (bpf_output_call): Report error in case the
3940 function call is for a builtin.
3941 (bpf_external_libcall): Added target hook to detect and report
3942 error when other external calls that are not builtins.
3944 2023-11-28 Cupertino Miranda <cupertino.miranda@oracle.com>
3946 * config/bpf/bpf.cc (bpf_use_by_pieces_infrastructure_p): Added
3947 function to bypass default behaviour.
3948 * config/bpf/bpf.h (COMPARE_MAX_PIECES): Defined to 1024 bytes.
3950 2023-11-28 Cupertino Miranda <cupertino.miranda@oracle.com>
3952 * config/bpf/core-builtins.cc (core_mark_as_access_index):
3955 2023-11-28 Cupertino Miranda <cupertino.miranda@oracle.com>
3957 * config/bpf/core-builtins.cc
3958 (bpf_resolve_overloaded_core_builtin): Removed call.
3959 (execute_lower_bpf_core): Added all to remove_parser_plugin.
3961 2023-11-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3964 * config/riscv/riscv-v.cc (expand_vec_perm_const): Disallow poly size (1, 1) VLA SLP.
3966 2023-11-28 Jakub Jelinek <jakub@redhat.com>
3968 PR tree-optimization/112719
3969 * match.pd (parity(X)^parity(Y) -> parity(X^Y)): Handle case of
3971 * gimple-match-exports.cc (build_call_internal): Add special-case for
3972 bit query ifns on large/huge BITINT_TYPE before bitint lowering.
3974 2023-11-28 Jakub Jelinek <jakub@redhat.com>
3976 PR tree-optimization/112719
3977 * match.pd (popcount (X) + popcount (Y) -> POPCOUNT (X | Y)): Deal
3978 with argument types with different precisions.
3980 2023-11-28 David Malcolm <dmalcolm@redhat.com>
3983 * Makefile.in (PLUGIN_HEADERS): Add analyzer headers.
3984 (install-plugin): Keep the directory structure for files in
3987 2023-11-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3990 * config/riscv/riscv-vsetvl.cc (pre_vsetvl::compute_lcm_local_properties): Fix regression.
3992 2023-11-28 David Malcolm <dmalcolm@redhat.com>
3994 * diagnostic-show-locus.cc (layout::maybe_add_location_range):
3995 Don't print annotation lines for ranges when there's no column
3997 (selftest::test_one_liner_no_column): New.
3998 (selftest::test_diagnostic_show_locus_one_liner): Call it.
4000 2023-11-28 David Malcolm <dmalcolm@redhat.com>
4002 * diagnostic.cc (diagnostic_get_location_text): Convert to...
4003 (diagnostic_context::get_location_text): ...this, and convert
4004 return type from char * to label_text.
4005 (diagnostic_build_prefix): Update for above change.
4006 (default_diagnostic_start_span_fn): Likewise.
4007 (selftest::assert_location_text): Likewise.
4008 * diagnostic.h (diagnostic_context::get_location_text): New decl.
4010 2023-11-27 Andrew Pinski <quic_apinski@quicinc.com>
4012 * config/aarch64/aarch64.cc (aarch64_if_then_else_costs):
4013 Handle csinv/csinc case of 1/-1.
4015 2023-11-27 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
4016 Richard Sandiford <richard.sandiford@arm.com>
4018 PR middle-end/111754
4019 * fold-const.cc (fold_vec_perm_cst): Set result's encoding to sel's
4020 encoding, and set res_nelts_per_pattern to 2 if sel contains stepped
4021 sequence but input vectors do not.
4022 (test_nunits_min_2): New test Case 8.
4023 (test_nunits_min_4): New tests Case 8 and Case 9.
4025 2023-11-27 Szabolcs Nagy <szabolcs.nagy@arm.com>
4027 * config/aarch64/aarch64.cc (aarch64_needs_frame_chain): Do not
4028 force frame chain for eh_return.
4030 2023-11-27 Szabolcs Nagy <szabolcs.nagy@arm.com>
4032 * config/aarch64/aarch64-protos.h (aarch64_eh_return_handler_rtx):
4034 * config/aarch64/aarch64.cc (aarch64_return_address_signing_enabled):
4035 Sign return address even in functions with eh_return.
4036 (aarch64_expand_epilogue): Conditionally return with br or ret.
4037 (aarch64_eh_return_handler_rtx): Remove.
4038 * config/aarch64/aarch64.h (EH_RETURN_TAKEN_RTX): Define.
4039 (EH_RETURN_STACKADJ_RTX): Change to R5.
4040 (EH_RETURN_HANDLER_RTX): Change to R6.
4041 * df-scan.cc: Handle EH_RETURN_TAKEN_RTX.
4042 * doc/tm.texi: Regenerate.
4043 * doc/tm.texi.in: Document EH_RETURN_TAKEN_RTX.
4044 * except.cc (expand_eh_return): Handle EH_RETURN_TAKEN_RTX.
4046 2023-11-27 Thomas Schwinge <thomas@codesourcery.com>
4048 * config.gcc <amdgcn-*-amdhsa> (extra_gcc_objs): Don't set.
4049 * config/gcn/driver-gcn.cc: Remove.
4050 * config/gcn/gcn-hsa.h (ASM_SPEC, EXTRA_SPEC_FUNCTIONS): Remove
4051 'last_arg' spec function.
4052 * config/gcn/t-gcn-hsa (driver-gcn.o): Remove.
4054 2023-11-27 Thomas Schwinge <thomas@codesourcery.com>
4057 * config/gcn/gcn.opt (march=, mtune=): Tag as 'Negative' of
4060 2023-11-27 Samuel Thibault <samuel.thibault@gnu.org>
4062 * config/i386/gnu.h: Use PIE_SPEC, add static-pie case.
4063 * config/i386/gnu64.h: Use PIE_SPEC, add static-pie case.
4065 2023-11-27 Samuel Thibault <samuel.thibault@gnu.org>
4067 * config/i386/t-gnu64: New file.
4068 * config.gcc [x86_64-*-gnu*]: Add i386/t-gnu64 to
4071 2023-11-27 Richard Sandiford <richard.sandiford@arm.com>
4074 * config/aarch64/aarch64-sve-builtins.h (is_ptrue): Declare.
4075 * config/aarch64/aarch64-sve-builtins.cc (is_ptrue): New function.
4076 (gimple_folder::redirect_pred_x): Likewise.
4077 (gimple_folder::fold): Use it.
4079 2023-11-27 Richard Sandiford <richard.sandiford@arm.com>
4081 * config/aarch64/aarch64-sve-builtins.h (vector_cst_all_same): Declare.
4082 * config/aarch64/aarch64-sve-builtins.cc (vector_cst_all_same): New
4083 function, a generalized replacement of...
4084 * config/aarch64/aarch64-sve-builtins-base.cc
4085 (svlast_impl::vect_all_same): ...this.
4086 (svlast_impl::fold): Update accordingly.
4088 2023-11-27 Richard Biener <rguenther@suse.de>
4090 PR tree-optimization/112653
4091 * gimple-ssa.h (gimple_df): Add escaped_return solution.
4092 * tree-ssa.cc (init_tree_ssa): Reset it.
4093 (delete_tree_ssa): Likewise.
4094 * tree-ssa-structalias.cc (escaped_return_id): New.
4095 (find_func_aliases): Handle non-IPA return stmts by
4096 adding to ESCAPED_RETURN.
4097 (set_uids_in_ptset): Adjust HEAP escaping to also cover
4098 escapes through return.
4099 (init_base_vars): Initialize ESCAPED_RETURN.
4100 (compute_points_to_sets): Replace ESCAPED post-processing
4101 with recording the ESCAPED_RETURN solution.
4102 * tree-ssa-alias.cc (ref_may_alias_global_p_1): Check
4103 the ESCAPED_RETUNR solution.
4104 (dump_alias_info): Dump it.
4105 * cfgexpand.cc (update_alias_info_with_stack_vars): Update it.
4106 * ipa-icf.cc (sem_item_optimizer::fixup_points_to_sets):
4108 * tree-inline.cc (expand_call_inline): Reset it.
4109 * tree-parloops.cc (parallelize_loops): Likewise.
4110 * tree-sra.cc (maybe_add_sra_candidate): Check it.
4112 2023-11-27 Richard Biener <rguenther@suse.de>
4113 Richard Sandiford <richard.sandiford@arm.com>
4115 PR tree-optimization/112661
4116 * tree-vect-slp.cc (vect_get_and_check_slp_defs): Defer duplicate-and-
4117 interleave test to...
4118 (vect_build_slp_tree_2): ...here, once we have all the operands.
4119 Skip the test for uniform vectors.
4120 (vect_create_constant_vectors): Detect uniform vectors. Avoid
4121 redundant conversions in that case. Use gimple_build_vector_from_val
4122 to build the vector.
4124 2023-11-27 Richard Sandiford <richard.sandiford@arm.com>
4126 * attribs.cc (excl_hash_traits): Delete.
4127 (test_attribute_exclusions): Use pair_hash and nofree_string_hash
4130 2023-11-27 Andrew Stubbs <ams@codesourcery.com>
4132 * config/gcn/gcn.cc (gcn_vectorize_vec_perm_const): Disallow TImode.
4134 2023-11-27 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
4136 * config/s390/s390-builtin-types.def (BT_FN_UV8HI_UV8HI_UINT):
4137 Add missing builtin type.
4139 2023-11-27 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
4141 * config/s390/s390-builtin-types.def: Remove types.
4142 * config/s390/s390-builtins.def (O_U64): Remove 64-bit literal support.
4143 Don't restrict s390_vec_rli and s390_verll[bhfg] to immediates.
4144 * config/s390/s390.cc (s390_const_operand_ok): Remove 64-bit
4147 2023-11-27 Alex Coplan <alex.coplan@arm.com>
4148 Iain Sandoe <iain@sandoe.co.uk>
4151 * doc/cpp.texi: Document __has_{feature,extension}.
4153 2023-11-27 Richard Biener <rguenther@suse.de>
4155 PR tree-optimization/112706
4156 * match.pd (ptr + o ==/!=/- ptr + o'): New patterns.
4158 2023-11-27 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
4160 * config/s390/s390-builtin-types.def: Add/remove types.
4161 * config/s390/s390-builtins.def
4162 (s390_vclfnhs,s390_vclfnls,s390_vcrnfs,s390_vcfn,s390_vcnf):
4163 Replace type V8HI with UV8HI.
4165 2023-11-27 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
4167 * config/s390/s390-builtins.def
4168 (s390_vcefb,s390_vcdgb,s390_vcelfb,s390_vcdlgb,s390_vcfeb,s390_vcgdb,
4169 s390_vclfeb,s390_vclgdb): Remove flags for non-existing operands
4172 2023-11-27 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
4174 * config/s390/s390.md (*cmphi_ccu): For immediate operand 1 make
4175 use of constraint n instead of D and chop of high bits in the
4178 2023-11-27 Jakub Jelinek <jakub@redhat.com>
4181 * config.gcc (mips*-sde-elf*): Append to tm_defines rather than
4184 2023-11-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4186 * config/riscv/autovec.md
4187 (mask_len_gather_load<RATIO1:mode><RATIO1:mode>):
4188 Remove gather_scatter_valid_offset_mode_p.
4189 (mask_len_gather_load<mode><mode>): Ditto.
4190 (mask_len_scatter_store<RATIO1:mode><RATIO1:mode>): Ditto.
4191 (mask_len_scatter_store<mode><mode>): Ditto.
4192 * config/riscv/predicates.md (const_1_or_8_operand): New predicate.
4193 (vector_gs_scale_operand_64): Remove.
4194 * config/riscv/riscv-protos.h (gather_scatter_valid_offset_mode_p): Remove.
4195 * config/riscv/riscv-v.cc (expand_gather_scatter): Refine code.
4196 (gather_scatter_valid_offset_mode_p): Remove.
4197 * config/riscv/vector-iterators.md: Fix iterator bugs.
4199 2023-11-27 Tsukasa OI <research_trasio@irq.a4lg.com>
4201 * common/config/riscv/riscv-common.cc
4202 (riscv_ext_version_table): Set version to ratified 2.0.
4203 (riscv_subset_list::parse_std_ext): Allow RV64E.
4204 * config.gcc: Parse base ISA 'rv64e' and ABI 'lp64e'.
4205 * config/riscv/arch-canonicalize: Parse base ISA 'rv64e'.
4206 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins):
4207 Define different macro per XLEN. Add handling for ABI_LP64E.
4208 * config/riscv/riscv-d.cc (riscv_d_handle_target_float_abi):
4209 Add handling for ABI_LP64E.
4210 * config/riscv/riscv-opts.h (enum riscv_abi_type): Add ABI_LP64E.
4211 * config/riscv/riscv.cc (riscv_option_override): Enhance error
4212 handling to support RV64E and LP64E.
4213 (riscv_conditional_register_usage): Change "RV32E" in a comment
4215 * config/riscv/riscv.h
4216 (UNITS_PER_FP_ARG): Add handling for ABI_LP64E.
4217 (STACK_BOUNDARY): Ditto.
4218 (ABI_STACK_BOUNDARY): Ditto.
4219 (MAX_ARGS_IN_REGISTERS): Ditto.
4220 (ABI_SPEC): Add support for "lp64e".
4221 * config/riscv/riscv.opt: Parse -mabi=lp64e as ABI_LP64E.
4222 * doc/invoke.texi: Add documentation of the LP64E ABI.
4224 2023-11-27 Jose E. Marchesi <jose.marchesi@oracle.com>
4226 * config/bpf/bpf-helpers.h: Remove.
4227 * config.gcc: Adapt accordingly.
4229 2023-11-27 Guo Jie <guojie@loongson.cn>
4231 * config/loongarch/loongarch.cc (loongarch_split_plus_constant):
4232 avoid left shift of negative value -0x8000.
4234 2023-11-27 Guo Jie <guojie@loongson.cn>
4236 * config/loongarch/loongarch.cc
4237 (enum loongarch_load_imm_method): Add new method.
4238 (loongarch_build_integer): Add relevant implementations for
4240 (loongarch_move_integer): Ditto.
4242 2023-11-26 Alexander Monakov <amonakov@ispras.ru>
4244 * sort.cc: Use 'sorting networks' in comments.
4246 2023-11-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4249 * config/riscv/riscv-avlprop.cc (avl_can_be_propagated_p): Add slidedown.
4250 (vlmax_ta_p): Ditto.
4251 (pass_avlprop::get_vlmax_ta_preferred_avl): Ditto.
4253 2023-11-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4255 * config/riscv/riscv-avlprop.cc (alv_can_be_propagated_p): Fix typo.
4256 (avl_can_be_propagated_p): Ditto.
4257 (vlmax_ta_p): Ditto.
4259 2023-11-25 Gerald Pfeifer <gerald@pfeifer.com>
4262 * doc/install.texi (Downloading the source): Sort the list of
4263 front ends and add D, Go, and Modula-2.
4265 2023-11-25 Gerald Pfeifer <gerald@pfeifer.com>
4268 * doc/install.texi (Specific) <*-*-freebsd*>: Remove older
4269 contents referencing GCC 4.x.
4271 2023-11-25 Gerald Pfeifer <gerald@pfeifer.com>
4273 * doc/standards.texi (Standards): Update ISO C++ reference.
4275 2023-11-25 Jakub Jelinek <jakub@redhat.com>
4278 * config/i386/i386.md (*jcc_bt<mode>_mask,
4279 *jcc_bt<SWI48:mode>_mask_1): Add (const_int 0) as expected
4280 second operand of bt_comparison_operator.
4282 2023-11-25 Andrew Pinski <pinskia@gmail.com>
4283 Jakub Jelinek <jakub@redhat.com>
4286 * config/aarch64/aarch64-simd.md (aarch64_simd_stp<mode>): Use <vwcore>
4287 rather than %<vw> for alternative with r constraint on input operand.
4289 2023-11-24 Tobias Burnus <tobias@codesourcery.com>
4291 * doc/install.texi (amdgcn-*-amdhsa): Fix URL to ROCm;
4292 change 'in the future' to 'in LLVM 18'.
4294 2023-11-24 John David Anglin <danglin@gcc.gnu.org>
4296 * config/pa/pa.cc (pa_emit_move_sequence): Use INT14_OK_STRICT
4297 in a couple of places.
4299 2023-11-24 Martin Jambor <mjambor@suse.cz>
4301 PR middle-end/109849
4302 * tree-sra.cc (passed_by_ref_in_call): New.
4303 (sra_initialize): Allocate passed_by_ref_in_call.
4304 (sra_deinitialize): Free passed_by_ref_in_call.
4305 (create_access): Add decl pool candidates only if they are not
4307 (build_access_from_expr_1): Bail out on ADDR_EXPRs.
4308 (build_access_from_call_arg): New function.
4309 (asm_visit_addr): Rename to scan_visit_addr, change the
4310 disqualification dump message.
4311 (scan_function): Check taken addresses for all non-call statements,
4312 including phi nodes. Process all call arguments, including the static
4313 chain, build_access_from_call_arg.
4314 (maybe_add_sra_candidate): Relax need_to_live_in_memory check to allow
4315 non-escaped local variables.
4316 (sort_and_splice_var_accesses): Disallow smaller-than-precision
4317 replacements for aggregates passed by reference to functions.
4318 (sra_modify_expr): Use a separate stmt iterator for adding satements
4319 before the processed statement and after it.
4320 (enum out_edge_check): New type.
4321 (abnormal_edge_after_stmt_p): New function.
4322 (sra_modify_call_arg): New function.
4323 (sra_modify_assign): Adjust calls to sra_modify_expr.
4324 (sra_modify_function_body): Likewise, use sra_modify_call_arg to
4325 process call arguments, including the static chain.
4327 2023-11-24 Uros Bizjak <ubizjak@gmail.com>
4330 * config/i386/i386.cc (ix86_expand_split_stack_prologue): Load
4331 function address to a register for ix86_cmodel == CM_LARGE.
4333 2023-11-24 Tobias Burnus <tobias@codesourcery.com>
4335 * doc/invoke.texi (-Wopenmp): Add.
4336 * gimplify.cc (gimplify_omp_for): Add OPT_Wopenmp to warning_at.
4337 * omp-expand.cc (expand_omp_ordered_sink): Likewise.
4338 * omp-general.cc (omp_check_context_selector): Likewise.
4339 * omp-low.cc (scan_omp_for, check_omp_nesting_restrictions,
4340 lower_omp_ordered_clauses): Likewise.
4341 * omp-simd-clone.cc (simd_clone_clauses_extract): Likewise.
4343 2023-11-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4346 * config/riscv/riscv-v.cc (preferred_simd_mode): Allow poly_int (1,1) vectors.
4348 2023-11-24 Alexander Monakov <amonakov@ispras.ru>
4350 * config.in: Regenerate.
4351 * configure: Regenerate.
4352 * configure.ac: Delete manual checks for old Valgrind headers.
4353 * system.h (VALGRIND_MAKE_MEM_NOACCESS): Delete.
4354 (VALGRIND_MAKE_MEM_DEFINED): Delete.
4355 (VALGRIND_MAKE_MEM_UNDEFINED): Delete.
4356 (VALGRIND_MALLOCLIKE_BLOCK): Delete.
4357 (VALGRIND_FREELIKE_BLOCK): Delete.
4359 2023-11-24 Jakub Jelinek <jakub@redhat.com>
4362 * config/i386/i386-expand.cc (ix86_expand_branch): Use
4363 ix86_expand_vector_logical_operator to expand vector XOR rather than
4364 gen_rtx_SET on gen_rtx_XOR.
4366 2023-11-24 Alex Coplan <alex.coplan@arm.com>
4368 * rtl-ssa/access-utils.h (filter_accesses): New.
4369 (remove_regno_access): New.
4370 (check_remove_regno_access): New.
4371 * rtl-ssa/accesses.cc (rtl_ssa::remove_note_accesses_base): Use
4372 new filter_accesses helper.
4374 2023-11-24 Alex Coplan <alex.coplan@arm.com>
4376 * rtl-ssa/accesses.cc (function_info::create_set): New.
4377 * rtl-ssa/accesses.h (access_info::is_temporary): New.
4378 * rtl-ssa/changes.cc (move_insn): Handle new (temporary) insns.
4379 (function_info::finalize_new_accesses): Handle new/temporary
4380 user-created accesses.
4381 (function_info::apply_changes_to_insn): Ensure m_is_temp flag
4382 on new insns gets cleared.
4383 (function_info::change_insns): Handle new/temporary insns.
4384 (function_info::create_insn): New.
4385 * rtl-ssa/changes.h (class insn_change): Make function_info a
4387 * rtl-ssa/functions.h (function_info): Declare new entry points:
4388 create_set, create_insn. Declare new change_alloc helper.
4389 * rtl-ssa/insns.cc (insn_info::print_full): Identify temporary insns in
4391 * rtl-ssa/insns.h (insn_info): Add new m_is_temp flag and accompanying
4392 is_temporary accessor.
4393 * rtl-ssa/internals.inl (insn_info::insn_info): Initialize m_is_temp to
4395 * rtl-ssa/member-fns.inl (function_info::change_alloc): New.
4396 * rtl-ssa/movement.h (restrict_movement_for_defs_ignoring): Add
4397 handling for temporary defs.
4399 2023-11-24 Jakub Jelinek <jakub@redhat.com>
4401 PR tree-optimization/112673
4402 * match.pd (bit_field_ref (vce @0) -> bit_field_ref @0): Only simplify
4403 if either @0 doesn't have scalar integral type or if it has mode
4406 2023-11-24 Jakub Jelinek <jakub@redhat.com>
4408 PR middle-end/112679
4409 * gimple-lower-bitint.cc (gimple_lower_bitint): Also stop first loop on
4410 floating point SSA_NAME set in FLOAT_EXPR assignment from BITINT_TYPE
4411 INTEGER_CST. Set has_large_huge for those if that BITINT_TYPE is large
4412 or huge. Set kind to such FLOAT_EXPR assignment rhs1 BITINT_TYPE's kind.
4414 2023-11-24 Richard Biener <rguenther@suse.de>
4416 PR tree-optimization/112677
4417 * tree-vect-loop.cc (vectorizable_reduction): Use alloca
4418 to allocate vectype_op.
4420 2023-11-24 Haochen Gui <guihaoc@gcc.gnu.org>
4422 * expr.cc (by_pieces_ninsns): Include by pieces compare when
4423 do the adjustment for overlap operations. Replace mov_optab
4424 checks with gcc assertion.
4426 2023-11-24 Jakub Jelinek <jakub@redhat.com>
4428 PR middle-end/112668
4429 * gimple-iterator.h (gsi_end, gsi_end_bb): New inline functions.
4430 * gimple-lower-bitint.cc (bitint_large_huge::handle_cast): After
4431 temporarily adding statements after m_init_gsi, update m_init_gsi
4432 such that later additions after it will be after the added statements.
4433 (bitint_large_huge::handle_load): Likewise. When splitting
4434 gsi_bb (m_init_gsi) basic block, update m_preheader_bb if needed
4435 and update saved m_gsi as well if needed.
4436 (bitint_large_huge::lower_mergeable_stmt,
4437 bitint_large_huge::lower_comparison_stmt,
4438 bitint_large_huge::lower_mul_overflow,
4439 bitint_large_huge::lower_bit_query): Use gsi_end_bb.
4441 2023-11-24 Jakub Jelinek <jakub@redhat.com>
4444 * tree.cc (try_catch_may_fallthru): If second operand of
4445 TRY_CATCH_EXPR is not a STATEMENT_LIST, handle it as if it was a
4446 STATEMENT_LIST containing a single statement.
4448 2023-11-24 Richard Biener <rguenther@suse.de>
4450 PR tree-optimization/112344
4451 * tree-chrec.cc (chrec_apply): Only use an unsigned add
4452 when the overall increment doesn't fit the signed type.
4454 2023-11-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4457 * config/riscv/riscv-v.cc (shuffle_extract_and_slide1up_patterns): New function.
4458 (expand_vec_perm_const_1): Add new optimization.
4460 2023-11-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4462 * config/riscv/riscv-v.cc (shuffle_bswap_pattern): Disable for NUNIT < 4.
4464 2023-11-24 Haochen Jiang <haochen.jiang@intel.com>
4467 * config/i386/driver-i386.cc (check_avx10_avx512_features):
4469 (check_avx512_features): this and remove avx10 check.
4470 (host_detect_local_cpu): Never append -mno-avx10.1-{256,512} to
4471 avoid emitting warnings when building GCC with native arch.
4472 * config/i386/i386-builtin.def (BDESC): Add missing AVX512VL for
4473 128/256 bit builtin for AVX512VP2INTERSECT.
4474 * config/i386/i386-options.cc (ix86_option_override_internal):
4475 Also check whether the AVX512 flags is set when trying to reset.
4476 * config/i386/i386.h
4477 (PTA_SKYLAKE_AVX512): Add missing PTA_EVEX512.
4478 (PTA_ZNVER4): Ditto.
4480 2023-11-23 Georg-Johann Lay <avr@gjlay.de>
4483 * config/avr/avr.cc (TARGET_HAVE_SPECULATION_SAFE_VALUE): Define
4484 to speculation_safe_value_not_needed.
4486 2023-11-23 Marek Polacek <polacek@redhat.com>
4488 * common.opt (Whardened, fhardened): New options.
4489 * config.in: Regenerate.
4490 * config/bpf/bpf.cc: Include "opts.h".
4491 (bpf_option_override): If flag_stack_protector_set_by_fhardened_p, do
4492 not inform that -fstack-protector does not work.
4493 * config/i386/i386-options.cc (ix86_option_override_internal): When
4494 -fhardened, maybe enable -fcf-protection=full.
4495 * config/linux-protos.h (linux_fortify_source_default_level): Declare.
4496 * config/linux.cc (linux_fortify_source_default_level): New.
4497 * config/linux.h (TARGET_FORTIFY_SOURCE_DEFAULT_LEVEL): Redefine.
4498 * configure: Regenerate.
4499 * configure.ac: Check if the linker supports '-z now' and '-z relro'.
4500 Check if -fhardened is supported on $target_os.
4501 * doc/invoke.texi: Document -fhardened and -Whardened.
4502 * doc/tm.texi: Regenerate.
4503 * doc/tm.texi.in (TARGET_FORTIFY_SOURCE_DEFAULT_LEVEL): Add.
4504 * gcc.cc (driver_handle_option): Remember if any link options or -static
4505 were specified on the command line.
4506 (process_command): When -fhardened, maybe enable -pie and
4507 -Wl,-z,relro,-z,now.
4508 * opts.cc (flag_stack_protector_set_by_fhardened_p): New global.
4509 (finish_options): When -fhardened, enable
4510 -ftrivial-auto-var-init=zero and -fstack-protector-strong.
4511 (print_help_hardened): New.
4512 (print_help): Call it.
4513 * opts.h (flag_stack_protector_set_by_fhardened_p): Declare.
4514 * target.def (fortify_source_default_level): New target hook.
4515 * targhooks.cc (default_fortify_source_default_level): New.
4516 * targhooks.h (default_fortify_source_default_level): Declare.
4517 * toplev.cc (process_options): When -fhardened, enable
4518 -fstack-clash-protection. If flag_stack_protector_set_by_fhardened_p,
4519 do not warn that -fstack-protector not supported for this target.
4520 Don't enable -fhardened when !HAVE_FHARDENED_SUPPORT.
4522 2023-11-23 Christophe Lyon <christophe.lyon@linaro.org>
4524 * config/arm/arm-mve-builtins-functions.h
4525 (full_width_access::memory_vector_mode): Add default clause.
4527 2023-11-23 Uros Bizjak <ubizjak@gmail.com>
4530 * config/i386/i386.md (parityhi2):
4531 Use temporary register in the call to gen_parityhi2_cmp.
4533 2023-11-23 Uros Bizjak <ubizjak@gmail.com>
4536 * config/i386/i386.cc (ix86_expand_split_stack_prologue): Obtain
4537 scratch regno when flag_force_indirect_call is set. On 64-bit
4538 targets, call __morestack_large_model when flag_force_indirect_call
4539 is set and on 32-bit targets with -fpic, manually expand PIC sequence
4540 to call __morestack. Move the function address to an indirect
4541 call scratch register.
4543 2023-11-23 Sebastian Huber <sebastian.huber@embedded-brains.de>
4545 PR tree-optimization/112678
4546 * tree-profile.cc (tree_profiling): Do not use atomic operations
4547 for -fprofile-update=single.
4549 2023-11-23 Juergen Christ <jchrist@linux.ibm.com>
4551 * config/s390/s390-c.cc (s390_cpu_cpp_builtins): Define
4552 __GCC_ASM_FLAG_OUTPUTS__.
4553 * config/s390/s390.cc (s390_canonicalize_comparison): More
4554 UNSPEC_CC_TO_INT cases.
4555 (s390_md_asm_adjust): Implement flags output.
4556 * config/s390/s390.md (ccstore4): Allow mask operands.
4557 * doc/extend.texi: Document flags output.
4559 2023-11-23 Juergen Christ <jchrist@linux.ibm.com>
4561 * config/s390/s390.md: Split TImode loads.
4563 2023-11-23 Juergen Christ <jchrist@linux.ibm.com>
4565 * config/s390/vector.md: (*vec_extract) Fix.
4567 2023-11-23 Di Zhao <dizhao@os.amperecomputing.com>
4569 * tree-ssa-reassoc.cc (get_reassociation_width): check
4570 for loop dependent FMAs.
4571 (reassociate_bb): For 3 ops, refine the condition to call
4572 swap_ops_for_binary_stmt.
4574 2023-11-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4576 * config/riscv/riscv-protos.h (emit_vec_extract): New function.
4577 * config/riscv/riscv-v.cc (emit_vec_extract): Ditto.
4578 * config/riscv/riscv.cc (riscv_legitimize_move): Refine codes.
4580 2023-11-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4584 * config/riscv/riscv-avlprop.cc (alv_can_be_propagated_p): New function.
4585 (vlmax_ta_p): Disable vrgather AVL propagation.
4587 2023-11-23 Jakub Jelinek <jakub@redhat.com>
4589 PR middle-end/112336
4590 * expr.cc (EXTEND_BITINT): Don't call reduce_to_bit_field_precision
4591 if modifier is EXPAND_INITIALIZER.
4593 2023-11-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4595 * config/riscv/riscv-v.cc (emit_vlmax_gather_insn): Refine codes.
4596 (emit_vlmax_masked_gather_mu_insn): Ditto.
4597 (modulo_sel_indices): Ditto.
4598 (expand_vec_perm): Ditto.
4599 (shuffle_generic_patterns): Ditto.
4601 2023-11-23 Jakub Jelinek <jakub@redhat.com>
4603 * doc/extend.texi (__builtin_stdc_bit_ceil, __builtin_stdc_bit_floor,
4604 __builtin_stdc_bit_width, __builtin_stdc_count_ones,
4605 __builtin_stdc_count_zeros, __builtin_stdc_first_leading_one,
4606 __builtin_stdc_first_leading_zero, __builtin_stdc_first_trailing_one,
4607 __builtin_stdc_first_trailing_zero, __builtin_stdc_has_single_bit,
4608 __builtin_stdc_leading_ones, __builtin_stdc_leading_zeros,
4609 __builtin_stdc_trailing_ones, __builtin_stdc_trailing_zeros): Document.
4611 2023-11-23 Richard Biener <rguenther@suse.de>
4614 * doc/md.texi (cpymem): Document that exact overlap of source
4615 and destination needs to work.
4616 * doc/standards.texi (ffreestanding): Mention memcpy is required
4617 to handle the exact overlap case.
4619 2023-11-23 Jakub Jelinek <jakub@redhat.com>
4622 * doc/invoke.texi (-Wno-c++26-extensions): Document.
4624 2023-11-23 Manolis Tsamis <manolis.tsamis@vrull.eu>
4626 * ifcvt.cc (noce_convert_multiple_sets_1): Remove old code.
4628 2023-11-23 Pan Li <pan2.li@intel.com>
4631 * dse.cc (get_stored_val): Allow vector mode if read size is
4632 less than or equal to stored size.
4634 2023-11-23 Costas Argyris <costas.argyris@gmail.com>
4636 * configure.ac: Handle new --enable-win32-utf8-manifest
4638 * config.host: allow win32 utf8 manifest to be disabled
4640 * configure: Regenerate.
4642 2023-11-22 John David Anglin <danglin@gcc.gnu.org>
4645 * config/pa/pa.h (MAX_FIXED_MODE_SIZE): Define.
4647 2023-11-22 John David Anglin <danglin@gcc.gnu.org>
4650 * config/pa/predicates.md (integer_store_memory_operand): Return
4651 true for REG+D addresses when reload_in_progress is true.
4653 2023-11-22 Richard Biener <rguenther@suse.de>
4655 PR tree-optimization/112344
4656 * tree-chrec.cc (chrec_apply): Perform the overall increment
4657 calculation and increment in an unsigned type.
4659 2023-11-22 Andrew Stubbs <ams@codesourcery.com>
4661 * config/gcn/gcn-valu.md (*mov<mode>_4reg): Disparage AVGPR use when a
4664 2023-11-22 Vladimir N. Makarov <vmakarov@redhat.com>
4666 PR rtl-optimization/112610
4667 * ira-costs.cc: (find_costs_and_classes): Remove arg.
4668 Use ira_dump_file for printing.
4669 (print_allocno_costs, print_pseudo_costs): Ditto.
4670 (ira_costs): Adjust call of find_costs_and_classes.
4671 (ira_set_pseudo_classes): Set up and restore ira_dump_file.
4673 2023-11-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4676 * config/riscv/riscv-v.cc (shuffle_compress_patterns): Fix vcompress bug.
4678 2023-11-22 Tamar Christina <tamar.christina@arm.com>
4680 * config/aarch64/aarch64-simd.md
4681 (aarch64_uaddw<mode>_<PERM_EXTEND:perm_hilo>_zip,
4682 aarch64_usubw<mode>_<PERM_EXTEND:perm_hilo>_zip): Split into...
4683 (aarch64_uaddw<mode>_lo_zip, aarch64_uaddw<mode>_hi_zip,
4684 "aarch64_usubw<mode>_lo_zip, "aarch64_usubw<mode>_hi_zip): ... This.
4685 * config/aarch64/iterators.md (PERM_EXTEND, perm_index): Remove.
4686 (perm_hilo): Remove UNSPEC_ZIP1, UNSPEC_ZIP2.
4688 2023-11-22 Christophe Lyon <christophe.lyon@linaro.org>
4690 * config/arm/arm-mve-builtins.cc
4691 (function_resolver::infer_pointer_type): Remove spurious line.
4693 2023-11-22 Xi Ruoyao <xry111@xry111.site>
4695 * config/loongarch/lsx.md (vec_perm<mode:LSX>): Make the
4697 * config/loongarch/loongarch.cc (loongarch_expand_vec_perm):
4698 Use the mode of the selector (instead of the shuffled vector)
4699 for truncating it. Operate on subregs in the selector mode if
4700 the shuffled vector has a different mode (i. e. it's a
4701 floating-point vector).
4703 2023-11-22 Hongyu Wang <hongyu.wang@intel.com>
4705 * config/i386/i386.md (push2_di): Adjust operand order for AT&T
4707 (pop2_di): Likewise.
4708 (push2p_di): Likewise.
4709 (pop2p_di): Likewise.
4711 2023-11-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4714 * config/riscv/riscv-v.cc (emit_vlmax_gather_insn): Adapt the priority.
4715 (shuffle_generic_patterns): Fix permutation indice bug.
4716 * config/riscv/vector-iterators.md: Fix VEI16 bug.
4718 2023-11-22 liuhongt <hongtao.liu@intel.com>
4720 * config/i386/sse.md (cbranch<mode>4): Extend to Vector
4723 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
4726 * config/vax/vax.cc (index_term_p): Only accept the index scaler
4727 as the RHS operand to ASHIFT.
4729 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
4731 * config/riscv/predicates.md (order_operator): Remove predicate.
4732 * config/riscv/riscv.cc (riscv_rtx_costs): Update accordingly.
4733 * config/riscv/riscv.md (*branch<mode>, *mov<GPR:mode><X:mode>cc)
4734 (cstore<mode>4): Likewise.
4736 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
4738 * config/riscv/riscv-protos.h (riscv_expand_float_scc): Add
4739 `invert_ptr' parameter.
4740 * config/riscv/riscv.cc (riscv_emit_float_compare): Add NE
4742 (riscv_expand_float_scc): Pass `invert_ptr' through to
4743 `riscv_emit_float_compare'.
4744 (riscv_expand_conditional_move): Pass `&invert' to
4745 `riscv_expand_float_scc'.
4746 * config/riscv/riscv.md (add<mode>cc): Likewise.
4748 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
4750 * config/riscv/riscv.cc (riscv_emit_float_compare) <NE>: Handle
4752 <EQ, LE, LT, GE, GT>: Return operands supplied as is.
4753 (riscv_emit_binary): Call `riscv_emit_binary' directly rather
4754 than going through a temporary register for word-mode targets.
4755 (riscv_expand_conditional_branch): Canonicalize the comparison
4756 if not against constant zero.
4758 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
4760 * config/riscv/predicates.md (ne_operator): New predicate.
4761 * config/riscv/riscv.cc (riscv_insn_cost): Handle branches on a
4762 floating-point condition.
4763 * config/riscv/riscv.md (@cbranch<mode>4): Rename expander to...
4764 (@cbranch<ANYF:mode>4): ... this. Only expand the RTX via
4765 `riscv_expand_conditional_branch' for `!signed_order_operator'
4766 operators, otherwise let it through.
4767 (*cbranch<ANYF:mode>4, *cbranch<ANYF:mode>4): New insns and
4770 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
4772 * config/riscv/riscv.cc (riscv_expand_conditional_move): Don't
4773 bail out in floating-point conditions.
4775 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
4777 * config/riscv/riscv.cc (riscv_expand_float_scc): Suppress the
4778 use of SUBREG if the conditional-set target is word-mode.
4780 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
4782 * config/riscv/riscv.md (add<mode>cc): New expander.
4784 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
4786 * config/riscv/predicates.md (movcc_operand): New predicate.
4787 * config/riscv/riscv.cc (riscv_expand_conditional_move): Handle
4789 * config/riscv/riscv.md (mov<mode>cc): Likewise.
4790 * config/riscv/riscv.opt (mmovcc): New option.
4791 * doc/invoke.texi (Option Summary): Document it.
4793 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
4795 * config/riscv/riscv-protos.h (riscv_emit_unary): New prototype.
4796 * config/riscv/riscv.cc (riscv_emit_unary): New function.
4798 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
4800 * config/riscv/riscv.cc (riscv_expand_conditional_move): Unify
4801 conditional-move handling across all the relevant targets.
4803 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
4805 * config/riscv/riscv.cc (riscv_expand_conditional_move): Also
4806 accept constants for T-Head data input operands.
4808 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
4810 * config/riscv/riscv.cc (riscv_expand_conditional_move): Also
4811 accept constants for T-Head comparison operands.
4813 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
4815 * config/riscv/riscv.cc (riscv_expand_conditional_move): Remove
4816 the check for operand 1 being constant 0 in the Ventana/Zicond
4817 case for equality comparisons.
4819 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
4821 * config/riscv/riscv.cc (riscv_expand_conditional_move): Also
4822 invert the condition for GEU and LEU.
4824 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
4826 * config/riscv/riscv.cc (riscv_insn_cost): New function.
4827 (riscv_max_noce_ifcvt_seq_cost): Likewise.
4828 (riscv_noce_conversion_profitable_p): Likewise.
4829 (TARGET_INSN_COST): New macro.
4830 (TARGET_MAX_NOCE_IFCVT_SEQ_COST): New macro.
4831 (TARGET_NOCE_CONVERSION_PROFITABLE_P): New macro.
4833 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
4835 * config/riscv/riscv.cc (riscv_expand_conditional_move): Remove
4836 extraneous variable for EQ vs NE operation selection.
4838 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
4840 * config/riscv/riscv.cc (riscv_expand_conditional_move): Use
4841 `nullptr' rather than 0 to initialize a pointer.
4843 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
4845 * config/riscv/riscv.cc (riscv_expand_conditional_move): Use
4846 `mode0' and `mode1' for `GET_MODE (op0)' and `GET_MODE (op1)'.
4848 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
4850 * config/riscv/riscv.cc (riscv_expand_conditional_move): Use
4851 `mode' for `GET_MODE (dest)' throughout.
4853 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
4855 * config/riscv/riscv.cc (riscv_emit_int_compare): Bail out if
4856 NEED_EQ_NE_P but the comparison is neither EQ nor NE.
4858 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
4860 * config/riscv/riscv.md (mov<mode>cc): Move comment on SFB
4862 (*mov<GPR:mode><X:mode>cc): ... here.
4864 2023-11-21 Robin Dapp <rdapp@ventanamicro.com>
4866 PR middle-end/112406
4867 * tree-vect-loop.cc (vectorize_fold_left_reduction): Allow
4868 reduction index != 1.
4869 (vect_transform_reduction): Handle reduction index != 1.
4871 2023-11-21 Richard Sandiford <richard.sandiford@arm.com>
4873 * common.md (aligned_register_operand): New predicate.
4875 2023-11-21 Richard Sandiford <richard.sandiford@arm.com>
4877 * ira-int.h (ira_allocno): Add a register_filters field.
4878 (ALLOCNO_REGISTER_FILTERS): New macro.
4879 (ALLOCNO_SET_REGISTER_FILTERS): Likewise.
4880 * ira-build.cc (ira_create_allocno): Initialize register_filters.
4881 (create_cap_allocno): Propagate register_filters.
4882 (propagate_allocno_info): Likewise.
4883 (propagate_some_info_from_allocno): Likewise.
4884 * ira-lives.cc (process_register_constraint_filters): New function.
4885 (process_bb_node_lives): Use it to record register filter
4887 * ira-color.cc (assign_hard_reg): Check register filters.
4888 (improve_allocation, fast_allocation): Likewise.
4890 2023-11-21 Richard Sandiford <richard.sandiford@arm.com>
4892 * lra-constraints.cc (process_alt_operands): Check register filters.
4894 2023-11-21 Richard Sandiford <richard.sandiford@arm.com>
4896 * recog.h (operand_alternative): Add a register_filters field.
4897 (alternative_register_filters): New function.
4898 * recog.cc (preprocess_constraints): Calculate the filters field.
4899 (constrain_operands): Check register filters.
4901 2023-11-21 Richard Sandiford <richard.sandiford@arm.com>
4903 * rtl.def (DEFINE_REGISTER_CONSTRAINT): Add an optional filter
4905 * doc/md.texi (define_register_constraint): Document it.
4906 * doc/tm.texi.in: Reference it in discussion about aligned registers.
4907 * doc/tm.texi: Regenerate.
4908 * gensupport.h (register_filters, get_register_filter_id): Declare.
4909 * gensupport.cc (register_filter_map, register_filters): New variables.
4910 (get_register_filter_id): New function.
4911 (process_define_register_constraint): Likewise.
4912 (process_rtx): Pass define_register_constraints to
4913 process_define_register_constraint.
4914 * genconfig.cc (main): Emit a definition of NUM_REGISTER_FILTERS.
4915 * genpreds.cc (constraint_data): Add a filter field.
4916 (add_constraint): Update accordingly.
4917 (process_define_register_constraint): Pass the filter operand.
4918 (write_init_reg_class_start_regs): New function.
4919 (write_get_register_filter): Likewise.
4920 (write_get_register_filter_id): Likewise.
4921 (write_tm_preds_h): Write a definition of target_constraints,
4922 plus helpers to test its contents. Write the get_register_filter*
4924 (write_insn_preds_c): Write init_reg_class_start_regs.
4925 * reginfo.cc (init_reg_class_start_regs): Declare.
4926 (init_reg_sets): Call it.
4927 * target-globals.h (this_target_constraints): Declare.
4928 (target_globals): Add a constraints field.
4929 (restore_target_globals): Update accordingly.
4930 * target-globals.cc: Include tm_p.h.
4931 (default_target_globals): Initialize the constraints field.
4932 (save_target_globals): Handle the constraints field.
4933 (target_globals::~target_globals): Likewise.
4935 2023-11-21 Richard Biener <rguenther@suse.de>
4937 PR tree-optimization/112623
4938 * tree-ssa-forwprop.cc (simplify_vector_constructor):
4939 Check the source mode of the insn for vector pack/unpacks.
4941 2023-11-21 Richard Biener <rguenther@suse.de>
4943 * tree-vect-loop.cc (vect_analyze_loop_2): Move check
4944 of VF against max_vf until VF is final.
4946 2023-11-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4949 * config/riscv/riscv.cc (riscv_const_insns): Disallow DI CONST_VECTOR on RV32.
4951 2023-11-21 Tamar Christina <tamar.christina@arm.com>
4953 * config/aarch64/aarch64.cc (aarch64_override_options): Rework warnings.
4955 2023-11-21 Tamar Christina <tamar.christina@arm.com>
4958 * config/aarch64/aarch64-arches.def (armv9-a, armv9.1-a, armv9.2-a,
4959 armv9.3-a): Update to generic-armv9-a.
4960 * config/aarch64/aarch64-cores.def (generic-armv9-a): New.
4961 * config/aarch64/aarch64-tune.md: Regenerate.
4962 * config/aarch64/aarch64.cc: Include generic_armv9_a.h.
4963 * config/aarch64/tuning_models/generic_armv9_a.h: New file.
4965 2023-11-21 Tamar Christina <tamar.christina@arm.com>
4968 * config/aarch64/aarch64-arches.def (armv8-9, armv8-a, armv8.1-a,
4969 armv8.2-a, armv8.3-a, armv8.4-a, armv8.5-a, armv8.6-a, armv8.7-a,
4970 armv8.8-a): Update to generic_armv8_a.
4971 * config/aarch64/aarch64-cores.def (generic-armv8-a): New.
4972 * config/aarch64/aarch64-tune.md: Regenerate.
4973 * config/aarch64/aarch64.cc: Include generic_armv8_a.h
4974 * config/aarch64/aarch64.h (TARGET_CPU_DEFAULT): Change to
4975 TARGET_CPU_generic_armv8_a.
4976 * config/aarch64/tuning_models/generic_armv8_a.h: New file.
4978 2023-11-21 Tamar Christina <tamar.christina@arm.com>
4981 * config/aarch64/aarch64-cores.def: Add generic.
4982 * config/aarch64/aarch64-opts.h (enum aarch64_proc): Remove generic.
4983 * config/aarch64/aarch64-tune.md: Regenerate
4984 * config/aarch64/aarch64.cc (all_cores): Remove generic
4985 * config/aarch64/aarch64.h (enum target_cpus): Remove
4988 2023-11-21 Tamar Christina <tamar.christina@arm.com>
4991 * config/aarch64/aarch64.cc (generic_addrcost_table,
4992 exynosm1_addrcost_table,
4993 xgene1_addrcost_table,
4994 thunderx2t99_addrcost_table,
4995 thunderx3t110_addrcost_table,
4996 tsv110_addrcost_table,
4997 qdf24xx_addrcost_table,
4998 a64fx_addrcost_table,
4999 neoversev1_addrcost_table,
5000 neoversen2_addrcost_table,
5001 neoversev2_addrcost_table,
5002 generic_regmove_cost,
5003 cortexa57_regmove_cost,
5004 cortexa53_regmove_cost,
5005 exynosm1_regmove_cost,
5006 thunderx_regmove_cost,
5007 xgene1_regmove_cost,
5008 qdf24xx_regmove_cost,
5009 thunderx2t99_regmove_cost,
5010 thunderx3t110_regmove_cost,
5011 tsv110_regmove_cost,
5013 neoversen2_regmove_cost,
5014 neoversev1_regmove_cost,
5015 neoversev2_regmove_cost,
5016 generic_vector_cost,
5018 qdf24xx_vector_cost,
5019 thunderx_vector_cost,
5021 cortexa57_vector_cost,
5022 exynosm1_vector_cost,
5024 thunderx2t99_vector_cost,
5025 thunderx3t110_vector_cost,
5026 ampere1_vector_cost,
5027 generic_branch_cost,
5035 thunderxt88_tunings,
5042 thunderx2t99_tunings,
5043 thunderx3t110_tunings,
5047 neoversev1_vector_cost,
5049 neoverse512tvb_vector_cost,
5050 neoverse512tvb_tunings,
5051 neoversen2_vector_cost,
5053 neoversev2_vector_cost,
5055 a64fx_tunings): Split into own files.
5056 * config/aarch64/tuning_models/a64fx.h: New file.
5057 * config/aarch64/tuning_models/ampere1.h: New file.
5058 * config/aarch64/tuning_models/ampere1a.h: New file.
5059 * config/aarch64/tuning_models/cortexa35.h: New file.
5060 * config/aarch64/tuning_models/cortexa53.h: New file.
5061 * config/aarch64/tuning_models/cortexa57.h: New file.
5062 * config/aarch64/tuning_models/cortexa72.h: New file.
5063 * config/aarch64/tuning_models/cortexa73.h: New file.
5064 * config/aarch64/tuning_models/emag.h: New file.
5065 * config/aarch64/tuning_models/exynosm1.h: New file.
5066 * config/aarch64/tuning_models/generic.h: New file.
5067 * config/aarch64/tuning_models/neoverse512tvb.h: New file.
5068 * config/aarch64/tuning_models/neoversen1.h: New file.
5069 * config/aarch64/tuning_models/neoversen2.h: New file.
5070 * config/aarch64/tuning_models/neoversev1.h: New file.
5071 * config/aarch64/tuning_models/neoversev2.h: New file.
5072 * config/aarch64/tuning_models/qdf24xx.h: New file.
5073 * config/aarch64/tuning_models/saphira.h: New file.
5074 * config/aarch64/tuning_models/thunderx.h: New file.
5075 * config/aarch64/tuning_models/thunderx2t99.h: New file.
5076 * config/aarch64/tuning_models/thunderx3t110.h: New file.
5077 * config/aarch64/tuning_models/thunderxt88.h: New file.
5078 * config/aarch64/tuning_models/tsv110.h: New file.
5079 * config/aarch64/tuning_models/xgene1.h: New file.
5081 2023-11-21 Tamar Christina <tamar.christina@arm.com>
5083 * config/aarch64/aarch64-simd.md (vec_unpack<su>_lo_<mode,
5084 vec_unpack<su>_lo_<mode): Split into...
5085 (vec_unpacku_lo_<mode, vec_unpacks_lo_<mode,
5086 vec_unpacku_lo_<mode, vec_unpacks_lo_<mode): ...These.
5087 (aarch64_usubw<mode>_<PERM_EXTEND:perm_hilo>_zip): New.
5088 (aarch64_uaddw<mode>_<PERM_EXTEND:perm_hilo>_zip): New.
5089 * config/aarch64/iterators.md (PERM_EXTEND, perm_index): New.
5090 (perm_hilo): Add UNSPEC_ZIP1, UNSPEC_ZIP2.
5092 2023-11-21 Tamar Christina <tamar.christina@arm.com>
5094 * config/aarch64/aarch64.cc (aarch64_adjust_stmt_cost): Guard mla.
5095 (aarch64_vector_costs::count_ops): Likewise.
5097 2023-11-21 Sebastian Huber <sebastian.huber@embedded-brains.de>
5099 PR middle-end/112634
5100 * tree-profile.cc (gen_assign_counter_update): Cast the unsigned result type of
5101 __atomic_add_fetch() to the signed counter type.
5102 (gen_counter_update): Fix formatting.
5104 2023-11-21 Jakub Jelinek <jakub@redhat.com>
5106 * tree-profile.cc (gen_counter_update, tree_profiling): Formatting
5109 2023-11-21 Jakub Jelinek <jakub@redhat.com>
5111 PR middle-end/112639
5112 * builtins.cc (fold_builtin_bit_query): If arg0 has side-effects, arg1
5113 is specified but cleared, call save_expr on arg0.
5115 2023-11-21 Hongyu Wang <hongyu.wang@intel.com>
5117 * config/i386/i386-expand.h (gen_push): Add default bool
5119 (gen_pop): Likewise.
5120 * config/i386/i386-opts.h (enum apx_features): Add apx_ppx, add
5122 * config/i386/i386.cc (ix86_emit_restore_reg_using_pop): Add
5123 ppx_p parameter for function declaration.
5124 (gen_push2): Add ppx_p parameter, emit push2p if ppx_p is true.
5125 (gen_push): Likewise.
5126 (ix86_emit_restore_reg_using_pop2): Likewise for pop2p.
5127 (ix86_emit_save_regs): Emit pushp/push2p under TARGET_APX_PPX.
5128 (ix86_emit_restore_reg_using_pop): Add ppx_p, emit popp insn
5129 and adjust cfi when ppx_p is ture.
5130 (ix86_emit_restore_reg_using_pop2): Add ppx_p and parse to its
5132 (ix86_emit_restore_regs_using_pop2): Likewise.
5133 (ix86_expand_epilogue): Parse TARGET_APX_PPX to
5134 ix86_emit_restore_reg_using_pop.
5135 * config/i386/i386.h (TARGET_APX_PPX): New.
5136 * config/i386/i386.md (UNSPEC_APX_PPX): New unspec.
5137 (pushp_di): New define_insn.
5138 (popp_di): Likewise.
5139 (push2p_di): Likewise.
5140 (pop2p_di): Likewise.
5141 * config/i386/i386.opt: Add apx_ppx enum.
5143 2023-11-21 Richard Biener <rguenther@suse.de>
5145 PR tree-optimization/111970
5146 * tree-vect-stmts.cc (vectorizable_load): Fix offset calculation
5147 for SLP gather load.
5148 (vectorizable_store): Likewise for SLP scatter store.
5150 2023-11-21 Xi Ruoyao <xry111@xry111.site>
5152 * config/loongarch/loongarch-def.h (stdint.h): Guard with #if to
5153 exclude it for target libraries.
5154 (loongarch_isa_base_features): Likewise.
5155 (loongarch_isa): Likewise.
5156 (loongarch_abi): Likewise.
5157 (loongarch_target): Likewise.
5158 (loongarch_cpu_default_isa): Likewise.
5160 2023-11-21 liuhongt <hongtao.liu@intel.com>
5163 * config/i386/i386-expand.cc (emit_reduc_half): Hanlde
5165 * config/i386/mmx.md (reduc_<code>_scal_<mode>): New expander.
5166 (reduc_<code>_scal_v4qi): Ditto.
5168 2023-11-20 Marc Poulhiès <dkm@kataplop.net>
5170 * config/nvptx/nvptx.h (struct machine_function): Fix typo in variadic.
5171 * config/nvptx/nvptx.cc (nvptx_function_arg_advance): Adjust to use fixed name.
5172 (nvptx_declare_function_name): Likewise.
5173 (nvptx_call_args): Likewise.
5174 (nvptx_expand_call): Likewise.
5176 2023-11-20 Sebastian Huber <sebastian.huber@embedded-brains.de>
5178 * tree-profile.cc (gen_counter_update): Use unshare_expr() for the
5179 counter expression in the second gimple_build_assign().
5181 2023-11-20 Jan Hubicka <jh@suse.cz>
5183 * cgraph.cc (add_detected_attribute_1): New function.
5184 (cgraph_node::add_detected_attribute): Likewise.
5185 * cgraph.h (cgraph_node::add_detected_attribute): Declare.
5186 * common.opt: Add -Wsuggest-attribute=returns_nonnull.
5187 * doc/invoke.texi: Document new flag.
5188 * gimple-range-fold.cc (fold_using_range::range_of_call):
5189 Use known reutrn value ranges.
5190 * ipa-prop.cc (struct ipa_return_value_summary): New type.
5191 (class ipa_return_value_sum_t): New type.
5192 (ipa_return_value_sum): New summary.
5193 (ipa_record_return_value_range): New function.
5194 (ipa_return_value_range): New function.
5195 * ipa-prop.h (ipa_return_value_range): Declare.
5196 (ipa_record_return_value_range): Declare.
5197 * ipa-pure-const.cc (warn_function_returns_nonnull): New funcion.
5198 * ipa-utils.h (warn_function_returns_nonnull): Declare.
5199 * symbol-summary.h: Fix comment.
5200 * tree-vrp.cc (execute_ranger_vrp): Record return values.
5202 2023-11-20 Richard Biener <rguenther@suse.de>
5204 PR tree-optimization/112618
5205 * tree-vect-loop.cc (vect_transform_loop_stmt): For not
5206 relevant and unused .MASK_CALL make sure we remove the
5209 2023-11-20 Richard Biener <rguenther@suse.de>
5211 PR tree-optimization/112281
5212 * tree-loop-distribution.cc
5213 (loop_distribution::pg_add_dependence_edges): For = in the
5214 innermost common loop record a partition conflict.
5216 2023-11-20 Richard Biener <rguenther@suse.de>
5218 PR middle-end/112622
5219 * convert.cc (convert_to_real_1): Use element_precision
5220 where a vector type might appear. Provide specific
5221 diagnostic for unexpected vector argument.
5223 2023-11-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5226 * config/riscv/vector-iterators.md: Remove VDEMOTE and VMDEMOTE.
5227 * config/riscv/vector.md: Fix slide1 intermediate mode bug.
5229 2023-11-20 Robin Dapp <rdapp@ventanamicro.com>
5231 * config/riscv/riscv-v.cc (gather_scatter_valid_offset_mode_p):
5232 Add check for XLEN == 32.
5233 * config/riscv/vector-iterators.md: Change VLS part of the
5234 demote iterator to 2x elements modes
5235 * config/riscv/vector.md: Adjust iterators and insn conditions.
5237 2023-11-20 Christophe Lyon <christophe.lyon@linaro.org>
5239 * config/arm/arm-mve-builtins-base.cc (vld1_impl, vld1q)
5240 (vst1_impl, vst1q): New.
5241 * config/arm/arm-mve-builtins-base.def (vld1q, vst1q): New.
5242 * config/arm/arm-mve-builtins-base.h (vld1q, vst1q): New.
5243 * config/arm/arm_mve.h
5247 (vld1q_s32): Delete.
5248 (vld1q_s16): Delete.
5250 (vld1q_u32): Delete.
5251 (vld1q_u16): Delete.
5252 (vld1q_f32): Delete.
5253 (vld1q_f16): Delete.
5254 (vst1q_f32): Delete.
5255 (vst1q_f16): Delete.
5257 (vst1q_s32): Delete.
5258 (vst1q_s16): Delete.
5260 (vst1q_u32): Delete.
5261 (vst1q_u16): Delete.
5262 (__arm_vld1q_s8): Delete.
5263 (__arm_vld1q_s32): Delete.
5264 (__arm_vld1q_s16): Delete.
5265 (__arm_vld1q_u8): Delete.
5266 (__arm_vld1q_u32): Delete.
5267 (__arm_vld1q_u16): Delete.
5268 (__arm_vst1q_s8): Delete.
5269 (__arm_vst1q_s32): Delete.
5270 (__arm_vst1q_s16): Delete.
5271 (__arm_vst1q_u8): Delete.
5272 (__arm_vst1q_u32): Delete.
5273 (__arm_vst1q_u16): Delete.
5274 (__arm_vld1q_f32): Delete.
5275 (__arm_vld1q_f16): Delete.
5276 (__arm_vst1q_f32): Delete.
5277 (__arm_vst1q_f16): Delete.
5278 (__arm_vld1q): Delete.
5279 (__arm_vst1q): Delete.
5280 * config/arm/mve.md (mve_vld1q_f<mode>): Rename into ...
5281 (@mve_vld1q_f<mode>): ... this.
5282 (mve_vld1q_<supf><mode>): Rename into ...
5283 (@mve_vld1q_<supf><mode>) ... this.
5284 (mve_vst1q_f<mode>): Rename into ...
5285 (@mve_vst1q_f<mode>): ... this.
5286 (mve_vst1q_<supf><mode>): Rename into ...
5287 (@mve_vst1q_<supf><mode>) ... this.
5289 2023-11-20 Christophe Lyon <christophe.lyon@linaro.org>
5291 * config/arm/arm-mve-builtins-shapes.cc (load, store): New.
5292 * config/arm/arm-mve-builtins-shapes.h (load, store): New.
5294 2023-11-20 Christophe Lyon <christophe.lyon@linaro.org>
5296 * config/arm/arm-mve-builtins-functions.h (multi_vector_function)
5297 (full_width_access): New classes.
5298 * config/arm/arm-mve-builtins.cc
5299 (find_type_suffix_for_scalar_type, infer_pointer_type)
5300 (require_pointer_type, get_contiguous_base, add_mem_operand)
5301 (add_fixed_operand, use_contiguous_load_insn)
5302 (use_contiguous_store_insn): New.
5303 * config/arm/arm-mve-builtins.h (memory_vector_mode)
5304 (infer_pointer_type, require_pointer_type, get_contiguous_base)
5306 (add_fixed_operand, use_contiguous_load_insn)
5307 (use_contiguous_store_insn): New.
5309 2023-11-20 Christophe Lyon <christophe.lyon@linaro.org>
5311 * config/arm/arm-mve-builtins-shapes.cc (build_const_pointer):
5313 (parse_type): Add support for '_', 'al' and 'as'.
5314 * config/arm/arm-mve-builtins.h (function_instance): Add
5316 (function_base): Likewise.
5318 2023-11-20 Christophe Lyon <christophe.lyon@linaro.org>
5320 * config/arm/arm-builtins.cc (arm_init_simd_builtin_types): Fix
5321 initialization of arm_simd_types[].eltype.
5322 * config/arm/arm-mve-builtins.def (DEF_MVE_TYPE): Fix scalar
5325 2023-11-20 Jakub Jelinek <jakub@redhat.com>
5327 * typeclass.h (enum type_class): Add vector_type_class.
5328 * builtins.cc (type_to_class): Return vector_type_class for
5330 * doc/extend.texi (__builtin_classify_type): Mention bit-precise
5331 integer types and vector types.
5333 2023-11-20 Robin Dapp <rdapp@ventanamicro.com>
5335 PR middle-end/112406
5336 * tree-vect-patterns.cc (vect_recog_mask_conversion_pattern):
5337 Convert masks for conditional operations as well.
5339 2023-11-20 Jakub Jelinek <jakub@redhat.com>
5341 PR tree-optimization/90693
5342 * tree-ssa-math-opts.cc (match_single_bit_test): Mark POPCOUNT with
5343 result only used in equality comparison against 1 with direct optab
5344 support as .POPCOUNT call with 2 arguments.
5345 * internal-fn.h (expand_POPCOUNT): Declare.
5346 * internal-fn.def (DEF_INTERNAL_INT_EXT_FN): New macro, document it,
5347 undefine at the end.
5348 (POPCOUNT): Use it instead of DEF_INTERNAL_INT_FN.
5349 * internal-fn.cc (DEF_INTERNAL_INT_EXT_FN): Define to nothing before
5350 inclusion to define expanders.
5351 (expand_POPCOUNT): New function.
5353 2023-11-20 Jakub Jelinek <jakub@redhat.com>
5355 PR tree-optimization/90693
5356 * tree-ssa-math-opts.cc (match_single_bit_test): New function.
5357 (math_opts_dom_walker::after_dom_children): Call it for EQ_EXPR
5358 and NE_EXPR assignments and GIMPLE_CONDs.
5360 2023-11-20 Jakub Jelinek <jakub@redhat.com>
5362 * internal-fn.def: Document missing DEF_INTERNAL* macros and make sure
5363 they are all undefined at the end.
5364 * internal-fn.cc (lookup_hilo_internal_fn, lookup_evenodd_internal_fn,
5365 widening_fn_p, get_len_internal_fn): Don't undef DEF_INTERNAL_*FN
5366 macros after inclusion of internal-fn.def.
5368 2023-11-20 Haochen Jiang <haochen.jiang@intel.com>
5370 * common/config/i386/cpuinfo.h (get_available_features):
5371 Add avx10_set and version and detect avx10.1.
5372 (cpu_indicator_init): Handle avx10.1-512.
5373 * common/config/i386/i386-common.cc
5374 (OPTION_MASK_ISA2_AVX10_1_256_SET): New.
5375 (OPTION_MASK_ISA2_AVX10_1_256_SET): Ditto.
5376 (OPTION_MASK_ISA2_AVX10_1_512_UNSET): Ditto.
5377 (OPTION_MASK_ISA2_AVX10_1_512_UNSET): Ditto.
5378 (OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10.1.
5379 (ix86_handle_option): Handle -mavx10.1-256 and -mavx10.1-512.
5380 Add indicator for explicit no-avx512 and no-avx10.1 options.
5381 * common/config/i386/i386-cpuinfo.h (enum processor_features):
5382 Add FEATURE_AVX10_1_256 and FEATURE_AVX10_1_512.
5383 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
5384 AVX10_1_256 and AVX10_1_512.
5385 * config/i386/cpuid.h (bit_AVX10): New.
5386 (bit_AVX10_256): Ditto.
5387 (bit_AVX10_512): Ditto.
5388 * config/i386/driver-i386.cc (check_avx10_avx512_features): New.
5389 (host_detect_local_cpu): Do not append "-mno-" options under
5390 specific scenarios to avoid emitting a warning.
5391 * config/i386/i386-isa.def
5392 (EVEX512): Add DEF_PTA(EVEX512).
5393 (AVX10_1_256): Add DEF_PTA(AVX10_1_256).
5394 (AVX10_1_512): Add DEF_PTA(AVX10_1_512).
5395 * config/i386/i386-options.cc (isa2_opts): Add -mavx10.1-256 and
5397 (ix86_function_specific_save): Save explicit no indicator.
5398 (ix86_function_specific_restore): Restore explicit no indicator.
5399 (ix86_valid_target_attribute_inner_p): Handle avx10.1, avx10.1-256 and
5401 (ix86_valid_target_attribute_tree): Handle avx512 function
5402 attributes with avx10.1 command line option.
5403 (ix86_option_override_internal): Handle AVX10.1 options.
5404 * config/i386/i386.h: Add PTA_EVEX512 for AVX512 target
5406 * config/i386/i386.opt: Add variable ix86_no_avx512_explicit and
5407 ix86_no_avx10_1_explicit, option -mavx10.1, -mavx10.1-256 and
5409 * doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512.
5410 * doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512.
5411 * doc/sourcebuild.texi: Document target avx10.1, avx10.1-256
5414 2023-11-20 liuhongt <hongtao.liu@intel.com>
5417 * config/i386/sse.md (reduc_<code>_scal_<mode>): New expander.
5418 (REDUC_ANY_LOGIC_MODE): New iterator.
5419 (REDUC_PLUS_MODE): Extend to VxHI/SI/DImode.
5420 (REDUC_SSE_PLUS_MODE): Ditto.
5422 2023-11-20 xuli <xuli1@eswincomputing.com>
5425 * config/riscv/riscv-opts.h (enum riscv_stringop_strategy_enum): Strategy enum.
5426 * config/riscv/riscv-string.cc (riscv_expand_block_move): Disabled based on options.
5427 (expand_block_move): Ditto.
5428 * config/riscv/riscv.opt: Add -mmemcpy-strategy=.
5430 2023-11-20 Lulu Cheng <chenglulu@loongson.cn>
5432 * config/loongarch/gnu-user.h (MUSL_ABI_SPEC): Modify suffix.
5434 2023-11-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5436 * config/riscv/riscv-v.cc (emit_vlmax_insn_lra): Optimize constant AVL.
5438 2023-11-19 Philipp Tomsich <philipp.tomsich@vrull.eu>
5440 * config/riscv/riscv-protos.h (extract_base_offset_in_addr): Prototype.
5441 * config/riscv/riscv.cc (riscv_fusion_pairs): New enum.
5442 (riscv_tune_param): Add fusible_ops field.
5443 (riscv_tune_param_rocket_tune_info): Initialize new field.
5444 (riscv_tune_param_sifive_7_tune_info): Likewise.
5445 (thead_c906_tune_info): Likewise.
5446 (generic_oo_tune_info): Likewise.
5447 (optimize_size_tune_info): Likewise.
5448 (riscv_macro_fusion_p): New function.
5449 (riscv_fusion_enabled_p): Likewise.
5450 (riscv_macro_fusion_pair_p): Likewise.
5451 (TARGET_SCHED_MACRO_FUSION_P): Define.
5452 (TARGET_SCHED_MACRO_FUSION_PAIR_P): Likewise.
5453 (extract_base_offset_in_addr): Moved into riscv.cc from...
5454 * config/riscv/thead.cc: Here.
5455 Co-authored-by: Raphael Zinsly <rzinsly@ventanamicro.com>
5456 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
5458 2023-11-19 Jeff Law <jlaw@ventanamicro.com>
5460 * config/c6x/c6x.md (mvilc): Add mode to UNSPEC source.
5461 * config/mips/mips.md (rdhwr_synci_step_<mode>): Likewise.
5462 * config/riscv/riscv.md (riscv_frcsr, riscv_frflags): Likewise.
5463 * config/s390/s390.md (@split_stack_call<mode>): Likewise.
5464 (@split_stack_cond_call<mode>): Likewise.
5465 * config/sh/sh.md (sp_switch_1): Likewise.
5467 2023-11-19 David Malcolm <dmalcolm@redhat.com>
5469 * diagnostic.h: Include "rich-location.h".
5470 * edit-context.h (class fixit_hint): New forward decl.
5471 * gcc-rich-location.h: Include "rich-location.h".
5472 * genmatch.cc: Likewise.
5473 * pretty-print.h: Likewise.
5475 2023-11-19 David Malcolm <dmalcolm@redhat.com>
5477 * Makefile.in (CPPLIB_H): Add libcpp/include/rich-location.h.
5478 * coretypes.h (class rich_location): New forward decl.
5480 2023-11-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5482 * config/riscv/riscv-v.cc (expand_tuple_move): Fix bug.
5484 2023-11-19 David Malcolm <dmalcolm@redhat.com>
5487 * doc/invoke.texi: Add -Wanalyzer-undefined-behavior-strtok.
5489 2023-11-18 Xi Ruoyao <xry111@xry111.site>
5491 * config/loongarch/predicates.md (const_call_insn_operand):
5492 Remove buggy "HAVE_AS_SUPPORT_CALL36" conditions. Change "1" to
5493 "true" to make the coding style consistent.
5495 2023-11-18 Xi Ruoyao <xry111@xry111.site>
5497 * config/loongarch/genopts/isa-evolution.in: (lam-bh, lamcas):
5499 * config/loongarch/loongarch-str.h: Regenerate.
5500 * config/loongarch/loongarch.opt: Regenerate.
5501 * config/loongarch/loongarch-cpucfg-map.h: Regenerate.
5502 * config/loongarch/loongarch-cpu.cc
5503 (ISA_BASE_LA64V110_FEATURES): Include OPTION_MASK_ISA_LAM_BH
5504 and OPTION_MASK_ISA_LAMCAS.
5505 * config/loongarch/sync.md (atomic_add<mode:SHORT>): Use
5506 TARGET_LAM_BH instead of ISA_BASE_IS_LA64V110. Remove empty
5507 lines from assembly output.
5508 (atomic_exchange<mode>_short): Likewise.
5509 (atomic_exchange<mode:SHORT>): Likewise.
5510 (atomic_fetch_add<mode>_short): Likewise.
5511 (atomic_fetch_add<mode:SHORT>): Likewise.
5512 (atomic_cas_value_strong<mode>_amcas): Use TARGET_LAMCAS instead
5513 of ISA_BASE_IS_LA64V110.
5514 (atomic_compare_and_swap<mode>): Likewise.
5515 (atomic_compare_and_swap<mode:GPR>): Likewise.
5516 (atomic_compare_and_swap<mode:SHORT>): Likewise.
5517 * config/loongarch/loongarch.cc (loongarch_asm_code_end): Dump
5518 status if -mlam-bh and -mlamcas if -fverbose-asm.
5520 2023-11-18 Xi Ruoyao <xry111@xry111.site>
5522 * config/loongarch/loongarch.cc (loongarch_print_operand): Don't
5523 print dbar 0x700 if TARGET_LD_SEQ_SA.
5524 * config/loongarch/sync.md (atomic_load<mode>): Likewise.
5526 2023-11-18 Xi Ruoyao <xry111@xry111.site>
5528 * config/loongarch/loongarch.md (DIV): New mode iterator.
5529 (<optab:ANY_DIV><mode:GPR>3): Don't expand if TARGET_DIV32.
5530 (<optab:ANY_DIV>di3_fake): Disable if TARGET_DIV32.
5531 (*<optab:ANY_DIV><mode:GPR>3): Allow SImode if TARGET_DIV32.
5532 (<optab:ANY_DIV>si3_extended): New insn if TARGET_DIV32.
5534 2023-11-18 Xi Ruoyao <xry111@xry111.site>
5536 * config/loongarch/loongarch-def.h:
5537 (loongarch_isa_base_features): Declare. Define it in ...
5538 * config/loongarch/loongarch-cpu.cc
5539 (loongarch_isa_base_features): ... here.
5540 (fill_native_cpu_config): If we know the base ISA of the CPU
5541 model from PRID, use it instead of la64 (v1.0). Check if all
5542 expected features of this base ISA is available, emit a warning
5544 * config/loongarch/loongarch-opts.cc (config_target_isa): Enable
5545 the features implied by the base ISA if not -march=native.
5547 2023-11-18 Xi Ruoyao <xry111@xry111.site>
5549 * config/loongarch/genopts/isa-evolution.in: New data file.
5550 * config/loongarch/genopts/genstr.sh: Translate info in
5551 isa-evolution.in when generating loongarch-str.h, loongarch.opt,
5552 and loongarch-cpucfg-map.h.
5553 * config/loongarch/genopts/loongarch.opt.in (isa_evolution):
5555 * config/loongarch/t-loongarch: (loongarch-cpucfg-map.h): New
5557 (loongarch-str.h): Depend on isa-evolution.in.
5558 (loongarch.opt): Depend on isa-evolution.in.
5559 (loongarch-cpu.o): Depend on loongarch-cpucfg-map.h.
5560 * config/loongarch/loongarch-str.h: Regenerate.
5561 * config/loongarch/loongarch-def.h (loongarch_isa): Add field
5562 for evolution features. Add helper function to enable features
5564 Probe native CPU capability and save the corresponding options
5566 * config/loongarch/loongarch-cpu.cc (fill_native_cpu_config):
5567 Probe native CPU capability and save the corresponding options
5569 (cache_cpucfg): Simplify with C++11-style for loop.
5570 (cpucfg_useful_idx, N_CPUCFG_WORDS): Move to ...
5571 * config/loongarch/loongarch.cc
5572 (loongarch_option_override_internal): Enable the ISA evolution
5573 feature options implied by -march and not explicitly disabled.
5574 (loongarch_asm_code_end): New function, print ISA information as
5575 comments in the assembly if -fverbose-asm. It makes easier to
5576 debug things like -march=native.
5577 (TARGET_ASM_CODE_END): Define.
5578 * config/loongarch/loongarch.opt: Regenerate.
5579 * config/loongarch/loongarch-cpucfg-map.h: Generate.
5580 (cpucfg_useful_idx, N_CPUCFG_WORDS) ... here.
5582 2023-11-18 Xi Ruoyao <xry111@xry111.site>
5584 * config/loongarch/genopts/loongarch-strings:
5585 (STR_ISA_BASE_LA64V110): Add.
5586 * config/loongarch/genopts/loongarch.opt.in:
5587 (ISA_BASE_LA64V110): Add.
5588 * config/loongarch/loongarch-def.c
5589 (loongarch_isa_base_strings): Initialize [ISA_BASE_LA64V110]
5590 to STR_ISA_BASE_LA64V110.
5591 * config/loongarch/loongarch.opt: Regenerate.
5592 * config/loongarch/loongarch-str.h: Regenerate.
5594 2023-11-18 Sebastian Huber <sebastian.huber@embedded-brains.de>
5596 * doc/invoke.texi (-fprofile-update): Clarify default method. Document
5597 the atomic method behaviour.
5598 * tree-profile.cc (enum counter_update_method): New.
5599 (counter_update): Likewise.
5600 (gen_counter_update): Use counter_update_method. Split the
5601 atomic counter update in two 32-bit atomic operations if
5603 (tree_profiling): Select counter_update_method.
5605 2023-11-18 Sebastian Huber <sebastian.huber@embedded-brains.de>
5607 * tree-profile.cc (gen_assign_counter_update): New.
5608 (gen_counter_update): Likewise.
5609 (gimple_gen_edge_profiler): Use gen_counter_update().
5610 (gimple_gen_time_profiler): Likewise.
5612 2023-11-18 Sebastian Huber <sebastian.huber@embedded-brains.de>
5614 * config/rtems.h (TARGET_HAVE_LIBATOMIC): Define.
5615 * doc/tm.texi: Regenerate.
5616 * doc/tm.texi.in (TARGET_HAVE_LIBATOMIC): Add.
5617 * target.def (have_libatomic): New.
5619 2023-11-18 Sebastian Huber <sebastian.huber@embedded-brains.de>
5622 2023-11-18 Sebastian Huber <sebastian.huber@embedded-brains.de>
5624 * config/sparc/rtemself.h (SPARC_GCOV_TYPE_SIZE): Define.
5625 * config/sparc/sparc.c (sparc_gcov_type_size): New.
5626 (TARGET_GCOV_TYPE_SIZE): Redefine if SPARC_GCOV_TYPE_SIZE is defined.
5627 * coverage.c (get_gcov_type): Use targetm.gcov_type_size().
5628 * doc/tm.texi (TARGET_GCOV_TYPE_SIZE): Add hook under "Misc".
5629 * doc/tm.texi.in: Regenerate.
5630 * target.def (gcov_type_size): New target hook.
5631 * targhooks.c (default_gcov_type_size): New.
5632 * targhooks.h (default_gcov_type_size): Declare.
5633 * tree-profile.c (gimple_gen_edge_profiler): Use precision of
5635 (gimple_gen_time_profiler): Likewise.
5637 2023-11-18 Kito Cheng <kito.cheng@sifive.com>
5639 * config/riscv/riscv-target-attr.cc
5640 (riscv_target_attr_parser::parse_arch): Use char[] for
5641 std::unique_ptr to prevent mismatched new delete issue.
5642 (riscv_process_one_target_attr): Ditto.
5643 (riscv_process_target_attr): Ditto.
5645 2023-11-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5647 * config/riscv/vector-iterators.md: Refactor iterators.
5649 2023-11-18 Lulu Cheng <chenglulu@loongson.cn>
5651 * config/loongarch/sync.md (atomic_load<mode>): New template.
5653 2023-11-18 Lulu Cheng <chenglulu@loongson.cn>
5655 * config/loongarch/loongarch-def.h: Add comments.
5656 * config/loongarch/loongarch-opts.h (ISA_BASE_IS_LA64V110): Define macro.
5657 * config/loongarch/loongarch.cc (loongarch_memmodel_needs_rel_acq_fence):
5658 Remove redundant code implementations.
5659 * config/loongarch/sync.md (d): Added QI, HI support.
5660 (atomic_add<mode>): New template.
5661 (atomic_exchange<mode>_short): Likewise.
5662 (atomic_cas_value_strong<mode>_amcas): Likewise..
5663 (atomic_fetch_add<mode>_short): Likewise.
5665 2023-11-18 Lulu Cheng <chenglulu@loongson.cn>
5667 * config.gcc: Support LA664.
5668 * config/loongarch/genopts/loongarch-strings: Likewise.
5669 * config/loongarch/genopts/loongarch.opt.in: Likewise.
5670 * config/loongarch/loongarch-cpu.cc (fill_native_cpu_config): Likewise.
5671 * config/loongarch/loongarch-def.c: Likewise.
5672 * config/loongarch/loongarch-def.h (N_ISA_BASE_TYPES): Likewise.
5673 (ISA_BASE_LA64V110): Define macro.
5674 (N_ARCH_TYPES): Update value.
5675 (N_TUNE_TYPES): Update value.
5676 (CPU_LA664): New macro.
5677 * config/loongarch/loongarch-opts.cc (isa_default_abi): Likewise.
5678 (isa_base_compat_p): Likewise.
5679 * config/loongarch/loongarch-opts.h (TARGET_64BIT): This parameter is enabled
5680 when la_target.isa.base is equal to ISA_BASE_LA64V100 or ISA_BASE_LA64V110.
5681 (TARGET_uARCH_LA664): Define macro.
5682 * config/loongarch/loongarch-str.h (STR_CPU_LA664): Likewise.
5683 * config/loongarch/loongarch.cc (loongarch_cpu_sched_reassociation_width):
5685 * config/loongarch/loongarch.opt: Regenerate.
5687 2023-11-18 Lulu Cheng <chenglulu@loongson.cn>
5688 Xi Ruoyao <xry111@xry111.site>
5690 * config.in: Regenerate.
5691 * config/loongarch/loongarch-opts.h (HAVE_AS_SUPPORT_CALL36): Define macro.
5692 * config/loongarch/loongarch.cc (loongarch_legitimize_call_address):
5693 If binutils supports call36, the function call is not split over expand.
5694 * config/loongarch/loongarch.md: Add call36 generation code.
5695 * config/loongarch/predicates.md: Likewise.
5696 * configure: Regenerate.
5697 * configure.ac: Check whether binutils supports call36.
5699 2023-11-18 David Malcolm <dmalcolm@redhat.com>
5702 * Makefile.in (ANALYZER_OBJS): Add analyzer/infinite-loop.o.
5703 * doc/invoke.texi: Add -fdump-analyzer-infinite-loop and
5704 -Wanalyzer-infinite-loop. Add missing CWE link for
5705 -Wanalyzer-infinite-recursion.
5706 * timevar.def (TV_ANALYZER_INFINITE_LOOPS): New.
5708 2023-11-17 Robin Dapp <rdapp@ventanamicro.com>
5710 PR middle-end/112406
5711 PR middle-end/112552
5712 * tree-vect-loop.cc (vect_transform_reduction): Pass truth
5713 vectype for mask operand.
5715 2023-11-17 Jakub Jelinek <jakub@redhat.com>
5718 * gimplify.cc (expand_FALLTHROUGH_r): Use wi->removed_stmt after
5719 gsi_remove, change the way of passing fallthrough stmt at the end
5720 of sequence to expand_FALLTHROUGH. Diagnose IFN_FALLTHROUGH
5721 with GF_CALL_NOTHROW flag.
5722 (expand_FALLTHROUGH): Change loc into array of 2 location_t elts,
5723 don't test wi.callback_result, instead check whether first
5724 elt is not UNKNOWN_LOCATION and in that case pedwarn with the
5726 * gimple-walk.cc (walk_gimple_seq_mod): Clear wi->removed_stmt
5727 after the flag has been used.
5728 * internal-fn.def (FALLTHROUGH): Mention in comment the special
5729 meaning of the TREE_NOTHROW/GF_CALL_NOTHROW flag on the calls.
5731 2023-11-17 Jakub Jelinek <jakub@redhat.com>
5733 PR tree-optimization/112566
5734 PR tree-optimization/83171
5735 * match.pd (ctz(ext(X)) -> ctz(X), popcount(zext(X)) -> popcount(X),
5736 parity(ext(X)) -> parity(X), ffs(ext(X)) -> ffs(X)): New
5738 ( __builtin_ffs (X) == 0 -> X == 0): Use FFS rather than
5739 BUILT_IN_FFS BUILT_IN_FFSL BUILT_IN_FFSLL BUILT_IN_FFSIMAX.
5741 2023-11-17 Jakub Jelinek <jakub@redhat.com>
5743 PR tree-optimization/112374
5744 * tree-vect-loop.cc (check_reduction_path): Perform the cond_fn_p
5745 special case only if op_use_stmt == use_stmt, use as_a rather than
5746 dyn_cast in that case.
5748 2023-11-17 Richard Biener <rguenther@suse.de>
5751 2023-11-14 Richard Biener <rguenther@suse.de>
5753 PR tree-optimization/112281
5754 * tree-loop-distribution.cc (pg_add_dependence_edges):
5755 Preserve stmt order when the innermost loop has exact
5758 2023-11-17 Georg-Johann Lay <avr@gjlay.de>
5761 * config/avr/avr.cc (avr_asm_named_section) [AVR_SECTION_PROGMEM]:
5762 Only return some .progmem*.data section if the user did not
5763 specify a section attribute.
5764 (avr_section_type_flags) [avr_progmem_p]: Unset SECTION_NOTYPE
5765 in returned section flags.
5767 2023-11-17 Xi Ruoyao <xry111@xry111.site>
5769 * config/loongarch/lsx.md (copysign<mode>3): Allow operand[2] to
5770 be an reg_or_vector_same_val_operand. If it's a const vector
5771 with same negative elements, expand the copysign with a bitset
5772 instruction. Otherwise, force it into an register.
5773 * config/loongarch/lasx.md (copysign<mode>3): Likewise.
5775 2023-11-17 Haochen Gui <guihaoc@gcc.gnu.org>
5778 * config/rs6000/vsx.md (*vsx_le_mem_to_mem_mov_ti): New.
5780 2023-11-17 Haochen Gui <guihaoc@gcc.gnu.org>
5783 * config/rs6000/altivec.md (cbranchv16qi4): New expand pattern.
5784 * config/rs6000/rs6000.cc (rs6000_generate_compare): Generate
5785 insn sequence for V16QImode equality compare.
5786 * config/rs6000/rs6000.h (MOVE_MAX_PIECES): Define.
5787 (STORE_MAX_PIECES): Define.
5789 2023-11-17 Li Wei <liwei@loongson.cn>
5791 * config/loongarch/loongarch.h (CLZ_DEFINED_VALUE_AT_ZERO):
5793 (CTZ_DEFINED_VALUE_AT_ZERO): Same.
5795 2023-11-17 Richard Biener <rguenther@suse.de>
5797 * dwarf2out.cc (add_AT_die_ref): Assert we do not add
5798 a self-ref DW_AT_abstract_origin or DW_AT_specification.
5800 2023-11-17 Jiahao Xu <xujiahao@loongson.cn>
5802 * config/loongarch/loongarch.cc
5803 (loongarch_builtin_vectorization_cost): Adjust.
5805 2023-11-16 Andrew Pinski <pinskia@gmail.com>
5807 PR rtl-optimization/112483
5808 * simplify-rtx.cc (simplify_binary_operation_1) <case COPYSIGN>:
5809 Call simplify_unary_operation for NEG instead of
5812 2023-11-16 Edwin Lu <ewlu@rivosinc.com>
5815 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): update macro name
5817 2023-11-16 Uros Bizjak <ubizjak@gmail.com>
5820 * config/i386/i386.md (*addqi_ext2<mode>_0):
5821 New define_insn_and_split pattern.
5822 (*subqi_ext2<mode>_0): Ditto.
5823 (*<code>qi_ext2<mode>_0): Ditto.
5825 2023-11-16 John David Anglin <danglin@gcc.gnu.org>
5827 PR rtl-optimization/112415
5828 * config/pa/pa.cc (pa_legitimate_address_p): Allow 14-bit
5829 displacements before reload. Simplify logic flow. Revise
5831 * config/pa/pa.h (TARGET_ELF64): New define.
5832 (INT14_OK_STRICT): Update define and comment.
5833 * config/pa/pa64-linux.h (TARGET_ELF64): Define.
5834 * config/pa/predicates.md (base14_operand): Don't check
5835 alignment of short displacements.
5836 (integer_store_memory_operand): Don't return true when
5837 reload_in_progress is true. Remove INT_5_BITS check.
5838 (floating_point_store_memory_operand): Don't return true when
5839 reload_in_progress is true. Use INT14_OK_STRICT to check
5840 whether long displacements are always okay.
5842 2023-11-16 Uros Bizjak <ubizjak@gmail.com>
5845 * config/i386/i386.md (*<any_logic:code>qi_ext<mode>_1_slp):
5846 Fix generation of invalid RTX in split pattern.
5848 2023-11-16 David Malcolm <dmalcolm@redhat.com>
5850 * diagnostic.cc (diagnostic_context::set_option_hooks): Add
5852 * diagnostic.h (diagnostic_context::option_enabled_p): Update for
5853 move of m_lang_mask.
5854 (diagnostic_context::set_option_hooks): Add "lang_mask" param.
5855 (diagnostic_context::get_lang_mask): New.
5856 (diagnostic_context::m_lang_mask): Move into m_option_callbacks,
5857 thus making private.
5858 * lto-wrapper.cc (main): Update for new lang_mask param of
5860 * toplev.cc (init_asm_output): Use get_lang_mask.
5861 (general_init): Move initialization of global_dc's lang_mask to
5862 new lang_mask param of set_option_hooks.
5864 2023-11-16 Tamar Christina <tamar.christina@arm.com>
5866 PR tree-optimization/111878
5867 * tree-vect-loop-manip.cc (find_loop_location): Skip edges check if
5870 2023-11-16 Kito Cheng <kito.cheng@sifive.com>
5872 * config.gcc (riscv): Add riscv-target-attr.o.
5873 * config/riscv/riscv-protos.h (riscv_declare_function_size) New.
5874 (riscv_option_valid_attribute_p): New.
5875 (riscv_override_options_internal): New.
5876 (struct riscv_tune_info): New.
5877 (riscv_parse_tune): New.
5878 * config/riscv/riscv-target-attr.cc
5879 (class riscv_target_attr_parser): New.
5880 (struct riscv_attribute_info): New.
5881 (riscv_attributes): New.
5882 (riscv_target_attr_parser::parse_arch): New.
5883 (riscv_target_attr_parser::handle_arch): New.
5884 (riscv_target_attr_parser::handle_cpu): New.
5885 (riscv_target_attr_parser::handle_tune): New.
5886 (riscv_target_attr_parser::update_settings): New.
5887 (riscv_process_one_target_attr): New.
5888 (num_occurences_in_str): New.
5889 (riscv_process_target_attr): New.
5890 (riscv_option_valid_attribute_p): New.
5891 * config/riscv/riscv.cc: Include target-globals.h and
5893 (struct riscv_tune_info): Move to riscv-protos.h.
5894 (get_tune_str): New.
5895 (riscv_parse_tune): New parameter null_p.
5896 (riscv_declare_function_size): New.
5897 (riscv_option_override): Build target_option_default_node and
5898 target_option_current_node.
5899 (riscv_save_restore_target_globals): New.
5900 (riscv_option_restore): New.
5901 (riscv_previous_fndecl): New.
5902 (riscv_set_current_function): Apply the target attribute.
5903 (TARGET_OPTION_RESTORE): Define.
5904 (TARGET_OPTION_VALID_ATTRIBUTE_P): Ditto.
5905 * config/riscv/riscv.h (SWITCHABLE_TARGET): Define to 1.
5906 (ASM_DECLARE_FUNCTION_SIZE) Define.
5907 * config/riscv/riscv.opt (mtune=): Add Save attribute.
5910 * config/riscv/t-riscv: Add build rule for riscv-target-attr.o
5911 * doc/extend.texi: Add doc for target attribute.
5913 2023-11-16 Kito Cheng <kito.cheng@sifive.com>
5916 * config/riscv/riscv.cc (riscv_save_return_addr_reg_p): Check ra
5919 2023-11-16 liuhongt <hongtao.liu@intel.com>
5922 * config/i386/mmx.md (*vec_dup<mode>): Extend for V4HI and
5925 2023-11-16 Jakub Jelinek <jakub@redhat.com>
5928 * config/i386/i386.md
5929 (mov imm,%rax; mov %rdi,%rdx; mulx %rax -> mov imm,%rdx; mulx %rdi):
5930 Verify in define_peephole2 that operands[2] dies or is overwritten
5931 at the end of multiplication.
5933 2023-11-16 Jakub Jelinek <jakub@redhat.com>
5935 PR tree-optimization/112536
5936 * tree-vect-slp.cc (arg0_map): New variable.
5937 (vect_get_operand_map): For IFN_CLZ or IFN_CTZ, return arg0_map.
5939 2023-11-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5941 PR middle-end/112554
5942 * tree-vect-loop.cc (vect_determine_partial_vectors_and_peeling):
5943 Clear SELECT_VL_P for non-partial vectorization.
5945 2023-11-16 Hongyu Wang <hongyu.wang@intel.com>
5947 * config/i386/sse.md (vec_extract_hi_<mode>): Add noavx512vl
5948 alternative with attr addr gpr16 and "jm" constraint.
5949 (vec_extract_hi_<mode>): Likewise for SF vector modes.
5950 (@vec_extract_hi_<mode>): Likewise.
5951 (*vec_extractv2ti): Likewise.
5952 (vec_set_hi_<mode><mask_name>): Likewise.
5953 * config/i386/mmx.md (@sse4_1_insertps_<mode>): Correct gpr16 attr for
5956 2023-11-15 Uros Bizjak <ubizjak@gmail.com>
5959 * config/i386/i386.md (*movstrictqi_ext<mode>_1): New insn pattern.
5960 (*addqi_ext<mode>_2_slp): New define_insn_and_split pattern.
5961 (*subqi_ext<mode>_2_slp): Ditto.
5962 (*<any_logic:code>qi_ext<mode>_2_slp): Ditto.
5964 2023-11-15 Patrick O'Neill <patrick@rivosinc.com>
5966 * common/config/riscv/riscv-common.cc
5967 (riscv_subset_list::parse_std_ext): Emit an error and skip to
5968 the next extension when a non-canonical ordering is detected.
5970 2023-11-15 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
5972 * gcc-rich-location.cc (maybe_range_label_for_tree_type_mismatch::get_text):
5973 Revert using the macro CAN_HAVE_LOCATION_P.
5975 2023-11-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5978 * config/riscv/riscv-vsetvl.cc (pre_vsetvl::emit_vsetvl): Insert
5979 local vsetvl info before LCM suggested one.
5980 Tested-by: Patrick O'Neill <patrick@rivosinc.com> # pre-commit-CI #679
5981 Co-developed-by: Vineet Gupta <vineetg@rivosinc.com>
5983 2023-11-15 Vineet Gupta <vineetg@rivosinc.com>
5985 * config/riscv/riscv.cc (riscv_sign_extend_if_not_subreg_prom): New.
5986 * (riscv_extend_comparands): Call New function on operands.
5988 2023-11-15 Uros Bizjak <ubizjak@gmail.com>
5990 * config/i386/i386.md (*addqi_ext<mode>_1_slp):
5991 Add "&& " before "reload_completed" in split condition.
5992 (*subqi_ext<mode>_1_slp): Ditto.
5993 (*<any_logic:code>qi_ext<mode>_1_slp): Ditto.
5995 2023-11-15 Uros Bizjak <ubizjak@gmail.com>
5998 * config/i386/i386.md (*addqi_ext<mode>_1_slp):
5999 Correct operand numbers in split pattern. Replace !Q constraint
6000 of operand 1 with !qm. Add insn constrain.
6001 (*subqi_ext<mode>_1_slp): Ditto.
6002 (*<any_logic:code>qi_ext<mode>_1_slp): Ditto.
6004 2023-11-15 Thomas Schwinge <thomas@codesourcery.com>
6006 * doc/extend.texi (Nvidia PTX Built-in Functions): Fix
6007 copy'n'paste-o in '__builtin_nvptx_brev' description.
6009 2023-11-15 Roger Sayle <roger@nextmovesoftware.com>
6010 Thomas Schwinge <thomas@codesourcery.com>
6012 * config/nvptx/nvptx.md (UNSPEC_BITREV): Delete.
6013 (bitrev<mode>2): Represent using bitreverse.
6015 2023-11-15 Andrew Stubbs <ams@codesourcery.com>
6016 Andrew Jenner <andrew@codesourcery.com>
6018 * config/gcn/constraints.md: Add "a" AVGPR constraint.
6019 * config/gcn/gcn-valu.md (*mov<mode>): Add AVGPR alternatives.
6020 (*mov<mode>_4reg): Likewise.
6021 (@mov<mode>_sgprbase): Likewise.
6022 (gather<mode>_insn_1offset<exec>): Likewise.
6023 (gather<mode>_insn_1offset_ds<exec>): Likewise.
6024 (gather<mode>_insn_2offsets<exec>): Likewise.
6025 (scatter<mode>_expr<exec_scatter>): Likewise.
6026 (scatter<mode>_insn_1offset_ds<exec_scatter>): Likewise.
6027 (scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
6028 * config/gcn/gcn.cc (MAX_NORMAL_AVGPR_COUNT): Define.
6029 (gcn_class_max_nregs): Handle AVGPR_REGS and ALL_VGPR_REGS.
6030 (gcn_hard_regno_mode_ok): Likewise.
6031 (gcn_regno_reg_class): Likewise.
6032 (gcn_spill_class): Allow spilling to AVGPRs on TARGET_CDNA1_PLUS.
6033 (gcn_sgpr_move_p): Handle AVGPRs.
6034 (gcn_secondary_reload): Reload AVGPRs via VGPRs.
6035 (gcn_conditional_register_usage): Handle AVGPRs.
6036 (gcn_vgpr_equivalent_register_operand): New function.
6037 (gcn_valid_move_p): Check for validity of AVGPR moves.
6038 (gcn_compute_frame_offsets): Handle AVGPRs.
6039 (gcn_memory_move_cost): Likewise.
6040 (gcn_register_move_cost): Likewise.
6041 (gcn_vmem_insn_p): Handle TYPE_VOP3P_MAI.
6042 (gcn_md_reorg): Handle AVGPRs.
6043 (gcn_hsa_declare_function_name): Likewise.
6044 (print_reg): Likewise.
6045 (gcn_dwarf_register_number): Likewise.
6046 * config/gcn/gcn.h (FIRST_AVGPR_REG): Define.
6047 (AVGPR_REGNO): Define.
6048 (LAST_AVGPR_REG): Define.
6049 (SOFT_ARG_REG): Update.
6050 (FRAME_POINTER_REGNUM): Update.
6051 (DWARF_LINK_REGISTER): Update.
6052 (FIRST_PSEUDO_REGISTER): Update.
6053 (AVGPR_REGNO_P): Define.
6054 (enum reg_class): Add AVGPR_REGS and ALL_VGPR_REGS.
6055 (REG_CLASS_CONTENTS): Add new register classes and add entries for
6056 AVGPRs to all classes.
6057 (REGISTER_NAMES): Add AVGPRs.
6058 * config/gcn/gcn.md (FIRST_AVGPR_REG, LAST_AVGPR_REG): Define.
6059 (AP_REGNUM, FP_REGNUM): Update.
6060 (define_attr "type"): Add vop3p_mai.
6061 (define_attr "unit"): Handle vop3p_mai.
6062 (define_attr "gcn_version"): Add "cdna2".
6063 (define_attr "enabled"): Handle cdna2.
6064 (*mov<mode>_insn): Add AVGPR alternatives.
6065 (*movti_insn): Likewise.
6066 * config/gcn/mkoffload.cc (isa_has_combined_avgprs): New.
6067 (process_asm): Process avgpr_count.
6068 * config/gcn/predicates.md (gcn_avgpr_register_operand): New.
6069 (gcn_avgpr_hard_register_operand): New.
6070 * doc/md.texi: Document the "a" constraint.
6072 2023-11-15 Andrew Stubbs <ams@codesourcery.com>
6074 * config/gcn/gcn-valu.md (mov<mode>_sgprbase): Add @ modifier.
6075 (reload_in<mode>): Delete.
6076 (reload_out<mode>): Delete.
6077 * config/gcn/gcn.cc (CODE_FOR): Delete.
6078 (get_code_for_##PREFIX##vN##SUFFIX): Delete.
6079 (CODE_FOR_OP): Delete.
6080 (get_code_for_##PREFIX): Delete.
6081 (gcn_secondary_reload): Replace "get_code_for" with "code_for".
6083 2023-11-15 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
6085 * config/s390/t-s390: Generate s390-gen-builtins.h without
6088 2023-11-15 Richard Biener <rguenther@suse.de>
6090 PR tree-optimization/112282
6091 * tree-if-conv.cc (ifcvt_hoist_invariants): Only hoist from
6094 2023-11-15 Richard Biener <rguenther@suse.de>
6096 * tree-vect-slp.cc (vect_slp_region): Also clear visited flag when
6097 we skipped an instance due to -fdbg-cnt.
6099 2023-11-15 Xi Ruoyao <xry111@xry111.site>
6101 * config/loongarch/loongarch.cc
6102 (loongarch_memmodel_needs_release_fence): Remove.
6103 (loongarch_cas_failure_memorder_needs_acquire): New static
6105 (loongarch_print_operand): Redefine 'G' for the barrier on CAS
6107 * config/loongarch/sync.md (atomic_cas_value_strong<mode>):
6108 Remove the redundant barrier before the LL instruction, and
6109 emit an acquire barrier on failure if needed by
6111 (atomic_cas_value_cmp_and_7_<mode>): Likewise.
6112 (atomic_cas_value_add_7_<mode>): Remove the unnecessary barrier
6113 before the LL instruction.
6114 (atomic_cas_value_sub_7_<mode>): Likewise.
6115 (atomic_cas_value_and_7_<mode>): Likewise.
6116 (atomic_cas_value_xor_7_<mode>): Likewise.
6117 (atomic_cas_value_or_7_<mode>): Likewise.
6118 (atomic_cas_value_nand_7_<mode>): Likewise.
6119 (atomic_cas_value_exchange_7_<mode>): Likewise.
6121 2023-11-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6123 * config/riscv/riscv-v.cc (expand_vector_init_trailing_same_elem): New function.
6124 (expand_vec_init): Add trailing optimization.
6126 2023-11-15 Pan Li <pan2.li@intel.com>
6128 * config/riscv/riscv-v.cc (rvv_builder::get_merge_scalar_mask):
6129 Add inner_mode mask arg for mask int mode.
6130 (get_repeating_sequence_dup_machine_mode): Add mask_bit_mode arg
6131 to get the good enough vector int mode on precision.
6132 (expand_vector_init_merge_repeating_sequence): Pass required args
6135 2023-11-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6138 * config/riscv/riscv.cc (riscv_legitimate_address_p): Disallow RVV modes base address.
6140 2023-11-15 David Malcolm <dmalcolm@redhat.com>
6142 * json.cc (selftest::assert_print_eq): Add "loc" param and use
6144 (ASSERT_PRINT_EQ): New macro.
6145 (selftest::test_writing_objects): Use ASSERT_PRINT_EQ to capture
6146 source location of assertion.
6147 (selftest::test_writing_arrays): Likewise.
6148 (selftest::test_writing_float_numbers): Likewise.
6149 (selftest::test_writing_integer_numbers): Likewise.
6150 (selftest::test_writing_strings): Likewise.
6151 (selftest::test_writing_literals): Likewise.
6153 2023-11-14 David Malcolm <dmalcolm@redhat.com>
6156 * doc/invoke.texi (Static Analyzer Options): Add the six
6157 -Wanalyzer-tainted-* warnings. Update documentation of each
6158 warning to reflect removed requirement to use
6159 -fanalyzer-checker=taint. Remove discussion of
6160 -fanalyzer-checker=taint.
6162 2023-11-14 David Malcolm <dmalcolm@redhat.com>
6164 * diagnostic-format-json.cc
6165 (json_output_format::on_end_diagnostic): Update calls to m_context
6166 callbacks to use member functions; tighten up scopes.
6167 * diagnostic-format-sarif.cc (sarif_builder::make_result_object):
6169 (sarif_builder::make_reporting_descriptor_object_for_warning):
6171 * diagnostic.cc (diagnostic_context::initialize): Update for
6172 callbacks being moved into m_option_callbacks and being renamed.
6173 (diagnostic_context::set_option_hooks): New.
6174 (diagnostic_option_classifier::classify_diagnostic): Update call
6175 to global_dc->m_option_enabled to use option_enabled_p.
6176 (diagnostic_context::print_option_information): Update calls to
6177 m_context callbacks to use member functions; tighten up scopes.
6178 (diagnostic_context::diagnostic_enabled): Likewise.
6179 * diagnostic.h (diagnostic_option_enabled_cb): New typedef.
6180 (diagnostic_make_option_name_cb): New typedef.
6181 (diagnostic_make_option_url_cb): New typedef.
6182 (diagnostic_context::option_enabled_p): New.
6183 (diagnostic_context::make_option_name): New.
6184 (diagnostic_context::make_option_url): New.
6185 (diagnostic_context::set_option_hooks): New decl.
6186 (diagnostic_context::m_option_enabled): Rename to
6187 m_option_enabled_cb and move within m_option_callbacks, using
6189 (diagnostic_context::m_option_state): Move within
6191 (diagnostic_context::m_option_name): Rename to
6192 m_make_option_name_cb and move within m_option_callbacks, using
6194 (diagnostic_context::m_get_option_url): Likewise, renaming to
6195 m_make_option_url_cb.
6196 * lto-wrapper.cc (print_lto_docs_link): Update call to m_context
6197 callback to use member function.
6198 (main): Use diagnostic_context::set_option_hooks.
6199 * opts-diagnostic.h (option_name): Make context param const.
6200 (get_option_url): Likewise.
6201 * opts.cc (option_name): Likewise.
6202 (get_option_url): Likewise.
6203 * toplev.cc (general_init): Use
6204 diagnostic_context::set_option_hooks.
6206 2023-11-14 David Malcolm <dmalcolm@redhat.com>
6208 * selftest-diagnostic.cc
6209 (test_diagnostic_context::test_diagnostic_context): Use
6210 diagnostic_start_span.
6211 * tree-diagnostic-path.cc (struct event_range): Likewise.
6213 2023-11-14 David Malcolm <dmalcolm@redhat.com>
6215 * diagnostic-show-locus.cc (diagnostic_context::show_locus):
6216 Update for renaming of text callbacks fields.
6217 * diagnostic.cc (diagnostic_context::initialize): Likewise.
6218 * diagnostic.h (class diagnostic_context): Add "friend" for
6219 accessors to m_text_callbacks.
6220 (diagnostic_context::m_text_callbacks): Make private, and add an
6221 "m_" prefix to field names.
6222 (diagnostic_starter): Convert from macro to inline function.
6223 (diagnostic_start_span): New.
6224 (diagnostic_finalizer): Convert from macro to inline function.
6226 2023-11-14 David Malcolm <dmalcolm@redhat.com>
6228 * diagnostic.h (diagnostic_ready_p): Convert from macro to inline
6231 2023-11-14 Uros Bizjak <ubizjak@gmail.com>
6234 * config/i386/i386.md (*addqi_ext<mode>_1_slp):
6235 New define_insn_and_split pattern.
6236 (*subqi_ext<mode>_1_slp): Ditto.
6237 (*<any_logic:code>qi_ext<mode>_1_slp): Ditto.
6239 2023-11-14 Andrew Stubbs <ams@codesourcery.com>
6242 * expr.cc (store_constructor): Use OPTAB_WIDEN for mask adjustment.
6244 2023-11-14 David Malcolm <dmalcolm@redhat.com>
6246 * diagnostic-format-sarif.cc (sarif_builder::get_sarif_column):
6247 Use m_context's file_cache.
6248 (sarif_builder::maybe_make_artifact_content_object): Likewise.
6249 (sarif_builder::get_source_lines): Likewise.
6250 * diagnostic-show-locus.cc
6251 (exploc_with_display_col::exploc_with_display_col): Add file_cache
6253 (layout::m_file_cache): New field.
6254 (make_range): Add file_cache param.
6255 (selftest::test_layout_range_for_single_point): Create and use a
6256 temporary file_cache.
6257 (selftest::test_layout_range_for_single_line): Likewise.
6258 (selftest::test_layout_range_for_multiple_lines): Likewise.
6259 (layout::layout): Initialize m_file_cache from the context and use it.
6260 (layout::maybe_add_location_range): Use m_file_cache.
6261 (layout::calculate_x_offset_display): Likewise.
6262 (get_affected_range): Add file_cache param.
6263 (get_printed_columns): Likewise.
6264 (line_corrections::line_corrections): Likewwise.
6265 (line_corrections::m_file_cache): New field.
6266 (source_line::source_line): Add file_cache param.
6267 (line_corrections::add_hint): Use m_file_cache.
6268 (layout::print_trailing_fixits): Likewise.
6269 (layout::print_line): Likewise.
6270 (selftest::test_layout_x_offset_display_utf8): Create and use a
6271 temporary file_cache.
6272 (selftest::test_layout_x_offset_display_tab): Likewise.
6273 (selftest::test_diagnostic_show_locus_one_liner_utf8): Likewise.
6274 (selftest::test_add_location_if_nearby): Pass global_dc's
6275 file_cache to temp_source_file ctor.
6276 (selftest::test_overlapped_fixit_printing): Create and use a
6277 temporary file_cache.
6278 (selftest::test_overlapped_fixit_printing_utf8): Likewise.
6279 (selftest::test_overlapped_fixit_printing_2): Use dc's file_cache.
6280 * diagnostic.cc (diagnostic_context::initialize): Always create a
6282 (diagnostic_context::initialize_input_context): Assume
6283 m_file_cache has already been created.
6284 (diagnostic_context::create_edit_context): Pass m_file_cache to
6286 (convert_column_unit): Add file_cache param.
6287 (diagnostic_context::converted_column): Use context's file_cache.
6288 (print_parseable_fixits): Add file_cache param.
6289 (diagnostic_context::report_diagnostic): Use context's file_cache.
6290 (selftest::test_print_parseable_fixits_none): Create and use a
6291 temporary file_cache.
6292 (selftest::test_print_parseable_fixits_insert): Likewise.
6293 (selftest::test_print_parseable_fixits_remove): Likewise.
6294 (selftest::test_print_parseable_fixits_replace): Likewise.
6295 (selftest::test_print_parseable_fixits_bytes_vs_display_columns):
6297 * diagnostic.h (diagnostic_context::file_cache_init): Delete.
6298 (diagnostic_context::get_file_cache): Convert return type from
6299 pointer to reference.
6300 * edit-context.cc (edited_file::get_file_cache): New.
6301 (edited_file::m_edit_context): New.
6302 (edit_context::edit_context): Add file_cache param.
6303 (edit_context::get_or_insert_file): Pass this to edited_file's
6305 (edited_file::edited_file): Add edit_context param.
6306 (edited_file::print_content): Use get_file_cache.
6307 (edited_file::print_diff_hunk): Likewise.
6308 (edited_file::print_run_of_changed_lines): Likewise.
6309 (edited_file::get_or_insert_line): Likewise.
6310 (edited_file::get_num_lines): Likewise.
6311 (edited_line::edited_line): Pass in file_cache and use it.
6312 (selftest::test_get_content): Create and use a
6313 temporary file_cache.
6314 (selftest::test_applying_fixits_insert_before): Likewise.
6315 (selftest::test_applying_fixits_insert_after): Likewise.
6316 (selftest::test_applying_fixits_insert_after_at_line_end):
6318 (selftest::test_applying_fixits_insert_after_failure): Likewise.
6319 (selftest::test_applying_fixits_insert_containing_newline):
6321 (selftest::test_applying_fixits_growing_replace): Likewise.
6322 (selftest::test_applying_fixits_shrinking_replace): Likewise.
6323 (selftest::test_applying_fixits_replace_containing_newline):
6325 (selftest::test_applying_fixits_remove): Likewise.
6326 (selftest::test_applying_fixits_multiple): Likewise.
6327 (selftest::test_applying_fixits_multiple_lines): Likewise.
6328 (selftest::test_applying_fixits_modernize_named_init): Likewise.
6329 (selftest::test_applying_fixits_modernize_named_init): Likewise.
6330 (selftest::test_applying_fixits_unreadable_file): Likewise.
6331 (selftest::test_applying_fixits_line_out_of_range): Likewise.
6332 (selftest::test_applying_fixits_column_validation): Likewise.
6333 (selftest::test_applying_fixits_column_validation): Likewise.
6334 (selftest::test_applying_fixits_column_validation): Likewise.
6335 (selftest::test_applying_fixits_column_validation): Likewise.
6336 * edit-context.h (edit_context::edit_context): Add file_cache
6338 (edit_context::get_file_cache): New.
6339 (edit_context::m_file_cache): New.
6340 * final.cc: Include "diagnostic.h".
6341 (asm_show_source): Use global_dc's file_cache.
6342 * gcc-rich-location.cc (blank_line_before_p): Add file_cache
6344 (use_new_line): Likewise.
6345 (gcc_rich_location::add_fixit_insert_formatted): Use global dc's
6347 * input.cc (diagnostic_file_cache_init): Delete.
6348 (diagnostic_context::file_cache_init): Delete.
6349 (diagnostics_file_cache_forcibly_evict_file): Delete.
6350 (file_cache::missing_trailing_newline_p): New.
6351 (file_cache::evicted_cache_tab_entry): Don't call
6352 diagnostic_file_cache_init.
6353 (location_get_source_line): Delete.
6354 (get_source_text_between): Add file_cache param.
6355 (get_source_file_content): Delete.
6356 (location_missing_trailing_newline): Delete.
6357 (location_compute_display_column): Add file_cache param.
6358 (dump_location_info): Create and use temporary file_cache.
6359 (get_substring_ranges_for_loc): Add file_cache param.
6360 (get_location_within_string): Likewise.
6361 (get_source_range_for_char): Likewise.
6362 (get_num_source_ranges_for_substring): Likewise.
6363 (selftest::test_reading_source_line): Create and use temporary
6365 (selftest::lexer_test::m_file_cache): New field.
6366 (selftest::assert_char_at_range): Use test.m_file_cache.
6367 (selftest::assert_num_substring_ranges): Likewise.
6368 (selftest::assert_has_no_substring_ranges): Likewise.
6369 (selftest::test_lexer_string_locations_concatenation_2): Likewise.
6370 * input.h (class file_cache): New forward decl.
6371 (location_compute_display_column): Add file_cache param.
6372 (location_get_source_line): Delete.
6373 (get_source_text_between): Add file_cache param.
6374 (get_source_file_content): Delete.
6375 (location_missing_trailing_newline): Delete.
6376 (file_cache::missing_trailing_newline_p): New decl.
6377 (diagnostics_file_cache_forcibly_evict_file): Delete.
6378 * selftest.cc (named_temp_file::named_temp_file): Add file_cache
6380 (named_temp_file::~named_temp_file): Optionally evict the file
6381 from the given file_cache.
6382 (temp_source_file::temp_source_file): Add file_cache param.
6383 * selftest.h (class file_cache): New forward decl.
6384 (named_temp_file::named_temp_file): Add file_cache param.
6385 (named_temp_file::m_file_cache): New field.
6386 (temp_source_file::temp_source_file): Add file_cache param.
6387 * substring-locations.h (get_location_within_string): Add
6390 2023-11-14 David Malcolm <dmalcolm@redhat.com>
6392 * diagnostic-format-json.cc: Use type-specific "set_*" functions
6393 of json::object to avoid naked new of json value subclasses.
6394 * diagnostic-format-sarif.cc: Likewise.
6395 * gcov.cc: Likewise.
6396 * json.cc (object::set_string): New.
6397 (object::set_integer): New.
6398 (object::set_float): New.
6399 (object::set_bool): New.
6400 (selftest::test_writing_objects): Use object::set_string.
6401 * json.h (object::set_string): New decl.
6402 (object::set_integer): New decl.
6403 (object::set_float): New decl.
6404 (object::set_bool): New decl.
6405 * optinfo-emit-json.cc: Use type-specific "set_*" functions of
6406 json::object to avoid naked new of json value subclasses.
6407 * timevar.cc: Likewise.
6408 * tree-diagnostic-path.cc: Likewise.
6410 2023-11-14 Andrew MacLeod <amacleod@redhat.com>
6412 PR tree-optimization/112509
6413 * tree-vrp.cc (find_case_label_range): Create range from case labels.
6415 2023-11-14 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
6417 * config/s390/s390-builtin-types.def: Add/remove types.
6418 * config/s390/s390-builtins.def (s390_vec_scatter_element_flt):
6419 The type for the offset should be UV4SI instead of V4SF.
6421 2023-11-14 Saurabh Jha <saurabh.jha@arm.com>
6424 * config/arm/arm.cc (mve_vector_mem_operand): Add a REG_P check for INC
6427 2023-11-14 Richard Biener <rguenther@suse.de>
6429 PR tree-optimization/111233
6430 PR tree-optimization/111652
6431 PR tree-optimization/111727
6432 PR tree-optimization/111838
6433 PR tree-optimization/112113
6434 * tree-ssa-loop-split.cc (patch_loop_exit): Get the new
6435 guard code instead of the old guard stmt.
6436 (split_loop): Adjust.
6438 2023-11-14 Richard Biener <rguenther@suse.de>
6440 * tree-loop-distribution.cc (loop_distribution::data_dep_in_cycle_p):
6441 Consider all loops in the nest when looking for
6442 lambda_vector_zerop.
6444 2023-11-14 Richard Biener <rguenther@suse.de>
6446 PR tree-optimization/112281
6447 * tree-loop-distribution.cc (pg_add_dependence_edges):
6448 Preserve stmt order when the innermost loop has exact
6451 2023-11-14 Jakub Jelinek <jakub@redhat.com>
6455 * config/i386/i386.md (<insn><dwi>3_doubleword_lowpart): Move
6456 operands[1] aka low part of input rather than operands[3] aka high
6457 part of input to output if not the same register.
6459 2023-11-14 Andreas Krebbel <krebbel@linux.ibm.com>
6461 * config.gcc: Add s390-gen-builtins.h to target_gtfiles.
6462 * config/s390/s390-builtins.h (s390_builtin_types)
6463 (s390_builtin_fn_types, s390_builtin_decls): Add GTY marker.
6464 * config/s390/t-s390 (EXTRA_GTYPE_DEPS): Add s390-gen-builtins.h.
6465 Add build rule for s390-gen-builtins.h.
6467 2023-11-14 Andreas Krebbel <krebbel@linux.ibm.com>
6469 * config/s390/s390-c.cc (s390_fn_types_compatible): Add a check
6470 for error_mark_node.
6472 2023-11-14 Jakub Jelinek <jakub@redhat.com>
6475 * builtins.def (BUILT_IN_CLZG, BUILT_IN_CTZG, BUILT_IN_CLRSBG,
6476 BUILT_IN_FFSG, BUILT_IN_PARITYG, BUILT_IN_POPCOUNTG): New
6478 * builtins.cc (fold_builtin_bit_query): New function.
6479 (fold_builtin_1): Use it for
6480 BUILT_IN_{CLZ,CTZ,CLRSB,FFS,PARITY,POPCOUNT}G.
6481 (fold_builtin_2): Use it for BUILT_IN_{CLZ,CTZ}G.
6482 * fold-const-call.cc: Fix comment typo on tm.h inclusion.
6483 (fold_const_call_ss): Handle
6484 CFN_BUILT_IN_{CLZ,CTZ,CLRSB,FFS,PARITY,POPCOUNT}G.
6485 (fold_const_call_sss): New function.
6486 (fold_const_call_1): Call it for 2 argument functions returning
6487 scalar when passed 2 INTEGER_CSTs.
6488 * genmatch.cc (cmp_operand): For function calls also compare
6489 number of arguments.
6490 (fns_cmp): New function.
6491 (dt_node::gen_kids): Sort fns and generic_fns.
6492 (dt_node::gen_kids_1): Handle fns with the same id but different
6493 number of arguments.
6494 * match.pd (CLZ simplifications): Drop checks for defined behavior
6495 at zero. Add variant of simplifications for IFN_CLZ with 2 arguments.
6496 (CTZ simplifications): Drop checks for defined behavior at zero,
6497 don't optimize precisions above MAX_FIXED_MODE_SIZE. Add variant of
6498 simplifications for IFN_CTZ with 2 arguments.
6499 (a != 0 ? CLZ(a) : CST -> .CLZ(a)): Use TREE_TYPE (@3) instead of
6500 type, add BITINT_TYPE handling, create 2 argument IFN_CLZ rather than
6501 one argument. Add variant for matching CLZ with 2 arguments.
6502 (a != 0 ? CTZ(a) : CST -> .CTZ(a)): Similarly.
6503 * gimple-lower-bitint.cc (bitint_large_huge::lower_bit_query): New
6505 (bitint_large_huge::lower_call): Use it for IFN_{CLZ,CTZ,CLRSB,FFS}
6506 and IFN_{PARITY,POPCOUNT} calls.
6507 * gimple-range-op.cc (cfn_clz::fold_range): Don't check
6508 CLZ_DEFINED_VALUE_AT_ZERO for m_gimple_call_internal_p, instead
6509 assume defined value at zero if the call has 2 arguments and use
6510 second argument value for that case.
6511 (cfn_ctz::fold_range): Similarly.
6512 (gimple_range_op_handler::maybe_builtin_call): Use op_cfn_clz_internal
6513 or op_cfn_ctz_internal only if internal fn call has 2 arguments and
6514 set m_op2 in that case.
6515 * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern,
6516 vect_recog_popcount_clz_ctz_ffs_pattern): For value defined at zero
6517 use second argument of calls if present, otherwise assume UB at zero,
6518 create 2 argument .CLZ/.CTZ calls if needed.
6519 * tree-vect-stmts.cc (vectorizable_call): Handle 2 argument .CLZ/.CTZ
6521 * tree-ssa-loop-niter.cc (build_cltz_expr): Create 2 argument
6522 .CLZ/.CTZ calls if needed.
6523 * tree-ssa-forwprop.cc (simplify_count_trailing_zeroes): Create 2
6524 argument .CTZ calls if needed.
6525 * tree-ssa-phiopt.cc (cond_removal_in_builtin_zero_pattern): Handle
6526 2 argument .CLZ/.CTZ calls, handle BITINT_TYPE, create 2 argument
6528 * doc/extend.texi (__builtin_clzg, __builtin_ctzg, __builtin_clrsbg,
6529 __builtin_ffsg, __builtin_parityg, __builtin_popcountg): Document.
6531 2023-11-14 Xi Ruoyao <xry111@xry111.site>
6534 * config/loongarch/genopts/loongarch.opt.in: Add
6535 -m[no]-pass-relax-to-as. Change the default of -m[no]-relax to
6536 account conditional branch relaxation support status.
6537 * config/loongarch/loongarch.opt: Regenerate.
6538 * configure.ac (gcc_cv_as_loongarch_cond_branch_relax): Check if
6539 the assembler supports conditional branch relaxation.
6540 * configure: Regenerate.
6541 * config.in: Regenerate. Note that there are some unrelated
6542 changes introduced by r14-5424 (which does not contain a
6543 config.in regeneration).
6544 * config/loongarch/loongarch-opts.h
6545 (HAVE_AS_COND_BRANCH_RELAXATION): Define to 0 if not defined.
6546 * config/loongarch/loongarch-driver.h (ASM_MRELAX_DEFAULT):
6548 (ASM_MRELAX_SPEC): Define.
6549 (ASM_SPEC): Use ASM_MRELAX_SPEC instead of "%{mno-relax}".
6550 * config/loongarch/loongarch.cc: Take the setting of
6551 -m[no-]relax into account when determining the default of
6553 * doc/invoke.texi: Document -m[no-]relax and
6554 -m[no-]pass-mrelax-to-as for LoongArch. Update the default
6555 value of -mexplicit-relocs=.
6557 2023-11-14 liuhongt <hongtao.liu@intel.com>
6559 PR tree-optimization/112496
6560 * tree-vect-loop.cc (vectorizable_nonlinear_induction): Return
6561 false when !tree_nop_conversion_p (TREE_TYPE (vectype),
6562 TREE_TYPE (init_expr)).
6564 2023-11-14 Xi Ruoyao <xry111@xry111.site>
6566 * config/loongarch/sync.md (mem_thread_fence): Remove redundant
6568 (mem_thread_fence_1): Emit finer-grained DBAR hints for
6569 different memory models, instead of 0.
6571 2023-11-14 Jakub Jelinek <jakub@redhat.com>
6573 PR middle-end/112511
6574 * tree.cc (type_contains_placeholder_1): Handle BITINT_TYPE like
6577 2023-11-14 Jakub Jelinek <jakub@redhat.com>
6578 Hu, Lin1 <lin1.hu@intel.com>
6581 * config/i386/sse.md (avx512vl_shuf_<shuffletype>32x4_1<mask_name>,
6582 <mask_codefor>avx512dq_shuf_<shuffletype>64x2_1<mask_name>): Add
6583 alternative with just x instead of v constraints and xjm instead of
6584 vm and use vblendps as optimization only with that alternative.
6586 2023-11-14 liuhongt <hongtao.liu@intel.com>
6588 PR tree-optimization/105735
6589 PR tree-optimization/111972
6590 * tree-scalar-evolution.cc
6591 (analyze_and_compute_bitop_with_inv_effect): Handle bitop with
6594 2023-11-13 Arsen Arsenović <arsen@aarsen.me>
6596 * configure: Regenerate.
6597 * aclocal.m4: Regenerate.
6598 * Makefile.in (LIBDEPS): Remove (potential) ./ prefix from
6600 * doc/install.texi: Document new (notable) flags added by the
6601 optional gettext tree and by AM_GNU_GETTEXT. Document libintl/libc
6602 with gettext dependency.
6604 2023-11-13 Uros Bizjak <ubizjak@gmail.com>
6606 * config/i386/i386-expand.h (gen_pushfl): New prototype.
6608 * config/i386/i386-expand.cc (ix86_expand_builtin)
6609 [case IX86_BUILTIN_READ_FLAGS]: Use gen_pushfl.
6610 [case IX86_BUILTIN_WRITE_FLAGS]: Use gen_popfl.
6611 * config/i386/i386.cc (gen_pushfl): New function.
6613 * config/i386/i386.md (unspec): Add UNSPEC_PUSHFL and UNSPEC_POPFL.
6614 (@pushfl<mode>2): Rename from *pushfl<mode>2.
6615 Rewrite as unspec using UNSPEC_PUSHFL.
6616 (@popfl<mode>1): Rename from *popfl<mode>1.
6617 Rewrite as unspec using UNSPEC_POPFL.
6619 2023-11-13 Uros Bizjak <ubizjak@gmail.com>
6622 * config/i386/i386.cc (ix86_cc_mode) [default]: Return CCmode.
6624 2023-11-13 Robin Dapp <rdapp@ventanamicro.com>
6626 * config/riscv/riscv-vsetvl.cc (source_equal_p): Use pointer
6627 equality for REG_EQUAL.
6629 2023-11-13 Richard Biener <rguenther@suse.de>
6631 PR tree-optimization/112495
6632 * tree-data-ref.cc (runtime_alias_check_p): Reject checks
6633 between different address spaces.
6635 2023-11-13 Richard Biener <rguenther@suse.de>
6637 PR middle-end/112487
6638 * tree-inline.cc (setup_one_parameter): When the parameter
6639 is unused only insert a debug bind when there's not a gross
6640 mismatch in value and declared parameter type. Do not assert
6641 there effectively isn't.
6643 2023-11-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6645 * config/riscv/riscv-v.cc
6646 (rvv_builder::combine_sequence_use_merge_profitable_p): New function.
6647 (expand_vector_init_merge_combine_sequence): Ditto.
6648 (expand_vec_init): Adapt for new optimization.
6650 2023-11-13 liuhongt <hongtao.liu@intel.com>
6652 * config/i386/i386-expand.cc
6653 (ix86_expand_vector_init_duplicate): Handle V4HF/V4BF and
6655 (ix86_expand_vector_init_one_nonzero): Ditto.
6656 (ix86_expand_vector_init_one_var): Ditto.
6657 (ix86_expand_vector_init_general): Ditto.
6658 (ix86_expand_vector_set_var): Ditto.
6659 (ix86_expand_vector_set): Ditto.
6660 (ix86_expand_vector_extract): Ditto.
6661 * config/i386/mmx.md
6662 (mmxdoublevecmode): Extend to V4HF/V4BF/V2HF/V2BF.
6663 (*mmx_pinsrw): Extend to V4FI_64, add a new alternative (&x,
6664 x, x), add a new define_split after the pattern.
6665 (*mmx_pextrw<mode>): New define_insn.
6666 (mmx_pshufw_1): Rename to ..
6667 (mmx_pshufw<mode>_1): .. this, extend to V4FI_64.
6668 (*mmx_pblendw64): Extend to V4FI_64.
6669 (*vec_dup<mode>): New define_insn.
6670 (vec_setv4hi): Rename to ..
6671 (vec_set<mode>): .. this, and extend to V4FI_64
6672 (vec_extractv4hihi): Rename to ..
6673 (vec_extract<mode><mmxscalarmodelower>): .. this, and extend
6675 (vec_init<mode><mmxscalarmodelower>): New define_insn.
6676 (*pinsrw): Extend to V2FI_32, add a new alternative (&x,
6677 x, x), and add a new define_split after it.
6678 (*pextrw<mode>): New define_insn.
6679 (vec_setv2hi): Rename to ..
6680 (vec_set<mode>): .. this, extend to V2FI_32.
6681 (vec_extractv2hihi): Rename to ..
6682 (vec_extract<mode><mmxscalarmodelower>): .. this, extend to
6684 (*punpckwd): Extend to V2FI_32.
6685 (*pshufw_1): Rename to ..
6686 (*pshufw<mode>_1): .. this, extend to V2FI_32.
6687 (vec_initv2hihi): Rename to ..
6688 (vec_init<mode><mmxscalarmodelower>): .. this, and extend to
6690 (*vec_dup<mode>): New define_insn.
6691 * config/i386/sse.md (*vec_extract<mode>): Refine constraint
6694 2023-11-13 Roger Sayle <roger@nextmovesoftware.com>
6696 * config/arc/arc.md (UNSPEC_ARC_CC_NEZ): New UNSPEC that
6697 represents the carry flag being set if the operand is non-zero.
6698 (adc_f): New define_insn representing adc with updated flags.
6699 (ashrdi3): New define_expand that only handles shifts by 1.
6700 (ashrdi3_cnt1): New pre-reload define_insn_and_split.
6701 (lshrdi3): New define_expand that only handles shifts by 1.
6702 (lshrdi3_cnt1): New pre-reload define_insn_and_split.
6703 (rrcsi2): New define_insn for rrc (SImode rotate right through carry).
6704 (rrcsi2_carry): Likewise for rrc.f, as above but updating flags.
6705 (rotldi3): New define_expand that only handles rotates by 1.
6706 (rotldi3_cnt1): New pre-reload define_insn_and_split.
6707 (rotrdi3): New define_expand that only handles rotates by 1.
6708 (rotrdi3_cnt1): New pre-reload define_insn_and_split.
6709 (lshrsi3_cnt1_carry): New define_insn for lsr.f.
6710 (ashrsi3_cnt1_carry): New define_insn for asr.f.
6711 (btst_0_carry): New define_insn for asr.f without result.
6713 2023-11-13 Roger Sayle <roger@nextmovesoftware.com>
6715 * config/arc/arc.cc (TARGET_FOLD_BUILTIN): Define to
6717 (arc_fold_builtin): New function. Convert ARC_BUILTIN_SWAP
6718 into a rotate. Evaluate ARC_BUILTIN_NORM and
6719 ARC_BUILTIN_NORMW of constant arguments.
6720 * config/arc/arc.md (UNSPEC_ARC_SWAP): Delete.
6721 (normw): Make output template/assembler whitespace consistent.
6722 (swap): Remove define_insn, only use of SWAP UNSPEC.
6723 * config/arc/builtins.def: Tweak indentation.
6724 (SWAP): Expand using rotlsi2_cnt16 instead of using swap.
6726 2023-11-13 Roger Sayle <roger@nextmovesoftware.com>
6728 * config/i386/i386.md (<insn><dwi>3_doubleword_lowpart): New
6729 define_insn_and_split to optimize register usage of doubleword
6730 right shifts followed by truncation.
6732 2023-11-13 Jakub Jelinek <jakub@redhat.com>
6734 * config/i386/constraints.md: Remove j constraint letter from list of
6737 2023-11-13 Xi Ruoyao <xry111@xry111.site>
6739 PR rtl-optimization/112483
6740 * simplify-rtx.cc (simplify_binary_operation_1) <case COPYSIGN>:
6741 Fix the simplification of (fcopysign x, NEGATIVE_CONST).
6743 2023-11-13 Jakub Jelinek <jakub@redhat.com>
6745 PR tree-optimization/111967
6746 * gimple-range-cache.cc (block_range_cache::set_bb_range): Grow
6747 m_ssa_ranges to num_ssa_names rather than num_ssa_names + 1.
6748 (block_range_cache::dump): Iterate from 1 rather than 0. Don't use
6749 ssa_name (x) unless m_ssa_ranges[x] is non-NULL. Iterate to
6750 m_ssa_ranges.length () rather than num_ssa_names.
6752 2023-11-13 Xi Ruoyao <xry111@xry111.site>
6754 * config/loongarch/loongarch.md (LD_AT_LEAST_32_BIT): New mode
6756 (ST_ANY): New mode iterator.
6757 (define_peephole2): Use LD_AT_LEAST_32_BIT instead of GPR and
6758 ST_ANY instead of QHWD for applicable patterns.
6760 2023-11-13 Xi Ruoyao <xry111@xry111.site>
6763 * config/loongarch/loongarch.cc
6764 (loongarch_expand_vec_cond_mask_expr): Call simplify_gen_subreg
6765 instead of gen_rtx_SUBREG.
6767 2023-11-13 Pan Li <pan2.li@intel.com>
6769 * config/riscv/autovec.md: Add bridge mode to lrint and lround
6771 * config/riscv/riscv-protos.h (expand_vec_lrint): Add new arg
6772 bridge machine mode.
6773 (expand_vec_lround): Ditto.
6774 * config/riscv/riscv-v.cc (emit_vec_widden_cvt_f_f): New helper
6775 func impl to emit vfwcvt.f.f.
6776 (emit_vec_rounding_to_integer): Handle the HF to DI rounding
6777 with the bridge mode.
6778 (expand_vec_lrint): Reorder the args.
6779 (expand_vec_lround): Ditto.
6780 (expand_vec_lceil): Ditto.
6781 (expand_vec_lfloor): Ditto.
6782 * config/riscv/vector-iterators.md: Add vector HFmode and bridge
6783 mode for converting to DI.
6785 2023-11-12 Jeff Law <jlaw@ventanamicro.com>
6788 2023-11-11 Jin Ma <jinma@linux.alibaba.com>
6790 * haifa-sched.cc (use_or_clobber_starts_range_p): New.
6791 (prune_ready_list): USE or CLOBBER should delay execution
6792 if it starts a new live range.
6794 2023-11-12 Uros Bizjak <ubizjak@gmail.com>
6796 * config/i386/i386.md (*stack_protect_set_4s_<mode>_di):
6797 Remove alternative 0.
6799 2023-11-11 Eric Botcazou <ebotcazou@adacore.com>
6801 * ipa-cp.cc (print_ipcp_constant_value): Move to...
6802 (values_equal_for_ipcp_p): Deal with VAR_DECLs from the
6804 * ipa-prop.cc (ipa_print_constant_value): ...here. Likewise.
6805 (ipa_print_node_jump_functions_for_edge): Call the function
6806 ipa_print_constant_value to print IPA_JF_CONST elements.
6808 2023-11-11 Jin Ma <jinma@linux.alibaba.com>
6810 * haifa-sched.cc (use_or_clobber_starts_range_p): New.
6811 (prune_ready_list): USE or CLOBBER should delay execution
6812 if it starts a new live range.
6814 2023-11-11 Jakub Jelinek <jakub@redhat.com>
6816 PR middle-end/112430
6817 * tree-ssa-math-opts.cc (match_uaddc_usubc): Remove temp_stmts in the
6818 order they were pushed rather than in reverse order. Call
6819 release_defs after gsi_remove.
6821 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
6823 * target.def (mode_switching.backprop): New hook.
6824 * doc/tm.texi.in (TARGET_MODE_BACKPROP): New @hook.
6825 * doc/tm.texi: Regenerate.
6826 * mode-switching.cc (struct bb_info): Add single_succ.
6827 (confluence_info): Add transp field.
6828 (single_succ_confluence_n, single_succ_transfer): New functions.
6829 (backprop_confluence_n, backprop_transfer): Likewise.
6830 (optimize_mode_switching): Use them. Push mode transitions onto
6831 a block's incoming edges, if the backprop hook requires it.
6833 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
6835 * target.def (mode_switching.confluence): New hook.
6836 * doc/tm.texi (TARGET_MODE_CONFLUENCE): New @hook.
6837 * doc/tm.texi.in: Regenerate.
6838 * mode-switching.cc (confluence_info): New variable.
6839 (mode_confluence, forward_confluence_n, forward_transfer): New
6841 (optimize_mode_switching): Use them to calculate mode_in when
6842 TARGET_MODE_CONFLUENCE is defined.
6844 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
6846 * mode-switching.cc (commit_mode_sets): Use 1-based edge aux values.
6848 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
6850 * target.def (mode_switching.after): Add a regs_live parameter.
6851 * doc/tm.texi: Regenerate.
6852 * config/epiphany/epiphany-protos.h (epiphany_mode_after): Update
6854 * config/epiphany/epiphany.cc (epiphany_mode_needed): Likewise.
6855 (epiphany_mode_after): Likewise.
6856 * config/i386/i386.cc (ix86_mode_after): Likewise.
6857 * config/riscv/riscv.cc (riscv_mode_after): Likewise.
6858 * config/sh/sh.cc (sh_mode_after): Likewise.
6859 * mode-switching.cc (optimize_mode_switching): Likewise.
6861 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
6863 * target.def (mode_switching.needed): Add a regs_live parameter.
6864 * doc/tm.texi: Regenerate.
6865 * config/epiphany/epiphany-protos.h (epiphany_mode_needed): Update
6867 * config/epiphany/epiphany.cc (epiphany_mode_needed): Likewise.
6868 * config/epiphany/mode-switch-use.cc (insert_uses): Likewise.
6869 * config/i386/i386.cc (ix86_mode_needed): Likewise.
6870 * config/riscv/riscv.cc (riscv_mode_needed): Likewise.
6871 * config/sh/sh.cc (sh_mode_needed): Likewise.
6872 * mode-switching.cc (optimize_mode_switching): Likewise.
6873 (create_pre_exit): Likewise, using the DF simulate functions
6874 to calculate the required information.
6876 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
6878 * target.def (mode_switching.eh_handler): New hook.
6879 * doc/tm.texi.in (TARGET_MODE_EH_HANDLER): New @hook.
6880 * doc/tm.texi: Regenerate.
6881 * mode-switching.cc (optimize_mode_switching): Use eh_handler
6882 to get the mode on entry to an exception handler.
6884 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
6886 * mode-switching.cc (optimize_mode_switching): Mark the exit
6887 block as nontransparent if it requires a specific mode.
6888 Handle the entry and exit mode as sibling rather than nested
6889 concepts. Remove outdated comment.
6891 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
6893 * mode-switching.cc (optimize_mode_switching): Initially
6894 compute transparency in a bit-per-block bitmap.
6896 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
6898 * mode-switching.cc (seginfo): Add a prev_mode field.
6899 (new_seginfo): Take and initialize the prev_mode.
6900 (optimize_mode_switching): Update calls accordingly.
6901 Use the recorded modes during the emit phase, rather than
6902 computing one on the fly.
6904 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
6906 * mode-switching.cc (add_seginfo): Replace head pointer with
6907 a pointer to the tail pointer.
6908 (optimize_mode_switching): Update calls accordingly.
6910 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
6912 * mode-switching.cc (optimize_mode_switching): Call
6913 df_note_add_problem.
6915 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
6917 * target.def: Tweak documentation of mode-switching hooks.
6918 * doc/tm.texi.in (OPTIMIZE_MODE_SWITCHING): Tweak documentation.
6919 (NUM_MODES_FOR_MODE_SWITCHING): Likewise.
6920 * doc/tm.texi: Regenerate.
6922 2023-11-11 Martin Uecker <uecker@tugraz.at>
6926 * gimple-ssa-warn-access.cc (pass_waccess::maybe_check_access_sizes):
6927 remove warning for parameters declared with `static`.
6929 2023-11-11 Joern Rennecke <joern.rennecke@embecosm.com>
6931 * doc/sourcebuild.texi (Scan the assembly output): Document change.
6933 2023-11-10 Mao <sray@live.com>
6935 PR middle-end/110983
6936 * doc/invoke.texi (Option Summary): Add -fpatchable-function-entry.
6938 2023-11-10 Maciej W. Rozycki <macro@embecosm.com>
6940 * config/riscv/riscv.md (length): Fix indentation for branch and
6941 jump length calculation expressions.
6943 2023-11-10 Eric Botcazou <ebotcazou@adacore.com>
6945 * fold-const.cc (operand_compare::operand_equal_p) <CONSTRUCTOR>:
6946 Deal with nonempty constant CONSTRUCTORs.
6947 (operand_compare::hash_operand) <CONSTRUCTOR>: Hash DECL_FIELD_OFFSET
6948 and DECL_FIELD_BIT_OFFSET for FIELD_DECLs.
6950 2023-11-10 Vladimir N. Makarov <vmakarov@redhat.com>
6953 * ira-costs.cc: (validate_autoinc_and_mem_addr_p): New function.
6954 (equiv_can_be_consumed_p): Use it.
6956 2023-11-10 Richard Sandiford <richard.sandiford@arm.com>
6958 * read-rtl.cc (md_reader::read_mapping): Allow iterators to
6959 include other iterators.
6960 * doc/md.texi: Document the change.
6961 * config/aarch64/iterators.md (DREG2, VQ2, TX2, DX2, SX2): Include
6962 the iterator that is being duplicated, rather than reproducing it.
6963 (VSTRUCT_D): Redefine using VSTRUCT_[234]D.
6964 (VSTRUCT_Q): Likewise VSTRUCT_[234]Q.
6965 (VSTRUCT_2QD, VSTRUCT_3QD, VSTRUCT_4QD, VSTRUCT_QD): Redefine using
6966 the individual D and Q iterators.
6968 2023-11-10 Uros Bizjak <ubizjak@gmail.com>
6970 * config/i386/i386.md (stack_protect_set_1 peephole2):
6971 Explicitly check operand 2 for word_mode.
6972 (stack_protect_set_1 peephole2 #2): Ditto.
6973 (stack_protect_set_2 peephole2): Ditto.
6974 (stack_protect_set_3 peephole2): Ditto.
6975 (*stack_protect_set_4z_<mode>_di): New insn patter.
6976 (*stack_protect_set_4s_<mode>_di): Ditto.
6977 (stack_protect_set_4 peephole2): New peephole2 pattern to
6978 substitute stack protector scratch register clear with unrelated
6979 register initialization involving zero/sign-extend instruction.
6981 2023-11-10 Uros Bizjak <ubizjak@gmail.com>
6983 * config/i386/i386.md (shift): Use SAL insted of SLL
6984 for ashift insn mnemonic.
6986 2023-11-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6988 PR tree-optimization/112438
6989 * tree-vect-loop.cc (vectorizable_induction): Bugfix when
6990 LOOP_VINFO_USING_SELECT_VL_P.
6992 2023-11-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6994 * config/riscv/riscv-protos.h (enum insn_type): New enum.
6995 * config/riscv/riscv-v.cc
6996 (rvv_builder::combine_sequence_use_slideup_profitable_p): New function.
6997 (expand_vector_init_slideup_combine_sequence): Ditto.
6998 (expand_vec_init): Add slideup combine optimization.
7000 2023-11-10 Robin Dapp <rdapp@ventanamicro.com>
7002 PR tree-optimization/112464
7003 * tree-vect-loop.cc (vectorize_fold_left_reduction): Use
7004 vect_orig_stmt on scalar_dest_def_info.
7006 2023-11-10 Jin Ma <jinma@linux.alibaba.com>
7008 * config/riscv/riscv.cc (riscv_for_each_saved_reg): Place the interrupt
7009 operation before the XTheadMemPair.
7011 2023-11-10 Richard Biener <rguenther@suse.de>
7013 PR tree-optimization/110221
7014 * tree-vect-slp.cc (vect_schedule_slp_node): When loop
7015 masking / len is applied make sure to not schedule
7016 intenal defs outside of the loop.
7018 2023-11-10 Andrew Stubbs <ams@codesourcery.com>
7020 * expr.cc (store_constructor): Add "and" operation to uniform mask
7023 2023-11-10 Andrew Stubbs <ams@codesourcery.com>
7026 * config/gcn/gcn-valu.md (add<mode>3<exec_clobber>): Fix B constraint
7027 and switch to the new format.
7028 (add<mode>3_dup<exec_clobber>): Likewise.
7029 (add<mode>3_vcc<exec_vcc>): Likewise.
7030 (add<mode>3_vcc_dup<exec_vcc>): Likewise.
7031 (add<mode>3_vcc_zext_dup): Likewise.
7032 (add<mode>3_vcc_zext_dup_exec): Likewise.
7033 (add<mode>3_vcc_zext_dup2): Likewise.
7034 (add<mode>3_vcc_zext_dup2_exec): Likewise.
7036 2023-11-10 Richard Biener <rguenther@suse.de>
7038 PR middle-end/112469
7039 * match.pd (cond ? op a : b -> .COND_op (cond, a, b)): Add
7040 missing view_converts.
7042 2023-11-10 Andrew Stubbs <ams@codesourcery.com>
7044 * config/gcn/gcn.cc (gcn_expand_reduc_scalar): Add clobber to DImode
7045 min/max instructions.
7047 2023-11-10 Chenghui Pan <panchenghui@loongson.cn>
7049 * config/loongarch/lsx.md: Fix instruction name typo in
7050 lsx_vreplgr2vr_<lsxfmt_f> template.
7052 2023-11-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7054 * config/riscv/autovec.md (vec_init<mode><vel>): Split patterns.
7056 2023-11-10 Pan Li <pan2.li@intel.com>
7059 2023-11-10 Pan Li <pan2.li@intel.com>
7060 * config/riscv/riscv-v.cc (expand_vector_init_trailing_same_elem):
7061 New fun impl to expand the insn when trailing same elements.
7062 (expand_vec_init): Try trailing same elements when vec_init.
7064 2023-11-10 Pan Li <pan2.li@intel.com>
7066 * config/riscv/riscv-v.cc (expand_vector_init_trailing_same_elem):
7067 New fun impl to expand the insn when trailing same elements.
7068 (expand_vec_init): Try trailing same elements when vec_init.
7070 2023-11-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7072 * config/riscv/autovec-opt.md (*cond_copysign<mode>): Remove.
7073 * config/riscv/autovec.md (cond_copysign<mode>): New pattern.
7075 2023-11-10 Pan Li <pan2.li@intel.com>
7078 * internal-fn.def (LRINT): Add FLOATN support.
7083 2023-11-10 Jeff Law <jlaw@ventanamicro.com>
7085 * config/h8300/combiner.md (single bit sign_extract): Avoid recently
7086 added patterns for H8/SX.
7087 (single bit zero_extract): New patterns.
7089 2023-11-10 liuhongt <hongtao.liu@intel.com>
7092 * config/i386/sse.md (*avx2_pcmp<mode>3_4): Fix swap condition
7093 from LT to GT since there's not in the pattern.
7094 (*avx2_pcmp<mode>3_5): Ditto.
7096 2023-11-10 Jose E. Marchesi <jose.marchesi@oracle.com>
7098 * config/bpf/bpf.cc (bpf_print_register): Accept modifier code 'W'
7099 to force emitting register names using the wN form.
7100 * config/bpf/bpf.md (*mulsidi3_zeroextend): Force operands to
7101 always use wN written form in pseudo-C assembly syntax.
7103 2023-11-09 David Malcolm <dmalcolm@redhat.com>
7105 * diagnostic-show-locus.cc (layout::m_line_table): New field.
7106 (compatible_locations_p): Convert to...
7107 (layout::compatible_locations_p): ...this, replacing uses of
7108 line_table global with m_line_table.
7109 (layout::layout): Convert "richloc" param from a pointer to a
7110 const reference. Initialize m_line_table member.
7111 (layout::maybe_add_location_range): Replace uses of line_table
7112 global with m_line_table. Pass the latter to
7113 linemap_client_expand_location_to_spelling_point.
7114 (layout::print_leading_fixits): Pass m_line_table to
7116 (layout::print_trailing_fixits): Likewise.
7117 (gcc_rich_location::add_location_if_nearby): Update for change
7118 to layout ctor params.
7119 (diagnostic_show_locus): Convert to...
7120 (diagnostic_context::maybe_show_locus): ...this, converting
7121 richloc param from a pointer to a const reference. Make "loc"
7122 const. Split out printing part of function to...
7123 (diagnostic_context::show_locus): ...this.
7124 (selftest::test_offset_impl): Update for change to layout ctor
7126 (selftest::test_layout_x_offset_display_utf8): Likewise.
7127 (selftest::test_layout_x_offset_display_tab): Likewise.
7128 (selftest::test_tab_expansion): Likewise.
7129 * diagnostic.h (diagnostic_context::maybe_show_locus): New decl.
7130 (diagnostic_context::show_locus): New decl.
7131 (diagnostic_show_locus): Convert from a decl to an inline function.
7132 * gdbinit.in (break-on-diagnostic): Update from a breakpoint
7133 on diagnostic_show_locus to one on
7134 diagnostic_context::maybe_show_locus.
7135 * genmatch.cc (linemap_client_expand_location_to_spelling_point):
7136 Add "set" param and use it in place of line_table global.
7137 * input.cc (expand_location_1): Likewise.
7138 (expand_location): Update for new param of expand_location_1.
7139 (expand_location_to_spelling_point): Likewise.
7140 (linemap_client_expand_location_to_spelling_point): Add "set"
7141 param and use it in place of line_table global.
7142 * tree-diagnostic-path.cc (event_range::print): Pass line_table
7143 for new param of linemap_client_expand_location_to_spelling_point.
7145 2023-11-09 Uros Bizjak <ubizjak@gmail.com>
7147 * config/i386/i386.md (@stack_protect_set_1_<PTR:mode>_<W:mode>):
7148 Use W mode iterator instead of SWI48. Output MOV instead of XOR
7149 for TARGET_USE_MOV0.
7150 (stack_protect_set_1 peephole2): Use integer modes with
7151 mode size <= word mode size for operand 3.
7152 (stack_protect_set_1 peephole2 #2): New peephole2 pattern to
7153 substitute stack protector scratch register clear with unrelated
7154 register initialization, originally in front of stack
7156 (*stack_protect_set_3_<PTR:mode>_<SWI48:mode>): New insn pattern.
7157 (stack_protect_set_1 peephole2): New peephole2 pattern to
7158 substitute stack protector scratch register clear with unrelated
7159 register initialization involving LEA instruction.
7161 2023-11-09 Vladimir N. Makarov <vmakarov@redhat.com>
7163 PR rtl-optimization/110215
7164 * ira-lives.cc: (add_conflict_from_region_landing_pads): New
7166 (process_bb_node_lives): Use it.
7168 2023-11-09 Alexandre Oliva <oliva@adacore.com>
7170 * config/i386/i386.cc (symbolic_base_address_p,
7171 base_address_p): New, factored out from...
7172 (extract_base_offset_in_addr): ... here and extended to
7173 recognize REG+GOTOFF, as in gcc.target/i386/sse2-load-multi.c
7174 and sse2-store-multi.c with PIE enabled by default.
7176 2023-11-09 Tamar Christina <tamar.christina@arm.com>
7178 PR tree-optimization/109154
7179 * config/aarch64/aarch64-sve.md (cond_copysign<mode>): New.
7181 2023-11-09 Tamar Christina <tamar.christina@arm.com>
7183 PR tree-optimization/109154
7184 * config/aarch64/aarch64.md (copysign<GPF:mode>3): Handle
7186 * config/aarch64/aarch64-simd.md (copysign<mode>3): Likewise.
7187 * config/aarch64/aarch64-sve.md (copysign<mode>3): Likewise.
7189 2023-11-09 Tamar Christina <tamar.christina@arm.com>
7191 PR tree-optimization/109154
7192 * config/aarch64/aarch64.md (<optab><mode>3): Add SVE split case.
7193 * config/aarch64/aarch64-simd.md (ior<mode>3<vczle><vczbe>): Likewise.
7194 * config/aarch64/predicates.md(aarch64_orr_imm_sve_advsimd): New.
7196 2023-11-09 Tamar Christina <tamar.christina@arm.com>
7198 PR tree-optimization/109154
7199 * config/aarch64/aarch64.md (*mov<mode>_aarch64, *movsi_aarch64,
7200 *movdi_aarch64): Add new w -> Z case.
7201 * config/aarch64/iterators.md (Vbtype): Add QI and HI.
7203 2023-11-09 Tamar Christina <tamar.christina@arm.com>
7205 PR tree-optimization/109154
7206 * config/aarch64/aarch64-protos.h (aarch64_simd_special_constant_p,
7207 aarch64_maybe_generate_simd_constant): New.
7208 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VQMOV:mode>,
7209 *aarch64_simd_mov<VDMOV:mode>): Add new coden for special constants.
7210 * config/aarch64/aarch64.cc (aarch64_extract_vec_duplicate_wide_int):
7212 (aarch64_simd_special_constant_p,
7213 aarch64_maybe_generate_simd_constant): New.
7214 * config/aarch64/aarch64.md (*movdi_aarch64): Add new codegen for
7216 * config/aarch64/constraints.md (Dx): new.
7218 2023-11-09 Tamar Christina <tamar.christina@arm.com>
7220 PR tree-optimization/109154
7221 * internal-fn.def (COPYSIGN): New.
7222 * match.pd (UNCOND_BINARY, COND_BINARY): Map IFN_COPYSIGN to
7224 * optabs.def (cond_copysign_optab, cond_len_copysign_optab): New.
7226 2023-11-09 Tamar Christina <tamar.christina@arm.com>
7228 PR tree-optimization/109154
7229 * match.pd: Add new neg+abs rule, remove inverse copysign rule.
7231 2023-11-09 Tamar Christina <tamar.christina@arm.com>
7233 PR tree-optimization/109154
7234 * match.pd: expand existing copysign optimizations.
7236 2023-11-09 Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
7239 * collect2.cc (main): Do not prepend target triple to
7242 2023-11-09 Richard Biener <rguenther@suse.de>
7244 PR tree-optimization/111133
7245 * tree-vect-stmts.cc (vect_build_scatter_store_calls):
7246 Remove and refactor to ...
7247 (vect_build_one_scatter_store_call): ... this new function.
7248 (vectorizable_store): Use vect_check_scalar_mask to record
7249 the SLP node for the mask operand. Code generate scatters
7250 with builtin decls from the main scatter vectorization
7251 path and prepare that for SLP.
7252 * tree-vect-slp.cc (vect_get_operand_map): Do not look
7253 at the VDEF to decide between scatter or gather since that
7254 doesn't work for patterns. Use the LHS being an SSA_NAME
7257 2023-11-09 Pan Li <pan2.li@intel.com>
7259 * config/riscv/riscv.cc (riscv_frm_emit_after_bb_end): Only
7260 perform once emit when at least one succ edge is abnormal.
7262 2023-11-09 Richard Biener <rguenther@suse.de>
7264 * tree-vect-loop.cc (vect_verify_full_masking_avx512):
7265 Check we have integer mode masks as required by
7268 2023-11-09 Richard Biener <rguenther@suse.de>
7270 PR tree-optimization/112444
7271 * tree-ssa-sccvn.cc (visit_phi): Avoid using not visited
7272 defs as undefined vals.
7274 2023-11-09 YunQiang Su <yunqiang.su@cipunited.com>
7276 * config/mips/mips.cc(mips_option_override): Set mips_abs to
7277 2008, if mips_abs is default and mips_nan is 2008.
7279 2023-11-09 Florian Weimer <fweimer@redhat.com>
7281 * doc/invoke.texi (Warning Options): Document
7282 -Wreturn-mismatch. Update -Wreturn-type documentation.
7284 2023-11-09 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
7286 * config/s390/s390.md: Remove UNSPEC_VEC_ELTSWAP.
7287 * config/s390/vector.md (eltswapv16qi): New expander.
7288 (*eltswapv16qi): New insn and splitter.
7289 (eltswapv8hi): New insn and splitter.
7290 (eltswap<mode>): New insn and splitter for modes V_HW_4 as well
7292 * config/s390/vx-builtins.md (eltswap<mode>): Remove.
7293 (*eltswapv16qi): Remove.
7294 (*eltswap<mode>): Remove.
7295 (*eltswap<mode>_emu): Remove.
7297 2023-11-09 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
7299 * config/s390/s390.cc (expand_perm_with_rot): Remove.
7300 (expand_perm_reverse_elements): New.
7301 (expand_perm_with_vster): Remove.
7302 (expand_perm_with_vstbrq): Remove.
7303 (vectorize_vec_perm_const_1): Replace removed functions with new
7306 2023-11-09 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
7308 * config/s390/s390.cc (expand_perm_with_merge): Deal with cases
7309 where vmr{l,h} are still applicable if the operands are swapped.
7310 (expand_perm_with_vpdi): Likewise for vpdi.
7312 2023-11-09 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
7314 * config/s390/s390.md (VX_CONV_INT): Remove iterator.
7315 (gf): Add float mappings.
7316 (TOINT, toint): New attribute.
7317 (*fixuns_trunc<VX_CONV_BFP:mode><VX_CONV_INT:mode>2_z13):
7319 (*fixuns_trunc<mode><toint>2_z13): Add.
7320 (*fix_trunc<VX_CONV_BFP:mode><VX_CONV_INT:mode>2_bfp_z13):
7322 (*fix_trunc<mode><toint>2_bfp_z13): Add.
7323 (*floatuns<VX_CONV_INT:mode><VX_CONV_BFP:mode>2_z13): Remove.
7324 (*floatuns<toint><mode>2_z13): Add.
7325 * config/s390/vector.md (VX_VEC_CONV_INT): Remove iterator.
7326 (float<VX_VEC_CONV_INT:mode><VX_VEC_CONV_BFP:mode>2): Remove.
7327 (float<tointvec><mode>2): Add.
7328 (floatuns<VX_VEC_CONV_INT:mode><VX_VEC_CONV_BFP:mode>2): Remove.
7329 (floatuns<tointvec><mode>2): Add.
7330 (fix_trunc<VX_VEC_CONV_BFP:mode><VX_VEC_CONV_INT:mode>2):
7332 (fix_trunc<mode><tointvec>2): Add.
7333 (fixuns_trunc<VX_VEC_CONV_BFP:mode><VX_VEC_CONV_INT:mode>2):
7335 (fixuns_trunc<VX_VEC_CONV_BFP:mode><tointvec>2): Add.
7337 2023-11-09 Jakub Jelinek <jakub@redhat.com>
7340 * attribs.cc (attribute_ignored_p): Only return true for
7341 attr_namespace_ignored_p if as is NULL.
7342 (decl_attributes): Never add ignored attributes.
7344 2023-11-09 Jin Ma <jinma@linux.alibaba.com>
7346 * config/riscv/bitmanip.md: Avoid the conflict between
7347 zbb and xtheadmemidx in patterns.
7349 2023-11-09 Richard Biener <rguenther@suse.de>
7351 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Record
7352 to the correct simd_clone_info.
7354 2023-11-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7356 * config/riscv/riscv-vector-costs.cc (costs::preferred_new_lmul_p): Fix ICE.
7358 2023-11-09 Alexandre Oliva <oliva@adacore.com>
7360 * tree-cfg.cc (assign_discriminators): Handle debug stmts.
7362 2023-11-08 Uros Bizjak <ubizjak@gmail.com>
7365 * config/i386/i386.md (*add<mode>_1_slp):
7366 Split insn only for unmatched operand 0.
7367 (*sub<mode>_1_slp): Ditto.
7368 (*<any_logic:code><mode>_1_slp): Merge pattern from "*and<mode>_1_slp"
7369 and "*<any_logic:code><mode>_1_slp" using any_logic code iterator.
7370 Split insn only for unmatched operand 0.
7371 (*neg<mode>1_slp): Split insn only for unmatched operand 0.
7372 (*one_cmpl<mode>_1_slp): Ditto.
7373 (*ashl<mode>3_1_slp): Ditto.
7374 (*<any_shiftrt:insn><mode>_1_slp): Ditto.
7375 (*<any_rotate:insn><mode>_1_slp): Ditto.
7376 (*addqi_ext<mode>_1): Redefine as define_insn_and_split. Add
7377 alternative 1 and split insn after reload for unmatched operand 0.
7378 (*<plusminus:insn>qi_ext<mode>_2): Merge pattern from
7379 "*addqi_ext<mode>_2" and "*subqi_ext<mode>_2" using plusminus code
7380 iterator. Redefine as define_insn_and_split. Add alternative 1
7381 and split insn after reload for unmatched operand 0.
7382 (*subqi_ext<mode>_1): Redefine as define_insn_and_split. Add
7383 alternative 1 and split insn after reload for unmatched operand 0.
7384 (*<any_logic:code>qi_ext<mode>_0): Merge pattern from
7385 "*andqi_ext<mode>_0" and and "*<any_logic:code>qi_ext<mode>_0" using
7386 any_logic code iterator.
7387 (*<any_logic:code>qi_ext<mode>_1): Merge pattern from
7388 "*andqi_ext<mode>_1" and "*<any_logic:code>qi_ext<mode>_1" using
7389 any_logic code iterator. Redefine as define_insn_and_split. Add
7390 alternative 1 and split insn after reload for unmatched operand 0.
7391 (*<any_logic:code>qi_ext<mode>_1_cc): Merge pattern from
7392 "*andqi_ext<mode>_1_cc" and "*xorqi_ext<mode>_1_cc" using any_logic
7393 code iterator. Redefine as define_insn_and_split. Add alternative 1
7394 and split insn after reload for unmatched operand 0.
7395 (*<any_logic:code>qi_ext<mode>_2): Merge pattern from
7396 "*andqi_ext<mode>_2" and "*<any_or:code>qi_ext<mode>_2" using
7397 any_logic code iterator. Redefine as define_insn_and_split. Add
7398 alternative 1 and split insn after reload for unmatched operand 0.
7399 (*<any_logic:code>qi_ext<mode>_3): Redefine as define_insn_and_split.
7400 Add alternative 1 and split insn after reload for unmatched operand 0.
7401 (*negqi_ext<mode>_1): Rename from "*negqi_ext<mode>_2". Add
7402 alternative 1 and split insn after reload for unmatched operand 0.
7403 (*one_cmplqi_ext<mode>_1): Ditto.
7404 (*ashlqi_ext<mode>_1): Ditto.
7405 (*<any_shiftrt:insn>qi_ext<mode>_1): Ditto.
7407 2023-11-08 Richard Biener <rguenther@suse.de>
7409 * tree-vect-stmts.cc (vectorizable_load): Adjust offset
7410 vector gathering for SLP of emulated gathers.
7412 2023-11-08 Richard Biener <rguenther@suse.de>
7414 * tree-vectorizer.h (vect_slp_child_index_for_operand):
7415 Add gatherscatter_p argument.
7416 * tree-vect-slp.cc (vect_slp_child_index_for_operand): Likewise.
7418 * tree-vect-stmts.cc (vect_check_store_rhs): Turn the rhs
7419 argument into an output, also output the SLP node associated
7421 (vectorizable_simd_clone_call): Adjust.
7422 (vectorizable_store): Likewise.
7423 (vectorizable_load): Likewise.
7425 2023-11-08 Richard Biener <rguenther@suse.de>
7427 * tree-vect-stmts.cc (vectorizable_load): Use the correct
7428 vectorized mask operand.
7430 2023-11-08 Lehua Ding <lehua.ding@rivai.ai>
7432 * config/riscv/vector.md (*vsetvldi_no_side_effects_si_extend):
7433 New combine pattern.
7435 2023-11-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7437 * config/riscv/riscv-vsetvl.cc: Fix ICE.
7439 2023-11-08 xuli <xuli1@eswincomputing.com>
7441 * config/riscv/riscv-c.cc (riscv_check_builtin_call): Eliminate warning.
7443 2023-11-08 Hongyu Wang <hongyu.wang@intel.com>
7446 * config/i386/constraints.md (jc): New constraint that prohibits
7448 * config/i386/i386.md (*movdi_internal): Change r constraint
7450 (*movti_internal): Likewise.
7452 2023-11-08 Florian Weimer <fweimer@redhat.com>
7454 * doc/invoke.texi (Warning Options): Mention C diagnostics
7457 2023-11-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7460 * config/riscv/riscv-vector-builtins-bases.cc: Normalize the vsetvls.
7462 2023-11-08 Haochen Jiang <haochen.jiang@intel.com>
7465 * config/i386/i386.md (avx_noavx512vl): New definition for isa
7467 * config/i386/sse.md (*andnot<mode>3): Change isa attribute from
7468 avx_noavx512f to avx_noavx512vl.
7470 2023-11-07 Pan Li <pan2.li@intel.com>
7472 * config/riscv/autovec.md: Remove the size check of lfloor.
7473 * config/riscv/riscv-v.cc (expand_vec_lfloor): Leverage
7474 emit_vec_rounding_to_integer for floor.
7476 2023-11-07 Robin Dapp <rdapp@ventanamicro.com>
7478 PR tree-optimization/112361
7480 PR middle-end/112406
7481 * tree-if-conv.cc (convert_scalar_cond_reduction): Remember if
7482 loop was versioned and only then create COND_OPs.
7483 (predicate_scalar_phi): Do not create COND_OP when not
7485 * tree-vect-loop.cc (vect_expand_fold_left): Re-create
7487 (vectorize_fold_left_reduction): Pass mask to
7488 vect_expand_fold_left.
7490 2023-11-07 Uros Bizjak <ubizjak@gmail.com>
7492 * config/i386/predicates.md ("flags_reg_operand"):
7493 Make predicate special to avoid automatic mode checks.
7495 2023-11-07 Martin Jambor <mjambor@suse.cz>
7497 * configure: Regenerate.
7499 2023-11-07 Kwok Cheung Yeung <kcy@codesourcery.com>
7501 * lto-cgraph.cc (enum LTO_symtab_tags): Add tag for indirect
7503 (output_offload_tables): Write indirect functions.
7504 (input_offload_tables): read indirect functions.
7505 * lto-section-names.h (OFFLOAD_IND_FUNC_TABLE_SECTION_NAME): New.
7506 * omp-builtins.def (BUILT_IN_GOMP_TARGET_MAP_INDIRECT_PTR): New.
7507 * omp-offload.cc (offload_ind_funcs): New.
7508 (omp_discover_implicit_declare_target): Add functions marked with
7509 'omp declare target indirect' to indirect functions list.
7510 (omp_finish_file): Add indirect functions to section for offload
7512 (execute_omp_device_lower): Redirect indirect calls on target by
7513 passing function pointer to BUILT_IN_GOMP_TARGET_MAP_INDIRECT_PTR.
7514 (pass_omp_device_lower::gate): Run pass_omp_device_lower if
7515 indirect functions are present on an accelerator device.
7516 * omp-offload.h (offload_ind_funcs): New.
7517 * tree-core.h (omp_clause_code): Add OMP_CLAUSE_INDIRECT.
7518 * tree.cc (omp_clause_num_ops): Add entry for OMP_CLAUSE_INDIRECT.
7519 (omp_clause_code_name): Likewise.
7520 * tree.h (OMP_CLAUSE_INDIRECT_EXPR): New.
7521 * config/gcn/mkoffload.cc (process_asm): Process offload_ind_funcs
7522 section. Count number of indirect functions.
7523 (process_obj): Emit number of indirect functions.
7524 * config/nvptx/mkoffload.cc (ind_func_ids, ind_funcs_tail): New.
7525 (process): Emit offload_ind_func_table in PTX code. Emit indirect
7526 function names and count in image.
7527 * config/nvptx/nvptx.cc (nvptx_record_offload_symbol): Mark
7528 indirect functions in PTX code with IND_FUNC_MAP.
7530 2023-11-07 Tobias Burnus <tobias@codesourcery.com>
7532 * doc/invoke.texi (-fopenmp, -fopenmp-simd): Adjust wording for
7533 attribute syntax supported also in C.
7535 2023-11-07 Richard Sandiford <richard.sandiford@arm.com>
7537 * config/aarch64/aarch64.cc (aarch64_print_operand): Add a %Z
7538 modifier for SVE registers.
7540 2023-11-07 Joseph Myers <joseph@codesourcery.com>
7542 * builtins.def (DEF_C2X_BUILTIN): Rename to DEF_C23_BUILTIN and
7543 use flag_isoc23 and function_c23_misc.
7544 * config/rl78/rl78.cc (rl78_option_override): Compare
7545 lang_hooks.name with "GNU C23" not "GNU C2X".
7546 * coretypes.h (function_c2x_misc): Rename to function_c23_misc.
7547 * doc/cpp.texi (@code{__has_attribute}): Refer to C23 instead of
7549 * doc/extend.texi: Likewise.
7550 * doc/invoke.texi: Likewise.
7551 * dwarf2out.cc (highest_c_language, gen_compile_unit_die): Compare
7552 against and return "GNU C23" language string instead of "GNU C2X".
7553 * ginclude/float.h: Refer to C23 instead of C2X in comments.
7554 * ginclude/stdint-gcc.h: Likewise.
7555 * glimits.h: Likewise.
7558 2023-11-07 Alexandre Oliva <oliva@adacore.com>
7560 * doc/sourcebuild.texi (opt_mstrict_align): New target.
7562 2023-11-07 Lehua Ding <lehua.ding@rivai.ai>
7564 * config/riscv/autovec-opt.md (*cond_len_<optab><v_double_trunc><mode>):
7565 New combine pattern.
7566 (*cond_len_<optab><v_quad_trunc><mode>): Ditto.
7567 (*cond_len_<optab><v_oct_trunc><mode>): Ditto.
7568 (*cond_len_extend<v_double_trunc><mode>): Ditto.
7569 (*cond_len_widen_reduc_plus_scal_<mode>): Ditto.
7571 2023-11-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7574 * config/riscv/riscv-avlprop.cc
7575 (pass_avlprop::get_vlmax_ta_preferred_avl): Enhance AVL propagation.
7576 * config/riscv/t-riscv: Add new include.
7578 2023-11-07 Pan Li <pan2.li@intel.com>
7580 * config/riscv/autovec.md: Remove the size check of lceil.l
7581 * config/riscv/riscv-v.cc (expand_vec_lceil): Leverage
7582 emit_vec_rounding_to_integer for ceil.
7584 2023-11-06 John David Anglin <danglin@gcc.gnu.org>
7586 * config/pa/pa.cc (pa_asm_trampoline_template): Fix typo.
7588 2023-11-06 John David Anglin <danglin@gcc.gnu.org>
7590 * config/pa/pa-linux.h (NEED_INDICATE_EXEC_STACK): Define to 1.
7592 2023-11-06 David Malcolm <dmalcolm@redhat.com>
7594 * diagnostic-show-locus.cc (class colorizer): Take just a
7595 pretty_printer rather than a diagnostic_context.
7596 (layout::layout): Make context param a const reference,
7597 and pretty_printer param non-optional.
7598 (layout::m_context): Drop field.
7599 (layout::m_options): New field.
7600 (layout::m_colorize_source_p): Drop field.
7601 (layout::m_show_labels_p): Drop field.
7602 (layout::m_show_line_numbers_p): Drop field.
7603 (layout::print_gap_in_line_numbering): Use m_options.
7604 (layout::calculate_line_spans): Likewise.
7605 (layout::calculate_linenum_width): Likewise.
7606 (layout::calculate_x_offset_display): Likewise.
7607 (layout::print_source_line): Likewise.
7608 (layout::start_annotation_line): Likewise.
7609 (layout::print_annotation_line): Likewise.
7610 (layout::print_line): Likewise.
7611 (gcc_rich_location::add_location_if_nearby): Update for changes to
7613 (diagnostic_show_locus): Likewise.
7614 (selftest::test_offset_impl): Likewise.
7615 (selftest::test_layout_x_offset_display_utf8): Likewise.
7616 (selftest::test_layout_x_offset_display_tab): Likewise.
7617 (selftest::test_tab_expansion): Likewise.
7618 * diagnostic.h (diagnostic_context::m_source_printing): Move
7619 declaration of struct outside diagnostic_context as...
7620 (struct diagnostic_source_printing_options)... this.
7622 2023-11-06 David Malcolm <dmalcolm@redhat.com>
7624 * diagnostic.cc (diagnostic_context::push_diagnostics): Convert
7626 (diagnostic_option_classifier::push): ...this.
7627 (diagnostic_context::pop_diagnostics): Convert to...
7628 (diagnostic_option_classifier::pop): ...this.
7629 (diagnostic_context::initialize): Move code to...
7630 (diagnostic_option_classifier::init): ...this new function.
7631 (diagnostic_context::finish): Move code to...
7632 (diagnostic_option_classifier::fini): ...this new function.
7633 (diagnostic_context::classify_diagnostic): Convert to...
7634 (diagnostic_option_classifier::classify_diagnostic): ...this.
7635 (diagnostic_context::update_effective_level_from_pragmas): Convert
7637 (diagnostic_option_classifier::update_effective_level_from_pragmas):
7639 (diagnostic_context::diagnostic_enabled): Update for refactoring.
7640 * diagnostic.h (struct diagnostic_classification_change_t): Move into...
7641 (class diagnostic_option_classifier): ...this new class.
7642 (diagnostic_context::option_unspecified_p): Update for move of
7643 fields into m_option_classifier.
7644 (diagnostic_context::classify_diagnostic): Likewise.
7645 (diagnostic_context::push_diagnostics): Likewise.
7646 (diagnostic_context::pop_diagnostics): Likewise.
7647 (diagnostic_context::update_effective_level_from_pragmas): Delete.
7648 (diagnostic_context::m_classify_diagnostic): Move into class
7649 diagnostic_option_classifier.
7650 (diagnostic_context::m_option_classifier): Likewise.
7651 (diagnostic_context::m_classification_history): Likewise.
7652 (diagnostic_context::m_n_classification_history): Likewise.
7653 (diagnostic_context::m_push_list): Likewise.
7654 (diagnostic_context::m_n_push): Likewise.
7655 (diagnostic_context::m_option_classifier): New.
7657 2023-11-06 David Malcolm <dmalcolm@redhat.com>
7659 * diagnostic.cc (diagnostic_context::set_urlifier): New.
7660 * diagnostic.h (diagnostic_context::set_urlifier): New decl.
7661 (diagnostic_context::m_urlifier): Make private.
7662 * gcc.cc (driver::global_initializations): Use set_urlifier rather
7663 than directly setting field.
7664 * toplev.cc (general_init): Likewise.
7666 2023-11-06 David Malcolm <dmalcolm@redhat.com>
7668 * diagnostic.cc (diagnostic_context::check_max_errors): Replace
7669 uses of diagnostic_kind_count with simple field acesss.
7670 (diagnostic_context::report_diagnostic): Likewise.
7671 (diagnostic_text_output_format::~diagnostic_text_output_format):
7672 Replace use of diagnostic_kind_count with
7673 diagnostic_context::diagnostic_count.
7674 * diagnostic.h (diagnostic_kind_count): Delete.
7675 (errorcount): Replace use of diagnostic_kind_count with
7676 diagnostic_context::diagnostic_count.
7677 (warningcount): Likewise.
7678 (werrorcount): Likewise.
7679 (sorrycount): Likewise.
7681 2023-11-06 Christophe Lyon <christophe.lyon@linaro.org>
7683 * doc/sourcebuild.texi (Other attributes): Document thread_fence
7686 2023-11-06 Uros Bizjak <ubizjak@gmail.com>
7688 * config/i386/constraints.md (Bc): Remove constraint.
7689 (Bn): Rewrite to use x86_extended_reg_mentioned_p predicate.
7690 * config/i386/i386.cc (ix86_memory_address_reg_class):
7691 Do not limit processing to TARGET_APX_EGPR. Exit early for
7692 NULL insn. Do not check recog_data.insn before calling
7693 extract_insn_cached.
7694 (ix86_insn_base_reg_class): Handle ADDR_GPR8.
7695 (ix86_regno_ok_for_insn_base_p): Ditto.
7696 (ix86_insn_index_reg_class): Ditto.
7697 * config/i386/i386.md (*cmpqi_ext<mode>_1_mem_rex64):
7698 Remove insn pattern and corresponding peephole2 pattern.
7699 (*cmpi_ext<mode>_1): Remove (m,Q) alternative.
7700 Change (QBc,Q) alternative to (QBn,Q). Add "addr" attribute.
7701 (*cmpqi_ext<mode>_3_mem_rex64): Remove insn pattern
7702 and corresponding peephole2 pattern.
7703 (*cmpi_ext<mode>_3): Remove (Q,m) alternative.
7704 Change (Q,QnBc) alternative to (Q,QnBn). Add "addr" attribute.
7705 (*extzvqi_mem_rex64): Remove insn pattern and
7706 corresponding peephole2 pattern.
7707 (*extzvqi): Remove (Q,m) alternative. Change (Q,QnBc)
7708 alternative to (Q,QnBn). Add "addr" attribute.
7709 (*insvqi_1_mem_rex64): Remove insn pattern and
7710 corresponding peephole2 pattern.
7711 (*insvqi_1): Remove (Q,m) alternative. Change (Q,QnBc)
7712 alternative to (Q,QnBn). Add "addr" attribute.
7713 (@insv<mode>_1): Ditto.
7714 (*addqi_ext<mode>_0): Remove (m,0,Q) alternative. Change (QBc,0,Q)
7715 alternative to (QBn,0,Q). Add "addr" attribute.
7716 (*subqi_ext<mode>_0): Ditto.
7717 (*andqi_ext<mode>_0): Ditto.
7718 (*<any_or:code>qi_ext<mode>_0): Ditto.
7719 (*addqi_ext<mode>_1): Remove (Q,0,m) alternative. Change (Q,0,QnBc)
7720 alternative to (Q,0,QnBn). Add "addr" attribute.
7721 (*andqi_ext<mode>_1): Ditto.
7722 (*andqi_ext<mode>_1_cc): Ditto.
7723 (*<any_or:code>qi_ext<mode>_1): Ditto.
7724 (*xorqi_ext<mode>_1_cc): Ditto.
7725 * config/i386/predicates.md (nonimm_x64constmem_operand):
7727 (general_x64constmem_operand): Ditto.
7728 (norex_memory_operand): Ditto.
7730 2023-11-06 Joseph Myers <joseph@codesourcery.com>
7733 * doc/cpp.texi (__STDC_VERSION__): Refer to -std=c23 and
7734 -std=gnu23 instead of -std=c2x and -std=gnu2x.
7735 * doc/extend.texi (Attribute Syntax): Refer to C23 and -std=c23
7736 instead of C2x and -std=c2x.
7737 * doc/invoke.texi (-Wc11-c23-compat, -std=c23, -std=gnu23)
7738 (-std=iso9899:2024): Document, with -Wc11-c2x-compat, -std=c2x and
7739 -std=gnu2x as deprecated aliases. Update descriptions of C23.
7740 * doc/standards.texi (Standards): Describe C23 with C2X as an old
7743 2023-11-06 Thomas Schwinge <thomas@codesourcery.com>
7745 * config/nvptx/nvptx.h (MAKE_DECL_ONE_ONLY): Define.
7747 2023-11-06 Richard Biener <rguenther@suse.de>
7749 PR tree-optimization/112405
7750 * tree-vect-stmts.cc (vectorizable_simd_clone_call):
7751 Properly handle invariant and/or loop mask passing.
7753 2023-11-06 Pan Li <pan2.li@intel.com>
7755 * config/riscv/autovec.md: Remove the size check of lround.
7756 * config/riscv/riscv-v.cc (expand_vec_lround): Leverage
7757 emit_vec_rounding_to_integer for round.
7759 2023-11-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7761 * config/riscv/predicates.md: Adapt predicate.
7762 * config/riscv/riscv-protos.h (can_be_broadcasted_p): New function.
7763 * config/riscv/riscv-v.cc (can_be_broadcasted_p): Ditto.
7764 * config/riscv/vector.md (vec_duplicate<mode>): New pattern.
7765 (*vec_duplicate<mode>): Adapt vec_duplicate insn pattern.
7767 2023-11-06 Richard Biener <rguenther@suse.de>
7769 PR tree-optimization/111950
7770 * tree-vect-loop-manip.cc (slpeel_duplicate_current_defs_from_edges):
7772 (find_guard_arg): Likewise.
7773 (slpeel_update_phi_nodes_for_guard2): Likewise.
7774 (slpeel_tree_duplicate_loop_to_edge_cfg): Remove calls to
7775 slpeel_duplicate_current_defs_from_edges, do not elide
7776 LC-PHIs for invariant values.
7777 (vect_do_peeling): Materialize PHI arguments for the edge
7778 around the epilog from the PHI defs of the main loop exit.
7780 2023-11-06 Richard Biener <rguenther@suse.de>
7782 PR tree-optimization/112404
7783 * tree-vectorizer.h (get_mask_type_for_scalar_type): Declare
7784 overload with SLP node argument.
7785 * tree-vect-stmts.cc (get_mask_type_for_scalar_type): Implement it.
7786 (vect_check_scalar_mask): Use it.
7787 * tree-vect-slp.cc (vect_gather_slp_loads): Properly identify
7788 loads also for nodes with children, like .MASK_LOAD.
7789 * tree-vect-loop.cc (vect_analyze_loop_2): Look at the
7790 representative for load nodes and check whether it is a grouped
7791 access before looking for load-lanes support.
7793 2023-11-06 Robin Dapp <rdapp@ventanamicro.com>
7795 PR tree-optimization/111760
7796 * config/riscv/autovec.md (vcond_mask_len_<mode><vm>): Add
7798 * config/riscv/riscv-protos.h (enum insn_type): Add.
7799 * config/riscv/riscv-v.cc (needs_fp_rounding): Add !pred_mov.
7800 * doc/md.texi: Add vcond_mask_len.
7801 * gimple-match-exports.cc (maybe_resimplify_conditional_op):
7802 Create VCOND_MASK_LEN when length masking.
7803 * gimple-match.h (gimple_match_op::gimple_match_op): Always
7804 initialize len and bias.
7805 * internal-fn.cc (vec_cond_mask_len_direct): Add.
7806 (direct_vec_cond_mask_len_optab_supported_p): Add.
7807 (internal_fn_len_index): Add VCOND_MASK_LEN.
7808 (internal_fn_mask_index): Ditto.
7809 * internal-fn.def (VCOND_MASK_LEN): New internal function.
7810 * match.pd: Combine unconditional unary, binary and ternary
7811 operations into the respective COND_LEN operations.
7812 * optabs.def (OPTAB_D): Add vcond_mask_len optab.
7814 2023-11-06 Richard Sandiford <richard.sandiford@arm.com>
7816 * explow.cc (align_dynamic_address): Do nothing if the required
7817 alignment is a byte.
7819 2023-11-06 Richard Sandiford <richard.sandiford@arm.com>
7821 * function.h (get_stack_dynamic_offset): Declare.
7822 * function.cc (get_stack_dynamic_offset): New function,
7824 (get_stack_dynamic_offset): ...here.
7825 * explow.cc (allocate_dynamic_stack_space): Handle calls made
7826 after virtual registers have been instantiated.
7828 2023-11-06 liuhongt <hongtao.liu@intel.com>
7831 * config/i386/i386-expand.cc (ix86_expand_vec_perm_vpermt2):
7832 Avoid generating RTL code when d->testing_p.
7834 2023-11-06 Richard Biener <rguenther@suse.de>
7836 PR tree-optimization/112369
7837 * tree.cc (strip_float_extensions): Use element_precision.
7839 2023-11-06 Richard Biener <rguenther@suse.de>
7841 PR middle-end/112296
7842 * doc/extend.texi (__builtin_constant_p): Clarify that
7843 side-effects are discarded.
7845 2023-11-06 Kewen Lin <linkw@linux.ibm.com>
7848 * config.in: Regenerate.
7849 * config/rs6000/rs6000.cc (rs6000_update_ipa_fn_target_info): Guard
7850 inline asm handling under !HAVE_AS_POWER10_HTM.
7851 * configure: Regenerate.
7852 * configure.ac: Detect assembler support for HTM insns at power10.
7854 2023-11-06 xuli <xuli1@eswincomputing.com>
7855 Pan Li <pan2.li@intel.com>
7857 * config/riscv/riscv-c.cc (riscv_resolve_overloaded_builtin): New function for the hook.
7858 (riscv_register_pragmas): Register the hook.
7859 * config/riscv/riscv-protos.h (resolve_overloaded_builtin): New decl.
7860 * config/riscv/riscv-vector-builtins-bases.cc: New function impl.
7861 * config/riscv/riscv-vector-builtins-shapes.cc (build_one): Register overloaded function.
7862 * config/riscv/riscv-vector-builtins.cc (struct non_overloaded_registered_function_hasher):
7864 (function_builder::add_function): Add overloaded arg.
7865 (function_builder::add_unique_function): Map overloaded function to non-overloaded function.
7866 (function_builder::add_overloaded_function): New API impl.
7867 (registered_function::overloaded_hash): Calculate hash value.
7868 (has_vxrm_or_frm_p): New function impl.
7869 (non_overloaded_registered_function_hasher::hash): Ditto.
7870 (non_overloaded_registered_function_hasher::equal): Ditto.
7871 (handle_pragma_vector): Allocate space for hash table.
7872 (resolve_overloaded_builtin): New function impl.
7873 * config/riscv/riscv-vector-builtins.h (function_base::may_require_frm_p): Ditto.
7874 (function_base::may_require_vxrm_p): Ditto.
7876 2023-11-06 Haochen Jiang <haochen.jiang@intel.com>
7879 * config/i386/avx512bf16intrin.h: Push no-evex512 target.
7880 * config/i386/avx512bf16vlintrin.h: Ditto.
7881 * config/i386/avx512bitalgvlintrin.h: Ditto.
7882 * config/i386/avx512bwintrin.h: Ditto.
7883 * config/i386/avx512dqintrin.h: Ditto.
7884 * config/i386/avx512fintrin.h: Ditto.
7885 * config/i386/avx512fp16intrin.h: Ditto.
7886 * config/i386/avx512fp16vlintrin.h: Ditto.
7887 * config/i386/avx512ifmavlintrin.h: Ditto.
7888 * config/i386/avx512vbmi2vlintrin.h: Ditto.
7889 * config/i386/avx512vbmivlintrin.h: Ditto.
7890 * config/i386/avx512vlbwintrin.h: Ditto.
7891 * config/i386/avx512vldqintrin.h: Ditto.
7892 * config/i386/avx512vlintrin.h: Ditto.
7893 * config/i386/avx512vnnivlintrin.h: Ditto.
7894 * config/i386/avx512vp2intersectvlintrin.h: Ditto.
7895 * config/i386/avx512vpopcntdqvlintrin.h: Ditto.
7897 2023-11-06 Haochen Jiang <haochen.jiang@intel.com>
7899 * config/i386/avx512bf16vlintrin.h
7900 (_mm_avx512_castsi128_ps): New.
7901 (_mm256_avx512_castsi256_ps): Ditto.
7902 (_mm_avx512_slli_epi32): Ditto.
7903 (_mm256_avx512_slli_epi32): Ditto.
7904 (_mm_avx512_cvtepi16_epi32): Ditto.
7905 (_mm256_avx512_cvtepi16_epi32): Ditto.
7906 (__attribute__): Change intrin call.
7907 * config/i386/avx512bwintrin.h
7908 (_mm_avx512_set_epi32): New.
7909 (_mm_avx512_set_epi16): Ditto.
7910 (_mm_avx512_set_epi8): Ditto.
7911 (__attribute__): Change intrin call.
7912 * config/i386/avx512fp16intrin.h: Ditto.
7913 * config/i386/avx512fp16vlintrin.h
7914 (_mm_avx512_set1_ps): New.
7915 (_mm256_avx512_set1_ps): Ditto.
7916 (_mm_avx512_and_si128): Ditto.
7917 (_mm256_avx512_and_si256): Ditto.
7918 (__attribute__): Change intrin call.
7919 * config/i386/avx512vlbwintrin.h
7920 (_mm_avx512_set1_epi32): New.
7921 (_mm_avx512_set1_epi16): Ditto.
7922 (_mm_avx512_set1_epi8): Ditto.
7923 (_mm256_avx512_set_epi16): Ditto.
7924 (_mm256_avx512_set_epi8): Ditto.
7925 (_mm256_avx512_set1_epi16): Ditto.
7926 (_mm256_avx512_set1_epi32): Ditto.
7927 (_mm256_avx512_set1_epi8): Ditto.
7928 (_mm_avx512_max_epi16): Ditto.
7929 (_mm_avx512_min_epi16): Ditto.
7930 (_mm_avx512_max_epu16): Ditto.
7931 (_mm_avx512_min_epu16): Ditto.
7932 (_mm_avx512_max_epi8): Ditto.
7933 (_mm_avx512_min_epi8): Ditto.
7934 (_mm_avx512_max_epu8): Ditto.
7935 (_mm_avx512_min_epu8): Ditto.
7936 (_mm256_avx512_max_epi16): Ditto.
7937 (_mm256_avx512_min_epi16): Ditto.
7938 (_mm256_avx512_max_epu16): Ditto.
7939 (_mm256_avx512_min_epu16): Ditto.
7940 (_mm256_avx512_insertf128_ps): Ditto.
7941 (_mm256_avx512_extractf128_pd): Ditto.
7942 (_mm256_avx512_extracti128_si256): Ditto.
7943 (_MM256_AVX512_REDUCE_OPERATOR_BASIC_EPI16): Ditto.
7944 (_MM256_AVX512_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto.
7945 (_MM256_AVX512_REDUCE_OPERATOR_BASIC_EPI8): Ditto.
7946 (_MM256_AVX512_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto.
7947 (__attribute__): Change intrin call.
7949 2023-11-06 Haochen Jiang <haochen.jiang@intel.com>
7951 * config/i386/avx512bf16vlintrin.h: Change intrin call.
7952 * config/i386/avx512fintrin.h
7953 (_mm_avx512_undefined_ps): New.
7954 (_mm_avx512_undefined_pd): Ditto.
7955 (__attribute__): Change intrin call.
7956 * config/i386/avx512vbmivlintrin.h: Ditto.
7957 * config/i386/avx512vlbwintrin.h: Ditto.
7958 * config/i386/avx512vldqintrin.h: Ditto.
7959 * config/i386/avx512vlintrin.h
7960 (_mm_avx512_undefined_si128): New.
7961 (_mm256_avx512_undefined_ps): Ditto.
7962 (_mm256_avx512_undefined_pd): Ditto.
7963 (_mm256_avx512_undefined_si256): Ditto.
7964 (__attribute__): Change intrin call.
7966 2023-11-06 Haochen Jiang <haochen.jiang@intel.com>
7968 * config/i386/avx512bitalgvlintrin.h: Change intrin call.
7969 * config/i386/avx512dqintrin.h: Ditto.
7970 * config/i386/avx512fintrin.h:
7971 (_mm_avx512_setzero_ps): New.
7972 (_mm_avx512_setzero_pd): Ditto.
7973 (__attribute__): Change intrin call.
7974 * config/i386/avx512fp16intrin.h: Ditto.
7975 * config/i386/avx512fp16vlintrin.h: Ditto.
7976 * config/i386/avx512vbmi2vlintrin.h: Ditto.
7977 * config/i386/avx512vbmivlintrin.h: Ditto.
7978 * config/i386/avx512vlbwintrin.h: Ditto.
7979 * config/i386/avx512vldqintrin.h: Ditto.
7980 * config/i386/avx512vlintrin.h
7981 (_mm_avx512_setzero_si128): New.
7982 (_mm256_avx512_setzero_pd): Ditto.
7983 (_mm256_avx512_setzero_ps): Ditto.
7984 (_mm256_avx512_setzero_si256): Ditto.
7985 (__attribute__): Change intrin call.
7986 * config/i386/avx512vpopcntdqvlintrin.h: Ditto.
7987 * config/i386/gfniintrin.h: Ditto.
7989 2023-11-05 Uros Bizjak <ubizjak@gmail.com>
7991 * config/i386/i386.h (enum reg_class): Add LEGACY_INDEX_REGS.
7992 Rename LEGACY_REGS to LEGACY_GENERAL_REGS.
7993 (REG_CLASS_NAMES): Ditto.
7994 (REG_CLASS_CONTENTS): Ditto.
7995 * config/i386/constraints.md ("R"): Update for rename.
7997 2023-11-05 Richard Sandiford <richard.sandiford@arm.com>
7999 * mode-switching.cc: Remove unused forward references.
8000 (seginfo): Remove bbnum.
8001 (new_seginfo): Remove associated argument.
8002 (optimize_mode_switching): Update calls accordingly.
8004 2023-11-05 Richard Sandiford <richard.sandiford@arm.com>
8006 * read-rtl.cc (read_rtx_operand): Avoid spinning endlessly for
8007 invalid [...] operands.
8009 2023-11-05 Richard Sandiford <richard.sandiford@arm.com>
8012 * config/aarch64/aarch64.cc (aarch64_modes_compatible_p): New
8013 function, with the core logic extracted from...
8014 (aarch64_can_change_mode_class): ...here. Extend the previous rules
8015 to allow changes between partial SVE modes and other modes if
8016 the other mode is no bigger than an element, and if no other rule
8017 prevents it. Use the aarch64_modes_tieable_p handling of
8018 partial Advanced SIMD structure modes.
8019 (aarch64_modes_tieable_p): Use aarch64_modes_compatible_p.
8020 Allow all vector mode ties that it allows.
8022 2023-11-05 Pan Li <pan2.li@intel.com>
8024 * config/riscv/autovec.md: Remove the size check of lrint.
8025 * config/riscv/riscv-v.cc (emit_vec_narrow_cvt_x_f): New help
8027 (emit_vec_widden_cvt_x_f): New help emit func impl.
8028 (emit_vec_rounding_to_integer): New func impl to emit the
8029 rounding from FP to integer.
8030 (expand_vec_lrint): Leverage emit_vec_rounding_to_integer.
8031 * config/riscv/vector.md: Take V_VLSF for vfncvt.
8033 2023-11-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8035 * config/riscv/vector.md: Fix bug.
8037 2023-11-04 Sergei Trofimovich <siarheit@google.com>
8040 * gcc-urlifier.cc (get_url_suffix_for_quoted_text): Mark as
8043 2023-11-04 Pan Li <pan2.li@intel.com>
8045 * config/riscv/vector-iterators.md: Remove HF modes.
8047 2023-11-04 David Malcolm <dmalcolm@redhat.com>
8049 * diagnostic.cc: Include "pretty-print-urlifier.h".
8050 (diagnostic_context::initialize): Initialize m_urlifier.
8051 (diagnostic_context::finish): Clean up m_urlifier
8052 (diagnostic_report::diagnostic): m_urlifier to pp_format.
8053 * diagnostic.h (diagnostic_context::m_urlifier): New field.
8054 * gcc-urlifier.cc: New file.
8055 * gcc-urlifier.def: New file.
8056 * gcc-urlifier.h: New file.
8057 * gcc.cc: Include "gcc-urlifier.h".
8058 (driver::global_initializations): Initialize global_dc->m_urlifier.
8059 * pretty-print-urlifier.h: New file.
8060 * pretty-print.cc: Include "pretty-print-urlifier.h".
8061 (obstack_append_string): New.
8062 (urlify_quoted_string): New.
8063 (pp_format): Add "urlifier" param and use it to implement optional
8064 urlification of quoted text strings.
8065 (pp_output_formatted_text): Make buffer a const pointer.
8066 (selftest::pp_printf_with_urlifier): New.
8067 (selftest::test_urlification): New.
8068 (selftest::pretty_print_cc_tests): Call it.
8069 * pretty-print.h (class urlifier): New forward declaration.
8070 (pp_format): Add optional urlifier param.
8071 * selftest-run-tests.cc (selftest::run_tests): Call
8072 selftest::gcc_urlifier_cc_tests .
8073 * selftest.h (selftest::gcc_urlifier_cc_tests): New decl.
8074 * toplev.cc: Include "gcc-urlifier.h".
8075 (general_init): Initialize global_dc->m_urlifier.
8077 2023-11-04 David Malcolm <dmalcolm@redhat.com>
8079 * Makefile.in (GCC_OBJS): Add gcc-urlifier.o.
8082 2023-11-04 David Malcolm <dmalcolm@redhat.com>
8084 * common.opt (fdiagnostics-text-art-charset=): Remove refererence
8085 to diagnostic-text-art.h.
8086 * coretypes.h (struct diagnostic_context): Replace forward decl
8088 (class diagnostic_context): ...this.
8089 * diagnostic-format-json.cc: Update for changes to
8091 * diagnostic-format-sarif.cc: Likewise.
8092 * diagnostic-show-locus.cc: Likewise.
8093 * diagnostic-text-art.h: Deleted file, moving content...
8094 (enum diagnostic_text_art_charset): ...to diagnostic.h,
8095 (DIAGNOSTICS_TEXT_ART_CHARSET_DEFAULT): ...deleting,
8096 (diagnostics_text_art_charset_init): ...deleting in favor of
8097 diagnostic_context::set_text_art_charset.
8098 * diagnostic.cc: Remove include of "diagnostic-text-art.h".
8099 (pedantic_warning_kind): Update for field renaming.
8100 (permissive_error_kind): Likewise.
8101 (permissive_error_option): Likewise.
8102 (diagnostic_initialize): Convert to...
8103 (diagnostic_context::initialize): ...this, updating for field
8105 (diagnostic_color_init): Convert to...
8106 (diagnostic_context::color_init): ...this.
8107 (diagnostic_urls_init): Convert to...
8108 (diagnostic_context::urls_init): ...this.
8109 (diagnostic_initialize_input_context): Convert to...
8110 (diagnostic_context::initialize_input_context): ...this.
8111 (diagnostic_finish): Convert to...
8112 (diagnostic_context::finish): ...this, updating for field
8114 (diagnostic_context::set_output_format): New.
8115 (diagnostic_context::set_client_data_hooks): New.
8116 (diagnostic_context::create_edit_context): New.
8117 (diagnostic_converted_column): Convert to...
8118 (diagnostic_context::converted_column): ...this.
8119 (diagnostic_get_location_text): Update for field renaming.
8120 (diagnostic_check_max_errors): Convert to...
8121 (diagnostic_context::check_max_errors): ...this, updating for
8123 (diagnostic_action_after_output): Convert to...
8124 (diagnostic_context::action_after_output): ...this, updating for
8126 (last_module_changed_p): Delete.
8127 (set_last_module): Delete.
8128 (includes_seen): Convert to...
8129 (diagnostic_context::includes_seen_p): ...this, updating for field
8131 (diagnostic_report_current_module): Convert to...
8132 (diagnostic_context::report_current_module): ...this, updating for
8133 field renamings, and replacing uses of last_module_changed_p and
8134 set_last_module to simple field accesses.
8135 (diagnostic_show_any_path): Convert to...
8136 (diagnostic_context::show_any_path): ...this.
8137 (diagnostic_classify_diagnostic): Convert to...
8138 (diagnostic_context::classify_diagnostic): ...this, updating for
8140 (diagnostic_push_diagnostics): Convert to...
8141 (diagnostic_context::push_diagnostics): ...this, updating for field
8143 (diagnostic_pop_diagnostics): Convert to...
8144 (diagnostic_context::pop_diagnostics): ...this, updating for field
8146 (get_any_inlining_info): Convert to...
8147 (diagnostic_context::get_any_inlining_info): ...this, updating for
8149 (update_effective_level_from_pragmas): Convert to...
8150 (diagnostic_context::update_effective_level_from_pragmas):
8151 ...this, updating for field renamings.
8152 (print_any_cwe): Convert to...
8153 (diagnostic_context::print_any_cwe): ...this.
8154 (print_any_rules): Convert to...
8155 (diagnostic_context::print_any_rules): ...this.
8156 (print_option_information): Convert to...
8157 (diagnostic_context::print_option_information): ...this, updating
8158 for field renamings.
8159 (diagnostic_enabled): Convert to...
8160 (diagnostic_context::diagnostic_enabled): ...this, updating for
8162 (warning_enabled_at): Convert to...
8163 (diagnostic_context::warning_enabled_at): ...this.
8164 (diagnostic_report_diagnostic): Convert to...
8165 (diagnostic_context::report_diagnostic): ...this, updating for
8166 field renamings and conversions to member functions.
8167 (diagnostic_append_note): Update for field renaming.
8168 (diagnostic_impl): Use diagnostic_context::report_diagnostic
8170 (diagnostic_n_impl): Likewise.
8171 (diagnostic_emit_diagram): Convert to...
8172 (diagnostic_context::emit_diagram): ...this, updating for field
8174 (error_recursion): Convert to...
8175 (diagnostic_context::error_recursion): ...this.
8176 (diagnostic_text_output_format::~diagnostic_text_output_format):
8178 (diagnostics_text_art_charset_init): Convert to...
8179 (diagnostic_context::set_text_art_charset): ...this.
8180 (assert_location_text): Update for field renamings.
8181 * diagnostic.h (enum diagnostic_text_art_charset): Move here from
8182 diagnostic-text-art.h.
8183 (struct diagnostic_context): Convert to...
8184 (class diagnostic_context): ...this.
8185 (diagnostic_context::ice_handler_callback_t): New typedef.
8186 (diagnostic_context::set_locations_callback_t): New typedef.
8187 (diagnostic_context::initialize): New decl.
8188 (diagnostic_context::color_init): New decl.
8189 (diagnostic_context::urls_init): New decl.
8190 (diagnostic_context::file_cache_init): New decl.
8191 (diagnostic_context::finish): New decl.
8192 (diagnostic_context::set_set_locations_callback): New.
8193 (diagnostic_context::initialize_input_context): New decl.
8194 (diagnostic_context::warning_enabled_at): New decl.
8195 (diagnostic_context::option_unspecified_p): New.
8196 (diagnostic_context::report_diagnostic): New decl.
8197 (diagnostic_context::report_current_module): New decl.
8198 (diagnostic_context::check_max_errors): New decl.
8199 (diagnostic_context::action_after_output): New decl.
8200 (diagnostic_context::classify_diagnostic): New decl.
8201 (diagnostic_context::push_diagnostics): New decl.
8202 (diagnostic_context::pop_diagnostics): New decl.
8203 (diagnostic_context::emit_diagram): New decl.
8204 (diagnostic_context::set_output_format): New decl.
8205 (diagnostic_context::set_text_art_charset): New decl.
8206 (diagnostic_context::set_client_data_hooks): New decl.
8207 (diagnostic_context::create_edit_context): New decl.
8208 (diagnostic_context::set_warning_as_error_requested): New.
8209 (diagnostic_context::set_report_bug): New.
8210 (diagnostic_context::set_extra_output_kind): New.
8211 (diagnostic_context::set_show_cwe): New.
8212 (diagnostic_context::set_show_rules): New.
8213 (diagnostic_context::set_path_format): New.
8214 (diagnostic_context::set_show_path_depths): New.
8215 (diagnostic_context::set_show_option_requested): New.
8216 (diagnostic_context::set_max_errors): New.
8217 (diagnostic_context::set_escape_format): New.
8218 (diagnostic_context::set_ice_handler_callback): New.
8219 (diagnostic_context::warning_as_error_requested_p): New.
8220 (diagnostic_context::show_path_depths_p): New.
8221 (diagnostic_context::get_path_format): New.
8222 (diagnostic_context::get_escape_format): New.
8223 (diagnostic_context::get_file_cache): New.
8224 (diagnostic_context::get_edit_context): New.
8225 (diagnostic_context::get_client_data_hooks): New.
8226 (diagnostic_context::get_diagram_theme): New.
8227 (diagnostic_context::converted_column): New decl.
8228 (diagnostic_context::diagnostic_count): New.
8229 (diagnostic_context::includes_seen_p): New decl.
8230 (diagnostic_context::print_any_cwe): New decl.
8231 (diagnostic_context::print_any_rules): New decl.
8232 (diagnostic_context::print_option_information): New decl.
8233 (diagnostic_context::show_any_path): New decl.
8234 (diagnostic_context::error_recursion): New decl.
8235 (diagnostic_context::diagnostic_enabled): New decl.
8236 (diagnostic_context::get_any_inlining_info): New decl.
8237 (diagnostic_context::update_effective_level_from_pragmas): New
8239 (diagnostic_context::m_file_cache): Make private.
8240 (diagnostic_context::diagnostic_count): Rename to...
8241 (diagnostic_context::m_diagnostic_count): ...this and make
8243 (diagnostic_context::warning_as_error_requested): Rename to...
8244 (diagnostic_context::m_warning_as_error_requested): ...this and
8246 (diagnostic_context::n_opts): Rename to...
8247 (diagnostic_context::m_n_opts): ...this and make private.
8248 (diagnostic_context::classify_diagnostic): Rename to...
8249 (diagnostic_context::m_classify_diagnostic): ...this and make
8251 (diagnostic_context::classification_history): Rename to...
8252 (diagnostic_context::m_classification_history): ...this and make
8254 (diagnostic_context::n_classification_history): Rename to...
8255 (diagnostic_context::m_n_classification_history): ...this and make
8257 (diagnostic_context::push_list): Rename to...
8258 (diagnostic_context::m_push_list): ...this and make private.
8259 (diagnostic_context::n_push): Rename to...
8260 (diagnostic_context::m_n_push): ...this and make private.
8261 (diagnostic_context::show_cwe): Rename to...
8262 (diagnostic_context::m_show_cwe): ...this and make private.
8263 (diagnostic_context::show_rules): Rename to...
8264 (diagnostic_context::m_show_rules): ...this and make private.
8265 (diagnostic_context::path_format): Rename to...
8266 (diagnostic_context::m_path_format): ...this and make private.
8267 (diagnostic_context::show_path_depths): Rename to...
8268 (diagnostic_context::m_show_path_depths): ...this and make
8270 (diagnostic_context::show_option_requested): Rename to...
8271 (diagnostic_context::m_show_option_requested): ...this and make
8273 (diagnostic_context::abort_on_error): Rename to...
8274 (diagnostic_context::m_abort_on_error): ...this.
8275 (diagnostic_context::show_column): Rename to...
8276 (diagnostic_context::m_show_column): ...this.
8277 (diagnostic_context::pedantic_errors): Rename to...
8278 (diagnostic_context::m_pedantic_errors): ...this.
8279 (diagnostic_context::permissive): Rename to...
8280 (diagnostic_context::m_permissive): ...this.
8281 (diagnostic_context::opt_permissive): Rename to...
8282 (diagnostic_context::m_opt_permissive): ...this.
8283 (diagnostic_context::fatal_errors): Rename to...
8284 (diagnostic_context::m_fatal_errors): ...this.
8285 (diagnostic_context::dc_inhibit_warnings): Rename to...
8286 (diagnostic_context::m_inhibit_warnings): ...this.
8287 (diagnostic_context::dc_warn_system_headers): Rename to...
8288 (diagnostic_context::m_warn_system_headers): ...this.
8289 (diagnostic_context::max_errors): Rename to...
8290 (diagnostic_context::m_max_errors): ...this and make private.
8291 (diagnostic_context::internal_error): Rename to...
8292 (diagnostic_context::m_internal_error): ...this.
8293 (diagnostic_context::option_enabled): Rename to...
8294 (diagnostic_context::m_option_enabled): ...this.
8295 (diagnostic_context::option_state): Rename to...
8296 (diagnostic_context::m_option_state): ...this.
8297 (diagnostic_context::option_name): Rename to...
8298 (diagnostic_context::m_option_name): ...this.
8299 (diagnostic_context::get_option_url): Rename to...
8300 (diagnostic_context::m_get_option_url): ...this.
8301 (diagnostic_context::print_path): Rename to...
8302 (diagnostic_context::m_print_path): ...this.
8303 (diagnostic_context::make_json_for_path): Rename to...
8304 (diagnostic_context::m_make_json_for_path): ...this.
8305 (diagnostic_context::x_data): Rename to...
8306 (diagnostic_context::m_client_aux_data): ...this.
8307 (diagnostic_context::last_location): Rename to...
8308 (diagnostic_context::m_last_location): ...this.
8309 (diagnostic_context::last_module): Rename to...
8310 (diagnostic_context::m_last_module): ...this and make private.
8311 (diagnostic_context::lock): Rename to...
8312 (diagnostic_context::m_lock): ...this and make private.
8313 (diagnostic_context::lang_mask): Rename to...
8314 (diagnostic_context::m_lang_mask): ...this.
8315 (diagnostic_context::inhibit_notes_p): Rename to...
8316 (diagnostic_context::m_inhibit_notes_p): ...this.
8317 (diagnostic_context::report_bug): Rename to...
8318 (diagnostic_context::m_report_bug): ...this and make private.
8319 (diagnostic_context::extra_output_kind): Rename to...
8320 (diagnostic_context::m_extra_output_kind): ...this and make
8322 (diagnostic_context::column_unit): Rename to...
8323 (diagnostic_context::m_column_unit): ...this and make private.
8324 (diagnostic_context::column_origin): Rename to...
8325 (diagnostic_context::m_column_origin): ...this and make private.
8326 (diagnostic_context::tabstop): Rename to...
8327 (diagnostic_context::m_tabstop): ...this and make private.
8328 (diagnostic_context::escape_format): Rename to...
8329 (diagnostic_context::m_escape_format): ...this and make private.
8330 (diagnostic_context::edit_context_ptr): Rename to...
8331 (diagnostic_context::m_edit_context_ptr): ...this and make
8333 (diagnostic_context::set_locations_cb): Rename to...
8334 (diagnostic_context::m_set_locations_cb): ...this and make
8336 (diagnostic_context::ice_handler_cb): Rename to...
8337 (diagnostic_context::m_ice_handler_cb): ...this and make private.
8338 (diagnostic_context::includes_seen): Rename to...
8339 (diagnostic_context::m_includes_seen): ...this and make private.
8340 (diagnostic_inhibit_notes): Update for field renaming.
8341 (diagnostic_context_auxiliary_data): Likewise.
8342 (diagnostic_abort_on_error): Convert from macro to inline function
8343 and update for field renaming.
8344 (diagnostic_kind_count): Convert from macro to inline function and
8345 use diagnostic_count accessor.
8346 (diagnostic_report_warnings_p): Update for field renaming.
8347 (diagnostic_initialize): Convert decl to inline function calling
8348 into diagnostic_context.
8349 (diagnostic_color_init): Likewise.
8350 (diagnostic_urls_init): Likewise.
8351 (diagnostic_urls_init): Likewise.
8352 (diagnostic_finish): Likewise.
8353 (diagnostic_report_current_module): Likewise.
8354 (diagnostic_show_any_path): Delete decl.
8355 (diagnostic_initialize_input_context): Convert decl to inline
8356 function calling into diagnostic_context.
8357 (diagnostic_classify_diagnostic): Likewise.
8358 (diagnostic_push_diagnostics): Likewise.
8359 (diagnostic_pop_diagnostics): Likewise.
8360 (diagnostic_report_diagnostic): Likewise.
8361 (diagnostic_action_after_output): Likewise.
8362 (diagnostic_check_max_errors): Likewise.
8363 (diagnostic_file_cache_fini): Delete decl.
8364 (diagnostic_converted_column): Delete decl.
8365 (warning_enabled_at): Convert decl to inline function calling into
8367 (option_unspecified_p): New.
8368 (diagnostic_emit_diagram): Delete decl.
8369 * gcc.cc: Remove include of "diagnostic-text-art.h".
8370 Update for changes to diagnostic_context.
8371 * input.cc (diagnostic_file_cache_init): Move implementation
8373 (diagnostic_context::file_cache_init): ...this new member
8375 (diagnostic_file_cache_fini): Delete.
8376 (diagnostics_file_cache_forcibly_evict_file): Update for
8377 m_file_cache becoming private.
8378 (location_get_source_line): Likewise.
8379 (get_source_file_content): Likewise.
8380 (location_missing_trailing_newline): Likewise.
8381 * input.h (diagnostics_file_cache_fini): Delete.
8382 * langhooks.cc: Update for changes to diagnostic_context.
8383 * lto-wrapper.cc: Likewise.
8384 * opts.cc: Remove include of "diagnostic-text-art.h".
8385 Update for changes to diagnostic_context.
8386 * selftest-diagnostic.cc: Update for changes to
8388 * toplev.cc: Likewise.
8389 * tree-diagnostic-path.cc: Likewise.
8390 * tree-diagnostic.cc: Likewise.
8392 2023-11-03 Martin Uecker <uecker@tugraz.at>
8395 * gimple-ssa-warn-access.cc
8396 (pass_waccess::maybe_check_access_sizes): For VLA bounds
8397 in parameters, only warn about null pointers with 'static'.
8399 2023-11-03 Andre Vieira <andre.simoesdiasvieira@arm.com>
8401 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Allow unmasked
8402 calls to use masked simdclones.
8404 2023-11-03 David Malcolm <dmalcolm@redhat.com>
8406 * diagnostic.cc (diagnostic_initialize): Update for consolidation
8407 of group-based fields.
8408 (diagnostic_report_diagnostic): Likewise.
8409 (diagnostic_context::begin_group): New, based on body of
8410 auto_diagnostic_group's ctor.
8411 (diagnostic_context::end_group): New, based on body of
8412 auto_diagnostic_group's dtor.
8413 (auto_diagnostic_group::auto_diagnostic_group): Convert to a call
8415 (auto_diagnostic_group::~auto_diagnostic_group): Convert to a call
8417 * diagnostic.h (diagnostic_context::begin_group): New decl.
8418 (diagnostic_context::end_group): New decl.
8419 (diagnostic_context::diagnostic_group_nesting_depth): Rename to...
8420 (diagnostic_context::m_diagnostic_groups.m_nesting_depth):
8422 (diagnostic_context::diagnostic_group_emission_count): Rename
8424 (diagnostic_context::m_diagnostic_groups::m_emission_count):
8427 2023-11-03 Andrew MacLeod <amacleod@redhat.com>
8429 PR tree-optimization/111766
8430 * range-op.cc (operator_equal::fold_range): Check constants
8431 against the bitmask.
8432 (operator_not_equal::fold_range): Ditto.
8433 * value-range.h (irange_bitmask::member_p): New.
8435 2023-11-03 Andrew MacLeod <amacleod@redhat.com>
8437 * value-range.cc (irange_bitmask::adjust_range): New.
8438 (irange::intersect_bitmask): Call adjust_range.
8439 * value-range.h (irange_bitmask::adjust_range): New prototype.
8441 2023-11-03 Uros Bizjak <ubizjak@gmail.com>
8443 * config/i386/i386.cc (ix86_memory_address_use_extended_reg_class_p):
8445 (ix86_memory_address_reg_class): ... this. Generalize address
8446 register class handling to allow multiple address register classes.
8447 Return maximal class for unrecognized instructions. Improve comments.
8448 (ix86_insn_base_reg_class): Rewrite to handle
8449 multiple address register classes.
8450 (ix86_regno_ok_for_insn_base_p): Ditto.
8451 (ix86_insn_index_reg_class): Ditto.
8452 * config/i386/i386.md: Rename "gpr32" attribute to "addr"
8453 and substitute its values with "0" -> "gpr16", "1" -> "*".
8454 (addr): New attribute to limit allowed address register set.
8456 * config/i386/mmx.md: Rename "gpr32" attribute to "addr"
8457 and substitute its values with "0" -> "gpr16", "1" -> "*".
8458 * config/i386/sse.md: Ditto.
8460 2023-11-03 Richard Biener <rguenther@suse.de>
8462 * tree-vect-loop.cc (vectorizable_live_operation): Simplify
8465 2023-11-03 Roger Sayle <roger@nextmovesoftware.com>
8467 * config/arc/arc.md (addsi3): Fix GNU-style code formatting.
8468 (adddi3): Change define_expand to generate a *adddi3.
8469 (*adddi3): New define_insn_and_split to lower DImode additions
8470 during the split1 pass (after combine and before reload).
8471 (ashldi3): New define_expand to (only) generate *ashldi3_cnt1
8472 for DImode left shifts by a single bit.
8473 (*ashldi3_cnt1): New define_insn_and_split to lower DImode
8474 left shifts by one bit to an *adddi3.
8476 2023-11-03 Richard Sandiford <richard.sandiford@arm.com>
8478 * config/aarch64/aarch64.md (*cmov_uxtw_insn_insv): Remove
8479 can_create_pseudo_p condition.
8481 2023-11-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8483 * tree-vect-slp.cc (vect_get_and_check_slp_defs): Support SLP for dummy mask -1.
8484 * tree-vect-stmts.cc (vectorizable_load): Ditto.
8486 2023-11-03 Richard Biener <rguenther@suse.de>
8488 PR tree-optimization/112366
8489 * tree-vect-loop.cc (vectorizable_live_operation): Remove
8492 2023-11-03 Richard Biener <rguenther@suse.de>
8494 PR tree-optimization/112310
8495 * tree-ssa-pre.cc (do_hoist_insertion): Keep the union
8496 of expressions, validate dependences are contained within
8497 the hoistable set before hoisting.
8499 2023-11-03 Pan Li <pan2.li@intel.com>
8501 * config/riscv/autovec.md (lrint<mode><v_i_l_ll_convert>2): Remove.
8502 (lround<mode><v_i_l_ll_convert>2): Ditto.
8503 (lceil<mode><v_i_l_ll_convert>2): Ditto.
8504 (lfloor<mode><v_i_l_ll_convert>2): Ditto.
8505 (lrint<mode><v_f2si_convert>2): New pattern for cvt from
8507 (lround<mode><v_f2si_convert>2): Ditto.
8508 (lceil<mode><v_f2si_convert>2): Ditto.
8509 (lfloor<mode><v_f2si_convert>2): Ditto.
8510 (lrint<mode><v_f2di_convert>2): New pattern for cvt from
8512 (lround<mode><v_f2di_convert>2): Ditto.
8513 (lceil<mode><v_f2di_convert>2): Ditto.
8514 (lfloor<mode><v_f2di_convert>2): Ditto.
8515 * config/riscv/vector-iterators.md: Renew iterators for both
8518 2023-11-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8521 * config/riscv/riscv-avlprop.cc (get_insn_vtype_mode): New function.
8522 (simplify_replace_vlmax_avl): Ditto.
8523 (pass_avlprop::execute): Add immediate AVL simplification.
8524 * config/riscv/riscv-protos.h (imm_avl_p): Rename.
8525 * config/riscv/riscv-v.cc (const_vlmax_p): Ditto.
8527 (emit_vlmax_insn): Adapt for new interface name.
8528 * config/riscv/vector.md (mode_idx): New attribute.
8530 2023-11-03 Pan Li <pan2.li@intel.com>
8533 2023-11-02 Pan Li <pan2.li@intel.com>
8535 * config/riscv/autovec.md (lrint<mode><v_i_l_ll_convert>2): Remove.
8536 (lround<mode><v_i_l_ll_convert>2): Ditto.
8537 (lceil<mode><v_i_l_ll_convert>2): Ditto.
8538 (lfloor<mode><v_i_l_ll_convert>2): Ditto.
8539 (lrint<mode><v_f2si_convert>2): New pattern for cvt from
8541 (lround<mode><v_f2si_convert>2): Ditto.
8542 (lceil<mode><v_f2si_convert>2): Ditto.
8543 (lfloor<mode><v_f2si_convert>2): Ditto.
8544 (lrint<mode><v_f2di_convert>2): New pattern for cvt from
8546 (lround<mode><v_f2di_convert>2): Ditto.
8547 (lceil<mode><v_f2di_convert>2): Ditto.
8548 (lfloor<mode><v_f2di_convert>2): Ditto.
8549 * config/riscv/vector-iterators.md: Renew iterators for both
8552 2023-11-02 Edwin Lu <ewlu@rivosinc.com>
8554 * config/riscv/riscv.cc (riscv_sched_variable_issue): add disabled assert
8556 2023-11-02 Jeff Law <jlaw@ventanamicro.com>
8558 * config/h8300/combiner.md: Add new patterns for single bit
8561 2023-11-02 Pan Li <pan2.li@intel.com>
8563 * config/riscv/autovec.md (lrint<mode><v_i_l_ll_convert>2): Remove.
8564 (lround<mode><v_i_l_ll_convert>2): Ditto.
8565 (lceil<mode><v_i_l_ll_convert>2): Ditto.
8566 (lfloor<mode><v_i_l_ll_convert>2): Ditto.
8567 (lrint<mode><v_f2si_convert>2): New pattern for cvt from
8569 (lround<mode><v_f2si_convert>2): Ditto.
8570 (lceil<mode><v_f2si_convert>2): Ditto.
8571 (lfloor<mode><v_f2si_convert>2): Ditto.
8572 (lrint<mode><v_f2di_convert>2): New pattern for cvt from
8574 (lround<mode><v_f2di_convert>2): Ditto.
8575 (lceil<mode><v_f2di_convert>2): Ditto.
8576 (lfloor<mode><v_f2di_convert>2): Ditto.
8577 * config/riscv/vector-iterators.md: Renew iterators for both
8580 2023-11-02 Sam James <sam@gentoo.org>
8582 * doc/passes.texi (Dead code elimination): Explicitly say 'lifetime'
8583 as this has become the standard term for what we're doing here.
8585 2023-11-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8587 * config/riscv/riscv-avlprop.cc
8588 (pass_avlprop::get_vlmax_ta_preferred_avl): Don't allow
8589 non-real insn AVL propation.
8591 2023-11-02 Robin Dapp <rdapp@ventanamicro.com>
8593 PR middle-end/111401
8594 * internal-fn.cc (internal_fn_else_index): New function.
8595 * internal-fn.h (internal_fn_else_index): Define.
8596 * tree-if-conv.cc (convert_scalar_cond_reduction): Emit COND_OP
8598 (predicate_scalar_phi): Add whitespace.
8599 * tree-vect-loop.cc (fold_left_reduction_fn): Add IFN_COND_OP.
8600 (neutral_op_for_reduction): Return -0 for PLUS.
8601 (check_reduction_path): Don't count else operand in COND_OP.
8602 (vect_is_simple_reduction): Ditto.
8603 (vect_create_epilog_for_reduction): Fix whitespace.
8604 (vectorize_fold_left_reduction): Add COND_OP handling.
8605 (vectorizable_reduction): Don't count else operand in COND_OP.
8606 (vect_transform_reduction): Add COND_OP handling.
8607 * tree-vectorizer.h (neutral_op_for_reduction): Add default
8610 2023-11-02 Richard Biener <rguenther@suse.de>
8612 PR tree-optimization/112320
8613 * gimple-fold.h (rewrite_to_defined_overflow): New overload
8614 for in-place operation.
8615 * gimple-fold.cc (rewrite_to_defined_overflow): Add stmt
8616 iterator argument to worker, define separate API for
8617 in-place and not in-place operation.
8618 * tree-if-conv.cc (predicate_statements): Simplify.
8619 * tree-scalar-evolution.cc (final_value_replacement_loop):
8621 * tree-ssa-ifcombine.cc (pass_tree_ifcombine::execute): Adjust.
8622 * tree-ssa-reassoc.cc (update_range_test): Likewise.
8624 2023-11-02 Uros Bizjak <ubizjak@gmail.com>
8626 * config/i386/i386.md: Move stack protector patterns
8627 above mov $0,%reg -> xor %reg,%reg peephole2 pattern.
8629 2023-11-02 liuhongt <hongtao.liu@intel.com>
8631 * config/i386/mmx.md (cmlav4hf4): New expander.
8632 (cmla_conjv4hf4): Ditto.
8634 (cmul_conjv4hf3): Ditto.
8636 2023-11-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8638 * config/riscv/vector.md: Fix redundant codes in attributes.
8640 2023-11-02 xuli <xuli1@eswincomputing.com>
8642 * config/riscv/riscv-vector-builtins-bases.cc: Expand non-tuple intrinsics.
8643 * config/riscv/riscv-vector-builtins-functions.def (vcreate): Define non-tuple intrinsics.
8644 * config/riscv/riscv-vector-builtins-shapes.cc (struct vcreate_def): Ditto.
8645 * config/riscv/riscv-vector-builtins.cc: Add arg types.
8647 2023-11-02 Pan Li <pan2.li@intel.com>
8649 * tree-vect-stmts.cc (vectorizable_internal_function): Add type
8650 size check for vectype_out doesn't participating for optab query.
8651 (vectorizable_call): Remove the type size check.
8653 2023-11-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8656 * config/riscv/vector.md: Add '0'.
8658 2023-11-01 Roger Sayle <roger@nextmovesoftware.com>
8661 * config/i386/i386.md (*bmi2_umul<mode><dwi>3_1): Tidy condition
8662 as operands[2] with predicate register_operand must be !MEM_P.
8663 (peephole2): Optimize a mulx followed by a register-to-register
8664 move, to place result in the correct destination if possible.
8666 2023-11-01 Patrick O'Neill <patrick@rivosinc.com>
8668 * config/riscv/sync.md: Use riscv_subword_address function to
8669 calculate the address and shift in atomic_test_and_set.
8671 2023-11-01 Vineet Gupta <vineetg@rivosinc.com>
8673 * config/riscv/riscv.cc (riscv_promote_function_mode): Fix mode
8674 returned for libcall case.
8676 2023-11-01 Martin Uecker <uecker@tugraz.at>
8679 * doc/invoke.texi: Document -Walloc-size option.
8681 2023-11-01 Edwin Lu <ewlu@rivosinc.com>
8683 * genautomata.cc (write_automata): move endif
8685 2023-11-01 Andre Vieira <andre.simoesdiasvieira@arm.com>
8687 * omp-simd-clone.cc (simd_clone_adjust_return_type): Hoist out code to
8688 create return array and don't return new type.
8689 (simd_clone_adjust_argument_types): Hoist out code that creates
8690 ipa_param_body_adjustments and don't return them.
8691 (simd_clone_adjust): Call TARGET_SIMD_CLONE_ADJUST after return and
8692 argument types have been vectorized, create adjustments and return array
8694 (expand_simd_clones): Call TARGET_SIMD_CLONE_ADJUST after return and
8695 argument types have been vectorized.
8697 2023-11-01 Uros Bizjak <ubizjak@gmail.com>
8700 * config/i386/i386.md (stack_protexct_set_2 peephole2):
8701 Use general_gr_operand as operand 4 predicate.
8703 2023-11-01 Uros Bizjak <ubizjak@gmail.com>
8705 * config/i386/i386.md (stack_protect_set): Explicitly
8706 generate scratch register in word mode.
8707 (@stack_protect_set_1_<mode>): Rename to ...
8708 (@stack_protect_set_1_<PTR:mode>_<SWI48:mode>): ... this.
8709 Use SWI48 mode iterator to match scratch register.
8710 (stack_protexct_set_1 peephole2): Use PTR, W and SWI48 mode
8711 iterators to match peephole sequence. Use general_operand
8712 predicate for operand 4. Allow different operand 2 and operand 3
8713 registers and use peep2_reg_dead_p to ensure new scratch
8714 register is dead before peephole seqeunce. Use peep2_reg_dead_p
8715 to ensure old scratch register is dead after peephole sequence.
8716 (*stack_protect_set_2_<mode>): Rename to ...
8717 (*stack_protect_set_2_<mode>_si): .. this.
8718 (*stack_protect_set_3): Rename to ...
8719 (*stack_protect_set_2_<mode>_di): ... this.
8720 Use PTR mode iterator to match stack protector memory move.
8721 Use earlyclobber for all alternatives of operand 1.
8722 (stack_protexct_set_2 peephole2): Use PTR, W and SWI48 mode
8723 iterators to match peephole sequence. Use general_operand
8724 predicate for operand 4. Allow different operand 2 and operand 3
8725 registers and use peep2_reg_dead_p to ensure new scratch
8726 register is dead before peephole seqeunce. Use peep2_reg_dead_p
8727 to ensure old scratch register is dead after peephole sequence.
8729 2023-11-01 xuli <xuli1@eswincomputing.com>
8731 * config/riscv/riscv-vector-builtins-functions.def (vundefined): Add vundefine
8732 intrinsics for tuple types.
8733 * config/riscv/riscv-vector-builtins.cc: Ditto.
8734 * config/riscv/vector.md (@vundefined<mode>): Ditto.
8736 2023-11-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8738 * tree-vect-slp.cc (vect_build_slp_tree_1): Fix whitespace.
8740 2023-10-31 David Malcolm <dmalcolm@redhat.com>
8742 * Makefile.in (ANALYZER_OBJS): Add analyzer/record-layout.o.
8744 2023-10-31 David Malcolm <dmalcolm@redhat.com>
8746 * input.cc (dump_location_info): Update for removal of
8747 MACRO_MAP_EXPANSION_POINT_LOCATION.
8748 * tree-diagnostic.cc (maybe_unwind_expanded_macro_loc):
8751 2023-10-31 David Malcolm <dmalcolm@redhat.com>
8753 * opts.cc (get_option_url): Update comment; the requirement to
8754 pass DOCUMENTATION_ROOT_URL's value via -D was removed in
8755 r10-8065-ge33a1eae25b8a8.
8757 2023-10-31 David Malcolm <dmalcolm@redhat.com>
8759 * pretty-print.cc (pretty_printer::pretty_printer): Initialize
8760 m_skipping_null_url.
8761 (pp_begin_url): Handle URL being null.
8762 (pp_end_url): Likewise.
8763 (selftest::test_null_urls): New.
8764 (selftest::pretty_print_cc_tests): Call it.
8765 * pretty-print.h (pretty_printer::m_skipping_null_url): New.
8767 2023-10-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8769 * tree-vect-slp.cc (vect_get_operand_map): Add MASK_LEN_GATHER_LOAD.
8770 (vect_build_slp_tree_1): Ditto.
8771 (vect_build_slp_tree_2): Ditto.
8773 2023-10-31 Cupertino Miranda <cupertino.miranda@oracle.com>
8775 * config/bpf/bpf-passes.def (pass_lower_bpf_core): Added pass.
8776 * config/bpf/bpf-protos.h: Added prototype for new pass.
8777 * config/bpf/bpf.cc (bpf_delegitimize_address): New function.
8778 * config/bpf/bpf.md (mov_reloc_core<MM:mode>): Prefixed
8780 * config/bpf/core-builtins.cc (cr_builtins) Added access_node to
8782 (is_attr_preserve_access): Improved check.
8783 (core_field_info): Make use of root_for_core_field_info
8785 (process_field_expr): Adapted to new functions.
8786 (pack_type): Small improvement.
8787 (bpf_handle_plugin_finish_type): Adapted to GTY(()).
8788 (bpf_init_core_builtins): Changed to new function names.
8789 (construct_builtin_core_reloc): Improved implementation.
8790 (bpf_resolve_overloaded_core_builtin): Changed how
8791 __builtin_preserve_access_index is converted.
8792 (compute_field_expr): Corrected implementation. Added
8793 access_node argument.
8794 (bpf_core_get_index): Added valid argument.
8795 (root_for_core_field_info, pack_field_expr)
8796 (core_expr_with_field_expr_plus_base, make_core_safe_access_index)
8797 (replace_core_access_index_comp_expr, maybe_get_base_for_field_expr)
8798 (core_access_clean, core_is_access_index, core_mark_as_access_index)
8799 (make_gimple_core_safe_access_index, execute_lower_bpf_core)
8800 (make_pass_lower_bpf_core): Added functions.
8801 (pass_data_lower_bpf_core): New pass struct.
8802 (pass_lower_bpf_core): New gimple_opt_pass class.
8803 (pack_field_expr_for_preserve_field)
8804 (bpf_replace_core_move_operands): Removed function.
8805 (bpf_enum_value_kind): Added GTY(()).
8806 * config/bpf/core-builtins.h (bpf_field_info_kind, bpf_type_id_kind)
8807 (bpf_type_info_kind, bpf_enum_value_kind): New enum.
8808 * config/bpf/t-bpf: Added pass bpf-passes.def to PASSES_EXTRA.
8810 2023-10-31 Neal Frager <neal.frager@amd.com>
8812 * config/microblaze/microblaze.cc: Fix mcpu version check.
8814 2023-10-31 Patrick O'Neill <patrick@rivosinc.com>
8816 * config/riscv/sync-rvwmo.md (atomic_load_rvwmo<mode>): Remove
8817 TARGET_ATOMIC constraint
8818 (atomic_store_rvwmo<mode>): Ditto.
8819 * config/riscv/sync-ztso.md (atomic_load_ztso<mode>): Ditto.
8820 (atomic_store_ztso<mode>): Ditto.
8821 * config/riscv/sync.md (atomic_load<mode>): Ditto.
8822 (atomic_store<mode>): Ditto.
8824 2023-10-31 Christoph Müllner <christoph.muellner@vrull.eu>
8826 * config/riscv/riscv.cc (riscv_index_reg_class):
8827 Return GR_REGS for XTheadFMemIdx.
8828 (riscv_regno_ok_for_index_p): Add support for XTheadFMemIdx.
8829 * config/riscv/riscv.h (HARDFP_REG_P): New macro.
8830 * config/riscv/thead.cc (is_fmemidx_mode): New function.
8831 (th_memidx_classify_address_index): Add support for XTheadFMemIdx.
8832 (th_fmemidx_output_index): New function.
8833 (th_output_move): Add support for XTheadFMemIdx.
8834 * config/riscv/thead.md (TH_M_ANYF): New mode iterator.
8835 (TH_M_NOEXTF): Likewise.
8836 (*th_fmemidx_movsf_hardfloat): New INSN.
8837 (*th_fmemidx_movdf_hardfloat_rv64): Likewise.
8838 (*th_fmemidx_I_a): Likewise.
8839 (*th_fmemidx_I_c): Likewise.
8840 (*th_fmemidx_US_a): Likewise.
8841 (*th_fmemidx_US_c): Likewise.
8842 (*th_fmemidx_UZ_a): Likewise.
8843 (*th_fmemidx_UZ_c): Likewise.
8845 2023-10-31 Christoph Müllner <christoph.muellner@vrull.eu>
8847 * config/riscv/constraints.md (th_m_mia): New constraint.
8848 (th_m_mib): Likewise.
8849 (th_m_mir): Likewise.
8850 (th_m_miu): Likewise.
8851 * config/riscv/riscv-protos.h (enum riscv_address_type):
8852 Add new address types ADDRESS_REG_REG, ADDRESS_REG_UREG,
8853 and ADDRESS_REG_WB and their documentation.
8854 (struct riscv_address_info): Add new field 'shift' and
8855 document the field usage for the new address types.
8856 (riscv_valid_base_register_p): New prototype.
8857 (th_memidx_legitimate_modify_p): Likewise.
8858 (th_memidx_legitimate_index_p): Likewise.
8859 (th_classify_address): Likewise.
8860 (th_output_move): Likewise.
8861 (th_print_operand_address): Likewise.
8862 * config/riscv/riscv.cc (riscv_index_reg_class):
8863 Return GR_REGS for XTheadMemIdx.
8864 (riscv_regno_ok_for_index_p): Add support for XTheadMemIdx.
8865 (riscv_classify_address): Call th_classify_address() on top.
8866 (riscv_output_move): Call th_output_move() on top.
8867 (riscv_print_operand_address): Call th_print_operand_address()
8869 * config/riscv/riscv.h (HAVE_POST_MODIFY_DISP): New macro.
8870 (HAVE_PRE_MODIFY_DISP): Likewise.
8871 * config/riscv/riscv.md (zero_extendqi<SUPERQI:mode>2): Disable
8873 (*zero_extendqi<SUPERQI:mode>2_internal): Convert to expand,
8874 create INSN with same name and disable it for XTheadMemIdx.
8875 (extendsidi2): Likewise.
8876 (*extendsidi2_internal): Disable for XTheadMemIdx.
8877 * config/riscv/thead.cc (valid_signed_immediate): New helper
8879 (th_memidx_classify_address_modify): New function.
8880 (th_memidx_legitimate_modify_p): Likewise.
8881 (th_memidx_output_modify): Likewise.
8882 (is_memidx_mode): Likewise.
8883 (th_memidx_classify_address_index): Likewise.
8884 (th_memidx_legitimate_index_p): Likewise.
8885 (th_memidx_output_index): Likewise.
8886 (th_classify_address): Likewise.
8887 (th_output_move): Likewise.
8888 (th_print_operand_address): Likewise.
8889 * config/riscv/thead.md (*th_memidx_operand): New splitter.
8890 (*th_memidx_zero_extendqi<SUPERQI:mode>2): New INSN.
8891 (*th_memidx_extendsidi2): Likewise.
8892 (*th_memidx_zero_extendsidi2): Likewise.
8893 (*th_memidx_zero_extendhi<GPR:mode>2): Likewise.
8894 (*th_memidx_extend<SHORT:mode><SUPERQI:mode>2): Likewise.
8895 (*th_memidx_bb_zero_extendsidi2): Likewise.
8896 (*th_memidx_bb_zero_extendhi<GPR:mode>2): Likewise.
8897 (*th_memidx_bb_extendhi<GPR:mode>2): Likewise.
8898 (*th_memidx_bb_extendqi<SUPERQI:mode>2): Likewise.
8899 (TH_M_ANYI): New mode iterator.
8900 (TH_M_NOEXTI): Likewise.
8901 (*th_memidx_I_a): New combiner optimization.
8902 (*th_memidx_I_b): Likewise.
8903 (*th_memidx_I_c): Likewise.
8904 (*th_memidx_US_a): Likewise.
8905 (*th_memidx_US_b): Likewise.
8906 (*th_memidx_US_c): Likewise.
8907 (*th_memidx_UZ_a): Likewise.
8908 (*th_memidx_UZ_b): Likewise.
8909 (*th_memidx_UZ_c): Likewise.
8911 2023-10-31 Carl Love <cel@us.ibm.com>
8913 * doc/extend.texi (__builtin_bcdsub_le, __builtin_bcdsub_ge): Add
8914 documentation for the builti-ins.
8916 2023-10-31 Vladimir N. Makarov <vmakarov@redhat.com>
8918 PR rtl-optimization/111971
8919 * lra-constraints.cc: (process_alt_operands): Don't check start
8920 hard regs for regs originated from register variables.
8922 2023-10-31 Robin Dapp <rdapp@ventanamicro.com>
8924 * config/riscv/autovec.md (<ieee_fmaxmin_op><mode>3): fmax/fmin
8926 (cond_<ieee_fmaxmin_op><mode>): Ditto.
8927 (cond_len_<ieee_fmaxmin_op><mode>): Ditto.
8928 (reduc_fmax_scal_<mode>): Ditto.
8929 (reduc_fmin_scal_<mode>): Ditto.
8930 * config/riscv/riscv-v.cc (needs_fp_rounding): Add fmin/fmax.
8931 * config/riscv/vector-iterators.md (fmin): New UNSPEC.
8932 (UNSPEC_VFMIN): Ditto.
8933 * config/riscv/vector.md (@pred_<ieee_fmaxmin_op><mode>): Add
8934 UNSPEC insn patterns.
8935 (@pred_<ieee_fmaxmin_op><mode>_scalar): Ditto.
8937 2023-10-31 Robin Dapp <rdapp@ventanamicro.com>
8941 * Makefile.in: Handle split insn-emit.cc.
8942 * configure: Regenerate.
8943 * configure.ac: Add --with-insnemit-partitions.
8944 * genemit.cc (output_peephole2_scratches): Print to file instead
8946 (print_code): Ditto.
8947 (gen_rtx_scratch): Ditto.
8949 (gen_emit_seq): Ditto.
8950 (emit_c_code): Ditto.
8952 (gen_expand): Ditto.
8954 (output_add_clobbers): Ditto.
8955 (output_added_clobbers_hard_reg_p): Ditto.
8956 (print_overload_arguments): Ditto.
8957 (print_overload_test): Ditto.
8958 (handle_overloaded_code_for): Ditto.
8959 (handle_overloaded_gen): Ditto.
8960 (print_header): New function.
8961 (handle_arg): New function.
8962 (main): Split output into 10 files.
8963 * gensupport.cc (count_patterns): New function.
8964 * gensupport.h (count_patterns): Define.
8965 * read-md.cc (md_reader::print_md_ptr_loc): Add file argument.
8966 * read-md.h (class md_reader): Change definition.
8968 2023-10-31 Alexandre Oliva <oliva@adacore.com>
8970 PR tree-optimization/111943
8971 * gimple-harden-control-flow.cc: Adjust copyright year.
8972 (rt_bb_visited): Add vfalse and vtrue data members.
8973 Zero-initialize them in the ctor.
8974 (rt_bb_visited::insert_exit_check_on_edge): Upon encountering
8975 abnormal edges, insert initializers for vfalse and vtrue on
8976 entry, and insert the check sequence guarded by a conditional
8979 2023-10-31 Richard Biener <rguenther@suse.de>
8981 PR tree-optimization/112305
8982 * tree-scalar-evolution.h (expression_expensive): Adjust.
8983 * tree-scalar-evolution.cc (expression_expensive): Record
8984 when we see a COND_EXPR.
8985 (final_value_replacement_loop): When the replacement contains
8986 a COND_EXPR, rewrite it to defined overflow.
8987 * tree-ssa-loop-ivopts.cc (may_eliminate_iv): Adjust.
8989 2023-10-31 Xi Ruoyao <xry111@xry111.site>
8992 * config/loongarch/loongarch-opts.h (HAVE_AS_TLS): Define to 0
8995 2023-10-31 Lehua Ding <lehua.ding@rivai.ai>
8997 * gimple-match.h (gimple_match_op::gimple_match_op):
8998 Add interfaces for more arguments.
8999 (gimple_match_op::set_op): Add interfaces for more arguments.
9000 * match.pd: Add support of combining cond_len_op + vec_cond
9002 2023-10-31 Haochen Jiang <haochen.jiang@intel.com>
9004 * config/i386/avx512cdintrin.h (target): Push evex512 for
9006 * config/i386/avx512vlintrin.h (target): Split avx512cdvl part
9008 * config/i386/i386-builtin.def (BDESC): Do not check evex512
9009 for builtins not needed.
9011 2023-10-31 Lehua Ding <lehua.ding@rivai.ai>
9013 * config/riscv/autovec.md (<float_cvt><mode><vnnconvert>2):
9014 Change to define_expand.
9016 2023-10-31 liuhongt <hongtao.liu@intel.com>
9019 * config/i386/mmx.md (*mmx_pblendvb_v8qi_1): Change
9020 define_split to define_insn_and_split to handle
9021 immediate_operand for comparison.
9022 (*mmx_pblendvb_v8qi_2): Ditto.
9023 (*mmx_pblendvb_<mode>_1): Ditto.
9024 (*mmx_pblendvb_v4qi_2): Ditto.
9025 (<code><mode>3): Remove define_split after it.
9026 (<code>v8qi3): Ditto.
9027 (<code><mode>3): Ditto.
9028 (<ode>v2hi3): Ditto.
9030 2023-10-31 Andrew Pinski <pinskia@gmail.com>
9032 * match.pd (`a == 1 ? b : a OP b`): New pattern.
9033 (`a == -1 ? b : a & b`): New pattern.
9035 2023-10-31 Andrew Pinski <pinskia@gmail.com>
9037 * match.pd: (`a == 0 ? b : b + a`,
9038 `a == 0 ? b : b - a`): New patterns.
9040 2023-10-31 Neal Frager <neal.frager@amd.com>
9042 * config/microblaze/microblaze.cc: Fix mcpu version check.
9044 2023-10-30 Mayshao <mayshao-oc@zhaoxin.com>
9046 * common/config/i386/cpuinfo.h (get_zhaoxin_cpu): Recognize yongfeng.
9047 * common/config/i386/i386-common.cc: Add yongfeng.
9048 * common/config/i386/i386-cpuinfo.h (enum processor_subtypes):
9049 Add ZHAOXIN_FAM7H_YONGFENG.
9050 * config.gcc: Add yongfeng.
9051 * config/i386/driver-i386.cc (host_detect_local_cpu):
9052 Let -march=native recognize yongfeng processors.
9053 * config/i386/i386-c.cc (ix86_target_macros_internal): Add yongfeng.
9054 * config/i386/i386-options.cc (m_YONGFENG): New definition.
9056 * config/i386/i386.h (enum processor_type): Add PROCESSOR_YONGFENG.
9057 * config/i386/i386.md: Add yongfeng.
9058 * config/i386/lujiazui.md: Fix typo.
9059 * config/i386/x86-tune-costs.h (struct processor_costs):
9061 * config/i386/x86-tune-sched.cc (ix86_issue_rate): Add yongfeng.
9062 (ix86_adjust_cost): Ditto.
9063 * config/i386/x86-tune.def (X86_TUNE_SCHEDULE): Replace
9064 m_LUJIAZUI with m_ZHAOXIN.
9065 (X86_TUNE_PARTIAL_REG_DEPENDENCY): Ditto.
9066 (X86_TUNE_SSE_PARTIAL_REG_DEPENDENCY): Ditto.
9067 (X86_TUNE_SSE_PARTIAL_REG_FP_CONVERTS_DEPENDENCY): Ditto.
9068 (X86_TUNE_SSE_PARTIAL_REG_CONVERTS_DEPENDENCY): Ditto.
9069 (X86_TUNE_MOVX): Ditto.
9070 (X86_TUNE_MEMORY_MISMATCH_STALL): Ditto.
9071 (X86_TUNE_FUSE_CMP_AND_BRANCH_32): Ditto.
9072 (X86_TUNE_FUSE_CMP_AND_BRANCH_64): Ditto.
9073 (X86_TUNE_FUSE_CMP_AND_BRANCH_SOFLAGS): Ditto.
9074 (X86_TUNE_FUSE_ALU_AND_BRANCH): Ditto.
9075 (X86_TUNE_ACCUMULATE_OUTGOING_ARGS): Ditto.
9076 (X86_TUNE_USE_LEAVE): Ditto.
9077 (X86_TUNE_PUSH_MEMORY): Ditto.
9078 (X86_TUNE_LCP_STALL): Ditto.
9079 (X86_TUNE_INTEGER_DFMODE_MOVES): Ditto.
9080 (X86_TUNE_OPT_AGU): Ditto.
9081 (X86_TUNE_PREFER_KNOWN_REP_MOVSB_STOSB): Ditto.
9082 (X86_TUNE_MISALIGNED_MOVE_STRING_PRO_EPILOGUES): Ditto.
9083 (X86_TUNE_USE_SAHF): Ditto.
9084 (X86_TUNE_USE_BT): Ditto.
9085 (X86_TUNE_AVOID_FALSE_DEP_FOR_BMI): Ditto.
9086 (X86_TUNE_ONE_IF_CONV_INSN): Ditto.
9087 (X86_TUNE_AVOID_MFENCE): Ditto.
9088 (X86_TUNE_EXPAND_ABS): Ditto.
9089 (X86_TUNE_USE_SIMODE_FIOP): Ditto.
9090 (X86_TUNE_USE_FFREEP): Ditto.
9091 (X86_TUNE_EXT_80387_CONSTANTS): Ditto.
9092 (X86_TUNE_SSE_UNALIGNED_LOAD_OPTIMAL): Ditto.
9093 (X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL): Ditto.
9094 (X86_TUNE_SSE_TYPELESS_STORES): Ditto.
9095 (X86_TUNE_SSE_LOAD0_BY_PXOR): Ditto.
9096 (X86_TUNE_USE_GATHER_2PARTS): Add m_YONGFENG.
9097 (X86_TUNE_USE_GATHER_4PARTS): Ditto.
9098 (X86_TUNE_USE_GATHER_8PARTS): Ditto.
9099 (X86_TUNE_AVOID_128FMA_CHAINS): Ditto.
9100 * doc/extend.texi: Add details about yongfeng.
9101 * doc/invoke.texi: Ditto.
9102 * config/i386/yongfeng.md: New file to describe yongfeng processor.
9104 2023-10-30 Martin Jambor <mjambor@suse.cz>
9107 * ipa-prop.h (struct ipa_argagg_value): Newf flag killed.
9108 * ipa-modref.cc (ipcp_argagg_and_kill_overlap_p): New function.
9109 (update_signature): Mark any any IPA-CP aggregate constants at
9110 positions known to be killed as killed. Move check that there is
9111 clone_info after this pruning.
9112 * ipa-cp.cc (ipa_argagg_value_list::dump): Dump the killed flag.
9113 (ipa_argagg_value_list::push_adjusted_values): Clear the new flag.
9114 (push_agg_values_from_plats): Likewise.
9115 (ipa_push_agg_values_from_jfunc): Likewise.
9116 (estimate_local_effects): Likewise.
9117 (push_agg_values_for_index_from_edge): Likewise.
9118 * ipa-prop.cc (write_ipcp_transformation_info): Stream the killed
9120 (read_ipcp_transformation_info): Likewise.
9121 (ipcp_get_aggregate_const): Update comment, assert that encountered
9122 record does not have killed flag set.
9123 (ipcp_transform_function): Prune all aggregate constants with killed
9126 2023-10-30 Martin Jambor <mjambor@suse.cz>
9129 * ipa-prop.h (ipcp_transformation): New member function template
9131 * ipa-sra.cc (zap_useless_ipcp_results): Use remove_argaggs_if to
9132 filter aggreagate constants.
9134 2023-10-30 Roger Sayle <roger@nextmovesoftware.com>
9136 PR middle-end/101955
9137 * config/arc/arc.md (*extvsi_1_0): New define_insn_and_split
9138 to convert sign extract of the least significant bit into an
9139 AND $1 then a NEG when !TARGET_BARREL_SHIFTER.
9141 2023-10-30 Roger Sayle <roger@nextmovesoftware.com>
9143 * config/arc/arc.cc (arc_rtx_costs): Improve cost estimates.
9144 Provide reasonable values for SHIFTS and ROTATES by constant
9145 bit counts depending upon TARGET_BARREL_SHIFTER.
9146 (arc_insn_cost): Use insn attributes if the instruction is
9147 recognized. Avoid calling get_attr_length for type "multi",
9148 i.e. define_insn_and_split patterns without explicit type.
9149 Fall-back to set_rtx_cost for single_set and pattern_cost
9151 * config/arc/arc.h (COSTS_N_BYTES): Define helper macro.
9152 (BRANCH_COST): Improve/correct definition.
9153 (LOGICAL_OP_NON_SHORT_CIRCUIT): Preserve previous behavior.
9155 2023-10-30 Roger Sayle <roger@nextmovesoftware.com>
9157 * config/arc/arc.cc (arc_split_ashl): Use lsl16 on TARGET_SWAP.
9158 (arc_split_ashr): Use swap and sign-extend on TARGET_SWAP.
9159 (arc_split_lshr): Use lsr16 on TARGET_SWAP.
9160 (arc_split_rotl): Use swap on TARGET_SWAP.
9161 (arc_split_rotr): Likewise.
9162 * config/arc/arc.md (ANY_ROTATE): New code iterator.
9163 (<ANY_ROTATE>si2_cnt16): New define_insn for alternate form of
9164 swap instruction on TARGET_SWAP.
9165 (ashlsi2_cnt16): Rename from *ashlsi16_cnt16 and move earlier.
9166 (lshrsi2_cnt16): New define_insn for LSR16 instruction.
9167 (*ashlsi2_cnt16): See above.
9169 2023-10-30 Richard Ball <richard.ball@arm.com>
9171 * config/arm/aout.h: Change to use the Lrtx label.
9172 * config/arm/arm.h (CASE_VECTOR_PC_RELATIVE): Remove arm targets
9173 from (!target_pure_code) condition.
9174 (ADDR_VEC_ALIGN): Add align for tables in rodata section.
9175 * config/arm/arm.cc (arm_output_casesi): Alter the function to include
9176 .Lrtx label and remove adr instructions.
9178 (arm_casesi_internal): Use force_reg to generate ldr instructions that
9179 would otherwise be out of range, and change rtl to accommodate force reg.
9180 Additionally remove unnecessary register temp.
9181 (casesi): Remove pure code check for Arm.
9182 * config/arm/elf.h (JUMP_TABLES_IN_TEXT_SECTION): Remove arm
9183 targets from JUMP_TABLES_IN_TEXT_SECTION definition.
9185 2023-10-30 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
9188 * config/rs6000/rs6000.cc (altivec_expand_vec_perm_const): Change bitwise
9189 xor to an equality and fix comment indentation.
9191 2023-10-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9193 * config/riscv/riscv-protos.h (sew64_scalar_helper): Fix bug.
9194 * config/riscv/riscv-v.cc (sew64_scalar_helper): Ditto.
9195 * config/riscv/vector.md: Ditto.
9197 2023-10-30 liuhongt <hongtao.liu@intel.com>
9200 * config/i386/i386-expand.cc (ix86_expand_branch): Handle
9201 512-bit vector with vpcmpeq + kortest.
9202 * config/i386/i386.md (cbranchxi4): New expander.
9203 * config/i386/sse.md: (cbranch<mode>4): Extend to V16SImode
9206 2023-10-30 Haochen Gui <guihaoc@gcc.gnu.org>
9209 * expr.cc (qi_vector_mode_supported_p): Rename to...
9210 (by_pieces_mode_supported_p): ...this, and extends it to do
9211 the checking for both scalar and vector mode.
9212 (widest_fixed_size_mode_for_size): Call
9213 by_pieces_mode_supported_p to examine the mode.
9214 (op_by_pieces_d::smallest_fixed_size_mode_for_size): Likewise.
9216 2023-10-29 Martin Uecker <uecker@tugraz.at>
9218 PR tree-optimization/109334
9219 * tree-object-size.cc (parm_object_size): Allow size
9220 computation for implicit access attributes.
9222 2023-10-29 Max Filippov <jcmvbkbc@gmail.com>
9224 * config/xtensa/xtensa.h (TARGET_SALT): Change HW version from
9225 260000 (which corresponds to RF-2014.0) to 270000 (which
9226 corresponds to RG-2015.0, the release where salt/saltu opcodes
9229 2023-10-29 Pan Li <pan2.li@intel.com>
9231 * config/riscv/riscv-avlprop.cc (pass_avlprop::execute): Use
9232 reference type to prevent copying.
9234 2023-10-27 Vladimir N. Makarov <vmakarov@redhat.com>
9236 PR rtl-optimization/112107
9237 * ira-costs.cc: (calculate_equiv_gains): Use NONDEBUG_INSN_P
9240 2023-10-27 Andrew Stubbs <ams@codesourcery.com>
9243 * config/gcn/gcn.cc (gcn_expand_epilogue): Fix kernel epilogue register
9246 2023-10-27 Andrew Stubbs <ams@codesourcery.com>
9248 * config/gcn/gcn-valu.md
9249 (vec_extract<V_1REG:mode><V_1REG_ALT:mode>_nop): Mention "operands" in
9250 condition to silence the warnings.
9251 (vec_extract<V_2REG:mode><V_2REG_ALT:mode>_nop): Likewise.
9252 * config/gcn/gcn.md (*movti_insn): Likewise.
9254 2023-10-27 Richard Sandiford <richard.sandiford@arm.com>
9256 * recog.cc (insn_propagation::apply_to_pattern_1): Handle shared
9259 2023-10-27 Yangyu Chen <chenyangyu@isrc.iscas.ac.cn>
9261 * config/riscv/riscv.cc (rocket_tune_info): Fix int_div cost.
9262 (sifive_7_tune_info, thead_c906_tune_info): Likewise.
9264 2023-10-27 Robin Dapp <rdapp@ventanamicro.com>
9266 * config/riscv/autovec.md (rawmemchr<ANYI:mode>): New expander.
9267 * config/riscv/riscv-protos.h (gen_no_side_effects_vsetvl_rtx):
9269 (expand_rawmemchr): Define.
9270 * config/riscv/riscv-v.cc (force_vector_length_operand): Remove
9272 (expand_block_move): Move from here...
9273 * config/riscv/riscv-string.cc (expand_block_move): ...to here.
9274 (expand_rawmemchr): Add vectorized expander.
9275 * internal-fn.cc (expand_RAWMEMCHR): Fix typo.
9277 2023-10-27 Vladimir N. Makarov <vmakarov@redhat.com>
9279 * ira-costs.cc: (get_equiv_regno, calculate_equiv_gains):
9280 Process reg equivalence invariants.
9282 2023-10-27 Uros Bizjak <ubizjak@gmail.com>
9284 * config/i386/x86-tune.def (X86_TUNE_PARTIAL_MEMORY_READ_STALL):
9285 i386: Fiy typo in "partial_memory_read_stall" tune option.
9287 2023-10-27 Victor Do Nascimento <victor.donascimento@arm.com>
9289 * config/aarch64/aarch64.cc (aarch64_print_operand): Add
9290 support for CONST_STRING.
9292 2023-10-27 Roger Sayle <roger@nextmovesoftware.com>
9295 * config/i386/i386.md (<u>mul<mode><dwi>3): Make operands 1 and
9296 2 take "regiser_operand" and "nonimmediate_operand" respectively.
9297 (<u>mulqihi3): Likewise.
9298 (*bmi2_umul<mode><dwi>3_1): Operand 2 needs to be register_operand
9299 matching the %d constraint. Use umul_highpart RTX to represent
9300 the highpart multiplication.
9301 (*umul<mode><dwi>3_1): Operand 2 should use regiser_operand
9302 predicate, and "a" rather than "0" as operands 0 and 2 have
9304 (define_split): For mul to mulx conversion, use the new
9305 umul_highpart RTX representation.
9306 (*mul<mode><dwi>3_1): Operand 1 should be register_operand
9307 and the constraint %a as operands 0 and 1 have different modes.
9308 (*<u>mulqihi3_1): Operand 1 should be register_operand matching
9310 (define_peephole2): Providing widening multiplication variants
9311 of the peephole2s that tweak highpart multiplication register
9314 2023-10-27 Lewis Hyatt <lhyatt@gmail.com>
9316 PR preprocessor/87299
9317 * toplev.cc (no_backend): New static global.
9318 (finalize): Remove argument no_backend, which is now a
9320 (process_options): Likewise.
9321 (do_compile): Likewise.
9322 (target_reinit): Don't do anything in preprocess-only mode.
9323 (toplev::main): Adapt to no_backend change.
9324 (toplev::finalize): Likewise.
9326 2023-10-27 Andrew Pinski <apinski@marvell.com>
9328 PR tree-optimization/101590
9329 PR tree-optimization/94884
9330 * match.pd (`(X BIT_OP Y) CMP X`): New pattern.
9332 2023-10-27 liuhongt <hongtao.liu@intel.com>
9335 * config/i386/i386-expand.cc (ix86_expand_sse_movcc): Handle
9336 V2HF/V2BF/V4HF/V4BFmode.
9337 * config/i386/i386.cc (ix86_get_mask_mode): Return QImode when
9338 data_mode is V4HF/V2HFmode.
9339 * config/i386/mmx.md (vec_cmpv4hfqi): New expander.
9340 (vcond_mask_<mode>v4hi): Ditto.
9341 (vcond_mask_<mode>qi): Ditto.
9342 (vec_cmpv2hfqi): Ditto.
9343 (vcond_mask_<mode>v2hi): Ditto.
9344 (mmx_plendvb_<mode>): Add 2 combine splitters after the
9346 (mmx_pblendvb_v8qi): Ditto.
9347 (<code>v2hi3): Add a combine splitter after the pattern.
9348 (<code><mode>3): Ditto.
9349 (<code>v8qi3): Ditto.
9350 (<code><mode>3): Ditto.
9351 * config/i386/sse.md (vcond<mode><mode>): Merge this with ..
9352 (vcond<sseintvecmodelower><mode>): .. this into ..
9353 (vcond<VI2HFBF_AVX512VL:mode><VHF_AVX512VL:mode>): .. this,
9354 and extend to V8BF/V16BF/V32BFmode.
9356 2023-10-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9358 * config/riscv/riscv-opts.h (TARGET_MAX_LMUL): New macro.
9359 * config/riscv/riscv-v.cc (preferred_simd_mode): Adapt macro.
9360 (autovectorize_vector_modes): Ditto.
9361 (can_find_related_mode_p): Ditto.
9363 2023-10-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9367 * config.gcc: Add AVL propagation pass.
9368 * config/riscv/riscv-passes.def (INSERT_PASS_AFTER): Ditto.
9369 * config/riscv/riscv-protos.h (make_pass_avlprop): Ditto.
9370 * config/riscv/t-riscv: Ditto.
9371 * config/riscv/riscv-avlprop.cc: New file.
9373 2023-10-26 David Malcolm <dmalcolm@redhat.com>
9375 * doc/extend.texi (Common Function Attributes): Add
9376 null_terminated_string_arg.
9378 2023-10-26 Andrew Pinski <pinskia@gmail.com>
9380 PR tree-optimization/111957
9381 * match.pd (`a != C1 ? abs(a) : C2`): New pattern.
9383 2023-10-26 Aldy Hernandez <aldyh@redhat.com>
9385 * range-op-float.cc (range_operator::fold_range): Delete unused
9388 2023-10-26 Aldy Hernandez <aldyh@redhat.com>
9390 * range-op-float.cc (range_operator::fold_range): Remove
9392 (range_operator::rv_fold): Remove unneeded arguments.
9393 (operator_plus::rv_fold): Same.
9394 (operator_minus::rv_fold): Same.
9395 (operator_mult::rv_fold): Same.
9396 (operator_div::rv_fold): Same.
9397 * range-op-mixed.h: Remove lb, ub, and maybe_nan arguments from
9401 2023-10-26 Aldy Hernandez <aldyh@redhat.com>
9403 * range-op-float.cc (range_operator::fold_range): Pass frange
9404 argument to rv_fold.
9405 (range_operator::rv_fold): Add frange argument.
9406 (operator_plus::rv_fold): Same.
9407 (operator_minus::rv_fold): Same.
9408 (operator_mult::rv_fold): Same.
9409 (operator_div::rv_fold): Same.
9410 * range-op-mixed.h: Add frange argument to rv_fold methods.
9413 2023-10-26 Richard Ball <richard.ball@arm.com>
9415 * config/arm/aout.h (ASM_OUTPUT_ADDR_DIFF_ELT): Add table output
9416 for different machine modes for arm.
9417 * config/arm/arm-protos.h (arm_output_casesi): New prototype.
9418 * config/arm/arm.h (CASE_VECTOR_PC_RELATIVE): Make arm use
9419 ASM_OUTPUT_ADDR_DIFF_ELT.
9420 (CASE_VECTOR_SHORTEN_MODE): Change table size calculation for
9422 (LABEL_ALIGN_AFTER_BARRIER): Change to accommodate .p2align 2
9424 * config/arm/arm.cc (arm_output_casesi): New function.
9425 * config/arm/arm.md (arm_casesi_internal): Change casesi expand
9427 for arm to use new function arm_output_casesi.
9429 2023-10-26 Iain Sandoe <iain@sandoe.co.uk>
9432 (darwin_label_is_anonymous_local_objc_name): Make metadata names
9433 linker-visibile for GNU objective C.
9435 2023-10-26 Vladimir N. Makarov <vmakarov@redhat.com>
9437 * dwarf2out.cc (reg_loc_descriptor): Use lra_eliminate_regs when
9439 * ira-costs.cc: Include regset.h.
9440 (equiv_can_be_consumed_p, get_equiv_regno, calculate_equiv_gains):
9442 (find_costs_and_classes): Call calculate_equiv_gains and redefine
9443 mem_cost of pseudos with equivs when LRA is used.
9444 * var-tracking.cc: Include ira.h and lra.h.
9445 (vt_initialize): Use lra_eliminate_regs when LRA is used.
9447 2023-10-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9449 * doc/md.texi: Adapt COND_LEN pseudo code.
9451 2023-10-26 Roger Sayle <roger@nextmovesoftware.com>
9452 Richard Biener <rguenther@suse.de>
9454 PR rtl-optimization/91865
9455 * combine.cc (make_compound_operation): Avoid creating a
9456 ZERO_EXTEND of a ZERO_EXTEND.
9458 2023-10-26 Jiahao Xu <xujiahao@loongson.cn>
9460 * config/loongarch/lasx.md (vcond_mask_<ILASX:mode><ILASX:mode>): Change to
9461 (vcond_mask_<mode><mode256_i>): this.
9462 * config/loongarch/lsx.md (vcond_mask_<ILSX:mode><ILSX:mode>): Change to
9463 (vcond_mask_<mode><mode_i>): this.
9465 2023-10-26 Thomas Schwinge <thomas@codesourcery.com>
9467 * ipa-icf.cc (sem_item::target_supports_symbol_aliases_p):
9468 'gcc_checking_assert (TARGET_SUPPORTS_ALIASES);' before
9470 * ipa-visibility.cc (function_and_variable_visibility): Change
9471 '#ifdef ASM_OUTPUT_DEF' to 'if (TARGET_SUPPORTS_ALIASES)'.
9472 * varasm.cc (output_constant_pool_contents)
9473 [#ifdef ASM_OUTPUT_DEF]:
9474 'gcc_checking_assert (TARGET_SUPPORTS_ALIASES);'.
9475 (do_assemble_alias) [#ifdef ASM_OUTPUT_DEF]:
9476 'if (!TARGET_SUPPORTS_ALIASES)',
9477 'gcc_checking_assert (seen_error ());'.
9478 (assemble_alias): Change '#if !defined (ASM_OUTPUT_DEF)' to
9479 'if (!TARGET_SUPPORTS_ALIASES)'.
9480 (default_asm_output_anchor):
9481 'gcc_checking_assert (TARGET_SUPPORTS_ALIASES);'.
9483 2023-10-26 Alexandre Oliva <oliva@adacore.com>
9485 PR tree-optimization/111520
9486 * gimple-harden-conditionals.cc
9487 (pass_harden_compares::execute): Set EH edge probability and
9488 EH block execution count.
9490 2023-10-26 Alexandre Oliva <oliva@adacore.com>
9492 * tree-eh.h (make_eh_edges): Rename to...
9493 (make_eh_edge): ... this.
9494 * tree-eh.cc: Likewise. Adjust all callers...
9495 * gimple-harden-conditionals.cc: ... here, ...
9496 * gimple-harden-control-flow.cc: ... here, ...
9497 * tree-cfg.cc: ... here, ...
9498 * tree-inline.cc: ... and here.
9500 2023-10-25 Iain Sandoe <iain@sandoe.co.uk>
9502 * config/darwin.cc (darwin_override_options): Handle fPIE.
9504 2023-10-25 Iain Sandoe <iain@sandoe.co.uk>
9506 * config.gcc: Use -E to to sed to indicate that we are using
9509 2023-10-25 Jason Merrill <jason@redhat.com>
9511 * tree-core.h (struct tree_base): Update address_space comment.
9513 2023-10-25 Wilco Dijkstra <wilco.dijkstra@arm.com>
9515 * config/aarch64/aarch64.cc (aarch64_internal_mov_immediate)
9516 Add support for immediates using MOV/EOR bitmask.
9518 2023-10-25 Uros Bizjak <ubizjak@gmail.com>
9521 * config/i386/x86-tune.def (X86_TUNE_PARTIAL_MEMORY_READ_STALL):
9523 * config/i386/i386.h (TARGET_PARTIAL_MEMORY_READ_STALL): New macro.
9524 * config/i386/i386.md: New peephole pattern to narrow test
9525 instructions with immediate operands that test memory locations
9528 2023-10-25 Andrew MacLeod <amacleod@redhat.com>
9530 * value-range.cc (irange::union_append): New.
9531 (irange::union_): Call union_append when appropriate.
9532 * value-range.h (irange::union_append): New prototype.
9534 2023-10-25 Chenghui Pan <panchenghui@loongson.cn>
9536 * config/loongarch/lasxintrin.h (__lasx_xvftintrnel_l_s): Fix comments.
9537 (__lasx_xvfrintrne_s): Ditto.
9538 (__lasx_xvfrintrne_d): Ditto.
9539 (__lasx_xvfrintrz_s): Ditto.
9540 (__lasx_xvfrintrz_d): Ditto.
9541 (__lasx_xvfrintrp_s): Ditto.
9542 (__lasx_xvfrintrp_d): Ditto.
9543 (__lasx_xvfrintrm_s): Ditto.
9544 (__lasx_xvfrintrm_d): Ditto.
9545 * config/loongarch/lsxintrin.h (__lsx_vftintrneh_l_s): Ditto.
9546 (__lsx_vfrintrne_s): Ditto.
9547 (__lsx_vfrintrne_d): Ditto.
9548 (__lsx_vfrintrz_s): Ditto.
9549 (__lsx_vfrintrz_d): Ditto.
9550 (__lsx_vfrintrp_s): Ditto.
9551 (__lsx_vfrintrp_d): Ditto.
9552 (__lsx_vfrintrm_s): Ditto.
9553 (__lsx_vfrintrm_d): Ditto.
9555 2023-10-25 chenxiaolong <chenxiaolong@loongson.cn>
9557 * config/loongarch/loongarch.md (get_thread_pointer<mode>):Adds the
9558 instruction template corresponding to the __builtin_thread_pointer
9560 * doc/extend.texi:Add the __builtin_thread_pointer function support
9561 description to the documentation.
9563 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
9565 * Makefile.in (OBJS): Add rtl-ssa/movement.o.
9566 * rtl-ssa/access-utils.h (accesses_include_nonfixed_hard_registers)
9567 (single_set_info): New functions.
9568 (remove_uses_of_def, accesses_reference_same_resource): Declare.
9569 (insn_clobbers_resources): Likewise.
9570 * rtl-ssa/accesses.cc (rtl_ssa::remove_uses_of_def): New function.
9571 (rtl_ssa::accesses_reference_same_resource): Likewise.
9572 (rtl_ssa::insn_clobbers_resources): Likewise.
9573 * rtl-ssa/movement.h (can_move_insn_p): Declare.
9574 * rtl-ssa/movement.cc: New file.
9576 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
9578 * rtl-ssa/functions.h (function_info::remains_available_at_insn):
9579 New member function.
9580 * rtl-ssa/accesses.cc (function_info::remains_available_at_insn):
9582 (function_info::make_use_available): Avoid false negatives for
9583 queries within an EBB.
9585 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
9587 * rtl-ssa/changes.cc: Include sreal.h.
9588 (rtl_ssa::changes_are_worthwhile): When optimizing for speed,
9589 scale the cost of each instruction by its execution frequency.
9591 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
9593 * rtl-ssa/access-utils.h (next_call_clobbers): New function.
9594 (is_single_dominating_def, remains_available_on_exit): Replace with...
9595 * rtl-ssa/functions.h (function_info::is_single_dominating_def)
9596 (function_info::remains_available_on_exit): ...these new member
9598 (function_info::m_clobbered_by_calls): New member variable.
9599 * rtl-ssa/functions.cc (function_info::function_info): Explicitly
9600 initialize m_clobbered_by_calls.
9601 * rtl-ssa/insns.cc (function_info::record_call_clobbers): Update
9602 m_clobbered_by_calls for each call-clobber note.
9603 * rtl-ssa/member-fns.inl (function_info::is_single_dominating_def):
9604 New function. Check for call clobbers.
9605 * rtl-ssa/accesses.cc (function_info::remains_available_on_exit):
9608 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
9610 * rtl-ssa/internals.h (build_info::exit_block_dominator): New
9612 * rtl-ssa/blocks.cc (build_info::build_info): Initialize it.
9613 (bb_walker::bb_walker): Use it, moving the computation of the
9615 (function_info::process_all_blocks): ...here.
9616 (function_info::place_phis): Add dominance frontiers for the
9619 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
9621 * rtl-ssa/functions.h (function_info::process_uses_of_deleted_def):
9622 New member function.
9623 * rtl-ssa/changes.cc (function_info::process_uses_of_deleted_def):
9625 (function_info::change_insns): Use it.
9627 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
9629 * rtl-ssa/changes.cc (function_info::finalize_new_accesses):
9630 If a change describes a set of memory, ensure that that set
9631 is kept, regardless of the insn pattern.
9633 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
9635 * rtl-ssa/changes.cc (function_info::apply_changes_to_insn): Remove
9636 call to add_reg_unused_notes and instead...
9637 (function_info::change_insns): ...use a separate loop here.
9639 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
9641 * rtl-ssa/blocks.cc (function_info::add_artificial_accesses): Force
9642 global registers to be live on exit. Handle any block with zero
9643 successors like an exit block.
9645 2023-10-25 Thomas Schwinge <thomas@codesourcery.com>
9647 * omp-oacc-kernels-decompose.cc (omp_oacc_kernels_decompose_1):
9648 Handle 'OMP_CLAUSE_SELF' like 'OMP_CLAUSE_IF'.
9649 * omp-expand.cc (expand_omp_target): Handle 'OMP_CLAUSE_SELF' for
9650 'GF_OMP_TARGET_KIND_OACC_DATA_KERNELS'.
9652 2023-10-25 Thomas Schwinge <thomas@codesourcery.com>
9654 * tree-core.h (omp_clause_code): Move 'OMP_CLAUSE_SELF' after
9656 * tree-pretty-print.cc (dump_omp_clause): Adjust.
9657 * tree.cc (omp_clause_num_ops, omp_clause_code_name): Likewise.
9660 2023-10-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9662 * config/riscv/riscv-protos.h (has_vl_op): Export from riscv-vsetvl to riscv-v
9663 (tail_agnostic_p): Ditto.
9664 (validate_change_or_fail): Ditto.
9665 (nonvlmax_avl_type_p): Ditto.
9666 (vlmax_avl_p): Ditto.
9668 (enum vlmul_type): Ditto.
9669 (count_regno_occurrences): Ditto.
9670 * config/riscv/riscv-v.cc (has_vl_op): Ditto.
9671 (get_default_ta): Ditto.
9672 (tail_agnostic_p): Ditto.
9673 (validate_change_or_fail): Ditto.
9674 (nonvlmax_avl_type_p): Ditto.
9675 (vlmax_avl_p): Ditto.
9677 (enum vlmul_type): Ditto.
9679 (count_regno_occurrences): Ditto.
9680 * config/riscv/riscv-vsetvl.cc (vlmax_avl_p): Ditto.
9684 (get_default_ta): Ditto.
9685 (tail_agnostic_p): Ditto.
9686 (count_regno_occurrences): Ditto.
9687 (validate_change_or_fail): Ditto.
9689 2023-10-25 Chung-Lin Tang <cltang@codesourcery.com>
9691 * gimplify.cc (gimplify_scan_omp_clauses): Add OMP_CLAUSE_SELF case.
9692 (gimplify_adjust_omp_clauses): Likewise.
9693 * omp-expand.cc (expand_omp_target): Add OMP_CLAUSE_SELF expansion code,
9694 * omp-low.cc (scan_sharing_clauses): Add OMP_CLAUSE_SELF case.
9695 * tree-core.h (enum omp_clause_code): Add OMP_CLAUSE_SELF enum.
9696 * tree-nested.cc (convert_nonlocal_omp_clauses): Add OMP_CLAUSE_SELF
9698 (convert_local_omp_clauses): Likewise.
9699 * tree-pretty-print.cc (dump_omp_clause): Add OMP_CLAUSE_SELF case.
9700 * tree.cc (omp_clause_num_ops): Add OMP_CLAUSE_SELF entry.
9701 (omp_clause_code_name): Likewise.
9702 * tree.h (OMP_CLAUSE_SELF_EXPR): New macro.
9704 2023-10-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9706 * config/riscv/riscv-protos.h (vlmax_avl_type_p): New function.
9707 * config/riscv/riscv-v.cc (vlmax_avl_type_p): Ditto.
9708 * config/riscv/riscv-vsetvl.cc (get_avl): Adapt function.
9709 * config/riscv/vector.md: Change avl_type into avl_type_idx.
9711 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
9713 * recog.cc (constrain_operands): Remove UNARY_P handling.
9714 * reload.cc (find_reloads): Likewise.
9716 2023-10-24 Jose E. Marchesi <jose.marchesi@oracle.com>
9718 * gcov-io.h: Fix record length encoding in comment.
9720 2023-10-24 Roger Sayle <roger@nextmovesoftware.com>
9722 * config/i386/i386-features.cc (compute_convert_gain): Provide
9723 more accurate values (sizes) for inter-unit moves with -Os.
9725 2023-10-24 Roger Sayle <roger@nextmovesoftware.com>
9726 Claudiu Zissulescu <claziss@gmail.com>
9728 * config/arc/arc-protos.h (output_shift): Rename to...
9729 (output_shift_loop): Tweak API to take an explicit rtx_code.
9730 (arc_split_ashl): Prototype new function here.
9731 (arc_split_ashr): Likewise.
9732 (arc_split_lshr): Likewise.
9733 (arc_split_rotl): Likewise.
9734 (arc_split_rotr): Likewise.
9735 * config/arc/arc.cc (output_shift): Delete local prototype. Rename.
9736 (output_shift_loop): New function replacing output_shift to output
9737 a zero overheap loop for SImode shifts and rotates on ARC targets
9738 without barrel shifter (i.e. no hardware support for these insns).
9739 (arc_split_ashl): New helper function to split *ashlsi3_nobs.
9740 (arc_split_ashr): New helper function to split *ashrsi3_nobs.
9741 (arc_split_lshr): New helper function to split *lshrsi3_nobs.
9742 (arc_split_rotl): New helper function to split *rotlsi3_nobs.
9743 (arc_split_rotr): New helper function to split *rotrsi3_nobs.
9744 (arc_print_operand): Correct whitespace.
9745 (arc_rtx_costs): Likewise.
9746 (hwloop_optimize): Likewise.
9747 * config/arc/arc.md (ANY_SHIFT_ROTATE): New define_code_iterator.
9748 (define_code_attr insn): New code attribute to map to pattern name.
9749 (<ANY_SHIFT_ROTATE>si3): New expander unifying previous ashlsi3,
9750 ashrsi3 and lshrsi3 define_expands. Adds rotlsi3 and rotrsi3.
9751 (*<ANY_SHIFT_ROTATE>si3_nobs): New define_insn_and_split that
9752 unifies the previous *ashlsi3_nobs, *ashrsi3_nobs and *lshrsi3_nobs.
9753 We now call arc_split_<insn> in arc.cc to implement each split.
9754 (shift_si3): Delete define_insn, all shifts/rotates are now split.
9755 (shift_si3_loop): Rename to...
9756 (<insn>si3_loop): define_insn to handle loop implementations of
9757 SImode shifts and rotates, calling ouput_shift_loop for template.
9758 (rotrsi3): Rename to...
9759 (*rotrsi3_insn): define_insn for TARGET_BARREL_SHIFTER's ror.
9760 (*rotlsi3): New define_insn_and_split to transform left rotates
9761 into right rotates before reload.
9762 (rotlsi3_cnt1): New define_insn_and_split to implement a left
9763 rotate by one bit using an add.f followed by an adc.
9764 * config/arc/predicates.md (shiftr4_operator): Delete.
9766 2023-10-24 Claudiu Zissulescu <claziss@gmail.com>
9768 * config/arc/arc.md (mulsi3_700): Update pattern.
9769 (mulsi3_v2): Likewise.
9770 * config/arc/predicates.md (mpy_dest_reg_operand): Remove it.
9772 2023-10-24 Andrew Pinski <pinskia@gmail.com>
9774 PR tree-optimization/104376
9775 PR tree-optimization/101541
9776 * tree-ssa-phiopt.cc (factor_out_conditional_operation):
9777 Allow nop conversions even if it is defined by a statement
9778 inside the conditional.
9780 2023-10-24 Andrew Pinski <pinskia@gmail.com>
9782 PR tree-optimization/111913
9783 * match.pd (`popcount(X&Y) + popcount(X|Y)`): Add the resulting
9786 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
9788 * rtl-ssa/blocks.cc (function_info::create_degenerate_phi): Check
9789 whether the requested phi already exists.
9791 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
9793 * rtl-ssa.h: Include cfgbuild.h.
9794 * rtl-ssa/movement.h (can_insert_after): Replace is_jump with the
9795 more comprehensive control_flow_insn_p.
9797 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
9799 * rtl-ssa/changes.cc (function_info::perform_pending_updates): Check
9800 whether an insn has been replaced by a note.
9802 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
9804 * rtl-ssa/member-fns.inl (first_any_insn_use): Handle null
9807 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
9809 * config/i386/i386-expand.cc (ix86_split_mmx_punpck): Allow the
9810 destination to be wider than the sources. Take the mode from the
9812 (ix86_expand_sse_extend): Pass the destination directly to
9813 ix86_split_mmx_punpck, rather than using a fresh register that
9816 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
9818 * config/i386/predicates.md (aeswidekl_operation): Protect
9819 REGNO check with REG_P.
9821 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
9823 * config/aarch64/aarch64.cc (aarch64_insn_cost): New function.
9824 (TARGET_INSN_COST): Define.
9826 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
9828 * config/aarch64/atomics.md (aarch64_atomic_exchange<mode>): Require
9831 2023-10-24 xuli <xuli1@eswincomputing.com>
9834 * config/riscv/riscv-vector-builtins-bases.cc: fix bug.
9836 2023-10-24 Mark Harmstone <mark@harmstone.com>
9838 * opts.cc (debug_type_names): Remove stabs and xcoff.
9839 (df_set_names): Adjust.
9841 2023-10-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9844 * config/riscv/riscv-vsetvl.cc (pre_vsetvl::compute_lcm_local_properties): Add REGNO check.
9846 2023-10-23 Lewis Hyatt <lhyatt@gmail.com>
9848 PR preprocessor/36887
9849 * toplev.h (ident_hash_extra): Declare...
9850 * stringpool.cc (ident_hash_extra): ...this new global variable.
9851 (init_stringpool): Handle ident_hash_extra as well as ident_hash.
9852 (ggc_mark_stringpool): Likewise.
9853 (ggc_purge_stringpool): Likewise.
9854 (struct string_pool_data_extra): New struct.
9855 (spd2): New GC root variable.
9856 (gt_pch_save_stringpool): Use spd2 to handle ident_hash_extra,
9857 analogous to how spd is used to handle ident_hash.
9858 (gt_pch_restore_stringpool): Likewise.
9860 2023-10-23 Robin Dapp <rdapp@ventanamicro.com>
9862 PR tree-optimization/111794
9863 * tree-vect-stmts.cc (vectorizable_assignment): Add
9864 same-precision exception for dest and source.
9866 2023-10-23 Robin Dapp <rdapp@ventanamicro.com>
9868 * config/riscv/autovec.md (popcount<mode>2): New expander.
9869 * config/riscv/riscv-protos.h (expand_popcount): Define.
9870 * config/riscv/riscv-v.cc (expand_popcount): Vectorize popcount
9871 with the WWG algorithm.
9873 2023-10-23 Richard Biener <rguenther@suse.de>
9875 PR tree-optimization/111916
9876 * tree-sra.cc (sra_modify_assign): Do not lower all
9877 BIT_FIELD_REF reads that are sra_handled_bf_read_p.
9879 2023-10-23 Richard Biener <rguenther@suse.de>
9881 PR tree-optimization/111915
9882 * tree-vect-slp.cc (vect_build_slp_tree_1): Check all
9883 accesses are either grouped or not.
9885 2023-10-23 Richard Biener <rguenther@suse.de>
9888 * tree-inline.cc (setup_one_parameter): Move code emitting
9889 a dummy load when not optimizing ...
9890 (initialize_inlined_parameters): ... here to after when
9891 we remapped the parameter type.
9893 2023-10-23 Oleg Endo <olegendo@gcc.gnu.org>
9896 * config/sh/sh_treg_combine.cc (sh_treg_combine::record_set_of_reg):
9897 Skip over nop move insns.
9899 2023-10-23 Tamar Christina <tamar.christina@arm.com>
9901 PR tree-optimization/111860
9902 * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg):
9903 Drop .MEM nodes only.
9905 2023-10-23 Andrew Pinski <apinski@marvell.com>
9907 * match.pd (`(A - B) CMP 0 ? (A - B) : (B - A)`):
9910 2023-10-23 Andrew Pinski <pinskia@gmail.com>
9912 * convert.cc (convert_to_pointer_1): Return error_mark_node
9914 (convert_to_real_1): Likewise.
9915 (convert_to_integer_1): Likewise.
9916 (convert_to_complex_1): Likewise.
9918 2023-10-23 Andrew Pinski <pinskia@gmail.com>
9921 * convert.cc (convert_to_complex_1): Return
9922 error_mark_node if either convert was an error
9923 when converting from a scalar.
9925 2023-10-23 Richard Biener <rguenther@suse.de>
9927 PR tree-optimization/111917
9928 * tree-ssa-loop-unswitch.cc (hoist_guard): Always insert
9929 new conditional after last stmt.
9931 2023-10-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9934 * config/riscv/riscv-vsetvl.cc: Fix bug.
9936 2023-10-23 Pan Li <pan2.li@intel.com>
9938 * config/riscv/riscv-v.cc (emit_vec_cvt_x_f_rtz): Add insn type
9940 (expand_vec_trunc): Take MA instead of MU for cvt_x_f_rtz.
9942 2023-10-23 Xi Ruoyao <xry111@xry111.site>
9944 * doc/invoke.texi (-mexplicit-relocs=style): Document.
9945 (-mexplicit-relocs): Document as an alias of
9946 -mexplicit-relocs=always.
9947 (-mno-explicit-relocs): Document as an alias of
9948 -mexplicit-relocs=none.
9949 (-mcmodel=extreme): Mention -mexplicit-relocs=always instead of
9952 2023-10-23 Xi Ruoyao <xry111@xry111.site>
9954 * config/loongarch/predicates.md (symbolic_pcrel_operand): New
9956 * config/loongarch/loongarch.md (define_peephole2): Optimize
9957 la.local + ld/st to pcalau12i + ld/st if the address is only used
9958 once if -mexplicit-relocs=auto and -mcmodel=normal or medium.
9960 2023-10-23 Xi Ruoyao <xry111@xry111.site>
9962 * config/loongarch/loongarch.cc (loongarch_explicit_relocs_p):
9963 Return true for TLS symbol types if -mexplicit-relocs=auto.
9964 (loongarch_call_tls_get_addr): Replace TARGET_EXPLICIT_RELOCS
9965 with la_opt_explicit_relocs != EXPLICIT_RELOCS_NONE.
9966 (loongarch_legitimize_tls_address): Likewise.
9967 * config/loongarch/loongarch.md (@tls_low<mode>): Remove
9968 TARGET_EXPLICIT_RELOCS from insn condition.
9970 2023-10-23 Xi Ruoyao <xry111@xry111.site>
9972 * config/loongarch/loongarch-protos.h
9973 (loongarch_explicit_relocs_p): Declare new function.
9974 * config/loongarch/loongarch.cc (loongarch_explicit_relocs_p):
9976 (loongarch_symbol_insns): Call loongarch_explicit_relocs_p for
9977 SYMBOL_GOT_DISP, instead of using TARGET_EXPLICIT_RELOCS.
9978 (loongarch_split_symbol): Call loongarch_explicit_relocs_p for
9979 deciding if return early, instead of using
9980 TARGET_EXPLICIT_RELOCS.
9981 (loongarch_output_move): CAll loongarch_explicit_relocs_p
9982 instead of using TARGET_EXPLICIT_RELOCS.
9983 * config/loongarch/loongarch.md (*low<mode>): Remove
9984 TARGET_EXPLICIT_RELOCS from insn condition.
9985 (@ld_from_got<mode>): Likewise.
9986 * config/loongarch/predicates.md (move_operand): Call
9987 loongarch_explicit_relocs_p instead of using
9988 TARGET_EXPLICIT_RELOCS.
9990 2023-10-23 Xi Ruoyao <xry111@xry111.site>
9992 * config/loongarch/genopts/loongarch-strings: Add strings for
9993 -mexplicit-relocs={auto,none,always}.
9994 * config/loongarch/genopts/loongarch.opt.in: Add options for
9995 -mexplicit-relocs={auto,none,always}.
9996 * config/loongarch/loongarch-str.h: Regenerate.
9997 * config/loongarch/loongarch.opt: Regenerate.
9998 * config/loongarch/loongarch-def.h
9999 (EXPLICIT_RELOCS_AUTO): Define.
10000 (EXPLICIT_RELOCS_NONE): Define.
10001 (EXPLICIT_RELOCS_ALWAYS): Define.
10002 (N_EXPLICIT_RELOCS_TYPES): Define.
10003 * config/loongarch/loongarch.cc
10004 (loongarch_option_override_internal): Error out if the old-style
10005 -m[no-]explicit-relocs option is used with
10006 -mexplicit-relocs={auto,none,always} together. Map
10007 -mno-explicit-relocs to -mexplicit-relocs=none and
10008 -mexplicit-relocs to -mexplicit-relocs=always for backward
10009 compatibility. Set a proper default for -mexplicit-relocs=
10010 based on configure-time probed linker capability. Update a
10011 diagnostic message to mention -mexplicit-relocs=always instead
10012 of the old-style -mexplicit-relocs.
10013 (loongarch_handle_model_attribute): Update a diagnostic message
10014 to mention -mexplicit-relocs=always instead of the old-style
10016 * config/loongarch/loongarch.h (TARGET_EXPLICIT_RELOCS): Define.
10018 2023-10-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10020 * config/riscv/riscv-vsetvl.cc (pre_vsetvl::fuse_local_vsetvl_info): Fix typo.
10021 (pre_vsetvl::pre_global_vsetvl_info): Ditto.
10023 2023-10-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10025 * config/riscv/vector.md: Fix avl_type attribute of tuple mov<mode>.
10027 2023-10-23 Kewen Lin <linkw@linux.ibm.com>
10029 PR tree-optimization/111784
10030 * tree-vect-stmts.cc (vectorizable_store): Adjust costing way for
10031 adjacent vector stores, by costing them with the total number
10032 rather than costing them one by one.
10033 (vectorizable_load): Adjust costing way for adjacent vector
10034 loads, by costing them with the total number rather than costing
10037 2023-10-23 Haochen Jiang <haochen.jiang@intel.com>
10040 * config/i386/i386.cc (ix86_standard_x87sse_constant_load_p):
10041 Do not split to xmm16+ when !TARGET_AVX512VL.
10043 2023-10-23 Pan Li <pan2.li@intel.com>
10045 * config/riscv/riscv-protos.h (enum insn_type): Add new type
10047 * config/riscv/riscv-v.cc (emit_vec_cvt_x_f): Add undef merge
10049 (expand_vec_ceil): Take MA instead of MU for tmp register.
10050 (expand_vec_floor): Ditto.
10051 (expand_vec_nearbyint): Ditto.
10052 (expand_vec_rint): Ditto.
10053 (expand_vec_round): Ditto.
10054 (expand_vec_roundeven): Ditto.
10056 2023-10-23 Lulu Cheng <chenglulu@loongson.cn>
10058 * config/loongarch/loongarch.h (CLEAR_INSN_CACHE): New definition.
10060 2023-10-23 Haochen Gui <guihaoc@gcc.gnu.org>
10063 * expr.cc (can_use_qi_vectors): New function to return true if
10064 we know how to implement OP using vectors of bytes.
10065 (qi_vector_mode_supported_p): New function to check if optabs
10066 exists for the mode and certain by pieces operations.
10067 (widest_fixed_size_mode_for_size): Replace the second argument
10068 with the type of by pieces operations. Call can_use_qi_vectors
10069 and qi_vector_mode_supported_p to do the check. Call
10070 scalar_mode_supported_p to check if the scalar mode is supported.
10071 (by_pieces_ninsns): Pass the type of by pieces operation to
10072 widest_fixed_size_mode_for_size.
10073 (class op_by_pieces_d): Remove m_qi_vector_mode. Add m_op to
10074 record the type of by pieces operations.
10075 (op_by_pieces_d::op_by_pieces_d): Change last argument to the
10076 type of by pieces operations, initialize m_op with it. Pass
10077 m_op to function widest_fixed_size_mode_for_size.
10078 (op_by_pieces_d::get_usable_mode): Pass m_op to function
10079 widest_fixed_size_mode_for_size.
10080 (op_by_pieces_d::smallest_fixed_size_mode_for_size): Call
10081 can_use_qi_vectors and qi_vector_mode_supported_p to do the
10083 (op_by_pieces_d::run): Pass m_op to function
10084 widest_fixed_size_mode_for_size.
10085 (move_by_pieces_d::move_by_pieces_d): Set m_op to MOVE_BY_PIECES.
10086 (store_by_pieces_d::store_by_pieces_d): Set m_op with the op.
10087 (can_store_by_pieces): Pass the type of by pieces operations to
10088 widest_fixed_size_mode_for_size.
10089 (clear_by_pieces): Initialize class store_by_pieces_d with
10091 (compare_by_pieces_d::compare_by_pieces_d): Set m_op to
10094 2023-10-23 liuhongt <hongtao.liu@intel.com>
10096 PR tree-optimization/111820
10097 PR tree-optimization/111833
10098 * tree-vect-loop-manip.cc (vect_can_peel_nonlinear_iv_p): Give
10099 up vectorization for nonlinear iv vect_step_op_mul when
10100 step_expr is not exact_log2 and niters is greater than
10101 TYPE_PRECISION (TREE_TYPE (step_expr)). Also don't vectorize
10102 for nagative niters_skip which will be used by fully masked
10104 (vect_can_advance_ivs_p): Pass whole phi_info to
10105 vect_can_peel_nonlinear_iv_p.
10106 * tree-vect-loop.cc (vect_peel_nonlinear_iv_init): Optimize
10107 init_expr * pow (step_expr, skipn) to init_expr
10108 << (log2 (step_expr) * skipn) when step_expr is exact_log2.
10110 2023-10-23 liuhongt <hongtao.liu@intel.com>
10112 * config/i386/mmx.md (mmx_pinsrw): Remove.
10114 2023-10-22 Andrew Pinski <pinskia@gmail.com>
10117 * config/aarch64/aarch64.md (*cmov<mode>_insn_insv): New pattern.
10118 (*cmov_uxtw_insn_insv): Likewise.
10120 2023-10-22 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
10122 * doc/invoke.texi: Document the new -nodefaultrpaths option.
10123 * doc/install.texi: Document the new --with-darwin-extra-rpath
10126 2023-10-22 Iain Sandoe <iain@sandoe.co.uk>
10128 * Makefile.in: set ENABLE_DARWIN_AT_RPATH in site.tmp.
10130 2023-10-22 Iain Sandoe <iain@sandoe.co.uk>
10132 * configure.ac: Add --with-darwin-extra-rpath option.
10133 * config/darwin.h: Handle DARWIN_EXTRA_RPATH.
10134 * config.in: Regenerate.
10135 * configure: Regenerate.
10137 2023-10-22 Iain Sandoe <iain@sandoe.co.uk>
10139 * aclocal.m4: Regenerate.
10140 * configure: Regenerate.
10141 * configure.ac: Handle Darwin rpaths.
10142 * config/darwin.h: Handle Darwin rpaths.
10143 * config/darwin.opt: Handle Darwin rpaths.
10144 * Makefile.in: Handle Darwin rpaths.
10146 2023-10-22 Iain Sandoe <iain@sandoe.co.uk>
10148 * gcc.cc (RUNPATH_OPTION): New.
10149 (do_spec_1): Provide '%P' as a spec to insert rpaths for
10150 each compiler startfile path.
10152 2023-10-22 Andrew Burgess <andrew.burgess@embecosm.com>
10153 Maxim Blinov <maxim.blinov@embecosm.com>
10154 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
10155 Iain Sandoe <iain@sandoe.co.uk>
10157 * config.gcc: Default to heap trampolines on macOS 11 and above.
10158 * config/i386/darwin.h: Define X86_CUSTOM_FUNCTION_TEST.
10159 * config/i386/i386.h: Define X86_CUSTOM_FUNCTION_TEST.
10160 * config/i386/i386.cc: Use X86_CUSTOM_FUNCTION_TEST.
10162 2023-10-22 Andrew Burgess <andrew.burgess@embecosm.com>
10163 Maxim Blinov <maxim.blinov@embecosm.com>
10164 Iain Sandoe <iain@sandoe.co.uk>
10165 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
10167 * builtins.def (BUILT_IN_NESTED_PTR_CREATED): Define.
10168 (BUILT_IN_NESTED_PTR_DELETED): Ditto.
10169 * common.opt (ftrampoline-impl): Add option to control
10170 generation of trampoline instantiation (heap or stack).
10171 * coretypes.h: Define enum trampoline_impl.
10172 * tree-nested.cc (convert_tramp_reference_op): Don't bother calling
10173 __builtin_adjust_trampoline for heap trampolines.
10174 (finalize_nesting_tree_1): Emit calls to
10175 __builtin_nested_...{created,deleted} if we're generating with
10176 -ftrampoline-impl=heap.
10177 * tree.cc (build_common_builtin_nodes): Build
10178 __builtin_nested_...{created,deleted}.
10179 * doc/invoke.texi (-ftrampoline-impl): Document.
10181 2023-10-22 Tsukasa OI <research_trasio@irq.a4lg.com>
10183 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
10184 Prohibit 'E' and 'H' combinations.
10186 2023-10-22 Tsukasa OI <research_trasio@irq.a4lg.com>
10188 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
10189 Change version number of the 'Zfa' extension to 1.0.
10191 2023-10-21 Pan Li <pan2.li@intel.com>
10194 * config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): Remove.
10195 * config/riscv/riscv-protos.h (vls_mode_valid_p): New func decl.
10196 * config/riscv/riscv-v.cc (autovectorize_vector_modes): Replace
10197 macro reference to func.
10198 (vls_mode_valid_p): New func impl for vls mode valid or not.
10199 * config/riscv/riscv-vector-switch.def (VLS_ENTRY): Replace
10200 macro reference to func.
10201 * config/riscv/vector-iterators.md: Ditto.
10203 2023-10-20 Roger Sayle <roger@nextmovesoftware.com>
10204 Uros Bizjak <ubizjak@gmail.com>
10206 PR middle-end/101955
10207 PR tree-optimization/106245
10208 * config/i386/i386.md (*extv<mode>_1_0): New define_insn_and_split.
10210 2023-10-20 David Edelsohn <dje.gcc@gmail.com>
10212 * gimple-harden-control-flow.cc: Include memmodel.h.
10214 2023-10-20 David Edelsohn <dje.gcc@gmail.com>
10216 * gimple-harden-control-flow.cc: Include tm_p.h.
10218 2023-10-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
10220 PR tree-optimization/111882
10221 * tree-if-conv.cc (get_bitfield_rep): Return NULL_TREE for bitfields
10222 with non-constant offsets.
10224 2023-10-20 Tamar Christina <tamar.christina@arm.com>
10226 PR tree-optimization/111866
10227 * tree-vect-loop-manip.cc (vect_do_peeling): Pass null as vinfo to
10228 vect_set_loop_condition during prolog peeling.
10230 2023-10-20 Richard Biener <rguenther@suse.de>
10232 PR tree-optimization/111445
10233 * tree-scalar-evolution.cc (simple_iv_with_niters):
10234 Add missing check for a sign-conversion.
10236 2023-10-20 Richard Biener <rguenther@suse.de>
10238 PR tree-optimization/110243
10239 PR tree-optimization/111336
10240 * tree-ssa-loop-ivopts.cc (strip_offset_1): Rewrite
10241 operations with undefined behavior on overflow to
10242 unsigned arithmetic.
10244 2023-10-20 Richard Biener <rguenther@suse.de>
10246 PR tree-optimization/111891
10247 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Fix
10250 2023-10-20 Andrew Stubbs <ams@codesourcery.com>
10252 * config.gcc: Allow --with-arch=gfx1030.
10253 * config/gcn/gcn-hsa.h (NO_XNACK): gfx1030 does not support xnack.
10254 (ASM_SPEC): gfx1030 needs -mattr=+wavefrontsize64 set.
10255 * config/gcn/gcn-opts.h (enum processor_type): Add PROCESSOR_GFX1030.
10256 (TARGET_GFX1030): New.
10257 (TARGET_RDNA2): New.
10258 * config/gcn/gcn-valu.md (@dpp_move<mode>): Disable for RDNA2.
10259 (addc<mode>3<exec_vcc>): Add RDNA2 syntax variant.
10260 (subc<mode>3<exec_vcc>): Likewise.
10261 (<convop><mode><vndi>2_exec): Add RDNA2 alternatives.
10262 (vec_cmp<mode>di): Likewise.
10263 (vec_cmp<u><mode>di): Likewise.
10264 (vec_cmp<mode>di_exec): Likewise.
10265 (vec_cmp<u><mode>di_exec): Likewise.
10266 (vec_cmp<mode>di_dup): Likewise.
10267 (vec_cmp<mode>di_dup_exec): Likewise.
10268 (reduc_<reduc_op>_scal_<mode>): Disable for RDNA2.
10269 (*<reduc_op>_dpp_shr_<mode>): Likewise.
10270 (*plus_carry_dpp_shr_<mode>): Likewise.
10271 (*plus_carry_in_dpp_shr_<mode>): Likewise.
10272 * config/gcn/gcn.cc (gcn_option_override): Recognise gfx1030.
10273 (gcn_global_address_p): RDNA2 only allows smaller offsets.
10274 (gcn_addr_space_legitimate_address_p): Likewise.
10275 (gcn_omp_device_kind_arch_isa): Recognise gfx1030.
10276 (gcn_expand_epilogue): Use VGPRs instead of SGPRs.
10277 (output_file_start): Configure gfx1030.
10278 * config/gcn/gcn.h (TARGET_CPU_CPP_BUILTINS): Add __RDNA2__;
10279 (ASSEMBLER_DIALECT): New.
10280 * config/gcn/gcn.md (rdna): New define_attr.
10281 (enabled): Use "rdna" attribute.
10282 (gcn_return): Remove s_dcache_wb.
10283 (addcsi3_scalar): Add RDNA2 syntax variant.
10284 (addcsi3_scalar_zero): Likewise.
10285 (addptrdi3): Likewise.
10286 (mulsi3): v_mul_lo_i32 should be v_mul_lo_u32 on all ISA.
10287 (*memory_barrier): Add RDNA2 syntax variant.
10288 (atomic_load<mode>): Add RDNA2 cache control variants, and disable
10289 scalar atomics for RDNA2.
10290 (atomic_store<mode>): Likewise.
10291 (atomic_exchange<mode>): Likewise.
10292 * config/gcn/gcn.opt (gpu_type): Add gfx1030.
10293 * config/gcn/mkoffload.cc (EF_AMDGPU_MACH_AMDGCN_GFX1030): New.
10294 (main): Recognise -march=gfx1030.
10295 * config/gcn/t-omp-device: Add gfx1030 isa.
10297 2023-10-20 Richard Biener <rguenther@suse.de>
10299 PR tree-optimization/111000
10300 * stor-layout.h (element_precision): Move ..
10301 * tree.h (element_precision): .. here.
10302 * tree-ssa-loop-im.cc (movement_possibility_1): Restrict
10303 motion of shifts and rotates.
10305 2023-10-20 Alexandre Oliva <oliva@adacore.com>
10307 * tree-core.h (ECF_XTHROW): New macro.
10308 * tree.cc (set_call_expr): Add expected_throw attribute when
10310 (build_common_builtin_node): Add ECF_XTHROW to
10311 __cxa_end_cleanup and _Unwind_Resume or _Unwind_SjLj_Resume.
10312 * calls.cc (flags_from_decl_or_type): Check for expected_throw
10313 attribute to set ECF_XTHROW.
10314 * gimple.cc (gimple_build_call_from_tree): Propagate
10315 ECF_XTHROW from decl flags to gimple call...
10316 (gimple_call_flags): ... and back.
10317 * gimple.h (GF_CALL_XTHROW): New gf_mask flag.
10318 (gimple_call_set_expected_throw): New.
10319 (gimple_call_expected_throw_p): New.
10320 * Makefile.in (OBJS): Add gimple-harden-control-flow.o.
10321 * builtins.def (BUILT_IN___HARDCFR_CHECK): New.
10322 * common.opt (fharden-control-flow-redundancy): New.
10323 (-fhardcfr-check-returning-calls): New.
10324 (-fhardcfr-check-exceptions): New.
10325 (-fhardcfr-check-noreturn-calls=*): New.
10326 (Enum hardcfr_check_noreturn_calls): New.
10327 (fhardcfr-skip-leaf): New.
10328 * doc/invoke.texi: Document them.
10329 (hardcfr-max-blocks, hardcfr-max-inline-blocks): New params.
10330 * flag-types.h (enum hardcfr_noret): New.
10331 * gimple-harden-control-flow.cc: New.
10332 * params.opt (-param=hardcfr-max-blocks=): New.
10333 (-param=hradcfr-max-inline-blocks=): New.
10334 * passes.def (pass_harden_control_flow_redundancy): Add.
10335 * tree-pass.h (make_pass_harden_control_flow_redundancy):
10337 * doc/extend.texi: Document expected_throw attribute.
10339 2023-10-20 Alex Coplan <alex.coplan@arm.com>
10341 * rtl-ssa/changes.cc (function_info::change_insns): Ensure we call
10342 ::remove_insn on deleted insns.
10344 2023-10-20 Richard Biener <rguenther@suse.de>
10346 * doc/generic.texi ({L,R}ROTATE_EXPR): Document.
10348 2023-10-20 Oleg Endo <olegendo@gcc.gnu.org>
10351 * config/sh/sh.md (unnamed split pattern): Fix comparison of
10352 find_regno_note result.
10354 2023-10-20 Richard Biener <rguenther@suse.de>
10356 * tree-vect-loop.cc (update_epilogue_loop_vinfo): Rewrite
10357 both STMT_VINFO_GATHER_SCATTER_P and VMAT_GATHER_SCATTER
10360 2023-10-20 Richard Biener <rguenther@suse.de>
10362 * tree-vect-slp.cc (off_map, off_op0_map, off_arg2_map,
10363 off_arg3_arg2_map): New.
10364 (vect_get_operand_map): Get flag whether the stmt was
10365 recognized as gather or scatter and use the above
10367 (vect_get_and_check_slp_defs): Adjust.
10368 (vect_build_slp_tree_2): Likewise.
10370 2023-10-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10372 * config/riscv/riscv-vsetvl.cc (pre_vsetvl::fuse_local_vsetvl_info): Rename variables.
10373 (pre_vsetvl::pre_global_vsetvl_info): Ditto.
10374 (pre_vsetvl::emit_vsetvl): Ditto.
10376 2023-10-20 Tamar Christina <tamar.christina@arm.com>
10377 Andre Vieira <andre.simoesdiasvieira@arm.com>
10379 * tree-if-conv.cc (if_convertible_loop_p_1): Move check from here ...
10380 (get_loop_body_if_conv_order): ... to here.
10381 (if_convertible_loop_p): Remove single_exit check.
10382 (tree_if_conversion): Move single_exit check to if-conversion part and
10383 support multiple exits.
10385 2023-10-20 Tamar Christina <tamar.christina@arm.com>
10386 Andre Vieira <andre.simoesdiasvieira@arm.com>
10388 * tree-vect-patterns.cc (vect_init_pattern_stmt): Copy STMT_VINFO_TYPE
10389 from original statement.
10390 (vect_recog_bitfield_ref_pattern): Support bitfields in gcond.
10392 2023-10-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10395 * config/riscv/riscv-selftests.cc (run_const_vector_selftests): Adapt selftest.
10396 * config/riscv/riscv-v.cc (expand_const_vector): Change it into vec_duplicate splitter.
10398 2023-10-20 Lehua Ding <lehua.ding@rivai.ai>
10403 * config/riscv/riscv-vsetvl.cc (bitmap_union_of_preds_with_entry): New.
10405 (compute_reaching_defintion): New.
10406 (enum vsetvl_type): Moved.
10407 (vlmax_avl_p): Moved.
10408 (enum emit_type): Moved.
10409 (vlmul_to_str): Moved.
10410 (vlmax_avl_insn_p): Removed.
10411 (policy_to_str): Moved.
10412 (loop_basic_block_p): Removed.
10413 (valid_sew_p): Removed.
10414 (vsetvl_insn_p): Moved.
10415 (vsetvl_vtype_change_only_p): Removed.
10416 (after_or_same_p): Removed.
10417 (before_p): Removed.
10418 (anticipatable_occurrence_p): Removed.
10419 (available_occurrence_p): Removed.
10420 (insn_should_be_added_p): Removed.
10421 (get_all_sets): Moved.
10422 (get_same_bb_set): Moved.
10423 (gen_vsetvl_pat): Removed.
10424 (calculate_vlmul): Moved.
10425 (get_max_int_sew): New.
10426 (emit_vsetvl_insn): Removed.
10427 (get_max_float_sew): New.
10428 (eliminate_insn): Removed.
10429 (insert_vsetvl): Removed.
10430 (count_regno_occurrences): Moved.
10431 (get_vl_vtype_info): Removed.
10432 (enum def_type): Moved.
10433 (validate_change_or_fail): Moved.
10434 (change_insn): Removed.
10435 (get_all_real_uses): Moved.
10436 (get_forward_read_vl_insn): Removed.
10437 (get_backward_fault_first_load_insn): Removed.
10438 (change_vsetvl_insn): Removed.
10439 (avl_source_has_vsetvl_p): Removed.
10440 (source_equal_p): Moved.
10441 (calculate_sew): Removed.
10442 (same_equiv_note_p): Moved.
10443 (get_expr_id): New.
10444 (incompatible_avl_p): Removed.
10446 (different_sew_p): Removed.
10447 (get_bb_index): New.
10448 (different_lmul_p): Removed.
10449 (has_no_uses): Moved.
10450 (different_ratio_p): Removed.
10451 (different_tail_policy_p): Removed.
10452 (different_mask_policy_p): Removed.
10453 (possible_zero_avl_p): Removed.
10454 (enum demand_flags): New.
10455 (second_ratio_invalid_for_first_sew_p): Removed.
10456 (second_ratio_invalid_for_first_lmul_p): Removed.
10458 (float_insn_valid_sew_p): Removed.
10459 (second_sew_less_than_first_sew_p): Removed.
10460 (first_sew_less_than_second_sew_p): Removed.
10461 (class vsetvl_info): New.
10462 (compare_lmul): Removed.
10463 (second_lmul_less_than_first_lmul_p): Removed.
10464 (second_ratio_less_than_first_ratio_p): Removed.
10465 (DEF_INCOMPATIBLE_COND): Removed.
10466 (greatest_sew): Removed.
10467 (first_sew): Removed.
10468 (second_sew): Removed.
10469 (first_vlmul): Removed.
10470 (second_vlmul): Removed.
10471 (first_ratio): Removed.
10472 (second_ratio): Removed.
10473 (vlmul_for_first_sew_second_ratio): Removed.
10474 (vlmul_for_greatest_sew_second_ratio): Removed.
10475 (ratio_for_second_sew_first_vlmul): Removed.
10476 (class vsetvl_block_info): New.
10477 (DEF_SEW_LMUL_FUSE_RULE): New.
10478 (always_unavailable): Removed.
10479 (avl_unavailable_p): Removed.
10480 (class demand_system): New.
10481 (sew_unavailable_p): Removed.
10482 (lmul_unavailable_p): Removed.
10483 (ge_sew_unavailable_p): Removed.
10484 (ge_sew_lmul_unavailable_p): Removed.
10485 (ge_sew_ratio_unavailable_p): Removed.
10486 (DEF_UNAVAILABLE_COND): Removed.
10487 (same_sew_lmul_demand_p): Removed.
10488 (propagate_avl_across_demands_p): Removed.
10489 (reg_available_p): Removed.
10490 (support_relaxed_compatible_p): Removed.
10491 (demands_can_be_fused_p): Removed.
10492 (earliest_pred_can_be_fused_p): Removed.
10493 (vsetvl_dominated_by_p): Removed.
10494 (avl_info::avl_info): Removed.
10495 (avl_info::single_source_equal_p): Removed.
10496 (avl_info::multiple_source_equal_p): Removed.
10497 (DEF_SEW_LMUL_RULE): New.
10498 (avl_info::operator=): Removed.
10499 (avl_info::operator==): Removed.
10500 (DEF_POLICY_RULE): New.
10501 (avl_info::operator!=): Removed.
10502 (avl_info::has_non_zero_avl): Removed.
10503 (vl_vtype_info::vl_vtype_info): Removed.
10504 (vl_vtype_info::operator==): Removed.
10505 (DEF_AVL_RULE): New.
10506 (vl_vtype_info::operator!=): Removed.
10507 (vl_vtype_info::same_avl_p): Removed.
10508 (vl_vtype_info::same_vtype_p): Removed.
10509 (vl_vtype_info::same_vlmax_p): Removed.
10510 (vector_insn_info::operator>=): Removed.
10511 (vector_insn_info::operator==): Removed.
10512 (class pre_vsetvl): New.
10513 (vector_insn_info::parse_insn): Removed.
10514 (vector_insn_info::compatible_p): Removed.
10515 (vector_insn_info::skip_avl_compatible_p): Removed.
10516 (vector_insn_info::compatible_avl_p): Removed.
10517 (vector_insn_info::compatible_vtype_p): Removed.
10518 (vector_insn_info::available_p): Removed.
10519 (vector_insn_info::fuse_avl): Removed.
10520 (vector_insn_info::fuse_sew_lmul): Removed.
10521 (vector_insn_info::fuse_tail_policy): Removed.
10522 (vector_insn_info::fuse_mask_policy): Removed.
10523 (vector_insn_info::local_merge): Removed.
10524 (vector_insn_info::global_merge): Removed.
10525 (vector_insn_info::get_avl_or_vl_reg): Removed.
10526 (vector_insn_info::update_fault_first_load_avl): Removed.
10527 (vector_insn_info::dump): Removed.
10528 (vector_infos_manager::vector_infos_manager): Removed.
10529 (vector_infos_manager::create_expr): Removed.
10530 (vector_infos_manager::get_expr_id): Removed.
10531 (vector_infos_manager::all_same_ratio_p): Removed.
10532 (vector_infos_manager::all_avail_in_compatible_p): Removed.
10533 (vector_infos_manager::all_same_avl_p): Removed.
10534 (vector_infos_manager::expr_set_num): Removed.
10535 (vector_infos_manager::release): Removed.
10536 (vector_infos_manager::create_bitmap_vectors): Removed.
10537 (vector_infos_manager::free_bitmap_vectors): Removed.
10538 (vector_infos_manager::dump): Removed.
10539 (class pass_vsetvl): Adjust.
10540 (pass_vsetvl::get_vector_info): Removed.
10541 (pass_vsetvl::get_block_info): Removed.
10542 (pass_vsetvl::update_vector_info): Removed.
10543 (pass_vsetvl::update_block_info): Removed.
10544 (pre_vsetvl::compute_avl_def_data): New.
10545 (pass_vsetvl::simple_vsetvl): Removed.
10546 (pass_vsetvl::compute_local_backward_infos): Removed.
10547 (pass_vsetvl::need_vsetvl): Removed.
10548 (pass_vsetvl::transfer_before): Removed.
10549 (pass_vsetvl::transfer_after): Removed.
10550 (pre_vsetvl::compute_vsetvl_def_data): New.
10551 (pass_vsetvl::emit_local_forward_vsetvls): Removed.
10552 (pass_vsetvl::prune_expressions): Removed.
10553 (pass_vsetvl::compute_local_properties): Removed.
10554 (pre_vsetvl::compute_lcm_local_properties): New.
10555 (pass_vsetvl::earliest_fusion): Removed.
10556 (pre_vsetvl::fuse_local_vsetvl_info): New.
10557 (pass_vsetvl::vsetvl_fusion): Removed.
10558 (pass_vsetvl::can_refine_vsetvl_p): Removed.
10559 (pre_vsetvl::earliest_fuse_vsetvl_info): New.
10560 (pass_vsetvl::refine_vsetvls): Removed.
10561 (pass_vsetvl::cleanup_vsetvls): Removed.
10562 (pass_vsetvl::commit_vsetvls): Removed.
10563 (pass_vsetvl::pre_vsetvl): Removed.
10564 (pass_vsetvl::get_vsetvl_at_end): Removed.
10565 (local_avl_compatible_p): Removed.
10566 (pass_vsetvl::local_eliminate_vsetvl_insn): Removed.
10567 (pre_vsetvl::pre_global_vsetvl_info): New.
10568 (get_first_vsetvl_before_rvv_insns): Removed.
10569 (pass_vsetvl::global_eliminate_vsetvl_insn): Removed.
10570 (pre_vsetvl::emit_vsetvl): New.
10571 (pass_vsetvl::ssa_post_optimization): Removed.
10572 (pre_vsetvl::cleaup): New.
10573 (pre_vsetvl::remove_avl_operand): New.
10574 (pass_vsetvl::df_post_optimization): Removed.
10575 (pre_vsetvl::remove_unused_dest_operand): New.
10576 (pass_vsetvl::init): Removed.
10577 (pass_vsetvl::done): Removed.
10578 (pass_vsetvl::compute_probabilities): Removed.
10579 (pass_vsetvl::lazy_vsetvl): Adjust.
10580 (pass_vsetvl::execute): Adjust.
10581 * config/riscv/riscv-vsetvl.def (DEF_INCOMPATIBLE_COND): Removed.
10582 (DEF_SEW_LMUL_RULE): New.
10583 (DEF_SEW_LMUL_FUSE_RULE): Removed.
10584 (DEF_POLICY_RULE): New.
10585 (DEF_UNAVAILABLE_COND): Removed
10586 (DEF_AVL_RULE): New demand type.
10587 (sew_lmul): New demand type.
10588 (ratio_only): New demand type.
10589 (sew_only): New demand type.
10590 (ge_sew): New demand type.
10591 (ratio_and_ge_sew): New demand type.
10592 (tail_mask_policy): New demand type.
10593 (tail_policy_only): New demand type.
10594 (mask_policy_only): New demand type.
10595 (ignore_policy): New demand type.
10596 (avl): New demand type.
10597 (non_zero_avl): New demand type.
10598 (ignore_avl): New demand type.
10599 * config/riscv/t-riscv: Removed riscv-vsetvl.h
10600 * config/riscv/riscv-vsetvl.h: Removed.
10602 2023-10-20 Alexandre Oliva <oliva@adacore.com>
10604 * tree-eh.cc (make_eh_edges): Return the new edge.
10605 * tree-eh.h (make_eh_edges): Likewise.
10607 2023-10-19 Marek Polacek <polacek@redhat.com>
10609 * doc/contrib.texi: Add entry for Patrick Palka.
10611 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
10613 * omp-simd-clone.cc (simd_clone_adjust_argument_types): Make function
10614 compatible with mask parameters in clone.
10615 * tree-vect-stmts.cc (vect_build_all_ones_mask): Allow vector boolean
10617 (vectorizable_simd_clone_call): Enable the use of masked clones in
10618 fully masked loops.
10620 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
10622 PR tree-optimization/110485
10623 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Disable partial
10624 vectors usage if a notinbranch simdclone has been selected.
10626 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
10628 * tree-vect-data-refs.cc (vect_get_smallest_scalar_type): Special case
10629 simd clone calls and only use types that are mapped to vectors.
10630 (simd_clone_call_p): New helper function.
10632 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
10634 * tree-parloops.cc (try_transform_to_exit_first_loop_alt): Accept
10635 poly NIT and ALT_BOUND.
10637 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
10639 * tree-parloops.cc (create_loop_fn): Copy specific target and
10640 optimization options to clone.
10642 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
10644 * omp-simd-clone.cc (simd_clone_subparts): Remove.
10645 (simd_clone_init_simd_arrays): Replace simd_clone_supbarts with
10646 TYPE_VECTOR_SUBPARTS.
10647 (ipa_simd_modify_function_body): Likewise.
10648 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Likewise.
10649 (simd_clone_subparts): Remove.
10651 2023-10-19 Jason Merrill <jason@redhat.com>
10653 * ABOUT-GCC-NLS: Add usage guidance.
10655 2023-10-19 Jason Merrill <jason@redhat.com>
10657 * diagnostic-core.h (permerror): Rename new overloads...
10658 (permerror_opt): To this.
10659 * diagnostic.cc: Likewise.
10661 2023-10-19 Tamar Christina <tamar.christina@arm.com>
10663 PR tree-optimization/111860
10664 * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg):
10665 Remove PHI nodes that dominate loop.
10667 2023-10-19 Richard Biener <rguenther@suse.de>
10669 PR tree-optimization/111131
10670 * tree-vect-loop.cc (update_epilogue_loop_vinfo): Make
10671 sure to update all gather/scatter stmt DRs, not only those
10672 that eventually got VMAT_GATHER_SCATTER set.
10673 * tree-vect-slp.cc (_slp_oprnd_info::first_gs_info): Add.
10674 (vect_get_and_check_slp_defs): Handle gathers/scatters,
10675 adding the offset as SLP operand and comparing base and scale.
10676 (vect_build_slp_tree_1): Handle gathers.
10677 (vect_build_slp_tree_2): Likewise.
10679 2023-10-19 Richard Biener <rguenther@suse.de>
10681 * tree-vect-stmts.cc (vect_build_gather_load_calls): Rename
10683 (vect_build_one_gather_load_call): ... this. Refactor,
10684 inline widening/narrowing support ...
10685 (vectorizable_load): ... here, do gather vectorization
10686 with builtin decls along other gather vectorization.
10688 2023-10-19 Alex Coplan <alex.coplan@arm.com>
10690 * config/aarch64/aarch64.md (load_pair_dw_tftf): Rename to ...
10691 (load_pair_dw_<TX:mode><TX2:mode>): ... this.
10692 (store_pair_dw_tftf): Rename to ...
10693 (store_pair_dw_<TX:mode><TX2:mode>): ... this.
10694 * config/aarch64/iterators.md (TX2): New.
10696 2023-10-19 Alex Coplan <alex.coplan@arm.com>
10698 * rtl-ssa/changes.cc (function_info::finalize_new_accesses): Add new
10699 parameter to give final insn position, infer use of mem if it isn't
10700 specified explicitly.
10701 (function_info::change_insns): Pass down final insn position to
10702 finalize_new_accesses.
10703 * rtl-ssa/functions.h: Add parameter to finalize_new_accesses.
10705 2023-10-19 Alex Coplan <alex.coplan@arm.com>
10707 * rtl-ssa/accesses.cc (function_info::reparent_use): New.
10708 * rtl-ssa/functions.h (function_info): Declare new member
10709 function reparent_use.
10711 2023-10-19 Alex Coplan <alex.coplan@arm.com>
10713 * rtl-ssa/access-utils.h (drop_memory_access): New.
10715 2023-10-19 Alex Coplan <alex.coplan@arm.com>
10717 * rtl-ssa/insns.cc (function_info::add_insn_after): Ensure we
10718 update the prev pointer on the following nondebug insn in the
10719 case that !insn->is_debug_insn () && next->is_debug_insn ().
10721 2023-10-19 Haochen Jiang <haochen.jiang@intel.com>
10723 * config/i386/i386.h: Correct the ISA enabled for Arrow Lake.
10724 Also make Clearwater Forest depends on Sierra Forest.
10725 * config/i386/i386-options.cc: Revise the order of the macro
10726 definition to avoid confusion.
10727 * doc/extend.texi: Revise documentation.
10728 * doc/invoke.texi: Correct documentation.
10730 2023-10-19 Andrew Stubbs <ams@codesourcery.com>
10732 * config.gcc (amdgcn): Switch default to --with-arch=gfx900.
10733 Implement support for --with-multilib-list.
10734 * config/gcn/t-gcn-hsa: Likewise.
10735 * doc/install.texi: Likewise.
10736 * doc/invoke.texi: Mark Fiji deprecated.
10738 2023-10-19 Jiahao Xu <xujiahao@loongson.cn>
10740 * config/loongarch/loongarch.cc (loongarch_vector_costs): Inherit from
10741 vector_costs. Add a constructor.
10742 (loongarch_vector_costs::add_stmt_cost): Use adjust_cost_for_freq to
10743 adjust the cost for inner loops.
10744 (loongarch_vector_costs::count_operations): New function.
10745 (loongarch_vector_costs::determine_suggested_unroll_factor): Ditto.
10746 (loongarch_vector_costs::finish_cost): Ditto.
10747 (loongarch_builtin_vectorization_cost): Adjust.
10748 * config/loongarch/loongarch.opt (loongarch-vect-unroll-limit): New parameter.
10749 (loongarcg-vect-issue-info): Ditto.
10750 (mmemvec-cost): Delete.
10751 * config/loongarch/genopts/loongarch.opt.in
10752 (loongarch-vect-unroll-limit): Ditto.
10753 (loongarcg-vect-issue-info): Ditto.
10754 (mmemvec-cost): Delete.
10755 * doc/invoke.texi (loongarcg-vect-unroll-limit): Document new option.
10757 2023-10-19 Jiahao Xu <xujiahao@loongson.cn>
10759 * config/loongarch/lasx.md
10760 (vec_widen_<su>mult_even_v8si): New patterns.
10761 (vec_widen_<su>add_hi_<mode>): Ditto.
10762 (vec_widen_<su>add_lo_<mode>): Ditto.
10763 (vec_widen_<su>sub_hi_<mode>): Ditto.
10764 (vec_widen_<su>sub_lo_<mode>): Ditto.
10765 (vec_widen_<su>mult_hi_<mode>): Ditto.
10766 (vec_widen_<su>mult_lo_<mode>): Ditto.
10767 * config/loongarch/loongarch.md (u_bool): New iterator.
10768 * config/loongarch/loongarch-protos.h
10769 (loongarch_expand_vec_widen_hilo): New prototype.
10770 * config/loongarch/loongarch.cc
10771 (loongarch_expand_vec_interleave): New function.
10772 (loongarch_expand_vec_widen_hilo): New function.
10774 2023-10-19 Jiahao Xu <xujiahao@loongson.cn>
10776 * config/loongarch/lasx.md
10777 (avg<mode>3_ceil): New patterns.
10778 (uavg<mode>3_ceil): Ditto.
10779 (avg<mode>3_floor): Ditto.
10780 (uavg<mode>3_floor): Ditto.
10781 (usadv32qi): Ditto.
10782 (ssadv32qi): Ditto.
10783 * config/loongarch/lsx.md
10784 (avg<mode>3_ceil): New patterns.
10785 (uavg<mode>3_ceil): Ditto.
10786 (avg<mode>3_floor): Ditto.
10787 (uavg<mode>3_floor): Ditto.
10788 (usadv16qi): Ditto.
10789 (ssadv16qi): Ditto.
10791 2023-10-18 Andrew Pinski <pinskia@gmail.com>
10793 PR middle-end/111863
10794 * expr.cc (do_store_flag): Don't over write arg0
10795 when stripping off `& POW2`.
10797 2023-10-18 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
10799 PR tree-optimization/111648
10800 * fold-const.cc (valid_mask_for_fold_vec_perm_cst_p): If a1
10801 chooses base element from arg, ensure that it's a natural stepped
10803 (build_vec_cst_rand): New param natural_stepped and use it to
10804 construct a naturally stepped sequence.
10805 (test_nunits_min_2): Add new unit tests Case 6 and Case 7.
10807 2023-10-18 Dimitar Dimitrov <dimitar@dinux.eu>
10809 * config/pru/pru.cc (pru_insn_cost): New function.
10810 (TARGET_INSN_COST): Define for PRU.
10812 2023-10-18 Andrew Carlotti <andrew.carlotti@arm.com>
10814 * config/aarch64/aarch64.cc (aarch64_test_fractional_cost):
10815 Test <= instead of testing < twice.
10817 2023-10-18 Jakub Jelinek <jakub@redhat.com>
10819 PR bootstrap/111852
10820 * cse.cc (cse_insn): Add workaround for GCC 4.8-4.9, instead of
10821 using rtx_def type for memory_extend_buf, use unsigned char
10822 arrayy with size of rtx_def and its alignment.
10824 2023-10-18 Jason Merrill <jason@redhat.com>
10826 * doc/invoke.texi: Move -fpermissive to Warning Options.
10827 * diagnostic.cc (update_effective_level_from_pragmas): Remove
10828 redundant system header check.
10829 (diagnostic_report_diagnostic): Move down syshdr/-w check.
10830 (diagnostic_impl): Handle DK_PERMERROR with an option number.
10831 (permerror): Add new overloads.
10832 * diagnostic-core.h (permerror): Declare them.
10834 2023-10-18 Tobias Burnus <tobias@codesourcery.com>
10836 * gimplify.cc (gimplify_bind_expr): Remove "omp allocate" attribute
10837 to avoid that auxillary statement list reaches LTO.
10839 2023-10-18 Jakub Jelinek <jakub@redhat.com>
10841 PR tree-optimization/111845
10842 * tree-ssa-math-opts.cc (match_uaddc_usubc): Remember temporary
10843 statements for the 4 operand addition or subtraction of 3 operands
10844 from 1 operand cases and remove them when successful. Look for
10845 nested additions even from rhs[2], not just rhs[1].
10847 2023-10-18 Tobias Burnus <tobias@codesourcery.com>
10850 * config/nvptx/nvptx.cc (nvptx_option_override): Issue fatal error
10851 instead of an assert ICE when no -march= has been specified.
10853 2023-10-18 Iain Sandoe <iain@sandoe.co.uk>
10855 * config.in: Regenerate.
10856 * config/darwin.cc (darwin_file_start): Add assembler directives
10857 for the target OS version, where these are supported by the
10859 (darwin_override_options): Check for building >= macOS 10.14.
10860 * configure: Regenerate.
10861 * configure.ac: Check for assembler support of .build_version
10864 2023-10-18 Tamar Christina <tamar.christina@arm.com>
10866 PR tree-optimization/109154
10867 * tree-if-conv.cc (INCLUDE_ALGORITHM): Remove.
10868 (typedef struct ifcvt_arg_entry): New.
10869 (cmp_arg_entry): New.
10870 (gen_phi_arg_condition, gen_phi_nest_statement,
10871 predicate_scalar_phi): Use them.
10873 2023-10-18 Tamar Christina <tamar.christina@arm.com>
10875 PR tree-optimization/109154
10876 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>):
10877 Rewrite to new syntax.
10878 (*aarch64_simd_mov<VQMOV:mode): Rewrite to new syntax and merge in
10881 2023-10-18 Tamar Christina <tamar.christina@arm.com>
10883 PR tree-optimization/109154
10884 * tree-if-conv.cc (if_convertible_stmt_p): Allow any const IFN.
10886 2023-10-18 Tamar Christina <tamar.christina@arm.com>
10888 PR tree-optimization/109154
10889 * match.pd: Add new cond_op rule.
10891 2023-10-18 Xi Ruoyao <xry111@xry111.site>
10893 * config/loongarch/loongarch.md (movfcc): Use fcmp.caf.s for
10896 2023-10-18 Richard Biener <rguenther@suse.de>
10898 * tree-vect-stmts.cc (vectorizable_simd_clone_call):
10899 Relax check to again allow passing integer mode masks
10900 as traditional vectors.
10902 2023-10-18 Tamar Christina <tamar.christina@arm.com>
10904 * tree-loop-distribution.cc (copy_loop_before): Request no LCSSA.
10905 * tree-vect-loop-manip.cc (adjust_phi_and_debug_stmts): Add additional
10907 (slpeel_tree_duplicate_loop_to_edge_cfg): Keep LCSSA during peeling.
10908 (find_guard_arg): Look value up through explicit edge and original defs.
10909 (vect_do_peeling): Use it.
10910 (slpeel_update_phi_nodes_for_guard2): Take explicit exit edge.
10911 (slpeel_update_phi_nodes_for_lcssa, slpeel_update_phi_nodes_for_loops):
10913 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Initialize phi.
10914 * tree-vectorizer.h (slpeel_tree_duplicate_loop_to_edge_cfg): Add
10915 optional param to turn off LCSSA mode.
10917 2023-10-18 Tamar Christina <tamar.christina@arm.com>
10919 * tree-if-conv.cc (tree_if_conversion): Record exits in aux.
10920 * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg): Use
10922 * tree-vect-loop.cc (vect_get_loop_niters): Determine main exit.
10923 (vec_init_loop_exit_info): Extend analysis when multiple exits.
10924 (vect_analyze_loop_form): Record conds and determine main cond.
10925 (vect_create_loop_vinfo): Extend bookkeeping of conds.
10926 (vect_analyze_loop): Release conds.
10927 * tree-vectorizer.h (LOOP_VINFO_LOOP_CONDS,
10928 LOOP_VINFO_LOOP_IV_COND): New.
10929 (struct vect_loop_form_info): Add conds, alt_loop_conds;
10930 (struct loop_vec_info): Add conds, loop_iv_cond.
10932 2023-10-18 Tamar Christina <tamar.christina@arm.com>
10934 * tree-loop-distribution.cc (copy_loop_before): Pass exit explicitly.
10935 (loop_distribution::distribute_loop): Bail out of not single exit.
10936 * tree-scalar-evolution.cc (get_loop_exit_condition): New.
10937 * tree-scalar-evolution.h (get_loop_exit_condition): New.
10938 * tree-vect-data-refs.cc (vect_enhance_data_refs_alignment): Pass exit
10940 * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors,
10941 vect_set_loop_condition_partial_vectors_avx512,
10942 vect_set_loop_condition_normal, vect_set_loop_condition): Explicitly
10944 (slpeel_tree_duplicate_loop_to_edge_cfg): Explicitly take exit and
10945 return new peeled corresponding peeled exit.
10946 (slpeel_can_duplicate_loop_p): Explicitly take exit.
10947 (find_loop_location): Handle not knowing an explicit exit.
10948 (vect_update_ivs_after_vectorizer, vect_gen_vector_loop_niters_mult_vf,
10949 find_guard_arg, slpeel_update_phi_nodes_for_loops,
10950 slpeel_update_phi_nodes_for_guard2): Use new exits.
10951 (vect_do_peeling): Update bookkeeping to keep track of exits.
10952 * tree-vect-loop.cc (vect_get_loop_niters): Explicitly take exit to
10954 (vec_init_loop_exit_info): New.
10955 (_loop_vec_info::_loop_vec_info): Initialize vec_loop_iv,
10956 vec_epilogue_loop_iv, scalar_loop_iv.
10957 (vect_analyze_loop_form): Initialize exits.
10958 (vect_create_loop_vinfo): Set main exit.
10959 (vect_create_epilog_for_reduction, vectorizable_live_operation,
10960 vect_transform_loop): Use it.
10961 (scale_profile_for_vect_loop): Explicitly take exit to scale.
10962 * tree-vectorizer.cc (set_uid_loop_bbs): Initialize loop exit.
10963 * tree-vectorizer.h (LOOP_VINFO_IV_EXIT, LOOP_VINFO_EPILOGUE_IV_EXIT,
10964 LOOP_VINFO_SCALAR_IV_EXIT): New.
10965 (struct loop_vec_info): Add vec_loop_iv, vec_epilogue_loop_iv,
10967 (vect_set_loop_condition, slpeel_can_duplicate_loop_p,
10968 slpeel_tree_duplicate_loop_to_edge_cfg): Take explicit exits.
10969 (vec_init_loop_exit_info): New.
10970 (struct vect_loop_form_info): Add loop_exit.
10972 2023-10-18 Tamar Christina <tamar.christina@arm.com>
10974 * tree-vect-stmts.cc (vectorizable_comparison): Refactor, splitting body
10976 (vectorizable_comparison_1): ...This.
10978 2023-10-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10980 * config/riscv/riscv-v.cc (shuffle_consecutive_patterns): New function.
10981 (expand_vec_perm_const_1): Add consecutive pattern recognition.
10983 2023-10-18 Haochen Jiang <haochen.jiang@intel.com>
10985 * common/config/i386/cpuinfo.h (get_intel_cpu): Add Panther
10987 * common/config/i386/i386-common.cc (processor_name):
10989 (processor_alias_table): Ditto.
10990 * common/config/i386/i386-cpuinfo.h (enum processor_types):
10991 Add INTEL_PANTHERLAKE.
10992 * config.gcc: Add -march=pantherlake.
10993 * config/i386/driver-i386.cc (host_detect_local_cpu): Refactor
10994 the if clause. Handle pantherlake.
10995 * config/i386/i386-c.cc (ix86_target_macros_internal):
10996 Handle pantherlake.
10997 * config/i386/i386-options.cc (processor_cost_table): Ditto.
10998 (m_PANTHERLAKE): New.
10999 (m_CORE_HYBRID): Add pantherlake.
11000 * config/i386/i386.h (enum processor_type): Ditto.
11001 * doc/extend.texi: Ditto.
11002 * doc/invoke.texi: Ditto.
11004 2023-10-18 Haochen Jiang <haochen.jiang@intel.com>
11006 * config/i386/i386-options.cc (m_CORE_HYBRID): New.
11007 * config/i386/x86-tune.def: Replace hybrid client tune to
11010 2023-10-18 Haochen Jiang <haochen.jiang@intel.com>
11012 * common/config/i386/cpuinfo.h
11013 (get_intel_cpu): Handle Clearwater Forest.
11014 * common/config/i386/i386-common.cc (processor_name):
11015 Add Clearwater Forest.
11016 (processor_alias_table): Ditto.
11017 * common/config/i386/i386-cpuinfo.h (enum processor_types):
11018 Add INTEL_CLEARWATERFOREST.
11019 * config.gcc: Add -march=clearwaterforest.
11020 * config/i386/driver-i386.cc (host_detect_local_cpu): Handle
11022 * config/i386/i386-c.cc (ix86_target_macros_internal): Ditto.
11023 * config/i386/i386-options.cc (processor_cost_table): Ditto.
11024 (m_CLEARWATERFOREST): New.
11025 (m_CORE_ATOM): Add clearwaterforest.
11026 * config/i386/i386.h (enum processor_type): Ditto.
11027 * doc/extend.texi: Ditto.
11028 * doc/invoke.texi: Ditto.
11030 2023-10-18 liuhongt <hongtao.liu@intel.com>
11032 * config/i386/mmx.md (fma<mode>4): New expander.
11033 (fms<mode>4): Ditto.
11034 (fnma<mode>4): Ditto.
11035 (fnms<mode>4): Ditto.
11036 (vec_fmaddsubv4hf4): Ditto.
11037 (vec_fmsubaddv4hf4): Ditto.
11039 2023-10-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11042 * config/riscv/riscv-vector-costs.cc (get_biggest_mode): New function.
11044 2023-10-17 Richard Sandiford <richard.sandiford@arm.com>
11046 * config/aarch64/aarch64.cc (aarch64_layout_frame): Don't make
11047 the position of the LR save slot dependent on stack clash
11048 protection unless shadow call stacks are enabled.
11050 2023-10-17 Richard Sandiford <richard.sandiford@arm.com>
11052 * config/aarch64/aarch64.h (aarch64_frame): Add vectors that
11053 store the list saved GPRs, FPRs and predicate registers.
11054 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize
11055 the lists of saved registers. Use them to choose push candidates.
11056 Invalidate pop candidates if we're not going to do a pop.
11057 (aarch64_next_callee_save): Delete.
11058 (aarch64_save_callee_saves): Take a list of registers,
11059 rather than a range. Make !skip_wb select only write-back
11061 (aarch64_expand_prologue): Update calls accordingly.
11062 (aarch64_restore_callee_saves): Take a list of registers,
11063 rather than a range. Always skip pop candidates. Also skip
11064 LR if shadow call stacks are enabled.
11065 (aarch64_expand_epilogue): Update calls accordingly.
11067 2023-10-17 Richard Sandiford <richard.sandiford@arm.com>
11069 * cfgbuild.h (find_sub_basic_blocks): Declare.
11070 * cfgbuild.cc (update_profile_for_new_sub_basic_block): New function,
11072 (find_many_sub_basic_blocks): ...here.
11073 (find_sub_basic_blocks): New function.
11074 * function.cc (thread_prologue_and_epilogue_insns): Handle
11075 epilogues that contain jumps.
11077 2023-10-17 Andrew Pinski <apinski@marvell.com>
11079 PR tree-optimization/110817
11080 * tree-ssanames.cc (ssa_name_has_boolean_range): Remove the
11081 check for boolean type as they don't have "[0,1]" range.
11083 2023-10-17 Andrew Pinski <pinskia@gmail.com>
11085 PR tree-optimization/111432
11086 * match.pd (`a & (x | CST)`): New pattern.
11088 2023-10-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
11090 * tree-cfg.cc (move_sese_region_to_fn): Initialize profile_count for
11093 2023-10-17 Richard Biener <rguenther@suse.de>
11095 PR tree-optimization/111846
11096 * tree-vectorizer.h (_slp_tree::simd_clone_info): Add.
11097 (SLP_TREE_SIMD_CLONE_INFO): New.
11098 * tree-vect-slp.cc (_slp_tree::_slp_tree): Initialize
11099 SLP_TREE_SIMD_CLONE_INFO.
11100 (_slp_tree::~_slp_tree): Release it.
11101 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Use
11102 SLP_TREE_SIMD_CLONE_INFO or STMT_VINFO_SIMD_CLONE_INFO
11103 dependent on if we're doing SLP.
11105 2023-10-17 Jakub Jelinek <jakub@redhat.com>
11107 * wide-int-print.h (print_dec_buf_size): For length, divide number
11108 of bits by 3 and add 3 instead of division by 4 and adding 4.
11109 * wide-int-print.cc (print_decs): Remove superfluous ()s. Don't call
11110 print_hex, instead call print_decu on either negated value after
11111 printing - or on wi itself.
11112 (print_decu): Don't call print_hex, instead print even large numbers
11114 (pp_wide_int_large): Assume len from print_dec_buf_size is big enough
11115 even if it returns false.
11116 * pretty-print.h (pp_wide_int): Use print_dec_buf_size to check if
11117 pp_wide_int_large should be used.
11118 * tree-pretty-print.cc (dump_generic_node): Use print_hex_buf_size
11119 to compute needed buffer size.
11121 2023-10-17 Richard Biener <rguenther@suse.de>
11123 PR middle-end/111818
11124 * tree-ssa.cc (maybe_optimize_var): When clearing
11125 DECL_NOT_GIMPLE_REG_P always rewrite into SSA.
11127 2023-10-17 Richard Biener <rguenther@suse.de>
11129 PR tree-optimization/111807
11130 * tree-sra.cc (build_ref_for_model): Only call
11131 build_reconstructed_reference when the offsets are the same.
11133 2023-10-17 Vineet Gupta <vineetg@rivosinc.com>
11136 * expr.cc (expand_expr_real_2): Do not clear SUBREG_PROMOTED_VAR_P.
11138 2023-10-17 Chenghui Pan <panchenghui@loongson.cn>
11140 * config/loongarch/loongarch.cc (loongarch_expand_vector_group_init):
11141 fix impl related to vec_initv32qiv16qi template to avoid ICE.
11143 2023-10-17 Lulu Cheng <chenglulu@loongson.cn>
11144 Chenghua Xu <xuchenghua@loongson.cn>
11146 * config/loongarch/loongarch.h (ASM_OUTPUT_ALIGN_WITH_NOP):
11149 2023-10-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11151 * config/riscv/riscv-vector-costs.cc (max_number_of_live_regs): Fix big LMUL issue.
11152 (get_store_value): New function.
11154 2023-10-16 Jeff Law <jlaw@ventanamicro.com>
11156 * explow.cc (probe_stack_range): Handle case when expand_binop
11157 does not construct its result in the expected location.
11159 2023-10-16 David Malcolm <dmalcolm@redhat.com>
11161 * diagnostic.cc (diagnostic_initialize): When LANG=C, update
11162 default for -fdiagnostics-text-art-charset from emoji to ascii.
11163 * doc/invoke.texi (fdiagnostics-text-art-charset): Document the above.
11165 2023-10-16 David Malcolm <dmalcolm@redhat.com>
11167 * diagnostic.cc (diagnostic_initialize): Ensure
11168 context->extra_output_kind is initialized.
11170 2023-10-16 Uros Bizjak <ubizjak@gmail.com>
11172 * config/i386/i386.cc (ix86_can_inline_p):
11173 Handle CM_LARGE and CM_LARGE_PIC.
11174 (x86_elf_aligned_decl_common): Ditto.
11175 (x86_output_aligned_bss): Ditto.
11176 * config/i386/i386.opt: Update doc for -mlarge-data-threshold=.
11177 * doc/invoke.texi: Update doc for -mlarge-data-threshold=.
11179 2023-10-16 Christoph Müllner <christoph.muellner@vrull.eu>
11181 * config/riscv/riscv-protos.h (emit_block_move): Remove redundant
11182 prototype. Improve comment.
11183 * config/riscv/riscv.cc (riscv_block_move_straight): Move from riscv.cc
11184 into riscv-string.cc.
11185 (riscv_adjust_block_mem, riscv_block_move_loop): Likewise.
11186 (riscv_expand_block_move): Likewise.
11187 * config/riscv/riscv-string.cc (riscv_block_move_straight): Add moved
11189 (riscv_adjust_block_mem, riscv_block_move_loop): Likewise.
11190 (riscv_expand_block_move): Likewise.
11192 2023-10-16 Manolis Tsamis <manolis.tsamis@vrull.eu>
11194 * Makefile.in: Add fold-mem-offsets.o.
11195 * passes.def: Schedule a new pass.
11196 * tree-pass.h (make_pass_fold_mem_offsets): Declare.
11197 * common.opt: New options.
11198 * doc/invoke.texi: Document new option.
11199 * fold-mem-offsets.cc: New file.
11201 2023-10-16 Andrew Pinski <pinskia@gmail.com>
11203 PR tree-optimization/101541
11204 * match.pd (A CMP 0 ? A : -A): Improve
11205 using bitwise_equal_p.
11207 2023-10-16 Andrew Pinski <pinskia@gmail.com>
11209 PR tree-optimization/31531
11210 * match.pd (~X op ~Y): Allow for an optional nop convert.
11211 (~X op C): Likewise.
11213 2023-10-16 Roger Sayle <roger@nextmovesoftware.com>
11215 * config/arc/arc.md (*ashlsi3_1): New pre-reload splitter to
11216 use bset dst,0,src to implement 1<<x on !TARGET_BARREL_SHIFTER.
11218 2023-10-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
11220 * config/s390/vector.md (popcountv8hi2_vx): Sign extend each
11221 unsigned vector element.
11223 2023-10-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11225 * config/riscv/riscv-vector-costs.cc (costs::preferred_new_lmul_p): Use VLS modes.
11227 2023-10-16 Jiufu Guo <guojiufu@linux.ibm.com>
11229 * fold-const.cc (expr_not_equal_to): Replace get_global_range_query
11230 by get_range_query.
11231 * gimple-fold.cc (size_must_be_zero_p): Likewise.
11232 * gimple-range-fold.cc (fur_source::fur_source): Likewise.
11233 * gimple-ssa-warn-access.cc (check_nul_terminated_array): Likewise.
11234 * tree-dfa.cc (get_ref_base_and_extent): Likewise.
11236 2023-10-16 liuhongt <hongtao.liu@intel.com>
11238 * config/i386/mmx.md (V2FI_32): New mode iterator
11239 (movd_v2hf_to_sse): Rename to ..
11240 (movd_<mode>_to_sse): .. this.
11241 (movd_v2hf_to_sse_reg): Rename to ..
11242 (movd_<mode>_to_sse_reg): .. this.
11243 (fix<fixunssuffix>_trunc<mode><mmxintvecmodelower>2): New
11245 (fix<fixunssuffix>_truncv2hfv2si2): Ditto.
11246 (float<floatunssuffix><mmxintvecmodelower><mode>2): Ditto.
11247 (float<floatunssuffix>v2siv2hf2): Ditto.
11248 (extendv2hfv2sf2): Ditto.
11249 (truncv2sfv2hf2): Ditto.
11250 * config/i386/sse.md (*vec_concatv8hf_movss): Rename to ..
11251 (*vec_concat<mode>_movss): .. this.
11253 2023-10-16 liuhongt <hongtao.liu@intel.com>
11255 * config/i386/i386-expand.cc (ix86_sse_copysign_to_positive):
11257 (ix86_expand_round_sse4): Ditto.
11258 * config/i386/i386.md (roundhf2): New expander.
11259 (lroundhf<mode>2): Ditto.
11260 (lrinthf<mode>2): Ditto.
11261 (l<rounding_insn>hf<mode>2): Ditto.
11262 * config/i386/mmx.md (sqrt<mode>2): Ditto.
11263 (btrunc<mode>2): Ditto.
11264 (nearbyint<mode>2): Ditto.
11265 (rint<mode>2): Ditto.
11266 (lrint<mode><mmxintvecmodelower>2): Ditto.
11267 (floor<mode>2): Ditto.
11268 (lfloor<mode><mmxintvecmodelower>2): Ditto.
11269 (ceil<mode>2): Ditto.
11270 (lceil<mode><mmxintvecmodelower>2): Ditto.
11271 (round<mode>2): Ditto.
11272 (lround<mode><mmxintvecmodelower>2): Ditto.
11273 * config/i386/sse.md (lrint<mode><sseintvecmodelower>2): Ditto.
11274 (lfloor<mode><sseintvecmodelower>2): Ditto.
11275 (lceil<mode><sseintvecmodelower>2): Ditto.
11276 (lround<mode><sseintvecmodelower>2): Ditto.
11277 (sse4_1_round<ssescalarmodesuffix>): Extend to V8HF.
11278 (round<mode>2): Extend to V8HF/V16HF/V32HF.
11280 2023-10-15 Tobias Burnus <tobias@codesourcery.com>
11282 * doc/invoke.texi (-fopenacc, -fopenmp, -fopenmp-simd): Use @samp not
11283 @code; document more completely the supported Fortran sentinels.
11285 2023-10-15 Roger Sayle <roger@nextmovesoftware.com>
11287 * optabs.cc (expand_subword_shift): Call simplify_expand_binop
11288 instead of expand_binop. Optimize cases (i.e. avoid generating
11289 RTL) when CARRIES or INTO_INPUT is zero. Use one_cmpl_optab
11290 (i.e. NOT) instead of xor_optab with ~0 to calculate ~OP1.
11292 2023-10-15 Jakub Jelinek <jakub@redhat.com>
11294 PR tree-optimization/111800
11295 * wide-int-print.h (print_dec_buf_size, print_decs_buf_size,
11296 print_decu_buf_size, print_hex_buf_size): New inline functions.
11297 * wide-int.cc (assert_deceq): Use print_dec_buf_size.
11298 (assert_hexeq): Use print_hex_buf_size.
11299 * wide-int-print.cc (print_decs): Use print_decs_buf_size.
11300 (print_decu): Use print_decu_buf_size.
11301 (print_hex): Use print_hex_buf_size.
11302 (pp_wide_int_large): Use print_dec_buf_size.
11303 * value-range.cc (irange_bitmask::dump): Use print_hex_buf_size.
11304 * value-range-pretty-print.cc (vrange_printer::print_irange_bitmasks):
11306 * tree-ssa-loop-niter.cc (do_warn_aggressive_loop_optimizations): Use
11307 print_dec_buf_size. Use TYPE_SIGN macro in print_dec call argument.
11309 2023-10-15 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
11311 * combine.cc (simplify_compare_const): Fix handling of unsigned
11314 2023-10-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11316 * config/riscv/vector-iterators.md: Fix vsingle incorrect attribute for RVVM2x2QI.
11318 2023-10-14 Tobias Burnus <tobias@codesourcery.com>
11320 * gimplify.cc (gimplify_bind_expr): Handle Fortran's
11321 'omp allocate' for stack variables.
11323 2023-10-14 Jakub Jelinek <jakub@redhat.com>
11326 * tree-core.h (struct tree_base): Remove int_length.offset
11327 member, change type of int_length.unextended and int_length.extended
11328 from unsigned char to unsigned short.
11329 * tree.h (TREE_INT_CST_OFFSET_NUNITS): Remove.
11330 (wi::extended_tree <N>::get_len): Don't use TREE_INT_CST_OFFSET_NUNITS,
11331 instead compute it at runtime from TREE_INT_CST_EXT_NUNITS and
11332 TREE_INT_CST_NUNITS.
11333 * tree.cc (wide_int_to_tree_1): Don't assert
11334 TREE_INT_CST_OFFSET_NUNITS value.
11335 (make_int_cst): Don't initialize TREE_INT_CST_OFFSET_NUNITS.
11336 * wide-int.h (WIDE_INT_MAX_ELTS): Change from 255 to 1024.
11337 (WIDEST_INT_MAX_ELTS): Change from 510 to 2048, adjust comment.
11338 (trailing_wide_int_storage): Change m_len type from unsigned char *
11339 to unsigned short *.
11340 (trailing_wide_int_storage::trailing_wide_int_storage): Change second
11341 argument from unsigned char * to unsigned short *.
11342 (trailing_wide_ints): Change m_max_len type from unsigned char to
11343 unsigned short. Change m_len element type from
11344 struct{unsigned char len;} to unsigned short.
11345 (trailing_wide_ints <N>::operator []): Remove .len from m_len
11347 * value-range-storage.h (irange_storage::lengths_address): Change
11348 return type from const unsigned char * to const unsigned short *.
11349 (irange_storage::write_lengths_address): Change return type from
11350 unsigned char * to unsigned short *.
11351 * value-range-storage.cc (irange_storage::write_lengths_address):
11353 (irange_storage::lengths_address): Change return type from
11354 const unsigned char * to const unsigned short *.
11355 (write_wide_int): Change len argument type from unsigned char *&
11356 to unsigned short *&.
11357 (irange_storage::set_irange): Change len variable type from
11358 unsigned char * to unsigned short *.
11359 (read_wide_int): Change len argument type from unsigned char to
11360 unsigned short. Use trailing_wide_int_storage <unsigned short>
11361 instead of trailing_wide_int_storage and
11362 trailing_wide_int <unsigned short> instead of trailing_wide_int.
11363 (irange_storage::get_irange): Change len variable type from
11364 unsigned char * to unsigned short *.
11365 (irange_storage::size): Multiply n by sizeof (unsigned short)
11366 in len_size variable initialization.
11367 (irange_storage::dump): Change len variable type from
11368 unsigned char * to unsigned short *.
11370 2023-10-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11372 * config/riscv/vector-iterators.md: Remove redundant iterators.
11374 2023-10-13 Andrew MacLeod <amacleod@redhat.com>
11376 PR tree-optimization/111622
11377 * value-relation.cc (equiv_oracle::add_partial_equiv): Do not
11378 register a partial equivalence if an operand has no uses.
11380 2023-10-13 Richard Biener <rguenther@suse.de>
11382 PR tree-optimization/111795
11383 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Handle
11384 integer mode mask arguments.
11386 2023-10-13 Richard Biener <rguenther@suse.de>
11388 * tree-vect-slp.cc (mask_call_maps): New.
11389 (vect_get_operand_map): Handle IFN_MASK_CALL.
11390 (vect_build_slp_tree_1): Likewise.
11391 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Handle
11394 2023-10-13 Richard Biener <rguenther@suse.de>
11396 PR tree-optimization/111779
11397 * tree-sra.cc (sra_handled_bf_read_p): New function.
11398 (build_access_from_expr_1): Handle some BIT_FIELD_REFs.
11399 (sra_modify_expr): Likewise.
11400 (make_fancy_name_1): Skip over BIT_FIELD_REF.
11402 2023-10-13 Richard Biener <rguenther@suse.de>
11404 PR tree-optimization/111773
11405 * tree-ssa-dce.cc (mark_stmt_if_obviously_necessary): Do
11406 not elide noreturn calls that are reflected to the IL.
11408 2023-10-13 Kito Cheng <kito.cheng@sifive.com>
11410 * config/riscv/riscv.cc (riscv_legitimize_poly_move): Bump
11412 * config/riscv/riscv.h (MAX_POLY_VARIANT): New.
11414 2023-10-13 Pan Li <pan2.li@intel.com>
11416 * config/riscv/autovec.md (lfloor<mode><v_i_l_ll_convert>2): New
11417 pattern for lfloor/lfloorf.
11418 * config/riscv/riscv-protos.h (enum insn_type): New enum value.
11419 (expand_vec_lfloor): New func decl for expanding lfloor.
11420 * config/riscv/riscv-v.cc (expand_vec_lfloor): New func impl
11421 for expanding lfloor.
11423 2023-10-13 Pan Li <pan2.li@intel.com>
11425 * config/riscv/autovec.md (lceil<mode><v_i_l_ll_convert>2): New
11426 pattern] for lceil/lceilf.
11427 * config/riscv/riscv-protos.h (enum insn_type): New enum value.
11428 (expand_vec_lceil): New func decl for expanding lceil.
11429 * config/riscv/riscv-v.cc (expand_vec_lceil): New func impl
11430 for expanding lceil.
11432 2023-10-12 Michael Meissner <meissner@linux.ibm.com>
11435 * config/rs6000/rs6000.cc (can_be_built_by_li_lis_and_rldicl): Protect
11436 code from shifts that are undefined.
11437 (can_be_built_by_li_lis_and_rldicr): Likewise.
11438 (can_be_built_by_li_and_rldic): Protect code from shifts that
11439 undefined. Also replace uses of 1ULL with HOST_WIDE_INT_1U.
11441 2023-10-12 Alex Coplan <alex.coplan@arm.com>
11443 * reg-notes.def (NOALIAS): Correct comment.
11445 2023-10-12 Jakub Jelinek <jakub@redhat.com>
11447 PR bootstrap/111787
11448 * tree.h (wi::int_traits <unextended_tree>::needs_write_val_arg): New
11449 static data member.
11450 (int_traits <extended_tree <N>>::needs_write_val_arg): Likewise.
11451 (wi::ints_for): Provide separate partial specializations for
11452 generic_wide_int <extended_tree <N>> and INL_CONST_PRECISION or that
11453 and CONST_PRECISION, rather than using
11454 int_traits <extended_tree <N> >::precision_type as the second template
11456 * rtl.h (wi::int_traits <rtx_mode_t>::needs_write_val_arg): New
11457 static data member.
11458 * double-int.h (wi::int_traits <double_int>::needs_write_val_arg):
11461 2023-10-12 Mary Bennett <mary.bennett@embecosm.com>
11463 PR middle-end/111777
11464 * doc/extend.texi: Change subsubsection to subsection for
11467 2023-10-12 Tamar Christina <tamar.christina@arm.com>
11469 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Add undef.
11471 2023-10-12 Jakub Jelinek <jakub@redhat.com>
11473 * wide-int.h (widest_int_storage <N>::write_val): If l is small
11474 and there is space in u.val array, store a canary value at the
11476 (widest_int_storage <N>::set_len): Check the canary hasn't been
11479 2023-10-12 Jakub Jelinek <jakub@redhat.com>
11482 * wide-int.h: Adjust file comment.
11483 (WIDE_INT_MAX_INL_ELTS): Define to former value of WIDE_INT_MAX_ELTS.
11484 (WIDE_INT_MAX_INL_PRECISION): Define.
11485 (WIDE_INT_MAX_ELTS): Change to 255. Assert that WIDE_INT_MAX_INL_ELTS
11486 is smaller than WIDE_INT_MAX_ELTS.
11487 (RWIDE_INT_MAX_ELTS, RWIDE_INT_MAX_PRECISION, WIDEST_INT_MAX_ELTS,
11488 WIDEST_INT_MAX_PRECISION): Define.
11489 (WI_BINARY_RESULT_VAR, WI_UNARY_RESULT_VAR): Change write_val callers
11490 to pass 0 as a new argument.
11491 (class widest_int_storage): Likewise.
11492 (widest_int, widest2_int): Change typedefs to use widest_int_storage
11493 rather than fixed_wide_int_storage.
11494 (enum wi::precision_type): Add INL_CONST_PRECISION enumerator.
11495 (struct binary_traits): Add partial specializations for
11496 INL_CONST_PRECISION.
11497 (generic_wide_int): Add needs_write_val_arg static data member.
11498 (int_traits): Likewise.
11499 (wide_int_storage): Replace val non-static data member with a union
11500 u of it and HOST_WIDE_INT *valp. Declare copy constructor, copy
11501 assignment operator and destructor. Add unsigned int argument to
11503 (wide_int_storage::wide_int_storage): Initialize precision to 0
11504 in the default ctor. Remove unnecessary {}s around STATIC_ASSERTs.
11505 Assert in non-default ctor T's precision_type is not
11506 INL_CONST_PRECISION and allocate u.valp for large precision. Add
11508 (wide_int_storage::~wide_int_storage): New.
11509 (wide_int_storage::operator=): Add copy assignment operator. In
11510 assignment operator remove unnecessary {}s around STATIC_ASSERTs,
11511 assert ctor T's precision_type is not INL_CONST_PRECISION and
11512 if precision changes, deallocate and/or allocate u.valp.
11513 (wide_int_storage::get_val): Return u.valp rather than u.val for
11515 (wide_int_storage::write_val): Likewise. Add an unused unsigned int
11517 (wide_int_storage::set_len): Use write_val instead of writing val
11519 (wide_int_storage::from, wide_int_storage::from_array): Adjust
11521 (wide_int_storage::create): Allocate u.valp for large precisions.
11522 (wi::int_traits <wide_int_storage>::get_binary_precision): New.
11523 (fixed_wide_int_storage::fixed_wide_int_storage): Make default
11525 (fixed_wide_int_storage::write_val): Add unused unsigned int argument.
11526 (fixed_wide_int_storage::from, fixed_wide_int_storage::from_array):
11527 Adjust write_val callers.
11528 (wi::int_traits <fixed_wide_int_storage>::get_binary_precision): New.
11529 (WIDEST_INT): Define.
11530 (widest_int_storage): New template class.
11531 (wi::int_traits <widest_int_storage>): New.
11532 (trailing_wide_int_storage::write_val): Add unused unsigned int
11534 (wi::get_binary_precision): Use
11535 wi::int_traits <WI_BINARY_RESULT (T1, T2)>::get_binary_precision
11536 rather than get_precision on get_binary_result.
11537 (wi::copy): Adjust write_val callers. Don't call set_len if
11538 needs_write_val_arg.
11539 (wi::bit_not): If result.needs_write_val_arg, call write_val
11540 again with upper bound estimate of len.
11541 (wi::sext, wi::zext, wi::set_bit): Likewise.
11542 (wi::bit_and, wi::bit_and_not, wi::bit_or, wi::bit_or_not,
11543 wi::bit_xor, wi::add, wi::sub, wi::mul, wi::mul_high, wi::div_trunc,
11544 wi::div_floor, wi::div_ceil, wi::div_round, wi::divmod_trunc,
11545 wi::mod_trunc, wi::mod_floor, wi::mod_ceil, wi::mod_round,
11546 wi::lshift, wi::lrshift, wi::arshift): Likewise.
11547 (wi::bswap, wi::bitreverse): Assert result.needs_write_val_arg
11549 (gt_ggc_mx, gt_pch_nx): Remove generic template for all
11550 generic_wide_int, instead add functions and templates for each
11551 storage of generic_wide_int. Make functions for
11552 generic_wide_int <wide_int_storage> and templates for
11553 generic_wide_int <widest_int_storage <N>> deleted.
11554 (wi::mask, wi::shifted_mask): Adjust write_val calls.
11555 * wide-int.cc (zeros): Decrease array size to 1.
11556 (BLOCKS_NEEDED): Use CEIL.
11557 (canonize): Use HOST_WIDE_INT_M1.
11558 (wi::from_buffer): Pass 0 to write_val.
11559 (wi::to_mpz): Use CEIL.
11560 (wi::from_mpz): Likewise. Pass 0 to write_val. Use
11561 WIDE_INT_MAX_INL_ELTS instead of WIDE_INT_MAX_ELTS.
11562 (wi::mul_internal): Use WIDE_INT_MAX_INL_PRECISION instead of
11563 MAX_BITSIZE_MODE_ANY_INT in automatic array sizes, for prec
11564 above WIDE_INT_MAX_INL_PRECISION estimate precision from
11565 lengths of operands. Use XALLOCAVEC allocated buffers for
11566 prec above WIDE_INT_MAX_INL_PRECISION.
11567 (wi::divmod_internal): Likewise.
11568 (wi::lshift_large): For len > WIDE_INT_MAX_INL_ELTS estimate
11569 it from xlen and skip.
11570 (rshift_large_common): Remove xprecision argument, add len
11571 argument with len computed in caller. Don't return anything.
11572 (wi::lrshift_large, wi::arshift_large): Compute len here
11573 and pass it to rshift_large_common, for lengths above
11574 WIDE_INT_MAX_INL_ELTS using estimations from xlen if possible.
11575 (assert_deceq, assert_hexeq): For lengths above
11576 WIDE_INT_MAX_INL_ELTS use XALLOCAVEC allocated buffer.
11577 (test_printing): Use WIDE_INT_MAX_INL_PRECISION instead of
11578 WIDE_INT_MAX_PRECISION.
11579 * wide-int-print.h (WIDE_INT_PRINT_BUFFER_SIZE): Use
11580 WIDE_INT_MAX_INL_PRECISION instead of WIDE_INT_MAX_PRECISION.
11581 * wide-int-print.cc (print_decs, print_decu, print_hex): For
11582 lengths above WIDE_INT_MAX_INL_ELTS use XALLOCAVEC allocated buffer.
11583 * tree.h (wi::int_traits<extended_tree <N>>): Change precision_type
11584 to INL_CONST_PRECISION for N == ADDR_MAX_PRECISION.
11585 (widest_extended_tree): Use WIDEST_INT_MAX_PRECISION instead of
11586 WIDE_INT_MAX_PRECISION.
11587 (wi::ints_for): Use int_traits <extended_tree <N> >::precision_type
11588 instead of hard coded CONST_PRECISION.
11589 (widest2_int_cst): Use WIDEST_INT_MAX_PRECISION instead of
11590 WIDE_INT_MAX_PRECISION.
11591 (wi::extended_tree <N>::get_len): Use WIDEST_INT_MAX_PRECISION rather
11592 than WIDE_INT_MAX_PRECISION.
11593 (wi::ints_for::zero): Use
11594 wi::int_traits <wi::extended_tree <N> >::precision_type instead of
11595 wi::CONST_PRECISION.
11596 * tree.cc (build_replicated_int_cst): Formatting fix. Use
11597 WIDE_INT_MAX_INL_ELTS rather than WIDE_INT_MAX_ELTS.
11598 * print-tree.cc (print_node): Don't print TREE_UNAVAILABLE on
11599 INTEGER_CSTs, TREE_VECs or SSA_NAMEs.
11600 * double-int.h (wi::int_traits <double_int>::precision_type): Change
11601 to INL_CONST_PRECISION from CONST_PRECISION.
11602 * poly-int.h (struct poly_coeff_traits): Add partial specialization
11603 for wi::INL_CONST_PRECISION.
11604 * cfgloop.h (bound_wide_int): New typedef.
11605 (struct nb_iter_bound): Change bound type from widest_int to
11607 (struct loop): Change nb_iterations_upper_bound,
11608 nb_iterations_likely_upper_bound and nb_iterations_estimate type from
11609 widest_int to bound_wide_int.
11610 * cfgloop.cc (record_niter_bound): Return early if wi::min_precision
11611 of i_bound is too large for bound_wide_int. Adjustments for the
11612 widest_int to bound_wide_int type change in non-static data members.
11613 (get_estimated_loop_iterations, get_max_loop_iterations,
11614 get_likely_max_loop_iterations): Adjustments for the widest_int to
11615 bound_wide_int type change in non-static data members.
11616 * tree-vect-loop.cc (vect_transform_loop): Likewise.
11617 * tree-ssa-loop-niter.cc (do_warn_aggressive_loop_optimizations): Use
11618 XALLOCAVEC allocated buffer for i_bound len above
11619 WIDE_INT_MAX_INL_ELTS.
11620 (record_estimate): Return early if wi::min_precision of i_bound is too
11621 large for bound_wide_int. Adjustments for the widest_int to
11622 bound_wide_int type change in non-static data members.
11623 (wide_int_cmp): Use bound_wide_int instead of widest_int.
11624 (bound_index): Use bound_wide_int instead of widest_int.
11625 (discover_iteration_bound_by_body_walk): Likewise. Use
11626 widest_int::from to convert it to widest_int when passed to
11627 record_niter_bound.
11628 (maybe_lower_iteration_bound): Use widest_int::from to convert it to
11629 widest_int when passed to record_niter_bound.
11630 (estimate_numbers_of_iteration): Don't record upper bound if
11631 loop->nb_iterations has too large precision for bound_wide_int.
11632 (n_of_executions_at_most): Use widest_int::from.
11633 * tree-ssa-loop-ivcanon.cc (remove_redundant_iv_tests): Adjust for
11634 the widest_int to bound_wide_int changes.
11635 * match.pd (fold_sign_changed_comparison simplification): Use
11636 wide_int::from on wi::to_wide instead of wi::to_widest.
11637 * value-range.h (irange::maybe_resize): Avoid using memcpy on
11638 non-trivially copyable elements.
11639 * value-range.cc (irange_bitmask::dump): Use XALLOCAVEC allocated
11640 buffer for mask or value len above WIDE_INT_PRINT_BUFFER_SIZE.
11641 * fold-const.cc (fold_convert_const_int_from_int, fold_unary_loc):
11642 Use wide_int::from on wi::to_wide instead of wi::to_widest.
11643 * tree-ssa-ccp.cc (bit_value_binop): Zero extend r1max from width
11644 before calling wi::udiv_trunc.
11645 * lto-streamer-out.cc (output_cfg): Adjustments for the widest_int to
11646 bound_wide_int type change in non-static data members.
11647 * lto-streamer-in.cc (input_cfg): Likewise.
11648 (lto_input_tree_1): Use WIDE_INT_MAX_INL_ELTS rather than
11649 WIDE_INT_MAX_ELTS. For length above WIDE_INT_MAX_INL_ELTS use
11650 XALLOCAVEC allocated buffer. Formatting fix.
11651 * data-streamer-in.cc (streamer_read_wide_int,
11652 streamer_read_widest_int): Likewise.
11653 * tree-affine.cc (aff_combination_expand): Use placement new to
11654 construct name_expansion.
11655 (free_name_expansion): Destruct name_expansion.
11656 * gimple-ssa-strength-reduction.cc (struct slsr_cand_d): Change
11657 index type from widest_int to offset_int.
11658 (class incr_info_d): Change incr type from widest_int to offset_int.
11659 (alloc_cand_and_find_basis, backtrace_base_for_ref,
11660 restructure_reference, slsr_process_ref, create_mul_ssa_cand,
11661 create_mul_imm_cand, create_add_ssa_cand, create_add_imm_cand,
11662 slsr_process_add, cand_abs_increment, replace_mult_candidate,
11663 replace_unconditional_candidate, incr_vec_index,
11664 create_add_on_incoming_edge, create_phi_basis_1,
11665 replace_conditional_candidate, record_increment,
11666 record_phi_increments_1, phi_incr_cost_1, phi_incr_cost,
11667 lowest_cost_path, total_savings, ncd_with_phi, ncd_of_cand_and_phis,
11668 nearest_common_dominator_for_cands, insert_initializers,
11669 all_phi_incrs_profitable_1, replace_one_candidate,
11670 replace_profitable_candidates): Use offset_int rather than widest_int
11671 and wi::to_offset rather than wi::to_widest.
11672 * real.cc (real_to_integer): Use WIDE_INT_MAX_INL_ELTS rather than
11673 2 * WIDE_INT_MAX_ELTS and for words above that use XALLOCAVEC
11675 * tree-ssa-loop-ivopts.cc (niter_for_exit): Use placement new
11676 to construct tree_niter_desc and destruct it on failure.
11677 (free_tree_niter_desc): Destruct tree_niter_desc if value is non-NULL.
11678 * gengtype.cc (main): Remove widest_int handling.
11679 * graphite-isl-ast-to-gimple.cc (widest_int_from_isl_expr_int): Use
11680 WIDEST_INT_MAX_ELTS instead of WIDE_INT_MAX_ELTS.
11681 * gimple-ssa-warn-alloca.cc (pass_walloca::execute): Use
11682 WIDE_INT_MAX_INL_PRECISION instead of WIDE_INT_MAX_PRECISION and
11683 assert get_len () fits into it.
11684 * value-range-pretty-print.cc (vrange_printer::print_irange_bitmasks):
11685 For mask or value lengths above WIDE_INT_MAX_INL_ELTS use XALLOCAVEC
11687 * gimple-ssa-sprintf.cc (adjust_range_for_overflow): Use
11688 wide_int::from on wi::to_wide instead of wi::to_widest.
11689 * omp-general.cc (score_wide_int): New typedef.
11690 (omp_context_compute_score): Use score_wide_int instead of widest_int
11691 and adjust for those changes.
11692 (struct omp_declare_variant_entry): Change score and
11693 score_in_declare_simd_clone non-static data member type from widest_int
11695 (omp_resolve_late_declare_variant, omp_resolve_declare_variant): Use
11696 score_wide_int instead of widest_int and adjust for those changes.
11697 (omp_lto_output_declare_variant_alt): Likewise.
11698 (omp_lto_input_declare_variant_alt): Likewise.
11699 * godump.cc (go_output_typedef): Assert get_len () is smaller than
11700 WIDE_INT_MAX_INL_ELTS.
11702 2023-10-12 Pan Li <pan2.li@intel.com>
11704 * config/riscv/autovec.md (lround<mode><v_i_l_ll_convert>2): New
11705 pattern for lround/lroundf.
11706 * config/riscv/riscv-protos.h (enum insn_type): New enum value.
11707 (expand_vec_lround): New func decl for expanding lround.
11708 * config/riscv/riscv-v.cc (expand_vec_lround): New func impl
11709 for expanding lround.
11711 2023-10-12 Jakub Jelinek <jakub@redhat.com>
11713 * dwarf2out.h (wide_int_ptr): Remove.
11714 (dw_wide_int_ptr): New typedef.
11715 (struct dw_val_node): Change type of val_wide from wide_int_ptr
11716 to dw_wide_int_ptr.
11717 (struct dw_wide_int): New type.
11718 (dw_wide_int::elt): New method.
11719 (dw_wide_int::operator ==): Likewise.
11720 * dwarf2out.cc (get_full_len): Change argument type to
11721 const dw_wide_int & from const wide_int &. Use CEIL. Call
11722 get_precision method instead of calling wi::get_precision.
11723 (alloc_dw_wide_int): New function.
11724 (add_AT_wide): Change w argument type to const wide_int_ref &
11725 from const wide_int &. Use alloc_dw_wide_int.
11726 (mem_loc_descriptor, loc_descriptor): Use alloc_dw_wide_int.
11727 (insert_wide_int): Change val argument type to const wide_int_ref &
11728 from const wide_int &.
11729 (add_const_value_attribute): Pass rtx_mode_t temporary directly to
11730 add_AT_wide instead of using a temporary variable.
11732 2023-10-12 Richard Biener <rguenther@suse.de>
11734 PR tree-optimization/111764
11735 * tree-vect-loop.cc (check_reduction_path): Remove the attempt
11736 to allow x + x via special-casing of assigns.
11738 2023-10-12 Hu, Lin1 <lin1.hu@intel.com>
11740 * common/config/i386/cpuinfo.h (get_available_features):
11742 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_USER_MSR_SET): New.
11743 (OPTION_MASK_ISA2_USER_MSR_UNSET): Ditto.
11744 (ix86_handle_option): Handle -musermsr.
11745 * common/config/i386/i386-cpuinfo.h (enum processor_features):
11746 Add FEATURE_USER_MSR.
11747 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for usermsr.
11748 * config.gcc: Add usermsrintrin.h
11749 * config/i386/cpuid.h (bit_USER_MSR): New.
11750 * config/i386/i386-builtin-types.def:
11751 Add DEF_FUNCTION_TYPE (VOID, UINT64, UINT64).
11752 * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
11753 Add __builtin_urdmsr and __builtin_uwrmsr.
11754 * config/i386/i386-builtins.h (ix86_builtins):
11755 Add IX86_BUILTIN_URDMSR and IX86_BUILTIN_UWRMSR.
11756 * config/i386/i386-c.cc (ix86_target_macros_internal):
11757 Define __USER_MSR__.
11758 * config/i386/i386-expand.cc (ix86_expand_builtin):
11759 Handle new builtins.
11760 * config/i386/i386-isa.def (USER_MSR): Add DEF_PTA(USER_MSR).
11761 * config/i386/i386-options.cc (ix86_valid_target_attribute_inner_p):
11763 * config/i386/i386.md (urdmsr): New define_insn.
11765 * config/i386/i386.opt: Add option -musermsr.
11766 * config/i386/x86gprintrin.h: Include usermsrintrin.h
11767 * doc/extend.texi: Document usermsr.
11768 * doc/invoke.texi: Document -musermsr.
11769 * doc/sourcebuild.texi: Document target usermsr.
11770 * config/i386/usermsrintrin.h: New file.
11772 2023-10-12 Yang Yujie <yangyujie@loongson.cn>
11774 * config.gcc: Add loongarch-driver.h to tm_files.
11775 * config/loongarch/loongarch.h: Do not include loongarch-driver.h.
11776 * config/loongarch/t-loongarch: Append loongarch-multilib.h to $(GTM_H)
11777 instead of $(TM_H) for building generator programs.
11779 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
11782 * config/rs6000/rs6000.md (stack_protect_setsi): Support prefixed
11783 instruction emission and incorporate to stack_protect_set<mode>.
11784 (stack_protect_setdi): Rename to ...
11785 (stack_protect_set<mode>): ... this, adjust constraint.
11786 (stack_protect_testsi): Support prefixed instruction emission and
11787 incorporate to stack_protect_test<mode>.
11788 (stack_protect_testdi): Rename to ...
11789 (stack_protect_test<mode>): ... this, adjust constraint.
11791 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
11793 * tree-vect-stmts.cc (vectorizable_store): Consider generated
11794 VEC_PERM_EXPR stmt for VMAT_CONTIGUOUS_REVERSE in costing as
11797 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
11799 * tree-vect-stmts.cc (vect_model_store_cost): Remove.
11800 (vectorizable_store): Adjust the costing for the remaining memory
11801 access types VMAT_CONTIGUOUS{, _DOWN, _REVERSE}.
11803 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
11805 * tree-vect-stmts.cc (vect_model_store_cost): Assert it will never
11806 get VMAT_CONTIGUOUS_PERMUTE and remove VMAT_CONTIGUOUS_PERMUTE related
11808 (vectorizable_store): Adjust the cost handling on
11809 VMAT_CONTIGUOUS_PERMUTE without calling vect_model_store_cost.
11811 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
11813 * tree-vect-stmts.cc (vect_model_store_cost): Assert it will never
11814 get VMAT_LOAD_STORE_LANES.
11815 (vectorizable_store): Adjust the cost handling on VMAT_LOAD_STORE_LANES
11816 without calling vect_model_store_cost. Factor out new lambda function
11817 update_prologue_cost.
11819 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
11821 * tree-vect-stmts.cc (vect_model_store_cost): Assert it won't get
11822 VMAT_ELEMENTWISE and VMAT_STRIDED_SLP any more, and remove their
11824 (vectorizable_store): Adjust the cost handling on VMAT_ELEMENTWISE
11825 and VMAT_STRIDED_SLP without calling vect_model_store_cost.
11827 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
11829 * tree-vect-stmts.cc (vectorizable_store): Adjust costing on
11830 vectorizable_scan_store without calling vect_model_store_cost
11833 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
11835 * tree-vect-stmts.cc (vect_model_store_cost): Assert it won't get
11836 VMAT_GATHER_SCATTER any more, remove VMAT_GATHER_SCATTER related
11837 handlings and the related parameter gs_info.
11838 (vect_build_scatter_store_calls): Add the handlings on costing with
11839 one more argument cost_vec.
11840 (vectorizable_store): Adjust the cost handling on VMAT_GATHER_SCATTER
11841 without calling vect_model_store_cost any more.
11843 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
11845 * tree-vect-stmts.cc (vectorizable_store): Move and duplicate the call
11846 to vect_model_store_cost down to some different transform paths
11847 according to the handlings of different vect_memory_access_types
11848 or some special handling need.
11850 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
11852 * tree-vect-stmts.cc (vectorizable_store): Ensure the generated
11853 vector store for some case of VMAT_ELEMENTWISE is supported.
11855 2023-10-12 Mo, Zewei <zewei.mo@intel.com>
11856 Hu Lin1 <lin1.hu@intel.com>
11857 Hongyu Wang <hongyu.wang@intel.com>
11859 * config/i386/i386.cc (gen_push2): New function to emit push2
11860 and adjust cfa offset.
11861 (ix86_pro_and_epilogue_can_use_push2_pop2): New function to
11862 determine whether push2/pop2 can be used.
11863 (ix86_compute_frame_layout): Adjust preferred stack boundary
11864 and stack alignment needed for push2/pop2.
11865 (ix86_emit_save_regs): Emit push2 when available.
11866 (ix86_emit_restore_reg_using_pop2): New function to emit pop2
11867 and adjust cfa info.
11868 (ix86_emit_restore_regs_using_pop2): New function to loop
11869 through the saved regs and call above.
11870 (ix86_expand_epilogue): Call ix86_emit_restore_regs_using_pop2
11871 when push2pop2 available.
11872 * config/i386/i386.md (push2_di): New pattern for push2.
11873 (pop2_di): Likewise for pop2.
11875 2023-10-12 Pan Li <pan2.li@intel.com>
11877 * config/riscv/autovec.md (lrint<mode><vlconvert>2): Rename from.
11878 (lrint<mode><v_i_l_ll_convert>2): Rename to.
11879 * config/riscv/vector-iterators.md: Rename and remove TARGET_64BIT.
11881 2023-10-11 Kito Cheng <kito.cheng@sifive.com>
11883 * config/riscv/riscv-opts.h (TARGET_MIN_VLEN_OPTS): New.
11885 2023-10-11 Jeff Law <jlaw@ventanamicro.com>
11887 * config/riscv/riscv.md (jump): Adjust sequence to use a "jump"
11888 pseudo op instead of a "call" pseudo op.
11890 2023-10-11 Kito Cheng <kito.cheng@sifive.com>
11892 * config/riscv/riscv-subset.h (riscv_subset_list::parse_single_std_ext):
11894 (riscv_subset_list::parse_single_multiletter_ext): Ditto.
11895 (riscv_subset_list::clone): Ditto.
11896 (riscv_subset_list::parse_single_ext): Ditto.
11897 (riscv_subset_list::set_loc): Ditto.
11898 (riscv_set_arch_by_subset_list): Ditto.
11899 * common/config/riscv/riscv-common.cc
11900 (riscv_subset_list::parse_single_std_ext): New.
11901 (riscv_subset_list::parse_single_multiletter_ext): Ditto.
11902 (riscv_subset_list::clone): Ditto.
11903 (riscv_subset_list::parse_single_ext): Ditto.
11904 (riscv_subset_list::set_loc): Ditto.
11905 (riscv_set_arch_by_subset_list): Ditto.
11907 2023-10-11 Kito Cheng <kito.cheng@sifive.com>
11909 * config/riscv/riscv.cc (riscv_convert_vector_bits): Get setting
11910 from argument rather than get setting from global setting.
11911 (riscv_override_options_internal): New, splited from
11912 riscv_override_options, also take a gcc_options argument.
11913 (riscv_option_override): Splited most part to
11914 riscv_override_options_internal.
11916 2023-10-11 Kito Cheng <kito.cheng@sifive.com>
11918 * doc/options.texi (Mask): Document TARGET_<NAME>_P and
11919 TARGET_<NAME>_OPTS_P.
11920 (InverseMask): Ditto.
11921 * opth-gen.awk (Mask): Generate TARGET_<NAME>_P and
11922 TARGET_<NAME>_OPTS_P macro.
11923 (InverseMask): Ditto.
11925 2023-10-11 Andrew Pinski <pinskia@gmail.com>
11927 PR tree-optimization/111282
11928 * match.pd (`a & ~(a ^ b)`, `a & (a == b)`,
11929 `a & ((~a) ^ b)`): New patterns.
11931 2023-10-11 Mary Bennett <mary.bennett@embecosm.com>
11933 * common/config/riscv/riscv-common.cc: Add the XCValu
11935 * config/riscv/constraints.md: Add builtins for the XCValu
11937 * config/riscv/predicates.md (immediate_register_operand):
11939 * config/riscv/corev.def: Likewise.
11940 * config/riscv/corev.md: Likewise.
11941 * config/riscv/riscv-builtins.cc (AVAIL): Likewise.
11942 (RISCV_ATYPE_UHI): Likewise.
11943 * config/riscv/riscv-ftypes.def: Likewise.
11944 * config/riscv/riscv.opt: Likewise.
11945 * config/riscv/riscv.cc (riscv_print_operand): Likewise.
11946 * doc/extend.texi: Add XCValu documentation.
11947 * doc/sourcebuild.texi: Likewise.
11949 2023-10-11 Mary Bennett <mary.bennett@embecosm.com>
11951 * common/config/riscv/riscv-common.cc: Add XCVmac.
11952 * config/riscv/riscv-ftypes.def: Add XCVmac builtins.
11953 * config/riscv/riscv-builtins.cc: Likewise.
11954 * config/riscv/riscv.md: Likewise.
11955 * config/riscv/riscv.opt: Likewise.
11956 * doc/extend.texi: Add XCVmac builtin documentation.
11957 * doc/sourcebuild.texi: Likewise.
11958 * config/riscv/corev.def: New file.
11959 * config/riscv/corev.md: New file.
11961 2023-10-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11963 * config/riscv/autovec.md: Fix index bug.
11964 * config/riscv/riscv-protos.h (gather_scatter_valid_offset_mode_p): New function.
11965 * config/riscv/riscv-v.cc (expand_gather_scatter): Fix index bug.
11966 (gather_scatter_valid_offset_mode_p): New function.
11968 2023-10-11 Pan Li <pan2.li@intel.com>
11970 * config/riscv/autovec.md (lrint<mode><vlconvert>2): New pattern
11972 * config/riscv/riscv-protos.h (expand_vec_lrint): New func decl
11973 for expanding lint.
11974 * config/riscv/riscv-v.cc (emit_vec_cvt_x_f): New helper func impl
11976 (expand_vec_lrint): New function impl for expanding lint.
11977 * config/riscv/vector-iterators.md: New mode attr and iterator.
11979 2023-10-11 Richard Biener <rguenther@suse.de>
11980 Jakub Jelinek <jakub@redhat.com>
11982 PR tree-optimization/111519
11983 * tree-ssa-strlen.cc (strlen_pass::count_nonzero_bytes): Add vuse
11984 argument and pass it through to recursive calls and
11985 count_nonzero_bytes_addr calls. Don't shadow the stmt argument, but
11986 change stmt for gimple_assign_single_p statements for which we don't
11988 (strlen_pass::count_nonzero_bytes_addr): Add vuse argument and pass
11989 it through to recursive calls and count_nonzero_bytes calls. Don't
11990 use get_strinfo if gimple_vuse (stmt) is different from vuse. Don't
11991 shadow the stmt argument.
11993 2023-10-11 Roger Sayle <roger@nextmovesoftware.com>
11995 PR middle-end/101955
11996 PR tree-optimization/106245
11997 * simplify-rtx.cc (simplify_relational_operation_1): Simplify
11998 the RTL (ne:SI (subreg:QI (ashift:SI x 7) 0) 0) to (and:SI x 1).
12000 2023-10-11 liuhongt <hongtao.liu@intel.com>
12003 * config/i386/mmx.md (divv4hf3): Refine predicate of
12004 operands[2] with register_operand.
12006 2023-10-10 Andrew Waterman <andrew@sifive.com>
12007 Philipp Tomsich <philipp.tomsich@vrull.eu>
12008 Jeff Law <jlaw@ventanamicro.com>
12010 * config/riscv/riscv.cc (struct machine_function): Track if a
12011 far-branch/jump is used within a function (and $ra needs to be
12013 (riscv_print_operand): Implement 'N' (inverse integer branch).
12014 (riscv_far_jump_used_p): Implement.
12015 (riscv_save_return_addr_reg_p): New function.
12016 (riscv_save_reg_p): Use riscv_save_return_addr_reg_p.
12017 * config/riscv/riscv.h (FIXED_REGISTERS): Update $ra.
12018 (CALL_USED_REGISTERS): Update $ra.
12019 * config/riscv/riscv.md: Add new types "ret" and "jalr".
12020 (length attribute): Handle long conditional and unconditional
12022 (conditional branch pattern): Handle case where jump can not
12023 reach the intended target.
12024 (indirect_jump, tablejump): Use new "jalr" type.
12025 (simple_return): Use new "ret" type.
12026 (simple_return_internal, eh_return_internal): Likewise.
12027 (gpr_restore_return, riscv_mret): Likewise.
12028 (riscv_uret, riscv_sret): Likewise.
12029 * config/riscv/generic.md (generic_branch): Also recognize jalr & ret
12031 * config/riscv/sifive-7.md (sifive_7_jump): Likewise.
12033 2023-10-10 Andrew Pinski <pinskia@gmail.com>
12035 PR tree-optimization/111679
12036 * match.pd (`a | ((~a) ^ b)`): New pattern.
12038 2023-10-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12041 * config/riscv/autovec.md: Add VLS BOOL modes.
12043 2023-10-10 Richard Biener <rguenther@suse.de>
12045 PR tree-optimization/111751
12046 * fold-const.cc (fold_view_convert_expr): Up the buffer size
12048 * tree-ssa-sccvn.cc (visit_reference_op_load): Special case
12049 constants, giving up when re-interpretation to the target type
12052 2023-10-10 Richard Biener <rguenther@suse.de>
12054 PR tree-optimization/111751
12055 * tree-ssa-sccvn.cc (visit_reference_op_load): Exempt
12056 BLKmode result from the padding bits check.
12058 2023-10-10 Claudiu Zissulescu <claziss@gmail.com>
12060 * config/arc/arc.cc (arc_select_cc_mode): Match NEG code with
12062 * config/arc/arc.md (addsi_compare): Make pattern canonical.
12063 (addsi_compare_2): Fix identation, constraint letters.
12064 (addsi_compare_3): Likewise.
12066 2023-10-09 Eugene Rozenfeld <erozen@microsoft.com>
12068 * auto-profile.cc (afdo_calculate_branch_prob): Fix count comparisons
12069 * tree-vect-loop-manip.cc (vect_do_peeling): Guard against zero count
12070 when scaling loop profile
12072 2023-10-09 Andrew MacLeod <amacleod@redhat.com>
12074 PR tree-optimization/111694
12075 * gimple-range-cache.cc (ranger_cache::fill_block_cache): Adjust
12077 * value-relation.cc (adjust_equivalence_range): New.
12078 * value-relation.h (adjust_equivalence_range): New prototype.
12080 2023-10-09 Andrew MacLeod <amacleod@redhat.com>
12082 * gimple-range-gori.cc (gori_compute::compute_operand1_range): Do
12083 not call get_identity_relation.
12084 (gori_compute::compute_operand2_range): Ditto.
12085 * value-relation.cc (get_identity_relation): Remove.
12086 * value-relation.h (get_identity_relation): Remove protyotype.
12088 2023-10-09 Robin Dapp <rdapp@ventanamicro.com>
12090 * config/riscv/riscv-cores.def (RISCV_TUNE): Add parameter.
12091 * config/riscv/riscv-opts.h (enum riscv_microarchitecture_type):
12093 * config/riscv/riscv.cc (riscv_sched_adjust_cost): Implement
12095 (TARGET_SCHED_ADJUST_COST): Define.
12096 * config/riscv/riscv.md (no,yes"): Include generic-ooo.md
12097 * config/riscv/riscv.opt: Add -madjust-lmul-cost.
12098 * config/riscv/generic-ooo.md: New file.
12099 * config/riscv/vector.md: Add vsetvl_pre.
12101 2023-10-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12103 * config/riscv/riscv-opts.h (TARGET_VECTOR_MISALIGN_SUPPORTED): New macro.
12104 * config/riscv/riscv.cc (riscv_support_vector_misalignment): Depend on movmisalign pattern.
12105 * config/riscv/vector.md (movmisalign<mode>): New pattern.
12107 2023-10-09 Xianmiao Qu <cooper.qu@linux.alibaba.com>
12109 * config/riscv/thead.cc (th_mempair_save_regs): Fix missing CFI
12110 directives for store-pair instruction.
12112 2023-10-09 Richard Biener <rguenther@suse.de>
12114 PR tree-optimization/111715
12115 * alias.cc (reference_alias_ptr_type_1): When we have
12116 a type-punning ref at the base search for the access
12117 path part that's still semantically valid.
12119 2023-10-09 Pan Li <pan2.li@intel.com>
12121 * config/riscv/riscv-v.cc (shuffle_bswap_pattern): New func impl
12123 (expand_vec_perm_const_1): Add handling for shuffle bswap pattern.
12125 2023-10-09 Roger Sayle <roger@nextmovesoftware.com>
12127 * config/i386/i386-expand.cc (ix86_split_ashr): Split shifts by
12128 one into ashr[sd]i3_carry followed by rcr[sd]i2, if TARGET_USE_RCR
12130 (ix86_split_lshr): Likewise, split shifts by one bit into
12131 lshr[sd]i3_carry followed by rcr[sd]i2, if TARGET_USE_RCR or -Oz.
12132 * config/i386/i386.h (TARGET_USE_RCR): New backend macro.
12133 * config/i386/i386.md (rcrsi2): New define_insn for rcrl.
12134 (rcrdi2): New define_insn for rcrq.
12135 (<anyshiftrt><mode>3_carry): New define_insn for right shifts that
12136 set the carry flag from the least significant bit, modelled using
12138 * config/i386/x86-tune.def (X86_TUNE_USE_RCR): New tuning parameter
12139 controlling use of rcr 1 vs. shrd, which is significantly faster on
12142 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
12144 * config/i386/i386.opt: Allow -mno-evex512.
12146 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
12147 Hu, Lin1 <lin1.hu@intel.com>
12149 * config/i386/sse.md (V48H_AVX512VL): Add TARGET_EVEX512.
12152 (VFH_AVX512VL): Ditto.
12154 (VHF_AVX512VL): Ditto.
12155 (VI2H_AVX512VL): Ditto.
12156 (VI2F_256_512): Ditto.
12157 (VF48_I1248): Remove unused iterator.
12158 (VF48H_AVX512VL): Add TARGET_EVEX512.
12159 (VF_AVX512): Remove unused iterator.
12160 (REDUC_PLUS_MODE): Add TARGET_EVEX512.
12161 (REDUC_SMINMAX_MODE): Ditto.
12163 (VFH_SF_AVX512VL): Ditto.
12164 (VEC_PERM_AVX2): Ditto.
12166 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
12167 Hu, Lin1 <lin1.hu@intel.com>
12169 * config/i386/sse.md (VI1_AVX512VL): Add TARGET_EVEX512.
12171 (VI1_AVX512F): Ditto.
12172 (VI1_AVX512VNNI): Ditto.
12173 (VI1_AVX512VL_F): Ditto.
12174 (VI12_VI48F_AVX512VL): Ditto.
12175 (*avx512f_permvar_truncv32hiv32qi_1): Ditto.
12176 (sdot_prod<mode>): Ditto.
12177 (VEC_PERM_AVX2): Ditto.
12180 (vpmadd52<vpmadd52type>v8di): Ditto.
12181 (usdot_prod<mode>): Ditto.
12182 (vpdpbusd_v16si): Ditto.
12183 (vpdpbusds_v16si): Ditto.
12184 (vpdpwssd_v16si): Ditto.
12185 (vpdpwssds_v16si): Ditto.
12186 (VI48_AVX512VP2VL): Ditto.
12187 (avx512vp2intersect_2intersectv16si): Ditto.
12188 (VF_AVX512BF16VL): Ditto.
12189 (VF1_AVX512_256): Ditto.
12191 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
12193 * config/i386/i386-expand.cc (ix86_expand_vector_init_duplicate):
12194 Make sure there is EVEX512 enabled.
12195 (ix86_expand_vecop_qihi2): Refuse V32QI->V32HI when no EVEX512.
12196 * config/i386/i386.cc (ix86_hard_regno_mode_ok): Disable 64 bit mask
12197 when !TARGET_EVEX512.
12198 * config/i386/i386.md (avx512bw_512): New.
12199 (SWI1248_AVX512BWDQ_64): Add TARGET_EVEX512.
12200 (*zero_extendsidi2): Change isa to avx512bw_512.
12203 (*andn<mode>_1): Change isa to kmov_isa.
12204 (*<code><mode>_1): Ditto.
12205 (*notxor<mode>_1): Ditto.
12206 (*one_cmpl<mode>2_1): Ditto.
12207 (*one_cmplsi2_1_zext): Change isa to avx512bw_512.
12208 (*ashl<mode>3_1): Change isa to kmov_isa.
12209 (*lshr<mode>3_1): Ditto.
12210 * config/i386/sse.md (VI12HFBF_AVX512VL): Add TARGET_EVEX512.
12211 (VI1248_AVX512VLBW): Ditto.
12212 (VHFBF_AVX512VL): Ditto.
12216 (VI1_AVX512): Ditto.
12217 (VI12_256_512_AVX512VL): Ditto.
12218 (VI2_AVX2_AVX512BW): Ditto.
12219 (VI2_AVX512VNNIBW): Ditto.
12220 (VI2_AVX512VL): Ditto.
12221 (VI2HFBF_AVX512VL): Ditto.
12222 (VI8_AVX2_AVX512BW): Ditto.
12223 (VIMAX_AVX2_AVX512BW): Ditto.
12224 (VIMAX_AVX512VL): Ditto.
12225 (VI12_AVX2_AVX512BW): Ditto.
12226 (VI124_AVX2_24_AVX512F_1_AVX512BW): Ditto.
12227 (VI248_AVX512VL): Ditto.
12228 (VI248_AVX512VLBW): Ditto.
12229 (VI248_AVX2_8_AVX512F_24_AVX512BW): Ditto.
12230 (VI248_AVX512BW): Ditto.
12231 (VI248_AVX512BW_AVX512VL): Ditto.
12232 (VI248_512): Ditto.
12233 (VI124_256_AVX512F_AVX512BW): Ditto.
12234 (VI_AVX512BW): Ditto.
12235 (VIHFBF_AVX512BW): Ditto.
12236 (SWI1248_AVX512BWDQ): Ditto.
12237 (SWI1248_AVX512BW): Ditto.
12238 (SWI1248_AVX512BWDQ2): Ditto.
12239 (*knotsi_1_zext): Ditto.
12240 (define_split for zero_extend + not): Ditto.
12242 (REDUC_SMINMAX_MODE): Ditto.
12243 (VEC_EXTRACT_MODE): Ditto.
12244 (*avx512bw_permvar_truncv16siv16hi_1): Ditto.
12245 (*avx512bw_permvar_truncv16siv16hi_1_hf): Ditto.
12246 (truncv32hiv32qi2): Ditto.
12247 (avx512bw_<code>v32hiv32qi2): Ditto.
12248 (avx512bw_<code>v32hiv32qi2_mask): Ditto.
12249 (avx512bw_<code>v32hiv32qi2_mask_store): Ditto.
12250 (usadv64qi): Ditto.
12251 (VEC_PERM_AVX2): Ditto.
12252 (AVX512ZEXTMASK): Ditto.
12254 (vec_pack_trunc_<mode>): Change iterator to SWI24_MASK.
12255 (avx512bw_packsswb<mask_name>): Add TARGET_EVEX512.
12256 (avx512bw_packssdw<mask_name>): Ditto.
12257 (avx512bw_interleave_highv64qi<mask_name>): Ditto.
12258 (avx512bw_interleave_lowv64qi<mask_name>): Ditto.
12259 (<mask_codefor>avx512bw_pshuflwv32hi<mask_name>): Ditto.
12260 (<mask_codefor>avx512bw_pshufhwv32hi<mask_name>): Ditto.
12261 (vec_unpacks_lo_di): Ditto.
12262 (SWI48x_MASK): New.
12263 (vec_unpacks_hi_<mode>): Change iterator to SWI48x_MASK.
12264 (avx512bw_umulhrswv32hi3<mask_name>): Add TARGET_EVEX512.
12265 (VI1248_AVX512VL_AVX512BW): Ditto.
12266 (avx512bw_<code>v32qiv32hi2<mask_name>): Ditto.
12267 (*avx512bw_zero_extendv32qiv32hi2_1): Ditto.
12268 (*avx512bw_zero_extendv32qiv32hi2_2): Ditto.
12269 (<insn>v32qiv32hi2): Ditto.
12270 (pbroadcast_evex_isa): Change isa attribute to avx512bw_512.
12271 (VPERMI2): Add TARGET_EVEX512.
12274 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
12276 * config/i386/i386-expand.cc (ix86_expand_sse2_mulvxdi3):
12277 Add TARGET_EVEX512 for 512 bit usage.
12278 * config/i386/i386.cc (standard_sse_constant_opcode): Ditto.
12279 * config/i386/sse.md (VF1_VF2_AVX512DQ): Ditto.
12280 (VF1_128_256VL): Ditto.
12281 (VF2_AVX512VL): Ditto.
12282 (VI8_256_512): Ditto.
12283 (<mask_codefor>fixuns_trunc<mode><sseintvecmodelower>2<mask_name>):
12285 (AVX512_VEC): Ditto.
12286 (AVX512_VEC_2): Ditto.
12287 (VI4F_BRCST32x2): Ditto.
12288 (VI8F_BRCST64x2): Ditto.
12290 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
12292 * config/i386/i386-builtins.cc
12293 (ix86_vectorize_builtin_gather): Disable 512 bit gather
12294 when !TARGET_EVEX512.
12295 * config/i386/i386-expand.cc (ix86_valid_mask_cmp_mode):
12296 Add TARGET_EVEX512.
12297 (ix86_expand_int_sse_cmp): Ditto.
12298 (ix86_expand_vector_init_one_nonzero): Disable subroutine
12299 when !TARGET_EVEX512.
12300 (ix86_emit_swsqrtsf): Add TARGET_EVEX512.
12301 (ix86_vectorize_vec_perm_const): Disable subroutine when
12303 * config/i386/i386.cc
12304 (standard_sse_constant_p): Add TARGET_EVEX512.
12305 (standard_sse_constant_opcode): Ditto.
12306 (ix86_get_ssemov): Ditto.
12307 (ix86_legitimate_constant_p): Ditto.
12308 (ix86_vectorize_builtin_scatter): Diable 512 bit scatter
12309 when !TARGET_EVEX512.
12310 * config/i386/i386.md (avx512f_512): New.
12311 (movxi): Add TARGET_EVEX512.
12312 (*movxi_internal_avx512f): Ditto.
12313 (*movdi_internal): Change alternative 12 to ?Yv. Adjust mode
12314 for alternative 13.
12315 (*movsi_internal): Change alternative 8 to ?Yv. Adjust mode for
12317 (*movhi_internal): Change alternative 11 to *Yv.
12318 (*movdf_internal): Change alternative 12 to Yv.
12319 (*movsf_internal): Change alternative 5 to Yv. Adjust mode for
12320 alternative 5 and 6.
12321 (*mov<mode>_internal): Change alternative 4 to Yv.
12322 (define_split for convert SF to DF): Add TARGET_EVEX512.
12323 (extendbfsf2_1): Ditto.
12324 * config/i386/predicates.md (bcst_mem_operand): Disable predicate
12325 for 512 bit when !TARGET_EVEX512.
12326 * config/i386/sse.md (VMOVE): Add TARGET_EVEX512.
12327 (V48_AVX512VL): Ditto.
12328 (V48_256_512_AVX512VL): Ditto.
12329 (V48H_AVX512VL): Ditto.
12330 (VI12_AVX512VL): Ditto.
12333 (V_256_512): Ditto.
12335 (VF1_VF2_AVX512DQ): Ditto.
12342 (VF2_512_256): Ditto.
12343 (VF2_512_256VL): Ditto.
12346 (VI48_AVX512VL): Ditto.
12347 (VI1248_AVX512VLBW): Ditto.
12348 (VF_AVX512VL): Ditto.
12349 (VFH_AVX512VL): Ditto.
12350 (VF1_AVX512VL): Ditto.
12355 (VI8_AVX512VL): Ditto.
12356 (VI2_AVX512F): Ditto.
12357 (VI4_AVX512F): Ditto.
12358 (VI4_AVX512VL): Ditto.
12359 (VI48_AVX512F_AVX512VL): Ditto.
12360 (VI8_AVX2_AVX512F): Ditto.
12361 (VI8_AVX_AVX512F): Ditto.
12364 (VI124_AVX2_24_AVX512F_1_AVX512BW): Ditto.
12365 (VI248_AVX512VLBW): Ditto.
12366 (VI248_AVX2_8_AVX512F_24_AVX512BW): Ditto.
12367 (VI248_AVX512BW): Ditto.
12368 (VI248_AVX512BW_AVX512VL): Ditto.
12369 (VI48_AVX512F): Ditto.
12370 (VI48_AVX_AVX512F): Ditto.
12371 (VI12_AVX_AVX512F): Ditto.
12372 (VI148_512): Ditto.
12373 (VI124_256_AVX512F_AVX512BW): Ditto.
12375 (VI_AVX512BW): Ditto.
12376 (VIHFBF_AVX512BW): Ditto.
12377 (VI4F_256_512): Ditto.
12378 (VI48F_256_512): Ditto.
12380 (VI12_VI48F_AVX512VL): Ditto.
12382 (AVX512MODE2P): Ditto.
12383 (STORENT_MODE): Ditto.
12384 (REDUC_PLUS_MODE): Ditto.
12385 (REDUC_SMINMAX_MODE): Ditto.
12386 (*andnot<mode>3): Change isa attribute to avx512f_512.
12387 (*andnot<mode>3): Ditto.
12388 (<code><mode>3): Ditto.
12389 (<code>tf3): Ditto.
12390 (FMAMODEM): Add TARGET_EVEX512.
12391 (FMAMODE_AVX512): Ditto.
12392 (VFH_SF_AVX512VL): Ditto.
12393 (avx512f_fix_notruncv16sfv16si<mask_name><round_name>): Ditto.
12394 (fix<fixunssuffix>_truncv16sfv16si2<mask_name><round_saeonly_name>):
12396 (avx512f_cvtdq2pd512_2): Ditto.
12397 (avx512f_cvtpd2dq512<mask_name><round_name>): Ditto.
12398 (fix<fixunssuffix>_truncv8dfv8si2<mask_name><round_saeonly_name>):
12400 (<mask_codefor>avx512f_cvtpd2ps512<mask_name><round_name>): Ditto.
12401 (vec_unpacks_lo_v16sf): Ditto.
12402 (vec_unpacks_hi_v16sf): Ditto.
12403 (vec_unpacks_float_hi_v16si): Ditto.
12404 (vec_unpacks_float_lo_v16si): Ditto.
12405 (vec_unpacku_float_hi_v16si): Ditto.
12406 (vec_unpacku_float_lo_v16si): Ditto.
12407 (vec_pack_sfix_trunc_v8df): Ditto.
12408 (avx512f_vec_pack_sfix_v8df): Ditto.
12409 (<mask_codefor>avx512f_unpckhps512<mask_name>): Ditto.
12410 (<mask_codefor>avx512f_unpcklps512<mask_name>): Ditto.
12411 (<mask_codefor>avx512f_movshdup512<mask_name>): Ditto.
12412 (<mask_codefor>avx512f_movsldup512<mask_name>): Ditto.
12413 (AVX512_VEC): Ditto.
12414 (AVX512_VEC_2): Ditto.
12415 (vec_extract_lo_v64qi): Ditto.
12416 (vec_extract_hi_v64qi): Ditto.
12417 (VEC_EXTRACT_MODE): Ditto.
12418 (<mask_codefor>avx512f_unpckhpd512<mask_name>): Ditto.
12419 (avx512f_movddup512<mask_name>): Ditto.
12420 (avx512f_unpcklpd512<mask_name>): Ditto.
12421 (*<avx512>_vternlog<mode>_all): Ditto.
12422 (*<avx512>_vpternlog<mode>_1): Ditto.
12423 (*<avx512>_vpternlog<mode>_2): Ditto.
12424 (*<avx512>_vpternlog<mode>_3): Ditto.
12425 (avx512f_shufps512_mask): Ditto.
12426 (avx512f_shufps512_1<mask_name>): Ditto.
12427 (avx512f_shufpd512_mask): Ditto.
12428 (avx512f_shufpd512_1<mask_name>): Ditto.
12429 (<mask_codefor>avx512f_interleave_highv8di<mask_name>): Ditto.
12430 (<mask_codefor>avx512f_interleave_lowv8di<mask_name>): Ditto.
12431 (vec_dupv2df<mask_name>): Ditto.
12432 (trunc<pmov_src_lower><mode>2): Ditto.
12433 (*avx512f_<code><pmov_src_lower><mode>2): Ditto.
12434 (*avx512f_vpermvar_truncv8div8si_1): Ditto.
12435 (avx512f_<code><pmov_src_lower><mode>2_mask): Ditto.
12436 (avx512f_<code><pmov_src_lower><mode>2_mask_store): Ditto.
12437 (truncv8div8qi2): Ditto.
12438 (avx512f_<code>v8div16qi2): Ditto.
12439 (*avx512f_<code>v8div16qi2_store_1): Ditto.
12440 (*avx512f_<code>v8div16qi2_store_2): Ditto.
12441 (avx512f_<code>v8div16qi2_mask): Ditto.
12442 (*avx512f_<code>v8div16qi2_mask_1): Ditto.
12443 (*avx512f_<code>v8div16qi2_mask_store_1): Ditto.
12444 (avx512f_<code>v8div16qi2_mask_store_2): Ditto.
12445 (vec_widen_umult_even_v16si<mask_name>): Ditto.
12446 (*vec_widen_umult_even_v16si<mask_name>): Ditto.
12447 (vec_widen_smult_even_v16si<mask_name>): Ditto.
12448 (*vec_widen_smult_even_v16si<mask_name>): Ditto.
12449 (VEC_PERM_AVX2): Ditto.
12450 (one_cmpl<mode>2): Ditto.
12451 (<mask_codefor>one_cmpl<mode>2<mask_name>): Ditto.
12452 (*one_cmpl<mode>2_pternlog_false_dep): Ditto.
12453 (define_split to xor): Ditto.
12454 (*andnot<mode>3): Ditto.
12455 (define_split for ior): Ditto.
12456 (*iornot<mode>3): Ditto.
12457 (*xnor<mode>3): Ditto.
12458 (*<nlogic><mode>3): Ditto.
12459 (<mask_codefor>avx512f_interleave_highv16si<mask_name>): Ditto.
12460 (<mask_codefor>avx512f_interleave_lowv16si<mask_name>): Ditto.
12461 (avx512f_pshufdv3_mask): Ditto.
12462 (avx512f_pshufd_1<mask_name>): Ditto.
12463 (*vec_extractv4ti): Ditto.
12464 (VEXTRACTI128_MODE): Ditto.
12465 (define_split to vec_extract): Ditto.
12466 (VI1248_AVX512VL_AVX512BW): Ditto.
12467 (<mask_codefor>avx512f_<code>v16qiv16si2<mask_name>): Ditto.
12468 (<insn>v16qiv16si2): Ditto.
12469 (avx512f_<code>v16hiv16si2<mask_name>): Ditto.
12470 (<insn>v16hiv16si2): Ditto.
12471 (avx512f_zero_extendv16hiv16si2_1): Ditto.
12472 (avx512f_<code>v8qiv8di2<mask_name>): Ditto.
12473 (*avx512f_<code>v8qiv8di2<mask_name>_1): Ditto.
12474 (*avx512f_<code>v8qiv8di2<mask_name>_2): Ditto.
12475 (<insn>v8qiv8di2): Ditto.
12476 (avx512f_<code>v8hiv8di2<mask_name>): Ditto.
12477 (<insn>v8hiv8di2): Ditto.
12478 (avx512f_<code>v8siv8di2<mask_name>): Ditto.
12479 (*avx512f_zero_extendv8siv8di2_1): Ditto.
12480 (*avx512f_zero_extendv8siv8di2_2): Ditto.
12481 (<insn>v8siv8di2): Ditto.
12482 (avx512f_roundps512_sfix): Ditto.
12483 (vashrv8di3): Ditto.
12484 (vashrv16si3): Ditto.
12485 (pbroadcast_evex_isa): Change isa attribute to avx512f_512.
12486 (vec_dupv4sf): Add TARGET_EVEX512.
12487 (*vec_dupv4si): Ditto.
12488 (*vec_dupv2di): Ditto.
12489 (vec_dup<mode>): Change isa attribute to avx512f_512.
12490 (VPERMI2): Add TARGET_EVEX512.
12492 (VEC_INIT_MODE): Ditto.
12493 (VEC_INIT_HALF_MODE): Ditto.
12494 (<mask_codefor>avx512f_vcvtph2ps512<mask_name><round_saeonly_name>):
12496 (avx512f_vcvtps2ph512_mask_sae): Ditto.
12497 (<mask_codefor>avx512f_vcvtps2ph512<mask_name><round_saeonly_name>):
12499 (*avx512f_vcvtps2ph512<merge_mask_name>): Ditto.
12500 (INT_BROADCAST_MODE): Ditto.
12502 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
12504 * config/i386/i386-expand.cc (ix86_broadcast_from_constant):
12505 Disable zmm broadcast for !TARGET_EVEX512.
12506 * config/i386/i386-options.cc (ix86_option_override_internal):
12507 Do not use PVW_512 when no-evex512.
12508 (ix86_simd_clone_adjust): Add evex512 target into string.
12509 * config/i386/i386.cc (type_natural_mode): Report ABI warning
12510 when using zmm register w/o evex512.
12511 (ix86_return_in_memory): Do not allow zmm when !TARGET_EVEX512.
12512 (ix86_hard_regno_mode_ok): Ditto.
12513 (ix86_set_reg_reg_cost): Ditto.
12514 (ix86_rtx_costs): Ditto.
12515 (ix86_vector_mode_supported_p): Ditto.
12516 (ix86_preferred_simd_mode): Ditto.
12517 (ix86_get_mask_mode): Ditto.
12518 (ix86_simd_clone_compute_vecsize_and_simdlen): Disable 512 bit
12519 libmvec call when !TARGET_EVEX512.
12520 (ix86_simd_clone_usable): Ditto.
12521 * config/i386/i386.h (BIGGEST_ALIGNMENT): Disable 512 alignment
12522 when !TARGET_EVEX512
12523 (MOVE_MAX): Do not use PVW_512 when !TARGET_EVEX512.
12524 (STORE_MAX_PIECES): Ditto.
12526 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
12528 * config/i386/i386-builtin.def (BDESC): Add
12529 OPTION_MASK_ISA2_EVEX512.
12531 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
12533 * config/i386/i386-builtin.def (BDESC): Add
12534 OPTION_MASK_ISA2_EVEX512.
12536 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
12538 * config/i386/i386-builtin.def (BDESC): Add
12539 OPTION_MASK_ISA2_EVEX512.
12541 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
12543 * config/i386/i386-builtin.def (BDESC): Add
12544 OPTION_MASK_ISA2_EVEX512.
12546 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
12548 * config/i386/i386-builtin.def (BDESC): Add
12549 OPTION_MASK_ISA2_EVEX512.
12550 * config/i386/i386-builtins.cc
12551 (ix86_init_mmx_sse_builtins): Ditto.
12553 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
12554 Hu, Lin1 <lin1.hu@intel.com>
12556 * config/i386/avx512fp16intrin.h: Add evex512 target for 512 bit
12559 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
12561 * config.gcc: Add avx512bitalgvlintrin.h.
12562 * config/i386/avx5124fmapsintrin.h: Add evex512 target for 512 bit
12564 * config/i386/avx5124vnniwintrin.h: Ditto.
12565 * config/i386/avx512bf16intrin.h: Ditto.
12566 * config/i386/avx512bitalgintrin.h: Add evex512 target for 512 bit
12567 intrins. Split 128/256 bit intrins to avx512bitalgvlintrin.h.
12568 * config/i386/avx512erintrin.h: Add evex512 target for 512 bit
12570 * config/i386/avx512ifmaintrin.h: Ditto
12571 * config/i386/avx512pfintrin.h: Ditto
12572 * config/i386/avx512vbmi2intrin.h: Ditto.
12573 * config/i386/avx512vbmiintrin.h: Ditto.
12574 * config/i386/avx512vnniintrin.h: Ditto.
12575 * config/i386/avx512vp2intersectintrin.h: Ditto.
12576 * config/i386/avx512vpopcntdqintrin.h: Ditto.
12577 * config/i386/gfniintrin.h: Ditto.
12578 * config/i386/immintrin.h: Add avx512bitalgvlintrin.h.
12579 * config/i386/vaesintrin.h: Add evex512 target for 512 bit intrins.
12580 * config/i386/vpclmulqdqintrin.h: Ditto.
12581 * config/i386/avx512bitalgvlintrin.h: New.
12583 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
12585 * config/i386/avx512bwintrin.h: Add evex512 target for 512 bit
12588 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
12590 * config/i386/avx512dqintrin.h: Add evex512 target for 512 bit
12593 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
12595 * config/i386/avx512fintrin.h: Add evex512 target for 512 bit intrins.
12597 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
12599 * common/config/i386/i386-common.cc
12600 (OPTION_MASK_ISA2_EVEX512_SET): New.
12601 (OPTION_MASK_ISA2_EVEX512_UNSET): Ditto.
12602 (ix86_handle_option): Handle EVEX512.
12603 * config/i386/i386-c.cc
12604 (ix86_target_macros_internal): Handle EVEX512. Add __EVEX256__
12605 when AVX512VL is set.
12606 * config/i386/i386-options.cc: (isa2_opts): Handle EVEX512.
12607 (ix86_valid_target_attribute_inner_p): Ditto.
12608 (ix86_option_override_internal): Set EVEX512 target if it is not
12609 explicitly set when AVX512 is enabled. Disable
12610 AVX512{PF,ER,4VNNIW,4FAMPS} for -mno-evex512.
12611 * config/i386/i386.opt: Add mevex512. Temporaily RejectNegative.
12613 2023-10-09 Haochen Gui <guihaoc@gcc.gnu.org>
12616 * config/rs6000/rs6000.md (lrint<mode>di2): Remove TARGET_FPRND
12617 from insn condition.
12618 (lrint<mode>si2): New insn pattern for 32bit lrint.
12620 2023-10-09 Haochen Gui <guihaoc@gcc.gnu.org>
12623 * config/rs6000/rs6000.cc (rs6000_hard_regno_mode_ok_uncached):
12624 Enable SImode on FP registers for P7.
12625 * config/rs6000/rs6000.md (*movsi_internal1): Add fmr for SImode
12626 move between FP registers. Set attribute isa of stfiwx to "*"
12627 and attribute of stxsiwx to "p7".
12629 2023-10-09 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
12631 * config/s390/s390.md: Make use of new copysign RTL.
12633 2023-10-09 Hongyu Wang <hongyu.wang@intel.com>
12635 * config/i386/sse.md (vec_concatv2di): Replace constraint "m"
12636 with "jm" for alternative 0 and 1 of operand 2.
12637 (sse4_1_<code><mode>3<mask_name>): Replace constraint "Bm" with
12638 "ja" for alternative 0 and 1 of operand2.
12640 2023-10-08 David Malcolm <dmalcolm@redhat.com>
12643 * text-art/table.cc (table::maybe_set_cell_span): New.
12644 (table::add_other_table): New.
12645 * text-art/table.h (class table::cell_placement): Add class table
12647 (table::add_rows): New.
12648 (table::add_row): Reimplement in terms of add_rows.
12649 (table::maybe_set_cell_span): New decl.
12650 (table::add_other_table): New decl.
12651 * text-art/types.h (operator+): New operator for rect + coord.
12653 2023-10-08 David Malcolm <dmalcolm@redhat.com>
12655 * genmatch.cc (main): Update for "m_" prefix of some fields of
12657 * input.cc (make_location): Update for removal of
12658 COMBINE_LOCATION_DATA.
12659 (dump_line_table_statistics): Update for "m_" prefix of some
12660 fields of line_maps.
12661 (location_with_discriminator): Update for removal of
12662 COMBINE_LOCATION_DATA.
12663 (line_table_test::line_table_test): Update for "m_" prefix of some
12664 fields of line_maps.
12665 * toplev.cc (general_init): Likewise.
12666 * tree.cc (set_block): Update for removal of
12667 COMBINE_LOCATION_DATA.
12668 (set_source_range): Likewise.
12670 2023-10-08 David Malcolm <dmalcolm@redhat.com>
12672 * input.cc (make_location): Move implementation to
12673 line_maps::make_location.
12675 2023-10-08 David Malcolm <dmalcolm@redhat.com>
12678 * input.cc (file_cache::add_file): Update leading comment to
12679 clarify that it can fail.
12680 (file_cache::lookup_or_add_file): Likewise.
12681 (file_cache::get_source_file_content): Gracefully handle
12682 lookup_or_add_file failing.
12684 2023-10-08 liuhongt <hongtao.liu@intel.com>
12686 * config/i386/i386.cc (ix86_build_const_vector): Handle V2HF
12688 (ix86_build_signbit_mask): Ditto.
12689 * config/i386/mmx.md (mmxintvecmode): Ditto.
12690 (<code><mode>2): New define_expand.
12691 (*mmx_<code><mode>): New define_insn_and_split.
12692 (*mmx_nabs<mode>2): Ditto.
12693 (*mmx_andnot<mode>3): New define_insn.
12694 (<code><mode>3): Ditto.
12695 (copysign<mode>3): New define_expand.
12696 (xorsign<mode>3): Ditto.
12697 (signbit<mode>2): Ditto.
12699 2023-10-08 liuhongt <hongtao.liu@intel.com>
12701 * config/i386/mmx.md (VHF_32_64): New mode iterator.
12702 (<insn><mode>3): New define_expand, merged from ..
12703 (<insn>v4hf3): .. this and
12704 (<insn>v2hf3): .. this.
12705 (movd_v2hf_to_sse_reg): New define_expand, splitted from ..
12706 (movd_v2hf_to_sse): .. this.
12707 (<code><mode>3): New define_expand.
12709 2023-10-08 Jiufu Guo <guojiufu@linux.ibm.com>
12711 * config/rs6000/rs6000.cc (can_be_built_by_li_and_rldic): New function.
12712 (rs6000_emit_set_long_const): Call can_be_built_by_li_and_rldic.
12714 2023-10-08 Jiufu Guo <guojiufu@linux.ibm.com>
12716 * config/rs6000/rs6000.cc (can_be_built_by_li_lis_and_rldicl): New
12718 (can_be_built_by_li_lis_and_rldicr): New function.
12719 (rs6000_emit_set_long_const): Call can_be_built_by_li_lis_and_rldicr and
12720 can_be_built_by_li_lis_and_rldicl.
12722 2023-10-08 Jiufu Guo <guojiufu@linux.ibm.com>
12724 * config/rs6000/rs6000.cc (can_be_rotated_to_negative_lis): New
12726 (can_be_built_by_li_and_rotldi): Rename to ...
12727 (can_be_built_by_li_lis_and_rotldi): ... this function.
12728 (rs6000_emit_set_long_const): Call can_be_built_by_li_lis_and_rotldi.
12730 2023-10-08 Jiufu Guo <guojiufu@linux.ibm.com>
12732 * config/rs6000/rs6000.cc (can_be_built_by_li_and_rotldi): New function.
12733 (rs6000_emit_set_long_const): Call can_be_built_by_li_and_rotldi.
12735 2023-10-08 Yanzhang Wang <yanzhang.wang@intel.com>
12737 * config/riscv/linux.h: Pass the static-pie specific options to
12740 2023-10-07 Saurabh Jha <saurabh.jha@arm.com>
12742 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add support for
12744 * config/aarch64/aarch64-tune.md: Regenerated.
12745 * doc/invoke.texi: Add command-line option for cortex-x4 core.
12747 2023-10-07 Kong Lingling <lingling.kong@intel.com>
12748 Hongyu Wang <hongyu.wang@intel.com>
12749 Hongtao Liu <hongtao.liu@intel.com>
12751 * config/i386/constraints.md (jb): New constraint for vsib memory
12752 that does not allow gpr32.
12753 * config/i386/i386.md: (setcc_<mode>_sse): Replace m to jm for avx
12754 alternative and set attr_gpr32 to 0.
12755 (movmsk_df): Split avx/noavx alternatives and replace "r" to "jr" for
12757 (<sse>_rcp<mode>2): Split avx/noavx alternatives and replace
12758 "m/Bm" to "jm/ja" for avx alternative, set its gpr32 attr to 0.
12759 (*rsqrtsf2_sse): Likewise.
12760 * config/i386/mmx.md (mmx_pmovmskb): Split alternative 1 to
12761 avx/noavx and assign jr/r constraint to dest.
12762 * config/i386/sse.md (<sse>_movmsk<ssemodesuffix><avxsizesuffix>):
12763 Split avx/noavx alternatives and replace "r" to "jr" for avx alternative.
12764 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext): Likewise.
12765 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_lt): Likewise.
12766 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_lt): Likewise.
12767 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_shift): Likewise.
12768 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_shift): Likewise.
12769 (<sse2_avx2>_pmovmskb): Likewise.
12770 (*<sse2_avx2>_pmovmskb_zext): Likewise.
12771 (*sse2_pmovmskb_ext): Likewise.
12772 (*<sse2_avx2>_pmovmskb_lt): Likewise.
12773 (*<sse2_avx2>_pmovmskb_zext_lt): Likewise.
12774 (*sse2_pmovmskb_ext_lt): Likewise.
12775 (<sse>_rcp<mode>2): Split avx/noavx alternatives and replace
12776 "m/Bm" to "jm/ja" for avx alternative, set its attr_gpr32 to 0.
12777 (sse_vmrcpv4sf2): Likewise.
12778 (*sse_vmrcpv4sf2): Likewise.
12779 (rsqrt<mode>2): Likewise.
12780 (sse_vmrsqrtv4sf2): Likewise.
12781 (*sse_vmrsqrtv4sf2): Likewise.
12782 (avx_h<insn>v4df3): Likewise.
12783 (sse3_hsubv2df3): Likewise.
12784 (avx_h<insn>v8sf3): Likewise.
12785 (sse3_h<insn>v4sf3): Likewise.
12786 (<sse3>_lddqu<avxsizesuffix>): Likewise.
12787 (avx_cmp<mode>3): Likewise.
12788 (avx_vmcmp<mode>3): Likewise.
12789 (*sse2_gt<mode>3): Likewise.
12790 (sse_ldmxcsr): Likewise.
12791 (sse_stmxcsr): Likewise.
12792 (avx_vtest<ssemodesuffix><avxsizesuffix>): Replace m to jm for
12793 avx alternative and set attr_gpr32 to 0.
12794 (avx2_permv2ti): Likewise.
12795 (*avx_vperm2f128<mode>_full): Likewise.
12796 (*avx_vperm2f128<mode>_nozero): Likewise.
12797 (vec_set_lo_v32qi): Likewise.
12798 (<avx_avx2>_maskload<ssemodesuffix><avxsizesuffix>): Likewise.
12799 (<avx_avx2>_maskstore<ssemodesuffix><avxsi)zesuffix>: Likewise.
12800 (avx_cmp<mode>3): Likewise.
12801 (avx_vmcmp<mode>3): Likewise.
12802 (*<sse>_maskcmp<mode>3_comm): Likewise.
12803 (*avx2_gathersi<VEC_GATHER_MODE:mode>): Replace Tv to jb and set
12805 (*avx2_gathersi<VEC_GATHER_MODE:mode>_2): Likewise.
12806 (*avx2_gatherdi<VEC_GATHER_MODE:mode>): Likewise.
12807 (*avx2_gatherdi<VEC_GATHER_MODE:mode>_2): Likewise.
12808 (*avx2_gatherdi<VI4F_256:mode>_3): Likewise.
12809 (*avx2_gatherdi<VI4F_256:mode>_4): Likewise.
12810 (avx_vbroadcastf128_<mode>): Restrict non-egpr alternative to
12811 noavx512vl, set its constraint to jm and set attr_gpr32 to 0.
12812 (vec_set_lo_<mode><mask_name>): Likewise.
12813 (vec_set_lo_<mode><mask_name>): Likewise for SF/SI modes.
12814 (vec_set_hi_<mode><mask_name>): Likewise.
12815 (vec_set_hi_<mode><mask_name>): Likewise for SF/SI modes.
12816 (vec_set_hi_<mode>): Likewise.
12817 (vec_set_lo_<mode>): Likewise.
12818 (avx2_set_hi_v32qi): Likewise.
12820 2023-10-07 Kong Lingling <lingling.kong@intel.com>
12821 Hongyu Wang <hongyu.wang@intel.com>
12822 Hongtao Liu <hongtao.liu@intel.com>
12824 * config/i386/i386.md (*movhi_internal): Split out non-gpr
12825 supported pextrw with mem constraint to avx/noavx alternatives,
12826 set jm and attr gpr32 0 to the noavx alternative.
12827 (*mov<mode>_internal): Likewise.
12828 * config/i386/mmx.md (mmx_pshufbv8qi3): Change "r/m/Bm" to
12829 "jr/jm/ja" and set_attr gpr32 0 for noavx alternative.
12830 (mmx_pshufbv4qi3): Likewise.
12831 (*mmx_pinsrd): Likewise.
12832 (*mmx_pinsrb): Likewise.
12833 (*pinsrb): Likewise.
12834 (mmx_pshufbv8qi3): Likewise.
12835 (mmx_pshufbv4qi3): Likewise.
12836 (@sse4_1_insertps_<mode>): Likewise.
12837 (*mmx_pextrw): Split altrenatives and map non-EGPR
12838 constraints, attr_gpr32 and attr_isa to noavx mnemonics.
12839 (*movv2qi_internal): Likewise.
12840 (*pextrw): Likewise.
12841 (*mmx_pextrb): Likewise.
12842 (*mmx_pextrb_zext): Likewise.
12843 (*pextrb): Likewise.
12844 (*pextrb_zext): Likewise.
12845 (vec_extractv2si_1): Likewise.
12846 (vec_extractv2si_1_zext): Likewise.
12847 * config/i386/sse.md: (vi128_h_r): New mode attr for
12848 pinsr{bw}/pextr{bw} with reg operand.
12849 (*abs<mode>2): Split altrenatives and %v in mnemonics, map
12850 non-EGPR constraints, gpr32 and isa attrs to noavx mnemonics.
12851 (*vec_extract<mode>): Likewise.
12852 (*vec_extract<mode>): Likewise for HFBF pattern.
12853 (*vec_extract<PEXTR_MODE12:mode>_zext): Likewise.
12854 (*vec_extractv4si_1): Likewise.
12855 (*vec_extractv4si_zext): Likewise.
12856 (*vec_extractv2di_1): Likewise.
12857 (*vec_concatv2si_sse4_1): Likewise.
12858 (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
12859 (vec_concatv2di): Likewise.
12860 (*sse4_1_<code>v2qiv2di2<mask_name>_1): Likewise.
12861 (ssse3_avx2>_pshufb<mode>3<mask_name>): Change "r/m/Bm" to
12862 "jr/jm/ja" and set_attr gpr32 0 for noavx alternative, split
12863 %v for avx/noavx alternatives if necessary.
12864 (*vec_concatv2sf_sse4_1): Likewise.
12865 (*sse4_1_extractps): Likewise.
12866 (vec_set<mode>_0): Likewise for VI4F_128.
12867 (*vec_setv4sf_sse4_1): Likewise.
12868 (@sse4_1_insertps<mode>): Likewise.
12869 (ssse3_pmaddubsw128): Likewise.
12870 (*<ssse3_avx2>_pmulhrsw<mode>3<mask_name>): Likewise.
12871 (<sse4_1_avx2>_packusdw<mask_name>): Likewise.
12872 (<ssse3_avx2>_palignr<mode>): Likewise.
12873 (<vi8_sse4_1_avx2_avx512>_movntdqa): Likewise.
12874 (<sse4_1_avx2>_mpsadbw): Likewise.
12875 (*sse4_1_mulv2siv2di3<mask_name>): Likewise.
12876 (*<sse4_1_avx2>_mul<mode>3<mask_name>): Likewise.
12877 (*sse4_1_<code><mode>3<mask_name>): Likewise.
12878 (*<code>v8hi3): Likewise.
12879 (*<code>v16qi3): Likewise.
12880 (*sse4_1_<code>v8qiv8hi2<mask_name>_1): Likewise.
12881 (*sse4_1_zero_extendv8qiv8hi2_3): Likewise.
12882 (*sse4_1_zero_extendv8qiv8hi2_4): Likewise.
12883 (*sse4_1_<code>v4qiv4si2<mask_name>_1): Likewise.
12884 (*sse4_1_<code>v4hiv4si2<mask_name>_1): Likewise.
12885 (*sse4_1_zero_extendv4hiv4si2_3): Likewise.
12886 (*sse4_1_zero_extendv4hiv4si2_4): Likewise.
12887 (*sse4_1_<code>v2hiv2di2<mask_name>_1): Likewise.
12888 (*sse4_1_<code>v2siv2di2<mask_name>_1): Likewise.
12889 (*sse4_1_zero_extendv2siv2di2_3): Likewise.
12890 (*sse4_1_zero_extendv2siv2di2_4): Likewise.
12891 (aesdec): Likewise.
12892 (aesdeclast): Likewise.
12893 (aesenc): Likewise.
12894 (aesenclast): Likewise.
12895 (pclmulqdq): Likewise.
12896 (vgf2p8affineinvqb_<mode><mask_name>): Likewise.
12897 (vgf2p8affineqb_<mode><mask_name>): Likewise.
12898 (vgf2p8mulb_<mode><mask_name>): Likewise.
12900 2023-10-07 Kong Lingling <lingling.kong@intel.com>
12901 Hongyu Wang <hongyu.wang@intel.com>
12902 Hongtao Liu <hongtao.liu@intel.com>
12904 * config/i386/i386-protos.h (x86_evex_reg_mentioned_p): New
12906 * config/i386/i386.cc (x86_evex_reg_mentioned_p): New
12908 * config/i386/i386.md (sse4_1_round<mode>2): Set attr gpr32 0
12909 and constraint jm to all non-evex alternatives, adjust
12910 alternative outputs if evex reg is mentioned.
12911 * config/i386/sse.md (<sse4_1>_ptest<mode>): Set attr gpr32 0
12912 and constraint jm/ja to all non-evex alternatives.
12913 (ptesttf2): Likewise.
12914 (<sse4_1>_round<ssemodesuffix><avxsizesuffix): Likewise.
12915 (sse4_1_round<ssescalarmodesuffix>): Likewise.
12916 (sse4_2_pcmpestri): Likewise.
12917 (sse4_2_pcmpestrm): Likewise.
12918 (sse4_2_pcmpestr_cconly): Likewise.
12919 (sse4_2_pcmpistr): Likewise.
12920 (sse4_2_pcmpistri): Likewise.
12921 (sse4_2_pcmpistrm): Likewise.
12922 (sse4_2_pcmpistr_cconly): Likewise.
12923 (aesimc): Likewise.
12924 (aeskeygenassist): Likewise.
12926 2023-10-07 Kong Lingling <lingling.kong@intel.com>
12927 Hongyu Wang <hongyu.wang@intel.com>
12928 Hongtao Liu <hongtao.liu@intel.com>
12930 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3): Set
12931 attr gpr32 0 and constraint jm/ja to all mem alternatives.
12932 (ssse3_ph<plusminus_mnemonic>wv8hi3): Likewise.
12933 (ssse3_ph<plusminus_mnemonic>wv4hi3): Likewise.
12934 (avx2_ph<plusminus_mnemonic>dv8si3): Likewise.
12935 (ssse3_ph<plusminus_mnemonic>dv4si3): Likewise.
12936 (ssse3_ph<plusminus_mnemonic>dv2si3): Likewise.
12937 (<ssse3_avx2>_psign<mode>3): Likewise.
12938 (ssse3_psign<mode>3): Likewise.
12939 (<sse4_1>_blend<ssemodesuffix><avxsizesuffix): Likewise.
12940 (<sse4_1>_blendv<ssemodesuffix><avxsizesuffix): Likewise.
12941 (*<sse4_1>_blendv<ssemodesuffix><avxsizesuffix>_lt): Likewise.
12942 (*<sse4_1>_blendv<ssefltmodesuff)ix><avxsizesuffix>_not_ltint: Likewise.
12943 (<sse4_1>_dp<ssemodesuffix><avxsizesuffix>): Likewise.
12944 (<sse4_1_avx2>_mpsadbw): Likewise.
12945 (<sse4_1_avx2>_pblendvb): Likewise.
12946 (*<sse4_1_avx2>_pblendvb_lt): Likewise.
12947 (sse4_1_pblend<ssemodesuffix>): Likewise.
12948 (*avx2_pblend<ssemodesuffix>): Likewise.
12949 (avx2_permv2ti): Likewise.
12950 (*avx_vperm2f128<mode>_nozero): Likewise.
12951 (*avx2_eq<mode>3): Likewise.
12952 (*sse4_1_eqv2di3): Likewise.
12953 (sse4_2_gtv2di3): Likewise.
12954 (avx2_gt<mode>3): Likewise.
12956 2023-10-07 Kong Lingling <lingling.kong@intel.com>
12957 Hongyu Wang <hongyu.wang@intel.com>
12958 Hongtao Liu <hongtao.liu@intel.com>
12960 * config/i386/i386.md (<xsave>): Set attr gpr32 0 and constraint
12962 (<xsave>_rex64): Likewise.
12963 (<xrstor>_rex64): Likewise.
12964 (<xrstor>64): Likewise.
12965 (fxsave64): Likewise.
12966 (fxstore64): Likewise.
12968 2023-10-07 Hongyu Wang <hongyu.wang@intel.com>
12969 Kong Lingling <lingling.kong@intel.com>
12970 Hongtao Liu <hongtao.liu@intel.com>
12972 * config/i386/i386.cc (ix86_get_ssemov): Check if egpr is used,
12973 adjust mnemonic for vmovduq/vmovdqa.
12974 * config/i386/sse.md (*<extract_type>_vinsert<shuffletype><extract_suf>_0):
12975 Check if egpr is used, adjust mnemonic for vmovdqu/vmovdqa.
12976 (avx_vec_concat<mode>): Likewise, and separate alternative 0 to
12979 2023-10-07 Kong Lingling <lingling.kong@intel.com>
12980 Hongyu Wang <hongyu.wang@intel.com>
12981 Hongtao Liu <hongtao.liu@intel.com>
12983 * config/i386/i386.cc (map_egpr_constraints): New funciton to
12984 map common constraints to EGPR prohibited constraints.
12985 (ix86_md_asm_adjust): Calls map_egpr_constraints.
12986 * config/i386/i386.opt: Add option mapx-inline-asm-use-gpr32.
12988 2023-10-07 Kong Lingling <lingling.kong@intel.com>
12989 Hongyu Wang <hongyu.wang@intel.com>
12990 Hongtao Liu <hongtao.liu@intel.com>
12992 * config/i386/i386-protos.h (ix86_insn_base_reg_class): New
12994 (ix86_regno_ok_for_insn_base_p): Likewise.
12995 (ix86_insn_index_reg_class): Likewise.
12996 * config/i386/i386.cc (ix86_memory_address_use_extended_reg_class_p):
12997 New helper function to scan the insn.
12998 (ix86_insn_base_reg_class): New function to choose BASE_REG_CLASS.
12999 (ix86_regno_ok_for_insn_base_p): Likewise for base regno.
13000 (ix86_insn_index_reg_class): Likewise for INDEX_REG_CLASS.
13001 * config/i386/i386.h (INSN_BASE_REG_CLASS): Define.
13002 (REGNO_OK_FOR_INSN_BASE_P): Likewise.
13003 (INSN_INDEX_REG_CLASS): Likewise.
13004 (enum reg_class): Add INDEX_GPR16.
13005 (GENERAL_GPR16_REGNO_P): Define.
13006 * config/i386/i386.md (gpr32): New attribute.
13008 2023-10-07 Kong Lingling <lingling.kong@intel.com>
13009 Hongyu Wang <hongyu.wang@intel.com>
13010 Hongtao Liu <hongtao.liu@intel.com>
13012 * config/i386/constraints.md (jr): New register constraint
13013 that prohibits EGPR.
13014 (jR): Constraint that force usage of EGPR.
13015 (jm): New memory constraint that prohibits EGPR.
13016 (ja): Likewise for Bm constraint.
13017 (jb): Likewise for Tv constraint.
13018 (j<): New auto-dec memory constraint that prohibits EGPR.
13019 (j>): Likewise for ">" constraint.
13020 (jo): Likewise for "o" constraint.
13021 (jv): Likewise for "V" constraint.
13022 (jp): Likewise for "p" constraint.
13023 * config/i386/i386.h (enum reg_class): Add new reg class
13026 2023-10-07 Kong Lingling <lingling.kong@intel.com>
13027 Hongyu Wang <hongyu.wang@intel.com>
13028 Hongtao Liu <hongtao.liu@intel.com>
13030 * config/i386/i386-protos.h (x86_extended_rex2reg_mentioned_p):
13031 New function prototype.
13032 * config/i386/i386.cc (regclass_map): Add mapping for 16 new
13034 (debugger64_register_map): Likewise.
13035 (ix86_conditional_register_usage): Clear REX2 register when APX
13037 (ix86_code_end): Add handling for REX2 reg.
13038 (print_reg): Likewise.
13039 (ix86_output_jmp_thunk_or_indirect): Likewise.
13040 (ix86_output_indirect_branch_via_reg): Likewise.
13041 (ix86_attr_length_vex_default): Likewise.
13042 (ix86_emit_save_regs): Adjust to allow saving r31.
13043 (ix86_register_priority): Set REX2 reg priority same as REX.
13044 (x86_extended_reg_mentioned_p): Add check for REX2 regs.
13045 (x86_extended_rex2reg_mentioned_p): New function.
13046 * config/i386/i386.h (CALL_USED_REGISTERS): Add new extended
13048 (REG_ALLOC_ORDER): Likewise.
13049 (FIRST_REX2_INT_REG): Define.
13050 (LAST_REX2_INT_REG): Ditto.
13051 (GENERAL_REGS): Add 16 new registers.
13052 (INT_SSE_REGS): Likewise.
13053 (FLOAT_INT_REGS): Likewise.
13054 (FLOAT_INT_SSE_REGS): Likewise.
13055 (INT_MASK_REGS): Likewise.
13056 (ALL_REGS):Likewise.
13057 (REX2_INT_REG_P): Define.
13058 (REX2_INT_REGNO_P): Ditto.
13059 (GENERAL_REGNO_P): Add REX2_INT_REGNO_P.
13060 (REGNO_OK_FOR_INDEX_P): Ditto.
13061 (REG_OK_FOR_INDEX_NONSTRICT_P): Add new extended registers.
13062 * config/i386/i386.md: Add 16 new integer general
13065 2023-10-07 Kong Lingling <lingling.kong@intel.com>
13066 Hongyu Wang <hongyu.wang@intel.com>
13067 Hongtao Liu <hongtao.liu@intel.com>
13069 * common/config/i386/cpuinfo.h (XSTATE_APX_F): New macro.
13070 (XCR_APX_F_ENABLED_MASK): Likewise.
13071 (get_available_features): Detect APX_F under
13072 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_APX_F_SET): New.
13073 (OPTION_MASK_ISA2_APX_F_UNSET): Likewise.
13074 (ix86_handle_option): Handle -mapxf.
13075 * common/config/i386/i386-cpuinfo.h (FEATURE_APX_F): New.
13076 * common/config/i386/i386-isas.h: Add entry for APX_F.
13077 * config/i386/cpuid.h (bit_APX_F): New.
13078 * config/i386/i386.h (bit_APX_F): (TARGET_APX_EGPR,
13079 TARGET_APX_PUSH2POP2, TARGET_APX_NDD): New define.
13080 * config/i386/i386-opts.h (enum apx_features): New enum.
13081 * config/i386/i386-isa.def (APX_F): New DEF_PTA.
13082 * config/i386/i386-options.cc (ix86_function_specific_save):
13083 Save ix86_apx_features.
13084 (ix86_function_specific_restore): Restore it.
13085 (ix86_valid_target_attribute_inner_p): Add mapxf.
13086 (ix86_option_override_internal): Set ix86_apx_features for PTA
13087 and TARGET_APX_F. Also reports error when APX_F is set but not
13088 having TARGET_64BIT.
13089 * config/i386/i386.opt: (-mapxf): New ISA flag option.
13090 (-mapx=): New enumeration option.
13091 (apx_features): New enum type.
13092 (apx_none): New enum value.
13093 (apx_egpr): Likewise.
13094 (apx_push2pop2): Likewise.
13095 (apx_ndd): Likewise.
13096 (apx_all): Likewise.
13097 * doc/invoke.texi: Document mapxf.
13099 2023-10-07 Hongyu Wang <hongyu.wang@intel.com>
13100 Kong Lingling <lingling.kong@intel.com>
13101 Hongtao Liu <hongtao.liu@intel.com>
13103 * addresses.h (index_reg_class): New wrapper function like
13105 * doc/tm.texi: Document INSN_INDEX_REG_CLASS.
13106 * doc/tm.texi.in: Ditto.
13107 * lra-constraints.cc (index_part_to_reg): Pass index_class.
13108 (process_address_1): Calls index_reg_class with curr_insn and
13109 replace INDEX_REG_CLASS with its return value index_cl.
13110 * reload.cc (find_reloads_address): Likewise.
13111 (find_reloads_address_1): Likewise.
13113 2023-10-07 Kong Lingling <lingling.kong@intel.com>
13114 Hongyu Wang <hongyu.wang@intel.com>
13115 Hongtao Liu <hongtao.liu@intel.com>
13117 * addresses.h (base_reg_class): Add insn argument and new macro
13118 INSN_BASE_REG_CLASS.
13119 (regno_ok_for_base_p_1): Add insn argument and new macro
13120 REGNO_OK_FOR_INSN_BASE_P.
13121 (regno_ok_for_base_p): Add insn argument and parse to ok_for_base_p_1.
13122 * doc/tm.texi: Document INSN_BASE_REG_CLASS and
13123 REGNO_OK_FOR_INSN_BASE_P.
13124 * doc/tm.texi.in: Ditto.
13125 * lra-constraints.cc (process_address_1): Pass insn to
13127 (curr_insn_transform): Ditto.
13128 * reload.cc (find_reloads): Ditto.
13129 (find_reloads_address): Ditto.
13130 (find_reloads_address_1): Ditto.
13131 (find_reloads_subreg_address): Ditto.
13132 * reload1.cc (maybe_fix_stack_asms): Ditto.
13134 2023-10-07 Jiufu Guo <guojiufu@linux.ibm.com>
13137 * config/rs6000/rs6000.md (movsf_from_si): Update to generate mtvsrws
13140 2023-10-07 Jiufu Guo <guojiufu@linux.ibm.com>
13143 * config/rs6000/predicates.md (lowpart_subreg_operator): New
13145 * config/rs6000/rs6000.md (any_rshift): New code_iterator.
13146 (movsf_from_si2): Rename to ...
13147 (movsf_from_si2_<code>): ... this.
13149 2023-10-07 Pan Li <pan2.li@intel.com>
13152 * config/riscv/riscv.cc (riscv_legitimize_address): Ensure
13153 object is a REG before extracting its' REGNO.
13155 2023-10-06 Roger Sayle <roger@nextmovesoftware.com>
13157 * config/i386/i386-expand.cc (ix86_split_ashl): Split shifts by
13158 one into add3_cc_overflow_1 followed by add3_carry.
13159 * config/i386/i386.md (@add<mode>3_cc_overflow_1): Renamed from
13160 "*add<mode>3_cc_overflow_1" to provide generator function.
13162 2023-10-06 Roger Sayle <roger@nextmovesoftware.com>
13163 Uros Bizjak <ubizjak@gmail.com>
13165 * config/i386/i386.cc (ix86_avoid_lea_for_addr): Split LEAs used
13166 to perform left shifts into shorter instructions with -Oz.
13168 2023-10-06 Vineet Gupta <vineetg@rivosinc.com>
13170 * config/riscv/riscv.md (mvconst_internal): Add !ira_in_progress.
13172 2023-10-06 Sandra Loosemore <sandra@codesourcery.com>
13174 * doc/extend.texi (Function Attributes): Mention standard attribute
13176 (Variable Attributes): Likewise.
13177 (Type Attributes): Likewise.
13178 (Attribute Syntax): Likewise.
13180 2023-10-06 Andrew Stubbs <ams@codesourcery.com>
13182 * config/gcn/gcn-valu.md (*mov<mode>): Convert to compact syntax.
13183 (mov<mode>_exec): Likewise.
13184 (mov<mode>_sgprbase): Likewise.
13185 * config/gcn/gcn.md (*mov<mode>_insn): Likewise.
13186 (*movti_insn): Likewise.
13188 2023-10-06 Andrew Stubbs <ams@codesourcery.com>
13190 * config/gcn/gcn.cc (print_operand): Adjust xcode type to fix warning.
13192 2023-10-06 Andrew Pinski <pinskia@gmail.com>
13194 PR middle-end/111699
13195 * match.pd ((c ? a : b) op d, (c ? a : b) op (c ? d : e),
13196 (v ? w : 0) ? a : b, c1 ? c2 ? a : b : b): Enable only for GIMPLE.
13198 2023-10-06 Jakub Jelinek <jakub@redhat.com>
13200 * ipa-prop.h (ipa_bits): Remove.
13201 (struct ipa_jump_func): Remove bits member.
13202 (struct ipcp_transformation): Remove bits member, adjust
13204 (ipa_get_ipa_bits_for_value): Remove.
13205 * ipa-prop.cc (struct ipa_bit_ggc_hash_traits): Remove.
13206 (ipa_bits_hash_table): Remove.
13207 (ipa_print_node_jump_functions_for_edge): Don't print bits.
13208 (ipa_get_ipa_bits_for_value): Remove.
13209 (ipa_set_jfunc_bits): Remove.
13210 (ipa_compute_jump_functions_for_edge): For pointers query
13211 pointer alignment before ipa_set_jfunc_vr and update_bitmask
13212 in there. For integral types, just rely on bitmask already
13213 being handled in value ranges.
13214 (ipa_check_create_edge_args): Don't create ipa_bits_hash_table.
13215 (ipcp_transformation_initialize): Neither here.
13216 (ipcp_transformation_t::duplicate): Don't copy bits vector.
13217 (ipa_write_jump_function): Don't stream bits here.
13218 (ipa_read_jump_function): Neither here.
13219 (useful_ipcp_transformation_info_p): Don't test bits vec.
13220 (write_ipcp_transformation_info): Don't stream bits here.
13221 (read_ipcp_transformation_info): Neither here.
13222 (ipcp_get_parm_bits): Get mask and value from m_vr rather
13224 (ipcp_update_bits): Remove.
13225 (ipcp_update_vr): For pointers, set_ptr_info_alignment from
13226 bitmask stored in value range.
13227 (ipcp_transform_function): Don't test bits vector, don't call
13229 * ipa-cp.cc (propagate_bits_across_jump_function): Don't use
13230 jfunc->bits, instead get mask and value from jfunc->m_vr.
13231 (ipcp_store_bits_results): Remove.
13232 (ipcp_store_vr_results): Incorporate parts of
13233 ipcp_store_bits_results here, merge the bitmasks with value
13234 range if both are supplied.
13235 (ipcp_driver): Don't call ipcp_store_bits_results.
13236 * ipa-sra.cc (zap_useless_ipcp_results): Remove *ts->bits
13239 2023-10-06 Pan Li <pan2.li@intel.com>
13241 * config/riscv/autovec.md: Update comments.
13243 2023-10-05 John David Anglin <danglin@gcc.gnu.org>
13245 * config/pa/pa32-linux.h (MALLOC_ABI_ALIGNMENT): Delete.
13247 2023-10-05 Andrew MacLeod <amacleod@redhat.com>
13249 * timevar.def (TV_TREE_FAST_VRP): New.
13250 * tree-pass.h (make_pass_fast_vrp): New prototype.
13251 * tree-vrp.cc (class fvrp_folder): New.
13252 (fvrp_folder::fvrp_folder): New.
13253 (fvrp_folder::~fvrp_folder): New.
13254 (fvrp_folder::value_of_expr): New.
13255 (fvrp_folder::value_on_edge): New.
13256 (fvrp_folder::value_of_stmt): New.
13257 (fvrp_folder::pre_fold_bb): New.
13258 (fvrp_folder::post_fold_bb): New.
13259 (fvrp_folder::pre_fold_stmt): New.
13260 (fvrp_folder::fold_stmt): New.
13261 (execute_fast_vrp): New.
13262 (pass_data_fast_vrp): New.
13263 (pass_vrp:execute): Check for fast VRP pass.
13264 (make_pass_fast_vrp): New.
13266 2023-10-05 Andrew MacLeod <amacleod@redhat.com>
13268 * gimple-range.cc (dom_ranger::dom_ranger): New.
13269 (dom_ranger::~dom_ranger): New.
13270 (dom_ranger::range_of_expr): New.
13271 (dom_ranger::edge_range): New.
13272 (dom_ranger::range_on_edge): New.
13273 (dom_ranger::range_in_bb): New.
13274 (dom_ranger::range_of_stmt): New.
13275 (dom_ranger::maybe_push_edge): New.
13276 (dom_ranger::pre_bb): New.
13277 (dom_ranger::post_bb): New.
13278 * gimple-range.h (class dom_ranger): New.
13280 2023-10-05 Andrew MacLeod <amacleod@redhat.com>
13282 * gimple-range-gori.cc (gori_stmt_info::gori_stmt_info): New.
13283 (gori_calc_operands): New.
13284 (gori_on_edge): New.
13285 (gori_name_helper): New.
13286 (gori_name_on_edge): New.
13287 * gimple-range-gori.h (gori_on_edge): New prototype.
13288 (gori_name_on_edge): New prototype.
13290 2023-10-05 Sergei Trofimovich <siarheit@google.com>
13293 PR gcov-profile/111559
13294 * ipa-utils.cc (ipa_merge_profiles): Avoid producing
13295 uninitialized probabilities when merging counters with zero
13298 2023-10-05 Uros Bizjak <ubizjak@gmail.com>
13301 * config/i386/i386-expand.cc (alg_usable_p): Reject libcall
13302 strategy for non-default address spaces.
13303 (decide_alg): Use loop strategy as a fallback strategy for
13304 non-default address spaces.
13306 2023-10-05 Jakub Jelinek <jakub@redhat.com>
13308 * sreal.cc (verify_aritmetics): Rename to ...
13309 (verify_arithmetics): ... this.
13310 (sreal_verify_arithmetics): Adjust caller.
13312 2023-10-05 Martin Jambor <mjambor@suse.cz>
13315 2023-10-03 Martin Jambor <mjambor@suse.cz>
13318 * cgraph.h (cgraph_edge): Add a parameter to
13319 redirect_call_stmt_to_callee.
13320 * ipa-param-manipulation.h (ipa_param_adjustments): Add a
13321 parameter to modify_call.
13322 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee): New
13323 parameter killed_ssas, pass it to padjs->modify_call.
13324 * ipa-param-manipulation.cc (purge_transitive_uses): New function.
13325 (ipa_param_adjustments::modify_call): New parameter killed_ssas.
13326 Instead of substituting uses, invoke purge_transitive_uses. If
13327 hash of killed SSAs has not been provided, create a temporary one
13328 and release SSAs that have been added to it.
13329 * tree-inline.cc (redirect_all_calls): Create
13330 id->killed_new_ssa_names earlier, pass it to edge redirection,
13332 (copy_body): Release SSAs in id->killed_new_ssa_names.
13334 2023-10-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13336 * config/riscv/autovec.md (@vec_series<mode>): Remove @.
13337 (vec_series<mode>): Ditto.
13338 * config/riscv/riscv-v.cc (expand_const_vector): Ditto.
13339 (shuffle_decompress_patterns): Ditto.
13341 2023-10-05 Claudiu Zissulescu <claziss@gmail.com>
13343 * config/arc/arc-passes.def: Remove arc_ifcvt pass.
13344 * config/arc/arc-protos.h (arc_ccfsm_branch_deleted_p): Remove.
13345 (arc_ccfsm_record_branch_deleted): Likewise.
13346 (arc_ccfsm_cond_exec_p): Likewise.
13347 (arc_ccfsm): Likewise.
13348 (arc_ccfsm_record_condition): Likewise.
13349 (make_pass_arc_ifcvt): Likewise.
13350 * config/arc/arc.cc (arc_ccfsm): Remove.
13351 (arc_ccfsm_current): Likewise.
13352 (ARC_CCFSM_BRANCH_DELETED_P): Likewise.
13353 (ARC_CCFSM_RECORD_BRANCH_DELETED): Likewise.
13354 (ARC_CCFSM_COND_EXEC_P): Likewise.
13355 (CCFSM_ISCOMPACT): Likewise.
13356 (CCFSM_DBR_ISCOMPACT): Likewise.
13357 (machine_function): Remove ccfsm related fields.
13358 (arc_ifcvt): Remove pass.
13359 (arc_print_operand): Remove `#` punct operand and other ccfsm
13361 (arc_ccfsm_advance): Remove.
13362 (arc_ccfsm_at_label): Likewise.
13363 (arc_ccfsm_record_condition): Likewise.
13364 (arc_ccfsm_post_advance): Likewise.
13365 (arc_ccfsm_branch_deleted_p): Likewise.
13366 (arc_ccfsm_record_branch_deleted): Likewise.
13367 (arc_ccfsm_cond_exec_p): Likewise.
13368 (arc_get_ccfsm_cond): Likewise.
13369 (arc_final_prescan_insn): Remove ccfsm references.
13370 (arc_internal_label): Likewise.
13371 (arc_reorg): Likewise.
13372 (arc_output_libcall): Likewise.
13373 * config/arc/arc.md: Remove ccfsm references and update related
13374 instruction patterns.
13376 2023-10-05 Claudiu Zissulescu <claziss@gmail.com>
13378 * config/arc/arc.cc (arc_init): Remove '^' punct char.
13379 (arc_print_operand): Remove related code.
13380 * config/arc/arc.md: Update patterns which uses '%&'.
13382 2023-10-05 Claudiu Zissulescu <claziss@gmail.com>
13384 * config/arc/arc-protos.h (arc_clear_unalign): Remove.
13385 (arc_toggle_unalign): Likewise.
13386 * config/arc/arc.cc (machine_function) Remove unalign.
13387 (arc_init): Remove `&` punct character.
13388 (arc_print_operand): Remove `&` related functions.
13389 (arc_verify_short): Update function's number of parameters.
13390 (output_short_suffix): Update function.
13391 (arc_short_long): Likewise.
13392 (arc_clear_unalign): Remove.
13393 (arc_toggle_unalign): Likewise.
13394 * config/arc/arc.h (ASM_OUTPUT_CASE_END): Remove.
13395 (ASM_OUTPUT_ALIGN): Update.
13396 * config/arc/arc.md: Remove all `%&` references.
13397 * config/arc/arc.opt (mannotate-align): Ignore option.
13398 * doc/invoke.texi (mannotate-align): Update description.
13400 2023-10-05 Richard Biener <rguenther@suse.de>
13402 * tree-vect-slp.cc (vect_build_slp_tree_1): Do not
13403 ask for internal_fn_p (CFN_LAST).
13405 2023-10-05 Richard Biener <rguenther@suse.de>
13407 * tree-ssa-sccvn.cc (rpo_elim::eliminate_avail): Not
13408 visited value numbers are available itself.
13410 2023-10-05 Richard Biener <rguenther@suse.de>
13413 * doc/extend.texi (attribute flatten): Clarify.
13415 2023-10-04 Roger Sayle <roger@nextmovesoftware.com>
13417 * config/arc/arc-protos.h (emit_shift): Delete prototype.
13418 (arc_pre_reload_split): New function prototype.
13419 * config/arc/arc.cc (emit_shift): Delete function.
13420 (arc_pre_reload_split): New predicate function, copied from i386,
13421 to schedule define_insn_and_split splitters to the split1 pass.
13422 * config/arc/arc.md (ashlsi3): Expand RTL template unconditionally.
13423 (ashrsi3): Likewise.
13424 (lshrsi3): Likewise.
13425 (shift_si3): Move after other shift patterns, and disable when
13426 operands[2] is one (which is handled by its own define_insn).
13427 Use shiftr4_operator, instead of shift4_operator, as this is no
13428 longer used for left shifts.
13429 (shift_si3_loop): Likewise. Additionally remove match_scratch.
13430 (*ashlsi3_nobs): New pre-reload define_insn_and_split.
13431 (*ashrsi3_nobs): Likewise.
13432 (*lshrsi3_nobs): Likewise.
13433 (rotrsi3_cnt1): Rename define_insn from *rotrsi3_cnt1.
13434 (add_shift): Rename define_insn from *add_shift.
13435 * config/arc/predicates.md (shiftl4_operator): Delete.
13436 (shift4_operator): Delete.
13438 2023-10-04 Roger Sayle <roger@nextmovesoftware.com>
13440 * config/arc/arc.md (ashlsi3_cnt1): Rename define_insn *ashlsi2_cnt1.
13441 Change type attribute to "unary", as this doesn't have operands[2].
13442 Change length attribute to "*,4" to allow compact representation.
13443 (lshrsi3_cnt1): Rename define_insn from *lshrsi3_cnt1. Change
13444 insn type attribute to "unary", as this doesn't have operands[2].
13445 (ashrsi3_cnt1): Rename define_insn from *ashrsi3_cnt1. Change
13446 insn type attribute to "unary", as this doesn't have operands[2].
13448 2023-10-04 Roger Sayle <roger@nextmovesoftware.com>
13450 PR rtl-optimization/110701
13451 * combine.cc (record_dead_and_set_regs_1): Split comment into
13452 pieces placed before the relevant clauses. When the SET_DEST
13453 is a partial_subreg_p, mark the bits outside of the updated
13454 portion of the destination as undefined.
13456 2023-10-04 Kito Cheng <kito.cheng@sifive.com>
13458 PR bootstrap/111664
13459 * opt-read.awk: Drop multidimensional arrays.
13460 * opth-gen.awk: Ditto.
13462 2023-10-04 Xi Ruoyao <xry111@xry111.site>
13464 * config/loongarch/loongarch.md (UNSPEC_FCOPYSIGN): Delete.
13465 (copysign<mode>3): Use copysign RTL instead of UNSPEC.
13467 2023-10-04 Jakub Jelinek <jakub@redhat.com>
13469 PR middle-end/111369
13470 * match.pd (x == cstN ? cst4 : cst3): Use
13471 build_nonstandard_integer_type only if type1 is BOOLEAN_TYPE.
13472 Fix comment typo. Formatting fix.
13473 (a?~t:t -> (-(a))^t): Always convert to type rather
13474 than using build_nonstandard_integer_type. Perform negation
13475 only if type has precision > 1 and is not signed BOOLEAN_TYPE.
13477 2023-10-04 Jakub Jelinek <jakub@redhat.com>
13479 PR tree-optimization/111668
13480 * match.pd (a ? CST1 : CST2): Handle the a ? -1 : 0 and
13481 a ? 0 : -1 cases before the powerof2cst cases and differentiate
13482 between 1-bit precision types, larger precision boolean types
13483 and other integral types. Fix comment pastos and formatting.
13485 2023-10-03 Andrew MacLeod <amacleod@redhat.com>
13487 * tree-ssanames.cc (set_range_info): Use get_ptr_info for
13488 pointers rather than range_info_get_range.
13490 2023-10-03 Martin Jambor <mjambor@suse.cz>
13492 * ipa-modref.h (modref_summary::dump): Make const.
13493 * ipa-modref.cc (modref_summary::dump): Likewise.
13494 (dump_lto_records): Dump to out instead of dump_file.
13496 2023-10-03 Martin Jambor <mjambor@suse.cz>
13499 * ipa-param-manipulation.cc
13500 (ipa_param_body_adjustments::mark_dead_statements): Verify that any
13501 return uses of PARAM will be removed.
13502 (ipa_param_body_adjustments::mark_clobbers_dead): Likewise.
13503 * ipa-sra.cc (isra_param_desc): New fields
13504 remove_only_when_retval_removed and split_only_when_retval_removed.
13505 (struct gensum_param_desc): Likewise. Fix comment long line.
13506 (ipa_sra_function_summaries::duplicate): Copy the new flags.
13507 (dump_gensum_param_descriptor): Dump the new flags.
13508 (dump_isra_param_descriptor): Likewise.
13509 (isra_track_scalar_value_uses): New parameter desc. Set its flag
13510 remove_only_when_retval_removed when encountering a simple return.
13511 (isra_track_scalar_param_local_uses): Replace parameter call_uses_p
13512 with desc. Pass it to isra_track_scalar_value_uses and set its
13514 (ptr_parm_has_nonarg_uses): Accept parameter descriptor as a
13515 parameter. If there is a direct return use, mark any..
13516 (create_parameter_descriptors): Pass the whole parameter descriptor to
13517 isra_track_scalar_param_local_uses and ptr_parm_has_nonarg_uses.
13518 (process_scan_results): Copy the new flags.
13519 (isra_write_node_summary): Stream the new flags.
13520 (isra_read_node_info): Likewise.
13521 (adjust_parameter_descriptions): Check that transformations
13522 requring return removal only happen when return value is removed.
13523 Restructure main loop. Adjust dump message.
13525 2023-10-03 Martin Jambor <mjambor@suse.cz>
13528 * cgraph.h (cgraph_edge): Add a parameter to
13529 redirect_call_stmt_to_callee.
13530 * ipa-param-manipulation.h (ipa_param_adjustments): Add a
13531 parameter to modify_call.
13532 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee): New
13533 parameter killed_ssas, pass it to padjs->modify_call.
13534 * ipa-param-manipulation.cc (purge_transitive_uses): New function.
13535 (ipa_param_adjustments::modify_call): New parameter killed_ssas.
13536 Instead of substituting uses, invoke purge_transitive_uses. If
13537 hash of killed SSAs has not been provided, create a temporary one
13538 and release SSAs that have been added to it.
13539 * tree-inline.cc (redirect_all_calls): Create
13540 id->killed_new_ssa_names earlier, pass it to edge redirection,
13542 (copy_body): Release SSAs in id->killed_new_ssa_names.
13544 2023-10-03 Andrew MacLeod <amacleod@redhat.com>
13546 * passes.def (pass_vrp): Pass "final pass" flag as parameter.
13547 * tree-vrp.cc (vrp_pass_num): Remove.
13548 (pass_vrp::my_pass): Remove.
13549 (pass_vrp::pass_vrp): Add warn_p as a parameter.
13550 (pass_vrp::final_p): New.
13551 (pass_vrp::set_pass_param): Set final_p param.
13552 (pass_vrp::execute): Call execute_range_vrp with no conditions.
13553 (make_pass_vrp): Pass additional parameter.
13554 (make_pass_early_vrp): Ditto.
13556 2023-10-03 Andrew MacLeod <amacleod@redhat.com>
13558 * tree-ssanames.cc (set_range_info): Return true only if the
13559 current value changes.
13561 2023-10-03 David Malcolm <dmalcolm@redhat.com>
13563 * diagnostic.cc (diagnostic_set_info_translated): Update for "m_"
13564 prefixes to text_info fields.
13565 (diagnostic_report_diagnostic): Likewise.
13566 (verbatim): Use text_info ctor.
13567 (simple_diagnostic_path::add_event): Likewise.
13568 (simple_diagnostic_path::add_thread_event): Likewise.
13569 * dumpfile.cc (dump_pretty_printer::decode_format): Update for
13570 "m_" prefixes to text_info fields.
13571 (dump_context::dump_printf_va): Use text_info ctor.
13572 * graphviz.cc (graphviz_out::graphviz_out): Use text_info ctor.
13573 (graphviz_out::print): Likewise.
13574 * opt-problem.cc (opt_problem::opt_problem): Likewise.
13575 * pretty-print.cc (pp_format): Update for "m_" prefixes to
13577 (pp_printf): Use text_info ctor.
13578 (pp_verbatim): Likewise.
13579 (assert_pp_format_va): Likewise.
13580 * pretty-print.h (struct text_info): Add ctors. Add "m_" prefix
13582 * text-art/styled-string.cc (styled_string::from_fmt_va): Use
13584 * tree-diagnostic.cc (default_tree_printer): Update for "m_"
13585 prefixes to text_info fields.
13586 * tree-pretty-print.h (pp_ti_abstract_origin): Likewise.
13588 2023-10-03 Roger Sayle <roger@nextmovesoftware.com>
13590 * config/arc/arc.md (CC_ltu): New mode iterator for CC and CC_C.
13591 (scc_ltu_<mode>): New define_insn to handle LTU form of scc_insn.
13592 (*scc_insn): Don't split to a conditional move sequence for LTU.
13594 2023-10-03 Andrea Corallo <andrea.corallo@arm.com>
13596 * config/aarch64/aarch64.md (@ccmp<CC_ONLY:mode><GPI:mode>)
13597 (@ccmp<CC_ONLY:mode><GPI:mode>_rev, *call_insn, *call_value_insn)
13598 (*mov<mode>_aarch64, load_pair_sw_<SX:mode><SX2:mode>)
13599 (load_pair_dw_<DX:mode><DX2:mode>)
13600 (store_pair_sw_<SX:mode><SX2:mode>)
13601 (store_pair_dw_<DX:mode><DX2:mode>, *extendsidi2_aarch64)
13602 (*zero_extendsidi2_aarch64, *load_pair_zero_extendsidi2_aarch64)
13603 (*extend<SHORT:mode><GPI:mode>2_aarch64)
13604 (*zero_extend<SHORT:mode><GPI:mode>2_aarch64)
13605 (*extendqihi2_aarch64, *zero_extendqihi2_aarch64)
13606 (*add<mode>3_aarch64, *addsi3_aarch64_uxtw, *add<mode>3_poly_1)
13607 (add<mode>3_compare0, *addsi3_compare0_uxtw)
13608 (*add<mode>3_compareC_cconly, add<mode>3_compareC)
13609 (*add<mode>3_compareV_cconly_imm, add<mode>3_compareV_imm)
13610 (*add<mode>3nr_compare0, subdi3, subv<GPI:mode>_imm)
13611 (*cmpv<GPI:mode>_insn, sub<mode>3_compare1_imm, neg<mode>2)
13612 (cmp<mode>, fcmp<mode>, fcmpe<mode>, *cmov<mode>_insn)
13613 (*cmovsi_insn_uxtw, <optab><mode>3, *<optab>si3_uxtw)
13614 (*and<mode>3_compare0, *andsi3_compare0_uxtw, one_cmpl<mode>2)
13615 (*<NLOGICAL:optab>_one_cmpl<mode>3, *and<mode>3nr_compare0)
13616 (*aarch64_ashl_sisd_or_int_<mode>3)
13617 (*aarch64_lshr_sisd_or_int_<mode>3)
13618 (*aarch64_ashr_sisd_or_int_<mode>3, *ror<mode>3_insn)
13619 (*<optab>si3_insn_uxtw, <optab>_trunc<fcvt_target><GPI:mode>2)
13620 (<optab><fcvt_target><GPF:mode>2)
13621 (<FCVT_F2FIXED:fcvt_fixed_insn><GPF:mode>3)
13622 (<FCVT_FIXED2F:fcvt_fixed_insn><GPI:mode>3)
13623 (*aarch64_<optab><mode>3_cssc, copysign<GPF:mode>3_insn): Update
13625 * config/aarch64/aarch64-sve2.md (@aarch64_scatter_stnt<mode>)
13626 (@aarch64_scatter_stnt_<SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
13627 (*aarch64_mul_unpredicated_<mode>)
13628 (@aarch64_pred_<sve_int_op><mode>, *cond_<sve_int_op><mode>_2)
13629 (*cond_<sve_int_op><mode>_3, *cond_<sve_int_op><mode>_any)
13630 (*cond_<sve_int_op><mode>_z, @aarch64_pred_<sve_int_op><mode>)
13631 (*cond_<sve_int_op><mode>_2, *cond_<sve_int_op><mode>_3)
13632 (*cond_<sve_int_op><mode>_any, @aarch64_sve_<sve_int_op><mode>)
13633 (@aarch64_sve_<sve_int_op>_lane_<mode>)
13634 (@aarch64_sve_add_mul_lane_<mode>)
13635 (@aarch64_sve_sub_mul_lane_<mode>, @aarch64_sve2_xar<mode>)
13636 (*aarch64_sve2_bcax<mode>, @aarch64_sve2_eor3<mode>)
13637 (*aarch64_sve2_nor<mode>, *aarch64_sve2_nand<mode>)
13638 (*aarch64_sve2_bsl<mode>, *aarch64_sve2_nbsl<mode>)
13639 (*aarch64_sve2_bsl1n<mode>, *aarch64_sve2_bsl2n<mode>)
13640 (*aarch64_sve2_sra<mode>, @aarch64_sve_add_<sve_int_op><mode>)
13641 (*aarch64_sve2_<su>aba<mode>, @aarch64_sve_add_<sve_int_op><mode>)
13642 (@aarch64_sve_add_<sve_int_op>_lane_<mode>)
13643 (@aarch64_sve_qadd_<sve_int_op><mode>)
13644 (@aarch64_sve_qadd_<sve_int_op>_lane_<mode>)
13645 (@aarch64_sve_sub_<sve_int_op><mode>)
13646 (@aarch64_sve_sub_<sve_int_op>_lane_<mode>)
13647 (@aarch64_sve_qsub_<sve_int_op><mode>)
13648 (@aarch64_sve_qsub_<sve_int_op>_lane_<mode>)
13649 (@aarch64_sve_<sve_fp_op><mode>, @aarch64_<sve_fp_op>_lane_<mode>)
13650 (@aarch64_pred_<sve_int_op><mode>)
13651 (@aarch64_pred_<sve_fp_op><mode>, *cond_<sve_int_op><mode>_2)
13652 (*cond_<sve_int_op><mode>_z, @aarch64_sve_<optab><mode>)
13653 (@aarch64_<optab>_lane_<mode>, @aarch64_sve_<optab><mode>)
13654 (@aarch64_<optab>_lane_<mode>, @aarch64_pred_<sve_fp_op><mode>)
13655 (*cond_<sve_fp_op><mode>_any_relaxed)
13656 (*cond_<sve_fp_op><mode>_any_strict)
13657 (@aarch64_pred_<sve_int_op><mode>, *cond_<sve_int_op><mode>)
13658 (@aarch64_pred_<sve_fp_op><mode>, *cond_<sve_fp_op><mode>)
13659 (*cond_<sve_fp_op><mode>_strict): Update to new syntax.
13660 * config/aarch64/aarch64-sve.md (*aarch64_sve_mov<mode>_ldr_str)
13661 (*aarch64_sve_mov<mode>_no_ldr_str, @aarch64_pred_mov<mode>)
13662 (*aarch64_sve_mov<mode>, aarch64_wrffr)
13663 (mask_scatter_store<mode><v_int_container>)
13664 (*mask_scatter_store<mode><v_int_container>_<su>xtw_unpacked)
13665 (*mask_scatter_store<mode><v_int_container>_sxtw)
13666 (*mask_scatter_store<mode><v_int_container>_uxtw)
13667 (@aarch64_scatter_store_trunc<VNx4_NARROW:mode><VNx4_WIDE:mode>)
13668 (@aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>)
13669 (*aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>_sxtw)
13670 (*aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>_uxtw)
13671 (*vec_duplicate<mode>_reg, vec_shl_insert_<mode>)
13672 (vec_series<mode>, @extract_<last_op>_<mode>)
13673 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2)
13674 (*cond_<optab><mode>_any, @aarch64_pred_<optab><mode>)
13675 (@aarch64_sve_revbhw_<SVE_ALL:mode><PRED_HSD:mode>)
13676 (@cond_<optab><mode>)
13677 (*<optab><SVE_PARTIAL_I:mode><SVE_HSDI:mode>2)
13678 (@aarch64_pred_sxt<SVE_FULL_HSDI:mode><SVE_PARTIAL_I:mode>)
13679 (@aarch64_cond_sxt<SVE_FULL_HSDI:mode><SVE_PARTIAL_I:mode>)
13680 (*cond_uxt<mode>_2, *cond_uxt<mode>_any, *cnot<mode>)
13681 (*cond_cnot<mode>_2, *cond_cnot<mode>_any)
13682 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2_relaxed)
13683 (*cond_<optab><mode>_2_strict, *cond_<optab><mode>_any_relaxed)
13684 (*cond_<optab><mode>_any_strict, @aarch64_pred_<optab><mode>)
13685 (*cond_<optab><mode>_2, *cond_<optab><mode>_3)
13686 (*cond_<optab><mode>_any, add<mode>3, sub<mode>3)
13687 (@aarch64_pred_<su>abd<mode>, *aarch64_cond_<su>abd<mode>_2)
13688 (*aarch64_cond_<su>abd<mode>_3, *aarch64_cond_<su>abd<mode>_any)
13689 (@aarch64_sve_<optab><mode>, @aarch64_pred_<optab><mode>)
13690 (*cond_<optab><mode>_2, *cond_<optab><mode>_z)
13691 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2)
13692 (*cond_<optab><mode>_3, *cond_<optab><mode>_any, <optab><mode>3)
13693 (*cond_bic<mode>_2, *cond_bic<mode>_any)
13694 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2_const)
13695 (*cond_<optab><mode>_any_const, *cond_<sve_int_op><mode>_m)
13696 (*cond_<sve_int_op><mode>_z, *sdiv_pow2<mode>3)
13697 (*cond_<sve_int_op><mode>_2, *cond_<sve_int_op><mode>_any)
13698 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2_relaxed)
13699 (*cond_<optab><mode>_2_strict, *cond_<optab><mode>_any_relaxed)
13700 (*cond_<optab><mode>_any_strict, @aarch64_pred_<optab><mode>)
13701 (*cond_<optab><mode>_2_relaxed, *cond_<optab><mode>_2_strict)
13702 (*cond_<optab><mode>_2_const_relaxed)
13703 (*cond_<optab><mode>_2_const_strict)
13704 (*cond_<optab><mode>_3_relaxed, *cond_<optab><mode>_3_strict)
13705 (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
13706 (*cond_<optab><mode>_any_const_relaxed)
13707 (*cond_<optab><mode>_any_const_strict)
13708 (@aarch64_pred_<optab><mode>, *cond_add<mode>_2_const_relaxed)
13709 (*cond_add<mode>_2_const_strict)
13710 (*cond_add<mode>_any_const_relaxed)
13711 (*cond_add<mode>_any_const_strict, @aarch64_pred_<optab><mode>)
13712 (*cond_<optab><mode>_2_relaxed, *cond_<optab><mode>_2_strict)
13713 (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
13714 (@aarch64_pred_<optab><mode>, *cond_sub<mode>_3_const_relaxed)
13715 (*cond_sub<mode>_3_const_strict, *cond_sub<mode>_const_relaxed)
13716 (*cond_sub<mode>_const_strict, *aarch64_pred_abd<mode>_relaxed)
13717 (*aarch64_pred_abd<mode>_strict)
13718 (*aarch64_cond_abd<mode>_2_relaxed)
13719 (*aarch64_cond_abd<mode>_2_strict)
13720 (*aarch64_cond_abd<mode>_3_relaxed)
13721 (*aarch64_cond_abd<mode>_3_strict)
13722 (*aarch64_cond_abd<mode>_any_relaxed)
13723 (*aarch64_cond_abd<mode>_any_strict, @aarch64_pred_<optab><mode>)
13724 (@aarch64_pred_fma<mode>, *cond_fma<mode>_2, *cond_fma<mode>_4)
13725 (*cond_fma<mode>_any, @aarch64_pred_fnma<mode>)
13726 (*cond_fnma<mode>_2, *cond_fnma<mode>_4, *cond_fnma<mode>_any)
13727 (<sur>dot_prod<vsi2qi>, @aarch64_<sur>dot_prod_lane<vsi2qi>)
13728 (@<sur>dot_prod<vsi2qi>, @aarch64_<sur>dot_prod_lane<vsi2qi>)
13729 (@aarch64_sve_add_<optab><vsi2qi>, @aarch64_pred_<optab><mode>)
13730 (*cond_<optab><mode>_2_relaxed, *cond_<optab><mode>_2_strict)
13731 (*cond_<optab><mode>_4_relaxed, *cond_<optab><mode>_4_strict)
13732 (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
13733 (@aarch64_<optab>_lane_<mode>, @aarch64_pred_<optab><mode>)
13734 (*cond_<optab><mode>_4_relaxed, *cond_<optab><mode>_4_strict)
13735 (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
13736 (@aarch64_<optab>_lane_<mode>, @aarch64_sve_tmad<mode>)
13737 (@aarch64_sve_<sve_fp_op>vnx4sf)
13738 (@aarch64_sve_<sve_fp_op>_lanevnx4sf)
13739 (@aarch64_sve_<sve_fp_op><mode>, *vcond_mask_<mode><vpred>)
13740 (@aarch64_sel_dup<mode>, @aarch64_pred_cmp<cmp_op><mode>)
13741 (*cmp<cmp_op><mode>_cc, *cmp<cmp_op><mode>_ptest)
13742 (@aarch64_pred_fcm<cmp_op><mode>, @fold_extract_<last_op>_<mode>)
13743 (@aarch64_fold_extract_vector_<last_op>_<mode>)
13744 (@aarch64_sve_splice<mode>)
13745 (@aarch64_sve_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>)
13746 (@aarch64_sve_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>)
13747 (*cond_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>_relaxed)
13748 (*cond_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>_strict)
13749 (*cond_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>)
13750 (@aarch64_sve_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>)
13751 (@aarch64_sve_<optab>_extend<VNx4SI_ONLY:mode><VNx2DF_ONLY:mode>)
13752 (*cond_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>_relaxed)
13753 (*cond_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>_strict)
13754 (*cond_<optab>_extend<VNx4SI_ONLY:mode><VNx2DF_ONLY:mode>)
13755 (@aarch64_sve_<optab>_trunc<SVE_FULL_SDF:mode><SVE_FULL_HSF:mode>)
13756 (*cond_<optab>_trunc<SVE_FULL_SDF:mode><SVE_FULL_HSF:mode>)
13757 (@aarch64_sve_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
13758 (*cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
13759 (@aarch64_sve_<optab>_nontrunc<SVE_FULL_HSF:mode><SVE_FULL_SDF:mode>)
13760 (*cond_<optab>_nontrunc<SVE_FULL_HSF:mode><SVE_FULL_SDF:mode>)
13761 (@aarch64_brk<brk_op>, *aarch64_sve_<inc_dec><mode>_cntp): Update
13763 * config/aarch64/aarch64-simd.md (aarch64_simd_dup<mode>)
13764 (load_pair<DREG:mode><DREG2:mode>)
13765 (vec_store_pair<DREG:mode><DREG2:mode>, aarch64_simd_stp<mode>)
13766 (aarch64_simd_mov_from_<mode>low)
13767 (aarch64_simd_mov_from_<mode>high, and<mode>3<vczle><vczbe>)
13768 (ior<mode>3<vczle><vczbe>, aarch64_simd_ashr<mode><vczle><vczbe>)
13769 (aarch64_simd_bsl<mode>_internal<vczle><vczbe>)
13770 (*aarch64_simd_bsl<mode>_alt<vczle><vczbe>)
13771 (aarch64_simd_bsldi_internal, aarch64_simd_bsldi_alt)
13772 (store_pair_lanes<mode>, *aarch64_combine_internal<mode>)
13773 (*aarch64_combine_internal_be<mode>, *aarch64_combinez<mode>)
13774 (*aarch64_combinez_be<mode>)
13775 (aarch64_cm<optab><mode><vczle><vczbe>, *aarch64_cm<optab>di)
13776 (aarch64_cm<optab><mode><vczle><vczbe>, *aarch64_mov<mode>)
13777 (*aarch64_be_mov<mode>, *aarch64_be_movoi): Update to new syntax.
13779 2023-10-03 Andrea Corallo <andrea.corallo@arm.com>
13781 * gensupport.cc (convert_syntax): Skip spaces before "cons:"
13782 in new compact pattern syntax.
13784 2023-10-03 Richard Sandiford <richard.sandiford@arm.com>
13786 * gensupport.cc (convert_syntax): Updated to support unordered
13787 constraints in compact syntax.
13789 2023-10-02 Michael Meissner <meissner@linux.ibm.com>
13791 * config/rs6000/rs6000.md (UNSPEC_COPYSIGN): Delete.
13792 (copysign<mode>3_fcpsg): Use copysign RTL instead of UNSPEC.
13793 (copysign<mode>3_hard): Likewise.
13794 (copysign<mode>3_soft): Likewise.
13795 * config/rs6000/vector.md (vector_copysign<mode>3): Use copysign RTL
13797 * config/rs6000/vsx.md (vsx_copysign<mode>3): Use copysign RTL instead
13800 2023-10-02 David Malcolm <dmalcolm@redhat.com>
13802 * diagnostic-format-json.cc (toplevel_array): Remove global in
13803 favor of json_output_format::m_top_level_array.
13804 (cur_group): Likewise, for json_output_format::m_cur_group.
13805 (cur_children_array): Likewise, for
13806 json_output_format::m_cur_children_array.
13807 (class json_output_format): New.
13808 (json_begin_diagnostic): Remove, in favor of
13809 json_output_format::on_begin_diagnostic.
13810 (json_end_diagnostic): Convert to...
13811 (json_output_format::on_end_diagnostic): ...this.
13812 (json_begin_group): Remove, in favor of
13813 json_output_format::on_begin_group.
13814 (json_end_group): Remove, in favor of
13815 json_output_format::on_end_group.
13816 (json_flush_to_file): Remove, in favor of
13817 json_output_format::flush_to_file.
13818 (json_stderr_final_cb): Remove, in favor of json_output_format
13820 (json_output_base_file_name): Remove global.
13821 (class json_stderr_output_format): New.
13822 (json_file_final_cb): Remove.
13823 (class json_file_output_format): New.
13824 (json_emit_diagram): Remove.
13825 (diagnostic_output_format_init_json): Update.
13826 (diagnostic_output_format_init_json_file): Update.
13827 * diagnostic-format-sarif.cc (the_builder): Remove this global,
13828 moving to a field of the sarif_output_format.
13829 (sarif_builder::maybe_make_artifact_content_object): Use the
13830 context's m_file_cache.
13831 (get_source_lines): Convert to...
13832 (sarif_builder::get_source_lines): ...this, using context's
13834 (sarif_begin_diagnostic): Remove, in favor of
13835 sarif_output_format::on_begin_diagnostic.
13836 (sarif_end_diagnostic): Remove, in favor of
13837 sarif_output_format::on_end_diagnostic.
13838 (sarif_begin_group): Remove, in favor of
13839 sarif_output_format::on_begin_group.
13840 (sarif_end_group): Remove, in favor of
13841 sarif_output_format::on_end_group.
13842 (sarif_flush_to_file): Delete.
13843 (sarif_stderr_final_cb): Delete.
13844 (sarif_output_base_file_name): Delete.
13845 (sarif_file_final_cb): Delete.
13846 (class sarif_output_format): New.
13847 (sarif_emit_diagram): Delete.
13848 (class sarif_stream_output_format): New.
13849 (class sarif_file_output_format): New.
13850 (diagnostic_output_format_init_sarif): Update.
13851 (diagnostic_output_format_init_sarif_stderr): Update.
13852 (diagnostic_output_format_init_sarif_file): Update.
13853 (diagnostic_output_format_init_sarif_stream): Update.
13854 * diagnostic-show-locus.cc (diagnostic_show_locus): Update.
13855 * diagnostic.cc (default_diagnostic_final_cb): Delete, moving to
13856 diagnostic_text_output_format's dtor.
13857 (diagnostic_initialize): Update, making a new instance of
13858 diagnostic_text_output_format.
13859 (diagnostic_finish): Delete m_output_format, rather than calling
13861 (diagnostic_report_diagnostic): Assert that m_output_format is
13862 non-NULL. Replace call to begin_group_cb with call to
13863 m_output_format->on_begin_group. Replace call to
13864 diagnostic_starter with call to
13865 m_output_format->on_begin_diagnostic. Replace call to
13866 diagnostic_finalizer with call to
13867 m_output_format->on_end_diagnostic.
13868 (diagnostic_emit_diagram): Replace both optional call to
13869 m_diagrams.m_emission_cb and default implementation with call to
13870 m_output_format->on_diagram. Move default implementation to
13871 diagnostic_text_output_format::on_diagram.
13872 (auto_diagnostic_group::~auto_diagnostic_group): Replace call to
13873 end_group_cb with call to m_output_format->on_end_group.
13874 (diagnostic_text_output_format::~diagnostic_text_output_format):
13875 New, based on default_diagnostic_final_cb.
13876 (diagnostic_text_output_format::on_begin_diagnostic): New, based
13877 on code from diagnostic_report_diagnostic.
13878 (diagnostic_text_output_format::on_end_diagnostic): Likewise.
13879 (diagnostic_text_output_format::on_diagram): New, based on code
13880 from diagnostic_emit_diagram.
13881 * diagnostic.h (class diagnostic_output_format): New.
13882 (class diagnostic_text_output_format): New.
13883 (diagnostic_context::begin_diagnostic): Move to...
13884 (diagnostic_context::m_text_callbacks::begin_diagnostic): ...here.
13885 (diagnostic_context::start_span): Move to...
13886 (diagnostic_context::m_text_callbacks::start_span): ...here.
13887 (diagnostic_context::end_diagnostic): Move to...
13888 (diagnostic_context::m_text_callbacks::end_diagnostic): ...here.
13889 (diagnostic_context::begin_group_cb): Remove, in favor of
13890 m_output_format->on_begin_group.
13891 (diagnostic_context::end_group_cb): Remove, in favor of
13892 m_output_format->on_end_group.
13893 (diagnostic_context::final_cb): Remove, in favor of
13894 m_output_format's dtor.
13895 (diagnostic_context::m_output_format): New field.
13896 (diagnostic_context::m_diagrams.m_emission_cb): Remove, in favor
13897 of m_output_format->on_diagram.
13898 (diagnostic_starter): Update.
13899 (diagnostic_finalizer): Update.
13900 (diagnostic_output_format_init_sarif_stream): New.
13901 * input.cc (location_get_source_line): Move implementation apart from
13902 call to diagnostic_file_cache_init to...
13903 (file_cache::get_source_line): ...this new function...
13904 (location_get_source_line): ...and reintroduce, rewritten in terms of
13905 file_cache::get_source_line.
13906 (get_source_file_content): Likewise, refactor into...
13907 (file_cache::get_source_file_content): ...this new function.
13908 * input.h (file_cache::get_source_line): New decl.
13909 (file_cache::get_source_file_content): New decl.
13910 * selftest-diagnostic.cc
13911 (test_diagnostic_context::test_diagnostic_context): Update.
13912 * tree-diagnostic-path.cc (event_range::print): Update for
13913 change to diagnostic_context's start_span callback.
13915 2023-10-02 David Malcolm <dmalcolm@redhat.com>
13917 * diagnostic-show-locus.cc: Update for reorganization of
13918 source-printing fields of diagnostic_context.
13919 * diagnostic.cc (diagnostic_set_caret_max_width): Likewise.
13920 (diagnostic_initialize): Likewise.
13921 * diagnostic.h (diagnostic_context::show_caret): Move to...
13922 (diagnostic_context::m_source_printing::enabled): ...here.
13923 (diagnostic_context::caret_max_width): Move to...
13924 (diagnostic_context::m_source_printing::max_width): ...here.
13925 (diagnostic_context::caret_chars): Move to...
13926 (diagnostic_context::m_source_printing::caret_chars): ...here.
13927 (diagnostic_context::colorize_source_p): Move to...
13928 (diagnostic_context::m_source_printing::colorize_source_p): ...here.
13929 (diagnostic_context::show_labels_p): Move to...
13930 (diagnostic_context::m_source_printing::show_labels_p): ...here.
13931 (diagnostic_context::show_line_numbers_p): Move to...
13932 (diagnostic_context::m_source_printing::show_line_numbers_p): ...here.
13933 (diagnostic_context::min_margin_width): Move to...
13934 (diagnostic_context::m_source_printing::min_margin_width): ...here.
13935 (diagnostic_context::show_ruler_p): Move to...
13936 (diagnostic_context::m_source_printing::show_ruler_p): ...here.
13937 (diagnostic_same_line): Update for above changes.
13938 * opts.cc (common_handle_option): Update for reorganization of
13939 source-printing fields of diagnostic_context.
13940 * selftest-diagnostic.cc
13941 (test_diagnostic_context::test_diagnostic_context): Likewise.
13942 * toplev.cc (general_init): Likewise.
13943 * tree-diagnostic-path.cc (struct event_range): Likewise.
13945 2023-10-02 David Malcolm <dmalcolm@redhat.com>
13947 * diagnostic.cc (diagnostic_initialize): Initialize
13948 set_locations_cb to nullptr.
13950 2023-10-02 Wilco Dijkstra <wilco.dijkstra@arm.com>
13953 * config/arm/constraints.md: Remove Pf constraint.
13954 * config/arm/sync.md (arm_atomic_load<mode>): Add new pattern.
13955 (arm_atomic_load_acquire<mode>): Likewise.
13956 (arm_atomic_store<mode>): Likewise.
13957 (arm_atomic_store_release<mode>): Likewise.
13958 (atomic_load<mode>): Switch patterns to define_expand.
13959 (atomic_store<mode>): Likewise.
13960 (arm_atomic_loaddi2_ldrd): Remove predication.
13961 (arm_load_exclusive<mode>): Likewise.
13962 (arm_load_acquire_exclusive<mode>): Likewise.
13963 (arm_load_exclusivesi): Likewise.
13964 (arm_load_acquire_exclusivesi): Likewise.
13965 (arm_load_exclusivedi): Likewise.
13966 (arm_load_acquire_exclusivedi): Likewise.
13967 (arm_store_exclusive<mode>): Likewise.
13968 (arm_store_release_exclusivedi): Likewise.
13969 (arm_store_release_exclusive<mode>): Likewise.
13970 * config/arm/unspecs.md: Add VUNSPEC_LDR and VUNSPEC_STR.
13972 2023-10-02 Tamar Christina <tamar.christina@arm.com>
13975 2023-10-02 Tamar Christina <tamar.christina@arm.com>
13977 PR tree-optimization/109154
13978 * tree-if-conv.cc (INCLUDE_ALGORITHM): Remove.
13979 (cmp_arg_entry): New.
13980 (predicate_scalar_phi): Use it.
13982 2023-10-02 Tamar Christina <tamar.christina@arm.com>
13984 * config/aarch64/aarch64-simd.md (xorsign<mode>3): Renamed to..
13985 (@xorsign<mode>3): ...This.
13986 * config/aarch64/aarch64.md (xorsign<mode>3): Renamed to...
13987 (@xorsign<mode>3): ..This and emit vectors directly
13988 * config/aarch64/iterators.md (VCONQ): Add SF and DF.
13990 2023-10-02 Tamar Christina <tamar.christina@arm.com>
13992 * emit-rtl.cc (validate_subreg): Relax subreg rule.
13994 2023-10-02 Tamar Christina <tamar.christina@arm.com>
13996 PR tree-optimization/109154
13997 * tree-if-conv.cc (INCLUDE_ALGORITHM): Remove.
13998 (cmp_arg_entry): New.
13999 (predicate_scalar_phi): Use it.
14001 2023-10-02 Richard Sandiford <richard.sandiford@arm.com>
14003 PR bootstrap/111642
14004 * rtl-tests.cc (const_poly_int_tests<N>::run): Use a local
14005 poly_int64 typedef.
14006 * simplify-rtx.cc (simplify_const_poly_int_tests<N>::run): Likewise.
14008 2023-10-02 Joern Rennecke <joern.rennecke@embecosm.com>
14009 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14011 * config/riscv/riscv-protos.h (riscv_vector::expand_block_move):
14013 * config/riscv/riscv-v.cc (riscv_vector::expand_block_move):
14015 * config/riscv/riscv.md (cpymemsi): Use riscv_vector::expand_block_move.
14017 (cpymem<P:mode>) .. this.
14019 2023-10-01 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
14021 * combine.cc (simplify_compare_const): Properly handle unsigned
14022 constants while narrowing comparison of memory and constants.
14024 2023-10-01 Feng Wang <wangfeng@eswincomputing.com>
14026 * config/riscv/riscv-opts.h (MASK_ZICSR): Delete.
14027 (MASK_ZIFENCEI): Delete;
14028 (MASK_ZIHINTNTL): Ditto.
14029 (MASK_ZIHINTPAUSE): Ditto.
14030 (TARGET_ZICSR): Ditto.
14031 (TARGET_ZIFENCEI): Ditto.
14032 (TARGET_ZIHINTNTL): Ditto.
14033 (TARGET_ZIHINTPAUSE): Ditto.
14034 (MASK_ZAWRS): Ditto.
14035 (TARGET_ZAWRS): Ditto.
14040 (TARGET_ZBA): Ditto.
14041 (TARGET_ZBB): Ditto.
14042 (TARGET_ZBC): Ditto.
14043 (TARGET_ZBS): Ditto.
14044 (MASK_ZFINX): Ditto.
14045 (MASK_ZDINX): Ditto.
14046 (MASK_ZHINX): Ditto.
14047 (MASK_ZHINXMIN): Ditto.
14048 (TARGET_ZFINX): Ditto.
14049 (TARGET_ZDINX): Ditto.
14050 (TARGET_ZHINX): Ditto.
14051 (TARGET_ZHINXMIN): Ditto.
14052 (MASK_ZBKB): Ditto.
14053 (MASK_ZBKC): Ditto.
14054 (MASK_ZBKX): Ditto.
14055 (MASK_ZKNE): Ditto.
14056 (MASK_ZKND): Ditto.
14057 (MASK_ZKNH): Ditto.
14059 (MASK_ZKSED): Ditto.
14060 (MASK_ZKSH): Ditto.
14062 (TARGET_ZBKB): Ditto.
14063 (TARGET_ZBKC): Ditto.
14064 (TARGET_ZBKX): Ditto.
14065 (TARGET_ZKNE): Ditto.
14066 (TARGET_ZKND): Ditto.
14067 (TARGET_ZKNH): Ditto.
14068 (TARGET_ZKR): Ditto.
14069 (TARGET_ZKSED): Ditto.
14070 (TARGET_ZKSH): Ditto.
14071 (TARGET_ZKT): Ditto.
14072 (MASK_ZTSO): Ditto.
14073 (TARGET_ZTSO): Ditto.
14074 (MASK_VECTOR_ELEN_32): Ditto.
14075 (MASK_VECTOR_ELEN_64): Ditto.
14076 (MASK_VECTOR_ELEN_FP_32): Ditto.
14077 (MASK_VECTOR_ELEN_FP_64): Ditto.
14078 (MASK_VECTOR_ELEN_FP_16): Ditto.
14079 (TARGET_VECTOR_ELEN_32): Ditto.
14080 (TARGET_VECTOR_ELEN_64): Ditto.
14081 (TARGET_VECTOR_ELEN_FP_32): Ditto.
14082 (TARGET_VECTOR_ELEN_FP_64): Ditto.
14083 (TARGET_VECTOR_ELEN_FP_16): Ditto.
14084 (MASK_ZVBB): Ditto.
14085 (MASK_ZVBC): Ditto.
14086 (TARGET_ZVBB): Ditto.
14087 (TARGET_ZVBC): Ditto.
14088 (MASK_ZVKG): Ditto.
14089 (MASK_ZVKNED): Ditto.
14090 (MASK_ZVKNHA): Ditto.
14091 (MASK_ZVKNHB): Ditto.
14092 (MASK_ZVKSED): Ditto.
14093 (MASK_ZVKSH): Ditto.
14094 (MASK_ZVKN): Ditto.
14095 (MASK_ZVKNC): Ditto.
14096 (MASK_ZVKNG): Ditto.
14097 (MASK_ZVKS): Ditto.
14098 (MASK_ZVKSC): Ditto.
14099 (MASK_ZVKSG): Ditto.
14100 (MASK_ZVKT): Ditto.
14101 (TARGET_ZVKG): Ditto.
14102 (TARGET_ZVKNED): Ditto.
14103 (TARGET_ZVKNHA): Ditto.
14104 (TARGET_ZVKNHB): Ditto.
14105 (TARGET_ZVKSED): Ditto.
14106 (TARGET_ZVKSH): Ditto.
14107 (TARGET_ZVKN): Ditto.
14108 (TARGET_ZVKNC): Ditto.
14109 (TARGET_ZVKNG): Ditto.
14110 (TARGET_ZVKS): Ditto.
14111 (TARGET_ZVKSC): Ditto.
14112 (TARGET_ZVKSG): Ditto.
14113 (TARGET_ZVKT): Ditto.
14114 (MASK_ZVL32B): Ditto.
14115 (MASK_ZVL64B): Ditto.
14116 (MASK_ZVL128B): Ditto.
14117 (MASK_ZVL256B): Ditto.
14118 (MASK_ZVL512B): Ditto.
14119 (MASK_ZVL1024B): Ditto.
14120 (MASK_ZVL2048B): Ditto.
14121 (MASK_ZVL4096B): Ditto.
14122 (MASK_ZVL8192B): Ditto.
14123 (MASK_ZVL16384B): Ditto.
14124 (MASK_ZVL32768B): Ditto.
14125 (MASK_ZVL65536B): Ditto.
14126 (TARGET_ZVL32B): Ditto.
14127 (TARGET_ZVL64B): Ditto.
14128 (TARGET_ZVL128B): Ditto.
14129 (TARGET_ZVL256B): Ditto.
14130 (TARGET_ZVL512B): Ditto.
14131 (TARGET_ZVL1024B): Ditto.
14132 (TARGET_ZVL2048B): Ditto.
14133 (TARGET_ZVL4096B): Ditto.
14134 (TARGET_ZVL8192B): Ditto.
14135 (TARGET_ZVL16384B): Ditto.
14136 (TARGET_ZVL32768B): Ditto.
14137 (TARGET_ZVL65536B): Ditto.
14138 (MASK_ZICBOZ): Ditto.
14139 (MASK_ZICBOM): Ditto.
14140 (MASK_ZICBOP): Ditto.
14141 (TARGET_ZICBOZ): Ditto.
14142 (TARGET_ZICBOM): Ditto.
14143 (TARGET_ZICBOP): Ditto.
14144 (MASK_ZICOND): Ditto.
14145 (TARGET_ZICOND): Ditto.
14147 (TARGET_ZFA): Ditto.
14148 (MASK_ZFHMIN): Ditto.
14150 (MASK_ZVFHMIN): Ditto.
14151 (MASK_ZVFH): Ditto.
14152 (TARGET_ZFHMIN): Ditto.
14153 (TARGET_ZFH): Ditto.
14154 (TARGET_ZVFHMIN): Ditto.
14155 (TARGET_ZVFH): Ditto.
14156 (MASK_ZMMUL): Ditto.
14157 (TARGET_ZMMUL): Ditto.
14163 (MASK_ZCMP): Ditto.
14164 (MASK_ZCMT): Ditto.
14165 (TARGET_ZCA): Ditto.
14166 (TARGET_ZCB): Ditto.
14167 (TARGET_ZCE): Ditto.
14168 (TARGET_ZCF): Ditto.
14169 (TARGET_ZCD): Ditto.
14170 (TARGET_ZCMP): Ditto.
14171 (TARGET_ZCMT): Ditto.
14172 (MASK_SVINVAL): Ditto.
14173 (MASK_SVNAPOT): Ditto.
14174 (TARGET_SVINVAL): Ditto.
14175 (TARGET_SVNAPOT): Ditto.
14176 (MASK_XTHEADBA): Ditto.
14177 (MASK_XTHEADBB): Ditto.
14178 (MASK_XTHEADBS): Ditto.
14179 (MASK_XTHEADCMO): Ditto.
14180 (MASK_XTHEADCONDMOV): Ditto.
14181 (MASK_XTHEADFMEMIDX): Ditto.
14182 (MASK_XTHEADFMV): Ditto.
14183 (MASK_XTHEADINT): Ditto.
14184 (MASK_XTHEADMAC): Ditto.
14185 (MASK_XTHEADMEMIDX): Ditto.
14186 (MASK_XTHEADMEMPAIR): Ditto.
14187 (MASK_XTHEADSYNC): Ditto.
14188 (TARGET_XTHEADBA): Ditto.
14189 (TARGET_XTHEADBB): Ditto.
14190 (TARGET_XTHEADBS): Ditto.
14191 (TARGET_XTHEADCMO): Ditto.
14192 (TARGET_XTHEADCONDMOV): Ditto.
14193 (TARGET_XTHEADFMEMIDX): Ditto.
14194 (TARGET_XTHEADFMV): Ditto.
14195 (TARGET_XTHEADINT): Ditto.
14196 (TARGET_XTHEADMAC): Ditto.
14197 (TARGET_XTHEADMEMIDX): Ditto.
14198 (TARGET_XTHEADMEMPAIR): Ditto.
14199 (TARGET_XTHEADSYNC): Ditto.
14200 (MASK_XVENTANACONDOPS): Ditto.
14201 (TARGET_XVENTANACONDOPS): Ditto.
14202 * config/riscv/riscv.opt: Add new Mask defination.
14203 * doc/options.texi: Add explanation for this new usage.
14204 * opt-functions.awk: Add new function to find the index
14205 of target variable from extra_target_vars.
14206 * opt-read.awk: Add new function to store the Mask flags.
14207 * opth-gen.awk: Add new function to output the defination of
14208 Mask Macro and Target Macro.
14210 2023-10-01 Joern Rennecke <joern.rennecke@embecosm.com>
14211 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14212 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14215 * config/riscv/riscv-protos.h (riscv_vector::legitimize_move):
14216 Change second parameter to rtx *.
14217 * config/riscv/riscv-v.cc (risv_vector::legitimize_move): Likewise.
14218 * config/riscv/vector.md: Changed callers of
14219 riscv_vector::legitimize_move.
14220 (*mov<mode>_mem_to_mem): Remove.
14222 2023-09-30 Jakub Jelinek <jakub@redhat.com>
14225 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::vector_infos_manager):
14226 Replace safe_grow with safe_grow_cleared.
14228 2023-09-30 Jakub Jelinek <jakub@redhat.com>
14230 * gimple-match-head.cc (gimple_bitwise_inverted_equal_p): Fix a pasto
14231 in function comment.
14233 2023-09-30 Jakub Jelinek <jakub@redhat.com>
14235 PR middle-end/111625
14236 PR middle-end/111637
14237 * gimple-lower-bitint.cc (range_to_prec): Use prec or -prec if
14239 (bitint_large_huge::handle_operand_addr): For uninitialized operands
14240 use limb_prec or -limb_prec precision.
14242 2023-09-30 Jakub Jelinek <jakub@redhat.com>
14244 * vec.h (quick_grow): Uncomment static_assert.
14246 2023-09-30 Jivan Hakobyan <jivanhakobyan9@gmail.com>
14248 * config/riscv/bitmanip.md (*<optab>_not_const<mode>): Added type attribute
14250 2023-09-29 Xiao Zeng <zengxiao@eswincomputing.com>
14252 * config/riscv/riscv.cc (riscv_rtx_costs): Better handle costing
14253 SETs when the outer code is INSN.
14255 2023-09-29 Jivan Hakobyan <jivanhakobyan9@gmail.com>
14257 * config/riscv/bitmanip.md (*<optab>_not_const<mode>): New split
14260 2023-09-29 Richard Sandiford <richard.sandiford@arm.com>
14262 * poly-int.h (poly_int_pod): Delete.
14263 (poly_coeff_traits::init_cast): New type.
14264 (poly_int_full, poly_int_hungry, poly_int_fullness): New structures.
14265 (poly_int): Replace constructors that take 1 and 2 coefficients with
14266 a general one that takes an arbitrary number of coefficients.
14267 Delegate initialization to two new private constructors, one of
14268 which uses the coefficients as-is and one of which adds an extra
14269 zero of the appropriate type (and precision, where applicable).
14270 (gt_ggc_mx, gt_pch_nx): Operate on poly_ints rather than poly_int_pods.
14271 * poly-int-types.h (poly_uint16_pod, poly_int64_pod, poly_uint64_pod)
14272 (poly_offset_int_pod, poly_wide_int_pod, poly_widest_int_pod): Delete.
14273 * gengtype.cc (main): Don't register poly_int64_pod.
14274 * calls.cc (initialize_argument_information): Use poly_int rather
14276 (combine_pending_stack_adjustment_and_call): Likewise.
14277 * config/aarch64/aarch64.cc (pure_scalable_type_info): Likewise.
14278 * data-streamer.h (bp_unpack_poly_value): Likewise.
14279 * dwarf2cfi.cc (struct dw_trace_info): Likewise.
14280 (struct queued_reg_save): Likewise.
14281 * dwarf2out.h (struct dw_cfa_location): Likewise.
14282 * emit-rtl.h (struct incoming_args): Likewise.
14283 (struct rtl_data): Likewise.
14284 * expr.cc (get_bit_range): Likewise.
14285 (get_inner_reference): Likewise.
14286 * expr.h (get_bit_range): Likewise.
14287 * fold-const.cc (split_address_to_core_and_offset): Likewise.
14288 (ptr_difference_const): Likewise.
14289 * fold-const.h (ptr_difference_const): Likewise.
14290 * function.cc (try_fit_stack_local): Likewise.
14291 (instantiate_new_reg): Likewise.
14292 * function.h (struct expr_status): Likewise.
14293 (struct args_size): Likewise.
14294 * genmodes.cc (ZERO_COEFFS): Likewise.
14295 (mode_size_inline): Likewise.
14296 (mode_nunits_inline): Likewise.
14297 (emit_mode_precision): Likewise.
14298 (emit_mode_size): Likewise.
14299 (emit_mode_nunits): Likewise.
14300 * gimple-fold.cc (get_base_constructor): Likewise.
14301 * gimple-ssa-store-merging.cc (struct symbolic_number): Likewise.
14302 * inchash.h (class hash): Likewise.
14303 * ipa-modref-tree.cc (modref_access_node::dump): Likewise.
14304 * ipa-modref.cc (modref_access_analysis::merge_call_side_effects):
14306 * ira-int.h (ira_spilled_reg_stack_slot): Likewise.
14307 * lra-eliminations.cc (self_elim_offsets): Likewise.
14308 * machmode.h (mode_size, mode_precision, mode_nunits): Likewise.
14309 * omp-low.cc (omplow_simd_context): Likewise.
14310 * pretty-print.cc (pp_wide_integer): Likewise.
14311 * pretty-print.h (pp_wide_integer): Likewise.
14312 * reload.cc (struct decomposition): Likewise.
14313 * reload.h (struct reload): Likewise.
14314 * reload1.cc (spill_stack_slot_width): Likewise.
14315 (struct elim_table): Likewise.
14316 (offsets_at): Likewise.
14317 (init_eliminable_invariants): Likewise.
14318 * rtl.h (union rtunion): Likewise.
14319 (poly_int_rtx_p): Likewise.
14320 (strip_offset): Likewise.
14321 (strip_offset_and_add): Likewise.
14322 * rtlanal.cc (strip_offset): Likewise.
14323 * tree-dfa.cc (get_ref_base_and_extent): Likewise.
14324 (get_addr_base_and_unit_offset_1): Likewise.
14325 (get_addr_base_and_unit_offset): Likewise.
14326 * tree-dfa.h (get_ref_base_and_extent): Likewise.
14327 (get_addr_base_and_unit_offset_1): Likewise.
14328 (get_addr_base_and_unit_offset): Likewise.
14329 * tree-ssa-loop-ivopts.cc (struct iv_use): Likewise.
14330 (strip_offset): Likewise.
14331 * tree-ssa-sccvn.h (struct vn_reference_op_struct): Likewise.
14332 * tree.cc (ptrdiff_tree_p): Likewise.
14333 * tree.h (poly_int_tree_p): Likewise.
14334 (ptrdiff_tree_p): Likewise.
14335 (get_inner_reference): Likewise.
14337 2023-09-29 John David Anglin <danglin@gcc.gnu.org>
14339 * config/pa/pa.md (memory_barrier): Revise comment.
14340 (memory_barrier_64, memory_barrier_32): Use ldcw,co on PA 2.0.
14341 * config/pa/pa.opt (coherent-ldcw): Change default to disabled.
14343 2023-09-29 Jakub Jelinek <jakub@redhat.com>
14345 * vec.h (quick_insert, ordered_remove, unordered_remove,
14346 block_remove, qsort, sort, stablesort, quick_grow): Guard
14347 std::is_trivially_{copyable,default_constructible} and
14348 vec_detail::is_trivially_copyable_or_pair static assertions
14349 with GCC_VERSION >= 5000.
14350 (vec_detail::is_trivially_copyable_or_pair): Guard definition
14351 with GCC_VERSION >= 5000.
14353 2023-09-29 Manos Anagnostakis <manos.anagnostakis@vrull.eu>
14355 * config/aarch64/aarch64-opts.h (enum aarch64_ldp_policy): Removed.
14356 (enum aarch64_ldp_stp_policy): Merged enums aarch64_ldp_policy
14357 and aarch64_stp_policy to aarch64_ldp_stp_policy.
14358 (enum aarch64_stp_policy): Removed.
14359 * config/aarch64/aarch64-protos.h (struct tune_params): Removed
14360 aarch64_ldp_policy_model and aarch64_stp_policy_model enum types
14361 and left only the definitions to the aarch64-opts one.
14362 * config/aarch64/aarch64.cc (aarch64_parse_ldp_policy): Removed.
14363 (aarch64_parse_stp_policy): Removed.
14364 (aarch64_override_options_internal): Removed calls to parsing
14365 functions and added obvious direct assignments.
14366 (aarch64_mem_ok_with_ldpstp_policy_model): Improved
14367 code quality based on the new changes.
14368 * config/aarch64/aarch64.opt: Use single enum type
14369 aarch64_ldp_stp_policy for both ldp and stp options.
14371 2023-09-29 Richard Biener <rguenther@suse.de>
14373 PR tree-optimization/111583
14374 * tree-loop-distribution.cc (find_single_drs): Ensure the
14375 load/store are always executed.
14377 2023-09-29 Jakub Jelinek <jakub@redhat.com>
14379 * tree-vect-patterns.cc (vect_recog_over_widening_pattern): Use
14380 quick_grow_cleared method on unprom rather than quick_grow.
14382 2023-09-29 Sergei Trofimovich <siarheit@google.com>
14384 PR middle-end/111505
14385 * ggc-common.cc (ggc_zero_out_root_pointers, ggc_common_finalize):
14386 Add new helper. Use helper instead of memset() to wipe out pointers.
14388 2023-09-29 Richard Sandiford <richard.sandiford@arm.com>
14390 * builtins.h (c_readstr): Take a fixed_size_mode rather than a
14392 * builtins.cc (c_readstr): Likewise. Build a local array of
14393 bytes and use native_decode_rtx to get the rtx image.
14394 (builtin_memcpy_read_str): Simplify accordingly.
14395 (builtin_strncpy_read_str): Likewise.
14396 (builtin_memset_read_str): Likewise.
14397 (builtin_memset_gen_str): Likewise.
14398 * expr.cc (string_cst_read_str): Likewise.
14400 2023-09-29 Jakub Jelinek <jakub@redhat.com>
14402 * tree-ssa-loop-im.cc (tree_ssa_lim_initialize): Use quick_grow_cleared
14403 instead of quick_grow on vec<bitmap_head> members.
14404 * cfganal.cc (control_dependences::control_dependences): Likewise.
14405 * rtl-ssa/blocks.cc (function_info::build_info::build_info): Likewise.
14406 (function_info::place_phis): Use safe_grow_cleared instead of safe_grow
14407 on auto_vec<bitmap_head> vars.
14408 * tree-ssa-live.cc (compute_live_vars): Use quick_grow_cleared instead
14409 of quick_grow on vec<bitmap_head> var.
14411 2023-09-28 Vladimir N. Makarov <vmakarov@redhat.com>
14414 2023-09-14 Vladimir N. Makarov <vmakarov@redhat.com>
14416 * ira-costs.cc (find_costs_and_classes): Decrease memory cost
14419 2023-09-28 Wilco Dijkstra <wilco.dijkstra@arm.com>
14422 * config/aarch64/aarch64.md (aarch64_movmemdi): Add new expander.
14423 (movmemdi): Call aarch64_expand_cpymem_mops for correct expansion.
14424 * config/aarch64/aarch64.cc (aarch64_expand_cpymem_mops): Add support
14426 * config/aarch64/aarch64-protos.h (aarch64_expand_cpymem_mops): Add new
14429 2023-09-28 Pan Li <pan2.li@intel.com>
14432 * config/riscv/autovec.md (<float_cvt><mode><vnnconvert>2):
14434 * config/riscv/vector-iterators.md: New iterator.
14436 2023-09-28 Vladimir N. Makarov <vmakarov@redhat.com>
14438 * rtl.h (lra_in_progress): Change type to bool.
14439 (ira_in_progress): Add new extern.
14440 * ira.cc (ira_in_progress): New global.
14441 (pass_ira::execute): Set up ira_in_progress.
14442 * lra.cc: (lra_in_progress): Change type to bool and initialize.
14443 (lra): Use bool values for lra_in_progress.
14444 * lra-eliminations.cc (init_elim_table): Ditto.
14446 2023-09-28 Richard Biener <rguenther@suse.de>
14449 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores):
14450 Use a heap allocated worklist for CFG traversal instead of
14453 2023-09-28 Jakub Jelinek <jakub@redhat.com>
14454 Jonathan Wakely <jwakely@redhat.com>
14456 * vec.h: Mention in file comment limited support for non-POD types
14457 in some operations.
14458 (vec_destruct): New function template.
14459 (release): Use it for non-trivially destructible T.
14460 (truncate): Likewise.
14461 (quick_push): Perform a placement new into slot
14462 instead of assignment.
14463 (pop): For non-trivially destructible T return void
14464 rather than T & and destruct the popped element.
14465 (quick_insert, ordered_remove): Note that they aren't suitable
14466 for non-trivially copyable types. Add static_asserts for that.
14467 (block_remove): Assert T is trivially copyable.
14468 (vec_detail::is_trivially_copyable_or_pair): New trait.
14469 (qsort, sort, stablesort): Assert T is trivially copyable or
14470 std::pair with both trivally copyable types.
14471 (quick_grow): Add assert T is trivially default constructible,
14472 for now commented out.
14473 (quick_grow_cleared): Don't call quick_grow, instead inline it
14474 by hand except for the new static_assert.
14475 (gt_ggc_mx): Assert T is trivially destructable.
14476 (auto_vec::operator=): Formatting fixes.
14477 (auto_vec::auto_vec): Likewise.
14478 (vec_safe_grow_cleared): Don't call vec_safe_grow, instead inline
14479 it manually and call quick_grow_cleared method rather than quick_grow.
14480 (safe_grow_cleared): Likewise.
14481 * edit-context.cc (class line_event): Move definition earlier.
14482 * tree-ssa-loop-im.cc (seq_entry::seq_entry): Make default ctor
14484 * ipa-fnsummary.cc (evaluate_properties_for_edge): Use
14485 safe_grow_cleared instead of safe_grow followed by placement new
14486 constructing the elements.
14488 2023-09-28 Richard Sandiford <richard.sandiford@arm.com>
14490 * dwarf2out.cc (mem_loc_descriptor): Remove unused variables.
14491 * tree-affine.cc (expr_to_aff_combination): Likewise.
14493 2023-09-28 Richard Biener <rguenther@suse.de>
14495 PR tree-optimization/111614
14496 * tree-ssa-reassoc.cc (undistribute_bitref_for_vector): Properly
14497 convert the first vector when required.
14499 2023-09-28 xuli <xuli1@eswincomputing.com>
14502 * config/riscv/riscv-v.cc (expand_const_vector): Fix bug.
14503 * config/riscv/riscv-vsetvl.cc (anticipatable_occurrence_p): Fix bug.
14505 2023-09-27 Sandra Loosemore <sandra@codesourcery.com>
14507 * gimple.cc (gimple_copy): Add case GIMPLE_OMP_STRUCTURED_BLOCK.
14509 2023-09-27 Iain Sandoe <iain@sandoe.co.uk>
14512 * configure: Regenerate.
14513 * configure.ac: Rename the missing dsymutil case to "DET_UNKNOWN".
14515 2023-09-27 Manos Anagnostakis <manos.anagnostakis@vrull.eu>
14516 Philipp Tomsich <philipp.tomsich@vrull.eu>
14517 Manolis Tsamis <manolis.tsamis@vrull.eu>
14519 * config/aarch64/aarch64-opts.h (enum aarch64_ldp_policy): New
14521 (enum aarch64_stp_policy): New enum type.
14522 * config/aarch64/aarch64-protos.h (struct tune_params): Add
14523 appropriate enums for the policies.
14524 (aarch64_mem_ok_with_ldpstp_policy_model): New declaration.
14525 * config/aarch64/aarch64-tuning-flags.def
14526 (AARCH64_EXTRA_TUNING_OPTION): Remove superseded tuning
14528 * config/aarch64/aarch64.cc (aarch64_parse_ldp_policy): New
14529 function to parse ldp-policy parameter.
14530 (aarch64_parse_stp_policy): New function to parse stp-policy parameter.
14531 (aarch64_override_options_internal): Call parsing functions.
14532 (aarch64_mem_ok_with_ldpstp_policy_model): New function.
14533 (aarch64_operands_ok_for_ldpstp): Add call to
14534 aarch64_mem_ok_with_ldpstp_policy_model for parameter-value
14535 check and alignment check and remove superseded ones.
14536 (aarch64_operands_adjust_ok_for_ldpstp): Add call to
14537 aarch64_mem_ok_with_ldpstp_policy_model for parameter-value
14538 check and alignment check and remove superseded ones.
14539 * config/aarch64/aarch64.opt (aarch64-ldp-policy): New param.
14540 (aarch64-stp-policy): New param.
14541 * doc/invoke.texi: Document the parameters accordingly.
14543 2023-09-27 Andre Vieira <andre.simoesdiasvieira@arm.com>
14545 * tree-data-ref.cc (include calls.h): Add new include.
14546 (get_references_in_stmt): Correctly handle IFN_MASK_CALL.
14548 2023-09-27 Richard Biener <rguenther@suse.de>
14550 * match.pd (abs (copysign (x, y)) -> abs (x)): New pattern.
14552 2023-09-27 Jakub Jelinek <jakub@redhat.com>
14555 * system.h (BROKEN_VALUE_INITIALIZATION): Don't define.
14556 * vec.h (vec_default_construct): Remove BROKEN_VALUE_INITIALIZATION
14558 * function.cc (assign_parm_find_data_types): Likewise.
14560 2023-09-27 Pan Li <pan2.li@intel.com>
14562 * config/riscv/autovec.md (roundeven<mode>2): New pattern.
14563 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
14564 (enum insn_type): Ditto.
14565 (expand_vec_roundeven): New func decl.
14566 * config/riscv/riscv-v.cc (expand_vec_roundeven): New func impl.
14568 2023-09-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14571 * dse.cc (find_shift_sequence): Check the mode with access_size exist on the target.
14573 2023-09-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14575 * tree-if-conv.cc (is_cond_scalar_reduction): Fix comments.
14577 2023-09-27 Pan Li <pan2.li@intel.com>
14579 * config/riscv/autovec.md (btrunc<mode>2): New pattern.
14580 * config/riscv/riscv-protos.h (expand_vec_trunc): New func decl.
14581 * config/riscv/riscv-v.cc (emit_vec_cvt_x_f_rtz): New func impl.
14582 (expand_vec_trunc): Ditto.
14584 2023-09-26 Hans-Peter Nilsson <hp@axis.com>
14588 * builtins.cc (expand_builtin) <case BUILT_IN_ATOMIC_TEST_AND_SET>:
14589 Handle failure from expand_builtin_atomic_test_and_set.
14590 * optabs.cc (expand_atomic_test_and_set): When all attempts fail to
14591 generate atomic code through target support, return NULL
14592 instead of emitting non-atomic code. Also, for code handling
14593 targetm.atomic_test_and_set_trueval != 1, gcc_assert result
14594 from calling emit_store_flag_force instead of returning NULL.
14596 2023-09-26 Andrew MacLeod <amacleod@redhat.com>
14598 PR tree-optimization/111599
14599 * value-relation.cc (relation_oracle::valid_equivs): Ensure
14602 2023-09-26 Andrew Pinski <apinski@marvell.com>
14604 PR tree-optimization/106164
14605 PR tree-optimization/111456
14606 * match.pd (`(A ==/!= B) & (A CMP C)`):
14607 Support an optional cast on the second A.
14608 (`(A ==/!= B) | (A CMP C)`): Likewise.
14610 2023-09-26 Andrew Pinski <apinski@marvell.com>
14612 PR tree-optimization/111469
14613 * tree-ssa-phiopt.cc (minmax_replacement): Fix
14614 the assumption for the `non-diamond` handling cases
14617 2023-09-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14619 * match.pd: Optimize COND_ADD reduction pattern.
14621 2023-09-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14623 PR tree-optimization/111594
14624 PR tree-optimization/110660
14625 * match.pd: Optimize COND_LEN_ADD reduction.
14627 2023-09-26 Pan Li <pan2.li@intel.com>
14629 * config/riscv/autovec.md (round<mode>2): New pattern.
14630 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
14631 (enum insn_type): Ditto.
14632 (expand_vec_round): New function decl.
14633 * config/riscv/riscv-v.cc (expand_vec_round): New function impl.
14635 2023-09-26 Iain Sandoe <iain@sandoe.co.uk>
14637 * config/darwin.h (DARWIN_CC1_SPEC): Remove -dynamiclib.
14639 2023-09-26 Tobias Burnus <tobias@codesourcery.com>
14641 PR middle-end/111547
14642 * doc/invoke.texi (-fopenmp): Mention C++11 [[omp::decl(...)]] syntax.
14643 (-fopenmp-simd): Likewise. Clarify 'loop' directive semantic.
14645 2023-09-26 Pan Li <pan2.li@intel.com>
14647 * config/riscv/autovec.md (rint<mode>2): New pattern.
14648 * config/riscv/riscv-protos.h (expand_vec_rint): New function decl.
14649 * config/riscv/riscv-v.cc (expand_vec_rint): New function impl.
14651 2023-09-26 Pan Li <pan2.li@intel.com>
14653 * config/riscv/autovec.md (nearbyint<mode>2): New pattern.
14654 * config/riscv/riscv-protos.h (enum insn_type): New enum.
14655 (expand_vec_nearbyint): New function decl.
14656 * config/riscv/riscv-v.cc (expand_vec_nearbyint): New func impl.
14658 2023-09-26 Pan Li <pan2.li@intel.com>
14660 * config/riscv/riscv-v.cc (gen_ceil_const_fp): Remove.
14661 (get_fp_rounding_coefficient): Rename.
14662 (gen_floor_const_fp): Remove.
14663 (expand_vec_ceil): Take renamed func.
14664 (expand_vec_floor): Ditto.
14666 2023-09-25 Vladimir N. Makarov <vmakarov@redhat.com>
14668 PR middle-end/111497
14669 * lra-constraints.cc (lra_constraints): Copy substituted
14671 * lra.cc (lra): Change comment for calling unshare_all_rtl_again.
14673 2023-09-25 Eric Botcazou <ebotcazou@adacore.com>
14675 * gimple-range-gori.cc (gori_compute::logical_combine): Add missing
14676 return statement in the varying case.
14678 2023-09-25 Xi Ruoyao <xry111@xry111.site>
14680 * doc/invoke.texi: Update -m[no-]explicit-relocs for r14-4160.
14682 2023-09-25 Andrew Pinski <apinski@marvell.com>
14684 PR tree-optimization/110386
14685 * gimple-ssa-backprop.cc (strip_sign_op_1): Remove ABSU_EXPR.
14687 2023-09-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14690 * config/riscv/riscv-vsetvl.cc (earliest_pred_can_be_fused_p): Bugfix
14692 2023-09-25 Kewen Lin <linkw@linux.ibm.com>
14695 * config/rs6000/rs6000.cc (rs6000_update_ipa_fn_target_info): Skip
14698 2023-09-25 Kewen Lin <linkw@linux.ibm.com>
14701 * config/rs6000/rs6000.cc (rs6000_can_inline_p): Adopt
14702 target_option_default_node when the callee has no option
14703 attributes, also simplify the existing code accordingly.
14705 2023-09-25 Guo Jie <guojie@loongson.cn>
14707 * config/loongarch/lasx.md (lasx_vecinit_merge_<LASX:mode>): New
14708 pattern for vector construction.
14709 (vec_set<mode>_internal): Ditto.
14710 (lasx_xvinsgr2vr_<mode256_i_half>_internal): Ditto.
14711 (lasx_xvilvl_<lasxfmt_f>_internal): Ditto.
14712 * config/loongarch/loongarch.cc (loongarch_expand_vector_init):
14713 Optimized the implementation of vector construction.
14714 (loongarch_expand_vector_init_same): New function.
14715 * config/loongarch/lsx.md (lsx_vilvl_<lsxfmt_f>_internal): New
14716 pattern for vector construction.
14717 (lsx_vreplvei_mirror_<lsxfmt_f>): New pattern for vector
14719 (vec_concatv2df): Ditto.
14720 (vec_concatv4sf): Ditto.
14722 2023-09-24 Pan Li <pan2.li@intel.com>
14725 * config/riscv/riscv-v.cc
14726 (expand_vector_init_merge_repeating_sequence): Bugfix
14728 2023-09-24 Andrew Pinski <apinski@marvell.com>
14730 PR tree-optimization/111543
14731 * match.pd (`(X & ~Y) & Y`, `(X | ~Y) | Y`): New patterns.
14733 2023-09-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14735 * config/riscv/autovec-opt.md: Extend VLS modes
14736 * config/riscv/vector-iterators.md: Ditto.
14738 2023-09-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14740 * config/riscv/autovec-opt.md: Add VLS modes for conditional ABS/SQRT.
14742 2023-09-23 Pan Li <pan2.li@intel.com>
14744 * config/riscv/autovec.md (floor<mode>2): New pattern.
14745 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
14746 (enum insn_type): Ditto.
14747 (expand_vec_floor): New function decl.
14748 * config/riscv/riscv-v.cc (gen_floor_const_fp): New function impl.
14749 (expand_vec_floor): Ditto.
14751 2023-09-22 Pan Li <pan2.li@intel.com>
14753 * config/riscv/riscv-v.cc (expand_vec_float_cmp_mask): Refactor.
14754 (emit_vec_float_cmp_mask): Rename.
14755 (expand_vec_copysign): Ditto.
14756 (emit_vec_copysign): Ditto.
14757 (emit_vec_abs): New function impl.
14758 (emit_vec_cvt_x_f): Ditto.
14759 (emit_vec_cvt_f_x): Ditto.
14760 (expand_vec_ceil): Ditto.
14762 2023-09-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14764 * config/riscv/vector-iterators.md: Extend VLS modes.
14766 2023-09-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14768 * config/riscv/riscv-v.cc (gen_const_vector_dup): Use global expand function.
14769 * config/riscv/vector.md (@vec_duplicate<mode>): Remove @.
14770 (vec_duplicate<mode>): Ditto.
14772 2023-09-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14774 * config/riscv/autovec.md: Add VLS conditional patterns.
14775 * config/riscv/riscv-protos.h (expand_cond_unop): Ditto.
14776 (expand_cond_binop): Ditto.
14777 (expand_cond_ternop): Ditto.
14778 * config/riscv/riscv-v.cc (expand_cond_unop): Ditto.
14779 (expand_cond_binop): Ditto.
14780 (expand_cond_ternop): Ditto.
14782 2023-09-22 xuli <xuli1@eswincomputing.com>
14785 * config/riscv/riscv-v.cc (emit_vlmax_gather_insn): Optimization of vrgather.vv
14786 into vrgatherei16.vv.
14788 2023-09-22 Lehua Ding <lehua.ding@rivai.ai>
14790 * config/riscv/autovec-opt.md (*cond_widen_reduc_plus_scal_<mode>):
14791 New combine patterns.
14792 * config/riscv/riscv-protos.h (enum insn_type): New insn_type.
14794 2023-09-22 Lehua Ding <lehua.ding@rivai.ai>
14796 * config/riscv/riscv-protos.h (enum avl_type): New VLS avl_type.
14797 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Move comments.
14799 2023-09-22 Pan Li <pan2.li@intel.com>
14801 * config/riscv/autovec.md (ceil<mode>2): New pattern.
14802 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
14803 (enum insn_type): Ditto.
14804 (expand_vec_ceil): New function decl.
14805 * config/riscv/riscv-v.cc (gen_ceil_const_fp): New function impl.
14806 (expand_vec_float_cmp_mask): Ditto.
14807 (expand_vec_copysign): Ditto.
14808 (expand_vec_ceil): Ditto.
14809 * config/riscv/vector.md: Add VLS mode support.
14811 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14813 * config/riscv/autovec.md: Extend VLS modes.
14815 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14817 * config/riscv/vector-iterators.md: Extend VLS modes.
14819 2023-09-21 Lehua Ding <lehua.ding@rivai.ai>
14820 Robin Dapp <rdapp.gcc@gmail.com>
14822 * config/riscv/riscv-v.cc (emit_vlmax_insn): Adjust comments.
14823 (emit_nonvlmax_insn): Adjust comments.
14824 (emit_vlmax_insn_lra): Adjust comments.
14826 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
14828 * config.gcc (*linux*): Set rust target_objs, and
14829 target_has_targetrustm,
14830 * config/t-linux (linux-rust.o): New rule.
14831 * config/linux-rust.cc: New file.
14833 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
14835 * config.gcc (i[34567]86-*-mingw* | x86_64-*-mingw*): Set
14836 rust_target_objs and target_has_targetrustm.
14837 * config/t-winnt (winnt-rust.o): New rule.
14838 * config/winnt-rust.cc: New file.
14840 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
14842 * config.gcc (*-*-fuchsia): Set tmake_rule, rust_target_objs,
14843 and target_has_targetrustm.
14844 * config/fuchsia-rust.cc: New file.
14845 * config/t-fuchsia: New file.
14847 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
14849 * config.gcc (*-*-vxworks*): Set rust_target_objs and
14850 target_has_targetrustm.
14851 * config/t-vxworks (vxworks-rust.o): New rule.
14852 * config/vxworks-rust.cc: New file.
14854 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
14856 * config.gcc (*-*-dragonfly*): Set rust_target_objs and
14857 target_has_targetrustm.
14858 * config/t-dragonfly (dragonfly-rust.o): New rule.
14859 * config/dragonfly-rust.cc: New file.
14861 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
14863 * config.gcc (*-*-solaris2*): Set rust_target_objs and
14864 target_has_targetrustm.
14865 * config/t-sol2 (sol2-rust.o): New rule.
14866 * config/sol2-rust.cc: New file.
14868 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
14870 * config.gcc (*-*-openbsd*): Set rust_target_objs and
14871 target_has_targetrustm.
14872 * config/t-openbsd (openbsd-rust.o): New rule.
14873 * config/openbsd-rust.cc: New file.
14875 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
14877 * config.gcc (*-*-netbsd*): Set rust_target_objs and
14878 target_has_targetrustm.
14879 * config/t-netbsd (netbsd-rust.o): New rule.
14880 * config/netbsd-rust.cc: New file.
14882 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
14884 * config.gcc (*-*-freebsd*): Set rust_target_objs and
14885 target_has_targetrustm.
14886 * config/t-freebsd (freebsd-rust.o): New rule.
14887 * config/freebsd-rust.cc: New file.
14889 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
14891 * config.gcc (*-*-darwin*): Set rust_target_objs and
14892 target_has_targetrustm.
14893 * config/t-darwin (darwin-rust.o): New rule.
14894 * config/darwin-rust.cc: New file.
14896 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
14898 * config/i386/t-i386 (i386-rust.o): New rule.
14899 * config/i386/i386-rust.cc: New file.
14900 * config/i386/i386-rust.h: New file.
14902 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
14904 * doc/tm.texi: Regenerate.
14905 * doc/tm.texi.in: Document TARGET_RUST_OS_INFO.
14907 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
14909 * doc/tm.texi: Regenerate.
14910 * doc/tm.texi.in: Add @node for Rust language and ABI, and document
14911 TARGET_RUST_CPU_INFO.
14913 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
14915 * Makefile.in (tm_rust_file_list, tm_rust_include_list, TM_RUST_H,
14916 RUST_TARGET_DEF, RUST_TARGET_H, RUST_TARGET_OBJS): New variables.
14917 (tm_rust.h, cs-tm_rust.h, default-rust.o,
14918 rust/rust-target-hooks-def.h, s-rust-target-hooks-def-h): New rules.
14919 (s-tm-texi): Also check timestamp on rust-target.def.
14920 (generated_files): Add TM_RUST_H and rust-target-hooks-def.h.
14921 (build/genhooks.o): Also depend on RUST_TARGET_DEF.
14922 * config.gcc (tm_rust_file, rust_target_objs, target_has_targetrustm):
14924 * configure: Regenerate.
14925 * configure.ac (tm_rust_file_list, tm_rust_include_list,
14926 rust_target_objs): Add substitutes.
14927 * doc/tm.texi: Regenerate.
14928 * doc/tm.texi.in (targetrustm): Document.
14929 (target_has_targetrustm): Document.
14930 * genhooks.cc: Include rust/rust-target.def.
14931 * config/default-rust.cc: New file.
14933 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14936 * config/riscv/autovec.md: Enable scratch rtx in ELSE operand.
14937 * config/riscv/predicates.md (autovec_else_operand): New predicate.
14938 * config/riscv/riscv-v.cc (get_else_operand): New function.
14939 (expand_cond_len_unop): Adapt ELSE value.
14940 (expand_cond_len_binop): Ditto.
14941 (expand_cond_len_ternop): Ditto.
14942 * config/riscv/riscv.cc (riscv_preferred_else_value): New function.
14943 (TARGET_PREFERRED_ELSE_VALUE): New targethook.
14945 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14948 * config/riscv/riscv.cc (riscv_legitimize_move): Fix bug.
14950 2023-09-21 Jiufu Guo <guojiufu@linux.ibm.com>
14952 PR tree-optimization/111355
14953 * match.pd ((X + C) / N): Update pattern.
14955 2023-09-21 Jiufu Guo <guojiufu@linux.ibm.com>
14957 * match.pd ((t * 2) / 2): Update to use overflow_free_p.
14959 2023-09-21 xuli <xuli1@eswincomputing.com>
14962 * config/riscv/constraints.md (c01): const_int 1.
14963 (c02): const_int 2.
14964 (c04): const_int 4.
14965 (c08): const_int 8.
14966 * config/riscv/predicates.md (vector_eew8_stride_operand): New predicate for stride operand.
14967 (vector_eew16_stride_operand): Ditto.
14968 (vector_eew32_stride_operand): Ditto.
14969 (vector_eew64_stride_operand): Ditto.
14970 * config/riscv/vector-iterators.md: New iterator for stride operand.
14971 * config/riscv/vector.md: Add stride = element width constraint.
14973 2023-09-21 Lehua Ding <lehua.ding@rivai.ai>
14975 * config/riscv/predicates.md (const_1_or_2_operand): Rename.
14976 (const_1_or_4_operand): Ditto.
14977 (vector_gs_scale_operand_16): Ditto.
14978 (vector_gs_scale_operand_32): Ditto.
14979 * config/riscv/vector-iterators.md: Adjust.
14981 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14983 * config/riscv/autovec.md: Extend VLS modes.
14984 * config/riscv/vector-iterators.md: Ditto.
14985 * config/riscv/vector.md: Ditto.
14987 2023-09-20 Andrew MacLeod <amacleod@redhat.com>
14989 * gimple-range-cache.cc (ssa_cache::merge_range): Change meaning
14990 of the return value.
14991 (ssa_cache::dump): Don't print GLOBAL RANGE header.
14992 (ssa_lazy_cache::merge_range): Adjust return value meaning.
14993 (ranger_cache::dump): Print GLOBAL RANGE header.
14995 2023-09-20 Aldy Hernandez <aldyh@redhat.com>
14997 * range-op-float.cc (foperator_unordered_ge::fold_range): Remove
14999 (foperator_unordered_gt::fold_range): Same.
15000 (foperator_unordered_lt::fold_range): Same.
15001 (foperator_unordered_le::fold_range): Same.
15003 2023-09-20 Jakub Jelinek <jakub@redhat.com>
15005 * builtins.h (type_to_class): Declare.
15006 * builtins.cc (type_to_class): No longer static. Return
15007 int rather than enum.
15008 * doc/extend.texi (__builtin_classify_type): Document.
15010 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15013 * internal-fn.cc (expand_fn_using_insn): Support undefined rtx value.
15014 * optabs.cc (maybe_legitimize_operand): Ditto.
15015 (can_reuse_operands_p): Ditto.
15016 * optabs.h (enum expand_operand_type): Ditto.
15017 (create_undefined_input_operand): Ditto.
15019 2023-09-20 Tobias Burnus <tobias@codesourcery.com>
15021 * gimplify.cc (gimplify_bind_expr): Call GOMP_alloc/free for
15022 'omp allocate' variables; move stack cleanup after other
15024 (omp_notice_variable): Process original decl when decl
15025 of the value-expression for a 'omp allocate' variable is passed.
15026 * omp-low.cc (scan_omp_1_op): Handle 'omp allocate' variables
15028 2023-09-20 Yanzhang Wang <yanzhang.wang@intel.com>
15030 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
15031 support simplifying vector int not only scalar int.
15033 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15035 * config/riscv/vector-iterators.md: Extend VLS floating-point.
15037 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15039 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator==): Fix bug.
15041 2023-09-20 Iain Sandoe <iain@sandoe.co.uk>
15044 (SUBTARGET_DRIVER_SELF_SPECS): Move handling of 'shared' into the same
15045 specs as 'dynamiclib'. (STARTFILE_SPEC): Handle 'shared'.
15047 2023-09-20 Richard Biener <rguenther@suse.de>
15049 PR tree-optimization/111489
15050 * params.opt (-param uninit-max-chain-len=): Raise default to 8.
15052 2023-09-20 Richard Biener <rguenther@suse.de>
15054 PR tree-optimization/111489
15055 * doc/invoke.texi (--param uninit-max-chain-len): Document.
15056 (--param uninit-max-num-chains): Likewise.
15057 * params.opt (-param=uninit-max-chain-len=): New.
15058 (-param=uninit-max-num-chains=): Likewise.
15059 * gimple-predicate-analysis.cc (MAX_NUM_CHAINS): Define to
15060 param_uninit_max_num_chains.
15061 (MAX_CHAIN_LEN): Define to param_uninit_max_chain_len.
15062 (uninit_analysis::init_use_preds): Avoid VLA.
15063 (uninit_analysis::init_from_phi_def): Likewise.
15064 (compute_control_dep_chain): Avoid using MAX_CHAIN_LEN in
15065 template parameter.
15067 2023-09-20 Jakub Jelinek <jakub@redhat.com>
15069 * match.pd ((x << c) >> c): Use MAX_FIXED_MODE_SIZE instead of
15070 GET_MODE_PRECISION of TImode or DImode depending on whether
15071 TImode is supported scalar mode.
15072 * gimple-lower-bitint.cc (bitint_precision_kind): Likewise.
15073 * expr.cc (expand_expr_real_1): Likewise.
15074 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_stmt): Likewise.
15075 * ubsan.cc (ubsan_encode_value, ubsan_type_descriptor): Likewise.
15077 2023-09-20 Lehua Ding <lehua.ding@rivai.ai>
15079 * config/riscv/autovec-opt.md (*<optab>not<mode>): Move and rename.
15080 (*n<optab><mode>): Ditto.
15081 (*v<any_shiftrt:optab><any_extend:optab>trunc<mode>): Ditto.
15082 (*<any_shiftrt:optab>trunc<mode>): Ditto.
15083 (*narrow_<any_shiftrt:optab><any_extend:optab><mode>): Ditto.
15084 (*narrow_<any_shiftrt:optab><mode>_scalar): Ditto.
15085 (*single_widen_mult<any_extend:su><mode>): Ditto.
15086 (*single_widen_mul<any_extend:su><mode>): Ditto.
15087 (*single_widen_mult<mode>): Ditto.
15088 (*single_widen_mul<mode>): Ditto.
15089 (*dual_widen_fma<mode>): Ditto.
15090 (*dual_widen_fma<su><mode>): Ditto.
15091 (*single_widen_fma<mode>): Ditto.
15092 (*single_widen_fma<su><mode>): Ditto.
15093 (*dual_fma<mode>): Ditto.
15094 (*single_fma<mode>): Ditto.
15095 (*dual_fnma<mode>): Ditto.
15096 (*dual_widen_fnma<mode>): Ditto.
15097 (*single_fnma<mode>): Ditto.
15098 (*single_widen_fnma<mode>): Ditto.
15099 (*dual_fms<mode>): Ditto.
15100 (*dual_widen_fms<mode>): Ditto.
15101 (*single_fms<mode>): Ditto.
15102 (*single_widen_fms<mode>): Ditto.
15103 (*dual_fnms<mode>): Ditto.
15104 (*dual_widen_fnms<mode>): Ditto.
15105 (*single_fnms<mode>): Ditto.
15106 (*single_widen_fnms<mode>): Ditto.
15108 2023-09-20 Jakub Jelinek <jakub@redhat.com>
15111 * attribs.cc (decl_attributes): Don't warn on omp::directive attribute
15112 on vars or function decls if -fopenmp or -fopenmp-simd.
15114 2023-09-20 Lehua Ding <lehua.ding@rivai.ai>
15117 * config/riscv/autovec-opt.md: Add missed operand.
15119 2023-09-20 Omar Sandoval <osandov@osandov.com>
15122 * dwarf2out.cc (output_macinfo): Don't call optimize_macinfo_range if
15123 dwarf_split_debug_info.
15125 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15127 * config/riscv/riscv-v.cc (can_find_related_mode_p): New function.
15128 (vectorize_related_mode): Add VLS related modes.
15129 * config/riscv/vector-iterators.md: Extend VLS modes.
15131 2023-09-20 Surya Kumari Jangala <jskumari@linux.ibm.com>
15133 PR rtl-optimization/110071
15134 * ira-color.cc (improve_allocation): Consider cost of callee
15137 2023-09-20 mengqinggang <mengqinggang@loongson.cn>
15138 Xi Ruoyao <xry111@xry111.site>
15140 * configure: Regenerate.
15141 * configure.ac: Checking assembler for -mno-relax support.
15142 Disable relaxation when probing leb128 support.
15144 2023-09-20 Lulu Cheng <chenglulu@loongson.cn>
15146 * config.in: Regenerate.
15147 * config/loongarch/genopts/loongarch.opt.in: Add compilation option
15148 mrelax. And set the initial value of explicit-relocs according to the
15150 * config/loongarch/gnu-user.h: When compiling with -mno-relax, pass the
15151 --no-relax option to the linker.
15152 * config/loongarch/loongarch-driver.h (ASM_SPEC): When compiling with
15153 -mno-relax, pass the -mno-relax option to the assembler.
15154 * config/loongarch/loongarch-opts.h (HAVE_AS_MRELAX_OPTION): Define macro.
15155 * config/loongarch/loongarch.opt: Regenerate.
15156 * configure: Regenerate.
15157 * configure.ac: Add detection of support for binutils relax function.
15159 2023-09-19 Ben Boeckel <ben.boeckel@kitware.com>
15161 * doc/invoke.texi: Document -fdeps-format=, -fdeps-file=, and
15162 -fdeps-target= flags.
15163 * gcc.cc: add defaults for -fdeps-target= and -fdeps-file= when
15164 only -fdeps-format= is specified.
15165 * json.h: Add a TODO item to refactor out to share with
15166 `libcpp/mkdeps.cc`.
15168 2023-09-19 Ben Boeckel <ben.boeckel@kitware.com>
15169 Jason Merrill <jason@redhat.com>
15171 * gcc.cc (join_spec_func): Add a spec function to join all
15174 2023-09-19 Patrick O'Neill <patrick@rivosinc.com>
15176 * config/riscv/riscv.cc (riscv_legitimize_const_move): Eliminate
15177 src_op_0 var to avoid rtl check error.
15179 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
15181 * range-op-float.cc (frelop_early_resolve): Clean-up and remove
15183 (operator_not_equal::fold_range): Handle VREL_EQ.
15184 (operator_lt::fold_range): Remove special casing for VREL_EQ.
15185 (operator_gt::fold_range): Same.
15186 (foperator_unordered_equal::fold_range): Same.
15188 2023-09-19 Javier Martinez <javier.martinez.bugzilla@gmail.com>
15190 * doc/extend.texi: Document attributes hot, cold on C++ types.
15192 2023-09-19 Pat Haugen <pthaugen@linux.ibm.com>
15194 * config/rs6000/rs6000.cc (rs6000_rtx_costs): Check whether the
15195 modulo instruction is disabled.
15196 * config/rs6000/rs6000.h (RS6000_DISABLE_SCALAR_MODULO): New.
15197 * config/rs6000/rs6000.md (mod<mode>3, *mod<mode>3): Check it.
15198 (define_expand umod<mode>3): New.
15199 (define_insn umod<mode>3): Rename to *umod<mode>3 and check if the modulo
15200 instruction is disabled.
15201 (umodti3, modti3): Check if the modulo instruction is disabled.
15203 2023-09-19 Gaius Mulley <gaiusmod2@gmail.com>
15205 * doc/gm2.texi (fdebug-builtins): Correct description.
15207 2023-09-19 Jeff Law <jlaw@ventanamicro.com>
15209 * config/iq2000/predicates.md (uns_arith_constant): New predicate.
15210 * config/iq2000/iq2000.md (rotrsi3): Use it.
15212 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
15214 * range-op-float.cc (operator_lt::op1_range): Remove known_isnan check.
15215 (operator_lt::op2_range): Same.
15216 (operator_le::op1_range): Same.
15217 (operator_le::op2_range): Same.
15218 (operator_gt::op1_range): Same.
15219 (operator_gt::op2_range): Same.
15220 (operator_ge::op1_range): Same.
15221 (operator_ge::op2_range): Same.
15222 (foperator_unordered_lt::op1_range): Same.
15223 (foperator_unordered_lt::op2_range): Same.
15224 (foperator_unordered_le::op1_range): Same.
15225 (foperator_unordered_le::op2_range): Same.
15226 (foperator_unordered_gt::op1_range): Same.
15227 (foperator_unordered_gt::op2_range): Same.
15228 (foperator_unordered_ge::op1_range): Same.
15229 (foperator_unordered_ge::op2_range): Same.
15231 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
15233 * value-range.h (frange::update_nan): New.
15235 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
15237 * range-op-float.cc (operator_not_equal::op2_range): New.
15238 * range-op-mixed.h: Add operator_not_equal::op2_range.
15240 2023-09-19 Andrew MacLeod <amacleod@redhat.com>
15242 PR tree-optimization/110080
15243 PR tree-optimization/110249
15244 * tree-vrp.cc (remove_unreachable::final_p): New.
15245 (remove_unreachable::maybe_register): Rename from
15246 maybe_register_block and call early or final routine.
15247 (fully_replaceable): New.
15248 (remove_unreachable::handle_early): New.
15249 (remove_unreachable::remove_and_update_globals): Remove
15250 non-final processing.
15251 (rvrp_folder::rvrp_folder): Add final flag to constructor.
15252 (rvrp_folder::post_fold_bb): Remove unreachable registration.
15253 (rvrp_folder::pre_fold_stmt): Move unreachable processing to here.
15254 (execute_ranger_vrp): Adjust some call parameters.
15256 2023-09-19 Richard Biener <rguenther@suse.de>
15259 * tree-pretty-print.h (op_symbol_code): Add defaulted flags
15261 * tree-pretty-print.cc (op_symbol): Likewise.
15262 (op_symbol_code): Print TDF_GIMPLE variant if requested.
15263 * gimple-pretty-print.cc (dump_binary_rhs): Pass flags to
15265 (dump_gimple_cond): Likewise.
15267 2023-09-19 Thomas Schwinge <thomas@codesourcery.com>
15268 Pan Li <pan2.li@intel.com>
15270 * tree-streamer.h (bp_unpack_machine_mode): If
15271 'ib->file_data->mode_table' not available, apply 1-to-1 mapping.
15273 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15275 * config/riscv/riscv.cc (riscv_can_change_mode_class): Block unordered VLA and VLS modes.
15277 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15279 * config/riscv/autovec.md: Extend VLS modes.
15280 * config/riscv/vector.md: Ditto.
15282 2023-09-19 Richard Biener <rguenther@suse.de>
15284 PR tree-optimization/111465
15285 * tree-ssa-threadupdate.cc (fwd_jt_path_registry::thread_block_1):
15286 Cancel the path when a EDGE_NO_COPY_SRC_BLOCK became non-empty.
15288 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15290 * config/riscv/autovec.md: Extend VLS floating-point modes.
15291 * config/riscv/vector.md: Ditto.
15293 2023-09-19 Jakub Jelinek <jakub@redhat.com>
15295 * match.pd ((x << c) >> c): Don't call build_nonstandard_integer_type
15296 nor check type_has_mode_precision_p for width larger than [TD]Imode
15298 (a ? CST1 : CST2): Don't use build_nonstandard_type, just convert
15299 to type. Use boolean_true_node instead of
15300 constant_boolean_node (true, boolean_type_node). Formatting fixes.
15302 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15304 * config/riscv/autovec.md: Add VLS modes.
15305 * config/riscv/vector.md: Ditto.
15307 2023-09-19 Jakub Jelinek <jakub@redhat.com>
15309 * tree.cc (build_bitint_type): Assert precision is not 0, or
15310 for signed types 1.
15311 (signed_or_unsigned_type_for): Return INTEGER_TYPE for signed variant
15312 of unsigned _BitInt(1).
15314 2023-09-19 Lehua Ding <lehua.ding@rivai.ai>
15316 * config/riscv/autovec-opt.md (*<optab>_fma<mode>):
15317 Removed old combine patterns.
15318 (*single_<optab>mult_plus<mode>): Ditto.
15319 (*double_<optab>mult_plus<mode>): Ditto.
15320 (*sign_zero_extend_fma): Ditto.
15321 (*zero_sign_extend_fma): Ditto.
15322 (*double_widen_fma<mode>): Ditto.
15323 (*single_widen_fma<mode>): Ditto.
15324 (*double_widen_fnma<mode>): Ditto.
15325 (*single_widen_fnma<mode>): Ditto.
15326 (*double_widen_fms<mode>): Ditto.
15327 (*single_widen_fms<mode>): Ditto.
15328 (*double_widen_fnms<mode>): Ditto.
15329 (*single_widen_fnms<mode>): Ditto.
15330 (*reduc_plus_scal_<mode>): Adjust name.
15331 (*widen_reduc_plus_scal_<mode>): Adjust name.
15332 (*dual_widen_fma<mode>): New combine pattern.
15333 (*dual_widen_fmasu<mode>): Ditto.
15334 (*dual_widen_fmaus<mode>): Ditto.
15335 (*dual_fma<mode>): Ditto.
15336 (*single_fma<mode>): Ditto.
15337 (*dual_fnma<mode>): Ditto.
15338 (*single_fnma<mode>): Ditto.
15339 (*dual_fms<mode>): Ditto.
15340 (*single_fms<mode>): Ditto.
15341 (*dual_fnms<mode>): Ditto.
15342 (*single_fnms<mode>): Ditto.
15343 * config/riscv/autovec.md (fma<mode>4):
15344 Reafctor fma pattern.
15345 (*fma<VI:mode><P:mode>): Removed.
15346 (fnma<mode>4): Reafctor.
15347 (*fnma<VI:mode><P:mode>): Removed.
15348 (*fma<VF:mode><P:mode>): Removed.
15349 (*fnma<VF:mode><P:mode>): Removed.
15350 (fms<mode>4): Reafctor.
15351 (*fms<VF:mode><P:mode>): Removed.
15352 (fnms<mode>4): Reafctor.
15353 (*fnms<VF:mode><P:mode>): Removed.
15354 * config/riscv/riscv-protos.h (prepare_ternary_operands):
15356 * config/riscv/riscv-v.cc (prepare_ternary_operands): Refactor.
15357 * config/riscv/vector.md (*pred_mul_plus<mode>_undef): New pattern.
15358 (*pred_mul_plus<mode>): Removed.
15359 (*pred_mul_plus<mode>_scalar): Removed.
15360 (*pred_mul_plus<mode>_extended_scalar): Removed.
15361 (*pred_minus_mul<mode>_undef): New pattern.
15362 (*pred_minus_mul<mode>): Removed.
15363 (*pred_minus_mul<mode>_scalar): Removed.
15364 (*pred_minus_mul<mode>_extended_scalar): Removed.
15365 (*pred_mul_<optab><mode>_undef): New pattern.
15366 (*pred_mul_<optab><mode>): Removed.
15367 (*pred_mul_<optab><mode>_scalar): Removed.
15368 (*pred_mul_neg_<optab><mode>_undef): New pattern.
15369 (*pred_mul_neg_<optab><mode>): Removed.
15370 (*pred_mul_neg_<optab><mode>_scalar): Removed.
15372 2023-09-19 Tsukasa OI <research_trasio@irq.a4lg.com>
15374 * config/riscv/riscv-vector-builtins.cc
15375 (builtin_decl, expand_builtin): Replace SVE with RVV.
15377 2023-09-19 Tsukasa OI <research_trasio@irq.a4lg.com>
15379 * config/riscv/t-riscv: Add dependencies for riscv-builtins.cc,
15380 riscv-cmo.def and riscv-scalar-crypto.def.
15382 2023-09-18 Pan Li <pan2.li@intel.com>
15384 * config/riscv/autovec.md: Extend to vls mode.
15386 2023-09-18 Pan Li <pan2.li@intel.com>
15388 * config/riscv/autovec.md: Bugfix.
15389 * config/riscv/riscv-protos.h (SCALAR_MOVE_MERGED_OP): New enum.
15391 2023-09-18 Andrew Pinski <apinski@marvell.com>
15393 PR tree-optimization/111442
15394 * match.pd (zero_one_valued_p): Have the bit_and match not be
15397 2023-09-18 Andrew Pinski <apinski@marvell.com>
15399 PR tree-optimization/111435
15400 * match.pd (zero_one_valued_p): Don't do recursion
15403 2023-09-18 Iain Sandoe <iain@sandoe.co.uk>
15405 * config/darwin-protos.h (enum darwin_external_toolchain): New.
15406 * config/darwin.cc (DSYMUTIL_VERSION): New.
15407 (darwin_override_options): Choose the default debug DWARF version
15408 depending on the configured dsymutil version.
15410 2023-09-18 Iain Sandoe <iain@sandoe.co.uk>
15412 * configure: Regenerate.
15413 * configure.ac: Handle explict disable of stdlib option, set
15414 defaults for Darwin.
15416 2023-09-18 Andrew Pinski <apinski@marvell.com>
15418 PR tree-optimization/111431
15419 * match.pd (`(a == CST) & a`): New pattern.
15421 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15423 * config/riscv/riscv-selftests.cc (run_broadcast_selftests): Adapt selftests.
15424 * config/riscv/vector.md (@vec_duplicate<mode>): Remove.
15426 2023-09-18 Wilco Dijkstra <wilco.dijkstra@arm.com>
15429 * config/aarch64/aarch64.cc (aarch64_internal_mov_immediate)
15430 Add support for immediates using shifted ORR/BIC.
15431 (aarch64_split_dimode_const_store): Apply if we save one instruction.
15432 * config/aarch64/aarch64.md (<LOGICAL:optab>_<SHIFT:optab><mode>3):
15433 Make pattern global.
15435 2023-09-18 Wilco Dijkstra <wilco.dijkstra@arm.com>
15437 * config/aarch64/aarch64-cores.def (neoverse-n1): Place before ares.
15438 (neoverse-v1): Place before zeus.
15439 (neoverse-v2): Place before demeter.
15440 * config/aarch64/aarch64-tune.md: Regenerate.
15442 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15444 * config/riscv/autovec.md: Add VLS modes.
15445 * config/riscv/vector-iterators.md: Ditto.
15446 * config/riscv/vector.md: Ditto.
15448 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15450 * config/riscv/riscv-vsetvl.cc (vlmul_for_greatest_sew_second_ratio): New function.
15451 * config/riscv/riscv-vsetvl.def (DEF_SEW_LMUL_FUSE_RULE): Fix bug.
15453 2023-09-18 Richard Biener <rguenther@suse.de>
15455 PR tree-optimization/111294
15456 * tree-ssa-threadbackward.cc (back_threader_profitability::m_name):
15458 (back_threader::find_paths_to_names): Adjust.
15459 (back_threader::maybe_thread_block): Likewise.
15460 (back_threader_profitability::possibly_profitable_path_p): Remove
15461 code applying extra costs to copies PHIs.
15463 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15465 * config/riscv/autovec.md: Extend VLS modes.
15466 * config/riscv/vector.md: Ditto.
15468 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15470 * config/riscv/vector.md (mov<mode>): New pattern.
15471 (*mov<mode>_mem_to_mem): Ditto.
15472 (*mov<mode>): Ditto.
15473 (@mov<VLS_AVL_REG:mode><P:mode>_lra): Ditto.
15474 (*mov<VLS_AVL_REG:mode><P:mode>_lra): Ditto.
15475 (*mov<mode>_vls): Ditto.
15476 (movmisalign<mode>): Ditto.
15477 (@vec_duplicate<mode>): Ditto.
15478 * config/riscv/autovec-vls.md: Removed.
15480 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15483 * config/riscv/autovec.md: Add VLS modes.
15485 2023-09-18 Jason Merrill <jason@redhat.com>
15487 * doc/gty.texi: Add discussion of cache vs. deletable.
15489 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15491 * config/riscv/autovec-vls.md (<optab><mode>3): Deleted.
15492 (copysign<mode>3): Ditto.
15493 (xorsign<mode>3): Ditto.
15494 (<optab><mode>2): Ditto.
15495 * config/riscv/autovec.md: Extend VLS modes.
15497 2023-09-18 Jiufu Guo <guojiufu@linux.ibm.com>
15499 PR middle-end/111303
15500 * match.pd ((t * 2) / 2): Update pattern.
15502 2023-09-17 Ajit Kumar Agarwal <aagarwa1@linux.ibm.com>
15504 * config/rs6000/vsx.md (*vctzlsbb_zext_<mode>): New define_insn.
15506 2023-09-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15509 * config/riscv/autovec.md (@vec_extract<mode><vel>): Remove @.
15510 (vec_extract<mode><vel>): Ditto.
15511 * config/riscv/riscv-vsetvl.cc (emit_vsetvl_insn): Fix bug.
15512 (pass_vsetvl::local_eliminate_vsetvl_insn): Fix bug.
15513 * config/riscv/riscv.cc (riscv_legitimize_move): Expand VLS mode to scalar mode move.
15515 2023-09-16 Tsukasa OI <research_trasio@irq.a4lg.com>
15517 * config/riscv/crypto.md (riscv_sha256sig0_<mode>,
15518 riscv_sha256sig1_<mode>, riscv_sha256sum0_<mode>,
15519 riscv_sha256sum1_<mode>, riscv_sm3p0_<mode>, riscv_sm3p1_<mode>,
15520 riscv_sm4ed_<mode>, riscv_sm4ks_<mode>): Remove and replace with
15521 new insn/expansions.
15522 (SHA256_OP, SM3_OP, SM4_OP): New iterators.
15523 (sha256_op, sm3_op, sm4_op): New attributes for iteration.
15524 (*riscv_<sha256_op>_si): New raw instruction for RV32.
15525 (*riscv_<sm3_op>_si): Ditto.
15526 (*riscv_<sm4_op>_si): Ditto.
15527 (riscv_<sha256_op>_di_extended): New base instruction for RV64.
15528 (riscv_<sm3_op>_di_extended): Ditto.
15529 (riscv_<sm4_op>_di_extended): Ditto.
15530 (riscv_<sha256_op>_si): New common instruction expansion.
15531 (riscv_<sm3_op>_si): Ditto.
15532 (riscv_<sm4_op>_si): Ditto.
15533 * config/riscv/riscv-builtins.cc: Add availability "crypto_zknh",
15534 "crypto_zksh" and "crypto_zksed". Remove availability
15535 "crypto_zksh{32,64}" and "crypto_zksed{32,64}".
15536 * config/riscv/riscv-ftypes.def: Remove unused function type.
15537 * config/riscv/riscv-scalar-crypto.def: Make SHA-256, SM3 and SM4
15538 intrinsics to operate on uint32_t.
15540 2023-09-16 Tsukasa OI <research_trasio@irq.a4lg.com>
15542 * config/riscv/riscv-builtins.cc (RISCV_ATYPE_UQI): New for
15543 uint8_t. (RISCV_ATYPE_UHI): New for uint16_t.
15544 (RISCV_ATYPE_QI, RISCV_ATYPE_HI, RISCV_ATYPE_SI, RISCV_ATYPE_DI):
15545 Removed as no longer used.
15546 (RISCV_ATYPE_UDI): New for uint64_t.
15547 * config/riscv/riscv-cmo.def: Make types unsigned for not working
15548 "zicbop_cbo_prefetchi" and working bit manipulation clmul builtin
15549 argument/return types.
15550 * config/riscv/riscv-ftypes.def: Make bit manipulation, round
15551 number and shift amount types unsigned.
15552 * config/riscv/riscv-scalar-crypto.def: Ditto.
15554 2023-09-16 Pan Li <pan2.li@intel.com>
15556 * config/riscv/autovec-vls.md (xorsign<mode>3): New pattern.
15558 2023-09-15 Fei Gao <gaofei@eswincomputing.com>
15560 * config/riscv/predicates.md: Restrict predicate
15561 to allow 'reg' only.
15563 2023-09-15 Andrew Pinski <apinski@marvell.com>
15565 * match.pd (zero_one_valued_p): Match a cast from a zero_one_valued_p.
15566 Also match `a & zero_one_valued_p` too.
15568 2023-09-15 Andrew Pinski <apinski@marvell.com>
15570 PR tree-optimization/111414
15571 * match.pd (`(1 >> X) != 0`): Check to see if
15572 the integer_onep was an integral type (not a vector type).
15574 2023-09-15 Andrew MacLeod <amacleod@redhat.com>
15576 * gimple-range-fold.cc (fold_using_range::range_of_phi): Always
15577 run phi analysis, and do it before loop analysis.
15579 2023-09-15 Andrew MacLeod <amacleod@redhat.com>
15581 * gimple-range-fold.cc (fold_using_range::range_of_phi): Fix
15584 2023-09-15 Qing Zhao <qing.zhao@oracle.com>
15586 PR tree-optimization/111407
15587 * tree-ssa-math-opts.cc (convert_mult_to_widen): Avoid the transform
15588 when one of the operands is subject to abnormal coalescing.
15590 2023-09-15 Lehua Ding <lehua.ding@rivai.ai>
15592 * config/riscv/riscv-protos.h (enum insn_flags): Change name.
15593 (enum insn_type): Ditto.
15594 * config/riscv/riscv-v.cc (get_mask_mode_from_insn_flags): Removed.
15595 (emit_vlmax_insn): Adjust.
15596 (emit_nonvlmax_insn): Adjust.
15597 (emit_vlmax_insn_lra): Adjust.
15599 2023-09-15 Lehua Ding <lehua.ding@rivai.ai>
15601 * config/riscv/autovec-opt.md: Adjust.
15602 * config/riscv/autovec.md: Ditto.
15603 * config/riscv/riscv-protos.h (enum class): Delete enum reduction_type.
15604 (expand_reduction): Adjust expand_reduction prototype.
15605 * config/riscv/riscv-v.cc (need_mask_operand_p): New helper function.
15606 (expand_reduction): Refactor expand_reduction.
15608 2023-09-15 Richard Sandiford <richard.sandiford@arm.com>
15611 * config/aarch64/aarch64.cc (aarch64_operands_ok_for_ldpstp): Require
15612 the lower memory access to a mem-pair operand.
15614 2023-09-15 Yang Yujie <yangyujie@loongson.cn>
15616 * config.gcc: Pass the default ABI via TM_MULTILIB_CONFIG.
15617 * config/loongarch/loongarch-driver.h: Invoke MLIB_SELF_SPECS
15618 before the driver canonicalization routines.
15619 * config/loongarch/loongarch.h: Move definitions of CC1_SPEC etc.
15620 to loongarch-driver.h
15621 * config/loongarch/t-linux: Move multilib-related definitions to
15623 * config/loongarch/t-multilib: New file. Inject library build
15624 options obtained from --with-multilib-list.
15625 * config/loongarch/t-loongarch: Same.
15627 2023-09-15 Lehua Ding <lehua.ding@rivai.ai>
15630 * config/riscv/autovec-opt.md (*reduc_plus_scal_<mode>):
15631 New combine pattern.
15632 (*fold_left_widen_plus_<mode>): Ditto.
15633 (*mask_len_fold_left_widen_plus_<mode>): Ditto.
15634 * config/riscv/autovec.md (reduc_plus_scal_<mode>):
15635 Change from define_expand to define_insn_and_split.
15636 (fold_left_plus_<mode>): Ditto.
15637 (mask_len_fold_left_plus_<mode>): Ditto.
15638 * config/riscv/riscv-v.cc (expand_reduction):
15639 Support widen reduction.
15640 * config/riscv/vector-iterators.md (UNSPEC_WREDUC_SUM):
15641 Add new iterators and attrs.
15643 2023-09-14 David Malcolm <dmalcolm@redhat.com>
15645 * diagnostic-event-id.h (diagnostic_thread_id_t): New typedef.
15646 * diagnostic-format-sarif.cc (class sarif_thread_flow): New.
15647 (sarif_thread_flow::sarif_thread_flow): New.
15648 (sarif_builder::make_code_flow_object): Reimplement, creating
15649 per-thread threadFlow objects, populating them with the relevant
15651 (sarif_builder::make_thread_flow_object): Delete, moving the
15652 code into sarif_builder::make_code_flow_object.
15653 (sarif_builder::make_thread_flow_location_object): Add
15654 "path_event_idx" param. Use it to set "executionOrder"
15656 * diagnostic-path.h (diagnostic_event::get_thread_id): New
15657 pure-virtual vfunc.
15658 (class diagnostic_thread): New.
15659 (diagnostic_path::num_threads): New pure-virtual vfunc.
15660 (diagnostic_path::get_thread): New pure-virtual vfunc.
15661 (diagnostic_path::multithreaded_p): New decl.
15662 (simple_diagnostic_event::simple_diagnostic_event): Add optional
15664 (simple_diagnostic_event::get_thread_id): New accessor.
15665 (simple_diagnostic_event::m_thread_id): New.
15666 (class simple_diagnostic_thread): New.
15667 (simple_diagnostic_path::simple_diagnostic_path): Move definition
15669 (simple_diagnostic_path::num_threads): New.
15670 (simple_diagnostic_path::get_thread): New.
15671 (simple_diagnostic_path::add_thread): New.
15672 (simple_diagnostic_path::add_thread_event): New.
15673 (simple_diagnostic_path::m_threads): New.
15674 * diagnostic-show-locus.cc (layout::layout): Add pretty_printer
15675 param for overriding the context's printer.
15676 (diagnostic_show_locus): Likwise.
15677 * diagnostic.cc (simple_diagnostic_path::simple_diagnostic_path):
15678 Move here from diagnostic-path.h. Add main thread.
15679 (simple_diagnostic_path::num_threads): New.
15680 (simple_diagnostic_path::get_thread): New.
15681 (simple_diagnostic_path::add_thread): New.
15682 (simple_diagnostic_path::add_thread_event): New.
15683 (simple_diagnostic_event::simple_diagnostic_event): Add thread_id
15684 param and use it to initialize m_thread_id. Reformat.
15685 * diagnostic.h: Add pretty_printer param for overriding the
15687 * tree-diagnostic-path.cc: Add #define INCLUDE_VECTOR.
15688 (can_consolidate_events): Compare thread ids.
15689 (class per_thread_summary): New.
15690 (event_range::event_range): Add per_thread_summary arg.
15691 (event_range::print): Add "pp" param and use it rather than dc's
15693 (event_range::m_thread_id): New field.
15694 (event_range::m_per_thread_summary): New field.
15695 (path_summary::multithreaded_p): New.
15696 (path_summary::get_events_for_thread_id): New.
15697 (path_summary::m_per_thread_summary): New field.
15698 (path_summary::m_thread_id_to_events): New field.
15699 (path_summary::get_or_create_events_for_thread_id): New.
15700 (path_summary::path_summary): Create per_thread_summary instances
15701 as needed and associate the event_range instances with them.
15702 (base_indent): Move here from print_path_summary_as_text.
15703 (per_frame_indent): Likewise.
15704 (class thread_event_printer): New, adapted from parts of
15705 print_path_summary_as_text.
15706 (print_path_summary_as_text): Make static. Reimplement to
15707 moving most of existing code to class thread_event_printer,
15708 capturing state as per-thread as appropriate.
15709 (default_tree_diagnostic_path_printer): Add missing 'break' on
15712 2023-09-14 David Malcolm <dmalcolm@redhat.com>
15714 * dwarf2cfi.cc (dwarf2cfi_cc_finalize): New.
15715 * dwarf2out.h (dwarf2cfi_cc_finalize): New decl.
15716 * ggc-common.cc (ggc_mark_roots): Multiply by rti->nelt when
15717 clearing the deletable gcc_root_tab_t.
15718 (ggc_common_finalize): New.
15719 * ggc.h (ggc_common_finalize): New decl.
15720 * toplev.cc (toplev::finalize): Call dwarf2cfi_cc_finalize and
15721 ggc_common_finalize.
15723 2023-09-14 Max Filippov <jcmvbkbc@gmail.com>
15725 * config/xtensa/predicates.md (xtensa_cstoresi_operator): Add
15726 unsigned comparisons.
15727 * config/xtensa/xtensa.cc (xtensa_expand_scc): Add code
15728 generation of salt/saltu instructions.
15729 * config/xtensa/xtensa.h (TARGET_SALT): New macro.
15730 * config/xtensa/xtensa.md (salt, saltu): New instruction
15733 2023-09-14 Vladimir N. Makarov <vmakarov@redhat.com>
15735 * ira-costs.cc (find_costs_and_classes): Decrease memory cost
15738 2023-09-14 Lehua Ding <lehua.ding@rivai.ai>
15740 * config/riscv/autovec.md: Change rtx code to unspec.
15741 * config/riscv/riscv-protos.h (expand_reduction): Change prototype.
15742 * config/riscv/riscv-v.cc (expand_reduction): Change prototype.
15743 * config/riscv/riscv-vector-builtins-bases.cc (class widen_reducop):
15745 (class widen_freducop): Removed.
15746 * config/riscv/vector-iterators.md (minu): Add reduc unspec, iterators, attrs.
15747 * config/riscv/vector.md (@pred_reduc_<reduc><mode>): Change name.
15748 (@pred_<reduc_op><mode>): New name.
15749 (@pred_widen_reduc_plus<v_su><mode>): Change name.
15750 (@pred_reduc_plus<order><mode>): Change name.
15751 (@pred_widen_reduc_plus<order><mode>): Change name.
15753 2023-09-14 Lehua Ding <lehua.ding@rivai.ai>
15755 * config/riscv/riscv-v.cc (expand_reduction): Adjust call.
15756 * config/riscv/riscv-vector-builtins-bases.cc: Adjust call.
15757 * config/riscv/vector-iterators.md: New iterators and attrs.
15758 * config/riscv/vector.md (@pred_reduc_<reduc><VQI:mode><VQI_LMUL1:mode>):
15760 (@pred_reduc_<reduc><VHI:mode><VHI_LMUL1:mode>): Removed.
15761 (@pred_reduc_<reduc><VSI:mode><VSI_LMUL1:mode>): Removed.
15762 (@pred_reduc_<reduc><VDI:mode><VDI_LMUL1:mode>): Removed.
15763 (@pred_reduc_<reduc><mode>): Added.
15764 (@pred_widen_reduc_plus<v_su><VQI:mode><VHI_LMUL1:mode>): Removed.
15765 (@pred_widen_reduc_plus<v_su><VHI:mode><VSI_LMUL1:mode>): Removed.
15766 (@pred_widen_reduc_plus<v_su><mode>): Added.
15767 (@pred_widen_reduc_plus<v_su><VSI:mode><VDI_LMUL1:mode>): Removed.
15768 (@pred_reduc_<reduc><VHF:mode><VHF_LMUL1:mode>): Removed.
15769 (@pred_reduc_<reduc><VSF:mode><VSF_LMUL1:mode>): Removed.
15770 (@pred_reduc_<reduc><VDF:mode><VDF_LMUL1:mode>): Removed.
15771 (@pred_reduc_plus<order><VHF:mode><VHF_LMUL1:mode>): Removed.
15772 (@pred_reduc_plus<order><VSF:mode><VSF_LMUL1:mode>): Removed.
15773 (@pred_reduc_plus<order><mode>): Added.
15774 (@pred_reduc_plus<order><VDF:mode><VDF_LMUL1:mode>): Removed.
15775 (@pred_widen_reduc_plus<order><VHF:mode><VSF_LMUL1:mode>): Removed.
15776 (@pred_widen_reduc_plus<order><VSF:mode><VDF_LMUL1:mode>): Removed.
15777 (@pred_widen_reduc_plus<order><mode>): Added.
15779 2023-09-14 Richard Sandiford <richard.sandiford@arm.com>
15781 * config/aarch64/aarch64.cc (aarch64_vector_costs::analyze_loop_info):
15782 Move WHILELO handling to...
15783 (aarch64_vector_costs::finish_cost): ...here. Check whether the
15784 vectorizer has decided to use a predicated loop.
15786 2023-09-14 Andrew Pinski <apinski@marvell.com>
15788 PR tree-optimization/106164
15789 * match.pd (`(X CMP1 CST1) AND/IOR (X CMP2 CST2)`):
15790 Expand to support constants that are off by one.
15792 2023-09-14 Andrew Pinski <apinski@marvell.com>
15794 * genmatch.cc (parser::parse_result): For an else clause
15795 of an if statement inside a switch, error out explictly.
15797 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15799 * config/riscv/autovec-opt.md: Add VLS mask modes.
15800 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): Remove @.
15801 (vcond_mask_<mode><vm>): Add VLS mask modes.
15802 * config/riscv/vector.md: Ditto.
15804 2023-09-14 Richard Biener <rguenther@suse.de>
15806 PR tree-optimization/111294
15807 * tree-ssa-forwprop.cc (pass_forwprop::execute): Track
15808 operands that eventually become dead and use simple_dce_from_worklist
15809 to remove their definitions if they did so.
15811 2023-09-14 Richard Sandiford <richard.sandiford@arm.com>
15813 * config/aarch64/aarch64-sve.md (@aarch64_vec_duplicate_vq<mode>_le):
15814 Accept all nonimmediate_operands, but keep the existing constraints.
15815 If the instruction is split before RA, load invalid addresses into
15816 a temporary register.
15817 * config/aarch64/predicates.md (aarch64_sve_dup_ld1rq_operand): Delete.
15819 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15822 * config/riscv/riscv-vsetvl.cc (avl_info::operator==): Fix ICE.
15823 (vector_insn_info::global_merge): Ditto.
15824 (vector_insn_info::get_avl_or_vl_reg): Ditto.
15826 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15828 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::global_eliminate_vsetvl_insn): Format it.
15830 2023-09-14 Lulu Cheng <chenglulu@loongson.cn>
15832 * config/loongarch/loongarch-def.c: Modify the default value of
15835 2023-09-14 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
15837 * config/xtensa/xtensa.cc (xtensa_expand_scc):
15838 Revert the changes from the last patch, as the work in the RTL
15839 expansion pass is too far to determine the physical registers.
15840 * config/xtensa/xtensa.md (*eqne_INT_MIN): Ditto.
15841 (eq_zero_NSA, eqne_zero, *eqne_zero_masked_bits): New patterns.
15843 2023-09-14 Lulu Cheng <chenglulu@loongson.cn>
15846 * config/loongarch/loongarch.md: Fix bug of '<optab>di3_fake'.
15848 2023-09-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15850 * config/riscv/autovec.md (vec_extract<mode><vel>): Add VLS modes.
15851 (@vec_extract<mode><vel>): Ditto.
15852 * config/riscv/vector.md: Ditto
15854 2023-09-13 Andrew Pinski <apinski@marvell.com>
15856 * match.pd (`X <= MAX(X, Y)`):
15857 Move before `MIN (X, C1) < C2` pattern.
15859 2023-09-13 Andrew Pinski <apinski@marvell.com>
15861 PR tree-optimization/111364
15862 * match.pd (`MIN (X, Y) == X`): Extend
15863 to min/lt, min/ge, max/gt, max/le.
15865 2023-09-13 Andrew Pinski <apinski@marvell.com>
15867 PR tree-optimization/111345
15868 * match.pd (`Y > (X % Y)`): Merge
15870 (`(X % Y) < Y`): Pattern by adding `:c`
15873 2023-09-13 Richard Biener <rguenther@suse.de>
15875 PR tree-optimization/111387
15876 * tree-vect-slp.cc (vect_get_and_check_slp_defs): Check
15877 EDGE_DFS_BACK when doing BB vectorization.
15878 (vect_slp_function): Use rev_post_order_and_mark_dfs_back_seme
15879 to compute RPO and mark backedges.
15881 2023-09-13 Lehua Ding <lehua.ding@rivai.ai>
15883 * config/riscv/autovec-opt.md (*cond_<mulh_table><mode>3_highpart):
15884 New combine pattern.
15885 * config/riscv/autovec.md (smul<mode>3_highpart): Mrege smul and umul.
15886 (<mulh_table><mode>3_highpart): Merged pattern.
15887 (umul<mode>3_highpart): Mrege smul and umul.
15888 * config/riscv/vector-iterators.md (umul): New iterators.
15889 (UNSPEC_VMULHU): New iterators.
15891 2023-09-13 Lehua Ding <lehua.ding@rivai.ai>
15893 * config/riscv/autovec-opt.md (*cond_v<any_shiftrt:optab><any_extend:optab>trunc<mode>):
15894 New combine pattern.
15895 (*cond_<any_shiftrt:optab>trunc<mode>): Ditto.
15897 2023-09-13 Lehua Ding <lehua.ding@rivai.ai>
15899 * config/riscv/autovec-opt.md (*copysign<mode>_neg): Move.
15900 (*cond_copysign<mode>): New combine pattern.
15901 * config/riscv/riscv-v.cc (needs_fp_rounding): Extend.
15903 2023-09-13 Richard Biener <rguenther@suse.de>
15905 PR tree-optimization/111397
15906 * tree-ssa-propagate.cc (may_propagate_copy): Change optional
15907 argument to specify whether the PHI destination doesn't flow in
15908 from an abnormal PHI.
15909 (propagate_value): Adjust.
15910 * tree-ssa-forwprop.cc (pass_forwprop::execute): Indicate abnormal
15912 * tree-ssa-sccvn.cc (eliminate_dom_walker::before_dom_children):
15914 (process_bb): Likewise.
15916 2023-09-13 Pan Li <pan2.li@intel.com>
15919 * config/riscv/riscv.cc (riscv_emit_frm_mode_set): Bugfix.
15921 2023-09-13 Jiufu Guo <guojiufu@linux.ibm.com>
15923 PR tree-optimization/111303
15924 * match.pd ((X - N * M) / N): Add undefined_p checking.
15925 ((X + N * M) / N): Likewise.
15926 ((X + C) div_rshift N): Likewise.
15928 2023-09-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15931 * config/riscv/autovec.md (vcond_mask_<mode><mode>): New pattern.
15933 2023-09-12 Martin Jambor <mjambor@suse.cz>
15935 * dbgcnt.def (form_fma): New.
15936 * tree-ssa-math-opts.cc: Include dbgcnt.h.
15937 (convert_mult_to_fma): Bail out if the debug counter say so.
15939 2023-09-12 Edwin Lu <ewlu@rivosinc.com>
15941 * config/riscv/autovec-opt.md: Update type
15942 * config/riscv/riscv.cc (riscv_sched_variable_issue): Enable assert
15944 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
15946 * config/aarch64/aarch64.cc (aarch64_save_regs_above_locals_p):
15948 (aarch64_layout_frame): Use it to decide whether locals should
15949 go above or below the saved registers.
15950 (aarch64_expand_prologue): Update stack layout comment.
15951 Emit a stack tie after the final adjustment.
15953 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
15955 * config/aarch64/aarch64.h (aarch64_frame::saved_regs_size)
15956 (aarch64_frame::below_hard_fp_saved_regs_size): Delete.
15957 * config/aarch64/aarch64.cc (aarch64_layout_frame): Update accordingly.
15959 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
15961 * config/aarch64/aarch64.h (aarch64_frame::sve_save_and_probe)
15962 (aarch64_frame::hard_fp_save_and_probe): New fields.
15963 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize them.
15964 Rather than asserting that a leaf function saves LR, instead assert
15965 that a leaf function saves something.
15966 (aarch64_get_separate_components): Prevent the chosen probe
15967 registers from being individually shrink-wrapped.
15968 (aarch64_allocate_and_probe_stack_space): Remove workaround for
15969 probe registers that aren't at the bottom of the previous allocation.
15971 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
15973 * config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space):
15974 Always probe the residual allocation at offset 1024, asserting
15975 that that is in range.
15977 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
15979 * config/aarch64/aarch64.cc (aarch64_layout_frame): Ensure that
15980 the LR save slot is in the first 16 bytes of the register save area.
15981 Only form STP/LDP push/pop candidates if both registers are valid.
15982 (aarch64_allocate_and_probe_stack_space): Remove workaround for
15983 when LR was not in the first 16 bytes.
15985 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
15987 * config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space):
15988 Don't probe final allocations that are exactly 1KiB in size (after
15989 unprobed space above the final allocation has been deducted).
15991 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
15993 * config/aarch64/aarch64.cc (aarch64_layout_frame): Tweak
15994 calculation of initial_adjust for frames in which all saves
15997 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
15999 * config/aarch64/aarch64.cc (aarch64_layout_frame): Simplify
16000 the allocation of the top of the frame.
16002 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
16004 * config/aarch64/aarch64.h (aarch64_frame): Add comment above
16006 * config/aarch64/aarch64.cc (aarch64_layout_frame): Walk offsets
16007 from the bottom of the frame, rather than the bottom of the saved
16008 register area. Measure reg_offset from the bottom of the frame
16009 rather than the bottom of the saved register area.
16010 (aarch64_save_callee_saves): Update accordingly.
16011 (aarch64_restore_callee_saves): Likewise.
16012 (aarch64_get_separate_components): Likewise.
16013 (aarch64_process_components): Likewise.
16015 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
16017 * config/aarch64/aarch64.h (aarch64_frame::frame_size): Tweak comment.
16019 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
16021 * config/aarch64/aarch64.h (aarch64_frame::hard_fp_offset): Rename
16023 (aarch64_frame::bytes_above_hard_fp): ...this.
16024 * config/aarch64/aarch64.cc (aarch64_layout_frame)
16025 (aarch64_expand_prologue): Update accordingly.
16026 (aarch64_initial_elimination_offset): Likewise.
16028 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
16030 * config/aarch64/aarch64.h (aarch64_frame::locals_offset): Rename to...
16031 (aarch64_frame::bytes_above_locals): ...this.
16032 * config/aarch64/aarch64.cc (aarch64_layout_frame)
16033 (aarch64_initial_elimination_offset): Update accordingly.
16035 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
16037 * config/aarch64/aarch64.cc (aarch64_expand_prologue): Move the
16038 calculation of chain_offset into the emit_frame_chain block.
16040 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
16042 * config/aarch64/aarch64.h (aarch64_frame::callee_offset): Delete.
16043 * config/aarch64/aarch64.cc (aarch64_layout_frame): Remove
16044 callee_offset handling.
16045 (aarch64_save_callee_saves): Replace the start_offset parameter
16046 with a bytes_below_sp parameter.
16047 (aarch64_restore_callee_saves): Likewise.
16048 (aarch64_expand_prologue): Update accordingly.
16049 (aarch64_expand_epilogue): Likewise.
16051 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
16053 * config/aarch64/aarch64.h (aarch64_frame::bytes_below_hard_fp): New
16055 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it.
16056 (aarch64_expand_epilogue): Use it instead of
16057 below_hard_fp_saved_regs_size.
16059 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
16061 * config/aarch64/aarch64.h (aarch64_frame::bytes_below_saved_regs): New
16063 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it,
16064 and use it instead of crtl->outgoing_args_size.
16065 (aarch64_get_separate_components): Use bytes_below_saved_regs instead
16066 of outgoing_args_size.
16067 (aarch64_process_components): Likewise.
16069 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
16071 * config/aarch64/aarch64.cc (aarch64_layout_frame): Explicitly
16072 allocate the frame in one go if there are no saved registers.
16074 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
16076 * config/aarch64/aarch64.cc (aarch64_expand_prologue): Use
16077 chain_offset rather than callee_offset.
16079 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
16081 * config/aarch64/aarch64.cc (aarch64_save_callee_saves): Use
16082 a local shorthand for cfun->machine->frame.
16083 (aarch64_restore_callee_saves, aarch64_get_separate_components):
16084 (aarch64_process_components): Likewise.
16085 (aarch64_allocate_and_probe_stack_space): Likewise.
16086 (aarch64_expand_prologue, aarch64_expand_epilogue): Likewise.
16087 (aarch64_layout_frame): Use existing shorthand for one more case.
16089 2023-09-12 Andrew Pinski <apinski@marvell.com>
16091 PR tree-optimization/107881
16092 * match.pd (`(a CMP1 b) ^ (a CMP2 b)`): New pattern.
16093 (`(a CMP1 b) == (a CMP2 b)`): New pattern.
16095 2023-09-12 Pan Li <pan2.li@intel.com>
16097 * config/riscv/riscv-vector-costs.h (struct range): Removed.
16099 2023-09-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16101 * config/riscv/riscv-vector-costs.cc (get_last_live_range): New function.
16102 (compute_nregs_for_mode): Ditto.
16103 (live_range_conflict_p): Ditto.
16104 (max_number_of_live_regs): Ditto.
16105 (compute_lmul): Ditto.
16106 (costs::prefer_new_lmul_p): Ditto.
16107 (costs::better_main_loop_than_p): Ditto.
16108 * config/riscv/riscv-vector-costs.h (struct stmt_point): New struct.
16109 (struct var_live_range): Ditto.
16110 (struct autovec_info): Ditto.
16111 * config/riscv/t-riscv: Update makefile for COST model.
16113 2023-09-12 Jakub Jelinek <jakub@redhat.com>
16115 * fold-const.cc (range_check_type): Handle BITINT_TYPE like
16118 2023-09-12 Jakub Jelinek <jakub@redhat.com>
16120 PR middle-end/111338
16121 * tree-ssa-sccvn.cc (struct vn_walk_cb_data): Add bufsize non-static
16123 (vn_walk_cb_data::push_partial_def): Remove bufsize variable.
16124 (visit_nary_op): Avoid the BIT_AND_EXPR with constant rhs2
16125 optimization if type's precision is too large for
16126 vn_walk_cb_data::bufsize.
16128 2023-09-12 Gaius Mulley <gaiusmod2@gmail.com>
16130 * doc/gm2.texi (Compiler options): Document new option
16133 2023-09-12 Thomas Schwinge <thomas@codesourcery.com>
16135 * doc/sourcebuild.texi (stack_size): Update.
16137 2023-09-12 Christoph Müllner <christoph.muellner@vrull.eu>
16139 * config/riscv/bitmanip.md (*<optab>_not<mode>): Export INSN name.
16140 (<optab>_not<mode>3): Likewise.
16141 * config/riscv/riscv-protos.h (riscv_expand_strcmp): New
16143 * config/riscv/riscv-string.cc (GEN_EMIT_HELPER3): New helper
16145 (GEN_EMIT_HELPER2): Likewise.
16146 (emit_strcmp_scalar_compare_byte): New function.
16147 (emit_strcmp_scalar_compare_subword): Likewise.
16148 (emit_strcmp_scalar_compare_word): Likewise.
16149 (emit_strcmp_scalar_load_and_compare): Likewise.
16150 (emit_strcmp_scalar_call_to_libc): Likewise.
16151 (emit_strcmp_scalar_result_calculation_nonul): Likewise.
16152 (emit_strcmp_scalar_result_calculation): Likewise.
16153 (riscv_expand_strcmp_scalar): Likewise.
16154 (riscv_expand_strcmp): Likewise.
16155 * config/riscv/riscv.md (*slt<u>_<X:mode><GPR:mode>): Export
16157 (@slt<u>_<X:mode><GPR:mode>3): Likewise.
16158 (cmpstrnsi): Invoke expansion function for str(n)cmp.
16159 (cmpstrsi): Likewise.
16160 * config/riscv/riscv.opt: Add new parameter
16161 '-mstring-compare-inline-limit'.
16162 * doc/invoke.texi: Document new parameter
16163 '-mstring-compare-inline-limit'.
16165 2023-09-12 Christoph Müllner <christoph.muellner@vrull.eu>
16167 * config.gcc: Add new object riscv-string.o.
16169 * config/riscv/riscv-protos.h (riscv_expand_strlen):
16171 * config/riscv/riscv.md (strlen<mode>): New expand INSN.
16172 * config/riscv/riscv.opt: New flag 'minline-strlen'.
16173 * config/riscv/t-riscv: Add new object riscv-string.o.
16174 * config/riscv/thead.md (th_rev<mode>2): Export INSN name.
16175 (th_rev<mode>2): Likewise.
16176 (th_tstnbz<mode>2): New INSN.
16177 * doc/invoke.texi: Document '-minline-strlen'.
16178 * emit-rtl.cc (emit_likely_jump_insn): New helper function.
16179 (emit_unlikely_jump_insn): Likewise.
16180 * rtl.h (emit_likely_jump_insn): New prototype.
16181 (emit_unlikely_jump_insn): Likewise.
16182 * config/riscv/riscv-string.cc: New file.
16184 2023-09-12 Thomas Schwinge <thomas@codesourcery.com>
16186 * config/nvptx/nvptx.h (TARGET_USE_LOCAL_THUNK_ALIAS_P)
16187 (TARGET_SUPPORTS_ALIASES): Define.
16189 2023-09-12 Thomas Schwinge <thomas@codesourcery.com>
16191 * doc/sourcebuild.texi (check-function-bodies): Update.
16193 2023-09-12 Tobias Burnus <tobias@codesourcery.com>
16195 * gimplify.cc (gimplify_bind_expr): Check for
16196 insertion after variable cleanup. Convert 'omp allocate'
16197 var-decl attribute to GOMP_alloc/GOMP_free calls.
16199 2023-09-12 xuli <xuli1@eswincomputing.com>
16201 * config/riscv/riscv-vector-builtins-bases.cc: remove unused
16202 parameter e and replace NULL_RTX with gcc_unreachable.
16204 2023-09-12 xuli <xuli1@eswincomputing.com>
16206 * config/riscv/riscv-vector-builtins-bases.cc (class vcreate): New class.
16208 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
16209 * config/riscv/riscv-vector-builtins-functions.def (vcreate): Add vcreate support.
16210 * config/riscv/riscv-vector-builtins-shapes.cc (struct vcreate_def): Ditto.
16212 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
16213 * config/riscv/riscv-vector-builtins.cc: Add args type.
16215 2023-09-12 Fei Gao <gaofei@eswincomputing.com>
16217 * config/riscv/riscv.cc
16218 (riscv_avoid_shrink_wrapping_separate): wrap the condition check in
16219 riscv_avoid_shrink_wrapping_separate.
16220 (riscv_avoid_multi_push):avoid multi push if shrink_wrapping_separate
16222 (riscv_get_separate_components):call riscv_avoid_shrink_wrapping_separate
16224 2023-09-12 Fei Gao <gaofei@eswincomputing.com>
16226 * shrink-wrap.cc (try_shrink_wrapping_separate):call
16227 use_shrink_wrapping_separate.
16228 (use_shrink_wrapping_separate): wrap the condition
16229 check in use_shrink_wrapping_separate.
16230 * shrink-wrap.h (use_shrink_wrapping_separate): add to extern
16232 2023-09-11 Andrew Pinski <apinski@marvell.com>
16234 PR tree-optimization/111348
16235 * match.pd (`(a CMP b) ? minmax<a, c> : minmax<b, c>`): Add :c on
16236 the cmp part of the pattern.
16238 2023-09-11 Uros Bizjak <ubizjak@gmail.com>
16241 * config/i386/i386.cc (output_pic_addr_const): Handle CONST_WIDE_INT.
16242 Call output_addr_const for CASE_CONST_SCALAR_INT.
16244 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
16246 * config/riscv/thead.md: Update types
16248 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
16250 * config/riscv/riscv.md: Update types
16252 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
16254 * config/riscv/riscv.md: Add "zicond" type
16255 * config/riscv/zicond.md: Update types
16257 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
16259 * config/riscv/riscv.md: Add "pushpop" and "mvpair" types
16260 * config/riscv/zc.md: Update types
16262 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
16264 * config/riscv/autovec-opt.md: Update types
16265 * config/riscv/autovec.md: likewise
16267 2023-09-11 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
16269 * config/s390/s390-builtins.def (s390_vec_signed_flt): Fix
16271 (s390_vec_unsigned_flt): Ditto.
16272 (s390_vec_revb_flt): Ditto.
16273 (s390_vec_reve_flt): Ditto.
16274 (s390_vclfnhs): Fix operand flags.
16275 (s390_vclfnls): Ditto.
16276 (s390_vcrnfs): Ditto.
16277 (s390_vcfn): Ditto.
16278 (s390_vcnf): Ditto.
16280 2023-09-11 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
16282 * config/s390/s390-builtins.def (O_U64): New.
16287 (O_M12): Change bit position.
16298 (OB_DEF_VAR): Add operand constraints.
16300 * config/s390/s390.cc (s390_const_operand_ok): Honour 64 bit
16303 2023-09-11 Andrew Pinski <apinski@marvell.com>
16305 PR tree-optimization/111349
16306 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`): Add :c on
16307 the cmp part of the pattern.
16309 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16312 * config/riscv/riscv.opt: Set default as scalable vectorization.
16314 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16316 * config/riscv/riscv-protos.h (get_all_predecessors): Remove.
16317 (get_all_successors): Ditto.
16318 * config/riscv/riscv-v.cc (get_all_predecessors): Ditto.
16319 (get_all_successors): Ditto.
16321 2023-09-11 Jakub Jelinek <jakub@redhat.com>
16323 PR middle-end/111329
16324 * pretty-print.h (pp_wide_int): Rewrite from macro into inline
16325 function. For printing values which don't fit into digit_buffer
16326 use out-of-line function.
16327 * wide-int-print.h (pp_wide_int_large): Declare.
16328 * wide-int-print.cc: Include pretty-print.h.
16329 (pp_wide_int_large): Define.
16331 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16333 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::global_eliminate_vsetvl_insn):
16334 Use dominance analysis.
16335 (pass_vsetvl::init): Ditto.
16336 (pass_vsetvl::done): Ditto.
16338 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16341 * config/riscv/autovec.md: Add VLS modes.
16342 * config/riscv/riscv-protos.h (cmp_lmul_le_one): New function.
16343 (cmp_lmul_gt_one): Ditto.
16344 * config/riscv/riscv-v.cc (cmp_lmul_le_one): Ditto.
16345 (cmp_lmul_gt_one): Ditto.
16346 * config/riscv/riscv.cc (riscv_print_operand): Add VLS modes.
16347 (riscv_vectorize_vec_perm_const): Ditto.
16348 * config/riscv/vector-iterators.md: Ditto.
16349 * config/riscv/vector.md: Ditto.
16351 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16353 * config/riscv/autovec-vls.md (*mov<mode>_vls): New pattern.
16354 * config/riscv/vector-iterators.md: New iterator
16356 2023-09-11 Andrew Pinski <apinski@marvell.com>
16358 PR tree-optimization/111346
16359 * match.pd (`X CMP MINMAX`): Add `:c` on the cmp part
16362 2023-09-11 liuhongt <hongtao.liu@intel.com>
16366 * config/i386/sse.md (int_comm): New int_attr.
16367 (fma_<complexopname>_<mode><sdc_maskz_name><round_name>):
16368 Remove % for Complex conjugate operations since they're not
16370 (fma_<complexpairopname>_<mode>_pair): Ditto.
16371 (<avx512>_<complexopname>_<mode>_mask<round_name>): Ditto.
16372 (cmul<conj_op><mode>3): Ditto.
16374 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16376 * config/riscv/riscv-v.cc (shuffle_generic_patterns): Expand
16377 fixed-vlmax/vls vector permutation.
16379 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16381 * config/riscv/riscv-v.cc (shuffle_compress_patterns): Avoid unnecessary slideup.
16383 2023-09-10 Andrew Pinski <apinski@marvell.com>
16385 PR tree-optimization/111331
16386 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`):
16387 Fix the LE/GE comparison to the correct value.
16388 * tree-ssa-phiopt.cc (minmax_replacement):
16389 Fix the LE/GE comparison for the
16390 `(a CMP CST1) ? max<a,CST2> : a` optimization.
16392 2023-09-10 Iain Sandoe <iain@sandoe.co.uk>
16394 * config/darwin.cc (darwin_function_section): Place unlikely
16395 executed global init code into the standard cold section.
16397 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16400 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::vsetvl_fusion): Add TDF_DETAILS.
16401 (pass_vsetvl::pre_vsetvl): Ditto.
16402 (pass_vsetvl::init): Ditto.
16403 (pass_vsetvl::lazy_vsetvl): Ditto.
16405 2023-09-09 Lulu Cheng <chenglulu@loongson.cn>
16407 * config/loongarch/loongarch.md (mulsidi3_64bit):
16408 Field unsigned extension support.
16409 (<u>muldi3_highpart): Modify template name.
16410 (<u>mulsi3_highpart): Likewise.
16411 (<u>mulsidi3_64bit): Field unsigned extension support.
16412 (<su>muldi3_highpart): Modify muldi3_highpart to
16414 (<su>mulsi3_highpart): Modify mulsi3_highpart to
16417 2023-09-09 Xi Ruoyao <xry111@xry111.site>
16419 * config/loongarch/loongarch.cc (loongarch_block_move_straight):
16420 Check precondition (delta must be a power of 2) and use
16421 popcount_hwi instead of a homebrew loop.
16423 2023-09-09 Xi Ruoyao <xry111@xry111.site>
16425 * config/loongarch/loongarch.h (LARCH_MAX_MOVE_PER_INSN):
16426 Define to the maximum amount of bytes able to be loaded or
16427 stored with one machine instruction.
16428 * config/loongarch/loongarch.cc (loongarch_mode_for_move_size):
16429 New static function.
16430 (loongarch_block_move_straight): Call
16431 loongarch_mode_for_move_size for machine_mode to be moved.
16432 (loongarch_expand_block_move): Use LARCH_MAX_MOVE_PER_INSN
16433 instead of UNITS_PER_WORD.
16435 2023-09-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16437 * config/riscv/vector-iterators.md: Fix floating-point operations predicate.
16439 2023-09-09 Lehua Ding <lehua.ding@rivai.ai>
16441 * fold-const.cc (can_min_p): New function.
16442 (poly_int_binop): Try fold MIN_EXPR.
16444 2023-09-08 Aldy Hernandez <aldyh@redhat.com>
16446 * range-op-float.cc (foperator_ltgt::fold_range): Do not special
16447 case VREL_EQ nor call frelop_early_resolve.
16449 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
16451 * config/riscv/thead.md (*extend<SHORT:mode><SUPERQI:mode>2_th_ext):
16452 Remove broken INSN.
16453 (*extendhi<SUPERQI:mode>2_th_ext): New INSN.
16454 (*extendqi<SUPERQI:mode>2_th_ext): New INSN.
16456 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
16458 * config/riscv/thead.md: Use more appropriate mode attributes
16461 2023-09-08 Guo Jie <guojie@loongson.cn>
16463 * common/config/loongarch/loongarch-common.cc:
16464 (default_options loongarch_option_optimization_table):
16465 Default to -fsched-pressure.
16467 2023-09-08 Yang Yujie <yangyujie@loongson.cn>
16469 * config.gcc: remove non-POSIX syntax "<<<".
16471 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
16473 * config/riscv/bitmanip.md (*extend<SHORT:mode><SUPERQI:mode>2_zbb):
16474 Rename postfix to _bitmanip.
16475 (*extend<SHORT:mode><SUPERQI:mode>2_bitmanip): Renamed pattern.
16476 (*zero_extendhi<GPR:mode>2_zbb): Remove duplicated pattern.
16478 2023-09-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16480 * config/riscv/riscv.cc (riscv_pass_in_vector_p): Only allow RVV type.
16482 2023-09-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16484 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Fix bug.
16486 2023-09-07 liuhongt <hongtao.liu@intel.com>
16488 * config/i386/sse.md
16489 (<avx512>_vpermt2var<mode>3<sd_maskz_name>): New define_insn.
16490 (VHFBF_AVX512VL): New mode iterator.
16491 (VI2HFBF_AVX512VL): New mode iterator.
16493 2023-09-07 Aldy Hernandez <aldyh@redhat.com>
16495 * value-range.h (contains_zero_p): Return false for undefined ranges.
16496 * range-op-float.cc (operator_gt::op1_op2_relation): Adjust for
16497 contains_zero_p change above.
16498 (operator_ge::op1_op2_relation): Same.
16499 (operator_equal::op1_op2_relation): Same.
16500 (operator_not_equal::op1_op2_relation): Same.
16501 (operator_lt::op1_op2_relation): Same.
16502 (operator_le::op1_op2_relation): Same.
16503 (operator_ge::op1_op2_relation): Same.
16504 * range-op.cc (operator_equal::op1_op2_relation): Same.
16505 (operator_not_equal::op1_op2_relation): Same.
16506 (operator_lt::op1_op2_relation): Same.
16507 (operator_le::op1_op2_relation): Same.
16508 (operator_cast::op1_range): Same.
16509 (set_nonzero_range_from_mask): Same.
16510 (operator_bitwise_xor::op1_range): Same.
16511 (operator_addr_expr::fold_range): Same.
16512 (operator_addr_expr::op1_range): Same.
16514 2023-09-07 Andrew MacLeod <amacleod@redhat.com>
16516 PR tree-optimization/110875
16517 * gimple-range.cc (gimple_ranger::prefill_name): Only invoke
16518 cache-prefilling routine when the ssa-name has no global value.
16520 2023-09-07 Vladimir N. Makarov <vmakarov@redhat.com>
16523 * lra-constraints.cc (goal_reuse_alt_p): New global flag.
16524 (process_alt_operands): Set up the flag. Clear flag for chosen
16525 alternative with special memory constraints.
16526 (process_alt_operands): Set up used insn alternative depending on the flag.
16528 2023-09-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16530 * config/riscv/autovec-vls.md: Add VLS mask modes mov patterns.
16531 * config/riscv/riscv.md: Ditto.
16532 * config/riscv/vector-iterators.md: Ditto.
16533 * config/riscv/vector.md: Ditto.
16535 2023-09-07 David Malcolm <dmalcolm@redhat.com>
16537 * diagnostic-core.h (error_meta): New decl.
16538 * diagnostic.cc (error_meta): New.
16540 2023-09-07 Jakub Jelinek <jakub@redhat.com>
16543 * expr.cc (expand_expr_real_1): Don't call targetm.c.bitint_type_info
16544 inside gcc_assert, as later code relies on it filling info variable.
16545 * gimple-fold.cc (clear_padding_bitint_needs_padding_p,
16546 clear_padding_type): Likewise.
16547 * varasm.cc (output_constant): Likewise.
16548 * fold-const.cc (native_encode_int, native_interpret_int): Likewise.
16549 * stor-layout.cc (finish_bitfield_representative, layout_type):
16551 * gimple-lower-bitint.cc (bitint_precision_kind): Likewise.
16553 2023-09-07 Xi Ruoyao <xry111@xry111.site>
16556 * config/loongarch/loongarch-protos.h
16557 (loongarch_pre_reload_split): Declare new function.
16558 (loongarch_use_bstrins_for_ior_with_mask): Likewise.
16559 * config/loongarch/loongarch.cc
16560 (loongarch_pre_reload_split): Implement.
16561 (loongarch_use_bstrins_for_ior_with_mask): Likewise.
16562 * config/loongarch/predicates.md (ins_zero_bitmask_operand):
16564 * config/loongarch/loongarch.md (bstrins_<mode>_for_mask):
16565 New define_insn_and_split.
16566 (bstrins_<mode>_for_ior_mask): Likewise.
16567 (define_peephole2): Further optimize code sequence produced by
16568 bstrins_<mode>_for_ior_mask if possible.
16570 2023-09-07 Richard Sandiford <richard.sandiford@arm.com>
16572 * lra-eliminations.cc (lra_eliminate_regs_1): Use simplify_gen_binary
16573 rather than gen_rtx_PLUS.
16575 2023-09-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16578 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_earliest_vsetvls): Remove.
16579 (pass_vsetvl::df_post_optimization): Remove incorrect function.
16581 2023-09-07 Tsukasa OI <research_trasio@irq.a4lg.com>
16583 * common/config/riscv/riscv-common.cc (riscv_ext_flag_table):
16584 Parse 'XVentanaCondOps' extension.
16585 * config/riscv/riscv-opts.h (MASK_XVENTANACONDOPS): New.
16586 (TARGET_XVENTANACONDOPS): Ditto.
16587 (TARGET_ZICOND_LIKE): New to represent targets with conditional
16588 moves like 'Zicond'. It includes RV64 + 'XVentanaCondOps'.
16589 * config/riscv/riscv.cc (riscv_rtx_costs): Replace TARGET_ZICOND
16590 with TARGET_ZICOND_LIKE.
16591 (riscv_expand_conditional_move): Ditto.
16592 * config/riscv/riscv.md (mov<mode>cc): Replace TARGET_ZICOND with
16593 TARGET_ZICOND_LIKE.
16594 * config/riscv/riscv.opt: Add new riscv_xventana_subext.
16595 * config/riscv/zicond.md: Modify description.
16596 (eqz_ventana): New to match corresponding czero instructions.
16597 (nez_ventana): Ditto.
16598 (*czero.<eqz>.<GPR><X>): Emit a 'XVentanaCondOps' instruction if
16599 'Zicond' is not available but 'XVentanaCondOps' + RV64 is.
16600 (*czero.<eqz>.<GPR><X>): Ditto.
16601 (*czero.eqz.<GPR><X>.opt1): Ditto.
16602 (*czero.nez.<GPR><X>.opt2): Ditto.
16604 2023-09-06 Ian Lance Taylor <iant@golang.org>
16607 * godump.cc (go_format_type): Handle BITINT_TYPE.
16609 2023-09-06 Jakub Jelinek <jakub@redhat.com>
16612 * tree.cc (build_one_cst, build_minus_one_cst): Handle BITINT_TYPE
16615 2023-09-06 Jakub Jelinek <jakub@redhat.com>
16618 * gimple-lower-bitint.cc (bitint_large_huge::if_then_else,
16619 bitint_large_huge::if_then_if_then_else): Use make_single_succ_edge
16620 rather than make_edge, initialize bb->count.
16622 2023-09-06 Jakub Jelinek <jakub@redhat.com>
16625 * doc/libgcc.texi (Bit-precise integer arithmetic functions):
16626 Document general rules for _BitInt support library functions
16627 and document __mulbitint3 and __divmodbitint4.
16628 (Conversion functions): Document __fix{s,d,x,t}fbitint,
16629 __floatbitint{s,d,x,t,h,b}f, __bid_fix{s,d,t}dbitint and
16630 __bid_floatbitint{s,d,t}d.
16632 2023-09-06 Jakub Jelinek <jakub@redhat.com>
16635 * glimits.h (BITINT_MAXWIDTH): Define if __BITINT_MAXWIDTH__ is
16638 2023-09-06 Jakub Jelinek <jakub@redhat.com>
16641 * internal-fn.cc (expand_ubsan_result_store): Add LHS, MODE and
16642 DO_ERROR arguments. For non-mode precision BITINT_TYPE results
16643 check if all padding bits up to mode precision are zeros or sign
16644 bit copies and if not, jump to DO_ERROR.
16645 (expand_addsub_overflow, expand_neg_overflow, expand_mul_overflow):
16646 Adjust expand_ubsan_result_store callers.
16647 * ubsan.cc: Include target.h and langhooks.h.
16648 (ubsan_encode_value): Pass BITINT_TYPE values which fit into pointer
16649 size converted to pointer sized integer, pass BITINT_TYPE values
16650 which fit into TImode (if supported) or DImode as those integer types
16651 or otherwise for now punt (pass 0).
16652 (ubsan_type_descriptor): Handle BITINT_TYPE. For pstyle of
16653 UBSAN_PRINT_FORCE_INT use TK_Integer (0x0000) mode with a
16654 TImode/DImode precision rather than TK_Unknown used otherwise for
16655 large/huge BITINT_TYPEs.
16656 (instrument_si_overflow): Instrument BITINT_TYPE operations even when
16657 they don't have mode precision.
16658 * ubsan.h (enum ubsan_print_style): New enumerator.
16660 2023-09-06 Jakub Jelinek <jakub@redhat.com>
16663 * config/i386/i386.cc (classify_argument): Handle BITINT_TYPE.
16664 (ix86_bitint_type_info): New function.
16665 (TARGET_C_BITINT_TYPE_INFO): Redefine.
16667 2023-09-06 Jakub Jelinek <jakub@redhat.com>
16670 * Makefile.in (OBJS): Add gimple-lower-bitint.o.
16671 * passes.def: Add pass_lower_bitint after pass_lower_complex and
16672 pass_lower_bitint_O0 after pass_lower_complex_O0.
16673 * tree-pass.h (PROP_gimple_lbitint): Define.
16674 (make_pass_lower_bitint_O0, make_pass_lower_bitint): Declare.
16675 * gimple-lower-bitint.h: New file.
16676 * tree-ssa-live.h (struct _var_map): Add bitint member.
16677 (init_var_map): Adjust declaration.
16678 (region_contains_p): Handle map->bitint like map->outofssa_p.
16679 * tree-ssa-live.cc (init_var_map): Add BITINT argument, initialize
16680 map->bitint and set map->outofssa_p to false if it is non-NULL.
16681 * tree-ssa-coalesce.cc: Include gimple-lower-bitint.h.
16682 (build_ssa_conflict_graph): Call build_bitint_stmt_ssa_conflicts if
16684 (create_coalesce_list_for_region): For map->bitint ignore SSA_NAMEs
16685 not in that bitmap, and allow res without default def.
16686 (compute_optimized_partition_bases): In map->bitint mode try hard to
16687 coalesce any SSA_NAMEs with the same size.
16688 (coalesce_bitint): New function.
16689 (coalesce_ssa_name): In map->bitint mode, or map->bitmap into
16690 used_in_copies and call coalesce_bitint.
16691 * gimple-lower-bitint.cc: New file.
16693 2023-09-06 Jakub Jelinek <jakub@redhat.com>
16696 * tree.def (BITINT_TYPE): New type.
16697 * tree.h (TREE_CHECK6, TREE_NOT_CHECK6): Define.
16698 (NUMERICAL_TYPE_CHECK, INTEGRAL_TYPE_P): Include
16700 (BITINT_TYPE_P): Define.
16701 (CONSTRUCTOR_BITFIELD_P): Return true even for BLKmode bit-fields if
16702 they have BITINT_TYPE type.
16703 (tree_check6, tree_not_check6): New inline functions.
16704 (any_integral_type_check): Include BITINT_TYPE.
16705 (build_bitint_type): Declare.
16706 * tree.cc (tree_code_size, wide_int_to_tree_1, cache_integer_cst,
16707 build_zero_cst, type_hash_canon_hash, type_cache_hasher::equal,
16708 type_hash_canon): Handle BITINT_TYPE.
16709 (bitint_type_cache): New variable.
16710 (build_bitint_type): New function.
16711 (signed_or_unsigned_type_for, verify_type_variant, verify_type):
16712 Handle BITINT_TYPE.
16713 (tree_cc_finalize): Free bitint_type_cache.
16714 * builtins.cc (type_to_class): Handle BITINT_TYPE.
16715 (fold_builtin_unordered_cmp): Handle BITINT_TYPE like INTEGER_TYPE.
16716 * cfgexpand.cc (expand_debug_expr): Punt on BLKmode BITINT_TYPE
16718 * convert.cc (convert_to_pointer_1, convert_to_real_1,
16719 convert_to_complex_1): Handle BITINT_TYPE like INTEGER_TYPE.
16720 (convert_to_integer_1): Likewise. For BITINT_TYPE don't check
16721 GET_MODE_PRECISION (TYPE_MODE (type)).
16722 * doc/generic.texi (BITINT_TYPE): Document.
16723 * doc/tm.texi.in (TARGET_C_BITINT_TYPE_INFO): New.
16724 * doc/tm.texi: Regenerated.
16725 * dwarf2out.cc (base_type_die, is_base_type, modified_type_die,
16726 gen_type_die_with_usage): Handle BITINT_TYPE.
16727 (rtl_for_decl_init): Punt on BLKmode BITINT_TYPE INTEGER_CSTs or
16728 handle those which fit into shwi.
16729 * expr.cc (expand_expr_real_1): Define EXTEND_BITINT macro, reduce
16730 to bitfield precision reads from BITINT_TYPE vars, parameters or
16731 memory locations. Expand large/huge BITINT_TYPE INTEGER_CSTs into
16733 * fold-const.cc (fold_convert_loc, make_range_step): Handle
16735 (extract_muldiv_1): For BITINT_TYPE use TYPE_PRECISION rather than
16736 GET_MODE_SIZE (SCALAR_INT_TYPE_MODE).
16737 (native_encode_int, native_interpret_int, native_interpret_expr):
16738 Handle BITINT_TYPE.
16739 * gimple-expr.cc (useless_type_conversion_p): Make BITINT_TYPE
16740 to some other integral type or vice versa conversions non-useless.
16741 * gimple-fold.cc (gimple_fold_builtin_memset): Punt for BITINT_TYPE.
16742 (clear_padding_unit): Mention in comment that _BitInt types don't need
16744 (clear_padding_bitint_needs_padding_p): New function.
16745 (clear_padding_type_may_have_padding_p): Handle BITINT_TYPE.
16746 (clear_padding_type): Likewise.
16747 * internal-fn.cc (expand_mul_overflow): For unsigned non-mode
16748 precision operands force pos_neg? to 1.
16749 (expand_MULBITINT, expand_DIVMODBITINT, expand_FLOATTOBITINT,
16750 expand_BITINTTOFLOAT): New functions.
16751 * internal-fn.def (MULBITINT, DIVMODBITINT, FLOATTOBITINT,
16752 BITINTTOFLOAT): New internal functions.
16753 * internal-fn.h (expand_MULBITINT, expand_DIVMODBITINT,
16754 expand_FLOATTOBITINT, expand_BITINTTOFLOAT): Declare.
16755 * match.pd (non-equality compare simplifications from fold_binary):
16756 Punt if TYPE_MODE (arg1_type) is BLKmode.
16757 * pretty-print.h (pp_wide_int): Handle printing of large precision
16758 wide_ints which would buffer overflow digit_buffer.
16759 * stor-layout.cc (finish_bitfield_representative): For bit-fields
16760 with BITINT_TYPE, prefer representatives with precisions in
16761 multiple of limb precision.
16762 (layout_type): Handle BITINT_TYPE. Handle COMPLEX_TYPE with BLKmode
16763 element type and assert it is BITINT_TYPE.
16764 * target.def (bitint_type_info): New C target hook.
16765 * target.h (struct bitint_info): New type.
16766 * targhooks.cc (default_bitint_type_info): New function.
16767 * targhooks.h (default_bitint_type_info): Declare.
16768 * tree-pretty-print.cc (dump_generic_node): Handle BITINT_TYPE.
16769 Handle printing large wide_ints which would buffer overflow
16771 * tree-ssa-sccvn.cc: Include target.h.
16772 (eliminate_dom_walker::eliminate_stmt): Punt for large/huge
16774 * tree-switch-conversion.cc (jump_table_cluster::emit): For more than
16775 64-bit BITINT_TYPE subtract low bound from expression and cast to
16776 64-bit integer type both the controlling expression and case labels.
16777 * typeclass.h (enum type_class): Add bitint_type_class enumerator.
16778 * varasm.cc (output_constant): Handle BITINT_TYPE INTEGER_CSTs.
16779 * vr-values.cc (check_for_binary_op_overflow): Use widest2_int rather
16781 (simplify_using_ranges::simplify_internal_call_using_ranges): Use
16782 unsigned_type_for rather than build_nonstandard_integer_type.
16784 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16787 * config/riscv/riscv.cc (riscv_modes_tieable_p): Fix incorrect mode
16788 tieable for RVV modes.
16790 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16793 * config/riscv/riscv-vsetvl.cc (insert_vsetvl): Bug fix.
16795 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16797 * config/riscv/riscv-vector-switch.def (VLS_ENTRY): Remove TARGET_64BIT
16799 2023-09-06 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
16801 * config/xtensa/xtensa.cc (xtensa_expand_scc):
16802 Add code for particular constants (only 0 and INT_MIN for now)
16803 for EQ/NE boolean evaluation in SImode.
16804 * config/xtensa/xtensa.md (*eqne_INT_MIN): Remove because its
16805 implementation has been integrated into the above.
16807 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
16810 * config/riscv/autovec-opt.md (@pred_single_widen_mul<any_extend:su><mode>):
16812 (*pred_widen_mulsu<mode>): Delete.
16813 (*pred_single_widen_mul<mode>): Delete.
16814 (*dual_widen_<any_widen_binop:optab><any_extend:su><mode>):
16815 Add new combine patterns.
16816 (*single_widen_sub<any_extend:su><mode>): Ditto.
16817 (*single_widen_add<any_extend:su><mode>): Ditto.
16818 (*single_widen_mult<any_extend:su><mode>): Ditto.
16819 (*dual_widen_mulsu<mode>): Ditto.
16820 (*dual_widen_mulus<mode>): Ditto.
16821 (*dual_widen_<optab><mode>): Ditto.
16822 (*single_widen_add<mode>): Ditto.
16823 (*single_widen_sub<mode>): Ditto.
16824 (*single_widen_mult<mode>): Ditto.
16825 * config/riscv/autovec.md (<optab><mode>3):
16826 Change define_expand to define_insn_and_split.
16827 (<optab><mode>2): Ditto.
16828 (abs<mode>2): Ditto.
16829 (smul<mode>3_highpart): Ditto.
16830 (umul<mode>3_highpart): Ditto.
16832 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
16834 * config/riscv/riscv-protos.h (riscv_declare_function_name): Add protos.
16835 (riscv_asm_output_alias): Ditto.
16836 (riscv_asm_output_external): Ditto.
16837 * config/riscv/riscv.cc (riscv_asm_output_variant_cc):
16838 Output .variant_cc directive for vector function.
16839 (riscv_declare_function_name): Ditto.
16840 (riscv_asm_output_alias): Ditto.
16841 (riscv_asm_output_external): Ditto.
16842 * config/riscv/riscv.h (ASM_DECLARE_FUNCTION_NAME):
16843 Implement ASM_DECLARE_FUNCTION_NAME.
16844 (ASM_OUTPUT_DEF_FROM_DECLS): Implement ASM_OUTPUT_DEF_FROM_DECLS.
16845 (ASM_OUTPUT_EXTERNAL): Implement ASM_OUTPUT_EXTERNAL.
16847 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
16849 * config/riscv/riscv-sr.cc (riscv_remove_unneeded_save_restore_calls): Pass riscv_cc.
16850 * config/riscv/riscv.cc (struct riscv_frame_info): Add new fileds.
16851 (riscv_frame_info::reset): Reset new fileds.
16852 (riscv_call_tls_get_addr): Pass riscv_cc.
16853 (riscv_function_arg): Return riscv_cc for call patterm.
16854 (get_riscv_cc): New function return riscv_cc from rtl call_insn.
16855 (riscv_insn_callee_abi): Implement TARGET_INSN_CALLEE_ABI.
16856 (riscv_save_reg_p): Add vector callee-saved check.
16857 (riscv_stack_align): Add vector save area comment.
16858 (riscv_compute_frame_info): Ditto.
16859 (riscv_restore_reg): Update for type change.
16860 (riscv_for_each_saved_v_reg): New function save vector registers.
16861 (riscv_first_stack_step): Handle funciton with vector callee-saved registers.
16862 (riscv_expand_prologue): Ditto.
16863 (riscv_expand_epilogue): Ditto.
16864 (riscv_output_mi_thunk): Pass riscv_cc.
16865 (TARGET_INSN_CALLEE_ABI): Implement TARGET_INSN_CALLEE_ABI.
16866 * config/riscv/riscv.h (get_riscv_cc): Export get_riscv_cc function.
16867 * config/riscv/riscv.md: Add CALLEE_CC operand for call pattern.
16869 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
16871 * config/riscv/riscv-protos.h (builtin_type_p): New function for checking vector type.
16872 * config/riscv/riscv-vector-builtins.cc (builtin_type_p): Ditto.
16873 * config/riscv/riscv.cc (struct riscv_arg_info): New fields.
16874 (riscv_init_cumulative_args): Setup variant_cc field.
16875 (riscv_vector_type_p): New function for checking vector type.
16876 (riscv_hard_regno_nregs): Hoist declare.
16877 (riscv_get_vector_arg): Subroutine of riscv_get_arg_info.
16878 (riscv_get_arg_info): Support vector cc.
16879 (riscv_function_arg_advance): Update cum.
16880 (riscv_pass_by_reference): Handle vector args.
16881 (riscv_v_abi): New function return vector abi.
16882 (riscv_return_value_is_vector_type_p): New function for check vector arguments.
16883 (riscv_arguments_is_vector_type_p): New function for check vector returns.
16884 (riscv_fntype_abi): Implement TARGET_FNTYPE_ABI.
16885 (TARGET_FNTYPE_ABI): Implement TARGET_FNTYPE_ABI.
16886 * config/riscv/riscv.h (GCC_RISCV_H): Define macros for vector abi.
16887 (MAX_ARGS_IN_VECTOR_REGISTERS): Ditto.
16888 (MAX_ARGS_IN_MASK_REGISTERS): Ditto.
16889 (V_ARG_FIRST): Ditto.
16890 (V_ARG_LAST): Ditto.
16891 (enum riscv_cc): Define all RISCV_CC variants.
16892 * config/riscv/riscv.opt: Add --param=riscv-vector-abi.
16894 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
16896 * config/riscv/autovec-opt.md (*cond_<optab><mode>):
16897 Add sqrt + vcond_mask combine pattern.
16898 * config/riscv/autovec.md (<optab><mode>2):
16899 Change define_expand to define_insn_and_split.
16901 2023-09-06 Jason Merrill <jason@redhat.com>
16903 * common.opt: Update -fabi-version=19.
16905 2023-09-06 Tsukasa OI <research_trasio@irq.a4lg.com>
16907 * config/riscv/zicond.md: Add closing parent to a comment.
16909 2023-09-06 Tsukasa OI <research_trasio@irq.a4lg.com>
16911 * config/riscv/riscv.cc (riscv_expand_conditional_move): Force
16912 large constant cons/alt into a register.
16914 2023-09-05 Christoph Müllner <christoph.muellner@vrull.eu>
16916 * config/riscv/riscv.cc (riscv_build_integer_1): Don't
16917 require one zero bit in the upper 32 bits for LI+RORI synthesis.
16919 2023-09-05 Jeff Law <jlaw@ventanamicro.com>
16921 * config/riscv/bitmanip.md (bswapsi2): Expose for TARGET_64BIT.
16923 2023-09-05 Andrew Pinski <apinski@marvell.com>
16925 PR tree-optimization/98710
16926 * match.pd (`(x | c) & ~(y | c)`, `(x & c) | ~(y & c)`): New pattern.
16927 (`x & ~(y | x)`, `x | ~(y & x)`): New patterns.
16929 2023-09-05 Andrew Pinski <apinski@marvell.com>
16931 PR tree-optimization/103536
16932 * match.pd (`(x | y) & (x & z)`,
16933 `(x & y) | (x | z)`): New patterns.
16935 2023-09-05 Andrew Pinski <apinski@marvell.com>
16937 PR tree-optimization/107137
16938 * match.pd (`(nop_convert)-(convert)a`): New pattern.
16940 2023-09-05 Andrew Pinski <apinski@marvell.com>
16942 PR tree-optimization/96694
16943 * match.pd (`~MAX(~X, Y)`, `~MIN(~X, Y)`): New patterns.
16945 2023-09-05 Andrew Pinski <apinski@marvell.com>
16947 PR tree-optimization/105832
16948 * match.pd (`(1 >> X) != 0`): New pattern
16950 2023-09-05 Edwin Lu <ewlu@rivosinc.com>
16952 * config/riscv/riscv.md: Update/Add types
16954 2023-09-05 Edwin Lu <ewlu@rivosinc.com>
16956 * config/riscv/pic.md: Update types
16958 2023-09-05 Christoph Müllner <christoph.muellner@vrull.eu>
16960 * config/riscv/riscv.cc (riscv_build_integer_1): Enable constant
16961 synthesis with rotate-right for XTheadBb.
16963 2023-09-05 Vineet Gupta <vineetg@rivosinc.com>
16965 * config/riscv/zicond.md: Fix op2 pattern.
16967 2023-09-05 Szabolcs Nagy <szabolcs.nagy@arm.com>
16969 * config/aarch64/aarch64.h (AARCH64_ISA_RCPC): Remove dup.
16971 2023-09-05 Xi Ruoyao <xry111@xry111.site>
16973 * config/loongarch/loongarch-opts.h (HAVE_AS_EXPLICIT_RELOCS):
16974 Define to 0 if not defined yet.
16976 2023-09-05 Kito Cheng <kito.cheng@sifive.com>
16978 * config/riscv/linux.h (TARGET_ASM_FILE_END): Move ...
16979 * config/riscv/riscv.cc (TARGET_ASM_FILE_END): to here.
16981 2023-09-05 Pan Li <pan2.li@intel.com>
16983 * config/riscv/autovec-vls.md (copysign<mode>3): New pattern.
16984 * config/riscv/vector.md: Extend iterator for VLS.
16986 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
16988 * config.gcc: Export the header file lasxintrin.h.
16989 * config/loongarch/loongarch-builtins.cc (enum loongarch_builtin_type):
16990 Add Loongson ASX builtin functions support.
16991 (AVAIL_ALL): Ditto.
16992 (LASX_BUILTIN): Ditto.
16993 (LASX_NO_TARGET_BUILTIN): Ditto.
16994 (LASX_BUILTIN_TEST_BRANCH): Ditto.
16995 (CODE_FOR_lasx_xvsadd_b): Ditto.
16996 (CODE_FOR_lasx_xvsadd_h): Ditto.
16997 (CODE_FOR_lasx_xvsadd_w): Ditto.
16998 (CODE_FOR_lasx_xvsadd_d): Ditto.
16999 (CODE_FOR_lasx_xvsadd_bu): Ditto.
17000 (CODE_FOR_lasx_xvsadd_hu): Ditto.
17001 (CODE_FOR_lasx_xvsadd_wu): Ditto.
17002 (CODE_FOR_lasx_xvsadd_du): Ditto.
17003 (CODE_FOR_lasx_xvadd_b): Ditto.
17004 (CODE_FOR_lasx_xvadd_h): Ditto.
17005 (CODE_FOR_lasx_xvadd_w): Ditto.
17006 (CODE_FOR_lasx_xvadd_d): Ditto.
17007 (CODE_FOR_lasx_xvaddi_bu): Ditto.
17008 (CODE_FOR_lasx_xvaddi_hu): Ditto.
17009 (CODE_FOR_lasx_xvaddi_wu): Ditto.
17010 (CODE_FOR_lasx_xvaddi_du): Ditto.
17011 (CODE_FOR_lasx_xvand_v): Ditto.
17012 (CODE_FOR_lasx_xvandi_b): Ditto.
17013 (CODE_FOR_lasx_xvbitsel_v): Ditto.
17014 (CODE_FOR_lasx_xvseqi_b): Ditto.
17015 (CODE_FOR_lasx_xvseqi_h): Ditto.
17016 (CODE_FOR_lasx_xvseqi_w): Ditto.
17017 (CODE_FOR_lasx_xvseqi_d): Ditto.
17018 (CODE_FOR_lasx_xvslti_b): Ditto.
17019 (CODE_FOR_lasx_xvslti_h): Ditto.
17020 (CODE_FOR_lasx_xvslti_w): Ditto.
17021 (CODE_FOR_lasx_xvslti_d): Ditto.
17022 (CODE_FOR_lasx_xvslti_bu): Ditto.
17023 (CODE_FOR_lasx_xvslti_hu): Ditto.
17024 (CODE_FOR_lasx_xvslti_wu): Ditto.
17025 (CODE_FOR_lasx_xvslti_du): Ditto.
17026 (CODE_FOR_lasx_xvslei_b): Ditto.
17027 (CODE_FOR_lasx_xvslei_h): Ditto.
17028 (CODE_FOR_lasx_xvslei_w): Ditto.
17029 (CODE_FOR_lasx_xvslei_d): Ditto.
17030 (CODE_FOR_lasx_xvslei_bu): Ditto.
17031 (CODE_FOR_lasx_xvslei_hu): Ditto.
17032 (CODE_FOR_lasx_xvslei_wu): Ditto.
17033 (CODE_FOR_lasx_xvslei_du): Ditto.
17034 (CODE_FOR_lasx_xvdiv_b): Ditto.
17035 (CODE_FOR_lasx_xvdiv_h): Ditto.
17036 (CODE_FOR_lasx_xvdiv_w): Ditto.
17037 (CODE_FOR_lasx_xvdiv_d): Ditto.
17038 (CODE_FOR_lasx_xvdiv_bu): Ditto.
17039 (CODE_FOR_lasx_xvdiv_hu): Ditto.
17040 (CODE_FOR_lasx_xvdiv_wu): Ditto.
17041 (CODE_FOR_lasx_xvdiv_du): Ditto.
17042 (CODE_FOR_lasx_xvfadd_s): Ditto.
17043 (CODE_FOR_lasx_xvfadd_d): Ditto.
17044 (CODE_FOR_lasx_xvftintrz_w_s): Ditto.
17045 (CODE_FOR_lasx_xvftintrz_l_d): Ditto.
17046 (CODE_FOR_lasx_xvftintrz_wu_s): Ditto.
17047 (CODE_FOR_lasx_xvftintrz_lu_d): Ditto.
17048 (CODE_FOR_lasx_xvffint_s_w): Ditto.
17049 (CODE_FOR_lasx_xvffint_d_l): Ditto.
17050 (CODE_FOR_lasx_xvffint_s_wu): Ditto.
17051 (CODE_FOR_lasx_xvffint_d_lu): Ditto.
17052 (CODE_FOR_lasx_xvfsub_s): Ditto.
17053 (CODE_FOR_lasx_xvfsub_d): Ditto.
17054 (CODE_FOR_lasx_xvfmul_s): Ditto.
17055 (CODE_FOR_lasx_xvfmul_d): Ditto.
17056 (CODE_FOR_lasx_xvfdiv_s): Ditto.
17057 (CODE_FOR_lasx_xvfdiv_d): Ditto.
17058 (CODE_FOR_lasx_xvfmax_s): Ditto.
17059 (CODE_FOR_lasx_xvfmax_d): Ditto.
17060 (CODE_FOR_lasx_xvfmin_s): Ditto.
17061 (CODE_FOR_lasx_xvfmin_d): Ditto.
17062 (CODE_FOR_lasx_xvfsqrt_s): Ditto.
17063 (CODE_FOR_lasx_xvfsqrt_d): Ditto.
17064 (CODE_FOR_lasx_xvflogb_s): Ditto.
17065 (CODE_FOR_lasx_xvflogb_d): Ditto.
17066 (CODE_FOR_lasx_xvmax_b): Ditto.
17067 (CODE_FOR_lasx_xvmax_h): Ditto.
17068 (CODE_FOR_lasx_xvmax_w): Ditto.
17069 (CODE_FOR_lasx_xvmax_d): Ditto.
17070 (CODE_FOR_lasx_xvmaxi_b): Ditto.
17071 (CODE_FOR_lasx_xvmaxi_h): Ditto.
17072 (CODE_FOR_lasx_xvmaxi_w): Ditto.
17073 (CODE_FOR_lasx_xvmaxi_d): Ditto.
17074 (CODE_FOR_lasx_xvmax_bu): Ditto.
17075 (CODE_FOR_lasx_xvmax_hu): Ditto.
17076 (CODE_FOR_lasx_xvmax_wu): Ditto.
17077 (CODE_FOR_lasx_xvmax_du): Ditto.
17078 (CODE_FOR_lasx_xvmaxi_bu): Ditto.
17079 (CODE_FOR_lasx_xvmaxi_hu): Ditto.
17080 (CODE_FOR_lasx_xvmaxi_wu): Ditto.
17081 (CODE_FOR_lasx_xvmaxi_du): Ditto.
17082 (CODE_FOR_lasx_xvmin_b): Ditto.
17083 (CODE_FOR_lasx_xvmin_h): Ditto.
17084 (CODE_FOR_lasx_xvmin_w): Ditto.
17085 (CODE_FOR_lasx_xvmin_d): Ditto.
17086 (CODE_FOR_lasx_xvmini_b): Ditto.
17087 (CODE_FOR_lasx_xvmini_h): Ditto.
17088 (CODE_FOR_lasx_xvmini_w): Ditto.
17089 (CODE_FOR_lasx_xvmini_d): Ditto.
17090 (CODE_FOR_lasx_xvmin_bu): Ditto.
17091 (CODE_FOR_lasx_xvmin_hu): Ditto.
17092 (CODE_FOR_lasx_xvmin_wu): Ditto.
17093 (CODE_FOR_lasx_xvmin_du): Ditto.
17094 (CODE_FOR_lasx_xvmini_bu): Ditto.
17095 (CODE_FOR_lasx_xvmini_hu): Ditto.
17096 (CODE_FOR_lasx_xvmini_wu): Ditto.
17097 (CODE_FOR_lasx_xvmini_du): Ditto.
17098 (CODE_FOR_lasx_xvmod_b): Ditto.
17099 (CODE_FOR_lasx_xvmod_h): Ditto.
17100 (CODE_FOR_lasx_xvmod_w): Ditto.
17101 (CODE_FOR_lasx_xvmod_d): Ditto.
17102 (CODE_FOR_lasx_xvmod_bu): Ditto.
17103 (CODE_FOR_lasx_xvmod_hu): Ditto.
17104 (CODE_FOR_lasx_xvmod_wu): Ditto.
17105 (CODE_FOR_lasx_xvmod_du): Ditto.
17106 (CODE_FOR_lasx_xvmul_b): Ditto.
17107 (CODE_FOR_lasx_xvmul_h): Ditto.
17108 (CODE_FOR_lasx_xvmul_w): Ditto.
17109 (CODE_FOR_lasx_xvmul_d): Ditto.
17110 (CODE_FOR_lasx_xvclz_b): Ditto.
17111 (CODE_FOR_lasx_xvclz_h): Ditto.
17112 (CODE_FOR_lasx_xvclz_w): Ditto.
17113 (CODE_FOR_lasx_xvclz_d): Ditto.
17114 (CODE_FOR_lasx_xvnor_v): Ditto.
17115 (CODE_FOR_lasx_xvor_v): Ditto.
17116 (CODE_FOR_lasx_xvori_b): Ditto.
17117 (CODE_FOR_lasx_xvnori_b): Ditto.
17118 (CODE_FOR_lasx_xvpcnt_b): Ditto.
17119 (CODE_FOR_lasx_xvpcnt_h): Ditto.
17120 (CODE_FOR_lasx_xvpcnt_w): Ditto.
17121 (CODE_FOR_lasx_xvpcnt_d): Ditto.
17122 (CODE_FOR_lasx_xvxor_v): Ditto.
17123 (CODE_FOR_lasx_xvxori_b): Ditto.
17124 (CODE_FOR_lasx_xvsll_b): Ditto.
17125 (CODE_FOR_lasx_xvsll_h): Ditto.
17126 (CODE_FOR_lasx_xvsll_w): Ditto.
17127 (CODE_FOR_lasx_xvsll_d): Ditto.
17128 (CODE_FOR_lasx_xvslli_b): Ditto.
17129 (CODE_FOR_lasx_xvslli_h): Ditto.
17130 (CODE_FOR_lasx_xvslli_w): Ditto.
17131 (CODE_FOR_lasx_xvslli_d): Ditto.
17132 (CODE_FOR_lasx_xvsra_b): Ditto.
17133 (CODE_FOR_lasx_xvsra_h): Ditto.
17134 (CODE_FOR_lasx_xvsra_w): Ditto.
17135 (CODE_FOR_lasx_xvsra_d): Ditto.
17136 (CODE_FOR_lasx_xvsrai_b): Ditto.
17137 (CODE_FOR_lasx_xvsrai_h): Ditto.
17138 (CODE_FOR_lasx_xvsrai_w): Ditto.
17139 (CODE_FOR_lasx_xvsrai_d): Ditto.
17140 (CODE_FOR_lasx_xvsrl_b): Ditto.
17141 (CODE_FOR_lasx_xvsrl_h): Ditto.
17142 (CODE_FOR_lasx_xvsrl_w): Ditto.
17143 (CODE_FOR_lasx_xvsrl_d): Ditto.
17144 (CODE_FOR_lasx_xvsrli_b): Ditto.
17145 (CODE_FOR_lasx_xvsrli_h): Ditto.
17146 (CODE_FOR_lasx_xvsrli_w): Ditto.
17147 (CODE_FOR_lasx_xvsrli_d): Ditto.
17148 (CODE_FOR_lasx_xvsub_b): Ditto.
17149 (CODE_FOR_lasx_xvsub_h): Ditto.
17150 (CODE_FOR_lasx_xvsub_w): Ditto.
17151 (CODE_FOR_lasx_xvsub_d): Ditto.
17152 (CODE_FOR_lasx_xvsubi_bu): Ditto.
17153 (CODE_FOR_lasx_xvsubi_hu): Ditto.
17154 (CODE_FOR_lasx_xvsubi_wu): Ditto.
17155 (CODE_FOR_lasx_xvsubi_du): Ditto.
17156 (CODE_FOR_lasx_xvpackod_d): Ditto.
17157 (CODE_FOR_lasx_xvpackev_d): Ditto.
17158 (CODE_FOR_lasx_xvpickod_d): Ditto.
17159 (CODE_FOR_lasx_xvpickev_d): Ditto.
17160 (CODE_FOR_lasx_xvrepli_b): Ditto.
17161 (CODE_FOR_lasx_xvrepli_h): Ditto.
17162 (CODE_FOR_lasx_xvrepli_w): Ditto.
17163 (CODE_FOR_lasx_xvrepli_d): Ditto.
17164 (CODE_FOR_lasx_xvandn_v): Ditto.
17165 (CODE_FOR_lasx_xvorn_v): Ditto.
17166 (CODE_FOR_lasx_xvneg_b): Ditto.
17167 (CODE_FOR_lasx_xvneg_h): Ditto.
17168 (CODE_FOR_lasx_xvneg_w): Ditto.
17169 (CODE_FOR_lasx_xvneg_d): Ditto.
17170 (CODE_FOR_lasx_xvbsrl_v): Ditto.
17171 (CODE_FOR_lasx_xvbsll_v): Ditto.
17172 (CODE_FOR_lasx_xvfmadd_s): Ditto.
17173 (CODE_FOR_lasx_xvfmadd_d): Ditto.
17174 (CODE_FOR_lasx_xvfmsub_s): Ditto.
17175 (CODE_FOR_lasx_xvfmsub_d): Ditto.
17176 (CODE_FOR_lasx_xvfnmadd_s): Ditto.
17177 (CODE_FOR_lasx_xvfnmadd_d): Ditto.
17178 (CODE_FOR_lasx_xvfnmsub_s): Ditto.
17179 (CODE_FOR_lasx_xvfnmsub_d): Ditto.
17180 (CODE_FOR_lasx_xvpermi_q): Ditto.
17181 (CODE_FOR_lasx_xvpermi_d): Ditto.
17182 (CODE_FOR_lasx_xbnz_v): Ditto.
17183 (CODE_FOR_lasx_xbz_v): Ditto.
17184 (CODE_FOR_lasx_xvssub_b): Ditto.
17185 (CODE_FOR_lasx_xvssub_h): Ditto.
17186 (CODE_FOR_lasx_xvssub_w): Ditto.
17187 (CODE_FOR_lasx_xvssub_d): Ditto.
17188 (CODE_FOR_lasx_xvssub_bu): Ditto.
17189 (CODE_FOR_lasx_xvssub_hu): Ditto.
17190 (CODE_FOR_lasx_xvssub_wu): Ditto.
17191 (CODE_FOR_lasx_xvssub_du): Ditto.
17192 (CODE_FOR_lasx_xvabsd_b): Ditto.
17193 (CODE_FOR_lasx_xvabsd_h): Ditto.
17194 (CODE_FOR_lasx_xvabsd_w): Ditto.
17195 (CODE_FOR_lasx_xvabsd_d): Ditto.
17196 (CODE_FOR_lasx_xvabsd_bu): Ditto.
17197 (CODE_FOR_lasx_xvabsd_hu): Ditto.
17198 (CODE_FOR_lasx_xvabsd_wu): Ditto.
17199 (CODE_FOR_lasx_xvabsd_du): Ditto.
17200 (CODE_FOR_lasx_xvavg_b): Ditto.
17201 (CODE_FOR_lasx_xvavg_h): Ditto.
17202 (CODE_FOR_lasx_xvavg_w): Ditto.
17203 (CODE_FOR_lasx_xvavg_d): Ditto.
17204 (CODE_FOR_lasx_xvavg_bu): Ditto.
17205 (CODE_FOR_lasx_xvavg_hu): Ditto.
17206 (CODE_FOR_lasx_xvavg_wu): Ditto.
17207 (CODE_FOR_lasx_xvavg_du): Ditto.
17208 (CODE_FOR_lasx_xvavgr_b): Ditto.
17209 (CODE_FOR_lasx_xvavgr_h): Ditto.
17210 (CODE_FOR_lasx_xvavgr_w): Ditto.
17211 (CODE_FOR_lasx_xvavgr_d): Ditto.
17212 (CODE_FOR_lasx_xvavgr_bu): Ditto.
17213 (CODE_FOR_lasx_xvavgr_hu): Ditto.
17214 (CODE_FOR_lasx_xvavgr_wu): Ditto.
17215 (CODE_FOR_lasx_xvavgr_du): Ditto.
17216 (CODE_FOR_lasx_xvmuh_b): Ditto.
17217 (CODE_FOR_lasx_xvmuh_h): Ditto.
17218 (CODE_FOR_lasx_xvmuh_w): Ditto.
17219 (CODE_FOR_lasx_xvmuh_d): Ditto.
17220 (CODE_FOR_lasx_xvmuh_bu): Ditto.
17221 (CODE_FOR_lasx_xvmuh_hu): Ditto.
17222 (CODE_FOR_lasx_xvmuh_wu): Ditto.
17223 (CODE_FOR_lasx_xvmuh_du): Ditto.
17224 (CODE_FOR_lasx_xvssran_b_h): Ditto.
17225 (CODE_FOR_lasx_xvssran_h_w): Ditto.
17226 (CODE_FOR_lasx_xvssran_w_d): Ditto.
17227 (CODE_FOR_lasx_xvssran_bu_h): Ditto.
17228 (CODE_FOR_lasx_xvssran_hu_w): Ditto.
17229 (CODE_FOR_lasx_xvssran_wu_d): Ditto.
17230 (CODE_FOR_lasx_xvssrarn_b_h): Ditto.
17231 (CODE_FOR_lasx_xvssrarn_h_w): Ditto.
17232 (CODE_FOR_lasx_xvssrarn_w_d): Ditto.
17233 (CODE_FOR_lasx_xvssrarn_bu_h): Ditto.
17234 (CODE_FOR_lasx_xvssrarn_hu_w): Ditto.
17235 (CODE_FOR_lasx_xvssrarn_wu_d): Ditto.
17236 (CODE_FOR_lasx_xvssrln_bu_h): Ditto.
17237 (CODE_FOR_lasx_xvssrln_hu_w): Ditto.
17238 (CODE_FOR_lasx_xvssrln_wu_d): Ditto.
17239 (CODE_FOR_lasx_xvssrlrn_bu_h): Ditto.
17240 (CODE_FOR_lasx_xvssrlrn_hu_w): Ditto.
17241 (CODE_FOR_lasx_xvssrlrn_wu_d): Ditto.
17242 (CODE_FOR_lasx_xvftint_w_s): Ditto.
17243 (CODE_FOR_lasx_xvftint_l_d): Ditto.
17244 (CODE_FOR_lasx_xvftint_wu_s): Ditto.
17245 (CODE_FOR_lasx_xvftint_lu_d): Ditto.
17246 (CODE_FOR_lasx_xvsllwil_h_b): Ditto.
17247 (CODE_FOR_lasx_xvsllwil_w_h): Ditto.
17248 (CODE_FOR_lasx_xvsllwil_d_w): Ditto.
17249 (CODE_FOR_lasx_xvsllwil_hu_bu): Ditto.
17250 (CODE_FOR_lasx_xvsllwil_wu_hu): Ditto.
17251 (CODE_FOR_lasx_xvsllwil_du_wu): Ditto.
17252 (CODE_FOR_lasx_xvsat_b): Ditto.
17253 (CODE_FOR_lasx_xvsat_h): Ditto.
17254 (CODE_FOR_lasx_xvsat_w): Ditto.
17255 (CODE_FOR_lasx_xvsat_d): Ditto.
17256 (CODE_FOR_lasx_xvsat_bu): Ditto.
17257 (CODE_FOR_lasx_xvsat_hu): Ditto.
17258 (CODE_FOR_lasx_xvsat_wu): Ditto.
17259 (CODE_FOR_lasx_xvsat_du): Ditto.
17260 (loongarch_builtin_vectorized_function): Ditto.
17261 (loongarch_expand_builtin_insn): Ditto.
17262 (loongarch_expand_builtin): Ditto.
17263 * config/loongarch/loongarch-ftypes.def (1): Ditto.
17267 * config/loongarch/lasxintrin.h: New file.
17269 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
17271 * config/loongarch/loongarch-modes.def
17272 (VECTOR_MODES): Add Loongson ASX instruction support.
17273 * config/loongarch/loongarch-protos.h (loongarch_split_256bit_move): Ditto.
17274 (loongarch_split_256bit_move_p): Ditto.
17275 (loongarch_expand_vector_group_init): Ditto.
17276 (loongarch_expand_vec_perm_1): Ditto.
17277 * config/loongarch/loongarch.cc (loongarch_symbol_insns): Ditto.
17278 (loongarch_valid_offset_p): Ditto.
17279 (loongarch_address_insns): Ditto.
17280 (loongarch_const_insns): Ditto.
17281 (loongarch_legitimize_move): Ditto.
17282 (loongarch_builtin_vectorization_cost): Ditto.
17283 (loongarch_split_move_p): Ditto.
17284 (loongarch_split_move): Ditto.
17285 (loongarch_output_move_index_float): Ditto.
17286 (loongarch_split_256bit_move_p): Ditto.
17287 (loongarch_split_256bit_move): Ditto.
17288 (loongarch_output_move): Ditto.
17289 (loongarch_print_operand_reloc): Ditto.
17290 (loongarch_print_operand): Ditto.
17291 (loongarch_hard_regno_mode_ok_uncached): Ditto.
17292 (loongarch_hard_regno_nregs): Ditto.
17293 (loongarch_class_max_nregs): Ditto.
17294 (loongarch_can_change_mode_class): Ditto.
17295 (loongarch_mode_ok_for_mov_fmt_p): Ditto.
17296 (loongarch_vector_mode_supported_p): Ditto.
17297 (loongarch_preferred_simd_mode): Ditto.
17298 (loongarch_autovectorize_vector_modes): Ditto.
17299 (loongarch_lsx_output_division): Ditto.
17300 (loongarch_expand_lsx_shuffle): Ditto.
17301 (loongarch_expand_vec_perm): Ditto.
17302 (loongarch_expand_vec_perm_interleave): Ditto.
17303 (loongarch_try_expand_lsx_vshuf_const): Ditto.
17304 (loongarch_expand_vec_perm_even_odd_1): Ditto.
17305 (loongarch_expand_vec_perm_even_odd): Ditto.
17306 (loongarch_expand_vec_perm_1): Ditto.
17307 (loongarch_expand_vec_perm_const_2): Ditto.
17308 (loongarch_is_quad_duplicate): Ditto.
17309 (loongarch_is_double_duplicate): Ditto.
17310 (loongarch_is_odd_extraction): Ditto.
17311 (loongarch_is_even_extraction): Ditto.
17312 (loongarch_is_extraction_permutation): Ditto.
17313 (loongarch_is_center_extraction): Ditto.
17314 (loongarch_is_reversing_permutation): Ditto.
17315 (loongarch_is_di_misalign_extract): Ditto.
17316 (loongarch_is_si_misalign_extract): Ditto.
17317 (loongarch_is_lasx_lowpart_interleave): Ditto.
17318 (loongarch_is_lasx_lowpart_interleave_2): Ditto.
17319 (COMPARE_SELECTOR): Ditto.
17320 (loongarch_is_lasx_lowpart_extract): Ditto.
17321 (loongarch_is_lasx_highpart_interleave): Ditto.
17322 (loongarch_is_lasx_highpart_interleave_2): Ditto.
17323 (loongarch_is_elem_duplicate): Ditto.
17324 (loongarch_is_op_reverse_perm): Ditto.
17325 (loongarch_is_single_op_perm): Ditto.
17326 (loongarch_is_divisible_perm): Ditto.
17327 (loongarch_is_triple_stride_extract): Ditto.
17328 (loongarch_vectorize_vec_perm_const): Ditto.
17329 (loongarch_cpu_sched_reassociation_width): Ditto.
17330 (loongarch_expand_vector_extract): Ditto.
17331 (emit_reduc_half): Ditto.
17332 (loongarch_expand_vec_unpack): Ditto.
17333 (loongarch_expand_vector_group_init): Ditto.
17334 (loongarch_expand_vector_init): Ditto.
17335 (loongarch_expand_lsx_cmp): Ditto.
17336 (loongarch_builtin_support_vector_misalignment): Ditto.
17337 * config/loongarch/loongarch.h (UNITS_PER_LASX_REG): Ditto.
17338 (BITS_PER_LASX_REG): Ditto.
17339 (STRUCTURE_SIZE_BOUNDARY): Ditto.
17340 (LASX_REG_FIRST): Ditto.
17341 (LASX_REG_LAST): Ditto.
17342 (LASX_REG_NUM): Ditto.
17343 (LASX_REG_P): Ditto.
17344 (LASX_REG_RTX_P): Ditto.
17345 (LASX_SUPPORTED_MODE_P): Ditto.
17346 * config/loongarch/loongarch.md: Ditto.
17347 * config/loongarch/lasx.md: New file.
17349 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
17351 * config.gcc: Export the header file lsxintrin.h.
17352 * config/loongarch/loongarch-builtins.cc (LARCH_FTYPE_NAME4): Add builtin function support.
17353 (enum loongarch_builtin_type): Ditto.
17354 (AVAIL_ALL): Ditto.
17355 (LARCH_BUILTIN): Ditto.
17356 (LSX_BUILTIN): Ditto.
17357 (LSX_BUILTIN_TEST_BRANCH): Ditto.
17358 (LSX_NO_TARGET_BUILTIN): Ditto.
17359 (CODE_FOR_lsx_vsadd_b): Ditto.
17360 (CODE_FOR_lsx_vsadd_h): Ditto.
17361 (CODE_FOR_lsx_vsadd_w): Ditto.
17362 (CODE_FOR_lsx_vsadd_d): Ditto.
17363 (CODE_FOR_lsx_vsadd_bu): Ditto.
17364 (CODE_FOR_lsx_vsadd_hu): Ditto.
17365 (CODE_FOR_lsx_vsadd_wu): Ditto.
17366 (CODE_FOR_lsx_vsadd_du): Ditto.
17367 (CODE_FOR_lsx_vadd_b): Ditto.
17368 (CODE_FOR_lsx_vadd_h): Ditto.
17369 (CODE_FOR_lsx_vadd_w): Ditto.
17370 (CODE_FOR_lsx_vadd_d): Ditto.
17371 (CODE_FOR_lsx_vaddi_bu): Ditto.
17372 (CODE_FOR_lsx_vaddi_hu): Ditto.
17373 (CODE_FOR_lsx_vaddi_wu): Ditto.
17374 (CODE_FOR_lsx_vaddi_du): Ditto.
17375 (CODE_FOR_lsx_vand_v): Ditto.
17376 (CODE_FOR_lsx_vandi_b): Ditto.
17377 (CODE_FOR_lsx_bnz_v): Ditto.
17378 (CODE_FOR_lsx_bz_v): Ditto.
17379 (CODE_FOR_lsx_vbitsel_v): Ditto.
17380 (CODE_FOR_lsx_vseqi_b): Ditto.
17381 (CODE_FOR_lsx_vseqi_h): Ditto.
17382 (CODE_FOR_lsx_vseqi_w): Ditto.
17383 (CODE_FOR_lsx_vseqi_d): Ditto.
17384 (CODE_FOR_lsx_vslti_b): Ditto.
17385 (CODE_FOR_lsx_vslti_h): Ditto.
17386 (CODE_FOR_lsx_vslti_w): Ditto.
17387 (CODE_FOR_lsx_vslti_d): Ditto.
17388 (CODE_FOR_lsx_vslti_bu): Ditto.
17389 (CODE_FOR_lsx_vslti_hu): Ditto.
17390 (CODE_FOR_lsx_vslti_wu): Ditto.
17391 (CODE_FOR_lsx_vslti_du): Ditto.
17392 (CODE_FOR_lsx_vslei_b): Ditto.
17393 (CODE_FOR_lsx_vslei_h): Ditto.
17394 (CODE_FOR_lsx_vslei_w): Ditto.
17395 (CODE_FOR_lsx_vslei_d): Ditto.
17396 (CODE_FOR_lsx_vslei_bu): Ditto.
17397 (CODE_FOR_lsx_vslei_hu): Ditto.
17398 (CODE_FOR_lsx_vslei_wu): Ditto.
17399 (CODE_FOR_lsx_vslei_du): Ditto.
17400 (CODE_FOR_lsx_vdiv_b): Ditto.
17401 (CODE_FOR_lsx_vdiv_h): Ditto.
17402 (CODE_FOR_lsx_vdiv_w): Ditto.
17403 (CODE_FOR_lsx_vdiv_d): Ditto.
17404 (CODE_FOR_lsx_vdiv_bu): Ditto.
17405 (CODE_FOR_lsx_vdiv_hu): Ditto.
17406 (CODE_FOR_lsx_vdiv_wu): Ditto.
17407 (CODE_FOR_lsx_vdiv_du): Ditto.
17408 (CODE_FOR_lsx_vfadd_s): Ditto.
17409 (CODE_FOR_lsx_vfadd_d): Ditto.
17410 (CODE_FOR_lsx_vftintrz_w_s): Ditto.
17411 (CODE_FOR_lsx_vftintrz_l_d): Ditto.
17412 (CODE_FOR_lsx_vftintrz_wu_s): Ditto.
17413 (CODE_FOR_lsx_vftintrz_lu_d): Ditto.
17414 (CODE_FOR_lsx_vffint_s_w): Ditto.
17415 (CODE_FOR_lsx_vffint_d_l): Ditto.
17416 (CODE_FOR_lsx_vffint_s_wu): Ditto.
17417 (CODE_FOR_lsx_vffint_d_lu): Ditto.
17418 (CODE_FOR_lsx_vfsub_s): Ditto.
17419 (CODE_FOR_lsx_vfsub_d): Ditto.
17420 (CODE_FOR_lsx_vfmul_s): Ditto.
17421 (CODE_FOR_lsx_vfmul_d): Ditto.
17422 (CODE_FOR_lsx_vfdiv_s): Ditto.
17423 (CODE_FOR_lsx_vfdiv_d): Ditto.
17424 (CODE_FOR_lsx_vfmax_s): Ditto.
17425 (CODE_FOR_lsx_vfmax_d): Ditto.
17426 (CODE_FOR_lsx_vfmin_s): Ditto.
17427 (CODE_FOR_lsx_vfmin_d): Ditto.
17428 (CODE_FOR_lsx_vfsqrt_s): Ditto.
17429 (CODE_FOR_lsx_vfsqrt_d): Ditto.
17430 (CODE_FOR_lsx_vflogb_s): Ditto.
17431 (CODE_FOR_lsx_vflogb_d): Ditto.
17432 (CODE_FOR_lsx_vmax_b): Ditto.
17433 (CODE_FOR_lsx_vmax_h): Ditto.
17434 (CODE_FOR_lsx_vmax_w): Ditto.
17435 (CODE_FOR_lsx_vmax_d): Ditto.
17436 (CODE_FOR_lsx_vmaxi_b): Ditto.
17437 (CODE_FOR_lsx_vmaxi_h): Ditto.
17438 (CODE_FOR_lsx_vmaxi_w): Ditto.
17439 (CODE_FOR_lsx_vmaxi_d): Ditto.
17440 (CODE_FOR_lsx_vmax_bu): Ditto.
17441 (CODE_FOR_lsx_vmax_hu): Ditto.
17442 (CODE_FOR_lsx_vmax_wu): Ditto.
17443 (CODE_FOR_lsx_vmax_du): Ditto.
17444 (CODE_FOR_lsx_vmaxi_bu): Ditto.
17445 (CODE_FOR_lsx_vmaxi_hu): Ditto.
17446 (CODE_FOR_lsx_vmaxi_wu): Ditto.
17447 (CODE_FOR_lsx_vmaxi_du): Ditto.
17448 (CODE_FOR_lsx_vmin_b): Ditto.
17449 (CODE_FOR_lsx_vmin_h): Ditto.
17450 (CODE_FOR_lsx_vmin_w): Ditto.
17451 (CODE_FOR_lsx_vmin_d): Ditto.
17452 (CODE_FOR_lsx_vmini_b): Ditto.
17453 (CODE_FOR_lsx_vmini_h): Ditto.
17454 (CODE_FOR_lsx_vmini_w): Ditto.
17455 (CODE_FOR_lsx_vmini_d): Ditto.
17456 (CODE_FOR_lsx_vmin_bu): Ditto.
17457 (CODE_FOR_lsx_vmin_hu): Ditto.
17458 (CODE_FOR_lsx_vmin_wu): Ditto.
17459 (CODE_FOR_lsx_vmin_du): Ditto.
17460 (CODE_FOR_lsx_vmini_bu): Ditto.
17461 (CODE_FOR_lsx_vmini_hu): Ditto.
17462 (CODE_FOR_lsx_vmini_wu): Ditto.
17463 (CODE_FOR_lsx_vmini_du): Ditto.
17464 (CODE_FOR_lsx_vmod_b): Ditto.
17465 (CODE_FOR_lsx_vmod_h): Ditto.
17466 (CODE_FOR_lsx_vmod_w): Ditto.
17467 (CODE_FOR_lsx_vmod_d): Ditto.
17468 (CODE_FOR_lsx_vmod_bu): Ditto.
17469 (CODE_FOR_lsx_vmod_hu): Ditto.
17470 (CODE_FOR_lsx_vmod_wu): Ditto.
17471 (CODE_FOR_lsx_vmod_du): Ditto.
17472 (CODE_FOR_lsx_vmul_b): Ditto.
17473 (CODE_FOR_lsx_vmul_h): Ditto.
17474 (CODE_FOR_lsx_vmul_w): Ditto.
17475 (CODE_FOR_lsx_vmul_d): Ditto.
17476 (CODE_FOR_lsx_vclz_b): Ditto.
17477 (CODE_FOR_lsx_vclz_h): Ditto.
17478 (CODE_FOR_lsx_vclz_w): Ditto.
17479 (CODE_FOR_lsx_vclz_d): Ditto.
17480 (CODE_FOR_lsx_vnor_v): Ditto.
17481 (CODE_FOR_lsx_vor_v): Ditto.
17482 (CODE_FOR_lsx_vori_b): Ditto.
17483 (CODE_FOR_lsx_vnori_b): Ditto.
17484 (CODE_FOR_lsx_vpcnt_b): Ditto.
17485 (CODE_FOR_lsx_vpcnt_h): Ditto.
17486 (CODE_FOR_lsx_vpcnt_w): Ditto.
17487 (CODE_FOR_lsx_vpcnt_d): Ditto.
17488 (CODE_FOR_lsx_vxor_v): Ditto.
17489 (CODE_FOR_lsx_vxori_b): Ditto.
17490 (CODE_FOR_lsx_vsll_b): Ditto.
17491 (CODE_FOR_lsx_vsll_h): Ditto.
17492 (CODE_FOR_lsx_vsll_w): Ditto.
17493 (CODE_FOR_lsx_vsll_d): Ditto.
17494 (CODE_FOR_lsx_vslli_b): Ditto.
17495 (CODE_FOR_lsx_vslli_h): Ditto.
17496 (CODE_FOR_lsx_vslli_w): Ditto.
17497 (CODE_FOR_lsx_vslli_d): Ditto.
17498 (CODE_FOR_lsx_vsra_b): Ditto.
17499 (CODE_FOR_lsx_vsra_h): Ditto.
17500 (CODE_FOR_lsx_vsra_w): Ditto.
17501 (CODE_FOR_lsx_vsra_d): Ditto.
17502 (CODE_FOR_lsx_vsrai_b): Ditto.
17503 (CODE_FOR_lsx_vsrai_h): Ditto.
17504 (CODE_FOR_lsx_vsrai_w): Ditto.
17505 (CODE_FOR_lsx_vsrai_d): Ditto.
17506 (CODE_FOR_lsx_vsrl_b): Ditto.
17507 (CODE_FOR_lsx_vsrl_h): Ditto.
17508 (CODE_FOR_lsx_vsrl_w): Ditto.
17509 (CODE_FOR_lsx_vsrl_d): Ditto.
17510 (CODE_FOR_lsx_vsrli_b): Ditto.
17511 (CODE_FOR_lsx_vsrli_h): Ditto.
17512 (CODE_FOR_lsx_vsrli_w): Ditto.
17513 (CODE_FOR_lsx_vsrli_d): Ditto.
17514 (CODE_FOR_lsx_vsub_b): Ditto.
17515 (CODE_FOR_lsx_vsub_h): Ditto.
17516 (CODE_FOR_lsx_vsub_w): Ditto.
17517 (CODE_FOR_lsx_vsub_d): Ditto.
17518 (CODE_FOR_lsx_vsubi_bu): Ditto.
17519 (CODE_FOR_lsx_vsubi_hu): Ditto.
17520 (CODE_FOR_lsx_vsubi_wu): Ditto.
17521 (CODE_FOR_lsx_vsubi_du): Ditto.
17522 (CODE_FOR_lsx_vpackod_d): Ditto.
17523 (CODE_FOR_lsx_vpackev_d): Ditto.
17524 (CODE_FOR_lsx_vpickod_d): Ditto.
17525 (CODE_FOR_lsx_vpickev_d): Ditto.
17526 (CODE_FOR_lsx_vrepli_b): Ditto.
17527 (CODE_FOR_lsx_vrepli_h): Ditto.
17528 (CODE_FOR_lsx_vrepli_w): Ditto.
17529 (CODE_FOR_lsx_vrepli_d): Ditto.
17530 (CODE_FOR_lsx_vsat_b): Ditto.
17531 (CODE_FOR_lsx_vsat_h): Ditto.
17532 (CODE_FOR_lsx_vsat_w): Ditto.
17533 (CODE_FOR_lsx_vsat_d): Ditto.
17534 (CODE_FOR_lsx_vsat_bu): Ditto.
17535 (CODE_FOR_lsx_vsat_hu): Ditto.
17536 (CODE_FOR_lsx_vsat_wu): Ditto.
17537 (CODE_FOR_lsx_vsat_du): Ditto.
17538 (CODE_FOR_lsx_vavg_b): Ditto.
17539 (CODE_FOR_lsx_vavg_h): Ditto.
17540 (CODE_FOR_lsx_vavg_w): Ditto.
17541 (CODE_FOR_lsx_vavg_d): Ditto.
17542 (CODE_FOR_lsx_vavg_bu): Ditto.
17543 (CODE_FOR_lsx_vavg_hu): Ditto.
17544 (CODE_FOR_lsx_vavg_wu): Ditto.
17545 (CODE_FOR_lsx_vavg_du): Ditto.
17546 (CODE_FOR_lsx_vavgr_b): Ditto.
17547 (CODE_FOR_lsx_vavgr_h): Ditto.
17548 (CODE_FOR_lsx_vavgr_w): Ditto.
17549 (CODE_FOR_lsx_vavgr_d): Ditto.
17550 (CODE_FOR_lsx_vavgr_bu): Ditto.
17551 (CODE_FOR_lsx_vavgr_hu): Ditto.
17552 (CODE_FOR_lsx_vavgr_wu): Ditto.
17553 (CODE_FOR_lsx_vavgr_du): Ditto.
17554 (CODE_FOR_lsx_vssub_b): Ditto.
17555 (CODE_FOR_lsx_vssub_h): Ditto.
17556 (CODE_FOR_lsx_vssub_w): Ditto.
17557 (CODE_FOR_lsx_vssub_d): Ditto.
17558 (CODE_FOR_lsx_vssub_bu): Ditto.
17559 (CODE_FOR_lsx_vssub_hu): Ditto.
17560 (CODE_FOR_lsx_vssub_wu): Ditto.
17561 (CODE_FOR_lsx_vssub_du): Ditto.
17562 (CODE_FOR_lsx_vabsd_b): Ditto.
17563 (CODE_FOR_lsx_vabsd_h): Ditto.
17564 (CODE_FOR_lsx_vabsd_w): Ditto.
17565 (CODE_FOR_lsx_vabsd_d): Ditto.
17566 (CODE_FOR_lsx_vabsd_bu): Ditto.
17567 (CODE_FOR_lsx_vabsd_hu): Ditto.
17568 (CODE_FOR_lsx_vabsd_wu): Ditto.
17569 (CODE_FOR_lsx_vabsd_du): Ditto.
17570 (CODE_FOR_lsx_vftint_w_s): Ditto.
17571 (CODE_FOR_lsx_vftint_l_d): Ditto.
17572 (CODE_FOR_lsx_vftint_wu_s): Ditto.
17573 (CODE_FOR_lsx_vftint_lu_d): Ditto.
17574 (CODE_FOR_lsx_vandn_v): Ditto.
17575 (CODE_FOR_lsx_vorn_v): Ditto.
17576 (CODE_FOR_lsx_vneg_b): Ditto.
17577 (CODE_FOR_lsx_vneg_h): Ditto.
17578 (CODE_FOR_lsx_vneg_w): Ditto.
17579 (CODE_FOR_lsx_vneg_d): Ditto.
17580 (CODE_FOR_lsx_vshuf4i_d): Ditto.
17581 (CODE_FOR_lsx_vbsrl_v): Ditto.
17582 (CODE_FOR_lsx_vbsll_v): Ditto.
17583 (CODE_FOR_lsx_vfmadd_s): Ditto.
17584 (CODE_FOR_lsx_vfmadd_d): Ditto.
17585 (CODE_FOR_lsx_vfmsub_s): Ditto.
17586 (CODE_FOR_lsx_vfmsub_d): Ditto.
17587 (CODE_FOR_lsx_vfnmadd_s): Ditto.
17588 (CODE_FOR_lsx_vfnmadd_d): Ditto.
17589 (CODE_FOR_lsx_vfnmsub_s): Ditto.
17590 (CODE_FOR_lsx_vfnmsub_d): Ditto.
17591 (CODE_FOR_lsx_vmuh_b): Ditto.
17592 (CODE_FOR_lsx_vmuh_h): Ditto.
17593 (CODE_FOR_lsx_vmuh_w): Ditto.
17594 (CODE_FOR_lsx_vmuh_d): Ditto.
17595 (CODE_FOR_lsx_vmuh_bu): Ditto.
17596 (CODE_FOR_lsx_vmuh_hu): Ditto.
17597 (CODE_FOR_lsx_vmuh_wu): Ditto.
17598 (CODE_FOR_lsx_vmuh_du): Ditto.
17599 (CODE_FOR_lsx_vsllwil_h_b): Ditto.
17600 (CODE_FOR_lsx_vsllwil_w_h): Ditto.
17601 (CODE_FOR_lsx_vsllwil_d_w): Ditto.
17602 (CODE_FOR_lsx_vsllwil_hu_bu): Ditto.
17603 (CODE_FOR_lsx_vsllwil_wu_hu): Ditto.
17604 (CODE_FOR_lsx_vsllwil_du_wu): Ditto.
17605 (CODE_FOR_lsx_vssran_b_h): Ditto.
17606 (CODE_FOR_lsx_vssran_h_w): Ditto.
17607 (CODE_FOR_lsx_vssran_w_d): Ditto.
17608 (CODE_FOR_lsx_vssran_bu_h): Ditto.
17609 (CODE_FOR_lsx_vssran_hu_w): Ditto.
17610 (CODE_FOR_lsx_vssran_wu_d): Ditto.
17611 (CODE_FOR_lsx_vssrarn_b_h): Ditto.
17612 (CODE_FOR_lsx_vssrarn_h_w): Ditto.
17613 (CODE_FOR_lsx_vssrarn_w_d): Ditto.
17614 (CODE_FOR_lsx_vssrarn_bu_h): Ditto.
17615 (CODE_FOR_lsx_vssrarn_hu_w): Ditto.
17616 (CODE_FOR_lsx_vssrarn_wu_d): Ditto.
17617 (CODE_FOR_lsx_vssrln_bu_h): Ditto.
17618 (CODE_FOR_lsx_vssrln_hu_w): Ditto.
17619 (CODE_FOR_lsx_vssrln_wu_d): Ditto.
17620 (CODE_FOR_lsx_vssrlrn_bu_h): Ditto.
17621 (CODE_FOR_lsx_vssrlrn_hu_w): Ditto.
17622 (CODE_FOR_lsx_vssrlrn_wu_d): Ditto.
17623 (loongarch_builtin_vector_type): Ditto.
17624 (loongarch_build_cvpointer_type): Ditto.
17625 (LARCH_ATYPE_CVPOINTER): Ditto.
17626 (LARCH_ATYPE_BOOLEAN): Ditto.
17627 (LARCH_ATYPE_V2SF): Ditto.
17628 (LARCH_ATYPE_V2HI): Ditto.
17629 (LARCH_ATYPE_V2SI): Ditto.
17630 (LARCH_ATYPE_V4QI): Ditto.
17631 (LARCH_ATYPE_V4HI): Ditto.
17632 (LARCH_ATYPE_V8QI): Ditto.
17633 (LARCH_ATYPE_V2DI): Ditto.
17634 (LARCH_ATYPE_V4SI): Ditto.
17635 (LARCH_ATYPE_V8HI): Ditto.
17636 (LARCH_ATYPE_V16QI): Ditto.
17637 (LARCH_ATYPE_V2DF): Ditto.
17638 (LARCH_ATYPE_V4SF): Ditto.
17639 (LARCH_ATYPE_V4DI): Ditto.
17640 (LARCH_ATYPE_V8SI): Ditto.
17641 (LARCH_ATYPE_V16HI): Ditto.
17642 (LARCH_ATYPE_V32QI): Ditto.
17643 (LARCH_ATYPE_V4DF): Ditto.
17644 (LARCH_ATYPE_V8SF): Ditto.
17645 (LARCH_ATYPE_UV2DI): Ditto.
17646 (LARCH_ATYPE_UV4SI): Ditto.
17647 (LARCH_ATYPE_UV8HI): Ditto.
17648 (LARCH_ATYPE_UV16QI): Ditto.
17649 (LARCH_ATYPE_UV4DI): Ditto.
17650 (LARCH_ATYPE_UV8SI): Ditto.
17651 (LARCH_ATYPE_UV16HI): Ditto.
17652 (LARCH_ATYPE_UV32QI): Ditto.
17653 (LARCH_ATYPE_UV2SI): Ditto.
17654 (LARCH_ATYPE_UV4HI): Ditto.
17655 (LARCH_ATYPE_UV8QI): Ditto.
17656 (loongarch_builtin_vectorized_function): Ditto.
17657 (LARCH_GET_BUILTIN): Ditto.
17658 (loongarch_expand_builtin_insn): Ditto.
17659 (loongarch_expand_builtin_lsx_test_branch): Ditto.
17660 (loongarch_expand_builtin): Ditto.
17661 * config/loongarch/loongarch-ftypes.def (1): Ditto.
17665 * config/loongarch/lsxintrin.h: New file.
17667 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
17669 * config/loongarch/constraints.md (M): Add Loongson LSX base instruction support.
17689 * config/loongarch/genopts/loongarch.opt.in: Ditto.
17690 * config/loongarch/loongarch-builtins.cc (loongarch_gen_const_int_vector): Ditto.
17691 * config/loongarch/loongarch-modes.def (VECTOR_MODES): Ditto.
17692 (VECTOR_MODE): Ditto.
17694 * config/loongarch/loongarch-protos.h (loongarch_split_move_insn_p): Ditto.
17695 (loongarch_split_move_insn): Ditto.
17696 (loongarch_split_128bit_move): Ditto.
17697 (loongarch_split_128bit_move_p): Ditto.
17698 (loongarch_split_lsx_copy_d): Ditto.
17699 (loongarch_split_lsx_insert_d): Ditto.
17700 (loongarch_split_lsx_fill_d): Ditto.
17701 (loongarch_expand_vec_cmp): Ditto.
17702 (loongarch_const_vector_same_val_p): Ditto.
17703 (loongarch_const_vector_same_bytes_p): Ditto.
17704 (loongarch_const_vector_same_int_p): Ditto.
17705 (loongarch_const_vector_shuffle_set_p): Ditto.
17706 (loongarch_const_vector_bitimm_set_p): Ditto.
17707 (loongarch_const_vector_bitimm_clr_p): Ditto.
17708 (loongarch_lsx_vec_parallel_const_half): Ditto.
17709 (loongarch_gen_const_int_vector): Ditto.
17710 (loongarch_lsx_output_division): Ditto.
17711 (loongarch_expand_vector_init): Ditto.
17712 (loongarch_expand_vec_unpack): Ditto.
17713 (loongarch_expand_vec_perm): Ditto.
17714 (loongarch_expand_vector_extract): Ditto.
17715 (loongarch_expand_vector_reduc): Ditto.
17716 (loongarch_ldst_scaled_shift): Ditto.
17717 (loongarch_expand_vec_cond_expr): Ditto.
17718 (loongarch_expand_vec_cond_mask_expr): Ditto.
17719 (loongarch_builtin_vectorized_function): Ditto.
17720 (loongarch_gen_const_int_vector_shuffle): Ditto.
17721 (loongarch_build_signbit_mask): Ditto.
17722 * config/loongarch/loongarch.cc (loongarch_pass_aggregate_num_fpr): Ditto.
17723 (loongarch_setup_incoming_varargs): Ditto.
17724 (loongarch_emit_move): Ditto.
17725 (loongarch_const_vector_bitimm_set_p): Ditto.
17726 (loongarch_const_vector_bitimm_clr_p): Ditto.
17727 (loongarch_const_vector_same_val_p): Ditto.
17728 (loongarch_const_vector_same_bytes_p): Ditto.
17729 (loongarch_const_vector_same_int_p): Ditto.
17730 (loongarch_const_vector_shuffle_set_p): Ditto.
17731 (loongarch_symbol_insns): Ditto.
17732 (loongarch_cannot_force_const_mem): Ditto.
17733 (loongarch_valid_offset_p): Ditto.
17734 (loongarch_valid_index_p): Ditto.
17735 (loongarch_classify_address): Ditto.
17736 (loongarch_address_insns): Ditto.
17737 (loongarch_ldst_scaled_shift): Ditto.
17738 (loongarch_const_insns): Ditto.
17739 (loongarch_split_move_insn_p): Ditto.
17740 (loongarch_subword_at_byte): Ditto.
17741 (loongarch_legitimize_move): Ditto.
17742 (loongarch_builtin_vectorization_cost): Ditto.
17743 (loongarch_split_move_p): Ditto.
17744 (loongarch_split_move): Ditto.
17745 (loongarch_split_move_insn): Ditto.
17746 (loongarch_output_move_index_float): Ditto.
17747 (loongarch_split_128bit_move_p): Ditto.
17748 (loongarch_split_128bit_move): Ditto.
17749 (loongarch_split_lsx_copy_d): Ditto.
17750 (loongarch_split_lsx_insert_d): Ditto.
17751 (loongarch_split_lsx_fill_d): Ditto.
17752 (loongarch_output_move): Ditto.
17753 (loongarch_extend_comparands): Ditto.
17754 (loongarch_print_operand_reloc): Ditto.
17755 (loongarch_print_operand): Ditto.
17756 (loongarch_hard_regno_mode_ok_uncached): Ditto.
17757 (loongarch_hard_regno_call_part_clobbered): Ditto.
17758 (loongarch_hard_regno_nregs): Ditto.
17759 (loongarch_class_max_nregs): Ditto.
17760 (loongarch_can_change_mode_class): Ditto.
17761 (loongarch_mode_ok_for_mov_fmt_p): Ditto.
17762 (loongarch_secondary_reload): Ditto.
17763 (loongarch_vector_mode_supported_p): Ditto.
17764 (loongarch_preferred_simd_mode): Ditto.
17765 (loongarch_autovectorize_vector_modes): Ditto.
17766 (loongarch_lsx_output_division): Ditto.
17767 (loongarch_option_override_internal): Ditto.
17768 (loongarch_hard_regno_caller_save_mode): Ditto.
17769 (MAX_VECT_LEN): Ditto.
17770 (loongarch_spill_class): Ditto.
17771 (struct expand_vec_perm_d): Ditto.
17772 (loongarch_promote_function_mode): Ditto.
17773 (loongarch_expand_vselect): Ditto.
17774 (loongarch_starting_frame_offset): Ditto.
17775 (loongarch_expand_vselect_vconcat): Ditto.
17776 (TARGET_ASM_ALIGNED_DI_OP): Ditto.
17777 (TARGET_OPTION_OVERRIDE): Ditto.
17778 (TARGET_LEGITIMIZE_ADDRESS): Ditto.
17779 (TARGET_ASM_SELECT_RTX_SECTION): Ditto.
17780 (TARGET_ASM_FUNCTION_RODATA_SECTION): Ditto.
17781 (loongarch_expand_lsx_shuffle): Ditto.
17782 (TARGET_SCHED_INIT): Ditto.
17783 (TARGET_SCHED_REORDER): Ditto.
17784 (TARGET_SCHED_REORDER2): Ditto.
17785 (TARGET_SCHED_VARIABLE_ISSUE): Ditto.
17786 (TARGET_SCHED_ADJUST_COST): Ditto.
17787 (TARGET_SCHED_ISSUE_RATE): Ditto.
17788 (TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD): Ditto.
17789 (TARGET_FUNCTION_OK_FOR_SIBCALL): Ditto.
17790 (TARGET_VALID_POINTER_MODE): Ditto.
17791 (TARGET_REGISTER_MOVE_COST): Ditto.
17792 (TARGET_MEMORY_MOVE_COST): Ditto.
17793 (TARGET_RTX_COSTS): Ditto.
17794 (TARGET_ADDRESS_COST): Ditto.
17795 (TARGET_IN_SMALL_DATA_P): Ditto.
17796 (TARGET_PREFERRED_RELOAD_CLASS): Ditto.
17797 (TARGET_ASM_FILE_START_FILE_DIRECTIVE): Ditto.
17798 (TARGET_EXPAND_BUILTIN_VA_START): Ditto.
17799 (loongarch_expand_vec_perm): Ditto.
17800 (TARGET_PROMOTE_FUNCTION_MODE): Ditto.
17801 (TARGET_RETURN_IN_MEMORY): Ditto.
17802 (TARGET_FUNCTION_VALUE): Ditto.
17803 (TARGET_LIBCALL_VALUE): Ditto.
17804 (loongarch_try_expand_lsx_vshuf_const): Ditto.
17805 (TARGET_ASM_OUTPUT_MI_THUNK): Ditto.
17806 (TARGET_ASM_CAN_OUTPUT_MI_THUNK): Ditto.
17807 (TARGET_PRINT_OPERAND): Ditto.
17808 (TARGET_PRINT_OPERAND_ADDRESS): Ditto.
17809 (TARGET_PRINT_OPERAND_PUNCT_VALID_P): Ditto.
17810 (TARGET_SETUP_INCOMING_VARARGS): Ditto.
17811 (TARGET_STRICT_ARGUMENT_NAMING): Ditto.
17812 (TARGET_MUST_PASS_IN_STACK): Ditto.
17813 (TARGET_PASS_BY_REFERENCE): Ditto.
17814 (TARGET_ARG_PARTIAL_BYTES): Ditto.
17815 (TARGET_FUNCTION_ARG): Ditto.
17816 (TARGET_FUNCTION_ARG_ADVANCE): Ditto.
17817 (TARGET_FUNCTION_ARG_BOUNDARY): Ditto.
17818 (TARGET_SCALAR_MODE_SUPPORTED_P): Ditto.
17819 (TARGET_INIT_BUILTINS): Ditto.
17820 (loongarch_expand_vec_perm_const_1): Ditto.
17821 (loongarch_expand_vec_perm_const_2): Ditto.
17822 (loongarch_vectorize_vec_perm_const): Ditto.
17823 (loongarch_cpu_sched_reassociation_width): Ditto.
17824 (loongarch_sched_reassociation_width): Ditto.
17825 (loongarch_expand_vector_extract): Ditto.
17826 (emit_reduc_half): Ditto.
17827 (loongarch_expand_vector_reduc): Ditto.
17828 (loongarch_expand_vec_unpack): Ditto.
17829 (loongarch_lsx_vec_parallel_const_half): Ditto.
17830 (loongarch_constant_elt_p): Ditto.
17831 (loongarch_gen_const_int_vector_shuffle): Ditto.
17832 (loongarch_expand_vector_init): Ditto.
17833 (loongarch_expand_lsx_cmp): Ditto.
17834 (loongarch_expand_vec_cond_expr): Ditto.
17835 (loongarch_expand_vec_cond_mask_expr): Ditto.
17836 (loongarch_expand_vec_cmp): Ditto.
17837 (loongarch_case_values_threshold): Ditto.
17838 (loongarch_build_const_vector): Ditto.
17839 (loongarch_build_signbit_mask): Ditto.
17840 (loongarch_builtin_support_vector_misalignment): Ditto.
17841 (TARGET_ASM_ALIGNED_HI_OP): Ditto.
17842 (TARGET_ASM_ALIGNED_SI_OP): Ditto.
17843 (TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST): Ditto.
17844 (TARGET_VECTOR_MODE_SUPPORTED_P): Ditto.
17845 (TARGET_VECTORIZE_PREFERRED_SIMD_MODE): Ditto.
17846 (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Ditto.
17847 (TARGET_VECTORIZE_VEC_PERM_CONST): Ditto.
17848 (TARGET_SCHED_REASSOCIATION_WIDTH): Ditto.
17849 (TARGET_CASE_VALUES_THRESHOLD): Ditto.
17850 (TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Ditto.
17851 (TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT): Ditto.
17852 * config/loongarch/loongarch.h (TARGET_SUPPORTS_WIDE_INT): Ditto.
17853 (UNITS_PER_LSX_REG): Ditto.
17854 (BITS_PER_LSX_REG): Ditto.
17855 (BIGGEST_ALIGNMENT): Ditto.
17856 (LSX_REG_FIRST): Ditto.
17857 (LSX_REG_LAST): Ditto.
17858 (LSX_REG_NUM): Ditto.
17859 (LSX_REG_P): Ditto.
17860 (LSX_REG_RTX_P): Ditto.
17861 (IMM13_OPERAND): Ditto.
17862 (LSX_SUPPORTED_MODE_P): Ditto.
17863 * config/loongarch/loongarch.md (unknown,add,sub,not,nor,and,or,xor): Ditto.
17864 (unknown,add,sub,not,nor,and,or,xor,simd_add): Ditto.
17865 (unknown,none,QI,HI,SI,DI,TI,SF,DF,TF,FCC): Ditto.
17872 * config/loongarch/loongarch.opt: Ditto.
17873 * config/loongarch/predicates.md (const_lsx_branch_operand): Ditto.
17874 (const_uimm3_operand): Ditto.
17875 (const_8_to_11_operand): Ditto.
17876 (const_12_to_15_operand): Ditto.
17877 (const_uimm4_operand): Ditto.
17878 (const_uimm6_operand): Ditto.
17879 (const_uimm7_operand): Ditto.
17880 (const_uimm8_operand): Ditto.
17881 (const_imm5_operand): Ditto.
17882 (const_imm10_operand): Ditto.
17883 (const_imm13_operand): Ditto.
17884 (reg_imm10_operand): Ditto.
17885 (aq8b_operand): Ditto.
17886 (aq8h_operand): Ditto.
17887 (aq8w_operand): Ditto.
17888 (aq8d_operand): Ditto.
17889 (aq10b_operand): Ditto.
17890 (aq10h_operand): Ditto.
17891 (aq10w_operand): Ditto.
17892 (aq10d_operand): Ditto.
17893 (aq12b_operand): Ditto.
17894 (aq12h_operand): Ditto.
17895 (aq12w_operand): Ditto.
17896 (aq12d_operand): Ditto.
17897 (const_m1_operand): Ditto.
17898 (reg_or_m1_operand): Ditto.
17899 (const_exp_2_operand): Ditto.
17900 (const_exp_4_operand): Ditto.
17901 (const_exp_8_operand): Ditto.
17902 (const_exp_16_operand): Ditto.
17903 (const_exp_32_operand): Ditto.
17904 (const_0_or_1_operand): Ditto.
17905 (const_0_to_3_operand): Ditto.
17906 (const_0_to_7_operand): Ditto.
17907 (const_2_or_3_operand): Ditto.
17908 (const_4_to_7_operand): Ditto.
17909 (const_8_to_15_operand): Ditto.
17910 (const_16_to_31_operand): Ditto.
17911 (qi_mask_operand): Ditto.
17912 (hi_mask_operand): Ditto.
17913 (si_mask_operand): Ditto.
17914 (d_operand): Ditto.
17915 (db4_operand): Ditto.
17916 (db7_operand): Ditto.
17917 (db8_operand): Ditto.
17918 (ib3_operand): Ditto.
17919 (sb4_operand): Ditto.
17920 (sb5_operand): Ditto.
17921 (sb8_operand): Ditto.
17922 (sd8_operand): Ditto.
17923 (ub4_operand): Ditto.
17924 (ub8_operand): Ditto.
17925 (uh4_operand): Ditto.
17926 (uw4_operand): Ditto.
17927 (uw5_operand): Ditto.
17928 (uw6_operand): Ditto.
17929 (uw8_operand): Ditto.
17930 (addiur2_operand): Ditto.
17931 (addiusp_operand): Ditto.
17932 (andi16_operand): Ditto.
17933 (movep_src_register): Ditto.
17934 (movep_src_operand): Ditto.
17935 (fcc_reload_operand): Ditto.
17936 (muldiv_target_operand): Ditto.
17937 (const_vector_same_val_operand): Ditto.
17938 (const_vector_same_simm5_operand): Ditto.
17939 (const_vector_same_uimm5_operand): Ditto.
17940 (const_vector_same_ximm5_operand): Ditto.
17941 (const_vector_same_uimm6_operand): Ditto.
17942 (par_const_vector_shf_set_operand): Ditto.
17943 (reg_or_vector_same_val_operand): Ditto.
17944 (reg_or_vector_same_simm5_operand): Ditto.
17945 (reg_or_vector_same_uimm5_operand): Ditto.
17946 (reg_or_vector_same_ximm5_operand): Ditto.
17947 (reg_or_vector_same_uimm6_operand): Ditto.
17948 * doc/md.texi: Ditto.
17949 * config/loongarch/lsx.md: New file.
17951 2023-09-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17953 * config/riscv/riscv-protos.h (lookup_vector_type_attribute): Export global.
17954 (get_all_predecessors): New function.
17955 (get_all_successors): Ditto.
17956 * config/riscv/riscv-v.cc (get_all_predecessors): Ditto.
17957 (get_all_successors): Ditto.
17958 * config/riscv/riscv-vector-builtins.cc (sizeless_type_p): Export global.
17959 * config/riscv/riscv-vsetvl.cc (get_all_predecessors): Remove it.
17961 2023-09-05 Claudiu Zissulescu <claziss@gmail.com>
17963 * config/arc/arc-protos.h (arc_output_addsi): Remove declaration.
17964 (split_addsi): Likewise.
17965 * config/arc/arc.cc (arc_print_operand): Add/repurpose 's', 'S',
17966 'N', 'x', and 'J' code letters.
17967 (arc_output_addsi): Make it static.
17968 (split_addsi): Remove it.
17969 * config/arc/arc.h (UNSIGNED_INT*): New defines.
17970 (SINNED_INT*): Likewise.
17971 * config/arc/arc.md (type): Add add, sub, bxor types.
17972 (tst_movb): Change code letter from 's' to 'x'.
17973 (andsi3_i): Likewise.
17974 (addsi3_mixed): Refurbish the pattern.
17975 (call_i): Change code letter from 'S' to 'J'.
17976 * config/arc/arc700.md: Add newly introduced types.
17977 * config/arc/arcHS.md: Likewsie.
17978 * config/arc/arcHS4x.md: Likewise.
17979 * config/arc/constraints.md (Cca, CL2, Csp, C2a): Remove it.
17980 (CM4): Update description.
17981 (CP4, C6u, C6n, CIs, C4p): New constraint.
17983 2023-09-05 Claudiu Zissulescu <claziss@gmail.com>
17985 * common/config/arc/arc-common.cc (arc_option_optimization_table):
17986 Remove mbbit_peephole.
17987 * config/arc/arc.md (UNSPEC_ARC_DIRECT): Remove.
17988 (store_direct): Likewise.
17989 (BBIT peephole2): Likewise.
17990 * config/arc/arc.opt (mbbit-peephole): Ignore option.
17991 * doc/invoke.texi (mbbit-peephole): Update document.
17993 2023-09-05 Jakub Jelinek <jakub@redhat.com>
17995 * tree-ssa-tail-merge.cc (replace_block_by): Fix a comment typo:
17996 avreage -> average.
17998 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
18000 * config/loongarch/loongarch.h (CC1_SPEC): Mark normalized
18001 options passed from driver to gnat1 as explicit for multilib.
18003 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
18005 * config.gcc: add loongarch*-elf target.
18006 * config/loongarch/elf.h: New file.
18007 Link against newlib by default.
18009 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
18011 * config.gcc: use -mstrict-align for building libraries
18012 if --with-strict-align-lib is given.
18013 * doc/install.texi: likewise.
18015 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
18017 * config/loongarch/loongarch-c.cc: Export macros
18018 "__loongarch_{arch,tune}" in the preprocessor.
18020 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
18022 * config.gcc: Make --with-abi= obsolete, decide the default ABI
18023 with target triplet. Allow specifying multilib library build
18024 options with --with-multilib-list and --with-multilib-default.
18025 * config/loongarch/t-linux: Likewise.
18026 * config/loongarch/genopts/loongarch-strings: Likewise.
18027 * config/loongarch/loongarch-str.h: Likewise.
18028 * doc/install.texi: Likewise.
18029 * config/loongarch/genopts/loongarch.opt.in: Introduce
18030 -m[no-]l[a]sx options. Only process -m*-float and
18031 -m[no-]l[a]sx in the GCC driver.
18032 * config/loongarch/loongarch.opt: Likewise.
18033 * config/loongarch/la464.md: Likewise.
18034 * config/loongarch/loongarch-c.cc: Likewise.
18035 * config/loongarch/loongarch-cpu.cc: Likewise.
18036 * config/loongarch/loongarch-cpu.h: Likewise.
18037 * config/loongarch/loongarch-def.c: Likewise.
18038 * config/loongarch/loongarch-def.h: Likewise.
18039 * config/loongarch/loongarch-driver.cc: Likewise.
18040 * config/loongarch/loongarch-driver.h: Likewise.
18041 * config/loongarch/loongarch-opts.cc: Likewise.
18042 * config/loongarch/loongarch-opts.h: Likewise.
18043 * config/loongarch/loongarch.cc: Likewise.
18044 * doc/invoke.texi: Likewise.
18046 2023-09-05 liuhongt <hongtao.liu@intel.com>
18048 * config/i386/sse.md: (V8BFH_128): Renamed to ..
18049 (VHFBF_128): .. this.
18050 (V16BFH_256): Renamed to ..
18051 (VHFBF_256): .. this.
18052 (avx512f_mov<mode>): Extend to V_128.
18053 (vcvtnee<bf16_ph>2ps_<mode>): Changed to VHFBF_128.
18054 (vcvtneo<bf16_ph>2ps_<mode>): Ditto.
18055 (vcvtnee<bf16_ph>2ps_<mode>): Changed to VHFBF_256.
18056 (vcvtneo<bf16_ph>2ps_<mode>): Ditto.
18057 * config/i386/i386-expand.cc (expand_vec_perm_blend):
18058 Canonicalize vec_merge.
18060 2023-09-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18062 * config/riscv/riscv-opts.h (enum riscv_autovec_lmul_enum): Fix Dynamic status.
18063 * config/riscv/riscv-v.cc (preferred_simd_mode): Ditto.
18064 (autovectorize_vector_modes): Ditto.
18065 (vectorize_related_mode): Ditto.
18067 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
18069 * config/rs6000/darwin.h (LIB_SPEC): Include libSystemStubs for
18070 all 32b Darwin PowerPC cases.
18072 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
18074 * config/darwin-sections.def (static_init_section): Add the
18075 __TEXT,__StaticInit section.
18076 * config/darwin.cc (darwin_function_section): Use the static init
18077 section for global initializers, to match other platform toolchains.
18079 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
18081 * config/darwin-sections.def (darwin_exception_section): Move to
18082 the __TEXT segment.
18083 * config/darwin.cc (darwin_emit_except_table_label): Align before
18084 the exception table label.
18085 * config/darwin.h (ASM_PREFERRED_EH_DATA_FORMAT): Use indirect PC-
18086 relative 4byte relocs.
18088 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
18090 * config/darwin.cc (dump_machopic_symref_flags): New.
18091 (debug_machopic_symref_flags): New.
18093 2023-09-04 Pan Li <pan2.li@intel.com>
18095 * config/riscv/riscv-vector-builtins-types.def
18096 (vfloat16mf4_t): Add FP16 intrinsic def.
18097 (vfloat16mf2_t): Ditto.
18098 (vfloat16m1_t): Ditto.
18099 (vfloat16m2_t): Ditto.
18100 (vfloat16m4_t): Ditto.
18101 (vfloat16m8_t): Ditto.
18103 2023-09-04 Jiufu Guo <guojiufu@linux.ibm.com>
18105 PR tree-optimization/108757
18106 * match.pd ((X - N * M) / N): New pattern.
18107 ((X + N * M) / N): New pattern.
18108 ((X + C) div_rshift N): New pattern.
18110 2023-09-04 Guo Jie <guojie@loongson.cn>
18112 * config/loongarch/loongarch.md: Support 'G' -> 'k' in
18113 movsf_hardfloat and movdf_hardfloat.
18115 2023-09-04 Lulu Cheng <chenglulu@loongson.cn>
18117 * config/loongarch/loongarch.cc (loongarch_extend_comparands):
18118 In unsigned QImode test, check for sign extended subreg and/or
18119 constant operands, and do a sign extension in that case.
18120 * config/loongarch/loongarch.md (TARGET_64BIT): Define
18121 template cbranchqi4.
18123 2023-09-04 Lulu Cheng <chenglulu@loongson.cn>
18125 * config/loongarch/loongarch.md: Allows fixed-point values to be loaded
18126 from memory into floating-point registers.
18128 2023-09-03 Pan Li <pan2.li@intel.com>
18130 * config/riscv/autovec-vls.md (<optab><mode>3): New pattern for
18132 * config/riscv/vector.md: Add VLS modes to vfmax/vfmin.
18134 2023-09-02 Mikael Morin <mikael@gcc.gnu.org>
18136 * tree-diagnostic.cc (tree_diagnostics_defaults): Delete allocated
18137 pointer before overwriting it.
18139 2023-09-02 chenxiaolong <chenxiaolong@loongson.cn>
18141 * config/loongarch/loongarch-builtins.cc (loongarch_init_builtins):
18142 Associate the __float128 type to float128_type_node so that it can
18143 be recognized by the compiler.
18144 * config/loongarch/loongarch-c.cc (loongarch_cpu_cpp_builtins):
18145 Add the flag "FLOAT128_TYPE" to gcc and associate a function
18146 with the suffix "q" to "f128".
18147 * doc/extend.texi:Added support for 128-bit floating-point functions on
18148 the LoongArch architecture.
18150 2023-09-01 Jakub Jelinek <jakub@redhat.com>
18153 * common.opt (fabi-version=): Document version 19.
18154 * doc/invoke.texi (-fabi-version=): Likewise.
18156 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
18158 * config/riscv/autovec-opt.md (*cond_<optab><mode><vconvert>):
18159 New combine pattern.
18160 (*cond_<float_cvt><vconvert><mode>): Ditto.
18161 (*cond_<optab><vnconvert><mode>): Ditto.
18162 (*cond_<float_cvt><vnconvert><mode>): Ditto.
18163 (*cond_<optab><mode><vnconvert>): Ditto.
18164 (*cond_<float_cvt><mode><vnconvert>2): Ditto.
18165 * config/riscv/autovec.md (<optab><mode><vconvert>2): Adjust.
18166 (<float_cvt><vconvert><mode>2): Adjust.
18167 (<optab><vnconvert><mode>2): Adjust.
18168 (<float_cvt><vnconvert><mode>2): Adjust.
18169 (<optab><mode><vnconvert>2): Adjust.
18170 (<float_cvt><mode><vnconvert>2): Adjust.
18171 * config/riscv/riscv-v.cc (needs_fp_rounding): Add INT->FP extend.
18173 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
18175 * config/riscv/autovec-opt.md (*cond_extend<v_double_trunc><mode>):
18176 New combine pattern.
18177 (*cond_trunc<mode><v_double_trunc>): Ditto.
18178 * config/riscv/autovec.md: Adjust.
18179 * config/riscv/riscv-v.cc (needs_fp_rounding): Add FP extend.
18181 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
18183 * config/riscv/autovec-opt.md (*cond_<optab><v_double_trunc><mode>):
18184 New combine pattern.
18185 (*cond_<optab><v_quad_trunc><mode>): Ditto.
18186 (*cond_<optab><v_oct_trunc><mode>): Ditto.
18187 (*cond_trunc<mode><v_double_trunc>): Ditto.
18188 * config/riscv/autovec.md (<optab><v_quad_trunc><mode>2): Adjust.
18189 (<optab><v_oct_trunc><mode>2): Ditto.
18191 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
18193 * config/riscv/autovec.md: Adjust.
18194 * config/riscv/riscv-protos.h (expand_cond_len_unop): Ditto.
18195 (expand_cond_len_binop): Ditto.
18196 * config/riscv/riscv-v.cc (needs_fp_rounding): Ditto.
18197 (expand_cond_len_op): Ditto.
18198 (expand_cond_len_unop): Ditto.
18199 (expand_cond_len_binop): Ditto.
18200 (expand_cond_len_ternop): Ditto.
18202 2023-09-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18204 * config/riscv/riscv-v.cc (autovectorize_vector_modes): Enable
18205 VECT_COMPARE_COSTS by default.
18207 2023-09-01 Robin Dapp <rdapp@ventanamicro.com>
18209 * config/riscv/autovec.md (vec_extract<mode>qi): New expander.
18211 2023-09-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18213 * config/riscv/riscv-opts.h (enum riscv_autovec_lmul_enum): Add
18215 * config/riscv/riscv.opt: Add dynamic compile option.
18217 2023-09-01 Pan Li <pan2.li@intel.com>
18219 * config/riscv/autovec-vls.md (<optab><mode>3): New pattern for
18220 vls floating-point autovec.
18221 * config/riscv/vector-iterators.md: New iterator for
18222 floating-point V and VLS.
18223 * config/riscv/vector.md: Add VLS to floating-point binop.
18225 2023-09-01 Andrew Pinski <apinski@marvell.com>
18227 PR tree-optimization/19832
18228 * match.pd: Add pattern to optimize
18229 `(a != b) ? a OP b : c`.
18231 2023-09-01 Lulu Cheng <chenglulu@loongson.cn>
18232 Guo Jie <guojie@loongson.cn>
18235 * config/loongarch/loongarch.cc (loongarch_emit_stack_tie): Use the
18236 frame_pointer_needed to determine whether to use the $fp register.
18238 2023-08-31 Andrew Pinski <apinski@marvell.com>
18240 PR tree-optimization/110915
18241 * match.pd (min_value, max_value): Extend to vector constants.
18243 2023-08-31 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
18245 * config.in: Regenerate.
18246 * config/darwin-c.cc: Change spelling to macOS.
18247 * config/darwin-driver.cc: Likewise.
18248 * config/darwin.h: Likewise.
18249 * configure.ac: Likewise.
18250 * doc/contrib.texi: Likewise.
18251 * doc/extend.texi: Likewise.
18252 * doc/invoke.texi: Likewise.
18253 * doc/plugins.texi: Likewise.
18254 * doc/tm.texi: Regenerate.
18255 * doc/tm.texi.in: Change spelling to macOS.
18256 * plugin.cc: Likewise.
18258 2023-08-31 Pan Li <pan2.li@intel.com>
18260 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfnmadd/vfnmacc.
18261 * config/riscv/autovec.md: Ditto.
18263 2023-08-31 Pan Li <pan2.li@intel.com>
18265 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfnmsac/vfnmsub
18266 * config/riscv/autovec.md: Ditto.
18268 2023-08-31 Richard Sandiford <richard.sandiford@arm.com>
18270 * config/aarch64/aarch64.md (untyped_call): Emit a call_value
18271 rather than a call. List each possible destination register
18272 in the call pattern.
18274 2023-08-31 Pan Li <pan2.li@intel.com>
18276 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfmsac/vfmsub
18277 * config/riscv/autovec.md: Ditto.
18279 2023-08-31 Pan Li <pan2.li@intel.com>
18280 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
18282 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfmadd/vfmacc.
18283 * config/riscv/autovec.md: Ditto.
18284 * config/riscv/vector-iterators.md: Add UNSPEC_VFFMA.
18286 2023-08-31 Palmer Dabbelt <palmer@rivosinc.com>
18288 * config/riscv/autovec.md (shifts): Use
18289 vector_scalar_shift_operand.
18290 * config/riscv/predicates.md (vector_scalar_shift_operand): New
18293 2023-08-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18295 * config.gcc: Add vector cost model framework for RVV.
18296 * config/riscv/riscv.cc (riscv_vectorize_create_costs): Ditto.
18297 (TARGET_VECTORIZE_CREATE_COSTS): Ditto.
18298 * config/riscv/t-riscv: Ditto.
18299 * config/riscv/riscv-vector-costs.cc: New file.
18300 * config/riscv/riscv-vector-costs.h: New file.
18302 2023-08-31 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
18305 * config/rs6000/mma.md (define_insn_and_split movoo): Disallow
18306 AltiVec address operands.
18307 (define_insn_and_split movxo): Likewise.
18308 * config/rs6000/predicates.md (vsx_quad_dform_memory_operand): Remove
18309 redundant mode size check.
18311 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
18313 * config/riscv/riscv-protos.h (IS_AGNOSTIC): Move to here.
18314 * config/riscv/riscv-v.cc (gen_no_side_effects_vsetvl_rtx):
18315 Change to default policy.
18316 * config/riscv/riscv-vector-builtins-bases.cc: Change to default policy.
18317 * config/riscv/riscv-vsetvl.h (IS_AGNOSTIC): Delete.
18318 * config/riscv/riscv.cc (riscv_print_operand): Use IS_AGNOSTIC to test.
18320 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
18322 * config/riscv/autovec-opt.md: Adjust.
18323 * config/riscv/autovec-vls.md: Ditto.
18324 * config/riscv/autovec.md: Ditto.
18325 * config/riscv/riscv-protos.h (enum insn_type): Add insn_type.
18326 (enum insn_flags): Add insn flags.
18327 (emit_vlmax_insn): Adjust.
18328 (emit_vlmax_fp_insn): Delete.
18329 (emit_vlmax_ternary_insn): Delete.
18330 (emit_vlmax_fp_ternary_insn): Delete.
18331 (emit_nonvlmax_insn): Adjust.
18332 (emit_vlmax_slide_insn): Delete.
18333 (emit_nonvlmax_slide_tu_insn): Delete.
18334 (emit_vlmax_merge_insn): Delete.
18335 (emit_vlmax_cmp_insn): Delete.
18336 (emit_vlmax_cmp_mu_insn): Delete.
18337 (emit_vlmax_masked_mu_insn): Delete.
18338 (emit_scalar_move_insn): Delete.
18339 (emit_nonvlmax_integer_move_insn): Delete.
18340 (emit_vlmax_insn_lra): Add.
18341 * config/riscv/riscv-v.cc (get_mask_mode_from_insn_flags): New.
18342 (emit_vlmax_insn): Adjust.
18343 (emit_nonvlmax_insn): Adjust.
18344 (emit_vlmax_insn_lra): Add.
18345 (emit_vlmax_fp_insn): Delete.
18346 (emit_vlmax_ternary_insn): Delete.
18347 (emit_vlmax_fp_ternary_insn): Delete.
18348 (emit_vlmax_slide_insn): Delete.
18349 (emit_nonvlmax_slide_tu_insn): Delete.
18350 (emit_nonvlmax_slide_insn): Delete.
18351 (emit_vlmax_merge_insn): Delete.
18352 (emit_vlmax_cmp_insn): Delete.
18353 (emit_vlmax_cmp_mu_insn): Delete.
18354 (emit_vlmax_masked_insn): Delete.
18355 (emit_nonvlmax_masked_insn): Delete.
18356 (emit_vlmax_masked_store_insn): Delete.
18357 (emit_nonvlmax_masked_store_insn): Delete.
18358 (emit_vlmax_masked_mu_insn): Delete.
18359 (emit_vlmax_masked_fp_mu_insn): Delete.
18360 (emit_nonvlmax_tu_insn): Delete.
18361 (emit_nonvlmax_fp_tu_insn): Delete.
18362 (emit_nonvlmax_tumu_insn): Delete.
18363 (emit_nonvlmax_fp_tumu_insn): Delete.
18364 (emit_scalar_move_insn): Delete.
18365 (emit_cpop_insn): Delete.
18366 (emit_vlmax_integer_move_insn): Delete.
18367 (emit_nonvlmax_integer_move_insn): Delete.
18368 (emit_vlmax_gather_insn): Delete.
18369 (emit_vlmax_masked_gather_mu_insn): Delete.
18370 (emit_vlmax_compress_insn): Delete.
18371 (emit_nonvlmax_compress_insn): Delete.
18372 (emit_vlmax_reduction_insn): Delete.
18373 (emit_vlmax_fp_reduction_insn): Delete.
18374 (emit_nonvlmax_fp_reduction_insn): Delete.
18375 (expand_vec_series): Adjust.
18376 (expand_const_vector): Adjust.
18377 (legitimize_move): Adjust.
18378 (sew64_scalar_helper): Adjust.
18379 (expand_tuple_move): Adjust.
18380 (expand_vector_init_insert_elems): Adjust.
18381 (expand_vector_init_merge_repeating_sequence): Adjust.
18382 (expand_vec_cmp): Adjust.
18383 (expand_vec_cmp_float): Adjust.
18384 (expand_vec_perm): Adjust.
18385 (shuffle_merge_patterns): Adjust.
18386 (shuffle_compress_patterns): Adjust.
18387 (shuffle_decompress_patterns): Adjust.
18388 (expand_load_store): Adjust.
18389 (expand_cond_len_op): Adjust.
18390 (expand_cond_len_unop): Adjust.
18391 (expand_cond_len_binop): Adjust.
18392 (expand_gather_scatter): Adjust.
18393 (expand_cond_len_ternop): Adjust.
18394 (expand_reduction): Adjust.
18395 (expand_lanes_load_store): Adjust.
18396 (expand_fold_extract_last): Adjust.
18397 * config/riscv/riscv.cc (vector_zero_call_used_regs): Adjust.
18398 * config/riscv/vector.md: Adjust.
18400 2023-08-31 Haochen Gui <guihaoc@gcc.gnu.org>
18403 * config/rs6000/rs6000-string.cc (expand_block_move): Call vector
18404 load/store with length only on 64-bit Power10.
18406 2023-08-31 Claudiu Zissulescu <claziss@gmail.com>
18408 * config/arc/arc.cc (arc_split_mov_const): Use LSL16 only when
18409 SWAP option is enabled.
18410 * config/arc/arc.md (ashlsi2_cnt16): Likewise.
18412 2023-08-31 Stamatis Markianos-Wright <stam.markianos-wright@arm.com>
18414 * config/arm/arm-mve-builtins-base.cc (vcaddq_rot90, vcaddq_rot270):
18415 Use common insn for signed and unsigned front-end definitions.
18416 * config/arm/arm_mve_builtins.def
18417 (vcaddq_rot90_m_u, vcaddq_rot270_m_u): Make common.
18418 (vcaddq_rot90_m_s, vcaddq_rot270_m_s): Remove.
18419 * config/arm/iterators.md (mve_insn): Merge signed and unsigned defs.
18422 (mve_rot): Likewise.
18424 (VxCADDQ_M): Likewise.
18425 * config/arm/unspecs.md (unspec): Likewise.
18426 * config/arm/mve.md: Fix minor typo.
18428 2023-08-31 liuhongt <hongtao.liu@intel.com>
18430 * config/i386/sse.md (<avx512>_blendm<mode>): Merge
18431 VF_AVX512HFBFVL into VI12HFBF_AVX512VL.
18432 (VF_AVX512HFBF16): Renamed to VHFBF.
18433 (VF_AVX512FP16VL): Renamed to VHF_AVX512VL.
18434 (VF_AVX512FP16): Removed.
18435 (div<mode>3): Adjust VF_AVX512FP16VL to VHF_AVX512VL.
18436 (avx512fp16_rcp<mode>2<mask_name>): Ditto.
18437 (rsqrt<mode>2): Ditto.
18438 (<sse>_rsqrt<mode>2<mask_name>): Ditto.
18439 (vcond<mode><code>): Ditto.
18440 (vcond<sseintvecmodelower><mode>): Ditto.
18441 (<avx512>_fmaddc_<mode>_mask1<round_expand_name>): Ditto.
18442 (<avx512>_fmaddc_<mode>_maskz<round_expand_name>): Ditto.
18443 (<avx512>_fcmaddc_<mode>_mask1<round_expand_name>): Ditto.
18444 (<avx512>_fcmaddc_<mode>_maskz<round_expand_name>): Ditto.
18445 (cmla<conj_op><mode>4): Ditto.
18446 (fma_<mode>_fadd_fmul): Ditto.
18447 (fma_<mode>_fadd_fcmul): Ditto.
18448 (fma_<complexopname>_<mode>_fma_zero): Ditto.
18449 (fma_<mode>_fmaddc_bcst): Ditto.
18450 (fma_<mode>_fcmaddc_bcst): Ditto.
18451 (<avx512>_<complexopname>_<mode>_mask<round_name>): Ditto.
18452 (cmul<conj_op><mode>3): Ditto.
18453 (<avx512>_<complexopname>_<mode><maskc_name><round_name>):
18455 (vec_unpacks_lo_<mode>): Ditto.
18456 (vec_unpacks_hi_<mode>): Ditto.
18457 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
18458 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
18459 (*vec_extract<mode>_0): Ditto.
18460 (*<avx512>_cmp<mode>3): Extend to V48H_AVX512VL.
18462 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
18465 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Remove condition.
18467 2023-08-31 Jiufu Guo <guojiufu@linux.ibm.com>
18469 * range-op-mixed.h (operator_plus::overflow_free_p): New declare.
18470 (operator_minus::overflow_free_p): New declare.
18471 (operator_mult::overflow_free_p): New declare.
18472 * range-op.cc (range_op_handler::overflow_free_p): New function.
18473 (range_operator::overflow_free_p): New default function.
18474 (operator_plus::overflow_free_p): New function.
18475 (operator_minus::overflow_free_p): New function.
18476 (operator_mult::overflow_free_p): New function.
18477 * range-op.h (range_op_handler::overflow_free_p): New declare.
18478 (range_operator::overflow_free_p): New declare.
18479 * value-range.cc (irange::nonnegative_p): New function.
18480 (irange::nonpositive_p): New function.
18481 * value-range.h (irange::nonnegative_p): New declare.
18482 (irange::nonpositive_p): New declare.
18484 2023-08-30 Dimitar Dimitrov <dimitar@dinux.eu>
18487 * config/pru/predicates.md (const_0_operand): New predicate.
18488 (pru_cstore_comparison_operator): Ditto.
18489 * config/pru/pru.md (cstore<mode>4): New pattern.
18490 (cstoredi4): Ditto.
18492 2023-08-30 Richard Biener <rguenther@suse.de>
18494 PR tree-optimization/111228
18495 * match.pd ((vec_perm (vec_perm ..) @5 ..) -> (vec_perm @x @5 ..)):
18496 New simplifications.
18498 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18500 * config/riscv/autovec.md (movmisalign<mode>): Delete.
18502 2023-08-30 Die Li <lidie@eswincomputing.com>
18503 Fei Gao <gaofei@eswincomputing.com>
18505 * config/riscv/peephole.md: New pattern.
18506 * config/riscv/predicates.md (a0a1_reg_operand): New predicate.
18507 (zcmp_mv_sreg_operand): New predicate.
18508 * config/riscv/riscv.md: New predicate.
18509 * config/riscv/zc.md (*mva01s<X:mode>): New pattern.
18510 (*mvsa01<X:mode>): New pattern.
18512 2023-08-30 Fei Gao <gaofei@eswincomputing.com>
18514 * config/riscv/riscv.cc
18515 (riscv_zcmp_can_use_popretz): true if popretz can be used
18516 (riscv_gen_multi_pop_insn): interface to generate cm.pop[ret][z]
18517 (riscv_expand_epilogue): expand cm.pop[ret][z] in epilogue
18518 * config/riscv/riscv.md: define A0_REGNUM
18519 * config/riscv/zc.md
18520 (@gpr_multi_popretz_up_to_ra_<mode>): md for popretz ra
18521 (@gpr_multi_popretz_up_to_s0_<mode>): md for popretz ra, s0
18522 (@gpr_multi_popretz_up_to_s1_<mode>): likewise
18523 (@gpr_multi_popretz_up_to_s2_<mode>): likewise
18524 (@gpr_multi_popretz_up_to_s3_<mode>): likewise
18525 (@gpr_multi_popretz_up_to_s4_<mode>): likewise
18526 (@gpr_multi_popretz_up_to_s5_<mode>): likewise
18527 (@gpr_multi_popretz_up_to_s6_<mode>): likewise
18528 (@gpr_multi_popretz_up_to_s7_<mode>): likewise
18529 (@gpr_multi_popretz_up_to_s8_<mode>): likewise
18530 (@gpr_multi_popretz_up_to_s9_<mode>): likewise
18531 (@gpr_multi_popretz_up_to_s11_<mode>): likewise
18533 2023-08-30 Fei Gao <gaofei@eswincomputing.com>
18535 * config/riscv/iterators.md
18536 (slot0_offset): slot 0 offset in stack GPRs area in bytes
18537 (slot1_offset): slot 1 offset in stack GPRs area in bytes
18538 (slot2_offset): likewise
18539 (slot3_offset): likewise
18540 (slot4_offset): likewise
18541 (slot5_offset): likewise
18542 (slot6_offset): likewise
18543 (slot7_offset): likewise
18544 (slot8_offset): likewise
18545 (slot9_offset): likewise
18546 (slot10_offset): likewise
18547 (slot11_offset): likewise
18548 (slot12_offset): likewise
18549 * config/riscv/predicates.md
18550 (stack_push_up_to_ra_operand): predicates of stack adjust pushing ra
18551 (stack_push_up_to_s0_operand): predicates of stack adjust pushing ra, s0
18552 (stack_push_up_to_s1_operand): likewise
18553 (stack_push_up_to_s2_operand): likewise
18554 (stack_push_up_to_s3_operand): likewise
18555 (stack_push_up_to_s4_operand): likewise
18556 (stack_push_up_to_s5_operand): likewise
18557 (stack_push_up_to_s6_operand): likewise
18558 (stack_push_up_to_s7_operand): likewise
18559 (stack_push_up_to_s8_operand): likewise
18560 (stack_push_up_to_s9_operand): likewise
18561 (stack_push_up_to_s11_operand): likewise
18562 (stack_pop_up_to_ra_operand): predicates of stack adjust poping ra
18563 (stack_pop_up_to_s0_operand): predicates of stack adjust poping ra, s0
18564 (stack_pop_up_to_s1_operand): likewise
18565 (stack_pop_up_to_s2_operand): likewise
18566 (stack_pop_up_to_s3_operand): likewise
18567 (stack_pop_up_to_s4_operand): likewise
18568 (stack_pop_up_to_s5_operand): likewise
18569 (stack_pop_up_to_s6_operand): likewise
18570 (stack_pop_up_to_s7_operand): likewise
18571 (stack_pop_up_to_s8_operand): likewise
18572 (stack_pop_up_to_s9_operand): likewise
18573 (stack_pop_up_to_s11_operand): likewise
18574 * config/riscv/riscv-protos.h
18575 (riscv_zcmp_valid_stack_adj_bytes_p):declaration
18576 * config/riscv/riscv.cc (struct riscv_frame_info): comment change
18577 (riscv_avoid_multi_push): helper function of riscv_use_multi_push
18578 (riscv_use_multi_push): true if multi push is used
18579 (riscv_multi_push_sregs_count): num of sregs in multi-push
18580 (riscv_multi_push_regs_count): num of regs in multi-push
18581 (riscv_16bytes_align): align to 16 bytes
18582 (riscv_stack_align): moved to a better place
18583 (riscv_save_libcall_count): no functional change
18584 (riscv_compute_frame_info): add zcmp frame info
18585 (riscv_for_each_saved_reg): save or restore fprs in specified slot for zcmp
18586 (riscv_adjust_multi_push_cfi_prologue): adjust cfi for cm.push
18587 (riscv_gen_multi_push_pop_insn): gen function for multi push and pop
18588 (get_multi_push_fpr_mask): get mask for the fprs pushed by cm.push
18589 (riscv_expand_prologue): allocate stack by cm.push
18590 (riscv_adjust_multi_pop_cfi_epilogue): adjust cfi for cm.pop[ret]
18591 (riscv_expand_epilogue): allocate stack by cm.pop[ret]
18592 (zcmp_base_adj): calculate stack adjustment base size
18593 (zcmp_additional_adj): calculate stack adjustment additional size
18594 (riscv_zcmp_valid_stack_adj_bytes_p): check if stack adjustment valid
18595 * config/riscv/riscv.h (RETURN_ADDR_MASK): mask of ra
18596 (S0_MASK): likewise
18597 (S1_MASK): likewise
18598 (S2_MASK): likewise
18599 (S3_MASK): likewise
18600 (S4_MASK): likewise
18601 (S5_MASK): likewise
18602 (S6_MASK): likewise
18603 (S7_MASK): likewise
18604 (S8_MASK): likewise
18605 (S9_MASK): likewise
18606 (S10_MASK): likewise
18607 (S11_MASK): likewise
18608 (MULTI_PUSH_GPR_MASK): GPR_MASK that cm.push can cover at most
18609 (ZCMP_MAX_SPIMM): max spimm value
18610 (ZCMP_SP_INC_STEP): zcmp sp increment step
18611 (ZCMP_INVALID_S0S10_SREGS_COUNTS): num of s0-s10
18612 (ZCMP_S0S11_SREGS_COUNTS): num of s0-s11
18613 (ZCMP_MAX_GRP_SLOTS): max slots of pushing and poping in zcmp
18614 (CALLEE_SAVED_FREG_NUMBER): get x of fsx(fs0 ~ fs11)
18615 * config/riscv/riscv.md: include zc.md
18616 * config/riscv/zc.md: New file. machine description for zcmp
18618 2023-08-30 Jakub Jelinek <jakub@redhat.com>
18620 PR tree-optimization/110914
18621 * tree-ssa-strlen.cc (strlen_pass::handle_builtin_memcpy): Don't call
18622 adjust_last_stmt unless len is known constant.
18624 2023-08-30 Jakub Jelinek <jakub@redhat.com>
18626 PR tree-optimization/111015
18627 * gimple-ssa-store-merging.cc
18628 (imm_store_chain_info::output_merged_store): Use wi::mask and
18629 wide_int_to_tree instead of unsigned HOST_WIDE_INT shift and
18630 build_int_cst to build BIT_AND_EXPR mask.
18632 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18634 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Add MASK_LEN_ variant.
18635 (call_may_clobber_ref_p_1): Ditto.
18636 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn): Ditto.
18637 (get_alias_ptr_type_for_ptr_address): Ditto.
18639 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18641 * config/riscv/riscv-vsetvl.cc
18642 (vector_insn_info::get_avl_or_vl_reg): Fix bug.
18644 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18646 * config/riscv/autovec-vls.md (movmisalign<mode>): New pattern.
18647 * config/riscv/riscv.cc (riscv_support_vector_misalignment): Support
18650 2023-08-29 Philipp Tomsich <philipp.tomsich@vrull.eu>
18652 * config/riscv/zicond.md: New splitters to rewrite single bit
18653 sign extension as the condition to a czero in the desired form.
18655 2023-08-29 David Malcolm <dmalcolm@redhat.com>
18658 * doc/invoke.texi: Add -Wanalyzer-overlapping-buffers.
18660 2023-08-29 David Malcolm <dmalcolm@redhat.com>
18663 * Makefile.in (ANALYZER_OBJS): Add analyzer/ranges.o.
18665 2023-08-29 Jin Ma <jinma@linux.alibaba.com>
18667 * config/riscv/riscv.cc (riscv_float_const_rtx_index_for_fli):
18668 zvfh can generate zfa extended instruction fli.h, just like zfh.
18670 2023-08-29 Edwin Lu <ewlu@rivosinc.com>
18671 Vineet Gupta <vineetg@rivosinc.com>
18673 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): Generate
18674 __riscv_unaligned_avoid with value 1 or
18675 __riscv_unaligned_slow with value 1 or
18676 __riscv_unaligned_fast with value 1
18677 * config/riscv/riscv.cc (riscv_option_override): Define
18678 riscv_user_wants_strict_align. Set
18679 riscv_user_wants_strict_align to TARGET_STRICT_ALIGN
18680 * config/riscv/riscv.h: Declare riscv_user_wants_strict_align
18682 2023-08-29 Edwin Lu <ewlu@rivosinc.com>
18684 * config/riscv/autovec-vls.md: Update types
18685 * config/riscv/riscv.md: Add vector placeholder type
18686 * config/riscv/vector.md: Update types
18688 2023-08-29 Carl Love <cel@us.ibm.com>
18690 * config/rs6000/dfp.md (UNSPEC_DQUAN): New unspec.
18691 (dfp_dqua_<mode>, dfp_dquai_<mode>): New define_insn.
18692 * config/rs6000/rs6000-builtins.def (__builtin_dfp_dqua,
18693 __builtin_dfp_dquai, __builtin_dfp_dquaq, __builtin_dfp_dquaqi):
18694 New buit-in definitions.
18695 * config/rs6000/rs6000-overload.def (__builtin_dfp_quantize): New
18696 overloaded definition.
18697 * doc/extend.texi: Add documentation for __builtin_dfp_quantize.
18699 2023-08-29 Pan Li <pan2.li@intel.com>
18700 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
18702 * config/riscv/riscv.cc (riscv_legitimize_poly_move): New declaration.
18703 (riscv_legitimize_const_move): Handle ref plus const poly.
18705 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
18707 * common/config/riscv/riscv-common.cc
18708 (riscv_implied_info): Add implications from unprivileged extensions.
18709 (riscv_ext_version_table): Add stub support for all unprivileged
18710 extensions supported by Binutils as well as 'Zce', 'Zcmp', 'Zcmt'.
18712 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
18714 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
18715 Add stub support for all vendor extensions supported by Binutils.
18717 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
18719 * common/config/riscv/riscv-common.cc
18720 (riscv_implied_info): Add implications from privileged extensions.
18721 (riscv_ext_version_table): Add stub support for all privileged
18722 extensions supported by Binutils.
18724 2023-08-29 Lehua Ding <lehua.ding@rivai.ai>
18726 * config/riscv/autovec.md: Adjust
18727 * config/riscv/riscv-protos.h (RVV_VUNDEF): Clean.
18728 (get_vlmax_rtx): Exported.
18729 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_ternary_tu_insn): Deleted.
18730 (emit_vlmax_masked_gather_mu_insn): Adjust.
18731 (get_vlmax_rtx): New func.
18732 (expand_load_store): Adjust.
18733 (expand_cond_len_unop): Call expand_cond_len_op.
18734 (expand_cond_len_op): New subroutine.
18735 (expand_cond_len_binop): Call expand_cond_len_op.
18736 (expand_cond_len_ternop): Call expand_cond_len_op.
18737 (expand_lanes_load_store): Adjust.
18739 2023-08-29 Jakub Jelinek <jakub@redhat.com>
18741 PR middle-end/79173
18742 PR middle-end/111209
18743 * tree-ssa-math-opts.cc (match_uaddc_usubc): Match also
18744 just 2 limb uaddc/usubc with 0 carry-in on lower limb and ignored
18745 carry-out on higher limb. Don't match it though if it could be
18746 matched later on 4 argument addition/subtraction.
18748 2023-08-29 Andrew Pinski <apinski@marvell.com>
18750 PR tree-optimization/111147
18751 * match.pd (`(x | y) & (~x ^ y)`) Use bitwise_inverted_equal_p
18752 instead of matching bit_not.
18754 2023-08-29 Christophe Lyon <christophe.lyon@linaro.org>
18756 * config/arm/arm-mve-builtins.cc (type_suffixes): Add missing
18759 2023-08-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18761 * config/riscv/riscv-vsetvl.cc (vector_insn_info::get_avl_or_vl_reg): New function.
18762 (pass_vsetvl::compute_local_properties): Fix bug.
18763 (pass_vsetvl::commit_vsetvls): Ditto.
18764 * config/riscv/riscv-vsetvl.h: New function.
18766 2023-08-29 Lehua Ding <lehua.ding@rivai.ai>
18769 * config/riscv/predicates.md (vector_const_int_or_double_0_operand):
18771 * config/riscv/riscv-vector-builtins.cc (function_expander::function_expander):
18772 force_reg mem target operand.
18773 * config/riscv/vector.md (@pred_mov<mode>): Wrapper.
18774 (*pred_mov<mode>): Remove imm -> reg pattern.
18775 (*pred_broadcast<mode>_imm): Add imm -> reg pattern.
18777 2023-08-29 Lulu Cheng <chenglulu@loongson.cn>
18779 * common/config/loongarch/loongarch-common.cc:
18780 Enable '-free' on O2 and above.
18781 * doc/invoke.texi: Modify the description information
18782 of the '-free' compilation option and add the LoongArch
18785 2023-08-28 Tsukasa OI <research_trasio@irq.a4lg.com>
18787 * doc/extend.texi: Fix the description of __builtin_riscv_pause.
18789 2023-08-28 Tsukasa OI <research_trasio@irq.a4lg.com>
18791 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
18792 Implement the 'Zihintpause' extension, version 2.0.
18793 (riscv_ext_flag_table) Add 'Zihintpause' handling.
18794 * config/riscv/riscv-builtins.cc: Remove availability predicate
18795 "always" and add "hint_pause".
18796 (riscv_builtins) : Add "pause" extension.
18797 * config/riscv/riscv-opts.h (MASK_ZIHINTPAUSE, TARGET_ZIHINTPAUSE): New.
18798 * config/riscv/riscv.md (riscv_pause): Adjust output based on
18799 TARGET_ZIHINTPAUSE.
18801 2023-08-28 Andrew Pinski <apinski@marvell.com>
18803 * match.pd (`(X & ~Y) | (~X & Y)`): Use bitwise_inverted_equal_p
18804 instead of specifically checking for ~X.
18806 2023-08-28 Andrew Pinski <apinski@marvell.com>
18808 PR tree-optimization/111146
18809 * match.pd (`(x | y) & ~x`, `(x & y) | ~x`): Remove
18812 2023-08-28 Andrew Pinski <apinski@marvell.com>
18814 * tree-ssa-phiopt.cc (gimple_simplify_phiopt): Add dump information
18815 when resimplify returns true.
18816 (match_simplify_replacement): Print only if accepted the match-and-simplify
18817 result rather than the full sequence.
18819 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18821 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::earliest_fusion): Skip
18823 (pass_vsetvl::compute_probabilities): Fix unitialized probability.
18825 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18827 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::earliest_fusion): Fix bug.
18829 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
18831 * config/arm/arm-mve-builtins-base.cc (vmullbq_poly)
18832 (vmulltq_poly): New.
18833 * config/arm/arm-mve-builtins-base.def (vmullbq_poly)
18834 (vmulltq_poly): New.
18835 * config/arm/arm-mve-builtins-base.h (vmullbq_poly)
18836 (vmulltq_poly): New.
18837 * config/arm/arm_mve.h (vmulltq_poly): Remove.
18838 (vmullbq_poly): Remove.
18839 (vmullbq_poly_m): Remove.
18840 (vmulltq_poly_m): Remove.
18841 (vmullbq_poly_x): Remove.
18842 (vmulltq_poly_x): Remove.
18843 (vmulltq_poly_p8): Remove.
18844 (vmullbq_poly_p8): Remove.
18845 (vmulltq_poly_p16): Remove.
18846 (vmullbq_poly_p16): Remove.
18847 (vmullbq_poly_m_p8): Remove.
18848 (vmullbq_poly_m_p16): Remove.
18849 (vmulltq_poly_m_p8): Remove.
18850 (vmulltq_poly_m_p16): Remove.
18851 (vmullbq_poly_x_p8): Remove.
18852 (vmullbq_poly_x_p16): Remove.
18853 (vmulltq_poly_x_p8): Remove.
18854 (vmulltq_poly_x_p16): Remove.
18855 (__arm_vmulltq_poly_p8): Remove.
18856 (__arm_vmullbq_poly_p8): Remove.
18857 (__arm_vmulltq_poly_p16): Remove.
18858 (__arm_vmullbq_poly_p16): Remove.
18859 (__arm_vmullbq_poly_m_p8): Remove.
18860 (__arm_vmullbq_poly_m_p16): Remove.
18861 (__arm_vmulltq_poly_m_p8): Remove.
18862 (__arm_vmulltq_poly_m_p16): Remove.
18863 (__arm_vmullbq_poly_x_p8): Remove.
18864 (__arm_vmullbq_poly_x_p16): Remove.
18865 (__arm_vmulltq_poly_x_p8): Remove.
18866 (__arm_vmulltq_poly_x_p16): Remove.
18867 (__arm_vmulltq_poly): Remove.
18868 (__arm_vmullbq_poly): Remove.
18869 (__arm_vmullbq_poly_m): Remove.
18870 (__arm_vmulltq_poly_m): Remove.
18871 (__arm_vmullbq_poly_x): Remove.
18872 (__arm_vmulltq_poly_x): Remove.
18874 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
18876 * config/arm/arm-mve-builtins-functions.h (class
18877 unspec_mve_function_exact_insn_vmull_poly): New.
18879 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
18881 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_poly): New.
18882 * config/arm/arm-mve-builtins-shapes.h (binary_widen_poly): New.
18884 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
18886 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type): Add
18887 support for 'U' and 'p' format specifiers.
18889 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
18891 * config/arm/arm-mve-builtins.cc (type_suffixes): Handle poly_p
18893 (TYPES_poly_8_16): New.
18895 * config/arm/arm-mve-builtins.def (p8): New type suffix.
18897 * config/arm/arm-mve-builtins.h (enum type_class_index): Add
18899 (struct type_suffix_info): Add poly_p field.
18901 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
18903 * config/arm/arm-mve-builtins-base.cc (vmullbq_int, vmulltq_int):
18905 * config/arm/arm-mve-builtins-base.def (vmullbq_int, vmulltq_int):
18907 * config/arm/arm-mve-builtins-base.h (vmullbq_int, vmulltq_int):
18909 * config/arm/arm_mve.h (vmulltq_int): Remove.
18910 (vmullbq_int): Remove.
18911 (vmullbq_int_m): Remove.
18912 (vmulltq_int_m): Remove.
18913 (vmullbq_int_x): Remove.
18914 (vmulltq_int_x): Remove.
18915 (vmulltq_int_u8): Remove.
18916 (vmullbq_int_u8): Remove.
18917 (vmulltq_int_s8): Remove.
18918 (vmullbq_int_s8): Remove.
18919 (vmulltq_int_u16): Remove.
18920 (vmullbq_int_u16): Remove.
18921 (vmulltq_int_s16): Remove.
18922 (vmullbq_int_s16): Remove.
18923 (vmulltq_int_u32): Remove.
18924 (vmullbq_int_u32): Remove.
18925 (vmulltq_int_s32): Remove.
18926 (vmullbq_int_s32): Remove.
18927 (vmullbq_int_m_s8): Remove.
18928 (vmullbq_int_m_s32): Remove.
18929 (vmullbq_int_m_s16): Remove.
18930 (vmullbq_int_m_u8): Remove.
18931 (vmullbq_int_m_u32): Remove.
18932 (vmullbq_int_m_u16): Remove.
18933 (vmulltq_int_m_s8): Remove.
18934 (vmulltq_int_m_s32): Remove.
18935 (vmulltq_int_m_s16): Remove.
18936 (vmulltq_int_m_u8): Remove.
18937 (vmulltq_int_m_u32): Remove.
18938 (vmulltq_int_m_u16): Remove.
18939 (vmullbq_int_x_s8): Remove.
18940 (vmullbq_int_x_s16): Remove.
18941 (vmullbq_int_x_s32): Remove.
18942 (vmullbq_int_x_u8): Remove.
18943 (vmullbq_int_x_u16): Remove.
18944 (vmullbq_int_x_u32): Remove.
18945 (vmulltq_int_x_s8): Remove.
18946 (vmulltq_int_x_s16): Remove.
18947 (vmulltq_int_x_s32): Remove.
18948 (vmulltq_int_x_u8): Remove.
18949 (vmulltq_int_x_u16): Remove.
18950 (vmulltq_int_x_u32): Remove.
18951 (__arm_vmulltq_int_u8): Remove.
18952 (__arm_vmullbq_int_u8): Remove.
18953 (__arm_vmulltq_int_s8): Remove.
18954 (__arm_vmullbq_int_s8): Remove.
18955 (__arm_vmulltq_int_u16): Remove.
18956 (__arm_vmullbq_int_u16): Remove.
18957 (__arm_vmulltq_int_s16): Remove.
18958 (__arm_vmullbq_int_s16): Remove.
18959 (__arm_vmulltq_int_u32): Remove.
18960 (__arm_vmullbq_int_u32): Remove.
18961 (__arm_vmulltq_int_s32): Remove.
18962 (__arm_vmullbq_int_s32): Remove.
18963 (__arm_vmullbq_int_m_s8): Remove.
18964 (__arm_vmullbq_int_m_s32): Remove.
18965 (__arm_vmullbq_int_m_s16): Remove.
18966 (__arm_vmullbq_int_m_u8): Remove.
18967 (__arm_vmullbq_int_m_u32): Remove.
18968 (__arm_vmullbq_int_m_u16): Remove.
18969 (__arm_vmulltq_int_m_s8): Remove.
18970 (__arm_vmulltq_int_m_s32): Remove.
18971 (__arm_vmulltq_int_m_s16): Remove.
18972 (__arm_vmulltq_int_m_u8): Remove.
18973 (__arm_vmulltq_int_m_u32): Remove.
18974 (__arm_vmulltq_int_m_u16): Remove.
18975 (__arm_vmullbq_int_x_s8): Remove.
18976 (__arm_vmullbq_int_x_s16): Remove.
18977 (__arm_vmullbq_int_x_s32): Remove.
18978 (__arm_vmullbq_int_x_u8): Remove.
18979 (__arm_vmullbq_int_x_u16): Remove.
18980 (__arm_vmullbq_int_x_u32): Remove.
18981 (__arm_vmulltq_int_x_s8): Remove.
18982 (__arm_vmulltq_int_x_s16): Remove.
18983 (__arm_vmulltq_int_x_s32): Remove.
18984 (__arm_vmulltq_int_x_u8): Remove.
18985 (__arm_vmulltq_int_x_u16): Remove.
18986 (__arm_vmulltq_int_x_u32): Remove.
18987 (__arm_vmulltq_int): Remove.
18988 (__arm_vmullbq_int): Remove.
18989 (__arm_vmullbq_int_m): Remove.
18990 (__arm_vmulltq_int_m): Remove.
18991 (__arm_vmullbq_int_x): Remove.
18992 (__arm_vmulltq_int_x): Remove.
18994 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
18996 * config/arm/arm-mve-builtins-shapes.cc (binary_widen): New.
18997 * config/arm/arm-mve-builtins-shapes.h (binary_widen): New.
18999 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
19001 * config/arm/arm-mve-builtins-functions.h (class
19002 unspec_mve_function_exact_insn_vmull): New.
19004 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
19006 * config/arm/iterators.md (mve_insn): Add vmullb, vmullt.
19007 (isu): Add VMULLBQ_INT_S, VMULLBQ_INT_U, VMULLTQ_INT_S,
19009 (supf): Add VMULLBQ_POLY_P, VMULLTQ_POLY_P, VMULLBQ_POLY_M_P,
19011 (VMULLBQ_INT, VMULLTQ_INT, VMULLBQ_INT_M, VMULLTQ_INT_M): Delete.
19012 (VMULLxQ_INT, VMULLxQ_POLY, VMULLxQ_INT_M, VMULLxQ_POLY_M): New.
19013 * config/arm/mve.md (mve_vmullbq_int_<supf><mode>)
19014 (mve_vmulltq_int_<supf><mode>): Merge into ...
19015 (@mve_<mve_insn>q_int_<supf><mode>) ... this.
19016 (mve_vmulltq_poly_p<mode>, mve_vmullbq_poly_p<mode>): Merge into ...
19017 (@mve_<mve_insn>q_poly_<supf><mode>): ... this.
19018 (mve_vmullbq_int_m_<supf><mode>, mve_vmulltq_int_m_<supf><mode>): Merge into ...
19019 (@mve_<mve_insn>q_int_m_<supf><mode>): ... this.
19020 (mve_vmullbq_poly_m_p<mode>, mve_vmulltq_poly_m_p<mode>): Merge into ...
19021 (@mve_<mve_insn>q_poly_m_<supf><mode>): ... this.
19023 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
19025 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type):
19028 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
19030 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int32): Fix loop bound.
19031 (binary_acca_int64): Likewise.
19033 2023-08-28 Aldy Hernandez <aldyh@redhat.com>
19035 * range-op-float.cc (fold_range): Handle relations.
19037 2023-08-28 Lulu Cheng <chenglulu@loongson.cn>
19039 * config/loongarch/loongarch.cc (loongarch_expand_conditional_move):
19040 Optimize the function implementation.
19042 2023-08-28 liuhongt <hongtao.liu@intel.com>
19045 * config/i386/sse.md (V48_AVX2): Rename to ..
19046 (V48_128_256): .. this.
19047 (ssefltmodesuffix): Extend to V4SF/V8SF/V2DF/V4DF.
19048 (<avx_avx2>_maskload<ssemodesuffix><avxsizesuffix>): Change
19049 V48_AVX2 to V48_128_256, also generate vmaskmov{ps,pd} for
19050 integral modes when TARGET_AVX2 is not available.
19051 (<avx_avx2>_maskstore<ssemodesuffix><avxsizesuffix>): Ditto.
19052 (maskload<mode><sseintvecmodelower>): Change V48_AVX2 to
19054 (maskstore<mode><sseintvecmodelower>): Ditto.
19056 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19058 * config/riscv/riscv-vsetvl.cc (vsetvl_vtype_change_only_p):
19060 (after_or_same_p): Ditto.
19061 (find_reg_killed_by): Delete.
19062 (has_vsetvl_killed_avl_p): Ditto.
19063 (anticipatable_occurrence_p): Refactor.
19064 (any_set_in_bb_p): Delete.
19065 (count_regno_occurrences): Ditto.
19066 (backward_propagate_worthwhile_p): Ditto.
19067 (demands_can_be_fused_p): Ditto.
19068 (earliest_pred_can_be_fused_p): New function.
19069 (vsetvl_dominated_by_p): Ditto.
19070 (vector_insn_info::parse_insn): Refactor.
19071 (vector_insn_info::merge): Refactor.
19072 (vector_insn_info::dump): Refactor.
19073 (vector_infos_manager::vector_infos_manager): Refactor.
19074 (vector_infos_manager::all_empty_predecessor_p): Delete.
19075 (vector_infos_manager::all_same_avl_p): Ditto.
19076 (vector_infos_manager::create_bitmap_vectors): Refactor.
19077 (vector_infos_manager::free_bitmap_vectors): Refactor.
19078 (vector_infos_manager::dump): Refactor.
19079 (pass_vsetvl::update_block_info): New function.
19080 (enum fusion_type): Ditto.
19081 (pass_vsetvl::get_backward_fusion_type): Delete.
19082 (pass_vsetvl::hard_empty_block_p): Ditto.
19083 (pass_vsetvl::backward_demand_fusion): Ditto.
19084 (pass_vsetvl::forward_demand_fusion): Ditto.
19085 (pass_vsetvl::demand_fusion): Ditto.
19086 (pass_vsetvl::cleanup_illegal_dirty_blocks): Ditto.
19087 (pass_vsetvl::compute_local_properties): Ditto.
19088 (pass_vsetvl::earliest_fusion): New function.
19089 (pass_vsetvl::vsetvl_fusion): Ditto.
19090 (pass_vsetvl::commit_vsetvls): Refactor.
19091 (get_first_vsetvl_before_rvv_insns): Ditto.
19092 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
19093 (pass_vsetvl::cleanup_earliest_vsetvls): New function.
19094 (pass_vsetvl::df_post_optimization): Refactor.
19095 (pass_vsetvl::lazy_vsetvl): Ditto.
19096 * config/riscv/riscv-vsetvl.h: Ditto.
19098 2023-08-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19100 * config/riscv/autovec.md (len_fold_extract_last_<mode>): New pattern.
19101 * config/riscv/riscv-protos.h (enum insn_type): New enum.
19102 (expand_fold_extract_last): New function.
19103 * config/riscv/riscv-v.cc (emit_nonvlmax_slide_insn): Ditto.
19104 (emit_cpop_insn): Ditto.
19105 (emit_nonvlmax_compress_insn): Ditto.
19106 (expand_fold_extract_last): Ditto.
19107 * config/riscv/vector.md: Fix vcpop.m ratio demand.
19109 2023-08-25 Edwin Lu <ewlu@rivosinc.com>
19111 * config/riscv/sync-rvwmo.md: updated types to "multi" or
19112 "atomic" based on number of assembly lines generated
19113 * config/riscv/sync-ztso.md: likewise
19114 * config/riscv/sync.md: likewise
19116 2023-08-25 Jin Ma <jinma@linux.alibaba.com>
19118 * common/config/riscv/riscv-common.cc: Add zfa extension version, which depends on
19120 * config/riscv/constraints.md (zfli): Constrain the floating point number that the
19121 instructions FLI.H/S/D can load.
19122 * config/riscv/iterators.md (ceil): New.
19123 * config/riscv/riscv-opts.h (MASK_ZFA): New.
19125 * config/riscv/riscv-protos.h (riscv_float_const_rtx_index_for_fli): New.
19126 * config/riscv/riscv.cc (riscv_float_const_rtx_index_for_fli): New.
19127 (riscv_cannot_force_const_mem): If instruction FLI.H/S/D can be used, memory is
19129 (riscv_const_insns): Likewise.
19130 (riscv_legitimize_const_move): Likewise.
19131 (riscv_split_64bit_move_p): If instruction FLI.H/S/D can be used, no split is
19133 (riscv_split_doubleword_move): Likewise.
19134 (riscv_output_move): Output the mov instructions in zfa extension.
19135 (riscv_print_operand): Output the floating-point value of the FLI.H/S/D immediate
19137 (riscv_secondary_memory_needed): Likewise.
19138 * config/riscv/riscv.md (fminm<mode>3): New.
19139 (fmaxm<mode>3): New.
19140 (movsidf2_low_rv32): New.
19141 (movsidf2_high_rv32): New.
19142 (movdfsisi3_rv32): New.
19143 (f<quiet_pattern>_quiet<ANYF:mode><X:mode>4_zfa): New.
19144 * config/riscv/riscv.opt: New.
19146 2023-08-25 Sandra Loosemore <sandra@codesourcery.com>
19149 * omp-general.cc (omp_runtime_api_procname): New.
19150 (omp_runtime_api_call): Moved here from omp-low.cc, and make
19152 * omp-general.h: Include omp-api.h.
19153 * omp-low.cc (omp_runtime_api_call): Delete this copy.
19155 2023-08-25 Sandra Loosemore <sandra@codesourcery.com>
19157 * doc/generic.texi (OpenMP): Document OMP_STRUCTURED_BLOCK.
19158 * doc/gimple.texi (GIMPLE instruction set): Add
19159 GIMPLE_OMP_STRUCTURED_BLOCK.
19160 (GIMPLE_OMP_STRUCTURED_BLOCK): New subsection.
19161 * gimple-low.cc (lower_stmt): Error on GIMPLE_OMP_STRUCTURED_BLOCK.
19162 * gimple-pretty-print.cc (dump_gimple_omp_block): Handle
19163 GIMPLE_OMP_STRUCTURED_BLOCK.
19164 (pp_gimple_stmt_1): Likewise.
19165 * gimple-walk.cc (walk_gimple_stmt): Likewise.
19166 * gimple.cc (gimple_build_omp_structured_block): New.
19167 * gimple.def (GIMPLE_OMP_STRUCTURED_BLOCK): New.
19168 * gimple.h (gimple_build_omp_structured_block): Declare.
19169 (gimple_has_substatements): Handle GIMPLE_OMP_STRUCTURED_BLOCK.
19170 (CASE_GIMPLE_OMP): Likewise.
19171 * gimplify.cc (is_gimple_stmt): Handle OMP_STRUCTURED_BLOCK.
19172 (gimplify_expr): Likewise.
19173 * omp-expand.cc (GIMPLE_OMP_STRUCTURED_BLOCK): Error on
19174 GIMPLE_OMP_STRUCTURED_BLOCK.
19175 * omp-low.cc (scan_omp_1_stmt): Handle GIMPLE_OMP_STRUCTURED_BLOCK.
19176 (lower_omp_1): Likewise.
19177 (diagnose_sb_1): Likewise.
19178 (diagnose_sb_2): Likewise.
19179 * tree-inline.cc (remap_gimple_stmt): Handle
19180 GIMPLE_OMP_STRUCTURED_BLOCK.
19181 (estimate_num_insns): Likewise.
19182 * tree-nested.cc (convert_nonlocal_reference_stmt): Likewise.
19183 (convert_local_reference_stmt): Likewise.
19184 (convert_gimple_call): Likewise.
19185 * tree-pretty-print.cc (dump_generic_node): Handle
19186 OMP_STRUCTURED_BLOCK.
19187 * tree.def (OMP_STRUCTURED_BLOCK): New.
19188 * tree.h (OMP_STRUCTURED_BLOCK_BODY): New.
19190 2023-08-25 Vineet Gupta <vineetg@rivosinc.com>
19192 * config/riscv/riscv.cc (riscv_rtx_costs): Adjust const_int
19193 cost. Add some comments about different constants handling.
19195 2023-08-25 Andrew Pinski <apinski@marvell.com>
19197 * match.pd (`a ? one_zero : one_zero`): Move
19198 below detection of minmax.
19200 2023-08-25 Andrew Pinski <apinski@marvell.com>
19202 * match.pd (`a | C -> C`): New pattern.
19204 2023-08-25 Uros Bizjak <ubizjak@gmail.com>
19206 * caller-save.cc (new_saved_hard_reg):
19207 Rename TRUE/FALSE to true/false.
19208 (setup_save_areas): Ditto.
19209 * gcc.cc (set_collect_gcc_options): Ditto.
19210 (driver::build_multilib_strings): Ditto.
19211 (print_multilib_info): Ditto.
19212 * genautomata.cc (gen_cpu_unit): Ditto.
19213 (gen_query_cpu_unit): Ditto.
19214 (gen_bypass): Ditto.
19215 (gen_excl_set): Ditto.
19216 (gen_presence_absence_set): Ditto.
19217 (gen_presence_set): Ditto.
19218 (gen_final_presence_set): Ditto.
19219 (gen_absence_set): Ditto.
19220 (gen_final_absence_set): Ditto.
19221 (gen_automaton): Ditto.
19222 (gen_regexp_repeat): Ditto.
19223 (gen_regexp_allof): Ditto.
19224 (gen_regexp_oneof): Ditto.
19225 (gen_regexp_sequence): Ditto.
19226 (process_decls): Ditto.
19227 (reserv_sets_are_intersected): Ditto.
19228 (initiate_excl_sets): Ditto.
19229 (form_reserv_sets_list): Ditto.
19230 (check_presence_pattern_sets): Ditto.
19231 (check_absence_pattern_sets): Ditto.
19232 (check_regexp_units_distribution): Ditto.
19233 (check_unit_distributions_to_automata): Ditto.
19234 (create_ainsns): Ditto.
19235 (output_insn_code_cases): Ditto.
19236 (output_internal_dead_lock_func): Ditto.
19237 (form_important_insn_automata_lists): Ditto.
19238 * gengtype-state.cc (read_state_files_list): Ditto.
19239 * gengtype.cc (main): Ditto.
19240 * gimple-array-bounds.cc (array_bounds_checker::check_array_bounds):
19242 * gimple.cc (gimple_build_call_from_tree): Ditto.
19243 (preprocess_case_label_vec_for_gimple): Ditto.
19244 * gimplify.cc (gimplify_call_expr): Ditto.
19245 * ordered-hash-map-tests.cc (test_map_of_int_to_strings): Ditto.
19247 2023-08-25 Richard Biener <rguenther@suse.de>
19249 PR tree-optimization/111137
19250 * tree-vect-data-refs.cc (vect_slp_analyze_load_dependences):
19251 Properly handle grouped stores from other SLP instances.
19253 2023-08-25 Richard Biener <rguenther@suse.de>
19255 * tree-vect-data-refs.cc (vect_slp_analyze_store_dependences):
19256 Split out from vect_slp_analyze_node_dependences, remove
19258 (vect_slp_analyze_load_dependences): Split out from
19259 vect_slp_analyze_node_dependences, adjust comments. Process
19260 queued stores before any disambiguation.
19261 (vect_slp_analyze_node_dependences): Remove.
19262 (vect_slp_analyze_instance_dependence): Adjust.
19264 2023-08-25 Aldy Hernandez <aldyh@redhat.com>
19266 * range-op-float.cc (frelop_early_resolve): Rewrite for better NAN
19268 (operator_not_equal::fold_range): Adjust for relations.
19269 (operator_lt::fold_range): Same.
19270 (operator_gt::fold_range): Same.
19271 (foperator_unordered_equal::fold_range): Same.
19272 (foperator_unordered_lt::fold_range): Same.
19273 (foperator_unordered_le::fold_range): Same.
19274 (foperator_unordered_gt::fold_range): Same.
19275 (foperator_unordered_ge::fold_range): Same.
19277 2023-08-25 Richard Biener <rguenther@suse.de>
19279 PR tree-optimization/111136
19280 * tree-vect-loop.cc (vect_dissolve_slp_only_groups): For
19281 stores force STMT_VINFO_STRIDED_P and also duplicate that
19284 2023-08-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19286 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::compute_local_properties):
19287 Add early continue.
19289 2023-08-25 liuhongt <hongtao.liu@intel.com>
19291 * config/i386/sse.md (vec_set<mode>): Removed.
19292 (V_128H): Merge into ..
19294 (V_256H): Merge into ..
19296 (V_512): Add V32HF, V32BF.
19297 (*ssse3_palignr<mode>_perm): Adjust mode iterator from V_128H
19299 (vcond<mode><sseintvecmodelower>): Removed
19300 (vcondu<mode><sseintvecmodelower>): Removed.
19301 (avx_vbroadcastf128_<mode>): Refator from V_256H to V_256.
19303 2023-08-25 Hongyu Wang <hongyu.wang@intel.com>
19306 * config/i386/sse.md (avx512f_cvtne2ps2bf16_<mode>_maskz):
19307 Adjust paramter order.
19309 2023-08-24 Uros Bizjak <ubizjak@gmail.com>
19312 * config/i386/sse.md (*sse2_movq128_<mode>_1): New insn pattern.
19314 2023-08-24 David Malcolm <dmalcolm@redhat.com>
19317 * doc/invoke.texi (Static Analyzer Options): Add "strcat" to the
19318 list of functions known to the analyzer.
19320 2023-08-24 Richard Biener <rguenther@suse.de>
19322 PR tree-optimization/111123
19323 * tree-ssa-ccp.cc (pass_fold_builtins::execute): Do not
19324 remove indirect clobbers here ...
19325 * tree-outof-ssa.cc (rewrite_out_of_ssa): ... but here.
19326 (remove_indirect_clobbers): New function.
19328 2023-08-24 Jan Hubicka <jh@suse.cz>
19330 * cfg.h (struct control_flow_graph): New field full_profile.
19331 * auto-profile.cc (afdo_annotate_cfg): Set full_profile to true.
19332 * cfg.cc (init_flow): Set full_profile to false.
19333 * graphite.cc (graphite_transform_loops): Set full_profile to false.
19334 * lto-streamer-in.cc (input_cfg): Initialize full_profile flag.
19335 * predict.cc (pass_profile::execute): Set full_profile to true.
19336 * symtab-thunks.cc (expand_thunk): Set full_profile to true.
19337 * tree-cfg.cc (gimple_verify_flow_info): Verify that profile is full
19338 if full_profile is set.
19339 * tree-inline.cc (initialize_cfun): Initialize full_profile.
19340 (expand_call_inline): Combine full_profile.
19342 2023-08-24 Richard Biener <rguenther@suse.de>
19344 * tree-vect-slp.cc (vect_build_slp_tree_1): Rename
19345 load_p to ldst_p, fix mistakes and rely on
19346 STMT_VINFO_DATA_REF.
19348 2023-08-24 Jan Hubicka <jh@suse.cz>
19350 * gimple-harden-conditionals.cc (insert_check_and_trap): Set count
19351 of newly build trap bb.
19353 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19355 * config/riscv/riscv.cc (riscv_preferred_else_value): Remove it since
19356 it forbid COND_LEN_FMS/COND_LEN_FNMS STMT fold.
19357 (TARGET_PREFERRED_ELSE_VALUE): Ditto.
19359 2023-08-24 Robin Dapp <rdapp.gcc@gmail.com>
19361 * common/config/riscv/riscv-common.cc: Add -fsched-pressure.
19362 * config/riscv/riscv.cc (riscv_option_override): Set sched
19363 pressure algorithm.
19365 2023-08-24 Robin Dapp <rdapp@ventanamicro.com>
19367 * config/riscv/riscv.cc (riscv_print_operand): Allow vk operand.
19369 2023-08-24 Richard Biener <rguenther@suse.de>
19371 PR tree-optimization/111125
19372 * tree-vect-slp.cc (vect_slp_function): Split at novector
19373 loop entry, do not push blocks in novector loops.
19375 2023-08-24 Richard Sandiford <richard.sandiford@arm.com>
19377 * doc/extend.texi: Document the C [[__extension__ ...]] construct.
19379 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19381 * genmatch.cc (decision_tree::gen): Support
19382 COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS gimple fold.
19383 * gimple-match-exports.cc (gimple_simplify): Ditto.
19384 (gimple_resimplify6): New function.
19385 (gimple_resimplify7): New function.
19386 (gimple_match_op::resimplify): Support
19387 COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS gimple fold.
19388 (convert_conditional_op): Ditto.
19389 (build_call_internal): Ditto.
19390 (try_conditional_simplification): Ditto.
19391 (gimple_extract): Ditto.
19392 * gimple-match.h (gimple_match_cond::gimple_match_cond): Ditto.
19393 * internal-fn.cc (CASE): Ditto.
19395 2023-08-24 Richard Biener <rguenther@suse.de>
19397 PR tree-optimization/111115
19398 * tree-vectorizer.h (vect_slp_child_index_for_operand): New.
19399 * tree-vect-data-refs.cc (can_group_stmts_p): Also group
19401 * tree-vect-slp.cc (arg3_arg2_map): New.
19402 (vect_get_operand_map): Handle IFN_MASK_STORE.
19403 (vect_slp_child_index_for_operand): New function.
19404 (vect_build_slp_tree_1): Handle statements with no LHS,
19406 (vect_remove_slp_scalar_calls): Likewise.
19407 * tree-vect-stmts.cc (vect_check_store_rhs): Lookup the
19408 SLP child corresponding to the ifn value index.
19409 (vectorizable_store): Likewise for the mask index. Support
19411 (vectorizable_load): Lookup the SLP child corresponding to the
19414 2023-08-24 Richard Biener <rguenther@suse.de>
19416 PR tree-optimization/111125
19417 * tree-vect-slp.cc (vectorizable_bb_reduc_epilogue): Account
19418 for the remain_defs processing.
19420 2023-08-24 Richard Sandiford <richard.sandiford@arm.com>
19422 * config/aarch64/aarch64.cc: Include ssa.h.
19423 (aarch64_multiply_add_p): Require the second operand of an
19424 Advanced SIMD subtraction to be a multiplication. Assume that
19425 such an operation won't be fused if the second operand is used
19426 multiple times and if the first operand is also a multiplication.
19428 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19430 * tree-vect-loop.cc (vectorizable_reduction): Apply
19431 LEN_FOLD_EXTRACT_LAST.
19432 * tree-vect-stmts.cc (vectorizable_condition): Ditto.
19434 2023-08-24 Richard Biener <rguenther@suse.de>
19436 PR tree-optimization/111128
19437 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
19438 Emit external shift operand inline if we promoted it with
19439 another pattern stmt.
19441 2023-08-24 Pan Li <pan2.li@intel.com>
19443 * config/riscv/autovec.md: Fix typo.
19445 2023-08-24 Pan Li <pan2.li@intel.com>
19447 * config/riscv/riscv-vector-builtins-bases.cc
19448 (class binop_frm): Removed.
19449 (class reverse_binop_frm): Ditto.
19450 (class widen_binop_frm): Ditto.
19451 (class vfmacc_frm): Ditto.
19452 (class vfnmacc_frm): Ditto.
19453 (class vfmsac_frm): Ditto.
19454 (class vfnmsac_frm): Ditto.
19455 (class vfmadd_frm): Ditto.
19456 (class vfnmadd_frm): Ditto.
19457 (class vfmsub_frm): Ditto.
19458 (class vfnmsub_frm): Ditto.
19459 (class vfwmacc_frm): Ditto.
19460 (class vfwnmacc_frm): Ditto.
19461 (class vfwmsac_frm): Ditto.
19462 (class vfwnmsac_frm): Ditto.
19463 (class unop_frm): Ditto.
19464 (class vfrec7_frm): Ditto.
19465 (class binop): Add frm_op_type template arg.
19466 (class unop): Ditto.
19467 (class widen_binop): Ditto.
19468 (class widen_binop_fp): Ditto.
19469 (class reverse_binop): Ditto.
19470 (class vfmacc): Ditto.
19471 (class vfnmsac): Ditto.
19472 (class vfmadd): Ditto.
19473 (class vfnmsub): Ditto.
19474 (class vfnmacc): Ditto.
19475 (class vfmsac): Ditto.
19476 (class vfnmadd): Ditto.
19477 (class vfmsub): Ditto.
19478 (class vfwmacc): Ditto.
19479 (class vfwnmacc): Ditto.
19480 (class vfwmsac): Ditto.
19481 (class vfwnmsac): Ditto.
19482 (class float_misc): Ditto.
19484 2023-08-24 Andrew Pinski <apinski@marvell.com>
19486 PR tree-optimization/111109
19487 * match.pd (ior(cond,cond), ior(vec_cond,vec_cond)):
19488 Add check to make sure cmp and icmp are inverse.
19490 2023-08-24 Andrew Pinski <apinski@marvell.com>
19492 PR tree-optimization/95929
19493 * match.pd (convert?(-a)): New pattern
19494 for 1bit integer types.
19496 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
19499 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
19501 * common/config/i386/cpuinfo.h (get_available_features):
19502 Add avx10_set and version and detect avx10.1.
19503 (cpu_indicator_init): Handle avx10.1-512.
19504 * common/config/i386/i386-common.cc
19505 (OPTION_MASK_ISA2_AVX10_512BIT_SET): New.
19506 (OPTION_MASK_ISA2_AVX10_1_SET): Ditto.
19507 (OPTION_MASK_ISA2_AVX10_512BIT_UNSET): Ditto.
19508 (OPTION_MASK_ISA2_AVX10_1_UNSET): Ditto.
19509 (OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10_1.
19510 (ix86_handle_option): Handle -mavx10.1, -mavx10.1-256 and
19512 * common/config/i386/i386-cpuinfo.h (enum processor_features):
19513 Add FEATURE_AVX10_512BIT, FEATURE_AVX10_1 and
19514 FEATURE_AVX10_512BIT.
19515 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
19516 AVX10_512BIT, AVX10_1 and AVX10_1_512.
19517 * config/i386/constraints.md (Yk): Add AVX10_1.
19520 * config/i386/cpuid.h (bit_AVX10): New.
19521 (bit_AVX10_256): Ditto.
19522 (bit_AVX10_512): Ditto.
19523 * config/i386/i386-c.cc (ix86_target_macros_internal):
19524 Define AVX10_512BIT and AVX10_1.
19525 * config/i386/i386-isa.def
19526 (AVX10_512BIT): Add DEF_PTA(AVX10_512BIT).
19527 (AVX10_1): Add DEF_PTA(AVX10_1).
19528 * config/i386/i386-options.cc (isa2_opts): Add -mavx10.1.
19529 (ix86_valid_target_attribute_inner_p): Handle avx10-512bit, avx10.1
19531 (ix86_option_override_internal): Enable AVX512{F,VL,BW,DQ,CD,BF16,
19532 FP16,VBMI,VBMI2,VNNI,IFMA,BITALG,VPOPCNTDQ} features for avx10.1-512.
19533 (ix86_valid_target_attribute_inner_p): Handle AVX10_1.
19534 * config/i386/i386.cc (ix86_get_ssemov): Add AVX10_1.
19535 (ix86_conditional_register_usage): Ditto.
19536 (ix86_hard_regno_mode_ok): Ditto.
19537 (ix86_rtx_costs): Ditto.
19538 * config/i386/i386.h (VALID_MASK_AVX10_MODE): New macro.
19539 * config/i386/i386.opt: Add option -mavx10.1, -mavx10.1-256 and
19541 * doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512.
19542 * doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512.
19543 * doc/sourcebuild.texi: Document target avx10.1, avx10.1-256
19546 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
19549 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
19551 * common/config/i386/i386-common.cc
19552 (ix86_check_avx10): New function to check isa_flags and
19553 isa_flags_explicit to emit warning when AVX10 is enabled
19555 (ix86_check_avx512): New function to check isa_flags and
19556 isa_flags_explicit to emit warning when AVX512 is enabled
19558 (ix86_handle_option): Do not change the flags when warning
19560 * config/i386/driver-i386.cc (host_detect_local_cpu):
19561 Do not append -mno-avx10.1 for -march=native.
19563 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
19566 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
19568 * common/config/i386/i386-common.cc
19569 (ix86_check_avx10_vector_width): New function to check isa_flags
19570 to emit a warning when there is a conflict in AVX10 options for
19572 (ix86_handle_option): Add check for avx10.1-256 and avx10.1-512.
19573 * config/i386/driver-i386.cc (host_detect_local_cpu):
19574 Do not append -mno-avx10-max-512bit for -march=native.
19576 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
19579 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
19581 * config/i386/avx512vldqintrin.h: Remove target attribute.
19582 * config/i386/i386-builtin.def (BDESC):
19583 Add OPTION_MASK_ISA2_AVX10_1.
19584 * config/i386/i386-builtins.cc (def_builtin): Handle AVX10_1.
19585 * config/i386/i386-expand.cc
19586 (ix86_check_builtin_isa_match): Ditto.
19587 (ix86_expand_sse2_mulvxdi3): Add TARGET_AVX10_1.
19588 * config/i386/i386.md: Add new isa attribute avx10_1_or_avx512dq
19589 and avx10_1_or_avx512vl.
19590 * config/i386/sse.md: (VF2_AVX512VLDQ_AVX10_1): New.
19591 (VF1_128_256VLDQ_AVX10_1): Ditto.
19592 (VI8_AVX512VLDQ_AVX10_1): Ditto.
19593 (<sse>_andnot<mode>3<mask_name>):
19594 Add TARGET_AVX10_1 and change isa attr from avx512dq to
19595 avx10_1_or_avx512dq.
19596 (*andnot<mode>3): Add TARGET_AVX10_1 and change isa attr from
19597 avx512vl to avx10_1_or_avx512vl.
19598 (fix<fixunssuffix>_trunc<mode><sseintvecmodelower>2<mask_name><round_saeonly_name>):
19599 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
19600 (fix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
19602 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
19604 (fix<fixunssuffix>_trunc<mode><sselongvecmodelower>2<mask_name><round_saeonly_name>):
19605 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
19606 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
19607 Add TARGET_AVX10_1.
19608 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
19609 (cond_mul<mode>): Change iterator to VI8_AVX10_1_AVX512DQVL.
19610 Remove target check.
19611 (avx512dq_mul<mode>3<mask_name>): Ditto.
19612 (*avx512dq_mul<mode>3<mask_name>): Ditto.
19613 (VI4F_BRCST32x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
19614 (<mask_codefor>avx512dq_broadcast<mode><mask_name>):
19615 Remove target check.
19616 (VI8F_BRCST64x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
19617 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1):
19618 Remove target check.
19619 * config/i386/subst.md (mask_mode512bit_condition): Add TARGET_AVX10_1.
19620 (mask_avx512vl_condition): Ditto.
19623 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
19626 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
19628 * config/i386/avx512vldqintrin.h: Remove target attribute.
19629 * config/i386/i386-builtin.def (BDESC):
19630 Add OPTION_MASK_ISA2_AVX10_1.
19631 * config/i386/i386.cc (standard_sse_constant_opcode): Add TARGET_AVX10_1.
19632 * config/i386/sse.md: (VI48_AVX512VL_AVX10_1): New.
19633 (VI48_AVX512VLDQ_AVX10_1): Ditto.
19634 (VF2_AVX512VL): Remove.
19635 (VI8_256_512VLDQ_AVX10_1): Rename from VI8_256_512.
19636 Add TARGET_AVX10_1.
19637 (*<code><mode>3<mask_name>): Change isa attribute to
19638 avx10_1_or_avx512dq. Add TARGET_AVX10_1.
19639 (<code><mode>3): Add TARGET_AVX10_1. Change isa attr
19640 to avx10_1_or_avx512vl.
19641 (<mask_codefor>avx512dq_cvtps2qq<mode><mask_name><round_name>):
19642 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
19643 (<mask_codefor>avx512dq_cvtps2qqv2di<mask_name>):
19644 Add TARGET_AVX10_1.
19645 (<mask_codefor>avx512dq_cvtps2uqq<mode><mask_name><round_name>):
19646 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
19647 (<mask_codefor>avx512dq_cvtps2uqqv2di<mask_name>):
19648 Add TARGET_AVX10_1.
19649 (float<floatunssuffix><sseintvecmodelower><mode>2<mask_name><round_name>):
19650 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
19651 (float<floatunssuffix><sselongvecmodelower><mode>2<mask_name><round_name>):
19652 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
19653 (float<floatunssuffix>v4div4sf2<mask_name>):
19654 Add TARGET_AVX10_1.
19655 (avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
19656 (*avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
19657 (float<floatunssuffix>v2div2sf2): Ditto.
19658 (float<floatunssuffix>v2div2sf2_mask): Ditto.
19659 (*float<floatunssuffix>v2div2sf2_mask): Ditto.
19660 (*float<floatunssuffix>v2div2sf2_mask_1): Ditto.
19661 (<avx512>_cvt<ssemodesuffix>2mask<mode>):
19662 Change iterator to VI48_AVX512VLDQ_AVX10_1. Remove target check.
19663 (<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
19664 (*<avx512>_cvtmask2<ssemodesuffix><mode>):
19665 Change iterator to VI48_AVX512VL_AVX10_1. Remove target check.
19666 Change when constraint is enabled.
19668 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
19671 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
19673 * config/i386/avx512vldqintrin.h: Remove target attribute.
19674 * config/i386/i386-builtin.def (BDESC):
19675 Add OPTION_MASK_ISA2_AVX10_1.
19676 * config/i386/sse.md (VF_AVX512VLDQ_AVX10_1): New.
19677 (VFH_AVX512VLDQ_AVX10_1): Ditto.
19678 (VF1_AVX512VLDQ_AVX10_1): Ditto.
19679 (<mask_codefor>reducep<mode><mask_name><round_saeonly_name>):
19680 Change iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
19681 (vec_pack<floatprefix>_float_<mode>): Change iterator to
19682 VI8_AVX512VLDQ_AVX10_1. Remove target check.
19683 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Change iterator to
19684 VF1_AVX512VLDQ_AVX10_1. Remove target check.
19685 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
19686 (VI48F_256_DQVL_AVX10_1): Rename from VI48F_256_DQ.
19687 (avx512vl_vextractf128<mode>): Change iterator to
19688 VI48F_256_DQVL_AVX10_1. Remove target check.
19689 (vec_extract_hi_<mode>_mask): Add TARGET_AVX10_1.
19690 (vec_extract_hi_<mode>): Ditto.
19691 (avx512vl_vinsert<mode>): Ditto.
19692 (vec_set_lo_<mode><mask_name>): Ditto.
19693 (vec_set_hi_<mode><mask_name>): Ditto.
19694 (avx512dq_rangep<mode><mask_name><round_saeonly_name>): Change
19695 iterator to VF_AVX512VLDQ_AVX10_1. Remove target check.
19696 (avx512dq_fpclass<mode><mask_scalar_merge_name>): Change
19697 iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
19698 * config/i386/subst.md (mask_avx512dq_condition): Add
19700 (mask_scalar_merge): Ditto.
19702 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
19705 2023-08-18 Haochen Jiang <haochen.jiang@intel.com>
19708 * config/i386/avx512vldqintrin.h: Push AVX2 when AVX2 is
19711 2023-08-24 Richard Biener <rguenther@suse.de>
19714 * dwarf2out.cc (prune_unused_types_walk): Handle
19715 DW_TAG_restrict_type, DW_TAG_shared_type, DW_TAG_atomic_type,
19716 DW_TAG_immutable_type, DW_TAG_coarray_type, DW_TAG_unspecified_type
19717 and DW_TAG_dynamic_type as to only output them when referenced.
19719 2023-08-24 liuhongt <hongtao.liu@intel.com>
19721 * config/i386/i386.cc (ix86_invalid_conversion): Adjust GCC
19724 2023-08-24 liuhongt <hongtao.liu@intel.com>
19726 * common/config/i386/i386-common.cc (processor_names): Add new
19727 member graniterapids-s and arrowlake-s.
19728 * config/i386/i386-options.cc (processor_alias_table): Update
19729 table with PROCESSOR_ARROWLAKE_S and
19730 PROCESSOR_GRANITERAPIDS_D.
19731 (m_GRANITERAPID_D): New macro.
19732 (m_ARROWLAKE_S): Ditto.
19733 (m_CORE_AVX512): Add m_GRANITERAPIDS_D.
19734 (processor_cost_table): Add icelake_cost for
19735 PROCESSOR_GRANITERAPIDS_D and alderlake_cost for
19736 PROCESSOR_ARROWLAKE_S.
19737 * config/i386/x86-tune.def: Hanlde m_ARROWLAKE_S same as
19739 * config/i386/i386.h (enum processor_type): Add new member
19740 PROCESSOR_GRANITERAPIDS_D and PROCESSOR_ARROWLAKE_S.
19741 * config/i386/i386-c.cc (ix86_target_macros_internal): Handle
19742 PROCESSOR_GRANITERAPIDS_D and PROCESSOR_ARROWLAKE_S
19744 2023-08-23 Jivan Hakobyan <jivanhakobyan9@gmail.com>
19746 * lra-eliminations.cc (eliminate_regs_in_insn): Use equivalences to
19747 to help simplify code further.
19749 2023-08-23 Andrew MacLeod <amacleod@redhat.com>
19751 * gimple-range-fold.cc (fold_using_range::range_of_phi): Tweak output.
19752 * gimple-range-phi.cc (phi_group::phi_group): Remove unused members.
19753 Initialize using a range instead of value and edge.
19754 (phi_group::calculate_using_modifier): Use initializer value and
19755 process for relations after trying for iteration convergence.
19756 (phi_group::refine_using_relation): Use initializer range.
19757 (phi_group::dump): Rework the dump output.
19758 (phi_analyzer::process_phi): Allow multiple constant initilizers.
19759 Dump groups immediately as created.
19760 (phi_analyzer::dump): Tweak output.
19761 * gimple-range-phi.h (phi_group::phi_group): Adjust prototype.
19762 (phi_group::initial_value): Delete.
19763 (phi_group::refine_using_relation): Adjust prototype.
19764 (phi_group::m_initial_value): Delete.
19765 (phi_group::m_initial_edge): Delete.
19766 (phi_group::m_vr): Use int_range_max.
19767 * tree-vrp.cc (execute_ranger_vrp): Don't dump phi groups.
19769 2023-08-23 Andrew MacLeod <amacleod@redhat.com>
19771 * gimple-range-phi.cc (phi_analyzer::operator[]): Return NULL if
19772 no group was created.
19773 (phi_analyzer::process_phi): Do not create groups of one phi node.
19775 2023-08-23 Richard Earnshaw <rearnsha@arm.com>
19777 * target.def (gen_ccmp_first, gen_ccmp_next): Use rtx_code for
19778 CODE, CMP_CODE and BIT_CODE arguments.
19779 * config/aarch64/aarch64.cc (aarch64_gen_ccmp_first): Likewise.
19780 (aarch64_gen_ccmp_next): Likewise.
19781 * doc/tm.texi: Regenerated.
19783 2023-08-23 Richard Earnshaw <rearnsha@arm.com>
19785 * coretypes.h (rtx_code): Add forward declaration.
19786 * rtl.h (rtx_code): Make compatible with forward declaration.
19788 2023-08-23 Uros Bizjak <ubizjak@gmail.com>
19791 * config/i386/i386.md (*concat<any_or_plus:mode><dwi>3_3):
19792 Merge pattern from *concatditi3_3 and *concatsidi3_3 using
19793 DWIH mode iterator. Disable (=&r,m,m) alternative for
19795 (*concat<any_or_plus:mode><dwi>3_3): Disable (=&r,m,m)
19796 alternative for 32-bit targets.
19798 2023-08-23 Zhangjin Liao <liaozhangjin@eswincomputing.com>
19800 * config/riscv/bitmanip.md (*<bitmanip_optab>disi2_sext): Add a more
19801 appropriate type attribute.
19803 2023-08-23 Lehua Ding <lehua.ding@rivai.ai>
19805 * config/riscv/autovec-opt.md (*cond_abs<mode>): New combine pattern.
19806 (*copysign<mode>_neg): Ditto.
19807 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): Adjust.
19808 (<optab><mode>2): Ditto.
19809 (cond_<optab><mode>): New.
19810 (cond_len_<optab><mode>): Ditto.
19811 * config/riscv/riscv-protos.h (enum insn_type): New.
19812 (expand_cond_len_unop): New helper func.
19813 * config/riscv/riscv-v.cc (shuffle_merge_patterns): Adjust.
19814 (expand_cond_len_unop): New helper func.
19816 2023-08-23 Jan Hubicka <jh@suse.cz>
19818 * tree-ssa-loop-ch.cc (enum ch_decision): Fix comment.
19819 (should_duplicate_loop_header_p): Fix return value for static exits.
19820 (ch_base::copy_headers): Improve handling of ch_possible_zero_cost.
19822 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
19824 * tree-vect-stmts.cc (vectorizable_store): Move the handlings on
19825 VMAT_GATHER_SCATTER in the final loop nest to its own loop,
19826 and update the final nest accordingly.
19828 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
19830 * tree-vect-stmts.cc (vectorizable_store): Move the handlings on
19831 VMAT_LOAD_STORE_LANES in the final loop nest to its own loop,
19832 and update the final nest accordingly.
19834 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
19836 * tree-vect-stmts.cc (vectorizable_store): Remove vec oprnds,
19837 adjust vec result_chain, vec_oprnd with auto_vec, and adjust
19838 gvec_oprnds with auto_delete_vec.
19840 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19842 * config/riscv/riscv-vsetvl.cc
19843 (pass_vsetvl::global_eliminate_vsetvl_insn): Fix potential ICE.
19845 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19847 * config/riscv/riscv-vsetvl.cc (ge_sew_ratio_unavailable_p):
19849 * config/riscv/riscv-vsetvl.def (DEF_SEW_LMUL_FUSE_RULE): Ditto.
19851 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19853 * config/riscv/vector.md: Add attribute.
19855 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19857 * config/riscv/riscv-vsetvl.cc (change_insn): Clang format.
19858 (vector_infos_manager::all_same_ratio_p): Ditto.
19859 (vector_infos_manager::all_same_avl_p): Ditto.
19860 (pass_vsetvl::refine_vsetvls): Ditto.
19861 (pass_vsetvl::cleanup_vsetvls): Ditto.
19862 (pass_vsetvl::commit_vsetvls): Ditto.
19863 (pass_vsetvl::local_eliminate_vsetvl_insn): Ditto.
19864 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
19865 (pass_vsetvl::compute_probabilities): Ditto.
19867 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19869 * config/riscv/t-riscv: Add riscv-vsetvl.def
19871 2023-08-22 Vineet Gupta <vineetg@rivosinc.com>
19873 * config/riscv/riscv.opt: Add --param names
19874 riscv-autovec-preference and riscv-autovec-lmul
19876 2023-08-22 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
19878 * config/riscv/t-linux: Add MULTIARCH_DIRNAME.
19880 2023-08-22 Tobias Burnus <tobias@codesourcery.com>
19882 * tree-core.h (enum omp_clause_defaultmap_kind): Add
19883 OMP_CLAUSE_DEFAULTMAP_CATEGORY_ALL.
19884 * gimplify.cc (gimplify_scan_omp_clauses): Handle it.
19885 * tree-pretty-print.cc (dump_omp_clause): Likewise.
19887 2023-08-22 Jakub Jelinek <jakub@redhat.com>
19890 * doc/extend.texi (_Float<n>): Drop obsolete sentence that the
19891 types aren't supported in C++.
19893 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19895 * doc/md.texi: Add LEN_FOLD_EXTRACT_LAST pattern.
19896 * internal-fn.cc (fold_len_extract_direct): Ditto.
19897 (expand_fold_len_extract_optab_fn): Ditto.
19898 (direct_fold_len_extract_optab_supported_p): Ditto.
19899 * internal-fn.def (LEN_FOLD_EXTRACT_LAST): Ditto.
19900 * optabs.def (OPTAB_D): Ditto.
19902 2023-08-22 Richard Biener <rguenther@suse.de>
19904 * tree-vect-stmts.cc (vectorizable_store): Do not bump
19905 DR_GROUP_STORE_COUNT here. Remove early out.
19906 (vect_transform_stmt): Only call vectorizable_store on
19907 the last element of an interleaving chain.
19909 2023-08-22 Richard Biener <rguenther@suse.de>
19911 PR tree-optimization/94864
19912 PR tree-optimization/94865
19913 PR tree-optimization/93080
19914 * match.pd (bit_insert @0 (BIT_FIELD_REF @1 ..) ..): New pattern
19915 for vector insertion from vector extraction.
19917 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19918 Kewen.Lin <linkw@linux.ibm.com>
19920 * tree-vect-loop.cc (vect_verify_loop_lens): Add exists check.
19921 (vectorizable_live_operation): Add live vectorization for length loop
19924 2023-08-22 David Malcolm <dmalcolm@redhat.com>
19927 * doc/invoke.texi: Remove -Wanalyzer-unterminated-string.
19929 2023-08-22 Pan Li <pan2.li@intel.com>
19931 * config/riscv/riscv-vector-builtins-bases.cc
19932 (vfwredusum_frm_obj): New declaration.
19934 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
19935 * config/riscv/riscv-vector-builtins-functions.def
19936 (vfwredusum_frm): New intrinsic function def.
19938 2023-08-21 David Faust <david.faust@oracle.com>
19940 * config/bpf/bpf.md (neg): Second operand must be a register.
19942 2023-08-21 Edwin Lu <ewlu@rivosinc.com>
19944 * config/riscv/bitmanip.md: Added bitmanip type to insns
19945 that are missing types.
19947 2023-08-21 Jeff Law <jlaw@ventanamicro.com>
19949 * config/riscv/sync-ztso.md (atomic_load_ztso<mode>): Avoid extraenous
19952 2023-08-21 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
19954 * config/aarch64/falkor-tag-collision-avoidance.cc (dump_insn_list):
19955 Fix format specifier.
19957 2023-08-21 Aldy Hernandez <aldyh@redhat.com>
19959 * value-range.cc (frange::union_nans): Return false if nothing
19961 (range_tests_floats): New test.
19963 2023-08-21 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
19965 PR tree-optimization/111048
19966 * fold-const.cc (valid_mask_for_fold_vec_perm_cst_p): Set arg_npatterns
19968 (fold_vec_perm_cst): Remove workaround and again call
19969 valid_mask_fold_vec_perm_cst_p for both VLS and VLA vectors.
19970 (test_fold_vec_perm_cst::test_nunits_min_4): Add test-case.
19972 2023-08-21 Richard Biener <rguenther@suse.de>
19974 PR tree-optimization/111082
19975 * tree-vect-slp.cc (vectorize_slp_instance_root_stmt): Only
19976 pun operations that can overflow.
19978 2023-08-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19980 * lcm.cc (compute_antinout_edge): Export as global use.
19981 (compute_earliest): Ditto.
19982 (compute_rev_insert_delete): Ditto.
19983 * lcm.h (compute_antinout_edge): Ditto.
19984 (compute_earliest): Ditto.
19986 2023-08-21 Richard Biener <rguenther@suse.de>
19988 PR tree-optimization/111070
19989 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Check we have
19990 an SSA name before checking SSA_NAME_OCCURS_IN_ABNORMAL_PHI.
19992 2023-08-21 Andrew Pinski <apinski@marvell.com>
19994 PR tree-optimization/111002
19995 * match.pd (view_convert(vec_cond(a,b,c))): New pattern.
19997 2023-08-21 liuhongt <hongtao.liu@intel.com>
19999 * common/config/i386/cpuinfo.h (get_intel_cpu): Detect
20001 * common/config/i386/i386-common.cc (alias_table): Support
20002 -march=gracemont as an alias of -march=alderlake.
20004 2023-08-20 Uros Bizjak <ubizjak@gmail.com>
20006 * config/i386/i386-expand.cc (ix86_expand_sse_extend): Use ops[1]
20007 instead of src in the call to ix86_expand_sse_cmp.
20008 * config/i386/sse.md (<any_extend:insn>v8qiv8hi2): Do not
20009 force operands[1] to a register.
20010 (<any_extend:insn>v4hiv4si2): Ditto.
20011 (<any_extend:insn>v2siv2di2): Ditto.
20013 2023-08-20 Andrew Pinski <apinski@marvell.com>
20015 PR tree-optimization/111006
20016 PR tree-optimization/110986
20017 * match.pd: (op(vec_cond(a,b,c))): Handle convert for op.
20019 2023-08-20 Eric Gallager <egallager@gcc.gnu.org>
20022 * Makefile.in: improve error message when /usr/include is
20025 2023-08-19 Tobias Burnus <tobias@codesourcery.com>
20027 PR middle-end/111017
20028 * omp-expand.cc (expand_omp_for_init_vars): Pass after=true
20029 to expand_omp_build_cond for 'factor != 0' condition, resulting
20030 in pre-r12-5295-g47de0b56ee455e code for the gimple insert.
20032 2023-08-19 Guo Jie <guojie@loongson.cn>
20033 Lulu Cheng <chenglulu@loongson.cn>
20035 * config/loongarch/t-loongarch: Add loongarch-driver.h into
20036 TM_H. Add loongarch-def.h and loongarch-tune.h into
20039 2023-08-18 Uros Bizjak <ubizjak@gmail.com>
20042 * config/i386/i386-expand.cc (ix86_split_mmx_punpck):
20043 Also handle V2QImode.
20044 (ix86_expand_sse_extend): New function.
20045 * config/i386/i386-protos.h (ix86_expand_sse_extend): New prototype.
20046 * config/i386/mmx.md (<any_extend:insn>v4qiv4hi2): Enable for
20047 TARGET_SSE2. Expand through ix86_expand_sse_extend for !TARGET_SSE4_1.
20048 (<any_extend:insn>v2hiv2si2): Ditto.
20049 (<any_extend:insn>v2qiv2hi2): Ditto.
20050 * config/i386/sse.md (<any_extend:insn>v8qiv8hi2): Ditto.
20051 (<any_extend:insn>v4hiv4si2): Ditto.
20052 (<any_extend:insn>v2siv2di2): Ditto.
20054 2023-08-18 Aldy Hernandez <aldyh@redhat.com>
20057 * value-range.cc (irange::union_bitmask): Return FALSE if updated
20058 bitmask is semantically equivalent to the original mask.
20059 (irange::intersect_bitmask): Same.
20060 (irange::get_bitmask): Add comment.
20062 2023-08-18 Richard Biener <rguenther@suse.de>
20064 PR tree-optimization/111019
20065 * tree-ssa-loop-im.cc (gather_mem_refs_stmt): When canonicalizing
20066 also scrap base and offset in case the ref is indirect.
20068 2023-08-18 Jose E. Marchesi <jose.marchesi@oracle.com>
20070 * config/bpf/bpf.opt (mframe-limit): Set default to 32767.
20072 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
20074 PR bootstrap/111021
20075 * Makefile.in (TM_P_H): Add $(TREE_H) as dependence.
20077 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
20079 * tree-vect-stmts.cc (vect_build_scatter_store_calls): New, factor
20081 (vectorizable_store): ... here.
20083 2023-08-18 Richard Biener <rguenther@suse.de>
20085 PR tree-optimization/111048
20086 * fold-const.cc (fold_vec_perm_cst): Check for non-VLA
20089 2023-08-18 Haochen Jiang <haochen.jiang@intel.com>
20092 * config/i386/avx512vldqintrin.h: Push AVX2 when AVX2 is
20095 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
20097 * tree-vect-stmts.cc (vectorizable_load): Move the handlings on
20098 VMAT_GATHER_SCATTER in the final loop nest to its own loop,
20099 and update the final nest accordingly.
20101 2023-08-18 Andrew Pinski <apinski@marvell.com>
20103 * doc/md.texi (Standard patterns): Document cond_neg, cond_one_cmpl,
20104 cond_len_neg and cond_len_one_cmpl.
20106 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
20108 * config/riscv/iterators.md (TARGET_HARD_FLOAT || TARGET_ZFINX): New.
20109 * config/riscv/pic.md (*local_pic_load<ANYF:mode>): Change ANYF.
20110 (*local_pic_load<ANYLSF:mode>): To ANYLSF.
20111 (*local_pic_load_32d<ANYF:mode>): Ditto.
20112 (*local_pic_load_32d<ANYLSF:mode>): Ditto.
20113 (*local_pic_store<ANYF:mode>): Ditto.
20114 (*local_pic_store<ANYLSF:mode>): Ditto.
20115 (*local_pic_store_32d<ANYF:mode>): Ditto.
20116 (*local_pic_store_32d<ANYLSF:mode>): Ditto.
20118 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
20119 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
20121 * config/riscv/predicates.md (vector_const_0_operand): New.
20122 * config/riscv/vector.md (*pred_broadcast<mode>_zero): Ditto.
20124 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
20126 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::backward_demand_fusion):
20129 2023-08-17 Andrew MacLeod <amacleod@redhat.com>
20131 PR tree-optimization/111009
20132 * range-op.cc (operator_addr_expr::op1_range): Be more restrictive.
20134 2023-08-17 Vladimir N. Makarov <vmakarov@redhat.com>
20136 * lra-spills.cc (assign_stack_slot_num_and_sort_pseudos): Moving
20137 slots_num initialization from here ...
20138 (lra_spill): ... to here before the 1st call of
20139 assign_stack_slot_num_and_sort_pseudos. Add the 2nd call after
20140 fp->sp elimination.
20142 2023-08-17 Jose E. Marchesi <jose.marchesi@oracle.com>
20145 * doc/invoke.texi (Option Summary): Mention
20146 -Wcompare-distinct-pointer-types under `Warning Options'.
20147 (Warning Options): Document -Wcompare-distinct-pointer-types.
20149 2023-08-17 Jan-Benedict Glaw <jbglaw@lug-owl.de>
20151 * recog.cc (memory_address_addr_space_p): Mark possibly unused
20152 argument as unused.
20154 2023-08-17 Richard Biener <rguenther@suse.de>
20156 PR tree-optimization/111039
20157 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Check for
20158 SSA_NAME_OCCURS_IN_ABNORMAL_PHI.
20160 2023-08-17 Alex Coplan <alex.coplan@arm.com>
20162 * doc/rtl.texi: Fix up sample code for RTL-SSA insn changes.
20164 2023-08-17 Jose E. Marchesi <jose.marchesi@oracle.com>
20167 * config/bpf/bpf.cc (bpf_attribute_table): Add entry for the
20168 `naked' function attribute.
20169 (bpf_warn_func_return): New function.
20170 (TARGET_WARN_FUNC_RETURN): Define.
20171 (bpf_expand_prologue): Add preventive comment.
20172 (bpf_expand_epilogue): Likewise.
20173 * doc/extend.texi (BPF Function Attributes): Document the `naked'
20174 function attribute.
20176 2023-08-17 Richard Biener <rguenther@suse.de>
20178 * tree-vect-slp.cc (vect_slp_check_for_roots): Use
20179 !needs_fold_left_reduction_p to decide whether we can
20180 handle the reduction with association.
20181 (vectorize_slp_instance_root_stmt): For TYPE_OVERFLOW_UNDEFINED
20182 reductions perform all arithmetic in an unsigned type.
20184 2023-08-17 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
20186 * configure.ac (gcc_cv_ld64_version): Allow for dyld in ld -v
20188 * configure: Regenerate.
20190 2023-08-17 Pan Li <pan2.li@intel.com>
20192 * config/riscv/riscv-vector-builtins-bases.cc
20193 (widen_freducop): Add frm_opt_type template arg.
20194 (vfwredosum_frm_obj): New declaration.
20196 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
20197 * config/riscv/riscv-vector-builtins-functions.def
20198 (vfwredosum_frm): New intrinsic function def.
20200 2023-08-17 Pan Li <pan2.li@intel.com>
20202 * config/riscv/riscv-vector-builtins-bases.cc
20203 (vfredosum_frm_obj): New declaration.
20205 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
20206 * config/riscv/riscv-vector-builtins-functions.def
20207 (vfredosum_frm): New intrinsic function def.
20209 2023-08-17 Pan Li <pan2.li@intel.com>
20211 * config/riscv/riscv-vector-builtins-bases.cc
20212 (class freducop): Add frm_op_type template arg.
20213 (vfredusum_frm_obj): New declaration.
20215 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
20216 * config/riscv/riscv-vector-builtins-functions.def
20217 (vfredusum_frm): New intrinsic function def.
20218 * config/riscv/riscv-vector-builtins-shapes.cc
20219 (struct reduc_alu_frm_def): New class for frm shape.
20220 (SHAPE): New declaration.
20221 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
20223 2023-08-17 Pan Li <pan2.li@intel.com>
20225 * config/riscv/riscv-vector-builtins-bases.cc
20226 (class vfncvt_f): Add frm_op_type template arg.
20227 (vfncvt_f_frm_obj): New declaration.
20229 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
20230 * config/riscv/riscv-vector-builtins-functions.def
20231 (vfncvt_f_frm): New intrinsic function def.
20233 2023-08-17 Pan Li <pan2.li@intel.com>
20235 * config/riscv/riscv-vector-builtins-bases.cc
20236 (vfncvt_xu_frm_obj): New declaration.
20238 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
20239 * config/riscv/riscv-vector-builtins-functions.def
20240 (vfncvt_xu_frm): New intrinsic function def.
20242 2023-08-17 Pan Li <pan2.li@intel.com>
20244 * config/riscv/riscv-vector-builtins-bases.cc
20245 (class vfncvt_x): Add frm_op_type template arg.
20246 (BASE): New declaration.
20247 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
20248 * config/riscv/riscv-vector-builtins-functions.def
20249 (vfncvt_x_frm): New intrinsic function def.
20250 * config/riscv/riscv-vector-builtins-shapes.cc
20251 (struct narrow_alu_frm_def): New shape function for frm.
20252 (SHAPE): New declaration.
20253 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
20255 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
20257 * config/i386/avx512vldqintrin.h: Remove target attribute.
20258 * config/i386/i386-builtin.def (BDESC):
20259 Add OPTION_MASK_ISA2_AVX10_1.
20260 * config/i386/sse.md (VF_AVX512VLDQ_AVX10_1): New.
20261 (VFH_AVX512VLDQ_AVX10_1): Ditto.
20262 (VF1_AVX512VLDQ_AVX10_1): Ditto.
20263 (<mask_codefor>reducep<mode><mask_name><round_saeonly_name>):
20264 Change iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
20265 (vec_pack<floatprefix>_float_<mode>): Change iterator to
20266 VI8_AVX512VLDQ_AVX10_1. Remove target check.
20267 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Change iterator to
20268 VF1_AVX512VLDQ_AVX10_1. Remove target check.
20269 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
20270 (VI48F_256_DQVL_AVX10_1): Rename from VI48F_256_DQ.
20271 (avx512vl_vextractf128<mode>): Change iterator to
20272 VI48F_256_DQVL_AVX10_1. Remove target check.
20273 (vec_extract_hi_<mode>_mask): Add TARGET_AVX10_1.
20274 (vec_extract_hi_<mode>): Ditto.
20275 (avx512vl_vinsert<mode>): Ditto.
20276 (vec_set_lo_<mode><mask_name>): Ditto.
20277 (vec_set_hi_<mode><mask_name>): Ditto.
20278 (avx512dq_rangep<mode><mask_name><round_saeonly_name>): Change
20279 iterator to VF_AVX512VLDQ_AVX10_1. Remove target check.
20280 (avx512dq_fpclass<mode><mask_scalar_merge_name>): Change
20281 iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
20282 * config/i386/subst.md (mask_avx512dq_condition): Add
20284 (mask_scalar_merge): Ditto.
20286 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
20288 * config/i386/avx512vldqintrin.h: Remove target attribute.
20289 * config/i386/i386-builtin.def (BDESC):
20290 Add OPTION_MASK_ISA2_AVX10_1.
20291 * config/i386/i386.cc (standard_sse_constant_opcode): Add TARGET_AVX10_1.
20292 * config/i386/sse.md: (VI48_AVX512VL_AVX10_1): New.
20293 (VI48_AVX512VLDQ_AVX10_1): Ditto.
20294 (VF2_AVX512VL): Remove.
20295 (VI8_256_512VLDQ_AVX10_1): Rename from VI8_256_512.
20296 Add TARGET_AVX10_1.
20297 (*<code><mode>3<mask_name>): Change isa attribute to
20298 avx10_1_or_avx512dq. Add TARGET_AVX10_1.
20299 (<code><mode>3): Add TARGET_AVX10_1. Change isa attr
20300 to avx10_1_or_avx512vl.
20301 (<mask_codefor>avx512dq_cvtps2qq<mode><mask_name><round_name>):
20302 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
20303 (<mask_codefor>avx512dq_cvtps2qqv2di<mask_name>):
20304 Add TARGET_AVX10_1.
20305 (<mask_codefor>avx512dq_cvtps2uqq<mode><mask_name><round_name>):
20306 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
20307 (<mask_codefor>avx512dq_cvtps2uqqv2di<mask_name>):
20308 Add TARGET_AVX10_1.
20309 (float<floatunssuffix><sseintvecmodelower><mode>2<mask_name><round_name>):
20310 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
20311 (float<floatunssuffix><sselongvecmodelower><mode>2<mask_name><round_name>):
20312 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
20313 (float<floatunssuffix>v4div4sf2<mask_name>):
20314 Add TARGET_AVX10_1.
20315 (avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
20316 (*avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
20317 (float<floatunssuffix>v2div2sf2): Ditto.
20318 (float<floatunssuffix>v2div2sf2_mask): Ditto.
20319 (*float<floatunssuffix>v2div2sf2_mask): Ditto.
20320 (*float<floatunssuffix>v2div2sf2_mask_1): Ditto.
20321 (<avx512>_cvt<ssemodesuffix>2mask<mode>):
20322 Change iterator to VI48_AVX512VLDQ_AVX10_1. Remove target check.
20323 (<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
20324 (*<avx512>_cvtmask2<ssemodesuffix><mode>):
20325 Change iterator to VI48_AVX512VL_AVX10_1. Remove target check.
20326 Change when constraint is enabled.
20328 2023-08-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20331 * config/riscv/riscv-vsetvl.cc (float_insn_valid_sew_p): New function.
20332 (second_sew_less_than_first_sew_p): Fix bug.
20333 (first_sew_less_than_second_sew_p): Ditto.
20335 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
20337 * config/i386/avx512vldqintrin.h: Remove target attribute.
20338 * config/i386/i386-builtin.def (BDESC):
20339 Add OPTION_MASK_ISA2_AVX10_1.
20340 * config/i386/i386-builtins.cc (def_builtin): Handle AVX10_1.
20341 * config/i386/i386-expand.cc
20342 (ix86_check_builtin_isa_match): Ditto.
20343 (ix86_expand_sse2_mulvxdi3): Add TARGET_AVX10_1.
20344 * config/i386/i386.md: Add new isa attribute avx10_1_or_avx512dq
20345 and avx10_1_or_avx512vl.
20346 * config/i386/sse.md: (VF2_AVX512VLDQ_AVX10_1): New.
20347 (VF1_128_256VLDQ_AVX10_1): Ditto.
20348 (VI8_AVX512VLDQ_AVX10_1): Ditto.
20349 (<sse>_andnot<mode>3<mask_name>):
20350 Add TARGET_AVX10_1 and change isa attr from avx512dq to
20351 avx10_1_or_avx512dq.
20352 (*andnot<mode>3): Add TARGET_AVX10_1 and change isa attr from
20353 avx512vl to avx10_1_or_avx512vl.
20354 (fix<fixunssuffix>_trunc<mode><sseintvecmodelower>2<mask_name><round_saeonly_name>):
20355 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
20356 (fix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
20358 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
20360 (fix<fixunssuffix>_trunc<mode><sselongvecmodelower>2<mask_name><round_saeonly_name>):
20361 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
20362 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
20363 Add TARGET_AVX10_1.
20364 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
20365 (cond_mul<mode>): Change iterator to VI8_AVX10_1_AVX512DQVL.
20366 Remove target check.
20367 (avx512dq_mul<mode>3<mask_name>): Ditto.
20368 (*avx512dq_mul<mode>3<mask_name>): Ditto.
20369 (VI4F_BRCST32x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
20370 (<mask_codefor>avx512dq_broadcast<mode><mask_name>):
20371 Remove target check.
20372 (VI8F_BRCST64x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
20373 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1):
20374 Remove target check.
20375 * config/i386/subst.md (mask_mode512bit_condition): Add TARGET_AVX10_1.
20376 (mask_avx512vl_condition): Ditto.
20379 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
20381 * common/config/i386/i386-common.cc
20382 (ix86_check_avx10_vector_width): New function to check isa_flags
20383 to emit a warning when there is a conflict in AVX10 options for
20385 (ix86_handle_option): Add check for avx10.1-256 and avx10.1-512.
20386 * config/i386/driver-i386.cc (host_detect_local_cpu):
20387 Do not append -mno-avx10-max-512bit for -march=native.
20389 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
20391 * common/config/i386/i386-common.cc
20392 (ix86_check_avx10): New function to check isa_flags and
20393 isa_flags_explicit to emit warning when AVX10 is enabled
20395 (ix86_check_avx512): New function to check isa_flags and
20396 isa_flags_explicit to emit warning when AVX512 is enabled
20398 (ix86_handle_option): Do not change the flags when warning
20400 * config/i386/driver-i386.cc (host_detect_local_cpu):
20401 Do not append -mno-avx10.1 for -march=native.
20403 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
20405 * common/config/i386/cpuinfo.h (get_available_features):
20406 Add avx10_set and version and detect avx10.1.
20407 (cpu_indicator_init): Handle avx10.1-512.
20408 * common/config/i386/i386-common.cc
20409 (OPTION_MASK_ISA2_AVX10_512BIT_SET): New.
20410 (OPTION_MASK_ISA2_AVX10_1_SET): Ditto.
20411 (OPTION_MASK_ISA2_AVX10_512BIT_UNSET): Ditto.
20412 (OPTION_MASK_ISA2_AVX10_1_UNSET): Ditto.
20413 (OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10_1.
20414 (ix86_handle_option): Handle -mavx10.1, -mavx10.1-256 and
20416 * common/config/i386/i386-cpuinfo.h (enum processor_features):
20417 Add FEATURE_AVX10_512BIT, FEATURE_AVX10_1 and
20418 FEATURE_AVX10_512BIT.
20419 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
20420 AVX10_512BIT, AVX10_1 and AVX10_1_512.
20421 * config/i386/constraints.md (Yk): Add AVX10_1.
20424 * config/i386/cpuid.h (bit_AVX10): New.
20425 (bit_AVX10_256): Ditto.
20426 (bit_AVX10_512): Ditto.
20427 * config/i386/i386-c.cc (ix86_target_macros_internal):
20428 Define AVX10_512BIT and AVX10_1.
20429 * config/i386/i386-isa.def
20430 (AVX10_512BIT): Add DEF_PTA(AVX10_512BIT).
20431 (AVX10_1): Add DEF_PTA(AVX10_1).
20432 * config/i386/i386-options.cc (isa2_opts): Add -mavx10.1.
20433 (ix86_valid_target_attribute_inner_p): Handle avx10-512bit, avx10.1
20435 (ix86_option_override_internal): Enable AVX512{F,VL,BW,DQ,CD,BF16,
20436 FP16,VBMI,VBMI2,VNNI,IFMA,BITALG,VPOPCNTDQ} features for avx10.1-512.
20437 (ix86_valid_target_attribute_inner_p): Handle AVX10_1.
20438 * config/i386/i386.cc (ix86_get_ssemov): Add AVX10_1.
20439 (ix86_conditional_register_usage): Ditto.
20440 (ix86_hard_regno_mode_ok): Ditto.
20441 (ix86_rtx_costs): Ditto.
20442 * config/i386/i386.h (VALID_MASK_AVX10_MODE): New macro.
20443 * config/i386/i386.opt: Add option -mavx10.1, -mavx10.1-256 and
20445 * doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512.
20446 * doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512.
20447 * doc/sourcebuild.texi: Document target avx10.1, avx10.1-256
20450 2023-08-17 Sergei Trofimovich <siarheit@google.com>
20452 * flag-types.h (vrp_mode): Remove unused.
20454 2023-08-17 Yanzhang Wang <yanzhang.wang@intel.com>
20456 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1): Use
20459 2023-08-17 Andrew Pinski <apinski@marvell.com>
20461 * internal-fn.def (COND_NOT): New internal function.
20462 * match.pd (UNCOND_UNARY, COND_UNARY): Add bit_not/not
20464 (`vec (a ? -1 : 0) ^ b`): New pattern to convert
20465 into conditional not.
20466 * optabs.def (cond_one_cmpl): New optab.
20467 (cond_len_one_cmpl): Likewise.
20469 2023-08-16 Surya Kumari Jangala <jskumari@linux.ibm.com>
20471 PR rtl-optimization/110254
20472 * ira-color.cc (improve_allocation): Update array
20473 allocated_hard_reg_p.
20475 2023-08-16 Vladimir N. Makarov <vmakarov@redhat.com>
20477 * lra-int.h (lra_update_fp2sp_elimination): Change the prototype.
20478 * lra-eliminations.cc (spill_pseudos): Record spilled pseudos.
20479 (lra_update_fp2sp_elimination): Ditto.
20480 (update_reg_eliminate): Adjust spill_pseudos call.
20481 * lra-spills.cc (lra_spill): Assign stack slots to pseudos spilled
20482 in lra_update_fp2sp_elimination.
20484 2023-08-16 Richard Ball <richard.ball@arm.com>
20486 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex-A720 CPU.
20487 * config/aarch64/aarch64-tune.md: Regenerate.
20488 * doc/invoke.texi: Document Cortex-A720 CPU.
20490 2023-08-16 Robin Dapp <rdapp@ventanamicro.com>
20492 * config/riscv/autovec.md (<u>avg<v_double_trunc>3_floor):
20493 Implement expander.
20494 (<u>avg<v_double_trunc>3_ceil): Ditto.
20495 * config/riscv/vector-iterators.md (ashiftrt): New iterator.
20498 2023-08-16 Robin Dapp <rdapp@ventanamicro.com>
20500 * internal-fn.cc (vec_extract_direct): Change type argument
20502 (expand_vec_extract_optab_fn): Call convert_optab_fn.
20503 (direct_vec_extract_optab_supported_p): Use
20504 convert_optab_supported_p.
20506 2023-08-16 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
20507 Richard Sandiford <richard.sandiford@arm.com>
20509 * fold-const.cc (INCLUDE_ALGORITHM): Add Include.
20510 (valid_mask_for_fold_vec_perm_cst_p): New function.
20511 (fold_vec_perm_cst): Likewise.
20512 (fold_vec_perm): Adjust assert and call fold_vec_perm_cst.
20513 (test_fold_vec_perm_cst): New namespace.
20514 (test_fold_vec_perm_cst::build_vec_cst_rand): New function.
20515 (test_fold_vec_perm_cst::validate_res): Likewise.
20516 (test_fold_vec_perm_cst::validate_res_vls): Likewise.
20517 (test_fold_vec_perm_cst::builder_push_elems): Likewise.
20518 (test_fold_vec_perm_cst::test_vnx4si_v4si): Likewise.
20519 (test_fold_vec_perm_cst::test_v4si_vnx4si): Likewise.
20520 (test_fold_vec_perm_cst::test_all_nunits): Likewise.
20521 (test_fold_vec_perm_cst::test_nunits_min_2): Likewise.
20522 (test_fold_vec_perm_cst::test_nunits_min_4): Likewise.
20523 (test_fold_vec_perm_cst::test_nunits_min_8): Likewise.
20524 (test_fold_vec_perm_cst::test_nunits_max_4): Likewise.
20525 (test_fold_vec_perm_cst::is_simple_vla_size): Likewise.
20526 (test_fold_vec_perm_cst::test): Likewise.
20527 (fold_const_cc_tests): Call test_fold_vec_perm_cst::test.
20529 2023-08-16 Pan Li <pan2.li@intel.com>
20531 * config/riscv/riscv-vector-builtins-bases.cc
20532 (BASE): New declaration.
20533 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
20534 * config/riscv/riscv-vector-builtins-functions.def
20535 (vfwcvt_xu_frm): New intrinsic function def.
20537 2023-08-16 Pan Li <pan2.li@intel.com>
20539 * config/riscv/riscv-vector-builtins-bases.cc: Use explicit argument.
20541 2023-08-16 Pan Li <pan2.li@intel.com>
20543 * config/riscv/riscv-vector-builtins-bases.cc
20544 (BASE): New declaration.
20545 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
20546 * config/riscv/riscv-vector-builtins-functions.def
20547 (vfwcvt_x_frm): New intrinsic function def.
20549 2023-08-16 Pan Li <pan2.li@intel.com>
20551 * config/riscv/riscv-vector-builtins-bases.cc (BASE): New declaration.
20552 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
20553 * config/riscv/riscv-vector-builtins-functions.def
20554 (vfcvt_f_frm): New intrinsic function def.
20556 2023-08-16 Pan Li <pan2.li@intel.com>
20558 * config/riscv/riscv-vector-builtins-bases.cc
20559 (BASE): New declaration.
20560 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
20561 * config/riscv/riscv-vector-builtins-functions.def
20562 (vfcvt_xu_frm): New intrinsic function def..
20564 2023-08-16 Haochen Gui <guihaoc@gcc.gnu.org>
20567 * config/rs6000/vsx.md (*vsx_extract_<mode>_store_p9): Skip vector
20568 extract when the element is 7 on BE while 8 on LE for byte or 3 on
20569 BE while 4 on LE for halfword.
20571 2023-08-16 Haochen Gui <guihaoc@gcc.gnu.org>
20574 * config/rs6000/vsx.md (expand vsx_extract_<mode>): Set it only
20575 for V8HI and V16QI.
20576 (vsx_extract_v4si): New expand for V4SI extraction.
20577 (vsx_extract_v4si_w1): New insn pattern for V4SI extraction on
20578 word 1 from BE order.
20579 (*mfvsrwz): New insn pattern for mfvsrwz.
20580 (*vsx_extract_<mode>_di_p9): Assert that it won't be generated on
20581 word 1 from BE order.
20582 (*vsx_extract_si): Remove.
20583 (*vsx_extract_v4si_w023): New insn and split pattern on word 0, 2,
20586 2023-08-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20588 * config/riscv/autovec.md (vec_mask_len_load_lanes<mode><vsingle>):
20590 (vec_mask_len_store_lanes<mode><vsingle>): Ditto.
20591 * config/riscv/riscv-protos.h (expand_lanes_load_store): New function.
20592 * config/riscv/riscv-v.cc (get_mask_mode): Add tuple mask mode.
20593 (expand_lanes_load_store): New function.
20594 * config/riscv/vector-iterators.md: New iterator.
20596 2023-08-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20598 * internal-fn.cc (internal_load_fn_p): Apply
20599 MASK_LEN_{LOAD_LANES,STORE_LANES} into vectorizer.
20600 (internal_store_fn_p): Ditto.
20601 (internal_fn_len_index): Ditto.
20602 (internal_fn_mask_index): Ditto.
20603 (internal_fn_stored_value_index): Ditto.
20604 * tree-vect-data-refs.cc (vect_store_lanes_supported): Ditto.
20605 (vect_load_lanes_supported): Ditto.
20606 * tree-vect-loop.cc: Ditto.
20607 * tree-vect-slp.cc (vect_slp_prefer_store_lanes_p): Ditto.
20608 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
20609 (get_group_load_store_type): Ditto.
20610 (vectorizable_store): Ditto.
20611 (vectorizable_load): Ditto.
20612 * tree-vectorizer.h (vect_store_lanes_supported): Ditto.
20613 (vect_load_lanes_supported): Ditto.
20615 2023-08-16 Pan Li <pan2.li@intel.com>
20617 * config/riscv/riscv-vector-builtins-bases.cc
20618 (enum frm_op_type): New type for frm.
20619 (BASE): New declaration.
20620 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
20621 * config/riscv/riscv-vector-builtins-functions.def
20622 (vfcvt_x_frm): New intrinsic function def.
20624 2023-08-16 liuhongt <hongtao.liu@intel.com>
20626 * config/i386/i386-builtins.cc
20627 (ix86_vectorize_builtin_gather): Adjust for use_gather_8parts.
20628 * config/i386/i386-options.cc (parse_mtune_ctrl_str):
20629 Set/Clear tune features use_{gather,scatter}_{2parts, 4parts,
20630 8parts} for -mtune-crtl={,^}{use_gather,use_scatter}.
20631 * config/i386/i386.cc (ix86_vectorize_builtin_scatter): Adjust
20632 for use_scatter_8parts
20633 * config/i386/i386.h (TARGET_USE_GATHER): Rename to ..
20634 (TARGET_USE_GATHER_8PARTS): .. this.
20635 (TARGET_USE_SCATTER): Rename to ..
20636 (TARGET_USE_SCATTER_8PARTS): .. this.
20637 * config/i386/x86-tune.def (X86_TUNE_USE_GATHER): Rename to
20638 (X86_TUNE_USE_GATHER_8PARTS): .. this.
20639 (X86_TUNE_USE_SCATTER): Rename to
20640 (X86_TUNE_USE_SCATTER_8PARTS): .. this.
20641 * config/i386/i386.opt: Add new options mgather, mscatter.
20643 2023-08-16 liuhongt <hongtao.liu@intel.com>
20645 * config/i386/i386-options.cc (m_GDS): New macro.
20646 * config/i386/x86-tune.def (X86_TUNE_USE_GATHER_2PARTS): Don't
20648 (X86_TUNE_USE_GATHER_4PARTS): Ditto.
20649 (X86_TUNE_USE_GATHER): Ditto.
20651 2023-08-16 liuhongt <hongtao.liu@intel.com>
20653 * config/i386/i386.md (movdf_internal): Generate vmovapd instead of
20654 vmovsd when moving DFmode between SSE_REGS.
20655 (movhi_internal): Generate vmovdqa instead of vmovsh when
20656 moving HImode between SSE_REGS.
20657 (mov<mode>_internal): Use vmovaps instead of vmovsh when
20658 moving HF/BFmode between SSE_REGS.
20660 2023-08-15 David Faust <david.faust@oracle.com>
20662 * config/bpf/bpf.md (extendsisi2): Delete useless define_insn.
20664 2023-08-15 David Faust <david.faust@oracle.com>
20667 * config/bpf/bpf.cc (bpf_print_register): Print 'w' registers
20668 for any mode 32-bits or smaller, not just SImode.
20670 2023-08-15 Martin Jambor <mjambor@suse.cz>
20674 * ipa-prop.h (ipcp_get_aggregate_const): Declare.
20675 * ipa-prop.cc (ipcp_get_aggregate_const): New function.
20676 (ipcp_transform_function): Do not deallocate transformation info.
20677 * tree-ssa-sccvn.cc: Include alloc-pool.h, symbol-summary.h and
20679 (vn_reference_lookup_2): When hitting default-def vuse, query
20680 IPA-CP transformation info for any known constants.
20682 2023-08-15 Chung-Lin Tang <cltang@codesourcery.com>
20683 Thomas Schwinge <thomas@codesourcery.com>
20685 * gimplify.cc (oacc_region_type_name): New function.
20686 (oacc_default_clause): If no 'default' clause appears on this
20687 compute construct, see if one appears on a lexically containing
20689 (gimplify_scan_omp_clauses): Upon OMP_CLAUSE_DEFAULT case, set
20690 ctx->oacc_default_clause_ctx to current context.
20692 2023-08-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20695 * config/riscv/predicates.md: Fix predicate.
20697 2023-08-15 Richard Biener <rguenther@suse.de>
20699 * tree-vect-slp.cc (vect_analyze_slp_instance): Remove
20700 slp_inst_kind_ctor handling.
20701 (vect_analyze_slp): Simplify.
20702 (vect_build_slp_instance): Dump when we analyze a CTOR.
20703 (vect_slp_check_for_constructors): Rename to ...
20704 (vect_slp_check_for_roots): ... this. Register a
20705 slp_root for CONSTRUCTORs instead of shoving them to
20706 the set of grouped stores.
20707 (vect_slp_analyze_bb_1): Adjust.
20709 2023-08-15 Richard Biener <rguenther@suse.de>
20711 * tree-vectorizer.h (_slp_instance::remain_stmts): Change
20713 (_slp_instance::remain_defs): ... this.
20714 (SLP_INSTANCE_REMAIN_STMTS): Rename to ...
20715 (SLP_INSTANCE_REMAIN_DEFS): ... this.
20716 (slp_root::remain): New.
20717 (slp_root::slp_root): Adjust.
20718 * tree-vect-slp.cc (vect_free_slp_instance): Adjust.
20719 (vect_build_slp_instance): Get extra remain parameter,
20720 adjust former handling of a cut off stmt.
20721 (vect_analyze_slp_instance): Adjust.
20722 (vect_analyze_slp): Likewise.
20723 (_bb_vec_info::~_bb_vec_info): Likewise.
20724 (vectorizable_bb_reduc_epilogue): Dump something if we fail.
20725 (vect_slp_check_for_constructors): Handle non-internal
20726 defs as remain defs of a reduction.
20727 (vectorize_slp_instance_root_stmt): Adjust.
20729 2023-08-15 Richard Biener <rguenther@suse.de>
20731 * tree-ssa-loop-ivcanon.cc: Include tree-vectorizer.h
20732 (canonicalize_loop_induction_variables): Use find_loop_location.
20734 2023-08-15 Hans-Peter Nilsson <hp@axis.com>
20736 PR bootstrap/111021
20737 * config/cris/cris-protos.h: Revert recent change.
20738 * config/cris/cris.cc (cris_legitimate_address_p): Remove
20739 code_helper unused parameter.
20740 (cris_legitimate_address_p_hook): New wrapper function.
20741 (TARGET_LEGITIMATE_ADDRESS_P): Change to
20742 cris_legitimate_address_p_hook.
20744 2023-08-15 Richard Biener <rguenther@suse.de>
20746 PR tree-optimization/110963
20747 * tree-ssa-pre.cc (do_pre_regular_insertion): Also insert
20748 a PHI node when the expression is available on all edges
20749 and we insert at most one copy from a constant.
20751 2023-08-15 Richard Biener <rguenther@suse.de>
20753 PR tree-optimization/110991
20754 * tree-ssa-loop-ivcanon.cc (constant_after_peeling): Handle
20755 VIEW_CONVERT_EXPR <op>, handle more simple IV-like SSA cycles
20756 that will end up constant.
20758 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
20760 PR bootstrap/111021
20761 * Makefile.in (RECOG_H): Add $(TREE_H) as dependence.
20763 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
20765 * tree-vect-stmts.cc (vectorizable_load): Move the handlings on
20766 VMAT_LOAD_STORE_LANES in the final loop nest to its own loop,
20767 and update the final nest accordingly.
20769 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
20771 * tree-vect-stmts.cc (vectorizable_load): Remove some useless checks
20774 2023-08-15 Pan Li <pan2.li@intel.com>
20776 * mode-switching.cc (create_pre_exit): Add SET insn check.
20778 2023-08-15 Pan Li <pan2.li@intel.com>
20780 * config/riscv/riscv-vector-builtins-bases.cc
20781 (class vfrec7_frm): New class for frm.
20782 (vfrec7_frm_obj): New declaration.
20784 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
20785 * config/riscv/riscv-vector-builtins-functions.def
20786 (vfrec7_frm): New intrinsic function definition.
20787 * config/riscv/vector-iterators.md
20788 (VFMISC): Remove VFREC7.
20790 (float_insn_type): Ditto.
20791 (VFMISC_FRM): New int iterator.
20792 (misc_frm_op): New op for frm.
20793 (float_frm_insn_type): New type for frm.
20794 * config/riscv/vector.md (@pred_<misc_frm_op><mode>):
20795 New pattern for misc frm.
20797 2023-08-14 Vladimir N. Makarov <vmakarov@redhat.com>
20799 * lra-constraints.cc (curr_insn_transform): Process output stack
20800 pointer reloads before emitting reload insns.
20802 2023-08-14 benjamin priour <vultkayn@gcc.gnu.org>
20805 * doc/invoke.texi: Add documentation of
20806 fanalyzer-show-events-in-system-headers
20808 2023-08-14 Jan Hubicka <jh@suse.cz>
20810 PR gcov-profile/110988
20811 * tree-cfg.cc (fold_loop_internal_call): Avoid division by zero.
20813 2023-08-14 Jiawei <jiawei@iscas.ac.cn>
20815 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins):
20816 Enable compressed builtins when ZC* extensions enabled.
20817 * config/riscv/riscv-shorten-memrefs.cc:
20818 Enable shorten_memrefs pass when ZC* extensions enabled.
20819 * config/riscv/riscv.cc (riscv_compressed_reg_p):
20820 Enable compressible registers when ZC* extensions enabled.
20821 (riscv_rtx_costs): Allow adjusting rtx costs when ZC* extensions enabled.
20822 (riscv_address_cost): Allow adjusting address cost when ZC* extensions enabled.
20823 (riscv_first_stack_step): Allow compression of the register saves
20824 without adding extra instructions.
20825 * config/riscv/riscv.h (FUNCTION_BOUNDARY): Adjusts function boundary
20826 to 16 bits when ZC* extensions enabled.
20828 2023-08-14 Jiawei <jiawei@iscas.ac.cn>
20830 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse): New extensions.
20831 * config/riscv/riscv-opts.h (MASK_ZCA): New mask.
20836 (MASK_ZCMP): Ditto.
20837 (MASK_ZCMT): Ditto.
20838 (TARGET_ZCA): New target.
20839 (TARGET_ZCB): Ditto.
20840 (TARGET_ZCE): Ditto.
20841 (TARGET_ZCF): Ditto.
20842 (TARGET_ZCD): Ditto.
20843 (TARGET_ZCMP): Ditto.
20844 (TARGET_ZCMT): Ditto.
20845 * config/riscv/riscv.opt: New target variable.
20847 2023-08-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20850 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
20852 * genrecog.cc (print_nonbool_test): Fix type error of
20853 switch (SUBREG_BYTE (op))'.
20855 2023-08-14 Richard Biener <rguenther@suse.de>
20857 * tree-cfg.cc (print_loop_info): Dump to 'file', not 'dump_file'.
20859 2023-08-14 Pan Li <pan2.li@intel.com>
20861 * config/riscv/riscv-vector-builtins-bases.cc
20862 (class unop_frm): New class for frm.
20863 (vfsqrt_frm_obj): New declaration.
20865 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
20866 * config/riscv/riscv-vector-builtins-functions.def
20867 (vfsqrt_frm): New intrinsic function definition.
20869 2023-08-14 Pan Li <pan2.li@intel.com>
20871 * config/riscv/riscv-vector-builtins-bases.cc
20872 (class vfwnmsac_frm): New class for frm.
20873 (vfwnmsac_frm_obj): New declaration.
20875 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
20876 * config/riscv/riscv-vector-builtins-functions.def
20877 (vfwnmsac_frm): New intrinsic function definition.
20879 2023-08-14 Pan Li <pan2.li@intel.com>
20881 * config/riscv/riscv-vector-builtins-bases.cc
20882 (class vfwmsac_frm): New class for frm.
20883 (vfwmsac_frm_obj): New declaration.
20885 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
20886 * config/riscv/riscv-vector-builtins-functions.def
20887 (vfwmsac_frm): New intrinsic function definition.
20889 2023-08-14 Pan Li <pan2.li@intel.com>
20891 * config/riscv/riscv-vector-builtins-bases.cc
20892 (class vfwnmacc_frm): New class for frm.
20893 (vfwnmacc_frm_obj): New declaration.
20895 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
20896 * config/riscv/riscv-vector-builtins-functions.def
20897 (vfwnmacc_frm): New intrinsic function definition.
20899 2023-08-14 Cui, Lili <lili.cui@intel.com>
20901 * common/config/i386/cpuinfo.h (get_intel_cpu): Add model value 0xba
20904 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
20906 * config/mmix/predicates.md (mmix_address_operand): Use
20907 lra_in_progress, not reload_in_progress.
20909 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
20911 * config/mmix/mmix.cc: Re-enable LRA.
20913 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
20915 * config/mmix/predicates.md (frame_pointer_operand): Handle FP+offset
20916 when lra_in_progress.
20918 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
20920 * config/mmix/mmix.cc: Disable LRA for MMIX.
20922 2023-08-14 Pan Li <pan2.li@intel.com>
20924 * config/riscv/riscv-vector-builtins-bases.cc
20925 (class vfwmacc_frm): New class for vfwmacc frm.
20926 (vfwmacc_frm_obj): New declaration.
20928 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
20929 * config/riscv/riscv-vector-builtins-functions.def
20930 (vfwmacc_frm): Function definition for vfwmacc.
20931 * config/riscv/riscv-vector-builtins.cc
20932 (function_expander::use_widen_ternop_insn): Add frm support.
20934 2023-08-14 Pan Li <pan2.li@intel.com>
20936 * config/riscv/riscv-vector-builtins-bases.cc
20937 (class vfnmsub_frm): New class for vfnmsub frm.
20938 (vfnmsub_frm): New declaration.
20940 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
20941 * config/riscv/riscv-vector-builtins-functions.def
20942 (vfnmsub_frm): New function declaration.
20944 2023-08-14 Vladimir N. Makarov <vmakarov@redhat.com>
20946 * lra-constraints.cc (curr_insn_transform): Set done_p up and
20947 check it on true after processing output stack pointer reload.
20949 2023-08-12 Jakub Jelinek <jakub@redhat.com>
20951 * Makefile.in (USER_H): Add stdckdint.h.
20952 * ginclude/stdckdint.h: New file.
20954 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20957 * config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): Add TARGET_VETOR.
20959 2023-08-12 Patrick Palka <ppalka@redhat.com>
20961 * tree-pretty-print.cc (dump_generic_node) <case TREE_VEC>:
20962 Delimit output with braces.
20964 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20967 * config/riscv/riscv-v.cc (expand_vec_series): Refactor the expander.
20969 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20971 * config/riscv/autovec.md: Add VLS CONST_VECTOR.
20972 * config/riscv/riscv.cc (riscv_const_insns): Ditto.
20973 * config/riscv/vector.md: Ditto.
20975 2023-08-11 David Malcolm <dmalcolm@redhat.com>
20978 * doc/analyzer.texi (__analyzer_get_strlen): New.
20979 * doc/invoke.texi: Add -Wanalyzer-unterminated-string.
20981 2023-08-11 Jeff Law <jlaw@ventanamicro.com>
20983 * config/rx/rx.md (subdi3): Fix test for borrow.
20985 2023-08-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20987 PR middle-end/110989
20988 * tree-vect-stmts.cc (vectorizable_store): Replace iv_type with sizetype.
20989 (vectorizable_load): Ditto.
20991 2023-08-11 Jose E. Marchesi <jose.marchesi@oracle.com>
20993 * config/bpf/bpf.md (allocate_stack): Define.
20994 * config/bpf/bpf.h (FIRST_PSEUDO_REGISTER): Make room for fake
20995 stack pointer register.
20996 (FIXED_REGISTERS): Adjust accordingly.
20997 (CALL_USED_REGISTERS): Likewise.
20998 (REG_CLASS_CONTENTS): Likewise.
20999 (REGISTER_NAMES): Likewise.
21000 * config/bpf/bpf.cc (bpf_compute_frame_layout): Do not reserve
21001 space for callee-saved registers.
21002 (bpf_expand_prologue): Do not save callee-saved registers in xbpf.
21003 (bpf_expand_epilogue): Do not restore callee-saved registers in
21006 2023-08-11 Jose E. Marchesi <jose.marchesi@oracle.com>
21008 * config/bpf/bpf.cc (bpf_function_arg_advance): Do not complain
21009 about too many arguments if function is always inlined.
21011 2023-08-11 Patrick Palka <ppalka@redhat.com>
21013 * tree-pretty-print.cc (dump_generic_node) <case COMPONENT_REF>:
21014 Don't call component_ref_field_offset if the RHS isn't a decl.
21016 2023-08-11 John David Anglin <danglin@gcc.gnu.org>
21018 PR bootstrap/110646
21019 * gensupport.cc(class conlist): Use strtol instead of std::stoi.
21021 2023-08-11 Vladimir N. Makarov <vmakarov@redhat.com>
21023 * lra-constraints.cc (goal_alt_out_sp_reload_p): New flag.
21024 (process_alt_operands): Set the flag.
21025 (curr_insn_transform): Modify stack pointer offsets if output
21026 stack pointer reload is generated.
21028 2023-08-11 Joseph Myers <joseph@codesourcery.com>
21030 * configure: Regenerate.
21032 2023-08-11 Richard Biener <rguenther@suse.de>
21034 PR tree-optimization/110979
21035 * tree-vect-loop.cc (vectorizable_reduction): For
21036 FOLD_LEFT_REDUCTION without target support make sure
21037 we don't need to honor signed zeros and sign dependent rounding.
21039 2023-08-11 Richard Biener <rguenther@suse.de>
21041 * tree-vect-slp.cc (vect_slp_region): Provide opt-info for all SLP
21042 subgraph entries. Dump the used vector size based on the
21043 SLP subgraph entry root vector type.
21045 2023-08-11 Pan Li <pan2.li@intel.com>
21047 * config/riscv/riscv-vector-builtins-bases.cc
21048 (class vfmsub_frm): New class for vfmsub frm.
21049 (vfmsub_frm): New declaration.
21051 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
21052 * config/riscv/riscv-vector-builtins-functions.def
21053 (vfmsub_frm): New function declaration.
21055 2023-08-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21057 * doc/md.texi: Add vec_mask_len_{load_lanes,store_lanes} patterns.
21058 * internal-fn.cc (expand_partial_load_optab_fn): Ditto.
21059 (expand_partial_store_optab_fn): Ditto.
21060 * internal-fn.def (MASK_LEN_LOAD_LANES): Ditto.
21061 (MASK_LEN_STORE_LANES): Ditto.
21062 * optabs.def (OPTAB_CD): Ditto.
21064 2023-08-11 Pan Li <pan2.li@intel.com>
21066 * config/riscv/riscv-vector-builtins-bases.cc
21067 (class vfnmadd_frm): New class for vfnmadd frm.
21068 (vfnmadd_frm): New declaration.
21070 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
21071 * config/riscv/riscv-vector-builtins-functions.def
21072 (vfnmadd_frm): New function declaration.
21074 2023-08-11 Drew Ross <drross@redhat.com>
21075 Jakub Jelinek <jakub@redhat.com>
21077 PR tree-optimization/109938
21078 * match.pd (((x ^ y) & z) | x -> (z & y) | x): New simplification.
21080 2023-08-11 Pan Li <pan2.li@intel.com>
21082 * config/riscv/riscv-vector-builtins-bases.cc
21083 (class vfmadd_frm): New class for vfmadd frm.
21084 (vfmadd_frm_obj): New declaration.
21086 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
21087 * config/riscv/riscv-vector-builtins-functions.def
21088 (vfmadd_frm): New function definition.
21090 2023-08-11 Pan Li <pan2.li@intel.com>
21092 * config/riscv/riscv-vector-builtins-bases.cc
21093 (class vfnmsac_frm): New class for vfnmsac frm.
21094 (vfnmsac_frm_obj): New declaration.
21096 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
21097 * config/riscv/riscv-vector-builtins-functions.def
21098 (vfnmsac_frm): New function definition.
21100 2023-08-11 Jakub Jelinek <jakub@redhat.com>
21102 * doc/extend.texi (Typeof): Document typeof_unqual
21103 and __typeof_unqual__.
21105 2023-08-11 Andrew Pinski <apinski@marvell.com>
21107 PR tree-optimization/110954
21108 * generic-match-head.cc (bitwise_inverted_equal_p): Add
21109 wascmp argument and set it accordingly.
21110 * gimple-match-head.cc (bitwise_inverted_equal_p): Add
21111 wascmp argument to the macro.
21112 (gimple_bitwise_inverted_equal_p): Add
21113 wascmp argument and set it accordingly.
21114 * match.pd (`a & ~a`, `a ^| ~a`): Update call
21115 to bitwise_inverted_equal_p and handle wascmp case.
21116 (`(~x | y) & x`, `(~x | y) & x`, `a?~t:t`): Update
21117 call to bitwise_inverted_equal_p and check to see
21118 if was !wascmp or if precision was 1.
21120 2023-08-11 Martin Uecker <uecker@tugraz.at>
21123 * doc/invoke.texi: Update.
21125 2023-08-11 Pan Li <pan2.li@intel.com>
21127 * config/riscv/riscv-vector-builtins-bases.cc
21128 (class vfmsac_frm): New class for vfmsac frm.
21129 (vfmsac_frm_obj): New declaration.
21131 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
21132 * config/riscv/riscv-vector-builtins-functions.def
21133 (vfmsac_frm): New function definition
21135 2023-08-10 Jan Hubicka <jh@suse.cz>
21137 PR middle-end/110923
21138 * tree-ssa-loop-split.cc (split_loop): Watch for division by zero.
21140 2023-08-10 Patrick O'Neill <patrick@rivosinc.com>
21142 * common/config/riscv/riscv-common.cc: Add Ztso and mark Ztso as
21143 dependent on 'a' extension.
21144 * config/riscv/riscv-opts.h (MASK_ZTSO): New mask.
21145 (TARGET_ZTSO): New target.
21146 * config/riscv/riscv.cc (riscv_memmodel_needs_amo_acquire): Add
21148 (riscv_memmodel_needs_amo_release): Add Ztso case.
21149 (riscv_print_operand): Add Ztso case for LR/SC annotations.
21150 * config/riscv/riscv.md: Import sync-rvwmo.md and sync-ztso.md.
21151 * config/riscv/riscv.opt: Add Ztso target variable.
21152 * config/riscv/sync.md (mem_thread_fence_1): Expand to RVWMO or
21153 Ztso specific insn.
21154 (atomic_load<mode>): Expand to RVWMO or Ztso specific insn.
21155 (atomic_store<mode>): Expand to RVWMO or Ztso specific insn.
21156 * config/riscv/sync-rvwmo.md: New file. Seperate out RVWMO
21157 specific load/store/fence mappings.
21158 * config/riscv/sync-ztso.md: New file. Seperate out Ztso
21159 specific load/store/fence mappings.
21161 2023-08-10 Jan Hubicka <jh@suse.cz>
21163 * cfgloopmanip.cc (duplicate_loop_body_to_header_edge): Special case loops with
21166 2023-08-10 Jan Hubicka <jh@suse.cz>
21168 * tree-ssa-threadupdate.cc (ssa_fix_duplicate_block_edges): Fix profile update.
21170 2023-08-10 Jan Hubicka <jh@suse.cz>
21172 * profile-count.cc (profile_count::differs_from_p): Fix overflow and
21173 handling of undefined values.
21175 2023-08-10 Jakub Jelinek <jakub@redhat.com>
21178 * tree-ssa-phiopt.cc (single_non_singleton_phi_for_edges): Never
21179 return virtual phis and return NULL if there is a virtual phi
21180 where the arguments from E0 and E1 edges aren't equal.
21182 2023-08-10 Richard Biener <rguenther@suse.de>
21184 * internal-fn.def (VCOND, VCONDU, VCONDEQ, VCOND_MASK,
21185 VEC_SET, VEC_EXTRACT): Make ECF_CONST | ECF_NOTHROW.
21187 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21190 * config/riscv/autovec.md (vec_duplicate<mode>): New pattern.
21192 2023-08-10 Pan Li <pan2.li@intel.com>
21194 * config/riscv/riscv-vector-builtins-bases.cc
21195 (class vfnmacc_frm): New class for vfnmacc.
21196 (vfnmacc_frm_obj): New declaration.
21198 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
21199 * config/riscv/riscv-vector-builtins-functions.def
21200 (vfnmacc_frm): New function definition.
21202 2023-08-10 Pan Li <pan2.li@intel.com>
21204 * config/riscv/riscv-vector-builtins-bases.cc
21205 (class vfmacc_frm): New class for vfmacc frm.
21206 (vfmacc_frm_obj): New declaration.
21208 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
21209 * config/riscv/riscv-vector-builtins-functions.def
21210 (vfmacc_frm): New function definition.
21212 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21215 * config/riscv/riscv-v.cc (expand_cond_len_ternop): Add integer ternary.
21217 2023-08-10 Richard Biener <rguenther@suse.de>
21219 * tree-vectorizer.h (vectorizable_live_operation): Remove
21220 gimple_stmt_iterator * argument.
21221 * tree-vect-loop.cc (vectorizable_live_operation): Likewise.
21222 Adjust plumbing around vect_get_loop_mask.
21223 (vect_analyze_loop_operations): Adjust.
21224 * tree-vect-slp.cc (vect_slp_analyze_node_operations_1): Likewise.
21225 (vect_bb_slp_mark_live_stmts): Likewise.
21226 (vect_schedule_slp_node): Likewise.
21227 * tree-vect-stmts.cc (can_vectorize_live_stmts): Likewise.
21228 Remove gimple_stmt_iterator * argument.
21229 (vect_transform_stmt): Adjust.
21231 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21233 * config/riscv/vector-iterators.md: Add missing modes.
21235 2023-08-10 Jakub Jelinek <jakub@redhat.com>
21238 * lto-streamer-in.cc (lto_input_tree_1): Assert TYPE_PRECISION
21239 is up to WIDE_INT_MAX_PRECISION rather than MAX_BITSIZE_MODE_ANY_INT.
21241 2023-08-10 Jakub Jelinek <jakub@redhat.com>
21244 * expr.cc (expand_expr_real_1) <case MEM_REF>: Add an early return for
21245 EXPAND_WRITE or EXPAND_MEMORY modifiers to avoid testing it multiple
21248 2023-08-10 liuhongt <hongtao.liu@intel.com>
21251 * config/i386/mmx.md: (movq_<mode>_to_sse): Also do not
21252 sanitize upper part of V4HFmode register with
21253 -fno-trapping-math.
21254 (<insn>v4hf3): Enable for ix86_partial_vec_fp_math.
21255 (<divv4hf3): Ditto.
21256 (<insn>v2hf3): Ditto.
21258 (movd_v2hf_to_sse): Do not sanitize upper part of V2HFmode
21259 register with -fno-trapping-math.
21261 2023-08-10 Pan Li <pan2.li@intel.com>
21262 Kito Cheng <kito.cheng@sifive.com>
21264 * config/riscv/riscv-protos.h
21265 (enum floating_point_rounding_mode): Add NONE, DYN_EXIT and DYN_CALL.
21266 (get_frm_mode): New declaration.
21267 * config/riscv/riscv-v.cc (get_frm_mode): New function to get frm mode.
21268 * config/riscv/riscv-vector-builtins.cc
21269 (function_expander::use_ternop_insn): Take care of frm reg.
21270 * config/riscv/riscv.cc (riscv_static_frm_mode_p): Migrate to FRM_XXX.
21271 (riscv_emit_frm_mode_set): Ditto.
21272 (riscv_emit_mode_set): Ditto.
21273 (riscv_frm_adjust_mode_after_call): Ditto.
21274 (riscv_frm_mode_needed): Ditto.
21275 (riscv_frm_mode_after): Ditto.
21276 (riscv_mode_entry): Ditto.
21277 (riscv_mode_exit): Ditto.
21278 * config/riscv/riscv.h (NUM_MODES_FOR_MODE_SWITCHING): Ditto.
21279 * config/riscv/vector.md
21280 (rne,rtz,rdn,rup,rmm,dyn,dyn_exit,dyn_call,none): Removed
21281 (symbol_ref): * config/riscv/vector.md: Set frm_mode attr explicitly.
21283 2023-08-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21285 * config/riscv/riscv-vsetvl.cc (anticipatable_occurrence_p): Fix
21286 incorrect anticipate info.
21288 2023-08-09 Tsukasa OI <research_trasio@irq.a4lg.com>
21290 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
21291 Remove 'Zve32d' from the version list.
21293 2023-08-09 Jin Ma <jinma@linux.alibaba.com>
21295 * config/riscv/riscv.cc (riscv_sched_variable_issue): New function.
21296 (TARGET_SCHED_VARIABLE_ISSUE): New macro.
21297 Co-authored-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
21298 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
21300 2023-08-09 Jivan Hakobyan <jivanhakobyan9@gmail.com>
21302 * config/riscv/riscv.cc (riscv_legitimize_address): Handle folding.
21303 (mem_shadd_or_shadd_rtx_p): New function.
21305 2023-08-09 Andrew Pinski <apinski@marvell.com>
21307 PR tree-optimization/110937
21308 PR tree-optimization/100798
21309 * match.pd (`a ? ~b : b`): Handle this
21312 2023-08-09 Uros Bizjak <ubizjak@gmail.com>
21314 * config/i386/i386.opt (mpartial-vector-fp-math): Add dot.
21316 2023-08-09 Richard Ball <richard.ball@arm.com>
21318 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex-A520 CPU.
21319 * config/aarch64/aarch64-tune.md: Regenerate.
21320 * doc/invoke.texi: Document Cortex-A520 CPU.
21322 2023-08-09 Carl Love <cel@us.ibm.com>
21324 * config/rs6000/rs6000-builtins.def (vcmpneb, vcmpneh, vcmpnew):
21325 Move definitions to Altivec stanza.
21326 * config/rs6000/altivec.md (vcmpneb, vcmpneh, vcmpnew): New
21329 2023-08-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21332 * config/riscv/riscv-v.cc (expand_const_vector): Add NPATTERNS = 1
21333 stepped vector support.
21335 2023-08-09 liuhongt <hongtao.liu@intel.com>
21337 * common/config/i386/cpuinfo.h (get_available_features):
21338 Rename local variable subleaf_level to max_subleaf_level.
21340 2023-08-09 Richard Biener <rguenther@suse.de>
21342 PR rtl-optimization/110587
21343 * lra-assigns.cc (find_hard_regno_for_1): Re-order checks.
21345 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
21347 PR tree-optimization/110248
21348 * config/rs6000/rs6000.cc (rs6000_legitimate_address_p): Check if
21349 the given code is for ifn LEN_{LOAD,STORE}, if yes then make it not
21350 legitimate when outer code is PLUS.
21352 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
21354 PR tree-optimization/110248
21355 * recog.cc (memory_address_addr_space_p): Add one more argument ch of
21356 type code_helper and pass it to targetm.addr_space.legitimate_address_p
21357 instead of ERROR_MARK.
21358 (offsettable_address_addr_space_p): Update one function pointer with
21359 one more argument of type code_helper as its assignees
21360 memory_address_addr_space_p and strict_memory_address_addr_space_p
21361 have been adjusted, and adjust some call sites with ERROR_MARK.
21362 * recog.h (tree.h): New include header file for tree_code ERROR_MARK.
21363 (memory_address_addr_space_p): Adjust with one more unnamed argument
21364 of type code_helper with default ERROR_MARK.
21365 (strict_memory_address_addr_space_p): Likewise.
21366 * reload.cc (strict_memory_address_addr_space_p): Add one unnamed
21367 argument of type code_helper.
21368 * tree-ssa-address.cc (valid_mem_ref_p): Add one more argument ch of
21369 type code_helper and pass it to memory_address_addr_space_p.
21370 * tree-ssa-address.h (valid_mem_ref_p): Adjust the declaration with
21371 one more unnamed argument of type code_helper with default value
21373 * tree-ssa-loop-ivopts.cc (get_address_cost): Use ERROR_MARK as code
21374 by default, change it with ifn code for USE_PTR_ADDRESS type use, and
21375 pass it to all valid_mem_ref_p calls.
21377 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
21379 PR tree-optimization/110248
21380 * coretypes.h (class code_helper): Add forward declaration.
21381 * doc/tm.texi: Regenerate.
21382 * lra-constraints.cc (valid_address_p): Call target hook
21383 targetm.addr_space.legitimate_address_p with an extra parameter
21384 ERROR_MARK as its prototype changes.
21385 * recog.cc (memory_address_addr_space_p): Likewise.
21386 * reload.cc (strict_memory_address_addr_space_p): Likewise.
21387 * target.def (legitimate_address_p, addr_space.legitimate_address_p):
21388 Extend with one more argument of type code_helper, update the
21389 documentation accordingly.
21390 * targhooks.cc (default_legitimate_address_p): Adjust for the
21391 new code_helper argument.
21392 (default_addr_space_legitimate_address_p): Likewise.
21393 * targhooks.h (default_legitimate_address_p): Likewise.
21394 (default_addr_space_legitimate_address_p): Likewise.
21395 * config/aarch64/aarch64.cc (aarch64_legitimate_address_hook_p): Adjust
21396 with extra unnamed code_helper argument with default ERROR_MARK.
21397 * config/alpha/alpha.cc (alpha_legitimate_address_p): Likewise.
21398 * config/arc/arc.cc (arc_legitimate_address_p): Likewise.
21399 * config/arm/arm-protos.h (arm_legitimate_address_p): Likewise.
21400 (tree.h): New include for tree_code ERROR_MARK.
21401 * config/arm/arm.cc (arm_legitimate_address_p): Adjust with extra
21402 unnamed code_helper argument with default ERROR_MARK.
21403 * config/avr/avr.cc (avr_addr_space_legitimate_address_p): Likewise.
21404 * config/bfin/bfin.cc (bfin_legitimate_address_p): Likewise.
21405 * config/bpf/bpf.cc (bpf_legitimate_address_p): Likewise.
21406 * config/c6x/c6x.cc (c6x_legitimate_address_p): Likewise.
21407 * config/cris/cris-protos.h (cris_legitimate_address_p): Likewise.
21408 (tree.h): New include for tree_code ERROR_MARK.
21409 * config/cris/cris.cc (cris_legitimate_address_p): Adjust with extra
21410 unnamed code_helper argument with default ERROR_MARK.
21411 * config/csky/csky.cc (csky_legitimate_address_p): Likewise.
21412 * config/epiphany/epiphany.cc (epiphany_legitimate_address_p):
21414 * config/frv/frv.cc (frv_legitimate_address_p): Likewise.
21415 * config/ft32/ft32.cc (ft32_addr_space_legitimate_address_p): Likewise.
21416 * config/gcn/gcn.cc (gcn_addr_space_legitimate_address_p): Likewise.
21417 * config/h8300/h8300.cc (h8300_legitimate_address_p): Likewise.
21418 * config/i386/i386.cc (ix86_legitimate_address_p): Likewise.
21419 * config/ia64/ia64.cc (ia64_legitimate_address_p): Likewise.
21420 * config/iq2000/iq2000.cc (iq2000_legitimate_address_p): Likewise.
21421 * config/lm32/lm32.cc (lm32_legitimate_address_p): Likewise.
21422 * config/loongarch/loongarch.cc (loongarch_legitimate_address_p):
21424 * config/m32c/m32c.cc (m32c_legitimate_address_p): Likewise.
21425 (m32c_addr_space_legitimate_address_p): Likewise.
21426 * config/m32r/m32r.cc (m32r_legitimate_address_p): Likewise.
21427 * config/m68k/m68k.cc (m68k_legitimate_address_p): Likewise.
21428 * config/mcore/mcore.cc (mcore_legitimate_address_p): Likewise.
21429 * config/microblaze/microblaze-protos.h (tree.h): New include for
21430 tree_code ERROR_MARK.
21431 (microblaze_legitimate_address_p): Adjust with extra unnamed
21432 code_helper argument with default ERROR_MARK.
21433 * config/microblaze/microblaze.cc (microblaze_legitimate_address_p):
21435 * config/mips/mips.cc (mips_legitimate_address_p): Likewise.
21436 * config/mmix/mmix.cc (mmix_legitimate_address_p): Likewise.
21437 * config/mn10300/mn10300.cc (mn10300_legitimate_address_p): Likewise.
21438 * config/moxie/moxie.cc (moxie_legitimate_address_p): Likewise.
21439 * config/msp430/msp430.cc (msp430_legitimate_address_p): Likewise.
21440 (msp430_addr_space_legitimate_address_p): Adjust with extra code_helper
21441 argument with default ERROR_MARK and adjust the call to function
21442 msp430_legitimate_address_p.
21443 * config/nds32/nds32.cc (nds32_legitimate_address_p): Adjust with extra
21444 unnamed code_helper argument with default ERROR_MARK.
21445 * config/nios2/nios2.cc (nios2_legitimate_address_p): Likewise.
21446 * config/nvptx/nvptx.cc (nvptx_legitimate_address_p): Likewise.
21447 * config/or1k/or1k.cc (or1k_legitimate_address_p): Likewise.
21448 * config/pa/pa.cc (pa_legitimate_address_p): Likewise.
21449 * config/pdp11/pdp11.cc (pdp11_legitimate_address_p): Likewise.
21450 * config/pru/pru.cc (pru_addr_space_legitimate_address_p): Likewise.
21451 * config/riscv/riscv.cc (riscv_legitimate_address_p): Likewise.
21452 * config/rl78/rl78-protos.h (rl78_as_legitimate_address): Likewise.
21453 (tree.h): New include for tree_code ERROR_MARK.
21454 * config/rl78/rl78.cc (rl78_as_legitimate_address): Adjust with
21455 extra unnamed code_helper argument with default ERROR_MARK.
21456 * config/rs6000/rs6000.cc (rs6000_legitimate_address_p): Likewise.
21457 (rs6000_debug_legitimate_address_p): Adjust with extra code_helper
21458 argument and adjust the call to function rs6000_legitimate_address_p.
21459 * config/rx/rx.cc (rx_is_legitimate_address): Adjust with extra
21460 unnamed code_helper argument with default ERROR_MARK.
21461 * config/s390/s390.cc (s390_legitimate_address_p): Likewise.
21462 * config/sh/sh.cc (sh_legitimate_address_p): Likewise.
21463 * config/sparc/sparc.cc (sparc_legitimate_address_p): Likewise.
21464 * config/v850/v850.cc (v850_legitimate_address_p): Likewise.
21465 * config/vax/vax.cc (vax_legitimate_address_p): Likewise.
21466 * config/visium/visium.cc (visium_legitimate_address_p): Likewise.
21467 * config/xtensa/xtensa.cc (xtensa_legitimate_address_p): Likewise.
21468 * config/stormy16/stormy16-protos.h (xstormy16_legitimate_address_p):
21470 (tree.h): New include for tree_code ERROR_MARK.
21471 * config/stormy16/stormy16.cc (xstormy16_legitimate_address_p):
21472 Adjust with extra unnamed code_helper argument with default
21475 2023-08-09 liuhongt <hongtao.liu@intel.com>
21477 * common/config/i386/cpuinfo.h (get_available_features): Check
21478 EAX for valid subleaf before use CPUID.
21480 2023-08-08 Jeff Law <jlaw@ventanamicro.com>
21482 * config/riscv/riscv.cc (riscv_expand_conditional_move): Use word_mode
21483 for the temporary when canonicalizing the condition.
21485 2023-08-08 Cupertino Miranda <cupertino.miranda@oracle.com>
21487 * config/bpf/core-builtins.cc: Cleaned include headers.
21488 (struct cr_builtins): Added GTY.
21489 (cr_builtins_ref): Created.
21490 (builtins_data) Changed to GC root.
21491 (allocate_builtin_data): Changed.
21492 Included gt-core-builtins.h.
21493 * config/bpf/coreout.cc: (bpf_core_extra) Added GTY.
21494 (bpf_core_extra_ref): Created.
21495 (bpf_comment_info): Changed to GC root.
21496 (bpf_core_reloc_add, output_btfext_header, btf_ext_init): Changed.
21498 2023-08-08 Uros Bizjak <ubizjak@gmail.com>
21501 * config/i386/i386.opt (mpartial-vector-fp-math): New option.
21502 * config/i386/mmx.md (movq_<mode>_to_sse): Do not sanitize
21503 upper part of V2SFmode register with -fno-trapping-math.
21504 (<plusminusmult:insn>v2sf3): Enable for ix86_partial_vec_fp_math.
21506 (<smaxmin:code>v2sf3): Ditto.
21507 (sqrtv2sf2): Ditto.
21508 (*mmx_haddv2sf3_low): Ditto.
21509 (*mmx_hsubv2sf3_low): Ditto.
21510 (vec_addsubv2sf3): Ditto.
21511 (vec_cmpv2sfv2si): Ditto.
21512 (vcond<V2FI:mode>v2sf): Ditto.
21515 (fnmav2sf4): Ditto.
21516 (fnmsv2sf4): Ditto.
21517 (fix_truncv2sfv2si2): Ditto.
21518 (fixuns_truncv2sfv2si2): Ditto.
21519 (floatv2siv2sf2): Ditto.
21520 (floatunsv2siv2sf2): Ditto.
21521 (nearbyintv2sf2): Ditto.
21522 (rintv2sf2): Ditto.
21523 (lrintv2sfv2si2): Ditto.
21524 (ceilv2sf2): Ditto.
21525 (lceilv2sfv2si2): Ditto.
21526 (floorv2sf2): Ditto.
21527 (lfloorv2sfv2si2): Ditto.
21528 (btruncv2sf2): Ditto.
21529 (roundv2sf2): Ditto.
21530 (lroundv2sfv2si2): Ditto.
21531 * doc/invoke.texi (x86 Options): Document
21532 -mpartial-vector-fp-math option.
21534 2023-08-08 Andrew Pinski <apinski@marvell.com>
21536 PR tree-optimization/103281
21537 PR tree-optimization/28794
21538 * vr-values.cc (simplify_using_ranges::simplify_cond_using_ranges_1): Split out
21540 (simplify_using_ranges::simplify_compare_using_ranges_1): Here.
21541 (simplify_using_ranges::simplify_casted_cond): Rename to ...
21542 (simplify_using_ranges::simplify_casted_compare): This
21543 and change arguments to take op0 and op1.
21544 (simplify_using_ranges::simplify_compare_assign_using_ranges_1): New method.
21545 (simplify_using_ranges::simplify): For tcc_comparison assignments call
21546 simplify_compare_assign_using_ranges_1.
21547 * vr-values.h (simplify_using_ranges): Add
21548 new methods, simplify_compare_using_ranges_1 and simplify_compare_assign_using_ranges_1.
21549 Rename simplify_casted_cond and simplify_casted_compare and
21550 update argument types.
21552 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
21554 * genmatch.cc: Log line numbers indirectly.
21556 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
21558 * genmatch.cc: Make sinfo map ordered.
21559 * Makefile.in: Require the ordered map header for genmatch.o.
21561 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
21563 * ordered-hash-map.h: Add get_or_insert.
21564 * ordered-hash-map-tests.cc: Use get_or_insert in tests.
21566 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21568 * config/riscv/autovec.md (cond_<optab><mode>): New pattern.
21569 (cond_len_<optab><mode>): Ditto.
21570 (cond_fma<mode>): Ditto.
21571 (cond_len_fma<mode>): Ditto.
21572 (cond_fnma<mode>): Ditto.
21573 (cond_len_fnma<mode>): Ditto.
21574 (cond_fms<mode>): Ditto.
21575 (cond_len_fms<mode>): Ditto.
21576 (cond_fnms<mode>): Ditto.
21577 (cond_len_fnms<mode>): Ditto.
21578 * config/riscv/riscv-protos.h (riscv_get_v_regno_alignment): Export
21580 (enum insn_type): Add new enum type.
21581 (prepare_ternary_operands): New function.
21582 * config/riscv/riscv-v.cc (emit_vlmax_masked_fp_mu_insn): Ditto.
21583 (emit_nonvlmax_tumu_insn): Ditto.
21584 (emit_nonvlmax_fp_tumu_insn): Ditto.
21585 (expand_cond_len_binop): Add condtional operations.
21586 (expand_cond_len_ternop): Ditto.
21587 (prepare_ternary_operands): New function.
21588 * config/riscv/riscv.cc (riscv_memmodel_needs_amo_release): Export
21589 riscv_get_v_regno_alignment as global scope.
21590 * config/riscv/vector.md: Fix ternary bugs.
21592 2023-08-08 Richard Biener <rguenther@suse.de>
21594 PR tree-optimization/49955
21595 * tree-vectorizer.h (_slp_instance::remain_stmts): New.
21596 (SLP_INSTANCE_REMAIN_STMTS): Likewise.
21597 * tree-vect-slp.cc (vect_free_slp_instance): Release
21598 SLP_INSTANCE_REMAIN_STMTS.
21599 (vect_build_slp_instance): Make the number of lanes of
21600 a BB reduction even.
21601 (vectorize_slp_instance_root_stmt): Handle unvectorized
21602 defs of a BB reduction.
21604 2023-08-08 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
21606 * internal-fn.cc (get_len_internal_fn): New function.
21607 (DEF_INTERNAL_COND_FN): Ditto.
21608 (DEF_INTERNAL_SIGNED_COND_FN): Ditto.
21609 * internal-fn.h (get_len_internal_fn): Ditto.
21610 * tree-vect-stmts.cc (vectorizable_call): Add CALL auto-vectorization.
21612 2023-08-08 Richard Biener <rguenther@suse.de>
21614 PR tree-optimization/110924
21615 * tree-ssa-live.h (virtual_operand_live): Update comment.
21616 * tree-ssa-live.cc (virtual_operand_live::get_live_in): Remove
21617 optimization, look at each predecessor.
21618 * tree-ssa-sink.cc (pass_sink_code::execute): Mark backedges.
21620 2023-08-08 yulong <shiyulong@iscas.ac.cn>
21622 * config/riscv/riscv-v.cc (slide1_sew64_helper): Modify.
21624 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21626 * config/riscv/autovec-vls.md (<optab><mode>2): Add VLS neg.
21627 * config/riscv/vector.md: Ditto.
21629 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21631 * config/riscv/autovec.md: Add VLS shift.
21633 2023-08-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21635 * config/riscv/autovec-vls.md (<optab><mode>3): Add VLS modes.
21636 * config/riscv/vector-iterators.md: Ditto.
21637 * config/riscv/vector.md: Ditto.
21639 2023-08-07 Jonathan Wakely <jwakely@redhat.com>
21641 * config/i386/i386.cc (ix86_invalid_conversion): Fix grammar.
21643 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
21645 * configure: Regenerate.
21647 2023-08-07 John Ericson <git@JohnEricson.me>
21649 * configure: Regenerate.
21651 2023-08-07 Alan Modra <amodra@gmail.com>
21653 * configure: Regenerate.
21655 2023-08-07 Alexander von Gluck IV <kallisti5@unixzen.com>
21657 * configure: Regenerate.
21659 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
21661 * configure: Regenerate.
21663 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
21665 * configure: Regenerate.
21667 2023-08-07 H.J. Lu <hjl.tools@gmail.com>
21669 * configure: Regenerate.
21671 2023-08-07 H.J. Lu <hjl.tools@gmail.com>
21673 * configure: Regenerate.
21675 2023-08-07 Jeff Law <jlaw@ventanamicro.com>
21677 * config/riscv/riscv.cc (riscv_expand_conditional_move): Allow
21678 VOIDmode operands to conditional before canonicalization.
21680 2023-08-07 Manolis Tsamis <manolis.tsamis@vrull.eu>
21682 * regcprop.cc (maybe_copy_reg_attrs): Remove unnecessary function.
21683 (find_oldest_value_reg): Inline stack_pointer_rtx check.
21684 (copyprop_hardreg_forward_1): Inline stack_pointer_rtx check.
21686 2023-08-07 Martin Jambor <mjambor@suse.cz>
21689 * ipa-param-manipulation.h (class ipa_param_body_adjustments): New
21690 members get_ddef_if_exists_and_is_used and mark_clobbers_dead.
21691 * ipa-sra.cc (isra_track_scalar_value_uses): Ignore clobbers.
21692 (ptr_parm_has_nonarg_uses): Likewise.
21693 * ipa-param-manipulation.cc
21694 (ipa_param_body_adjustments::get_ddef_if_exists_and_is_used): New.
21695 (ipa_param_body_adjustments::mark_dead_statements): Move initial
21696 checks to get_ddef_if_exists_and_is_used.
21697 (ipa_param_body_adjustments::mark_clobbers_dead): New.
21698 (ipa_param_body_adjustments::common_initialization): Call
21699 mark_clobbers_dead when splitting.
21701 2023-08-07 Raphael Zinsly <rzinsly@ventanamicro.com>
21703 * config/riscv/riscv.cc (riscv_expand_int_scc): Add invert_ptr
21704 as an argument and pass it to riscv_emit_int_order_test.
21705 (riscv_expand_conditional_move): Handle cases where the condition
21706 is not EQ/NE or the second argument to the conditional is not
21708 * config/riscv/riscv-protos.h (riscv_expand_int_scc): Update prototype.
21709 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
21711 2023-08-07 Andrew Pinski <apinski@marvell.com>
21713 PR tree-optimization/109959
21714 * match.pd (`(a > 1) ? 0 : (cast)a`, `(a <= 1) & (cast)a`):
21717 2023-08-07 Richard Biener <rguenther@suse.de>
21719 * tree-ssa-sink.cc (pass_sink_code::execute): Do not
21720 calculate post-dominators. Calculate RPO on the inverted
21721 graph and process blocks in that order.
21723 2023-08-07 liuhongt <hongtao.liu@intel.com>
21726 * config/i386/i386-protos.h
21727 (vpternlog_redundant_operand_mask): Adjust parameter type.
21728 * config/i386/i386.cc (vpternlog_redundant_operand_mask): Use
21729 INTVAL instead of XINT, also adjust parameter type from rtx*
21730 to rtx since the function only needs operands[4] in vpternlog
21732 (substitute_vpternlog_operands): Pass operands[4] instead of
21733 operands to vpternlog_redundant_operand_mask.
21734 * config/i386/sse.md: Ditto.
21736 2023-08-07 Richard Biener <rguenther@suse.de>
21738 * tree-vect-slp.cc (vect_slp_region): Save/restore vect_location
21739 around dumping code.
21741 2023-08-07 liuhongt <hongtao.liu@intel.com>
21744 * config/i386/mmx.md (<insn><mode>3): Changed from define_insn
21745 to define_expand and break into ..
21746 (<insn>v4hf3): .. this.
21747 (divv4hf3): .. this.
21748 (<insn>v2hf3): .. this.
21749 (divv2hf3): .. this.
21750 (movd_v2hf_to_sse): New define_expand.
21751 (movq_<mode>_to_sse): Extend to V4HFmode.
21752 (mmxdoublevecmode): Ditto.
21753 (V2FI_V4HF): New mode iterator.
21754 * config/i386/sse.md (*vec_concatv4sf): Extend to hanlde V8HF
21755 by using mode iterator V4SF_V8HF, renamed to ..
21756 (*vec_concat<mode>): .. this.
21757 (*vec_concatv4sf_0): Extend to handle V8HF by using mode
21758 iterator V4SF_V8HF, renamed to ..
21759 (*vec_concat<mode>_0): .. this.
21760 (*vec_concatv8hf_movss): New define_insn.
21761 (V4SF_V8HF): New mode iterator.
21763 2023-08-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21765 * tree-vect-patterns.cc (vect_recog_over_widening_pattern): Add op vectype.
21767 2023-08-07 Jan Beulich <jbeulich@suse.com>
21769 * config/i386/mmx.md (*mmx_pinsrd): Drop "prefix_data16".
21770 (*mmx_pinsrb): Likewise.
21771 (*mmx_pextrb): Likewise.
21772 (*mmx_pextrb_zext): Likewise.
21773 (mmx_pshufbv8qi3): Likewise.
21774 (mmx_pshufbv4qi3): Likewise.
21775 (mmx_pswapdv2si2): Likewise.
21776 (*pinsrb): Likewise.
21777 (*pextrb): Likewise.
21778 (*pextrb_zext): Likewise.
21779 * config/i386/sse.md (*sse4_1_mulv2siv2di3<mask_name>): Likewise.
21780 (*sse2_eq<mode>3): Likewise.
21781 (*sse2_gt<mode>3): Likewise.
21782 (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
21783 (*vec_extract<mode>): Likewise.
21784 (*vec_extract<PEXTR_MODE12:mode>_zext): Likewise.
21785 (*vec_extractv16qi_zext): Likewise.
21786 (ssse3_ph<plusminus_mnemonic>wv8hi3): Likewise.
21787 (ssse3_pmaddubsw128): Likewise.
21788 (*<ssse3_avx2>_pmulhrsw<mode>3<mask_name>): Likewise.
21789 (<ssse3_avx2>_pshufb<mode>3<mask_name>): Likewise.
21790 (<ssse3_avx2>_psign<mode>3): Likewise.
21791 (<ssse3_avx2>_palignr<mode>): Likewise.
21792 (*abs<mode>2): Likewise.
21793 (sse4_2_pcmpestr): Likewise.
21794 (sse4_2_pcmpestri): Likewise.
21795 (sse4_2_pcmpestrm): Likewise.
21796 (sse4_2_pcmpestr_cconly): Likewise.
21797 (sse4_2_pcmpistr): Likewise.
21798 (sse4_2_pcmpistri): Likewise.
21799 (sse4_2_pcmpistrm): Likewise.
21800 (sse4_2_pcmpistr_cconly): Likewise.
21801 (vgf2p8affineinvqb_<mode><mask_name>): Likewise.
21802 (vgf2p8affineqb_<mode><mask_name>): Likewise.
21803 (vgf2p8mulb_<mode><mask_name>): Likewise.
21804 (*<code>v8hi3 [smaxmin]): Drop "prefix_data16" and
21806 (*<code>v16qi3 [umaxmin]): Likewise.
21808 2023-08-07 Jan Beulich <jbeulich@suse.com>
21810 * config/i386/i386.md (sse4_1_round<mode>2): Make
21811 "length_immediate" uniformly 1.
21812 * config/i386/mmx.md (mmx_pblendvb_v8qi): Likewise.
21813 (mmx_pblendvb_<mode>): Likewise.
21815 2023-08-07 Jan Beulich <jbeulich@suse.com>
21817 * config/i386/sse.md
21818 (<avx512>_<complexopname>_<mode><maskc_name><round_name>): Add
21819 "prefix" attribute.
21820 (avx512fp16_<complexopname>sh_v8hf<mask_scalarc_name><round_scalarcz_name>):
21823 2023-08-07 Jan Beulich <jbeulich@suse.com>
21825 * config/i386/sse.md (xop_phadd<u>bw): Add "prefix",
21826 "prefix_extra", and "mode" attributes.
21827 (xop_phadd<u>bd): Likewise.
21828 (xop_phadd<u>bq): Likewise.
21829 (xop_phadd<u>wd): Likewise.
21830 (xop_phadd<u>wq): Likewise.
21831 (xop_phadd<u>dq): Likewise.
21832 (xop_phsubbw): Likewise.
21833 (xop_phsubwd): Likewise.
21834 (xop_phsubdq): Likewise.
21835 (xop_rotl<mode>3): Add "prefix" and "prefix_extra" attributes.
21836 (xop_rotr<mode>3): Likewise.
21837 (xop_frcz<mode>2): Likewise.
21838 (*xop_vmfrcz<mode>2): Likewise.
21839 (xop_vrotl<mode>3): Add "prefix" attribute. Change
21840 "prefix_extra" to 1.
21841 (xop_sha<mode>3): Likewise.
21842 (xop_shl<mode>3): Likewise.
21844 2023-08-07 Jan Beulich <jbeulich@suse.com>
21846 * config/i386/sse.md
21847 (*<avx512>_eq<mode>3<mask_scalar_merge_name>_1): Drop
21849 (avx512dq_vextract<shuffletype>64x2_1_mask): Likewise.
21850 (*avx512dq_vextract<shuffletype>64x2_1): Likewise.
21851 (avx512f_vextract<shuffletype>32x4_1_mask): Likewise.
21852 (*avx512f_vextract<shuffletype>32x4_1): Likewise.
21853 (vec_extract_lo_<mode>_mask [AVX512 forms]): Likewise.
21854 (vec_extract_lo_<mode> [AVX512 forms]): Likewise.
21855 (vec_extract_hi_<mode>_mask [AVX512 forms]): Likewise.
21856 (vec_extract_hi_<mode> [AVX512 forms]): Likewise.
21857 (@vec_extract_lo_<mode> [AVX512 forms]): Likewise.
21858 (@vec_extract_hi_<mode> [AVX512 forms]): Likewise.
21859 (vec_extract_lo_v64qi): Likewise.
21860 (vec_extract_hi_v64qi): Likewise.
21861 (*vec_widen_umult_even_v16si<mask_name>): Likewise.
21862 (*vec_widen_smult_even_v16si<mask_name>): Likewise.
21863 (*avx512f_<code><mode>3<mask_name>): Likewise.
21864 (*vec_extractv4ti): Likewise.
21865 (avx512bw_<code>v32qiv32hi2<mask_name>): Likewise.
21866 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1): Likewise.
21867 Add "length_immediate".
21869 2023-08-07 Jan Beulich <jbeulich@suse.com>
21871 * config/i386/i386.md (@rdrand<mode>): Add "prefix_0f". Drop
21873 (@rdseed<mode>): Likewise.
21874 * config/i386/mmx.md (<code><mode>3 [smaxmin and umaxmin cases]):
21875 Adjust "prefix_extra".
21876 * config/i386/sse.md (@vec_set<mode>_0): Likewise.
21877 (*sse4_1_<code><mode>3<mask_name>): Likewise.
21878 (*avx2_eq<mode>3): Likewise.
21879 (avx2_gt<mode>3): Likewise.
21880 (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
21881 (*vec_extract<mode>): Likewise.
21882 (<vi8_sse4_1_avx2_avx512>_movntdqa): Likewise.
21884 2023-08-07 Jan Beulich <jbeulich@suse.com>
21886 * config/i386/i386.md (rd<fsgs>base<mode>): Add "prefix_0f" and
21887 "prefix_rep". Drop "prefix_extra".
21888 (wr<fsgs>base<mode>): Likewise.
21889 (ptwrite<mode>): Likewise.
21891 2023-08-07 Jan Beulich <jbeulich@suse.com>
21893 * config/i386/i386.md (isa): Move up.
21894 (length_immediate): Handle "fma4".
21895 (prefix): Handle "ssemuladd".
21896 * config/i386/sse.md (*fma_fmadd_<mode>): Add "prefix" attribute.
21897 (<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name><round_name>):
21899 (<avx512>_fmadd_<mode>_mask<round_name>): Likewise.
21900 (<avx512>_fmadd_<mode>_mask3<round_name>): Likewise.
21901 (<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name><round_name>):
21903 (<avx512>_fmsub_<mode>_mask<round_name>): Likewise.
21904 (<avx512>_fmsub_<mode>_mask3<round_name>): Likewise.
21905 (*fma_fnmadd_<mode>): Likewise.
21906 (<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name><round_name>):
21908 (<avx512>_fnmadd_<mode>_mask<round_name>): Likewise.
21909 (<avx512>_fnmadd_<mode>_mask3<round_name>): Likewise.
21910 (<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name><round_name>):
21912 (<avx512>_fnmsub_<mode>_mask<round_name>): Likewise.
21913 (<avx512>_fnmsub_<mode>_mask3<round_name>): Likewise.
21914 (<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>):
21916 (<avx512>_fmaddsub_<mode>_mask<round_name>): Likewise.
21917 (<avx512>_fmaddsub_<mode>_mask3<round_name>): Likewise.
21918 (<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>):
21920 (<avx512>_fmsubadd_<mode>_mask<round_name>): Likewise.
21921 (<avx512>_fmsubadd_<mode>_mask3<round_name>): Likewise.
21922 (*fmai_fmadd_<mode>): Likewise.
21923 (*fmai_fmsub_<mode>): Likewise.
21924 (*fmai_fnmadd_<mode><round_name>): Likewise.
21925 (*fmai_fnmsub_<mode><round_name>): Likewise.
21926 (avx512f_vmfmadd_<mode>_mask<round_name>): Likewise.
21927 (avx512f_vmfmadd_<mode>_mask3<round_name>): Likewise.
21928 (avx512f_vmfmadd_<mode>_maskz_1<round_name>): Likewise.
21929 (*avx512f_vmfmsub_<mode>_mask<round_name>): Likewise.
21930 (avx512f_vmfmsub_<mode>_mask3<round_name>): Likewise.
21931 (*avx512f_vmfmsub_<mode>_maskz_1<round_name>): Likewise.
21932 (avx512f_vmfnmadd_<mode>_mask<round_name>): Likewise.
21933 (avx512f_vmfnmadd_<mode>_mask3<round_name>): Likewise.
21934 (avx512f_vmfnmadd_<mode>_maskz_1<round_name>): Likewise.
21935 (*avx512f_vmfnmsub_<mode>_mask<round_name>): Likewise.
21936 (*avx512f_vmfnmsub_<mode>_mask3<round_name>): Likewise.
21937 (*avx512f_vmfnmsub_<mode>_maskz_1<round_name>): Likewise.
21938 (*fma4i_vmfmadd_<mode>): Likewise.
21939 (*fma4i_vmfmsub_<mode>): Likewise.
21940 (*fma4i_vmfnmadd_<mode>): Likewise.
21941 (*fma4i_vmfnmsub_<mode>): Likewise.
21942 (fma_<complexopname>_<mode><sdc_maskz_name><round_name>): Likewise.
21943 (<avx512>_<complexopname>_<mode>_mask<round_name>): Likewise.
21944 (avx512fp16_fma_<complexopname>sh_v8hf<mask_scalarcz_name><round_scalarcz_name>):
21946 (avx512fp16_<complexopname>sh_v8hf_mask<round_name>): Likewise.
21947 (xop_p<macs><ssemodesuffix><ssemodesuffix>): Likewise.
21948 (xop_p<macs>dql): Likewise.
21949 (xop_p<macs>dqh): Likewise.
21950 (xop_p<macs>wd): Likewise.
21951 (xop_p<madcs>wd): Likewise.
21952 (fma_<complexpairopname>_<mode>_pair): Likewise. Add "mode" attribute.
21954 2023-08-07 Jan Beulich <jbeulich@suse.com>
21956 * config/i386/i386.md (length_immediate): Handle "sse4arg".
21957 (prefix): Likewise.
21958 (*xop_pcmov_<mode>): Add "mode" attribute.
21959 * config/i386/mmx.md (*xop_maskcmp<mode>3): Drop "prefix_data16",
21960 "prefix_rep", "prefix_extra", and "length_immediate" attributes.
21961 (*xop_maskcmp_uns<mode>3): Likewise. Switch "type" to "sse4arg".
21962 (*xop_pcmov_<mode>): Add "mode" attribute.
21963 * config/i386/sse.md (xop_pcmov_<mode><avxsizesuffix>): Add "mode"
21965 (xop_maskcmp<mode>3): Drop "prefix_data16", "prefix_rep",
21966 "prefix_extra", and "length_immediate" attributes.
21967 (xop_maskcmp_uns<mode>3): Likewise. Switch "type" to "sse4arg".
21968 (xop_maskcmp_uns2<mode>3): Drop "prefix_data16", "prefix_extra",
21969 and "length_immediate" attributes. Switch "type" to "sse4arg".
21970 (xop_pcom_tf<mode>3): Likewise.
21971 (xop_vpermil2<mode>3): Drop "length_immediate" attribute.
21973 2023-08-07 Jan Beulich <jbeulich@suse.com>
21975 * config/i386/i386.md (prefix_extra): Correct comment. Fold
21976 cases yielding 2 into ones yielding 1.
21978 2023-08-07 Jan Hubicka <jh@suse.cz>
21980 PR tree-optimization/106293
21981 * tree-vect-loop-manip.cc (vect_loop_versioning): Fix profile update.
21982 * tree-vect-loop.cc (vect_transform_loop): Likewise.
21984 2023-08-07 Andrew Pinski <apinski@marvell.com>
21986 PR tree-optimization/96695
21987 * match.pd (min_value, max_value): Extend to
21990 2023-08-06 Jan Hubicka <jh@suse.cz>
21992 * config/i386/cpuid.h (__get_cpuid_count, __get_cpuid_max): Add
21993 __builtin_expect that CPU likely supports cpuid.
21995 2023-08-06 Jan Hubicka <jh@suse.cz>
21997 * tree-loop-distribution.cc (loop_distribution::execute): Disable
21998 distribution for loops with estimated iterations 0.
22000 2023-08-06 Jan Hubicka <jh@suse.cz>
22002 * tree-vect-loop-manip.cc (vect_do_peeling): Fix profile update of peeled epilogues.
22004 2023-08-04 Xiao Zeng <zengxiao@eswincomputing.com>
22006 * config/riscv/riscv.cc (riscv_expand_conditional_move): Recognize
22007 more Zicond patterns. Fix whitespace typo.
22008 (riscv_rtx_costs): Remove accidental code duplication.
22009 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
22011 2023-08-04 Yan Simonaytes <simonaytes.yan@ispras.ru>
22014 * config/i386/i386-protos.h
22015 (vpternlog_redundant_operand_mask): Declare.
22016 (substitute_vpternlog_operands): Declare.
22017 * config/i386/i386.cc
22018 (vpternlog_redundant_operand_mask): New helper.
22019 (substitute_vpternlog_operands): New function. Use them...
22020 * config/i386/sse.md: ... here in new VPTERNLOG define_splits.
22022 2023-08-04 Roger Sayle <roger@nextmovesoftware.com>
22024 * expmed.cc (extract_bit_field_1): Document that an UNSIGNEDP
22025 value of -1 is equivalent to don't care.
22026 (extract_integral_bit_field): Indicate that we don't require
22027 the most significant word to be zero extended, if we're about
22029 (extract_fixed_bit_field_1): Document that an UNSIGNEDP value
22030 of -1 is equivalent to don't care. Don't clear the most
22031 significant bits with AND mask when UNSIGNEDP is -1.
22033 2023-08-04 Roger Sayle <roger@nextmovesoftware.com>
22035 * config/i386/sse.md (define_split): Convert highpart:DF extract
22036 from V2DFmode register into a sse2_storehpd instruction.
22037 (define_split): Likewise, convert lowpart:DF extract from V2DF
22038 register into a sse2_storelpd instruction.
22040 2023-08-04 Qing Zhao <qing.zhao@oracle.com>
22042 * doc/invoke.texi (-Wflex-array-member-not-at-end): Document
22045 2023-08-04 Vladimir N. Makarov <vmakarov@redhat.com>
22047 * lra-lives.cc (process_bb_lives): Check input insn pattern hard regs
22048 against early clobber hard regs.
22050 2023-08-04 Tamar Christina <tamar.christina@arm.com>
22052 * doc/extend.texi: Document it.
22054 2023-08-04 Tamar Christina <tamar.christina@arm.com>
22057 * config/aarch64/aarch64-simd.md (vec_widen_<sur>shiftl_lo_<mode>,
22058 vec_widen_<sur>shiftl_hi_<mode>): Remove.
22059 (aarch64_<sur>shll<mode>_internal): Renamed to...
22060 (aarch64_<su>shll<mode>): .. This.
22061 (aarch64_<sur>shll2<mode>_internal): Renamed to...
22062 (aarch64_<su>shll2<mode>): .. This.
22063 (aarch64_<sur>shll_n<mode>, aarch64_<sur>shll2_n<mode>): Re-use new
22065 * config/aarch64/constraints.md (D2, DL): New.
22066 * config/aarch64/predicates.md (aarch64_simd_shll_imm_vec): New.
22068 2023-08-04 Tamar Christina <tamar.christina@arm.com>
22070 * gensupport.cc (conlist): Support length 0 attribute.
22072 2023-08-04 Tamar Christina <tamar.christina@arm.com>
22074 * config/aarch64/aarch64.cc (aarch64_bool_compound_p): New.
22075 (aarch64_adjust_stmt_cost, aarch64_vector_costs::count_ops): Use it.
22077 2023-08-04 Tamar Christina <tamar.christina@arm.com>
22079 * config/aarch64/aarch64.cc (aarch64_multiply_add_p): Update handling
22081 (aarch64_adjust_stmt_cost): Use it.
22082 (aarch64_vector_costs::count_ops): Likewise.
22083 (aarch64_vector_costs::add_stmt_cost): Pass vinfo to
22084 aarch64_adjust_stmt_cost.
22086 2023-08-04 Richard Biener <rguenther@suse.de>
22088 PR tree-optimization/110838
22089 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
22090 Fix right-shift value sanitizing. Properly emit external
22091 def mangling in the preheader rather than in the pattern
22092 def sequence where it will fail vectorizing.
22094 2023-08-04 Matthew Malcomson <matthew.malcomson@arm.com>
22096 PR middle-end/110316
22098 * timevar.cc (NANOSEC_PER_SEC, TICKS_TO_NANOSEC,
22099 CLOCKS_TO_NANOSEC, nanosec_to_floating_sec, percent_of): New.
22100 (TICKS_TO_MSEC, CLOCKS_TO_MSEC): Remove these macros.
22101 (timer::validate_phases): Use integral arithmetic to check
22103 (timer::print_row, timer::print): Convert from integral
22104 nanoseconds to floating point seconds before printing.
22105 (timer::all_zero): Change limit to nanosec count instead of
22106 fractional count of seconds.
22107 (make_json_for_timevar_time_def): Convert from integral
22108 nanoseconds to floating point seconds before recording.
22109 * timevar.h (struct timevar_time_def): Update all measurements
22110 to use uint64_t nanoseconds rather than seconds stored in a
22113 2023-08-04 Richard Biener <rguenther@suse.de>
22115 PR tree-optimization/110838
22116 * match.pd (([rl]shift @0 out-of-bounds) -> zero): Restrict
22117 the arithmetic right-shift case to non-negative operands.
22119 2023-08-04 Pan Li <pan2.li@intel.com>
22122 2023-08-04 Pan Li <pan2.li@intel.com>
22124 * config/riscv/riscv-vector-builtins-bases.cc
22125 (class vfmacc_frm): New class for vfmacc frm.
22126 (vfmacc_frm_obj): New declaration.
22128 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
22129 * config/riscv/riscv-vector-builtins-functions.def
22130 (vfmacc_frm): New function definition.
22131 * config/riscv/riscv-vector-builtins.cc
22132 (function_expander::use_ternop_insn): Add frm operand support.
22133 * config/riscv/vector.md: Add vfmuladd to frm_mode.
22135 2023-08-04 Pan Li <pan2.li@intel.com>
22138 2023-08-04 Pan Li <pan2.li@intel.com>
22140 * config/riscv/riscv-vector-builtins-bases.cc
22141 (class vfnmacc_frm): New class for vfnmacc.
22142 (vfnmacc_frm_obj): New declaration.
22144 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
22145 * config/riscv/riscv-vector-builtins-functions.def
22146 (vfnmacc_frm): New function definition.
22148 2023-08-04 Pan Li <pan2.li@intel.com>
22151 2023-08-04 Pan Li <pan2.li@intel.com>
22153 * config/riscv/riscv-vector-builtins-bases.cc
22154 (class vfmsac_frm): New class for vfmsac frm.
22155 (vfmsac_frm_obj): New declaration.
22157 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
22158 * config/riscv/riscv-vector-builtins-functions.def
22159 (vfmsac_frm): New function definition.
22161 2023-08-04 Pan Li <pan2.li@intel.com>
22164 2023-08-04 Pan Li <pan2.li@intel.com>
22166 * config/riscv/riscv-vector-builtins-bases.cc
22167 (class vfnmsac_frm): New class for vfnmsac frm.
22168 (vfnmsac_frm_obj): New declaration.
22170 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
22171 * config/riscv/riscv-vector-builtins-functions.def
22172 (vfnmsac_frm): New function definition.
22174 2023-08-04 Georg-Johann Lay <avr@gjlay.de>
22176 * config/avr/avr-mcus.def (avr64dd14, avr64dd20, avr64dd28, avr64dd32)
22177 (avr64ea28, avr64ea32, avr64ea48, attiny424, attiny426, attiny427)
22178 (attiny824, attiny826, attiny827, attiny1624, attiny1626, attiny1627)
22179 (attiny3224, attiny3226, attiny3227, avr16dd14, avr16dd20, avr16dd28)
22180 (avr16dd32, avr32dd14, avr32dd20, avr32dd28, avr32dd32)
22181 (attiny102, attiny104): New devices.
22182 * doc/avr-mmcu.texi: Regenerate.
22184 2023-08-04 Georg-Johann Lay <avr@gjlay.de>
22186 * config/avr/avr-mcus.def (avr128d*, avr64d*): Fix their FLASH_SIZE
22187 and PM_OFFSET entries.
22189 2023-08-04 Andrew Pinski <apinski@marvell.com>
22191 PR tree-optimization/110874
22192 * gimple-match-head.cc (gimple_bit_not_with_nop): New declaration.
22193 (gimple_maybe_cmp): Likewise.
22194 (gimple_bitwise_inverted_equal_p): Rewrite to use gimple_bit_not_with_nop
22195 and gimple_maybe_cmp instead of being recursive.
22196 * match.pd (bit_not_with_nop): New match pattern.
22197 (maybe_cmp): Likewise.
22199 2023-08-04 Drew Ross <drross@redhat.com>
22201 PR middle-end/101955
22202 * match.pd ((signed x << c) >> c): New canonicalization.
22204 2023-08-04 Pan Li <pan2.li@intel.com>
22206 * config/riscv/riscv-vector-builtins-bases.cc
22207 (class vfnmsac_frm): New class for vfnmsac frm.
22208 (vfnmsac_frm_obj): New declaration.
22210 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
22211 * config/riscv/riscv-vector-builtins-functions.def
22212 (vfnmsac_frm): New function definition.
22214 2023-08-04 Pan Li <pan2.li@intel.com>
22216 * config/riscv/riscv-vector-builtins-bases.cc
22217 (class vfmsac_frm): New class for vfmsac frm.
22218 (vfmsac_frm_obj): New declaration.
22220 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
22221 * config/riscv/riscv-vector-builtins-functions.def
22222 (vfmsac_frm): New function definition.
22224 2023-08-04 Pan Li <pan2.li@intel.com>
22226 * config/riscv/riscv-vector-builtins-bases.cc
22227 (class vfnmacc_frm): New class for vfnmacc.
22228 (vfnmacc_frm_obj): New declaration.
22230 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
22231 * config/riscv/riscv-vector-builtins-functions.def
22232 (vfnmacc_frm): New function definition.
22234 2023-08-04 Hao Liu <hliu@os.amperecomputing.com>
22237 * config/aarch64/aarch64.cc (aarch64_force_single_cycle): check
22238 STMT_VINFO_REDUC_DEF to avoid failures in info_for_reduction.
22240 2023-08-04 Pan Li <pan2.li@intel.com>
22242 * config/riscv/riscv-vector-builtins-bases.cc
22243 (class vfmacc_frm): New class for vfmacc frm.
22244 (vfmacc_frm_obj): New declaration.
22246 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
22247 * config/riscv/riscv-vector-builtins-functions.def
22248 (vfmacc_frm): New function definition.
22249 * config/riscv/riscv-vector-builtins.cc
22250 (function_expander::use_ternop_insn): Add frm operand support.
22251 * config/riscv/vector.md: Add vfmuladd to frm_mode.
22253 2023-08-04 Pan Li <pan2.li@intel.com>
22255 * config/riscv/riscv-vector-builtins-bases.cc
22256 (vfwmul_frm_obj): New declaration.
22257 (vfwmul_frm): Ditto.
22258 * config/riscv/riscv-vector-builtins-bases.h:
22259 (vfwmul_frm): Ditto.
22260 * config/riscv/riscv-vector-builtins-functions.def
22261 (vfwmul_frm): New function definition.
22262 * config/riscv/vector.md: (frm_mode) Add vfwmul to frm_mode.
22264 2023-08-04 Pan Li <pan2.li@intel.com>
22266 * config/riscv/riscv-vector-builtins-bases.cc
22267 (binop_frm): New declaration.
22268 (reverse_binop_frm): Likewise.
22270 * config/riscv/riscv-vector-builtins-bases.h:
22271 (vfdiv_frm): New extern declaration.
22272 (vfrdiv_frm): Likewise.
22273 * config/riscv/riscv-vector-builtins-functions.def
22274 (vfdiv_frm): New function definition.
22275 (vfrdiv_frm): Likewise.
22276 * config/riscv/vector.md: Add vfdiv to frm_mode.
22278 2023-08-03 Jan Hubicka <jh@suse.cz>
22280 * tree-cfg.cc (print_loop_info): Print entry count.
22282 2023-08-03 Jan Hubicka <jh@suse.cz>
22284 * tree-ssa-loop-split.cc (split_loop): Update estimated iteration counts.
22286 2023-08-03 Jan Hubicka <jh@suse.cz>
22288 PR bootstrap/110857
22289 * cfgloopmanip.cc (scale_loop_profile): (Un)initialize
22290 unadjusted_exit_count.
22292 2023-08-03 Aldy Hernandez <aldyh@redhat.com>
22294 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Read global
22297 2023-08-03 Xiao Zeng <zengxiao@eswincomputing.com>
22299 * config/riscv/riscv.cc (riscv_expand_conditional_move): Recognize
22300 various Zicond patterns.
22301 * config/riscv/riscv.md (mov<mode>cc): Allow TARGET_ZICOND. Use
22302 sfb_alu_operand for both arms of the conditional move.
22303 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
22305 2023-08-03 Cupertino Miranda <cupertino.miranda@oracle.com>
22311 * config.gcc: Added core-builtins.cc and .o files.
22312 * config/bpf/bpf-passes.def: Removed file.
22313 * config/bpf/bpf-protos.h (bpf_add_core_reloc,
22314 bpf_replace_core_move_operands): New prototypes.
22315 * config/bpf/bpf.cc (enum bpf_builtins, is_attr_preserve_access,
22316 maybe_make_core_relo, bpf_core_field_info, bpf_core_compute,
22317 bpf_core_get_index, bpf_core_new_decl, bpf_core_walk,
22318 bpf_is_valid_preserve_field_info_arg, is_attr_preserve_access,
22319 handle_attr_preserve, pass_data_bpf_core_attr, pass_bpf_core_attr):
22321 (def_builtin, bpf_expand_builtin, bpf_resolve_overloaded_builtin): Changed.
22322 * config/bpf/bpf.md (define_expand mov<MM:mode>): Changed.
22323 (mov_reloc_core<mode>): Added.
22324 * config/bpf/core-builtins.cc (struct cr_builtin, enum
22325 cr_decision struct cr_local, struct cr_final, struct
22326 core_builtin_helpers, enum bpf_plugin_states): Added types.
22327 (builtins_data, core_builtin_helpers, core_builtin_type_defs):
22329 (allocate_builtin_data, get_builtin-data, search_builtin_data,
22330 remove_parser_plugin, compare_same_kind, compare_same_ptr_expr,
22331 compare_same_ptr_type, is_attr_preserve_access, core_field_info,
22332 bpf_core_get_index, compute_field_expr,
22333 pack_field_expr_for_access_index, pack_field_expr_for_preserve_field,
22334 process_field_expr, pack_enum_value, process_enum_value, pack_type,
22335 process_type, bpf_require_core_support, make_core_relo, read_kind,
22336 kind_access_index, kind_preserve_field_info, kind_enum_value,
22337 kind_type_id, kind_preserve_type_info, get_core_builtin_fndecl_for_type,
22338 bpf_handle_plugin_finish_type, bpf_init_core_builtins,
22339 construct_builtin_core_reloc, bpf_resolve_overloaded_core_builtin,
22340 bpf_expand_core_builtin, bpf_add_core_reloc,
22341 bpf_replace_core_move_operands): Added functions.
22342 * config/bpf/core-builtins.h (enum bpf_builtins): Added.
22343 (bpf_init_core_builtins, bpf_expand_core_builtin,
22344 bpf_resolve_overloaded_core_builtin): Added functions.
22345 * config/bpf/coreout.cc (struct bpf_core_extra): Added.
22346 (bpf_core_reloc_add, output_asm_btfext_core_reloc): Changed.
22347 * config/bpf/coreout.h (bpf_core_reloc_add) Changed prototype.
22348 * config/bpf/t-bpf: Added core-builtins.o.
22349 * doc/extend.texi: Added documentation for new BPF builtins.
22351 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
22353 * gimple-range-fold.cc (fold_using_range::range_of_range_op): Add
22354 ranges to the call to relation_fold_and_or.
22355 (fold_using_range::relation_fold_and_or): Add op1 and op2 ranges.
22356 (fur_source::register_outgoing_edges): Add op1 and op2 ranges.
22357 * gimple-range-fold.h (relation_fold_and_or): Adjust params.
22358 * gimple-range-gori.cc (gori_compute::compute_operand_range): Add
22359 a varying op1 and op2 to call.
22360 * range-op-float.cc (range_operator::op1_op2_relation): New dafaults.
22361 (operator_equal::op1_op2_relation): New float version.
22362 (operator_not_equal::op1_op2_relation): Ditto.
22363 (operator_lt::op1_op2_relation): Ditto.
22364 (operator_le::op1_op2_relation): Ditto.
22365 (operator_gt::op1_op2_relation): Ditto.
22366 (operator_ge::op1_op2_relation) Ditto.
22367 * range-op-mixed.h (operator_equal::op1_op2_relation): New float
22369 (operator_not_equal::op1_op2_relation): Ditto.
22370 (operator_lt::op1_op2_relation): Ditto.
22371 (operator_le::op1_op2_relation): Ditto.
22372 (operator_gt::op1_op2_relation): Ditto.
22373 (operator_ge::op1_op2_relation): Ditto.
22374 * range-op.cc (range_op_handler::op1_op2_relation): Dispatch new
22376 (range_operator::op1_op2_relation): Add extra params.
22377 (operator_equal::op1_op2_relation): Ditto.
22378 (operator_not_equal::op1_op2_relation): Ditto.
22379 (operator_lt::op1_op2_relation): Ditto.
22380 (operator_le::op1_op2_relation): Ditto.
22381 (operator_gt::op1_op2_relation): Ditto.
22382 (operator_ge::op1_op2_relation): Ditto.
22383 * range-op.h (range_operator): New prototypes.
22384 (range_op_handler): Ditto.
22386 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
22388 * gimple-range-gori.cc (gori_compute::compute_operand1_range):
22389 Use identity relation.
22390 (gori_compute::compute_operand2_range): Ditto.
22391 * value-relation.cc (get_identity_relation): New.
22392 * value-relation.h (get_identity_relation): New prototype.
22394 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
22396 * value-range.h (Value_Range::set_varying): Set the type.
22397 (Value_Range::set_zero): Ditto.
22398 (Value_Range::set_nonzero): Ditto.
22400 2023-08-03 Jeff Law <jeffreyalaw@gmail.com>
22402 * config/riscv/riscv.cc (riscv_rtx_costs): Remove errant hunk from
22405 2023-08-03 Pan Li <pan2.li@intel.com>
22407 * config/riscv/riscv-vector-builtins-bases.cc: Add vfsub.
22409 2023-08-03 Richard Sandiford <richard.sandiford@arm.com>
22411 * poly-int.h (can_div_trunc_p): Succeed for more boundary conditions.
22413 2023-08-03 Richard Biener <rguenther@suse.de>
22415 PR tree-optimization/110838
22416 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
22417 Adjust the shift operand of RSHIFT_EXPRs.
22419 2023-08-03 Richard Biener <rguenther@suse.de>
22421 PR tree-optimization/110702
22422 * tree-ssa-loop-ivopts.cc (rewrite_use_address): When
22423 we created a NULL pointer based access rewrite that to
22426 2023-08-03 Richard Biener <rguenther@suse.de>
22428 * tree-ssa-sink.cc: Include tree-ssa-live.h.
22429 (pass_sink_code::execute): Instantiate virtual_operand_live
22431 (sink_code_in_bb): Pass down virtual_operand_live.
22432 (statement_sink_location): Get virtual_operand_live and
22433 verify we are not sinking loads across stores by looking up
22434 the live virtual operand at the sink location.
22436 2023-08-03 Richard Biener <rguenther@suse.de>
22438 * tree-ssa-live.h (class virtual_operand_live): New.
22439 * tree-ssa-live.cc (virtual_operand_live::init): New.
22440 (virtual_operand_live::get_live_in): Likewise.
22441 (virtual_operand_live::get_live_out): Likewise.
22443 2023-08-03 Richard Biener <rguenther@suse.de>
22445 * passes.def: Exchange loop splitting and final value
22446 replacement passes.
22448 2023-08-03 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
22450 * config/s390/s390.cc (expand_perm_as_a_vlbr_vstbr_candidate):
22451 New function which handles bswap patterns for vec_perm_const.
22452 (vectorize_vec_perm_const_1): Call new function.
22453 * config/s390/vector.md (*bswap<mode>): Fix operands in output
22455 (*vstbr<mode>): New insn.
22457 2023-08-03 Alexandre Oliva <oliva@adacore.com>
22459 * config/vxworks-smp.opt: New. Introduce -msmp.
22460 * config.gcc: Enable it on powerpc* vxworks prior to 7r*.
22461 * config/rs6000/vxworks.h (STARTFILE_PREFIX_SPEC): Choose
22462 lib_smp when -msmp is present in the command line.
22463 * doc/invoke.texi: Document it.
22465 2023-08-03 Yanzhang Wang <yanzhang.wang@intel.com>
22467 * config/riscv/riscv.cc (riscv_save_reg_p): Save ra for leaf
22468 when enabling -mno-omit-leaf-frame-pointer
22469 (riscv_option_override): Override omit-frame-pointer.
22470 (riscv_frame_pointer_required): Save s0 for non-leaf function
22471 (TARGET_FRAME_POINTER_REQUIRED): Override defination
22472 * config/riscv/riscv.opt: Add option support.
22474 2023-08-03 Roger Sayle <roger@nextmovesoftware.com>
22477 * config/i386/i386.md (<any_rotate>ti3): For rotations by 64 bits
22478 place operand in a register before gen_<insn>64ti2_doubleword.
22479 (<any_rotate>di3): Likewise, for rotations by 32 bits, place
22480 operand in a register before gen_<insn>32di2_doubleword.
22481 (<any_rotate>32di2_doubleword): Constrain operand to be in register.
22482 (<any_rotate>64ti2_doubleword): Likewise.
22484 2023-08-03 Pan Li <pan2.li@intel.com>
22486 * config/riscv/riscv-vector-builtins-bases.cc
22487 (vfmul_frm_obj): New declaration.
22489 * config/riscv/riscv-vector-builtins-bases.h: Likewise.
22490 * config/riscv/riscv-vector-builtins-functions.def
22491 (vfmul_frm): New function definition.
22492 * config/riscv/vector.md: Add vfmul to frm_mode.
22494 2023-08-03 Andrew Pinski <apinski@marvell.com>
22496 * match.pd (`~X & X`): Check that the types match.
22497 (`~x | x`, `~x ^ x`): Likewise.
22499 2023-08-03 Pan Li <pan2.li@intel.com>
22501 * config/riscv/riscv-vector-builtins-bases.h: Remove
22502 redudant declaration.
22504 2023-08-03 Pan Li <pan2.li@intel.com>
22506 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Add
22508 * config/riscv/riscv-vector-builtins-bases.h: Add declaration.
22509 * config/riscv/riscv-vector-builtins-functions.def (vfwsub_frm):
22510 Add vfwsub function definitions.
22512 2023-08-02 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
22514 PR rtl-optimization/110867
22515 * combine.cc (simplify_compare_const): Try the optimization only
22516 in case the constant fits into the comparison mode.
22518 2023-08-02 Jeff Law <jlaw@ventanamicro.com>
22520 * config/riscv/zicond.md: Remove incorrect zicond patterns and
22521 renumber/rename them.
22522 (zero.nez.<GPR:MODE><X:mode>.opt2): Fix output string.
22524 2023-08-02 Richard Biener <rguenther@suse.de>
22526 * tree-phinodes.h (add_phi_node_to_bb): Remove.
22527 * tree-phinodes.cc (add_phi_node_to_bb): Make static.
22529 2023-08-02 Jan Beulich <jbeulich@suse.com>
22531 * config/i386/sse.md (vec_dupv2df<mask_name>): Fold the middle
22532 two of the alternatives.
22534 2023-08-02 Richard Biener <rguenther@suse.de>
22536 PR tree-optimization/92335
22537 * tree-ssa-sink.cc (select_best_block): Before loop
22538 optimizations avoid sinking unconditional loads/stores
22539 in innermost loops to conditional executed places.
22541 2023-08-02 Andrew Pinski <apinski@marvell.com>
22543 * gimple-match-head.cc (gimple_bitwise_inverted_equal_p): Valueize
22544 the comparison operands before comparing them.
22546 2023-08-02 Andrew Pinski <apinski@marvell.com>
22548 * match.pd (`~X & X`, `~X | X`): Move over to
22549 use bitwise_inverted_equal_p, removing :c as bitwise_inverted_equal_p
22550 handles that already.
22551 Remove range test simplifications to true/false as they
22552 are now handled by these patterns.
22554 2023-08-02 Andrew Pinski <apinski@marvell.com>
22556 * tree-ssa-phiopt.cc (match_simplify_replacement): Mark's cond
22557 statement's lhs and rhs to check if trivial dead.
22558 Rename inserted_exprs to exprs_maybe_dce; also move it so
22559 bitmap is not allocated if not needed.
22561 2023-08-02 Pan Li <pan2.li@intel.com>
22563 * config/riscv/riscv-vector-builtins-bases.cc
22564 (class widen_binop_frm): New class for binop frm.
22565 (BASE): Add vfwadd_frm.
22566 * config/riscv/riscv-vector-builtins-bases.h: New declaration.
22567 * config/riscv/riscv-vector-builtins-functions.def
22568 (vfwadd_frm): New function definition.
22569 * config/riscv/riscv-vector-builtins-shapes.cc
22570 (BASE_NAME_MAX_LEN): New macro.
22571 (struct alu_frm_def): Leverage new base class.
22572 (struct build_frm_base): New build base for frm.
22573 (struct widen_alu_frm_def): New struct for widen alu frm.
22574 (SHAPE): Add widen_alu_frm shape.
22575 * config/riscv/riscv-vector-builtins-shapes.h: New declaration.
22576 * config/riscv/vector.md (frm_mode): Add vfwalu type.
22578 2023-08-02 Jan Hubicka <jh@suse.cz>
22580 * cfgloop.h (loop_count_in): Declare.
22581 * cfgloopanal.cc (expected_loop_iterations_by_profile): Use count_in.
22582 (loop_count_in): Move here from ...
22583 * cfgloopmanip.cc (loop_count_in): ... here.
22584 (scale_loop_profile): Improve dumping; cast iteration bound to sreal.
22586 2023-08-02 Jan Hubicka <jh@suse.cz>
22588 * cfg.cc (scale_strictly_dominated_blocks): New function.
22589 * cfg.h (scale_strictly_dominated_blocks): Declare.
22590 * tree-cfg.cc (fold_loop_internal_call): Fixup CFG profile.
22592 2023-08-02 Richard Biener <rguenther@suse.de>
22594 PR rtl-optimization/110587
22595 * lra-spills.cc (return_regno_p): Remove.
22596 (regno_in_use_p): Likewise.
22597 (lra_final_code_change): Do not remove noop moves
22598 between hard registers.
22600 2023-08-02 liuhongt <hongtao.liu@intel.com>
22603 * config/i386/sse.md (vec_fmaddsub<mode>4): Extend to vector
22604 HFmode, use mode iterator VFH instead.
22605 (vec_fmsubadd<mode>4): Ditto.
22606 (<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>):
22607 Remove scalar mode from iterator, use VFH_AVX512VL instead.
22608 (<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>):
22611 2023-08-02 liuhongt <hongtao.liu@intel.com>
22613 * config/i386/sse.md (*avx2_lddqu_inserti_to_bcasti): New
22614 pre_reload define_insn_and_split.
22616 2023-08-02 Xiao Zeng <zengxiao@eswincomputing.com>
22618 * config/riscv/riscv.cc (riscv_rtx_costs): Add costing for
22619 using Zicond to implement some conditional moves.
22621 2023-08-02 Jeff Law <jlaw@ventanamicro.com>
22623 * config/riscv/zicond.md: Use the X iterator instead of ANYI
22624 on the comparison input operands.
22626 2023-08-02 Xiao Zeng <zengxiao@eswincomputing.com>
22628 * config/riscv/riscv.cc (riscv_rtx_costs, case IF_THEN_ELSE): Add
22630 (case SET): For INSNs that just set a REG, take the cost from the
22632 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
22634 2023-08-02 Hu, Lin1 <lin1.hu@intel.com>
22636 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_AMX_INT8_SET):
22637 Change OPTION_MASK_ISA2_AMX_TILE to OPTION_MASK_ISA2_AMX_TILE_SET.
22638 (OPTION_MASK_ISA2_AMX_BF16_SET): Ditto
22639 (OPTION_MASK_ISA2_AMX_FP16_SET): Ditto
22640 (OPTION_MASK_ISA2_AMX_COMPLEX_SET): Ditto
22641 (OPTION_MASK_ISA_ABM_SET):
22642 Change OPTION_MASK_ISA_POPCNT to OPTION_MASK_ISA_POPCNT_SET.
22644 2023-08-01 Andreas Krebbel <krebbel@linux.ibm.com>
22646 * config/s390/s390.cc (s390_encode_section_info): Assume external
22647 symbols without explicit alignment to be unaligned if
22648 -munaligned-symbols has been specified.
22649 * config/s390/s390.opt (-munaligned-symbols): New option.
22651 2023-08-01 Richard Ball <richard.ball@arm.com>
22653 * gimple-fold.cc (fold_ctor_reference):
22654 Add support for poly_int.
22656 2023-08-01 Georg-Johann Lay <avr@gjlay.de>
22659 * config/avr/avr.cc (avr_optimize_casesi): Set JUMP_LABEL and
22660 LABEL_NUSES of new conditional branch instruction.
22662 2023-08-01 Jan Hubicka <jh@suse.cz>
22664 * tree-vect-loop-manip.cc (vect_do_peeling): Fix profile update after
22665 constant prologue peeling.
22667 2023-08-01 Christophe Lyon <christophe.lyon@linaro.org>
22669 * doc/sourcebuild.texi (arm_v8_1m_main_cde_mve_fp): Fix spelling.
22671 2023-08-01 Pan Li <pan2.li@intel.com>
22672 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22674 * config/riscv/riscv.cc (DYNAMIC_FRM_RTL): New macro.
22675 (STATIC_FRM_P): Ditto.
22676 (struct mode_switching_info): New struct for mode switching.
22677 (struct machine_function): Add new field mode switching.
22678 (riscv_emit_frm_mode_set): Add DYN_CALL emit.
22679 (riscv_frm_adjust_mode_after_call): New function for call mode.
22680 (riscv_frm_emit_after_call_in_bb_end): New function for emit
22681 insn when call as the end of bb.
22682 (riscv_frm_mode_needed): New function for frm mode needed.
22683 (frm_unknown_dynamic_p): Remove call check.
22684 (riscv_mode_needed): Extrac function for frm.
22685 (riscv_frm_mode_after): Add DYN_CALL after.
22686 (riscv_mode_entry): Remove backup rtl initialization.
22687 * config/riscv/vector.md (frm_mode): Add dyn_call.
22688 (fsrmsi_restore_exit): Rename to _volatile.
22689 (fsrmsi_restore_volatile): Likewise.
22691 2023-08-01 Pan Li <pan2.li@intel.com>
22693 * config/riscv/riscv-vector-builtins-bases.cc
22694 (class reverse_binop_frm): Add new template for reversed frm.
22695 (vfsub_frm_obj): New obj.
22696 (vfrsub_frm_obj): Likewise.
22697 * config/riscv/riscv-vector-builtins-bases.h:
22698 (vfsub_frm): New declaration.
22699 (vfrsub_frm): Likewise.
22700 * config/riscv/riscv-vector-builtins-functions.def
22701 (vfsub_frm): New function define.
22702 (vfrsub_frm): Likewise.
22704 2023-08-01 Andrew Pinski <apinski@marvell.com>
22706 PR tree-optimization/93044
22707 * match.pd (nested int casts): A truncation (to the same size or smaller)
22708 can always remove the inner cast.
22710 2023-07-31 Hamza Mahfooz <someguy@effective-light.com>
22713 * doc/invoke.texi (-Wmissing-variable-declarations): Document
22716 2023-07-31 Andrew Pinski <apinski@marvell.com>
22718 PR tree-optimization/106164
22719 * match.pd (`a != b & a <= b`, `a != b & a >= b`,
22720 `a == b | a < b`, `a == b | a > b`): Handle these cases
22723 2023-07-31 Andrew Pinski <apinski@marvell.com>
22725 PR tree-optimization/106164
22726 * match.pd: Extend the `(X CMP1 CST1) AND/IOR (X CMP2 CST2)`
22727 patterns to support `(X CMP1 Y) AND/IOR (X CMP2 Y)`.
22729 2023-07-31 Andrew Pinski <apinski@marvell.com>
22731 PR tree-optimization/100864
22732 * generic-match-head.cc (bitwise_inverted_equal_p): New function.
22733 * gimple-match-head.cc (bitwise_inverted_equal_p): New macro.
22734 (gimple_bitwise_inverted_equal_p): New function.
22735 * match.pd ((~x | y) & x): Use bitwise_inverted_equal_p
22736 instead of direct matching bit_not.
22738 2023-07-31 Costas Argyris <costas.argyris@gmail.com>
22741 * gcc-ar.cc (main): Expand argv and use
22742 temporary response file to call ar if any
22743 expansions were made.
22745 2023-07-31 Andrew MacLeod <amacleod@redhat.com>
22747 PR tree-optimization/110582
22748 * gimple-range-fold.cc (fur_list::get_operand): Do not use the
22749 range vector for non-ssa names.
22751 2023-07-31 David Malcolm <dmalcolm@redhat.com>
22754 * diagnostic-client-data-hooks.h (class sarif_object): New forward
22756 (diagnostic_client_data_hooks::add_sarif_invocation_properties):
22758 * diagnostic-format-sarif.cc: Include "diagnostic-format-sarif.h".
22759 (class sarif_invocation): Inherit from sarif_object rather than
22761 (class sarif_result): Likewise.
22762 (class sarif_ice_notification): Likewise.
22763 (sarif_object::get_or_create_properties): New.
22764 (sarif_invocation::prepare_to_flush): Add "context" param. Use it
22765 to call the context's add_sarif_invocation_properties hook.
22766 (sarif_builder::flush_to_file): Pass m_context to
22767 sarif_invocation::prepare_to_flush.
22768 * diagnostic-format-sarif.h: New header.
22769 * doc/invoke.texi (Developer Options): Clarify that -ftime-report
22770 writes to stderr. Document that if SARIF diagnostic output is
22771 requested then any timing information is written in JSON form as
22772 part of the SARIF output, rather than to stderr.
22773 * timevar.cc: Include "json.h".
22774 (timer::named_items::m_hash_map): Split out type into...
22775 (timer::named_items::hash_map_t): ...this new typedef.
22776 (timer::named_items::make_json): New function.
22777 (timevar_diff): New function.
22778 (make_json_for_timevar_time_def): New function.
22779 (timer::timevar_def::make_json): New function.
22780 (timer::make_json): New function.
22781 * timevar.h (class json::value): New forward decl.
22782 (timer::make_json): New decl.
22783 (timer::timevar_def::make_json): New decl.
22784 * tree-diagnostic-client-data-hooks.cc: Include
22785 "diagnostic-format-sarif.h" and "timevar.h".
22786 (compiler_data_hooks::add_sarif_invocation_properties): New vfunc
22789 2023-07-31 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
22791 * combine.cc (simplify_compare_const): Narrow comparison of
22792 memory and constant.
22793 (try_combine): Adapt new function signature.
22794 (simplify_comparison): Adapt new function signature.
22796 2023-07-31 Kito Cheng <kito.cheng@sifive.com>
22798 * config/riscv/riscv-v.cc (expand_vec_series): Drop unused
22800 (expand_vector_init_insert_elems): Ditto.
22802 2023-07-31 Hao Liu <hliu@os.amperecomputing.com>
22805 * config/aarch64/aarch64.cc (count_ops): Only '* count' for
22806 single_defuse_cycle while counting reduction_latency.
22808 2023-07-31 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
22810 * internal-fn.def (DEF_INTERNAL_COND_FN): New macro.
22811 (DEF_INTERNAL_SIGNED_COND_FN): Ditto.
22812 (COND_ADD): Remove.
22817 (COND_RDIV): Ditto.
22820 (COND_FMIN): Ditto.
22821 (COND_FMAX): Ditto.
22829 (COND_FNMA): Ditto.
22830 (COND_FNMS): Ditto.
22832 (COND_LEN_ADD): Ditto.
22833 (COND_LEN_SUB): Ditto.
22834 (COND_LEN_MUL): Ditto.
22835 (COND_LEN_DIV): Ditto.
22836 (COND_LEN_MOD): Ditto.
22837 (COND_LEN_RDIV): Ditto.
22838 (COND_LEN_MIN): Ditto.
22839 (COND_LEN_MAX): Ditto.
22840 (COND_LEN_FMIN): Ditto.
22841 (COND_LEN_FMAX): Ditto.
22842 (COND_LEN_AND): Ditto.
22843 (COND_LEN_IOR): Ditto.
22844 (COND_LEN_XOR): Ditto.
22845 (COND_LEN_SHL): Ditto.
22846 (COND_LEN_SHR): Ditto.
22847 (COND_LEN_FMA): Ditto.
22848 (COND_LEN_FMS): Ditto.
22849 (COND_LEN_FNMA): Ditto.
22850 (COND_LEN_FNMS): Ditto.
22851 (COND_LEN_NEG): Ditto.
22852 (ADD): New macro define.
22873 2023-07-31 Roger Sayle <roger@nextmovesoftware.com>
22876 * config/i386/i386-features.cc (compute_convert_gain): Check
22877 TARGET_AVX512VL (not TARGET_AVX512F) when considering V2DImode
22878 and V4SImode rotates in STV.
22879 (general_scalar_chain::convert_rotate): Likewise.
22881 2023-07-31 Kito Cheng <kito.cheng@sifive.com>
22883 * config/riscv/autovec.md (abs<mode>2): Remove `.require ()`.
22884 * config/riscv/riscv-protos.h (get_mask_mode): Update return
22886 * config/riscv/riscv-v.cc (rvv_builder::rvv_builder): Remove
22888 (emit_vlmax_insn): Ditto.
22889 (emit_vlmax_fp_insn): Ditto.
22890 (emit_vlmax_ternary_insn): Ditto.
22891 (emit_vlmax_fp_ternary_insn): Ditto.
22892 (emit_nonvlmax_fp_ternary_tu_insn): Ditto.
22893 (emit_nonvlmax_insn): Ditto.
22894 (emit_vlmax_slide_insn): Ditto.
22895 (emit_nonvlmax_slide_tu_insn): Ditto.
22896 (emit_vlmax_merge_insn): Ditto.
22897 (emit_vlmax_masked_insn): Ditto.
22898 (emit_nonvlmax_masked_insn): Ditto.
22899 (emit_vlmax_masked_store_insn): Ditto.
22900 (emit_nonvlmax_masked_store_insn): Ditto.
22901 (emit_vlmax_masked_mu_insn): Ditto.
22902 (emit_nonvlmax_tu_insn): Ditto.
22903 (emit_nonvlmax_fp_tu_insn): Ditto.
22904 (emit_scalar_move_insn): Ditto.
22905 (emit_vlmax_compress_insn): Ditto.
22906 (emit_vlmax_reduction_insn): Ditto.
22907 (emit_vlmax_fp_reduction_insn): Ditto.
22908 (emit_nonvlmax_fp_reduction_insn): Ditto.
22909 (expand_vec_series): Ditto.
22910 (expand_vector_init_merge_repeating_sequence): Ditto.
22911 (expand_vec_perm): Ditto.
22912 (shuffle_merge_patterns): Ditto.
22913 (shuffle_compress_patterns): Ditto.
22914 (shuffle_decompress_patterns): Ditto.
22915 (expand_reduction): Ditto.
22916 (get_mask_mode): Update return type.
22917 * config/riscv/riscv.cc (riscv_get_mask_mode): Check vector type
22918 is valid, and use new get_mask_mode interface.
22920 2023-07-31 Pan Li <pan2.li@intel.com>
22922 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_frm_def):
22923 Move rm suffix before mask.
22925 2023-07-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22927 * config/riscv/autovec-vls.md (@vec_duplicate<mode>): New pattern.
22928 * config/riscv/riscv-v.cc (autovectorize_vector_modes): Add VLS autovec
22931 2023-07-29 Roger Sayle <roger@nextmovesoftware.com>
22934 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
22935 (extzv<mode>): Likewise.
22936 (insv<mode>): Likewise.
22937 (*testqi_ext_3): Likewise.
22938 (*btr<mode>_2): Likewise.
22939 (define_split): Likewise.
22940 (*btsq_imm): Likewise.
22941 (*btrq_imm): Likewise.
22942 (*btcq_imm): Likewise.
22943 (define_peephole2 x3): Likewise.
22944 (*bt<mode>): Likewise
22945 (*bt<mode>_mask): New define_insn_and_split.
22946 (*jcc_bt<mode>): Use QImode for offsets.
22947 (*jcc_bt<mode>_1): Delete obsolete pattern.
22948 (*jcc_bt<mode>_mask): Use QImode offsets.
22949 (*jcc_bt<mode>_mask_1): Likewise.
22950 (define_split): Likewise.
22951 (*bt<mode>_setcqi): Likewise.
22952 (*bt<mode>_setncqi): Likewise.
22953 (*bt<mode>_setnc<mode>): Likewise.
22954 (*bt<mode>_setncqi_2): Likewise.
22955 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
22956 (bmi2_bzhi_<mode>3): Use QImode offsets.
22957 (*bmi2_bzhi_<mode>3): Likewise.
22958 (*bmi2_bzhi_<mode>3_1): Likewise.
22959 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
22960 (@tbm_bextri_<mode>): Likewise.
22962 2023-07-29 Jan Hubicka <jh@suse.cz>
22964 * profile-count.cc (profile_probability::sqrt): New member function.
22965 (profile_probability::pow): Likewise.
22966 * profile-count.h: (profile_probability::sqrt): Declare
22967 (profile_probability::pow): Likewise.
22968 * tree-vect-loop-manip.cc (vect_loop_versioning): Fix profile update.
22970 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
22972 * gimple-range-cache.cc (ssa_cache::merge_range): New.
22973 (ssa_lazy_cache::merge_range): New.
22974 * gimple-range-cache.h (class ssa_cache): Adjust protoypes.
22975 (class ssa_lazy_cache): Ditto.
22976 * gimple-range.cc (assume_query::calculate_op): Use merge_range.
22978 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
22980 * tree-ssa-propagate.cc (substitute_and_fold_engine::value_on_edge):
22981 Move from value-query.cc.
22982 (substitute_and_fold_engine::value_of_stmt): Ditto.
22983 (substitute_and_fold_engine::range_of_expr): New.
22984 * tree-ssa-propagate.h (substitute_and_fold_engine): Inherit from
22985 range_query. New prototypes.
22986 * value-query.cc (value_query::value_on_edge): Relocate.
22987 (value_query::value_of_stmt): Ditto.
22988 * value-query.h (class value_query): Remove.
22989 (class range_query): Remove base class. Adjust prototypes.
22991 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
22993 PR tree-optimization/110205
22994 * gimple-range-cache.h (ranger_cache::m_estimate): Delete.
22995 * range-op-mixed.h (operator_bitwise_xor::op1_op2_relation_effect):
22996 Add final override.
22997 * range-op.cc (operator_lshift): Add missing final overrides.
22998 (operator_rshift): Ditto.
23000 2023-07-28 Jose E. Marchesi <jose.marchesi@oracle.com>
23002 * config/bpf/bpf.cc (bpf_option_override): Disable tail-call
23003 optimizations in BPF target.
23005 2023-07-28 Honza <jh@ryzen4.suse.cz>
23007 * cfgloopmanip.cc (loop_count_in): Break out from ...
23008 (loop_exit_for_scaling): Break out from ...
23009 (update_loop_exit_probability_scale_dom_bbs): Break out from ...;
23010 add more sanity check and debug info.
23011 (scale_loop_profile): ... here.
23012 (create_empty_loop_on_edge): Fix whitespac.
23013 * cfgloopmanip.h (update_loop_exit_probability_scale_dom_bbs): Declare.
23014 * loop-unroll.cc (unroll_loop_constant_iterations): Use
23015 update_loop_exit_probability_scale_dom_bbs.
23016 * tree-ssa-loop-manip.cc (update_exit_probability_after_unrolling): Remove.
23017 (tree_transform_and_unroll_loop): Use
23018 update_loop_exit_probability_scale_dom_bbs.
23019 * tree-ssa-loop-split.cc (split_loop): Use
23020 update_loop_exit_probability_scale_dom_bbs.
23022 2023-07-28 Jan Hubicka <jh@suse.cz>
23024 PR middle-end/77689
23025 * tree-ssa-loop-split.cc: Include value-query.h.
23026 (split_at_bb_p): Analyze cases where EQ/NE can be turned
23027 into LT/LE/GT/GE; return updated guard code.
23028 (split_loop): Use guard code.
23030 2023-07-28 Roger Sayle <roger@nextmovesoftware.com>
23031 Richard Biener <rguenther@suse.de>
23033 PR middle-end/28071
23034 PR rtl-optimization/110587
23035 * expr.cc (emit_group_load_1): Simplify logic for calling
23036 force_reg on ORIG_SRC, to avoid making a copy if the source
23037 is already in a pseudo register.
23039 2023-07-28 Jan Hubicka <jh@suse.cz>
23041 PR middle-end/106923
23042 * tree-ssa-loop-split.cc (connect_loops): Change probability
23043 of the test preconditioning second loop to very_likely.
23044 (fix_loop_bb_probability): Handle correctly case where
23045 on of the arms of the conditional is empty.
23046 (split_loop): Fold the test guarding first condition to
23047 see if it is constant true; Set correct entry block
23048 probabilities of the split loops; determine correct loop
23049 eixt probabilities.
23051 2023-07-28 xuli <xuli1@eswincomputing.com>
23053 * config/riscv/riscv-vector-builtins-bases.cc: remove rounding mode of
23054 vsadd[u] and vssub[u].
23055 * config/riscv/vector.md: Ditto.
23057 2023-07-28 Jan Hubicka <jh@suse.cz>
23059 * tree-ssa-loop-split.cc (split_loop): Also support NE driven
23060 loops when IV test is not overflowing.
23062 2023-07-28 liuhongt <hongtao.liu@intel.com>
23065 * config/i386/sse.md (avx512cd_maskb_vec_dup<mode>): Add
23067 (avx512cd_maskw_vec_dup<mode>): Ditto.
23069 2023-07-27 David Faust <david.faust@oracle.com>
23073 * config/bpf/bpf.opt (msmov): New option.
23074 * config/bpf/bpf.cc (bpf_option_override): Handle it here.
23075 * config/bpf/bpf.md (*extendsidi2): New.
23076 (extendhidi2): New.
23077 (extendqidi2): New.
23078 (extendsisi2): New.
23079 (extendhisi2): New.
23080 (extendqisi2): New.
23081 * doc/invoke.texi (Option Summary): Add -msmov eBPF option.
23082 (eBPF Options): Add -m[no-]smov. Document that -mcpu=v4
23083 also enables -msmov.
23085 2023-07-27 David Faust <david.faust@oracle.com>
23087 * doc/invoke.texi (Option Summary): Remove -mkernel eBPF option.
23088 Add -mbswap and -msdiv eBPF options.
23089 (eBPF Options): Remove -mkernel. Add -mno-{jmpext, jmp32,
23090 alu32, v3-atomics, bswap, sdiv}. Document that -mcpu=v4 also
23093 2023-07-27 David Faust <david.faust@oracle.com>
23095 * config/bpf/bpf.md (add<AM:mode>3): Use %w2 instead of %w1
23096 in pseudo-C dialect output template.
23097 (sub<AM:mode>3): Likewise.
23099 2023-07-27 Jan Hubicka <jh@suse.cz>
23101 * tree-vect-loop.cc (optimize_mask_stores): Make store
23104 2023-07-27 Jan Hubicka <jh@suse.cz>
23106 * cfgloop.h (single_dom_exit): Declare.
23107 * cfgloopmanip.h (update_exit_probability_after_unrolling): Declare.
23108 * cfgrtl.cc (struct cfg_hooks): Fix comment.
23109 * loop-unroll.cc (unroll_loop_constant_iterations): Update exit edge.
23110 * tree-ssa-loop-ivopts.h (single_dom_exit): Do not declare it here.
23111 * tree-ssa-loop-manip.cc (update_exit_probability_after_unrolling):
23113 (tree_transform_and_unroll_loop): ... here;
23115 2023-07-27 Jan Hubicka <jh@suse.cz>
23117 * cfgloopmanip.cc (scale_dominated_blocks_in_loop): Move here from
23118 tree-ssa-loop-manip.cc and avoid recursion.
23119 (scale_loop_profile): Use scale_dominated_blocks_in_loop.
23120 (duplicate_loop_body_to_header_edge): Add DLTHE_FLAG_FLAT_PROFILE
23122 * cfgloopmanip.h (DLTHE_FLAG_FLAT_PROFILE): Define.
23123 (scale_dominated_blocks_in_loop): Declare.
23124 * predict.cc (dump_prediction): Do not ICE on uninitialized probability.
23125 (change_edge_frequency): Remove.
23126 * predict.h (change_edge_frequency): Remove.
23127 * tree-ssa-loop-manip.cc (scale_dominated_blocks_in_loop): Move to
23129 (niter_for_unrolled_loop): Remove.
23130 (tree_transform_and_unroll_loop): Fix profile update.
23132 2023-07-27 Jan Hubicka <jh@suse.cz>
23134 * tree-ssa-loop-im.cc (execute_sm_if_changed): Turn cap probability
23135 to guessed; fix count of new_bb.
23137 2023-07-27 Jan Hubicka <jh@suse.cz>
23139 * profile-count.h (profile_count::apply_probability): Fix
23140 handling of uninitialized probabilities, optimize scaling
23143 2023-07-27 Richard Biener <rguenther@suse.de>
23145 PR tree-optimization/91838
23146 * gimple-match-head.cc: Include attribs.h and asan.h.
23147 * generic-match-head.cc: Likewise.
23148 * match.pd (([rl]shift @0 out-of-bounds) -> zero): New pattern.
23150 2023-07-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23152 * config/riscv/riscv-modes.def (VECTOR_BOOL_MODE): Add VLS modes.
23153 (ADJUST_ALIGNMENT): Ditto.
23154 (ADJUST_PRECISION): Ditto.
23155 (VLS_MODES): Ditto.
23156 (VECTOR_MODE_WITH_PREFIX): Ditto.
23157 * config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): New macro.
23158 * config/riscv/riscv-protos.h (riscv_v_ext_vls_mode_p): New function.
23159 * config/riscv/riscv-v.cc (INCLUDE_ALGORITHM): Add include.
23160 (legitimize_move): Enable basic VLS modes support.
23161 (get_vlmul): Ditto.
23162 (get_ratio): Ditto.
23163 (get_vector_mode): Ditto.
23164 * config/riscv/riscv-vector-switch.def (VLS_ENTRY): Add vls modes.
23165 * config/riscv/riscv.cc (riscv_v_ext_vls_mode_p): New function.
23166 (VLS_ENTRY): New macro.
23167 (riscv_v_ext_mode_p): Add vls modes.
23168 (riscv_get_v_regno_alignment): New function.
23169 (riscv_print_operand): Add vls modes.
23170 (riscv_hard_regno_nregs): Ditto.
23171 (riscv_hard_regno_mode_ok): Ditto.
23172 (riscv_regmode_natural_size): Ditto.
23173 (riscv_vectorize_preferred_vector_alignment): Ditto.
23174 * config/riscv/riscv.md: Ditto.
23175 * config/riscv/vector-iterators.md: Ditto.
23176 * config/riscv/vector.md: Ditto.
23177 * config/riscv/autovec-vls.md: New file.
23179 2023-07-27 Pan Li <pan2.li@intel.com>
23181 * config/riscv/riscv_vector.h (enum RVV_CSR): Removed.
23182 (vread_csr): Ditto.
23183 (vwrite_csr): Ditto.
23185 2023-07-27 demin.han <demin.han@starfivetech.com>
23187 * config/riscv/autovec.md: Delete which_alternative use in split
23189 2023-07-27 Richard Biener <rguenther@suse.de>
23191 * tree-ssa-sink.cc (sink_code_in_bb): Remove recursion, instead
23193 (pass_sink_code::execute): ... in the caller.
23195 2023-07-27 Kewen Lin <linkw@linux.ibm.com>
23196 Richard Biener <rguenther@suse.de>
23198 PR tree-optimization/110776
23199 * tree-vect-stmts.cc (vectorizable_load): Always cost VMAT_ELEMENTWISE
23202 2023-07-26 Xiao Zeng <zengxiao@eswincomputing.com>
23204 * config/riscv/riscv.md: Include zicond.md
23205 * config/riscv/zicond.md: New file.
23207 2023-07-26 Xiao Zeng <zengxiao@eswincomputing.com>
23209 * common/config/riscv/riscv-common.cc: New extension.
23210 * config/riscv/riscv-opts.h (MASK_ZICOND): New mask.
23211 (TARGET_ZICOND): New target.
23213 2023-07-26 Carl Love <cel@us.ibm.com>
23215 * config/rs6000/rs6000-c.cc (find_instance): Add new parameter that
23216 specifies the number of built-in arguments to check.
23217 (altivec_resolve_overloaded_builtin): Update calls to find_instance
23218 to pass the number of built-in arguments to be checked.
23220 2023-07-26 David Faust <david.faust@oracle.com>
23222 * config/bpf/bpf.opt (mv3-atomics): New option.
23223 * config/bpf/bpf.cc (bpf_option_override): Handle it here.
23224 * config/bpf/bpf.h (enum_reg_class): Add R0 class.
23225 (REG_CLASS_NAMES): Likewise.
23226 (REG_CLASS_CONTENTS): Likewise.
23227 (REGNO_REG_CLASS): Handle R0.
23228 * config/bpf/bpf.md (UNSPEC_XADD): Rename to UNSPEC_AADD.
23229 (UNSPEC_AAND): New unspec.
23230 (UNSPEC_AOR): Likewise.
23231 (UNSPEC_AXOR): Likewise.
23232 (UNSPEC_AFADD): Likewise.
23233 (UNSPEC_AFAND): Likewise.
23234 (UNSPEC_AFOR): Likewise.
23235 (UNSPEC_AFXOR): Likewise.
23236 (UNSPEC_AXCHG): Likewise.
23237 (UNSPEC_ACMPX): Likewise.
23238 (atomic_add<mode>): Use UNSPEC_AADD and atomic type attribute.
23240 * config/bpf/atomic.md: ...Here. New file.
23241 * config/bpf/constraints.md (t): New constraint for R0.
23242 * doc/invoke.texi (eBPF Options): Document -mv3-atomics.
23244 2023-07-26 Matthew Malcomson <matthew.malcomson@arm.com>
23246 * tree-vect-stmts.cc (get_group_load_store_type): Reformat
23249 2023-07-26 Carl Love <cel@us.ibm.com>
23251 * config/rs6000/rs6000-builtins.def: Rename
23252 __builtin_altivec_vreplace_un_uv2di as __builtin_altivec_vreplace_un_udi
23253 __builtin_altivec_vreplace_un_uv4si as __builtin_altivec_vreplace_un_usi
23254 __builtin_altivec_vreplace_un_v2df as __builtin_altivec_vreplace_un_df
23255 __builtin_altivec_vreplace_un_v2di as __builtin_altivec_vreplace_un_di
23256 __builtin_altivec_vreplace_un_v4sf as __builtin_altivec_vreplace_un_sf
23257 __builtin_altivec_vreplace_un_v4si as __builtin_altivec_vreplace_un_si.
23258 Rename VREPLACE_UN_UV2DI as VREPLACE_UN_UDI, VREPLACE_UN_UV4SI as
23259 VREPLACE_UN_USI, VREPLACE_UN_V2DF as VREPLACE_UN_DF,
23260 VREPLACE_UN_V2DI as VREPLACE_UN_DI, VREPLACE_UN_V4SF as
23261 VREPLACE_UN_SF, VREPLACE_UN_V4SI as VREPLACE_UN_SI.
23262 Rename vreplace_un_v2di as vreplace_un_di, vreplace_un_v4si as
23263 vreplace_un_si, vreplace_un_v2df as vreplace_un_df,
23264 vreplace_un_v2di as vreplace_un_di, vreplace_un_v4sf as
23265 vreplace_un_sf, vreplace_un_v4si as vreplace_un_si.
23266 * config/rs6000/rs6000-c.cc (find_instance): Add case
23267 RS6000_OVLD_VEC_REPLACE_UN.
23268 * config/rs6000/rs6000-overload.def (__builtin_vec_replace_un):
23269 Fix first argument type. Rename VREPLACE_UN_UV4SI as
23270 VREPLACE_UN_USI, VREPLACE_UN_V4SI as VREPLACE_UN_SI,
23271 VREPLACE_UN_UV2DI as VREPLACE_UN_UDI, VREPLACE_UN_V2DI as
23272 VREPLACE_UN_DI, VREPLACE_UN_V4SF as VREPLACE_UN_SF,
23273 VREPLACE_UN_V2DF as VREPLACE_UN_DF.
23274 * config/rs6000/vsx.md (REPLACE_ELT): Rename the mode_iterator
23275 REPLACE_ELT_V for vector modes.
23276 (REPLACE_ELT): New scalar mode iterator.
23277 (REPLACE_ELT_char): Add scalar attributes.
23278 (vreplace_un_<mode>): Change iterator and mode attribute.
23280 2023-07-26 David Malcolm <dmalcolm@redhat.com>
23283 * Makefile.in (ANALYZER_OBJS): Add analyzer/symbol.o.
23285 2023-07-26 Richard Biener <rguenther@suse.de>
23287 PR tree-optimization/106081
23288 * tree-vect-slp.cc (vect_optimize_slp_pass::start_choosing_layouts):
23289 Assign layout -1 to splats.
23291 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
23293 * range-op-mixed.h (class operator_cast): Add update_bitmask.
23294 * range-op.cc (operator_cast::update_bitmask): New.
23295 (operator_cast::fold_range): Call update_bitmask.
23297 2023-07-26 Li Xu <xuli1@eswincomputing.com>
23299 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): Change
23300 scalar type to float16, eliminate warning.
23301 (vfloat16mf4x3_t): Ditto.
23302 (vfloat16mf4x4_t): Ditto.
23303 (vfloat16mf4x5_t): Ditto.
23304 (vfloat16mf4x6_t): Ditto.
23305 (vfloat16mf4x7_t): Ditto.
23306 (vfloat16mf4x8_t): Ditto.
23307 (vfloat16mf2x2_t): Ditto.
23308 (vfloat16mf2x3_t): Ditto.
23309 (vfloat16mf2x4_t): Ditto.
23310 (vfloat16mf2x5_t): Ditto.
23311 (vfloat16mf2x6_t): Ditto.
23312 (vfloat16mf2x7_t): Ditto.
23313 (vfloat16mf2x8_t): Ditto.
23314 (vfloat16m1x2_t): Ditto.
23315 (vfloat16m1x3_t): Ditto.
23316 (vfloat16m1x4_t): Ditto.
23317 (vfloat16m1x5_t): Ditto.
23318 (vfloat16m1x6_t): Ditto.
23319 (vfloat16m1x7_t): Ditto.
23320 (vfloat16m1x8_t): Ditto.
23321 (vfloat16m2x2_t): Ditto.
23322 (vfloat16m2x3_t): Ditto.
23323 (vfloat16m2x4_t): Ditto.
23324 (vfloat16m4x2_t): Ditto.
23325 * config/riscv/vector-iterators.md: add RVVM4x2DF in iterator V4T.
23326 * config/riscv/vector.md: add tuple mode in attr sew.
23328 2023-07-26 Uros Bizjak <ubizjak@gmail.com>
23331 * config/i386/i386.md (plusminusmult): New code iterator.
23332 * config/i386/mmx.md (mmxdoublevecmode): New mode attribute.
23333 (movq_<mode>_to_sse): New expander.
23334 (<plusminusmult:insn>v2sf3): Macroize expander from addv2sf3,
23335 subv2sf3 and mulv2sf3 using plusminusmult code iterator. Rewrite
23336 as a wrapper around V4SFmode operation.
23337 (mmx_addv2sf3): Change operand 1 and operand 2 predicates to
23338 nonimmediate_operand.
23339 (*mmx_addv2sf3): Remove SSE alternatives. Change operand 1 and
23340 operand 2 predicates to nonimmediate_operand.
23341 (mmx_subv2sf3): Change operand 2 predicate to nonimmediate_operand.
23342 (mmx_subrv2sf3): Change operand 1 predicate to nonimmediate_operand.
23343 (*mmx_subv2sf3): Remove SSE alternatives. Change operand 1 and
23344 operand 2 predicates to nonimmediate_operand.
23345 (mmx_mulv2sf3): Change operand 1 and operand 2 predicates to
23346 nonimmediate_operand.
23347 (*mmx_mulv2sf3): Remove SSE alternatives. Change operand 1 and
23348 operand 2 predicates to nonimmediate_operand.
23349 (divv2sf3): Rewrite as a wrapper around V4SFmode operation.
23350 (<smaxmin:code>v2sf3): Ditto.
23351 (mmx_<smaxmin:code>v2sf3): Change operand 1 and operand 2
23352 predicates to nonimmediate_operand.
23353 (*mmx_<smaxmin:code>v2sf3): Remove SSE alternatives. Change
23354 operand 1 and operand 2 predicates to nonimmediate_operand.
23355 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
23356 (sqrtv2sf2): Rewrite as a wrapper around V4SFmode operation.
23357 (*mmx_haddv2sf3_low): Ditto.
23358 (*mmx_hsubv2sf3_low): Ditto.
23359 (vec_addsubv2sf3): Ditto.
23360 (*mmx_maskcmpv2sf3_comm): Remove.
23361 (*mmx_maskcmpv2sf3): Remove.
23362 (vec_cmpv2sfv2si): Rewrite as a wrapper around V4SFmode operation.
23363 (vcond<V2FI:mode>v2sf): Ditto.
23366 (fnmav2sf4): Ditto.
23367 (fnmsv2sf4): Ditto.
23368 (fix_truncv2sfv2si2): Ditto.
23369 (fixuns_truncv2sfv2si2): Ditto.
23370 (mmx_fix_truncv2sfv2si2): Remove SSE alternatives.
23371 Change operand 1 predicate to nonimmediate_operand.
23372 (floatv2siv2sf2): Rewrite as a wrapper around V4SFmode operation.
23373 (floatunsv2siv2sf2): Ditto.
23374 (mmx_floatv2siv2sf2): Remove SSE alternatives.
23375 Change operand 1 predicate to nonimmediate_operand.
23376 (nearbyintv2sf2): Rewrite as a wrapper around V4SFmode operation.
23377 (rintv2sf2): Ditto.
23378 (lrintv2sfv2si2): Ditto.
23379 (ceilv2sf2): Ditto.
23380 (lceilv2sfv2si2): Ditto.
23381 (floorv2sf2): Ditto.
23382 (lfloorv2sfv2si2): Ditto.
23383 (btruncv2sf2): Ditto.
23384 (roundv2sf2): Ditto.
23385 (lroundv2sfv2si2): Ditto.
23386 (*mmx_roundv2sf2): Remove.
23388 2023-07-26 Jose E. Marchesi <jose.marchesi@oracle.com>
23390 * config/bpf/bpf.md: Fix neg{SI,DI}2 insn.
23392 2023-07-26 Richard Biener <rguenther@suse.de>
23394 PR tree-optimization/110799
23395 * tree-ssa-pre.cc (compute_avail): More thoroughly match
23396 up TBAA behavior of redundant loads.
23398 2023-07-26 Jakub Jelinek <jakub@redhat.com>
23400 PR tree-optimization/110755
23401 * range-op-float.cc (frange_arithmetic): Change +0 result to -0
23402 for PLUS_EXPR or MINUS_EXPR if -frounding-math, inf is negative and
23403 it is exact op1 + (-op1) or op1 - op1.
23405 2023-07-26 Kewen Lin <linkw@linux.ibm.com>
23408 * config/rs6000/vsx.md (define_insn xxeval): Correct vsx
23409 operands output with "x".
23411 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
23413 * range-op.cc (class operator_absu): Add update_bitmask.
23414 (operator_absu::update_bitmask): New.
23416 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
23418 * range-op-mixed.h (class operator_abs): Add update_bitmask.
23419 * range-op.cc (operator_abs::update_bitmask): New.
23421 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
23423 * range-op-mixed.h (class operator_bitwise_not): Add update_bitmask.
23424 * range-op.cc (operator_bitwise_not::update_bitmask): New.
23426 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
23428 * range-op.cc (update_known_bitmask): Handle unary operators.
23430 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
23432 * tree-ssa-ccp.cc (bit_value_unop): Initialize val when appropriate.
23434 2023-07-26 Jin Ma <jinma@linux.alibaba.com>
23436 * config/riscv/riscv.md: Likewise.
23438 2023-07-26 Jan Hubicka <jh@suse.cz>
23440 * profile-count.cc (profile_count::to_sreal_scale): Value is not know
23441 if we divide by zero.
23443 2023-07-25 David Faust <david.faust@oracle.com>
23445 * config/bpf/bpf.cc (bpf_print_operand_address): Don't print
23446 enclosing parentheses for pseudo-C dialect.
23447 * config/bpf/bpf.md (zero_exdendhidi2): Add parentheses around
23448 operands of pseudo-C dialect output templates where needed.
23449 (zero_extendqidi2): Likewise.
23450 (zero_extendsidi2): Likewise.
23451 (*mov<MM:mode>): Likewise.
23453 2023-07-25 Aldy Hernandez <aldyh@redhat.com>
23455 * tree-ssa-ccp.cc (value_mask_to_min_max): Make static.
23456 (bit_value_mult_const): Same.
23457 (get_individual_bits): Same.
23459 2023-07-25 Haochen Gui <guihaoc@gcc.gnu.org>
23462 * config/rs6000/rs6000-builtin.cc (rs6000_gimple_fold_builtin): Gimple
23463 fold RS6000_BIF_XSMINDP and RS6000_BIF_XSMAXDP when fast-math is set.
23464 * config/rs6000/rs6000.md (FMINMAX): New int iterator.
23465 (minmax_op): New int attribute.
23466 (UNSPEC_FMAX, UNSPEC_FMIN): New unspecs.
23467 (f<minmax_op><mode>3): New pattern by UNSPEC_FMAX and UNSPEC_FMIN.
23468 * config/rs6000/rs6000-builtins.def (__builtin_vsx_xsmaxdp): Set
23469 pattern to fmaxdf3.
23470 (__builtin_vsx_xsmindp): Set pattern to fmindf3.
23472 2023-07-24 David Faust <david.faust@oracle.com>
23474 * config/bpf/bpf.md (nop): Add pseudo-c asm dialect template.
23476 2023-07-24 Drew Ross <drross@redhat.com>
23477 Jakub Jelinek <jakub@redhat.com>
23479 PR middle-end/109986
23480 * generic-match-head.cc (bitwise_equal_p): New macro.
23481 * gimple-match-head.cc (bitwise_equal_p): New macro.
23482 (gimple_nop_convert): Declare.
23483 (gimple_bitwise_equal_p): Helper for bitwise_equal_p.
23484 * match.pd ((~X | Y) ^ X -> ~(X & Y)): New simplification.
23486 2023-07-24 Jeff Law <jlaw@ventanamicro.com>
23488 * common/config/riscv/riscv-common.cc (riscv_subset_list::add): Use
23489 single quote rather than backquote in diagnostic.
23491 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
23494 * config/bpf/bpf.opt: New command-line option -msdiv.
23495 * config/bpf/bpf.md: Conditionalize sdiv/smod on bpf_has_sdiv.
23496 * config/bpf/bpf.cc (bpf_option_override): Initialize
23498 * doc/invoke.texi (eBPF Options): Document -msdiv.
23500 2023-07-24 Jeff Law <jlaw@ventanamicro.com>
23502 * config/riscv/riscv.cc (riscv_option_override): Spell out
23503 greater than and use cannot in diagnostic string.
23505 2023-07-24 Richard Biener <rguenther@suse.de>
23507 * tree-vectorizer.h (_slp_tree::push_vec_def): Add.
23508 (_slp_tree::vec_stmts): Remove.
23509 (SLP_TREE_VEC_STMTS): Remove.
23510 * tree-vect-slp.cc (_slp_tree::push_vec_def): Define.
23511 (_slp_tree::_slp_tree): Adjust.
23512 (_slp_tree::~_slp_tree): Likewise.
23513 (vect_get_slp_vect_def): Simplify.
23514 (vect_get_slp_defs): Likewise.
23515 (vect_transform_slp_perm_load_1): Adjust.
23516 (vect_add_slp_permutation): Likewise.
23517 (vect_schedule_slp_node): Likewise.
23518 (vectorize_slp_instance_root_stmt): Likewise.
23519 (vect_schedule_scc): Likewise.
23520 * tree-vect-stmts.cc (vectorizable_bswap): Use push_vec_def.
23521 (vectorizable_call): Likewise.
23522 (vectorizable_call): Likewise.
23523 (vect_create_vectorized_demotion_stmts): Likewise.
23524 (vectorizable_conversion): Likewise.
23525 (vectorizable_assignment): Likewise.
23526 (vectorizable_shift): Likewise.
23527 (vectorizable_operation): Likewise.
23528 (vectorizable_load): Likewise.
23529 (vectorizable_condition): Likewise.
23530 (vectorizable_comparison): Likewise.
23531 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Adjust.
23532 (vectorize_fold_left_reduction): Use push_vec_def.
23533 (vect_transform_reduction): Likewise.
23534 (vect_transform_cycle_phi): Likewise.
23535 (vectorizable_lc_phi): Likewise.
23536 (vectorizable_phi): Likewise.
23537 (vectorizable_recurr): Likewise.
23538 (vectorizable_induction): Likewise.
23539 (vectorizable_live_operation): Likewise.
23541 2023-07-24 Richard Biener <rguenther@suse.de>
23543 * tree-ssa-loop.cc: Remove unused tree-vectorizer.h include.
23545 2023-07-24 Richard Biener <rguenther@suse.de>
23547 * config/i386/i386-builtins.cc: Remove tree-vectorizer.h include.
23548 * config/i386/i386-expand.cc: Likewise.
23549 * config/i386/i386-features.cc: Likewise.
23550 * config/i386/i386-options.cc: Likewise.
23552 2023-07-24 Robin Dapp <rdapp@ventanamicro.com>
23554 * tree-vect-stmts.cc (vectorizable_conversion): Handle
23555 more demotion/promotion for modifier == NONE.
23557 2023-07-24 Roger Sayle <roger@nextmovesoftware.com>
23562 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
23563 (extzv<mode>): Likewise.
23564 (insv<mode>): Likewise.
23565 (*testqi_ext_3): Likewise.
23566 (*btr<mode>_2): Likewise.
23567 (define_split): Likewise.
23568 (*btsq_imm): Likewise.
23569 (*btrq_imm): Likewise.
23570 (*btcq_imm): Likewise.
23571 (define_peephole2 x3): Likewise.
23572 (*bt<mode>): Likewise
23573 (*bt<mode>_mask): New define_insn_and_split.
23574 (*jcc_bt<mode>): Use QImode for offsets.
23575 (*jcc_bt<mode>_1): Delete obsolete pattern.
23576 (*jcc_bt<mode>_mask): Use QImode offsets.
23577 (*jcc_bt<mode>_mask_1): Likewise.
23578 (define_split): Likewise.
23579 (*bt<mode>_setcqi): Likewise.
23580 (*bt<mode>_setncqi): Likewise.
23581 (*bt<mode>_setnc<mode>): Likewise.
23582 (*bt<mode>_setncqi_2): Likewise.
23583 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
23584 (bmi2_bzhi_<mode>3): Use QImode offsets.
23585 (*bmi2_bzhi_<mode>3): Likewise.
23586 (*bmi2_bzhi_<mode>3_1): Likewise.
23587 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
23588 (@tbm_bextri_<mode>): Likewise.
23590 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
23592 * config/bpf/bpf-opts.h (enum bpf_kernel_version): Remove enum.
23593 * config/bpf/bpf.opt (mkernel): Remove option.
23594 * config/bpf/bpf.cc (bpf_target_macros): Do not define
23595 BPF_KERNEL_VERSION_CODE.
23597 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
23600 * config/bpf/bpf.opt (mcpu): Add ISA_V4 and make it the default.
23601 (mbswap): New option.
23602 * config/bpf/bpf-opts.h (enum bpf_isa_version): New value ISA_V4.
23603 * config/bpf/bpf.cc (bpf_option_override): Set bpf_has_bswap.
23604 * config/bpf/bpf.md: Use bswap instructions if available for
23605 bswap* insn, and fix constraint.
23606 * doc/invoke.texi (eBPF Options): Document -mcpu=v4 and -mbswap.
23608 2023-07-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23610 * config/riscv/autovec.md (fold_left_plus_<mode>): New pattern.
23611 (mask_len_fold_left_plus_<mode>): Ditto.
23612 * config/riscv/riscv-protos.h (enum insn_type): New enum.
23613 (enum reduction_type): Ditto.
23614 (expand_reduction): Add in-order reduction.
23615 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_reduction_insn): New function.
23616 (expand_reduction): Add in-order reduction.
23618 2023-07-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
23620 * tree-vect-loop.cc (get_masked_reduction_fn): Add mask_len_fold_left_plus.
23621 (vectorize_fold_left_reduction): Ditto.
23622 (vectorizable_reduction): Ditto.
23623 (vect_transform_reduction): Ditto.
23625 2023-07-24 Richard Biener <rguenther@suse.de>
23627 PR tree-optimization/110777
23628 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_avail):
23629 Avoid propagating abnormals.
23631 2023-07-24 Richard Biener <rguenther@suse.de>
23633 PR tree-optimization/110766
23634 * tree-scalar-evolution.cc
23635 (analyze_and_compute_bitwise_induction_effect): Check the PHI
23636 is defined in the loop header.
23638 2023-07-24 Kewen Lin <linkw@linux.ibm.com>
23640 PR tree-optimization/110740
23641 * tree-vect-loop.cc (vect_analyze_loop_costing): Do not vectorize a
23642 loop with a single scalar iteration.
23644 2023-07-24 Pan Li <pan2.li@intel.com>
23646 * config/riscv/riscv-vector-builtins-shapes.cc
23647 (struct alu_frm_def): Take range check.
23649 2023-07-22 Vineet Gupta <vineetg@rivosinc.com>
23652 * config/riscv/predicates.md (const_0_operand): Add back
23655 2023-07-22 Roger Sayle <roger@nextmovesoftware.com>
23657 * config/i386/i386-expand.cc (ix86_expand_move): Disable the
23658 64-bit insertions into TImode optimizations with -O0, unless
23659 the function has the "naked" attribute (for PR target/110533).
23661 2023-07-22 Andrew Pinski <apinski@marvell.com>
23664 * rtl.h (extended_count): Change last argument type
23667 2023-07-22 Roger Sayle <roger@nextmovesoftware.com>
23669 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
23670 (extzv<mode>): Likewise.
23671 (insv<mode>): Likewise.
23672 (*testqi_ext_3): Likewise.
23673 (*btr<mode>_2): Likewise.
23674 (define_split): Likewise.
23675 (*btsq_imm): Likewise.
23676 (*btrq_imm): Likewise.
23677 (*btcq_imm): Likewise.
23678 (define_peephole2 x3): Likewise.
23679 (*bt<mode>): Likewise
23680 (*bt<mode>_mask): New define_insn_and_split.
23681 (*jcc_bt<mode>): Use QImode for offsets.
23682 (*jcc_bt<mode>_1): Delete obsolete pattern.
23683 (*jcc_bt<mode>_mask): Use QImode offsets.
23684 (*jcc_bt<mode>_mask_1): Likewise.
23685 (define_split): Likewise.
23686 (*bt<mode>_setcqi): Likewise.
23687 (*bt<mode>_setncqi): Likewise.
23688 (*bt<mode>_setnc<mode>): Likewise.
23689 (*bt<mode>_setncqi_2): Likewise.
23690 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
23691 (bmi2_bzhi_<mode>3): Use QImode offsets.
23692 (*bmi2_bzhi_<mode>3): Likewise.
23693 (*bmi2_bzhi_<mode>3_1): Likewise.
23694 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
23695 (@tbm_bextri_<mode>): Likewise.
23697 2023-07-22 Jeff Law <jlaw@ventanamicro.com>
23699 * config/bfin/bfin.md (ones): Fix length computation.
23701 2023-07-22 Vladimir N. Makarov <vmakarov@redhat.com>
23703 * lra-eliminations.cc (update_reg_eliminate): Fix the assert.
23704 (lra_update_fp2sp_elimination): Use HARD_FRAME_POINTER_REGNUM
23705 instead of FRAME_POINTER_REGNUM to spill pseudos.
23707 2023-07-21 Roger Sayle <roger@nextmovesoftware.com>
23708 Richard Biener <rguenther@suse.de>
23711 * gimplify.cc (gimplify_compound_lval): If the array's type
23712 is error_mark_node then return GS_ERROR.
23714 2023-07-21 Cupertino Miranda <cupertino.miranda@oracle.com>
23717 * config/bpf/bpf.opt: Added option -masm=<dialect>.
23718 * config/bpf/bpf-opts.h (enum bpf_asm_dialect): New type.
23719 * config/bpf/bpf.cc (bpf_print_register): New function.
23720 (bpf_print_register): Support pseudo-c syntax for registers.
23721 (bpf_print_operand_address): Likewise.
23722 * config/bpf/bpf.h (ASM_SPEC): handle -msasm.
23723 (ASSEMBLER_DIALECT): Define.
23724 * config/bpf/bpf.md: Added pseudo-c templates.
23725 * doc/invoke.texi (-masm=): New eBPF option item.
23727 2023-07-21 Cupertino Miranda <cupertino.miranda@oracle.com>
23729 * config/bpf/bpf.md: fixed template for neg instruction.
23731 2023-07-21 Jan Hubicka <jh@suse.cz>
23734 * tree-vect-loop.cc (scale_profile_for_vect_loop): Avoid scaling flat
23735 profiles by vectorization factor.
23736 (vect_transform_loop): Check for flat profiles.
23738 2023-07-21 Jan Hubicka <jh@suse.cz>
23740 * cfgloop.h (maybe_flat_loop_profile): Declare
23741 * cfgloopanal.cc (maybe_flat_loop_profile): New function.
23742 * tree-cfg.cc (print_loop_info): Print info about flat profiles.
23744 2023-07-21 Jan Hubicka <jh@suse.cz>
23746 * cfgloop.cc (get_estimated_loop_iterations): Use sreal::to_nearest_int
23747 * cfgloopanal.cc (expected_loop_iterations_unbounded): Likewise.
23748 * predict.cc (estimate_bb_frequencies): Likewise.
23749 * profile.cc (branch_prob): Likewise.
23750 * tree-ssa-loop-niter.cc (estimate_numbers_of_iterations): Likewise
23752 2023-07-21 Iain Sandoe <iain@sandoe.co.uk>
23754 * config.in: Regenerate.
23755 * config/darwin.h (DARWIN_LD_DEMANGLE): New.
23756 (LINK_COMMAND_SPEC_A): Add demangle handling.
23757 * configure: Regenerate.
23758 * configure.ac: Detect linker support for '-demangle'.
23760 2023-07-21 Jan Hubicka <jh@suse.cz>
23762 * sreal.cc (sreal::to_nearest_int): New.
23763 (sreal_verify_basics): Verify also to_nearest_int.
23764 (verify_aritmetics): Likewise.
23765 (sreal_verify_conversions): New.
23766 (sreal_cc_tests): Call sreal_verify_conversions.
23767 * sreal.h: (sreal::to_nearest_int): Declare
23769 2023-07-21 Jan Hubicka <jh@suse.cz>
23771 * tree-ssa-loop-ch.cc (enum ch_decision): New enum.
23772 (should_duplicate_loop_header_p): Return info on profitability.
23773 (do_while_loop_p): Watch for constant conditionals.
23774 (update_profile_after_ch): Do not sanity check that all
23775 static exits are taken.
23776 (ch_base::copy_headers): Run on all loops.
23777 (pass_ch::process_loop_p): Improve heuristics by handling also
23778 do_while loop and duplicating shortest sequence containing all
23781 2023-07-21 Jan Hubicka <jh@suse.cz>
23783 * tree-ssa-loop-niter.cc (finite_loop_p): Reorder to do cheap
23784 tests first; update finite_p flag.
23786 2023-07-21 Jan Hubicka <jh@suse.cz>
23788 * cfgloop.cc (flow_loop_dump): Use print_loop_info.
23789 * cfgloop.h (print_loop_info): Declare.
23790 * tree-cfg.cc (print_loop_info): Break out from ...; add
23791 printing of missing fields and profile
23792 (print_loop): ... here.
23794 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23796 * config/riscv/riscv-v.cc (expand_gather_scatter): Remove redundant variables.
23798 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23800 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Change condition order.
23801 (vectorizable_operation): Ditto.
23803 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23805 * config/riscv/autovec.md: Align order of mask and len.
23806 * config/riscv/riscv-v.cc (expand_load_store): Ditto.
23807 (expand_gather_scatter): Ditto.
23808 * doc/md.texi: Ditto.
23809 * internal-fn.cc (add_len_and_mask_args): Ditto.
23810 (add_mask_and_len_args): Ditto.
23811 (expand_partial_load_optab_fn): Ditto.
23812 (expand_partial_store_optab_fn): Ditto.
23813 (expand_scatter_store_optab_fn): Ditto.
23814 (expand_gather_load_optab_fn): Ditto.
23815 (internal_fn_len_index): Ditto.
23816 (internal_fn_mask_index): Ditto.
23817 (internal_len_load_store_bias): Ditto.
23818 * tree-vect-stmts.cc (vectorizable_store): Ditto.
23819 (vectorizable_load): Ditto.
23821 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23823 * config/riscv/autovec.md (len_maskload<mode><vm>): Change LEN_MASK into MASK_LEN.
23824 (mask_len_load<mode><vm>): Ditto.
23825 (len_maskstore<mode><vm>): Ditto.
23826 (mask_len_store<mode><vm>): Ditto.
23827 (len_mask_gather_load<RATIO64:mode><RATIO64I:mode>): Ditto.
23828 (mask_len_gather_load<RATIO64:mode><RATIO64I:mode>): Ditto.
23829 (len_mask_gather_load<RATIO32:mode><RATIO32I:mode>): Ditto.
23830 (mask_len_gather_load<RATIO32:mode><RATIO32I:mode>): Ditto.
23831 (len_mask_gather_load<RATIO16:mode><RATIO16I:mode>): Ditto.
23832 (mask_len_gather_load<RATIO16:mode><RATIO16I:mode>): Ditto.
23833 (len_mask_gather_load<RATIO8:mode><RATIO8I:mode>): Ditto.
23834 (mask_len_gather_load<RATIO8:mode><RATIO8I:mode>): Ditto.
23835 (len_mask_gather_load<RATIO4:mode><RATIO4I:mode>): Ditto.
23836 (mask_len_gather_load<RATIO4:mode><RATIO4I:mode>): Ditto.
23837 (len_mask_gather_load<RATIO2:mode><RATIO2I:mode>): Ditto.
23838 (mask_len_gather_load<RATIO2:mode><RATIO2I:mode>): Ditto.
23839 (len_mask_gather_load<RATIO1:mode><RATIO1:mode>): Ditto.
23840 (mask_len_gather_load<RATIO1:mode><RATIO1:mode>): Ditto.
23841 (len_mask_scatter_store<RATIO64:mode><RATIO64I:mode>): Ditto.
23842 (mask_len_scatter_store<RATIO64:mode><RATIO64I:mode>): Ditto.
23843 (len_mask_scatter_store<RATIO32:mode><RATIO32I:mode>): Ditto.
23844 (mask_len_scatter_store<RATIO32:mode><RATIO32I:mode>): Ditto.
23845 (len_mask_scatter_store<RATIO16:mode><RATIO16I:mode>): Ditto.
23846 (mask_len_scatter_store<RATIO16:mode><RATIO16I:mode>): Ditto.
23847 (len_mask_scatter_store<RATIO8:mode><RATIO8I:mode>): Ditto.
23848 (mask_len_scatter_store<RATIO8:mode><RATIO8I:mode>): Ditto.
23849 (len_mask_scatter_store<RATIO4:mode><RATIO4I:mode>): Ditto.
23850 (mask_len_scatter_store<RATIO4:mode><RATIO4I:mode>): Ditto.
23851 (len_mask_scatter_store<RATIO2:mode><RATIO2I:mode>): Ditto.
23852 (mask_len_scatter_store<RATIO2:mode><RATIO2I:mode>): Ditto.
23853 (len_mask_scatter_store<RATIO1:mode><RATIO1:mode>): Ditto.
23854 (mask_len_scatter_store<RATIO1:mode><RATIO1:mode>): Ditto.
23855 * doc/md.texi: Ditto.
23856 * genopinit.cc (main): Ditto.
23857 (CMP_NAME): Ditto. Ditto.
23858 * gimple-fold.cc (arith_overflowed_p): Ditto.
23859 (gimple_fold_partial_load_store_mem_ref): Ditto.
23860 (gimple_fold_call): Ditto.
23861 * internal-fn.cc (len_maskload_direct): Ditto.
23862 (mask_len_load_direct): Ditto.
23863 (len_maskstore_direct): Ditto.
23864 (mask_len_store_direct): Ditto.
23865 (expand_call_mem_ref): Ditto.
23866 (expand_len_maskload_optab_fn): Ditto.
23867 (expand_mask_len_load_optab_fn): Ditto.
23868 (expand_len_maskstore_optab_fn): Ditto.
23869 (expand_mask_len_store_optab_fn): Ditto.
23870 (direct_len_maskload_optab_supported_p): Ditto.
23871 (direct_mask_len_load_optab_supported_p): Ditto.
23872 (direct_len_maskstore_optab_supported_p): Ditto.
23873 (direct_mask_len_store_optab_supported_p): Ditto.
23874 (internal_load_fn_p): Ditto.
23875 (internal_store_fn_p): Ditto.
23876 (internal_gather_scatter_fn_p): Ditto.
23877 (internal_fn_len_index): Ditto.
23878 (internal_fn_mask_index): Ditto.
23879 (internal_fn_stored_value_index): Ditto.
23880 (internal_len_load_store_bias): Ditto.
23881 * internal-fn.def (LEN_MASK_GATHER_LOAD): Ditto.
23882 (MASK_LEN_GATHER_LOAD): Ditto.
23883 (LEN_MASK_LOAD): Ditto.
23884 (MASK_LEN_LOAD): Ditto.
23885 (LEN_MASK_SCATTER_STORE): Ditto.
23886 (MASK_LEN_SCATTER_STORE): Ditto.
23887 (LEN_MASK_STORE): Ditto.
23888 (MASK_LEN_STORE): Ditto.
23889 * optabs-query.cc (supports_vec_gather_load_p): Ditto.
23890 (supports_vec_scatter_store_p): Ditto.
23891 * optabs-tree.cc (target_supports_mask_load_store_p): Ditto.
23892 (target_supports_len_load_store_p): Ditto.
23893 * optabs.def (OPTAB_CD): Ditto.
23894 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Ditto.
23895 (call_may_clobber_ref_p_1): Ditto.
23896 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Ditto.
23897 (dse_optimize_stmt): Ditto.
23898 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn): Ditto.
23899 (get_alias_ptr_type_for_ptr_address): Ditto.
23900 * tree-vect-data-refs.cc (vect_gather_scatter_fn_p): Ditto.
23901 * tree-vect-patterns.cc (vect_recog_gather_scatter_pattern): Ditto.
23902 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
23903 (vect_get_strided_load_store_ops): Ditto.
23904 (vectorizable_store): Ditto.
23905 (vectorizable_load): Ditto.
23907 2023-07-21 Haochen Jiang <haochen.jiang@intel.com>
23909 * config/i386/i386.opt: Fix a typo.
23911 2023-07-21 Richard Biener <rguenther@suse.de>
23913 PR tree-optimization/88540
23914 * tree-ssa-phiopt.cc (minmax_replacement): Do not give up
23915 with NaNs but handle the simple case by if-converting to a
23918 2023-07-21 Andrew Pinski <apinski@marvell.com>
23920 * match.pd (minmax<minmax<a,b>,a>->minmax<a,b>): New
23923 2023-07-21 Richard Biener <rguenther@suse.de>
23925 PR tree-optimization/110742
23926 * tree-vect-slp.cc (vect_optimize_slp_pass::get_result_with_layout):
23927 Do not materialize an edge permutation in an external node with
23929 (vect_slp_analyze_node_operations_1): Guard purely internal
23932 2023-07-21 Jan Hubicka <jh@suse.cz>
23934 * cfgloop.cc: Include sreal.h.
23935 (flow_loop_dump): Dump sreal iteration exsitmate.
23936 (get_estimated_loop_iterations): Update.
23937 * cfgloop.h (expected_loop_iterations_by_profile): Declare.
23938 * cfgloopanal.cc (expected_loop_iterations_by_profile): New function.
23939 (expected_loop_iterations_unbounded): Use new API.
23940 * cfgloopmanip.cc (scale_loop_profile): Use
23941 expected_loop_iterations_by_profile
23942 * predict.cc (pass_profile::execute): Likewise.
23943 * profile.cc (branch_prob): Likewise.
23944 * tree-ssa-loop-niter.cc: Include sreal.h.
23945 (estimate_numbers_of_iterations): Likewise
23947 2023-07-21 Kewen Lin <linkw@linux.ibm.com>
23949 PR tree-optimization/110744
23950 * tree-ssa-sccvn.cc (vn_reference_lookup_3): Correct the index of bias
23951 operand for ifn IFN_LEN_STORE.
23953 2023-07-21 liuhongt <hongtao.liu@intel.com>
23956 * common.opt: (fcf-protection=): Add EnumSet attribute to
23957 support combination of params.
23959 2023-07-21 David Malcolm <dmalcolm@redhat.com>
23961 PR middle-end/110612
23962 * text-art/table.cc (table_geometry::table_geometry): Drop m_table
23964 (table_geometry::table_x_to_canvas_x): Add cast to comparison.
23965 (table_geometry::table_y_to_canvas_y): Likewise.
23966 * text-art/table.h (table_geometry::m_table): Drop unused field.
23967 * text-art/widget.h (wrapper_widget::update_child_alloc_rects):
23970 2023-07-20 Uros Bizjak <ubizjak@gmail.com>
23973 * config/i386/i386-features.cc
23974 (general_scalar_chain::compute_convert_gain): Calculate gain
23975 for extend higpart case.
23976 (general_scalar_chain::convert_op): Handle
23977 ASHIFTRT/ASHIFT combined RTX.
23978 (general_scalar_to_vector_candidate_p): Enable ASHIFTRT for
23979 SImode for SSE2 targets. Handle ASHIFTRT/ASHIFT combined RTX.
23980 * config/i386/i386.md (*extend<dwi>2_doubleword_highpart):
23981 New define_insn_and_split pattern.
23982 (*extendv2di2_highpart_stv): Ditto.
23984 2023-07-20 Vladimir N. Makarov <vmakarov@redhat.com>
23986 * lra-constraints.cc (simplify_operand_subreg): Check frame pointer
23989 2023-07-20 Andrew Pinski <apinski@marvell.com>
23991 * combine.cc (dump_combine_stats): Remove.
23992 (dump_combine_total_stats): Remove.
23993 (total_attempts, total_merges, total_extras,
23994 total_successes): Remove.
23995 (combine_instructions): Don't increment total stats
23996 instead use statistics_counter_event.
23997 * dumpfile.cc (print_combine_total_stats): Remove.
23998 * dumpfile.h (print_combine_total_stats): Remove.
23999 (dump_combine_total_stats): Remove.
24000 * passes.cc (finish_optimization_passes):
24001 Don't call print_combine_total_stats.
24002 * rtl.h (dump_combine_total_stats): Remove.
24003 (dump_combine_stats): Remove.
24005 2023-07-20 Jan Hubicka <jh@suse.cz>
24007 * tree-ssa-loop-ch.cc (should_duplicate_loop_header_p): Use BIT instead of TRUTH
24010 2023-07-20 Martin Jambor <mjambor@suse.cz>
24012 * doc/invoke.texi (analyzer-text-art-string-ellipsis-threshold): New.
24013 (analyzer-text-art-ideal-canvas-width): Likewise.
24014 (analyzer-text-art-string-ellipsis-head-len): Likewise.
24015 (analyzer-text-art-string-ellipsis-tail-len): Likewise.
24017 2023-07-20 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
24019 * tree-vect-stmts.cc (check_load_store_for_partial_vectors):
24020 Refine code structure.
24022 2023-07-20 Jan Hubicka <jh@suse.cz>
24024 * tree-ssa-loop-ch.cc (edge_range_query): Rename to ...
24025 (get_range_query): ... this one; do
24026 (static_loop_exit): Add query parametr, turn ranger to reference.
24027 (loop_static_stmt_p): New function.
24028 (loop_static_op_p): New function.
24029 (loop_iv_derived_p): Remove.
24030 (loop_combined_static_and_iv_p): New function.
24031 (should_duplicate_loop_header_p): Discover combined onditionals;
24032 do not track iv derived; improve dumps.
24033 (pass_ch::execute): Fix whitespace.
24035 2023-07-20 Richard Biener <rguenther@suse.de>
24037 PR tree-optimization/110204
24038 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_avail):
24039 Look through copies generated by PRE.
24041 2023-07-20 Matthew Malcomson <matthew.malcomson@arm.com>
24043 * tree-vect-stmts.cc (get_group_load_store_type): Account for
24044 `gap` when checking if need to peel twice.
24046 2023-07-20 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
24048 PR middle-end/77928
24049 * doc/extend.texi: Document iseqsig builtin.
24050 * builtins.cc (fold_builtin_iseqsig): New function.
24051 (fold_builtin_2): Handle BUILT_IN_ISEQSIG.
24052 (is_inexpensive_builtin): Handle BUILT_IN_ISEQSIG.
24053 * builtins.def (BUILT_IN_ISEQSIG): New built-in.
24055 2023-07-20 Pan Li <pan2.li@intel.com>
24057 * config/riscv/vector.md: Fix incorrect match_operand.
24059 2023-07-20 Roger Sayle <roger@nextmovesoftware.com>
24061 * config/i386/i386-expand.cc (ix86_expand_move): Don't call
24062 force_reg, to use SUBREG rather than create a new pseudo when
24063 inserting DFmode fields into TImode with insvti_{high,low}part.
24064 * config/i386/i386.md (*concat<mode><dwi>3_3): Split into two
24065 define_insn_and_split...
24066 (*concatditi3_3): 64-bit implementation. Provide alternative
24067 that allows register allocation to use SSE registers that is
24068 split into vec_concatv2di after reload.
24069 (*concatsidi3_3): 32-bit implementation.
24071 2023-07-20 Richard Biener <rguenther@suse.de>
24073 PR middle-end/61747
24074 * internal-fn.cc (expand_vec_cond_optab_fn): When the
24075 value operands are equal to the original comparison operands
24076 preserve that equality by re-using the comparison expansion.
24077 * optabs.cc (emit_conditional_move): When the value operands
24078 are equal to the comparison operands and would be forced to
24079 a register by prepare_cmp_insn do so earlier, preserving the
24082 2023-07-20 Pan Li <pan2.li@intel.com>
24084 * config/riscv/vector.md: Align pattern format.
24086 2023-07-20 Haochen Jiang <haochen.jiang@intel.com>
24088 * doc/invoke.texi: Remove AVX512VP2INTERSECT in
24089 Granite Rapids{, D} from documentation.
24091 2023-07-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24093 * config/riscv/autovec.md
24094 (len_mask_gather_load<VNX16_QHSD:mode><VNX16_QHSDI:mode>):
24095 Refactor RVV machine modes.
24096 (len_mask_gather_load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
24097 (len_mask_gather_load<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
24098 (len_mask_gather_load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
24099 (len_mask_gather_load<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
24100 (len_mask_gather_load<mode><mode>): Ditto.
24101 (len_mask_gather_load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
24102 (len_mask_scatter_store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
24103 (len_mask_scatter_store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
24104 (len_mask_scatter_store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
24105 (len_mask_scatter_store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
24106 (len_mask_scatter_store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
24107 (len_mask_scatter_store<mode><mode>): Ditto.
24108 (len_mask_scatter_store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
24109 * config/riscv/riscv-modes.def (VECTOR_BOOL_MODE): Ditto.
24110 (ADJUST_NUNITS): Ditto.
24111 (ADJUST_ALIGNMENT): Ditto.
24112 (ADJUST_BYTESIZE): Ditto.
24113 (ADJUST_PRECISION): Ditto.
24114 (RVV_MODES): Ditto.
24115 (RVV_WHOLE_MODES): Ditto.
24116 (RVV_FRACT_MODE): Ditto.
24117 (RVV_NF8_MODES): Ditto.
24118 (RVV_NF4_MODES): Ditto.
24119 (VECTOR_MODES_WITH_PREFIX): Ditto.
24120 (VECTOR_MODE_WITH_PREFIX): Ditto.
24121 (RVV_TUPLE_MODES): Ditto.
24122 (RVV_NF2_MODES): Ditto.
24123 (RVV_TUPLE_PARTIAL_MODES): Ditto.
24124 * config/riscv/riscv-v.cc (struct mode_vtype_group): Ditto.
24126 (TUPLE_ENTRY): Ditto.
24127 (get_vlmul): Ditto.
24129 (get_ratio): Ditto.
24130 (preferred_simd_mode): Ditto.
24131 (autovectorize_vector_modes): Ditto.
24132 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
24133 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): Ditto.
24134 (vbool64_t): Ditto.
24135 (vbool32_t): Ditto.
24136 (vbool16_t): Ditto.
24141 (vint8mf8_t): Ditto.
24142 (vuint8mf8_t): Ditto.
24143 (vint8mf4_t): Ditto.
24144 (vuint8mf4_t): Ditto.
24145 (vint8mf2_t): Ditto.
24146 (vuint8mf2_t): Ditto.
24147 (vint8m1_t): Ditto.
24148 (vuint8m1_t): Ditto.
24149 (vint8m2_t): Ditto.
24150 (vuint8m2_t): Ditto.
24151 (vint8m4_t): Ditto.
24152 (vuint8m4_t): Ditto.
24153 (vint8m8_t): Ditto.
24154 (vuint8m8_t): Ditto.
24155 (vint16mf4_t): Ditto.
24156 (vuint16mf4_t): Ditto.
24157 (vint16mf2_t): Ditto.
24158 (vuint16mf2_t): Ditto.
24159 (vint16m1_t): Ditto.
24160 (vuint16m1_t): Ditto.
24161 (vint16m2_t): Ditto.
24162 (vuint16m2_t): Ditto.
24163 (vint16m4_t): Ditto.
24164 (vuint16m4_t): Ditto.
24165 (vint16m8_t): Ditto.
24166 (vuint16m8_t): Ditto.
24167 (vint32mf2_t): Ditto.
24168 (vuint32mf2_t): Ditto.
24169 (vint32m1_t): Ditto.
24170 (vuint32m1_t): Ditto.
24171 (vint32m2_t): Ditto.
24172 (vuint32m2_t): Ditto.
24173 (vint32m4_t): Ditto.
24174 (vuint32m4_t): Ditto.
24175 (vint32m8_t): Ditto.
24176 (vuint32m8_t): Ditto.
24177 (vint64m1_t): Ditto.
24178 (vuint64m1_t): Ditto.
24179 (vint64m2_t): Ditto.
24180 (vuint64m2_t): Ditto.
24181 (vint64m4_t): Ditto.
24182 (vuint64m4_t): Ditto.
24183 (vint64m8_t): Ditto.
24184 (vuint64m8_t): Ditto.
24185 (vfloat16mf4_t): Ditto.
24186 (vfloat16mf2_t): Ditto.
24187 (vfloat16m1_t): Ditto.
24188 (vfloat16m2_t): Ditto.
24189 (vfloat16m4_t): Ditto.
24190 (vfloat16m8_t): Ditto.
24191 (vfloat32mf2_t): Ditto.
24192 (vfloat32m1_t): Ditto.
24193 (vfloat32m2_t): Ditto.
24194 (vfloat32m4_t): Ditto.
24195 (vfloat32m8_t): Ditto.
24196 (vfloat64m1_t): Ditto.
24197 (vfloat64m2_t): Ditto.
24198 (vfloat64m4_t): Ditto.
24199 (vfloat64m8_t): Ditto.
24200 * config/riscv/riscv-vector-switch.def (ENTRY): Ditto.
24201 (TUPLE_ENTRY): Ditto.
24202 * config/riscv/riscv-vsetvl.cc (change_insn): Ditto.
24203 * config/riscv/riscv.cc (riscv_valid_lo_sum_p): Ditto.
24204 (riscv_v_adjust_nunits): Ditto.
24205 (riscv_v_adjust_bytesize): Ditto.
24206 (riscv_v_adjust_precision): Ditto.
24207 (riscv_convert_vector_bits): Ditto.
24208 * config/riscv/riscv.h (riscv_v_adjust_nunits): Ditto.
24209 * config/riscv/riscv.md: Ditto.
24210 * config/riscv/vector-iterators.md: Ditto.
24211 * config/riscv/vector.md
24212 (@pred_indexed_<order>store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
24213 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
24214 (@pred_indexed_<order>store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
24215 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
24216 (@pred_indexed_<order>store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
24217 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
24218 (@pred_indexed_<order>store<VNX128_Q:mode><VNX128_Q:mode>): Ditto.
24219 (@pred_indexed_<order>load<V1T:mode><V1I:mode>): Ditto.
24220 (@pred_indexed_<order>load<V1T:mode><VNX1_QHSDI:mode>): Ditto.
24221 (@pred_indexed_<order>load<V2T:mode><V2I:mode>): Ditto.
24222 (@pred_indexed_<order>load<V2T:mode><VNX2_QHSDI:mode>): Ditto.
24223 (@pred_indexed_<order>load<V4T:mode><V4I:mode>): Ditto.
24224 (@pred_indexed_<order>load<V4T:mode><VNX4_QHSDI:mode>): Ditto.
24225 (@pred_indexed_<order>load<V8T:mode><V8I:mode>): Ditto.
24226 (@pred_indexed_<order>load<V8T:mode><VNX8_QHSDI:mode>): Ditto.
24227 (@pred_indexed_<order>load<V16T:mode><V16I:mode>): Ditto.
24228 (@pred_indexed_<order>load<V16T:mode><VNX16_QHSI:mode>): Ditto.
24229 (@pred_indexed_<order>load<V32T:mode><V32I:mode>): Ditto.
24230 (@pred_indexed_<order>load<V32T:mode><VNX32_QHI:mode>): Ditto.
24231 (@pred_indexed_<order>load<V64T:mode><V64I:mode>): Ditto.
24232 (@pred_indexed_<order>store<V1T:mode><V1I:mode>): Ditto.
24233 (@pred_indexed_<order>store<V1T:mode><VNX1_QHSDI:mode>): Ditto.
24234 (@pred_indexed_<order>store<V2T:mode><V2I:mode>): Ditto.
24235 (@pred_indexed_<order>store<V2T:mode><VNX2_QHSDI:mode>): Ditto.
24236 (@pred_indexed_<order>store<V4T:mode><V4I:mode>): Ditto.
24237 (@pred_indexed_<order>store<V4T:mode><VNX4_QHSDI:mode>): Ditto.
24238 (@pred_indexed_<order>store<V8T:mode><V8I:mode>): Ditto.
24239 (@pred_indexed_<order>store<V8T:mode><VNX8_QHSDI:mode>): Ditto.
24240 (@pred_indexed_<order>store<V16T:mode><V16I:mode>): Ditto.
24241 (@pred_indexed_<order>store<V16T:mode><VNX16_QHSI:mode>): Ditto.
24242 (@pred_indexed_<order>store<V32T:mode><V32I:mode>): Ditto.
24243 (@pred_indexed_<order>store<V32T:mode><VNX32_QHI:mode>): Ditto.
24244 (@pred_indexed_<order>store<V64T:mode><V64I:mode>): Ditto.
24246 2023-07-19 Vladimir N. Makarov <vmakarov@redhat.com>
24248 * lra-int.h (lra_update_fp2sp_elimination): New prototype.
24249 (lra_asm_insn_error): New prototype.
24250 * lra-spills.cc (remove_pseudos): Add check for pseudo slot memory
24252 (lra_spill): Call lra_update_fp2sp_elimination.
24253 * lra-eliminations.cc: Remove trailing spaces.
24254 (elimination_fp2sp_occured_p): New static flag.
24255 (lra_eliminate_regs_1): Set the flag up.
24256 (update_reg_eliminate): Modify the assert for stack to frame
24257 pointer elimination.
24258 (lra_update_fp2sp_elimination): New function.
24259 (lra_eliminate): Clear flag elimination_fp2sp_occured_p.
24261 2023-07-19 Andrew Carlotti <andrew.carlotti@arm.com>
24263 * config/aarch64/aarch64.h (TARGET_MEMTAG): Remove armv8.5
24265 * config/aarch64/arm_acle.h: Remove unnecessary armv8.x
24266 dependencies from target pragmas.
24267 * config/aarch64/arm_fp16.h (target): Likewise.
24268 * config/aarch64/arm_neon.h (target): Likewise.
24270 2023-07-19 Andrew Pinski <apinski@marvell.com>
24272 PR tree-optimization/110252
24273 * tree-ssa-phiopt.cc (class auto_flow_sensitive): New class.
24274 (auto_flow_sensitive::auto_flow_sensitive): New constructor.
24275 (auto_flow_sensitive::~auto_flow_sensitive): New deconstructor.
24276 (match_simplify_replacement): Temporarily
24277 remove the flow sensitive info on the two statements that might
24280 2023-07-19 Andrew Pinski <apinski@marvell.com>
24282 * gimple-fold.cc (fosa_unwind): Replace `vrange_storage *`
24283 with flow_sensitive_info_storage.
24284 (follow_outer_ssa_edges): Update how to save off the flow
24286 (maybe_fold_comparisons_from_match_pd): Update restoring
24287 of flow sensitive info.
24288 * tree-ssanames.cc (flow_sensitive_info_storage::save): New method.
24289 (flow_sensitive_info_storage::restore): New method.
24290 (flow_sensitive_info_storage::save_and_clear): New method.
24291 (flow_sensitive_info_storage::clear_storage): New method.
24292 * tree-ssanames.h (class flow_sensitive_info_storage): New class.
24294 2023-07-19 Andrew Pinski <apinski@marvell.com>
24296 PR tree-optimization/110726
24297 * match.pd ((a|b)&(a==b),a|(a==b),(a&b)|(a==b)):
24298 Add checks to make sure the type was one bit precision
24301 2023-07-19 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
24303 * doc/md.texi: Add mask_len_fold_left_plus.
24304 * internal-fn.cc (mask_len_fold_left_direct): Ditto.
24305 (expand_mask_len_fold_left_optab_fn): Ditto.
24306 (direct_mask_len_fold_left_optab_supported_p): Ditto.
24307 * internal-fn.def (MASK_LEN_FOLD_LEFT_PLUS): Ditto.
24308 * optabs.def (OPTAB_D): Ditto.
24310 2023-07-19 Jakub Jelinek <jakub@redhat.com>
24312 * tree-switch-conversion.h (class bit_test_cluster): Fix comment typo.
24314 2023-07-19 Jakub Jelinek <jakub@redhat.com>
24316 PR tree-optimization/110731
24317 * wide-int.cc (wi::divmod_internal): Always unpack dividend and
24318 divisor as UNSIGNED regardless of sgn.
24320 2023-07-19 Lehua Ding <lehua.ding@rivai.ai>
24322 * common/config/riscv/riscv-common.cc (riscv_supported_std_ext): Init.
24323 (standard_extensions_p): Add check.
24324 (riscv_subset_list::add): Just return NULL if it failed before.
24325 (riscv_subset_list::parse_std_ext): Continue parse when find a error
24326 (riscv_subset_list::parse): Just return NULL if it failed before.
24327 * config/riscv/riscv-subset.h (class riscv_subset_list): Add field.
24329 2023-07-19 Jan Beulich <jbeulich@suse.com>
24331 * config/i386/i386-expand.cc (ix86_expand_vector_init_duplicate):
24333 (ix86_expand_vector_extract): Use gen_vec_extract_lo /
24334 gen_vec_extract_hi.
24335 (expand_vec_perm_broadcast_1): Use gen_vec_interleave_high /
24336 gen_vec_interleave_low. Rename local variable.
24338 2023-07-19 Jan Beulich <jbeulich@suse.com>
24340 * config/i386/sse.md (vec_dupv2df<mask_name>): Add new AVX512F
24341 alternative. Move AVX512VL part of condition to new "enabled"
24344 2023-07-19 liuhongt <hongtao.liu@intel.com>
24347 * config/i386/i386-builtins.cc
24348 (ix86_register_float16_builtin_type): Remove TARGET_SSE2.
24349 (ix86_register_bf16_builtin_type): Ditto.
24350 * config/i386/i386-c.cc (ix86_target_macros): When TARGET_SSE2
24351 isn't available, undef the macros which are used to check the
24352 backend support of the _Float16/__bf16 types when building
24353 libstdc++ and libgcc.
24354 * config/i386/i386.cc (construct_container): Issue errors for
24355 HFmode/BFmode when TARGET_SSE2 is not available.
24356 (function_value_32): Ditto.
24357 (ix86_scalar_mode_supported_p): Remove TARGET_SSE2 for HFmode/BFmode.
24358 (ix86_libgcc_floating_mode_supported_p): Ditto.
24359 (ix86_emit_support_tinfos): Adjust codes.
24360 (ix86_invalid_conversion): Return diagnostic message string
24361 when there's conversion from/to BF/HFmode w/o TARGET_SSE2.
24362 (ix86_invalid_unary_op): New function.
24363 (ix86_invalid_binary_op): Ditto.
24364 (TARGET_INVALID_UNARY_OP): Define.
24365 (TARGET_INVALID_BINARY_OP): Define.
24366 * config/i386/immintrin.h [__SSE2__]: Remove for fp16/bf16
24367 related instrinsics header files.
24368 * config/i386/i386.h (VALID_SSE2_TYPE_MODE): New macro.
24370 2023-07-18 Uros Bizjak <ubizjak@gmail.com>
24372 * dwarf2asm.cc: Change FALSE to false.
24373 * dwarf2cfi.cc (execute_dwarf2_frame): Change return type to void.
24374 * dwarf2out.cc (matches_main_base): Change return type from
24375 int to bool. Change "last_match" variable to bool.
24376 (dump_struct_debug): Change return type from int to bool.
24377 Change "matches" and "result" function arguments to bool.
24378 (is_pseudo_reg): Change return type from int to bool.
24379 (is_tagged_type): Ditto.
24380 (same_loc_p): Ditto.
24381 (same_dw_val_p): Change return type from int to bool and adjust
24382 function body accordingly.
24383 (same_attr_p): Ditto.
24384 (same_die_p): Ditto.
24385 (is_type_die): Ditto.
24386 (is_declaration_die): Ditto.
24387 (should_move_die_to_comdat): Ditto.
24388 (is_base_type): Ditto.
24389 (is_based_loc): Ditto.
24390 (local_scope_p): Ditto.
24391 (class_scope_p): Ditto.
24392 (class_or_namespace_scope_p): Ditto.
24393 (is_tagged_type): Ditto.
24394 (is_rust): Use void argument.
24395 (is_nested_in_subprogram): Change return type from int to bool.
24396 (contains_subprogram_definition): Ditto.
24397 (gen_struct_or_union_type_die): Change "nested", "complete"
24398 and "ns_decl" variables to bool.
24399 (is_naming_typedef_decl): Change FALSE to false.
24401 2023-07-18 Jan Hubicka <jh@suse.cz>
24403 * tree-ssa-loop-ch.cc (edge_range_query): Take loop argument; be ready
24404 for queries not in headers.
24405 (static_loop_exit): Add basic blck parameter; update use of
24407 (should_duplicate_loop_header_p): Add ranger and static_exits
24408 parameter. Do not account statements that will be optimized
24409 out after duplicaiton in overall size. Add ranger query to
24411 (update_profile_after_ch): Take static_exits has set instead of
24412 single eliminated_edge.
24413 (ch_base::copy_headers): Do all analysis in the first pass;
24414 remember invariant_exits and static_exits.
24416 2023-07-18 Jason Merrill <jason@redhat.com>
24418 * fold-const.cc (native_interpret_aggregate): Skip empty fields.
24420 2023-07-18 Gaius Mulley <gaiusmod2@gmail.com>
24422 * doc/gm2.texi (Semantic checking): Change example testwithptr
24425 2023-07-18 Richard Biener <rguenther@suse.de>
24427 PR middle-end/105715
24428 * gimple-isel.cc (gimple_expand_vec_exprs): Merge into...
24429 (pass_gimple_isel::execute): ... this. Duplicate
24430 comparison defs of COND_EXPRs.
24432 2023-07-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24434 * config/riscv/riscv-selftests.cc (run_poly_int_selftests): Add more selftests.
24435 * config/riscv/riscv.cc (riscv_legitimize_poly_move): Dynamic adjust size of VLA vectors.
24436 (riscv_convert_vector_bits): Ditto.
24438 2023-07-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24440 * config/riscv/autovec.md (vec_shl_insert_<mode>): New patterns.
24441 * config/riscv/riscv-v.cc (shuffle_compress_patterns): Fix bugs.
24443 2023-07-18 Juergen Christ <jchrist@linux.ibm.com>
24445 * config/s390/vx-builtins.md: New vsel pattern.
24447 2023-07-18 liuhongt <hongtao.liu@intel.com>
24450 * config/i386/sse.md (<mask_codefor>one_cmpl<mode>2<mask_name>):
24451 Remove # from assemble output.
24453 2023-07-18 liuhongt <hongtao.liu@intel.com>
24456 * config/i386/sync.md (cmpccxadd_<mode>): Adjust the pattern
24457 to explicitly set FLAGS_REG like *cmp<mode>_1, also add extra
24458 3 define_peephole2 after the pattern.
24460 2023-07-18 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
24462 * rtl-ssa/internals.inl: Fix when mode1 and mode2 are not ordred.
24464 2023-07-18 Pan Li <pan2.li@intel.com>
24465 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24467 * config/riscv/riscv.cc (struct machine_function): Add new field.
24468 (riscv_static_frm_mode_p): New function.
24469 (riscv_emit_frm_mode_set): New function for emit FRM.
24470 (riscv_emit_mode_set): Extract function for FRM.
24471 (riscv_mode_needed): Fix the TODO.
24472 (riscv_mode_entry): Initial dynamic frm RTL.
24473 (riscv_mode_exit): Return DYN_EXIT.
24474 * config/riscv/riscv.md: Add rdfrm.
24475 * config/riscv/vector-iterators.md (unspecv): Add DYN_EXIT unspecv.
24476 * config/riscv/vector.md (frm_modee): Add new mode dyn_exit.
24478 (fsrmsi_backup): New pattern for swap.
24479 (fsrmsi_restore): New pattern for restore.
24480 (fsrmsi_restore_exit): New pattern for restore exit.
24481 (frrmsi): New pattern for backup.
24483 2023-07-17 Arsen Arsenović <arsen@aarsen.me>
24485 * doc/extend.texi: Add @cindex on __auto_type.
24487 2023-07-17 Uros Bizjak <ubizjak@gmail.com>
24489 * combine-stack-adj.cc (stack_memref_p): Change return type from
24490 int to bool and adjust function body accordingly.
24491 (rest_of_handle_stack_adjustments): Change return type to void.
24493 2023-07-17 Uros Bizjak <ubizjak@gmail.com>
24495 * combine.cc (struct reg_stat_type): Change last_set_invalid to bool.
24496 (cant_combine_insn_p): Change return type from int to bool and adjust
24497 function body accordingly.
24498 (can_combine_p): Ditto.
24499 (combinable_i3pat): Ditto. Change "i1_not_in_src" and "i0_not_in_src"
24500 function arguments from int to bool.
24501 (contains_muldiv): Change return type from int to bool and adjust
24502 function body accordingly.
24503 (try_combine): Ditto. Change "new_direct_jump" pointer function
24504 argument from int to bool. Change "substed_i2", "substed_i1",
24505 "substed_i0", "added_sets_0", "added_sets_1", "added_sets_2",
24506 "i2dest_in_i2src", "i1dest_in_i1src", "i2dest_in_i1src",
24507 "i0dest_in_i0src", "i1dest_in_i0src", "i2dest_in_i0src",
24508 "i2dest_killed", "i1dest_killed", "i0dest_killed", "i1_feeds_i2_n",
24509 "i0_feeds_i2_n", "i0_feeds_i1_n", "i3_subst_into_i2", "have_mult",
24510 "swap_i2i3", "split_i2i3" and "changed_i3_dest" variables
24512 (subst): Change "in_dest", "in_cond" and "unique_copy" function
24513 arguments from int to bool.
24514 (combine_simplify_rtx): Change "in_dest" and "in_cond" function
24515 arguments from int to bool.
24516 (make_extraction): Change "unsignedp", "in_dest" and "in_compare"
24517 function argument from int to bool.
24518 (force_int_to_mode): Change "just_select" function argument
24519 from int to bool. Change "next_select" variable to bool.
24520 (rtx_equal_for_field_assignment_p): Change return type from
24521 int to bool and adjust function body accordingly.
24522 (merge_outer_ops): Ditto. Change "pcomp_p" pointer function
24523 argument from int to bool.
24524 (get_last_value_validate): Change return type from int to bool
24525 and adjust function body accordingly.
24526 (reg_dead_at_p): Ditto.
24527 (reg_bitfield_target_p): Ditto.
24528 (combine_instructions): Ditto. Change "new_direct_jump"
24530 (can_combine_p): Change return type from int to bool
24531 and adjust function body accordingly.
24532 (likely_spilled_retval_p): Ditto.
24533 (can_change_dest_mode): Change "added_sets" function argument
24535 (find_split_point): Change "unsignedp" variable to bool.
24536 (simplify_if_then_else): Change "comparison_p" and "swapped"
24538 (simplify_set): Change "other_changed" variable to bool.
24539 (expand_compound_operation): Change "unsignedp" variable to bool.
24540 (force_to_mode): Change "just_select" function argument
24541 from int to bool. Change "next_select" variable to bool.
24542 (extended_count): Change "unsignedp" function argument to bool.
24543 (simplify_shift_const_1): Change "complement_p" variable to bool.
24544 (simplify_comparison): Change "changed" variable to bool.
24545 (rest_of_handle_combine): Change return type to void.
24547 2023-07-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
24550 * Makefile.in (INTERNAL_FN_H): Add insn-opinit.h.
24552 2023-07-17 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
24554 * ira.cc (setup_reg_class_relations): Continue
24555 if regclass cl3 is hard_reg_set_empty_p.
24557 2023-07-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24559 * config/riscv/riscv.cc (riscv_option_override): Add sorry check.
24561 2023-07-17 Martin Jambor <mjambor@suse.cz>
24563 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Remove unused variable
24566 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
24568 * tree-ssa-ccp.cc (ccp_finalize): Export value/mask known bits.
24570 2023-07-17 Lehua Ding <lehua.ding@rivai.ai>
24573 * common/config/riscv/riscv-common.cc (riscv_subset_list::handle_implied_ext):
24574 recur add all implied extensions.
24575 (riscv_subset_list::check_implied_ext): Add new method.
24576 (riscv_subset_list::parse): Call checker check_implied_ext.
24577 * config/riscv/riscv-subset.h: Add new method.
24579 2023-07-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24581 * config/riscv/autovec.md (reduc_plus_scal_<mode>): New pattern.
24582 (reduc_smax_scal_<mode>): Ditto.
24583 (reduc_umax_scal_<mode>): Ditto.
24584 (reduc_smin_scal_<mode>): Ditto.
24585 (reduc_umin_scal_<mode>): Ditto.
24586 (reduc_and_scal_<mode>): Ditto.
24587 (reduc_ior_scal_<mode>): Ditto.
24588 (reduc_xor_scal_<mode>): Ditto.
24589 * config/riscv/riscv-protos.h (enum insn_type): Add reduction.
24590 (expand_reduction): New function.
24591 * config/riscv/riscv-v.cc (emit_vlmax_reduction_insn): Ditto.
24592 (emit_vlmax_fp_reduction_insn): Ditto.
24593 (get_m1_mode): Ditto.
24594 (expand_cond_len_binop): Fix name.
24595 (expand_reduction): New function
24596 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Fix VSETVL BUG.
24597 (validate_change_or_fail): New function.
24598 (change_insn): Fix VSETVL BUG.
24599 (change_vsetvl_insn): Ditto.
24600 (pass_vsetvl::backward_demand_fusion): Ditto.
24601 (pass_vsetvl::df_post_optimization): Ditto.
24603 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
24605 * ipa-prop.cc (ipcp_update_bits): Export value/mask known bits.
24607 2023-07-17 Christoph Müllner <christoph.muellner@vrull.eu>
24609 * config/riscv/riscv.cc (riscv_regno_ok_for_index_p):
24610 Remove parameter name from declaration of unused parameter.
24612 2023-07-17 Kewen Lin <linkw@linux.ibm.com>
24614 PR tree-optimization/110652
24615 * tree-vect-stmts.cc (vectorizable_load): Initialize new_temp as
24618 2023-07-17 Richard Biener <rguenther@suse.de>
24620 PR tree-optimization/110669
24621 * tree-scalar-evolution.cc (analyze_and_compute_bitop_with_inv_effect):
24622 Check we matched a header PHI.
24624 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
24626 * tree-ssanames.cc (set_bitmask): New.
24627 * tree-ssanames.h (set_bitmask): New.
24629 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
24631 * value-range.cc (irange_bitmask::verify_mask): Mask need not be
24633 * value-range.h (irange_bitmask::union_): Normalize beforehand.
24634 (irange_bitmask::intersect): Same.
24636 2023-07-17 Andrew Pinski <apinski@marvell.com>
24638 PR tree-optimization/95923
24639 * match.pd ((a|b)&(a==b),a|(a==b),(a&b)|(a==b)): New transformation.
24641 2023-07-17 Roger Sayle <roger@nextmovesoftware.com>
24643 * tree-if-conv.cc (predicate_scalar_phi): Make the arguments
24644 to the std::sort comparison lambda function const.
24646 2023-07-17 Andrew Pinski <apinski@marvell.com>
24648 PR tree-optimization/110666
24649 * match.pd (A NEEQ (A NEEQ CST)): Fix Outer EQ case.
24651 2023-07-17 Mo, Zewei <zewei.mo@intel.com>
24653 * common/config/i386/cpuinfo.h (get_intel_cpu): Handle Lunar Lake,
24654 Arrow Lake and Arrow Lake S.
24655 * common/config/i386/i386-common.cc:
24656 (processor_name): Add arrowlake.
24657 (processor_alias_table): Add arrow lake, arrow lake s and lunar
24659 * common/config/i386/i386-cpuinfo.h (enum processor_subtypes):
24660 Add INTEL_COREI7_ARROWLAKE and INTEL_COREI7_ARROWLAKE_S.
24661 * config.gcc: Add -march=arrowlake and -march=arrowlake-s.
24662 * config/i386/driver-i386.cc (host_detect_local_cpu): Handle
24664 * config/i386/i386-c.cc (ix86_target_macros_internal): Add
24666 * config/i386/i386-options.cc (m_ARROWLAKE): New.
24667 (processor_cost_table): Add arrowlake.
24668 * config/i386/i386.h (enum processor_type):
24669 Add PROCESSOR_ARROWLAKE.
24670 * config/i386/x86-tune.def: Add m_ARROWLAKE.
24671 * doc/extend.texi: Add arrowlake and arrowlake-s.
24672 * doc/invoke.texi: Ditto.
24674 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
24676 * config/i386/sse.md (VI2_AVX2): Delete V32HI since we actually
24677 have the same iterator. Also renaming all the occurence to
24679 (usdot_prod<mode>): New define_expand.
24680 (udot_prod<mode>): Ditto.
24682 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
24684 * common/config/i386/cpuinfo.h (get_available_features):
24686 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SM4_SET,
24687 OPTION_MASK_ISA2_SM4_UNSET): New.
24688 (OPTION_MASK_ISA2_AVX_UNSET): Add SM4.
24689 (ix86_handle_option): Handle -msm4.
24690 * common/config/i386/i386-cpuinfo.h (enum processor_features):
24692 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
24694 * config.gcc: Add sm4intrin.h.
24695 * config/i386/cpuid.h (bit_SM4): New.
24696 * config/i386/i386-builtin.def (BDESC): Add new builtins.
24697 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
24699 * config/i386/i386-isa.def (SM4): Add DEF_PTA(SM4).
24700 * config/i386/i386-options.cc (isa2_opts): Add -msm4.
24701 (ix86_valid_target_attribute_inner_p): Handle sm4.
24702 * config/i386/i386.opt: Add option -msm4.
24703 * config/i386/immintrin.h: Include sm4intrin.h
24704 * config/i386/sse.md (vsm4key4_<mode>): New define insn.
24705 (vsm4rnds4_<mode>): Ditto.
24706 * doc/extend.texi: Document sm4.
24707 * doc/invoke.texi: Document -msm4.
24708 * doc/sourcebuild.texi: Document target sm4.
24709 * config/i386/sm4intrin.h: New file.
24711 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
24713 * common/config/i386/cpuinfo.h (get_available_features):
24715 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SHA512_SET,
24716 OPTION_MASK_ISA2_SHA512_UNSET): New.
24717 (OPTION_MASK_ISA2_AVX_UNSET): Add SHA512.
24718 (ix86_handle_option): Handle -msha512.
24719 * common/config/i386/i386-cpuinfo.h (enum processor_features):
24720 Add FEATURE_SHA512.
24721 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
24723 * config.gcc: Add sha512intrin.h.
24724 * config/i386/cpuid.h (bit_SHA512): New.
24725 * config/i386/i386-builtin-types.def:
24726 Add DEF_FUNCTION_TYPE (V4DI, V4DI, V4DI, V2DI).
24727 * config/i386/i386-builtin.def (BDESC): Add new builtins.
24728 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
24730 * config/i386/i386-expand.cc (ix86_expand_args_builtin): Handle
24731 V4DI_FTYPE_V4DI_V4DI_V2DI and V4DI_FTYPE_V4DI_V2DI.
24732 * config/i386/i386-isa.def (SHA512): Add DEF_PTA(SHA512).
24733 * config/i386/i386-options.cc (isa2_opts): Add -msha512.
24734 (ix86_valid_target_attribute_inner_p): Handle sha512.
24735 * config/i386/i386.opt: Add option -msha512.
24736 * config/i386/immintrin.h: Include sha512intrin.h.
24737 * config/i386/sse.md (vsha512msg1): New define insn.
24738 (vsha512msg2): Ditto.
24739 (vsha512rnds2): Ditto.
24740 * doc/extend.texi: Document sha512.
24741 * doc/invoke.texi: Document -msha512.
24742 * doc/sourcebuild.texi: Document target sha512.
24743 * config/i386/sha512intrin.h: New file.
24745 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
24747 * common/config/i386/cpuinfo.h (get_available_features):
24749 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SM3_SET,
24750 OPTION_MASK_ISA2_SM3_UNSET): New.
24751 (OPTION_MASK_ISA2_AVX_UNSET): Add SM3.
24752 (ix86_handle_option): Handle -msm3.
24753 * common/config/i386/i386-cpuinfo.h (enum processor_features):
24755 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
24757 * config.gcc: Add sm3intrin.h
24758 * config/i386/cpuid.h (bit_SM3): New.
24759 * config/i386/i386-builtin-types.def:
24760 Add DEF_FUNCTION_TYPE (V4SI, V4SI, V4SI, V4SI, INT).
24761 * config/i386/i386-builtin.def (BDESC): Add new builtins.
24762 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
24764 * config/i386/i386-expand.cc (ix86_expand_args_builtin): Handle
24765 V4SI_FTYPE_V4SI_V4SI_V4SI_INT.
24766 * config/i386/i386-isa.def (SM3): Add DEF_PTA(SM3).
24767 * config/i386/i386-options.cc (isa2_opts): Add -msm3.
24768 (ix86_valid_target_attribute_inner_p): Handle sm3.
24769 * config/i386/i386.opt: Add option -msm3.
24770 * config/i386/immintrin.h: Include sm3intrin.h.
24771 * config/i386/sse.md (vsm3msg1): New define insn.
24773 (vsm3rnds2): Ditto.
24774 * doc/extend.texi: Document sm3.
24775 * doc/invoke.texi: Document -msm3.
24776 * doc/sourcebuild.texi: Document target sm3.
24777 * config/i386/sm3intrin.h: New file.
24779 2023-07-17 Kong Lingling <lingling.kong@intel.com>
24780 Haochen Jiang <haochen.jiang@intel.com>
24782 * common/config/i386/cpuinfo.h (get_available_features): Detect
24784 * common/config/i386/i386-common.cc
24785 (OPTION_MASK_ISA2_AVXVNNIINT16_SET): New.
24786 (OPTION_MASK_ISA2_AVXVNNIINT16_UNSET): Ditto.
24787 (ix86_handle_option): Handle -mavxvnniint16.
24788 * common/config/i386/i386-cpuinfo.h (enum processor_features):
24789 Add FEATURE_AVXVNNIINT16.
24790 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
24792 * config.gcc: Add avxvnniint16.h.
24793 * config/i386/avxvnniint16intrin.h: New file.
24794 * config/i386/cpuid.h (bit_AVXVNNIINT16): New.
24795 * config/i386/i386-builtin.def: Add new builtins.
24796 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
24798 * config/i386/i386-options.cc (isa2_opts): Add -mavxvnniint16.
24799 (ix86_valid_target_attribute_inner_p): Handle avxvnniint16intrin.h.
24800 * config/i386/i386-isa.def: Add DEF_PTA(AVXVNNIINT16).
24801 * config/i386/i386.opt: Add option -mavxvnniint16.
24802 * config/i386/immintrin.h: Include avxvnniint16.h.
24803 * config/i386/sse.md
24804 (vpdp<vpdpwprodtype>_<mode>): New define_insn.
24805 * doc/extend.texi: Document avxvnniint16.
24806 * doc/invoke.texi: Document -mavxvnniint16.
24807 * doc/sourcebuild.texi: Document target avxvnniint16.
24809 2023-07-16 Jan Hubicka <jh@suse.cz>
24811 PR middle-end/110649
24812 * tree-vect-loop.cc (scale_profile_for_vect_loop): Rewrite.
24813 (vect_transform_loop): Move scale_profile_for_vect_loop after
24814 upper bound updates.
24816 2023-07-16 Jan Hubicka <jh@suse.cz>
24818 PR tree-optimization/110649
24819 * tree-vect-loop.cc (optimize_mask_stores): Set correctly
24820 probability of the if-then-else construct.
24822 2023-07-16 Jan Hubicka <jh@suse.cz>
24824 PR middle-end/110649
24825 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Avoid double profile update.
24827 2023-07-15 Andrew Pinski <apinski@marvell.com>
24829 * doc/contrib.texi: Update my entry.
24831 2023-07-15 John David Anglin <danglin@gcc.gnu.org>
24833 * config/pa/pa.md: Define constants R1_REGNUM, R19_REGNUM and
24835 (tgd_load): Restrict to !TARGET_64BIT. Use register constants.
24836 (tld_load): Likewise.
24837 (tgd_load_pic): Change to expander.
24838 (tld_load_pic, tld_offset_load, tp_load): Likewise.
24839 (tie_load_pic, tle_load): Likewise.
24840 (tgd_load_picsi, tgd_load_picdi): New.
24841 (tld_load_picsi, tld_load_picdi): New.
24842 (tld_offset_load<P:mode>): New.
24843 (tp_load<P:mode>): New.
24844 (tie_load_picsi, tie_load_picdi): New.
24845 (tle_load<P:mode>): New.
24847 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
24849 * config/arm/arm-mve-builtins-base.cc (vcmlaq, vcmlaq_rot90)
24850 (vcmlaq_rot180, vcmlaq_rot270): New.
24851 * config/arm/arm-mve-builtins-base.def (vcmlaq, vcmlaq_rot90)
24852 (vcmlaq_rot180, vcmlaq_rot270): New.
24853 * config/arm/arm-mve-builtins-base.h: (vcmlaq, vcmlaq_rot90)
24854 (vcmlaq_rot180, vcmlaq_rot270): New.
24855 * config/arm/arm-mve-builtins.cc
24856 (function_instance::has_inactive_argument): Handle vcmlaq,
24857 vcmlaq_rot90, vcmlaq_rot180, vcmlaq_rot270.
24858 * config/arm/arm_mve.h (vcmlaq): Delete.
24859 (vcmlaq_rot180): Delete.
24860 (vcmlaq_rot270): Delete.
24861 (vcmlaq_rot90): Delete.
24862 (vcmlaq_m): Delete.
24863 (vcmlaq_rot180_m): Delete.
24864 (vcmlaq_rot270_m): Delete.
24865 (vcmlaq_rot90_m): Delete.
24866 (vcmlaq_f16): Delete.
24867 (vcmlaq_rot180_f16): Delete.
24868 (vcmlaq_rot270_f16): Delete.
24869 (vcmlaq_rot90_f16): Delete.
24870 (vcmlaq_f32): Delete.
24871 (vcmlaq_rot180_f32): Delete.
24872 (vcmlaq_rot270_f32): Delete.
24873 (vcmlaq_rot90_f32): Delete.
24874 (vcmlaq_m_f32): Delete.
24875 (vcmlaq_m_f16): Delete.
24876 (vcmlaq_rot180_m_f32): Delete.
24877 (vcmlaq_rot180_m_f16): Delete.
24878 (vcmlaq_rot270_m_f32): Delete.
24879 (vcmlaq_rot270_m_f16): Delete.
24880 (vcmlaq_rot90_m_f32): Delete.
24881 (vcmlaq_rot90_m_f16): Delete.
24882 (__arm_vcmlaq_f16): Delete.
24883 (__arm_vcmlaq_rot180_f16): Delete.
24884 (__arm_vcmlaq_rot270_f16): Delete.
24885 (__arm_vcmlaq_rot90_f16): Delete.
24886 (__arm_vcmlaq_f32): Delete.
24887 (__arm_vcmlaq_rot180_f32): Delete.
24888 (__arm_vcmlaq_rot270_f32): Delete.
24889 (__arm_vcmlaq_rot90_f32): Delete.
24890 (__arm_vcmlaq_m_f32): Delete.
24891 (__arm_vcmlaq_m_f16): Delete.
24892 (__arm_vcmlaq_rot180_m_f32): Delete.
24893 (__arm_vcmlaq_rot180_m_f16): Delete.
24894 (__arm_vcmlaq_rot270_m_f32): Delete.
24895 (__arm_vcmlaq_rot270_m_f16): Delete.
24896 (__arm_vcmlaq_rot90_m_f32): Delete.
24897 (__arm_vcmlaq_rot90_m_f16): Delete.
24898 (__arm_vcmlaq): Delete.
24899 (__arm_vcmlaq_rot180): Delete.
24900 (__arm_vcmlaq_rot270): Delete.
24901 (__arm_vcmlaq_rot90): Delete.
24902 (__arm_vcmlaq_m): Delete.
24903 (__arm_vcmlaq_rot180_m): Delete.
24904 (__arm_vcmlaq_rot270_m): Delete.
24905 (__arm_vcmlaq_rot90_m): Delete.
24907 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
24909 * config/arm/arm_mve_builtins.def (vcmlaq_rot90_f)
24910 (vcmlaq_rot270_f, vcmlaq_rot180_f, vcmlaq_f): Add "_f" suffix.
24911 * config/arm/iterators.md (MVE_VCMLAQ_M): New.
24912 (mve_insn): Add vcmla.
24913 (rot): Add VCMLAQ_M_F, VCMLAQ_ROT90_M_F, VCMLAQ_ROT180_M_F,
24915 (mve_rot): Add VCMLAQ_M_F, VCMLAQ_ROT90_M_F, VCMLAQ_ROT180_M_F,
24917 * config/arm/mve.md (mve_vcmlaq<mve_rot><mode>): Rename into ...
24918 (@mve_<mve_insn>q<mve_rot>_f<mode>): ... this.
24919 (mve_vcmlaq_m_f<mode>, mve_vcmlaq_rot180_m_f<mode>)
24920 (mve_vcmlaq_rot270_m_f<mode>, mve_vcmlaq_rot90_m_f<mode>): Merge
24922 (@mve_<mve_insn>q<mve_rot>_m_f<mode>): ... this.
24924 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
24926 * config/arm/arm-mve-builtins-base.cc (vcmulq, vcmulq_rot90)
24927 (vcmulq_rot180, vcmulq_rot270): New.
24928 * config/arm/arm-mve-builtins-base.def (vcmulq, vcmulq_rot90)
24929 (vcmulq_rot180, vcmulq_rot270): New.
24930 * config/arm/arm-mve-builtins-base.h: (vcmulq, vcmulq_rot90)
24931 (vcmulq_rot180, vcmulq_rot270): New.
24932 * config/arm/arm_mve.h (vcmulq_rot90): Delete.
24933 (vcmulq_rot270): Delete.
24934 (vcmulq_rot180): Delete.
24936 (vcmulq_m): Delete.
24937 (vcmulq_rot180_m): Delete.
24938 (vcmulq_rot270_m): Delete.
24939 (vcmulq_rot90_m): Delete.
24940 (vcmulq_x): Delete.
24941 (vcmulq_rot90_x): Delete.
24942 (vcmulq_rot180_x): Delete.
24943 (vcmulq_rot270_x): Delete.
24944 (vcmulq_rot90_f16): Delete.
24945 (vcmulq_rot270_f16): Delete.
24946 (vcmulq_rot180_f16): Delete.
24947 (vcmulq_f16): Delete.
24948 (vcmulq_rot90_f32): Delete.
24949 (vcmulq_rot270_f32): Delete.
24950 (vcmulq_rot180_f32): Delete.
24951 (vcmulq_f32): Delete.
24952 (vcmulq_m_f32): Delete.
24953 (vcmulq_m_f16): Delete.
24954 (vcmulq_rot180_m_f32): Delete.
24955 (vcmulq_rot180_m_f16): Delete.
24956 (vcmulq_rot270_m_f32): Delete.
24957 (vcmulq_rot270_m_f16): Delete.
24958 (vcmulq_rot90_m_f32): Delete.
24959 (vcmulq_rot90_m_f16): Delete.
24960 (vcmulq_x_f16): Delete.
24961 (vcmulq_x_f32): Delete.
24962 (vcmulq_rot90_x_f16): Delete.
24963 (vcmulq_rot90_x_f32): Delete.
24964 (vcmulq_rot180_x_f16): Delete.
24965 (vcmulq_rot180_x_f32): Delete.
24966 (vcmulq_rot270_x_f16): Delete.
24967 (vcmulq_rot270_x_f32): Delete.
24968 (__arm_vcmulq_rot90_f16): Delete.
24969 (__arm_vcmulq_rot270_f16): Delete.
24970 (__arm_vcmulq_rot180_f16): Delete.
24971 (__arm_vcmulq_f16): Delete.
24972 (__arm_vcmulq_rot90_f32): Delete.
24973 (__arm_vcmulq_rot270_f32): Delete.
24974 (__arm_vcmulq_rot180_f32): Delete.
24975 (__arm_vcmulq_f32): Delete.
24976 (__arm_vcmulq_m_f32): Delete.
24977 (__arm_vcmulq_m_f16): Delete.
24978 (__arm_vcmulq_rot180_m_f32): Delete.
24979 (__arm_vcmulq_rot180_m_f16): Delete.
24980 (__arm_vcmulq_rot270_m_f32): Delete.
24981 (__arm_vcmulq_rot270_m_f16): Delete.
24982 (__arm_vcmulq_rot90_m_f32): Delete.
24983 (__arm_vcmulq_rot90_m_f16): Delete.
24984 (__arm_vcmulq_x_f16): Delete.
24985 (__arm_vcmulq_x_f32): Delete.
24986 (__arm_vcmulq_rot90_x_f16): Delete.
24987 (__arm_vcmulq_rot90_x_f32): Delete.
24988 (__arm_vcmulq_rot180_x_f16): Delete.
24989 (__arm_vcmulq_rot180_x_f32): Delete.
24990 (__arm_vcmulq_rot270_x_f16): Delete.
24991 (__arm_vcmulq_rot270_x_f32): Delete.
24992 (__arm_vcmulq_rot90): Delete.
24993 (__arm_vcmulq_rot270): Delete.
24994 (__arm_vcmulq_rot180): Delete.
24995 (__arm_vcmulq): Delete.
24996 (__arm_vcmulq_m): Delete.
24997 (__arm_vcmulq_rot180_m): Delete.
24998 (__arm_vcmulq_rot270_m): Delete.
24999 (__arm_vcmulq_rot90_m): Delete.
25000 (__arm_vcmulq_x): Delete.
25001 (__arm_vcmulq_rot90_x): Delete.
25002 (__arm_vcmulq_rot180_x): Delete.
25003 (__arm_vcmulq_rot270_x): Delete.
25005 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
25007 * config/arm/arm_mve_builtins.def (vcmulq_rot90_f)
25008 (vcmulq_rot270_f, vcmulq_rot180_f, vcmulq_f): Add "_f" suffix.
25009 * config/arm/iterators.md (MVE_VCADDQ_VCMULQ)
25010 (MVE_VCADDQ_VCMULQ_M): New.
25011 (mve_insn): Add vcmul.
25012 (rot): Add VCMULQ_M_F, VCMULQ_ROT90_M_F, VCMULQ_ROT180_M_F,
25015 (mve_rot): Add VCMULQ_M_F, VCMULQ_ROT90_M_F, VCMULQ_ROT180_M_F,
25017 * config/arm/mve.md (mve_vcmulq<mve_rot><mode>): Merge into
25018 @mve_<mve_insn>q<mve_rot>_f<mode>.
25019 (mve_vcmulq_m_f<mode>, mve_vcmulq_rot180_m_f<mode>)
25020 (mve_vcmulq_rot270_m_f<mode>, mve_vcmulq_rot90_m_f<mode>): Merge
25021 into @mve_<mve_insn>q<mve_rot>_m_f<mode>.
25023 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
25025 * config/arm/arm-mve-builtins-base.cc (vcaddq_rot90)
25026 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
25027 * config/arm/arm-mve-builtins-base.def (vcaddq_rot90)
25028 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
25029 * config/arm/arm-mve-builtins-base.h: (vcaddq_rot90)
25030 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
25031 * config/arm/arm-mve-builtins-functions.h (class
25032 unspec_mve_function_exact_insn_rot): New.
25033 * config/arm/arm_mve.h (vcaddq_rot90): Delete.
25034 (vcaddq_rot270): Delete.
25035 (vhcaddq_rot90): Delete.
25036 (vhcaddq_rot270): Delete.
25037 (vcaddq_rot270_m): Delete.
25038 (vcaddq_rot90_m): Delete.
25039 (vhcaddq_rot270_m): Delete.
25040 (vhcaddq_rot90_m): Delete.
25041 (vcaddq_rot90_x): Delete.
25042 (vcaddq_rot270_x): Delete.
25043 (vhcaddq_rot90_x): Delete.
25044 (vhcaddq_rot270_x): Delete.
25045 (vcaddq_rot90_u8): Delete.
25046 (vcaddq_rot270_u8): Delete.
25047 (vhcaddq_rot90_s8): Delete.
25048 (vhcaddq_rot270_s8): Delete.
25049 (vcaddq_rot90_s8): Delete.
25050 (vcaddq_rot270_s8): Delete.
25051 (vcaddq_rot90_u16): Delete.
25052 (vcaddq_rot270_u16): Delete.
25053 (vhcaddq_rot90_s16): Delete.
25054 (vhcaddq_rot270_s16): Delete.
25055 (vcaddq_rot90_s16): Delete.
25056 (vcaddq_rot270_s16): Delete.
25057 (vcaddq_rot90_u32): Delete.
25058 (vcaddq_rot270_u32): Delete.
25059 (vhcaddq_rot90_s32): Delete.
25060 (vhcaddq_rot270_s32): Delete.
25061 (vcaddq_rot90_s32): Delete.
25062 (vcaddq_rot270_s32): Delete.
25063 (vcaddq_rot90_f16): Delete.
25064 (vcaddq_rot270_f16): Delete.
25065 (vcaddq_rot90_f32): Delete.
25066 (vcaddq_rot270_f32): Delete.
25067 (vcaddq_rot270_m_s8): Delete.
25068 (vcaddq_rot270_m_s32): Delete.
25069 (vcaddq_rot270_m_s16): Delete.
25070 (vcaddq_rot270_m_u8): Delete.
25071 (vcaddq_rot270_m_u32): Delete.
25072 (vcaddq_rot270_m_u16): Delete.
25073 (vcaddq_rot90_m_s8): Delete.
25074 (vcaddq_rot90_m_s32): Delete.
25075 (vcaddq_rot90_m_s16): Delete.
25076 (vcaddq_rot90_m_u8): Delete.
25077 (vcaddq_rot90_m_u32): Delete.
25078 (vcaddq_rot90_m_u16): Delete.
25079 (vhcaddq_rot270_m_s8): Delete.
25080 (vhcaddq_rot270_m_s32): Delete.
25081 (vhcaddq_rot270_m_s16): Delete.
25082 (vhcaddq_rot90_m_s8): Delete.
25083 (vhcaddq_rot90_m_s32): Delete.
25084 (vhcaddq_rot90_m_s16): Delete.
25085 (vcaddq_rot270_m_f32): Delete.
25086 (vcaddq_rot270_m_f16): Delete.
25087 (vcaddq_rot90_m_f32): Delete.
25088 (vcaddq_rot90_m_f16): Delete.
25089 (vcaddq_rot90_x_s8): Delete.
25090 (vcaddq_rot90_x_s16): Delete.
25091 (vcaddq_rot90_x_s32): Delete.
25092 (vcaddq_rot90_x_u8): Delete.
25093 (vcaddq_rot90_x_u16): Delete.
25094 (vcaddq_rot90_x_u32): Delete.
25095 (vcaddq_rot270_x_s8): Delete.
25096 (vcaddq_rot270_x_s16): Delete.
25097 (vcaddq_rot270_x_s32): Delete.
25098 (vcaddq_rot270_x_u8): Delete.
25099 (vcaddq_rot270_x_u16): Delete.
25100 (vcaddq_rot270_x_u32): Delete.
25101 (vhcaddq_rot90_x_s8): Delete.
25102 (vhcaddq_rot90_x_s16): Delete.
25103 (vhcaddq_rot90_x_s32): Delete.
25104 (vhcaddq_rot270_x_s8): Delete.
25105 (vhcaddq_rot270_x_s16): Delete.
25106 (vhcaddq_rot270_x_s32): Delete.
25107 (vcaddq_rot90_x_f16): Delete.
25108 (vcaddq_rot90_x_f32): Delete.
25109 (vcaddq_rot270_x_f16): Delete.
25110 (vcaddq_rot270_x_f32): Delete.
25111 (__arm_vcaddq_rot90_u8): Delete.
25112 (__arm_vcaddq_rot270_u8): Delete.
25113 (__arm_vhcaddq_rot90_s8): Delete.
25114 (__arm_vhcaddq_rot270_s8): Delete.
25115 (__arm_vcaddq_rot90_s8): Delete.
25116 (__arm_vcaddq_rot270_s8): Delete.
25117 (__arm_vcaddq_rot90_u16): Delete.
25118 (__arm_vcaddq_rot270_u16): Delete.
25119 (__arm_vhcaddq_rot90_s16): Delete.
25120 (__arm_vhcaddq_rot270_s16): Delete.
25121 (__arm_vcaddq_rot90_s16): Delete.
25122 (__arm_vcaddq_rot270_s16): Delete.
25123 (__arm_vcaddq_rot90_u32): Delete.
25124 (__arm_vcaddq_rot270_u32): Delete.
25125 (__arm_vhcaddq_rot90_s32): Delete.
25126 (__arm_vhcaddq_rot270_s32): Delete.
25127 (__arm_vcaddq_rot90_s32): Delete.
25128 (__arm_vcaddq_rot270_s32): Delete.
25129 (__arm_vcaddq_rot270_m_s8): Delete.
25130 (__arm_vcaddq_rot270_m_s32): Delete.
25131 (__arm_vcaddq_rot270_m_s16): Delete.
25132 (__arm_vcaddq_rot270_m_u8): Delete.
25133 (__arm_vcaddq_rot270_m_u32): Delete.
25134 (__arm_vcaddq_rot270_m_u16): Delete.
25135 (__arm_vcaddq_rot90_m_s8): Delete.
25136 (__arm_vcaddq_rot90_m_s32): Delete.
25137 (__arm_vcaddq_rot90_m_s16): Delete.
25138 (__arm_vcaddq_rot90_m_u8): Delete.
25139 (__arm_vcaddq_rot90_m_u32): Delete.
25140 (__arm_vcaddq_rot90_m_u16): Delete.
25141 (__arm_vhcaddq_rot270_m_s8): Delete.
25142 (__arm_vhcaddq_rot270_m_s32): Delete.
25143 (__arm_vhcaddq_rot270_m_s16): Delete.
25144 (__arm_vhcaddq_rot90_m_s8): Delete.
25145 (__arm_vhcaddq_rot90_m_s32): Delete.
25146 (__arm_vhcaddq_rot90_m_s16): Delete.
25147 (__arm_vcaddq_rot90_x_s8): Delete.
25148 (__arm_vcaddq_rot90_x_s16): Delete.
25149 (__arm_vcaddq_rot90_x_s32): Delete.
25150 (__arm_vcaddq_rot90_x_u8): Delete.
25151 (__arm_vcaddq_rot90_x_u16): Delete.
25152 (__arm_vcaddq_rot90_x_u32): Delete.
25153 (__arm_vcaddq_rot270_x_s8): Delete.
25154 (__arm_vcaddq_rot270_x_s16): Delete.
25155 (__arm_vcaddq_rot270_x_s32): Delete.
25156 (__arm_vcaddq_rot270_x_u8): Delete.
25157 (__arm_vcaddq_rot270_x_u16): Delete.
25158 (__arm_vcaddq_rot270_x_u32): Delete.
25159 (__arm_vhcaddq_rot90_x_s8): Delete.
25160 (__arm_vhcaddq_rot90_x_s16): Delete.
25161 (__arm_vhcaddq_rot90_x_s32): Delete.
25162 (__arm_vhcaddq_rot270_x_s8): Delete.
25163 (__arm_vhcaddq_rot270_x_s16): Delete.
25164 (__arm_vhcaddq_rot270_x_s32): Delete.
25165 (__arm_vcaddq_rot90_f16): Delete.
25166 (__arm_vcaddq_rot270_f16): Delete.
25167 (__arm_vcaddq_rot90_f32): Delete.
25168 (__arm_vcaddq_rot270_f32): Delete.
25169 (__arm_vcaddq_rot270_m_f32): Delete.
25170 (__arm_vcaddq_rot270_m_f16): Delete.
25171 (__arm_vcaddq_rot90_m_f32): Delete.
25172 (__arm_vcaddq_rot90_m_f16): Delete.
25173 (__arm_vcaddq_rot90_x_f16): Delete.
25174 (__arm_vcaddq_rot90_x_f32): Delete.
25175 (__arm_vcaddq_rot270_x_f16): Delete.
25176 (__arm_vcaddq_rot270_x_f32): Delete.
25177 (__arm_vcaddq_rot90): Delete.
25178 (__arm_vcaddq_rot270): Delete.
25179 (__arm_vhcaddq_rot90): Delete.
25180 (__arm_vhcaddq_rot270): Delete.
25181 (__arm_vcaddq_rot270_m): Delete.
25182 (__arm_vcaddq_rot90_m): Delete.
25183 (__arm_vhcaddq_rot270_m): Delete.
25184 (__arm_vhcaddq_rot90_m): Delete.
25185 (__arm_vcaddq_rot90_x): Delete.
25186 (__arm_vcaddq_rot270_x): Delete.
25187 (__arm_vhcaddq_rot90_x): Delete.
25188 (__arm_vhcaddq_rot270_x): Delete.
25190 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
25192 * config/arm/arm_mve_builtins.def (vcaddq_rot90_, vcaddq_rot270_)
25193 (vcaddq_rot90_f, vcaddq_rot90_f): Add "_" or "_f" suffix.
25194 * config/arm/iterators.md (mve_insn): Add vcadd, vhcadd.
25195 (isu): Add UNSPEC_VCADD90, UNSPEC_VCADD270, VCADDQ_ROT270_M_U,
25196 VCADDQ_ROT270_M_S, VCADDQ_ROT90_M_U, VCADDQ_ROT90_M_S,
25197 VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S, VHCADDQ_ROT90_S,
25199 (rot): Add VCADDQ_ROT90_M_F, VCADDQ_ROT90_M_S, VCADDQ_ROT90_M_U,
25200 VCADDQ_ROT270_M_F, VCADDQ_ROT270_M_S, VCADDQ_ROT270_M_U,
25201 VHCADDQ_ROT90_S, VHCADDQ_ROT270_S, VHCADDQ_ROT90_M_S,
25202 VHCADDQ_ROT270_M_S.
25203 (mve_rot): Add VCADDQ_ROT90_M_F, VCADDQ_ROT90_M_S,
25204 VCADDQ_ROT90_M_U, VCADDQ_ROT270_M_F, VCADDQ_ROT270_M_S,
25205 VCADDQ_ROT270_M_U, VHCADDQ_ROT90_S, VHCADDQ_ROT270_S,
25206 VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S.
25207 (supf): Add VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S,
25208 VHCADDQ_ROT90_S, VHCADDQ_ROT270_S, UNSPEC_VCADD90,
25210 (VCADDQ_ROT270_M): Delete.
25211 (VCADDQ_M_F VxCADDQ VxCADDQ_M): New.
25212 (VCADDQ_ROT90_M): Delete.
25213 * config/arm/mve.md (mve_vcaddq<mve_rot><mode>)
25214 (mve_vhcaddq_rot270_s<mode>, mve_vhcaddq_rot90_s<mode>): Merge
25216 (@mve_<mve_insn>q<mve_rot>_<supf><mode>): ... this.
25217 (mve_vcaddq<mve_rot><mode>): Rename into ...
25218 (@mve_<mve_insn>q<mve_rot>_f<mode>): ... this
25219 (mve_vcaddq_rot270_m_<supf><mode>)
25220 (mve_vcaddq_rot90_m_<supf><mode>, mve_vhcaddq_rot270_m_s<mode>)
25221 (mve_vhcaddq_rot90_m_s<mode>): Merge into ...
25222 (@mve_<mve_insn>q<mve_rot>_m_<supf><mode>): ... this.
25223 (mve_vcaddq_rot270_m_f<mode>, mve_vcaddq_rot90_m_f<mode>): Merge
25225 (@mve_<mve_insn>q<mve_rot>_m_f<mode>): ... this.
25227 2023-07-14 Roger Sayle <roger@nextmovesoftware.com>
25230 * config/i386/i386.md (*bt<mode>_setcqi): Prefer string form
25231 preparation statement over braces for a single statement.
25232 (*bt<mode>_setncqi): Likewise.
25233 (*bt<mode>_setncqi_2): New define_insn_and_split.
25235 2023-07-14 Roger Sayle <roger@nextmovesoftware.com>
25237 * config/i386/i386-expand.cc (ix86_expand_move): Generalize special
25238 case inserting of 64-bit values into a TImode register, to handle
25239 both DImode and DFmode using either *insvti_lowpart_1
25240 or *isnvti_highpart_1.
25242 2023-07-14 Uros Bizjak <ubizjak@gmail.com>
25245 * fwprop.cc (contains_paradoxical_subreg_p): Move to ...
25246 * rtlanal.cc (contains_paradoxical_subreg_p): ... here.
25247 * rtlanal.h (contains_paradoxical_subreg_p): Add prototype.
25248 * cprop.cc (try_replace_reg): Do not set REG_EQUAL note
25249 when the original source contains a paradoxical subreg.
25251 2023-07-14 Jan Hubicka <jh@suse.cz>
25253 * passes.cc (execute_function_todo): Remove
25254 TODO_rebuild_frequencies
25255 * passes.def: Add rebuild_frequencies pass.
25256 * predict.cc (estimate_bb_frequencies): Drop
25258 (tree_estimate_probability): Update call of
25259 estimate_bb_frequencies.
25260 (rebuild_frequencies): Turn into a pass; verify CFG profile consistency
25261 first and do not rebuild if not necessary.
25262 (class pass_rebuild_frequencies): New.
25263 (make_pass_rebuild_frequencies): New.
25264 * profile-count.h: Add profile_count::very_large_p.
25265 * tree-inline.cc (optimize_inline_calls): Do not return
25266 TODO_rebuild_frequencies
25267 * tree-pass.h (TODO_rebuild_frequencies): Remove.
25268 (make_pass_rebuild_frequencies): Declare.
25270 2023-07-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25272 * config/riscv/autovec.md (cond_len_fma<mode>): New pattern.
25273 * config/riscv/riscv-protos.h (enum insn_type): New enum.
25274 (expand_cond_len_ternop): New function.
25275 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_ternary_tu_insn): Ditto.
25276 (expand_cond_len_ternop): Ditto.
25278 2023-07-14 Jose E. Marchesi <jose.marchesi@oracle.com>
25281 * config/bpf/bpf.md: Enable instruction scheduling.
25283 2023-07-14 Tamar Christina <tamar.christina@arm.com>
25285 PR tree-optimization/109154
25286 * tree-if-conv.cc (INCLUDE_ALGORITHM): Include.
25287 (struct bb_predicate): Add no_predicate_stmts.
25288 (set_bb_predicate): Increase predicate count.
25289 (set_bb_predicate_gimplified_stmts): Conditionally initialize
25290 no_predicate_stmts.
25291 (get_bb_num_predicate_stmts): New.
25292 (init_bb_predicate): Initialzie no_predicate_stmts.
25293 (release_bb_predicate): Cleanup no_predicate_stmts.
25294 (insert_gimplified_predicates): Preserve no_predicate_stmts.
25296 2023-07-14 Tamar Christina <tamar.christina@arm.com>
25298 PR tree-optimization/109154
25299 * tree-if-conv.cc (gen_simplified_condition,
25300 gen_phi_nest_statement): New.
25301 (gen_phi_arg_condition, predicate_scalar_phi): Use it.
25303 2023-07-14 Richard Biener <rguenther@suse.de>
25305 * gimple.h (gimple_phi_arg): New const overload.
25306 (gimple_phi_arg_def): Make gimple arg const.
25307 (gimple_phi_arg_def_from_edge): New inline function.
25308 * tree-phinodes.h (gimple_phi_arg_imm_use_ptr_from_edge):
25310 * tree-ssa-operands.h (PHI_ARG_DEF_FROM_EDGE): Direct to
25311 new inline function.
25312 (PHI_ARG_DEF_PTR_FROM_EDGE): Likewise.
25314 2023-07-14 Monk Chiang <monk.chiang@sifive.com>
25316 * common/config/riscv/riscv-common.cc:
25317 (riscv_implied_info): Add zihintntl item.
25318 (riscv_ext_version_table): Ditto.
25319 (riscv_ext_flag_table): Ditto.
25320 * config/riscv/riscv-opts.h (MASK_ZIHINTNTL): New macro.
25321 (TARGET_ZIHINTNTL): Ditto.
25323 2023-07-14 Die Li <lidie@eswincomputing.com>
25325 * config/riscv/riscv.md: Remove redundant portion in and<mode>3.
25327 2023-07-14 Oleg Endo <olegendo@gcc.gnu.org>
25330 * config/sh/sh.md (peephole2): Handle case where eliminated reg is also
25331 used by the address of the following memory operand.
25333 2023-07-13 Mikael Pettersson <mikpelinux@gmail.com>
25336 * config/pdp11/pdp11.cc (pdp11_expand_epilogue): Also
25337 deallocate alloca-only frame.
25339 2023-07-13 Iain Sandoe <iain@sandoe.co.uk>
25342 * config/darwin.h (DARWIN_PLATFORM_ID): New.
25343 (LINK_COMMAND_A): Use DARWIN_PLATFORM_ID to pass OS, OS version
25344 and SDK data to the static linker.
25346 2023-07-13 Carl Love <cel@us.ibm.com>
25348 * config/rs6000/rs6000-builtins.def (__builtin_set_fpscr_rn): Update
25349 built-in definition return type.
25350 * config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Add check,
25351 define __SET_FPSCR_RN_RETURNS_FPSCR__ macro.
25352 * config/rs6000/rs6000.md (rs6000_set_fpscr_rn): Add return
25353 argument to return FPSCR fields.
25354 * doc/extend.texi (__builtin_set_fpscr_rn): Update description for
25355 the return value. Add description for
25356 __SET_FPSCR_RN_RETURNS_FPSCR__ macro.
25358 2023-07-13 Uros Bizjak <ubizjak@gmail.com>
25361 * config/alpha/alpha.cc (alpha_emit_set_long_const):
25362 Always use DImode when constructing long const.
25364 2023-07-13 Uros Bizjak <ubizjak@gmail.com>
25366 * haifa-sched.cc: Change TRUE/FALSE to true/false.
25368 * lra-assigns.cc: Ditto.
25369 * lra-constraints.cc: Ditto.
25370 * sel-sched.cc: Ditto.
25372 2023-07-13 Andrew Pinski <apinski@marvell.com>
25374 PR tree-optimization/110293
25375 PR tree-optimization/110539
25376 * match.pd: Expand the `x != (typeof x)(x == 0)`
25377 pattern to handle where the inner and outer comparsions
25378 are either `!=` or `==` and handle other constants
25381 2023-07-13 Vladimir N. Makarov <vmakarov@redhat.com>
25383 PR middle-end/109520
25384 * lra-int.h (lra_insn_recog_data): Add member asm_reloads_num.
25385 (lra_asm_insn_error): New prototype.
25386 * lra.cc: Include rtl_error.h.
25387 (lra_set_insn_recog_data): Initialize asm_reloads_num.
25388 (lra_asm_insn_error): New func whose code is taken from ...
25389 * lra-assigns.cc (lra_split_hard_reg_for): ... here. Use lra_asm_insn_error.
25390 * lra-constraints.cc (curr_insn_transform): Check reloads nummber for asm.
25392 2023-07-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
25394 * genmatch.cc (commutative_op): Add COND_LEN_*
25395 * internal-fn.cc (first_commutative_argument): Ditto.
25397 (get_unconditional_internal_fn): Ditto.
25398 (can_interpret_as_conditional_op_p): Ditto.
25399 (internal_fn_len_index): Ditto.
25400 * internal-fn.h (can_interpret_as_conditional_op_p): Ditt.
25401 * tree-ssa-math-opts.cc (convert_mult_to_fma_1): Ditto.
25402 (convert_mult_to_fma): Ditto.
25403 (math_opts_dom_walker::after_dom_children): Ditto.
25405 2023-07-13 Pan Li <pan2.li@intel.com>
25407 * config/riscv/riscv.cc (vxrm_rtx): New static var.
25409 (global_state_unknown_p): Removed.
25410 (riscv_entity_mode_after): Removed.
25411 (asm_insn_p): New function.
25412 (vxrm_unknown_p): New function for fixed-point.
25413 (riscv_vxrm_mode_after): Ditto.
25414 (frm_unknown_dynamic_p): New function for floating-point.
25415 (riscv_frm_mode_after): Ditto.
25416 (riscv_mode_after): Leverage new functions.
25418 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
25420 * tree-vect-stmts.cc (vect_model_load_cost): Remove.
25421 (vectorizable_load): Adjust the cost handling on VMAT_CONTIGUOUS without
25422 calling vect_model_load_cost.
25424 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
25426 * tree-vect-stmts.cc (vect_model_load_cost): Assert this function only
25427 handle memory_access_type VMAT_CONTIGUOUS, remove some
25428 VMAT_CONTIGUOUS_PERMUTE related handlings.
25429 (vectorizable_load): Adjust the cost handling on VMAT_CONTIGUOUS_PERMUTE
25430 without calling vect_model_load_cost.
25432 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
25434 * tree-vect-stmts.cc (vect_model_load_cost): Assert it won't get
25435 VMAT_CONTIGUOUS_REVERSE any more.
25436 (vectorizable_load): Adjust the costing handling on
25437 VMAT_CONTIGUOUS_REVERSE without calling vect_model_load_cost.
25439 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
25441 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling on
25442 VMAT_LOAD_STORE_LANES without calling vect_model_load_cost.
25443 (vectorizable_load): Remove VMAT_LOAD_STORE_LANES related handling and
25444 assert it will never get VMAT_LOAD_STORE_LANES.
25446 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
25448 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling on
25449 VMAT_GATHER_SCATTER without calling vect_model_load_cost.
25450 (vect_model_load_cost): Adjut the assertion on VMAT_GATHER_SCATTER,
25451 remove VMAT_GATHER_SCATTER related handlings and the related parameter
25454 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
25456 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling
25457 on VMAT_ELEMENTWISE and VMAT_STRIDED_SLP without calling
25458 vect_model_load_cost.
25459 (vect_model_load_cost): Assert it won't get VMAT_ELEMENTWISE and
25460 VMAT_STRIDED_SLP any more, and remove their related handlings.
25462 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
25464 * tree-vect-stmts.cc (hoist_defs_of_uses): Add one argument HOIST_P.
25465 (vectorizable_load): Adjust the handling on VMAT_INVARIANT to respect
25466 hoisting decision and without calling vect_model_load_cost.
25467 (vect_model_load_cost): Assert it won't get VMAT_INVARIANT any more
25468 and remove VMAT_INVARIANT related handlings.
25470 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
25472 * tree-vect-stmts.cc (vect_build_gather_load_calls): Add the handlings
25473 on costing with one extra argument cost_vec.
25474 (vectorizable_load): Adjust the call to vect_build_gather_load_calls.
25475 (vect_model_load_cost): Assert it won't get VMAT_GATHER_SCATTER with
25476 gs_info.decl set any more.
25478 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
25480 * tree-vect-stmts.cc (vectorizable_load): Move and duplicate the call
25481 to vect_model_load_cost down to some different transform paths
25482 according to the handlings of different vect_memory_access_types.
25484 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
25486 * tree.h (wi::from_mpz): Hide from GENERATOR_FILE.
25488 2023-07-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
25490 * config/riscv/autovec.md
25491 (len_mask_gather_load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): New pattern.
25492 (len_mask_gather_load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
25493 (len_mask_gather_load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
25494 (len_mask_gather_load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
25495 (len_mask_gather_load<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
25496 (len_mask_gather_load<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
25497 (len_mask_gather_load<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
25498 (len_mask_gather_load<mode><mode>): Ditto.
25499 (len_mask_scatter_store<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Ditto.
25500 (len_mask_scatter_store<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
25501 (len_mask_scatter_store<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
25502 (len_mask_scatter_store<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
25503 (len_mask_scatter_store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
25504 (len_mask_scatter_store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
25505 (len_mask_scatter_store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
25506 (len_mask_scatter_store<mode><mode>): Ditto.
25507 * config/riscv/predicates.md (const_1_operand): New predicate.
25508 (vector_gs_scale_operand_16): Ditto.
25509 (vector_gs_scale_operand_32): Ditto.
25510 (vector_gs_scale_operand_64): Ditto.
25511 (vector_gs_extension_operand): Ditto.
25512 (vector_gs_scale_operand_16_rv32): Ditto.
25513 (vector_gs_scale_operand_32_rv32): Ditto.
25514 * config/riscv/riscv-protos.h (enum insn_type): Add gather/scatter.
25515 (expand_gather_scatter): New function.
25516 * config/riscv/riscv-v.cc (gen_const_vector_dup): Add gather/scatter.
25517 (emit_vlmax_masked_store_insn): New function.
25518 (emit_nonvlmax_masked_store_insn): Ditto.
25519 (modulo_sel_indices): Ditto.
25520 (expand_vec_perm): Fix SLP for gather/scatter.
25521 (prepare_gather_scatter): New function.
25522 (expand_gather_scatter): Ditto.
25523 * config/riscv/riscv.cc (riscv_legitimize_move): Fix bug of
25524 (subreg:SI (DI CONST_POLY_INT)).
25525 * config/riscv/vector-iterators.md: Add gather/scatter.
25526 * config/riscv/vector.md (vec_duplicate<mode>): Use "@" instead.
25527 (@vec_duplicate<mode>): Ditto.
25528 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSDI:mode>):
25530 (@pred_indexed_<order>store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
25532 2023-07-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25534 * config/riscv/autovec.md (cond_len_<optab><mode>): New pattern.
25535 * config/riscv/riscv-protos.h (enum insn_type): New enum.
25536 (expand_cond_len_binop): New function.
25537 * config/riscv/riscv-v.cc (emit_nonvlmax_tu_insn): Ditto.
25538 (emit_nonvlmax_fp_tu_insn): Ditto.
25539 (need_fp_rounding_p): Ditto.
25540 (expand_cond_len_binop): Ditto.
25541 * config/riscv/riscv.cc (riscv_preferred_else_value): Ditto.
25542 (TARGET_PREFERRED_ELSE_VALUE): New target hook.
25544 2023-07-12 Jan Hubicka <jh@suse.cz>
25546 * tree-cfg.cc (gimple_duplicate_sese_region): Rename to ...
25547 (gimple_duplicate_seme_region): ... this; break out profile updating
25549 * tree-ssa-loop-ch.cc (update_profile_after_ch): ... here.
25550 (ch_base::copy_headers): Update.
25551 * tree-cfg.h (gimple_duplicate_sese_region): Rename to ...
25552 (gimple_duplicate_seme_region): ... this.
25554 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
25556 PR tree-optimization/107043
25557 * range-op.cc (operator_bitwise_and::op1_range): Update bitmask.
25559 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
25561 PR tree-optimization/107053
25562 * gimple-range-op.cc (cfn_popcount): Use known set bits.
25564 2023-07-12 Uros Bizjak <ubizjak@gmail.com>
25566 * ira.cc (equiv_init_varies_p): Change return type from int to bool
25567 and adjust function body accordingly.
25568 (equiv_init_movable_p): Ditto.
25569 (memref_used_between_p): Ditto.
25570 * lra-constraints.cc (valid_address_p): Ditto.
25572 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
25574 * range-op.cc (irange_to_masked_value): Remove.
25575 (update_known_bitmask): Update irange value/mask pair instead of
25576 only updating nonzero bits.
25578 2023-07-12 Jan Hubicka <jh@suse.cz>
25580 * tree-cfg.cc (gimple_duplicate_sese_region): Add ORIG_ELIMINATED_EDGES
25581 parameter and rewrite profile updating code to handle edges elimination.
25582 * tree-cfg.h (gimple_duplicate_sese_region): Update prototpe.
25583 * tree-ssa-loop-ch.cc (loop_invariant_op_p): New function.
25584 (loop_iv_derived_p): New function.
25585 (should_duplicate_loop_header_p): Track invariant exit edges; fix handling
25586 of PHIs and propagation of IV derived variables.
25587 (ch_base::copy_headers): Pass around the invariant edges hash set.
25589 2023-07-12 Uros Bizjak <ubizjak@gmail.com>
25591 * ifcvt.cc (cond_exec_changed_p): Change variable to bool.
25592 (last_active_insn): Change "skip_use_p" function argument to bool.
25593 (noce_operand_ok): Change return type from int to bool.
25594 (find_cond_trap): Ditto.
25595 (block_jumps_and_fallthru_p): Change "fallthru_p" and
25596 "jump_p" variables to bool.
25597 (noce_find_if_block): Change return type from int to bool.
25598 (cond_exec_find_if_block): Ditto.
25599 (find_if_case_1): Ditto.
25600 (find_if_case_2): Ditto.
25601 (dead_or_predicable): Ditto. Change "reversep" function arg to bool.
25602 (block_jumps_and_fallthru): Rename from block_jumps_and_fallthru_p.
25603 (cond_exec_process_insns): Change return type from int to bool.
25604 Change "mod_ok" function arg to bool.
25605 (cond_exec_process_if_block): Change return type from int to bool.
25606 Change "do_multiple_p" function arg to bool. Change "then_mod_ok"
25608 (noce_emit_store_flag): Change return type from int to bool.
25609 Change "reversep" function arg to bool. Change "cond_complex"
25611 (noce_try_move): Change return type from int to bool.
25612 (noce_try_ifelse_collapse): Ditto.
25613 (noce_try_store_flag): Ditto. Change "reversep" variable to bool.
25614 (noce_try_addcc): Change return type from int to bool. Change
25615 "subtract" variable to bool.
25616 (noce_try_store_flag_constants): Change return type from int to bool.
25617 (noce_try_store_flag_mask): Ditto. Change "reversep" variable to bool.
25618 (noce_try_cmove): Change return type from int to bool.
25619 (noce_try_cmove_arith): Ditto. Change "is_mem" variable to bool.
25620 (noce_try_minmax): Change return type from int to bool. Change
25621 "unsignedp" variable to bool.
25622 (noce_try_abs): Change return type from int to bool. Change
25623 "negate" variable to bool.
25624 (noce_try_sign_mask): Change return type from int to bool.
25625 (noce_try_move): Ditto.
25626 (noce_try_store_flag_constants): Ditto.
25627 (noce_try_cmove): Ditto.
25628 (noce_try_cmove_arith): Ditto.
25629 (noce_try_minmax): Ditto. Change "unsignedp" variable to bool.
25630 (noce_try_bitop): Change return type from int to bool.
25631 (noce_operand_ok): Ditto.
25632 (noce_convert_multiple_sets): Ditto.
25633 (noce_convert_multiple_sets_1): Ditto.
25634 (noce_process_if_block): Ditto.
25635 (check_cond_move_block): Ditto.
25636 (cond_move_process_if_block): Ditto. Change "success_p"
25638 (rest_of_handle_if_conversion): Change return type to void.
25640 2023-07-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
25642 * internal-fn.cc (FOR_EACH_CODE_MAPPING): Adapt for COND_LEN_* support.
25644 (get_conditional_len_internal_fn): New function.
25645 * internal-fn.h (get_conditional_len_internal_fn): Ditto.
25646 * tree-vect-stmts.cc (vectorizable_operation): Adapt for COND_LEN_*
25649 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
25652 * config/i386/i386.md (*add<dwi>3_doubleword_concat_zext): Typo.
25654 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
25657 * config/i386/i386.md (*add<dwi>3_doubleword_concat_zext): New
25658 define_insn_and_split derived from *add<dwi>3_doubleword_concat
25659 and *add<dwi>3_doubleword_zext.
25661 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
25664 * config/i386/i386.md (peephole2): Check !reg_mentioned_p when
25665 optimizing rega = 0; rega op= regb for op in [XOR,IOR,PLUS].
25666 (peephole2): Simplify rega = 0; rega op= rega cases.
25668 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
25670 * config/i386/i386-expand.cc (ix86_expand_int_compare): If
25671 testing a TImode SUBREG of a 128-bit vector register against
25672 zero, use a PTEST instruction instead of first moving it to
25673 a pair of scalar registers.
25675 2023-07-12 Robin Dapp <rdapp@ventanamicro.com>
25677 * genopinit.cc (main): Adjust maximal number of optabs and
25679 * gensupport.cc (find_optab): Shift optab by 20 and mode by
25681 * optabs-query.h (optab_handler): Ditto.
25682 (convert_optab_handler): Ditto.
25684 2023-07-12 Richard Biener <rguenther@suse.de>
25686 PR tree-optimization/110630
25687 * tree-vect-slp.cc (vect_add_slp_permutation): New
25688 offset parameter, honor that for the extract code generation.
25689 (vectorizable_slp_permutation_1): Handle offsetted identities.
25691 2023-07-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
25693 * config/riscv/autovec.md (smul<mode>3_highpart): New pattern.
25694 (umul<mode>3_highpart): Ditto.
25696 2023-07-12 Jan Beulich <jbeulich@suse.com>
25698 * config/i386/i386.md (extendbfsf2_1): Add new AVX512F
25699 alternative. Adjust original last alternative's "prefix"
25700 attribute to maybe_evex.
25702 2023-07-12 Jan Beulich <jbeulich@suse.com>
25704 * config/i386/sse.md (vec_dupv4sf): Make first alternative use
25705 vbroadcastss for AVX2. New AVX512F alternative.
25706 (*vec_dupv4si): New AVX2 and AVX512F alternatives using
25707 vpbroadcastd. Replace sselog1 by sseshuf1 in "type" attribute.
25709 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
25711 * config/riscv/peephole.md: Remove XThead* peephole passes.
25712 * config/riscv/thead.md: Include thead-peephole.md.
25713 * config/riscv/thead-peephole.md: New file.
25715 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
25717 * config/riscv/riscv-protos.h (riscv_regno_ok_for_index_p):
25719 (riscv_index_reg_class): Likewise.
25720 * config/riscv/riscv.cc (riscv_regno_ok_for_index_p): New function.
25721 (riscv_index_reg_class): New function.
25722 * config/riscv/riscv.h (INDEX_REG_CLASS): Call new function
25723 riscv_index_reg_class().
25724 (REGNO_OK_FOR_INDEX_P): Call new function
25725 riscv_regno_ok_for_index_p().
25727 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
25729 * config/riscv/riscv-protos.h (enum riscv_address_type):
25730 New location of type definition.
25731 (struct riscv_address_info): Likewise.
25732 * config/riscv/riscv.cc (enum riscv_address_type):
25733 Old location of type definition.
25734 (struct riscv_address_info): Likewise.
25736 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
25738 * config/riscv/riscv.h (Xmode): New macro.
25740 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
25742 * config/riscv/riscv.cc (riscv_print_operand_address): Use
25743 output_addr_const rather than riscv_print_operand.
25745 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
25747 * config/riscv/thead.md: Adjust constraints of th_addsl.
25749 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
25751 * config/riscv/thead.cc (th_mempair_operands_p):
25752 Fix documentation of th_mempair_order_operands().
25754 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
25756 * config/riscv/thead.cc (th_mempair_save_regs):
25757 Emit REG_FRAME_RELATED_EXPR notes in prologue.
25759 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
25761 * config/riscv/riscv.md: No base-ISA extension splitter for XThead*.
25762 * config/riscv/thead.md (*extend<SHORT:mode><SUPERQI:mode>2_th_ext):
25763 New XThead extension INSN.
25764 (*zero_extendsidi2_th_extu): New XThead extension INSN.
25765 (*zero_extendhi<GPR:mode>2_th_extu): New XThead extension INSN.
25767 2023-07-12 liuhongt <hongtao.liu@intel.com>
25771 * config/i386/predicates.md
25772 (int_float_vector_all_ones_operand): New predicate.
25773 * config/i386/sse.md (*vmov<mode>_constm1_pternlog_false_dep): New
25775 (*<avx512>_cvtmask2<ssemodesuffix><mode>_pternlog_false_dep):
25777 (*<avx512>_cvtmask2<ssemodesuffix><mode>_pternlog_false_dep):
25779 (*<avx512>_cvtmask2<ssemodesuffix><mode>): Adjust to
25780 define_insn_and_split to avoid false dependence.
25781 (*<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
25782 (<mask_codefor>one_cmpl<mode>2<mask_name>): Adjust constraint
25783 of operands 1 to '0' to avoid false dependence.
25784 (*andnot<mode>3): Ditto.
25785 (iornot<mode>3): Ditto.
25786 (*<nlogic><mode>3): Ditto.
25788 2023-07-12 Mo, Zewei <zewei.mo@intel.com>
25790 * common/config/i386/cpuinfo.h
25791 (get_intel_cpu): Handle Granite Rapids D.
25792 * common/config/i386/i386-common.cc:
25793 (processor_alias_table): Add graniterapids-d.
25794 * common/config/i386/i386-cpuinfo.h
25795 (enum processor_subtypes): Add INTEL_COREI7_GRANITERAPIDS_D.
25796 * config.gcc: Add -march=graniterapids-d.
25797 * config/i386/driver-i386.cc (host_detect_local_cpu):
25798 Handle graniterapids-d.
25799 * config/i386/i386.h: (PTA_GRANITERAPIDS_D): New.
25800 * doc/extend.texi: Add graniterapids-d.
25801 * doc/invoke.texi: Ditto.
25803 2023-07-12 Haochen Jiang <haochen.jiang@intel.com>
25805 * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
25806 Add OPTION_MASK_ISA_AVX512VL.
25807 * config/i386/i386-expand.cc (ix86_check_builtin_isa_match):
25810 2023-07-11 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
25812 * config/riscv/riscv-protos.h (enum insn_type): Add vcompress optimization.
25813 * config/riscv/riscv-v.cc (emit_vlmax_compress_insn): Ditto.
25814 (shuffle_compress_patterns): Ditto.
25815 (expand_vec_perm_const_1): Ditto.
25817 2023-07-11 Uros Bizjak <ubizjak@gmail.com>
25819 * cfghooks.cc (verify_flow_info): Change "err" variable to bool.
25820 * cfghooks.h (struct cfg_hooks): Change return type of
25821 verify_flow_info from integer to bool.
25822 * cfgrtl.cc (can_delete_note_p): Change return type from int to bool.
25823 (can_delete_label_p): Ditto.
25824 (rtl_verify_flow_info): Change return type from int to bool
25825 and adjust function body accordingly. Change "err" variable to bool.
25826 (rtl_verify_flow_info_1): Ditto.
25827 (free_bb_for_insn): Change return type to void.
25828 (rtl_merge_blocks): Change "b_empty" variable to bool.
25829 (try_redirect_by_replacing_jump): Change "fallthru" variable to bool.
25830 (verify_hot_cold_block_grouping): Change return type from int to bool.
25831 Change "err" variable to bool.
25832 (rtl_verify_edges): Ditto.
25833 (rtl_verify_bb_insns): Ditto.
25834 (rtl_verify_bb_pointers): Ditto.
25835 (rtl_verify_bb_insn_chain): Ditto.
25836 (rtl_verify_fallthru): Ditto.
25837 (rtl_verify_bb_layout): Ditto.
25838 (purge_all_dead_edges): Change "purged" variable to bool.
25839 * cfgrtl.h (free_bb_for_insn): Change return type from int to void.
25840 * postreload-gcse.cc (expr_hasher::equal): Change "equiv_p" to bool.
25841 (load_killed_in_block_p): Change return type from int to bool
25842 and adjust function body accordingly.
25843 (oprs_unchanged_p): Return true/false.
25844 (rest_of_handle_gcse2): Change return type to void.
25845 * tree-cfg.cc (gimple_verify_flow_info): Change return type from
25846 int to bool. Change "err" variable to bool.
25848 2023-07-11 Gaius Mulley <gaiusmod2@gmail.com>
25850 * doc/gm2.texi (-Wuninit-variable-checking=) New item.
25852 2023-07-11 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
25854 * doc/md.texi: Add COND_LEN_* operations for loop control with length.
25855 * internal-fn.cc (cond_len_unary_direct): Ditto.
25856 (cond_len_binary_direct): Ditto.
25857 (cond_len_ternary_direct): Ditto.
25858 (expand_cond_len_unary_optab_fn): Ditto.
25859 (expand_cond_len_binary_optab_fn): Ditto.
25860 (expand_cond_len_ternary_optab_fn): Ditto.
25861 (direct_cond_len_unary_optab_supported_p): Ditto.
25862 (direct_cond_len_binary_optab_supported_p): Ditto.
25863 (direct_cond_len_ternary_optab_supported_p): Ditto.
25864 * internal-fn.def (COND_LEN_ADD): Ditto.
25865 (COND_LEN_SUB): Ditto.
25866 (COND_LEN_MUL): Ditto.
25867 (COND_LEN_DIV): Ditto.
25868 (COND_LEN_MOD): Ditto.
25869 (COND_LEN_RDIV): Ditto.
25870 (COND_LEN_MIN): Ditto.
25871 (COND_LEN_MAX): Ditto.
25872 (COND_LEN_FMIN): Ditto.
25873 (COND_LEN_FMAX): Ditto.
25874 (COND_LEN_AND): Ditto.
25875 (COND_LEN_IOR): Ditto.
25876 (COND_LEN_XOR): Ditto.
25877 (COND_LEN_SHL): Ditto.
25878 (COND_LEN_SHR): Ditto.
25879 (COND_LEN_FMA): Ditto.
25880 (COND_LEN_FMS): Ditto.
25881 (COND_LEN_FNMA): Ditto.
25882 (COND_LEN_FNMS): Ditto.
25883 (COND_LEN_NEG): Ditto.
25884 * optabs.def (OPTAB_D): Ditto.
25886 2023-07-11 Richard Biener <rguenther@suse.de>
25888 PR tree-optimization/110614
25889 * tree-vect-data-refs.cc (vect_supportable_dr_alignment):
25890 SLP splats are not suitable for re-align ops.
25892 2023-07-10 Peter Bergner <bergner@linux.ibm.com>
25894 * config/rs6000/predicates.md (quad_memory_operand): Remove redundant
25896 (vsx_quad_dform_memory_operand): Likewise.
25898 2023-07-10 Uros Bizjak <ubizjak@gmail.com>
25900 * reorg.cc (stop_search_p): Change return type from int to bool
25901 and adjust function body accordingly.
25902 (resource_conflicts_p): Ditto.
25903 (insn_references_resource_p): Change return type from int to bool.
25904 (insn_sets_resource_p): Ditto.
25905 (redirect_with_delay_slots_safe_p): Ditto.
25906 (condition_dominates_p): Change return type from int to bool
25907 and adjust function body accordingly.
25908 (redirect_with_delay_list_safe_p): Ditto.
25909 (check_annul_list_true_false): Ditto. Change "annul_true_p"
25910 function argument to bool.
25911 (steal_delay_list_from_target): Change "pannul_p" function
25912 argument to bool pointer. Change "must_annul" and "used_annul"
25913 variables from int to bool.
25914 (steal_delay_list_from_fallthrough): Ditto.
25915 (own_thread_p): Change return type from int to bool and adjust
25916 function body accordingly. Change "allow_fallthrough" function
25918 (reorg_redirect_jump): Change return type from int to bool.
25919 (fill_simple_delay_slots): Change "non_jumps_p" function
25920 argument from int to bool. Change "maybe_never" varible to bool.
25921 (fill_slots_from_thread): Change "likely", "thread_if_true" and
25922 "own_thread" function arguments to bool. Change "lose" and
25923 "must_annul" variables to bool.
25924 (delete_from_delay_slot): Change "had_barrier" variable to bool.
25925 (try_merge_delay_insns): Change "annul_p" variable to bool.
25926 (fill_eager_delay_slots): Change "own_target" and "own_fallthrouhg"
25928 (rest_of_handle_delay_slots): Change return type from int to void
25929 and adjust function body accordingly.
25931 2023-07-10 Kito Cheng <kito.cheng@sifive.com>
25933 * doc/extend.texi (RISC-V Operand Modifiers): New.
25935 2023-07-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
25937 * config/riscv/riscv-vsetvl.cc (add_label_notes): Remove it.
25938 (insert_insn_end_basic_block): Ditto.
25939 (pass_vsetvl::commit_vsetvls): Adapt for new helper function.
25940 * gcse.cc (insert_insn_end_basic_block): Export as global function.
25941 * gcse.h (insert_insn_end_basic_block): Ditto.
25943 2023-07-10 Christophe Lyon <christophe.lyon@linaro.org>
25946 * config/arm/arm-builtins.cc (arm_init_mve_builtins): Handle LTO.
25947 (arm_builtin_decl): Hahndle MVE builtins.
25948 * config/arm/arm-mve-builtins.cc (builtin_decl): New function.
25949 (add_unique_function): Fix handling of
25950 __ARM_MVE_PRESERVE_USER_NAMESPACE.
25951 (add_overloaded_function): Likewise.
25952 * config/arm/arm-protos.h (builtin_decl): New declaration.
25954 2023-07-10 Christophe Lyon <christophe.lyon@linaro.org>
25956 * doc/sourcebuild.texi (arm_v8_1m_main_cde_mve_fp): Document.
25958 2023-07-10 Xi Ruoyao <xry111@xry111.site>
25960 PR tree-optimization/110557
25961 * tree-vect-patterns.cc (vect_recog_bitfield_ref_pattern):
25962 Ensure the output sign-extended if necessary.
25964 2023-07-10 Roger Sayle <roger@nextmovesoftware.com>
25966 * config/i386/i386.md (peephole2): Transform xchg insn with a
25967 REG_UNUSED note to a (simple) move.
25968 (*insvti_lowpart_1): New define_insn_and_split.
25969 (*insvdi_lowpart_1): Likewise.
25971 2023-07-10 Roger Sayle <roger@nextmovesoftware.com>
25973 * config/i386/i386-features.cc (compute_convert_gain): Tweak
25974 gains/costs for ROTATE/ROTATERT by integer constant on AVX512VL.
25975 (general_scalar_chain::convert_rotate): On TARGET_AVX512F generate
25976 avx512vl_rolv2di or avx412vl_rolv4si when appropriate.
25978 2023-07-10 liuhongt <hongtao.liu@intel.com>
25981 * config/i386/i386.md (*ieee_max<mode>3_1): New pre_reload
25982 splitter to detect fp max pattern.
25983 (*ieee_min<mode>3_1): Ditto, but for fp min pattern.
25985 2023-07-09 Jan Hubicka <jh@suse.cz>
25987 * cfg.cc (check_bb_profile): Dump counts with relative frequency.
25988 (dump_edge_info): Likewise.
25989 (dump_bb_info): Likewise.
25990 * profile-count.cc (profile_count::dump): Add comma between quality and
25993 2023-07-08 Jan Hubicka <jh@suse.cz>
25995 PR tree-optimization/110600
25996 * cfgloopmanip.cc (scale_loop_profile): Add mising profile_dump check.
25998 2023-07-08 Jan Hubicka <jh@suse.cz>
26000 PR middle-end/110590
26001 * cfgloopmanip.cc (scale_loop_profile): Avoid scaling exits within
26002 inner loops and be more careful about inconsistent profiles.
26003 (duplicate_loop_body_to_header_edge): Fix profile update when eliminated
26004 exit is followed by other exit.
26006 2023-07-08 Uros Bizjak <ubizjak@gmail.com>
26008 * cprop.cc (reg_available_p): Change return type from int to bool.
26009 (reg_not_set_p): Ditto.
26010 (try_replace_reg): Ditto. Change "success" variable to bool.
26011 (cprop_jump): Change return type from int to void
26012 and adjust function body accordingly.
26013 (constprop_register): Ditto.
26014 (cprop_insn): Ditto. Change "changed" variable to bool.
26015 (local_cprop_pass): Change return type from int to void
26016 and adjust function body accordingly.
26017 (bypass_block): Ditto. Change "change", "may_be_loop_header"
26018 and "removed_p" variables to bool.
26019 (bypass_conditional_jumps): Change return type from int to void
26020 and adjust function body accordingly. Change "changed"
26022 (one_cprop_pass): Ditto.
26024 2023-07-08 Uros Bizjak <ubizjak@gmail.com>
26026 * gcse.cc (expr_equiv_p): Change return type from int to bool.
26027 (oprs_unchanged_p): Change return type from int to void
26028 and adjust function body accordingly.
26029 (oprs_anticipatable_p): Ditto.
26030 (oprs_available_p): Ditto.
26031 (insert_expr_in_table): Ditto. Change "antic_p" and "avail_p"
26032 arguments to bool. Change "found" variable to bool.
26033 (load_killed_in_block_p): Change return type from int to void and
26034 adjust function body accordingly. Change "avail_p" argument to bool.
26035 (pre_expr_reaches_here_p): Change return type from int to void
26036 and adjust function body accordingly.
26037 (pre_delete): Ditto. Change "changed" variable to bool.
26038 (pre_gcse): Change return type from int to void
26039 and adjust function body accordingly. Change "did_insert" and
26040 "changed" variables to bool.
26041 (one_pre_gcse_pass): Change return type from int to void
26042 and adjust function body accordingly. Change "changed" variable
26044 (should_hoist_expr_to_dom): Change return type from int to void
26045 and adjust function body accordingly. Change
26046 "visited_allocated_locally" variable to bool.
26047 (hoist_code): Change return type from int to void and adjust
26048 function body accordingly. Change "changed" variable to bool.
26049 (one_code_hoisting_pass): Ditto.
26050 (pre_edge_insert): Change return type from int to void and adjust
26051 function body accordingly. Change "did_insert" variable to bool.
26052 (pre_expr_reaches_here_p_work): Change return type from int to void
26053 and adjust function body accordingly.
26054 (simple_mem): Ditto.
26055 (want_to_gcse_p): Change return type from int to void
26056 and adjust function body accordingly.
26057 (can_assign_to_reg_without_clobbers_p): Update function body
26058 for bool return type.
26059 (hash_scan_set): Change "antic_p" and "avail_p" variables to bool.
26060 (pre_insert_copies): Change "added_copy" variable to bool.
26062 2023-07-08 Jonathan Wakely <jwakely@redhat.com>
26066 * doc/invoke.texi (Warning Options): Fix typos.
26068 2023-07-07 Jan Hubicka <jh@suse.cz>
26070 * profile-count.cc (profile_count::dump): Add FUN
26071 parameter; print relative frequency.
26072 (profile_count::debug): Update.
26073 * profile-count.h (profile_count::dump): Update
26076 2023-07-07 Roger Sayle <roger@nextmovesoftware.com>
26080 * config/i386/i386-expand.cc (ix86_expand_move): Convert SETs of
26081 TImode destinations from paradoxical SUBREGs (setting the lowpart)
26082 into explicit zero extensions. Use *insvti_highpart_1 instruction
26083 to set the highpart of a TImode destination.
26085 2023-07-07 Jan Hubicka <jh@suse.cz>
26087 * predict.cc (force_edge_cold): Use
26088 set_edge_probability_and_rescale_others; improve dumps.
26090 2023-07-07 Jan Hubicka <jh@suse.cz>
26092 * cfgloopmanip.cc (scale_loop_profile): Fix computation of count_in and scaling blocks
26094 * tree-vect-loop-manip.cc (vect_do_peeling): Scale loop profile of the epilogue if bound
26097 2023-07-07 Juergen Christ <jchrist@linux.ibm.com>
26099 * config/s390/s390.cc (vec_init): Fix default case
26101 2023-07-07 Vladimir N. Makarov <vmakarov@redhat.com>
26103 * lra-assigns.cc (assign_by_spills): Add reload insns involving
26104 reload pseudos with non-refined class to be processed on the next
26106 * lra-constraints.cc (enough_allocatable_hard_regs_p): New func.
26107 (in_class_p): Use it.
26108 (print_curr_insn_alt): New func.
26109 (process_alt_operands): Use it. Improve debug info.
26110 (curr_insn_transform): Use print_curr_insn_alt. Refine reload
26111 pseudo class if it is not refined yet.
26113 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
26115 * value-range.cc (irange::get_bitmask_from_range): Return all the
26116 known bits for a singleton.
26117 (irange::set_range_from_bitmask): Set a range of a singleton when
26118 all bits are known.
26120 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
26122 * value-range.cc (irange::intersect): Leave normalization to
26125 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
26127 * data-streamer-in.cc (streamer_read_value_range): Adjust for
26129 * data-streamer-out.cc (streamer_write_vrange): Same.
26130 * range-op.cc (operator_cast::fold_range): Same.
26131 * value-range-pretty-print.cc
26132 (vrange_printer::print_irange_bitmasks): Same.
26133 * value-range-storage.cc (irange_storage::write_lengths_address):
26135 (irange_storage::set_irange): Same.
26136 (irange_storage::get_irange): Same.
26137 (irange_storage::size): Same.
26138 (irange_storage::dump): Same.
26139 * value-range-storage.h: Same.
26140 * value-range.cc (debug): New.
26141 (irange_bitmask::dump): New.
26142 (add_vrange): Adjust for value/mask.
26143 (irange::operator=): Same.
26144 (irange::set): Same.
26145 (irange::verify_range): Same.
26146 (irange::operator==): Same.
26147 (irange::contains_p): Same.
26148 (irange::irange_single_pair_union): Same.
26149 (irange::union_): Same.
26150 (irange::intersect): Same.
26151 (irange::invert): Same.
26152 (irange::get_nonzero_bits_from_range): Rename to...
26153 (irange::get_bitmask_from_range): ...this.
26154 (irange::set_range_from_nonzero_bits): Rename to...
26155 (irange::set_range_from_bitmask): ...this.
26156 (irange::set_nonzero_bits): Rename to...
26157 (irange::update_bitmask): ...this.
26158 (irange::get_nonzero_bits): Rename to...
26159 (irange::get_bitmask): ...this.
26160 (irange::intersect_nonzero_bits): Rename to...
26161 (irange::intersect_bitmask): ...this.
26162 (irange::union_nonzero_bits): Rename to...
26163 (irange::union_bitmask): ...this.
26164 (irange_bitmask::verify_mask): New.
26165 * value-range.h (class irange_bitmask): New.
26166 (irange_bitmask::set_unknown): New.
26167 (irange_bitmask::unknown_p): New.
26168 (irange_bitmask::irange_bitmask): New.
26169 (irange_bitmask::get_precision): New.
26170 (irange_bitmask::get_nonzero_bits): New.
26171 (irange_bitmask::set_nonzero_bits): New.
26172 (irange_bitmask::operator==): New.
26173 (irange_bitmask::union_): New.
26174 (irange_bitmask::intersect): New.
26175 (class irange): Friend vrange_printer.
26176 (irange::varying_compatible_p): Adjust for bitmask.
26177 (irange::set_varying): Same.
26178 (irange::set_nonzero): Same.
26180 2023-07-07 Jan Beulich <jbeulich@suse.com>
26182 * config/i386/sse.md (*vec_extractv2ti): Drop g modifiers.
26184 2023-07-07 Jan Beulich <jbeulich@suse.com>
26186 * config/i386/sse.md (@vec_extract_hi_<mode>): Drop last
26187 alternative. Switch new last alternative's "isa" attribute to
26189 (vec_extract_hi_v32qi): Likewise.
26191 2023-07-07 Pan Li <pan2.li@intel.com>
26192 Robin Dapp <rdapp@ventanamicro.com>
26194 * config/riscv/riscv.cc (riscv_emit_mode_set): Avoid emit insn
26196 (riscv_mode_entry): Take FRM_MODE_DYN as entry mode.
26197 (riscv_mode_exit): Likewise for exit mode.
26198 (riscv_mode_needed): Likewise for needed mode.
26199 (riscv_mode_after): Likewise for after mode.
26201 2023-07-07 Pan Li <pan2.li@intel.com>
26203 * config/riscv/vector.md: Fix typo.
26205 2023-07-06 Jan Hubicka <jh@suse.cz>
26207 PR middle-end/25623
26208 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Scale loop frequency to maximal number
26209 of iterations determined.
26210 * tree-ssa-loop-ivcanon.cc (try_unroll_loop_completely): Likewise.
26212 2023-07-06 Jan Hubicka <jh@suse.cz>
26214 * cfgloopmanip.cc (scale_loop_profile): Rewrite exit edge
26215 probability update to be safe on loops with subloops.
26216 Make bound parameter to be iteration bound.
26217 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Update call
26218 of scale_loop_profile.
26219 * tree-vect-loop-manip.cc (vect_do_peeling): Likewise.
26221 2023-07-06 Hao Liu OS <hliu@os.amperecomputing.com>
26223 PR tree-optimization/110449
26224 * tree-vect-loop.cc (vectorizable_induction): use vec_n to replace
26225 vec_loop for the unrolled loop.
26227 2023-07-06 Jan Hubicka <jh@suse.cz>
26229 * cfg.cc (set_edge_probability_and_rescale_others): New function.
26230 (update_bb_profile_for_threading): Use it; simplify the rest.
26231 * cfg.h (set_edge_probability_and_rescale_others): Declare.
26232 * profile-count.h (profile_probability::apply_scale): New.
26234 2023-07-06 Claudiu Zissulescu <claziss@gmail.com>
26236 * doc/extend.texi (ARC Built-in Functions): Update documentation
26237 with missing builtins.
26239 2023-07-06 Richard Biener <rguenther@suse.de>
26241 PR tree-optimization/110556
26242 * tree-ssa-tail-merge.cc (gimple_equal_p): Check
26243 assign code and all operands of non-stores.
26245 2023-07-06 Richard Biener <rguenther@suse.de>
26247 PR tree-optimization/110563
26248 * tree-vectorizer.h (vect_determine_partial_vectors_and_peeling):
26249 Remove second argument.
26250 * tree-vect-loop.cc (vect_determine_partial_vectors_and_peeling):
26251 Remove for_epilogue_p argument. Merge assert ...
26252 (vect_analyze_loop_2): ... with check done before determining
26253 partial vectors by moving it after.
26254 * tree-vect-loop-manip.cc (vect_do_peeling): Adjust.
26256 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
26258 * ggc-common.cc (gt_pch_note_reorder, gt_pch_save): Tighten up a
26259 few things re 'reorder' option and strings.
26260 * stringpool.cc (gt_pch_p_S): This is now 'gcc_unreachable'.
26262 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
26264 * gengtype-parse.cc: Clean up obsolete parametrized structs
26266 * gengtype.cc: Likewise.
26267 * gengtype.h: Likewise.
26269 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
26271 * gengtype.cc (struct walk_type_data): Remove 'needs_cast_p'.
26274 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
26276 * gengtype-parse.cc (token_names): Add '"user"'.
26277 * gengtype.h (gty_token): Add 'UNUSED_PARAM_IS' for use with
26278 'FIRST_TOKEN_WITH_VALUE'.
26280 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
26282 * doc/gty.texi (GTY Options) <string_length>: Enhance.
26284 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
26286 * gengtype.cc (write_root, write_roots): Explicitly reject
26287 'string_length' option.
26288 * doc/gty.texi (GTY Options) <string_length>: Document.
26290 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
26292 * ggc-internal.h (ggc_pch_count_object, ggc_pch_alloc_object)
26293 (ggc_pch_write_object): Remove 'bool is_string' argument.
26294 * ggc-common.cc: Adjust.
26295 * ggc-page.cc: Likewise.
26297 2023-07-06 Roger Sayle <roger@nextmovesoftware.com>
26299 * dwarf2out.cc (mem_loc_descriptor): Handle COPYSIGN.
26301 2023-07-06 Hongyu Wang <hongyu.wang@intel.com>
26303 * doc/extend.texi: Move x86 inlining rule to a new subsubsection
26304 and add description for inling of function with arch and tune
26307 2023-07-06 Richard Biener <rguenther@suse.de>
26309 PR tree-optimization/110515
26310 * tree-ssa-pre.cc (compute_avail): Make code dealing
26311 with hoisting loads with different alias-sets more
26314 2023-07-06 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
26316 * tree-vect-stmts.cc (vect_get_strided_load_store_ops): Fix ICE.
26318 2023-07-06 Hongyu Wang <hongyu.wang@intel.com>
26320 * config/i386/i386.cc (ix86_can_inline_p): If callee has
26321 default arch=x86-64 and tune=generic, do not block the
26322 inlining to its caller. Also allow callee with different
26323 arch= to be inlined if it has always_inline attribute and
26324 it's ISA is subset of caller's.
26326 2023-07-06 liuhongt <hongtao.liu@intel.com>
26328 * config/i386/i386.cc (ix86_rtx_costs): Adjust rtx_cost for
26329 DF/SFmode AND/IOR/XOR/ANDN operations.
26331 2023-07-06 Andrew Pinski <apinski@marvell.com>
26333 PR middle-end/110554
26334 * tree-vect-generic.cc (expand_vector_condition): For comparisons,
26335 just build using boolean_type_node instead of the cond_type.
26336 For non-comparisons/non-scalar-bitmask, build a ` != 0` gimple
26337 that will feed into the COND_EXPR.
26339 2023-07-06 liuhongt <hongtao.liu@intel.com>
26342 * config/i386/i386.md (movdf_internal): Disparage slightly for
26343 2 alternatives (r,v) and (v,r) by adding constraint modifier
26346 2023-07-06 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
26349 * config/rs6000/rs6000.cc (rs6000_expand_vector_extract): Remove redundant
26350 initialization of new_addr.
26352 2023-07-06 Hao Liu <hliu@os.amperecomputing.com>
26354 PR tree-optimization/110474
26355 * tree-vect-loop.cc (vect_analyze_loop_2): unscale the VF by suggested
26356 unroll factor while selecting the epilog vect loop VF.
26358 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
26360 * gimple-range-gori.cc (compute_operand_range): Convert to a tail
26363 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
26365 * gimple-range-gori.cc (compute_operand_range): After calling
26366 compute_operand2_range, recursively call self if needed.
26367 (compute_operand2_range): Turn into a leaf function.
26368 (gori_compute::compute_operand1_and_operand2_range): Finish
26369 operand2 calculation.
26370 * gimple-range-gori.h (compute_operand2_range): Remove name param.
26372 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
26374 * gimple-range-gori.cc (compute_operand_range): After calling
26375 compute_operand1_range, recursively call self if needed.
26376 (compute_operand1_range): Turn into a leaf function.
26377 (gori_compute::compute_operand1_and_operand2_range): Finish
26378 operand1 calculation.
26379 * gimple-range-gori.h (compute_operand1_range): Remove name param.
26381 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
26383 * gimple-range-gori.cc (compute_operand_range): Check for
26384 operand interdependence when both op1 and op2 are computed.
26385 (compute_operand1_and_operand2_range): No checks required now.
26387 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
26389 * gimple-range-gori.cc (compute_operand_range): Check for
26390 a relation between op1 and op2 and use that instead.
26391 (compute_operand1_range): Don't look for a relation override.
26392 (compute_operand2_range): Ditto.
26394 2023-07-05 Jonathan Wakely <jwakely@redhat.com>
26396 * doc/contrib.texi (Contributors): Update my entry.
26398 2023-07-05 Filip Kastl <filip.kastl@gmail.com>
26400 * value-prof.cc (gimple_mod_subtract_transform): Correct edge
26403 2023-07-05 Uros Bizjak <ubizjak@gmail.com>
26405 * sched-int.h (struct haifa_sched_info): Change can_schedule_ready_p,
26406 scehdule_more_p and contributes_to_priority indirect frunction
26407 type from int to bool.
26408 (no_real_insns_p): Change return type from int to bool.
26409 (contributes_to_priority): Ditto.
26410 * haifa-sched.cc (no_real_insns_p): Change return type from
26411 int to bool and adjust function body accordingly.
26412 * modulo-sched.cc (try_scheduling_node_in_cycle): Change "success"
26413 variable type from int to bool.
26414 (ps_insn_advance_column): Change return type from int to bool.
26415 (ps_has_conflicts): Ditto. Change "has_conflicts"
26416 variable type from int to bool.
26417 * sched-deps.cc (deps_may_trap_p): Change return type from int to bool.
26418 (conditions_mutex_p): Ditto.
26419 * sched-ebb.cc (schedule_more_p): Ditto.
26420 (ebb_contributes_to_priority): Change return type from
26421 int to bool and adjust function body accordingly.
26422 * sched-rgn.cc (is_cfg_nonregular): Ditto.
26423 (check_live_1): Ditto.
26425 (find_conditional_protection): Ditto.
26426 (is_conditionally_protected): Ditto.
26427 (is_prisky): Ditto.
26428 (is_exception_free): Ditto.
26429 (haifa_find_rgns): Change "unreachable" and "too_large_failure"
26430 variables from int to bool.
26431 (extend_rgns): Change "rescan" variable from int to bool.
26432 (check_live): Change return type from
26433 int to bool and adjust function body accordingly.
26434 (can_schedule_ready_p): Ditto.
26435 (schedule_more_p): Ditto.
26436 (contributes_to_priority): Ditto.
26438 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
26440 * doc/md.texi: Document that vec_set and vec_extract must not
26442 * gimple-isel.cc (gimple_expand_vec_set_expr): Rename this...
26443 (gimple_expand_vec_set_extract_expr): ...to this.
26444 (gimple_expand_vec_exprs): Call renamed function.
26445 * internal-fn.cc (vec_extract_direct): Add.
26446 (expand_vec_extract_optab_fn): New function to expand
26448 (direct_vec_extract_optab_supported_p): Add.
26449 * internal-fn.def (VEC_EXTRACT): Add.
26450 * optabs.cc (can_vec_extract_var_idx_p): New function.
26451 * optabs.h (can_vec_extract_var_idx_p): Declare.
26453 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
26455 * config/riscv/autovec.md: Add gen_lowpart.
26457 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
26459 * config/riscv/autovec.md: Allow register index operand.
26461 2023-07-05 Pan Li <pan2.li@intel.com>
26463 * config/riscv/riscv-vector-builtins.cc
26464 (function_expander::use_exact_insn): Use FRM_DYN instead of const0.
26466 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
26468 * config/riscv/autovec.md: Use float_truncate.
26470 2023-07-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
26472 * internal-fn.cc (internal_fn_len_index): Apply
26473 LEN_MASK_GATHER_LOAD/SCATTER_STORE into vectorizer.
26474 (internal_fn_mask_index): Ditto.
26475 * optabs-query.cc (supports_vec_gather_load_p): Ditto.
26476 (supports_vec_scatter_store_p): Ditto.
26477 * tree-vect-data-refs.cc (vect_gather_scatter_fn_p): Ditto.
26478 * tree-vect-patterns.cc (vect_recog_gather_scatter_pattern): Ditto.
26479 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
26480 (vect_get_strided_load_store_ops): Ditto.
26481 (vectorizable_store): Ditto.
26482 (vectorizable_load): Ditto.
26484 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
26485 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26487 * simplify-rtx.cc (native_encode_rtx): Ditto.
26488 (native_decode_vector_rtx): Ditto.
26489 (simplify_const_vector_byte_offset): Ditto.
26490 (simplify_const_vector_subreg): Ditto.
26491 * tree.cc (build_truth_vector_type_for_mode): Ditto.
26492 * varasm.cc (output_constant_pool_2): Ditto.
26494 2023-07-05 YunQiang Su <yunqiang.su@cipunited.com>
26496 * config/mips/mips.cc (mips_expand_block_move): don't expand for
26497 r6 with -mno-unaligned-access option if one or both of src and
26498 dest are unaligned. restruct: return directly if length is not const.
26499 (mips_block_move_straight): emit_move if ISA_HAS_UNALIGNED_ACCESS.
26501 2023-07-05 Jan Beulich <jbeulich@suse.com>
26504 * config/i386/sse.md: New splitters to simplify
26505 not;vec_duplicate as a singular vpternlog.
26506 (one_cmpl<mode>2): Allow broadcast for operand 1.
26507 (<mask_codefor>one_cmpl<mode>2<mask_name>): Likewise.
26509 2023-07-05 Jan Beulich <jbeulich@suse.com>
26512 * config/i386/sse.md: New splitters to simplify
26513 not;vec_duplicate;{ior,xor} as vec_duplicate;{iornot,xnor}.
26515 2023-07-05 Jan Beulich <jbeulich@suse.com>
26518 * config/i386/sse.md: Permit non-immediate operand 1 in AVX2
26519 form of splitter for PR target/100711.
26521 2023-07-05 Richard Biener <rguenther@suse.de>
26523 PR middle-end/110541
26524 * tree.def (VEC_PERM_EXPR): Adjust documentation to reflect
26527 2023-07-05 Jan Beulich <jbeulich@suse.com>
26530 * config/i386/sse.md (*andnot<mode>3): Add new alternatives
26531 for memory form operand 1.
26533 2023-07-05 Jan Beulich <jbeulich@suse.com>
26536 * config/i386/i386.cc (ix86_rtx_costs): Further special-case
26537 bitwise vector operations.
26538 * config/i386/sse.md (*iornot<mode>3): New insn.
26539 (*xnor<mode>3): Likewise.
26540 (*<nlogic><mode>3): Likewise.
26541 (andor): New code iterator.
26542 (nlogic): New code attribute.
26543 (ternlog_nlogic): Likewise.
26545 2023-07-05 Richard Biener <rguenther@suse.de>
26547 * tree-vect-stmts.cc (vect_mark_relevant): Fix typo.
26549 2023-07-05 yulong <shiyulong@iscas.ac.cn>
26551 * config/riscv/vector.md: Add float16 attr at sew、vlmul and ratio.
26553 2023-07-05 yulong <shiyulong@iscas.ac.cn>
26555 * config/riscv/genrvv-type-indexer.cc (valid_type): Enable FP16 tuple.
26556 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
26557 (ADJUST_ALIGNMENT): Ditto.
26558 (RVV_TUPLE_PARTIAL_MODES): Ditto.
26559 (ADJUST_NUNITS): Ditto.
26560 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t):
26562 (vfloat16mf4x3_t): Ditto.
26563 (vfloat16mf4x4_t): Ditto.
26564 (vfloat16mf4x5_t): Ditto.
26565 (vfloat16mf4x6_t): Ditto.
26566 (vfloat16mf4x7_t): Ditto.
26567 (vfloat16mf4x8_t): Ditto.
26568 (vfloat16mf2x2_t): Ditto.
26569 (vfloat16mf2x3_t): Ditto.
26570 (vfloat16mf2x4_t): Ditto.
26571 (vfloat16mf2x5_t): Ditto.
26572 (vfloat16mf2x6_t): Ditto.
26573 (vfloat16mf2x7_t): Ditto.
26574 (vfloat16mf2x8_t): Ditto.
26575 (vfloat16m1x2_t): Ditto.
26576 (vfloat16m1x3_t): Ditto.
26577 (vfloat16m1x4_t): Ditto.
26578 (vfloat16m1x5_t): Ditto.
26579 (vfloat16m1x6_t): Ditto.
26580 (vfloat16m1x7_t): Ditto.
26581 (vfloat16m1x8_t): Ditto.
26582 (vfloat16m2x2_t): Ditto.
26583 (vfloat16m2x3_t): Ditto.
26584 (vfloat16m2x4_t): Ditto.
26585 (vfloat16m4x2_t): Ditto.
26586 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): New macro.
26587 (vfloat16mf4x3_t): Ditto.
26588 (vfloat16mf4x4_t): Ditto.
26589 (vfloat16mf4x5_t): Ditto.
26590 (vfloat16mf4x6_t): Ditto.
26591 (vfloat16mf4x7_t): Ditto.
26592 (vfloat16mf4x8_t): Ditto.
26593 (vfloat16mf2x2_t): Ditto.
26594 (vfloat16mf2x3_t): Ditto.
26595 (vfloat16mf2x4_t): Ditto.
26596 (vfloat16mf2x5_t): Ditto.
26597 (vfloat16mf2x6_t): Ditto.
26598 (vfloat16mf2x7_t): Ditto.
26599 (vfloat16mf2x8_t): Ditto.
26600 (vfloat16m1x2_t): Ditto.
26601 (vfloat16m1x3_t): Ditto.
26602 (vfloat16m1x4_t): Ditto.
26603 (vfloat16m1x5_t): Ditto.
26604 (vfloat16m1x6_t): Ditto.
26605 (vfloat16m1x7_t): Ditto.
26606 (vfloat16m1x8_t): Ditto.
26607 (vfloat16m2x2_t): Ditto.
26608 (vfloat16m2x3_t): Ditto.
26609 (vfloat16m2x4_t): Ditto.
26610 (vfloat16m4x2_t): Ditto.
26611 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): New.
26612 * config/riscv/riscv.md: New.
26613 * config/riscv/vector-iterators.md: New.
26615 2023-07-04 Andrew Pinski <apinski@marvell.com>
26617 PR tree-optimization/110487
26618 * match.pd (a !=/== CST1 ? CST2 : CST3): Always
26619 build a nonstandard integer and use that.
26621 2023-07-04 Andrew Pinski <apinski@marvell.com>
26623 * match.pd (a?-1:0): Cast type an integer type
26624 rather the type before the negative.
26625 (a?0:-1): Likewise.
26627 2023-07-04 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
26629 * config/xtensa/xtensa.cc (machine_function, xtensa_expand_prologue):
26630 Change to use HARD_REG_BIT and its macros.
26631 * config/xtensa/xtensa.md
26632 (peephole2: regmove elimination during DFmode input reload):
26635 2023-07-04 Richard Biener <rguenther@suse.de>
26637 PR tree-optimization/110491
26638 * tree-ssa-phiopt.cc (match_simplify_replacement): Check
26639 whether the PHI args are possibly undefined before folding
26642 2023-07-04 Pan Li <pan2.li@intel.com>
26643 Thomas Schwinge <thomas@codesourcery.com>
26645 * lto-streamer-in.cc (lto_input_mode_table): Stream in the mode
26646 bits for machine mode table.
26647 * lto-streamer-out.cc (lto_write_mode_table): Stream out the
26648 HOST machine mode bits.
26649 * lto-streamer.h (struct lto_file_decl_data): New fields mode_bits.
26650 * tree-streamer.cc (streamer_mode_table): Take MAX_MACHINE_MODE
26652 * tree-streamer.h (streamer_mode_table): Ditto.
26653 (bp_pack_machine_mode): Take 1 << ceil_log2 (MAX_MACHINE_MODE)
26654 as the packing limit.
26655 (bp_unpack_machine_mode): Ditto with 'file_data->mode_bits'.
26657 2023-07-04 Thomas Schwinge <thomas@codesourcery.com>
26659 * lto-streamer.h (class lto_input_block): Capture
26660 'lto_file_decl_data *file_data' instead of just
26661 'unsigned char *mode_table'.
26662 * ipa-devirt.cc (ipa_odr_read_section): Adjust.
26663 * ipa-fnsummary.cc (inline_read_section): Likewise.
26664 * ipa-icf.cc (sem_item_optimizer::read_section): Likewise.
26665 * ipa-modref.cc (read_section): Likewise.
26666 * ipa-prop.cc (ipa_prop_read_section, read_replacements_section):
26668 * ipa-sra.cc (isra_read_summary_section): Likewise.
26669 * lto-cgraph.cc (input_cgraph_opt_section): Likewise.
26670 * lto-section-in.cc (lto_create_simple_input_block): Likewise.
26671 * lto-streamer-in.cc (lto_read_body_or_constructor)
26672 (lto_input_toplevel_asms): Likewise.
26673 * tree-streamer.h (bp_unpack_machine_mode): Likewise.
26675 2023-07-04 Richard Biener <rguenther@suse.de>
26677 * tree-ssa-phiopt.cc (pass_phiopt::execute): Mark SSA undefs.
26678 (empty_bb_or_one_feeding_into_p): Check for them.
26679 * tree-ssa.h (gimple_uses_undefined_value_p): Remove.
26680 * tree-ssa.cc (gimple_uses_undefined_value_p): Likewise.
26682 2023-07-04 Richard Biener <rguenther@suse.de>
26684 * tree-vect-loop.cc (vect_analyze_loop_costing): Remove
26685 check guarding scalar_niter underflow.
26687 2023-07-04 Hao Liu <hliu@os.amperecomputing.com>
26689 PR tree-optimization/110531
26690 * tree-vect-loop.cc (vect_analyze_loop_1): initialize
26691 slp_done_for_suggested_uf to false.
26693 2023-07-04 Richard Biener <rguenther@suse.de>
26695 PR tree-optimization/110228
26696 * tree-ssa-ifcombine.cc (pass_tree_ifcombine::execute):
26697 Mark SSA may-undefs.
26698 (bb_no_side_effects_p): Check stmt uses for undefs.
26700 2023-07-04 Richard Biener <rguenther@suse.de>
26702 PR tree-optimization/110436
26703 * tree-vect-stmts.cc (vect_mark_relevant): Expand dumping,
26704 force live but not relevant pattern stmts relevant.
26706 2023-07-04 Lili Cui <lili.cui@intel.com>
26708 * config/i386/i386.h: Add PTA_ENQCMD and PTA_UINTR to PTA_SIERRAFOREST.
26709 * doc/invoke.texi: Update new isa to march=sierraforest and grandridge.
26711 2023-07-04 Richard Biener <rguenther@suse.de>
26713 PR middle-end/110495
26714 * tree.h (TREE_OVERFLOW): Do not mention VECTOR_CSTs
26715 since we do not set TREE_OVERFLOW on those since the
26716 introduction of VL vectors.
26717 * match.pd (x +- CST +- CST): For VECTOR_CST do not look
26718 at TREE_OVERFLOW to determine validity of association.
26720 2023-07-04 Richard Biener <rguenther@suse.de>
26722 PR tree-optimization/110310
26723 * tree-vect-loop.cc (vect_determine_partial_vectors_and_peeling):
26724 Move costing part ...
26725 (vect_analyze_loop_costing): ... here. Integrate better
26726 estimate for epilogues from ...
26727 (vect_analyze_loop_2): Call vect_determine_partial_vectors_and_peeling
26728 with actual epilogue status.
26729 * tree-vect-loop-manip.cc (vect_do_peeling): ... here and
26730 avoid cancelling epilogue vectorization.
26731 (vect_update_epilogue_niters): Remove. No longer update
26732 epilogue LOOP_VINFO_NITERS.
26734 2023-07-04 Pan Li <pan2.li@intel.com>
26737 2023-07-03 Pan Li <pan2.li@intel.com>
26739 * config/riscv/vector.md: Fix typo.
26741 2023-07-04 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
26743 * doc/md.texi: Add len_mask_gather_load/len_mask_scatter_store.
26744 * internal-fn.cc (expand_scatter_store_optab_fn): Ditto.
26745 (expand_gather_load_optab_fn): Ditto.
26746 (internal_load_fn_p): Ditto.
26747 (internal_store_fn_p): Ditto.
26748 (internal_gather_scatter_fn_p): Ditto.
26749 (internal_fn_len_index): Ditto.
26750 (internal_fn_mask_index): Ditto.
26751 (internal_fn_stored_value_index): Ditto.
26752 * internal-fn.def (LEN_MASK_GATHER_LOAD): Ditto.
26753 (LEN_MASK_SCATTER_STORE): Ditto.
26754 * optabs.def (OPTAB_CD): Ditto.
26756 2023-07-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26758 * config/riscv/riscv-vsetvl.cc
26759 (vector_insn_info::parse_insn): Add early break.
26761 2023-07-04 Hans-Peter Nilsson <hp@axis.com>
26763 * config/cris/cris.md (CRIS_UNSPEC_SWAP_BITS): Remove.
26764 ("cris_swap_bits", "ctzsi2"): Use bitreverse instead.
26766 2023-07-04 Hans-Peter Nilsson <hp@axis.com>
26768 * dwarf2out.cc (mem_loc_descriptor): Handle BITREVERSE.
26770 2023-07-03 Christoph Müllner <christoph.muellner@vrull.eu>
26772 * common/config/riscv/riscv-common.cc: Add support for zvbb,
26773 zvbc, zvkg, zvkned, zvknha, zvknhb, zvksed, zvksh, zvkn,
26774 zvknc, zvkng, zvks, zvksc, zvksg, zvkt and the implied subsets.
26775 * config/riscv/arch-canonicalize: Add canonicalization info for
26776 zvkn, zvknc, zvkng, zvks, zvksc, zvksg.
26777 * config/riscv/riscv-opts.h (MASK_ZVBB): New macro.
26778 (MASK_ZVBC): Likewise.
26779 (TARGET_ZVBB): Likewise.
26780 (TARGET_ZVBC): Likewise.
26781 (MASK_ZVKG): Likewise.
26782 (MASK_ZVKNED): Likewise.
26783 (MASK_ZVKNHA): Likewise.
26784 (MASK_ZVKNHB): Likewise.
26785 (MASK_ZVKSED): Likewise.
26786 (MASK_ZVKSH): Likewise.
26787 (MASK_ZVKN): Likewise.
26788 (MASK_ZVKNC): Likewise.
26789 (MASK_ZVKNG): Likewise.
26790 (MASK_ZVKS): Likewise.
26791 (MASK_ZVKSC): Likewise.
26792 (MASK_ZVKSG): Likewise.
26793 (MASK_ZVKT): Likewise.
26794 (TARGET_ZVKG): Likewise.
26795 (TARGET_ZVKNED): Likewise.
26796 (TARGET_ZVKNHA): Likewise.
26797 (TARGET_ZVKNHB): Likewise.
26798 (TARGET_ZVKSED): Likewise.
26799 (TARGET_ZVKSH): Likewise.
26800 (TARGET_ZVKN): Likewise.
26801 (TARGET_ZVKNC): Likewise.
26802 (TARGET_ZVKNG): Likewise.
26803 (TARGET_ZVKS): Likewise.
26804 (TARGET_ZVKSC): Likewise.
26805 (TARGET_ZVKSG): Likewise.
26806 (TARGET_ZVKT): Likewise.
26807 * config/riscv/riscv.opt: Introduction of riscv_zv{b,k}_subext.
26809 2023-07-03 Andrew Pinski <apinski@marvell.com>
26811 PR middle-end/110510
26812 * except.h (struct eh_landing_pad_d): Add chain_next GTY.
26814 2023-07-03 Iain Sandoe <iain@sandoe.co.uk>
26816 * config/darwin.h: Avoid duplicate multiply_defined specs on
26817 earlier Darwin versions with shared libgcc.
26819 2023-07-03 Uros Bizjak <ubizjak@gmail.com>
26821 * tree.h (tree_int_cst_equal): Change return type from int to bool.
26822 (operand_equal_for_phi_arg_p): Ditto.
26823 (tree_map_base_marked_p): Ditto.
26824 * tree.cc (contains_placeholder_p): Update function body
26825 for bool return type.
26826 (type_cache_hasher::equal): Ditto.
26827 (tree_map_base_hash): Change return type
26828 from int to void and adjust function body accordingly.
26829 (tree_int_cst_equal): Ditto.
26830 (operand_equal_for_phi_arg_p): Ditto.
26831 (get_narrower): Change "first" variable to bool.
26832 (cl_option_hasher::equal): Update function body for bool return type.
26833 * ggc.h (ggc_set_mark): Change return type from int to bool.
26834 (ggc_marked_p): Ditto.
26835 * ggc-page.cc (gt_ggc_mx): Change return type
26836 from int to void and adjust function body accordingly.
26837 (ggc_set_mark): Ditto.
26839 2023-07-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
26841 * config/riscv/autovec.md: Change order of
26842 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
26843 * config/riscv/riscv-v.cc (expand_load_store): Ditto.
26844 * doc/md.texi: Ditto.
26845 * gimple-fold.cc (gimple_fold_partial_load_store_mem_ref): Ditto.
26846 * internal-fn.cc (len_maskload_direct): Ditto.
26847 (len_maskstore_direct): Ditto.
26848 (add_len_and_mask_args): New function.
26849 (expand_partial_load_optab_fn): Change order of
26850 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
26851 (expand_partial_store_optab_fn): Ditto.
26852 (internal_fn_len_index): New function.
26853 (internal_fn_mask_index): Change order of
26854 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
26855 (internal_fn_stored_value_index): Ditto.
26856 (internal_len_load_store_bias): Ditto.
26857 * internal-fn.h (internal_fn_len_index): New function.
26858 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Change order of
26859 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
26860 * tree-vect-stmts.cc (vectorizable_store): Ditto.
26861 (vectorizable_load): Ditto.
26863 2023-07-03 Gaius Mulley <gaiusmod2@gmail.com>
26866 * doc/gm2.texi (Semantic checking): Include examples using
26867 -Wuninit-variable-checking.
26869 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26871 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
26872 (*single_widen_fnma<mode>): Ditto.
26873 (*double_widen_fms<mode>): Ditto.
26874 (*single_widen_fms<mode>): Ditto.
26875 (*double_widen_fnms<mode>): Ditto.
26876 (*single_widen_fnms<mode>): Ditto.
26878 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26880 * config/riscv/autovec-opt.md (@pred_single_widen_mul<any_extend:su><mode>): Change "@"
26881 into "*" in pattern name which simplifies build files.
26882 (*pred_single_widen_mul<any_extend:su><mode>): Ditto.
26883 (*pred_single_widen_mul<mode>): New pattern.
26885 2023-07-03 Richard Sandiford <richard.sandiford@arm.com>
26887 * config/aarch64/aarch64-simd.md (vec_extract<mode><Vhalf>): Expect
26888 the index to be 0 or 1.
26890 2023-07-03 Lehua Ding <lehua.ding@rivai.ai>
26893 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26895 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
26896 (*single_widen_fnma<mode>): Ditto.
26897 (*double_widen_fms<mode>): Ditto.
26898 (*single_widen_fms<mode>): Ditto.
26899 (*double_widen_fnms<mode>): Ditto.
26900 (*single_widen_fnms<mode>): Ditto.
26902 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26904 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
26905 (*single_widen_fnma<mode>): Ditto.
26906 (*double_widen_fms<mode>): Ditto.
26907 (*single_widen_fms<mode>): Ditto.
26908 (*double_widen_fnms<mode>): Ditto.
26909 (*single_widen_fnms<mode>): Ditto.
26911 2023-07-03 Pan Li <pan2.li@intel.com>
26913 * config/riscv/vector.md: Fix typo.
26915 2023-07-03 Richard Biener <rguenther@suse.de>
26917 PR tree-optimization/110506
26918 * tree-vect-patterns.cc (vect_recog_rotate_pattern): Re-order
26919 TYPE_PRECISION access with INTEGRAL_TYPE_P check.
26921 2023-07-03 Richard Biener <rguenther@suse.de>
26923 PR tree-optimization/110506
26924 * tree-ssa-ccp.cc (get_value_for_expr): Check for integral
26925 type before relying on TYPE_PRECISION to produce a nonzero mask.
26927 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
26929 * config/mips/mips.md(*and<mode>3_mips16): Generates
26930 ZEB/ZEH instructions.
26932 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
26934 * config/mips/mips.cc(mips_9bit_offset_address_p): Restrict the
26935 address register to M16_REGS for MIPS16.
26936 (BUILTIN_AVAIL_MIPS16E2): Defined a new macro.
26937 (AVAIL_MIPS16E2_OR_NON_MIPS16): Same as above.
26938 (AVAIL_NON_MIPS16 (cache..)): Update to
26939 AVAIL_MIPS16E2_OR_NON_MIPS16.
26940 * config/mips/mips.h (ISA_HAS_CACHE): Add clause for ISA_HAS_MIPS16E2.
26941 * config/mips/mips.md (mips_cache): Mark as extended MIPS16.
26943 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
26945 * config/mips/mips.h(ISA_HAS_9BIT_DISPLACEMENT): Add clause
26946 for ISA_HAS_MIPS16E2.
26947 (ISA_HAS_SYNC): Same as above.
26948 (ISA_HAS_LL_SC): Same as above.
26950 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
26952 * config/mips/mips.cc(mips_expand_ins_as_unaligned_store):
26953 Add logics for generating instruction.
26954 * config/mips/mips.h(ISA_HAS_LWL_LWR): Add clause for ISA_HAS_MIPS16E2.
26955 * config/mips/mips.md(mov_<load>l): Generates instructions.
26956 (mov_<load>r): Same as above.
26957 (mov_<store>l): Adjusted for the conditions above.
26958 (mov_<store>r): Same as above.
26959 (mov_<store>l_mips16e2): Add machine description for `define_insn mov_<store>l_mips16e2`.
26960 (mov_<store>r_mips16e2): Add machine description for `define_insn mov_<store>r_mips16e2`.
26962 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
26964 * config/mips/mips.cc(mips_symbol_insns_1): Generates LUI instruction.
26965 (mips_const_insns): Same as above.
26966 (mips_output_move): Same as above.
26967 (mips_output_function_prologue): Same as above.
26968 * config/mips/mips.md: Same as above
26970 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
26972 * config/mips/constraints.md(Yz): New constraints for mips16e2.
26973 * config/mips/mips-protos.h(mips_bit_clear_p): Declared new function.
26974 (mips_bit_clear_info): Same as above.
26975 * config/mips/mips.cc(mips_bit_clear_info): New function for
26976 generating instructions.
26977 (mips_bit_clear_p): Same as above.
26978 * config/mips/mips.h(ISA_HAS_EXT_INS): Add clause for ISA_HAS_MIPS16E2.
26979 * config/mips/mips.md(extended_mips16): Generates EXT and INS instructions.
26980 (*and<mode>3): Generates INS instruction.
26981 (*and<mode>3_mips16): Generates EXT, INS and ANDI instructions.
26982 (ior<mode>3): Add logics for ORI instruction.
26983 (*ior<mode>3_mips16_asmacro): Generates ORI instrucion.
26984 (*ior<mode>3_mips16): Add logics for XORI instruction.
26985 (*xor<mode>3_mips16): Generates XORI instrucion.
26986 (*extzv<mode>): Add logics for EXT instruction.
26987 (*insv<mode>): Add logics for INS instruction.
26988 * config/mips/predicates.md(bit_clear_operand): New predicate for
26989 generating bitwise instructions.
26990 (and_reg_operand): Add logics for generating bitwise instructions.
26992 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
26994 * config/mips/mips.cc(mips_regno_mode_ok_for_base_p): Generate instructions
26995 that uses global pointer register.
26996 (mips16_unextended_reference_p): Same as above.
26997 (mips_pic_base_register): Same as above.
26998 (mips_init_relocs): Same as above.
26999 * config/mips/mips.h(MIPS16_GP_LOADS): Defined a new macro.
27000 (GLOBAL_POINTER_REGNUM): Moved to machine description `mips.md`.
27001 * config/mips/mips.md(GLOBAL_POINTER_REGNUM): Moved to here from above.
27002 (*lowsi_mips16_gp):New `define_insn *low<mode>_mips16`.
27004 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
27006 * config/mips/mips.h(ISA_HAS_CONDMOVE): Add condition for ISA_HAS_MIPS16E2.
27007 * config/mips/mips.md(*mov<GPR:mode>_on_<MOVECC:mode>): Add logics for MOVx insts.
27008 (*mov<GPR:mode>_on_<MOVECC:mode>_mips16e2): Generate MOVx instruction.
27009 (*mov<GPR:mode>_on_<GPR2:mode>_ne): Add logics for MOVx insts.
27010 (*mov<GPR:mode>_on_<GPR2:mode>_ne_mips16e2): Generate MOVx instruction.
27011 * config/mips/predicates.md(reg_or_0_operand_mips16e2): New predicate for MOVx insts.
27013 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
27015 * config/mips/mips.cc(mips_file_start): Add mips16e2 info
27017 * config/mips/mips.h(__mips_mips16e2): Defined a new
27019 (ISA_HAS_MIPS16E2): Defined a new macro.
27020 (ASM_SPEC): Pass mmips16e2 to the assembler.
27021 * config/mips/mips.opt: Add -m(no-)mips16e2 option.
27022 * config/mips/predicates.md: Add clause for TARGET_MIPS16E2.
27023 * doc/invoke.texi: Add -m(no-)mips16e2 option..
27025 2023-07-02 Jakub Jelinek <jakub@redhat.com>
27027 PR tree-optimization/110508
27028 * tree-ssa-math-opts.cc (match_uaddc_usubc): Only replace re2 with
27029 REALPART_EXPR opf nlhs if re2 is non-NULL.
27031 2023-07-02 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
27033 * config/xtensa/xtensa.cc (xtensa_match_CLAMPS_imms_p):
27035 * config/xtensa/xtensa.md (*xtensa_clamps):
27036 Add TARGET_MINMAX to the condition.
27038 2023-07-02 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
27040 * config/xtensa/xtensa.md (*eqne_INT_MIN):
27041 Add missing ":SI" to the match_operator.
27043 2023-07-02 Iain Sandoe <iain@sandoe.co.uk>
27046 * config/darwin.opt: Add fconstant-cfstrings alias to
27047 mconstant-cfstrings.
27048 * doc/invoke.texi: Amend invocation descriptions to reflect
27049 that the fconstant-cfstrings is a target-option alias and to
27050 add the missing mconstant-cfstrings option description to the
27053 2023-07-01 Jan Hubicka <jh@suse.cz>
27055 * tree-cfg.cc (gimple_duplicate_sese_region): Add elliminated_edge
27056 parmaeter; update profile.
27057 * tree-cfg.h (gimple_duplicate_sese_region): Update prototype.
27058 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Rename to ...
27059 (static_loop_exit): ... this; return the edge to be elliminated.
27060 (ch_base::copy_headers): Handle profile updating for eliminated exits.
27062 2023-07-01 Roger Sayle <roger@nextmovesoftware.com>
27064 * config/i386/i386-features.cc (compute_convert_gain): Provide
27065 gains/costs for ROTATE and ROTATERT (by an integer constant).
27066 (general_scalar_chain::convert_rotate): New helper function to
27067 convert a DImode or SImode rotation by an integer constant into
27069 (general_scalar_chain::convert_insn): Call the new convert_rotate
27070 for ROTATE and ROTATERT.
27071 (general_scalar_to_vector_candidate_p): Consider ROTATE and
27072 ROTATERT to be candidates if the second operand is an integer
27073 constant, valid for a rotation (or shift) in the given mode.
27074 * config/i386/i386-features.h (general_scalar_chain): Add new
27075 helper method convert_rotate.
27077 2023-07-01 Jan Hubicka <jh@suse.cz>
27079 PR tree-optimization/103680
27080 * cfg.cc (update_bb_profile_for_threading): Fix profile update;
27081 make message clearer.
27083 2023-06-30 Qing Zhao <qing.zhao@oracle.com>
27085 PR tree-optimization/101832
27086 * tree-object-size.cc (addr_object_size): Handle structure/union type
27087 when it has flexible size.
27089 2023-06-30 Eric Botcazou <ebotcazou@adacore.com>
27091 * gimple-fold.cc (fold_array_ctor_reference): Fix head comment.
27092 (fold_nonarray_ctor_reference): Likewise. Specifically deal
27093 with integral bit-fields.
27094 (fold_ctor_reference): Make sure that the constructor uses the
27095 native storage order.
27097 2023-06-30 Jan Hubicka <jh@suse.cz>
27099 PR middle-end/109849
27100 * predict.cc (estimate_bb_frequencies): Turn to static function.
27101 (expr_expected_value_1): Fix handling of binary expressions with
27103 * predict.def (PRED_MALLOC_NONNULL): Move later in the priority queue.
27104 (PRED_BUILTIN_EXPECT_WITH_PROBABILITY): Move to almost top of the priority
27106 * predict.h (estimate_bb_frequencies): No longer declare it.
27108 2023-06-30 Uros Bizjak <ubizjak@gmail.com>
27110 * fold-const.h (multiple_of_p): Change return type from int to bool.
27111 * fold-const.cc (split_tree): Change negl_p, neg_litp_p,
27112 neg_conp_p and neg_var_p variables to bool.
27113 (const_binop): Change sat_p variable to bool.
27114 (merge_ranges): Change no_overlap variable to bool.
27115 (extract_muldiv_1): Change same_p variable to bool.
27116 (tree_swap_operands_p): Update function body for bool return type.
27117 (fold_truth_andor): Change commutative variable to bool.
27118 (multiple_of_p): Change return type
27119 from int to void and adjust function body accordingly.
27120 * optabs.h (expand_twoval_unop): Change return type from int to bool.
27121 (expand_twoval_binop): Ditto.
27122 (can_compare_p): Ditto.
27123 (have_add2_insn): Ditto.
27124 (have_addptr3_insn): Ditto.
27125 (have_sub2_insn): Ditto.
27126 (have_insn_for): Ditto.
27127 * optabs.cc (add_equal_note): Ditto.
27128 (widen_operand): Change no_extend argument from int to bool.
27129 (expand_binop): Ditto.
27130 (expand_twoval_unop): Change return type
27131 from int to void and adjust function body accordingly.
27132 (expand_twoval_binop): Ditto.
27133 (can_compare_p): Ditto.
27134 (have_add2_insn): Ditto.
27135 (have_addptr3_insn): Ditto.
27136 (have_sub2_insn): Ditto.
27137 (have_insn_for): Ditto.
27139 2023-06-30 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
27141 * config/aarch64/aarch64-simd.md
27142 (vec_widen_<su>abdl_lo_<mode>, vec_widen_<su>abdl_hi_<mode>):
27143 Expansions for abd vec widen optabs.
27144 (aarch64_<su>abdl<mode>_insn): VQW based abdl RTL.
27145 * config/aarch64/iterators.md (USMAX_EXT): Code attributes
27146 that give the appropriate extend RTL for the max RTL.
27148 2023-06-30 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
27150 * internal-fn.def (VEC_WIDEN_ABD): New internal hilo optab.
27151 * optabs.def (vec_widen_sabd_optab,
27152 vec_widen_sabd_hi_optab, vec_widen_sabd_lo_optab,
27153 vec_widen_sabd_odd_even, vec_widen_sabd_even_optab,
27154 vec_widen_uabd_optab,
27155 vec_widen_uabd_hi_optab, vec_widen_uabd_lo_optab,
27156 vec_widen_uabd_odd_even, vec_widen_uabd_even_optab):
27158 * doc/md.texi: Document them.
27159 * tree-vect-patterns.cc (vect_recog_abd_pattern): Update to
27160 to build a VEC_WIDEN_ABD call if the input precision is smaller
27161 than the precision of the output.
27162 (vect_recog_widen_abd_pattern): Should an ABD expression be
27163 found preceeding an extension, replace the two with a
27166 2023-06-30 Pan Li <pan2.li@intel.com>
27168 * config/riscv/vector.md: Refactor the common condition.
27170 2023-06-30 Richard Biener <rguenther@suse.de>
27172 PR tree-optimization/110496
27173 * gimple-ssa-store-merging.cc (find_bswap_or_nop_1): Re-order
27174 verifying and TYPE_PRECISION query for the BIT_FIELD_REF case.
27176 2023-06-30 Richard Biener <rguenther@suse.de>
27178 PR middle-end/110489
27179 * statistics.cc (curr_statistics_hash): Add argument
27180 indicating whether we should allocate the hash.
27181 (statistics_fini_pass): If the hash isn't allocated
27182 only print the summary header.
27184 2023-06-30 Segher Boessenkool <segher@kernel.crashing.org>
27185 Thomas Schwinge <thomas@codesourcery.com>
27187 * config/nvptx/nvptx.cc (TARGET_LRA_P): Remove.
27189 2023-06-30 Jovan Dmitrović <jovan.dmitrovic@syrmia.com>
27192 * config/mips/mips.cc (mips_function_arg_alignment): Returns
27193 the alignment of function argument. In case of typedef type,
27194 it returns the aligment of the aliased type.
27195 (mips_function_arg_boundary): Relocated calculation of the
27196 aligment of function arguments.
27198 2023-06-29 Jan Hubicka <jh@suse.cz>
27200 PR tree-optimization/109849
27201 * ipa-fnsummary.cc (decompose_param_expr): Skip
27202 functions returning its parameter.
27203 (set_cond_stmt_execution_predicate): Return early
27204 if predicate was constructed.
27206 2023-06-29 Qing Zhao <qing.zhao@oracle.com>
27209 * doc/extend.texi: Document GCC extension on a structure containing
27210 a flexible array member to be a member of another structure.
27212 2023-06-29 Qing Zhao <qing.zhao@oracle.com>
27214 * print-tree.cc (print_node): Print new bit type_include_flexarray.
27215 * tree-core.h (struct tree_type_common): Use bit no_named_args_stdarg_p
27216 as type_include_flexarray for RECORD_TYPE or UNION_TYPE.
27217 * tree-streamer-in.cc (unpack_ts_type_common_value_fields): Stream
27218 in bit no_named_args_stdarg_p properly for its corresponding type.
27219 * tree-streamer-out.cc (pack_ts_type_common_value_fields): Stream
27220 out bit no_named_args_stdarg_p properly for its corresponding type.
27221 * tree.h (TYPE_INCLUDES_FLEXARRAY): New macro TYPE_INCLUDES_FLEXARRAY.
27223 2023-06-29 Aldy Hernandez <aldyh@redhat.com>
27225 * tree-vrp.cc (maybe_set_nonzero_bits): Move from here...
27226 * tree-ssa-dom.cc (maybe_set_nonzero_bits): ...to here.
27227 * tree-vrp.h (maybe_set_nonzero_bits): Remove.
27229 2023-06-29 Aldy Hernandez <aldyh@redhat.com>
27231 * value-range.cc (frange::set): Do not call verify_range.
27232 (frange::normalize_kind): Verify range.
27233 (frange::union_nans): Do not call verify_range.
27234 (frange::union_): Same.
27235 (frange::intersect): Same.
27236 (irange::irange_single_pair_union): Call normalize_kind if
27238 (irange::union_): Same.
27239 (irange::intersect): Same.
27240 (irange::set_range_from_nonzero_bits): Verify range.
27241 (irange::set_nonzero_bits): Call normalize_kind if necessary.
27242 (irange::get_nonzero_bits): Tweak comment.
27243 (irange::intersect_nonzero_bits): Call normalize_kind if
27245 (irange::union_nonzero_bits): Same.
27246 * value-range.h (irange::normalize_kind): Verify range.
27248 2023-06-29 Uros Bizjak <ubizjak@gmail.com>
27250 * cselib.h (rtx_equal_for_cselib_1):
27251 Change return type from int to bool.
27252 (references_value_p): Ditto.
27253 (rtx_equal_for_cselib_p): Ditto.
27254 * expr.h (can_store_by_pieces): Ditto.
27255 (try_casesi): Ditto.
27256 (try_tablejump): Ditto.
27257 (safe_from_p): Ditto.
27258 * sbitmap.h (bitmap_equal_p): Ditto.
27259 * cselib.cc (references_value_p): Change return type
27260 from int to void and adjust function body accordingly.
27261 (rtx_equal_for_cselib_1): Ditto.
27262 * expr.cc (is_aligning_offset): Ditto.
27263 (can_store_by_pieces): Ditto.
27264 (mostly_zeros_p): Ditto.
27265 (all_zeros_p): Ditto.
27266 (safe_from_p): Ditto.
27267 (is_aligning_offset): Ditto.
27268 (try_casesi): Ditto.
27269 (try_tablejump): Ditto.
27270 (store_constructor): Change "need_to_clear" and
27271 "const_bounds_p" variables to bool.
27272 * sbitmap.cc (bitmap_equal_p): Change return type from int to bool.
27274 2023-06-29 Robin Dapp <rdapp@ventanamicro.com>
27276 * tree-ssa-math-opts.cc (divmod_candidate_p): Use
27279 2023-06-29 Richard Biener <rguenther@suse.de>
27281 PR tree-optimization/110460
27282 * tree-vect-stmts.cc (get_related_vectype_for_scalar_type):
27283 Only allow integral, pointer and scalar float type scalar_type.
27285 2023-06-29 Lili Cui <lili.cui@intel.com>
27287 PR tree-optimization/110148
27288 * tree-ssa-reassoc.cc (rewrite_expr_tree_parallel): Handle loop-carried
27289 ops in this function.
27291 2023-06-29 Richard Biener <rguenther@suse.de>
27293 PR middle-end/110452
27294 * expr.cc (store_constructor): Handle uniform boolean
27295 vectors with integer mode specially.
27297 2023-06-29 Richard Biener <rguenther@suse.de>
27299 PR middle-end/110461
27300 * match.pd (bitop (convert@2 @0) (convert?@3 @1)): Disable
27303 2023-06-29 Richard Sandiford <richard.sandiford@arm.com>
27305 * vec.h (gt_pch_nx): Add overloads for va_gc_atomic.
27306 (array_slice): Relax va_gc constructor to handle all vectors
27307 with a vl_embed layout.
27309 2023-06-29 Pan Li <pan2.li@intel.com>
27311 * config/riscv/riscv.cc (riscv_emit_mode_set): Add emit for FRM.
27312 (riscv_mode_needed): Likewise.
27313 (riscv_entity_mode_after): Likewise.
27314 (riscv_mode_after): Likewise.
27315 (riscv_mode_entry): Likewise.
27316 (riscv_mode_exit): Likewise.
27317 * config/riscv/riscv.h (NUM_MODES_FOR_MODE_SWITCHING): Add number
27319 * config/riscv/riscv.md: Add FRM register.
27320 * config/riscv/vector-iterators.md: Add FRM type.
27321 * config/riscv/vector.md (frm_mode): Define new attr for FRM mode.
27322 (fsrm): Define new insn for fsrm instruction.
27324 2023-06-29 Pan Li <pan2.li@intel.com>
27326 * config/riscv/riscv-protos.h (enum floating_point_rounding_mode):
27327 Add macro for static frm min and max.
27328 * config/riscv/riscv-vector-builtins-bases.cc
27329 (class binop_frm): New class for floating-point with frm.
27330 (BASE): Add vfadd for frm.
27331 * config/riscv/riscv-vector-builtins-bases.h: Likewise.
27332 * config/riscv/riscv-vector-builtins-functions.def
27333 (vfadd_frm): Likewise.
27334 * config/riscv/riscv-vector-builtins-shapes.cc
27335 (struct alu_frm_def): New struct for alu with frm.
27336 (SHAPE): Add alu with frm.
27337 * config/riscv/riscv-vector-builtins-shapes.h: Likewise.
27338 * config/riscv/riscv-vector-builtins.cc
27339 (function_checker::report_out_of_range_and_not): New function
27340 for report out of range and not val.
27341 (function_checker::require_immediate_range_or): New function
27342 for checking in range or one val.
27343 * config/riscv/riscv-vector-builtins.h: Add function decl.
27345 2023-06-29 Cui, Lili <lili.cui@intel.com>
27347 * common/config/i386/cpuinfo.h (get_intel_cpu): Remove model value 0xa8
27348 from Rocketlake, move model value 0xbf from Alderlake to Raptorlake.
27350 2023-06-28 Hans-Peter Nilsson <hp@axis.com>
27353 * config/cris/cris.cc (cris_postdbr_cmpelim): Don't apply PATTERN
27354 to insn before validating it.
27356 2023-06-28 Jan Hubicka <jh@suse.cz>
27358 PR middle-end/110334
27359 * ipa-fnsummary.h (ipa_fn_summary): Add
27360 safe_to_inline_to_always_inline.
27361 * ipa-inline.cc (can_early_inline_edge_p): ICE
27362 if SSA is not built; do cycle checking for
27363 always_inline functions.
27364 (inline_always_inline_functions): Be recrusive;
27365 watch for cycles; do not updat overall summary.
27366 (early_inliner): Do not give up on always_inlines.
27367 * ipa-utils.cc (ipa_reverse_postorder): Do not skip
27370 2023-06-28 Uros Bizjak <ubizjak@gmail.com>
27372 * output.h (leaf_function_p): Change return type from int to bool.
27373 (final_forward_branch_p): Ditto.
27374 (only_leaf_regs_used): Ditto.
27375 (maybe_assemble_visibility): Ditto.
27376 * varasm.h (supports_one_only): Ditto.
27377 * rtl.h (compute_alignments): Change return type from int to void.
27378 * final.cc (app_on): Change return type from int to bool.
27379 (compute_alignments): Change return type from int to void
27380 and adjust function body accordingly.
27381 (shorten_branches): Change "something_changed" variable
27382 type from int to bool.
27383 (leaf_function_p): Change return type from int to bool
27384 and adjust function body accordingly.
27385 (final_forward_branch_p): Ditto.
27386 (only_leaf_regs_used): Ditto.
27387 * varasm.cc (contains_pointers_p): Change return type from
27388 int to bool and adjust function body accordingly.
27389 (compare_constant): Ditto.
27390 (maybe_assemble_visibility): Ditto.
27391 (supports_one_only): Ditto.
27393 2023-06-28 Manolis Tsamis <manolis.tsamis@vrull.eu>
27396 * regcprop.cc (maybe_mode_change): Check stack_pointer_rtx mode.
27397 (maybe_copy_reg_attrs): New function.
27398 (find_oldest_value_reg): Use maybe_copy_reg_attrs.
27399 (copyprop_hardreg_forward_1): Ditto.
27401 2023-06-28 Richard Biener <rguenther@suse.de>
27403 PR tree-optimization/110434
27404 * tree-nrv.cc (pass_nrv::execute): Remove CLOBBERs of
27405 VAR we replace with <retval>.
27407 2023-06-28 Richard Biener <rguenther@suse.de>
27409 PR tree-optimization/110451
27410 * tree-ssa-loop-im.cc (stmt_cost): [VEC_]COND_EXPR and
27411 tcc_comparison are expensive.
27413 2023-06-28 Roger Sayle <roger@nextmovesoftware.com>
27415 * config/i386/i386-expand.cc (ix86_expand_branch): Also use ptest
27416 for TImode comparisons on 32-bit architectures.
27417 * config/i386/i386.md (cbranch<mode>4): Change from SDWIM to
27418 SWIM1248x to exclude/avoid TImode being conditional on -m64.
27419 (cbranchti4): New define_expand for TImode on both TARGET_64BIT
27420 and/or with TARGET_SSE4_1.
27421 * config/i386/predicates.md (ix86_timode_comparison_operator):
27422 New predicate that depends upon TARGET_64BIT.
27423 (ix86_timode_comparison_operand): Likewise.
27425 2023-06-28 Roger Sayle <roger@nextmovesoftware.com>
27428 * config/i386/i386-features.cc (compute_convert_gain): Provide
27429 more accurate gains for conversion of scalar comparisons to
27432 2023-06-28 Richard Biener <rguenther@suse.de>
27434 PR tree-optimization/110443
27435 * tree-vect-slp.cc (vect_build_slp_tree_1): Reject non-grouped
27438 2023-06-28 Haochen Gui <guihaoc@gcc.gnu.org>
27440 * config/rs6000/rs6000.md (peephole2 for compare_and_move): New.
27441 (peephole2 for move_and_compare): New.
27442 (mode_iterator WORD): New. Set the mode to SI/DImode by
27444 (*mov<mode>_internal2): Change the mode iterator from P to WORD.
27445 (split pattern for compare_and_move): Likewise.
27447 2023-06-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27449 * config/riscv/autovec-opt.md (*double_widen_fma<mode>): New pattern.
27450 (*single_widen_fma<mode>): Ditto.
27452 2023-06-28 Haochen Gui <guihaoc@gcc.gnu.org>
27455 * config/rs6000/altivec.md (*altivec_vupkhs<VU_char>_direct): Rename
27457 (altivec_vupkhs<VU_char>_direct): ...this.
27458 * config/rs6000/predicates.md (vspltisw_vupkhsw_constant_split): New
27459 predicate to test if a constant can be loaded with vspltisw and
27461 (easy_vector_constant): Call vspltisw_vupkhsw_constant_p to Check if
27462 a vector constant can be synthesized with a vspltisw and a vupkhsw.
27463 * config/rs6000/rs6000-protos.h (vspltisw_vupkhsw_constant_p):
27465 * config/rs6000/rs6000.cc (vspltisw_vupkhsw_constant_p): New
27466 function to return true if OP mode is V2DI and can be synthesized
27467 with vupkhsw and vspltisw.
27468 * config/rs6000/vsx.md (*vspltisw_v2di_split): New insn to load up
27469 constants with vspltisw and vupkhsw.
27471 2023-06-28 Jan Hubicka <jh@suse.cz>
27473 PR tree-optimization/110377
27474 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Pass statement to
27476 (ipa_analyze_node): Enable ranger.
27478 2023-06-28 Richard Biener <rguenther@suse.de>
27480 * tree.h (TYPE_PRECISION): Check for non-VECTOR_TYPE.
27481 (TYPE_PRECISION_RAW): Provide raw access to the precision
27483 * tree.cc (verify_type_variant): Compare TYPE_PRECISION_RAW.
27484 (gimple_canonical_types_compatible_p): Likewise.
27485 * tree-streamer-out.cc (pack_ts_type_common_value_fields):
27486 Stream TYPE_PRECISION_RAW.
27487 * tree-streamer-in.cc (unpack_ts_type_common_value_fields):
27489 * lto-streamer-out.cc (hash_tree): Hash TYPE_PRECISION_RAW.
27491 2023-06-28 Alexandre Oliva <oliva@adacore.com>
27493 * doc/extend.texi (zero-call-used-regs): Document leafy and
27495 * flag-types.h (zero_regs_flags): Add LEAFY_MODE, as well as
27496 LEAFY and variants.
27497 * function.cc (gen_call_ued_regs_seq): Set only_used for leaf
27498 functions in leafy mode.
27499 * opts.cc (zero_call_used_regs_opts): Add leafy and variants.
27501 2023-06-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27503 * config/riscv/riscv-vector-builtins-bases.cc: Adapt expand.
27504 * config/riscv/vector.md (@pred_single_widen_<plus_minus:optab><mode>):
27506 (@pred_single_widen_add<mode>): New pattern.
27507 (@pred_single_widen_sub<mode>): New pattern.
27509 2023-06-28 liuhongt <hongtao.liu@intel.com>
27511 * config/i386/i386.cc (ix86_invalid_conversion): New function.
27512 (TARGET_INVALID_CONVERSION): Define as
27513 ix86_invalid_conversion.
27515 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
27517 * config/riscv/autovec.md (<optab><vnconvert><mode>2): New
27519 (<float_cvt><vnconvert><mode>2): Ditto.
27520 (<optab><mode><vnconvert>2): Ditto.
27521 (<float_cvt><mode><vnconvert>2): Ditto.
27522 * config/riscv/vector-iterators.md: Add vnconvert.
27524 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
27526 * config/riscv/autovec.md (extend<v_double_trunc><mode>2): New
27528 (extend<v_quad_trunc><mode>2): Ditto.
27529 (trunc<mode><v_double_trunc>2): Ditto.
27530 (trunc<mode><v_quad_trunc>2): Ditto.
27531 * config/riscv/vector-iterators.md: Add VQEXTF and HF to
27532 V_QUAD_TRUNC and v_quad_trunc.
27534 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
27536 * config/riscv/autovec.md (<float_cvt><vconvert><mode>2): New
27539 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
27541 * config/riscv/autovec.md (copysign<mode>3): Add expander.
27542 (xorsign<mode>3): Ditto.
27543 * config/riscv/riscv-vector-builtins-bases.cc (class vfsgnjn):
27545 * config/riscv/vector-iterators.md (copysign): Remove ncopysign.
27549 * config/riscv/vector.md (@pred_ncopysign<mode>): Split off.
27550 (@pred_ncopysign<mode>_scalar): Ditto.
27552 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
27554 * config/riscv/autovec.md: VF_AUTO -> VF.
27555 * config/riscv/vector-iterators.md: Introduce VF_ZVFHMIN,
27556 VWEXTF_ZVFHMIN and use TARGET_ZVFH in VWCONVERTI, VHF and
27558 * config/riscv/vector.md: Use new iterators.
27560 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
27562 * match.pd: Use element_mode and check if target supports
27563 operation with new type.
27565 2023-06-27 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
27567 * config/aarch64/aarch64-sve-builtins-base.cc
27568 (svdupq_impl::fold_nonconst_dupq): New method.
27569 (svdupq_impl::fold): Call fold_nonconst_dupq.
27571 2023-06-27 Andrew Pinski <apinski@marvell.com>
27573 PR middle-end/110420
27574 PR middle-end/103979
27575 PR middle-end/98619
27576 * gimplify.cc (gimplify_asm_expr): Mark asm with labels as volatile.
27578 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
27580 * ipa-cp.cc (decide_whether_version_node): Adjust comment.
27581 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Adjust
27583 (set_switch_stmt_execution_predicate): Same.
27584 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Same.
27586 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
27588 * ipa-prop.cc (struct ipa_vr_ggc_hash_traits): Adjust for use with
27589 ipa_vr instead of value_range.
27592 (ipa_get_value_range): Same.
27593 * value-range.cc (gt_pch_nx): Move to ipa-prop.cc and adjust for
27597 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
27599 * ipa-cp.cc (ipa_vr_operation_and_type_effects): New.
27600 * ipa-prop.cc (ipa_get_value_range): Adjust for ipa_vr.
27601 (ipa_set_jfunc_vr): Take a range.
27602 (ipa_compute_jump_functions_for_edge): Pass range to
27604 (ipa_write_jump_function): Call streamer write helper.
27605 (ipa_read_jump_function): Call streamer read helper.
27606 * ipa-prop.h (class ipa_vr): Change m_vr to an ipa_vr.
27608 2023-06-27 Richard Sandiford <richard.sandiford@arm.com>
27610 * gengtype-parse.cc (consume_until_comma_or_eos): Parse "= { ... }"
27611 as a probable initializer rather than a probable complete statement.
27613 2023-06-27 Richard Biener <rguenther@suse.de>
27615 PR tree-optimization/96208
27616 * tree-vect-slp.cc (vect_build_slp_tree_1): Allow
27617 a non-grouped load if it is the same for all lanes.
27618 (vect_build_slp_tree_2): Handle not grouped loads.
27619 (vect_optimize_slp_pass::remove_redundant_permutations):
27621 (vect_transform_slp_perm_load_1): Likewise.
27622 * tree-vect-stmts.cc (vect_model_load_cost): Likewise.
27623 (get_group_load_store_type): Likewise. Handle
27624 invariant accesses.
27625 (vectorizable_load): Likewise.
27627 2023-06-27 liuhongt <hongtao.liu@intel.com>
27629 PR rtl-optimization/110237
27630 * config/i386/sse.md (<avx512>_store<mode>_mask): Refine with
27632 (maskstore<mode><avx512fmaskmodelower): Ditto.
27633 (*<avx512>_store<mode>_mask): New define_insn, it's renamed
27634 from original <avx512>_store<mode>_mask.
27636 2023-06-27 liuhongt <hongtao.liu@intel.com>
27638 * config/i386/i386-features.cc (pass_insert_vzeroupper:gate):
27639 Move flag_expensive_optimizations && !optimize_size to ..
27640 * config/i386/i386-options.cc (ix86_option_override_internal):
27641 .. this, it makes -mvzeroupper independent of optimization
27642 level, but still keeps the behavior of architecture
27643 tuning(emit_vzeroupper) unchanged.
27645 2023-06-27 liuhongt <hongtao.liu@intel.com>
27648 * config/i386/i386.cc (ix86_avx_u127_mode_needed): Don't emit
27649 vzeroupper for vzeroupper call_insn.
27651 2023-06-27 Andrew Pinski <apinski@marvell.com>
27653 * doc/extend.texi (__builtin_alloca_with_align_and_max): Fix
27656 2023-06-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27658 * config/riscv/riscv-v.cc (expand_const_vector): Fix stepped vector
27661 2023-06-26 Andrew Pinski <apinski@marvell.com>
27663 * doc/extend.texi (access attribute): Add
27665 (interrupt/interrupt_handler attribute):
27668 2023-06-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27670 * config/aarch64/aarch64-simd.md (aarch64_sqrshrun_n<mode>_insn):
27671 Use <DWI> instead of <V2XWIDE>.
27672 (aarch64_sqrshrun_n<mode>): Likewise.
27674 2023-06-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27676 * config/aarch64/aarch64-protos.h (aarch64_const_vec_rsra_rnd_imm_p):
27678 (aarch64_rnd_imm_p): ... This.
27679 * config/aarch64/predicates.md (aarch64_simd_rsra_rnd_imm_vec):
27681 (aarch64_int_rnd_operand): ... This.
27682 (aarch64_simd_rshrn_imm_vec): Delete.
27683 * config/aarch64/aarch64-simd.md (aarch64_<sra_op>rsra_n<mode>_insn):
27684 Adjust for the above.
27685 (aarch64_<sra_op>rshr_n<mode><vczle><vczbe>_insn): Likewise.
27686 (*aarch64_<shrn_op>rshrn_n<mode>_insn): Likewise.
27687 (*aarch64_sqrshrun_n<mode>_insn<vczle><vczbe>): Likewise.
27688 (aarch64_sqrshrun_n<mode>_insn): Likewise.
27689 (aarch64_<shrn_op>rshrn2_n<mode>_insn_le): Likewise.
27690 (aarch64_<shrn_op>rshrn2_n<mode>_insn_be): Likewise.
27691 (aarch64_sqrshrun2_n<mode>_insn_le): Likewise.
27692 (aarch64_sqrshrun2_n<mode>_insn_be): Likewise.
27693 * config/aarch64/aarch64.cc (aarch64_const_vec_rsra_rnd_imm_p):
27695 (aarch64_rnd_imm_p): ... This.
27697 2023-06-26 Andreas Krebbel <krebbel@linux.ibm.com>
27699 * config/s390/s390.cc (s390_encode_section_info): Set
27700 SYMBOL_FLAG_SET_NOTALIGN2 only if the symbol has explicitely been
27703 2023-06-26 Jan Hubicka <jh@suse.cz>
27705 PR tree-optimization/109849
27706 * tree-ssa-dce.cc (make_forwarders_with_degenerate_phis): Fix profile
27707 count of newly constructed forwarder block.
27709 2023-06-26 Andrew Carlotti <andrew.carlotti@arm.com>
27711 * doc/optinfo.texi: Fix "steam" -> "stream".
27713 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
27715 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Add LEN_MASK_STORE and
27717 (dse_optimize_stmt): Add LEN_MASK_STORE.
27719 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
27721 * gimple-fold.cc (gimple_fold_partial_load_store_mem_ref): Fix gimple
27722 fold of LOAD/STORE with length.
27724 2023-06-26 Andrew MacLeod <amacleod@redhat.com>
27726 * gimple-range-gori.cc (compute_operand1_and_operand2_range):
27727 Check for interdependence between operands 1 and 2.
27729 2023-06-26 Richard Sandiford <richard.sandiford@arm.com>
27731 * tree-vect-stmts.cc (vectorizable_conversion): Take multi_step_cvt
27732 into account when costing non-widening/truncating conversions.
27734 2023-06-26 Richard Biener <rguenther@suse.de>
27736 PR tree-optimization/110381
27737 * tree-vect-slp.cc (vect_optimize_slp_pass::start_choosing_layouts):
27738 Materialize permutes before fold-left reductions.
27740 2023-06-26 Pan Li <pan2.li@intel.com>
27742 * config/riscv/riscv-vector-builtins-bases.h: Remove duplicated decl.
27744 2023-06-26 Richard Biener <rguenther@suse.de>
27746 * varasm.cc (initializer_constant_valid_p_1): Also
27747 constrain the type of value to be scalar integral
27748 before dispatching to narrowing_initializer_constant_valid_p.
27750 2023-06-26 Richard Biener <rguenther@suse.de>
27752 * tree-ssa-scopedtables.cc (hashable_expr_equal_p):
27753 Use element_precision.
27755 2023-06-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27757 * config/riscv/autovec.md (vcond<V:mode><VI:mode>): Remove redundant
27759 (vcondu<V:mode><VI:mode>): Ditto.
27760 * config/riscv/riscv-protos.h (expand_vcond): Ditto.
27761 * config/riscv/riscv-v.cc (expand_vcond): Ditto.
27763 2023-06-26 Richard Biener <rguenther@suse.de>
27765 PR tree-optimization/110392
27766 * gimple-predicate-analysis.cc (uninit_analysis::is_use_guarded):
27767 Do early exits on true/false predicate only after normalization.
27769 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
27771 * tree-ssa-sccvn.cc (vn_reference_lookup_3): Change name "len" into
27774 2023-06-26 Roger Sayle <roger@nextmovesoftware.com>
27776 * config/i386/i386.md (peephole2): Simplify zeroing a register
27777 followed by an IOR, XOR or PLUS operation on it, into a move.
27778 (*ashl<dwi>3_doubleword_highpart): New define_insn_and_split to
27779 eliminate (and hide from reload) unnecessary word to doubleword
27780 extensions that are followed by left shifts by sufficiently large,
27781 but valid, bit counts.
27783 2023-06-26 liuhongt <hongtao.liu@intel.com>
27785 PR tree-optimization/110371
27786 PR tree-optimization/110018
27787 * tree-vect-stmts.cc (vectorizable_conversion): Use cvt_op to
27788 save intermediate type operand instead of "subtle" vec_dest
27791 2023-06-26 liuhongt <hongtao.liu@intel.com>
27793 PR tree-optimization/110371
27794 PR tree-optimization/110018
27795 * tree-vect-stmts.cc (vectorizable_conversion): Don't use
27796 intermiediate type for FIX_TRUNC_EXPR when ftrapping-math.
27798 2023-06-26 Hongyu Wang <hongyu.wang@intel.com>
27800 * config/i386/i386-options.cc (ix86_valid_target_attribute_tree):
27801 Override tune_string with arch_string if tune_string is not
27802 explicitly specified.
27804 2023-06-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27806 * config/riscv/riscv-vsetvl.cc (vector_insn_info::parse_insn): Ehance
27808 * config/riscv/riscv-vsetvl.h: New function.
27810 2023-06-25 Li Xu <xuli1@eswincomputing.com>
27812 * config/riscv/riscv-vector-builtins-bases.cc: change emit_insn to
27815 2023-06-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27817 * config/riscv/autovec.md (len_load_<mode>): Remove.
27818 (len_maskload<mode><vm>): Remove.
27819 (len_store_<mode>): New pattern.
27820 (len_maskstore<mode><vm>): New pattern.
27821 * config/riscv/predicates.md (autovec_length_operand): New predicate.
27822 * config/riscv/riscv-protos.h (enum insn_type): New enum.
27823 (expand_load_store): New function.
27824 * config/riscv/riscv-v.cc (emit_vlmax_masked_insn): Ditto.
27825 (emit_nonvlmax_masked_insn): Ditto.
27826 (expand_load_store): Ditto.
27827 * config/riscv/riscv-vector-builtins.cc
27828 (function_expander::use_contiguous_store_insn): Add avl_type operand
27830 * config/riscv/vector.md: Ditto.
27832 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
27834 * internal-fn.cc (expand_partial_store_optab_fn): Fix bug of BIAS
27837 2023-06-25 Pan Li <pan2.li@intel.com>
27839 * config/riscv/vector.md: Revert.
27841 2023-06-25 Pan Li <pan2.li@intel.com>
27843 * config/riscv/genrvv-type-indexer.cc (valid_type): Revert changes.
27844 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): Ditto.
27845 (ADJUST_ALIGNMENT): Ditto.
27846 (RVV_TUPLE_PARTIAL_MODES): Ditto.
27847 (ADJUST_NUNITS): Ditto.
27848 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t): Ditto.
27849 (vfloat16mf4x3_t): Ditto.
27850 (vfloat16mf4x4_t): Ditto.
27851 (vfloat16mf4x5_t): Ditto.
27852 (vfloat16mf4x6_t): Ditto.
27853 (vfloat16mf4x7_t): Ditto.
27854 (vfloat16mf4x8_t): Ditto.
27855 (vfloat16mf2x2_t): Ditto.
27856 (vfloat16mf2x3_t): Ditto.
27857 (vfloat16mf2x4_t): Ditto.
27858 (vfloat16mf2x5_t): Ditto.
27859 (vfloat16mf2x6_t): Ditto.
27860 (vfloat16mf2x7_t): Ditto.
27861 (vfloat16mf2x8_t): Ditto.
27862 (vfloat16m1x2_t): Ditto.
27863 (vfloat16m1x3_t): Ditto.
27864 (vfloat16m1x4_t): Ditto.
27865 (vfloat16m1x5_t): Ditto.
27866 (vfloat16m1x6_t): Ditto.
27867 (vfloat16m1x7_t): Ditto.
27868 (vfloat16m1x8_t): Ditto.
27869 (vfloat16m2x2_t): Ditto.
27870 (vfloat16m2x3_t): Diito.
27871 (vfloat16m2x4_t): Diito.
27872 (vfloat16m4x2_t): Diito.
27873 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): Ditto.
27874 (vfloat16mf4x3_t): Ditto.
27875 (vfloat16mf4x4_t): Ditto.
27876 (vfloat16mf4x5_t): Ditto.
27877 (vfloat16mf4x6_t): Ditto.
27878 (vfloat16mf4x7_t): Ditto.
27879 (vfloat16mf4x8_t): Ditto.
27880 (vfloat16mf2x2_t): Ditto.
27881 (vfloat16mf2x3_t): Ditto.
27882 (vfloat16mf2x4_t): Ditto.
27883 (vfloat16mf2x5_t): Ditto.
27884 (vfloat16mf2x6_t): Ditto.
27885 (vfloat16mf2x7_t): Ditto.
27886 (vfloat16mf2x8_t): Ditto.
27887 (vfloat16m1x2_t): Ditto.
27888 (vfloat16m1x3_t): Ditto.
27889 (vfloat16m1x4_t): Ditto.
27890 (vfloat16m1x5_t): Ditto.
27891 (vfloat16m1x6_t): Ditto.
27892 (vfloat16m1x7_t): Ditto.
27893 (vfloat16m1x8_t): Ditto.
27894 (vfloat16m2x2_t): Ditto.
27895 (vfloat16m2x3_t): Ditto.
27896 (vfloat16m2x4_t): Ditto.
27897 (vfloat16m4x2_t): Ditto.
27898 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): Ditto.
27899 * config/riscv/riscv.md: Ditto.
27900 * config/riscv/vector-iterators.md: Ditto.
27902 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
27904 * gimple-fold.cc (arith_overflowed_p): Apply LEN_MASK_{LOAD,STORE}.
27905 (gimple_fold_partial_load_store_mem_ref): Ditto.
27906 (gimple_fold_partial_store): Ditto.
27907 (gimple_fold_call): Ditto.
27909 2023-06-25 liuhongt <hongtao.liu@intel.com>
27912 * config/i386/sse.md (maskload<mode><avx512fmaskmodelower>):
27913 Refine pattern with UNSPEC_MASKLOAD.
27914 (maskload<mode><avx512fmaskmodelower>): Ditto.
27915 (*<avx512>_load<mode>_mask): Extend mode iterator to
27917 (*<avx512>_load<mode>): Ditto.
27919 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
27921 * tree-ssa-alias.cc (call_may_clobber_ref_p_1): Add LEN_MASK_STORE.
27923 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
27925 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Apply
27926 LEN_MASK_{LOAD,STORE}
27928 2023-06-25 yulong <shiyulong@iscas.ac.cn>
27930 * config/riscv/vector.md: Add float16 attr at sew、vlmul and ratio.
27932 2023-06-24 Roger Sayle <roger@nextmovesoftware.com>
27934 * config/i386/i386.md (*<code>qi_ext<mode>_3): New define_insn.
27936 2023-06-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27938 * config/riscv/autovec.md (*fma<mode>): set clobber to Pmode in expand stage.
27939 (*fma<VI:mode><P:mode>): Ditto.
27940 (*fnma<mode>): Ditto.
27941 (*fnma<VI:mode><P:mode>): Ditto.
27943 2023-06-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27945 * config/riscv/autovec.md (fma<mode>4): New pattern.
27946 (*fma<mode>): Ditto.
27947 (fnma<mode>4): Ditto.
27948 (*fnma<mode>): Ditto.
27949 (fms<mode>4): Ditto.
27950 (*fms<mode>): Ditto.
27951 (fnms<mode>4): Ditto.
27952 (*fnms<mode>): Ditto.
27953 * config/riscv/riscv-protos.h (emit_vlmax_fp_ternary_insn):
27955 * config/riscv/riscv-v.cc (emit_vlmax_fp_ternary_insn): Ditto.
27956 * config/riscv/vector.md: Fix attribute bug.
27958 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
27960 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn):
27961 Apply LEN_MASK_{LOAD,STORE}.
27963 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
27965 * tree-ssa-loop-ivopts.cc (get_alias_ptr_type_for_ptr_address):
27966 Add LEN_MASK_{LOAD,STORE}.
27968 2023-06-24 David Malcolm <dmalcolm@redhat.com>
27970 * diagnostic-format-sarif.cc: Add #define INCLUDE_VECTOR.
27971 * diagnostic.cc: Likewise.
27972 * text-art/box-drawing.cc: Likewise.
27973 * text-art/canvas.cc: Likewise.
27974 * text-art/ruler.cc: Likewise.
27975 * text-art/selftests.cc: Likewise.
27976 * text-art/selftests.h (text_art::canvas): New forward decl.
27977 * text-art/style.cc: Add #define INCLUDE_VECTOR.
27978 * text-art/styled-string.cc: Likewise.
27979 * text-art/table.cc: Likewise.
27980 * text-art/table.h: Remove #include <vector>.
27981 * text-art/theme.cc: Add #define INCLUDE_VECTOR.
27982 * text-art/types.h: Check that INCLUDE_VECTOR is defined.
27983 Remove #include of <vector> and <string>.
27984 * text-art/widget.cc: Add #define INCLUDE_VECTOR.
27985 * text-art/widget.h: Remove #include <vector>.
27987 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
27989 * internal-fn.cc (expand_partial_store_optab_fn): Adapt for LEN_MASK_STORE.
27990 (internal_load_fn_p): Add LEN_MASK_LOAD.
27991 (internal_store_fn_p): Add LEN_MASK_STORE.
27992 (internal_fn_mask_index): Add LEN_MASK_{LOAD,STORE}.
27993 (internal_fn_stored_value_index): Add LEN_MASK_STORE.
27994 (internal_len_load_store_bias): Add LEN_MASK_{LOAD,STORE}.
27995 * optabs-tree.cc (can_vec_mask_load_store_p): Adapt for LEN_MASK_{LOAD,STORE}.
27996 (get_len_load_store_mode): Ditto.
27997 * optabs-tree.h (can_vec_mask_load_store_p): Ditto.
27998 (get_len_load_store_mode): Ditto.
27999 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
28000 (get_all_ones_mask): New function.
28001 (vectorizable_store): Apply LEN_MASK_{LOAD,STORE} into vectorizer.
28002 (vectorizable_load): Ditto.
28004 2023-06-23 Marek Polacek <polacek@redhat.com>
28006 * doc/cpp.texi (__cplusplus): Document value for -std=c++26 and
28007 -std=gnu++26. Document that for C++23, its value is 202302L.
28008 * doc/invoke.texi: Document -std=c++26 and -std=gnu++26.
28009 * dwarf2out.cc (highest_c_language): Handle GNU C++26.
28010 (gen_compile_unit_die): Likewise.
28012 2023-06-23 Jan Hubicka <jh@suse.cz>
28014 * tree-ssa-phiprop.cc (propagate_with_phi): Compute post dominators on
28016 (pass_phiprop::execute): Do not compute it here; return
28017 update_ssa_only_virtuals if something changed.
28018 (pass_data_phiprop): Remove TODO_update_ssa from todos.
28020 2023-06-23 Michael Meissner <meissner@linux.ibm.com>
28021 Aaron Sawdey <acsawdey@linux.ibm.com>
28024 * config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): Fix problems that
28025 allowed prefixed lwa to be generated.
28026 * config/rs6000/fusion.md: Regenerate.
28027 * config/rs6000/predicates.md (ds_form_mem_operand): Delete.
28028 * config/rs6000/rs6000.md (prefixed attribute): Add support for load
28029 plus compare immediate fused insns.
28030 (maybe_prefixed): Likewise.
28032 2023-06-23 Roger Sayle <roger@nextmovesoftware.com>
28034 * simplify-rtx.cc (simplify_subreg): Optimize lowpart SUBREGs
28035 of ASHIFT to const0_rtx with sufficiently large shift count.
28036 Optimize highpart SUBREGs of ASHIFT as the shift operand when
28037 the shift count is the correct offset. Optimize SUBREGs of
28038 multi-word logic operations if the SUBREGs of both operands
28041 2023-06-23 Richard Biener <rguenther@suse.de>
28043 * varasm.cc (initializer_constant_valid_p_1): Only
28044 allow conversions between scalar floating point types.
28046 2023-06-23 Richard Biener <rguenther@suse.de>
28048 * tree-vect-stmts.cc (vectorizable_assignment):
28049 Properly handle non-integral operands when analyzing
28052 2023-06-23 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
28054 PR tree-optimization/110280
28055 * match.pd (vec_perm_expr(v, v, mask) -> v): Explicitly build vector
28056 using build_vector_from_val with the element of input operand, and
28057 mask's type if operand and mask's types don't match.
28059 2023-06-23 Richard Biener <rguenther@suse.de>
28061 * fold-const.cc (tree_simple_nonnegative_warnv_p): Guard
28062 the truth_value_p case with !VECTOR_TYPE_P.
28064 2023-06-23 Richard Biener <rguenther@suse.de>
28066 * tree-vect-patterns.cc (vect_look_through_possible_promotion):
28067 Exit early when the type isn't scalar integral.
28069 2023-06-23 Richard Biener <rguenther@suse.de>
28071 * match.pd ((outertype)((innertype0)a+(innertype1)b)
28072 -> ((newtype)a+(newtype)b)): Use element_precision
28075 2023-06-23 Richard Biener <rguenther@suse.de>
28077 * fold-const.cc (fold_binary_loc): Use element_precision
28078 when trying (double)float1 CMP (double)float2 to
28079 float1 CMP float2 simplification.
28080 * match.pd: Likewise.
28082 2023-06-23 Richard Biener <rguenther@suse.de>
28084 * tree-vect-stmts.cc (vectorizable_load): Avoid useless
28085 copies of VMAT_INVARIANT vectorized stmts, fix SLP support.
28087 2023-06-23 Richard Biener <rguenther@suse.de>
28089 * tree-vect-stmts.cc (vector_vector_composition_type):
28090 Handle composition of a vector from a number of elements that
28091 happens to match its number of lanes.
28093 2023-06-22 Marek Polacek <polacek@redhat.com>
28095 * configure.ac (--enable-host-bind-now): New check. Add
28096 -Wl,-z,now to LD_PICFLAG if --enable-host-bind-now.
28097 * configure: Regenerate.
28098 * doc/install.texi: Document --enable-host-bind-now.
28100 2023-06-22 Di Zhao OS <dizhao@os.amperecomputing.com>
28102 * config/aarch64/aarch64.cc: Change fma_reassoc_width for ampere1.
28104 2023-06-22 Richard Biener <rguenther@suse.de>
28106 PR tree-optimization/110332
28107 * tree-ssa-phiprop.cc (propagate_with_phi): Always
28108 check aliasing with edge inserted loads.
28110 2023-06-22 Roger Sayle <roger@nextmovesoftware.com>
28111 Uros Bizjak <ubizjak@gmail.com>
28113 * config/i386/i386-expand.cc (ix86_expand_sse_ptest): Recognize
28114 expansion of ptestc with equal operands as producing const1_rtx.
28115 * config/i386/i386.cc (ix86_rtx_costs): Provide accurate cost
28116 estimates of UNSPEC_PTEST, where the ptest performs the PAND
28117 or PAND of its operands.
28118 * config/i386/sse.md (define_split): Transform CCCmode UNSPEC_PTEST
28119 of reg_equal_p operands into an x86_stc instruction.
28120 (define_split): Split pandn/ptestz/set{n?}e into ptestc/set{n?}c.
28121 (define_split): Similar to above for strict_low_part destinations.
28122 (define_split): Split pandn/ptestz/j{n?}e into ptestc/j{n?}c.
28124 2023-06-22 David Malcolm <dmalcolm@redhat.com>
28127 * Makefile.in (ANALYZER_OBJS): Add analyzer/access-diagram.o.
28128 * doc/invoke.texi (Wanalyzer-out-of-bounds): Add description of
28130 (fanalyzer-debug-text-art): New.
28132 2023-06-22 David Malcolm <dmalcolm@redhat.com>
28134 * Makefile.in (OBJS-libcommon): Add text-art/box-drawing.o,
28135 text-art/canvas.o, text-art/ruler.o, text-art/selftests.o,
28136 text-art/style.o, text-art/styled-string.o, text-art/table.o,
28137 text-art/theme.o, and text-art/widget.o.
28138 * color-macros.h (COLOR_FG_BRIGHT_BLACK): New.
28139 (COLOR_FG_BRIGHT_RED): New.
28140 (COLOR_FG_BRIGHT_GREEN): New.
28141 (COLOR_FG_BRIGHT_YELLOW): New.
28142 (COLOR_FG_BRIGHT_BLUE): New.
28143 (COLOR_FG_BRIGHT_MAGENTA): New.
28144 (COLOR_FG_BRIGHT_CYAN): New.
28145 (COLOR_FG_BRIGHT_WHITE): New.
28146 (COLOR_BG_BRIGHT_BLACK): New.
28147 (COLOR_BG_BRIGHT_RED): New.
28148 (COLOR_BG_BRIGHT_GREEN): New.
28149 (COLOR_BG_BRIGHT_YELLOW): New.
28150 (COLOR_BG_BRIGHT_BLUE): New.
28151 (COLOR_BG_BRIGHT_MAGENTA): New.
28152 (COLOR_BG_BRIGHT_CYAN): New.
28153 (COLOR_BG_BRIGHT_WHITE): New.
28154 * common.opt (fdiagnostics-text-art-charset=): New option.
28155 (diagnostic-text-art.h): New SourceInclude.
28156 (diagnostic_text_art_charset) New Enum and EnumValues.
28157 * configure: Regenerate.
28158 * configure.ac (gccdepdir): Add text-art to loop.
28159 * diagnostic-diagram.h: New file.
28160 * diagnostic-format-json.cc (json_emit_diagram): New.
28161 (diagnostic_output_format_init_json): Wire it up to
28162 context->m_diagrams.m_emission_cb.
28163 * diagnostic-format-sarif.cc: Include "diagnostic-diagram.h" and
28164 "text-art/canvas.h".
28165 (sarif_result::on_nested_diagnostic): Move code to...
28166 (sarif_result::add_related_location): ...this new function.
28167 (sarif_result::on_diagram): New.
28168 (sarif_builder::emit_diagram): New.
28169 (sarif_builder::make_message_object_for_diagram): New.
28170 (sarif_emit_diagram): New.
28171 (diagnostic_output_format_init_sarif): Set
28172 context->m_diagrams.m_emission_cb to sarif_emit_diagram.
28173 * diagnostic-text-art.h: New file.
28174 * diagnostic.cc: Include "diagnostic-text-art.h",
28175 "diagnostic-diagram.h", and "text-art/theme.h".
28176 (diagnostic_initialize): Initialize context->m_diagrams and
28177 call diagnostics_text_art_charset_init.
28178 (diagnostic_finish): Clean up context->m_diagrams.m_theme.
28179 (diagnostic_emit_diagram): New.
28180 (diagnostics_text_art_charset_init): New.
28181 * diagnostic.h (text_art::theme): New forward decl.
28182 (class diagnostic_diagram): Likewise.
28183 (diagnostic_context::m_diagrams): New field.
28184 (diagnostic_emit_diagram): New decl.
28185 * doc/invoke.texi (Diagnostic Message Formatting Options): Add
28186 -fdiagnostics-text-art-charset=.
28187 (-fdiagnostics-plain-output): Add
28188 -fdiagnostics-text-art-charset=none.
28189 * gcc.cc: Include "diagnostic-text-art.h".
28190 (driver_handle_option): Handle OPT_fdiagnostics_text_art_charset_.
28191 * opts-common.cc (decode_cmdline_options_to_array): Add
28192 "-fdiagnostics-text-art-charset=none" to expanded_args for
28193 -fdiagnostics-plain-output.
28194 * opts.cc: Include "diagnostic-text-art.h".
28195 (common_handle_option): Handle OPT_fdiagnostics_text_art_charset_.
28196 * pretty-print.cc (pp_unicode_character): New.
28197 * pretty-print.h (pp_unicode_character): New decl.
28198 * selftest-run-tests.cc: Include "text-art/selftests.h".
28199 (selftest::run_tests): Call text_art_tests.
28200 * text-art/box-drawing-chars.inc: New file, generated by
28201 contrib/unicode/gen-box-drawing-chars.py.
28202 * text-art/box-drawing.cc: New file.
28203 * text-art/box-drawing.h: New file.
28204 * text-art/canvas.cc: New file.
28205 * text-art/canvas.h: New file.
28206 * text-art/ruler.cc: New file.
28207 * text-art/ruler.h: New file.
28208 * text-art/selftests.cc: New file.
28209 * text-art/selftests.h: New file.
28210 * text-art/style.cc: New file.
28211 * text-art/styled-string.cc: New file.
28212 * text-art/table.cc: New file.
28213 * text-art/table.h: New file.
28214 * text-art/theme.cc: New file.
28215 * text-art/theme.h: New file.
28216 * text-art/types.h: New file.
28217 * text-art/widget.cc: New file.
28218 * text-art/widget.h: New file.
28220 2023-06-21 Uros Bizjak <ubizjak@gmail.com>
28222 * function.h (emit_initial_value_sets):
28223 Change return type from int to void.
28224 (aggregate_value_p): Change return type from int to bool.
28225 (prologue_contains): Ditto.
28226 (epilogue_contains): Ditto.
28227 (prologue_epilogue_contains): Ditto.
28228 * function.cc (temp_slot): Make "in_use" variable bool.
28229 (make_slot_available): Update for changed "in_use" variable.
28230 (assign_stack_temp_for_type): Ditto.
28231 (emit_initial_value_sets): Change return type from int to void
28232 and update function body accordingly.
28233 (instantiate_virtual_regs): Ditto.
28234 (rest_of_handle_thread_prologue_and_epilogue): Ditto.
28235 (safe_insn_predicate): Change return type from int to bool.
28236 (aggregate_value_p): Change return type from int to bool
28237 and update function body accordingly.
28238 (prologue_contains): Change return type from int to bool.
28239 (prologue_epilogue_contains): Ditto.
28241 2023-06-21 Alexander Monakov <amonakov@ispras.ru>
28243 * common.opt (fp_contract_mode) [on]: Remove fallback.
28244 * config/sh/sh.md (*fmasf4): Correct flag_fp_contract_mode test.
28245 * doc/invoke.texi (-ffp-contract): Update.
28246 * trans-mem.cc (diagnose_tm_1): Skip internal function calls.
28248 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28250 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
28251 Add alternatives to prefer to avoid same input and output Z register.
28252 (mask_gather_load<mode><v_int_container>): Likewise.
28253 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
28254 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
28255 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
28256 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
28258 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
28260 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
28261 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
28262 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
28263 <SVE_2BHSI:mode>_sxtw): Likewise.
28264 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
28265 <SVE_2BHSI:mode>_uxtw): Likewise.
28266 (@aarch64_ldff1_gather<mode>): Likewise.
28267 (@aarch64_ldff1_gather<mode>): Likewise.
28268 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
28269 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
28270 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
28271 <VNx4_NARROW:mode>): Likewise.
28272 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
28273 <VNx2_NARROW:mode>): Likewise.
28274 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
28275 <VNx2_NARROW:mode>_sxtw): Likewise.
28276 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
28277 <VNx2_NARROW:mode>_uxtw): Likewise.
28278 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
28279 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
28280 <SVE_PARTIAL_I:mode>): Likewise.
28282 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28284 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
28285 Convert to compact alternatives syntax.
28286 (mask_gather_load<mode><v_int_container>): Likewise.
28287 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
28288 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
28289 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
28290 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
28292 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
28294 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
28295 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
28296 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
28297 <SVE_2BHSI:mode>_sxtw): Likewise.
28298 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
28299 <SVE_2BHSI:mode>_uxtw): Likewise.
28300 (@aarch64_ldff1_gather<mode>): Likewise.
28301 (@aarch64_ldff1_gather<mode>): Likewise.
28302 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
28303 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
28304 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
28305 <VNx4_NARROW:mode>): Likewise.
28306 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
28307 <VNx2_NARROW:mode>): Likewise.
28308 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
28309 <VNx2_NARROW:mode>_sxtw): Likewise.
28310 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
28311 <VNx2_NARROW:mode>_uxtw): Likewise.
28312 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
28313 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
28314 <SVE_PARTIAL_I:mode>): Likewise.
28316 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28319 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28321 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
28322 Convert to compact alternatives syntax.
28323 (mask_gather_load<mode><v_int_container>): Likewise.
28324 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
28325 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
28326 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
28327 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
28329 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
28331 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
28332 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
28333 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
28334 <SVE_2BHSI:mode>_sxtw): Likewise.
28335 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
28336 <SVE_2BHSI:mode>_uxtw): Likewise.
28337 (@aarch64_ldff1_gather<mode>): Likewise.
28338 (@aarch64_ldff1_gather<mode>): Likewise.
28339 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
28340 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
28341 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
28342 <VNx4_NARROW:mode>): Likewise.
28343 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
28344 <VNx2_NARROW:mode>): Likewise.
28345 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
28346 <VNx2_NARROW:mode>_sxtw): Likewise.
28347 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
28348 <VNx2_NARROW:mode>_uxtw): Likewise.
28349 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
28350 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
28351 <SVE_PARTIAL_I:mode>): Likewise.
28353 2023-06-21 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
28355 * optabs-query.cc (can_vec_mask_load_store_p): Move to optabs-tree.cc.
28356 (get_len_load_store_mode): Ditto.
28357 * optabs-query.h (can_vec_mask_load_store_p): Move to optabs-tree.h.
28358 (get_len_load_store_mode): Ditto.
28359 * optabs-tree.cc (can_vec_mask_load_store_p): New function.
28360 (get_len_load_store_mode): Ditto.
28361 * optabs-tree.h (can_vec_mask_load_store_p): Ditto.
28362 (get_len_load_store_mode): Ditto.
28363 * tree-if-conv.cc: include optabs-tree instead of optabs-query
28365 2023-06-21 Richard Biener <rguenther@suse.de>
28367 * tree-ssa-loop-ivopts.cc (add_iv_candidate_for_use): Use
28368 split_constant_offset for the POINTER_PLUS_EXPR case.
28370 2023-06-21 Richard Biener <rguenther@suse.de>
28372 * tree-ssa-loop-ivopts.cc (record_group_use): Use
28373 split_constant_offset.
28375 2023-06-21 Richard Biener <rguenther@suse.de>
28377 * tree-loop-distribution.cc (classify_builtin_st): Use
28378 split_constant_offset.
28379 * tree-ssa-loop-ivopts.h (strip_offset): Remove.
28380 * tree-ssa-loop-ivopts.cc (strip_offset): Make static.
28382 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28384 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
28385 Convert to compact alternatives syntax.
28386 (mask_gather_load<mode><v_int_container>): Likewise.
28387 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
28388 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
28389 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
28390 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
28392 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
28394 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
28395 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
28396 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
28397 <SVE_2BHSI:mode>_sxtw): Likewise.
28398 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
28399 <SVE_2BHSI:mode>_uxtw): Likewise.
28400 (@aarch64_ldff1_gather<mode>): Likewise.
28401 (@aarch64_ldff1_gather<mode>): Likewise.
28402 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
28403 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
28404 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
28405 <VNx4_NARROW:mode>): Likewise.
28406 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
28407 <VNx2_NARROW:mode>): Likewise.
28408 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
28409 <VNx2_NARROW:mode>_sxtw): Likewise.
28410 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
28411 <VNx2_NARROW:mode>_uxtw): Likewise.
28412 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
28413 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
28414 <SVE_PARTIAL_I:mode>): Likewise.
28416 2023-06-21 Tamar Christina <tamar.christina@arm.com>
28419 * doc/md.texi: Replace backslashchar.
28421 2023-06-21 Richard Biener <rguenther@suse.de>
28423 * config/i386/i386.cc (ix86_vector_costs::finish_cost):
28424 Overload. For masked main loops make sure the vectorization
28425 factor isn't more than double the number of iterations.
28427 2023-06-21 Jan Beulich <jbeulich@suse.com>
28429 * config/i386/i386-expand.cc (ix86_expand_copysign): Request
28430 value duplication by ix86_build_signbit_mask() when AVX512F and
28432 * config/i386/sse.md (*<avx512>_vternlog<mode>_all): Convert to
28433 2-alternative form. Adjust "mode" attribute. Add "enabled"
28435 (*<avx512>_vpternlog<mode>_1): Also permit when TARGET_AVX512F
28436 && !TARGET_PREFER_AVX256.
28437 (*<avx512>_vpternlog<mode>_2): Likewise.
28438 (*<avx512>_vpternlog<mode>_3): Likewise.
28440 2023-06-21 liuhongt <hongtao.liu@intel.com>
28443 * tree-vect-stmts.cc (vectorizable_conversion): Use
28444 intermiediate integer type for float_expr/fix_trunc_expr when
28445 direct optab is not existed.
28447 2023-06-20 Tamar Christina <tamar.christina@arm.com>
28449 PR bootstrap/110324
28450 * gensupport.cc (convert_syntax): Explicitly check for RTX code.
28452 2023-06-20 Richard Sandiford <richard.sandiford@arm.com>
28454 * config/aarch64/aarch64.md (stack_tie): Hard-code the first
28455 register operand to the stack pointer. Require the second register
28456 operand to have the number specified in a separate const_int operand.
28457 * config/aarch64/aarch64.cc (aarch64_emit_stack_tie): New function.
28458 (aarch64_allocate_and_probe_stack_space): Use it.
28459 (aarch64_expand_prologue, aarch64_expand_epilogue): Likewise.
28460 (aarch64_expand_epilogue): Likewise.
28462 2023-06-20 Jakub Jelinek <jakub@redhat.com>
28464 PR middle-end/79173
28465 * tree-ssa-math-opts.cc (match_uaddc_usubc): Remember lhs of
28466 IMAGPART_EXPR of arg2/arg3 and use that as arg3 if it has the right
28469 2023-06-20 Uros Bizjak <ubizjak@gmail.com>
28471 * calls.h (setjmp_call_p): Change return type from int to bool.
28472 * calls.cc (struct arg_data): Change "pass_on_stack" to bool.
28473 (store_one_arg): Change return type from int to bool
28474 and adjust function body accordingly. Change "sibcall_failure"
28476 (finalize_must_preallocate): Ditto. Change *must_preallocate pointer
28477 argument to bool. Change "partial_seen" variable to bool.
28478 (load_register_parameters): Change *sibcall_failure
28479 pointer argument to bool.
28480 (check_sibcall_argument_overlap_1): Change return type from int to bool
28481 and adjust function body accordingly.
28482 (check_sibcall_argument_overlap): Ditto. Change
28483 "mark_stored_args_map" argument to bool.
28484 (emit_call_1): Change "already_popped" variable to bool.
28485 (setjmp_call_p): Change return type from int to bool
28486 and adjust function body accordingly.
28487 (initialize_argument_information): Change *must_preallocate
28488 pointer argument to bool.
28489 (expand_call): Change "pcc_struct_value", "must_preallocate"
28490 and "sibcall_failure" variables to bool.
28491 (emit_library_call_value_1): Change "pcc_struct_value"
28494 2023-06-20 Martin Jambor <mjambor@suse.cz>
28497 * ipa-sra.cc (struct caller_issues): New field there_is_one.
28498 (check_for_caller_issues): Set it.
28499 (check_all_callers_for_issues): Check it.
28501 2023-06-20 Martin Jambor <mjambor@suse.cz>
28503 * ipa-prop.h (ipa_uid_to_idx_map_elt): New type.
28504 (struct ipcp_transformation): Rearrange members according to
28505 C++ class coding convention, add m_uid_to_idx,
28506 get_param_index and maybe_create_parm_idx_map.
28507 * ipa-cp.cc (ipcp_transformation::get_param_index): New function.
28508 (compare_uids): Likewise.
28509 (ipcp_transformation::maype_create_parm_idx_map): Likewise.
28510 * ipa-prop.cc (ipcp_get_parm_bits): Use get_param_index.
28511 (ipcp_update_bits): Accept TS as a parameter, assume it is not NULL.
28512 (ipcp_update_vr): Likewise.
28513 (ipcp_transform_function): Call, maybe_create_parm_idx_map of TS, bail
28514 out quickly if empty, pass it to ipcp_update_bits and ipcp_update_vr.
28516 2023-06-20 Carl Love <cel@us.ibm.com>
28518 * config/rs6000/rs6000-builtin.cc (rs6000_expand_builtin):
28519 Rename CODE_FOR_xsxsigqp_tf to CODE_FOR_xsxsigqp_tf_ti.
28520 Rename CODE_FOR_xsxsigqp_kf to CODE_FOR_xsxsigqp_kf_ti.
28521 Rename CCDE_FOR_xsxexpqp_tf to CODE_FOR_xsxexpqp_tf_di.
28522 Rename CODE_FOR_xsxexpqp_kf to CODE_FOR_xsxexpqp_kf_di.
28523 (CODE_FOR_xsxexpqp_kf_v2di, CODE_FOR_xsxsigqp_kf_v1ti,
28524 CODE_FOR_xsiexpqp_kf_v2di): Add case statements.
28525 * config/rs6000/rs6000-builtins.def
28526 (__builtin_vsx_scalar_extract_exp_to_vec,
28527 __builtin_vsx_scalar_extract_sig_to_vec,
28528 __builtin_vsx_scalar_insert_exp_vqp): Add new builtin definitions.
28529 Rename xsxexpqp_kf, xsxsigqp_kf, xsiexpqp_kf to xsexpqp_kf_di,
28530 xsxsigqp_kf_ti, xsiexpqp_kf_di respectively.
28531 * config/rs6000/rs6000-c.cc (altivec_resolve_overloaded_builtin):
28532 Update case RS6000_OVLD_VEC_VSIE to handle MODE_VECTOR_INT for new
28533 overloaded instance. Update comments.
28534 * config/rs6000/rs6000-overload.def
28535 (__builtin_vec_scalar_insert_exp): Add new overload definition with
28537 (scalar_extract_exp_to_vec, scalar_extract_sig_to_vec): New
28538 overloaded definitions.
28539 * config/rs6000/vsx.md (V2DI_DI): New mode iterator.
28540 (DI_to_TI): New mode attribute.
28541 Rename xsxexpqp_<mode> to sxexpqp_<IEEE128:mode>_<V2DI_DI:mode>.
28542 Rename xsxsigqp_<mode> to xsxsigqp_<IEEE128:mode>_<VEC_TI:mode>.
28543 Rename xsiexpqp_<mode> to xsiexpqp_<IEEE128:mode>_<V2DI_DI:mode>.
28544 * doc/extend.texi (scalar_extract_exp_to_vec,
28545 scalar_extract_sig_to_vec): Add documentation for new builtins.
28546 (scalar_insert_exp): Add new overloaded builtin definition.
28548 2023-06-20 Li Xu <xuli1@eswincomputing.com>
28550 * config/riscv/riscv.cc (riscv_regmode_natural_size): set the natural
28551 size of vector mask mode to one rvv register.
28553 2023-06-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28555 * config/riscv/riscv-v.cc (expand_const_vector): Optimize codegen.
28557 2023-06-20 Lehua Ding <lehua.ding@rivai.ai>
28559 * config/riscv/riscv.cc (riscv_arg_has_vector): Add default
28562 2023-06-20 Richard Biener <rguenther@suse.de>
28564 * tree-ssa-dse.cc (dse_classify_store): When we found
28565 no defs and the basic-block with the original definition
28566 ends in __builtin_unreachable[_trap] the store is dead.
28568 2023-06-20 Richard Biener <rguenther@suse.de>
28570 * tree-ssa-phiprop.cc (phiprop_insert_phi): For simple loads
28571 keep the virtual SSA form up-to-date.
28573 2023-06-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28575 * config/aarch64/aarch64-simd.md (*aarch64_addp_same_reg<mode>):
28576 New define_insn_and_split.
28578 2023-06-20 Tamar Christina <tamar.christina@arm.com>
28580 * config/aarch64/aarch64.md (*mov<mode>_aarch64): Drop test comment.
28582 2023-06-20 Jan Beulich <jbeulich@suse.com>
28584 * config/i386/sse.md (vec_dupv2di): Correct %vmovddup input
28585 constraint. Add new AVX512F alternative.
28587 2023-06-20 Richard Biener <rguenther@suse.de>
28590 * dwarf2out.cc (process_scope_var): Continue processing
28591 the decl after setting a parent in case the existing DIE
28594 2023-06-20 Lehua Ding <lehua.ding@rivai.ai>
28596 * config/riscv/riscv.cc (riscv_scalable_vector_type_p): Delete.
28597 (riscv_arg_has_vector): Simplify.
28598 (riscv_pass_in_vector_p): Adjust warning message.
28600 2023-06-19 Jin Ma <jinma@linux.alibaba.com>
28602 * config/riscv/riscv.cc (riscv_compute_frame_info): Allocate frame for FCSR.
28603 (riscv_for_each_saved_reg): Save and restore FCSR in interrupt functions.
28604 * config/riscv/riscv.md (riscv_frcsr): New patterns.
28605 (riscv_fscsr): Likewise.
28607 2023-06-19 Toru Kisuki <tkisuki@tachyum.com>
28609 PR rtl-optimization/110305
28610 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
28611 Handle HONOR_SNANS for x + 0.0.
28613 2023-06-19 Jan Hubicka <jh@suse.cz>
28615 PR tree-optimization/109811
28616 PR tree-optimization/109849
28617 * passes.def: Add phiprop to early optimization passes.
28618 * tree-ssa-phiprop.cc: Allow clonning.
28620 2023-06-19 Tamar Christina <tamar.christina@arm.com>
28622 * config/aarch64/aarch64.md (arches): Add nosimd.
28623 (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Rewrite to
28626 2023-06-19 Tamar Christina <tamar.christina@arm.com>
28627 Omar Tahir <Omar.Tahir2@arm.com>
28629 * gensupport.cc (class conlist, add_constraints, add_attributes,
28630 skip_spaces, expect_char, preprocess_compact_syntax,
28631 parse_section_layout, parse_section, convert_syntax): New.
28632 (process_rtx): Check for conversion.
28633 * genoutput.cc (process_template): Check for unresolved iterators.
28634 (class data): Add compact_syntax_p.
28635 (gen_insn): Use it.
28636 * gensupport.h (compact_syntax): New.
28637 (hash-set.h): Include.
28638 * doc/md.texi: Document it.
28640 2023-06-19 Uros Bizjak <ubizjak@gmail.com>
28642 * recog.h (check_asm_operands): Change return type from int to bool.
28643 (insn_invalid_p): Ditto.
28644 (verify_changes): Ditto.
28645 (apply_change_group): Ditto.
28646 (constrain_operands): Ditto.
28647 (constrain_operands_cached): Ditto.
28648 (validate_replace_rtx_subexp): Ditto.
28649 (validate_replace_rtx): Ditto.
28650 (validate_replace_rtx_part): Ditto.
28651 (validate_replace_rtx_part_nosimplify): Ditto.
28652 (added_clobbers_hard_reg_p): Ditto.
28653 (peep2_regno_dead_p): Ditto.
28654 (peep2_reg_dead_p): Ditto.
28655 (store_data_bypass_p): Ditto.
28656 (if_test_bypass_p): Ditto.
28657 * rtl.h (split_all_insns_noflow): Change
28658 return type from unsigned int to void.
28659 * genemit.cc (output_added_clobbers_hard_reg_p): Change return type
28660 of generated added_clobbers_hard_reg_p from int to bool and adjust
28661 function body accordingly. Change "used" variable type from
28663 * recog.cc (check_asm_operands): Change return type
28664 from int to bool and adjust function body accordingly.
28665 (insn_invalid_p): Ditto. Change "is_asm" variable to bool.
28666 (verify_changes): Change return type from int to bool.
28667 (apply_change_group): Change return type from int to bool
28668 and adjust function body accordingly.
28669 (validate_replace_rtx_subexp): Change return type from int to bool.
28670 (validate_replace_rtx): Ditto.
28671 (validate_replace_rtx_part): Ditto.
28672 (validate_replace_rtx_part_nosimplify): Ditto.
28673 (constrain_operands_cached): Ditto.
28674 (constrain_operands): Ditto. Change "lose" and "win"
28675 variables type from int to bool.
28676 (split_all_insns_noflow): Change return type from unsigned int
28677 to void and adjust function body accordingly.
28678 (peep2_regno_dead_p): Change return type from int to bool.
28679 (peep2_reg_dead_p): Ditto.
28680 (peep2_find_free_register): Change "success"
28681 variable type from int to bool
28682 (store_data_bypass_p_1): Change return type from int to bool.
28683 (store_data_bypass_p): Ditto.
28685 2023-06-19 Li Xu <xuli1@eswincomputing.com>
28687 * config/riscv/vector-iterators.md: zvfh/zvfhmin depends on the
28690 2023-06-19 Pan Li <pan2.li@intel.com>
28693 * config/riscv/riscv-vector-builtins-bases.cc: Adjust expand for
28695 * config/riscv/vector-iterators.md: Remove VWLMUL1, VWLMUL1_ZVE64,
28696 VWLMUL1_ZVE32, VI_ZVE64, VI_ZVE32, VWI, VWI_ZVE64, VWI_ZVE32,
28697 VF_ZVE63 and VF_ZVE32.
28698 * config/riscv/vector.md
28699 (@pred_widen_reduc_plus<v_su><mode><vwlmul1>): Removed.
28700 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve64>): Ditto.
28701 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve32>): Ditto.
28702 (@pred_widen_reduc_plus<order><mode><vwlmul1>): Ditto.
28703 (@pred_widen_reduc_plus<order><mode><vwlmul1_zve64>): Ditto.
28704 (@pred_widen_reduc_plus<v_su><VQI:mode><VHI_LMUL1:mode>): New pattern.
28705 (@pred_widen_reduc_plus<v_su><VHI:mode><VSI_LMUL1:mode>): Ditto.
28706 (@pred_widen_reduc_plus<v_su><VSI:mode><VDI_LMUL1:mode>): Ditto.
28707 (@pred_widen_reduc_plus<order><VHF:mode><VSF_LMUL1:mode>): Ditto.
28708 (@pred_widen_reduc_plus<order><VSF:mode><VDF_LMUL1:mode>): Ditto.
28710 2023-06-19 Pan Li <pan2.li@intel.com>
28713 * config/riscv/riscv-vector-builtins-bases.cc: Adjust expand for
28715 * config/riscv/vector-iterators.md: Add VHF, VSF, VDF,
28716 VHF_LMUL1, VSF_LMUL1, VDF_LMUL1, and remove unused attr.
28717 * config/riscv/vector.md (@pred_reduc_<reduc><mode><vlmul1>): Removed.
28718 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Ditto.
28719 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Ditto.
28720 (@pred_reduc_plus<order><mode><vlmul1>): Ditto.
28721 (@pred_reduc_plus<order><mode><vlmul1_zve32>): Ditto.
28722 (@pred_reduc_plus<order><mode><vlmul1_zve64>): Ditto.
28723 (@pred_reduc_<reduc><VHF:mode><VHF_LMUL1:mode>): New pattern.
28724 (@pred_reduc_<reduc><VSF:mode><VSF_LMUL1:mode>): Ditto.
28725 (@pred_reduc_<reduc><VDF:mode><VDF_LMUL1:mode>): Ditto.
28726 (@pred_reduc_plus<order><VHF:mode><VHF_LMUL1:mode>): Ditto.
28727 (@pred_reduc_plus<order><VSF:mode><VSF_LMUL1:mode>): Ditto.
28728 (@pred_reduc_plus<order><VDF:mode><VDF_LMUL1:mode>): Ditto.
28730 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
28732 * config/gcn/gcn.cc (gcn_expand_divmod_libfunc): New function.
28733 (gcn_init_libfuncs): Add div and mod functions for all modes.
28734 Add placeholders for divmod functions.
28735 (TARGET_EXPAND_DIVMOD_LIBFUNC): Define.
28737 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
28739 * tree-vect-generic.cc: Include optabs-libfuncs.h.
28740 (get_compute_type): Check optab_libfunc.
28741 * tree-vect-stmts.cc: Include optabs-libfuncs.h.
28742 (vectorizable_operation): Check optab_libfunc.
28744 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
28746 * config/gcn/gcn-protos.h (vgpr_4reg_mode_p): New function.
28747 * config/gcn/gcn-valu.md (V_4REG, V_4REG_ALT): New iterators.
28748 (V_MOV, V_MOV_ALT): Likewise.
28749 (scalar_mode, SCALAR_MODE): Add TImode.
28750 (vnsi, VnSI, vndi, VnDI): Likewise.
28751 (vec_merge, vec_merge_with_clobber, vec_merge_with_vcc): Use V_MOV.
28752 (mov<mode>, mov<mode>_unspec): Use V_MOV.
28753 (*mov<mode>_4reg): New insn.
28754 (mov<mode>_exec): New 4reg variant.
28755 (mov<mode>_sgprbase): Likewise.
28756 (reload_in<mode>, reload_out<mode>): Use V_MOV.
28757 (vec_set<mode>): Likewise.
28758 (vec_duplicate<mode><exec>): New 4reg variant.
28759 (vec_extract<mode><scalar_mode>): Likewise.
28760 (vec_extract<V_ALL:mode><V_ALL_ALT:mode>): Rename to ...
28761 (vec_extract<V_MOV:mode><V_MOV_ALT:mode>): ... this, and use V_MOV.
28762 (vec_extract<V_4REG:mode><V_4REG_ALT:mode>_nop): New 4reg variant.
28763 (fold_extract_last_<mode>): Use V_MOV.
28764 (vec_init<V_ALL:mode><V_ALL_ALT:mode>): Rename to ...
28765 (vec_init<V_MOV:mode><V_MOV_ALT:mode>): ... this, and use V_MOV.
28766 (gather_load<mode><vnsi>, gather<mode>_expr<exec>,
28767 gather<mode>_insn_1offset<exec>, gather<mode>_insn_1offset_ds<exec>,
28768 gather<mode>_insn_2offsets<exec>): Use V_MOV.
28769 (scatter_store<mode><vnsi>, scatter<mode>_expr<exec_scatter>,
28770 scatter<mode>_insn_1offset<exec_scatter>,
28771 scatter<mode>_insn_1offset_ds<exec_scatter>,
28772 scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
28773 (maskload<mode>di, maskstore<mode>di, mask_gather_load<mode><vnsi>,
28774 mask_scatter_store<mode><vnsi>): Likewise.
28775 * config/gcn/gcn.cc (gcn_class_max_nregs): Use vgpr_4reg_mode_p.
28776 (gcn_hard_regno_mode_ok): Likewise.
28777 (GEN_VNM): Add TImode support.
28778 (USE_TI): New macro. Separate TImode operations from non-TImode ones.
28779 (gcn_vector_mode_supported_p): Add V64TImode, V32TImode, V16TImode,
28780 V8TImode, and V2TImode.
28781 (print_operand): Add 'J' and 'K' print codes.
28783 2023-06-19 Richard Biener <rguenther@suse.de>
28785 PR tree-optimization/110298
28786 * tree-ssa-loop-ivcanon.cc (tree_unroll_loops_completely):
28787 Clear number of iterations info before cleaning up the CFG.
28789 2023-06-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28791 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
28792 Simplify vec_concat of lowpart subreg and high part vec_select.
28794 2023-06-19 Tobias Burnus <tobias@codesourcery.com>
28796 * doc/invoke.texi (-foffload-options): Remove '-O3' from the examples.
28798 2023-06-19 Richard Sandiford <richard.sandiford@arm.com>
28800 * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors):
28801 Handle null niters_skip.
28803 2023-06-19 Richard Biener <rguenther@suse.de>
28805 * config/aarch64/aarch64.cc
28806 (aarch64_vector_costs::analyze_loop_vinfo): Fix reference
28807 to LOOP_VINFO_MASKS.
28809 2023-06-19 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
28812 * common/config/avr/avr-common.cc: Remove setting
28813 of OPT_fdelete_null_pointer_checks.
28814 * config/avr/avr.cc (avr_option_override): Clear
28815 flag_delete_null_pointer_checks if zero_address_valid.
28816 (avr_addr_space_zero_address_valid): New function.
28817 (TARGET_ADDR_SPACE_ZERO_ADDRESS_VALID): Provide target
28820 2023-06-19 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
28821 Robin Dapp <rdapp.gcc@gmail.com>
28823 * doc/md.texi: Add len_mask{load,store}.
28824 * genopinit.cc (main): Ditto.
28826 * internal-fn.cc (len_maskload_direct): Ditto.
28827 (len_maskstore_direct): Ditto.
28828 (expand_call_mem_ref): Ditto.
28829 (expand_partial_load_optab_fn): Ditto.
28830 (expand_len_maskload_optab_fn): Ditto.
28831 (expand_partial_store_optab_fn): Ditto.
28832 (expand_len_maskstore_optab_fn): Ditto.
28833 (direct_len_maskload_optab_supported_p): Ditto.
28834 (direct_len_maskstore_optab_supported_p): Ditto.
28835 * internal-fn.def (LEN_MASK_LOAD): Ditto.
28836 (LEN_MASK_STORE): Ditto.
28837 * optabs.def (OPTAB_CD): Ditto.
28839 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
28841 * config/riscv/autovec.md (<optab><mode>2): Add unop expanders.
28843 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
28845 * config/riscv/autovec.md (<optab><mode>3): Implement binop
28847 * config/riscv/riscv-protos.h (emit_vlmax_fp_insn): Declare.
28848 (enum vxrm_field_enum): Rename this...
28849 (enum fixed_point_rounding_mode): ...to this.
28850 (enum frm_field_enum): Rename this...
28851 (enum floating_point_rounding_mode): ...to this.
28852 * config/riscv/riscv-v.cc (emit_vlmax_fp_insn): New function
28853 * config/riscv/riscv.cc (riscv_const_insns): Clarify const
28855 (riscv_libgcc_floating_mode_supported_p): Adjust comment.
28856 (riscv_excess_precision): Do not convert to float for ZVFH.
28857 * config/riscv/vector-iterators.md: Add VF_AUTO iterator.
28859 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
28861 * config/riscv/vector-iterators.md: Add VI_QH iterator.
28862 * config/riscv/autovec-opt.md
28863 (@pred_extract_first_sextdi<mode>): New vmv.x.s pattern
28864 that includes sign extension.
28865 (@pred_extract_first_sextsi<mode>): Dito for SImode.
28867 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
28869 * config/riscv/autovec.md (vec_set<mode>): Implement.
28870 (vec_extract<mode><vel>): Implement.
28871 * config/riscv/riscv-protos.h (enum insn_type): Add slide insn.
28872 (emit_vlmax_slide_insn): Declare.
28873 (emit_nonvlmax_slide_tu_insn): Declare.
28874 (emit_scalar_move_insn): Export.
28875 (emit_nonvlmax_integer_move_insn): Export.
28876 * config/riscv/riscv-v.cc (emit_vlmax_slide_insn): New function.
28877 (emit_nonvlmax_slide_tu_insn): New function.
28878 (emit_vlmax_masked_mu_insn): No change.
28879 (emit_vlmax_integer_move_insn): Export.
28881 2023-06-19 Richard Biener <rguenther@suse.de>
28883 * tree-vectorizer.h (enum vect_partial_vector_style): New.
28884 (_loop_vec_info::partial_vector_style): Likewise.
28885 (LOOP_VINFO_PARTIAL_VECTORS_STYLE): Likewise.
28886 (rgroup_controls::compare_type): Add.
28887 (vec_loop_masks): Change from a typedef to auto_vec<>
28889 * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors):
28890 Adjust. Convert niters_skip to compare_type.
28891 (vect_set_loop_condition_partial_vectors_avx512): New function
28892 implementing the AVX512 partial vector codegen.
28893 (vect_set_loop_condition): Dispatch to the correct
28894 vect_set_loop_condition_partial_vectors_* function based on
28895 LOOP_VINFO_PARTIAL_VECTORS_STYLE.
28896 (vect_prepare_for_masked_peels): Compute LOOP_VINFO_MASK_SKIP_NITERS
28897 in the original niter type.
28898 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): Initialize
28899 partial_vector_style.
28900 (can_produce_all_loop_masks_p): Adjust.
28901 (vect_verify_full_masking): Produce the rgroup_controls vector
28902 here. Set LOOP_VINFO_PARTIAL_VECTORS_STYLE on success.
28903 (vect_verify_full_masking_avx512): New function implementing
28904 verification of AVX512 style masking.
28905 (vect_verify_loop_lens): Set LOOP_VINFO_PARTIAL_VECTORS_STYLE.
28906 (vect_analyze_loop_2): Also try AVX512 style masking.
28908 (vect_estimate_min_profitable_iters): Implement AVX512 style
28909 mask producing cost.
28910 (vect_record_loop_mask): Do not build the rgroup_controls
28911 vector here but record masks in a hash-set.
28912 (vect_get_loop_mask): Implement AVX512 style mask query,
28913 complementing the existing while_ult style.
28915 2023-06-19 Richard Biener <rguenther@suse.de>
28917 * tree-vectorizer.h (vect_get_loop_mask): Add loop_vec_info
28919 * tree-vect-loop.cc (vect_get_loop_mask): Likewise.
28920 (vectorize_fold_left_reduction): Adjust.
28921 (vect_transform_reduction): Likewise.
28922 (vectorizable_live_operation): Likewise.
28923 * tree-vect-stmts.cc (vectorizable_call): Likewise.
28924 (vectorizable_operation): Likewise.
28925 (vectorizable_store): Likewise.
28926 (vectorizable_load): Likewise.
28927 (vectorizable_condition): Likewise.
28929 2023-06-19 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
28932 * config/avr/avr.opt (mgas-isr-prologues, mmain-is-OS_task):
28933 Add Optimization option property.
28935 2023-06-19 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
28937 * config/xtensa/xtensa.cc (xtensa_constantsynth_2insn):
28938 Add new pattern for the abovementioned case.
28940 2023-06-19 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
28942 * config/xtensa/xtensa.cc
28943 (TARGET_MEMORY_MOVE_COST, xtensa_memory_move_cost): Remove.
28945 2023-06-19 Jiufu Guo <guojiufu@linux.ibm.com>
28947 * config/rs6000/rs6000.cc (TARGET_CONST_ANCHOR): New define.
28949 2023-06-19 Jiufu Guo <guojiufu@linux.ibm.com>
28951 * cse.cc (try_const_anchors): Check SCALAR_INT_MODE.
28953 2023-06-19 liuhongt <hongtao.liu@intel.com>
28956 * config/i386/sse.md (<sse2_avx2>_packsswb<mask_name>):
28958 (sse2_packsswb<mask_name>): .. this, ..
28959 (avx2_packsswb<mask_name>): .. this and ..
28960 (avx512bw_packsswb<mask_name>): .. this.
28961 (<sse2_avx2>_packssdw<mask_name>): Substitute with ..
28962 (sse2_packssdw<mask_name>): .. this, ..
28963 (avx2_packssdw<mask_name>): .. this and ..
28964 (avx512bw_packssdw<mask_name>): .. this.
28966 2023-06-19 liuhongt <hongtao.liu@intel.com>
28969 * config/i386/i386-expand.cc (ix86_split_mmx_pack): Use
28970 UNSPEC_US_TRUNCATE instead of original us_truncate for
28972 * config/i386/mmx.md (mmx_pack<s_trunsuffix>swb): Substitute
28974 (mmx_packsswb): .. this and ..
28975 (mmx_packuswb): .. this.
28976 (mmx_packusdw): Use UNSPEC_US_TRUNCATE instead of original
28978 (s_trunsuffix): Removed code iterator.
28979 (any_s_truncate): Ditto.
28980 * config/i386/sse.md (<sse2_avx2>_packuswb<mask_name>): Use
28981 UNSPEC_US_TRUNCATE instead of original us_truncate.
28982 (<sse4_1_avx2>_packusdw<mask_name>): Ditto.
28983 * config/i386/i386.md (UNSPEC_US_TRUNCATE): New unspec_c_enum.
28985 2023-06-18 Pan Li <pan2.li@intel.com>
28987 * config/riscv/riscv-vector-builtins-bases.cc: Fix one typo.
28989 2023-06-18 Uros Bizjak <ubizjak@gmail.com>
28991 * rtl.h (*rtx_equal_p_callback_function):
28992 Change return type from int to bool.
28993 (rtx_equal_p): Ditto.
28994 (*hash_rtx_callback_function): Ditto.
28995 * rtl.cc (rtx_equal_p): Change return type from int to bool
28996 and adjust function body accordingly.
28997 * early-remat.cc (scratch_equal): Ditto.
28998 * sel-sched-ir.cc (skip_unspecs_callback): Ditto.
28999 (hash_with_unspec_callback): Ditto.
29001 2023-06-18 Jeff Law <jlaw@ventanamicro.com>
29003 * config/arc/arc.md (movqi_insn): Allow certain constants to
29004 be stored into memory in the pattern's condition.
29005 (movsf_insn): Similarly.
29007 2023-06-18 Honza <jh@ryzen3.suse.cz>
29009 PR tree-optimization/109849
29010 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Add new parameter
29011 ES; handle ipa_predicate::not_sra_candidate.
29012 (evaluate_properties_for_edge): Pass es to
29013 evaluate_conditions_for_known_args.
29014 (ipa_fn_summary_t::duplicate): Handle sra candidates.
29015 (dump_ipa_call_summary): Dump points_to_possible_sra_candidate.
29016 (load_or_store_of_ptr_parameter): New function.
29017 (points_to_possible_sra_candidate_p): New function.
29018 (analyze_function_body): Initialize points_to_possible_sra_candidate;
29019 determine sra predicates.
29020 (estimate_ipcp_clone_size_and_time): Update call of
29021 evaluate_conditions_for_known_args.
29022 (remap_edge_params): Update points_to_possible_sra_candidate.
29023 (read_ipa_call_summary): Stream points_to_possible_sra_candidate
29024 (write_ipa_call_summary): Likewise.
29025 * ipa-predicate.cc (ipa_predicate::add_clause): Handle not_sra_candidate.
29026 (dump_condition): Dump it.
29027 * ipa-predicate.h (struct inline_param_summary): Add
29028 points_to_possible_sra_candidate.
29030 2023-06-18 Roger Sayle <roger@nextmovesoftware.com>
29032 * config/i386/i386-expand.cc (ix86_expand_carry): New helper
29033 function for setting the carry flag.
29034 (ix86_expand_builtin) <handlecarry>: Use it here.
29035 * config/i386/i386-protos.h (ix86_expand_carry): Prototype here.
29036 * config/i386/i386.md (uaddc<mode>5): Use ix86_expand_carry.
29037 (usubc<mode>5): Likewise.
29039 2023-06-18 Roger Sayle <roger@nextmovesoftware.com>
29041 * config/i386/i386.md (*concat<mode><dwi>3_1): Use QImode
29042 for the immediate constant shift count.
29043 (*concat<mode><dwi>3_2): Likewise.
29044 (*concat<mode><dwi>3_3): Likewise.
29045 (*concat<mode><dwi>3_4): Likewise.
29046 (*concat<mode><dwi>3_5): Likewise.
29047 (*concat<mode><dwi>3_6): Likewise.
29049 2023-06-18 Uros Bizjak <ubizjak@gmail.com>
29051 * cse.cc (hash_rtx_cb): Rename to hash_rtx.
29052 (hash_rtx): Remove.
29053 * early-remat.cc (remat_candidate_hasher::equal): Update
29054 to call rtx_equal_p with rtx_equal_p_callback_function argument.
29055 * rtl.cc (rtx_equal_p_cb): Rename to rtx_equal_p.
29056 (rtx_equal_p): Remove.
29057 * rtl.h (rtx_equal_p): Add rtx_equal_p_callback_function
29058 argument with NULL default value.
29059 (rtx_equal_p_cb): Remove function declaration.
29060 (hash_rtx_cb): Ditto.
29061 (hash_rtx): Add hash_rtx_callback_function argument
29062 with NULL default value.
29063 * sel-sched-ir.cc (free_nop_pool): Update function comment.
29064 (skip_unspecs_callback): Ditto.
29065 (vinsn_init): Update to call hash_rtx with
29066 hash_rtx_callback_function argument.
29067 (vinsn_equal_p): Ditto.
29069 2023-06-18 yulong <shiyulong@iscas.ac.cn>
29071 * config/riscv/genrvv-type-indexer.cc (valid_type): Enable FP16 tuple.
29072 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
29073 (ADJUST_ALIGNMENT): Ditto.
29074 (RVV_TUPLE_PARTIAL_MODES): Ditto.
29075 (ADJUST_NUNITS): Ditto.
29076 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t):
29078 (vfloat16mf4x3_t): Ditto.
29079 (vfloat16mf4x4_t): Ditto.
29080 (vfloat16mf4x5_t): Ditto.
29081 (vfloat16mf4x6_t): Ditto.
29082 (vfloat16mf4x7_t): Ditto.
29083 (vfloat16mf4x8_t): Ditto.
29084 (vfloat16mf2x2_t): Ditto.
29085 (vfloat16mf2x3_t): Ditto.
29086 (vfloat16mf2x4_t): Ditto.
29087 (vfloat16mf2x5_t): Ditto.
29088 (vfloat16mf2x6_t): Ditto.
29089 (vfloat16mf2x7_t): Ditto.
29090 (vfloat16mf2x8_t): Ditto.
29091 (vfloat16m1x2_t): Ditto.
29092 (vfloat16m1x3_t): Ditto.
29093 (vfloat16m1x4_t): Ditto.
29094 (vfloat16m1x5_t): Ditto.
29095 (vfloat16m1x6_t): Ditto.
29096 (vfloat16m1x7_t): Ditto.
29097 (vfloat16m1x8_t): Ditto.
29098 (vfloat16m2x2_t): Ditto.
29099 (vfloat16m2x3_t): Ditto.
29100 (vfloat16m2x4_t): Ditto.
29101 (vfloat16m4x2_t): Ditto.
29102 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): New macro.
29103 (vfloat16mf4x3_t): Ditto.
29104 (vfloat16mf4x4_t): Ditto.
29105 (vfloat16mf4x5_t): Ditto.
29106 (vfloat16mf4x6_t): Ditto.
29107 (vfloat16mf4x7_t): Ditto.
29108 (vfloat16mf4x8_t): Ditto.
29109 (vfloat16mf2x2_t): Ditto.
29110 (vfloat16mf2x3_t): Ditto.
29111 (vfloat16mf2x4_t): Ditto.
29112 (vfloat16mf2x5_t): Ditto.
29113 (vfloat16mf2x6_t): Ditto.
29114 (vfloat16mf2x7_t): Ditto.
29115 (vfloat16mf2x8_t): Ditto.
29116 (vfloat16m1x2_t): Ditto.
29117 (vfloat16m1x3_t): Ditto.
29118 (vfloat16m1x4_t): Ditto.
29119 (vfloat16m1x5_t): Ditto.
29120 (vfloat16m1x6_t): Ditto.
29121 (vfloat16m1x7_t): Ditto.
29122 (vfloat16m1x8_t): Ditto.
29123 (vfloat16m2x2_t): Ditto.
29124 (vfloat16m2x3_t): Ditto.
29125 (vfloat16m2x4_t): Ditto.
29126 (vfloat16m4x2_t): Ditto.
29127 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): New.
29128 * config/riscv/riscv.md: New.
29129 * config/riscv/vector-iterators.md: New.
29131 2023-06-17 Roger Sayle <roger@nextmovesoftware.com>
29133 * config/i386/i386-expand.cc (ix86_expand_move): Check that OP1 is
29134 CONST_WIDE_INT_P before calling ix86_convert_wide_int_to_broadcast.
29135 Generalize special case for converting TImode to V1TImode to handle
29136 all 128-bit vector conversions.
29138 2023-06-17 Costas Argyris <costas.argyris@gmail.com>
29140 * gcc-ar.cc (main): Refactor to slightly reduce code
29141 duplication. Avoid unnecessary elements in nargv.
29143 2023-06-16 Pan Li <pan2.li@intel.com>
29146 * config/riscv/riscv-vector-builtins-bases.cc: Add ret_mode for
29147 integer reduction expand.
29148 * config/riscv/vector-iterators.md: Add VQI, VHI, VSI and VDI,
29149 and the LMUL1 attr respectively.
29150 * config/riscv/vector.md
29151 (@pred_reduc_<reduc><mode><vlmul1>): Removed.
29152 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Likewise.
29153 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Likewise.
29154 (@pred_reduc_<reduc><VQI:mode><VQI_LMUL1:mode>): New pattern.
29155 (@pred_reduc_<reduc><VHI:mode><VHI_LMUL1:mode>): Likewise.
29156 (@pred_reduc_<reduc><VSI:mode><VSI_LMUL1:mode>): Likewise.
29157 (@pred_reduc_<reduc><VDI:mode><VDI_LMUL1:mode>): Likewise.
29159 2023-06-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29162 * config/riscv/riscv-vsetvl.cc (insert_vsetvl): Fix bug.
29164 2023-06-16 Jakub Jelinek <jakub@redhat.com>
29166 PR middle-end/79173
29167 * builtin-types.def (BT_FN_UINT_UINT_UINT_UINT_UINTPTR,
29168 BT_FN_ULONG_ULONG_ULONG_ULONG_ULONGPTR,
29169 BT_FN_ULONGLONG_ULONGLONG_ULONGLONG_ULONGLONG_ULONGLONGPTR): New
29171 * builtins.def (BUILT_IN_ADDC, BUILT_IN_ADDCL, BUILT_IN_ADDCLL,
29172 BUILT_IN_SUBC, BUILT_IN_SUBCL, BUILT_IN_SUBCLL): New builtins.
29173 * builtins.cc (fold_builtin_addc_subc): New function.
29174 (fold_builtin_varargs): Handle BUILT_IN_{ADD,SUB}C{,L,LL}.
29175 * doc/extend.texi (__builtin_addc, __builtin_subc): Document.
29177 2023-06-16 Jakub Jelinek <jakub@redhat.com>
29179 PR tree-optimization/110271
29180 * tree-ssa-math-opts.cc (math_opts_dom_walker::after_dom_children)
29181 <case PLUS_EXPR>: Ignore return value from match_arith_overflow,
29182 instead call match_uaddc_usubc only if gsi_stmt (gsi) is still stmt.
29184 2023-06-16 Martin Jambor <mjambor@suse.cz>
29186 * configure: Regenerate.
29188 2023-06-16 Roger Sayle <roger@nextmovesoftware.com>
29189 Uros Bizjak <ubizjak@gmail.com>
29192 * config/i386/i386.md (*add<dwi>3_doubleword_concat): New
29193 define_insn_and_split combine *add<dwi>3_doubleword with
29194 a *concat<mode><dwi>3 for more efficient lowering after reload.
29196 2023-06-16 Vladimir N. Makarov <vmakarov@redhat.com>
29198 * ira-lives.cc: Include except.h.
29199 (process_bb_node_lives): Ignore conflicts from cleanup exceptions
29200 when the pseudo does not live at the exception landing pad.
29202 2023-06-16 Alex Coplan <alex.coplan@arm.com>
29204 * doc/invoke.texi: Document -Welaborated-enum-base.
29206 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29208 * config/aarch64/aarch64-simd-builtins.def (shrn2_n): Rename builtins to...
29209 (ushrn2_n): ... This.
29210 (sqshrn2_n): Rename builtins to...
29211 (ssqshrn2_n): ... This.
29212 (uqshrn2_n): Rename builtins to...
29213 (uqushrn2_n): ... This.
29214 * config/aarch64/arm_neon.h (vqshrn_high_n_s16): Adjust for the above.
29215 (vqshrn_high_n_s32): Likewise.
29216 (vqshrn_high_n_s64): Likewise.
29217 (vqshrn_high_n_u16): Likewise.
29218 (vqshrn_high_n_u32): Likewise.
29219 (vqshrn_high_n_u64): Likewise.
29220 (vshrn_high_n_s16): Likewise.
29221 (vshrn_high_n_s32): Likewise.
29222 (vshrn_high_n_s64): Likewise.
29223 (vshrn_high_n_u16): Likewise.
29224 (vshrn_high_n_u32): Likewise.
29225 (vshrn_high_n_u64): Likewise.
29226 * config/aarch64/aarch64-simd.md (aarch64_<shrn_op>shrn2_n<mode>_insn_le):
29228 (aarch64_<shrn_op><sra_op>shrn2_n<mode>_insn_le): ... This.
29229 Use SHIFTRT iterator and AARCH64_VALID_SHRN_OP check.
29230 (aarch64_<shrn_op>shrn2_n<mode>_insn_be): Rename to...
29231 (aarch64_<shrn_op><sra_op>shrn2_n<mode>_insn_be): ... This.
29232 Use SHIFTRT iterator and AARCH64_VALID_SHRN_OP check.
29233 (aarch64_<shrn_op>shrn2_n<mode>): Rename to...
29234 (aarch64_<shrn_op><sra_op>shrn2_n<mode>): ... This.
29235 Update expander for the above.
29237 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29239 * config/aarch64/aarch64-simd-builtins.def (shrn2): Rename builtins to...
29240 (shrn2_n): ... This.
29241 (rshrn2): Rename builtins to...
29242 (rshrn2_n): ... This.
29243 * config/aarch64/arm_neon.h (vrshrn_high_n_s16): Adjust for the above.
29244 (vrshrn_high_n_s32): Likewise.
29245 (vrshrn_high_n_s64): Likewise.
29246 (vrshrn_high_n_u16): Likewise.
29247 (vrshrn_high_n_u32): Likewise.
29248 (vrshrn_high_n_u64): Likewise.
29249 (vshrn_high_n_s16): Likewise.
29250 (vshrn_high_n_s32): Likewise.
29251 (vshrn_high_n_s64): Likewise.
29252 (vshrn_high_n_u16): Likewise.
29253 (vshrn_high_n_u32): Likewise.
29254 (vshrn_high_n_u64): Likewise.
29255 * config/aarch64/aarch64-simd.md (*aarch64_<srn_op>shrn<mode>2_vect_le):
29257 (*aarch64_<srn_op>shrn<mode>2_vect_be): Likewise.
29258 (aarch64_shrn2<mode>_insn_le): Likewise.
29259 (aarch64_shrn2<mode>_insn_be): Likewise.
29260 (aarch64_shrn2<mode>): Likewise.
29261 (aarch64_rshrn2<mode>_insn_le): Likewise.
29262 (aarch64_rshrn2<mode>_insn_be): Likewise.
29263 (aarch64_rshrn2<mode>): Likewise.
29264 (aarch64_<sur>q<r>shr<u>n2_n<mode>_insn_le): Likewise.
29265 (aarch64_<shrn_op>shrn2_n<mode>_insn_le): New define_insn.
29266 (aarch64_<sur>q<r>shr<u>n2_n<mode>_insn_be): Delete.
29267 (aarch64_<shrn_op>shrn2_n<mode>_insn_be): New define_insn.
29268 (aarch64_<sur>q<r>shr<u>n2_n<mode>): Delete.
29269 (aarch64_<shrn_op>shrn2_n<mode>): New define_expand.
29270 (aarch64_<shrn_op>rshrn2_n<mode>_insn_le): New define_insn.
29271 (aarch64_<shrn_op>rshrn2_n<mode>_insn_be): New define_insn.
29272 (aarch64_<shrn_op>rshrn2_n<mode>): New define_expand.
29273 (aarch64_sqshrun2_n<mode>_insn_le): New define_insn.
29274 (aarch64_sqshrun2_n<mode>_insn_be): New define_insn.
29275 (aarch64_sqshrun2_n<mode>): New define_expand.
29276 (aarch64_sqrshrun2_n<mode>_insn_le): New define_insn.
29277 (aarch64_sqrshrun2_n<mode>_insn_be): New define_insn.
29278 (aarch64_sqrshrun2_n<mode>): New define_expand.
29279 * config/aarch64/iterators.md (UNSPEC_SQSHRUN, UNSPEC_SQRSHRUN,
29280 UNSPEC_SQSHRN, UNSPEC_UQSHRN, UNSPEC_SQRSHRN, UNSPEC_UQRSHRN):
29281 Delete unspec values.
29282 (VQSHRN_N): Delete int iterator.
29284 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29286 * config/aarch64/aarch64.h (AARCH64_VALID_SHRN_OP): Define.
29287 * config/aarch64/aarch64-simd.md
29288 (*aarch64_<shrn_op>shrn_n<mode>_insn<vczle><vczbe>): Rename to...
29289 (*aarch64_<shrn_op><shrn_s>shrn_n<mode>_insn<vczle><vczbe>): ... This.
29290 Use SHIFTRT iterator and add AARCH64_VALID_SHRN_OP to condition.
29291 * config/aarch64/iterators.md (shrn_s): New code attribute.
29293 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29295 * config/aarch64/aarch64-simd.md (aarch64_<sur>q<r>shr<u>n_n<mode>):
29297 (aarch64_<shrn_op>shrn_n<mode>): ... This. Reimplement with RTL codes.
29298 (*aarch64_<shrn_op>rshrn_n<mode>_insn): New define_insn.
29299 (aarch64_sqrshrun_n<mode>_insn): Likewise.
29300 (aarch64_sqshrun_n<mode>_insn): Likewise.
29301 (aarch64_<shrn_op>rshrn_n<mode>): New define_expand.
29302 (aarch64_sqshrun_n<mode>): Likewise.
29303 (aarch64_sqrshrun_n<mode>): Likewise.
29304 * config/aarch64/iterators.md (V2XWIDE): Add HI and SI modes.
29306 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29308 * config/aarch64/aarch64-simd-builtins.def (shrn): Rename builtins to...
29309 (shrn_n): ... This.
29310 (rshrn): Rename builtins to...
29311 (rshrn_n): ... This.
29312 * config/aarch64/arm_neon.h (vshrn_n_s16): Adjust for the above.
29313 (vshrn_n_s32): Likewise.
29314 (vshrn_n_s64): Likewise.
29315 (vshrn_n_u16): Likewise.
29316 (vshrn_n_u32): Likewise.
29317 (vshrn_n_u64): Likewise.
29318 (vrshrn_n_s16): Likewise.
29319 (vrshrn_n_s32): Likewise.
29320 (vrshrn_n_s64): Likewise.
29321 (vrshrn_n_u16): Likewise.
29322 (vrshrn_n_u32): Likewise.
29323 (vrshrn_n_u64): Likewise.
29324 * config/aarch64/aarch64-simd.md
29325 (*aarch64_<srn_op>shrn<mode><vczle><vczbe>): Delete.
29326 (aarch64_shrn<mode>): Likewise.
29327 (aarch64_rshrn<mode><vczle><vczbe>_insn): Likewise.
29328 (aarch64_rshrn<mode>): Likewise.
29329 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn<vczle><vczbe>): Likewise.
29330 (aarch64_<sur>q<r>shr<u>n_n<mode>): Likewise.
29331 (*aarch64_<shrn_op>shrn_n<mode>_insn<vczle><vczbe>): New define_insn.
29332 (*aarch64_<shrn_op>rshrn_n<mode>_insn<vczle><vczbe>): Likewise.
29333 (*aarch64_sqshrun_n<mode>_insn<vczle><vczbe>): Likewise.
29334 (*aarch64_sqrshrun_n<mode>_insn<vczle><vczbe>): Likewise.
29335 (aarch64_<shrn_op>shrn_n<mode>): New define_expand.
29336 (aarch64_<shrn_op>rshrn_n<mode>): Likewise.
29337 (aarch64_sqshrun_n<mode>): Likewise.
29338 (aarch64_sqrshrun_n<mode>): Likewise.
29339 * config/aarch64/iterators.md (ALL_TRUNC): New code iterator.
29340 (TRUNCEXTEND): New code attribute.
29341 (TRUNC_SHIFT): Likewise.
29342 (shrn_op): Likewise.
29343 * config/aarch64/predicates.md (aarch64_simd_umax_quarter_mode):
29346 2023-06-16 Pan Li <pan2.li@intel.com>
29348 * config/riscv/riscv-vsetvl.cc
29349 (pass_vsetvl::global_eliminate_vsetvl_insn): Initialize var by NULL.
29351 2023-06-16 Richard Biener <rguenther@suse.de>
29353 PR tree-optimization/110278
29354 * match.pd (uns < (typeof uns)(uns != 0) -> false): New.
29355 (x != (typeof x)(x == 0) -> true): Likewise.
29357 2023-06-16 Pali Rohár <pali@kernel.org>
29359 * config/i386/mingw-w64.h (CPP_SPEC): Adjust for -mcrtdll=.
29360 (REAL_LIBGCC_SPEC): New define.
29361 * config/i386/mingw.opt: Add mcrtdll=
29362 * config/i386/mingw32.h (CPP_SPEC): Adjust for -mcrtdll=.
29363 (REAL_LIBGCC_SPEC): Adjust for -mcrtdll=.
29364 (STARTFILE_SPEC): Adjust for -mcrtdll=.
29365 * doc/invoke.texi: Add mcrtdll= documentation.
29367 2023-06-16 Simon Dardis <simon.dardis@imgtec.com>
29369 * config/mips/mips.cc (enum mips_code_readable_setting):New enmu.
29370 (mips_handle_code_readable_attr):New static function.
29371 (mips_get_code_readable_attr):New static enum function.
29372 (mips_set_current_function):Set the code_readable mode.
29373 (mips_option_override):Same as above.
29374 * doc/extend.texi:Document code_readable.
29376 2023-06-16 Richard Biener <rguenther@suse.de>
29378 PR tree-optimization/110269
29379 * fold-const.cc (fold_binary_loc): Merge x != 0 folding
29380 with tree_expr_nonzero_p ...
29381 * match.pd (cmp (convert? addr@0) integer_zerop): With this
29384 2023-06-15 Marek Polacek <polacek@redhat.com>
29386 * Makefile.in: Set LD_PICFLAG. Use it. Set enable_host_pie.
29387 Remove NO_PIE_CFLAGS and NO_PIE_FLAG. Pass LD_PICFLAG to
29388 ALL_LINKERFLAGS. Use the "pic" build of libiberty if --enable-host-pie.
29389 * configure.ac (--enable-host-shared): Don't set PICFLAG here.
29390 (--enable-host-pie): New check. Set PICFLAG and LD_PICFLAG after this
29392 * configure: Regenerate.
29393 * doc/install.texi: Document --enable-host-pie.
29395 2023-06-15 Manolis Tsamis <manolis.tsamis@vrull.eu>
29397 * regcprop.cc (maybe_mode_change): Enable stack pointer
29400 2023-06-15 Andrew MacLeod <amacleod@redhat.com>
29402 PR tree-optimization/110266
29403 * gimple-range-fold.cc (adjust_imagpart_expr): Check for integer
29405 (adjust_realpart_expr): Ditto.
29407 2023-06-15 Jan Beulich <jbeulich@suse.com>
29409 * config/i386/sse.md (<avx512>_vec_dup<mode><mask_name>): Use
29412 2023-06-15 Jan Beulich <jbeulich@suse.com>
29414 * config/i386/constraints.md: Mention k and r for B.
29416 2023-06-15 Lulu Cheng <chenglulu@loongson.cn>
29417 Andrew Pinski <apinski@marvell.com>
29420 * config/loongarch/loongarch.md: Modify the register constraints for template
29421 "jumptable" and "indirect_jump" from "r" to "e".
29423 2023-06-15 Xi Ruoyao <xry111@xry111.site>
29425 * config/loongarch/loongarch-tune.h (loongarch_align): New
29427 * config/loongarch/loongarch-def.h (loongarch_cpu_align): New
29429 * config/loongarch/loongarch-def.c (loongarch_cpu_align): Define
29431 * config/loongarch/loongarch.cc
29432 (loongarch_option_override_internal): Set the value of
29433 -falign-functions= if -falign-functions is enabled but no value
29434 is given. Likewise for -falign-labels=.
29436 2023-06-15 Jakub Jelinek <jakub@redhat.com>
29438 PR middle-end/79173
29439 * internal-fn.def (UADDC, USUBC): New internal functions.
29440 * internal-fn.cc (expand_UADDC, expand_USUBC): New functions.
29441 (commutative_ternary_fn_p): Return true also for IFN_UADDC.
29442 * optabs.def (uaddc5_optab, usubc5_optab): New optabs.
29443 * tree-ssa-math-opts.cc (uaddc_cast, uaddc_ne0, uaddc_is_cplxpart,
29444 match_uaddc_usubc): New functions.
29445 (math_opts_dom_walker::after_dom_children): Call match_uaddc_usubc
29446 for PLUS_EXPR, MINUS_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR unless
29447 other optimizations have been successful for those.
29448 * gimple-fold.cc (gimple_fold_call): Handle IFN_UADDC and IFN_USUBC.
29449 * fold-const-call.cc (fold_const_call): Likewise.
29450 * gimple-range-fold.cc (adjust_imagpart_expr): Likewise.
29451 * tree-ssa-dce.cc (eliminate_unnecessary_stmts): Likewise.
29452 * doc/md.texi (uaddc<mode>5, usubc<mode>5): Document new named
29454 * config/i386/i386.md (uaddc<mode>5, usubc<mode>5): New
29455 define_expand patterns.
29456 (*setcc_qi_addqi3_cconly_overflow_1_<mode>, *setccc): Split
29457 into NOTE_INSN_DELETED note rather than nop instruction.
29458 (*setcc_qi_negqi_ccc_1_<mode>, *setcc_qi_negqi_ccc_2_<mode>):
29461 2023-06-15 Jakub Jelinek <jakub@redhat.com>
29463 PR middle-end/79173
29464 * config/i386/i386.md (subborrow<mode>): Add alternative with
29465 memory destination and add for it define_peephole2
29466 TARGET_READ_MODIFY_WRITE/-Os patterns to prefer using memory
29467 destination in these patterns.
29469 2023-06-15 Jakub Jelinek <jakub@redhat.com>
29471 PR middle-end/79173
29472 * config/i386/i386.md (*sub<mode>_3, @add<mode>3_carry,
29473 addcarry<mode>, @sub<mode>3_carry, *add<mode>3_cc_overflow_1): Add
29474 define_peephole2 TARGET_READ_MODIFY_WRITE/-Os patterns to prefer
29475 using memory destination in these patterns.
29477 2023-06-15 Jakub Jelinek <jakub@redhat.com>
29479 * gimple-fold.cc (gimple_fold_call): Move handling of arg0
29480 as well as arg1 INTEGER_CSTs for .UBSAN_CHECK_{ADD,SUB,MUL}
29481 and .{ADD,SUB,MUL}_OVERFLOW calls from here...
29482 * fold-const-call.cc (fold_const_call): ... here.
29484 2023-06-15 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
29486 * config/aarch64/aarch64-simd.md (aarch64_<su>abd<mode>):
29487 Rename to <su>abd<mode>3.
29488 * config/aarch64/aarch64-sve.md (<su>abd<mode>_3): Rename
29491 2023-06-15 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
29493 * doc/md.texi (sabd, uabd): Document them.
29494 * internal-fn.def (ABD): Use new optab.
29495 * optabs.def (sabd_optab, uabd_optab): New optabs,
29496 * tree-vect-patterns.cc (vect_recog_absolute_difference):
29497 Recognize the following idiom abs (a - b).
29498 (vect_recog_sad_pattern): Refactor to use
29499 vect_recog_absolute_difference.
29500 (vect_recog_abd_pattern): Use patterns found by
29501 vect_recog_absolute_difference to build a new ABD
29504 2023-06-15 chenxiaolong <chenxl04200420@163.com>
29506 * config/loongarch/loongarch.h (LARCH_CALL_RATIO): Modify the value
29507 of macro LARCH_CALL_RATIO on LoongArch to make it perform optimally.
29509 2023-06-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29511 * config/riscv/riscv-v.cc (shuffle_merge_patterns): New pattern.
29512 (expand_vec_perm_const_1): Add merge optmization.
29514 2023-06-15 Lehua Ding <lehua.ding@rivai.ai>
29517 * config/riscv/riscv.cc (riscv_get_arg_info): Return NULL_RTX for vector mode
29518 (riscv_pass_by_reference): Return true for vector mode
29520 2023-06-15 Pan Li <pan2.li@intel.com>
29522 * config/riscv/autovec-opt.md: Align the predictor sytle.
29523 * config/riscv/autovec.md: Ditto.
29525 2023-06-15 Pan Li <pan2.li@intel.com>
29527 * config/riscv/riscv-v.cc (rvv_builder::get_merge_scalar_mask):
29528 Take elen instead of scalar BITS_PER_WORD.
29529 (expand_vector_init_merge_repeating_sequence): Use inner_bits_size
29530 instead of scaler BITS_PER_WORD.
29532 2023-06-14 Jivan Hakobyan <jivanhakobyan9@gmail.com>
29534 * config/moxie/uclinux.h (MFWRAP_SPEC): Remove
29536 2023-06-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29538 * config/aarch64/aarch64-sve-builtins-base.cc (svlast_impl::fold):
29539 Fix signed comparison warning in loop from npats to enelts.
29541 2023-06-14 Thomas Schwinge <thomas@codesourcery.com>
29543 * gcc.cc (driver_handle_option): Forward host '-lgfortran', '-lm'
29544 to offloading compilation.
29545 * config/gcn/mkoffload.cc (main): Adjust.
29546 * config/nvptx/mkoffload.cc (main): Likewise.
29547 * doc/invoke.texi (foffload-options): Update example.
29549 2023-06-14 liuhongt <hongtao.liu@intel.com>
29552 * config/i386/sse.md (mov<mode>_internal>): Use x instead of v
29553 for alternative 2 since there's no evex version for vpcmpeqd
29556 2023-06-13 Jeff Law <jlaw@ventanamicro.com>
29558 * gcc.cc (LINK_COMMAND_SPEC): Remove mudflap spec handling.
29560 2023-06-13 Jeff Law <jlaw@ventanamicro.com>
29562 * config/sh/divtab.cc: Remove.
29564 2023-06-13 Jakub Jelinek <jakub@redhat.com>
29566 * config/i386/i386.cc (standard_sse_constant_opcode): Remove
29567 superfluous spaces around \t for vpcmpeqd.
29569 2023-06-13 Roger Sayle <roger@nextmovesoftware.com>
29571 * expr.cc (store_constructor) <case VECTOR_TYPE>: Don't bother
29572 clearing vectors with only a single element. Set CLEARED if the
29573 vector was initialized to zero.
29575 2023-06-13 Lehua Ding <lehua.ding@rivai.ai>
29577 * config/riscv/riscv-v.cc (struct mode_vtype_group): Remove duplicate
29580 (TUPLE_ENTRY): Undef.
29582 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29584 * config/riscv/riscv-v.cc (rvv_builder::single_step_npatterns_p): Add comment.
29585 (shuffle_generic_patterns): Ditto.
29586 (expand_vec_perm_const_1): Ditto.
29588 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29590 * config/riscv/riscv-v.cc (emit_vlmax_decompress_insn): Fix bug.
29591 (shuffle_decompress_patterns): Ditto.
29593 2023-06-13 Richard Biener <rguenther@suse.de>
29595 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Free loop BBs.
29597 2023-06-13 Yanzhang Wang <yanzhang.wang@intel.com>
29598 Kito Cheng <kito.cheng@sifive.com>
29600 * config/riscv/riscv-protos.h (riscv_init_cumulative_args): Set
29601 warning flag if func is not builtin
29602 * config/riscv/riscv.cc
29603 (riscv_scalable_vector_type_p): Determine whether the type is scalable vector.
29604 (riscv_arg_has_vector): Determine whether the arg is vector type.
29605 (riscv_pass_in_vector_p): Check the vector type param is passed by value.
29606 (riscv_init_cumulative_args): The same as header.
29607 (riscv_get_arg_info): Add the checking.
29608 (riscv_function_value): Check the func return and set warning flag
29609 * config/riscv/riscv.h (INIT_CUMULATIVE_ARGS): Add a flag to
29610 determine whether warning psabi or not.
29612 2023-06-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29614 * config/arm/arm-opts.h (enum arm_tp_type): Remove TP_CP15.
29615 Add TP_TPIDRURW, TP_TPIDRURO, TP_TPIDRPRW values.
29616 * config/arm/arm-protos.h (arm_output_load_tpidr): Declare prototype.
29617 * config/arm/arm.cc (arm_option_reconfigure_globals): Replace TP_CP15
29619 (arm_output_load_tpidr): Define.
29620 * config/arm/arm.h (TARGET_HARD_TP): Define in terms of TARGET_SOFT_TP.
29621 * config/arm/arm.md (load_tp_hard): Call arm_output_load_tpidr to output
29623 (reload_tp_hard): Likewise.
29624 * config/arm/arm.opt (tpidrurw, tpidruro, tpidrprw): New values for
29626 * doc/invoke.texi (Arm Options, mtp): Document new values.
29628 2023-06-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29631 * config/aarch64/aarch64-opts.h (enum aarch64_tp_reg): Add
29632 AARCH64_TPIDRRO_EL0 value.
29633 * config/aarch64/aarch64.cc (aarch64_output_load_tp): Define.
29634 * config/aarch64/aarch64.opt (tpidr_el0, tpidr_el1, tpidr_el2,
29635 tpidr_el3, tpidrro_el3): New accepted values to -mtp=.
29636 * doc/invoke.texi (AArch64 Options): Document new -mtp= options.
29638 2023-06-13 Alexandre Oliva <oliva@adacore.com>
29640 * range-op-float.cc (frange_nextafter): Drop inline.
29641 (frelop_early_resolve): Add static.
29642 (frange_float): Likewise.
29644 2023-06-13 Richard Biener <rguenther@suse.de>
29646 PR middle-end/110232
29647 * fold-const.cc (native_interpret_vector): Use TYPE_SIZE_UNIT
29648 to check whether the buffer covers the whole vector.
29650 2023-06-13 Richard Biener <rguenther@suse.de>
29652 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): For
29653 .MASK_LOAD and friends set the size of the access to unknown.
29655 2023-06-13 Tejas Belagod <tbelagod@arm.com>
29658 * config/aarch64/aarch64-sve-builtins-base.cc (svlast_impl::fold): Fold sve
29659 calls that have a constant input predicate vector.
29660 (svlast_impl::is_lasta): Query to check if intrinsic is svlasta.
29661 (svlast_impl::is_lastb): Query to check if intrinsic is svlastb.
29662 (svlast_impl::vect_all_same): Check if all vector elements are equal.
29664 2023-06-13 Andi Kleen <ak@linux.intel.com>
29666 * config/i386/gcc-auto-profile: Regenerate.
29668 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29670 * config/riscv/vector-iterators.md: Fix requirement.
29672 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29674 * config/riscv/riscv-v.cc (emit_vlmax_decompress_insn): New function.
29675 (shuffle_decompress_patterns): New function.
29676 (expand_vec_perm_const_1): Add decompress optimization.
29678 2023-06-12 Jeff Law <jlaw@ventanamicro.com>
29680 PR rtl-optimization/101188
29681 * postreload.cc (reload_cse_move2add_invalidate): New function,
29683 (reload_cse_move2add): Call reload_cse_move2add_invalidate.
29685 2023-06-12 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
29687 * config/aarch64/aarch64.cc (aarch64_expand_vector_init): Tweak condition
29688 if (n_var == n_elts && n_elts <= 16) to allow a single constant,
29689 and if maxv == 1, use constant element for duplicating into register.
29691 2023-06-12 Tobias Burnus <tobias@codesourcery.com>
29693 * gimplify.cc (gimplify_adjust_omp_clauses_1): Use
29694 GOMP_MAP_FORCE_PRESENT for 'present alloc' implicit mapping.
29695 (gimplify_adjust_omp_clauses): Change
29696 GOMP_MAP_PRESENT_{TO,TOFROM,FROM,ALLOC} to the equivalent
29697 GOMP_MAP_FORCE_PRESENT.
29698 * omp-low.cc (lower_omp_target): Remove handling of no-longer valid
29699 GOMP_MAP_PRESENT_{TO,TOFROM,FROM,ALLOC}; update map kinds used for
29700 to/from clauses with present modifier.
29702 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
29704 PR tree-optimization/110205
29705 * range-op-float.cc (range_operator::fold_range): Add default FII
29707 * range-op-mixed.h (class operator_gt): Add missing final overrides.
29708 * range-op.cc (range_op_handler::fold_range): Add RO_FII case.
29709 (operator_lshift ::update_bitmask): Add final override.
29710 (operator_rshift ::update_bitmask): Add final override.
29711 * range-op.h (range_operator::fold_range): Add FII prototype.
29713 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
29715 * gimple-range-op.cc (gimple_range_op_handler::maybe_non_standard):
29716 Use range_op_handler directly.
29717 * range-op.cc (range_op_handler::range_op_handler): Unsigned
29718 param instead of tree-code.
29719 (ptr_op_widen_plus_signed): Delete.
29720 (ptr_op_widen_plus_unsigned): Delete.
29721 (ptr_op_widen_mult_signed): Delete.
29722 (ptr_op_widen_mult_unsigned): Delete.
29723 (range_op_table::initialize_integral_ops): Add new opcodes.
29724 * range-op.h (range_op_handler): Use unsigned.
29725 (OP_WIDEN_MULT_SIGNED): New.
29726 (OP_WIDEN_MULT_UNSIGNED): New.
29727 (OP_WIDEN_PLUS_SIGNED): New.
29728 (OP_WIDEN_PLUS_UNSIGNED): New.
29729 (RANGE_OP_TABLE_SIZE): New.
29730 (range_op_table::operator []): Use unsigned.
29731 (range_op_table::set): Use unsigned.
29732 (m_range_tree): Make unsigned.
29733 (ptr_op_widen_mult_signed): Remove.
29734 (ptr_op_widen_mult_unsigned): Remove.
29735 (ptr_op_widen_plus_signed): Remove.
29736 (ptr_op_widen_plus_unsigned): Remove.
29738 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
29740 * gimple-range-op.cc (gimple_range_op_handler): Set m_operator
29741 manually as there is no access to the default operator.
29742 (cfn_copysign::fold_range): Don't check for validity.
29743 (cfn_ubsan::fold_range): Ditto.
29744 (gimple_range_op_handler::maybe_builtin_call): Don't set to NULL.
29745 * range-op.cc (default_operator): New.
29746 (range_op_handler::range_op_handler): Use default_operator
29748 (range_op_handler::operator bool): Move from header, compare
29749 against default operator.
29750 (range_op_handler::range_op): New.
29751 * range-op.h (range_op_handler::operator bool): Move.
29753 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
29755 * range-op.cc (unified_table): Delete.
29756 (range_op_table operator_table): Instantiate.
29757 (range_op_table::range_op_table): Rename from unified_table.
29758 (range_op_handler::range_op_handler): Use range_op_table.
29759 * range-op.h (range_op_table::operator []): Inline.
29760 (range_op_table::set): Inline.
29762 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
29764 * gimple-range-gori.cc (gori_compute::condexpr_adjust): Do not
29766 * gimple-range-op.cc (get_code): Rename from get_code_and_type
29768 (gimple_range_op_handler::supported_p): No need for type.
29769 (gimple_range_op_handler::gimple_range_op_handler): Ditto.
29770 (cfn_copysign::fold_range): Ditto.
29771 (cfn_ubsan::fold_range): Ditto.
29772 * ipa-cp.cc (ipa_vr_operation_and_type_effects): Ditto.
29773 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Ditto.
29774 * range-op-float.cc (operator_plus::op1_range): Ditto.
29775 (operator_mult::op1_range): Ditto.
29776 (range_op_float_tests): Ditto.
29777 * range-op.cc (get_op_handler): Remove.
29778 (range_op_handler::set_op_handler): Remove.
29779 (operator_plus::op1_range): No need for type.
29780 (operator_minus::op1_range): Ditto.
29781 (operator_mult::op1_range): Ditto.
29782 (operator_exact_divide::op1_range): Ditto.
29783 (operator_cast::op1_range): Ditto.
29784 (perator_bitwise_not::fold_range): Ditto.
29785 (operator_negate::fold_range): Ditto.
29786 * range-op.h (range_op_handler::range_op_handler): Remove type param.
29787 (range_cast): No need for type.
29788 (range_op_table::operator[]): Check for enum_code >= 0.
29789 * tree-data-ref.cc (compute_distributive_range): No need for type.
29790 * tree-ssa-loop-unswitch.cc (unswitch_predicate): Ditto.
29791 * value-query.cc (range_query::get_tree_range): Ditto.
29792 * value-relation.cc (relation_oracle::validate_relation): Ditto.
29793 * vr-values.cc (range_of_var_in_loop): Ditto.
29794 (simplify_using_ranges::fold_cond_with_ops): Ditto.
29796 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
29798 * range-op-mixed.h (operator_max): Remove final.
29799 * range-op-ptr.cc (pointer_table::pointer_table): Remove MAX_EXPR.
29800 (pointer_table::pointer_table): Remove.
29801 (class hybrid_max_operator): New.
29802 (range_op_table::initialize_pointer_ops): Add hybrid_max_operator.
29803 * range-op.cc (pointer_tree_table): Remove.
29804 (unified_table::unified_table): Comment out MAX_EXPR.
29805 (get_op_handler): Remove check of pointer table.
29806 * range-op.h (class pointer_table): Remove.
29808 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
29810 * range-op-mixed.h (operator_min): Remove final.
29811 * range-op-ptr.cc (pointer_table::pointer_table): Remove MIN_EXPR.
29812 (class hybrid_min_operator): New.
29813 (range_op_table::initialize_pointer_ops): Add hybrid_min_operator.
29814 * range-op.cc (unified_table::unified_table): Comment out MIN_EXPR.
29816 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
29818 * range-op-mixed.h (operator_bitwise_or): Remove final.
29819 * range-op-ptr.cc (pointer_table::pointer_table): Remove BIT_IOR_EXPR.
29820 (class hybrid_or_operator): New.
29821 (range_op_table::initialize_pointer_ops): Add hybrid_or_operator.
29822 * range-op.cc (unified_table::unified_table): Comment out BIT_IOR_EXPR.
29824 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
29826 * range-op-mixed.h (operator_bitwise_and): Remove final.
29827 * range-op-ptr.cc (pointer_table::pointer_table): Remove BIT_AND_EXPR.
29828 (class hybrid_and_operator): New.
29829 (range_op_table::initialize_pointer_ops): Add hybrid_and_operator.
29830 * range-op.cc (unified_table::unified_table): Comment out BIT_AND_EXPR.
29832 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
29834 * Makefile.in (OBJS): Add range-op-ptr.o.
29835 * range-op-mixed.h (update_known_bitmask): Move prototype here.
29836 (minus_op1_op2_relation_effect): Move prototype here.
29837 (wi_includes_zero_p): Move function to here.
29838 (wi_zero_p): Ditto.
29839 * range-op.cc (update_known_bitmask): Remove static.
29840 (wi_includes_zero_p): Move to header.
29841 (wi_zero_p): Move to header.
29842 (minus_op1_op2_relation_effect): Remove static.
29843 (operator_pointer_diff): Move class and routines to range-op-ptr.cc.
29844 (pointer_plus_operator): Ditto.
29845 (pointer_min_max_operator): Ditto.
29846 (pointer_and_operator): Ditto.
29847 (pointer_or_operator): Ditto.
29848 (pointer_table): Ditto.
29849 (range_op_table::initialize_pointer_ops): Ditto.
29850 * range-op-ptr.cc: New.
29852 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
29854 * range-op-mixed.h (class operator_max): Move from...
29855 * range-op.cc (unified_table::unified_table): Add MAX_EXPR.
29856 (get_op_handler): Remove the integral table.
29857 (class operator_max): Move from here.
29858 (integral_table::integral_table): Delete.
29859 * range-op.h (class integral_table): Delete.
29861 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
29863 * range-op-mixed.h (class operator_min): Move from...
29864 * range-op.cc (unified_table::unified_table): Add MIN_EXPR.
29865 (class operator_min): Move from here.
29866 (integral_table::integral_table): Remove MIN_EXPR.
29868 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
29870 * range-op-mixed.h (class operator_bitwise_or): Move from...
29871 * range-op.cc (unified_table::unified_table): Add BIT_IOR_EXPR.
29872 (class operator_bitwise_or): Move from here.
29873 (integral_table::integral_table): Remove BIT_IOR_EXPR.
29875 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
29877 * range-op-mixed.h (class operator_bitwise_and): Move from...
29878 * range-op.cc (unified_table::unified_table): Add BIT_AND_EXPR.
29879 (get_op_handler): Check for a pointer table entry first.
29880 (class operator_bitwise_and): Move from here.
29881 (integral_table::integral_table): Remove BIT_AND_EXPR.
29883 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
29885 * range-op-mixed.h (class operator_bitwise_xor): Move from...
29886 * range-op.cc (unified_table::unified_table): Add BIT_XOR_EXPR.
29887 (class operator_bitwise_xor): Move from here.
29888 (integral_table::integral_table): Remove BIT_XOR_EXPR.
29889 (pointer_table::pointer_table): Remove BIT_XOR_EXPR.
29891 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
29893 * range-op-mixed.h (class operator_bitwise_not): Move from...
29894 * range-op.cc (unified_table::unified_table): Add BIT_NOT_EXPR.
29895 (class operator_bitwise_not): Move from here.
29896 (integral_table::integral_table): Remove BIT_NOT_EXPR.
29897 (pointer_table::pointer_table): Remove BIT_NOT_EXPR.
29899 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
29901 * range-op-mixed.h (class operator_addr_expr): Move from...
29902 * range-op.cc (unified_table::unified_table): Add ADDR_EXPR.
29903 (class operator_addr_expr): Move from here.
29904 (integral_table::integral_table): Remove ADDR_EXPR.
29905 (pointer_table::pointer_table): Remove ADDR_EXPR.
29907 2023-06-12 Pan Li <pan2.li@intel.com>
29909 * config/riscv/riscv-vector-builtins-types.def
29910 (vfloat16m1_t): Add type to lmul1 ops.
29911 (vfloat16m2_t): Likewise.
29912 (vfloat16m4_t): Likewise.
29914 2023-06-12 Richard Biener <rguenther@suse.de>
29916 * tree-ssa-alias.cc (call_may_clobber_ref_p_1): For
29917 .MASK_STORE and friend set the size of the access to
29920 2023-06-12 Tamar Christina <tamar.christina@arm.com>
29922 * config.in: Regenerate.
29923 * configure: Regenerate.
29924 * configure.ac: Remove DEFAULT_MATCHPD_PARTITIONS.
29926 2023-06-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29928 * config/riscv/autovec-opt.md
29929 (*v<any_shiftrt:optab><any_extend:optab>trunc<mode>): New pattern.
29930 (*<any_shiftrt:optab>trunc<mode>): Ditto.
29931 * config/riscv/autovec.md (<optab><mode>3): Change to
29932 define_insn_and_split.
29933 (v<optab><mode>3): Ditto.
29934 (trunc<mode><v_double_trunc>2): Ditto.
29936 2023-06-12 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29938 * simplify-rtx.cc (simplify_const_unary_operation):
29939 Handle US_TRUNCATE, SS_TRUNCATE.
29941 2023-06-12 Eric Botcazou <ebotcazou@adacore.com>
29944 * doc/gm2.texi (Standard procedures): Fix Next link.
29946 2023-06-12 Tamar Christina <tamar.christina@arm.com>
29948 * config.in: Regenerate.
29950 2023-06-12 Andre Vieira <andre.simoesdiasvieira@arm.com>
29952 PR middle-end/110142
29953 * tree-vect-patterns.cc (vect_recog_widen_op_pattern): Don't pass
29954 subtype to vect_widened_op_tree and remove subtype parameter, also
29955 remove superfluous overloaded function definition.
29956 (vect_recog_widen_plus_pattern): Remove subtype parameter and dont pass
29957 to call to vect_recog_widen_op_pattern.
29958 (vect_recog_widen_minus_pattern): Likewise.
29960 2023-06-12 liuhongt <hongtao.liu@intel.com>
29962 * config/i386/sse.md (vec_pack<floatprefix>_float_<mode>): New expander.
29963 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
29964 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
29965 (vec_unpacks_lo_<mode>): Ditto.
29966 (vec_unpacks_hi_<mode>): Ditto.
29967 (sse_movlhps_<mode>): New define_insn.
29968 (ssse3_palignr<mode>_perm): Extend to V_128H.
29969 (V_128H): New mode iterator.
29970 (ssepackPHmode): New mode attribute.
29971 (vunpck_extract_mode): Ditto.
29972 (vpckfloat_concat_mode): Extend to VxSI/VxSF for _Float16.
29973 (vpckfloat_temp_mode): Ditto.
29974 (vpckfloat_op_mode): Ditto.
29975 (vunpckfixt_mode): Extend to VxHF.
29976 (vunpckfixt_model): Ditto.
29977 (vunpckfixt_extract_mode): Ditto.
29979 2023-06-12 Richard Biener <rguenther@suse.de>
29981 PR middle-end/110200
29982 * genmatch.cc (expr::gen_transform): Put braces around
29983 the if arm for the (convert ...) short-cut.
29985 2023-06-12 Kewen Lin <linkw@linux.ibm.com>
29988 * config/rs6000/rs6000-builtins.def (__builtin_pack_vector_int128,
29989 __builtin_unpack_vector_int128): Move from stanza power7 to vsx.
29991 2023-06-12 Kewen Lin <linkw@linux.ibm.com>
29994 * config/rs6000/rs6000.cc (output_toc): Use the mode of the 128-bit
29995 floating constant itself for real_to_target call.
29997 2023-06-12 Pan Li <pan2.li@intel.com>
29999 * config/riscv/riscv-vector-builtins-types.def
30000 (vfloat16mf4_t): Add type to X2/X4/X8/X16/X32 vlmul ext ops.
30001 (vfloat16mf2_t): Ditto.
30002 (vfloat16m1_t): Ditto.
30003 (vfloat16m2_t): Ditto.
30004 (vfloat16m4_t): Ditto.
30006 2023-06-12 David Edelsohn <dje.gcc@gmail.com>
30008 * config/rs6000/rs6000-logue.cc (rs6000_stack_info):
30009 Do not require a stack frame when debugging is enabled for AIX.
30011 2023-06-11 Georg-Johann Lay <avr@gjlay.de>
30013 * config/avr/avr.md (adjust_len) [insv_notbit_0, insv_notbit_7]:
30014 Remove attribute values.
30015 (insv_notbit): New post-reload insn.
30016 (*insv.not-shiftrt_split, *insv.xor1-bit.0_split)
30017 (*insv.not-bit.0_split, *insv.not-bit.7_split)
30018 (*insv.xor-extract_split): Split to insv_notbit.
30019 (*insv.not-shiftrt, *insv.xor1-bit.0, *insv.not-bit.0, *insv.not-bit.7)
30020 (*insv.xor-extract): Remove post-reload insns.
30021 * config/avr/avr.cc (avr_out_insert_notbit) [bitno]: Remove parameter.
30022 (avr_adjust_insn_length): Adjust call of avr_out_insert_notbit.
30023 [ADJUST_LEN_INSV_NOTBIT_0, ADJUST_LEN_INSV_NOTBIT_7]: Remove cases.
30024 * config/avr/avr-protos.h (avr_out_insert_notbit): Adjust prototype.
30026 2023-06-11 Georg-Johann Lay <avr@gjlay.de>
30029 * config/avr/avr.md (adjust_len) [extr, extr_not]: New elements.
30030 (MSB, SIZE): New mode attributes.
30031 (any_shift): New code iterator.
30032 (*lshr<mode>3_split, *lshr<mode>3, lshr<mode>3)
30033 (*lshr<mode>3_const_split): Add constraint alternative for
30034 the case of shift-offset = MSB. Ditch "length" attribute.
30035 (extzv<mode): New. replaces extzv. Adjust following patterns.
30036 Use avr_out_extr, avr_out_extr_not to print asm.
30037 (*extzv.subreg.<mode>, *extzv.<mode>.subreg, *extzv.xor)
30038 (*extzv<mode>.ge, *neg.ashiftrt<mode>.msb, *extzv.io.lsr7): New.
30039 * config/avr/constraints.md (C15, C23, C31, Yil): New
30040 * config/avr/predicates.md (reg_or_low_io_operand)
30041 (const7_operand, reg_or_low_io_operand)
30042 (const15_operand, const_0_to_15_operand)
30043 (const23_operand, const_0_to_23_operand)
30044 (const31_operand, const_0_to_31_operand): New.
30045 * config/avr/avr-protos.h (avr_out_extr, avr_out_extr_not): New.
30046 * config/avr/avr.cc (avr_out_extr, avr_out_extr_not): New funcs.
30047 (lshrqi3_out, lshrhi3_out, lshrpsi3_out, lshrsi3_out): Adjust
30048 MSB case to new insn constraint "r" for operands[1].
30049 (avr_adjust_insn_length) [ADJUST_LEN_EXTR_NOT, ADJUST_LEN_EXTR]:
30050 Handle these cases.
30051 (avr_rtx_costs_1): Adjust cost for a new pattern.
30053 2023-06-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
30055 * config/riscv/riscv-vsetvl.cc (available_occurrence_p): Enhance user vsetvl optimization.
30056 (vector_insn_info::parse_insn): Add rtx_insn parse.
30057 (pass_vsetvl::local_eliminate_vsetvl_insn): Enhance user vsetvl optimization.
30058 (get_first_vsetvl): New function.
30059 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
30060 (pass_vsetvl::cleanup_insns): Remove it.
30061 (pass_vsetvl::ssa_post_optimization): New function.
30062 (has_no_uses): Ditto.
30063 (pass_vsetvl::propagate_avl): Remove it.
30064 (pass_vsetvl::df_post_optimization): New function.
30065 (pass_vsetvl::lazy_vsetvl): Rework Phase 5 && Phase 6.
30066 * config/riscv/riscv-vsetvl.h: Adapt declaration.
30068 2023-06-10 Aldy Hernandez <aldyh@redhat.com>
30070 * ipa-cp.cc (ipcp_vr_lattice::init): Take type argument.
30071 (ipcp_vr_lattice::print): Call dump method.
30072 (ipcp_vr_lattice::meet_with): Adjust for m_vr being a
30074 (ipcp_vr_lattice::meet_with_1): Make argument a reference.
30075 (ipcp_vr_lattice::set_to_bottom): Set varying for an unsupported
30077 (initialize_node_lattices): Pass type when appropriate.
30078 (ipa_vr_operation_and_type_effects): Make type agnostic.
30079 (ipa_value_range_from_jfunc): Same.
30080 (propagate_vr_across_jump_function): Same.
30081 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
30082 (evaluate_properties_for_edge): Same.
30083 * ipa-prop.cc (ipa_vr::get_vrange): Same.
30084 (ipcp_update_vr): Same.
30085 * ipa-prop.h (ipa_value_range_from_jfunc): Same.
30086 (ipa_range_set_and_normalize): Same.
30088 2023-06-10 Georg-Johann Lay <avr@gjlay.de>
30092 * config/avr/avr-passes.def (avr_pass_ifelse): Insert new pass.
30093 * config/avr/avr.cc (avr_pass_ifelse): New RTL pass.
30094 (avr_pass_data_ifelse): New pass_data for it.
30095 (make_avr_pass_ifelse, avr_redundant_compare, avr_cbranch_cost)
30096 (avr_canonicalize_comparison, avr_out_plus_set_ZN)
30097 (avr_out_cmp_ext): New functions.
30098 (compare_condtition): Make sure REG_CC dies in the branch insn.
30099 (avr_rtx_costs_1): Add computation of cbranch costs.
30100 (avr_adjust_insn_length) [ADJUST_LEN_ADD_SET_ZN, ADJUST_LEN_CMP_ZEXT]:
30101 [ADJUST_LEN_CMP_SEXT]Handle them.
30102 (TARGET_CANONICALIZE_COMPARISON): New define.
30103 (avr_simplify_comparison_p, compare_diff_p, avr_compare_pattern)
30104 (avr_reorg_remove_redundant_compare, avr_reorg): Remove functions.
30105 (TARGET_MACHINE_DEPENDENT_REORG): Remove define.
30106 * config/avr/avr-protos.h (avr_simplify_comparison_p): Remove proto.
30107 (make_avr_pass_ifelse, avr_out_plus_set_ZN, cc_reg_rtx)
30108 (avr_out_cmp_zext): New Protos
30109 * config/avr/avr.md (branch, difficult_branch): Don't split insns.
30110 (*cbranchhi.zero-extend.0", *cbranchhi.zero-extend.1")
30111 (*swapped_tst<mode>, *add.for.eqne.<mode>): New insns.
30112 (*cbranch<mode>4): Rename to cbranch<mode>4_insn.
30113 (define_peephole): Add dead_or_set_regno_p(insn,REG_CC) as needed.
30114 (define_deephole2): Add peep2_regno_dead_p(*,REG_CC) as needed.
30115 Add new RTL peepholes for decrement-and-branch and *swapped_tst<mode>.
30116 Rework signtest-and-branch peepholes for *sbrx_branch<mode>.
30117 (adjust_len) [add_set_ZN, cmp_zext]: New.
30118 (QIPSI): New mode iterator.
30119 (ALLs1, ALLs2, ALLs4, ALLs234): New mode iterators.
30120 (gelt): New code iterator.
30121 (gelt_eqne): New code attribute.
30122 (rvbranch, *rvbranch, difficult_rvbranch, *difficult_rvbranch)
30123 (branch_unspec, *negated_tst<mode>, *reversed_tst<mode>)
30124 (*cmpqi_sign_extend): Remove insns.
30125 (define_c_enum "unspec") [UNSPEC_IDENTITY]: Remove.
30126 * config/avr/avr-dimode.md (cbranch<mode>4): Canonicalize comparisons.
30127 * config/avr/predicates.md (scratch_or_d_register_operand): New.
30128 * config/avr/constraints.md (Yxx): New constraint.
30130 2023-06-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
30132 * config/riscv/autovec.md (select_vl<mode>): New pattern.
30133 * config/riscv/riscv-protos.h (expand_select_vl): New function.
30134 * config/riscv/riscv-v.cc (expand_select_vl): Ditto.
30136 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
30138 * range-op-float.cc (foperator_mult_div_base): Delete.
30139 (foperator_mult_div_base::find_range): Make static local function.
30140 (foperator_mult): Remove. Move prototypes to range-op-mixed.h
30141 (operator_mult::op1_range): Rename from foperator_mult.
30142 (operator_mult::op2_range): Ditto.
30143 (operator_mult::rv_fold): Ditto.
30144 (float_table::float_table): Remove MULT_EXPR.
30145 (class foperator_div): Inherit from range_operator.
30146 (float_table::float_table): Delete.
30147 * range-op-mixed.h (class operator_mult): Combined from integer
30149 * range-op.cc (float_tree_table): Delete.
30150 (op_mult): New object.
30151 (unified_table::unified_table): Add MULT_EXPR.
30152 (get_op_handler): Do not check float table any longer.
30153 (class cross_product_operator): Move to range-op-mixed.h.
30154 (class operator_mult): Move to range-op-mixed.h.
30155 (integral_table::integral_table): Remove MULT_EXPR.
30156 (pointer_table::pointer_table): Remove MULT_EXPR.
30157 * range-op.h (float_table): Remove.
30159 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
30161 * range-op-float.cc (foperator_negate): Remove. Move prototypes
30162 to range-op-mixed.h
30163 (operator_negate::fold_range): Rename from foperator_negate.
30164 (operator_negate::op1_range): Ditto.
30165 (float_table::float_table): Remove NEGATE_EXPR.
30166 * range-op-mixed.h (class operator_negate): Combined from integer
30168 * range-op.cc (op_negate): New object.
30169 (unified_table::unified_table): Add NEGATE_EXPR.
30170 (class operator_negate): Move to range-op-mixed.h.
30171 (integral_table::integral_table): Remove NEGATE_EXPR.
30172 (pointer_table::pointer_table): Remove NEGATE_EXPR.
30174 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
30176 * range-op-float.cc (foperator_minus): Remove. Move prototypes
30177 to range-op-mixed.h
30178 (operator_minus::fold_range): Rename from foperator_minus.
30179 (operator_minus::op1_range): Ditto.
30180 (operator_minus::op2_range): Ditto.
30181 (operator_minus::rv_fold): Ditto.
30182 (float_table::float_table): Remove MINUS_EXPR.
30183 * range-op-mixed.h (class operator_minus): Combined from integer
30185 * range-op.cc (op_minus): New object.
30186 (unified_table::unified_table): Add MINUS_EXPR.
30187 (class operator_minus): Move to range-op-mixed.h.
30188 (integral_table::integral_table): Remove MINUS_EXPR.
30189 (pointer_table::pointer_table): Remove MINUS_EXPR.
30191 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
30193 * range-op-float.cc (foperator_abs): Remove. Move prototypes
30194 to range-op-mixed.h
30195 (operator_abs::fold_range): Rename from foperator_abs.
30196 (operator_abs::op1_range): Ditto.
30197 (float_table::float_table): Remove ABS_EXPR.
30198 * range-op-mixed.h (class operator_abs): Combined from integer
30200 * range-op.cc (op_abs): New object.
30201 (unified_table::unified_table): Add ABS_EXPR.
30202 (class operator_abs): Move to range-op-mixed.h.
30203 (integral_table::integral_table): Remove ABS_EXPR.
30204 (pointer_table::pointer_table): Remove ABS_EXPR.
30206 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
30208 * range-op-float.cc (foperator_plus): Remove. Move prototypes
30209 to range-op-mixed.h
30210 (operator_plus::fold_range): Rename from foperator_plus.
30211 (operator_plus::op1_range): Ditto.
30212 (operator_plus::op2_range): Ditto.
30213 (operator_plus::rv_fold): Ditto.
30214 (float_table::float_table): Remove PLUS_EXPR.
30215 * range-op-mixed.h (class operator_plus): Combined from integer
30217 * range-op.cc (op_plus): New object.
30218 (unified_table::unified_table): Add PLUS_EXPR.
30219 (class operator_plus): Move to range-op-mixed.h.
30220 (integral_table::integral_table): Remove PLUS_EXPR.
30221 (pointer_table::pointer_table): Remove PLUS_EXPR.
30223 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
30225 * range-op-mixed.h (class operator_cast): Combined from integer
30227 * range-op.cc (op_cast): New object.
30228 (unified_table::unified_table): Add op_cast
30229 (class operator_cast): Move to range-op-mixed.h.
30230 (integral_table::integral_table): Remove op_cast
30231 (pointer_table::pointer_table): Remove op_cast.
30233 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
30235 * range-op-float.cc (operator_cst::fold_range): New.
30236 * range-op-mixed.h (class operator_cst): Move from integer file.
30237 * range-op.cc (op_cst): New object.
30238 (unified_table::unified_table): Add op_cst. Also use for REAL_CST.
30239 (class operator_cst): Move to range-op-mixed.h.
30240 (integral_table::integral_table): Remove op_cst.
30241 (pointer_table::pointer_table): Remove op_cst.
30243 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
30245 * range-op-float.cc (foperator_identity): Remove. Move prototypes
30246 to range-op-mixed.h
30247 (operator_identity::fold_range): Rename from foperator_identity.
30248 (operator_identity::op1_range): Ditto.
30249 (float_table::float_table): Remove fop_identity.
30250 * range-op-mixed.h (class operator_identity): Combined from integer
30252 * range-op.cc (op_identity): New object.
30253 (unified_table::unified_table): Add op_identity.
30254 (class operator_identity): Move to range-op-mixed.h.
30255 (integral_table::integral_table): Remove identity.
30256 (pointer_table::pointer_table): Remove identity.
30258 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
30260 * range-op-float.cc (foperator_ge): Remove. Move prototypes
30261 to range-op-mixed.h
30262 (operator_ge::fold_range): Rename from foperator_ge.
30263 (operator_ge::op1_range): Ditto.
30264 (float_table::float_table): Remove GE_EXPR.
30265 * range-op-mixed.h (class operator_ge): Combined from integer
30267 * range-op.cc (op_ge): New object.
30268 (unified_table::unified_table): Add GE_EXPR.
30269 (class operator_ge): Move to range-op-mixed.h.
30270 (ge_op1_op2_relation): Fold into
30271 operator_ge::op1_op2_relation.
30272 (integral_table::integral_table): Remove GE_EXPR.
30273 (pointer_table::pointer_table): Remove GE_EXPR.
30274 * range-op.h (ge_op1_op2_relation): Delete.
30276 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
30278 * range-op-float.cc (foperator_gt): Remove. Move prototypes
30279 to range-op-mixed.h
30280 (operator_gt::fold_range): Rename from foperator_gt.
30281 (operator_gt::op1_range): Ditto.
30282 (float_table::float_table): Remove GT_EXPR.
30283 * range-op-mixed.h (class operator_gt): Combined from integer
30285 * range-op.cc (op_gt): New object.
30286 (unified_table::unified_table): Add GT_EXPR.
30287 (class operator_gt): Move to range-op-mixed.h.
30288 (gt_op1_op2_relation): Fold into
30289 operator_gt::op1_op2_relation.
30290 (integral_table::integral_table): Remove GT_EXPR.
30291 (pointer_table::pointer_table): Remove GT_EXPR.
30292 * range-op.h (gt_op1_op2_relation): Delete.
30294 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
30296 * range-op-float.cc (foperator_le): Remove. Move prototypes
30297 to range-op-mixed.h
30298 (operator_le::fold_range): Rename from foperator_le.
30299 (operator_le::op1_range): Ditto.
30300 (float_table::float_table): Remove LE_EXPR.
30301 * range-op-mixed.h (class operator_le): Combined from integer
30303 * range-op.cc (op_le): New object.
30304 (unified_table::unified_table): Add LE_EXPR.
30305 (class operator_le): Move to range-op-mixed.h.
30306 (le_op1_op2_relation): Fold into
30307 operator_le::op1_op2_relation.
30308 (integral_table::integral_table): Remove LE_EXPR.
30309 (pointer_table::pointer_table): Remove LE_EXPR.
30310 * range-op.h (le_op1_op2_relation): Delete.
30312 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
30314 * range-op-float.cc (foperator_lt): Remove. Move prototypes
30315 to range-op-mixed.h
30316 (operator_lt::fold_range): Rename from foperator_lt.
30317 (operator_lt::op1_range): Ditto.
30318 (float_table::float_table): Remove LT_EXPR.
30319 * range-op-mixed.h (class operator_lt): Combined from integer
30321 * range-op.cc (op_lt): New object.
30322 (unified_table::unified_table): Add LT_EXPR.
30323 (class operator_lt): Move to range-op-mixed.h.
30324 (lt_op1_op2_relation): Fold into
30325 operator_lt::op1_op2_relation.
30326 (integral_table::integral_table): Remove LT_EXPR.
30327 (pointer_table::pointer_table): Remove LT_EXPR.
30328 * range-op.h (lt_op1_op2_relation): Delete.
30330 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
30332 * range-op-float.cc (foperator_not_equal): Remove. Move prototypes
30333 to range-op-mixed.h
30334 (operator_equal::fold_range): Rename from foperator_not_equal.
30335 (operator_equal::op1_range): Ditto.
30336 (float_table::float_table): Remove NE_EXPR.
30337 * range-op-mixed.h (class operator_not_equal): Combined from integer
30339 * range-op.cc (op_equal): New object.
30340 (unified_table::unified_table): Add NE_EXPR.
30341 (class operator_not_equal): Move to range-op-mixed.h.
30342 (not_equal_op1_op2_relation): Fold into
30343 operator_not_equal::op1_op2_relation.
30344 (integral_table::integral_table): Remove NE_EXPR.
30345 (pointer_table::pointer_table): Remove NE_EXPR.
30346 * range-op.h (not_equal_op1_op2_relation): Delete.
30348 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
30350 * range-op-float.cc (foperator_equal): Remove. Move prototypes
30351 to range-op-mixed.h
30352 (operator_equal::fold_range): Rename from foperator_equal.
30353 (operator_equal::op1_range): Ditto.
30354 (float_table::float_table): Remove EQ_EXPR.
30355 * range-op-mixed.h (class operator_equal): Combined from integer
30357 * range-op.cc (op_equal): New object.
30358 (unified_table::unified_table): Add EQ_EXPR.
30359 (class operator_equal): Move to range-op-mixed.h.
30360 (equal_op1_op2_relation): Fold into
30361 operator_equal::op1_op2_relation.
30362 (integral_table::integral_table): Remove EQ_EXPR.
30363 (pointer_table::pointer_table): Remove EQ_EXPR.
30364 * range-op.h (equal_op1_op2_relation): Delete.
30366 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
30368 * range-op-float.cc (class float_table): Move to header.
30369 (float_table::float_table): Move float only operators to...
30370 (range_op_table::initialize_float_ops): Here.
30371 * range-op-mixed.h: New.
30372 * range-op.cc (integral_tree_table, pointer_tree_table): Moved
30374 (float_tree_table): Moved from range-op-float.cc.
30375 (unified_tree_table): New.
30376 (unified_table::unified_table): New. Call initialize routines.
30377 (get_op_handler): Check unified table first.
30378 (range_op_handler::range_op_handler): Handle no type constructor.
30379 (integral_table::integral_table): Move integral only operators to...
30380 (range_op_table::initialize_integral_ops): Here.
30381 (pointer_table::pointer_table): Move pointer only operators to...
30382 (range_op_table::initialize_pointer_ops): Here.
30383 * range-op.h (enum bool_range_state): Move to range-op-mixed.h.
30384 (get_bool_state): Ditto.
30385 (empty_range_varying): Ditto.
30386 (relop_early_resolve): Ditto.
30387 (class range_op_table): Add new init methods for range types.
30388 (class integral_table): Move declaration to here.
30389 (class pointer_table): Move declaration to here.
30390 (class float_table): Move declaration to here.
30392 2023-06-09 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30393 Richard Sandiford <richard.sandiford@arm.com>
30394 Richard Biener <rguenther@suse.de>
30396 * doc/md.texi: Add SELECT_VL support.
30397 * internal-fn.def (SELECT_VL): Ditto.
30398 * optabs.def (OPTAB_D): Ditto.
30399 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly): Ditto.
30400 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): Ditto.
30401 * tree-vect-stmts.cc (get_select_vl_data_ref_ptr): Ditto.
30402 (vectorizable_store): Ditto.
30403 (vectorizable_load): Ditto.
30404 * tree-vectorizer.h (LOOP_VINFO_USING_SELECT_VL_P): Ditto.
30406 2023-06-09 Andrew MacLeod <amacleod@redhat.com>
30409 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Check param
30412 2023-06-09 Andrew MacLeod <amacleod@redhat.com>
30414 * range-op.cc (range_cast): Move to...
30415 * range-op.h (range_cast): Here and add generic a version.
30417 2023-06-09 Marek Polacek <polacek@redhat.com>
30421 * doc/invoke.texi: Clarify that -Wmissing-field-initializers doesn't
30422 warn about designated initializers in C only.
30424 2023-06-09 Andrew Pinski <apinski@marvell.com>
30426 PR tree-optimization/97711
30427 PR tree-optimization/110155
30428 * match.pd ((zero_one == 0) ? y : z <op> y): Add plus to the op.
30429 ((zero_one != 0) ? z <op> y : y): Likewise.
30431 2023-06-09 Andrew Pinski <apinski@marvell.com>
30433 * match.pd ((zero_one ==/!= 0) ? y : z <op> y): Use
30434 multiply rather than negation/bit_and.
30436 2023-06-09 Andrew Pinski <apinski@marvell.com>
30438 * match.pd (`X & -Y -> X * Y`): Allow for truncation
30439 and the same type for unsigned types.
30441 2023-06-09 Andrew Pinski <apinski@marvell.com>
30443 PR tree-optimization/110165
30444 PR tree-optimization/110166
30445 * match.pd (zero_one_valued_p): Don't accept
30446 signed 1-bit integers.
30448 2023-06-09 Richard Biener <rguenther@suse.de>
30450 * match.pd (two conversions in a row): Use element_precision
30451 to DTRT for VECTOR_TYPE.
30453 2023-06-09 Pan Li <pan2.li@intel.com>
30455 * config/riscv/riscv.md (enabled): Move to another place, and
30456 add fp_vector_disabled to the cond.
30457 (fp_vector_disabled): New attr defined for disabling fp.
30458 * config/riscv/vector-iterators.md: Fix V_WHOLE and V_FRACT.
30460 2023-06-09 Pan Li <pan2.li@intel.com>
30462 * config/riscv/riscv-protos.h (enum frm_field_enum): Adjust
30465 2023-06-09 liuhongt <hongtao.liu@intel.com>
30468 * config/i386/i386.cc (ix86_gimple_fold_builtin): Explicitly
30469 view_convert_expr mask to signed type when folding pblendvb
30472 2023-06-09 liuhongt <hongtao.liu@intel.com>
30475 * config/i386/i386.cc (ix86_gimple_fold_builtin): Fold
30476 _mm{,256,512}_abs_{epi8,epi16,epi32,epi64} into gimple
30477 ABSU_EXPR + VCE, don't fold _mm_abs_{pi8,pi16,pi32} w/o
30479 * config/i386/i386-builtin.def: Replace CODE_FOR_nothing with
30480 real codename for __builtin_ia32_pabs{b,w,d}.
30482 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
30484 * gimple-range-op.cc
30485 (gimple_range_op_handler::gimple_range_op_handler): Adjust.
30486 (gimple_range_op_handler::maybe_builtin_call): Adjust.
30487 * gimple-range-op.h (operand1, operand2): Use m_operator.
30488 * range-op.cc (integral_table, pointer_table): Relocate.
30489 (get_op_handler): Rename from get_handler and handle all types.
30490 (range_op_handler::range_op_handler): Relocate.
30491 (range_op_handler::set_op_handler): Relocate and adjust.
30492 (range_op_handler::range_op_handler): Relocate.
30493 (dispatch_trio): New.
30494 (RO_III, RO_IFI, RO_IFF, RO_FFF, RO_FIF, RO_FII): New consts.
30495 (range_op_handler::dispatch_kind): New.
30496 (range_op_handler::fold_range): Relocate and Use new dispatch value.
30497 (range_op_handler::op1_range): Ditto.
30498 (range_op_handler::op2_range): Ditto.
30499 (range_op_handler::lhs_op1_relation): Ditto.
30500 (range_op_handler::lhs_op2_relation): Ditto.
30501 (range_op_handler::op1_op2_relation): Ditto.
30502 (range_op_handler::set_op_handler): Use m_operator member.
30503 * range-op.h (range_op_handler::operator bool): Use m_operator.
30504 (range_op_handler::dispatch_kind): New.
30505 (range_op_handler::m_valid): Delete.
30506 (range_op_handler::m_int): Delete
30507 (range_op_handler::m_float): Delete
30508 (range_op_handler::m_operator): New.
30509 (range_op_table::operator[]): Relocate from .cc file.
30510 (range_op_table::set): Ditto.
30511 * value-range.h (class vrange): Make range_op_handler a friend.
30513 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
30515 * gimple-range-op.cc (cfn_constant_float_p): Change base class.
30516 (cfn_pass_through_arg1): Adjust using statemenmt.
30517 (cfn_signbit): Change base class, adjust using statement.
30518 (cfn_copysign): Ditto.
30520 (cfn_sincos): Ditto.
30521 * range-op-float.cc (fold_range): Change class to range_operator.
30525 (lhs_op1_relation): Ditto.
30526 (lhs_op2_relation): Ditto.
30527 (op1_op2_relation): Ditto.
30528 (foperator_*): Ditto.
30529 (class float_table): New. Inherit from range_op_table.
30530 (floating_tree_table) Change to range_op_table pointer.
30531 (class floating_op_table): Delete.
30532 * range-op.cc (operator_equal): Adjust using statement.
30533 (operator_not_equal): Ditto.
30534 (operator_lt, operator_le, operator_gt, operator_ge): Ditto.
30535 (operator_minus, operator_cast): Ditto.
30536 (operator_bitwise_and, pointer_plus_operator): Ditto.
30537 (get_float_handle): Change return type.
30538 * range-op.h (range_operator_float): Delete. Relocate all methods
30539 into class range_operator.
30540 (range_op_handler::m_float): Change type to range_operator.
30541 (floating_op_table): Delete.
30542 (floating_tree_table): Change type.
30544 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
30546 * range-op.cc (range_operator::fold_range): Call virtual routine.
30547 (range_operator::update_bitmask): New.
30548 (operator_equal::update_bitmask): New.
30549 (operator_not_equal::update_bitmask): New.
30550 (operator_lt::update_bitmask): New.
30551 (operator_le::update_bitmask): New.
30552 (operator_gt::update_bitmask): New.
30553 (operator_ge::update_bitmask): New.
30554 (operator_ge::update_bitmask): New.
30555 (operator_plus::update_bitmask): New.
30556 (operator_minus::update_bitmask): New.
30557 (operator_pointer_diff::update_bitmask): New.
30558 (operator_min::update_bitmask): New.
30559 (operator_max::update_bitmask): New.
30560 (operator_mult::update_bitmask): New.
30561 (operator_div:operator_div):New.
30562 (operator_div::update_bitmask): New.
30563 (operator_div::m_code): New member.
30564 (operator_exact_divide::operator_exact_divide): New constructor.
30565 (operator_lshift::update_bitmask): New.
30566 (operator_rshift::update_bitmask): New.
30567 (operator_bitwise_and::update_bitmask): New.
30568 (operator_bitwise_or::update_bitmask): New.
30569 (operator_bitwise_xor::update_bitmask): New.
30570 (operator_trunc_mod::update_bitmask): New.
30571 (op_ident, op_unknown, op_ptr_min_max): New.
30572 (op_nop, op_convert): Delete.
30573 (op_ssa, op_paren, op_obj_type): Delete.
30574 (op_realpart, op_imagpart): Delete.
30575 (op_ptr_min, op_ptr_max): Delete.
30576 (pointer_plus_operator:update_bitmask): New.
30577 (range_op_table::set): Do not use m_code.
30578 (integral_table::integral_table): Adjust to single instances.
30579 * range-op.h (range_operator::range_operator): Delete.
30580 (range_operator::m_code): Delete.
30581 (range_operator::update_bitmask): New.
30583 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
30585 * range-op-float.cc (range_operator_float::fold_range): Return
30586 NAN of the result type.
30588 2023-06-08 Jakub Jelinek <jakub@redhat.com>
30590 * optabs.cc (expand_ffs): Add forward declaration.
30591 (expand_doubleword_clz): Rename to ...
30592 (expand_doubleword_clz_ctz_ffs): ... this. Add UNOPTAB argument,
30593 handle also doubleword CTZ and FFS in addition to CLZ.
30594 (expand_unop): Adjust caller. Also call it for doubleword
30595 ctz_optab and ffs_optab.
30597 2023-06-08 Jakub Jelinek <jakub@redhat.com>
30600 * config/i386/i386-expand.cc (ix86_expand_vector_init_general): For
30601 n_words == 2 recurse with mmx_ok as first argument rather than false.
30603 2023-06-07 Roger Sayle <roger@nextmovesoftware.com>
30605 * wide-int.cc (wi::bitreverse_large): Use HOST_WIDE_INT_1U to
30606 avoid sign extension/undefined behaviour when setting each bit.
30608 2023-06-07 Roger Sayle <roger@nextmovesoftware.com>
30609 Uros Bizjak <ubizjak@gmail.com>
30611 * config/i386/i386-expand.cc (ix86_expand_builtin) <handlecarry>:
30612 Use new x86_stc instruction when the carry flag must be set.
30613 * config/i386/i386.cc (ix86_cc_mode): Use CCCmode for *x86_cmc.
30614 (ix86_rtx_costs): Provide accurate rtx_costs for *x86_cmc.
30615 * config/i386/i386.h (TARGET_SLOW_STC): New define.
30616 * config/i386/i386.md (UNSPEC_STC): New UNSPEC for stc.
30617 (x86_stc): New define_insn.
30618 (define_peephole2): Convert x86_stc into alternate implementation
30619 on pentium4 without -Os when a QImode register is available.
30620 (*x86_cmc): New define_insn.
30621 (define_peephole2): Convert *x86_cmc into alternate implementation
30622 on pentium4 without -Os when a QImode register is available.
30623 (*setccc): New define_insn_and_split for a no-op CCCmode move.
30624 (*setcc_qi_negqi_ccc_1_<mode>): New define_insn_and_split to
30625 recognize (and eliminate) the carry flag being copied to itself.
30626 (*setcc_qi_negqi_ccc_2_<mode>): Likewise.
30627 * config/i386/x86-tune.def (X86_TUNE_SLOW_STC): New tuning flag.
30629 2023-06-07 Andrew Pinski <apinski@marvell.com>
30631 * match.pd: Fix comment for the
30632 `(zero_one ==/!= 0) ? y : z <op> y` patterns.
30634 2023-06-07 Jeff Law <jlaw@ventanamicro.com>
30635 Jeff Law <jlaw@ventanamicro.com>
30637 * config/riscv/bitmanip.md (rotrdi3, rotrsi3, rotlsi3): New expanders.
30638 (rotrsi3_sext): Expose generator.
30639 (rotlsi3 pattern): Hide generator.
30640 * config/riscv/riscv-protos.h (riscv_emit_binary): New function
30642 * config/riscv/riscv.cc (riscv_emit_binary): Removed static
30643 * config/riscv/riscv.md (addsi3, subsi3, negsi2): Hide generator.
30644 (mulsi3, <optab>si3): Likewise.
30645 (addsi3, subsi3, negsi2, mulsi3, <optab>si3): New expanders.
30646 (addv<mode>4, subv<mode>4, mulv<mode>4): Use riscv_emit_binary.
30647 (<u>mulsidi3): Likewise.
30648 (addsi3_extended, subsi3_extended, negsi2_extended): Expose generator.
30649 (mulsi3_extended, <optab>si3_extended): Likewise.
30650 (splitter for shadd feeding divison): Update RTL pattern to account
30651 for changes in how 32 bit ops are expanded for TARGET_64BIT.
30652 * loop-iv.cc (get_biv_step_1): Process src of extension when it PLUS.
30654 2023-06-07 Dimitar Dimitrov <dimitar@dinux.eu>
30657 * config/riscv/riscv.cc (riscv_print_operand): Calculate
30658 memmodel only when it is valid.
30660 2023-06-07 Dimitar Dimitrov <dimitar@dinux.eu>
30662 * config/riscv/riscv.cc (riscv_const_insns): Recursively call
30663 for constant element of a vector.
30665 2023-06-07 Jakub Jelinek <jakub@redhat.com>
30667 * match.pd (zero_one_valued_p): Don't handle integer_zerop specially,
30668 instead compare tree_nonzero_bits <= 1U rather than just == 1.
30670 2023-06-07 Alex Coplan <alex.coplan@arm.com>
30673 * config/aarch64/aarch64-builtins.cc (aarch64_general_simulate_builtin):
30675 (aarch64_init_ls64_builtins): ... here. Switch to declaring public ACLE
30676 names for builtins.
30677 (aarch64_general_init_builtins): Ensure we invoke the arm_acle.h
30678 setup if in_lto_p, just like we do for SVE.
30679 * config/aarch64/arm_acle.h: (__arm_ld64b): Delete.
30680 (__arm_st64b): Delete.
30681 (__arm_st64bv): Delete.
30682 (__arm_st64bv0): Delete.
30684 2023-06-07 Alex Coplan <alex.coplan@arm.com>
30687 * config/aarch64/aarch64-builtins.cc (aarch64_expand_builtin_ls64):
30688 Use input operand for the destination address.
30689 * config/aarch64/aarch64.md (st64b): Fix constraint on address
30692 2023-06-07 Alex Coplan <alex.coplan@arm.com>
30695 * config/aarch64/aarch64-builtins.cc (aarch64_init_ls64_builtins_types):
30696 Replace eight consecutive spaces with tabs.
30697 (aarch64_init_ls64_builtins): Likewise.
30698 (aarch64_expand_builtin_ls64): Likewise.
30699 * config/aarch64/aarch64.md (ld64b): Likewise.
30702 (st64bv0): Likewise.
30704 2023-06-07 Vladimir N. Makarov <vmakarov@redhat.com>
30706 * ira-costs.cc: (find_costs_and_classes): Constrain classes of pic
30707 offset table pseudo to a general reg subset.
30709 2023-06-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30711 * config/aarch64/aarch64-simd.md (aarch64_sqmovun<mode><vczle><vczbe>):
30713 (*aarch64_sqmovun<mode>_insn<vczle><vczbe>): ... This. Reimplement
30715 (aarch64_sqmovun<mode> [SD_HSDI]): Reimplement with RTL codes.
30716 (aarch64_sqxtun2<mode>_le): Likewise.
30717 (aarch64_sqxtun2<mode>_be): Likewise.
30718 (aarch64_sqxtun2<mode>): Adjust for the above.
30719 (aarch64_sqmovun<mode>): New define_expand.
30720 * config/aarch64/iterators.md (UNSPEC_SQXTUN): Delete.
30721 (half_mask): New mode attribute.
30722 * config/aarch64/predicates.md (aarch64_simd_umax_half_mode):
30725 2023-06-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30727 * config/aarch64/aarch64-simd.md (aarch64_addp<mode><vczle><vczbe>):
30729 (aarch64_addp<mode>_insn): ... This...
30730 (aarch64_addp<mode><vczle><vczbe>_insn): ... And this.
30731 (aarch64_addp<mode>): New define_expand.
30733 2023-06-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
30735 * config/riscv/riscv-protos.h (expand_vec_perm_const): New function.
30736 * config/riscv/riscv-v.cc
30737 (rvv_builder::can_duplicate_repeating_sequence_p): Support POLY
30739 (rvv_builder::single_step_npatterns_p): New function.
30740 (rvv_builder::npatterns_all_equal_p): Ditto.
30741 (const_vec_all_in_range_p): Support POLY handling.
30742 (gen_const_vector_dup): Ditto.
30743 (emit_vlmax_gather_insn): Add vrgatherei16.
30744 (emit_vlmax_masked_gather_mu_insn): Ditto.
30745 (expand_const_vector): Add VLA SLP const vector support.
30746 (expand_vec_perm): Support POLY.
30747 (struct expand_vec_perm_d): New struct.
30748 (shuffle_generic_patterns): New function.
30749 (expand_vec_perm_const_1): Ditto.
30750 (expand_vec_perm_const): Ditto.
30751 * config/riscv/riscv.cc (riscv_vectorize_vec_perm_const): Ditto.
30752 (TARGET_VECTORIZE_VEC_PERM_CONST): New targethook.
30754 2023-06-07 Andrew Pinski <apinski@marvell.com>
30756 PR middle-end/110117
30757 * expr.cc (expand_single_bit_test): Handle
30758 const_int from expand_expr.
30760 2023-06-07 Andrew Pinski <apinski@marvell.com>
30762 * expr.cc (do_store_flag): Rearrange the
30763 TER code so that it overrides the nonzero bits
30764 info if we had `a & POW2`.
30766 2023-06-07 Andrew Pinski <apinski@marvell.com>
30768 PR tree-optimization/110134
30769 * match.pd (-A CMP -B -> B CMP A): Allow EQ/NE for all integer
30771 (-A CMP CST -> B CMP (-CST)): Likewise.
30773 2023-06-07 Andrew Pinski <apinski@marvell.com>
30775 PR tree-optimization/89263
30776 PR tree-optimization/99069
30777 PR tree-optimization/20083
30778 PR tree-optimization/94898
30779 * match.pd: Add patterns to optimize `a ? onezero : onezero` with
30780 one of the operands are constant.
30782 2023-06-07 Andrew Pinski <apinski@marvell.com>
30784 * match.pd (zero_one_valued_p): Match 0 integer constant
30787 2023-06-07 Pan Li <pan2.li@intel.com>
30789 * config/riscv/riscv-vector-builtins-types.def
30790 (vfloat32mf2_t): Take RVV_REQUIRE_ELEN_FP_16 as requirement.
30791 (vfloat32m1_t): Ditto.
30792 (vfloat32m2_t): Ditto.
30793 (vfloat32m4_t): Ditto.
30794 (vfloat32m8_t): Ditto.
30795 (vint16mf4_t): Ditto.
30796 (vint16mf2_t): Ditto.
30797 (vint16m1_t): Ditto.
30798 (vint16m2_t): Ditto.
30799 (vint16m4_t): Ditto.
30800 (vint16m8_t): Ditto.
30801 (vuint16mf4_t): Ditto.
30802 (vuint16mf2_t): Ditto.
30803 (vuint16m1_t): Ditto.
30804 (vuint16m2_t): Ditto.
30805 (vuint16m4_t): Ditto.
30806 (vuint16m8_t): Ditto.
30807 (vint32mf2_t): Ditto.
30808 (vint32m1_t): Ditto.
30809 (vint32m2_t): Ditto.
30810 (vint32m4_t): Ditto.
30811 (vint32m8_t): Ditto.
30812 (vuint32mf2_t): Ditto.
30813 (vuint32m1_t): Ditto.
30814 (vuint32m2_t): Ditto.
30815 (vuint32m4_t): Ditto.
30816 (vuint32m8_t): Ditto.
30818 2023-06-07 Jason Merrill <jason@redhat.com>
30821 * doc/invoke.texi: Document it.
30823 2023-06-06 Roger Sayle <roger@nextmovesoftware.com>
30825 * doc/rtl.texi (bitreverse, copysign): Document new RTX codes.
30826 * rtl.def (BITREVERSE, COPYSIGN): Define new RTX codes.
30827 * simplify-rtx.cc (simplify_unary_operation_1): Optimize
30828 NOT (BITREVERSE x) as BITREVERSE (NOT x).
30829 Optimize POPCOUNT (BITREVERSE x) as POPCOUNT x.
30830 Optimize PARITY (BITREVERSE x) as PARITY x.
30831 Optimize BITREVERSE (BITREVERSE x) as x.
30832 (simplify_const_unary_operation) <case BITREVERSE>: Evaluate
30833 BITREVERSE of a constant integer at compile-time.
30834 (simplify_binary_operation_1) <case COPYSIGN>: Optimize
30835 COPY_SIGN (x, x) as x. Optimize COPYSIGN (x, C) as ABS x
30836 or NEG (ABS x) for constant C. Optimize COPYSIGN (ABS x, y)
30837 and COPYSIGN (NEG x, y) as COPYSIGN (x, y).
30838 Optimize COPYSIGN (x, ABS y) as ABS x.
30839 Optimize COPYSIGN (COPYSIGN (x, y), z) as COPYSIGN (x, z).
30840 Optimize COPYSIGN (x, COPYSIGN (y, z)) as COPYSIGN (x, z).
30841 (simplify_const_binary_operation): Evaluate COPYSIGN of constant
30842 arguments at compile-time.
30844 2023-06-06 Uros Bizjak <ubizjak@gmail.com>
30846 * rtl.h (function_invariant_p): Change return type from int to bool.
30847 * reload1.cc (function_invariant_p): Change return type from
30848 int to bool and adjust function body accordingly.
30850 2023-06-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
30852 * config/riscv/autovec-opt.md (*<optab>_fma<mode>): New pattern.
30853 (*single_<optab>mult_plus<mode>): Ditto.
30854 (*double_<optab>mult_plus<mode>): Ditto.
30855 (*sign_zero_extend_fma): Ditto.
30856 (*zero_sign_extend_fma): Ditto.
30857 * config/riscv/riscv-protos.h (enum insn_type): New enum.
30859 2023-06-06 Kwok Cheung Yeung <kcy@codesourcery.com>
30860 Tobias Burnus <tobias@codesourcery.com>
30862 * gimplify.cc (omp_notice_variable): Apply GOVD_MAP_ALLOC_ONLY flag
30863 and defaultmap flags if the defaultmap has GOVD_MAP_FORCE_PRESENT flag
30865 (omp_get_attachment): Handle map clauses with 'present' modifier.
30866 (omp_group_base): Likewise.
30867 (gimplify_scan_omp_clauses): Reorder present maps to come first.
30868 Set GOVD flags for present defaultmaps.
30869 (gimplify_adjust_omp_clauses_1): Set map kind for present defaultmaps.
30870 * omp-low.cc (scan_sharing_clauses): Handle 'always, present' map
30872 (lower_omp_target): Handle map clauses with 'present' modifier.
30873 Handle 'to' and 'from' clauses with 'present'.
30874 * tree-core.h (enum omp_clause_defaultmap_kind): Add
30875 OMP_CLAUSE_DEFAULTMAP_PRESENT defaultmap kind.
30876 * tree-pretty-print.cc (dump_omp_clause): Handle 'map', 'to' and
30877 'from' clauses with 'present' modifier. Handle present defaultmap.
30878 * tree.h (OMP_CLAUSE_MOTION_PRESENT): New #define.
30880 2023-06-06 Segher Boessenkool <segher@kernel.crashing.org>
30882 * config/rs6000/genfusion.pl: Delete some dead code.
30884 2023-06-06 Segher Boessenkool <segher@kernel.crashing.org>
30886 * config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): New, rewritten and
30888 (gen_ld_cmpi_p10): ... this.
30890 2023-06-06 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
30893 * config/rs6000/rs6000.cc (vec_const_128bit_to_bytes): Remove
30894 duplicate expression.
30896 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30898 * config/aarch64/aarch64-builtins.cc (aarch64_general_gimple_fold_builtin):
30899 Handle unsigned reduc_plus_scal_ builtins.
30900 * config/aarch64/aarch64-simd-builtins.def (addp): Delete DImode instances.
30901 * config/aarch64/aarch64-simd.md (aarch64_addpdi): Delete.
30902 * config/aarch64/arm_neon.h (vpaddd_s64): Reimplement with
30903 __builtin_aarch64_reduc_plus_scal_v2di.
30904 (vpaddd_u64): Reimplement with __builtin_aarch64_reduc_plus_scal_v2di_uu.
30906 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30908 * config/aarch64/aarch64-simd.md (aarch64_<sur>shr_n<mode>): Delete.
30909 (aarch64_<sra_op>rshr_n<mode><vczle><vczbe>_insn): New define_insn.
30910 (aarch64_<sra_op>rshr_n<mode>): New define_expand.
30912 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30914 * config/aarch64/aarch64-simd.md (aarch64_shrn<mode>_insn_le): Delete.
30915 (aarch64_shrn<mode>_insn_be): Delete.
30916 (*aarch64_<srn_op>shrn<mode>_vect): Rename to...
30917 (*aarch64_<srn_op>shrn<mode><vczle><vczbe>): ... This.
30918 (aarch64_shrn<mode>): Remove reference to the above deleted patterns.
30919 (aarch64_rshrn<mode>_insn_le): Delete.
30920 (aarch64_rshrn<mode>_insn_be): Delete.
30921 (aarch64_rshrn<mode><vczle><vczbe>_insn): New define_insn.
30922 (aarch64_rshrn<mode>): Remove references to the above deleted patterns.
30924 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30926 * config/aarch64/aarch64-protos.h (aarch64_parallel_select_half_p):
30928 (aarch64_pars_overlap_p): Likewise.
30929 * config/aarch64/aarch64-simd.md (aarch64_<su>addlv<mode>):
30930 Express in terms of UNSPEC_ADDV.
30931 (*aarch64_<su>addlv<VDQV_L:mode>_ze<GPI:mode>): Likewise.
30932 (*aarch64_<su>addlv<mode>_reduction): Define.
30933 (*aarch64_uaddlv<mode>_reduction_2): Likewise.
30934 * config/aarch64/aarch64.cc (aarch64_parallel_select_half_p): Define.
30935 (aarch64_pars_overlap_p): Likewise.
30936 * config/aarch64/iterators.md (UNSPEC_SADDLV, UNSPEC_UADDLV): Delete.
30937 (VQUADW): New mode attribute.
30938 (VWIDE2X_S): Likewise.
30940 (su): Delete handling of UNSPEC_SADDLV, UNSPEC_UADDLV.
30941 * config/aarch64/predicates.md (vect_par_cnst_select_half): Define.
30943 2023-06-06 Richard Biener <rguenther@suse.de>
30945 PR middle-end/110055
30946 * gimplify.cc (gimplify_target_expr): Do not emit
30947 CLOBBERs for variables which have static storage duration
30948 after gimplifying their initializers.
30950 2023-06-06 Richard Biener <rguenther@suse.de>
30952 PR tree-optimization/109143
30953 * tree-ssa-structalias.cc (solution_set_expand): Avoid
30954 one bitmap iteration and optimize bit range setting.
30956 2023-06-06 Hans-Peter Nilsson <hp@axis.com>
30958 PR bootstrap/110120
30959 * postreload.cc (reload_cse_move2add, move2add_use_add2_insn): Use
30960 XVECEXP, not XEXP, to access first item of a PARALLEL.
30962 2023-06-06 Pan Li <pan2.li@intel.com>
30964 * config/riscv/riscv-vector-builtins-types.def
30965 (vfloat16mf4_t): Add vfloat16mf4_t to WF operations.
30966 (vfloat16mf2_t): Likewise.
30967 (vfloat16m1_t): Likewise.
30968 (vfloat16m2_t): Likewise.
30969 (vfloat16m4_t): Likewise.
30970 (vfloat16m8_t): Likewise.
30971 * config/riscv/vector-iterators.md: Add FP=16 to VWF, VWF_ZVE64,
30972 VWLMUL1, VWLMUL1_ZVE64, vwlmul1 and vwlmul1_zve64.
30974 2023-06-06 Fei Gao <gaofei@eswincomputing.com>
30976 * config/riscv/riscv.cc (riscv_adjust_libcall_cfi_prologue): Use Pmode
30977 for cfi reg/mem machmode
30978 (riscv_adjust_libcall_cfi_epilogue): Use Pmode for cfi reg machmode
30980 2023-06-06 Li Xu <xuli1@eswincomputing.com>
30982 * config/riscv/vector-iterators.md:
30983 Fix 'REQUIREMENT' for machine_mode 'MODE'.
30984 * config/riscv/vector.md (@pred_indexed_<order>store<VNX16_QHS:mode>
30985 <VNX16_QHSI:mode>): change VNX16_QHSI to VNX16_QHSDI.
30986 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSDI:mode>): Ditto.
30988 2023-06-06 Pan Li <pan2.li@intel.com>
30990 * config/riscv/vector-iterators.md: Fix typo in mode attr.
30992 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
30993 Joel Hutton <joel.hutton@arm.com>
30995 * doc/generic.texi: Remove old tree codes.
30996 * expr.cc (expand_expr_real_2): Remove old tree code cases.
30997 * gimple-pretty-print.cc (dump_binary_rhs): Likewise.
30998 * optabs-tree.cc (optab_for_tree_code): Likewise.
30999 (supportable_half_widening_operation): Likewise.
31000 * tree-cfg.cc (verify_gimple_assign_binary): Likewise.
31001 * tree-inline.cc (estimate_operator_cost): Likewise.
31002 (op_symbol_code): Likewise.
31003 * tree-vect-data-refs.cc (vect_get_smallest_scalar_type): Likewise.
31004 (vect_analyze_data_ref_accesses): Likewise.
31005 * tree-vect-generic.cc (expand_vector_operations_1): Likewise.
31006 * cfgexpand.cc (expand_debug_expr): Likewise.
31007 * tree-vect-stmts.cc (vectorizable_conversion): Likewise.
31008 (supportable_widening_operation): Likewise.
31009 * gimple-range-op.cc (gimple_range_op_handler::maybe_non_standard):
31011 * optabs.def (vec_widen_ssubl_hi_optab, vec_widen_ssubl_lo_optab,
31012 vec_widen_saddl_hi_optab, vec_widen_saddl_lo_optab,
31013 vec_widen_usubl_hi_optab, vec_widen_usubl_lo_optab,
31014 vec_widen_uaddl_hi_optab, vec_widen_uaddl_lo_optab): Remove optabs.
31015 * tree-pretty-print.cc (dump_generic_node): Remove tree code definition.
31016 * tree.def (WIDEN_PLUS_EXPR, WIDEN_MINUS_EXPR, VEC_WIDEN_PLUS_HI_EXPR,
31017 VEC_WIDEN_PLUS_LO_EXPR, VEC_WIDEN_MINUS_HI_EXPR,
31018 VEC_WIDEN_MINUS_LO_EXPR): Likewise.
31020 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
31021 Joel Hutton <joel.hutton@arm.com>
31022 Tamar Christina <tamar.christina@arm.com>
31024 * config/aarch64/aarch64-simd.md (vec_widen_<su>addl_lo_<mode>): Rename
31026 (vec_widen_<su>add_lo_<mode>): ... to this.
31027 (vec_widen_<su>addl_hi_<mode>): Rename this ...
31028 (vec_widen_<su>add_hi_<mode>): ... to this.
31029 (vec_widen_<su>subl_lo_<mode>): Rename this ...
31030 (vec_widen_<su>sub_lo_<mode>): ... to this.
31031 (vec_widen_<su>subl_hi_<mode>): Rename this ...
31032 (vec_widen_<su>sub_hi_<mode>): ...to this.
31033 * doc/generic.texi: Document new IFN codes.
31034 * internal-fn.cc (lookup_hilo_internal_fn): Add lookup function.
31035 (commutative_binary_fn_p): Add widen_plus fn's.
31036 (widening_fn_p): New function.
31037 (narrowing_fn_p): New function.
31038 (direct_internal_fn_optab): Change visibility.
31039 * internal-fn.def (DEF_INTERNAL_WIDENING_OPTAB_FN): Macro to define an
31040 internal_fn that expands into multiple internal_fns for widening.
31041 (IFN_VEC_WIDEN_PLUS, IFN_VEC_WIDEN_PLUS_HI, IFN_VEC_WIDEN_PLUS_LO,
31042 IFN_VEC_WIDEN_PLUS_EVEN, IFN_VEC_WIDEN_PLUS_ODD,
31043 IFN_VEC_WIDEN_MINUS, IFN_VEC_WIDEN_MINUS_HI,
31044 IFN_VEC_WIDEN_MINUS_LO, IFN_VEC_WIDEN_MINUS_ODD,
31045 IFN_VEC_WIDEN_MINUS_EVEN): Define widening plus,minus functions.
31046 * internal-fn.h (direct_internal_fn_optab): Declare new prototype.
31047 (lookup_hilo_internal_fn): Likewise.
31048 (widening_fn_p): Likewise.
31049 (Narrowing_fn_p): Likewise.
31050 * optabs.cc (commutative_optab_p): Add widening plus optabs.
31051 * optabs.def (OPTAB_D): Define widen add, sub optabs.
31052 * tree-vect-patterns.cc (vect_recog_widen_op_pattern): Support
31053 patterns with a hi/lo or even/odd split.
31054 (vect_recog_sad_pattern): Refactor to use new IFN codes.
31055 (vect_recog_widen_plus_pattern): Likewise.
31056 (vect_recog_widen_minus_pattern): Likewise.
31057 (vect_recog_average_pattern): Likewise.
31058 * tree-vect-stmts.cc (vectorizable_conversion): Add support for
31060 (supportable_widening_operation): Likewise.
31061 * tree.def (WIDEN_SUM_EXPR): Update example to use new IFNs.
31063 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
31064 Joel Hutton <joel.hutton@arm.com>
31066 * tree-vect-patterns.cc: Add include for gimple-iterator.
31067 (vect_recog_widen_op_pattern): Refactor to use code_helper.
31068 (vect_gimple_build): New function.
31069 * tree-vect-stmts.cc (simple_integer_narrowing): Refactor to use
31071 (vectorizable_call): Likewise.
31072 (vect_gen_widened_results_half): Likewise.
31073 (vect_create_vectorized_demotion_stmts): Likewise.
31074 (vect_create_vectorized_promotion_stmts): Likewise.
31075 (vect_create_half_widening_stmts): Likewise.
31076 (vectorizable_conversion): Likewise.
31077 (supportable_widening_operation): Likewise.
31078 (supportable_narrowing_operation): Likewise.
31079 * tree-vectorizer.h (supportable_widening_operation): Change
31080 prototype to use code_helper.
31081 (supportable_narrowing_operation): Likewise.
31082 (vect_gimple_build): New function prototype.
31083 * tree.h (code_helper::safe_as_tree_code): New function.
31084 (code_helper::safe_as_fn_code): New function.
31086 2023-06-05 Roger Sayle <roger@nextmovesoftware.com>
31088 * wide-int.cc (wi::bitreverse_large): New function implementing
31089 bit reversal of an integer.
31090 * wide-int.h (wi::bitreverse): New (template) function prototype.
31091 (bitreverse_large): Prototype helper function/implementation.
31092 (wi::bitreverse): New template wrapper around bitreverse_large.
31094 2023-06-05 Uros Bizjak <ubizjak@gmail.com>
31096 * rtl.h (print_rtl_single): Change return type from int to void.
31097 (print_rtl_single_with_indent): Ditto.
31098 * print-rtl.h (class rtx_writer): Ditto. Change m_sawclose to bool.
31099 * print-rtl.cc (rtx_writer::rtx_writer): Update for m_sawclose change.
31100 (rtx_writer::print_rtx_operand_code_0): Ditto.
31101 (rtx_writer::print_rtx_operand_codes_E_and_V): Ditto.
31102 (rtx_writer::print_rtx_operand_code_i): Ditto.
31103 (rtx_writer::print_rtx_operand_code_u): Ditto.
31104 (rtx_writer::print_rtx_operand): Ditto.
31105 (rtx_writer::print_rtx): Ditto.
31106 (rtx_writer::finish_directive): Ditto.
31107 (print_rtl_single): Change return type from int to void
31108 and adjust function body accordingly.
31109 (rtx_writer::print_rtl_single_with_indent): Ditto.
31111 2023-06-05 Uros Bizjak <ubizjak@gmail.com>
31113 * rtl.h (reg_classes_intersect_p): Change return type from int to bool.
31114 (reg_class_subset_p): Ditto.
31115 * reginfo.cc (reg_classes_intersect_p): Ditto.
31116 (reg_class_subset_p): Ditto.
31118 2023-06-05 Pan Li <pan2.li@intel.com>
31120 * config/riscv/riscv-vector-builtins-types.def
31121 (vfloat32mf2_t): New type for DEF_RVV_WEXTF_OPS.
31122 (vfloat32m1_t): Ditto.
31123 (vfloat32m2_t): Ditto.
31124 (vfloat32m4_t): Ditto.
31125 (vfloat32m8_t): Ditto.
31126 (vint16mf4_t): New type for DEF_RVV_CONVERT_I_OPS.
31127 (vint16mf2_t): Ditto.
31128 (vint16m1_t): Ditto.
31129 (vint16m2_t): Ditto.
31130 (vint16m4_t): Ditto.
31131 (vint16m8_t): Ditto.
31132 (vuint16mf4_t): New type for DEF_RVV_CONVERT_U_OPS.
31133 (vuint16mf2_t): Ditto.
31134 (vuint16m1_t): Ditto.
31135 (vuint16m2_t): Ditto.
31136 (vuint16m4_t): Ditto.
31137 (vuint16m8_t): Ditto.
31138 (vint32mf2_t): New type for DEF_RVV_WCONVERT_I_OPS.
31139 (vint32m1_t): Ditto.
31140 (vint32m2_t): Ditto.
31141 (vint32m4_t): Ditto.
31142 (vint32m8_t): Ditto.
31143 (vuint32mf2_t): New type for DEF_RVV_WCONVERT_U_OPS.
31144 (vuint32m1_t): Ditto.
31145 (vuint32m2_t): Ditto.
31146 (vuint32m4_t): Ditto.
31147 (vuint32m8_t): Ditto.
31148 * config/riscv/vector-iterators.md: Add FP=16 support for V,
31149 VWCONVERTI, VCONVERT, VNCONVERT, VMUL1 and vlmul1.
31151 2023-06-05 Andrew Pinski <apinski@marvell.com>
31153 PR bootstrap/110085
31154 * Makefile.in (clean): Remove the removing of
31155 MULTILIB_DIR/MULTILIB_OPTIONS directories.
31157 2023-06-05 YunQiang Su <yunqiang.su@cipunited.com>
31159 * config/mips/mips-protos.h (mips_emit_speculation_barrier): New
31161 * config/mips/mips.cc (speculation_barrier_libfunc): New static
31163 (mips_init_libfuncs): Initialize it.
31164 (mips_emit_speculation_barrier): New function.
31165 * config/mips/mips.md (speculation_barrier): Call
31166 mips_emit_speculation_barrier.
31168 2023-06-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
31170 * config/riscv/riscv-v.cc (class rvv_builder): Reorganize functions.
31171 (rvv_builder::can_duplicate_repeating_sequence_p): Ditto.
31172 (rvv_builder::repeating_sequence_use_merge_profitable_p): Ditto.
31173 (rvv_builder::get_merged_repeating_sequence): Ditto.
31174 (rvv_builder::get_merge_scalar_mask): Ditto.
31175 (emit_scalar_move_insn): Ditto.
31176 (emit_vlmax_integer_move_insn): Ditto.
31177 (emit_nonvlmax_integer_move_insn): Ditto.
31178 (emit_vlmax_gather_insn): Ditto.
31179 (emit_vlmax_masked_gather_mu_insn): Ditto.
31180 (get_repeating_sequence_dup_machine_mode): Ditto.
31182 2023-06-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
31184 * config/riscv/autovec.md: Split arguments.
31185 * config/riscv/riscv-protos.h (expand_vec_perm): Ditto.
31186 * config/riscv/riscv-v.cc (expand_vec_perm): Ditto.
31188 2023-06-04 Andrew Pinski <apinski@marvell.com>
31190 * expr.cc (do_store_flag): Improve for single bit testing
31191 not against zero but against that single bit.
31193 2023-06-04 Andrew Pinski <apinski@marvell.com>
31195 * expr.cc (do_store_flag): Extend the one bit checking case
31196 to handle the case where we don't have an and but rather still
31197 one bit is known to be non-zero.
31199 2023-06-04 Jeff Law <jlaw@ventanamicro.com>
31201 * config/h8300/constraints.md (Zz): Make this a normal
31203 * config/h8300/h8300.cc (TARGET_LRA_P): Remove.
31204 * config/h8300/logical.md (H8/SX bit patterns): Remove.
31206 2023-06-04 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
31208 * config/xtensa/xtensa.md (*btrue_INT_MIN, *eqne_INT_MIN):
31209 New insn_and_split patterns.
31211 2023-06-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
31214 * config/riscv/riscv-vector-builtins-bases.cc: Change expand approach.
31215 * config/riscv/vector.md (@vlmul_extx2<mode>): Remove it.
31216 (@vlmul_extx4<mode>): Ditto.
31217 (@vlmul_extx8<mode>): Ditto.
31218 (@vlmul_extx16<mode>): Ditto.
31219 (@vlmul_extx32<mode>): Ditto.
31220 (@vlmul_extx64<mode>): Ditto.
31221 (*vlmul_extx2<mode>): Ditto.
31222 (*vlmul_extx4<mode>): Ditto.
31223 (*vlmul_extx8<mode>): Ditto.
31224 (*vlmul_extx16<mode>): Ditto.
31225 (*vlmul_extx32<mode>): Ditto.
31226 (*vlmul_extx64<mode>): Ditto.
31228 2023-06-04 Pan Li <pan2.li@intel.com>
31230 * config/riscv/riscv-vector-builtins-types.def
31231 (vfloat32mf2_t): Add vfloat32mf2_t type to vfncvt.f.f.w operations.
31232 (vfloat32m1_t): Likewise.
31233 (vfloat32m2_t): Likewise.
31234 (vfloat32m4_t): Likewise.
31235 (vfloat32m8_t): Likewise.
31236 * config/riscv/riscv-vector-builtins.def: Fix typo in comments.
31237 * config/riscv/vector-iterators.md: Add single to half machine
31240 2023-06-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
31242 * config/riscv/autovec-opt.md (*<optab>not<mode>): Move to autovec-opt.md.
31243 (*n<optab><mode>): Ditto.
31244 * config/riscv/autovec.md (*<optab>not<mode>): Ditto.
31245 (*n<optab><mode>): Ditto.
31246 * config/riscv/vector.md: Ditto.
31248 2023-06-04 Roger Sayle <roger@nextmovesoftware.com>
31251 * config/i386/i386-features.cc (scalar_chain::convert_compare):
31252 Update or delete REG_EQUAL notes, converting CONST_INT and
31253 CONST_WIDE_INT immediate operands to a suitable CONST_VECTOR.
31255 2023-06-04 Jason Merrill <jason@redhat.com>
31258 * tree-eh.cc (lower_resx): Pass the exception pointer to the
31260 * except.h: Tweak comment.
31262 2023-06-04 Hans-Peter Nilsson <hp@axis.com>
31264 * postreload.cc (move2add_use_add2_insn): Handle
31265 trivial single_sets. Rename variable PAT to SET.
31266 (move2add_use_add3_insn, reload_cse_move2add): Similar.
31268 2023-06-04 Pan Li <pan2.li@intel.com>
31270 * config/riscv/riscv-vector-builtins-types.def
31271 (vfloat16mf4_t): Add the float16 type to DEF_RVV_F_OPS.
31272 (vfloat16mf2_t): Likewise.
31273 (vfloat16m1_t): Likewise.
31274 (vfloat16m2_t): Likewise.
31275 (vfloat16m4_t): Likewise.
31276 (vfloat16m8_t): Likewise.
31277 * config/riscv/riscv.md: Add vfloat16*_t to attr mode.
31278 * config/riscv/vector-iterators.md: Add vfloat16*_t machine mode
31279 to V, V_WHOLE, V_FRACT, VINDEX, VM, VEL and sew.
31280 * config/riscv/vector.md: Add vfloat16*_t machine mode to sew,
31283 2023-06-03 Fei Gao <gaofei@eswincomputing.com>
31285 * config/riscv/riscv.cc (riscv_expand_epilogue): fix cfi issue with
31288 2023-06-03 Die Li <lidie@eswincomputing.com>
31290 * config/riscv/thead.md (*th_cond_gpr_mov<GPR:mode><GPR2:mode>): Delete.
31292 2023-06-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
31294 * config/riscv/predicates.md: Change INTVAL into UINTVAL.
31296 2023-06-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
31298 * config/riscv/vector.md: Add vector-opt.md.
31299 * config/riscv/autovec-opt.md: New file.
31301 2023-06-03 liuhongt <hongtao.liu@intel.com>
31303 PR tree-optimization/110067
31304 * gimple-ssa-store-merging.cc (find_bswap_or_nop): Don't try
31305 bswap + rotate when TYPE_PRECISION(n->type) > n->range.
31307 2023-06-03 liuhongt <hongtao.liu@intel.com>
31310 * config/i386/mmx.md (truncv2hiv2qi2): New define_insn.
31311 (truncv2si<mode>2): Ditto.
31313 2023-06-02 Andrew Pinski <apinski@marvell.com>
31315 PR rtl-optimization/102733
31316 * dse.cc (store_info): Add addrspace field.
31317 (record_store): Record the address space
31318 and check to make sure they are the same.
31320 2023-06-02 Andrew Pinski <apinski@marvell.com>
31322 PR rtl-optimization/110042
31323 * ifcvt.cc (bbs_ok_for_cmove_arith): Allow paradoxical subregs.
31324 (bb_valid_for_noce_process_p): Strip the subreg for the SET_DEST.
31326 2023-06-02 Iain Sandoe <iain@sandoe.co.uk>
31329 * config/rs6000/rs6000.cc (darwin_rs6000_special_round_type_align):
31330 Make sure that we do not have a cap on field alignment before altering
31331 the struct layout based on the type alignment of the first entry.
31333 2023-06-02 David Faust <david.faust@oracle.com>
31336 * btfout.cc (btf_absolute_func_id): New function.
31337 (btf_asm_func_type): Call it here. Change index parameter from
31338 size_t to ctf_id_t. Use PRIu64 formatter.
31340 2023-06-02 Alex Coplan <alex.coplan@arm.com>
31342 * btfout.cc (btf_asm_type): Use PRIu64 instead of %lu for uint64_t.
31343 (btf_asm_datasec_type): Likewise.
31345 2023-06-02 Carl Love <cel@us.ibm.com>
31347 * config/rs6000/rs6000-builtins.def (__builtin_altivec_tr_stxvrhx,
31348 __builtin_altivec_tr_stxvrwx): Fix type of third argument.
31350 2023-06-02 Jason Merrill <jason@redhat.com>
31354 * tree.h (DECL_MERGEABLE): New.
31355 * tree-core.h (struct tree_decl_common): Mention it.
31356 * gimplify.cc (gimplify_init_constructor): Check it.
31357 * cgraph.cc (symtab_node::address_can_be_compared_p): Likewise.
31358 * varasm.cc (categorize_decl_for_section): Likewise.
31360 2023-06-02 Uros Bizjak <ubizjak@gmail.com>
31362 * rtl.h (stack_regs_mentioned): Change return type from int to bool.
31363 * reg-stack.cc (struct_block_info_def): Change "done" to bool.
31364 (stack_regs_mentioned_p): Change return type from int to bool
31365 and adjust function body accordingly.
31366 (stack_regs_mentioned): Ditto.
31367 (check_asm_stack_operands): Ditto. Change "malformed_asm"
31369 (move_for_stack_reg): Recode handling of control_flow_insn_deleted.
31370 (swap_rtx_condition_1): Change return type from int to bool
31371 and adjust function body accordingly. Change "r" variable to bool.
31372 (swap_rtx_condition): Change return type from int to bool
31373 and adjust function body accordingly.
31374 (subst_stack_regs_pat): Recode handling of control_flow_insn_deleted.
31375 (subst_stack_regs): Ditto.
31376 (convert_regs_entry): Change return type from int to bool and adjust
31377 function body accordingly. Change "inserted" variable to bool.
31378 (convert_regs_1): Recode handling of control_flow_insn_deleted.
31379 (convert_regs_2): Recode handling of cfg_altered.
31380 (convert_regs): Ditto. Change "inserted" variable to bool.
31382 2023-06-02 Jason Merrill <jason@redhat.com>
31385 * varasm.cc (output_constant) [REAL_TYPE]: Check that sizes match.
31386 (initializer_constant_valid_p_1): Compare float precision.
31388 2023-06-02 Alexander Monakov <amonakov@ispras.ru>
31390 * doc/extend.texi (Vector Extensions): Clarify bitwise shift
31393 2023-06-02 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31395 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly): Change decrement IV flow.
31396 (vect_set_loop_condition_partial_vectors): Ditto.
31398 2023-06-02 Georg-Johann Lay <avr@gjlay.de>
31401 * config/avr/avr.md: Add an RTL peephole to optimize operations on
31402 non-LD_REGS after a move from LD_REGS.
31403 (piaop): New code iterator.
31405 2023-06-02 Thomas Schwinge <thomas@codesourcery.com>
31408 * doc/install.texi: Document (optional) Perl usage for parallel
31409 testing of libgomp.
31411 2023-06-02 Thomas Schwinge <thomas@codesourcery.com>
31414 * doc/install.texi (Perl): Back to requiring "Perl version 5.6.1 (or
31417 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
31418 KuanLin Chen <best124612@gmail.com>
31420 * config/riscv/riscv-vector-builtins-bases.cc: Add _mu overloaded intrinsics.
31421 * config/riscv/riscv-vector-builtins-shapes.cc (struct fault_load_def): Ditto.
31423 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
31425 * config/riscv/riscv-v.cc (expand_vec_series): Optimize reverse series index vector.
31427 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
31429 * config/riscv/predicates.md: Change INTVAL into UINTVAL.
31431 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
31433 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_VXRM_ENUM): Add
31435 (DEF_RVV_FRM_ENUM): Ditto.
31437 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
31439 * config/riscv/riscv-vector-builtins-bases.cc: Change vwadd.wv/vwsub.wv
31440 intrinsic API expander
31441 * config/riscv/vector.md
31442 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>): Remove it.
31443 (@pred_single_widen_sub<any_extend:su><mode>): New pattern.
31444 (@pred_single_widen_add<any_extend:su><mode>): New pattern.
31446 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
31448 * config/riscv/autovec.md (vec_perm<mode>): New pattern.
31449 * config/riscv/predicates.md (vector_perm_operand): New predicate.
31450 * config/riscv/riscv-protos.h (enum insn_type): New enum.
31451 (expand_vec_perm): New function.
31452 * config/riscv/riscv-v.cc (const_vec_all_in_range_p): Ditto.
31453 (gen_const_vector_dup): Ditto.
31454 (emit_vlmax_gather_insn): Ditto.
31455 (emit_vlmax_masked_gather_mu_insn): Ditto.
31456 (expand_vec_perm): Ditto.
31458 2023-06-01 Jason Merrill <jason@redhat.com>
31460 * doc/invoke.texi (-Wpedantic): Improve clarity.
31462 2023-06-01 Uros Bizjak <ubizjak@gmail.com>
31464 * rtl.h (exp_equiv_p): Change return type from int to bool.
31465 * cse.cc (mention_regs): Change return type from int to bool
31466 and adjust function body accordingly.
31467 (exp_equiv_p): Ditto.
31468 (insert_regs): Ditto. Change "modified" function argument to bool
31469 and update usage accordingly.
31470 (record_jump_cond): Remove always zero "reversed_nonequality"
31471 function argument and update usage accordingly.
31472 (fold_rtx): Change "changed" variable to bool.
31473 (record_jump_equiv): Remove unneeded "reversed_nonequality" variable.
31474 (is_dead_reg): Change return type from int to bool.
31476 2023-06-01 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
31478 * config/xtensa/xtensa.md (adddi3, subdi3):
31479 New RTL generation patterns implemented according to the instruc-
31480 tion idioms described in the Xtensa ISA reference manual (p. 600).
31482 2023-06-01 Roger Sayle <roger@nextmovesoftware.com>
31483 Uros Bizjak <ubizjak@gmail.com>
31486 * config/i386/i386-builtin.def (__builtin_ia32_ptestz128): Use new
31487 CODE_for_sse4_1_ptestzv2di.
31488 (__builtin_ia32_ptestc128): Use new CODE_for_sse4_1_ptestcv2di.
31489 (__builtin_ia32_ptestz256): Use new CODE_for_avx_ptestzv4di.
31490 (__builtin_ia32_ptestc256): Use new CODE_for_avx_ptestcv4di.
31491 * config/i386/i386-expand.cc (ix86_expand_branch): Use CCZmode
31492 when expanding UNSPEC_PTEST to compare against zero.
31493 * config/i386/i386-features.cc (scalar_chain::convert_compare):
31494 Likewise generate CCZmode UNSPEC_PTESTs when converting comparisons.
31495 (general_scalar_chain::convert_insn): Use CCZmode for COMPARE result.
31496 (timode_scalar_chain::convert_insn): Use CCZmode for COMPARE result.
31497 * config/i386/i386-protos.h (ix86_match_ptest_ccmode): Prototype.
31498 * config/i386/i386.cc (ix86_match_ptest_ccmode): New predicate to
31499 check for suitable matching modes for the UNSPEC_PTEST pattern.
31500 * config/i386/sse.md (define_split): When splitting UNSPEC_MOVMSK
31501 to UNSPEC_PTEST, preserve the FLAG_REG mode as CCZ.
31502 (*<sse4_1>_ptest<mode>): Add asterisk to hide define_insn. Remove
31503 ":CC" mode of FLAGS_REG, instead use ix86_match_ptest_ccmode.
31504 (<sse4_1>_ptestz<mode>): New define_expand to specify CCZ.
31505 (<sse4_1>_ptestc<mode>): New define_expand to specify CCC.
31506 (<sse4_1>_ptest<mode>): A define_expand using CC to preserve the
31508 (*ptest<mode>_and): Specify CCZ to only perform this optimization
31509 when only the Z flag is required.
31511 2023-06-01 Jonathan Wakely <jwakely@redhat.com>
31514 * doc/invoke.texi (x86 Options): Fix description of -m32 option.
31516 2023-06-01 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31518 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>):
31519 Add =r,m and =r,m alternatives.
31520 (load_pair<DREG:mode><DREG2:mode>): Likewise.
31521 (vec_store_pair<DREG:mode><DREG2:mode>): Likewise.
31523 2023-06-01 Pan Li <pan2.li@intel.com>
31525 * common/config/riscv/riscv-common.cc: Add FP_16 mask to zvfhmin
31527 * config/riscv/genrvv-type-indexer.cc (valid_type): Allow FP16.
31528 (main): Disable FP16 tuple.
31529 * config/riscv/riscv-opts.h (MASK_VECTOR_ELEN_FP_16): New macro.
31530 (TARGET_VECTOR_ELEN_FP_16): Ditto.
31531 * config/riscv/riscv-vector-builtins.cc (check_required_extensions):
31533 * config/riscv/riscv-vector-builtins.def (vfloat16mf4_t): New type.
31534 (vfloat16mf2_t): Ditto.
31535 (vfloat16m1_t): Ditto.
31536 (vfloat16m2_t): Ditto.
31537 (vfloat16m4_t): Ditto.
31538 (vfloat16m8_t): Ditto.
31539 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_ELEN_FP_16):
31541 * config/riscv/riscv-vector-switch.def (ENTRY): Allow FP16
31542 machine mode based on TARGET_VECTOR_ELEN_FP_16.
31544 2023-06-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
31546 * config/riscv/riscv-vector-builtins.cc (register_frm): New function.
31547 (DEF_RVV_FRM_ENUM): New macro.
31548 (handle_pragma_vector): Add FRM enum
31549 * config/riscv/riscv-vector-builtins.def (DEF_RVV_FRM_ENUM): New macro.
31556 2023-05-31 Roger Sayle <roger@nextmovesoftware.com>
31557 Richard Sandiford <richard.sandiford@arm.com>
31559 * fold-const-call.cc (fold_const_call_ss) <CFN_BUILT_IN_BSWAP*>:
31560 Update call to wi::bswap.
31561 * simplify-rtx.cc (simplify_const_unary_operation) <case BSWAP>:
31562 Update call to wi::bswap.
31563 * tree-ssa-ccp.cc (evaluate_stmt) <case BUILT_IN_BSWAP*>:
31564 Update calls to wi::bswap.
31565 * wide-int.cc (wide_int_storage::bswap): Remove/rename to...
31566 (wi::bswap_large): New function, with revised API.
31567 * wide-int.h (wi::bswap): New (template) function prototype.
31568 (wide_int_storage::bswap): Remove method.
31569 (sext_large, zext_large): Consistent indentation/line wrapping.
31570 (bswap_large): Prototype helper function containing implementation.
31571 (wi::bswap): New template wrapper around bswap_large.
31573 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31576 * config/aarch64/aarch64-simd.md (<sur>dot_prod<vsi2qi>): Rename to...
31577 (<sur>dot_prod<vsi2qi><vczle><vczbe>): ... This.
31578 (usdot_prod<vsi2qi>): Rename to...
31579 (usdot_prod<vsi2qi><vczle><vczbe>): ... This.
31580 (aarch64_<sur>dot_lane<vsi2qi>): Rename to...
31581 (aarch64_<sur>dot_lane<vsi2qi><vczle><vczbe>): ... This.
31582 (aarch64_<sur>dot_laneq<vsi2qi>): Rename to...
31583 (aarch64_<sur>dot_laneq<vsi2qi><vczle><vczbe>): ... This.
31584 (aarch64_<DOTPROD_I8MM:sur>dot_lane<VB:isquadop><VS:vsi2qi>): Rename to...
31585 (aarch64_<DOTPROD_I8MM:sur>dot_lane<VB:isquadop><VS:vsi2qi><vczle><vczbe>):
31588 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31591 * config/aarch64/aarch64-simd.md (aarch64_sq<r>dmulh<mode>): Rename to...
31592 (aarch64_sq<r>dmulh<mode><vczle><vczbe>): ... This.
31593 (aarch64_sq<r>dmulh_n<mode>): Rename to...
31594 (aarch64_sq<r>dmulh_n<mode><vczle><vczbe>): ... This.
31595 (aarch64_sq<r>dmulh_lane<mode>): Rename to...
31596 (aarch64_sq<r>dmulh_lane<mode><vczle><vczbe>): ... This.
31597 (aarch64_sq<r>dmulh_laneq<mode>): Rename to...
31598 (aarch64_sq<r>dmulh_laneq<mode><vczle><vczbe>): ... This.
31599 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h<mode>): Rename to...
31600 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h<mode><vczle><vczbe>): ... This.
31601 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_lane<mode>): Rename to...
31602 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_lane<mode><vczle><vczbe>): ... This.
31603 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_laneq<mode>): Rename to...
31604 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_laneq<mode><vczle><vczbe>): ... This.
31606 2023-05-31 David Faust <david.faust@oracle.com>
31608 * btfout.cc (btf_kind_names): New.
31609 (btf_kind_name): New.
31610 (btf_absolute_var_id): New utility function.
31611 (btf_relative_var_id): Likewise.
31612 (btf_relative_func_id): Likewise.
31613 (btf_absolute_datasec_id): Likewise.
31614 (btf_asm_type_ref): New.
31615 (btf_asm_type): Update asm comments and use btf_asm_type_ref ().
31616 (btf_asm_array): Likewise. Accept ctf_container_ref parameter.
31617 (btf_asm_varent): Likewise.
31618 (btf_asm_func_arg): Likewise.
31619 (btf_asm_datasec_entry): Likewise.
31620 (btf_asm_datasec_type): Likewise.
31621 (btf_asm_func_type): Likewise. Add index parameter.
31622 (btf_asm_enum_const): Likewise.
31623 (btf_asm_sou_member): Likewise.
31624 (output_btf_vars): Update btf_asm_* call accordingly.
31625 (output_asm_btf_sou_fields): Likewise.
31626 (output_asm_btf_enum_list): Likewise.
31627 (output_asm_btf_func_args_list): Likewise.
31628 (output_asm_btf_vlen_bytes): Likewise.
31629 (output_btf_func_types): Add ctf_container_ref parameter.
31630 Pass it to btf_asm_func_type.
31631 (output_btf_datasec_types): Update btf_asm_datsec_type call similarly.
31632 (btf_output): Update output_btf_func_types call similarly.
31634 2023-05-31 David Faust <david.faust@oracle.com>
31636 * btfout.cc (btf_asm_type): Add dedicated cases for BTF_KIND_ARRAY
31637 and BTF_KIND_FWD which do not use the size/type field at all.
31639 2023-05-31 Uros Bizjak <ubizjak@gmail.com>
31641 * rtl.h (subreg_lowpart_p): Change return type from int to bool.
31642 (active_insn_p): Ditto.
31643 (in_sequence_p): Ditto.
31644 (unshare_all_rtl): Change return type from int to void.
31645 * emit-rtl.h (mem_expr_equal_p): Change return type from int to bool.
31646 * emit-rtl.cc (subreg_lowpart_p): Change return type from int to bool
31647 and adjust function body accordingly.
31648 (mem_expr_equal_p): Ditto.
31649 (unshare_all_rtl): Change return type from int to void
31650 and adjust function body accordingly.
31651 (verify_rtx_sharing): Remove unneeded return.
31652 (active_insn_p): Change return type from int to bool
31653 and adjust function body accordingly.
31654 (in_sequence_p): Ditto.
31656 2023-05-31 Uros Bizjak <ubizjak@gmail.com>
31658 * rtl.h (true_dependence): Change return type from int to bool.
31659 (canon_true_dependence): Ditto.
31660 (read_dependence): Ditto.
31661 (anti_dependence): Ditto.
31662 (canon_anti_dependence): Ditto.
31663 (output_dependence): Ditto.
31664 (canon_output_dependence): Ditto.
31665 (may_alias_p): Ditto.
31666 * alias.h (alias_sets_conflict_p): Ditto.
31667 (alias_sets_must_conflict_p): Ditto.
31668 (objects_must_conflict_p): Ditto.
31669 (nonoverlapping_memrefs_p): Ditto.
31670 * alias.cc (rtx_equal_for_memref_p): Remove forward declaration.
31671 (record_set): Ditto.
31672 (base_alias_check): Ditto.
31673 (find_base_value): Ditto.
31674 (mems_in_disjoint_alias_sets_p): Ditto.
31675 (get_alias_set_entry): Ditto.
31676 (decl_for_component_ref): Ditto.
31677 (write_dependence_p): Ditto.
31678 (memory_modified_1): Ditto.
31679 (mems_in_disjoint_alias_set_p): Change return type from int to bool
31680 and adjust function body accordingly.
31681 (alias_sets_conflict_p): Ditto.
31682 (alias_sets_must_conflict_p): Ditto.
31683 (objects_must_conflict_p): Ditto.
31684 (rtx_equal_for_memref_p): Ditto.
31685 (base_alias_check): Ditto.
31686 (read_dependence): Ditto.
31687 (nonoverlapping_memrefs_p): Ditto.
31688 (true_dependence_1): Ditto.
31689 (true_dependence): Ditto.
31690 (canon_true_dependence): Ditto.
31691 (write_dependence_p): Ditto.
31692 (anti_dependence): Ditto.
31693 (canon_anti_dependence): Ditto.
31694 (output_dependence): Ditto.
31695 (canon_output_dependence): Ditto.
31696 (may_alias_p): Ditto.
31697 (init_alias_analysis): Change "changed" variable to bool.
31699 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
31701 * config/riscv/autovec.md (<optab><v_double_trunc><mode>2): Change
31702 expand into define_insn_and_split.
31704 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
31706 * config/riscv/vector.md: Remove FRM.
31708 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
31710 * config/riscv/vector.md: Remove FRM.
31712 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
31714 * config/riscv/vector.md: Remove FRM.
31716 2023-05-31 Christophe Lyon <christophe.lyon@linaro.org>
31719 * config/aarch64/aarch64.md (aarch64_rev16si2_alt3): New
31722 2023-05-31 Richard Biener <rguenther@suse.de>
31725 PR tree-optimization/109143
31726 * tree-ssa-structalias.cc (struct topo_info): Remove.
31727 (init_topo_info): Likewise.
31728 (free_topo_info): Likewise.
31729 (compute_topo_order): Simplify API, put the component
31730 with ESCAPED last so it's processed first.
31731 (topo_visit): Adjust.
31732 (solve_graph): Likewise.
31734 2023-05-31 Richard Biener <rguenther@suse.de>
31736 * tree-ssa-structalias.cc (constraint_stats::num_avoided_edges):
31738 (add_graph_edge): Count redundant edges we avoid to create.
31739 (dump_sa_stats): Dump them.
31740 (ipa_pta_execute): Do not dump generating constraints when
31741 we are not dumping them.
31743 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31745 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>): Rewrite
31746 output template to avoid explicit switch on which_alternative.
31747 (*aarch64_simd_mov<VQMOV:mode>): Likewise.
31748 (and<mode>3): Likewise.
31749 (ior<mode>3): Likewise.
31750 * config/aarch64/aarch64.md (*mov<mode>_aarch64): Likewise.
31752 2023-05-31 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
31754 * config/xtensa/predicates.md (xtensa_bit_join_operator):
31756 * config/xtensa/xtensa.md (ior_op): Remove.
31757 (*shlrd_reg): Rename from "*shlrd_reg_<code>", and add the
31758 insn_and_split pattern of the same name to express and capture
31759 the bit-combining operation with both sides swapped.
31760 In addition, replace use of code iterator with new operator
31762 (*shlrd_const, *shlrd_per_byte):
31763 Likewise regarding the code iterator.
31765 2023-05-31 Cui, Lili <lili.cui@intel.com>
31767 PR tree-optimization/110038
31768 * params.opt: Add a limit on tree-reassoc-width.
31769 * tree-ssa-reassoc.cc
31770 (rewrite_expr_tree_parallel): Add width limit.
31772 2023-05-31 Pan Li <pan2.li@intel.com>
31774 * common/config/riscv/riscv-common.cc:
31775 (riscv_implied_info): Add zvfh item.
31776 (riscv_ext_version_table): Ditto.
31777 (riscv_ext_flag_table): Ditto.
31778 * config/riscv/riscv-opts.h (MASK_ZVFH): New macro.
31779 (TARGET_ZVFH): Ditto.
31781 2023-05-30 liuhongt <hongtao.liu@intel.com>
31783 PR tree-optimization/108804
31784 * tree-vect-patterns.cc (vect_get_range_info): Remove static.
31785 * tree-vect-stmts.cc (vect_create_vectorized_demotion_stmts):
31786 Add new parameter narrow_src_p.
31787 (vectorizable_conversion): Enhance NARROW FLOAT_EXPR
31788 vectorization by truncating to lower precision.
31789 * tree-vectorizer.h (vect_get_range_info): New declare.
31791 2023-05-30 Vladimir N. Makarov <vmakarov@redhat.com>
31793 * lra-int.h (lra_update_sp_offset): Add the prototype.
31794 * lra.cc (setup_sp_offset): Change the return type. Use
31795 lra_update_sp_offset.
31796 * lra-eliminations.cc (lra_update_sp_offset): New function.
31797 (lra_process_new_insns): Push the current insn to reprocess if the
31798 input reload changes sp offset.
31800 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
31803 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
31804 Fix misleading identation.
31806 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
31808 * rtl.h (comparison_dominates_p): Change return type from int to bool.
31809 (condjump_p): Ditto.
31810 (any_condjump_p): Ditto.
31811 (any_uncondjump_p): Ditto.
31812 (simplejump_p): Ditto.
31813 (returnjump_p): Ditto.
31814 (eh_returnjump_p): Ditto.
31815 (onlyjump_p): Ditto.
31816 (invert_jump_1): Ditto.
31817 (invert_jump): Ditto.
31818 (rtx_renumbered_equal_p): Ditto.
31819 (redirect_jump_1): Ditto.
31820 (redirect_jump): Ditto.
31821 (condjump_in_parallel_p): Ditto.
31822 * jump.cc (invert_exp_1): Adjust forward declaration.
31823 (comparison_dominates_p): Change return type from int to bool
31824 and adjust function body accordingly.
31825 (simplejump_p): Ditto.
31826 (condjump_p): Ditto.
31827 (condjump_in_parallel_p): Ditto.
31828 (any_uncondjump_p): Ditto.
31829 (any_condjump_p): Ditto.
31830 (returnjump_p): Ditto.
31831 (eh_returnjump_p): Ditto.
31832 (onlyjump_p): Ditto.
31833 (redirect_jump_1): Ditto.
31834 (redirect_jump): Ditto.
31835 (invert_exp_1): Ditto.
31836 (invert_jump_1): Ditto.
31837 (invert_jump): Ditto.
31838 (rtx_renumbered_equal_p): Ditto.
31840 2023-05-30 Andrew Pinski <apinski@marvell.com>
31842 * fold-const.cc (minmax_from_comparison): Add support for NE_EXPR.
31843 * match.pd ((cond (cmp (convert1? x) c1) (convert2? x) c2) pattern):
31844 Add ne as a possible cmp.
31845 ((a CMP b) ? minmax<a, c> : minmax<b, c> pattern): Likewise.
31847 2023-05-30 Andrew Pinski <apinski@marvell.com>
31849 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`): New
31852 2023-05-30 Roger Sayle <roger@nextmovesoftware.com>
31854 * simplify-rtx.cc (simplify_binary_operation_1) <AND>: Use wide-int
31855 instead of HWI_COMPUTABLE_MODE_P and UINTVAL in transformation of
31856 (and (extend X) C) as (zero_extend (and X C)), to also optimize
31857 modes wider than HOST_WIDE_INT.
31859 2023-05-30 Roger Sayle <roger@nextmovesoftware.com>
31862 * simplify-rtx.cc (simplify_const_relational_operation): Return
31863 early if we have a MODE_CC comparison that isn't a COMPARE against
31866 2023-05-30 Robin Dapp <rdapp@ventanamicro.com>
31868 * config/riscv/riscv.cc (riscv_const_insns): Allow
31869 const_vec_duplicates.
31871 2023-05-30 liuhongt <hongtao.liu@intel.com>
31873 PR middle-end/108938
31874 * gimple-ssa-store-merging.cc (is_bswap_or_nop_p): New
31875 function, cut from original find_bswap_or_nop function.
31876 (find_bswap_or_nop): Add a new parameter, detect bswap +
31877 rotate and save rotate result in the new parameter.
31878 (bswap_replace): Add a new parameter to indicate rotate and
31879 generate rotate stmt if needed.
31880 (maybe_optimize_vector_constructor): Adjust for new rotate
31881 parameter in the upper 2 functions.
31882 (pass_optimize_bswap::execute): Ditto.
31883 (imm_store_chain_info::output_merged_store): Ditto.
31885 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31887 * config/aarch64/aarch64-simd.md (aarch64_<sur>adalp<mode>): Delete.
31888 (aarch64_<su>adalp<mode>): New define_expand.
31889 (*aarch64_<su>adalp<mode><vczle><vczbe>_insn): New define_insn.
31890 (aarch64_<su>addlp<mode>): Convert to define_expand.
31891 (*aarch64_<su>addlp<mode><vczle><vczbe>_insn): New define_insn.
31892 * config/aarch64/iterators.md (UNSPEC_SADDLP, UNSPEC_UADDLP): Delete.
31894 (USADDLP): Likewise.
31895 * config/aarch64/predicates.md (vect_par_cnst_even_or_odd_half): Define.
31897 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31899 * config/aarch64/aarch64-builtins.cc (VAR1): Move to after inclusion of
31900 aarch64-builtin-iterators.h. Add definition to remap shadd, uhadd,
31901 srhadd, urhadd builtin codes for standard optab ones.
31902 * config/aarch64/aarch64-simd.md (<u>avg<mode>3_floor): Rename to...
31903 (<su_optab>avg<mode>3_floor): ... This. Expand to RTL codes rather than
31905 (<u>avg<mode>3_ceil): Rename to...
31906 (<su_optab>avg<mode>3_ceil): ... This. Expand to RTL codes rather than
31908 (aarch64_<su>hsub<mode>): New define_expand.
31909 (aarch64_<sur>h<addsub><mode><vczle><vczbe>): Split into...
31910 (*aarch64_<su>h<ADDSUB:optab><mode><vczle><vczbe>_insn): ... This...
31911 (*aarch64_<su>rhadd<mode><vczle><vczbe>_insn): ... And this.
31913 2023-05-30 Andreas Schwab <schwab@suse.de>
31916 * config/riscv/riscv.cc (riscv_asan_shadow_offset): Update to
31917 match libsanitizer.
31919 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31921 * config/aarch64/aarch64-modes.def (V16HI, V8SI, V4DI, V2TI): New modes.
31922 * config/aarch64/aarch64-protos.h (aarch64_const_vec_rnd_cst_p):
31924 (aarch64_const_vec_rsra_rnd_imm_p): Likewise.
31925 * config/aarch64/aarch64-simd.md (*aarch64_simd_sra<mode>): Rename to...
31926 (aarch64_<sra_op>sra_n<mode>_insn): ... This.
31927 (aarch64_<sra_op>rsra_n<mode>_insn): New define_insn.
31928 (aarch64_<sra_op>sra_n<mode>): New define_expand.
31929 (aarch64_<sra_op>rsra_n<mode>): Likewise.
31930 (aarch64_<sur>sra_n<mode>): Rename to...
31931 (aarch64_<sur>sra_ndi): ... This.
31932 * config/aarch64/aarch64.cc (aarch64_classify_vector_mode): Add
31933 any_target_p argument.
31934 (aarch64_extract_vec_duplicate_wide_int): Define.
31935 (aarch64_const_vec_rsra_rnd_imm_p): Likewise.
31936 (aarch64_const_vec_rnd_cst_p): Likewise.
31937 (aarch64_vector_mode_supported_any_target_p): Likewise.
31938 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Likewise.
31939 * config/aarch64/iterators.md (UNSPEC_SRSRA, UNSPEC_URSRA): Delete.
31940 (VSRA): Adjust for the above.
31942 (V2XWIDE): New mode_attr.
31943 (vec_or_offset): Likewise.
31944 (SHIFTEXTEND): Likewise.
31945 * config/aarch64/predicates.md (aarch64_simd_rsra_rnd_imm_vec): New
31947 * doc/tm.texi (TARGET_VECTOR_MODE_SUPPORTED_P): Adjust description to
31948 clarify that it applies to current target options.
31949 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Document.
31950 * doc/tm.texi.in: Regenerate.
31951 * stor-layout.cc (mode_for_vector): Check
31952 vector_mode_supported_any_target_p when iterating through vector modes.
31953 * target.def (TARGET_VECTOR_MODE_SUPPORTED_P): Adjust description to
31954 clarify that it applies to current target options.
31955 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Define.
31957 2023-05-30 Lili Cui <lili.cui@intel.com>
31959 PR tree-optimization/98350
31960 * tree-ssa-reassoc.cc
31961 (rewrite_expr_tree_parallel): Rewrite this function.
31962 (rank_ops_for_fma): New.
31963 (reassociate_bb): Handle new function.
31965 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
31967 * rtl.h (rtx_addr_can_trap_p): Change return type from int to bool.
31968 (rtx_unstable_p): Ditto.
31969 (reg_mentioned_p): Ditto.
31970 (reg_referenced_p): Ditto.
31971 (reg_used_between_p): Ditto.
31972 (reg_set_between_p): Ditto.
31973 (modified_between_p): Ditto.
31974 (no_labels_between_p): Ditto.
31975 (modified_in_p): Ditto.
31976 (reg_set_p): Ditto.
31977 (multiple_sets): Ditto.
31978 (set_noop_p): Ditto.
31979 (noop_move_p): Ditto.
31980 (reg_overlap_mentioned_p): Ditto.
31981 (dead_or_set_p): Ditto.
31982 (dead_or_set_regno_p): Ditto.
31983 (find_reg_fusage): Ditto.
31984 (find_regno_fusage): Ditto.
31985 (side_effects_p): Ditto.
31986 (volatile_refs_p): Ditto.
31987 (volatile_insn_p): Ditto.
31988 (may_trap_p_1): Ditto.
31989 (may_trap_p): Ditto.
31990 (may_trap_or_fault_p): Ditto.
31991 (computed_jump_p): Ditto.
31992 (auto_inc_p): Ditto.
31993 (loc_mentioned_in_p): Ditto.
31994 * rtlanal.cc (computed_jump_p_1): Adjust forward declaration.
31995 (rtx_unstable_p): Change return type from int to bool
31996 and adjust function body accordingly.
31997 (rtx_addr_can_trap_p): Ditto.
31998 (reg_mentioned_p): Ditto.
31999 (no_labels_between_p): Ditto.
32000 (reg_used_between_p): Ditto.
32001 (reg_referenced_p): Ditto.
32002 (reg_set_between_p): Ditto.
32003 (reg_set_p): Ditto.
32004 (modified_between_p): Ditto.
32005 (modified_in_p): Ditto.
32006 (multiple_sets): Ditto.
32007 (set_noop_p): Ditto.
32008 (noop_move_p): Ditto.
32009 (reg_overlap_mentioned_p): Ditto.
32010 (dead_or_set_p): Ditto.
32011 (dead_or_set_regno_p): Ditto.
32012 (find_reg_fusage): Ditto.
32013 (find_regno_fusage): Ditto.
32014 (remove_node_from_insn_list): Ditto.
32015 (volatile_insn_p): Ditto.
32016 (volatile_refs_p): Ditto.
32017 (side_effects_p): Ditto.
32018 (may_trap_p_1): Ditto.
32019 (may_trap_p): Ditto.
32020 (may_trap_or_fault_p): Ditto.
32021 (computed_jump_p): Ditto.
32022 (auto_inc_p): Ditto.
32023 (loc_mentioned_in_p): Ditto.
32024 * combine.cc (can_combine_p): Update indirect function.
32026 2023-05-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32028 * config/riscv/autovec.md (<optab><mode><vconvert>2): New pattern.
32029 * config/riscv/iterators.md: New attribute.
32030 * config/riscv/vector-iterators.md: New attribute.
32032 2023-05-30 From: Juzhe-Zhong <juzhe.zhong@rivai.ai>
32034 * config/riscv/riscv.md: Fix signed and unsigned comparison
32037 2023-05-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32039 * config/riscv/autovec.md (fnma<mode>4): New pattern.
32040 (*fnma<mode>): Ditto.
32042 2023-05-29 Die Li <lidie@eswincomputing.com>
32044 * config/riscv/riscv.cc (riscv_expand_conditional_move_onesided):
32046 (riscv_expand_conditional_move): Reuse the TARGET_SFB_ALU expand
32047 process for TARGET_XTHEADCONDMOV
32049 2023-05-29 Uros Bizjak <ubizjak@gmail.com>
32052 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2): Also require
32053 TARGET_AVX512BW to generate truncv16hiv16qi2.
32055 2023-05-29 Jivan Hakobyan <jivanhakobyan9@gmail.com>
32057 * config/riscv/riscv.md (and<mode>3): New expander.
32058 (*and<mode>3) New pattern.
32059 * config/riscv/predicates.md (arith_operand_or_mode_mask): New
32062 2023-05-29 Pan Li <pan2.li@intel.com>
32064 * config/riscv/riscv-v.cc (emit_vlmax_insn): Remove unnecessary
32065 comments and rename local variables.
32066 (emit_nonvlmax_insn): Diito.
32067 (emit_vlmax_merge_insn): Ditto.
32068 (emit_vlmax_cmp_insn): Ditto.
32069 (emit_vlmax_cmp_mu_insn): Ditto.
32070 (emit_scalar_move_insn): Ditto.
32072 2023-05-29 Pan Li <pan2.li@intel.com>
32074 * config/riscv/riscv-v.cc (emit_vlmax_insn): Eliminate the
32076 (emit_nonvlmax_insn): Ditto.
32077 (emit_vlmax_merge_insn): Ditto.
32078 (emit_vlmax_cmp_insn): Ditto.
32079 (emit_vlmax_cmp_mu_insn): Ditto.
32080 (expand_vec_series): Ditto.
32082 2023-05-29 Pan Li <pan2.li@intel.com>
32084 * config/riscv/riscv-protos.h (enum insn_type): New type.
32085 * config/riscv/riscv-v.cc (RVV_INSN_OPERANDS_MAX): New macro.
32086 (rvv_builder::can_duplicate_repeating_sequence_p): Align the referenced
32088 (rvv_builder::get_merged_repeating_sequence): Ditto.
32089 (rvv_builder::repeating_sequence_use_merge_profitable_p): New function
32090 to evaluate the optimization cost.
32091 (rvv_builder::get_merge_scalar_mask): New function to get the merge
32093 (emit_scalar_move_insn): New function to emit vmv.s.x.
32094 (emit_vlmax_integer_move_insn): New function to emit vlmax vmv.v.x.
32095 (emit_nonvlmax_integer_move_insn): New function to emit nonvlmax
32097 (get_repeating_sequence_dup_machine_mode): New function to get the dup
32099 (expand_vector_init_merge_repeating_sequence): New function to perform
32101 (expand_vec_init): Add this vector init optimization.
32102 * config/riscv/riscv.h (BITS_PER_WORD): New macro.
32104 2023-05-29 Eric Botcazou <ebotcazou@adacore.com>
32106 * tree-ssa-loop-manip.cc (create_iv): Try harder to find a SLOC to
32107 put onto the increment when it is inserted after the position.
32109 2023-05-29 Eric Botcazou <ebotcazou@adacore.com>
32111 * match.pd ((T)P - (T)(P + A) -> -(T) A): Avoid artificial overflow
32114 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32116 * config/riscv/riscv-vsetvl.cc (source_equal_p): Fix ICE.
32118 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32120 * config/riscv/autovec.md (fma<mode>4): New pattern.
32121 (*fma<mode>): Ditto.
32122 * config/riscv/riscv-protos.h (enum insn_type): New enum.
32123 (emit_vlmax_ternary_insn): New function.
32124 * config/riscv/riscv-v.cc (emit_vlmax_ternary_insn): Ditto.
32126 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32128 * config/riscv/vector.md: Fix vimuladd instruction bug.
32130 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32132 * config/riscv/riscv.cc (global_state_unknown_p): New function.
32133 (riscv_mode_after): Fix incorrect VXM.
32135 2023-05-29 Pan Li <pan2.li@intel.com>
32137 * common/config/riscv/riscv-common.cc:
32138 (riscv_implied_info): Add zvfhmin item.
32139 (riscv_ext_version_table): Ditto.
32140 (riscv_ext_flag_table): Ditto.
32141 * config/riscv/riscv-opts.h (MASK_ZVFHMIN): New macro.
32142 (TARGET_ZFHMIN): Align indent.
32143 (TARGET_ZFH): Ditto.
32144 (TARGET_ZVFHMIN): New macro.
32146 2023-05-27 liuhongt <hongtao.liu@intel.com>
32149 * config/i386/sse.md (*andnot<mode>3): Extend below splitter
32150 to VI_AVX2 to cover more modes.
32152 2023-05-27 liuhongt <hongtao.liu@intel.com>
32154 * config/i386/x86-tune.def (X86_TUNE_AVOID_FALSE_DEP_FOR_BMI):
32155 Remove ATOM and ICELAKE(and later) core processors.
32157 2023-05-26 Robin Dapp <rdapp@ventanamicro.com>
32159 * config/riscv/autovec.md (<optab><mode>2): Add vneg/vnot.
32161 * config/riscv/riscv-protos.h (emit_vlmax_masked_mu_insn):
32163 * config/riscv/riscv-v.cc (emit_vlmax_masked_mu_insn): New
32166 2023-05-26 Robin Dapp <rdapp@ventanamicro.com>
32167 Juzhe Zhong <juzhe.zhong@rivai.ai>
32169 * config/riscv/autovec.md (<optab><v_double_trunc><mode>2): New
32171 (<optab><v_quad_trunc><mode>2): Dito.
32172 (<optab><v_oct_trunc><mode>2): Dito.
32173 (trunc<mode><v_double_trunc>2): Dito.
32174 (trunc<mode><v_quad_trunc>2): Dito.
32175 (trunc<mode><v_oct_trunc>2): Dito.
32176 * config/riscv/riscv-protos.h (vectorize_related_mode): Define.
32177 (autovectorize_vector_modes): Define.
32178 * config/riscv/riscv-v.cc (vectorize_related_mode): Implement
32180 (autovectorize_vector_modes): Implement hook.
32181 * config/riscv/riscv.cc (riscv_autovectorize_vector_modes):
32182 Implement target hook.
32183 (riscv_vectorize_related_mode): Implement target hook.
32184 (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Define.
32185 (TARGET_VECTORIZE_RELATED_MODE): Define.
32186 * config/riscv/vector-iterators.md: Add lowercase versions of
32187 mode_attr iterators.
32189 2023-05-26 Andrew Stubbs <ams@codesourcery.com>
32190 Tobias Burnus <tobias@codesourcery.com>
32192 * config/gcn/gcn-hsa.h (XNACKOPT): New macro.
32193 (ASM_SPEC): Use XNACKOPT.
32194 * config/gcn/gcn-opts.h (enum sram_ecc_type): Rename to ...
32195 (enum hsaco_attr_type): ... this, and generalize the names.
32196 (TARGET_XNACK): New macro.
32197 * config/gcn/gcn.cc (gcn_option_override): Update to sorry for all
32199 (output_file_start): Update xnack handling.
32200 (gcn_hsa_declare_function_name): Use TARGET_XNACK.
32201 * config/gcn/gcn.opt (-mxnack): Add the "on/off/any" syntax.
32202 (sram_ecc_type): Rename to ...
32203 (hsaco_attr_type: ... this.)
32204 * config/gcn/mkoffload.cc (SET_XNACK_ANY): New macro.
32205 (TEST_XNACK): Delete.
32206 (TEST_XNACK_ANY): New macro.
32207 (TEST_XNACK_ON): New macro.
32208 (main): Support the new -mxnack=on/off/any syntax.
32209 * doc/invoke.texi (-mxnack): Update for new syntax.
32211 2023-05-26 Andrew Pinski <apinski@marvell.com>
32213 * genmatch.cc (emit_debug_printf): New function.
32214 (dt_simplify::gen_1): Emit printf into the code
32215 before the `return true` or returning the folded result
32216 instead of emitting it always.
32218 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
32220 * config/xtensa/xtensa-protos.h
32221 (xtensa_expand_block_set_unrolled_loop,
32222 xtensa_expand_block_set_small_loop): Remove.
32223 (xtensa_expand_block_set): New prototype.
32224 * config/xtensa/xtensa.cc
32225 (xtensa_expand_block_set_libcall): New subfunction.
32226 (xtensa_expand_block_set_unrolled_loop,
32227 xtensa_expand_block_set_small_loop): Rewrite as subfunctions.
32228 (xtensa_expand_block_set): New function that calls the above
32230 * config/xtensa/xtensa.md (memsetsi): Change to invoke only
32231 xtensa_expand_block_set().
32233 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
32235 * config/xtensa/xtensa-protos.h (xtensa_m1_or_1_thru_15):
32237 * config/xtensa/xtensa.cc (xtensa_m1_or_1_thru_15):
32239 * config/xtensa/constraints.md (O):
32240 Change to use the above function.
32241 * config/xtensa/xtensa.md (*subsi3_from_const):
32242 New insn_and_split pattern.
32244 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
32246 * config/xtensa/xtensa.md (*extzvsi-1bit_ashlsi3):
32247 Retract excessive line folding, and correct the value of
32248 the "length" insn attribute related to TARGET_DENSITY.
32249 (*extzvsi-1bit_addsubx): Ditto.
32251 2023-05-26 Uros Bizjak <ubizjak@gmail.com>
32253 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi):
32254 Do not disable call to ix86_expand_vecop_qihi2.
32256 2023-05-26 liuhongt <hongtao.liu@intel.com>
32260 * ira-costs.cc (scan_one_insn): Only use NO_REGS in cost
32261 calculation when !hard_regno_mode_ok for GENERAL_REGS and
32262 mode, otherwise still use GENERAL_REGS.
32264 2023-05-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32266 * config/riscv/riscv.cc (vector_zero_call_used_regs): Add
32267 explict VL and drop VL in ops.
32269 2023-05-25 Jin Ma <jinma@linux.alibaba.com>
32271 * sched-deps.cc (sched_macro_fuse_insns): Insns should not be fusion
32272 in different BB blocks.
32274 2023-05-25 Uros Bizjak <ubizjak@gmail.com>
32276 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
32277 Rewrite to expand to 2x-wider (e.g. V16QI -> V16HImode)
32278 instructions when available. Emulate truncation via
32279 ix86_expand_vec_perm_const_1 when native truncate insn
32281 (ix86_expand_vecop_qihi_partial) <case MULT>: Use pmovzx
32282 when available. Trivially rename some variables.
32283 (ix86_expand_vecop_qihi): Unconditionally call ix86_expand_vecop_qihi2.
32284 * config/i386/i386.cc (ix86_multiplication_cost): Rewrite cost
32285 calculation of V*QImode emulations to account for generation of
32286 2x-wider mode instructions.
32287 (ix86_shift_rotate_cost): Update cost calculation of V*QImode
32288 emulations to account for generation of 2x-wider mode instructions.
32290 2023-05-25 Georg-Johann Lay <avr@gjlay.de>
32293 * config/avr/avr.cc (avr_can_inline_p): New static function.
32294 (TARGET_CAN_INLINE_P): Define to that function.
32296 2023-05-25 Georg-Johann Lay <avr@gjlay.de>
32299 * config/avr/avr.md (*movbitqi.0): Rename to *movbit<mode>.0-6.
32300 Handle any bit position and use mode QISI.
32301 * config/avr/avr.cc (avr_rtx_costs_1) [IOR]: Return a cost
32302 of 2 insns for bit-transfer of respective style.
32304 2023-05-25 Christophe Lyon <christophe.lyon@linaro.org>
32306 * config/arm/iterators.md (MVE_6): Remove.
32307 * config/arm/mve.md: Replace MVE_6 with MVE_5.
32309 2023-05-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32310 Richard Sandiford <richard.sandiford@arm.com>
32312 * tree-vect-loop-manip.cc (vect_adjust_loop_lens_control): New
32314 (vect_set_loop_controls_directly): Add decrement IV support.
32315 (vect_set_loop_condition_partial_vectors): Ditto.
32316 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): New
32318 * tree-vectorizer.h (LOOP_VINFO_USING_DECREMENTING_IV_P): New
32321 2023-05-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32324 * config/aarch64/aarch64-simd.md (aarch64_fcadd<rot><mode>): Rename to...
32325 (aarch64_fcadd<rot><mode><vczle><vczbe>): ... This.
32326 Fix canonicalization of PLUS operands.
32327 (aarch64_fcmla<rot><mode>): Rename to...
32328 (aarch64_fcmla<rot><mode><vczle><vczbe>): ... This.
32329 Fix canonicalization of PLUS operands.
32330 (aarch64_fcmla_lane<rot><mode>): Rename to...
32331 (aarch64_fcmla_lane<rot><mode><vczle><vczbe>): ... This.
32332 Fix canonicalization of PLUS operands.
32333 (aarch64_fcmla_laneq<rot>v4hf): Rename to...
32334 (aarch64_fcmla_laneq<rot>v4hf<vczle><vczbe>): ... This.
32335 Fix canonicalization of PLUS operands.
32336 (aarch64_fcmlaq_lane<rot><mode>): Fix canonicalization of PLUS operands.
32338 2023-05-25 Chris Sidebottom <chris.sidebottom@arm.com>
32340 * config/arm/arm.md (rbitsi2): Rename to...
32341 (arm_rbit): ... This.
32342 (ctzsi2): Adjust for the above.
32343 (arm_rev16si2): Convert to define_expand.
32344 (arm_rev16si2_alt1): New pattern.
32345 (arm_rev16si2_alt): Rename to...
32346 (*arm_rev16si2_alt2): ... This.
32347 * config/arm/arm_acle.h (__ror, __rorl, __rorll, __clz, __clzl, __clzll,
32348 __cls, __clsl, __clsll, __revsh, __rev, __revl, __revll, __rev16,
32349 __rev16l, __rev16ll, __rbit, __rbitl, __rbitll): Define intrinsics.
32350 * config/arm/arm_acle_builtins.def (rbit, rev16si2): Define builtins.
32352 2023-05-25 Alex Coplan <alex.coplan@arm.com>
32355 * config/arm/arm.md (movdf): Generate temporary pseudo in DImode
32357 * config/arm/vfp.md (no_literal_pool_df_immediate): Rather than punning an
32358 lvalue DFmode pseudo into DImode, use a DImode pseudo and pun it into
32359 DFmode as an rvalue.
32361 2023-05-25 Richard Biener <rguenther@suse.de>
32364 * tree-vect-stmts.cc (vectorizable_condition): For
32365 embedded comparisons also handle the case when the target
32366 only provides vec_cmp and vcond_mask.
32368 2023-05-25 Claudiu Zissulescu <claziss@gmail.com>
32370 * config/arc/arc.cc (arc_call_tls_get_addr): Simplify access using
32373 2023-05-25 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
32375 * config/aarch64/aarch64.cc (scalar_move_insn_p): New function.
32376 (seq_cost_ignoring_scalar_moves): Likewise.
32377 (aarch64_expand_vector_init): Call seq_cost_ignoring_scalar_moves.
32379 2023-05-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32381 * config/aarch64/arm_neon.h (vcage_f64): Reimplement with builtins.
32382 (vcage_f32): Likewise.
32383 (vcages_f32): Likewise.
32384 (vcageq_f32): Likewise.
32385 (vcaged_f64): Likewise.
32386 (vcageq_f64): Likewise.
32387 (vcagts_f32): Likewise.
32388 (vcagt_f32): Likewise.
32389 (vcagt_f64): Likewise.
32390 (vcagtq_f32): Likewise.
32391 (vcagtd_f64): Likewise.
32392 (vcagtq_f64): Likewise.
32393 (vcale_f32): Likewise.
32394 (vcale_f64): Likewise.
32395 (vcaled_f64): Likewise.
32396 (vcales_f32): Likewise.
32397 (vcaleq_f32): Likewise.
32398 (vcaleq_f64): Likewise.
32399 (vcalt_f32): Likewise.
32400 (vcalt_f64): Likewise.
32401 (vcaltd_f64): Likewise.
32402 (vcaltq_f32): Likewise.
32403 (vcaltq_f64): Likewise.
32404 (vcalts_f32): Likewise.
32406 2023-05-25 Hu, Lin1 <lin1.hu@intel.com>
32410 * config/i386/avx512bwintrin.h (_mm512_srli_epi16): Change type from
32411 int to const int or const int to const unsigned int.
32412 (_mm512_mask_srli_epi16): Ditto.
32413 (_mm512_slli_epi16): Ditto.
32414 (_mm512_mask_slli_epi16): Ditto.
32415 (_mm512_maskz_slli_epi16): Ditto.
32416 (_mm512_srai_epi16): Ditto.
32417 (_mm512_mask_srai_epi16): Ditto.
32418 (_mm512_maskz_srai_epi16): Ditto.
32419 * config/i386/avx512fintrin.h (_mm512_slli_epi64): Ditto.
32420 (_mm512_mask_slli_epi64): Ditto.
32421 (_mm512_maskz_slli_epi64): Ditto.
32422 (_mm512_srli_epi64): Ditto.
32423 (_mm512_mask_srli_epi64): Ditto.
32424 (_mm512_maskz_srli_epi64): Ditto.
32425 (_mm512_srai_epi64): Ditto.
32426 (_mm512_mask_srai_epi64): Ditto.
32427 (_mm512_maskz_srai_epi64): Ditto.
32428 (_mm512_slli_epi32): Ditto.
32429 (_mm512_mask_slli_epi32): Ditto.
32430 (_mm512_maskz_slli_epi32): Ditto.
32431 (_mm512_srli_epi32): Ditto.
32432 (_mm512_mask_srli_epi32): Ditto.
32433 (_mm512_maskz_srli_epi32): Ditto.
32434 (_mm512_srai_epi32): Ditto.
32435 (_mm512_mask_srai_epi32): Ditto.
32436 (_mm512_maskz_srai_epi32): Ditto.
32437 * config/i386/avx512vlbwintrin.h (_mm256_mask_srai_epi16): Ditto.
32438 (_mm256_maskz_srai_epi16): Ditto.
32439 (_mm_mask_srai_epi16): Ditto.
32440 (_mm_maskz_srai_epi16): Ditto.
32441 (_mm256_mask_slli_epi16): Ditto.
32442 (_mm256_maskz_slli_epi16): Ditto.
32443 (_mm_mask_slli_epi16): Ditto.
32444 (_mm_maskz_slli_epi16): Ditto.
32445 (_mm_maskz_srli_epi16): Ditto.
32446 * config/i386/avx512vlintrin.h (_mm256_mask_srli_epi32): Ditto.
32447 (_mm256_maskz_srli_epi32): Ditto.
32448 (_mm_mask_srli_epi32): Ditto.
32449 (_mm_maskz_srli_epi32): Ditto.
32450 (_mm256_mask_srli_epi64): Ditto.
32451 (_mm256_maskz_srli_epi64): Ditto.
32452 (_mm_mask_srli_epi64): Ditto.
32453 (_mm_maskz_srli_epi64): Ditto.
32454 (_mm256_mask_srai_epi32): Ditto.
32455 (_mm256_maskz_srai_epi32): Ditto.
32456 (_mm_mask_srai_epi32): Ditto.
32457 (_mm_maskz_srai_epi32): Ditto.
32458 (_mm256_srai_epi64): Ditto.
32459 (_mm256_mask_srai_epi64): Ditto.
32460 (_mm256_maskz_srai_epi64): Ditto.
32461 (_mm_srai_epi64): Ditto.
32462 (_mm_mask_srai_epi64): Ditto.
32463 (_mm_maskz_srai_epi64): Ditto.
32464 (_mm_mask_slli_epi32): Ditto.
32465 (_mm_maskz_slli_epi32): Ditto.
32466 (_mm_mask_slli_epi64): Ditto.
32467 (_mm_maskz_slli_epi64): Ditto.
32468 (_mm256_mask_slli_epi32): Ditto.
32469 (_mm256_maskz_slli_epi32): Ditto.
32470 (_mm256_mask_slli_epi64): Ditto.
32471 (_mm256_maskz_slli_epi64): Ditto.
32473 2023-05-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32475 * config/riscv/vector.md: Remove FRM_REGNUM dependency in rtz
32478 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
32480 * data-streamer-in.cc (streamer_read_value_range): Handle NANs.
32481 * data-streamer-out.cc (streamer_write_vrange): Same.
32482 * value-range.h (class vrange): Make streamer_write_vrange a friend.
32484 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
32486 * value-query.cc (range_query::get_tree_range): Set NAN directly
32488 * value-range.cc (frange::set): Assert that bounds are not NAN.
32490 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
32492 * value-range.cc (add_vrange): Handle known NANs.
32494 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
32496 * value-range.h (frange::set_nan): New.
32498 2023-05-25 Alexandre Oliva <oliva@adacore.com>
32501 * emit-rtl.cc (validate_subreg): Reject a SUBREG of a MEM that
32502 requires stricter alignment than MEM's.
32504 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
32506 PR tree-optimization/107822
32507 PR tree-optimization/107986
32508 * Makefile.in (OBJS): Add gimple-range-phi.o.
32509 * gimple-range-cache.h (ranger_cache::m_estimate): New
32510 phi_analyzer pointer member.
32511 * gimple-range-fold.cc (fold_using_range::range_of_phi): Use
32512 phi_analyzer if no loop info is available.
32513 * gimple-range-phi.cc: New file.
32514 * gimple-range-phi.h: New file.
32515 * tree-vrp.cc (execute_ranger_vrp): Utililze a phi_analyzer.
32517 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
32519 * gimple-range-fold.cc (fur_list::fur_list): Add range_query param
32521 (fold_range): Add range_query parameter.
32522 (fur_relation::fur_relation): New.
32523 (fur_relation::trio): New.
32524 (fur_relation::register_relation): New.
32525 (fold_relations): New.
32526 * gimple-range-fold.h (fold_range): Adjust prototypes.
32527 (fold_relations): New.
32529 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
32531 * gimple-range-cache.cc (ssa_cache::range_of_expr): New.
32532 * gimple-range-cache.h (class ssa_cache): Inherit from range_query.
32533 (ranger_cache::const_query): New.
32534 * gimple-range.cc (gimple_ranger::const_query): New.
32535 * gimple-range.h (gimple_ranger::const_query): New prototype.
32537 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
32539 * gimple-range-cache.cc (ssa_cache::dump): Use get_range.
32540 (ssa_cache::dump_range_query): Delete.
32541 (ssa_lazy_cache::dump_range_query): Delete.
32542 (ssa_lazy_cache::get_range): Move from header file.
32543 (ssa_lazy_cache::clear_range): ditto.
32544 (ssa_lazy_cache::clear): Ditto.
32545 * gimple-range-cache.h (class ssa_cache): Virtualize.
32546 (class ssa_lazy_cache): Inherit and virtualize.
32548 2023-05-24 Aldy Hernandez <aldyh@redhat.com>
32550 * value-range.h (vrange::kind): Remove.
32552 2023-05-24 Roger Sayle <roger@nextmovesoftware.com>
32554 PR middle-end/109840
32555 * match.pd <popcount optimizations>: Preserve zero-extension when
32556 optimizing popcount((T)bswap(x)) and popcount((T)rotate(x,y)) as
32557 popcount((T)x), so the popcount's argument keeps the same type.
32558 <parity optimizations>: Likewise preserve extensions when
32559 simplifying parity((T)bswap(x)) and parity((T)rotate(x,y)) as
32560 parity((T)x), so that the parity's argument type is the same.
32562 2023-05-24 Aldy Hernandez <aldyh@redhat.com>
32564 * ipa-cp.cc (ipa_value_range_from_jfunc): Use new ipa_vr API.
32565 (ipcp_store_vr_results): Same.
32566 * ipa-prop.cc (ipa_vr::ipa_vr): New.
32567 (ipa_vr::get_vrange): New.
32568 (ipa_vr::set_unknown): New.
32569 (ipa_vr::streamer_read): New.
32570 (ipa_vr::streamer_write): New.
32571 (write_ipcp_transformation_info): Use new ipa_vr API.
32572 (read_ipcp_transformation_info): Same.
32573 (ipa_vr::nonzero_p): Delete.
32574 (ipcp_update_vr): Use new ipa_vr API.
32575 * ipa-prop.h (class ipa_vr): Provide an API and hide internals.
32576 * ipa-sra.cc (zap_useless_ipcp_results): Use new ipa_vr API.
32578 2023-05-24 Jan-Benedict Glaw <jbglaw@lug-owl.de>
32580 * config/mcore/mcore.cc (output_inline_const) Make buffer smaller to
32581 silence overflow warnings later on.
32583 2023-05-24 Uros Bizjak <ubizjak@gmail.com>
32585 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
32586 Remove handling of V8QImode.
32587 * config/i386/mmx.md (v<insn>v8qi3): Move from sse.md.
32588 Call ix86_expand_vecop_qihi_partial. Enable for TARGET_MMX_WITH_SSE.
32589 (v<insn>v4qi3): Ditto.
32590 * config/i386/sse.md (v<insn>v8qi3): Remove.
32592 2023-05-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32595 * config/aarch64/aarch64-simd.md (aarch64_simd_lshr<mode>): Rename to...
32596 (aarch64_simd_lshr<mode><vczle><vczbe>): ... This.
32597 (aarch64_simd_ashr<mode>): Rename to...
32598 (aarch64_simd_ashr<mode><vczle><vczbe>): ... This.
32599 (aarch64_simd_imm_shl<mode>): Rename to...
32600 (aarch64_simd_imm_shl<mode><vczle><vczbe>): ... This.
32601 (aarch64_simd_reg_sshl<mode>): Rename to...
32602 (aarch64_simd_reg_sshl<mode><vczle><vczbe>): ... This.
32603 (aarch64_simd_reg_shl<mode>_unsigned): Rename to...
32604 (aarch64_simd_reg_shl<mode>_unsigned<vczle><vczbe>): ... This.
32605 (aarch64_simd_reg_shl<mode>_signed): Rename to...
32606 (aarch64_simd_reg_shl<mode>_signed<vczle><vczbe>): ... This.
32607 (vec_shr_<mode>): Rename to...
32608 (vec_shr_<mode><vczle><vczbe>): ... This.
32609 (aarch64_<sur>shl<mode>): Rename to...
32610 (aarch64_<sur>shl<mode><vczle><vczbe>): ... This.
32611 (aarch64_<sur>q<r>shl<mode>): Rename to...
32612 (aarch64_<sur>q<r>shl<mode><vczle><vczbe>): ... This.
32614 2023-05-24 Richard Biener <rguenther@suse.de>
32617 * config/i386/i386-expand.cc (ix86_expand_vector_init_general):
32618 Perform final vector composition using
32619 ix86_expand_vector_init_general instead of setting
32620 the highpart and lowpart which causes spilling.
32622 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
32624 PR tree-optimization/109695
32625 * gimple-range-cache.cc (ranger_cache::get_global_range): Add
32627 * gimple-range-cache.h (ranger_cache::get_global_range): Ditto.
32628 * gimple-range.cc (gimple_ranger::range_of_stmt): Pass changed
32629 flag to set_global_range.
32630 (gimple_ranger::prefill_stmt_dependencies): Ditto.
32632 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
32634 PR tree-optimization/109695
32635 * gimple-range-cache.cc (temporal_cache::temporal_value): Return
32637 (temporal_cache::current_p): Check always_current method.
32638 (temporal_cache::set_always_current): Add param and set value
32640 (temporal_cache::always_current_p): New.
32641 (ranger_cache::get_global_range): Adjust.
32642 (ranger_cache::set_global_range): set always current first.
32644 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
32646 PR tree-optimization/109695
32647 * gimple-range-cache.cc (ranger_cache::get_global_range): Call
32648 fold_range with global query to choose an initial value.
32650 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32652 * config/riscv/riscv-protos.h (enum frm_field_enum): Add FRM_
32655 2023-05-24 Richard Biener <rguenther@suse.de>
32657 PR tree-optimization/109849
32658 * tree-ssa-pre.cc (do_hoist_insertion): Do not intersect
32659 expressions but take the first sets.
32661 2023-05-24 Gaius Mulley <gaiusmod2@gmail.com>
32664 * doc/gm2.texi (High procedure function): New node.
32665 (Using): New menu entry for High procedure function.
32667 2023-05-24 Richard Sandiford <richard.sandiford@arm.com>
32669 PR rtl-optimization/109940
32670 * early-remat.cc (postorder_index): Rename to...
32671 (rpo_index): ...this.
32672 (compare_candidates): Sort by decreasing rpo_index rather than
32673 increasing postorder_index.
32674 (early_remat::sort_candidates): Calculate the forward RPO from
32676 (early_remat::local_phase): Follow forward RPO using DF_FORWARD,
32677 rather than DF_BACKWARD in reverse.
32679 2023-05-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32682 * config/arm/arm-builtins.cc (SAT_BINOP_UNSIGNED_IMM_QUALIFIERS): Use
32683 qualifier_none for the return operand.
32685 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32687 * config/riscv/autovec.md (<optab><mode>3): New pattern.
32688 (one_cmpl<mode>2): Ditto.
32689 (*<optab>not<mode>): Ditto.
32690 (*n<optab><mode>): Ditto.
32691 * config/riscv/riscv-v.cc (expand_vec_cmp_float): Change to
32694 2023-05-24 Kewen Lin <linkw@linux.ibm.com>
32696 * tree-vect-slp.cc (vect_transform_slp_perm_load_1): Adjust the
32697 calculation on n_perms by considering nvectors_per_build.
32699 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32700 Richard Sandiford <richard.sandiford@arm.com>
32702 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): New pattern.
32703 (vec_cmp<mode><vm>): New pattern.
32704 (vec_cmpu<mode><vm>): New pattern.
32705 (vcond<V:mode><VI:mode>): New pattern.
32706 (vcondu<V:mode><VI:mode>): New pattern.
32707 * config/riscv/riscv-protos.h (enum insn_type): Add new enum.
32708 (emit_vlmax_merge_insn): New function.
32709 (emit_vlmax_cmp_insn): Ditto.
32710 (emit_vlmax_cmp_mu_insn): Ditto.
32711 (expand_vec_cmp): Ditto.
32712 (expand_vec_cmp_float): Ditto.
32713 (expand_vcond): Ditto.
32714 * config/riscv/riscv-v.cc (emit_vlmax_merge_insn): Ditto.
32715 (emit_vlmax_cmp_insn): Ditto.
32716 (emit_vlmax_cmp_mu_insn): Ditto.
32717 (get_cmp_insn_code): Ditto.
32718 (expand_vec_cmp): Ditto.
32719 (expand_vec_cmp_float): Ditto.
32720 (expand_vcond): Ditto.
32722 2023-05-24 Pan Li <pan2.li@intel.com>
32724 * config/riscv/genrvv-type-indexer.cc (main): Add
32725 unsigned_eew*_lmul1_interpret for indexer.
32726 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
32727 Register vuint*m1_t interpret function.
32728 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_UNSIGNED_EEW8_LMUL1_INTERPRET_OPS):
32729 New macro for vuint8m1_t.
32730 (DEF_RVV_UNSIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
32731 (DEF_RVV_UNSIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
32732 (DEF_RVV_UNSIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
32733 (vbool1_t): Add to unsigned_eew*_interpret_ops.
32734 (vbool2_t): Likewise.
32735 (vbool4_t): Likewise.
32736 (vbool8_t): Likewise.
32737 (vbool16_t): Likewise.
32738 (vbool32_t): Likewise.
32739 (vbool64_t): Likewise.
32740 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_UNSIGNED_EEW8_LMUL1_INTERPRET_OPS):
32741 New macro for vuint*m1_t.
32742 (DEF_RVV_UNSIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
32743 (DEF_RVV_UNSIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
32744 (DEF_RVV_UNSIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
32745 (required_extensions_p): Add vuint*m1_t interpret case.
32746 * config/riscv/riscv-vector-builtins.def (unsigned_eew8_lmul1_interpret):
32747 Add vuint*m1_t interpret to base type.
32748 (unsigned_eew16_lmul1_interpret): Likewise.
32749 (unsigned_eew32_lmul1_interpret): Likewise.
32750 (unsigned_eew64_lmul1_interpret): Likewise.
32752 2023-05-24 Pan Li <pan2.li@intel.com>
32754 * config/riscv/genrvv-type-indexer.cc (EEW_SIZE_LIST): New macro
32755 for the eew size list.
32756 (LMUL1_LOG2): New macro for the log2 value of lmul=1.
32757 (main): Add signed_eew*_lmul1_interpret for indexer.
32758 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
32759 Register vint*m1_t interpret function.
32760 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_SIGNED_EEW8_LMUL1_INTERPRET_OPS):
32761 New macro for vint8m1_t.
32762 (DEF_RVV_SIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
32763 (DEF_RVV_SIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
32764 (DEF_RVV_SIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
32765 (vbool1_t): Add to signed_eew*_interpret_ops.
32766 (vbool2_t): Likewise.
32767 (vbool4_t): Likewise.
32768 (vbool8_t): Likewise.
32769 (vbool16_t): Likewise.
32770 (vbool32_t): Likewise.
32771 (vbool64_t): Likewise.
32772 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_SIGNED_EEW8_LMUL1_INTERPRET_OPS):
32773 New macro for vint*m1_t.
32774 (DEF_RVV_SIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
32775 (DEF_RVV_SIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
32776 (DEF_RVV_SIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
32777 (required_extensions_p): Add vint8m1_t interpret case.
32778 * config/riscv/riscv-vector-builtins.def (signed_eew8_lmul1_interpret):
32779 Add vint*m1_t interpret to base type.
32780 (signed_eew16_lmul1_interpret): Likewise.
32781 (signed_eew32_lmul1_interpret): Likewise.
32782 (signed_eew64_lmul1_interpret): Likewise.
32784 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32786 * config/riscv/autovec.md: Adjust for new interface.
32787 * config/riscv/riscv-protos.h (emit_vlmax_insn): Add VL operand.
32788 (emit_nonvlmax_insn): Add AVL operand.
32789 * config/riscv/riscv-v.cc (emit_vlmax_insn): Add VL operand.
32790 (emit_nonvlmax_insn): Add AVL operand.
32791 (sew64_scalar_helper): Adjust for new interface.
32792 (expand_tuple_move): Ditto.
32793 * config/riscv/vector.md: Ditto.
32795 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32797 * config/riscv/riscv-v.cc (expand_vec_series): Remove magic number.
32798 (expand_const_vector): Ditto.
32799 (legitimize_move): Ditto.
32800 (sew64_scalar_helper): Ditto.
32801 (expand_tuple_move): Ditto.
32802 (expand_vector_init_insert_elems): Ditto.
32803 * config/riscv/riscv.cc (vector_zero_call_used_regs): Ditto.
32805 2023-05-24 liuhongt <hongtao.liu@intel.com>
32808 * config/i386/i386.cc (ix86_gimple_fold_builtin): Fold
32809 _mm{,256,512}_abs_{epi8,epi16,epi32,epi64} and
32810 _mm_abs_{pi8,pi16,pi32} into gimple ABS_EXPR.
32811 (ix86_masked_all_ones): Handle 64-bit mask.
32812 * config/i386/i386-builtin.def: Replace icode of related
32813 non-mask simd abs builtins with CODE_FOR_nothing.
32815 2023-05-23 Martin Uecker <uecker@tugraz.at>
32818 * function.cc (gimplify_parm_type): Remove function.
32819 (gimplify_parameters): Call gimplify_type_sizes.
32821 2023-05-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
32823 * config/xtensa/xtensa.md (*addsubx): Rename from '*addx',
32824 and change to also accept '*subx' pattern.
32827 2023-05-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
32829 * config/xtensa/predicates.md (addsub_operator): New.
32830 * config/xtensa/xtensa.md (*extzvsi-1bit_ashlsi3,
32831 *extzvsi-1bit_addsubx): New insn_and_split patterns.
32832 * config/xtensa/xtensa.cc (xtensa_rtx_costs):
32833 Add a special case about ifcvt 'noce_try_cmove()' to handle
32834 constant loads that do not fit into signed 12 bits in the
32835 patterns added above.
32837 2023-05-23 Richard Biener <rguenther@suse.de>
32839 PR tree-optimization/109747
32840 * tree-vect-slp.cc (vect_prologue_cost_for_slp): Pass down
32841 the SLP node only once to the cost hook.
32843 2023-05-23 Georg-Johann Lay <avr@gjlay.de>
32845 * config/avr/avr.cc (avr_insn_cost): New static function.
32846 (TARGET_INSN_COST): Define to that function.
32848 2023-05-23 Richard Biener <rguenther@suse.de>
32851 * config/i386/i386.cc (ix86_vector_costs::add_stmt_cost):
32852 For vector construction or splats apply GPR->XMM move
32853 costing. QImode memory can be handled directly only
32854 with SSE4.1 pinsrb.
32856 2023-05-23 Richard Biener <rguenther@suse.de>
32858 PR tree-optimization/108752
32859 * tree-vect-stmts.cc (vectorizable_operation): For bit
32860 operations with generic word_mode vectors do not cost
32861 an extra stmt. For plus, minus and negate also cost the
32862 constant materialization.
32864 2023-05-23 Uros Bizjak <ubizjak@gmail.com>
32866 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi_partial):
32867 Call ix86_expand_vec_shift_qihi_constant for shifts
32868 with constant count operand.
32869 * config/i386/i386.cc (ix86_shift_rotate_cost):
32870 Handle V4QImode and V8QImode.
32871 * config/i386/mmx.md (<insn>v8qi3): New insn pattern.
32872 (<insn>v4qi3): Ditto.
32874 2023-05-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32876 * config/riscv/vector.md: Add mode.
32878 2023-05-23 Aldy Hernandez <aldyh@redhat.com>
32880 PR tree-optimization/109934
32881 * value-range.cc (irange::invert): Remove buggy special case.
32883 2023-05-23 Richard Biener <rguenther@suse.de>
32885 * tree-ssa-pre.cc (compute_antic_aux): Dump the correct
32888 2023-05-23 Richard Sandiford <richard.sandiford@arm.com>
32891 * config/aarch64/aarch64.cc (aarch64_modes_tieable_p): Allow
32892 subregs between any scalars that are 64 bits or smaller.
32893 * config/aarch64/iterators.md (SUBDI_BITS): New int iterator.
32894 (bits_etype): New int attribute.
32895 * config/aarch64/aarch64.md (*insv_reg<mode>_<SUBDI_BITS>)
32896 (*aarch64_bfi<GPI:mode><ALLX:mode>_<SUBDI_BITS>): New patterns.
32897 (*aarch64_bfidi<ALLX:mode>_subreg_<SUBDI_BITS>): Likewise.
32899 2023-05-23 Richard Sandiford <richard.sandiford@arm.com>
32901 * doc/md.texi: Document that <FOO> can be used to refer to the
32902 numerical value of an int iterator FOO. Tweak other parts of
32903 the int iterator documentation.
32904 * read-rtl.cc (iterator_group::has_self_attr): New field.
32905 (map_attr_string): When has_self_attr is true, make <FOO>
32906 expand to the current value of iterator FOO.
32907 (initialize_iterators): Set has_self_attr for int iterators.
32909 2023-05-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32911 * config/riscv/autovec.md: Refactor the framework of RVV auto-vectorization.
32912 * config/riscv/riscv-protos.h (RVV_MISC_OP_NUM): Ditto.
32913 (RVV_UNOP_NUM): New macro.
32914 (RVV_BINOP_NUM): Ditto.
32915 (legitimize_move): Refactor the framework of RVV auto-vectorization.
32916 (emit_vlmax_op): Ditto.
32917 (emit_vlmax_reg_op): Ditto.
32918 (emit_len_op): Ditto.
32919 (emit_len_binop): Ditto.
32920 (emit_vlmax_tany_many): Ditto.
32921 (emit_nonvlmax_tany_many): Ditto.
32922 (sew64_scalar_helper): Ditto.
32923 (expand_tuple_move): Ditto.
32924 * config/riscv/riscv-v.cc (emit_pred_op): Ditto.
32925 (emit_pred_binop): Ditto.
32926 (emit_vlmax_op): Ditto.
32927 (emit_vlmax_tany_many): New function.
32928 (emit_len_op): Remove.
32929 (emit_nonvlmax_tany_many): New function.
32930 (emit_vlmax_reg_op): Remove.
32931 (emit_len_binop): Ditto.
32932 (emit_index_op): Ditto.
32933 (expand_vec_series): Refactor the framework of RVV auto-vectorization.
32934 (expand_const_vector): Ditto.
32935 (legitimize_move): Ditto.
32936 (sew64_scalar_helper): Ditto.
32937 (expand_tuple_move): Ditto.
32938 (expand_vector_init_insert_elems): Ditto.
32939 * config/riscv/riscv.cc (vector_zero_call_used_regs): Ditto.
32940 * config/riscv/vector.md: Ditto.
32942 2023-05-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32945 * config/aarch64/aarch64-simd.md (add_vec_concat_subst_le): Add predicate
32946 and constraint for operand 0.
32947 (add_vec_concat_subst_be): Likewise.
32949 2023-05-23 Richard Biener <rguenther@suse.de>
32951 PR tree-optimization/109849
32952 * tree-ssa-pre.cc (do_hoist_insertion): Compute ANTIC_OUT
32953 and use that to determine what to hoist.
32955 2023-05-23 Eric Botcazou <ebotcazou@adacore.com>
32957 * fold-const.cc (native_encode_initializer) <CONSTRUCTOR>: Apply the
32958 specific treatment for bit-fields only if they have an integral type
32959 and filter out non-integral bit-fields that do not start and end on
32962 2023-05-23 Aldy Hernandez <aldyh@redhat.com>
32964 PR tree-optimization/109920
32965 * value-range.h (RESIZABLE>::~int_range): Use delete[].
32967 2023-05-22 Uros Bizjak <ubizjak@gmail.com>
32969 * config/i386/i386.cc (ix86_shift_rotate_cost): Correct
32970 calcuation of integer vector mode costs to reflect generated
32971 instruction sequences of different integer vector modes and
32972 different target ABIs. Remove "speed" function argument.
32973 (ix86_rtx_costs): Update call for removed function argument.
32974 (ix86_vector_costs::add_stmt_cost): Ditto.
32976 2023-05-22 Aldy Hernandez <aldyh@redhat.com>
32978 * value-range.h (class Value_Range): Implement set_zero,
32979 set_nonzero, and nonzero_p.
32981 2023-05-22 Uros Bizjak <ubizjak@gmail.com>
32983 * config/i386/i386.cc (ix86_multiplication_cost): Add
32984 the cost of a memory read to the cost of V?QImode sequences.
32986 2023-05-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32988 * config/riscv/riscv-v.cc: Add "m_" prefix.
32990 2023-05-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32992 * tree-vect-loop.cc (vect_get_loop_len): Fix issue for
32993 multiple-rgroup of length.
32994 * tree-vect-stmts.cc (vectorizable_store): Ditto.
32995 (vectorizable_load): Ditto.
32996 * tree-vectorizer.h (vect_get_loop_len): Ditto.
32998 2023-05-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
33000 * config/riscv/riscv.cc (riscv_const_insns): Reorganize the
33003 2023-05-22 Kewen Lin <linkw@linux.ibm.com>
33005 * tree-vect-slp.cc (vect_transform_slp_perm_load_1): Refactor the
33006 handling for the case index == count.
33008 2023-05-21 Georg-Johann Lay <avr@gjlay.de>
33011 * config/avr/avr.cc (avr_fold_builtin) [AVR_BUILTIN_INSERT_BITS]:
33012 Don't fold to XOR / AND / XOR if just one bit is copied to the
33015 2023-05-21 Roger Sayle <roger@nextmovesoftware.com>
33017 * config/nvptx/nvptx.cc (nvptx_expand_brev): Expand target
33018 builtin for bit reversal using brev instruction.
33019 (enum nvptx_builtins): Add NVPTX_BUILTIN_BREV and
33020 NVPTX_BUILTIN_BREVLL.
33021 (nvptx_init_builtins): Define "brev" and "brevll".
33022 (nvptx_expand_builtin): Expand NVPTX_BUILTIN_BREV and
33023 NVPTX_BUILTIN_BREVLL via nvptx_expand_brev function.
33024 * doc/extend.texi (Nvidia PTX Builtin-in Functions): New
33025 section, document __builtin_nvptx_brev{,ll}.
33027 2023-05-21 Jakub Jelinek <jakub@redhat.com>
33029 PR tree-optimization/109505
33030 * match.pd ((x | CST1) & CST2 -> (x & CST2) | (CST1 & CST2),
33031 Combine successive equal operations with constants,
33032 (A +- CST1) +- CST2 -> A + CST3, (CST1 - A) +- CST2 -> CST3 - A,
33033 CST1 - (CST2 - A) -> CST3 + A): Use ! on ops with 2 CONSTANT_CLASS_P
33036 2023-05-21 Andrew Pinski <apinski@marvell.com>
33038 * expr.cc (expand_single_bit_test): Correct bitpos for big-endian.
33040 2023-05-21 Pan Li <pan2.li@intel.com>
33042 * config/riscv/genrvv-type-indexer.cc (BOOL_SIZE_LIST): Add the
33043 rest bool size, aka 2, 4, 8, 16, 32, 64.
33044 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
33045 Register vbool[2|4|8|16|32|64] interpret function.
33046 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_BOOL2_INTERPRET_OPS):
33047 New macro for vbool2_t.
33048 (DEF_RVV_BOOL4_INTERPRET_OPS): Likewise.
33049 (DEF_RVV_BOOL8_INTERPRET_OPS): Likewise.
33050 (DEF_RVV_BOOL16_INTERPRET_OPS): Likewise.
33051 (DEF_RVV_BOOL32_INTERPRET_OPS): Likewise.
33052 (DEF_RVV_BOOL64_INTERPRET_OPS): Likewise.
33053 (vint8m1_t): Add the type to bool[2|4|8|16|32|64]_interpret_ops.
33054 (vint16m1_t): Likewise.
33055 (vint32m1_t): Likewise.
33056 (vint64m1_t): Likewise.
33057 (vuint8m1_t): Likewise.
33058 (vuint16m1_t): Likewise.
33059 (vuint32m1_t): Likewise.
33060 (vuint64m1_t): Likewise.
33061 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_BOOL2_INTERPRET_OPS):
33062 New macro for vbool2_t.
33063 (DEF_RVV_BOOL4_INTERPRET_OPS): Likewise.
33064 (DEF_RVV_BOOL8_INTERPRET_OPS): Likewise.
33065 (DEF_RVV_BOOL16_INTERPRET_OPS): Likewise.
33066 (DEF_RVV_BOOL32_INTERPRET_OPS): Likewise.
33067 (DEF_RVV_BOOL64_INTERPRET_OPS): Likewise.
33068 (required_extensions_p): Add vbool[2|4|8|16|32|64] interpret case.
33069 * config/riscv/riscv-vector-builtins.def (bool2_interpret): Add
33070 vbool2_t interprect to base type.
33071 (bool4_interpret): Likewise.
33072 (bool8_interpret): Likewise.
33073 (bool16_interpret): Likewise.
33074 (bool32_interpret): Likewise.
33075 (bool64_interpret): Likewise.
33077 2023-05-21 Andrew Pinski <apinski@marvell.com>
33079 PR middle-end/109919
33080 * expr.cc (expand_single_bit_test): Don't use the
33081 target for expand_expr.
33083 2023-05-20 Gerald Pfeifer <gerald@pfeifer.com>
33085 * doc/install.texi (Specific): Remove de facto empty alpha*-*-*
33088 2023-05-20 Pan Li <pan2.li@intel.com>
33090 * mode-switching.cc (entity_map): Initialize the array to zero.
33093 2023-05-20 Triffid Hunter <triffid.hunter@gmail.com>
33096 * config/avr/avr.md (divmodpsi, udivmodpsi, divmodsi, udivmodsi):
33097 Remove superfluous "parallel" in insn pattern.
33098 ([u]divmod<mode>4): Tidy code. Use gcc_unreachable() instead of
33099 printing error text to assembly.
33101 2023-05-20 Andrew Pinski <apinski@marvell.com>
33103 * expr.cc (fold_single_bit_test): Rename to ...
33104 (expand_single_bit_test): This and expand directly.
33105 (do_store_flag): Update for the rename function.
33107 2023-05-20 Andrew Pinski <apinski@marvell.com>
33109 * expr.cc (fold_single_bit_test): Use BIT_FIELD_REF
33110 instead of shift/and.
33112 2023-05-20 Andrew Pinski <apinski@marvell.com>
33114 * expr.cc (fold_single_bit_test): Add an assert
33115 and simplify based on code being NE_EXPR or EQ_EXPR.
33117 2023-05-20 Andrew Pinski <apinski@marvell.com>
33119 * expr.cc (fold_single_bit_test): Take inner and bitnum
33120 instead of arg0 and arg1. Update the code.
33121 (do_store_flag): Don't create a tree when calling
33122 fold_single_bit_test instead just call it with the bitnum
33123 and the inner tree.
33125 2023-05-20 Andrew Pinski <apinski@marvell.com>
33127 * expr.cc (fold_single_bit_test): Use get_def_for_expr
33128 instead of checking the inner's code.
33130 2023-05-20 Andrew Pinski <apinski@marvell.com>
33132 * expr.cc (fold_single_bit_test_into_sign_test): Inline into ...
33133 (fold_single_bit_test): This and simplify.
33135 2023-05-20 Andrew Pinski <apinski@marvell.com>
33137 * fold-const.cc (fold_single_bit_test_into_sign_test): Move to
33139 (fold_single_bit_test): Likewise.
33140 * expr.cc (fold_single_bit_test_into_sign_test): Move from fold-const.cc
33141 (fold_single_bit_test): Likewise and make static.
33142 * fold-const.h (fold_single_bit_test): Remove declaration.
33144 2023-05-20 Die Li <lidie@eswincomputing.com>
33146 * config/riscv/riscv.cc (riscv_expand_conditional_move): Fix mode
33149 2023-05-20 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
33151 * config/riscv/bitmanip.md (branch<X:mode>_bext): New split pattern.
33153 2023-05-20 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
33156 * config/riscv/bitmanip.md
33157 (<bitmanip_optab>disi2): Match with any_extend.
33158 (<bitmanip_optab>disi2_sext): New pattern to match
33159 with sign extend using an ANDI instruction.
33161 2023-05-19 Nathan Sidwell <nathan@acm.org>
33164 * opts.h (handle_deferred_dump_options): Declare.
33165 * opts-global.cc (handle_common_deferred_options): Do not handle
33167 (handle_deferred_dump_options): New.
33168 * toplev.cc (toplev::main): Call it after plugin init.
33170 2023-05-19 Joern Rennecke <joern.rennecke@embecosm.com>
33172 * config/riscv/constraints.md (DsS, DsD): Restore agreement
33173 with shiftm1 mode attribute.
33175 2023-05-19 Andrew Pinski <apinski@marvell.com>
33178 * gcc.cc (default_compilers["@c-header"]): Add %w
33179 after the --output-pch.
33181 2023-05-19 Vineet Gupta <vineetg@rivosinc.com>
33183 * config/riscv/riscv.cc (riscv_split_integer): if loval is equal
33184 to hival, ASHIFT the corresponding regs.
33186 2023-05-19 Robin Dapp <rdapp@ventanamicro.com>
33188 * config/riscv/riscv.cc (riscv_const_insns): Remove else.
33190 2023-05-19 Jakub Jelinek <jakub@redhat.com>
33192 PR tree-optimization/105776
33193 * tree-ssa-math-opts.cc (arith_overflow_check_p): If cast_stmt is
33194 non-NULL, allow division statement to have a cast as single imm use
33195 rather than comparison/condition.
33196 (match_arith_overflow): In that case remove the cast stmt in addition
33197 to the division statement.
33199 2023-05-19 Jakub Jelinek <jakub@redhat.com>
33201 PR tree-optimization/101856
33202 * tree-ssa-math-opts.cc (match_arith_overflow): Pattern detect
33203 unsigned __builtin_mul_overflow_p even when umulv4_optab doesn't
33204 support it but umul_highpart_optab does.
33206 2023-05-19 Eric Botcazou <ebotcazou@adacore.com>
33208 * varasm.cc (output_constructor_bitfield): Call tree_to_uhwi instead
33209 of tree_to_shwi on array indices. Minor tweaks.
33211 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
33213 * alias.cc (ref_all_alias_ptr_type_p): Use _P() defines from tree.h.
33214 * attribs.cc (diag_attr_exclusions): Ditto.
33215 (decl_attributes): Ditto.
33216 (build_type_attribute_qual_variant): Ditto.
33217 * builtins.cc (fold_builtin_carg): Ditto.
33218 (fold_builtin_next_arg): Ditto.
33219 (do_mpc_arg2): Ditto.
33220 * cfgexpand.cc (expand_return): Ditto.
33221 * cgraph.h (decl_in_symtab_p): Ditto.
33222 (symtab_node::get_create): Ditto.
33223 * dwarf2out.cc (base_type_die): Ditto.
33224 (implicit_ptr_descriptor): Ditto.
33225 (gen_array_type_die): Ditto.
33226 (gen_type_die_with_usage): Ditto.
33227 (optimize_location_into_implicit_ptr): Ditto.
33228 * expr.cc (do_store_flag): Ditto.
33229 * fold-const.cc (negate_expr_p): Ditto.
33230 (fold_negate_expr_1): Ditto.
33231 (fold_convert_const): Ditto.
33232 (fold_convert_loc): Ditto.
33233 (constant_boolean_node): Ditto.
33234 (fold_binary_op_with_conditional_arg): Ditto.
33235 (build_fold_addr_expr_with_type_loc): Ditto.
33236 (fold_comparison): Ditto.
33237 (fold_checksum_tree): Ditto.
33238 (tree_unary_nonnegative_warnv_p): Ditto.
33239 (integer_valued_real_unary_p): Ditto.
33240 (fold_read_from_constant_string): Ditto.
33241 * gcc-rich-location.cc (maybe_range_label_for_tree_type_mismatch::get_text): Ditto.
33242 * gimple-expr.cc (useless_type_conversion_p): Ditto.
33243 (is_gimple_reg): Ditto.
33244 (is_gimple_asm_val): Ditto.
33245 (mark_addressable): Ditto.
33246 * gimple-expr.h (is_gimple_variable): Ditto.
33247 (virtual_operand_p): Ditto.
33248 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores): Ditto.
33249 * gimplify.cc (gimplify_bind_expr): Ditto.
33250 (gimplify_return_expr): Ditto.
33251 (gimple_add_padding_init_for_auto_var): Ditto.
33252 (gimplify_addr_expr): Ditto.
33253 (omp_add_variable): Ditto.
33254 (omp_notice_variable): Ditto.
33255 (omp_get_base_pointer): Ditto.
33256 (omp_strip_components_and_deref): Ditto.
33257 (omp_strip_indirections): Ditto.
33258 (omp_accumulate_sibling_list): Ditto.
33259 (omp_build_struct_sibling_lists): Ditto.
33260 (gimplify_adjust_omp_clauses_1): Ditto.
33261 (gimplify_adjust_omp_clauses): Ditto.
33262 (gimplify_omp_for): Ditto.
33263 (goa_lhs_expr_p): Ditto.
33264 (gimplify_one_sizepos): Ditto.
33265 * graphite-scop-detection.cc (scop_detection::graphite_can_represent_scev): Ditto.
33266 * ipa-devirt.cc (odr_types_equivalent_p): Ditto.
33267 * ipa-prop.cc (ipa_set_jf_constant): Ditto.
33268 (propagate_controlled_uses): Ditto.
33269 * ipa-sra.cc (type_prevails_p): Ditto.
33270 (scan_expr_access): Ditto.
33271 * optabs-tree.cc (optab_for_tree_code): Ditto.
33272 * toplev.cc (wrapup_global_declaration_1): Ditto.
33273 * trans-mem.cc (transaction_invariant_address_p): Ditto.
33274 * tree-cfg.cc (verify_types_in_gimple_reference): Ditto.
33275 (verify_gimple_comparison): Ditto.
33276 (verify_gimple_assign_binary): Ditto.
33277 (verify_gimple_assign_single): Ditto.
33278 * tree-complex.cc (get_component_ssa_name): Ditto.
33279 * tree-emutls.cc (lower_emutls_2): Ditto.
33280 * tree-inline.cc (copy_tree_body_r): Ditto.
33281 (estimate_move_cost): Ditto.
33282 (copy_decl_for_dup_finish): Ditto.
33283 * tree-nested.cc (convert_nonlocal_omp_clauses): Ditto.
33284 (note_nonlocal_vla_type): Ditto.
33285 (convert_local_omp_clauses): Ditto.
33286 (remap_vla_decls): Ditto.
33287 (fixup_vla_decls): Ditto.
33288 * tree-parloops.cc (loop_has_vector_phi_nodes): Ditto.
33289 * tree-pretty-print.cc (print_declaration): Ditto.
33290 (print_call_name): Ditto.
33291 * tree-sra.cc (compare_access_positions): Ditto.
33292 * tree-ssa-alias.cc (compare_type_sizes): Ditto.
33293 * tree-ssa-ccp.cc (get_default_value): Ditto.
33294 * tree-ssa-coalesce.cc (populate_coalesce_list_for_outofssa): Ditto.
33295 * tree-ssa-dom.cc (reduce_vector_comparison_to_scalar_comparison): Ditto.
33296 * tree-ssa-forwprop.cc (can_propagate_from): Ditto.
33297 * tree-ssa-propagate.cc (may_propagate_copy): Ditto.
33298 * tree-ssa-sccvn.cc (fully_constant_vn_reference_p): Ditto.
33299 * tree-ssa-sink.cc (statement_sink_location): Ditto.
33300 * tree-ssa-structalias.cc (type_must_have_pointers): Ditto.
33301 * tree-ssa-ter.cc (find_replaceable_in_bb): Ditto.
33302 * tree-ssa-uninit.cc (warn_uninit): Ditto.
33303 * tree-ssa.cc (maybe_rewrite_mem_ref_base): Ditto.
33304 (non_rewritable_mem_ref_base): Ditto.
33305 * tree-streamer-in.cc (lto_input_ts_type_non_common_tree_pointers): Ditto.
33306 * tree-streamer-out.cc (write_ts_type_non_common_tree_pointers): Ditto.
33307 * tree-vect-generic.cc (do_binop): Ditto.
33309 * tree-vect-stmts.cc (vect_init_vector): Ditto.
33310 * tree-vector-builder.h (tree_vector_builder::note_representative): Ditto.
33311 * tree.cc (sign_mask_for): Ditto.
33312 (verify_type_variant): Ditto.
33313 (gimple_canonical_types_compatible_p): Ditto.
33314 (verify_type): Ditto.
33315 * ubsan.cc (get_ubsan_type_info_for_type): Ditto.
33316 * var-tracking.cc (prepare_call_arguments): Ditto.
33317 (vt_add_function_parameters): Ditto.
33318 * varasm.cc (decode_addr_const): Ditto.
33320 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
33322 * omp-low.cc (scan_sharing_clauses): Use _P() defines from tree.h.
33323 (lower_reduction_clauses): Ditto.
33324 (lower_send_clauses): Ditto.
33325 (lower_omp_task_reductions): Ditto.
33326 * omp-oacc-neuter-broadcast.cc (install_var_field): Ditto.
33327 (worker_single_copy): Ditto.
33328 * omp-offload.cc (oacc_rewrite_var_decl): Ditto.
33329 * omp-simd-clone.cc (plausible_type_for_simd_clone): Ditto.
33331 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
33333 * lto-streamer-in.cc (lto_input_var_decl_ref): Use _P defines from
33335 (lto_read_body_or_constructor): Ditto.
33336 * lto-streamer-out.cc (tree_is_indexable): Ditto.
33337 (lto_output_var_decl_ref): Ditto.
33338 (DFS::DFS_write_tree_body): Ditto.
33339 (wrap_refs): Ditto.
33340 (write_symbol_extension_info): Ditto.
33342 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
33344 * config/aarch64/aarch64.cc (aarch64_short_vector_p): Use _P
33345 defines from tree.h.
33346 (aarch64_mangle_type): Ditto.
33347 * config/alpha/alpha.cc (alpha_in_small_data_p): Ditto.
33348 (alpha_gimplify_va_arg_1): Ditto.
33349 * config/arc/arc.cc (arc_encode_section_info): Ditto.
33350 (arc_is_aux_reg_p): Ditto.
33351 (arc_is_uncached_mem_p): Ditto.
33352 (arc_handle_aux_attribute): Ditto.
33353 * config/arm/arm.cc (arm_handle_isr_attribute): Ditto.
33354 (arm_handle_cmse_nonsecure_call): Ditto.
33355 (arm_set_default_type_attributes): Ditto.
33356 (arm_is_segment_info_known): Ditto.
33357 (arm_mangle_type): Ditto.
33358 * config/arm/unknown-elf.h (IN_NAMED_SECTION_P): Ditto.
33359 * config/avr/avr.cc (avr_lookup_function_attribute1): Ditto.
33360 (avr_decl_absdata_p): Ditto.
33361 (avr_insert_attributes): Ditto.
33362 (avr_section_type_flags): Ditto.
33363 (avr_encode_section_info): Ditto.
33364 * config/bfin/bfin.cc (bfin_handle_l2_attribute): Ditto.
33365 * config/bpf/bpf.cc (bpf_core_compute): Ditto.
33366 * config/c6x/c6x.cc (c6x_in_small_data_p): Ditto.
33367 * config/csky/csky.cc (csky_handle_isr_attribute): Ditto.
33368 (csky_mangle_type): Ditto.
33369 * config/darwin-c.cc (darwin_pragma_unused): Ditto.
33370 * config/darwin.cc (is_objc_metadata): Ditto.
33371 * config/epiphany/epiphany.cc (epiphany_function_ok_for_sibcall): Ditto.
33372 * config/epiphany/epiphany.h (ROUND_TYPE_ALIGN): Ditto.
33373 * config/frv/frv.cc (frv_emit_movsi): Ditto.
33374 * config/gcn/gcn-tree.cc (gcn_lockless_update): Ditto.
33375 * config/gcn/gcn.cc (gcn_asm_output_symbol_ref): Ditto.
33376 * config/h8300/h8300.cc (h8300_encode_section_info): Ditto.
33377 * config/i386/i386-expand.cc: Ditto.
33378 * config/i386/i386.cc (type_natural_mode): Ditto.
33379 (ix86_function_arg): Ditto.
33380 (ix86_data_alignment): Ditto.
33381 (ix86_local_alignment): Ditto.
33382 (ix86_simd_clone_compute_vecsize_and_simdlen): Ditto.
33383 * config/i386/winnt-cxx.cc (i386_pe_type_dllimport_p): Ditto.
33384 (i386_pe_type_dllexport_p): Ditto.
33385 (i386_pe_adjust_class_at_definition): Ditto.
33386 * config/i386/winnt.cc (i386_pe_determine_dllimport_p): Ditto.
33387 (i386_pe_binds_local_p): Ditto.
33388 (i386_pe_section_type_flags): Ditto.
33389 * config/ia64/ia64.cc (ia64_encode_section_info): Ditto.
33390 (ia64_gimplify_va_arg): Ditto.
33391 (ia64_in_small_data_p): Ditto.
33392 * config/iq2000/iq2000.cc (iq2000_function_arg): Ditto.
33393 * config/lm32/lm32.cc (lm32_in_small_data_p): Ditto.
33394 * config/loongarch/loongarch.cc (loongarch_handle_model_attribute): Ditto.
33395 * config/m32c/m32c.cc (m32c_insert_attributes): Ditto.
33396 * config/mcore/mcore.cc (mcore_mark_dllimport): Ditto.
33397 (mcore_encode_section_info): Ditto.
33398 * config/microblaze/microblaze.cc (microblaze_elf_in_small_data_p): Ditto.
33399 * config/mips/mips.cc (mips_output_aligned_decl_common): Ditto.
33400 * config/mmix/mmix.cc (mmix_encode_section_info): Ditto.
33401 * config/nvptx/nvptx.cc (nvptx_encode_section_info): Ditto.
33402 (pass_in_memory): Ditto.
33403 (nvptx_generate_vector_shuffle): Ditto.
33404 (nvptx_lockless_update): Ditto.
33405 * config/pa/pa.cc (pa_function_arg_padding): Ditto.
33406 (pa_function_value): Ditto.
33407 (pa_function_arg): Ditto.
33408 * config/pa/pa.h (IN_NAMED_SECTION_P): Ditto.
33409 (TEXT_SPACE_P): Ditto.
33410 * config/pa/som.h (MAKE_DECL_ONE_ONLY): Ditto.
33411 * config/pdp11/pdp11.cc (pdp11_return_in_memory): Ditto.
33412 * config/riscv/riscv.cc (riscv_in_small_data_p): Ditto.
33413 (riscv_mangle_type): Ditto.
33414 * config/rl78/rl78.cc (rl78_insert_attributes): Ditto.
33415 (rl78_addsi3_internal): Ditto.
33416 * config/rs6000/aix.h (ROUND_TYPE_ALIGN): Ditto.
33417 * config/rs6000/darwin.h (ROUND_TYPE_ALIGN): Ditto.
33418 * config/rs6000/freebsd64.h (ROUND_TYPE_ALIGN): Ditto.
33419 * config/rs6000/linux64.h (ROUND_TYPE_ALIGN): Ditto.
33420 * config/rs6000/rs6000-call.cc (rs6000_function_arg_boundary): Ditto.
33421 (rs6000_function_arg_advance_1): Ditto.
33422 (rs6000_function_arg): Ditto.
33423 (rs6000_pass_by_reference): Ditto.
33424 * config/rs6000/rs6000-logue.cc (rs6000_function_ok_for_sibcall): Ditto.
33425 * config/rs6000/rs6000.cc (rs6000_data_alignment): Ditto.
33426 (rs6000_set_default_type_attributes): Ditto.
33427 (rs6000_elf_in_small_data_p): Ditto.
33428 (IN_NAMED_SECTION): Ditto.
33429 (rs6000_xcoff_encode_section_info): Ditto.
33430 (rs6000_function_value): Ditto.
33431 (invalid_arg_for_unprototyped_fn): Ditto.
33432 * config/s390/s390-c.cc (s390_fn_types_compatible): Ditto.
33433 (s390_vec_n_elem): Ditto.
33434 * config/s390/s390.cc (s390_check_type_for_vector_abi): Ditto.
33435 (s390_function_arg_integer): Ditto.
33436 (s390_return_in_memory): Ditto.
33437 (s390_encode_section_info): Ditto.
33438 * config/sh/sh.cc (sh_gimplify_va_arg_expr): Ditto.
33439 (sh_function_value): Ditto.
33440 * config/sol2.cc (solaris_insert_attributes): Ditto.
33441 * config/sparc/sparc.cc (function_arg_slotno): Ditto.
33442 * config/sparc/sparc.h (ROUND_TYPE_ALIGN): Ditto.
33443 * config/stormy16/stormy16.cc (xstormy16_encode_section_info): Ditto.
33444 (xstormy16_handle_below100_attribute): Ditto.
33445 * config/v850/v850.cc (v850_encode_section_info): Ditto.
33446 (v850_insert_attributes): Ditto.
33447 * config/visium/visium.cc (visium_pass_by_reference): Ditto.
33448 (visium_return_in_memory): Ditto.
33449 * config/xtensa/xtensa.cc (xtensa_multibss_section_type_flags): Ditto.
33451 2023-05-18 Uros Bizjak <ubizjak@gmail.com>
33453 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi_partial): New.
33454 (ix86_expand_vecop_qihi): Add op2vec bool variable.
33455 Do not set REG_EQUAL note.
33456 * config/i386/i386-protos.h (ix86_expand_vecop_qihi_partial):
33458 * config/i386/i386.cc (ix86_multiplication_cost): Handle
33459 V4QImode and V8QImode.
33460 * config/i386/mmx.md (mulv8qi3): New expander.
33462 * config/i386/sse.md (mulv8qi3): Remove.
33464 2023-05-18 Georg-Johann Lay <avr@gjlay.de>
33466 * config/avr/gen-avr-mmcu-specs.cc: Remove stale */ after // comment.
33468 2023-05-18 Jonathan Wakely <jwakely@redhat.com>
33470 PR bootstrap/105831
33471 * config.gcc: Use = operator instead of ==.
33473 2023-05-18 Michael Bäuerle <micha@NetBSD.org>
33475 PR bootstrap/105831
33476 * config/nvptx/gen-opt.sh: Use = operator instead of ==.
33477 * configure.ac: Likewise.
33478 * configure: Regenerate.
33480 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
33482 * config/arm/arm_mve.h: (__ARM_mve_typeid): Add more pointer types.
33483 (__ARM_mve_coerce1): Remove.
33484 (__ARM_mve_coerce2): Remove.
33485 (__ARM_mve_coerce3): Remove.
33486 (__ARM_mve_coerce_i_scalar): New.
33487 (__ARM_mve_coerce_s8_ptr): New.
33488 (__ARM_mve_coerce_u8_ptr): New.
33489 (__ARM_mve_coerce_s16_ptr): New.
33490 (__ARM_mve_coerce_u16_ptr): New.
33491 (__ARM_mve_coerce_s32_ptr): New.
33492 (__ARM_mve_coerce_u32_ptr): New.
33493 (__ARM_mve_coerce_s64_ptr): New.
33494 (__ARM_mve_coerce_u64_ptr): New.
33495 (__ARM_mve_coerce_f_scalar): New.
33496 (__ARM_mve_coerce_f16_ptr): New.
33497 (__ARM_mve_coerce_f32_ptr): New.
33498 (__arm_vst4q): Change _coerce_ overloads.
33499 (__arm_vbicq): Change _coerce_ overloads.
33500 (__arm_vld1q): Change _coerce_ overloads.
33501 (__arm_vld1q_z): Change _coerce_ overloads.
33502 (__arm_vld2q): Change _coerce_ overloads.
33503 (__arm_vld4q): Change _coerce_ overloads.
33504 (__arm_vldrhq_gather_offset): Change _coerce_ overloads.
33505 (__arm_vldrhq_gather_offset_z): Change _coerce_ overloads.
33506 (__arm_vldrhq_gather_shifted_offset): Change _coerce_ overloads.
33507 (__arm_vldrhq_gather_shifted_offset_z): Change _coerce_ overloads.
33508 (__arm_vldrwq_gather_offset): Change _coerce_ overloads.
33509 (__arm_vldrwq_gather_offset_z): Change _coerce_ overloads.
33510 (__arm_vldrwq_gather_shifted_offset): Change _coerce_ overloads.
33511 (__arm_vldrwq_gather_shifted_offset_z): Change _coerce_ overloads.
33512 (__arm_vst1q_p): Change _coerce_ overloads.
33513 (__arm_vst2q): Change _coerce_ overloads.
33514 (__arm_vst1q): Change _coerce_ overloads.
33515 (__arm_vstrhq): Change _coerce_ overloads.
33516 (__arm_vstrhq_p): Change _coerce_ overloads.
33517 (__arm_vstrhq_scatter_offset_p): Change _coerce_ overloads.
33518 (__arm_vstrhq_scatter_offset): Change _coerce_ overloads.
33519 (__arm_vstrhq_scatter_shifted_offset_p): Change _coerce_ overloads.
33520 (__arm_vstrhq_scatter_shifted_offset): Change _coerce_ overloads.
33521 (__arm_vstrwq_p): Change _coerce_ overloads.
33522 (__arm_vstrwq): Change _coerce_ overloads.
33523 (__arm_vstrwq_scatter_offset): Change _coerce_ overloads.
33524 (__arm_vstrwq_scatter_offset_p): Change _coerce_ overloads.
33525 (__arm_vstrwq_scatter_shifted_offset): Change _coerce_ overloads.
33526 (__arm_vstrwq_scatter_shifted_offset_p): Change _coerce_ overloads.
33527 (__arm_vsetq_lane): Change _coerce_ overloads.
33528 (__arm_vldrbq_gather_offset): Change _coerce_ overloads.
33529 (__arm_vdwdupq_x_u8): Change _coerce_ overloads.
33530 (__arm_vdwdupq_x_u16): Change _coerce_ overloads.
33531 (__arm_vdwdupq_x_u32): Change _coerce_ overloads.
33532 (__arm_viwdupq_x_u8): Change _coerce_ overloads.
33533 (__arm_viwdupq_x_u16): Change _coerce_ overloads.
33534 (__arm_viwdupq_x_u32): Change _coerce_ overloads.
33535 (__arm_vidupq_x_u8): Change _coerce_ overloads.
33536 (__arm_vddupq_x_u8): Change _coerce_ overloads.
33537 (__arm_vidupq_x_u16): Change _coerce_ overloads.
33538 (__arm_vddupq_x_u16): Change _coerce_ overloads.
33539 (__arm_vidupq_x_u32): Change _coerce_ overloads.
33540 (__arm_vddupq_x_u32): Change _coerce_ overloads.
33541 (__arm_vldrdq_gather_offset): Change _coerce_ overloads.
33542 (__arm_vldrdq_gather_offset_z): Change _coerce_ overloads.
33543 (__arm_vldrdq_gather_shifted_offset): Change _coerce_ overloads.
33544 (__arm_vldrdq_gather_shifted_offset_z): Change _coerce_ overloads.
33545 (__arm_vldrbq_gather_offset_z): Change _coerce_ overloads.
33546 (__arm_vidupq_u16): Change _coerce_ overloads.
33547 (__arm_vidupq_u32): Change _coerce_ overloads.
33548 (__arm_vidupq_u8): Change _coerce_ overloads.
33549 (__arm_vddupq_u16): Change _coerce_ overloads.
33550 (__arm_vddupq_u32): Change _coerce_ overloads.
33551 (__arm_vddupq_u8): Change _coerce_ overloads.
33552 (__arm_viwdupq_m): Change _coerce_ overloads.
33553 (__arm_viwdupq_u16): Change _coerce_ overloads.
33554 (__arm_viwdupq_u32): Change _coerce_ overloads.
33555 (__arm_viwdupq_u8): Change _coerce_ overloads.
33556 (__arm_vdwdupq_m): Change _coerce_ overloads.
33557 (__arm_vdwdupq_u16): Change _coerce_ overloads.
33558 (__arm_vdwdupq_u32): Change _coerce_ overloads.
33559 (__arm_vdwdupq_u8): Change _coerce_ overloads.
33560 (__arm_vstrbq): Change _coerce_ overloads.
33561 (__arm_vstrbq_p): Change _coerce_ overloads.
33562 (__arm_vstrbq_scatter_offset_p): Change _coerce_ overloads.
33563 (__arm_vstrdq_scatter_offset_p): Change _coerce_ overloads.
33564 (__arm_vstrdq_scatter_offset): Change _coerce_ overloads.
33565 (__arm_vstrdq_scatter_shifted_offset_p): Change _coerce_ overloads.
33566 (__arm_vstrdq_scatter_shifted_offset): Change _coerce_ overloads.
33568 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
33570 * config/arm/arm_mve.h (__arm_vbicq): Change coerce on
33573 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
33575 * config/arm/arm_mve.h (__arm_vadcq_s32): Fix arithmetic.
33576 (__arm_vadcq_u32): Likewise.
33577 (__arm_vadcq_m_s32): Likewise.
33578 (__arm_vadcq_m_u32): Likewise.
33579 (__arm_vsbcq_s32): Likewise.
33580 (__arm_vsbcq_u32): Likewise.
33581 (__arm_vsbcq_m_s32): Likewise.
33582 (__arm_vsbcq_m_u32): Likewise.
33583 * config/arm/mve.md (get_fpscr_nzcvqc): Make unspec_volatile.
33585 2023-05-18 Andrea Corallo <andrea.corallo@arm.com>
33587 * config/arm/mve.md (mve_vrndq_m_f<mode>, mve_vrev64q_f<mode>)
33588 (mve_vrev32q_fv8hf, mve_vcvttq_f32_f16v4sf)
33589 (mve_vcvtbq_f32_f16v4sf, mve_vcvtq_to_f_<supf><mode>)
33590 (mve_vrev64q_<supf><mode>, mve_vcvtq_from_f_<supf><mode>)
33591 (mve_vmovltq_<supf><mode>, mve_vmovlbq_<supf><mode>)
33592 (mve_vcvtpq_<supf><mode>, mve_vcvtnq_<supf><mode>)
33593 (mve_vcvtmq_<supf><mode>, mve_vcvtaq_<supf><mode>)
33594 (mve_vmvnq_n_<supf><mode>, mve_vrev16q_<supf>v16qi)
33595 (mve_vctp<MVE_vctp>q<MVE_vpred>, mve_vbrsrq_n_f<mode>)
33596 (mve_vbrsrq_n_<supf><mode>, mve_vandq_f<mode>, mve_vbicq_f<mode>)
33597 (mve_vctp<MVE_vctp>q_m<MVE_vpred>, mve_vcvtbq_f16_f32v8hf)
33598 (mve_vcvttq_f16_f32v8hf, mve_veorq_f<mode>)
33599 (mve_vmlaldavxq_s<mode>, mve_vmlsldavq_s<mode>)
33600 (mve_vmlsldavxq_s<mode>, mve_vornq_f<mode>, mve_vorrq_f<mode>)
33601 (mve_vrmlaldavhxq_sv4si, mve_vcvtq_m_to_f_<supf><mode>)
33602 (mve_vshlcq_<supf><mode>, mve_vmvnq_m_<supf><mode>)
33603 (mve_vpselq_<supf><mode>, mve_vcvtbq_m_f16_f32v8hf)
33604 (mve_vcvtbq_m_f32_f16v4sf, mve_vcvttq_m_f16_f32v8hf)
33605 (mve_vcvttq_m_f32_f16v4sf, mve_vmlaldavq_p_<supf><mode>)
33606 (mve_vmlsldavaq_s<mode>, mve_vmlsldavaxq_s<mode>)
33607 (mve_vmlsldavq_p_s<mode>, mve_vmlsldavxq_p_s<mode>)
33608 (mve_vmvnq_m_n_<supf><mode>, mve_vorrq_m_n_<supf><mode>)
33609 (mve_vpselq_f<mode>, mve_vrev32q_m_fv8hf)
33610 (mve_vrev32q_m_<supf><mode>, mve_vrev64q_m_f<mode>)
33611 (mve_vrmlaldavhaxq_sv4si, mve_vrmlaldavhxq_p_sv4si)
33612 (mve_vrmlsldavhaxq_sv4si, mve_vrmlsldavhq_p_sv4si)
33613 (mve_vrmlsldavhxq_p_sv4si, mve_vrev16q_m_<supf>v16qi)
33614 (mve_vrmlaldavhq_p_<supf>v4si, mve_vrmlsldavhaq_sv4si)
33615 (mve_vandq_m_<supf><mode>, mve_vbicq_m_<supf><mode>)
33616 (mve_veorq_m_<supf><mode>, mve_vornq_m_<supf><mode>)
33617 (mve_vorrq_m_<supf><mode>, mve_vandq_m_f<mode>)
33618 (mve_vbicq_m_f<mode>, mve_veorq_m_f<mode>, mve_vornq_m_f<mode>)
33619 (mve_vorrq_m_f<mode>)
33620 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn)
33621 (mve_vstrdq_scatter_shifted_offset_<supf>v2di_insn)
33622 (mve_vstrdq_scatter_base_wb_p_<supf>v2di) : Fix spacing and
33623 capitalization in the emitted asm.
33625 2023-05-18 Andrea Corallo <andrea.corallo@arm.com>
33627 * config/arm/constraints.md (mve_vldrd_immediate): Move it to
33629 (Ri): Move constraint definition from predicates.md.
33630 (Rl): Define new constraint.
33631 * config/arm/mve.md (mve_vstrwq_scatter_base_wb_p_<supf>v4si): Add
33632 missing constraint.
33633 (mve_vstrwq_scatter_base_wb_p_fv4sf): Add missing Up constraint
33634 for op 1, use mve_vstrw_immediate predicate and Rl constraint for
33635 op 2. Fix asm output spacing.
33636 (mve_vstrdq_scatter_base_wb_p_<supf>v2di): Add missing constraint.
33637 * config/arm/predicates.md (Ri) Move constraint to constraints.md
33638 (mve_vldrd_immediate): Move it from
33640 (mve_vstrw_immediate): New predicate.
33642 2023-05-18 Pan Li <pan2.li@intel.com>
33643 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33644 Kito Cheng <kito.cheng@sifive.com>
33645 Richard Biener <rguenther@suse.de>
33646 Richard Sandiford <richard.sandiford@arm.com>
33648 * combine.cc (struct reg_stat_type): Extend machine_mode to 16 bits.
33649 * cse.cc (struct qty_table_elem): Extend machine_mode to 16 bits
33650 (struct table_elt): Extend machine_mode to 16 bits.
33651 (struct set): Ditto.
33652 * genmodes.cc (emit_mode_wider): Extend type from char to short.
33653 (emit_mode_complex): Ditto.
33654 (emit_mode_inner): Ditto.
33655 (emit_class_narrowest_mode): Ditto.
33656 * genopinit.cc (main): Extend the machine_mode limit.
33657 * ira-int.h (struct ira_allocno): Extend machine_mode to 16 bits and
33658 re-ordered the struct fields for padding.
33659 * machmode.h (MACHINE_MODE_BITSIZE): New macro.
33660 (GET_MODE_2XWIDER_MODE): Extend type from char to short.
33661 (get_mode_alignment): Extend type from char to short.
33662 * ree.cc (struct ext_modified): Extend machine_mode to 16 bits and
33663 removed the ATTRIBUTE_PACKED.
33664 * rtl-ssa/accesses.h: Extend machine_mode to 16 bits, narrow
33665 * rtl-ssa/internals.inl (rtl_ssa::access_info): Adjust the assignment.
33666 m_kind to 2 bits and remove m_spare.
33667 * rtl.h (RTX_CODE_BITSIZE): New macro.
33668 (struct rtx_def): Swap both the bit size and location between the
33669 rtx_code and the machine_mode.
33670 (subreg_shape::unique_id): Extend the machine_mode limit.
33671 * rtlanal.h: Extend machine_mode to 16 bits.
33672 * tree-core.h (struct tree_type_common): Extend machine_mode to 16
33673 bits and re-ordered the struct fields for padding.
33674 (struct tree_decl_common): Extend machine_mode to 16 bits.
33676 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
33678 * genrecog.cc (print_nonbool_test): Fix type error of
33679 switch (SUBREG_BYTE (op))'.
33681 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
33683 * common/config/riscv/riscv-common.cc: Remove
33684 trailing spaces on lines.
33685 * config/riscv/riscv.cc (riscv_legitimize_move): Likewise.
33686 * config/riscv/riscv.h (enum reg_class): Likewise.
33687 * config/riscv/riscv.md: Likewise.
33689 2023-05-17 John David Anglin <danglin@gcc.gnu.org>
33691 * config/pa/pa.md (clear_cache): New.
33693 2023-05-17 Arsen Arsenović <arsen@aarsen.me>
33695 * doc/extend.texi (C++ Concepts) <forall>: Remove extraneous
33696 parenthesis. Fix misnamed index entry.
33697 <concept>: Fix misnamed index entry.
33699 2023-05-17 Jivan Hakobyan <jivanhakobyan9@gmail.com>
33701 * config/riscv/riscv.md (*<optab><GPR:mode>3_mask): New pattern,
33703 (*<optab>si3_mask, *<optab>di3_mask): Here.
33704 (*<optab>si3_mask_1, *<optab>di3_mask_1): And here.
33705 * config/riscv/bitmanip.md (*<bitmanip_optab><GPR:mode>3_mask): New
33707 (*<bitmanip_optab>si3_sext_mask): Likewise.
33708 * config/riscv/iterators.md (shiftm1): Use const_si_mask_operand
33709 and const_di_mask_operand.
33710 (bitmanip_rotate): New iterator.
33711 (bitmanip_optab): Add rotates.
33712 * config/riscv/predicates.md (const_si_mask_operand): Renamed
33713 from const31_operand. Generalize to handle more mask constants.
33714 (const_di_mask_operand): Similarly.
33716 2023-05-17 Jakub Jelinek <jakub@redhat.com>
33719 * config/i386/i386-builtin-types.def (FLOAT128): Use
33720 float128t_type_node rather than float128_type_node.
33722 2023-05-17 Alexander Monakov <amonakov@ispras.ru>
33724 * tree-ssa-math-opts.cc (convert_mult_to_fma): Enable only for
33725 FP_CONTRACT_FAST (no functional change).
33727 2023-05-17 Uros Bizjak <ubizjak@gmail.com>
33729 * config/i386/i386.cc (ix86_multiplication_cost): Correct
33730 calcuation of integer vector mode costs to reflect generated
33731 instruction sequences of different integer vector modes and
33732 different target ABIs.
33734 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
33736 * config/riscv/riscv-opts.h (enum riscv_entity): New enum.
33737 * config/riscv/riscv.cc (riscv_emit_mode_set): New function.
33738 (riscv_mode_needed): Ditto.
33739 (riscv_mode_after): Ditto.
33740 (riscv_mode_entry): Ditto.
33741 (riscv_mode_exit): Ditto.
33742 (riscv_mode_priority): Ditto.
33743 (TARGET_MODE_EMIT): New target hook.
33744 (TARGET_MODE_NEEDED): Ditto.
33745 (TARGET_MODE_AFTER): Ditto.
33746 (TARGET_MODE_ENTRY): Ditto.
33747 (TARGET_MODE_EXIT): Ditto.
33748 (TARGET_MODE_PRIORITY): Ditto.
33749 * config/riscv/riscv.h (OPTIMIZE_MODE_SWITCHING): Ditto.
33750 (NUM_MODES_FOR_MODE_SWITCHING): Ditto.
33751 * config/riscv/riscv.md: Add csrwvxrm.
33752 * config/riscv/vector.md (rnu,rne,rdn,rod,none): New attribute.
33753 (vxrmsi): New pattern.
33755 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
33757 * config/riscv/riscv-vector-builtins-bases.cc: Introduce rounding mode.
33758 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
33759 (struct narrow_alu_def): Ditto.
33760 * config/riscv/riscv-vector-builtins.cc (function_builder::apply_predication): Ditto.
33761 (function_expander::use_exact_insn): Ditto.
33762 * config/riscv/riscv-vector-builtins.h (function_checker::arg_num): New function.
33763 (function_base::has_rounding_mode_operand_p): New function.
33765 2023-05-17 Andrew Pinski <apinski@marvell.com>
33767 * tree-ssa-forwprop.cc (simplify_builtin_call): Check
33768 against 0 instead of calling integer_zerop.
33770 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
33772 * config/riscv/riscv-vector-builtins.cc (register_vxrm): New function.
33773 (DEF_RVV_VXRM_ENUM): New macro.
33774 (handle_pragma_vector): Add vxrm enum register.
33775 * config/riscv/riscv-vector-builtins.def (DEF_RVV_VXRM_ENUM): New macro.
33781 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
33783 * value-range.h (Value_Range::operator=): New.
33785 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
33787 * value-range.cc (vrange::operator=): Add a stub to copy
33788 unsupported ranges.
33789 * value-range.h (is_a <unsupported_range>): New.
33790 (Value_Range::operator=): Support copying unsupported ranges.
33792 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
33794 * data-streamer-in.cc (streamer_read_real_value): New.
33795 (streamer_read_value_range): New.
33796 * data-streamer-out.cc (streamer_write_real_value): New.
33797 (streamer_write_vrange): New.
33798 * data-streamer.h (streamer_write_vrange): New.
33799 (streamer_read_value_range): New.
33801 2023-05-17 Jonathan Wakely <jwakely@redhat.com>
33804 * doc/invoke.texi (Code Gen Options): Note that -fshort-enums
33805 is ignored for a fixed underlying type.
33806 (C++ Dialect Options): Likewise for -fstrict-enums.
33808 2023-05-17 Tobias Burnus <tobias@codesourcery.com>
33810 * gimplify.cc (gimplify_scan_omp_clauses): Remove Fortran
33813 2023-05-17 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
33815 * config/s390/s390.cc (TARGET_ATOMIC_ALIGN_FOR_MODE):
33817 (s390_atomic_align_for_mode): New.
33819 2023-05-17 Jakub Jelinek <jakub@redhat.com>
33821 * wide-int.cc (wi::from_array): Add missing closing paren in function
33824 2023-05-17 Kewen Lin <linkw@linux.ibm.com>
33826 * tree-vect-loop.cc (vect_analyze_loop_1): Don't retry analysis with
33827 suggested unroll factor once the previous analysis fails.
33829 2023-05-17 Pan Li <pan2.li@intel.com>
33831 * config/riscv/genrvv-type-indexer.cc (BOOL_SIZE_LIST): New
33833 (main): Add bool1 to the type indexer.
33834 * config/riscv/riscv-vector-builtins-functions.def
33835 (vreinterpret): Register vbool1 interpret function.
33836 * config/riscv/riscv-vector-builtins-types.def
33837 (DEF_RVV_BOOL1_INTERPRET_OPS): New macro.
33838 (vint8m1_t): Add the type to bool1_interpret_ops.
33839 (vint16m1_t): Ditto.
33840 (vint32m1_t): Ditto.
33841 (vint64m1_t): Ditto.
33842 (vuint8m1_t): Ditto.
33843 (vuint16m1_t): Ditto.
33844 (vuint32m1_t): Ditto.
33845 (vuint64m1_t): Ditto.
33846 * config/riscv/riscv-vector-builtins.cc
33847 (DEF_RVV_BOOL1_INTERPRET_OPS): New macro.
33848 (required_extensions_p): Add bool1 interpret case.
33849 * config/riscv/riscv-vector-builtins.def
33850 (bool1_interpret): Add bool1 interpret to base type.
33851 * config/riscv/vector.md (@vreinterpret<mode>): Add new expand
33852 with VB dest for vreinterpret.
33854 2023-05-17 Jiufu Guo <guojiufu@linux.ibm.com>
33857 * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Support building
33858 constants through "lis; xoris".
33860 2023-05-16 Ajit Kumar Agarwal <aagarwa1@linux.ibm.com>
33862 * common/config/rs6000/rs6000-common.cc: Add REE pass as a
33863 default rs6000 target pass for O2 and above.
33864 * doc/invoke.texi: Document -free
33866 2023-05-16 Kito Cheng <kito.cheng@sifive.com>
33868 * common/config/riscv/riscv-common.cc (riscv_compute_multilib):
33869 Fix wrong select_kind...
33871 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
33873 * config/s390/s390-protos.h (s390_expand_setmem): Change
33874 function signature.
33875 * config/s390/s390.cc (s390_expand_setmem): For memset's less
33876 than or equal to 256 byte do not perform a libc call.
33877 * config/s390/s390.md: Change expander into a version which
33880 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
33882 * config/s390/s390-protos.h (s390_expand_movmem): New.
33883 * config/s390/s390.cc (s390_expand_movmem): New.
33884 * config/s390/s390.md (movmem<mode>): New.
33888 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
33890 * config/s390/s390-protos.h (s390_expand_cpymem): Change
33891 function signature.
33892 * config/s390/s390.cc (s390_expand_cpymem): For memcpy's less
33893 than or equal to 256 byte do not perform a libc call.
33894 (s390_expand_insv): Adapt new function signature of
33895 s390_expand_cpymem.
33896 * config/s390/s390.md: Change expander into a version which
33899 2023-05-16 Andrew Pinski <apinski@marvell.com>
33901 PR tree-optimization/109424
33902 * match.pd: Add patterns for min/max of zero_one_valued
33905 2023-05-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
33907 * config/riscv/riscv-protos.h (enum frm_field_enum): New enum.
33908 * config/riscv/riscv-vector-builtins.cc
33909 (function_expander::use_ternop_insn): Add default rounding mode.
33910 (function_expander::use_widen_ternop_insn): Ditto.
33911 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Add FRM REGNUM.
33912 (riscv_hard_regno_mode_ok): Ditto.
33913 (riscv_conditional_register_usage): Ditto.
33914 * config/riscv/riscv.h (DWARF_FRAME_REGNUM): Ditto.
33915 (FRM_REG_P): Ditto.
33916 (RISCV_DWARF_FRM): Ditto.
33917 * config/riscv/riscv.md: Ditto.
33918 * config/riscv/vector-iterators.md: split no frm and has frm operations.
33919 * config/riscv/vector.md (@pred_<optab><mode>_scalar): New pattern.
33920 (@pred_<optab><mode>): Ditto.
33922 2023-05-15 Aldy Hernandez <aldyh@redhat.com>
33924 PR tree-optimization/109695
33925 * value-range.cc (irange::operator=): Resize range.
33926 (irange::union_): Same.
33927 (irange::intersect): Same.
33928 (irange::invert): Same.
33929 (int_range_max): Default to 3 sub-ranges and resize as needed.
33930 * value-range.h (irange::maybe_resize): New.
33932 (int_range::int_range): Adjust for resizing.
33933 (int_range::operator=): Same.
33935 2023-05-15 Aldy Hernandez <aldyh@redhat.com>
33937 * ipa-cp.cc (ipcp_vr_lattice::meet_with_1): Avoid unnecessary
33939 * value-range.cc (irange::union_nonzero_bits): Return TRUE only
33940 when range changed.
33942 2023-05-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
33944 * config/riscv/riscv-protos.h (enum vxrm_field_enum): New enum.
33945 * config/riscv/riscv-vector-builtins.cc
33946 (function_expander::use_exact_insn): Add default rounding mode operand.
33947 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Add VXRM_REGNUM.
33948 (riscv_hard_regno_mode_ok): Ditto.
33949 (riscv_conditional_register_usage): Ditto.
33950 * config/riscv/riscv.h (DWARF_FRAME_REGNUM): Ditto.
33951 (VXRM_REG_P): Ditto.
33952 (RISCV_DWARF_VXRM): Ditto.
33953 * config/riscv/riscv.md: Ditto.
33954 * config/riscv/vector.md: Ditto
33956 2023-05-15 Pan Li <pan2.li@intel.com>
33958 * optabs.cc (maybe_gen_insn): Add case to generate instruction
33959 that has 11 operands.
33961 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
33963 * config/aarch64/aarch64.cc (aarch64_rtx_costs, NEG case): Add costing
33964 logic for vector modes.
33966 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
33969 * config/aarch64/aarch64-simd.md (aarch64_cm<optab><mode>): Rename to...
33970 (aarch64_cm<optab><mode><vczle><vczbe>): ... This.
33971 (aarch64_cmtst<mode>): Rename to...
33972 (aarch64_cmtst<mode><vczle><vczbe>): ... This.
33973 (*aarch64_cmtst_same_<mode>): Rename to...
33974 (*aarch64_cmtst_same_<mode><vczle><vczbe>): ... This.
33975 (*aarch64_cmtstdi): Rename to...
33976 (*aarch64_cmtstdi<vczle><vczbe>): ... This.
33977 (aarch64_fac<optab><mode>): Rename to...
33978 (aarch64_fac<optab><mode><vczle><vczbe>): ... This.
33980 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
33983 * config/aarch64/aarch64-simd.md (aarch64_s<optab><mode>): Rename to...
33984 (aarch64_s<optab><mode><vczle><vczbe>): ... This.
33986 2023-05-15 Pan Li <pan2.li@intel.com>
33987 Juzhe-Zhong <juzhe.zhong@rivai.ai>
33988 kito-cheng <kito.cheng@sifive.com>
33990 * config/riscv/riscv-v.cc (const_vlmax_p): New function for
33991 deciding the mode is constant or not.
33992 (set_len_and_policy): Optimize VLS-VLMAX code gen to vsetivli.
33994 2023-05-15 Richard Biener <rguenther@suse.de>
33996 PR tree-optimization/109848
33997 * tree-ssa-forwprop.cc (pass_forwprop::execute): Put the
33998 TARGET_MEM_REF address preparation before the store, not
34001 2023-05-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
34003 * config/riscv/riscv.cc
34004 (riscv_vectorize_preferred_vector_alignment): New function.
34005 (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): New target hook.
34007 2023-05-14 Andrew Pinski <apinski@marvell.com>
34009 PR tree-optimization/109829
34010 * match.pd: Add pattern for `signbit(x) !=/== 0 ? x : -x`.
34012 2023-05-14 Uros Bizjak <ubizjak@gmail.com>
34015 * config/i386/i386.cc: Revert the 2023-05-11 change.
34016 (ix86_widen_mult_cost): Return high value instead of
34017 ICEing for unsupported modes.
34019 2023-05-14 Ard Biesheuvel <ardb@kernel.org>
34021 * config/i386/i386.cc (x86_function_profiler): Take
34022 ix86_direct_extern_access into account when generating calls
34025 2023-05-14 Pan Li <pan2.li@intel.com>
34027 * config/riscv/riscv-vector-builtins.cc (required_extensions_p):
34028 Refactor the or pattern to switch cases.
34030 2023-05-13 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
34032 * config/aarch64/aarch64.cc (aarch64_expand_vector_init_fallback): Rename
34033 aarch64_expand_vector_init to this, and remove interleaving case.
34034 Recursively call aarch64_expand_vector_init_fallback, instead of
34035 aarch64_expand_vector_init.
34036 (aarch64_unzip_vector_init): New function.
34037 (aarch64_expand_vector_init): Likewise.
34039 2023-05-13 Kito Cheng <kito.cheng@sifive.com>
34041 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_insns):
34042 Pull out function call from the gcc_assert.
34044 2023-05-13 Kito Cheng <kito.cheng@sifive.com>
34046 * config/riscv/riscv-vsetvl.cc (vlmul_to_str): New.
34047 (policy_to_str): New.
34048 (vector_insn_info::dump): Use vlmul_to_str and policy_to_str.
34050 2023-05-13 Andrew Pinski <apinski@marvell.com>
34052 PR tree-optimization/109834
34053 * match.pd (popcount(bswap(x))->popcount(x)): Fix up unsigned type checking.
34054 (popcount(rotate(x,y))->popcount(x)): Likewise.
34056 2023-05-12 Uros Bizjak <ubizjak@gmail.com>
34058 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2): Also
34059 reject ymm instructions for TARGET_PREFER_AVX128. Use generic
34060 gen_extend_insn to generate zero/sign extension instructions.
34062 (ix86_expand_vecop_qihi): Initialize interleave functions
34063 for MULT code only. Fix comments.
34065 2023-05-12 Uros Bizjak <ubizjak@gmail.com>
34068 * config/i386/mmx.md (mulv2si3): Remove expander.
34069 (mulv2si3): Rename insn pattern from *mulv2si.
34071 2023-05-12 Tobias Burnus <tobias@codesourcery.com>
34073 PR libstdc++/109816
34074 * lto-cgraph.cc (output_symtab): Guard lto_output_toplevel_asms by
34075 '!lto_stream_offload_p'.
34077 2023-05-12 Kito Cheng <kito.cheng@sifive.com>
34078 Juzhe-Zhong <juzhe.zhong@rivai.ai>
34081 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::get_vsetvl_at_end): New.
34082 (local_avl_compatible_p): New.
34083 (pass_vsetvl::local_eliminate_vsetvl_insn): Enhance local optimizations
34084 for LCM, rewrite as a backward algorithm.
34085 (pass_vsetvl::cleanup_insns): Use new local_eliminate_vsetvl_insn
34086 interface, handle a BB at once.
34088 2023-05-12 Richard Biener <rguenther@suse.de>
34090 PR tree-optimization/64731
34091 * tree-ssa-forwprop.cc (pass_forwprop::execute): Also
34092 handle TARGET_MEM_REF destinations of stores from vector
34095 2023-05-12 Richard Biener <rguenther@suse.de>
34097 PR tree-optimization/109791
34098 * match.pd (minus (convert ADDR_EXPR@0) (convert (pointer_plus @1 @2))):
34100 (minus (convert (pointer_plus @1 @2)) (convert ADDR_EXPR@0)):
34103 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
34105 * config/arm/arm-mve-builtins-base.cc (vsriq): New.
34106 * config/arm/arm-mve-builtins-base.def (vsriq): New.
34107 * config/arm/arm-mve-builtins-base.h (vsriq): New.
34108 * config/arm/arm-mve-builtins.cc
34109 (function_instance::has_inactive_argument): Handle vsriq.
34110 * config/arm/arm_mve.h (vsriq): Remove.
34112 (vsriq_n_u8): Remove.
34113 (vsriq_n_s8): Remove.
34114 (vsriq_n_u16): Remove.
34115 (vsriq_n_s16): Remove.
34116 (vsriq_n_u32): Remove.
34117 (vsriq_n_s32): Remove.
34118 (vsriq_m_n_s8): Remove.
34119 (vsriq_m_n_u8): Remove.
34120 (vsriq_m_n_s16): Remove.
34121 (vsriq_m_n_u16): Remove.
34122 (vsriq_m_n_s32): Remove.
34123 (vsriq_m_n_u32): Remove.
34124 (__arm_vsriq_n_u8): Remove.
34125 (__arm_vsriq_n_s8): Remove.
34126 (__arm_vsriq_n_u16): Remove.
34127 (__arm_vsriq_n_s16): Remove.
34128 (__arm_vsriq_n_u32): Remove.
34129 (__arm_vsriq_n_s32): Remove.
34130 (__arm_vsriq_m_n_s8): Remove.
34131 (__arm_vsriq_m_n_u8): Remove.
34132 (__arm_vsriq_m_n_s16): Remove.
34133 (__arm_vsriq_m_n_u16): Remove.
34134 (__arm_vsriq_m_n_s32): Remove.
34135 (__arm_vsriq_m_n_u32): Remove.
34136 (__arm_vsriq): Remove.
34137 (__arm_vsriq_m): Remove.
34139 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
34141 * config/arm/iterators.md (mve_insn): Add vsri.
34142 * config/arm/mve.md (mve_vsriq_n_<supf><mode>): Rename into ...
34143 (@mve_<mve_insn>q_n_<supf><mode>): .,. this.
34144 (mve_vsriq_m_n_<supf><mode>): Rename into ...
34145 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
34147 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
34149 * config/arm/arm-mve-builtins-shapes.cc (ternary_rshift): New.
34150 * config/arm/arm-mve-builtins-shapes.h (ternary_rshift): New.
34152 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
34154 * config/arm/arm-mve-builtins-base.cc (vsliq): New.
34155 * config/arm/arm-mve-builtins-base.def (vsliq): New.
34156 * config/arm/arm-mve-builtins-base.h (vsliq): New.
34157 * config/arm/arm-mve-builtins.cc
34158 (function_instance::has_inactive_argument): Handle vsliq.
34159 * config/arm/arm_mve.h (vsliq): Remove.
34161 (vsliq_n_u8): Remove.
34162 (vsliq_n_s8): Remove.
34163 (vsliq_n_u16): Remove.
34164 (vsliq_n_s16): Remove.
34165 (vsliq_n_u32): Remove.
34166 (vsliq_n_s32): Remove.
34167 (vsliq_m_n_s8): Remove.
34168 (vsliq_m_n_s32): Remove.
34169 (vsliq_m_n_s16): Remove.
34170 (vsliq_m_n_u8): Remove.
34171 (vsliq_m_n_u32): Remove.
34172 (vsliq_m_n_u16): Remove.
34173 (__arm_vsliq_n_u8): Remove.
34174 (__arm_vsliq_n_s8): Remove.
34175 (__arm_vsliq_n_u16): Remove.
34176 (__arm_vsliq_n_s16): Remove.
34177 (__arm_vsliq_n_u32): Remove.
34178 (__arm_vsliq_n_s32): Remove.
34179 (__arm_vsliq_m_n_s8): Remove.
34180 (__arm_vsliq_m_n_s32): Remove.
34181 (__arm_vsliq_m_n_s16): Remove.
34182 (__arm_vsliq_m_n_u8): Remove.
34183 (__arm_vsliq_m_n_u32): Remove.
34184 (__arm_vsliq_m_n_u16): Remove.
34185 (__arm_vsliq): Remove.
34186 (__arm_vsliq_m): Remove.
34188 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
34190 * config/arm/iterators.md (mve_insn>): Add vsli.
34191 * config/arm/mve.md (mve_vsliq_n_<supf><mode>): Rename into ...
34192 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
34193 (mve_vsliq_m_n_<supf><mode>): Rename into ...
34194 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
34196 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
34198 * config/arm/arm-mve-builtins-shapes.cc (ternary_lshift): New.
34199 * config/arm/arm-mve-builtins-shapes.h (ternary_lshift): New.
34201 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
34203 * config/arm/arm-mve-builtins-base.cc (vpselq): New.
34204 * config/arm/arm-mve-builtins-base.def (vpselq): New.
34205 * config/arm/arm-mve-builtins-base.h (vpselq): New.
34206 * config/arm/arm_mve.h (vpselq): Remove.
34207 (vpselq_u8): Remove.
34208 (vpselq_s8): Remove.
34209 (vpselq_u16): Remove.
34210 (vpselq_s16): Remove.
34211 (vpselq_u32): Remove.
34212 (vpselq_s32): Remove.
34213 (vpselq_u64): Remove.
34214 (vpselq_s64): Remove.
34215 (vpselq_f16): Remove.
34216 (vpselq_f32): Remove.
34217 (__arm_vpselq_u8): Remove.
34218 (__arm_vpselq_s8): Remove.
34219 (__arm_vpselq_u16): Remove.
34220 (__arm_vpselq_s16): Remove.
34221 (__arm_vpselq_u32): Remove.
34222 (__arm_vpselq_s32): Remove.
34223 (__arm_vpselq_u64): Remove.
34224 (__arm_vpselq_s64): Remove.
34225 (__arm_vpselq_f16): Remove.
34226 (__arm_vpselq_f32): Remove.
34227 (__arm_vpselq): Remove.
34229 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
34231 * config/arm/arm-mve-builtins-shapes.cc (vpsel): New.
34232 * config/arm/arm-mve-builtins-shapes.h (vpsel): New.
34234 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
34236 * config/arm/arm.cc (arm_expand_vcond): Use gen_mve_q instead of
34238 * config/arm/iterators.md (MVE_VPSELQ_F): New.
34239 (mve_insn): Add vpsel.
34240 * config/arm/mve.md (@mve_vpselq_<supf><mode>): Rename into ...
34241 (@mve_<mve_insn>q_<supf><mode>): ... this.
34242 (@mve_vpselq_f<mode>): Rename into ...
34243 (@mve_<mve_insn>q_f<mode>): ... this.
34245 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
34247 * config/arm/arm-mve-builtins-base.cc (vfmaq, vfmasq, vfmsq): New.
34248 * config/arm/arm-mve-builtins-base.def (vfmaq, vfmasq, vfmsq): New.
34249 * config/arm/arm-mve-builtins-base.h (vfmaq, vfmasq, vfmsq): New.
34250 * config/arm/arm-mve-builtins.cc
34251 (function_instance::has_inactive_argument): Handle vfmaq, vfmasq,
34253 * config/arm/arm_mve.h (vfmaq): Remove.
34257 (vfmasq_m): Remove.
34259 (vfmaq_f16): Remove.
34260 (vfmaq_n_f16): Remove.
34261 (vfmasq_n_f16): Remove.
34262 (vfmsq_f16): Remove.
34263 (vfmaq_f32): Remove.
34264 (vfmaq_n_f32): Remove.
34265 (vfmasq_n_f32): Remove.
34266 (vfmsq_f32): Remove.
34267 (vfmaq_m_f32): Remove.
34268 (vfmaq_m_f16): Remove.
34269 (vfmaq_m_n_f32): Remove.
34270 (vfmaq_m_n_f16): Remove.
34271 (vfmasq_m_n_f32): Remove.
34272 (vfmasq_m_n_f16): Remove.
34273 (vfmsq_m_f32): Remove.
34274 (vfmsq_m_f16): Remove.
34275 (__arm_vfmaq_f16): Remove.
34276 (__arm_vfmaq_n_f16): Remove.
34277 (__arm_vfmasq_n_f16): Remove.
34278 (__arm_vfmsq_f16): Remove.
34279 (__arm_vfmaq_f32): Remove.
34280 (__arm_vfmaq_n_f32): Remove.
34281 (__arm_vfmasq_n_f32): Remove.
34282 (__arm_vfmsq_f32): Remove.
34283 (__arm_vfmaq_m_f32): Remove.
34284 (__arm_vfmaq_m_f16): Remove.
34285 (__arm_vfmaq_m_n_f32): Remove.
34286 (__arm_vfmaq_m_n_f16): Remove.
34287 (__arm_vfmasq_m_n_f32): Remove.
34288 (__arm_vfmasq_m_n_f16): Remove.
34289 (__arm_vfmsq_m_f32): Remove.
34290 (__arm_vfmsq_m_f16): Remove.
34291 (__arm_vfmaq): Remove.
34292 (__arm_vfmasq): Remove.
34293 (__arm_vfmsq): Remove.
34294 (__arm_vfmaq_m): Remove.
34295 (__arm_vfmasq_m): Remove.
34296 (__arm_vfmsq_m): Remove.
34298 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
34300 * config/arm/iterators.md (MVE_FP_M_BINARY): Add VFMAQ_M_F,
34302 (MVE_FP_M_N_BINARY): Add VFMAQ_M_N_F, VFMASQ_M_N_F.
34303 (MVE_VFMxQ_F, MVE_VFMAxQ_N_F): New.
34304 (mve_insn): Add vfma, vfmas, vfms.
34305 * config/arm/mve.md (mve_vfmaq_f<mode>, mve_vfmsq_f<mode>): Merge
34307 (@mve_<mve_insn>q_f<mode>): ... this.
34308 (mve_vfmaq_n_f<mode>, mve_vfmasq_n_f<mode>): Merge into ...
34309 (@mve_<mve_insn>q_n_f<mode>): ... this.
34310 (mve_vfmaq_m_f<mode>, mve_vfmsq_m_f<mode>): Merge into
34311 @mve_<mve_insn>q_m_f<mode>.
34312 (mve_vfmaq_m_n_f<mode>, mve_vfmasq_m_n_f<mode>): Merge into
34313 @mve_<mve_insn>q_m_n_f<mode>.
34315 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
34317 * config/arm/arm-mve-builtins-shapes.cc (ternary_opt_n): New.
34318 * config/arm/arm-mve-builtins-shapes.h (ternary_opt_n): New.
34320 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
34322 * config/arm/arm-mve-builtins-base.cc
34323 (FUNCTION_WITH_RTX_M_N_NO_F): New.
34325 * config/arm/arm-mve-builtins-base.def (vmvnq): New.
34326 * config/arm/arm-mve-builtins-base.h (vmvnq): New.
34327 * config/arm/arm_mve.h (vmvnq): Remove.
34330 (vmvnq_s8): Remove.
34331 (vmvnq_s16): Remove.
34332 (vmvnq_s32): Remove.
34333 (vmvnq_n_s16): Remove.
34334 (vmvnq_n_s32): Remove.
34335 (vmvnq_u8): Remove.
34336 (vmvnq_u16): Remove.
34337 (vmvnq_u32): Remove.
34338 (vmvnq_n_u16): Remove.
34339 (vmvnq_n_u32): Remove.
34340 (vmvnq_m_u8): Remove.
34341 (vmvnq_m_s8): Remove.
34342 (vmvnq_m_u16): Remove.
34343 (vmvnq_m_s16): Remove.
34344 (vmvnq_m_u32): Remove.
34345 (vmvnq_m_s32): Remove.
34346 (vmvnq_m_n_s16): Remove.
34347 (vmvnq_m_n_u16): Remove.
34348 (vmvnq_m_n_s32): Remove.
34349 (vmvnq_m_n_u32): Remove.
34350 (vmvnq_x_s8): Remove.
34351 (vmvnq_x_s16): Remove.
34352 (vmvnq_x_s32): Remove.
34353 (vmvnq_x_u8): Remove.
34354 (vmvnq_x_u16): Remove.
34355 (vmvnq_x_u32): Remove.
34356 (vmvnq_x_n_s16): Remove.
34357 (vmvnq_x_n_s32): Remove.
34358 (vmvnq_x_n_u16): Remove.
34359 (vmvnq_x_n_u32): Remove.
34360 (__arm_vmvnq_s8): Remove.
34361 (__arm_vmvnq_s16): Remove.
34362 (__arm_vmvnq_s32): Remove.
34363 (__arm_vmvnq_n_s16): Remove.
34364 (__arm_vmvnq_n_s32): Remove.
34365 (__arm_vmvnq_u8): Remove.
34366 (__arm_vmvnq_u16): Remove.
34367 (__arm_vmvnq_u32): Remove.
34368 (__arm_vmvnq_n_u16): Remove.
34369 (__arm_vmvnq_n_u32): Remove.
34370 (__arm_vmvnq_m_u8): Remove.
34371 (__arm_vmvnq_m_s8): Remove.
34372 (__arm_vmvnq_m_u16): Remove.
34373 (__arm_vmvnq_m_s16): Remove.
34374 (__arm_vmvnq_m_u32): Remove.
34375 (__arm_vmvnq_m_s32): Remove.
34376 (__arm_vmvnq_m_n_s16): Remove.
34377 (__arm_vmvnq_m_n_u16): Remove.
34378 (__arm_vmvnq_m_n_s32): Remove.
34379 (__arm_vmvnq_m_n_u32): Remove.
34380 (__arm_vmvnq_x_s8): Remove.
34381 (__arm_vmvnq_x_s16): Remove.
34382 (__arm_vmvnq_x_s32): Remove.
34383 (__arm_vmvnq_x_u8): Remove.
34384 (__arm_vmvnq_x_u16): Remove.
34385 (__arm_vmvnq_x_u32): Remove.
34386 (__arm_vmvnq_x_n_s16): Remove.
34387 (__arm_vmvnq_x_n_s32): Remove.
34388 (__arm_vmvnq_x_n_u16): Remove.
34389 (__arm_vmvnq_x_n_u32): Remove.
34390 (__arm_vmvnq): Remove.
34391 (__arm_vmvnq_m): Remove.
34392 (__arm_vmvnq_x): Remove.
34394 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
34396 * config/arm/iterators.md (mve_insn): Add vmvn.
34397 * config/arm/mve.md (mve_vmvnq_n_<supf><mode>): Rename into ...
34398 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
34399 (mve_vmvnq_m_<supf><mode>): Rename into ...
34400 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
34401 (mve_vmvnq_m_n_<supf><mode>): Rename into ...
34402 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
34404 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
34406 * config/arm/arm-mve-builtins-shapes.cc (mvn): New.
34407 * config/arm/arm-mve-builtins-shapes.h (mvn): New.
34409 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
34411 * config/arm/arm-mve-builtins-base.cc (vbrsrq): New.
34412 * config/arm/arm-mve-builtins-base.def (vbrsrq): New.
34413 * config/arm/arm-mve-builtins-base.h (vbrsrq): New.
34414 * config/arm/arm_mve.h (vbrsrq): Remove.
34415 (vbrsrq_m): Remove.
34416 (vbrsrq_x): Remove.
34417 (vbrsrq_n_f16): Remove.
34418 (vbrsrq_n_f32): Remove.
34419 (vbrsrq_n_u8): Remove.
34420 (vbrsrq_n_s8): Remove.
34421 (vbrsrq_n_u16): Remove.
34422 (vbrsrq_n_s16): Remove.
34423 (vbrsrq_n_u32): Remove.
34424 (vbrsrq_n_s32): Remove.
34425 (vbrsrq_m_n_s8): Remove.
34426 (vbrsrq_m_n_s32): Remove.
34427 (vbrsrq_m_n_s16): Remove.
34428 (vbrsrq_m_n_u8): Remove.
34429 (vbrsrq_m_n_u32): Remove.
34430 (vbrsrq_m_n_u16): Remove.
34431 (vbrsrq_m_n_f32): Remove.
34432 (vbrsrq_m_n_f16): Remove.
34433 (vbrsrq_x_n_s8): Remove.
34434 (vbrsrq_x_n_s16): Remove.
34435 (vbrsrq_x_n_s32): Remove.
34436 (vbrsrq_x_n_u8): Remove.
34437 (vbrsrq_x_n_u16): Remove.
34438 (vbrsrq_x_n_u32): Remove.
34439 (vbrsrq_x_n_f16): Remove.
34440 (vbrsrq_x_n_f32): Remove.
34441 (__arm_vbrsrq_n_u8): Remove.
34442 (__arm_vbrsrq_n_s8): Remove.
34443 (__arm_vbrsrq_n_u16): Remove.
34444 (__arm_vbrsrq_n_s16): Remove.
34445 (__arm_vbrsrq_n_u32): Remove.
34446 (__arm_vbrsrq_n_s32): Remove.
34447 (__arm_vbrsrq_m_n_s8): Remove.
34448 (__arm_vbrsrq_m_n_s32): Remove.
34449 (__arm_vbrsrq_m_n_s16): Remove.
34450 (__arm_vbrsrq_m_n_u8): Remove.
34451 (__arm_vbrsrq_m_n_u32): Remove.
34452 (__arm_vbrsrq_m_n_u16): Remove.
34453 (__arm_vbrsrq_x_n_s8): Remove.
34454 (__arm_vbrsrq_x_n_s16): Remove.
34455 (__arm_vbrsrq_x_n_s32): Remove.
34456 (__arm_vbrsrq_x_n_u8): Remove.
34457 (__arm_vbrsrq_x_n_u16): Remove.
34458 (__arm_vbrsrq_x_n_u32): Remove.
34459 (__arm_vbrsrq_n_f16): Remove.
34460 (__arm_vbrsrq_n_f32): Remove.
34461 (__arm_vbrsrq_m_n_f32): Remove.
34462 (__arm_vbrsrq_m_n_f16): Remove.
34463 (__arm_vbrsrq_x_n_f16): Remove.
34464 (__arm_vbrsrq_x_n_f32): Remove.
34465 (__arm_vbrsrq): Remove.
34466 (__arm_vbrsrq_m): Remove.
34467 (__arm_vbrsrq_x): Remove.
34469 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
34471 * config/arm/iterators.md (MVE_VBRSR_M_N_FP, MVE_VBRSR_N_FP): New.
34472 (mve_insn): Add vbrsr.
34473 * config/arm/mve.md (mve_vbrsrq_n_f<mode>): Rename into ...
34474 (@mve_<mve_insn>q_n_f<mode>): ... this.
34475 (mve_vbrsrq_n_<supf><mode>): Rename into ...
34476 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
34477 (mve_vbrsrq_m_n_<supf><mode>): Rename into ...
34478 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
34479 (mve_vbrsrq_m_n_f<mode>): Rename into ...
34480 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
34482 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
34484 * config/arm/arm-mve-builtins-shapes.cc (binary_imm32): New.
34485 * config/arm/arm-mve-builtins-shapes.h (binary_imm32): New.
34487 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
34489 * config/arm/arm-mve-builtins-base.cc (vqshluq): New.
34490 * config/arm/arm-mve-builtins-base.def (vqshluq): New.
34491 * config/arm/arm-mve-builtins-base.h (vqshluq): New.
34492 * config/arm/arm_mve.h (vqshluq): Remove.
34493 (vqshluq_m): Remove.
34494 (vqshluq_n_s8): Remove.
34495 (vqshluq_n_s16): Remove.
34496 (vqshluq_n_s32): Remove.
34497 (vqshluq_m_n_s8): Remove.
34498 (vqshluq_m_n_s16): Remove.
34499 (vqshluq_m_n_s32): Remove.
34500 (__arm_vqshluq_n_s8): Remove.
34501 (__arm_vqshluq_n_s16): Remove.
34502 (__arm_vqshluq_n_s32): Remove.
34503 (__arm_vqshluq_m_n_s8): Remove.
34504 (__arm_vqshluq_m_n_s16): Remove.
34505 (__arm_vqshluq_m_n_s32): Remove.
34506 (__arm_vqshluq): Remove.
34507 (__arm_vqshluq_m): Remove.
34509 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
34511 * config/arm/iterators.md (mve_insn): Add vqshlu.
34512 (supf): Add VQSHLUQ_M_N_S, VQSHLUQ_N_S.
34513 (VQSHLUQ_M_N, VQSHLUQ_N): New.
34514 * config/arm/mve.md (mve_vqshluq_n_s<mode>): Change name into ...
34515 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
34516 (mve_vqshluq_m_n_s<mode>): Change name into ...
34517 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
34519 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
34521 * config/arm/arm-mve-builtins-shapes.cc
34522 (binary_lshift_unsigned): New.
34523 * config/arm/arm-mve-builtins-shapes.h
34524 (binary_lshift_unsigned): New.
34526 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
34528 * config/arm/arm-mve-builtins-base.cc (vrmlaldavhaq)
34529 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
34530 * config/arm/arm-mve-builtins-base.def (vrmlaldavhaq)
34531 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
34532 * config/arm/arm-mve-builtins-base.h (vrmlaldavhaq)
34533 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
34534 * config/arm/arm-mve-builtins-functions.h: Handle vrmlaldavhaq,
34535 vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq.
34536 * config/arm/arm_mve.h (vrmlaldavhaq): Remove.
34537 (vrmlaldavhaxq): Remove.
34538 (vrmlsldavhaq): Remove.
34539 (vrmlsldavhaxq): Remove.
34540 (vrmlaldavhaq_p): Remove.
34541 (vrmlaldavhaxq_p): Remove.
34542 (vrmlsldavhaq_p): Remove.
34543 (vrmlsldavhaxq_p): Remove.
34544 (vrmlaldavhaq_s32): Remove.
34545 (vrmlaldavhaq_u32): Remove.
34546 (vrmlaldavhaxq_s32): Remove.
34547 (vrmlsldavhaq_s32): Remove.
34548 (vrmlsldavhaxq_s32): Remove.
34549 (vrmlaldavhaq_p_s32): Remove.
34550 (vrmlaldavhaq_p_u32): Remove.
34551 (vrmlaldavhaxq_p_s32): Remove.
34552 (vrmlsldavhaq_p_s32): Remove.
34553 (vrmlsldavhaxq_p_s32): Remove.
34554 (__arm_vrmlaldavhaq_s32): Remove.
34555 (__arm_vrmlaldavhaq_u32): Remove.
34556 (__arm_vrmlaldavhaxq_s32): Remove.
34557 (__arm_vrmlsldavhaq_s32): Remove.
34558 (__arm_vrmlsldavhaxq_s32): Remove.
34559 (__arm_vrmlaldavhaq_p_s32): Remove.
34560 (__arm_vrmlaldavhaq_p_u32): Remove.
34561 (__arm_vrmlaldavhaxq_p_s32): Remove.
34562 (__arm_vrmlsldavhaq_p_s32): Remove.
34563 (__arm_vrmlsldavhaxq_p_s32): Remove.
34564 (__arm_vrmlaldavhaq): Remove.
34565 (__arm_vrmlaldavhaxq): Remove.
34566 (__arm_vrmlsldavhaq): Remove.
34567 (__arm_vrmlsldavhaxq): Remove.
34568 (__arm_vrmlaldavhaq_p): Remove.
34569 (__arm_vrmlaldavhaxq_p): Remove.
34570 (__arm_vrmlsldavhaq_p): Remove.
34571 (__arm_vrmlsldavhaxq_p): Remove.
34573 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
34575 * config/arm/iterators.md (MVE_VRMLxLDAVHAxQ)
34576 (MVE_VRMLxLDAVHAxQ_P): New.
34577 (mve_insn): Add vrmlaldavha, vrmlaldavhax, vrmlsldavha,
34579 (supf): Add VRMLALDAVHAXQ_P_S, VRMLALDAVHAXQ_S, VRMLSLDAVHAQ_P_S,
34580 VRMLSLDAVHAQ_S, VRMLSLDAVHAXQ_P_S, VRMLSLDAVHAXQ_S,
34582 * config/arm/mve.md (mve_vrmlaldavhaq_<supf>v4si)
34583 (mve_vrmlaldavhaxq_sv4si, mve_vrmlsldavhaxq_sv4si)
34584 (mve_vrmlsldavhaq_sv4si): Merge into ...
34585 (@mve_<mve_insn>q_<supf>v4si): ... this.
34586 (mve_vrmlaldavhaq_p_sv4si, mve_vrmlaldavhaq_p_uv4si)
34587 (mve_vrmlaldavhaxq_p_sv4si, mve_vrmlsldavhaq_p_sv4si)
34588 (mve_vrmlsldavhaxq_p_sv4si): Merge into ...
34589 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
34591 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
34593 * config/arm/arm-mve-builtins-base.cc (vqdmullbq, vqdmulltq): New.
34594 * config/arm/arm-mve-builtins-base.def (vqdmullbq, vqdmulltq):
34596 * config/arm/arm-mve-builtins-base.h (vqdmullbq, vqdmulltq): New.
34597 * config/arm/arm_mve.h (vqdmulltq): Remove.
34598 (vqdmullbq): Remove.
34599 (vqdmullbq_m): Remove.
34600 (vqdmulltq_m): Remove.
34601 (vqdmulltq_s16): Remove.
34602 (vqdmulltq_n_s16): Remove.
34603 (vqdmullbq_s16): Remove.
34604 (vqdmullbq_n_s16): Remove.
34605 (vqdmulltq_s32): Remove.
34606 (vqdmulltq_n_s32): Remove.
34607 (vqdmullbq_s32): Remove.
34608 (vqdmullbq_n_s32): Remove.
34609 (vqdmullbq_m_n_s32): Remove.
34610 (vqdmullbq_m_n_s16): Remove.
34611 (vqdmullbq_m_s32): Remove.
34612 (vqdmullbq_m_s16): Remove.
34613 (vqdmulltq_m_n_s32): Remove.
34614 (vqdmulltq_m_n_s16): Remove.
34615 (vqdmulltq_m_s32): Remove.
34616 (vqdmulltq_m_s16): Remove.
34617 (__arm_vqdmulltq_s16): Remove.
34618 (__arm_vqdmulltq_n_s16): Remove.
34619 (__arm_vqdmullbq_s16): Remove.
34620 (__arm_vqdmullbq_n_s16): Remove.
34621 (__arm_vqdmulltq_s32): Remove.
34622 (__arm_vqdmulltq_n_s32): Remove.
34623 (__arm_vqdmullbq_s32): Remove.
34624 (__arm_vqdmullbq_n_s32): Remove.
34625 (__arm_vqdmullbq_m_n_s32): Remove.
34626 (__arm_vqdmullbq_m_n_s16): Remove.
34627 (__arm_vqdmullbq_m_s32): Remove.
34628 (__arm_vqdmullbq_m_s16): Remove.
34629 (__arm_vqdmulltq_m_n_s32): Remove.
34630 (__arm_vqdmulltq_m_n_s16): Remove.
34631 (__arm_vqdmulltq_m_s32): Remove.
34632 (__arm_vqdmulltq_m_s16): Remove.
34633 (__arm_vqdmulltq): Remove.
34634 (__arm_vqdmullbq): Remove.
34635 (__arm_vqdmullbq_m): Remove.
34636 (__arm_vqdmulltq_m): Remove.
34638 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
34640 * config/arm/iterators.md (MVE_VQDMULLxQ, MVE_VQDMULLxQ_M)
34641 (MVE_VQDMULLxQ_M_N, MVE_VQDMULLxQ_N): New.
34642 (mve_insn): Add vqdmullb, vqdmullt.
34643 (supf): Add VQDMULLBQ_S, VQDMULLBQ_M_S, VQDMULLBQ_M_N_S,
34644 VQDMULLBQ_N_S, VQDMULLTQ_S, VQDMULLTQ_M_S, VQDMULLTQ_M_N_S,
34646 * config/arm/mve.md (mve_vqdmullbq_n_s<mode>)
34647 (mve_vqdmulltq_n_s<mode>): Merge into ...
34648 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
34649 (mve_vqdmullbq_s<mode>, mve_vqdmulltq_s<mode>): Merge into ...
34650 (@mve_<mve_insn>q_<supf><mode>): ... this.
34651 (mve_vqdmullbq_m_n_s<mode>, mve_vqdmulltq_m_n_s<mode>): Merge into
34653 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
34654 (mve_vqdmullbq_m_s<mode>, mve_vqdmulltq_m_s<mode>): Merge into ...
34655 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
34657 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
34659 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_opt_n): New.
34660 * config/arm/arm-mve-builtins-shapes.h (binary_widen_opt_n): New.
34662 2023-05-12 Kito Cheng <kito.cheng@sifive.com>
34664 * common/config/riscv/riscv-common.cc (riscv_select_multilib_by_abi):
34665 Drop unused parameter.
34666 (riscv_select_multilib): Ditto.
34667 (riscv_compute_multilib): Update call site of
34668 riscv_select_multilib_by_abi and riscv_select_multilib_by_abi.
34670 2023-05-12 Juzhe Zhong <juzhe.zhong@rivai.ai>
34672 * config/riscv/autovec.md (vec_init<mode><vel>): New pattern.
34673 * config/riscv/riscv-protos.h (expand_vec_init): New function.
34674 * config/riscv/riscv-v.cc (class rvv_builder): New class.
34675 (rvv_builder::can_duplicate_repeating_sequence_p): New function.
34676 (rvv_builder::get_merged_repeating_sequence): Ditto.
34677 (expand_vector_init_insert_elems): Ditto.
34678 (expand_vec_init): Ditto.
34679 * config/riscv/vector-iterators.md: New attribute.
34681 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
34683 * config/rs6000/rs6000-builtins.def
34684 (__builtin_vsx_scalar_insert_exp): Replace bif-pattern from xsiexpdp
34686 (__builtin_vsx_scalar_insert_exp_dp): Replace bif-pattern from
34687 xsiexpdpf to xsiexpdpf_di.
34688 * config/rs6000/vsx.md (xsiexpdp): Rename to...
34689 (xsiexpdp_<mode>): ..., set the mode of second operand to GPR and
34690 replace TARGET_64BIT with TARGET_POWERPC64.
34691 (xsiexpdpf): Rename to...
34692 (xsiexpdpf_<mode>): ..., set the mode of second operand to GPR and
34693 replace TARGET_64BIT with TARGET_POWERPC64.
34695 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
34697 * config/rs6000/rs6000-builtins.def
34698 (__builtin_vsx_scalar_extract_sig): Set return type to const signed
34700 * config/rs6000/vsx.md (xsxsigdp): Replace TARGET_64BIT with
34703 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
34705 * config/rs6000/rs6000-builtins.def
34706 (__builtin_vsx_scalar_extract_exp): Set return type to const signed
34707 int and set its bif-pattern to xsxexpdp_si, move it from power9-64
34709 * config/rs6000/vsx.md (xsxexpdp): Rename to ...
34710 (xsxexpdp_<mode>): ..., set mode of operand 0 to GPR and remove
34711 TARGET_64BIT check.
34712 * doc/extend.texi (scalar_extract_exp): Remove 64-bit environment
34713 requirement when it has a 64-bit argument.
34715 2023-05-12 Pan Li <pan2.li@intel.com>
34716 Richard Sandiford <richard.sandiford@arm.com>
34717 Richard Biener <rguenther@suse.de>
34718 Jakub Jelinek <jakub@redhat.com>
34720 * mux-utils.h: Add overload operator == and != for pointer_mux.
34721 * var-tracking.cc: Included mux-utils.h for pointer_tmux.
34722 (decl_or_value): Changed from void * to pointer_mux<tree_node, rtx_def>.
34723 (dv_is_decl_p): Reconciled to the new type, aka pointer_mux.
34724 (dv_as_decl): Ditto.
34725 (dv_as_opaque): Removed due to unnecessary.
34726 (struct variable_hasher): Take decl_or_value as compare_type.
34727 (variable_hasher::equal): Diito.
34728 (dv_from_decl): Reconciled to the new type, aka pointer_mux.
34729 (dv_from_value): Ditto.
34730 (attrs_list_member): Ditto.
34731 (vars_copy): Ditto.
34732 (var_reg_decl_set): Ditto.
34733 (var_reg_delete_and_set): Ditto.
34734 (find_loc_in_1pdv): Ditto.
34735 (canonicalize_values_star): Ditto.
34736 (variable_post_merge_new_vals): Ditto.
34737 (dump_onepart_variable_differences): Ditto.
34738 (variable_different_p): Ditto.
34739 (set_slot_part): Ditto.
34740 (clobber_slot_part): Ditto.
34741 (clobber_variable_part): Ditto.
34743 2023-05-11 mtsamis <manolis.tsamis@vrull.eu>
34745 * match.pd: simplify vector shift + bit_and + multiply.
34747 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
34749 * config/arm/arm-mve-builtins-base.cc (vmlaq, vmlasq, vqdmlahq)
34750 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
34751 * config/arm/arm-mve-builtins-base.def (vmlaq, vmlasq, vqdmlahq)
34752 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
34753 * config/arm/arm-mve-builtins-base.h (vmlaq, vmlasq, vqdmlahq)
34754 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
34755 * config/arm/arm-mve-builtins.cc
34756 (function_instance::has_inactive_argument): Handle vmlaq, vmlasq,
34757 vqdmlahq, vqdmlashq, vqrdmlahq, vqrdmlashq.
34758 * config/arm/arm_mve.h (vqrdmlashq): Remove.
34759 (vqrdmlahq): Remove.
34760 (vqdmlashq): Remove.
34761 (vqdmlahq): Remove.
34765 (vmlasq_m): Remove.
34766 (vqdmlashq_m): Remove.
34767 (vqdmlahq_m): Remove.
34768 (vqrdmlahq_m): Remove.
34769 (vqrdmlashq_m): Remove.
34770 (vmlasq_n_u8): Remove.
34771 (vmlaq_n_u8): Remove.
34772 (vqrdmlashq_n_s8): Remove.
34773 (vqrdmlahq_n_s8): Remove.
34774 (vqdmlahq_n_s8): Remove.
34775 (vqdmlashq_n_s8): Remove.
34776 (vmlasq_n_s8): Remove.
34777 (vmlaq_n_s8): Remove.
34778 (vmlasq_n_u16): Remove.
34779 (vmlaq_n_u16): Remove.
34780 (vqrdmlashq_n_s16): Remove.
34781 (vqrdmlahq_n_s16): Remove.
34782 (vqdmlashq_n_s16): Remove.
34783 (vqdmlahq_n_s16): Remove.
34784 (vmlasq_n_s16): Remove.
34785 (vmlaq_n_s16): Remove.
34786 (vmlasq_n_u32): Remove.
34787 (vmlaq_n_u32): Remove.
34788 (vqrdmlashq_n_s32): Remove.
34789 (vqrdmlahq_n_s32): Remove.
34790 (vqdmlashq_n_s32): Remove.
34791 (vqdmlahq_n_s32): Remove.
34792 (vmlasq_n_s32): Remove.
34793 (vmlaq_n_s32): Remove.
34794 (vmlaq_m_n_s8): Remove.
34795 (vmlaq_m_n_s32): Remove.
34796 (vmlaq_m_n_s16): Remove.
34797 (vmlaq_m_n_u8): Remove.
34798 (vmlaq_m_n_u32): Remove.
34799 (vmlaq_m_n_u16): Remove.
34800 (vmlasq_m_n_s8): Remove.
34801 (vmlasq_m_n_s32): Remove.
34802 (vmlasq_m_n_s16): Remove.
34803 (vmlasq_m_n_u8): Remove.
34804 (vmlasq_m_n_u32): Remove.
34805 (vmlasq_m_n_u16): Remove.
34806 (vqdmlashq_m_n_s8): Remove.
34807 (vqdmlashq_m_n_s32): Remove.
34808 (vqdmlashq_m_n_s16): Remove.
34809 (vqdmlahq_m_n_s8): Remove.
34810 (vqdmlahq_m_n_s32): Remove.
34811 (vqdmlahq_m_n_s16): Remove.
34812 (vqrdmlahq_m_n_s8): Remove.
34813 (vqrdmlahq_m_n_s32): Remove.
34814 (vqrdmlahq_m_n_s16): Remove.
34815 (vqrdmlashq_m_n_s8): Remove.
34816 (vqrdmlashq_m_n_s32): Remove.
34817 (vqrdmlashq_m_n_s16): Remove.
34818 (__arm_vmlasq_n_u8): Remove.
34819 (__arm_vmlaq_n_u8): Remove.
34820 (__arm_vqrdmlashq_n_s8): Remove.
34821 (__arm_vqdmlashq_n_s8): Remove.
34822 (__arm_vqrdmlahq_n_s8): Remove.
34823 (__arm_vqdmlahq_n_s8): Remove.
34824 (__arm_vmlasq_n_s8): Remove.
34825 (__arm_vmlaq_n_s8): Remove.
34826 (__arm_vmlasq_n_u16): Remove.
34827 (__arm_vmlaq_n_u16): Remove.
34828 (__arm_vqrdmlashq_n_s16): Remove.
34829 (__arm_vqdmlashq_n_s16): Remove.
34830 (__arm_vqrdmlahq_n_s16): Remove.
34831 (__arm_vqdmlahq_n_s16): Remove.
34832 (__arm_vmlasq_n_s16): Remove.
34833 (__arm_vmlaq_n_s16): Remove.
34834 (__arm_vmlasq_n_u32): Remove.
34835 (__arm_vmlaq_n_u32): Remove.
34836 (__arm_vqrdmlashq_n_s32): Remove.
34837 (__arm_vqdmlashq_n_s32): Remove.
34838 (__arm_vqrdmlahq_n_s32): Remove.
34839 (__arm_vqdmlahq_n_s32): Remove.
34840 (__arm_vmlasq_n_s32): Remove.
34841 (__arm_vmlaq_n_s32): Remove.
34842 (__arm_vmlaq_m_n_s8): Remove.
34843 (__arm_vmlaq_m_n_s32): Remove.
34844 (__arm_vmlaq_m_n_s16): Remove.
34845 (__arm_vmlaq_m_n_u8): Remove.
34846 (__arm_vmlaq_m_n_u32): Remove.
34847 (__arm_vmlaq_m_n_u16): Remove.
34848 (__arm_vmlasq_m_n_s8): Remove.
34849 (__arm_vmlasq_m_n_s32): Remove.
34850 (__arm_vmlasq_m_n_s16): Remove.
34851 (__arm_vmlasq_m_n_u8): Remove.
34852 (__arm_vmlasq_m_n_u32): Remove.
34853 (__arm_vmlasq_m_n_u16): Remove.
34854 (__arm_vqdmlahq_m_n_s8): Remove.
34855 (__arm_vqdmlahq_m_n_s32): Remove.
34856 (__arm_vqdmlahq_m_n_s16): Remove.
34857 (__arm_vqrdmlahq_m_n_s8): Remove.
34858 (__arm_vqrdmlahq_m_n_s32): Remove.
34859 (__arm_vqrdmlahq_m_n_s16): Remove.
34860 (__arm_vqrdmlashq_m_n_s8): Remove.
34861 (__arm_vqrdmlashq_m_n_s32): Remove.
34862 (__arm_vqrdmlashq_m_n_s16): Remove.
34863 (__arm_vqdmlashq_m_n_s8): Remove.
34864 (__arm_vqdmlashq_m_n_s16): Remove.
34865 (__arm_vqdmlashq_m_n_s32): Remove.
34866 (__arm_vmlasq): Remove.
34867 (__arm_vmlaq): Remove.
34868 (__arm_vqrdmlashq): Remove.
34869 (__arm_vqdmlashq): Remove.
34870 (__arm_vqrdmlahq): Remove.
34871 (__arm_vqdmlahq): Remove.
34872 (__arm_vmlaq_m): Remove.
34873 (__arm_vmlasq_m): Remove.
34874 (__arm_vqdmlahq_m): Remove.
34875 (__arm_vqrdmlahq_m): Remove.
34876 (__arm_vqrdmlashq_m): Remove.
34877 (__arm_vqdmlashq_m): Remove.
34879 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
34881 * config/arm/iterators.md (MVE_VMLxQ_N): New.
34882 (mve_insn): Add vmla, vmlas, vqdmlah, vqdmlash, vqrdmlah,
34884 (supf): Add VQDMLAHQ_N_S, VQDMLASHQ_N_S, VQRDMLAHQ_N_S,
34886 * config/arm/mve.md (mve_vmlaq_n_<supf><mode>)
34887 (mve_vmlasq_n_<supf><mode>, mve_vqdmlahq_n_<supf><mode>)
34888 (mve_vqdmlashq_n_<supf><mode>, mve_vqrdmlahq_n_<supf><mode>)
34889 (mve_vqrdmlashq_n_<supf><mode>): Merge into ...
34890 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
34892 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
34894 * config/arm/arm-mve-builtins-shapes.cc (ternary_n): New.
34895 * config/arm/arm-mve-builtins-shapes.h (ternary_n): New.
34897 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
34899 * config/arm/arm-mve-builtins-base.cc (vqdmladhq, vqdmladhxq)
34900 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
34901 (vqrdmlsdhxq): New.
34902 * config/arm/arm-mve-builtins-base.def (vqdmladhq, vqdmladhxq)
34903 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
34904 (vqrdmlsdhxq): New.
34905 * config/arm/arm-mve-builtins-base.h (vqdmladhq, vqdmladhxq)
34906 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
34907 (vqrdmlsdhxq): New.
34908 * config/arm/arm-mve-builtins.cc
34909 (function_instance::has_inactive_argument): Handle vqrdmladhq,
34910 vqrdmladhxq, vqrdmlsdhq, vqrdmlsdhxq vqdmladhq, vqdmladhxq,
34911 vqdmlsdhq, vqdmlsdhxq.
34912 * config/arm/arm_mve.h (vqrdmlsdhxq): Remove.
34913 (vqrdmlsdhq): Remove.
34914 (vqrdmladhxq): Remove.
34915 (vqrdmladhq): Remove.
34916 (vqdmlsdhxq): Remove.
34917 (vqdmlsdhq): Remove.
34918 (vqdmladhxq): Remove.
34919 (vqdmladhq): Remove.
34920 (vqdmladhq_m): Remove.
34921 (vqdmladhxq_m): Remove.
34922 (vqdmlsdhq_m): Remove.
34923 (vqdmlsdhxq_m): Remove.
34924 (vqrdmladhq_m): Remove.
34925 (vqrdmladhxq_m): Remove.
34926 (vqrdmlsdhq_m): Remove.
34927 (vqrdmlsdhxq_m): Remove.
34928 (vqrdmlsdhxq_s8): Remove.
34929 (vqrdmlsdhq_s8): Remove.
34930 (vqrdmladhxq_s8): Remove.
34931 (vqrdmladhq_s8): Remove.
34932 (vqdmlsdhxq_s8): Remove.
34933 (vqdmlsdhq_s8): Remove.
34934 (vqdmladhxq_s8): Remove.
34935 (vqdmladhq_s8): Remove.
34936 (vqrdmlsdhxq_s16): Remove.
34937 (vqrdmlsdhq_s16): Remove.
34938 (vqrdmladhxq_s16): Remove.
34939 (vqrdmladhq_s16): Remove.
34940 (vqdmlsdhxq_s16): Remove.
34941 (vqdmlsdhq_s16): Remove.
34942 (vqdmladhxq_s16): Remove.
34943 (vqdmladhq_s16): Remove.
34944 (vqrdmlsdhxq_s32): Remove.
34945 (vqrdmlsdhq_s32): Remove.
34946 (vqrdmladhxq_s32): Remove.
34947 (vqrdmladhq_s32): Remove.
34948 (vqdmlsdhxq_s32): Remove.
34949 (vqdmlsdhq_s32): Remove.
34950 (vqdmladhxq_s32): Remove.
34951 (vqdmladhq_s32): Remove.
34952 (vqdmladhq_m_s8): Remove.
34953 (vqdmladhq_m_s32): Remove.
34954 (vqdmladhq_m_s16): Remove.
34955 (vqdmladhxq_m_s8): Remove.
34956 (vqdmladhxq_m_s32): Remove.
34957 (vqdmladhxq_m_s16): Remove.
34958 (vqdmlsdhq_m_s8): Remove.
34959 (vqdmlsdhq_m_s32): Remove.
34960 (vqdmlsdhq_m_s16): Remove.
34961 (vqdmlsdhxq_m_s8): Remove.
34962 (vqdmlsdhxq_m_s32): Remove.
34963 (vqdmlsdhxq_m_s16): Remove.
34964 (vqrdmladhq_m_s8): Remove.
34965 (vqrdmladhq_m_s32): Remove.
34966 (vqrdmladhq_m_s16): Remove.
34967 (vqrdmladhxq_m_s8): Remove.
34968 (vqrdmladhxq_m_s32): Remove.
34969 (vqrdmladhxq_m_s16): Remove.
34970 (vqrdmlsdhq_m_s8): Remove.
34971 (vqrdmlsdhq_m_s32): Remove.
34972 (vqrdmlsdhq_m_s16): Remove.
34973 (vqrdmlsdhxq_m_s8): Remove.
34974 (vqrdmlsdhxq_m_s32): Remove.
34975 (vqrdmlsdhxq_m_s16): Remove.
34976 (__arm_vqrdmlsdhxq_s8): Remove.
34977 (__arm_vqrdmlsdhq_s8): Remove.
34978 (__arm_vqrdmladhxq_s8): Remove.
34979 (__arm_vqrdmladhq_s8): Remove.
34980 (__arm_vqdmlsdhxq_s8): Remove.
34981 (__arm_vqdmlsdhq_s8): Remove.
34982 (__arm_vqdmladhxq_s8): Remove.
34983 (__arm_vqdmladhq_s8): Remove.
34984 (__arm_vqrdmlsdhxq_s16): Remove.
34985 (__arm_vqrdmlsdhq_s16): Remove.
34986 (__arm_vqrdmladhxq_s16): Remove.
34987 (__arm_vqrdmladhq_s16): Remove.
34988 (__arm_vqdmlsdhxq_s16): Remove.
34989 (__arm_vqdmlsdhq_s16): Remove.
34990 (__arm_vqdmladhxq_s16): Remove.
34991 (__arm_vqdmladhq_s16): Remove.
34992 (__arm_vqrdmlsdhxq_s32): Remove.
34993 (__arm_vqrdmlsdhq_s32): Remove.
34994 (__arm_vqrdmladhxq_s32): Remove.
34995 (__arm_vqrdmladhq_s32): Remove.
34996 (__arm_vqdmlsdhxq_s32): Remove.
34997 (__arm_vqdmlsdhq_s32): Remove.
34998 (__arm_vqdmladhxq_s32): Remove.
34999 (__arm_vqdmladhq_s32): Remove.
35000 (__arm_vqdmladhq_m_s8): Remove.
35001 (__arm_vqdmladhq_m_s32): Remove.
35002 (__arm_vqdmladhq_m_s16): Remove.
35003 (__arm_vqdmladhxq_m_s8): Remove.
35004 (__arm_vqdmladhxq_m_s32): Remove.
35005 (__arm_vqdmladhxq_m_s16): Remove.
35006 (__arm_vqdmlsdhq_m_s8): Remove.
35007 (__arm_vqdmlsdhq_m_s32): Remove.
35008 (__arm_vqdmlsdhq_m_s16): Remove.
35009 (__arm_vqdmlsdhxq_m_s8): Remove.
35010 (__arm_vqdmlsdhxq_m_s32): Remove.
35011 (__arm_vqdmlsdhxq_m_s16): Remove.
35012 (__arm_vqrdmladhq_m_s8): Remove.
35013 (__arm_vqrdmladhq_m_s32): Remove.
35014 (__arm_vqrdmladhq_m_s16): Remove.
35015 (__arm_vqrdmladhxq_m_s8): Remove.
35016 (__arm_vqrdmladhxq_m_s32): Remove.
35017 (__arm_vqrdmladhxq_m_s16): Remove.
35018 (__arm_vqrdmlsdhq_m_s8): Remove.
35019 (__arm_vqrdmlsdhq_m_s32): Remove.
35020 (__arm_vqrdmlsdhq_m_s16): Remove.
35021 (__arm_vqrdmlsdhxq_m_s8): Remove.
35022 (__arm_vqrdmlsdhxq_m_s32): Remove.
35023 (__arm_vqrdmlsdhxq_m_s16): Remove.
35024 (__arm_vqrdmlsdhxq): Remove.
35025 (__arm_vqrdmlsdhq): Remove.
35026 (__arm_vqrdmladhxq): Remove.
35027 (__arm_vqrdmladhq): Remove.
35028 (__arm_vqdmlsdhxq): Remove.
35029 (__arm_vqdmlsdhq): Remove.
35030 (__arm_vqdmladhxq): Remove.
35031 (__arm_vqdmladhq): Remove.
35032 (__arm_vqdmladhq_m): Remove.
35033 (__arm_vqdmladhxq_m): Remove.
35034 (__arm_vqdmlsdhq_m): Remove.
35035 (__arm_vqdmlsdhxq_m): Remove.
35036 (__arm_vqrdmladhq_m): Remove.
35037 (__arm_vqrdmladhxq_m): Remove.
35038 (__arm_vqrdmlsdhq_m): Remove.
35039 (__arm_vqrdmlsdhxq_m): Remove.
35041 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
35043 * config/arm/iterators.md (MVE_VQxDMLxDHxQ_S): New.
35044 (mve_insn): Add vqdmladh, vqdmladhx, vqdmlsdh, vqdmlsdhx,
35045 vqrdmladh, vqrdmladhx, vqrdmlsdh, vqrdmlsdhx.
35046 (supf): Add VQDMLADHQ_S, VQDMLADHXQ_S, VQDMLSDHQ_S, VQDMLSDHXQ_S,
35047 VQRDMLADHQ_S,VQRDMLADHXQ_S, VQRDMLSDHQ_S, VQRDMLSDHXQ_S.
35048 * config/arm/mve.md (mve_vqrdmladhq_s<mode>)
35049 (mve_vqrdmladhxq_s<mode>, mve_vqrdmlsdhq_s<mode>)
35050 (mve_vqrdmlsdhxq_s<mode>, mve_vqdmlsdhxq_s<mode>)
35051 (mve_vqdmlsdhq_s<mode>, mve_vqdmladhxq_s<mode>)
35052 (mve_vqdmladhq_s<mode>): Merge into ...
35053 (@mve_<mve_insn>q_<supf><mode>): ... this.
35055 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
35057 * config/arm/arm-mve-builtins-shapes.cc (ternary): New.
35058 * config/arm/arm-mve-builtins-shapes.h (ternary): New.
35060 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
35062 * config/arm/arm-mve-builtins-base.cc (vmlaldavaq, vmlaldavaxq)
35063 (vmlsldavaq, vmlsldavaxq): New.
35064 * config/arm/arm-mve-builtins-base.def (vmlaldavaq, vmlaldavaxq)
35065 (vmlsldavaq, vmlsldavaxq): New.
35066 * config/arm/arm-mve-builtins-base.h (vmlaldavaq, vmlaldavaxq)
35067 (vmlsldavaq, vmlsldavaxq): New.
35068 * config/arm/arm_mve.h (vmlaldavaq): Remove.
35069 (vmlaldavaxq): Remove.
35070 (vmlsldavaq): Remove.
35071 (vmlsldavaxq): Remove.
35072 (vmlaldavaq_p): Remove.
35073 (vmlaldavaxq_p): Remove.
35074 (vmlsldavaq_p): Remove.
35075 (vmlsldavaxq_p): Remove.
35076 (vmlaldavaq_s16): Remove.
35077 (vmlaldavaxq_s16): Remove.
35078 (vmlsldavaq_s16): Remove.
35079 (vmlsldavaxq_s16): Remove.
35080 (vmlaldavaq_u16): Remove.
35081 (vmlaldavaq_s32): Remove.
35082 (vmlaldavaxq_s32): Remove.
35083 (vmlsldavaq_s32): Remove.
35084 (vmlsldavaxq_s32): Remove.
35085 (vmlaldavaq_u32): Remove.
35086 (vmlaldavaq_p_s32): Remove.
35087 (vmlaldavaq_p_s16): Remove.
35088 (vmlaldavaq_p_u32): Remove.
35089 (vmlaldavaq_p_u16): Remove.
35090 (vmlaldavaxq_p_s32): Remove.
35091 (vmlaldavaxq_p_s16): Remove.
35092 (vmlsldavaq_p_s32): Remove.
35093 (vmlsldavaq_p_s16): Remove.
35094 (vmlsldavaxq_p_s32): Remove.
35095 (vmlsldavaxq_p_s16): Remove.
35096 (__arm_vmlaldavaq_s16): Remove.
35097 (__arm_vmlaldavaxq_s16): Remove.
35098 (__arm_vmlsldavaq_s16): Remove.
35099 (__arm_vmlsldavaxq_s16): Remove.
35100 (__arm_vmlaldavaq_u16): Remove.
35101 (__arm_vmlaldavaq_s32): Remove.
35102 (__arm_vmlaldavaxq_s32): Remove.
35103 (__arm_vmlsldavaq_s32): Remove.
35104 (__arm_vmlsldavaxq_s32): Remove.
35105 (__arm_vmlaldavaq_u32): Remove.
35106 (__arm_vmlaldavaq_p_s32): Remove.
35107 (__arm_vmlaldavaq_p_s16): Remove.
35108 (__arm_vmlaldavaq_p_u32): Remove.
35109 (__arm_vmlaldavaq_p_u16): Remove.
35110 (__arm_vmlaldavaxq_p_s32): Remove.
35111 (__arm_vmlaldavaxq_p_s16): Remove.
35112 (__arm_vmlsldavaq_p_s32): Remove.
35113 (__arm_vmlsldavaq_p_s16): Remove.
35114 (__arm_vmlsldavaxq_p_s32): Remove.
35115 (__arm_vmlsldavaxq_p_s16): Remove.
35116 (__arm_vmlaldavaq): Remove.
35117 (__arm_vmlaldavaxq): Remove.
35118 (__arm_vmlsldavaq): Remove.
35119 (__arm_vmlsldavaxq): Remove.
35120 (__arm_vmlaldavaq_p): Remove.
35121 (__arm_vmlaldavaxq_p): Remove.
35122 (__arm_vmlsldavaq_p): Remove.
35123 (__arm_vmlsldavaxq_p): Remove.
35125 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
35127 * config/arm/iterators.md (MVE_VMLxLDAVAxQ, MVE_VMLxLDAVAxQ_P):
35129 (mve_insn): Add vmlaldava, vmlaldavax, vmlsldava, vmlsldavax.
35130 (supf): Add VMLALDAVAXQ_P_S, VMLALDAVAXQ_S, VMLSLDAVAQ_P_S,
35131 VMLSLDAVAQ_S, VMLSLDAVAXQ_P_S, VMLSLDAVAXQ_S.
35132 * config/arm/mve.md (mve_vmlaldavaq_<supf><mode>)
35133 (mve_vmlsldavaq_s<mode>, mve_vmlsldavaxq_s<mode>)
35134 (mve_vmlaldavaxq_s<mode>): Merge into ...
35135 (@mve_<mve_insn>q_<supf><mode>): ... this.
35136 (mve_vmlaldavaq_p_<supf><mode>, mve_vmlaldavaxq_p_<supf><mode>)
35137 (mve_vmlsldavaq_p_s<mode>, mve_vmlsldavaxq_p_s<mode>): Merge into
35139 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
35141 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
35143 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int64): New.
35144 * config/arm/arm-mve-builtins-shapes.h (binary_acca_int64): New.
35146 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
35148 * config/arm/arm-mve-builtins-base.cc (vrmlaldavhq, vrmlaldavhxq)
35149 (vrmlsldavhq, vrmlsldavhxq): New.
35150 * config/arm/arm-mve-builtins-base.def (vrmlaldavhq, vrmlaldavhxq)
35151 (vrmlsldavhq, vrmlsldavhxq): New.
35152 * config/arm/arm-mve-builtins-base.h (vrmlaldavhq, vrmlaldavhxq)
35153 (vrmlsldavhq, vrmlsldavhxq): New.
35154 * config/arm/arm-mve-builtins-functions.h
35155 (unspec_mve_function_exact_insn_pred_p): Handle vrmlaldavhq,
35156 vrmlaldavhxq, vrmlsldavhq, vrmlsldavhxq.
35157 * config/arm/arm_mve.h (vrmlaldavhq): Remove.
35158 (vrmlsldavhxq): Remove.
35159 (vrmlsldavhq): Remove.
35160 (vrmlaldavhxq): Remove.
35161 (vrmlaldavhq_p): Remove.
35162 (vrmlaldavhxq_p): Remove.
35163 (vrmlsldavhq_p): Remove.
35164 (vrmlsldavhxq_p): Remove.
35165 (vrmlaldavhq_u32): Remove.
35166 (vrmlsldavhxq_s32): Remove.
35167 (vrmlsldavhq_s32): Remove.
35168 (vrmlaldavhxq_s32): Remove.
35169 (vrmlaldavhq_s32): Remove.
35170 (vrmlaldavhq_p_s32): Remove.
35171 (vrmlaldavhxq_p_s32): Remove.
35172 (vrmlsldavhq_p_s32): Remove.
35173 (vrmlsldavhxq_p_s32): Remove.
35174 (vrmlaldavhq_p_u32): Remove.
35175 (__arm_vrmlaldavhq_u32): Remove.
35176 (__arm_vrmlsldavhxq_s32): Remove.
35177 (__arm_vrmlsldavhq_s32): Remove.
35178 (__arm_vrmlaldavhxq_s32): Remove.
35179 (__arm_vrmlaldavhq_s32): Remove.
35180 (__arm_vrmlaldavhq_p_s32): Remove.
35181 (__arm_vrmlaldavhxq_p_s32): Remove.
35182 (__arm_vrmlsldavhq_p_s32): Remove.
35183 (__arm_vrmlsldavhxq_p_s32): Remove.
35184 (__arm_vrmlaldavhq_p_u32): Remove.
35185 (__arm_vrmlaldavhq): Remove.
35186 (__arm_vrmlsldavhxq): Remove.
35187 (__arm_vrmlsldavhq): Remove.
35188 (__arm_vrmlaldavhxq): Remove.
35189 (__arm_vrmlaldavhq_p): Remove.
35190 (__arm_vrmlaldavhxq_p): Remove.
35191 (__arm_vrmlsldavhq_p): Remove.
35192 (__arm_vrmlsldavhxq_p): Remove.
35194 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
35196 * config/arm/iterators.md (MVE_VRMLxLDAVxQ, MVE_VRMLxLDAVHxQ_P):
35198 (mve_insn): Add vrmlaldavh, vrmlaldavhx, vrmlsldavh, vrmlsldavhx.
35199 (supf): Add VRMLALDAVHXQ_P_S, VRMLALDAVHXQ_S, VRMLSLDAVHQ_P_S,
35200 VRMLSLDAVHQ_S, VRMLSLDAVHXQ_P_S, VRMLSLDAVHXQ_S.
35201 * config/arm/mve.md (mve_vrmlaldavhxq_sv4si)
35202 (mve_vrmlsldavhq_sv4si, mve_vrmlsldavhxq_sv4si)
35203 (mve_vrmlaldavhq_<supf>v4si): Merge into ...
35204 (@mve_<mve_insn>q_<supf>v4si): ... this.
35205 (mve_vrmlaldavhxq_p_sv4si, mve_vrmlsldavhq_p_sv4si)
35206 (mve_vrmlsldavhxq_p_sv4si, mve_vrmlaldavhq_p_<supf>v4si): Merge
35208 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
35210 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
35212 * config/arm/arm-mve-builtins-base.cc (vmlaldavq, vmlaldavxq)
35213 (vmlsldavq, vmlsldavxq): New.
35214 * config/arm/arm-mve-builtins-base.def (vmlaldavq, vmlaldavxq)
35215 (vmlsldavq, vmlsldavxq): New.
35216 * config/arm/arm-mve-builtins-base.h (vmlaldavq, vmlaldavxq)
35217 (vmlsldavq, vmlsldavxq): New.
35218 * config/arm/arm_mve.h (vmlaldavq): Remove.
35219 (vmlsldavxq): Remove.
35220 (vmlsldavq): Remove.
35221 (vmlaldavxq): Remove.
35222 (vmlaldavq_p): Remove.
35223 (vmlaldavxq_p): Remove.
35224 (vmlsldavq_p): Remove.
35225 (vmlsldavxq_p): Remove.
35226 (vmlaldavq_u16): Remove.
35227 (vmlsldavxq_s16): Remove.
35228 (vmlsldavq_s16): Remove.
35229 (vmlaldavxq_s16): Remove.
35230 (vmlaldavq_s16): Remove.
35231 (vmlaldavq_u32): Remove.
35232 (vmlsldavxq_s32): Remove.
35233 (vmlsldavq_s32): Remove.
35234 (vmlaldavxq_s32): Remove.
35235 (vmlaldavq_s32): Remove.
35236 (vmlaldavq_p_s16): Remove.
35237 (vmlaldavxq_p_s16): Remove.
35238 (vmlsldavq_p_s16): Remove.
35239 (vmlsldavxq_p_s16): Remove.
35240 (vmlaldavq_p_u16): Remove.
35241 (vmlaldavq_p_s32): Remove.
35242 (vmlaldavxq_p_s32): Remove.
35243 (vmlsldavq_p_s32): Remove.
35244 (vmlsldavxq_p_s32): Remove.
35245 (vmlaldavq_p_u32): Remove.
35246 (__arm_vmlaldavq_u16): Remove.
35247 (__arm_vmlsldavxq_s16): Remove.
35248 (__arm_vmlsldavq_s16): Remove.
35249 (__arm_vmlaldavxq_s16): Remove.
35250 (__arm_vmlaldavq_s16): Remove.
35251 (__arm_vmlaldavq_u32): Remove.
35252 (__arm_vmlsldavxq_s32): Remove.
35253 (__arm_vmlsldavq_s32): Remove.
35254 (__arm_vmlaldavxq_s32): Remove.
35255 (__arm_vmlaldavq_s32): Remove.
35256 (__arm_vmlaldavq_p_s16): Remove.
35257 (__arm_vmlaldavxq_p_s16): Remove.
35258 (__arm_vmlsldavq_p_s16): Remove.
35259 (__arm_vmlsldavxq_p_s16): Remove.
35260 (__arm_vmlaldavq_p_u16): Remove.
35261 (__arm_vmlaldavq_p_s32): Remove.
35262 (__arm_vmlaldavxq_p_s32): Remove.
35263 (__arm_vmlsldavq_p_s32): Remove.
35264 (__arm_vmlsldavxq_p_s32): Remove.
35265 (__arm_vmlaldavq_p_u32): Remove.
35266 (__arm_vmlaldavq): Remove.
35267 (__arm_vmlsldavxq): Remove.
35268 (__arm_vmlsldavq): Remove.
35269 (__arm_vmlaldavxq): Remove.
35270 (__arm_vmlaldavq_p): Remove.
35271 (__arm_vmlaldavxq_p): Remove.
35272 (__arm_vmlsldavq_p): Remove.
35273 (__arm_vmlsldavxq_p): Remove.
35275 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
35277 * config/arm/iterators.md (MVE_VMLxLDAVxQ, MVE_VMLxLDAVxQ_P): New.
35278 (mve_insn): Add vmlaldav, vmlaldavx, vmlsldav, vmlsldavx.
35279 (supf): Add VMLALDAVXQ_S, VMLSLDAVQ_S, VMLSLDAVXQ_S,
35280 VMLALDAVXQ_P_S, VMLSLDAVQ_P_S, VMLSLDAVXQ_P_S.
35281 * config/arm/mve.md (mve_vmlaldavq_<supf><mode>)
35282 (mve_vmlaldavxq_s<mode>, mve_vmlsldavq_s<mode>)
35283 (mve_vmlsldavxq_s<mode>): Merge into ...
35284 (@mve_<mve_insn>q_<supf><mode>): ... this.
35285 (mve_vmlaldavq_p_<supf><mode>, mve_vmlaldavxq_p_s<mode>)
35286 (mve_vmlsldavq_p_s<mode>, mve_vmlsldavxq_p_s<mode>): Merge into
35288 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
35290 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
35292 * config/arm/arm-mve-builtins-shapes.cc (binary_acc_int64): New.
35293 * config/arm/arm-mve-builtins-shapes.h (binary_acc_int64): New.
35295 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
35297 * config/arm/arm-mve-builtins-base.cc (vabavq): New.
35298 * config/arm/arm-mve-builtins-base.def (vabavq): New.
35299 * config/arm/arm-mve-builtins-base.h (vabavq): New.
35300 * config/arm/arm_mve.h (vabavq): Remove.
35301 (vabavq_p): Remove.
35302 (vabavq_s8): Remove.
35303 (vabavq_s16): Remove.
35304 (vabavq_s32): Remove.
35305 (vabavq_u8): Remove.
35306 (vabavq_u16): Remove.
35307 (vabavq_u32): Remove.
35308 (vabavq_p_s8): Remove.
35309 (vabavq_p_u8): Remove.
35310 (vabavq_p_s16): Remove.
35311 (vabavq_p_u16): Remove.
35312 (vabavq_p_s32): Remove.
35313 (vabavq_p_u32): Remove.
35314 (__arm_vabavq_s8): Remove.
35315 (__arm_vabavq_s16): Remove.
35316 (__arm_vabavq_s32): Remove.
35317 (__arm_vabavq_u8): Remove.
35318 (__arm_vabavq_u16): Remove.
35319 (__arm_vabavq_u32): Remove.
35320 (__arm_vabavq_p_s8): Remove.
35321 (__arm_vabavq_p_u8): Remove.
35322 (__arm_vabavq_p_s16): Remove.
35323 (__arm_vabavq_p_u16): Remove.
35324 (__arm_vabavq_p_s32): Remove.
35325 (__arm_vabavq_p_u32): Remove.
35326 (__arm_vabavq): Remove.
35327 (__arm_vabavq_p): Remove.
35329 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
35331 * config/arm/iterators.md (mve_insn): Add vabav.
35332 * config/arm/mve.md (mve_vabavq_<supf><mode>): Rename into ...
35333 (@mve_<mve_insn>q_<supf><mode>): ... this,.
35334 (mve_vabavq_p_<supf><mode>): Rename into ...
35335 (@mve_<mve_insn>q_p_<supf><mode>): ... this,.
35337 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
35339 * config/arm/arm-mve-builtins-base.cc (vmladavaxq, vmladavaq)
35340 (vmlsdavaq, vmlsdavaxq): New.
35341 * config/arm/arm-mve-builtins-base.def (vmladavaxq, vmladavaq)
35342 (vmlsdavaq, vmlsdavaxq): New.
35343 * config/arm/arm-mve-builtins-base.h (vmladavaxq, vmladavaq)
35344 (vmlsdavaq, vmlsdavaxq): New.
35345 * config/arm/arm_mve.h (vmladavaq): Remove.
35346 (vmlsdavaxq): Remove.
35347 (vmlsdavaq): Remove.
35348 (vmladavaxq): Remove.
35349 (vmladavaq_p): Remove.
35350 (vmladavaxq_p): Remove.
35351 (vmlsdavaq_p): Remove.
35352 (vmlsdavaxq_p): Remove.
35353 (vmladavaq_u8): Remove.
35354 (vmlsdavaxq_s8): Remove.
35355 (vmlsdavaq_s8): Remove.
35356 (vmladavaxq_s8): Remove.
35357 (vmladavaq_s8): Remove.
35358 (vmladavaq_u16): Remove.
35359 (vmlsdavaxq_s16): Remove.
35360 (vmlsdavaq_s16): Remove.
35361 (vmladavaxq_s16): Remove.
35362 (vmladavaq_s16): Remove.
35363 (vmladavaq_u32): Remove.
35364 (vmlsdavaxq_s32): Remove.
35365 (vmlsdavaq_s32): Remove.
35366 (vmladavaxq_s32): Remove.
35367 (vmladavaq_s32): Remove.
35368 (vmladavaq_p_s8): Remove.
35369 (vmladavaq_p_s32): Remove.
35370 (vmladavaq_p_s16): Remove.
35371 (vmladavaq_p_u8): Remove.
35372 (vmladavaq_p_u32): Remove.
35373 (vmladavaq_p_u16): Remove.
35374 (vmladavaxq_p_s8): Remove.
35375 (vmladavaxq_p_s32): Remove.
35376 (vmladavaxq_p_s16): Remove.
35377 (vmlsdavaq_p_s8): Remove.
35378 (vmlsdavaq_p_s32): Remove.
35379 (vmlsdavaq_p_s16): Remove.
35380 (vmlsdavaxq_p_s8): Remove.
35381 (vmlsdavaxq_p_s32): Remove.
35382 (vmlsdavaxq_p_s16): Remove.
35383 (__arm_vmladavaq_u8): Remove.
35384 (__arm_vmlsdavaxq_s8): Remove.
35385 (__arm_vmlsdavaq_s8): Remove.
35386 (__arm_vmladavaxq_s8): Remove.
35387 (__arm_vmladavaq_s8): Remove.
35388 (__arm_vmladavaq_u16): Remove.
35389 (__arm_vmlsdavaxq_s16): Remove.
35390 (__arm_vmlsdavaq_s16): Remove.
35391 (__arm_vmladavaxq_s16): Remove.
35392 (__arm_vmladavaq_s16): Remove.
35393 (__arm_vmladavaq_u32): Remove.
35394 (__arm_vmlsdavaxq_s32): Remove.
35395 (__arm_vmlsdavaq_s32): Remove.
35396 (__arm_vmladavaxq_s32): Remove.
35397 (__arm_vmladavaq_s32): Remove.
35398 (__arm_vmladavaq_p_s8): Remove.
35399 (__arm_vmladavaq_p_s32): Remove.
35400 (__arm_vmladavaq_p_s16): Remove.
35401 (__arm_vmladavaq_p_u8): Remove.
35402 (__arm_vmladavaq_p_u32): Remove.
35403 (__arm_vmladavaq_p_u16): Remove.
35404 (__arm_vmladavaxq_p_s8): Remove.
35405 (__arm_vmladavaxq_p_s32): Remove.
35406 (__arm_vmladavaxq_p_s16): Remove.
35407 (__arm_vmlsdavaq_p_s8): Remove.
35408 (__arm_vmlsdavaq_p_s32): Remove.
35409 (__arm_vmlsdavaq_p_s16): Remove.
35410 (__arm_vmlsdavaxq_p_s8): Remove.
35411 (__arm_vmlsdavaxq_p_s32): Remove.
35412 (__arm_vmlsdavaxq_p_s16): Remove.
35413 (__arm_vmladavaq): Remove.
35414 (__arm_vmlsdavaxq): Remove.
35415 (__arm_vmlsdavaq): Remove.
35416 (__arm_vmladavaxq): Remove.
35417 (__arm_vmladavaq_p): Remove.
35418 (__arm_vmladavaxq_p): Remove.
35419 (__arm_vmlsdavaq_p): Remove.
35420 (__arm_vmlsdavaxq_p): Remove.
35422 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
35424 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int32): New.
35425 * config/arm/arm-mve-builtins-shapes.h (binary_acca_int32): New.
35427 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
35429 * config/arm/arm-mve-builtins-base.cc (vmladavq, vmladavxq)
35430 (vmlsdavq, vmlsdavxq): New.
35431 * config/arm/arm-mve-builtins-base.def (vmladavq, vmladavxq)
35432 (vmlsdavq, vmlsdavxq): New.
35433 * config/arm/arm-mve-builtins-base.h (vmladavq, vmladavxq)
35434 (vmlsdavq, vmlsdavxq): New.
35435 * config/arm/arm_mve.h (vmladavq): Remove.
35436 (vmlsdavxq): Remove.
35437 (vmlsdavq): Remove.
35438 (vmladavxq): Remove.
35439 (vmladavq_p): Remove.
35440 (vmlsdavxq_p): Remove.
35441 (vmlsdavq_p): Remove.
35442 (vmladavxq_p): Remove.
35443 (vmladavq_u8): Remove.
35444 (vmlsdavxq_s8): Remove.
35445 (vmlsdavq_s8): Remove.
35446 (vmladavxq_s8): Remove.
35447 (vmladavq_s8): Remove.
35448 (vmladavq_u16): Remove.
35449 (vmlsdavxq_s16): Remove.
35450 (vmlsdavq_s16): Remove.
35451 (vmladavxq_s16): Remove.
35452 (vmladavq_s16): Remove.
35453 (vmladavq_u32): Remove.
35454 (vmlsdavxq_s32): Remove.
35455 (vmlsdavq_s32): Remove.
35456 (vmladavxq_s32): Remove.
35457 (vmladavq_s32): Remove.
35458 (vmladavq_p_u8): Remove.
35459 (vmlsdavxq_p_s8): Remove.
35460 (vmlsdavq_p_s8): Remove.
35461 (vmladavxq_p_s8): Remove.
35462 (vmladavq_p_s8): Remove.
35463 (vmladavq_p_u16): Remove.
35464 (vmlsdavxq_p_s16): Remove.
35465 (vmlsdavq_p_s16): Remove.
35466 (vmladavxq_p_s16): Remove.
35467 (vmladavq_p_s16): Remove.
35468 (vmladavq_p_u32): Remove.
35469 (vmlsdavxq_p_s32): Remove.
35470 (vmlsdavq_p_s32): Remove.
35471 (vmladavxq_p_s32): Remove.
35472 (vmladavq_p_s32): Remove.
35473 (__arm_vmladavq_u8): Remove.
35474 (__arm_vmlsdavxq_s8): Remove.
35475 (__arm_vmlsdavq_s8): Remove.
35476 (__arm_vmladavxq_s8): Remove.
35477 (__arm_vmladavq_s8): Remove.
35478 (__arm_vmladavq_u16): Remove.
35479 (__arm_vmlsdavxq_s16): Remove.
35480 (__arm_vmlsdavq_s16): Remove.
35481 (__arm_vmladavxq_s16): Remove.
35482 (__arm_vmladavq_s16): Remove.
35483 (__arm_vmladavq_u32): Remove.
35484 (__arm_vmlsdavxq_s32): Remove.
35485 (__arm_vmlsdavq_s32): Remove.
35486 (__arm_vmladavxq_s32): Remove.
35487 (__arm_vmladavq_s32): Remove.
35488 (__arm_vmladavq_p_u8): Remove.
35489 (__arm_vmlsdavxq_p_s8): Remove.
35490 (__arm_vmlsdavq_p_s8): Remove.
35491 (__arm_vmladavxq_p_s8): Remove.
35492 (__arm_vmladavq_p_s8): Remove.
35493 (__arm_vmladavq_p_u16): Remove.
35494 (__arm_vmlsdavxq_p_s16): Remove.
35495 (__arm_vmlsdavq_p_s16): Remove.
35496 (__arm_vmladavxq_p_s16): Remove.
35497 (__arm_vmladavq_p_s16): Remove.
35498 (__arm_vmladavq_p_u32): Remove.
35499 (__arm_vmlsdavxq_p_s32): Remove.
35500 (__arm_vmlsdavq_p_s32): Remove.
35501 (__arm_vmladavxq_p_s32): Remove.
35502 (__arm_vmladavq_p_s32): Remove.
35503 (__arm_vmladavq): Remove.
35504 (__arm_vmlsdavxq): Remove.
35505 (__arm_vmlsdavq): Remove.
35506 (__arm_vmladavxq): Remove.
35507 (__arm_vmladavq_p): Remove.
35508 (__arm_vmlsdavxq_p): Remove.
35509 (__arm_vmlsdavq_p): Remove.
35510 (__arm_vmladavxq_p): Remove.
35512 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
35514 * config/arm/iterators.md (MVE_VMLxDAVQ, MVE_VMLxDAVQ_P)
35515 (MVE_VMLxDAVAQ, MVE_VMLxDAVAQ_P): New.
35516 (mve_insn): Add vmladava, vmladavax, vmladav, vmladavx, vmlsdava,
35517 vmlsdavax, vmlsdav, vmlsdavx.
35518 (supf): Add VMLADAVAXQ_P_S, VMLADAVAXQ_S, VMLADAVXQ_P_S,
35519 VMLADAVXQ_S, VMLSDAVAQ_P_S, VMLSDAVAQ_S, VMLSDAVAXQ_P_S,
35520 VMLSDAVAXQ_S, VMLSDAVQ_P_S, VMLSDAVQ_S, VMLSDAVXQ_P_S,
35522 * config/arm/mve.md (mve_vmladavq_<supf><mode>)
35523 (mve_vmladavxq_s<mode>, mve_vmlsdavq_s<mode>)
35524 (mve_vmlsdavxq_s<mode>): Merge into ...
35525 (@mve_<mve_insn>q_<supf><mode>): ... this.
35526 (mve_vmlsdavaq_s<mode>, mve_vmladavaxq_s<mode>)
35527 (mve_vmlsdavaxq_s<mode>, mve_vmladavaq_<supf><mode>): Merge into
35529 (@mve_<mve_insn>q_<supf><mode>): ... this.
35530 (mve_vmladavq_p_<supf><mode>, mve_vmladavxq_p_s<mode>)
35531 (mve_vmlsdavq_p_s<mode>, mve_vmlsdavxq_p_s<mode>): Merge into ...
35532 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
35533 (mve_vmladavaq_p_<supf><mode>, mve_vmladavaxq_p_s<mode>)
35534 (mve_vmlsdavaq_p_s<mode>, mve_vmlsdavaxq_p_s<mode>): Merge into
35536 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
35538 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
35540 * config/arm/arm-mve-builtins-shapes.cc (binary_acc_int32): New.
35541 * config/arm/arm-mve-builtins-shapes.h (binary_acc_int32): New.
35543 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
35545 * config/arm/arm-mve-builtins-base.cc (vaddlvaq): New.
35546 * config/arm/arm-mve-builtins-base.def (vaddlvaq): New.
35547 * config/arm/arm-mve-builtins-base.h (vaddlvaq): New.
35548 * config/arm/arm_mve.h (vaddlvaq): Remove.
35549 (vaddlvaq_p): Remove.
35550 (vaddlvaq_u32): Remove.
35551 (vaddlvaq_s32): Remove.
35552 (vaddlvaq_p_s32): Remove.
35553 (vaddlvaq_p_u32): Remove.
35554 (__arm_vaddlvaq_u32): Remove.
35555 (__arm_vaddlvaq_s32): Remove.
35556 (__arm_vaddlvaq_p_s32): Remove.
35557 (__arm_vaddlvaq_p_u32): Remove.
35558 (__arm_vaddlvaq): Remove.
35559 (__arm_vaddlvaq_p): Remove.
35561 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
35563 * config/arm/arm-mve-builtins-shapes.cc (unary_widen_acc): New.
35564 * config/arm/arm-mve-builtins-shapes.h (unary_widen_acc): New.
35566 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
35568 * config/arm/iterators.md (mve_insn): Add vaddlva.
35569 * config/arm/mve.md (mve_vaddlvaq_<supf>v4si): Rename into ...
35570 (@mve_<mve_insn>q_<supf>v4si): ... this.
35571 (mve_vaddlvaq_p_<supf>v4si): Rename into ...
35572 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
35574 2023-05-11 Uros Bizjak <ubizjak@gmail.com>
35577 * config/i386/i386.cc (ix86_widen_mult_cost):
35578 Handle V4HImode and V2SImode.
35580 2023-05-11 Andrew Pinski <apinski@marvell.com>
35582 * tree-ssa-dce.cc (simple_dce_from_worklist): For ssa names
35583 defined by a phi node with more than one uses, allow for the
35584 only uses are in that same defining statement.
35586 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
35588 * config/riscv/riscv.cc (riscv_const_insns): Add permissible
35591 2023-05-11 Pan Li <pan2.li@intel.com>
35593 * config/riscv/vector.md: Add comments for simplifying to vmset.
35595 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
35597 * config/riscv/autovec.md (<optab><mode>3): Add scalar shift
35599 (v<optab><mode>3): Add vector shift pattern.
35600 * config/riscv/vector-iterators.md: New iterator.
35602 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
35604 * config/riscv/autovec.md: Use renamed functions.
35605 * config/riscv/riscv-protos.h (emit_vlmax_op): Rename.
35606 (emit_vlmax_reg_op): To this.
35607 (emit_nonvlmax_op): Rename.
35608 (emit_len_op): To this.
35609 (emit_nonvlmax_binop): Rename.
35610 (emit_len_binop): To this.
35611 * config/riscv/riscv-v.cc (emit_pred_op): Add default parameter.
35612 (emit_pred_binop): Remove vlmax_p.
35613 (emit_vlmax_op): Rename.
35614 (emit_vlmax_reg_op): To this.
35615 (emit_nonvlmax_op): Rename.
35616 (emit_len_op): To this.
35617 (emit_nonvlmax_binop): Rename.
35618 (emit_len_binop): To this.
35619 (sew64_scalar_helper): Use renamed functions.
35620 (expand_tuple_move): Use renamed functions.
35621 * config/riscv/riscv.cc (vector_zero_call_used_regs): Use
35623 * config/riscv/vector.md: Use renamed functions.
35625 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
35626 Michael Collison <collison@rivosinc.com>
35628 * config/riscv/autovec.md (<optab><mode>3): Add integer binops.
35629 * config/riscv/riscv-protos.h (emit_nonvlmax_binop): Declare.
35630 * config/riscv/riscv-v.cc (emit_pred_op): New function.
35631 (set_expander_dest_and_mask): New function.
35632 (emit_pred_binop): New function.
35633 (emit_nonvlmax_binop): New function.
35635 2023-05-11 Pan Li <pan2.li@intel.com>
35637 * cfgloopmanip.cc (create_empty_loop_on_edge): Add PLUS_EXPR.
35638 * gimple-loop-interchange.cc
35639 (tree_loop_interchange::map_inductions_to_loop): Ditto.
35640 * tree-ssa-loop-ivcanon.cc (create_canonical_iv): Ditto.
35641 * tree-ssa-loop-ivopts.cc (create_new_iv): Ditto.
35642 * tree-ssa-loop-manip.cc (create_iv): Ditto.
35643 (tree_transform_and_unroll_loop): Ditto.
35644 (canonicalize_loop_ivs): Ditto.
35645 * tree-ssa-loop-manip.h (create_iv): Ditto.
35646 * tree-vect-data-refs.cc (vect_create_data_ref_ptr): Ditto.
35647 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly):
35649 (vect_set_loop_condition_normal): Ditto.
35650 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Ditto.
35651 * tree-vect-stmts.cc (vectorizable_store): Ditto.
35652 (vectorizable_load): Ditto.
35654 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
35656 * config/arm/arm-mve-builtins-base.cc (vmovlbq, vmovltq): New.
35657 * config/arm/arm-mve-builtins-base.def (vmovlbq, vmovltq): New.
35658 * config/arm/arm-mve-builtins-base.h (vmovlbq, vmovltq): New.
35659 * config/arm/arm_mve.h (vmovlbq): Remove.
35661 (vmovlbq_m): Remove.
35662 (vmovltq_m): Remove.
35663 (vmovlbq_x): Remove.
35664 (vmovltq_x): Remove.
35665 (vmovlbq_s8): Remove.
35666 (vmovlbq_s16): Remove.
35667 (vmovltq_s8): Remove.
35668 (vmovltq_s16): Remove.
35669 (vmovltq_u8): Remove.
35670 (vmovltq_u16): Remove.
35671 (vmovlbq_u8): Remove.
35672 (vmovlbq_u16): Remove.
35673 (vmovlbq_m_s8): Remove.
35674 (vmovltq_m_s8): Remove.
35675 (vmovlbq_m_u8): Remove.
35676 (vmovltq_m_u8): Remove.
35677 (vmovlbq_m_s16): Remove.
35678 (vmovltq_m_s16): Remove.
35679 (vmovlbq_m_u16): Remove.
35680 (vmovltq_m_u16): Remove.
35681 (vmovlbq_x_s8): Remove.
35682 (vmovlbq_x_s16): Remove.
35683 (vmovlbq_x_u8): Remove.
35684 (vmovlbq_x_u16): Remove.
35685 (vmovltq_x_s8): Remove.
35686 (vmovltq_x_s16): Remove.
35687 (vmovltq_x_u8): Remove.
35688 (vmovltq_x_u16): Remove.
35689 (__arm_vmovlbq_s8): Remove.
35690 (__arm_vmovlbq_s16): Remove.
35691 (__arm_vmovltq_s8): Remove.
35692 (__arm_vmovltq_s16): Remove.
35693 (__arm_vmovltq_u8): Remove.
35694 (__arm_vmovltq_u16): Remove.
35695 (__arm_vmovlbq_u8): Remove.
35696 (__arm_vmovlbq_u16): Remove.
35697 (__arm_vmovlbq_m_s8): Remove.
35698 (__arm_vmovltq_m_s8): Remove.
35699 (__arm_vmovlbq_m_u8): Remove.
35700 (__arm_vmovltq_m_u8): Remove.
35701 (__arm_vmovlbq_m_s16): Remove.
35702 (__arm_vmovltq_m_s16): Remove.
35703 (__arm_vmovlbq_m_u16): Remove.
35704 (__arm_vmovltq_m_u16): Remove.
35705 (__arm_vmovlbq_x_s8): Remove.
35706 (__arm_vmovlbq_x_s16): Remove.
35707 (__arm_vmovlbq_x_u8): Remove.
35708 (__arm_vmovlbq_x_u16): Remove.
35709 (__arm_vmovltq_x_s8): Remove.
35710 (__arm_vmovltq_x_s16): Remove.
35711 (__arm_vmovltq_x_u8): Remove.
35712 (__arm_vmovltq_x_u16): Remove.
35713 (__arm_vmovlbq): Remove.
35714 (__arm_vmovltq): Remove.
35715 (__arm_vmovlbq_m): Remove.
35716 (__arm_vmovltq_m): Remove.
35717 (__arm_vmovlbq_x): Remove.
35718 (__arm_vmovltq_x): Remove.
35720 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
35722 * config/arm/arm-mve-builtins-shapes.cc (unary_widen): New.
35723 * config/arm/arm-mve-builtins-shapes.h (unary_widen): New.
35725 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
35727 * config/arm/iterators.md (mve_insn): Add vmovlb, vmovlt.
35728 (VMOVLBQ, VMOVLTQ): Merge into ...
35729 (VMOVLxQ): ... this.
35730 (VMOVLTQ_M, VMOVLBQ_M): Merge into ...
35731 (VMOVLxQ_M): ... this.
35732 * config/arm/mve.md (mve_vmovltq_<supf><mode>)
35733 (mve_vmovlbq_<supf><mode>): Merge into ...
35734 (@mve_<mve_insn>q_<supf><mode>): ... this.
35735 (mve_vmovlbq_m_<supf><mode>, mve_vmovltq_m_<supf><mode>): Merge
35737 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
35739 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
35741 * config/arm/arm-mve-builtins-base.cc (vaddlvq): New.
35742 * config/arm/arm-mve-builtins-base.def (vaddlvq): New.
35743 * config/arm/arm-mve-builtins-base.h (vaddlvq): New.
35744 * config/arm/arm-mve-builtins-functions.h
35745 (unspec_mve_function_exact_insn_pred_p): Handle vaddlvq.
35746 * config/arm/arm_mve.h (vaddlvq): Remove.
35747 (vaddlvq_p): Remove.
35748 (vaddlvq_s32): Remove.
35749 (vaddlvq_u32): Remove.
35750 (vaddlvq_p_s32): Remove.
35751 (vaddlvq_p_u32): Remove.
35752 (__arm_vaddlvq_s32): Remove.
35753 (__arm_vaddlvq_u32): Remove.
35754 (__arm_vaddlvq_p_s32): Remove.
35755 (__arm_vaddlvq_p_u32): Remove.
35756 (__arm_vaddlvq): Remove.
35757 (__arm_vaddlvq_p): Remove.
35759 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
35761 * config/arm/iterators.md (mve_insn): Add vaddlv.
35762 * config/arm/mve.md (mve_vaddlvq_<supf>v4si): Rename into ...
35763 (@mve_<mve_insn>q_<supf>v4si): ... this.
35764 (mve_vaddlvq_p_<supf>v4si): Rename into ...
35765 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
35767 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
35769 * config/arm/arm-mve-builtins-shapes.cc (unary_acc): New.
35770 * config/arm/arm-mve-builtins-shapes.h (unary_acc): New.
35772 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
35774 * config/arm/arm-mve-builtins-base.cc (vaddvaq): New.
35775 * config/arm/arm-mve-builtins-base.def (vaddvaq): New.
35776 * config/arm/arm-mve-builtins-base.h (vaddvaq): New.
35777 * config/arm/arm_mve.h (vaddvaq): Remove.
35778 (vaddvaq_p): Remove.
35779 (vaddvaq_u8): Remove.
35780 (vaddvaq_s8): Remove.
35781 (vaddvaq_u16): Remove.
35782 (vaddvaq_s16): Remove.
35783 (vaddvaq_u32): Remove.
35784 (vaddvaq_s32): Remove.
35785 (vaddvaq_p_u8): Remove.
35786 (vaddvaq_p_s8): Remove.
35787 (vaddvaq_p_u16): Remove.
35788 (vaddvaq_p_s16): Remove.
35789 (vaddvaq_p_u32): Remove.
35790 (vaddvaq_p_s32): Remove.
35791 (__arm_vaddvaq_u8): Remove.
35792 (__arm_vaddvaq_s8): Remove.
35793 (__arm_vaddvaq_u16): Remove.
35794 (__arm_vaddvaq_s16): Remove.
35795 (__arm_vaddvaq_u32): Remove.
35796 (__arm_vaddvaq_s32): Remove.
35797 (__arm_vaddvaq_p_u8): Remove.
35798 (__arm_vaddvaq_p_s8): Remove.
35799 (__arm_vaddvaq_p_u16): Remove.
35800 (__arm_vaddvaq_p_s16): Remove.
35801 (__arm_vaddvaq_p_u32): Remove.
35802 (__arm_vaddvaq_p_s32): Remove.
35803 (__arm_vaddvaq): Remove.
35804 (__arm_vaddvaq_p): Remove.
35806 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
35808 * config/arm/arm-mve-builtins-shapes.cc (unary_int32_acc): New.
35809 * config/arm/arm-mve-builtins-shapes.h (unary_int32_acc): New.
35811 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
35813 * config/arm/iterators.md (mve_insn): Add vaddva.
35814 * config/arm/mve.md (mve_vaddvaq_<supf><mode>): Rename into ...
35815 (@mve_<mve_insn>q_<supf><mode>): ... this.
35816 (mve_vaddvaq_p_<supf><mode>): Rename into ...
35817 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
35819 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
35821 * config/arm/arm-mve-builtins-base.cc (vaddvq): New.
35822 * config/arm/arm-mve-builtins-base.def (vaddvq): New.
35823 * config/arm/arm-mve-builtins-base.h (vaddvq): New.
35824 * config/arm/arm_mve.h (vaddvq): Remove.
35825 (vaddvq_p): Remove.
35826 (vaddvq_s8): Remove.
35827 (vaddvq_s16): Remove.
35828 (vaddvq_s32): Remove.
35829 (vaddvq_u8): Remove.
35830 (vaddvq_u16): Remove.
35831 (vaddvq_u32): Remove.
35832 (vaddvq_p_u8): Remove.
35833 (vaddvq_p_s8): Remove.
35834 (vaddvq_p_u16): Remove.
35835 (vaddvq_p_s16): Remove.
35836 (vaddvq_p_u32): Remove.
35837 (vaddvq_p_s32): Remove.
35838 (__arm_vaddvq_s8): Remove.
35839 (__arm_vaddvq_s16): Remove.
35840 (__arm_vaddvq_s32): Remove.
35841 (__arm_vaddvq_u8): Remove.
35842 (__arm_vaddvq_u16): Remove.
35843 (__arm_vaddvq_u32): Remove.
35844 (__arm_vaddvq_p_u8): Remove.
35845 (__arm_vaddvq_p_s8): Remove.
35846 (__arm_vaddvq_p_u16): Remove.
35847 (__arm_vaddvq_p_s16): Remove.
35848 (__arm_vaddvq_p_u32): Remove.
35849 (__arm_vaddvq_p_s32): Remove.
35850 (__arm_vaddvq): Remove.
35851 (__arm_vaddvq_p): Remove.
35853 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
35855 * config/arm/arm-mve-builtins-shapes.cc (unary_int32): New.
35856 * config/arm/arm-mve-builtins-shapes.h (unary_int32): New.
35858 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
35860 * config/arm/iterators.md (mve_insn): Add vaddv.
35861 * config/arm/mve.md (@mve_vaddvq_<supf><mode>): Rename into ...
35862 (@mve_<mve_insn>q_<supf><mode>): ... this.
35863 (mve_vaddvq_p_<supf><mode>): Rename into ...
35864 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
35865 * config/arm/vec-common.md: Use gen_mve_q instead of
35868 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
35870 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N): New.
35872 * config/arm/arm-mve-builtins-base.def (vdupq): New.
35873 * config/arm/arm-mve-builtins-base.h: (vdupq): New.
35874 * config/arm/arm_mve.h (vdupq_n): Remove.
35876 (vdupq_n_f16): Remove.
35877 (vdupq_n_f32): Remove.
35878 (vdupq_n_s8): Remove.
35879 (vdupq_n_s16): Remove.
35880 (vdupq_n_s32): Remove.
35881 (vdupq_n_u8): Remove.
35882 (vdupq_n_u16): Remove.
35883 (vdupq_n_u32): Remove.
35884 (vdupq_m_n_u8): Remove.
35885 (vdupq_m_n_s8): Remove.
35886 (vdupq_m_n_u16): Remove.
35887 (vdupq_m_n_s16): Remove.
35888 (vdupq_m_n_u32): Remove.
35889 (vdupq_m_n_s32): Remove.
35890 (vdupq_m_n_f16): Remove.
35891 (vdupq_m_n_f32): Remove.
35892 (vdupq_x_n_s8): Remove.
35893 (vdupq_x_n_s16): Remove.
35894 (vdupq_x_n_s32): Remove.
35895 (vdupq_x_n_u8): Remove.
35896 (vdupq_x_n_u16): Remove.
35897 (vdupq_x_n_u32): Remove.
35898 (vdupq_x_n_f16): Remove.
35899 (vdupq_x_n_f32): Remove.
35900 (__arm_vdupq_n_s8): Remove.
35901 (__arm_vdupq_n_s16): Remove.
35902 (__arm_vdupq_n_s32): Remove.
35903 (__arm_vdupq_n_u8): Remove.
35904 (__arm_vdupq_n_u16): Remove.
35905 (__arm_vdupq_n_u32): Remove.
35906 (__arm_vdupq_m_n_u8): Remove.
35907 (__arm_vdupq_m_n_s8): Remove.
35908 (__arm_vdupq_m_n_u16): Remove.
35909 (__arm_vdupq_m_n_s16): Remove.
35910 (__arm_vdupq_m_n_u32): Remove.
35911 (__arm_vdupq_m_n_s32): Remove.
35912 (__arm_vdupq_x_n_s8): Remove.
35913 (__arm_vdupq_x_n_s16): Remove.
35914 (__arm_vdupq_x_n_s32): Remove.
35915 (__arm_vdupq_x_n_u8): Remove.
35916 (__arm_vdupq_x_n_u16): Remove.
35917 (__arm_vdupq_x_n_u32): Remove.
35918 (__arm_vdupq_n_f16): Remove.
35919 (__arm_vdupq_n_f32): Remove.
35920 (__arm_vdupq_m_n_f16): Remove.
35921 (__arm_vdupq_m_n_f32): Remove.
35922 (__arm_vdupq_x_n_f16): Remove.
35923 (__arm_vdupq_x_n_f32): Remove.
35924 (__arm_vdupq_n): Remove.
35925 (__arm_vdupq_m): Remove.
35927 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
35929 * config/arm/arm-mve-builtins-shapes.cc (unary_n): New.
35930 * config/arm/arm-mve-builtins-shapes.h (unary_n): New.
35932 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
35934 * config/arm/iterators.md (MVE_FP_M_N_VDUPQ_ONLY)
35935 (MVE_FP_N_VDUPQ_ONLY): New.
35936 (mve_insn): Add vdupq.
35937 * config/arm/mve.md (mve_vdupq_n_f<mode>): Rename into ...
35938 (@mve_<mve_insn>q_n_f<mode>): ... this.
35939 (mve_vdupq_n_<supf><mode>): Rename into ...
35940 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
35941 (mve_vdupq_m_n_<supf><mode>): Rename into ...
35942 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
35943 (mve_vdupq_m_n_f<mode>): Rename into ...
35944 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
35946 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
35948 * config/arm/arm-mve-builtins-base.cc (vrev16q, vrev32q, vrev64q):
35950 * config/arm/arm-mve-builtins-base.def (vrev16q, vrev32q)
35952 * config/arm/arm-mve-builtins-base.h (vrev16q, vrev32q)
35954 * config/arm/arm_mve.h (vrev16q): Remove.
35957 (vrev64q_m): Remove.
35958 (vrev16q_m): Remove.
35959 (vrev32q_m): Remove.
35960 (vrev16q_x): Remove.
35961 (vrev32q_x): Remove.
35962 (vrev64q_x): Remove.
35963 (vrev64q_f16): Remove.
35964 (vrev64q_f32): Remove.
35965 (vrev32q_f16): Remove.
35966 (vrev16q_s8): Remove.
35967 (vrev32q_s8): Remove.
35968 (vrev32q_s16): Remove.
35969 (vrev64q_s8): Remove.
35970 (vrev64q_s16): Remove.
35971 (vrev64q_s32): Remove.
35972 (vrev64q_u8): Remove.
35973 (vrev64q_u16): Remove.
35974 (vrev64q_u32): Remove.
35975 (vrev32q_u8): Remove.
35976 (vrev32q_u16): Remove.
35977 (vrev16q_u8): Remove.
35978 (vrev64q_m_u8): Remove.
35979 (vrev64q_m_s8): Remove.
35980 (vrev64q_m_u16): Remove.
35981 (vrev64q_m_s16): Remove.
35982 (vrev64q_m_u32): Remove.
35983 (vrev64q_m_s32): Remove.
35984 (vrev16q_m_s8): Remove.
35985 (vrev32q_m_f16): Remove.
35986 (vrev16q_m_u8): Remove.
35987 (vrev32q_m_s8): Remove.
35988 (vrev64q_m_f16): Remove.
35989 (vrev32q_m_u8): Remove.
35990 (vrev32q_m_s16): Remove.
35991 (vrev64q_m_f32): Remove.
35992 (vrev32q_m_u16): Remove.
35993 (vrev16q_x_s8): Remove.
35994 (vrev16q_x_u8): Remove.
35995 (vrev32q_x_s8): Remove.
35996 (vrev32q_x_s16): Remove.
35997 (vrev32q_x_u8): Remove.
35998 (vrev32q_x_u16): Remove.
35999 (vrev64q_x_s8): Remove.
36000 (vrev64q_x_s16): Remove.
36001 (vrev64q_x_s32): Remove.
36002 (vrev64q_x_u8): Remove.
36003 (vrev64q_x_u16): Remove.
36004 (vrev64q_x_u32): Remove.
36005 (vrev32q_x_f16): Remove.
36006 (vrev64q_x_f16): Remove.
36007 (vrev64q_x_f32): Remove.
36008 (__arm_vrev16q_s8): Remove.
36009 (__arm_vrev32q_s8): Remove.
36010 (__arm_vrev32q_s16): Remove.
36011 (__arm_vrev64q_s8): Remove.
36012 (__arm_vrev64q_s16): Remove.
36013 (__arm_vrev64q_s32): Remove.
36014 (__arm_vrev64q_u8): Remove.
36015 (__arm_vrev64q_u16): Remove.
36016 (__arm_vrev64q_u32): Remove.
36017 (__arm_vrev32q_u8): Remove.
36018 (__arm_vrev32q_u16): Remove.
36019 (__arm_vrev16q_u8): Remove.
36020 (__arm_vrev64q_m_u8): Remove.
36021 (__arm_vrev64q_m_s8): Remove.
36022 (__arm_vrev64q_m_u16): Remove.
36023 (__arm_vrev64q_m_s16): Remove.
36024 (__arm_vrev64q_m_u32): Remove.
36025 (__arm_vrev64q_m_s32): Remove.
36026 (__arm_vrev16q_m_s8): Remove.
36027 (__arm_vrev16q_m_u8): Remove.
36028 (__arm_vrev32q_m_s8): Remove.
36029 (__arm_vrev32q_m_u8): Remove.
36030 (__arm_vrev32q_m_s16): Remove.
36031 (__arm_vrev32q_m_u16): Remove.
36032 (__arm_vrev16q_x_s8): Remove.
36033 (__arm_vrev16q_x_u8): Remove.
36034 (__arm_vrev32q_x_s8): Remove.
36035 (__arm_vrev32q_x_s16): Remove.
36036 (__arm_vrev32q_x_u8): Remove.
36037 (__arm_vrev32q_x_u16): Remove.
36038 (__arm_vrev64q_x_s8): Remove.
36039 (__arm_vrev64q_x_s16): Remove.
36040 (__arm_vrev64q_x_s32): Remove.
36041 (__arm_vrev64q_x_u8): Remove.
36042 (__arm_vrev64q_x_u16): Remove.
36043 (__arm_vrev64q_x_u32): Remove.
36044 (__arm_vrev64q_f16): Remove.
36045 (__arm_vrev64q_f32): Remove.
36046 (__arm_vrev32q_f16): Remove.
36047 (__arm_vrev32q_m_f16): Remove.
36048 (__arm_vrev64q_m_f16): Remove.
36049 (__arm_vrev64q_m_f32): Remove.
36050 (__arm_vrev32q_x_f16): Remove.
36051 (__arm_vrev64q_x_f16): Remove.
36052 (__arm_vrev64q_x_f32): Remove.
36053 (__arm_vrev16q): Remove.
36054 (__arm_vrev32q): Remove.
36055 (__arm_vrev64q): Remove.
36056 (__arm_vrev64q_m): Remove.
36057 (__arm_vrev16q_m): Remove.
36058 (__arm_vrev32q_m): Remove.
36059 (__arm_vrev16q_x): Remove.
36060 (__arm_vrev32q_x): Remove.
36061 (__arm_vrev64q_x): Remove.
36063 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
36065 * config/arm/iterators.md (MVE_V8HF, MVE_V16QI)
36066 (MVE_FP_VREV64Q_ONLY, MVE_FP_M_VREV64Q_ONLY, MVE_FP_VREV32Q_ONLY)
36067 (MVE_FP_M_VREV32Q_ONLY): New iterators.
36068 (mve_insn): Add vrev16q, vrev32q, vrev64q.
36069 * config/arm/mve.md (mve_vrev64q_f<mode>): Rename into ...
36070 (@mve_<mve_insn>q_f<mode>): ... this
36071 (mve_vrev32q_fv8hf): Rename into @mve_<mve_insn>q_f<mode>.
36072 (mve_vrev64q_<supf><mode>): Rename into ...
36073 (@mve_<mve_insn>q_<supf><mode>): ... this.
36074 (mve_vrev32q_<supf><mode>): Rename into
36075 @mve_<mve_insn>q_<supf><mode>.
36076 (mve_vrev16q_<supf>v16qi): Rename into
36077 @mve_<mve_insn>q_<supf><mode>.
36078 (mve_vrev64q_m_<supf><mode>): Rename into
36079 @mve_<mve_insn>q_m_<supf><mode>.
36080 (mve_vrev32q_m_fv8hf): Rename into @mve_<mve_insn>q_m_f<mode>.
36081 (mve_vrev32q_m_<supf><mode>): Rename into
36082 @mve_<mve_insn>q_m_<supf><mode>.
36083 (mve_vrev64q_m_f<mode>): Rename into @mve_<mve_insn>q_m_f<mode>.
36084 (mve_vrev16q_m_<supf>v16qi): Rename into
36085 @mve_<mve_insn>q_m_<supf><mode>.
36087 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
36089 * config/arm/arm-mve-builtins-base.cc (vcmpeqq, vcmpneq, vcmpgeq)
36090 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
36091 * config/arm/arm-mve-builtins-base.def (vcmpeqq, vcmpneq, vcmpgeq)
36092 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
36093 * config/arm/arm-mve-builtins-base.h (vcmpeqq, vcmpneq, vcmpgeq)
36094 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
36095 * config/arm/arm-mve-builtins-functions.h (class
36096 unspec_based_mve_function_exact_insn_vcmp): New.
36097 * config/arm/arm-mve-builtins.cc
36098 (function_instance::has_inactive_argument): Handle vcmp.
36099 * config/arm/arm_mve.h (vcmpneq): Remove.
36107 (vcmpneq_m): Remove.
36108 (vcmphiq_m): Remove.
36109 (vcmpeqq_m): Remove.
36110 (vcmpcsq_m): Remove.
36111 (vcmpcsq_m_n): Remove.
36112 (vcmpltq_m): Remove.
36113 (vcmpleq_m): Remove.
36114 (vcmpgtq_m): Remove.
36115 (vcmpgeq_m): Remove.
36116 (vcmpneq_s8): Remove.
36117 (vcmpneq_s16): Remove.
36118 (vcmpneq_s32): Remove.
36119 (vcmpneq_u8): Remove.
36120 (vcmpneq_u16): Remove.
36121 (vcmpneq_u32): Remove.
36122 (vcmpneq_n_u8): Remove.
36123 (vcmphiq_u8): Remove.
36124 (vcmphiq_n_u8): Remove.
36125 (vcmpeqq_u8): Remove.
36126 (vcmpeqq_n_u8): Remove.
36127 (vcmpcsq_u8): Remove.
36128 (vcmpcsq_n_u8): Remove.
36129 (vcmpneq_n_s8): Remove.
36130 (vcmpltq_s8): Remove.
36131 (vcmpltq_n_s8): Remove.
36132 (vcmpleq_s8): Remove.
36133 (vcmpleq_n_s8): Remove.
36134 (vcmpgtq_s8): Remove.
36135 (vcmpgtq_n_s8): Remove.
36136 (vcmpgeq_s8): Remove.
36137 (vcmpgeq_n_s8): Remove.
36138 (vcmpeqq_s8): Remove.
36139 (vcmpeqq_n_s8): Remove.
36140 (vcmpneq_n_u16): Remove.
36141 (vcmphiq_u16): Remove.
36142 (vcmphiq_n_u16): Remove.
36143 (vcmpeqq_u16): Remove.
36144 (vcmpeqq_n_u16): Remove.
36145 (vcmpcsq_u16): Remove.
36146 (vcmpcsq_n_u16): Remove.
36147 (vcmpneq_n_s16): Remove.
36148 (vcmpltq_s16): Remove.
36149 (vcmpltq_n_s16): Remove.
36150 (vcmpleq_s16): Remove.
36151 (vcmpleq_n_s16): Remove.
36152 (vcmpgtq_s16): Remove.
36153 (vcmpgtq_n_s16): Remove.
36154 (vcmpgeq_s16): Remove.
36155 (vcmpgeq_n_s16): Remove.
36156 (vcmpeqq_s16): Remove.
36157 (vcmpeqq_n_s16): Remove.
36158 (vcmpneq_n_u32): Remove.
36159 (vcmphiq_u32): Remove.
36160 (vcmphiq_n_u32): Remove.
36161 (vcmpeqq_u32): Remove.
36162 (vcmpeqq_n_u32): Remove.
36163 (vcmpcsq_u32): Remove.
36164 (vcmpcsq_n_u32): Remove.
36165 (vcmpneq_n_s32): Remove.
36166 (vcmpltq_s32): Remove.
36167 (vcmpltq_n_s32): Remove.
36168 (vcmpleq_s32): Remove.
36169 (vcmpleq_n_s32): Remove.
36170 (vcmpgtq_s32): Remove.
36171 (vcmpgtq_n_s32): Remove.
36172 (vcmpgeq_s32): Remove.
36173 (vcmpgeq_n_s32): Remove.
36174 (vcmpeqq_s32): Remove.
36175 (vcmpeqq_n_s32): Remove.
36176 (vcmpneq_n_f16): Remove.
36177 (vcmpneq_f16): Remove.
36178 (vcmpltq_n_f16): Remove.
36179 (vcmpltq_f16): Remove.
36180 (vcmpleq_n_f16): Remove.
36181 (vcmpleq_f16): Remove.
36182 (vcmpgtq_n_f16): Remove.
36183 (vcmpgtq_f16): Remove.
36184 (vcmpgeq_n_f16): Remove.
36185 (vcmpgeq_f16): Remove.
36186 (vcmpeqq_n_f16): Remove.
36187 (vcmpeqq_f16): Remove.
36188 (vcmpneq_n_f32): Remove.
36189 (vcmpneq_f32): Remove.
36190 (vcmpltq_n_f32): Remove.
36191 (vcmpltq_f32): Remove.
36192 (vcmpleq_n_f32): Remove.
36193 (vcmpleq_f32): Remove.
36194 (vcmpgtq_n_f32): Remove.
36195 (vcmpgtq_f32): Remove.
36196 (vcmpgeq_n_f32): Remove.
36197 (vcmpgeq_f32): Remove.
36198 (vcmpeqq_n_f32): Remove.
36199 (vcmpeqq_f32): Remove.
36200 (vcmpeqq_m_f16): Remove.
36201 (vcmpeqq_m_f32): Remove.
36202 (vcmpneq_m_u8): Remove.
36203 (vcmpneq_m_n_u8): Remove.
36204 (vcmphiq_m_u8): Remove.
36205 (vcmphiq_m_n_u8): Remove.
36206 (vcmpeqq_m_u8): Remove.
36207 (vcmpeqq_m_n_u8): Remove.
36208 (vcmpcsq_m_u8): Remove.
36209 (vcmpcsq_m_n_u8): Remove.
36210 (vcmpneq_m_s8): Remove.
36211 (vcmpneq_m_n_s8): Remove.
36212 (vcmpltq_m_s8): Remove.
36213 (vcmpltq_m_n_s8): Remove.
36214 (vcmpleq_m_s8): Remove.
36215 (vcmpleq_m_n_s8): Remove.
36216 (vcmpgtq_m_s8): Remove.
36217 (vcmpgtq_m_n_s8): Remove.
36218 (vcmpgeq_m_s8): Remove.
36219 (vcmpgeq_m_n_s8): Remove.
36220 (vcmpeqq_m_s8): Remove.
36221 (vcmpeqq_m_n_s8): Remove.
36222 (vcmpneq_m_u16): Remove.
36223 (vcmpneq_m_n_u16): Remove.
36224 (vcmphiq_m_u16): Remove.
36225 (vcmphiq_m_n_u16): Remove.
36226 (vcmpeqq_m_u16): Remove.
36227 (vcmpeqq_m_n_u16): Remove.
36228 (vcmpcsq_m_u16): Remove.
36229 (vcmpcsq_m_n_u16): Remove.
36230 (vcmpneq_m_s16): Remove.
36231 (vcmpneq_m_n_s16): Remove.
36232 (vcmpltq_m_s16): Remove.
36233 (vcmpltq_m_n_s16): Remove.
36234 (vcmpleq_m_s16): Remove.
36235 (vcmpleq_m_n_s16): Remove.
36236 (vcmpgtq_m_s16): Remove.
36237 (vcmpgtq_m_n_s16): Remove.
36238 (vcmpgeq_m_s16): Remove.
36239 (vcmpgeq_m_n_s16): Remove.
36240 (vcmpeqq_m_s16): Remove.
36241 (vcmpeqq_m_n_s16): Remove.
36242 (vcmpneq_m_u32): Remove.
36243 (vcmpneq_m_n_u32): Remove.
36244 (vcmphiq_m_u32): Remove.
36245 (vcmphiq_m_n_u32): Remove.
36246 (vcmpeqq_m_u32): Remove.
36247 (vcmpeqq_m_n_u32): Remove.
36248 (vcmpcsq_m_u32): Remove.
36249 (vcmpcsq_m_n_u32): Remove.
36250 (vcmpneq_m_s32): Remove.
36251 (vcmpneq_m_n_s32): Remove.
36252 (vcmpltq_m_s32): Remove.
36253 (vcmpltq_m_n_s32): Remove.
36254 (vcmpleq_m_s32): Remove.
36255 (vcmpleq_m_n_s32): Remove.
36256 (vcmpgtq_m_s32): Remove.
36257 (vcmpgtq_m_n_s32): Remove.
36258 (vcmpgeq_m_s32): Remove.
36259 (vcmpgeq_m_n_s32): Remove.
36260 (vcmpeqq_m_s32): Remove.
36261 (vcmpeqq_m_n_s32): Remove.
36262 (vcmpeqq_m_n_f16): Remove.
36263 (vcmpgeq_m_f16): Remove.
36264 (vcmpgeq_m_n_f16): Remove.
36265 (vcmpgtq_m_f16): Remove.
36266 (vcmpgtq_m_n_f16): Remove.
36267 (vcmpleq_m_f16): Remove.
36268 (vcmpleq_m_n_f16): Remove.
36269 (vcmpltq_m_f16): Remove.
36270 (vcmpltq_m_n_f16): Remove.
36271 (vcmpneq_m_f16): Remove.
36272 (vcmpneq_m_n_f16): Remove.
36273 (vcmpeqq_m_n_f32): Remove.
36274 (vcmpgeq_m_f32): Remove.
36275 (vcmpgeq_m_n_f32): Remove.
36276 (vcmpgtq_m_f32): Remove.
36277 (vcmpgtq_m_n_f32): Remove.
36278 (vcmpleq_m_f32): Remove.
36279 (vcmpleq_m_n_f32): Remove.
36280 (vcmpltq_m_f32): Remove.
36281 (vcmpltq_m_n_f32): Remove.
36282 (vcmpneq_m_f32): Remove.
36283 (vcmpneq_m_n_f32): Remove.
36284 (__arm_vcmpneq_s8): Remove.
36285 (__arm_vcmpneq_s16): Remove.
36286 (__arm_vcmpneq_s32): Remove.
36287 (__arm_vcmpneq_u8): Remove.
36288 (__arm_vcmpneq_u16): Remove.
36289 (__arm_vcmpneq_u32): Remove.
36290 (__arm_vcmpneq_n_u8): Remove.
36291 (__arm_vcmphiq_u8): Remove.
36292 (__arm_vcmphiq_n_u8): Remove.
36293 (__arm_vcmpeqq_u8): Remove.
36294 (__arm_vcmpeqq_n_u8): Remove.
36295 (__arm_vcmpcsq_u8): Remove.
36296 (__arm_vcmpcsq_n_u8): Remove.
36297 (__arm_vcmpneq_n_s8): Remove.
36298 (__arm_vcmpltq_s8): Remove.
36299 (__arm_vcmpltq_n_s8): Remove.
36300 (__arm_vcmpleq_s8): Remove.
36301 (__arm_vcmpleq_n_s8): Remove.
36302 (__arm_vcmpgtq_s8): Remove.
36303 (__arm_vcmpgtq_n_s8): Remove.
36304 (__arm_vcmpgeq_s8): Remove.
36305 (__arm_vcmpgeq_n_s8): Remove.
36306 (__arm_vcmpeqq_s8): Remove.
36307 (__arm_vcmpeqq_n_s8): Remove.
36308 (__arm_vcmpneq_n_u16): Remove.
36309 (__arm_vcmphiq_u16): Remove.
36310 (__arm_vcmphiq_n_u16): Remove.
36311 (__arm_vcmpeqq_u16): Remove.
36312 (__arm_vcmpeqq_n_u16): Remove.
36313 (__arm_vcmpcsq_u16): Remove.
36314 (__arm_vcmpcsq_n_u16): Remove.
36315 (__arm_vcmpneq_n_s16): Remove.
36316 (__arm_vcmpltq_s16): Remove.
36317 (__arm_vcmpltq_n_s16): Remove.
36318 (__arm_vcmpleq_s16): Remove.
36319 (__arm_vcmpleq_n_s16): Remove.
36320 (__arm_vcmpgtq_s16): Remove.
36321 (__arm_vcmpgtq_n_s16): Remove.
36322 (__arm_vcmpgeq_s16): Remove.
36323 (__arm_vcmpgeq_n_s16): Remove.
36324 (__arm_vcmpeqq_s16): Remove.
36325 (__arm_vcmpeqq_n_s16): Remove.
36326 (__arm_vcmpneq_n_u32): Remove.
36327 (__arm_vcmphiq_u32): Remove.
36328 (__arm_vcmphiq_n_u32): Remove.
36329 (__arm_vcmpeqq_u32): Remove.
36330 (__arm_vcmpeqq_n_u32): Remove.
36331 (__arm_vcmpcsq_u32): Remove.
36332 (__arm_vcmpcsq_n_u32): Remove.
36333 (__arm_vcmpneq_n_s32): Remove.
36334 (__arm_vcmpltq_s32): Remove.
36335 (__arm_vcmpltq_n_s32): Remove.
36336 (__arm_vcmpleq_s32): Remove.
36337 (__arm_vcmpleq_n_s32): Remove.
36338 (__arm_vcmpgtq_s32): Remove.
36339 (__arm_vcmpgtq_n_s32): Remove.
36340 (__arm_vcmpgeq_s32): Remove.
36341 (__arm_vcmpgeq_n_s32): Remove.
36342 (__arm_vcmpeqq_s32): Remove.
36343 (__arm_vcmpeqq_n_s32): Remove.
36344 (__arm_vcmpneq_m_u8): Remove.
36345 (__arm_vcmpneq_m_n_u8): Remove.
36346 (__arm_vcmphiq_m_u8): Remove.
36347 (__arm_vcmphiq_m_n_u8): Remove.
36348 (__arm_vcmpeqq_m_u8): Remove.
36349 (__arm_vcmpeqq_m_n_u8): Remove.
36350 (__arm_vcmpcsq_m_u8): Remove.
36351 (__arm_vcmpcsq_m_n_u8): Remove.
36352 (__arm_vcmpneq_m_s8): Remove.
36353 (__arm_vcmpneq_m_n_s8): Remove.
36354 (__arm_vcmpltq_m_s8): Remove.
36355 (__arm_vcmpltq_m_n_s8): Remove.
36356 (__arm_vcmpleq_m_s8): Remove.
36357 (__arm_vcmpleq_m_n_s8): Remove.
36358 (__arm_vcmpgtq_m_s8): Remove.
36359 (__arm_vcmpgtq_m_n_s8): Remove.
36360 (__arm_vcmpgeq_m_s8): Remove.
36361 (__arm_vcmpgeq_m_n_s8): Remove.
36362 (__arm_vcmpeqq_m_s8): Remove.
36363 (__arm_vcmpeqq_m_n_s8): Remove.
36364 (__arm_vcmpneq_m_u16): Remove.
36365 (__arm_vcmpneq_m_n_u16): Remove.
36366 (__arm_vcmphiq_m_u16): Remove.
36367 (__arm_vcmphiq_m_n_u16): Remove.
36368 (__arm_vcmpeqq_m_u16): Remove.
36369 (__arm_vcmpeqq_m_n_u16): Remove.
36370 (__arm_vcmpcsq_m_u16): Remove.
36371 (__arm_vcmpcsq_m_n_u16): Remove.
36372 (__arm_vcmpneq_m_s16): Remove.
36373 (__arm_vcmpneq_m_n_s16): Remove.
36374 (__arm_vcmpltq_m_s16): Remove.
36375 (__arm_vcmpltq_m_n_s16): Remove.
36376 (__arm_vcmpleq_m_s16): Remove.
36377 (__arm_vcmpleq_m_n_s16): Remove.
36378 (__arm_vcmpgtq_m_s16): Remove.
36379 (__arm_vcmpgtq_m_n_s16): Remove.
36380 (__arm_vcmpgeq_m_s16): Remove.
36381 (__arm_vcmpgeq_m_n_s16): Remove.
36382 (__arm_vcmpeqq_m_s16): Remove.
36383 (__arm_vcmpeqq_m_n_s16): Remove.
36384 (__arm_vcmpneq_m_u32): Remove.
36385 (__arm_vcmpneq_m_n_u32): Remove.
36386 (__arm_vcmphiq_m_u32): Remove.
36387 (__arm_vcmphiq_m_n_u32): Remove.
36388 (__arm_vcmpeqq_m_u32): Remove.
36389 (__arm_vcmpeqq_m_n_u32): Remove.
36390 (__arm_vcmpcsq_m_u32): Remove.
36391 (__arm_vcmpcsq_m_n_u32): Remove.
36392 (__arm_vcmpneq_m_s32): Remove.
36393 (__arm_vcmpneq_m_n_s32): Remove.
36394 (__arm_vcmpltq_m_s32): Remove.
36395 (__arm_vcmpltq_m_n_s32): Remove.
36396 (__arm_vcmpleq_m_s32): Remove.
36397 (__arm_vcmpleq_m_n_s32): Remove.
36398 (__arm_vcmpgtq_m_s32): Remove.
36399 (__arm_vcmpgtq_m_n_s32): Remove.
36400 (__arm_vcmpgeq_m_s32): Remove.
36401 (__arm_vcmpgeq_m_n_s32): Remove.
36402 (__arm_vcmpeqq_m_s32): Remove.
36403 (__arm_vcmpeqq_m_n_s32): Remove.
36404 (__arm_vcmpneq_n_f16): Remove.
36405 (__arm_vcmpneq_f16): Remove.
36406 (__arm_vcmpltq_n_f16): Remove.
36407 (__arm_vcmpltq_f16): Remove.
36408 (__arm_vcmpleq_n_f16): Remove.
36409 (__arm_vcmpleq_f16): Remove.
36410 (__arm_vcmpgtq_n_f16): Remove.
36411 (__arm_vcmpgtq_f16): Remove.
36412 (__arm_vcmpgeq_n_f16): Remove.
36413 (__arm_vcmpgeq_f16): Remove.
36414 (__arm_vcmpeqq_n_f16): Remove.
36415 (__arm_vcmpeqq_f16): Remove.
36416 (__arm_vcmpneq_n_f32): Remove.
36417 (__arm_vcmpneq_f32): Remove.
36418 (__arm_vcmpltq_n_f32): Remove.
36419 (__arm_vcmpltq_f32): Remove.
36420 (__arm_vcmpleq_n_f32): Remove.
36421 (__arm_vcmpleq_f32): Remove.
36422 (__arm_vcmpgtq_n_f32): Remove.
36423 (__arm_vcmpgtq_f32): Remove.
36424 (__arm_vcmpgeq_n_f32): Remove.
36425 (__arm_vcmpgeq_f32): Remove.
36426 (__arm_vcmpeqq_n_f32): Remove.
36427 (__arm_vcmpeqq_f32): Remove.
36428 (__arm_vcmpeqq_m_f16): Remove.
36429 (__arm_vcmpeqq_m_f32): Remove.
36430 (__arm_vcmpeqq_m_n_f16): Remove.
36431 (__arm_vcmpgeq_m_f16): Remove.
36432 (__arm_vcmpgeq_m_n_f16): Remove.
36433 (__arm_vcmpgtq_m_f16): Remove.
36434 (__arm_vcmpgtq_m_n_f16): Remove.
36435 (__arm_vcmpleq_m_f16): Remove.
36436 (__arm_vcmpleq_m_n_f16): Remove.
36437 (__arm_vcmpltq_m_f16): Remove.
36438 (__arm_vcmpltq_m_n_f16): Remove.
36439 (__arm_vcmpneq_m_f16): Remove.
36440 (__arm_vcmpneq_m_n_f16): Remove.
36441 (__arm_vcmpeqq_m_n_f32): Remove.
36442 (__arm_vcmpgeq_m_f32): Remove.
36443 (__arm_vcmpgeq_m_n_f32): Remove.
36444 (__arm_vcmpgtq_m_f32): Remove.
36445 (__arm_vcmpgtq_m_n_f32): Remove.
36446 (__arm_vcmpleq_m_f32): Remove.
36447 (__arm_vcmpleq_m_n_f32): Remove.
36448 (__arm_vcmpltq_m_f32): Remove.
36449 (__arm_vcmpltq_m_n_f32): Remove.
36450 (__arm_vcmpneq_m_f32): Remove.
36451 (__arm_vcmpneq_m_n_f32): Remove.
36452 (__arm_vcmpneq): Remove.
36453 (__arm_vcmphiq): Remove.
36454 (__arm_vcmpeqq): Remove.
36455 (__arm_vcmpcsq): Remove.
36456 (__arm_vcmpltq): Remove.
36457 (__arm_vcmpleq): Remove.
36458 (__arm_vcmpgtq): Remove.
36459 (__arm_vcmpgeq): Remove.
36460 (__arm_vcmpneq_m): Remove.
36461 (__arm_vcmphiq_m): Remove.
36462 (__arm_vcmpeqq_m): Remove.
36463 (__arm_vcmpcsq_m): Remove.
36464 (__arm_vcmpltq_m): Remove.
36465 (__arm_vcmpleq_m): Remove.
36466 (__arm_vcmpgtq_m): Remove.
36467 (__arm_vcmpgeq_m): Remove.
36469 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
36471 * config/arm/arm-mve-builtins-shapes.cc (cmp): New.
36472 * config/arm/arm-mve-builtins-shapes.h (cmp): New.
36474 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
36476 * config/arm/iterators.md (MVE_CMP_M, MVE_CMP_M_F, MVE_CMP_M_N)
36477 (MVE_CMP_M_N_F, mve_cmp_op1): New.
36480 * config/arm/mve.md (mve_vcmp<mve_cmp_op>q_n_<mode>): Rename into ...
36481 (@mve_vcmp<mve_cmp_op>q_n_<mode>): ... this.
36482 (mve_vcmpeqq_m_f<mode>, mve_vcmpgeq_m_f<mode>)
36483 (mve_vcmpgtq_m_f<mode>, mve_vcmpleq_m_f<mode>)
36484 (mve_vcmpltq_m_f<mode>, mve_vcmpneq_m_f<mode>): Merge into ...
36485 (@mve_vcmp<mve_cmp_op1>q_m_f<mode>): ... this.
36486 (mve_vcmpcsq_m_u<mode>, mve_vcmpeqq_m_<supf><mode>)
36487 (mve_vcmpgeq_m_s<mode>, mve_vcmpgtq_m_s<mode>)
36488 (mve_vcmphiq_m_u<mode>, mve_vcmpleq_m_s<mode>)
36489 (mve_vcmpltq_m_s<mode>, mve_vcmpneq_m_<supf><mode>): Merge into
36491 (@mve_vcmp<mve_cmp_op1>q_m_<supf><mode>): ... this.
36492 (mve_vcmpcsq_m_n_u<mode>, mve_vcmpeqq_m_n_<supf><mode>)
36493 (mve_vcmpgeq_m_n_s<mode>, mve_vcmpgtq_m_n_s<mode>)
36494 (mve_vcmphiq_m_n_u<mode>, mve_vcmpleq_m_n_s<mode>)
36495 (mve_vcmpltq_m_n_s<mode>, mve_vcmpneq_m_n_<supf><mode>): Merge
36497 (@mve_vcmp<mve_cmp_op1>q_m_n_<supf><mode>): ... this.
36498 (mve_vcmpeqq_m_n_f<mode>, mve_vcmpgeq_m_n_f<mode>)
36499 (mve_vcmpgtq_m_n_f<mode>, mve_vcmpleq_m_n_f<mode>)
36500 (mve_vcmpltq_m_n_f<mode>, mve_vcmpneq_m_n_f<mode>): Merge into ...
36501 (@mve_vcmp<mve_cmp_op1>q_m_n_f<mode>): ... this.
36503 2023-05-11 Roger Sayle <roger@nextmovesoftware.com>
36505 * match.pd <popcount optimizations>: Simplify popcount(X|Y) +
36506 popcount(X&Y) as popcount(X)+popcount(Y). Likewise, simplify
36507 popcount(X)+popcount(Y)-popcount(X&Y) as popcount(X|Y), and
36510 2023-05-11 Roger Sayle <roger@nextmovesoftware.com>
36512 * match.pd <popcount optimizations>: Simplify popcount(bswap(x))
36513 as popcount(x). Simplify popcount(rotate(x,y)) as popcount(x).
36514 <parity optimizations>: Simplify parity(bswap(x)) as parity(x).
36515 Simplify parity(rotate(x,y)) as parity(x).
36517 2023-05-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
36519 * config/riscv/autovec.md (@vec_series<mode>): New pattern
36520 * config/riscv/riscv-protos.h (expand_vec_series): New function.
36521 * config/riscv/riscv-v.cc (emit_binop): Ditto.
36522 (emit_index_op): Ditto.
36523 (expand_vec_series): Ditto.
36524 (expand_const_vector): Add series vector handling.
36525 * config/riscv/riscv.cc (riscv_const_insns): Enable series vector for testing.
36527 2023-05-10 Roger Sayle <roger@nextmovesoftware.com>
36529 * config/i386/i386.md (*concat<mode><dwi>3_1): Use preferred
36530 [(const_int 0)] idiom, instead of [(clobber (const_int 0))].
36531 (*concat<mode><dwi>3_2): Likewise.
36532 (*concat<mode><dwi>3_3): Likewise.
36533 (*concat<mode><dwi>3_4): Likewise.
36534 (*concat<mode><dwi>3_5): Likewise.
36535 (*concat<mode><dwi>3_6): Likewise.
36536 (*concat<mode><dwi>3_7): Likewise.
36538 2023-05-10 Uros Bizjak <ubizjak@gmail.com>
36541 * config/i386/mmx.md (sse4_1_<code>v2qiv2si2): New insn pattern.
36542 (<insn>v4qiv4hi2): New expander.
36543 (<insn>v2hiv2si2): Ditto.
36544 (<insn>v2qiv2si2): Ditto.
36545 (<insn>v2qiv2hi2): Ditto.
36547 2023-05-10 Jeff Law <jlaw@ventanamicro>
36549 * config/h8300/constraints.md (Q): Make this a special memory
36553 2023-05-10 Jakub Jelinek <jakub@redhat.com>
36556 * ipa-prop.cc (ipa_get_callee_param_type): Don't return TREE_VALUE (t)
36557 if t is void_list_node.
36559 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
36561 * config/aarch64/aarch64-simd.md (aarch64_sqmovun<mode>_insn_le): Delete.
36562 (aarch64_sqmovun<mode>_insn_be): Delete.
36563 (aarch64_sqmovun<mode><vczle><vczbe>): New define_insn.
36564 (aarch64_sqmovun<mode>): Delete expander.
36566 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
36569 * config/aarch64/aarch64-simd.md (aarch64_<PERMUTE:perm_insn><mode>):
36571 (aarch64_<PERMUTE:perm_insn><mode><vczle><vczbe>): ... This.
36572 (aarch64_rev<REVERSE:rev_op><mode>): Rename to...
36573 (aarch64_rev<REVERSE:rev_op><mode><vczle><vczbe>): ... This.
36575 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
36578 * config/aarch64/aarch64-simd.md (aarch64_<su_optab>q<addsub><mode>):
36580 (aarch64_<su_optab>q<addsub><mode><vczle><vczbe>): ... This.
36581 (aarch64_<sur>qadd<mode>): Rename to...
36582 (aarch64_<sur>qadd<mode><vczle><vczbe>): ... This.
36584 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
36586 * config/aarch64/aarch64-simd.md
36587 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn_le): Delete.
36588 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn_be): Delete.
36589 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn<vczle><vczbe>): New define_insn.
36590 (aarch64_<sur>q<r>shr<u>n_n<mode>): Simplify expander.
36592 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
36595 * config/aarch64/aarch64-simd.md (aarch64_xtn<mode>_insn_le): Delete.
36596 (aarch64_xtn<mode>_insn_be): Likewise.
36597 (trunc<mode><Vnarrowq>2): Rename to...
36598 (trunc<mode><Vnarrowq>2<vczle><vczbe>): ... This.
36599 (aarch64_xtn<mode>): Move under the above. Just emit the truncate RTL.
36600 (aarch64_<su>qmovn<mode>): Likewise.
36601 (aarch64_<su>qmovn<mode><vczle><vczbe>): New define_insn.
36602 (aarch64_<su>qmovn<mode>_insn_le): Delete.
36603 (aarch64_<su>qmovn<mode>_insn_be): Likewise.
36605 2023-05-10 Li Xu <xuli1@eswincomputing.com>
36607 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): For vfmv.f.s/vmv.x.s
36608 intruction replace null avl with (const_int 0).
36610 2023-05-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
36612 * config/riscv/riscv.cc (riscv_support_vector_misalignment): Fix
36615 2023-05-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
36618 * config/riscv/riscv-vsetvl.cc (avl_source_has_vsetvl_p): New function.
36619 (source_equal_p): Fix dead loop in vsetvl avl checking.
36621 2023-05-10 Hans-Peter Nilsson <hp@axis.com>
36623 * config/cris/cris.cc (cris_postdbr_cmpelim): Correct mode
36624 of modeadjusted_dccr.
36626 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
36628 * config/arm/arm-mve-builtins-base.cc (vmaxaq, vminaq): New.
36629 * config/arm/arm-mve-builtins-base.def (vmaxaq, vminaq): New.
36630 * config/arm/arm-mve-builtins-base.h (vmaxaq, vminaq): New.
36631 * config/arm/arm-mve-builtins.cc
36632 (function_instance::has_inactive_argument): Handle vmaxaq and
36634 * config/arm/arm_mve.h (vminaq): Remove.
36636 (vminaq_m): Remove.
36637 (vmaxaq_m): Remove.
36638 (vminaq_s8): Remove.
36639 (vmaxaq_s8): Remove.
36640 (vminaq_s16): Remove.
36641 (vmaxaq_s16): Remove.
36642 (vminaq_s32): Remove.
36643 (vmaxaq_s32): Remove.
36644 (vminaq_m_s8): Remove.
36645 (vmaxaq_m_s8): Remove.
36646 (vminaq_m_s16): Remove.
36647 (vmaxaq_m_s16): Remove.
36648 (vminaq_m_s32): Remove.
36649 (vmaxaq_m_s32): Remove.
36650 (__arm_vminaq_s8): Remove.
36651 (__arm_vmaxaq_s8): Remove.
36652 (__arm_vminaq_s16): Remove.
36653 (__arm_vmaxaq_s16): Remove.
36654 (__arm_vminaq_s32): Remove.
36655 (__arm_vmaxaq_s32): Remove.
36656 (__arm_vminaq_m_s8): Remove.
36657 (__arm_vmaxaq_m_s8): Remove.
36658 (__arm_vminaq_m_s16): Remove.
36659 (__arm_vmaxaq_m_s16): Remove.
36660 (__arm_vminaq_m_s32): Remove.
36661 (__arm_vmaxaq_m_s32): Remove.
36662 (__arm_vminaq): Remove.
36663 (__arm_vmaxaq): Remove.
36664 (__arm_vminaq_m): Remove.
36665 (__arm_vmaxaq_m): Remove.
36667 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
36669 * config/arm/iterators.md (MVE_VMAXAVMINAQ, MVE_VMAXAVMINAQ_M):
36671 (mve_insn): Add vmaxa, vmina.
36672 (supf): Add VMAXAQ_S, VMAXAQ_M_S, VMINAQ_S, VMINAQ_M_S.
36673 * config/arm/mve.md (mve_vmaxaq_s<mode>, mve_vminaq_s<mode>):
36675 (@mve_<mve_insn>q_<supf><mode>): ... this.
36676 (mve_vmaxaq_m_s<mode>, mve_vminaq_m_s<mode>): Merge into ...
36677 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
36679 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
36681 * config/arm/arm-mve-builtins-shapes.cc (binary_maxamina): New.
36682 * config/arm/arm-mve-builtins-shapes.h (binary_maxamina): New.
36684 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
36686 * config/arm/arm-mve-builtins-base.cc (vmaxnmaq, vminnmaq): New.
36687 * config/arm/arm-mve-builtins-base.def (vmaxnmaq, vminnmaq): New.
36688 * config/arm/arm-mve-builtins-base.h (vmaxnmaq, vminnmaq): New.
36689 * config/arm/arm-mve-builtins.cc
36690 (function_instance::has_inactive_argument): Handle vmaxnmaq and
36692 * config/arm/arm_mve.h (vminnmaq): Remove.
36693 (vmaxnmaq): Remove.
36694 (vmaxnmaq_m): Remove.
36695 (vminnmaq_m): Remove.
36696 (vminnmaq_f16): Remove.
36697 (vmaxnmaq_f16): Remove.
36698 (vminnmaq_f32): Remove.
36699 (vmaxnmaq_f32): Remove.
36700 (vmaxnmaq_m_f16): Remove.
36701 (vminnmaq_m_f16): Remove.
36702 (vmaxnmaq_m_f32): Remove.
36703 (vminnmaq_m_f32): Remove.
36704 (__arm_vminnmaq_f16): Remove.
36705 (__arm_vmaxnmaq_f16): Remove.
36706 (__arm_vminnmaq_f32): Remove.
36707 (__arm_vmaxnmaq_f32): Remove.
36708 (__arm_vmaxnmaq_m_f16): Remove.
36709 (__arm_vminnmaq_m_f16): Remove.
36710 (__arm_vmaxnmaq_m_f32): Remove.
36711 (__arm_vminnmaq_m_f32): Remove.
36712 (__arm_vminnmaq): Remove.
36713 (__arm_vmaxnmaq): Remove.
36714 (__arm_vmaxnmaq_m): Remove.
36715 (__arm_vminnmaq_m): Remove.
36717 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
36719 * config/arm/iterators.md (MVE_VMAXNMA_VMINNMAQ)
36720 (MVE_VMAXNMA_VMINNMAQ_M): New.
36721 (mve_insn): Add vmaxnma, vminnma.
36722 * config/arm/mve.md (mve_vmaxnmaq_f<mode>, mve_vminnmaq_f<mode>):
36724 (@mve_<mve_insn>q_f<mode>): ... this.
36725 (mve_vmaxnmaq_m_f<mode>, mve_vminnmaq_m_f<mode>): Merge into ...
36726 (@mve_<mve_insn>q_m_f<mode>): ... this.
36728 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
36730 * config/arm/arm-mve-builtins-base.cc (FUNCTION_PRED_P_F): New.
36731 (vmaxnmavq, vmaxnmvq, vminnmavq, vminnmvq): New.
36732 * config/arm/arm-mve-builtins-base.def (vmaxnmavq, vmaxnmvq)
36733 (vminnmavq, vminnmvq): New.
36734 * config/arm/arm-mve-builtins-base.h (vmaxnmavq, vmaxnmvq)
36735 (vminnmavq, vminnmvq): New.
36736 * config/arm/arm_mve.h (vminnmvq): Remove.
36737 (vminnmavq): Remove.
36738 (vmaxnmvq): Remove.
36739 (vmaxnmavq): Remove.
36740 (vmaxnmavq_p): Remove.
36741 (vmaxnmvq_p): Remove.
36742 (vminnmavq_p): Remove.
36743 (vminnmvq_p): Remove.
36744 (vminnmvq_f16): Remove.
36745 (vminnmavq_f16): Remove.
36746 (vmaxnmvq_f16): Remove.
36747 (vmaxnmavq_f16): Remove.
36748 (vminnmvq_f32): Remove.
36749 (vminnmavq_f32): Remove.
36750 (vmaxnmvq_f32): Remove.
36751 (vmaxnmavq_f32): Remove.
36752 (vmaxnmavq_p_f16): Remove.
36753 (vmaxnmvq_p_f16): Remove.
36754 (vminnmavq_p_f16): Remove.
36755 (vminnmvq_p_f16): Remove.
36756 (vmaxnmavq_p_f32): Remove.
36757 (vmaxnmvq_p_f32): Remove.
36758 (vminnmavq_p_f32): Remove.
36759 (vminnmvq_p_f32): Remove.
36760 (__arm_vminnmvq_f16): Remove.
36761 (__arm_vminnmavq_f16): Remove.
36762 (__arm_vmaxnmvq_f16): Remove.
36763 (__arm_vmaxnmavq_f16): Remove.
36764 (__arm_vminnmvq_f32): Remove.
36765 (__arm_vminnmavq_f32): Remove.
36766 (__arm_vmaxnmvq_f32): Remove.
36767 (__arm_vmaxnmavq_f32): Remove.
36768 (__arm_vmaxnmavq_p_f16): Remove.
36769 (__arm_vmaxnmvq_p_f16): Remove.
36770 (__arm_vminnmavq_p_f16): Remove.
36771 (__arm_vminnmvq_p_f16): Remove.
36772 (__arm_vmaxnmavq_p_f32): Remove.
36773 (__arm_vmaxnmvq_p_f32): Remove.
36774 (__arm_vminnmavq_p_f32): Remove.
36775 (__arm_vminnmvq_p_f32): Remove.
36776 (__arm_vminnmvq): Remove.
36777 (__arm_vminnmavq): Remove.
36778 (__arm_vmaxnmvq): Remove.
36779 (__arm_vmaxnmavq): Remove.
36780 (__arm_vmaxnmavq_p): Remove.
36781 (__arm_vmaxnmvq_p): Remove.
36782 (__arm_vminnmavq_p): Remove.
36783 (__arm_vminnmvq_p): Remove.
36784 (__arm_vmaxnmavq_m): Remove.
36785 (__arm_vmaxnmvq_m): Remove.
36787 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
36789 * config/arm/arm-mve-builtins-functions.h
36790 (unspec_mve_function_exact_insn_pred_p): Use code_for_mve_q_p_f.
36792 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
36794 * config/arm/iterators.md (MVE_VMAXNMxV_MINNMxVQ)
36795 (MVE_VMAXNMxV_MINNMxVQ_P): New.
36796 (mve_insn): Add vmaxnmav, vmaxnmv, vminnmav, vminnmv.
36797 * config/arm/mve.md (mve_vmaxnmavq_f<mode>, mve_vmaxnmvq_f<mode>)
36798 (mve_vminnmavq_f<mode>, mve_vminnmvq_f<mode>): Merge into ...
36799 (@mve_<mve_insn>q_f<mode>): ... this.
36800 (mve_vmaxnmavq_p_f<mode>, mve_vmaxnmvq_p_f<mode>)
36801 (mve_vminnmavq_p_f<mode>, mve_vminnmvq_p_f<mode>): Merge into ...
36802 (@mve_<mve_insn>q_p_f<mode>): ... this.
36804 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
36806 * config/arm/arm-mve-builtins-base.cc (vmaxnmq, vminnmq): New.
36807 * config/arm/arm-mve-builtins-base.def (vmaxnmq, vminnmq): New.
36808 * config/arm/arm-mve-builtins-base.h (vmaxnmq, vminnmq): New.
36809 * config/arm/arm_mve.h (vminnmq): Remove.
36811 (vmaxnmq_m): Remove.
36812 (vminnmq_m): Remove.
36813 (vminnmq_x): Remove.
36814 (vmaxnmq_x): Remove.
36815 (vminnmq_f16): Remove.
36816 (vmaxnmq_f16): Remove.
36817 (vminnmq_f32): Remove.
36818 (vmaxnmq_f32): Remove.
36819 (vmaxnmq_m_f32): Remove.
36820 (vmaxnmq_m_f16): Remove.
36821 (vminnmq_m_f32): Remove.
36822 (vminnmq_m_f16): Remove.
36823 (vminnmq_x_f16): Remove.
36824 (vminnmq_x_f32): Remove.
36825 (vmaxnmq_x_f16): Remove.
36826 (vmaxnmq_x_f32): Remove.
36827 (__arm_vminnmq_f16): Remove.
36828 (__arm_vmaxnmq_f16): Remove.
36829 (__arm_vminnmq_f32): Remove.
36830 (__arm_vmaxnmq_f32): Remove.
36831 (__arm_vmaxnmq_m_f32): Remove.
36832 (__arm_vmaxnmq_m_f16): Remove.
36833 (__arm_vminnmq_m_f32): Remove.
36834 (__arm_vminnmq_m_f16): Remove.
36835 (__arm_vminnmq_x_f16): Remove.
36836 (__arm_vminnmq_x_f32): Remove.
36837 (__arm_vmaxnmq_x_f16): Remove.
36838 (__arm_vmaxnmq_x_f32): Remove.
36839 (__arm_vminnmq): Remove.
36840 (__arm_vmaxnmq): Remove.
36841 (__arm_vmaxnmq_m): Remove.
36842 (__arm_vminnmq_m): Remove.
36843 (__arm_vminnmq_x): Remove.
36844 (__arm_vmaxnmq_x): Remove.
36846 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
36848 * config/arm/iterators.md (MAX_MIN_F): New.
36849 (MVE_FP_M_BINARY): Add VMAXNMQ_M_F, VMINNMQ_M_F.
36850 (mve_insn): Add vmaxnm, vminnm.
36851 (max_min_f_str): New.
36852 * config/arm/mve.md (mve_vmaxnmq_f<mode>, mve_vminnmq_f<mode>):
36854 (@mve_<max_min_f_str>q_f<mode>): ... this.
36855 (mve_vmaxnmq_m_f<mode>, mve_vminnmq_m_f<mode>): Merge into ...
36856 (@mve_<mve_insn>q_m_f<mode>): ... this.
36858 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
36860 * config/arm/vec-common.md (smin<mode>3): Use VDQWH iterator.
36861 (smax<mode>3): Likewise.
36863 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
36865 * config/arm/arm-mve-builtins-base.cc (FUNCTION_PRED_P_S_U)
36866 (FUNCTION_PRED_P_S): New.
36867 (vmaxavq, vminavq, vmaxvq, vminvq): New.
36868 * config/arm/arm-mve-builtins-base.def (vmaxavq, vminavq, vmaxvq)
36870 * config/arm/arm-mve-builtins-base.h (vmaxavq, vminavq, vmaxvq)
36872 * config/arm/arm_mve.h (vminvq): Remove.
36874 (vminvq_p): Remove.
36875 (vmaxvq_p): Remove.
36876 (vminvq_u8): Remove.
36877 (vmaxvq_u8): Remove.
36878 (vminvq_s8): Remove.
36879 (vmaxvq_s8): Remove.
36880 (vminvq_u16): Remove.
36881 (vmaxvq_u16): Remove.
36882 (vminvq_s16): Remove.
36883 (vmaxvq_s16): Remove.
36884 (vminvq_u32): Remove.
36885 (vmaxvq_u32): Remove.
36886 (vminvq_s32): Remove.
36887 (vmaxvq_s32): Remove.
36888 (vminvq_p_u8): Remove.
36889 (vmaxvq_p_u8): Remove.
36890 (vminvq_p_s8): Remove.
36891 (vmaxvq_p_s8): Remove.
36892 (vminvq_p_u16): Remove.
36893 (vmaxvq_p_u16): Remove.
36894 (vminvq_p_s16): Remove.
36895 (vmaxvq_p_s16): Remove.
36896 (vminvq_p_u32): Remove.
36897 (vmaxvq_p_u32): Remove.
36898 (vminvq_p_s32): Remove.
36899 (vmaxvq_p_s32): Remove.
36900 (__arm_vminvq_u8): Remove.
36901 (__arm_vmaxvq_u8): Remove.
36902 (__arm_vminvq_s8): Remove.
36903 (__arm_vmaxvq_s8): Remove.
36904 (__arm_vminvq_u16): Remove.
36905 (__arm_vmaxvq_u16): Remove.
36906 (__arm_vminvq_s16): Remove.
36907 (__arm_vmaxvq_s16): Remove.
36908 (__arm_vminvq_u32): Remove.
36909 (__arm_vmaxvq_u32): Remove.
36910 (__arm_vminvq_s32): Remove.
36911 (__arm_vmaxvq_s32): Remove.
36912 (__arm_vminvq_p_u8): Remove.
36913 (__arm_vmaxvq_p_u8): Remove.
36914 (__arm_vminvq_p_s8): Remove.
36915 (__arm_vmaxvq_p_s8): Remove.
36916 (__arm_vminvq_p_u16): Remove.
36917 (__arm_vmaxvq_p_u16): Remove.
36918 (__arm_vminvq_p_s16): Remove.
36919 (__arm_vmaxvq_p_s16): Remove.
36920 (__arm_vminvq_p_u32): Remove.
36921 (__arm_vmaxvq_p_u32): Remove.
36922 (__arm_vminvq_p_s32): Remove.
36923 (__arm_vmaxvq_p_s32): Remove.
36924 (__arm_vminvq): Remove.
36925 (__arm_vmaxvq): Remove.
36926 (__arm_vminvq_p): Remove.
36927 (__arm_vmaxvq_p): Remove.
36930 (vminavq_p): Remove.
36931 (vmaxavq_p): Remove.
36932 (vminavq_s8): Remove.
36933 (vmaxavq_s8): Remove.
36934 (vminavq_s16): Remove.
36935 (vmaxavq_s16): Remove.
36936 (vminavq_s32): Remove.
36937 (vmaxavq_s32): Remove.
36938 (vminavq_p_s8): Remove.
36939 (vmaxavq_p_s8): Remove.
36940 (vminavq_p_s16): Remove.
36941 (vmaxavq_p_s16): Remove.
36942 (vminavq_p_s32): Remove.
36943 (vmaxavq_p_s32): Remove.
36944 (__arm_vminavq_s8): Remove.
36945 (__arm_vmaxavq_s8): Remove.
36946 (__arm_vminavq_s16): Remove.
36947 (__arm_vmaxavq_s16): Remove.
36948 (__arm_vminavq_s32): Remove.
36949 (__arm_vmaxavq_s32): Remove.
36950 (__arm_vminavq_p_s8): Remove.
36951 (__arm_vmaxavq_p_s8): Remove.
36952 (__arm_vminavq_p_s16): Remove.
36953 (__arm_vmaxavq_p_s16): Remove.
36954 (__arm_vminavq_p_s32): Remove.
36955 (__arm_vmaxavq_p_s32): Remove.
36956 (__arm_vminavq): Remove.
36957 (__arm_vmaxavq): Remove.
36958 (__arm_vminavq_p): Remove.
36959 (__arm_vmaxavq_p): Remove.
36961 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
36963 * config/arm/iterators.md (MVE_VMAXVQ_VMINVQ, MVE_VMAXVQ_VMINVQ_P): New.
36964 (mve_insn): Add vmaxav, vmaxv, vminav, vminv.
36965 (supf): Add VMAXAVQ_S, VMAXAVQ_P_S, VMINAVQ_S, VMINAVQ_P_S.
36966 * config/arm/mve.md (mve_vmaxavq_s<mode>, mve_vmaxvq_<supf><mode>)
36967 (mve_vminavq_s<mode>, mve_vminvq_<supf><mode>): Merge into ...
36968 (@mve_<mve_insn>q_<supf><mode>): ... this.
36969 (mve_vmaxavq_p_s<mode>, mve_vmaxvq_p_<supf><mode>)
36970 (mve_vminavq_p_s<mode>, mve_vminvq_p_<supf><mode>): Merge into ...
36971 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
36973 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
36975 * config/arm/arm-mve-builtins-functions.h (class
36976 unspec_mve_function_exact_insn_pred_p): New.
36978 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
36980 * config/arm/arm-mve-builtins-shapes.cc (binary_maxavminav): New.
36981 * config/arm/arm-mve-builtins-shapes.h (binary_maxavminav): New.
36983 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
36985 * config/arm/arm-mve-builtins-shapes.cc (binary_maxvminv): New.
36986 * config/arm/arm-mve-builtins-shapes.h (binary_maxvminv): New.
36988 2023-05-09 Richard Sandiford <richard.sandiford@arm.com>
36990 * config/aarch64/aarch64-protos.h (aarch64_adjust_reg_alloc_order):
36992 * config/aarch64/aarch64.h (REG_ALLOC_ORDER): Define.
36993 (ADJUST_REG_ALLOC_ORDER): Likewise.
36994 * config/aarch64/aarch64.cc (aarch64_adjust_reg_alloc_order): New
36996 * config/aarch64/aarch64-sve.md (*vcond_mask_<mode><vpred>): Use
36997 Upa rather than Upl for unpredicated movprfx alternatives.
36999 2023-05-09 Jeff Law <jlaw@ventanamicro>
37001 * config/h8300/testcompare.md: Add peephole2 which uses a memory
37002 load to set flags, thus eliminating a compare against zero.
37004 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
37006 * config/arm/arm-mve-builtins-base.cc (vshllbq, vshlltq): New.
37007 * config/arm/arm-mve-builtins-base.def (vshllbq, vshlltq): New.
37008 * config/arm/arm-mve-builtins-base.h (vshllbq, vshlltq): New.
37009 * config/arm/arm_mve.h (vshlltq): Remove.
37011 (vshllbq_m): Remove.
37012 (vshlltq_m): Remove.
37013 (vshllbq_x): Remove.
37014 (vshlltq_x): Remove.
37015 (vshlltq_n_u8): Remove.
37016 (vshllbq_n_u8): Remove.
37017 (vshlltq_n_s8): Remove.
37018 (vshllbq_n_s8): Remove.
37019 (vshlltq_n_u16): Remove.
37020 (vshllbq_n_u16): Remove.
37021 (vshlltq_n_s16): Remove.
37022 (vshllbq_n_s16): Remove.
37023 (vshllbq_m_n_s8): Remove.
37024 (vshllbq_m_n_s16): Remove.
37025 (vshllbq_m_n_u8): Remove.
37026 (vshllbq_m_n_u16): Remove.
37027 (vshlltq_m_n_s8): Remove.
37028 (vshlltq_m_n_s16): Remove.
37029 (vshlltq_m_n_u8): Remove.
37030 (vshlltq_m_n_u16): Remove.
37031 (vshllbq_x_n_s8): Remove.
37032 (vshllbq_x_n_s16): Remove.
37033 (vshllbq_x_n_u8): Remove.
37034 (vshllbq_x_n_u16): Remove.
37035 (vshlltq_x_n_s8): Remove.
37036 (vshlltq_x_n_s16): Remove.
37037 (vshlltq_x_n_u8): Remove.
37038 (vshlltq_x_n_u16): Remove.
37039 (__arm_vshlltq_n_u8): Remove.
37040 (__arm_vshllbq_n_u8): Remove.
37041 (__arm_vshlltq_n_s8): Remove.
37042 (__arm_vshllbq_n_s8): Remove.
37043 (__arm_vshlltq_n_u16): Remove.
37044 (__arm_vshllbq_n_u16): Remove.
37045 (__arm_vshlltq_n_s16): Remove.
37046 (__arm_vshllbq_n_s16): Remove.
37047 (__arm_vshllbq_m_n_s8): Remove.
37048 (__arm_vshllbq_m_n_s16): Remove.
37049 (__arm_vshllbq_m_n_u8): Remove.
37050 (__arm_vshllbq_m_n_u16): Remove.
37051 (__arm_vshlltq_m_n_s8): Remove.
37052 (__arm_vshlltq_m_n_s16): Remove.
37053 (__arm_vshlltq_m_n_u8): Remove.
37054 (__arm_vshlltq_m_n_u16): Remove.
37055 (__arm_vshllbq_x_n_s8): Remove.
37056 (__arm_vshllbq_x_n_s16): Remove.
37057 (__arm_vshllbq_x_n_u8): Remove.
37058 (__arm_vshllbq_x_n_u16): Remove.
37059 (__arm_vshlltq_x_n_s8): Remove.
37060 (__arm_vshlltq_x_n_s16): Remove.
37061 (__arm_vshlltq_x_n_u8): Remove.
37062 (__arm_vshlltq_x_n_u16): Remove.
37063 (__arm_vshlltq): Remove.
37064 (__arm_vshllbq): Remove.
37065 (__arm_vshllbq_m): Remove.
37066 (__arm_vshlltq_m): Remove.
37067 (__arm_vshllbq_x): Remove.
37068 (__arm_vshlltq_x): Remove.
37070 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
37072 * config/arm/iterators.md (mve_insn): Add vshllb, vshllt.
37073 (VSHLLBQ_N, VSHLLTQ_N): Remove.
37075 (VSHLLBQ_M_N, VSHLLTQ_M_N): Remove.
37076 (VSHLLxQ_M_N): New.
37077 * config/arm/mve.md (mve_vshllbq_n_<supf><mode>)
37078 (mve_vshlltq_n_<supf><mode>): Merge into ...
37079 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
37080 (mve_vshllbq_m_n_<supf><mode>, mve_vshlltq_m_n_<supf><mode>):
37082 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
37084 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
37086 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_n): New.
37087 * config/arm/arm-mve-builtins-shapes.h (binary_widen_n): New.
37089 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
37091 * config/arm/arm-mve-builtins-base.cc (vmovnbq, vmovntq, vqmovnbq)
37092 (vqmovntq, vqmovunbq, vqmovuntq): New.
37093 * config/arm/arm-mve-builtins-base.def (vmovnbq, vmovntq)
37094 (vqmovnbq, vqmovntq, vqmovunbq, vqmovuntq): New.
37095 * config/arm/arm-mve-builtins-base.h (vmovnbq, vmovntq, vqmovnbq)
37096 (vqmovntq, vqmovunbq, vqmovuntq): New.
37097 * config/arm/arm-mve-builtins.cc
37098 (function_instance::has_inactive_argument): Handle vmovnbq,
37099 vmovntq, vqmovnbq, vqmovntq, vqmovunbq, vqmovuntq.
37100 * config/arm/arm_mve.h (vqmovntq): Remove.
37101 (vqmovnbq): Remove.
37102 (vqmovnbq_m): Remove.
37103 (vqmovntq_m): Remove.
37104 (vqmovntq_u16): Remove.
37105 (vqmovnbq_u16): Remove.
37106 (vqmovntq_s16): Remove.
37107 (vqmovnbq_s16): Remove.
37108 (vqmovntq_u32): Remove.
37109 (vqmovnbq_u32): Remove.
37110 (vqmovntq_s32): Remove.
37111 (vqmovnbq_s32): Remove.
37112 (vqmovnbq_m_s16): Remove.
37113 (vqmovntq_m_s16): Remove.
37114 (vqmovnbq_m_u16): Remove.
37115 (vqmovntq_m_u16): Remove.
37116 (vqmovnbq_m_s32): Remove.
37117 (vqmovntq_m_s32): Remove.
37118 (vqmovnbq_m_u32): Remove.
37119 (vqmovntq_m_u32): Remove.
37120 (__arm_vqmovntq_u16): Remove.
37121 (__arm_vqmovnbq_u16): Remove.
37122 (__arm_vqmovntq_s16): Remove.
37123 (__arm_vqmovnbq_s16): Remove.
37124 (__arm_vqmovntq_u32): Remove.
37125 (__arm_vqmovnbq_u32): Remove.
37126 (__arm_vqmovntq_s32): Remove.
37127 (__arm_vqmovnbq_s32): Remove.
37128 (__arm_vqmovnbq_m_s16): Remove.
37129 (__arm_vqmovntq_m_s16): Remove.
37130 (__arm_vqmovnbq_m_u16): Remove.
37131 (__arm_vqmovntq_m_u16): Remove.
37132 (__arm_vqmovnbq_m_s32): Remove.
37133 (__arm_vqmovntq_m_s32): Remove.
37134 (__arm_vqmovnbq_m_u32): Remove.
37135 (__arm_vqmovntq_m_u32): Remove.
37136 (__arm_vqmovntq): Remove.
37137 (__arm_vqmovnbq): Remove.
37138 (__arm_vqmovnbq_m): Remove.
37139 (__arm_vqmovntq_m): Remove.
37142 (vmovnbq_m): Remove.
37143 (vmovntq_m): Remove.
37144 (vmovntq_u16): Remove.
37145 (vmovnbq_u16): Remove.
37146 (vmovntq_s16): Remove.
37147 (vmovnbq_s16): Remove.
37148 (vmovntq_u32): Remove.
37149 (vmovnbq_u32): Remove.
37150 (vmovntq_s32): Remove.
37151 (vmovnbq_s32): Remove.
37152 (vmovnbq_m_s16): Remove.
37153 (vmovntq_m_s16): Remove.
37154 (vmovnbq_m_u16): Remove.
37155 (vmovntq_m_u16): Remove.
37156 (vmovnbq_m_s32): Remove.
37157 (vmovntq_m_s32): Remove.
37158 (vmovnbq_m_u32): Remove.
37159 (vmovntq_m_u32): Remove.
37160 (__arm_vmovntq_u16): Remove.
37161 (__arm_vmovnbq_u16): Remove.
37162 (__arm_vmovntq_s16): Remove.
37163 (__arm_vmovnbq_s16): Remove.
37164 (__arm_vmovntq_u32): Remove.
37165 (__arm_vmovnbq_u32): Remove.
37166 (__arm_vmovntq_s32): Remove.
37167 (__arm_vmovnbq_s32): Remove.
37168 (__arm_vmovnbq_m_s16): Remove.
37169 (__arm_vmovntq_m_s16): Remove.
37170 (__arm_vmovnbq_m_u16): Remove.
37171 (__arm_vmovntq_m_u16): Remove.
37172 (__arm_vmovnbq_m_s32): Remove.
37173 (__arm_vmovntq_m_s32): Remove.
37174 (__arm_vmovnbq_m_u32): Remove.
37175 (__arm_vmovntq_m_u32): Remove.
37176 (__arm_vmovntq): Remove.
37177 (__arm_vmovnbq): Remove.
37178 (__arm_vmovnbq_m): Remove.
37179 (__arm_vmovntq_m): Remove.
37180 (vqmovuntq): Remove.
37181 (vqmovunbq): Remove.
37182 (vqmovunbq_m): Remove.
37183 (vqmovuntq_m): Remove.
37184 (vqmovuntq_s16): Remove.
37185 (vqmovunbq_s16): Remove.
37186 (vqmovuntq_s32): Remove.
37187 (vqmovunbq_s32): Remove.
37188 (vqmovunbq_m_s16): Remove.
37189 (vqmovuntq_m_s16): Remove.
37190 (vqmovunbq_m_s32): Remove.
37191 (vqmovuntq_m_s32): Remove.
37192 (__arm_vqmovuntq_s16): Remove.
37193 (__arm_vqmovunbq_s16): Remove.
37194 (__arm_vqmovuntq_s32): Remove.
37195 (__arm_vqmovunbq_s32): Remove.
37196 (__arm_vqmovunbq_m_s16): Remove.
37197 (__arm_vqmovuntq_m_s16): Remove.
37198 (__arm_vqmovunbq_m_s32): Remove.
37199 (__arm_vqmovuntq_m_s32): Remove.
37200 (__arm_vqmovuntq): Remove.
37201 (__arm_vqmovunbq): Remove.
37202 (__arm_vqmovunbq_m): Remove.
37203 (__arm_vqmovuntq_m): Remove.
37205 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
37207 * config/arm/iterators.md (MVE_MOVN, MVE_MOVN_M): New.
37208 (mve_insn): Add vmovnb, vmovnt, vqmovnb, vqmovnt, vqmovunb,
37211 (supf): Add VQMOVUNBQ_M_S, VQMOVUNBQ_S, VQMOVUNTQ_M_S,
37213 * config/arm/mve.md (mve_vmovnbq_<supf><mode>)
37214 (mve_vmovntq_<supf><mode>, mve_vqmovnbq_<supf><mode>)
37215 (mve_vqmovntq_<supf><mode>, mve_vqmovunbq_s<mode>)
37216 (mve_vqmovuntq_s<mode>): Merge into ...
37217 (@mve_<mve_insn>q_<supf><mode>): ... this.
37218 (mve_vmovnbq_m_<supf><mode>, mve_vmovntq_m_<supf><mode>)
37219 (mve_vqmovnbq_m_<supf><mode>, mve_vqmovntq_m_<supf><mode>)
37220 (mve_vqmovunbq_m_s<mode>, mve_vqmovuntq_m_s<mode>): Merge into ...
37221 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
37223 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
37225 * config/arm/arm-mve-builtins-shapes.cc (binary_move_narrow): New.
37226 (binary_move_narrow_unsigned): New.
37227 * config/arm/arm-mve-builtins-shapes.h (binary_move_narrow): New.
37228 (binary_move_narrow_unsigned): New.
37230 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
37232 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_F): New.
37233 (vrndaq, vrndmq, vrndnq, vrndpq, vrndq, vrndxq): New.
37234 * config/arm/arm-mve-builtins-base.def (vrndaq, vrndmq, vrndnq)
37235 (vrndpq, vrndq, vrndxq): New.
37236 * config/arm/arm-mve-builtins-base.h (vrndaq, vrndmq, vrndnq)
37237 (vrndpq, vrndq, vrndxq): New.
37238 * config/arm/arm_mve.h (vrndxq): Remove.
37244 (vrndaq_m): Remove.
37245 (vrndmq_m): Remove.
37246 (vrndnq_m): Remove.
37247 (vrndpq_m): Remove.
37249 (vrndxq_m): Remove.
37251 (vrndnq_x): Remove.
37252 (vrndmq_x): Remove.
37253 (vrndpq_x): Remove.
37254 (vrndaq_x): Remove.
37255 (vrndxq_x): Remove.
37256 (vrndxq_f16): Remove.
37257 (vrndxq_f32): Remove.
37258 (vrndq_f16): Remove.
37259 (vrndq_f32): Remove.
37260 (vrndpq_f16): Remove.
37261 (vrndpq_f32): Remove.
37262 (vrndnq_f16): Remove.
37263 (vrndnq_f32): Remove.
37264 (vrndmq_f16): Remove.
37265 (vrndmq_f32): Remove.
37266 (vrndaq_f16): Remove.
37267 (vrndaq_f32): Remove.
37268 (vrndaq_m_f16): Remove.
37269 (vrndmq_m_f16): Remove.
37270 (vrndnq_m_f16): Remove.
37271 (vrndpq_m_f16): Remove.
37272 (vrndq_m_f16): Remove.
37273 (vrndxq_m_f16): Remove.
37274 (vrndaq_m_f32): Remove.
37275 (vrndmq_m_f32): Remove.
37276 (vrndnq_m_f32): Remove.
37277 (vrndpq_m_f32): Remove.
37278 (vrndq_m_f32): Remove.
37279 (vrndxq_m_f32): Remove.
37280 (vrndq_x_f16): Remove.
37281 (vrndq_x_f32): Remove.
37282 (vrndnq_x_f16): Remove.
37283 (vrndnq_x_f32): Remove.
37284 (vrndmq_x_f16): Remove.
37285 (vrndmq_x_f32): Remove.
37286 (vrndpq_x_f16): Remove.
37287 (vrndpq_x_f32): Remove.
37288 (vrndaq_x_f16): Remove.
37289 (vrndaq_x_f32): Remove.
37290 (vrndxq_x_f16): Remove.
37291 (vrndxq_x_f32): Remove.
37292 (__arm_vrndxq_f16): Remove.
37293 (__arm_vrndxq_f32): Remove.
37294 (__arm_vrndq_f16): Remove.
37295 (__arm_vrndq_f32): Remove.
37296 (__arm_vrndpq_f16): Remove.
37297 (__arm_vrndpq_f32): Remove.
37298 (__arm_vrndnq_f16): Remove.
37299 (__arm_vrndnq_f32): Remove.
37300 (__arm_vrndmq_f16): Remove.
37301 (__arm_vrndmq_f32): Remove.
37302 (__arm_vrndaq_f16): Remove.
37303 (__arm_vrndaq_f32): Remove.
37304 (__arm_vrndaq_m_f16): Remove.
37305 (__arm_vrndmq_m_f16): Remove.
37306 (__arm_vrndnq_m_f16): Remove.
37307 (__arm_vrndpq_m_f16): Remove.
37308 (__arm_vrndq_m_f16): Remove.
37309 (__arm_vrndxq_m_f16): Remove.
37310 (__arm_vrndaq_m_f32): Remove.
37311 (__arm_vrndmq_m_f32): Remove.
37312 (__arm_vrndnq_m_f32): Remove.
37313 (__arm_vrndpq_m_f32): Remove.
37314 (__arm_vrndq_m_f32): Remove.
37315 (__arm_vrndxq_m_f32): Remove.
37316 (__arm_vrndq_x_f16): Remove.
37317 (__arm_vrndq_x_f32): Remove.
37318 (__arm_vrndnq_x_f16): Remove.
37319 (__arm_vrndnq_x_f32): Remove.
37320 (__arm_vrndmq_x_f16): Remove.
37321 (__arm_vrndmq_x_f32): Remove.
37322 (__arm_vrndpq_x_f16): Remove.
37323 (__arm_vrndpq_x_f32): Remove.
37324 (__arm_vrndaq_x_f16): Remove.
37325 (__arm_vrndaq_x_f32): Remove.
37326 (__arm_vrndxq_x_f16): Remove.
37327 (__arm_vrndxq_x_f32): Remove.
37328 (__arm_vrndxq): Remove.
37329 (__arm_vrndq): Remove.
37330 (__arm_vrndpq): Remove.
37331 (__arm_vrndnq): Remove.
37332 (__arm_vrndmq): Remove.
37333 (__arm_vrndaq): Remove.
37334 (__arm_vrndaq_m): Remove.
37335 (__arm_vrndmq_m): Remove.
37336 (__arm_vrndnq_m): Remove.
37337 (__arm_vrndpq_m): Remove.
37338 (__arm_vrndq_m): Remove.
37339 (__arm_vrndxq_m): Remove.
37340 (__arm_vrndq_x): Remove.
37341 (__arm_vrndnq_x): Remove.
37342 (__arm_vrndmq_x): Remove.
37343 (__arm_vrndpq_x): Remove.
37344 (__arm_vrndaq_x): Remove.
37345 (__arm_vrndxq_x): Remove.
37347 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
37349 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_N_NO_U_F): New.
37350 (vabsq, vnegq, vclsq, vclzq, vqabsq, vqnegq): New.
37351 * config/arm/arm-mve-builtins-base.def (vabsq, vnegq, vclsq)
37352 (vclzq, vqabsq, vqnegq): New.
37353 * config/arm/arm-mve-builtins-base.h (vabsq, vnegq, vclsq, vclzq)
37354 (vqabsq, vqnegq): New.
37355 * config/arm/arm_mve.h (vabsq): Remove.
37358 (vabsq_f16): Remove.
37359 (vabsq_f32): Remove.
37360 (vabsq_s8): Remove.
37361 (vabsq_s16): Remove.
37362 (vabsq_s32): Remove.
37363 (vabsq_m_s8): Remove.
37364 (vabsq_m_s16): Remove.
37365 (vabsq_m_s32): Remove.
37366 (vabsq_m_f16): Remove.
37367 (vabsq_m_f32): Remove.
37368 (vabsq_x_s8): Remove.
37369 (vabsq_x_s16): Remove.
37370 (vabsq_x_s32): Remove.
37371 (vabsq_x_f16): Remove.
37372 (vabsq_x_f32): Remove.
37373 (__arm_vabsq_s8): Remove.
37374 (__arm_vabsq_s16): Remove.
37375 (__arm_vabsq_s32): Remove.
37376 (__arm_vabsq_m_s8): Remove.
37377 (__arm_vabsq_m_s16): Remove.
37378 (__arm_vabsq_m_s32): Remove.
37379 (__arm_vabsq_x_s8): Remove.
37380 (__arm_vabsq_x_s16): Remove.
37381 (__arm_vabsq_x_s32): Remove.
37382 (__arm_vabsq_f16): Remove.
37383 (__arm_vabsq_f32): Remove.
37384 (__arm_vabsq_m_f16): Remove.
37385 (__arm_vabsq_m_f32): Remove.
37386 (__arm_vabsq_x_f16): Remove.
37387 (__arm_vabsq_x_f32): Remove.
37388 (__arm_vabsq): Remove.
37389 (__arm_vabsq_m): Remove.
37390 (__arm_vabsq_x): Remove.
37394 (vnegq_f16): Remove.
37395 (vnegq_f32): Remove.
37396 (vnegq_s8): Remove.
37397 (vnegq_s16): Remove.
37398 (vnegq_s32): Remove.
37399 (vnegq_m_s8): Remove.
37400 (vnegq_m_s16): Remove.
37401 (vnegq_m_s32): Remove.
37402 (vnegq_m_f16): Remove.
37403 (vnegq_m_f32): Remove.
37404 (vnegq_x_s8): Remove.
37405 (vnegq_x_s16): Remove.
37406 (vnegq_x_s32): Remove.
37407 (vnegq_x_f16): Remove.
37408 (vnegq_x_f32): Remove.
37409 (__arm_vnegq_s8): Remove.
37410 (__arm_vnegq_s16): Remove.
37411 (__arm_vnegq_s32): Remove.
37412 (__arm_vnegq_m_s8): Remove.
37413 (__arm_vnegq_m_s16): Remove.
37414 (__arm_vnegq_m_s32): Remove.
37415 (__arm_vnegq_x_s8): Remove.
37416 (__arm_vnegq_x_s16): Remove.
37417 (__arm_vnegq_x_s32): Remove.
37418 (__arm_vnegq_f16): Remove.
37419 (__arm_vnegq_f32): Remove.
37420 (__arm_vnegq_m_f16): Remove.
37421 (__arm_vnegq_m_f32): Remove.
37422 (__arm_vnegq_x_f16): Remove.
37423 (__arm_vnegq_x_f32): Remove.
37424 (__arm_vnegq): Remove.
37425 (__arm_vnegq_m): Remove.
37426 (__arm_vnegq_x): Remove.
37430 (vclsq_s8): Remove.
37431 (vclsq_s16): Remove.
37432 (vclsq_s32): Remove.
37433 (vclsq_m_s8): Remove.
37434 (vclsq_m_s16): Remove.
37435 (vclsq_m_s32): Remove.
37436 (vclsq_x_s8): Remove.
37437 (vclsq_x_s16): Remove.
37438 (vclsq_x_s32): Remove.
37439 (__arm_vclsq_s8): Remove.
37440 (__arm_vclsq_s16): Remove.
37441 (__arm_vclsq_s32): Remove.
37442 (__arm_vclsq_m_s8): Remove.
37443 (__arm_vclsq_m_s16): Remove.
37444 (__arm_vclsq_m_s32): Remove.
37445 (__arm_vclsq_x_s8): Remove.
37446 (__arm_vclsq_x_s16): Remove.
37447 (__arm_vclsq_x_s32): Remove.
37448 (__arm_vclsq): Remove.
37449 (__arm_vclsq_m): Remove.
37450 (__arm_vclsq_x): Remove.
37454 (vclzq_s8): Remove.
37455 (vclzq_s16): Remove.
37456 (vclzq_s32): Remove.
37457 (vclzq_u8): Remove.
37458 (vclzq_u16): Remove.
37459 (vclzq_u32): Remove.
37460 (vclzq_m_u8): Remove.
37461 (vclzq_m_s8): Remove.
37462 (vclzq_m_u16): Remove.
37463 (vclzq_m_s16): Remove.
37464 (vclzq_m_u32): Remove.
37465 (vclzq_m_s32): Remove.
37466 (vclzq_x_s8): Remove.
37467 (vclzq_x_s16): Remove.
37468 (vclzq_x_s32): Remove.
37469 (vclzq_x_u8): Remove.
37470 (vclzq_x_u16): Remove.
37471 (vclzq_x_u32): Remove.
37472 (__arm_vclzq_s8): Remove.
37473 (__arm_vclzq_s16): Remove.
37474 (__arm_vclzq_s32): Remove.
37475 (__arm_vclzq_u8): Remove.
37476 (__arm_vclzq_u16): Remove.
37477 (__arm_vclzq_u32): Remove.
37478 (__arm_vclzq_m_u8): Remove.
37479 (__arm_vclzq_m_s8): Remove.
37480 (__arm_vclzq_m_u16): Remove.
37481 (__arm_vclzq_m_s16): Remove.
37482 (__arm_vclzq_m_u32): Remove.
37483 (__arm_vclzq_m_s32): Remove.
37484 (__arm_vclzq_x_s8): Remove.
37485 (__arm_vclzq_x_s16): Remove.
37486 (__arm_vclzq_x_s32): Remove.
37487 (__arm_vclzq_x_u8): Remove.
37488 (__arm_vclzq_x_u16): Remove.
37489 (__arm_vclzq_x_u32): Remove.
37490 (__arm_vclzq): Remove.
37491 (__arm_vclzq_m): Remove.
37492 (__arm_vclzq_x): Remove.
37495 (vqnegq_m): Remove.
37496 (vqabsq_m): Remove.
37497 (vqabsq_s8): Remove.
37498 (vqabsq_s16): Remove.
37499 (vqabsq_s32): Remove.
37500 (vqnegq_s8): Remove.
37501 (vqnegq_s16): Remove.
37502 (vqnegq_s32): Remove.
37503 (vqnegq_m_s8): Remove.
37504 (vqabsq_m_s8): Remove.
37505 (vqnegq_m_s16): Remove.
37506 (vqabsq_m_s16): Remove.
37507 (vqnegq_m_s32): Remove.
37508 (vqabsq_m_s32): Remove.
37509 (__arm_vqabsq_s8): Remove.
37510 (__arm_vqabsq_s16): Remove.
37511 (__arm_vqabsq_s32): Remove.
37512 (__arm_vqnegq_s8): Remove.
37513 (__arm_vqnegq_s16): Remove.
37514 (__arm_vqnegq_s32): Remove.
37515 (__arm_vqnegq_m_s8): Remove.
37516 (__arm_vqabsq_m_s8): Remove.
37517 (__arm_vqnegq_m_s16): Remove.
37518 (__arm_vqabsq_m_s16): Remove.
37519 (__arm_vqnegq_m_s32): Remove.
37520 (__arm_vqabsq_m_s32): Remove.
37521 (__arm_vqabsq): Remove.
37522 (__arm_vqnegq): Remove.
37523 (__arm_vqnegq_m): Remove.
37524 (__arm_vqabsq_m): Remove.
37526 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
37528 * config/arm/iterators.md (MVE_INT_M_UNARY, MVE_INT_UNARY)
37529 (MVE_FP_UNARY, MVE_FP_M_UNARY): New.
37530 (mve_insn): Add vabs, vcls, vclz, vneg, vqabs, vqneg, vrnda,
37531 vrndm, vrndn, vrndp, vrnd, vrndx.
37532 (isu): Add VABSQ_M_S, VCLSQ_M_S, VCLZQ_M_S, VCLZQ_M_U, VNEGQ_M_S,
37533 VQABSQ_M_S, VQNEGQ_M_S.
37535 * config/arm/mve.md (mve_vrndq_m_f<mode>, mve_vrndxq_f<mode>)
37536 (mve_vrndq_f<mode>, mve_vrndpq_f<mode>, mve_vrndnq_f<mode>)
37537 (mve_vrndmq_f<mode>, mve_vrndaq_f<mode>): Merge into ...
37538 (@mve_<mve_insn>q_f<mode>): ... this.
37539 (mve_vnegq_f<mode>, mve_vabsq_f<mode>): Merge into ...
37540 (mve_v<absneg_str>q_f<mode>): ... this.
37541 (mve_vnegq_s<mode>, mve_vabsq_s<mode>): Merge into ...
37542 (mve_v<absneg_str>q_s<mode>): ... this.
37543 (mve_vclsq_s<mode>, mve_vqnegq_s<mode>, mve_vqabsq_s<mode>): Merge into ...
37544 (@mve_<mve_insn>q_<supf><mode>): ... this.
37545 (mve_vabsq_m_s<mode>, mve_vclsq_m_s<mode>)
37546 (mve_vclzq_m_<supf><mode>, mve_vnegq_m_s<mode>)
37547 (mve_vqabsq_m_s<mode>, mve_vqnegq_m_s<mode>): Merge into ...
37548 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
37549 (mve_vabsq_m_f<mode>, mve_vnegq_m_f<mode>, mve_vrndaq_m_f<mode>)
37550 (mve_vrndmq_m_f<mode>, mve_vrndnq_m_f<mode>, mve_vrndpq_m_f<mode>)
37551 (mve_vrndxq_m_f<mode>): Merge into ...
37552 (@mve_<mve_insn>q_m_f<mode>): ... this.
37554 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
37556 * config/arm/arm-mve-builtins-shapes.cc (unary): New.
37557 * config/arm/arm-mve-builtins-shapes.h (unary): New.
37559 2023-05-09 Jakub Jelinek <jakub@redhat.com>
37561 * mux-utils.h: Fix comment typo, avoides -> avoids.
37563 2023-05-09 Jakub Jelinek <jakub@redhat.com>
37565 PR tree-optimization/109778
37566 * wide-int.h (wi::lrotate, wi::rrotate): Call wi::lrshift on
37567 wi::zext (x, width) rather than x if width != precision, rather
37568 than using wi::zext (right, width) after the shift.
37569 * tree-ssa-ccp.cc (bit_value_binop): Call wi::ext on the results
37570 of wi::lrotate or wi::rrotate.
37572 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
37574 * genmatch.cc (get_out_file): Make static and rename to ...
37575 (choose_output): ... this. Reimplement. Update all uses ...
37576 (decision_tree::gen): ... here and ...
37579 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
37581 * genmatch.cc (showUsage): Reimplement as ...
37582 (usage): ...this. Adjust all uses.
37583 (main): Print usage when no arguments. Add missing 'return 1'.
37585 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
37587 * genmatch.cc (header_file): Make static.
37588 (emit_func): Rename to...
37589 (fp_decl): ... this. Adjust all uses.
37590 (fp_decl_done): New function. Use it...
37591 (decision_tree::gen): ... here and...
37592 (write_predicate): ... here.
37595 2023-05-09 Richard Sandiford <richard.sandiford@arm.com>
37597 * ira-conflicts.cc (can_use_same_reg_p): Skip over non-matching
37600 2023-05-08 Roger Sayle <roger@nextmovesoftware.com>
37601 Uros Bizjak <ubizjak@gmail.com>
37603 * config/i386/i386.md (any_or_plus): Move definition earlier.
37604 (*insvti_highpart_1): New define_insn_and_split to overwrite
37605 (insv) the highpart of a TImode register/memory.
37607 2023-05-08 Eugene Rozenfeld <erozen@microsoft.com>
37609 * auto-profile.cc (auto_profile): Check todo from early_inline
37610 to see if cleanup_tree_vfg needs to be called.
37611 (early_inline): Return todo from early_inliner.
37613 2023-05-08 Kito Cheng <kito.cheng@sifive.com>
37615 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::get_vector_info):
37617 (pass_vsetvl::get_block_info): New.
37618 (pass_vsetvl::update_vector_info): New.
37619 (pass_vsetvl::simple_vsetvl): Use get_vector_info.
37620 (pass_vsetvl::compute_local_backward_infos): Ditto.
37621 (pass_vsetvl::transfer_before): Ditto.
37622 (pass_vsetvl::transfer_after): Ditto.
37623 (pass_vsetvl::emit_local_forward_vsetvls): Ditto.
37624 (pass_vsetvl::local_eliminate_vsetvl_insn): Ditto.
37625 (pass_vsetvl::cleanup_insns): Ditto.
37626 (pass_vsetvl::compute_local_backward_infos): Use
37627 update_vector_info.
37629 2023-05-08 Jeff Law <jlaw@ventanamicro>
37631 * config/stormy16/stormy16.md (zero_extendhisi2): Fix length.
37633 2023-05-08 Richard Biener <rguenther@suse.de>
37634 Michael Meissner <meissner@linux.ibm.com>
37636 PR middle-end/108623
37637 * tree-core.h (tree_type_common): Bump up precision field to 16 bits.
37638 Align bit fields > 1 bit to at least an 8-bit boundary.
37640 2023-05-08 Andrew Pinski <apinski@marvell.com>
37642 PR tree-optimization/109424
37643 PR tree-optimization/59424
37644 * tree-ssa-phiopt.cc (factor_out_conditional_conversion): Rename to ...
37645 (factor_out_conditional_operation): This and add support for all unary
37647 (pass_phiopt::execute): Update call to factor_out_conditional_conversion
37648 to call factor_out_conditional_operation instead.
37650 2023-05-08 Andrew Pinski <apinski@marvell.com>
37652 * tree-ssa-phiopt.cc (pass_phiopt::execute): Loop
37653 over factor_out_conditional_conversion.
37655 2023-05-08 Andrew Pinski <apinski@marvell.com>
37657 PR tree-optimization/49959
37658 PR tree-optimization/103771
37659 * tree-ssa-phiopt.cc (pass_phiopt::execute): Support
37660 Diamond shapped bb form for factor_out_conditional_conversion.
37662 2023-05-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
37664 * config/riscv/autovec.md (movmisalign<mode>): New pattern.
37665 * config/riscv/riscv-protos.h (riscv_vector_mask_mode_p): Delete.
37666 (riscv_vector_get_mask_mode): Ditto.
37667 (get_mask_policy_no_pred): Ditto.
37668 (get_tail_policy_no_pred): Ditto.
37669 (get_mask_mode): New function.
37670 * config/riscv/riscv-v.cc (get_mask_policy_no_pred): Delete.
37671 (get_tail_policy_no_pred): Ditto.
37672 (riscv_vector_mask_mode_p): Ditto.
37673 (riscv_vector_get_mask_mode): Ditto.
37674 (get_mask_mode): New function.
37675 * config/riscv/riscv-vector-builtins.cc (use_real_merge_p): Remove
37677 (get_tail_policy_for_pred): Ditto.
37678 * config/riscv/riscv-vector-builtins.h (get_tail_policy_for_pred): Ditto.
37679 (get_mask_policy_for_pred): Ditto
37680 * config/riscv/riscv.cc (riscv_get_mask_mode): Refine codes.
37682 2023-05-08 Kito Cheng <kito.cheng@sifive.com>
37684 * common/config/riscv/riscv-common.cc (riscv_select_multilib_by_abi): New.
37685 (riscv_select_multilib): New.
37686 (riscv_compute_multilib): Extract logic to riscv_select_multilib and
37687 also handle select_by_abi.
37688 * config/riscv/elf.h (RISCV_USE_CUSTOMISED_MULTI_LIB): Change it
37689 to select_by_abi_arch_cmodel from 1.
37690 * config/riscv/linux.h (RISCV_USE_CUSTOMISED_MULTI_LIB): Define.
37691 * config/riscv/riscv-opts.h (enum riscv_multilib_select_kind): New.
37693 2023-05-08 Alexander Monakov <amonakov@ispras.ru>
37695 * Makefile.in: (gimple-match-head.o-warn): Remove.
37696 (GIMPLE_MATCH_PD_SEQ_SRC): Do not depend on
37697 gimple-match-exports.cc.
37698 (gimple-match-auto.h): Only depend on s-gimple-match.
37699 (generic-match-auto.h): Likewise.
37701 2023-05-08 Andrew Pinski <apinski@marvell.com>
37703 PR tree-optimization/109691
37704 * tree-ssa-dce.cc (simple_dce_from_worklist): Add need_eh_cleanup
37706 If the removed statement can throw, have need_eh_cleanup
37707 include the bb of that statement.
37708 * tree-ssa-dce.h (simple_dce_from_worklist): Update declaration.
37709 * tree-ssa-propagate.cc (struct prop_stats_d): Remove
37711 (substitute_and_fold_dom_walker::substitute_and_fold_dom_walker):
37712 Initialize dceworklist instead of stmts_to_remove.
37713 (substitute_and_fold_dom_walker::~substitute_and_fold_dom_walker):
37714 Destore dceworklist instead of stmts_to_remove.
37715 (substitute_and_fold_dom_walker::before_dom_children):
37716 Set dceworklist instead of adding to stmts_to_remove.
37717 (substitute_and_fold_engine::substitute_and_fold):
37718 Call simple_dce_from_worklist instead of poping
37720 Don't update the stat on removal statements.
37722 2023-05-07 Andrew Pinski <apinski@marvell.com>
37725 * config/aarch64/aarch64-builtins.cc (aarch64_simd_switcher::aarch64_simd_switcher):
37726 Change argument type to aarch64_feature_flags.
37727 * config/aarch64/aarch64-protos.h (aarch64_simd_switcher): Change
37728 constructor argument type to aarch64_feature_flags.
37729 Change m_old_asm_isa_flags to be aarch64_feature_flags.
37731 2023-05-07 Jiufu Guo <guojiufu@linux.ibm.com>
37733 * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Generate
37734 more parallel code if can_create_pseudo_p.
37736 2023-05-07 Roger Sayle <roger@nextmovesoftware.com>
37739 * lower-subreg.cc (resolve_simple_move): Don't emit a clobber
37740 immediately before moving a multi-word register by parts.
37742 2023-05-06 Jeff Law <jlaw@ventanamicro>
37744 * config/riscv/riscv-v.cc (riscv_vector_preferred_simd_mode): Delete.
37746 2023-05-06 Michael Collison <collison@rivosinc.com>
37748 * tree-vect-slp.cc (can_duplicate_and_interleave_p):
37749 Check that GET_MODE_NUNITS is a multiple of 2.
37751 2023-05-06 Michael Collison <collison@rivosinc.com>
37753 * config/riscv/riscv.cc
37754 (riscv_estimated_poly_value): Implement
37755 TARGET_ESTIMATED_POLY_VALUE.
37756 (riscv_preferred_simd_mode): Implement
37757 TARGET_VECTORIZE_PREFERRED_SIMD_MODE.
37758 (riscv_get_mask_mode): Implement TARGET_VECTORIZE_GET_MASK_MODE.
37759 (riscv_empty_mask_is_expensive): Implement
37760 TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE.
37761 (riscv_vectorize_create_costs): Implement
37762 TARGET_VECTORIZE_CREATE_COSTS.
37763 (riscv_support_vector_misalignment): Implement
37764 TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT.
37765 (TARGET_ESTIMATED_POLY_VALUE): Register target macro.
37766 (TARGET_VECTORIZE_GET_MASK_MODE): Ditto.
37767 (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Ditto.
37768 (TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT): Ditto.
37770 2023-05-06 Jeff Law <jlaw@ventanamicro>
37772 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Remove
37773 duplicate definition.
37775 2023-05-06 Michael Collison <collison@rivosinc.com>
37777 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): New function.
37778 (riscv_vector_preferred_simd_mode): Ditto.
37779 (get_mask_policy_no_pred): Ditto.
37780 (get_tail_policy_no_pred): Ditto.
37781 (riscv_vector_mask_mode_p): Ditto.
37782 (riscv_vector_get_mask_mode): Ditto.
37784 2023-05-06 Michael Collison <collison@rivosinc.com>
37786 * config/riscv/riscv-vector-builtins.cc (get_tail_policy_for_pred):
37787 Remove static declaration to to make externally visible.
37788 (get_mask_policy_for_pred): Ditto.
37789 * config/riscv/riscv-vector-builtins.h (get_tail_policy_for_pred):
37790 New external declaration.
37791 (get_mask_policy_for_pred): Ditto.
37793 2023-05-06 Michael Collison <collison@rivosinc.com>
37795 * config/riscv/riscv-protos.h (riscv_vector_mask_mode_p): New.
37796 (riscv_vector_get_mask_mode): Ditto.
37797 (get_mask_policy_no_pred): Ditto.
37798 (get_tail_policy_no_pred): Ditto.
37800 2023-05-06 Xi Ruoyao <xry111@xry111.site>
37802 * config/loongarch/loongarch.h (struct machine_function): Add
37803 reg_is_wrapped_separately array for register wrapping
37805 * config/loongarch/loongarch.cc
37806 (loongarch_get_separate_components): New function.
37807 (loongarch_components_for_bb): Likewise.
37808 (loongarch_disqualify_components): Likewise.
37809 (loongarch_process_components): Likewise.
37810 (loongarch_emit_prologue_components): Likewise.
37811 (loongarch_emit_epilogue_components): Likewise.
37812 (loongarch_set_handled_components): Likewise.
37813 (TARGET_SHRINK_WRAP_GET_SEPARATE_COMPONENTS): Define.
37814 (TARGET_SHRINK_WRAP_COMPONENTS_FOR_BB): Likewise.
37815 (TARGET_SHRINK_WRAP_DISQUALIFY_COMPONENTS): Likewise.
37816 (TARGET_SHRINK_WRAP_EMIT_PROLOGUE_COMPONENTS): Likewise.
37817 (TARGET_SHRINK_WRAP_EMIT_EPILOGUE_COMPONENTS): Likewise.
37818 (TARGET_SHRINK_WRAP_SET_HANDLED_COMPONENTS): Likewise.
37819 (loongarch_for_each_saved_reg): Skip registers that are wrapped
37822 2023-05-06 Xi Ruoyao <xry111@xry111.site>
37825 * Makefile.in (s-macro_list): Pass -nostdinc to
37828 2023-05-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
37830 * config/riscv/riscv-protos.h (preferred_simd_mode): New function.
37831 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Ditto.
37832 (preferred_simd_mode): Ditto.
37833 * config/riscv/riscv.cc (riscv_get_arg_info): Handle RVV type in function arg.
37834 (riscv_convert_vector_bits): Adjust for RVV auto-vectorization.
37835 (riscv_preferred_simd_mode): New function.
37836 (TARGET_VECTORIZE_PREFERRED_SIMD_MODE): New target hook support.
37837 * config/riscv/vector.md: Add autovec.md.
37838 * config/riscv/autovec.md: New file.
37840 2023-05-06 Jakub Jelinek <jakub@redhat.com>
37842 * real.h (dconst_pi): Define.
37843 (dconst_e_ptr): Formatting fix.
37844 (dconst_pi_ptr): Declare.
37845 * real.cc (dconst_pi_ptr): New function.
37846 * gimple-range-op.cc (cfn_sincos::fold_range): Intersect the generic
37847 boundaries range with range computed from sin/cos of the particular
37848 bounds if the argument range is shorter than 2*pi.
37849 (cfn_sincos::op1_range): Take bulps into account when determining
37850 which result ranges are always invalid or behave like known NAN.
37852 2023-05-06 Aldy Hernandez <aldyh@redhat.com>
37854 * gimple-range-cache.cc (sbr_sparse_bitmap::set_bb_range): Do not
37855 pass type to vrange_storage::equal_p.
37856 * value-range-storage.cc (vrange_storage::equal_p): Remove type.
37857 (irange_storage::equal_p): Same.
37858 (frange_storage::equal_p): Same.
37859 * value-range-storage.h (class frange_storage): Same.
37861 2023-05-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
37864 * config/riscv/riscv-vsetvl.cc (local_eliminate_vsetvl_insn): Remove it.
37865 (pass_vsetvl::local_eliminate_vsetvl_insn): New function.
37867 2023-05-06 liuhongt <hongtao.liu@intel.com>
37869 * combine.cc (maybe_swap_commutative_operands): Canonicalize
37870 vec_merge when mask is constant.
37871 * doc/md.texi: Document vec_merge canonicalization.
37873 2023-05-06 Jakub Jelinek <jakub@redhat.com>
37875 * value-range.h (frange_arithmetic): Declare.
37876 * range-op-float.cc (frange_arithmetic): No longer static.
37877 * gimple-range-op.cc (frange_mpfr_arg1): New function.
37878 (cfn_sqrt::fold_range): Intersect the generic boundaries range
37879 with range computed from sqrt of the particular bounds.
37880 (cfn_sqrt::op1_range): Intersect the generic boundaries range
37881 with range computed from squared particular bounds.
37883 2023-05-06 Jakub Jelinek <jakub@redhat.com>
37885 * Makefile.in (check_p_numbers): Rename to one_to_9999, move
37886 earlier with helper variables also renamed.
37887 (MATCH_SPLUT_SEQ): Use $(wordlist 1,$(NUM_MATCH_SPLITS),$(one_to_9999))
37888 instead of $(shell seq 1 $(NUM_MATCH_SPLITS)).
37889 (check_p_subdirs): Use $(one_to_9999) instead of $(check_p_numbers).
37891 2023-05-06 Hans-Peter Nilsson <hp@axis.com>
37893 * config/cris/cris.md (splitop): Add PLUS.
37894 * config/cris/cris.cc (cris_split_constant): Also handle
37895 PLUS when a split into two insns may be useful.
37897 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
37899 * config/cris/cris.md (movandsplit1): New define_peephole2.
37901 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
37903 * config/cris/cris.md (lsrandsplit1): New define_peephole2.
37905 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
37907 * doc/md.texi (define_peephole2): Document order of scanning.
37909 2023-05-05 Pan Li <pan2.li@intel.com>
37910 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37912 * config/riscv/vector.md: Allow const as the operand of RVV
37913 indexed load/store.
37915 2023-05-05 Pan Li <pan2.li@intel.com>
37917 * config/riscv/riscv.h (VECTOR_STORE_FLAG_VALUE): Add new macro
37918 consumed by simplify_rtx.
37920 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
37922 * config/arm/arm-mve-builtins-base.cc (vrshrq, vshrq): New.
37923 * config/arm/arm-mve-builtins-base.def (vrshrq, vshrq): New.
37924 * config/arm/arm-mve-builtins-base.h (vrshrq, vshrq): New.
37925 * config/arm/arm_mve.h (vshrq): Remove.
37927 (vrshrq_m): Remove.
37929 (vrshrq_x): Remove.
37931 (vshrq_n_s8): Remove.
37932 (vshrq_n_s16): Remove.
37933 (vshrq_n_s32): Remove.
37934 (vshrq_n_u8): Remove.
37935 (vshrq_n_u16): Remove.
37936 (vshrq_n_u32): Remove.
37937 (vrshrq_n_u8): Remove.
37938 (vrshrq_n_s8): Remove.
37939 (vrshrq_n_u16): Remove.
37940 (vrshrq_n_s16): Remove.
37941 (vrshrq_n_u32): Remove.
37942 (vrshrq_n_s32): Remove.
37943 (vrshrq_m_n_s8): Remove.
37944 (vrshrq_m_n_s32): Remove.
37945 (vrshrq_m_n_s16): Remove.
37946 (vrshrq_m_n_u8): Remove.
37947 (vrshrq_m_n_u32): Remove.
37948 (vrshrq_m_n_u16): Remove.
37949 (vshrq_m_n_s8): Remove.
37950 (vshrq_m_n_s32): Remove.
37951 (vshrq_m_n_s16): Remove.
37952 (vshrq_m_n_u8): Remove.
37953 (vshrq_m_n_u32): Remove.
37954 (vshrq_m_n_u16): Remove.
37955 (vrshrq_x_n_s8): Remove.
37956 (vrshrq_x_n_s16): Remove.
37957 (vrshrq_x_n_s32): Remove.
37958 (vrshrq_x_n_u8): Remove.
37959 (vrshrq_x_n_u16): Remove.
37960 (vrshrq_x_n_u32): Remove.
37961 (vshrq_x_n_s8): Remove.
37962 (vshrq_x_n_s16): Remove.
37963 (vshrq_x_n_s32): Remove.
37964 (vshrq_x_n_u8): Remove.
37965 (vshrq_x_n_u16): Remove.
37966 (vshrq_x_n_u32): Remove.
37967 (__arm_vshrq_n_s8): Remove.
37968 (__arm_vshrq_n_s16): Remove.
37969 (__arm_vshrq_n_s32): Remove.
37970 (__arm_vshrq_n_u8): Remove.
37971 (__arm_vshrq_n_u16): Remove.
37972 (__arm_vshrq_n_u32): Remove.
37973 (__arm_vrshrq_n_u8): Remove.
37974 (__arm_vrshrq_n_s8): Remove.
37975 (__arm_vrshrq_n_u16): Remove.
37976 (__arm_vrshrq_n_s16): Remove.
37977 (__arm_vrshrq_n_u32): Remove.
37978 (__arm_vrshrq_n_s32): Remove.
37979 (__arm_vrshrq_m_n_s8): Remove.
37980 (__arm_vrshrq_m_n_s32): Remove.
37981 (__arm_vrshrq_m_n_s16): Remove.
37982 (__arm_vrshrq_m_n_u8): Remove.
37983 (__arm_vrshrq_m_n_u32): Remove.
37984 (__arm_vrshrq_m_n_u16): Remove.
37985 (__arm_vshrq_m_n_s8): Remove.
37986 (__arm_vshrq_m_n_s32): Remove.
37987 (__arm_vshrq_m_n_s16): Remove.
37988 (__arm_vshrq_m_n_u8): Remove.
37989 (__arm_vshrq_m_n_u32): Remove.
37990 (__arm_vshrq_m_n_u16): Remove.
37991 (__arm_vrshrq_x_n_s8): Remove.
37992 (__arm_vrshrq_x_n_s16): Remove.
37993 (__arm_vrshrq_x_n_s32): Remove.
37994 (__arm_vrshrq_x_n_u8): Remove.
37995 (__arm_vrshrq_x_n_u16): Remove.
37996 (__arm_vrshrq_x_n_u32): Remove.
37997 (__arm_vshrq_x_n_s8): Remove.
37998 (__arm_vshrq_x_n_s16): Remove.
37999 (__arm_vshrq_x_n_s32): Remove.
38000 (__arm_vshrq_x_n_u8): Remove.
38001 (__arm_vshrq_x_n_u16): Remove.
38002 (__arm_vshrq_x_n_u32): Remove.
38003 (__arm_vshrq): Remove.
38004 (__arm_vrshrq): Remove.
38005 (__arm_vrshrq_m): Remove.
38006 (__arm_vshrq_m): Remove.
38007 (__arm_vrshrq_x): Remove.
38008 (__arm_vshrq_x): Remove.
38010 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
38012 * config/arm/iterators.md (MVE_VSHRQ_M_N, MVE_VSHRQ_N): New.
38013 (mve_insn): Add vrshr, vshr.
38014 * config/arm/mve.md (mve_vshrq_n_<supf><mode>)
38015 (mve_vrshrq_n_<supf><mode>): Merge into ...
38016 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
38017 (mve_vrshrq_m_n_<supf><mode>, mve_vshrq_m_n_<supf><mode>): Merge
38019 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
38021 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
38023 * config/arm/arm-mve-builtins-shapes.cc (binary_rshift): New.
38024 * config/arm/arm-mve-builtins-shapes.h (binary_rshift): New.
38026 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
38028 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N_NO_U_F): New.
38029 (vqshrunbq, vqshruntq, vqrshrunbq, vqrshruntq): New.
38030 * config/arm/arm-mve-builtins-base.def (vqshrunbq, vqshruntq)
38031 (vqrshrunbq, vqrshruntq): New.
38032 * config/arm/arm-mve-builtins-base.h (vqshrunbq, vqshruntq)
38033 (vqrshrunbq, vqrshruntq): New.
38034 * config/arm/arm-mve-builtins.cc
38035 (function_instance::has_inactive_argument): Handle vqshrunbq,
38036 vqshruntq, vqrshrunbq, vqrshruntq.
38037 * config/arm/arm_mve.h (vqrshrunbq): Remove.
38038 (vqrshruntq): Remove.
38039 (vqrshrunbq_m): Remove.
38040 (vqrshruntq_m): Remove.
38041 (vqrshrunbq_n_s16): Remove.
38042 (vqrshrunbq_n_s32): Remove.
38043 (vqrshruntq_n_s16): Remove.
38044 (vqrshruntq_n_s32): Remove.
38045 (vqrshrunbq_m_n_s32): Remove.
38046 (vqrshrunbq_m_n_s16): Remove.
38047 (vqrshruntq_m_n_s32): Remove.
38048 (vqrshruntq_m_n_s16): Remove.
38049 (__arm_vqrshrunbq_n_s16): Remove.
38050 (__arm_vqrshrunbq_n_s32): Remove.
38051 (__arm_vqrshruntq_n_s16): Remove.
38052 (__arm_vqrshruntq_n_s32): Remove.
38053 (__arm_vqrshrunbq_m_n_s32): Remove.
38054 (__arm_vqrshrunbq_m_n_s16): Remove.
38055 (__arm_vqrshruntq_m_n_s32): Remove.
38056 (__arm_vqrshruntq_m_n_s16): Remove.
38057 (__arm_vqrshrunbq): Remove.
38058 (__arm_vqrshruntq): Remove.
38059 (__arm_vqrshrunbq_m): Remove.
38060 (__arm_vqrshruntq_m): Remove.
38061 (vqshrunbq): Remove.
38062 (vqshruntq): Remove.
38063 (vqshrunbq_m): Remove.
38064 (vqshruntq_m): Remove.
38065 (vqshrunbq_n_s16): Remove.
38066 (vqshruntq_n_s16): Remove.
38067 (vqshrunbq_n_s32): Remove.
38068 (vqshruntq_n_s32): Remove.
38069 (vqshrunbq_m_n_s32): Remove.
38070 (vqshrunbq_m_n_s16): Remove.
38071 (vqshruntq_m_n_s32): Remove.
38072 (vqshruntq_m_n_s16): Remove.
38073 (__arm_vqshrunbq_n_s16): Remove.
38074 (__arm_vqshruntq_n_s16): Remove.
38075 (__arm_vqshrunbq_n_s32): Remove.
38076 (__arm_vqshruntq_n_s32): Remove.
38077 (__arm_vqshrunbq_m_n_s32): Remove.
38078 (__arm_vqshrunbq_m_n_s16): Remove.
38079 (__arm_vqshruntq_m_n_s32): Remove.
38080 (__arm_vqshruntq_m_n_s16): Remove.
38081 (__arm_vqshrunbq): Remove.
38082 (__arm_vqshruntq): Remove.
38083 (__arm_vqshrunbq_m): Remove.
38084 (__arm_vqshruntq_m): Remove.
38086 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
38088 * config/arm/iterators.md (MVE_SHRN_N): Add VQRSHRUNBQ,
38089 VQRSHRUNTQ, VQSHRUNBQ, VQSHRUNTQ.
38090 (MVE_SHRN_M_N): Likewise.
38091 (mve_insn): Add vqrshrunb, vqrshrunt, vqshrunb, vqshrunt.
38092 (isu): Add VQRSHRUNBQ, VQRSHRUNTQ, VQSHRUNBQ, VQSHRUNTQ.
38094 * config/arm/mve.md (mve_vqrshrunbq_n_s<mode>): Remove.
38095 (mve_vqrshruntq_n_s<mode>): Remove.
38096 (mve_vqshrunbq_n_s<mode>): Remove.
38097 (mve_vqshruntq_n_s<mode>): Remove.
38098 (mve_vqrshrunbq_m_n_s<mode>): Remove.
38099 (mve_vqrshruntq_m_n_s<mode>): Remove.
38100 (mve_vqshrunbq_m_n_s<mode>): Remove.
38101 (mve_vqshruntq_m_n_s<mode>): Remove.
38103 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
38105 * config/arm/arm-mve-builtins-shapes.cc
38106 (binary_rshift_narrow_unsigned): New.
38107 * config/arm/arm-mve-builtins-shapes.h
38108 (binary_rshift_narrow_unsigned): New.
38110 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
38112 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N_NO_F): New.
38113 (vshrnbq, vshrntq, vrshrnbq, vrshrntq, vqshrnbq, vqshrntq)
38114 (vqrshrnbq, vqrshrntq): New.
38115 * config/arm/arm-mve-builtins-base.def (vshrnbq, vshrntq)
38116 (vrshrnbq, vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq, vqrshrntq):
38118 * config/arm/arm-mve-builtins-base.h (vshrnbq, vshrntq, vrshrnbq)
38119 (vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq, vqrshrntq): New.
38120 * config/arm/arm-mve-builtins.cc
38121 (function_instance::has_inactive_argument): Handle vshrnbq,
38122 vshrntq, vrshrnbq, vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq,
38124 * config/arm/arm_mve.h (vshrnbq): Remove.
38126 (vshrnbq_m): Remove.
38127 (vshrntq_m): Remove.
38128 (vshrnbq_n_s16): Remove.
38129 (vshrntq_n_s16): Remove.
38130 (vshrnbq_n_u16): Remove.
38131 (vshrntq_n_u16): Remove.
38132 (vshrnbq_n_s32): Remove.
38133 (vshrntq_n_s32): Remove.
38134 (vshrnbq_n_u32): Remove.
38135 (vshrntq_n_u32): Remove.
38136 (vshrnbq_m_n_s32): Remove.
38137 (vshrnbq_m_n_s16): Remove.
38138 (vshrnbq_m_n_u32): Remove.
38139 (vshrnbq_m_n_u16): Remove.
38140 (vshrntq_m_n_s32): Remove.
38141 (vshrntq_m_n_s16): Remove.
38142 (vshrntq_m_n_u32): Remove.
38143 (vshrntq_m_n_u16): Remove.
38144 (__arm_vshrnbq_n_s16): Remove.
38145 (__arm_vshrntq_n_s16): Remove.
38146 (__arm_vshrnbq_n_u16): Remove.
38147 (__arm_vshrntq_n_u16): Remove.
38148 (__arm_vshrnbq_n_s32): Remove.
38149 (__arm_vshrntq_n_s32): Remove.
38150 (__arm_vshrnbq_n_u32): Remove.
38151 (__arm_vshrntq_n_u32): Remove.
38152 (__arm_vshrnbq_m_n_s32): Remove.
38153 (__arm_vshrnbq_m_n_s16): Remove.
38154 (__arm_vshrnbq_m_n_u32): Remove.
38155 (__arm_vshrnbq_m_n_u16): Remove.
38156 (__arm_vshrntq_m_n_s32): Remove.
38157 (__arm_vshrntq_m_n_s16): Remove.
38158 (__arm_vshrntq_m_n_u32): Remove.
38159 (__arm_vshrntq_m_n_u16): Remove.
38160 (__arm_vshrnbq): Remove.
38161 (__arm_vshrntq): Remove.
38162 (__arm_vshrnbq_m): Remove.
38163 (__arm_vshrntq_m): Remove.
38164 (vrshrnbq): Remove.
38165 (vrshrntq): Remove.
38166 (vrshrnbq_m): Remove.
38167 (vrshrntq_m): Remove.
38168 (vrshrnbq_n_s16): Remove.
38169 (vrshrntq_n_s16): Remove.
38170 (vrshrnbq_n_u16): Remove.
38171 (vrshrntq_n_u16): Remove.
38172 (vrshrnbq_n_s32): Remove.
38173 (vrshrntq_n_s32): Remove.
38174 (vrshrnbq_n_u32): Remove.
38175 (vrshrntq_n_u32): Remove.
38176 (vrshrnbq_m_n_s32): Remove.
38177 (vrshrnbq_m_n_s16): Remove.
38178 (vrshrnbq_m_n_u32): Remove.
38179 (vrshrnbq_m_n_u16): Remove.
38180 (vrshrntq_m_n_s32): Remove.
38181 (vrshrntq_m_n_s16): Remove.
38182 (vrshrntq_m_n_u32): Remove.
38183 (vrshrntq_m_n_u16): Remove.
38184 (__arm_vrshrnbq_n_s16): Remove.
38185 (__arm_vrshrntq_n_s16): Remove.
38186 (__arm_vrshrnbq_n_u16): Remove.
38187 (__arm_vrshrntq_n_u16): Remove.
38188 (__arm_vrshrnbq_n_s32): Remove.
38189 (__arm_vrshrntq_n_s32): Remove.
38190 (__arm_vrshrnbq_n_u32): Remove.
38191 (__arm_vrshrntq_n_u32): Remove.
38192 (__arm_vrshrnbq_m_n_s32): Remove.
38193 (__arm_vrshrnbq_m_n_s16): Remove.
38194 (__arm_vrshrnbq_m_n_u32): Remove.
38195 (__arm_vrshrnbq_m_n_u16): Remove.
38196 (__arm_vrshrntq_m_n_s32): Remove.
38197 (__arm_vrshrntq_m_n_s16): Remove.
38198 (__arm_vrshrntq_m_n_u32): Remove.
38199 (__arm_vrshrntq_m_n_u16): Remove.
38200 (__arm_vrshrnbq): Remove.
38201 (__arm_vrshrntq): Remove.
38202 (__arm_vrshrnbq_m): Remove.
38203 (__arm_vrshrntq_m): Remove.
38204 (vqshrnbq): Remove.
38205 (vqshrntq): Remove.
38206 (vqshrnbq_m): Remove.
38207 (vqshrntq_m): Remove.
38208 (vqshrnbq_n_s16): Remove.
38209 (vqshrntq_n_s16): Remove.
38210 (vqshrnbq_n_u16): Remove.
38211 (vqshrntq_n_u16): Remove.
38212 (vqshrnbq_n_s32): Remove.
38213 (vqshrntq_n_s32): Remove.
38214 (vqshrnbq_n_u32): Remove.
38215 (vqshrntq_n_u32): Remove.
38216 (vqshrnbq_m_n_s32): Remove.
38217 (vqshrnbq_m_n_s16): Remove.
38218 (vqshrnbq_m_n_u32): Remove.
38219 (vqshrnbq_m_n_u16): Remove.
38220 (vqshrntq_m_n_s32): Remove.
38221 (vqshrntq_m_n_s16): Remove.
38222 (vqshrntq_m_n_u32): Remove.
38223 (vqshrntq_m_n_u16): Remove.
38224 (__arm_vqshrnbq_n_s16): Remove.
38225 (__arm_vqshrntq_n_s16): Remove.
38226 (__arm_vqshrnbq_n_u16): Remove.
38227 (__arm_vqshrntq_n_u16): Remove.
38228 (__arm_vqshrnbq_n_s32): Remove.
38229 (__arm_vqshrntq_n_s32): Remove.
38230 (__arm_vqshrnbq_n_u32): Remove.
38231 (__arm_vqshrntq_n_u32): Remove.
38232 (__arm_vqshrnbq_m_n_s32): Remove.
38233 (__arm_vqshrnbq_m_n_s16): Remove.
38234 (__arm_vqshrnbq_m_n_u32): Remove.
38235 (__arm_vqshrnbq_m_n_u16): Remove.
38236 (__arm_vqshrntq_m_n_s32): Remove.
38237 (__arm_vqshrntq_m_n_s16): Remove.
38238 (__arm_vqshrntq_m_n_u32): Remove.
38239 (__arm_vqshrntq_m_n_u16): Remove.
38240 (__arm_vqshrnbq): Remove.
38241 (__arm_vqshrntq): Remove.
38242 (__arm_vqshrnbq_m): Remove.
38243 (__arm_vqshrntq_m): Remove.
38244 (vqrshrnbq): Remove.
38245 (vqrshrntq): Remove.
38246 (vqrshrnbq_m): Remove.
38247 (vqrshrntq_m): Remove.
38248 (vqrshrnbq_n_s16): Remove.
38249 (vqrshrnbq_n_u16): Remove.
38250 (vqrshrnbq_n_s32): Remove.
38251 (vqrshrnbq_n_u32): Remove.
38252 (vqrshrntq_n_s16): Remove.
38253 (vqrshrntq_n_u16): Remove.
38254 (vqrshrntq_n_s32): Remove.
38255 (vqrshrntq_n_u32): Remove.
38256 (vqrshrnbq_m_n_s32): Remove.
38257 (vqrshrnbq_m_n_s16): Remove.
38258 (vqrshrnbq_m_n_u32): Remove.
38259 (vqrshrnbq_m_n_u16): Remove.
38260 (vqrshrntq_m_n_s32): Remove.
38261 (vqrshrntq_m_n_s16): Remove.
38262 (vqrshrntq_m_n_u32): Remove.
38263 (vqrshrntq_m_n_u16): Remove.
38264 (__arm_vqrshrnbq_n_s16): Remove.
38265 (__arm_vqrshrnbq_n_u16): Remove.
38266 (__arm_vqrshrnbq_n_s32): Remove.
38267 (__arm_vqrshrnbq_n_u32): Remove.
38268 (__arm_vqrshrntq_n_s16): Remove.
38269 (__arm_vqrshrntq_n_u16): Remove.
38270 (__arm_vqrshrntq_n_s32): Remove.
38271 (__arm_vqrshrntq_n_u32): Remove.
38272 (__arm_vqrshrnbq_m_n_s32): Remove.
38273 (__arm_vqrshrnbq_m_n_s16): Remove.
38274 (__arm_vqrshrnbq_m_n_u32): Remove.
38275 (__arm_vqrshrnbq_m_n_u16): Remove.
38276 (__arm_vqrshrntq_m_n_s32): Remove.
38277 (__arm_vqrshrntq_m_n_s16): Remove.
38278 (__arm_vqrshrntq_m_n_u32): Remove.
38279 (__arm_vqrshrntq_m_n_u16): Remove.
38280 (__arm_vqrshrnbq): Remove.
38281 (__arm_vqrshrntq): Remove.
38282 (__arm_vqrshrnbq_m): Remove.
38283 (__arm_vqrshrntq_m): Remove.
38285 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
38287 * config/arm/iterators.md (MVE_SHRN_N, MVE_SHRN_M_N): New.
38288 (mve_insn): Add vqrshrnb, vqrshrnt, vqshrnb, vqshrnt, vrshrnb,
38289 vrshrnt, vshrnb, vshrnt.
38291 * config/arm/mve.md (mve_vqrshrnbq_n_<supf><mode>)
38292 (mve_vqrshrntq_n_<supf><mode>, mve_vqshrnbq_n_<supf><mode>)
38293 (mve_vqshrntq_n_<supf><mode>, mve_vrshrnbq_n_<supf><mode>)
38294 (mve_vrshrntq_n_<supf><mode>, mve_vshrnbq_n_<supf><mode>)
38295 (mve_vshrntq_n_<supf><mode>): Merge into ...
38296 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
38297 (mve_vqrshrnbq_m_n_<supf><mode>, mve_vqrshrntq_m_n_<supf><mode>)
38298 (mve_vqshrnbq_m_n_<supf><mode>, mve_vqshrntq_m_n_<supf><mode>)
38299 (mve_vrshrnbq_m_n_<supf><mode>, mve_vrshrntq_m_n_<supf><mode>)
38300 (mve_vshrnbq_m_n_<supf><mode>, mve_vshrntq_m_n_<supf><mode>):
38302 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
38304 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
38306 * config/arm/arm-mve-builtins-shapes.cc (binary_rshift_narrow):
38308 * config/arm/arm-mve-builtins-shapes.h (binary_rshift_narrow): New.
38310 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
38312 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_NO_F): New.
38313 (vmaxq, vminq): New.
38314 * config/arm/arm-mve-builtins-base.def (vmaxq, vminq): New.
38315 * config/arm/arm-mve-builtins-base.h (vmaxq, vminq): New.
38316 * config/arm/arm_mve.h (vminq): Remove.
38322 (vminq_u8): Remove.
38323 (vmaxq_u8): Remove.
38324 (vminq_s8): Remove.
38325 (vmaxq_s8): Remove.
38326 (vminq_u16): Remove.
38327 (vmaxq_u16): Remove.
38328 (vminq_s16): Remove.
38329 (vmaxq_s16): Remove.
38330 (vminq_u32): Remove.
38331 (vmaxq_u32): Remove.
38332 (vminq_s32): Remove.
38333 (vmaxq_s32): Remove.
38334 (vmaxq_m_s8): Remove.
38335 (vmaxq_m_s32): Remove.
38336 (vmaxq_m_s16): Remove.
38337 (vmaxq_m_u8): Remove.
38338 (vmaxq_m_u32): Remove.
38339 (vmaxq_m_u16): Remove.
38340 (vminq_m_s8): Remove.
38341 (vminq_m_s32): Remove.
38342 (vminq_m_s16): Remove.
38343 (vminq_m_u8): Remove.
38344 (vminq_m_u32): Remove.
38345 (vminq_m_u16): Remove.
38346 (vminq_x_s8): Remove.
38347 (vminq_x_s16): Remove.
38348 (vminq_x_s32): Remove.
38349 (vminq_x_u8): Remove.
38350 (vminq_x_u16): Remove.
38351 (vminq_x_u32): Remove.
38352 (vmaxq_x_s8): Remove.
38353 (vmaxq_x_s16): Remove.
38354 (vmaxq_x_s32): Remove.
38355 (vmaxq_x_u8): Remove.
38356 (vmaxq_x_u16): Remove.
38357 (vmaxq_x_u32): Remove.
38358 (__arm_vminq_u8): Remove.
38359 (__arm_vmaxq_u8): Remove.
38360 (__arm_vminq_s8): Remove.
38361 (__arm_vmaxq_s8): Remove.
38362 (__arm_vminq_u16): Remove.
38363 (__arm_vmaxq_u16): Remove.
38364 (__arm_vminq_s16): Remove.
38365 (__arm_vmaxq_s16): Remove.
38366 (__arm_vminq_u32): Remove.
38367 (__arm_vmaxq_u32): Remove.
38368 (__arm_vminq_s32): Remove.
38369 (__arm_vmaxq_s32): Remove.
38370 (__arm_vmaxq_m_s8): Remove.
38371 (__arm_vmaxq_m_s32): Remove.
38372 (__arm_vmaxq_m_s16): Remove.
38373 (__arm_vmaxq_m_u8): Remove.
38374 (__arm_vmaxq_m_u32): Remove.
38375 (__arm_vmaxq_m_u16): Remove.
38376 (__arm_vminq_m_s8): Remove.
38377 (__arm_vminq_m_s32): Remove.
38378 (__arm_vminq_m_s16): Remove.
38379 (__arm_vminq_m_u8): Remove.
38380 (__arm_vminq_m_u32): Remove.
38381 (__arm_vminq_m_u16): Remove.
38382 (__arm_vminq_x_s8): Remove.
38383 (__arm_vminq_x_s16): Remove.
38384 (__arm_vminq_x_s32): Remove.
38385 (__arm_vminq_x_u8): Remove.
38386 (__arm_vminq_x_u16): Remove.
38387 (__arm_vminq_x_u32): Remove.
38388 (__arm_vmaxq_x_s8): Remove.
38389 (__arm_vmaxq_x_s16): Remove.
38390 (__arm_vmaxq_x_s32): Remove.
38391 (__arm_vmaxq_x_u8): Remove.
38392 (__arm_vmaxq_x_u16): Remove.
38393 (__arm_vmaxq_x_u32): Remove.
38394 (__arm_vminq): Remove.
38395 (__arm_vmaxq): Remove.
38396 (__arm_vmaxq_m): Remove.
38397 (__arm_vminq_m): Remove.
38398 (__arm_vminq_x): Remove.
38399 (__arm_vmaxq_x): Remove.
38401 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
38403 * config/arm/iterators.md (MAX_MIN_SU): New.
38404 (max_min_su_str): New.
38405 (max_min_supf): New.
38406 * config/arm/mve.md (mve_vmaxq_s<mode>, mve_vmaxq_u<mode>)
38407 (mve_vminq_s<mode>, mve_vminq_u<mode>): Merge into ...
38408 (mve_<max_min_su_str>q_<max_min_supf><mode>): ... this.
38410 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
38412 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_M_N_R): New.
38413 (vqshlq, vshlq): New.
38414 * config/arm/arm-mve-builtins-base.def (vqshlq, vshlq): New.
38415 * config/arm/arm-mve-builtins-base.h (vqshlq, vshlq): New.
38416 * config/arm/arm_mve.h (vshlq): Remove.
38419 (vshlq_m_r): Remove.
38421 (vshlq_m_n): Remove.
38423 (vshlq_x_n): Remove.
38424 (vshlq_s8): Remove.
38425 (vshlq_s16): Remove.
38426 (vshlq_s32): Remove.
38427 (vshlq_u8): Remove.
38428 (vshlq_u16): Remove.
38429 (vshlq_u32): Remove.
38430 (vshlq_r_u8): Remove.
38431 (vshlq_n_u8): Remove.
38432 (vshlq_r_s8): Remove.
38433 (vshlq_n_s8): Remove.
38434 (vshlq_r_u16): Remove.
38435 (vshlq_n_u16): Remove.
38436 (vshlq_r_s16): Remove.
38437 (vshlq_n_s16): Remove.
38438 (vshlq_r_u32): Remove.
38439 (vshlq_n_u32): Remove.
38440 (vshlq_r_s32): Remove.
38441 (vshlq_n_s32): Remove.
38442 (vshlq_m_r_u8): Remove.
38443 (vshlq_m_r_s8): Remove.
38444 (vshlq_m_r_u16): Remove.
38445 (vshlq_m_r_s16): Remove.
38446 (vshlq_m_r_u32): Remove.
38447 (vshlq_m_r_s32): Remove.
38448 (vshlq_m_u8): Remove.
38449 (vshlq_m_s8): Remove.
38450 (vshlq_m_u16): Remove.
38451 (vshlq_m_s16): Remove.
38452 (vshlq_m_u32): Remove.
38453 (vshlq_m_s32): Remove.
38454 (vshlq_m_n_s8): Remove.
38455 (vshlq_m_n_s32): Remove.
38456 (vshlq_m_n_s16): Remove.
38457 (vshlq_m_n_u8): Remove.
38458 (vshlq_m_n_u32): Remove.
38459 (vshlq_m_n_u16): Remove.
38460 (vshlq_x_s8): Remove.
38461 (vshlq_x_s16): Remove.
38462 (vshlq_x_s32): Remove.
38463 (vshlq_x_u8): Remove.
38464 (vshlq_x_u16): Remove.
38465 (vshlq_x_u32): Remove.
38466 (vshlq_x_n_s8): Remove.
38467 (vshlq_x_n_s16): Remove.
38468 (vshlq_x_n_s32): Remove.
38469 (vshlq_x_n_u8): Remove.
38470 (vshlq_x_n_u16): Remove.
38471 (vshlq_x_n_u32): Remove.
38472 (__arm_vshlq_s8): Remove.
38473 (__arm_vshlq_s16): Remove.
38474 (__arm_vshlq_s32): Remove.
38475 (__arm_vshlq_u8): Remove.
38476 (__arm_vshlq_u16): Remove.
38477 (__arm_vshlq_u32): Remove.
38478 (__arm_vshlq_r_u8): Remove.
38479 (__arm_vshlq_n_u8): Remove.
38480 (__arm_vshlq_r_s8): Remove.
38481 (__arm_vshlq_n_s8): Remove.
38482 (__arm_vshlq_r_u16): Remove.
38483 (__arm_vshlq_n_u16): Remove.
38484 (__arm_vshlq_r_s16): Remove.
38485 (__arm_vshlq_n_s16): Remove.
38486 (__arm_vshlq_r_u32): Remove.
38487 (__arm_vshlq_n_u32): Remove.
38488 (__arm_vshlq_r_s32): Remove.
38489 (__arm_vshlq_n_s32): Remove.
38490 (__arm_vshlq_m_r_u8): Remove.
38491 (__arm_vshlq_m_r_s8): Remove.
38492 (__arm_vshlq_m_r_u16): Remove.
38493 (__arm_vshlq_m_r_s16): Remove.
38494 (__arm_vshlq_m_r_u32): Remove.
38495 (__arm_vshlq_m_r_s32): Remove.
38496 (__arm_vshlq_m_u8): Remove.
38497 (__arm_vshlq_m_s8): Remove.
38498 (__arm_vshlq_m_u16): Remove.
38499 (__arm_vshlq_m_s16): Remove.
38500 (__arm_vshlq_m_u32): Remove.
38501 (__arm_vshlq_m_s32): Remove.
38502 (__arm_vshlq_m_n_s8): Remove.
38503 (__arm_vshlq_m_n_s32): Remove.
38504 (__arm_vshlq_m_n_s16): Remove.
38505 (__arm_vshlq_m_n_u8): Remove.
38506 (__arm_vshlq_m_n_u32): Remove.
38507 (__arm_vshlq_m_n_u16): Remove.
38508 (__arm_vshlq_x_s8): Remove.
38509 (__arm_vshlq_x_s16): Remove.
38510 (__arm_vshlq_x_s32): Remove.
38511 (__arm_vshlq_x_u8): Remove.
38512 (__arm_vshlq_x_u16): Remove.
38513 (__arm_vshlq_x_u32): Remove.
38514 (__arm_vshlq_x_n_s8): Remove.
38515 (__arm_vshlq_x_n_s16): Remove.
38516 (__arm_vshlq_x_n_s32): Remove.
38517 (__arm_vshlq_x_n_u8): Remove.
38518 (__arm_vshlq_x_n_u16): Remove.
38519 (__arm_vshlq_x_n_u32): Remove.
38520 (__arm_vshlq): Remove.
38521 (__arm_vshlq_r): Remove.
38522 (__arm_vshlq_n): Remove.
38523 (__arm_vshlq_m_r): Remove.
38524 (__arm_vshlq_m): Remove.
38525 (__arm_vshlq_m_n): Remove.
38526 (__arm_vshlq_x): Remove.
38527 (__arm_vshlq_x_n): Remove.
38529 (vqshlq_r): Remove.
38530 (vqshlq_n): Remove.
38531 (vqshlq_m_r): Remove.
38532 (vqshlq_m_n): Remove.
38533 (vqshlq_m): Remove.
38534 (vqshlq_u8): Remove.
38535 (vqshlq_r_u8): Remove.
38536 (vqshlq_n_u8): Remove.
38537 (vqshlq_s8): Remove.
38538 (vqshlq_r_s8): Remove.
38539 (vqshlq_n_s8): Remove.
38540 (vqshlq_u16): Remove.
38541 (vqshlq_r_u16): Remove.
38542 (vqshlq_n_u16): Remove.
38543 (vqshlq_s16): Remove.
38544 (vqshlq_r_s16): Remove.
38545 (vqshlq_n_s16): Remove.
38546 (vqshlq_u32): Remove.
38547 (vqshlq_r_u32): Remove.
38548 (vqshlq_n_u32): Remove.
38549 (vqshlq_s32): Remove.
38550 (vqshlq_r_s32): Remove.
38551 (vqshlq_n_s32): Remove.
38552 (vqshlq_m_r_u8): Remove.
38553 (vqshlq_m_r_s8): Remove.
38554 (vqshlq_m_r_u16): Remove.
38555 (vqshlq_m_r_s16): Remove.
38556 (vqshlq_m_r_u32): Remove.
38557 (vqshlq_m_r_s32): Remove.
38558 (vqshlq_m_n_s8): Remove.
38559 (vqshlq_m_n_s32): Remove.
38560 (vqshlq_m_n_s16): Remove.
38561 (vqshlq_m_n_u8): Remove.
38562 (vqshlq_m_n_u32): Remove.
38563 (vqshlq_m_n_u16): Remove.
38564 (vqshlq_m_s8): Remove.
38565 (vqshlq_m_s32): Remove.
38566 (vqshlq_m_s16): Remove.
38567 (vqshlq_m_u8): Remove.
38568 (vqshlq_m_u32): Remove.
38569 (vqshlq_m_u16): Remove.
38570 (__arm_vqshlq_u8): Remove.
38571 (__arm_vqshlq_r_u8): Remove.
38572 (__arm_vqshlq_n_u8): Remove.
38573 (__arm_vqshlq_s8): Remove.
38574 (__arm_vqshlq_r_s8): Remove.
38575 (__arm_vqshlq_n_s8): Remove.
38576 (__arm_vqshlq_u16): Remove.
38577 (__arm_vqshlq_r_u16): Remove.
38578 (__arm_vqshlq_n_u16): Remove.
38579 (__arm_vqshlq_s16): Remove.
38580 (__arm_vqshlq_r_s16): Remove.
38581 (__arm_vqshlq_n_s16): Remove.
38582 (__arm_vqshlq_u32): Remove.
38583 (__arm_vqshlq_r_u32): Remove.
38584 (__arm_vqshlq_n_u32): Remove.
38585 (__arm_vqshlq_s32): Remove.
38586 (__arm_vqshlq_r_s32): Remove.
38587 (__arm_vqshlq_n_s32): Remove.
38588 (__arm_vqshlq_m_r_u8): Remove.
38589 (__arm_vqshlq_m_r_s8): Remove.
38590 (__arm_vqshlq_m_r_u16): Remove.
38591 (__arm_vqshlq_m_r_s16): Remove.
38592 (__arm_vqshlq_m_r_u32): Remove.
38593 (__arm_vqshlq_m_r_s32): Remove.
38594 (__arm_vqshlq_m_n_s8): Remove.
38595 (__arm_vqshlq_m_n_s32): Remove.
38596 (__arm_vqshlq_m_n_s16): Remove.
38597 (__arm_vqshlq_m_n_u8): Remove.
38598 (__arm_vqshlq_m_n_u32): Remove.
38599 (__arm_vqshlq_m_n_u16): Remove.
38600 (__arm_vqshlq_m_s8): Remove.
38601 (__arm_vqshlq_m_s32): Remove.
38602 (__arm_vqshlq_m_s16): Remove.
38603 (__arm_vqshlq_m_u8): Remove.
38604 (__arm_vqshlq_m_u32): Remove.
38605 (__arm_vqshlq_m_u16): Remove.
38606 (__arm_vqshlq): Remove.
38607 (__arm_vqshlq_r): Remove.
38608 (__arm_vqshlq_n): Remove.
38609 (__arm_vqshlq_m_r): Remove.
38610 (__arm_vqshlq_m_n): Remove.
38611 (__arm_vqshlq_m): Remove.
38613 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
38615 * config/arm/arm-mve-builtins-functions.h (class
38616 unspec_mve_function_exact_insn_vshl): New.
38618 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
38620 * config/arm/arm-mve-builtins-shapes.cc (binary_lshift_r): New.
38621 * config/arm/arm-mve-builtins-shapes.h (binary_lshift_r): New.
38623 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
38625 * config/arm/arm-mve-builtins.cc (has_inactive_argument)
38626 (finish_opt_n_resolution): Handle MODE_r.
38627 * config/arm/arm-mve-builtins.def (r): New mode.
38629 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
38631 * config/arm/arm-mve-builtins-shapes.cc (binary_lshift): New.
38632 * config/arm/arm-mve-builtins-shapes.h (binary_lshift): New.
38634 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
38636 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_N): New.
38638 * config/arm/arm-mve-builtins-base.def (vabdq): New.
38639 * config/arm/arm-mve-builtins-base.h (vabdq): New.
38640 * config/arm/arm_mve.h (vabdq): Remove.
38643 (vabdq_u8): Remove.
38644 (vabdq_s8): Remove.
38645 (vabdq_u16): Remove.
38646 (vabdq_s16): Remove.
38647 (vabdq_u32): Remove.
38648 (vabdq_s32): Remove.
38649 (vabdq_f16): Remove.
38650 (vabdq_f32): Remove.
38651 (vabdq_m_s8): Remove.
38652 (vabdq_m_s32): Remove.
38653 (vabdq_m_s16): Remove.
38654 (vabdq_m_u8): Remove.
38655 (vabdq_m_u32): Remove.
38656 (vabdq_m_u16): Remove.
38657 (vabdq_m_f32): Remove.
38658 (vabdq_m_f16): Remove.
38659 (vabdq_x_s8): Remove.
38660 (vabdq_x_s16): Remove.
38661 (vabdq_x_s32): Remove.
38662 (vabdq_x_u8): Remove.
38663 (vabdq_x_u16): Remove.
38664 (vabdq_x_u32): Remove.
38665 (vabdq_x_f16): Remove.
38666 (vabdq_x_f32): Remove.
38667 (__arm_vabdq_u8): Remove.
38668 (__arm_vabdq_s8): Remove.
38669 (__arm_vabdq_u16): Remove.
38670 (__arm_vabdq_s16): Remove.
38671 (__arm_vabdq_u32): Remove.
38672 (__arm_vabdq_s32): Remove.
38673 (__arm_vabdq_m_s8): Remove.
38674 (__arm_vabdq_m_s32): Remove.
38675 (__arm_vabdq_m_s16): Remove.
38676 (__arm_vabdq_m_u8): Remove.
38677 (__arm_vabdq_m_u32): Remove.
38678 (__arm_vabdq_m_u16): Remove.
38679 (__arm_vabdq_x_s8): Remove.
38680 (__arm_vabdq_x_s16): Remove.
38681 (__arm_vabdq_x_s32): Remove.
38682 (__arm_vabdq_x_u8): Remove.
38683 (__arm_vabdq_x_u16): Remove.
38684 (__arm_vabdq_x_u32): Remove.
38685 (__arm_vabdq_f16): Remove.
38686 (__arm_vabdq_f32): Remove.
38687 (__arm_vabdq_m_f32): Remove.
38688 (__arm_vabdq_m_f16): Remove.
38689 (__arm_vabdq_x_f16): Remove.
38690 (__arm_vabdq_x_f32): Remove.
38691 (__arm_vabdq): Remove.
38692 (__arm_vabdq_m): Remove.
38693 (__arm_vabdq_x): Remove.
38695 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
38697 * config/arm/iterators.md (MVE_FP_M_BINARY): Add vabdq.
38698 (MVE_FP_VABDQ_ONLY): New.
38699 (mve_insn): Add vabd.
38700 * config/arm/mve.md (mve_vabdq_f<mode>): Move into ...
38701 (@mve_<mve_insn>q_f<mode>): ... this.
38702 (mve_vabdq_m_f<mode>): Remove.
38704 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
38706 * config/arm/arm-mve-builtins-base.cc (vqrdmulhq): New.
38707 * config/arm/arm-mve-builtins-base.def (vqrdmulhq): New.
38708 * config/arm/arm-mve-builtins-base.h (vqrdmulhq): New.
38709 * config/arm/arm_mve.h (vqrdmulhq): Remove.
38710 (vqrdmulhq_m): Remove.
38711 (vqrdmulhq_s8): Remove.
38712 (vqrdmulhq_n_s8): Remove.
38713 (vqrdmulhq_s16): Remove.
38714 (vqrdmulhq_n_s16): Remove.
38715 (vqrdmulhq_s32): Remove.
38716 (vqrdmulhq_n_s32): Remove.
38717 (vqrdmulhq_m_n_s8): Remove.
38718 (vqrdmulhq_m_n_s32): Remove.
38719 (vqrdmulhq_m_n_s16): Remove.
38720 (vqrdmulhq_m_s8): Remove.
38721 (vqrdmulhq_m_s32): Remove.
38722 (vqrdmulhq_m_s16): Remove.
38723 (__arm_vqrdmulhq_s8): Remove.
38724 (__arm_vqrdmulhq_n_s8): Remove.
38725 (__arm_vqrdmulhq_s16): Remove.
38726 (__arm_vqrdmulhq_n_s16): Remove.
38727 (__arm_vqrdmulhq_s32): Remove.
38728 (__arm_vqrdmulhq_n_s32): Remove.
38729 (__arm_vqrdmulhq_m_n_s8): Remove.
38730 (__arm_vqrdmulhq_m_n_s32): Remove.
38731 (__arm_vqrdmulhq_m_n_s16): Remove.
38732 (__arm_vqrdmulhq_m_s8): Remove.
38733 (__arm_vqrdmulhq_m_s32): Remove.
38734 (__arm_vqrdmulhq_m_s16): Remove.
38735 (__arm_vqrdmulhq): Remove.
38736 (__arm_vqrdmulhq_m): Remove.
38738 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
38740 * config/arm/iterators.md (MVE_SHIFT_M_R, MVE_SHIFT_M_N)
38741 (MVE_SHIFT_N, MVE_SHIFT_R): New.
38742 (mve_insn): Add vqshl, vshl.
38743 * config/arm/mve.md (mve_vqshlq_n_<supf><mode>)
38744 (mve_vshlq_n_<supf><mode>): Merge into ...
38745 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
38746 (mve_vqshlq_r_<supf><mode>, mve_vshlq_r_<supf><mode>): Merge into
38748 (@mve_<mve_insn>q_r_<supf><mode>): ... this.
38749 (mve_vqshlq_m_r_<supf><mode>, mve_vshlq_m_r_<supf><mode>): Merge
38751 (@mve_<mve_insn>q_m_r_<supf><mode>): ... this.
38752 (mve_vqshlq_m_n_<supf><mode>, mve_vshlq_m_n_<supf><mode>): Merge
38754 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
38755 * config/arm/vec-common.md (mve_vshlq_<supf><mode>): Transform
38757 (@mve_<mve_insn>q_<supf><mode>): ... this.
38759 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
38761 * config/arm/arm-mve-builtins-base.cc (vqrshlq, vrshlq): New.
38762 * config/arm/arm-mve-builtins-base.def (vqrshlq, vrshlq): New.
38763 * config/arm/arm-mve-builtins-base.h (vqrshlq, vrshlq): New.
38764 * config/arm/arm-mve-builtins.cc (has_inactive_argument): Handle
38766 * config/arm/arm_mve.h (vrshlq): Remove.
38767 (vrshlq_m_n): Remove.
38768 (vrshlq_m): Remove.
38769 (vrshlq_x): Remove.
38770 (vrshlq_u8): Remove.
38771 (vrshlq_n_u8): Remove.
38772 (vrshlq_s8): Remove.
38773 (vrshlq_n_s8): Remove.
38774 (vrshlq_u16): Remove.
38775 (vrshlq_n_u16): Remove.
38776 (vrshlq_s16): Remove.
38777 (vrshlq_n_s16): Remove.
38778 (vrshlq_u32): Remove.
38779 (vrshlq_n_u32): Remove.
38780 (vrshlq_s32): Remove.
38781 (vrshlq_n_s32): Remove.
38782 (vrshlq_m_n_u8): Remove.
38783 (vrshlq_m_n_s8): Remove.
38784 (vrshlq_m_n_u16): Remove.
38785 (vrshlq_m_n_s16): Remove.
38786 (vrshlq_m_n_u32): Remove.
38787 (vrshlq_m_n_s32): Remove.
38788 (vrshlq_m_s8): Remove.
38789 (vrshlq_m_s32): Remove.
38790 (vrshlq_m_s16): Remove.
38791 (vrshlq_m_u8): Remove.
38792 (vrshlq_m_u32): Remove.
38793 (vrshlq_m_u16): Remove.
38794 (vrshlq_x_s8): Remove.
38795 (vrshlq_x_s16): Remove.
38796 (vrshlq_x_s32): Remove.
38797 (vrshlq_x_u8): Remove.
38798 (vrshlq_x_u16): Remove.
38799 (vrshlq_x_u32): Remove.
38800 (__arm_vrshlq_u8): Remove.
38801 (__arm_vrshlq_n_u8): Remove.
38802 (__arm_vrshlq_s8): Remove.
38803 (__arm_vrshlq_n_s8): Remove.
38804 (__arm_vrshlq_u16): Remove.
38805 (__arm_vrshlq_n_u16): Remove.
38806 (__arm_vrshlq_s16): Remove.
38807 (__arm_vrshlq_n_s16): Remove.
38808 (__arm_vrshlq_u32): Remove.
38809 (__arm_vrshlq_n_u32): Remove.
38810 (__arm_vrshlq_s32): Remove.
38811 (__arm_vrshlq_n_s32): Remove.
38812 (__arm_vrshlq_m_n_u8): Remove.
38813 (__arm_vrshlq_m_n_s8): Remove.
38814 (__arm_vrshlq_m_n_u16): Remove.
38815 (__arm_vrshlq_m_n_s16): Remove.
38816 (__arm_vrshlq_m_n_u32): Remove.
38817 (__arm_vrshlq_m_n_s32): Remove.
38818 (__arm_vrshlq_m_s8): Remove.
38819 (__arm_vrshlq_m_s32): Remove.
38820 (__arm_vrshlq_m_s16): Remove.
38821 (__arm_vrshlq_m_u8): Remove.
38822 (__arm_vrshlq_m_u32): Remove.
38823 (__arm_vrshlq_m_u16): Remove.
38824 (__arm_vrshlq_x_s8): Remove.
38825 (__arm_vrshlq_x_s16): Remove.
38826 (__arm_vrshlq_x_s32): Remove.
38827 (__arm_vrshlq_x_u8): Remove.
38828 (__arm_vrshlq_x_u16): Remove.
38829 (__arm_vrshlq_x_u32): Remove.
38830 (__arm_vrshlq): Remove.
38831 (__arm_vrshlq_m_n): Remove.
38832 (__arm_vrshlq_m): Remove.
38833 (__arm_vrshlq_x): Remove.
38835 (vqrshlq_m_n): Remove.
38836 (vqrshlq_m): Remove.
38837 (vqrshlq_u8): Remove.
38838 (vqrshlq_n_u8): Remove.
38839 (vqrshlq_s8): Remove.
38840 (vqrshlq_n_s8): Remove.
38841 (vqrshlq_u16): Remove.
38842 (vqrshlq_n_u16): Remove.
38843 (vqrshlq_s16): Remove.
38844 (vqrshlq_n_s16): Remove.
38845 (vqrshlq_u32): Remove.
38846 (vqrshlq_n_u32): Remove.
38847 (vqrshlq_s32): Remove.
38848 (vqrshlq_n_s32): Remove.
38849 (vqrshlq_m_n_u8): Remove.
38850 (vqrshlq_m_n_s8): Remove.
38851 (vqrshlq_m_n_u16): Remove.
38852 (vqrshlq_m_n_s16): Remove.
38853 (vqrshlq_m_n_u32): Remove.
38854 (vqrshlq_m_n_s32): Remove.
38855 (vqrshlq_m_s8): Remove.
38856 (vqrshlq_m_s32): Remove.
38857 (vqrshlq_m_s16): Remove.
38858 (vqrshlq_m_u8): Remove.
38859 (vqrshlq_m_u32): Remove.
38860 (vqrshlq_m_u16): Remove.
38861 (__arm_vqrshlq_u8): Remove.
38862 (__arm_vqrshlq_n_u8): Remove.
38863 (__arm_vqrshlq_s8): Remove.
38864 (__arm_vqrshlq_n_s8): Remove.
38865 (__arm_vqrshlq_u16): Remove.
38866 (__arm_vqrshlq_n_u16): Remove.
38867 (__arm_vqrshlq_s16): Remove.
38868 (__arm_vqrshlq_n_s16): Remove.
38869 (__arm_vqrshlq_u32): Remove.
38870 (__arm_vqrshlq_n_u32): Remove.
38871 (__arm_vqrshlq_s32): Remove.
38872 (__arm_vqrshlq_n_s32): Remove.
38873 (__arm_vqrshlq_m_n_u8): Remove.
38874 (__arm_vqrshlq_m_n_s8): Remove.
38875 (__arm_vqrshlq_m_n_u16): Remove.
38876 (__arm_vqrshlq_m_n_s16): Remove.
38877 (__arm_vqrshlq_m_n_u32): Remove.
38878 (__arm_vqrshlq_m_n_s32): Remove.
38879 (__arm_vqrshlq_m_s8): Remove.
38880 (__arm_vqrshlq_m_s32): Remove.
38881 (__arm_vqrshlq_m_s16): Remove.
38882 (__arm_vqrshlq_m_u8): Remove.
38883 (__arm_vqrshlq_m_u32): Remove.
38884 (__arm_vqrshlq_m_u16): Remove.
38885 (__arm_vqrshlq): Remove.
38886 (__arm_vqrshlq_m_n): Remove.
38887 (__arm_vqrshlq_m): Remove.
38889 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
38891 * config/arm/iterators.md (MVE_RSHIFT_M_N, MVE_RSHIFT_N): New.
38892 (mve_insn): Add vqrshl, vrshl.
38893 * config/arm/mve.md (mve_vqrshlq_n_<supf><mode>)
38894 (mve_vrshlq_n_<supf><mode>): Merge into ...
38895 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
38896 (mve_vqrshlq_m_n_<supf><mode>, mve_vrshlq_m_n_<supf><mode>): Merge
38898 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
38900 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
38902 * config/arm/arm-mve-builtins-shapes.cc (binary_round_lshift): New.
38903 * config/arm/arm-mve-builtins-shapes.h (binary_round_lshift): New.
38905 2023-05-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
38908 * config/riscv/riscv-vsetvl.cc (avl_info::multiple_source_equal_p): Add
38909 denegrate PHI optmization.
38911 2023-05-05 Uros Bizjak <ubizjak@gmail.com>
38913 * config/i386/predicates.md (register_no_SP_operand):
38914 Rename from index_register_operand.
38915 (call_register_operand): Update for rename.
38916 * config/i386/i386.md (*lea<mode>_general_[1234]): Update for rename.
38918 2023-05-05 Tamar Christina <tamar.christina@arm.com>
38921 * Makefile.in (NUM_MATCH_SPLITS, MATCH_SPLITS_SEQ,
38922 GIMPLE_MATCH_PD_SEQ_SRC, GIMPLE_MATCH_PD_SEQ_O,
38923 GENERIC_MATCH_PD_SEQ_SRC, GENERIC_MATCH_PD_SEQ_O): New.
38924 (OBJS, MOSTLYCLEANFILES, .PRECIOUS): Use them.
38925 (s-match): Split into s-generic-match and s-gimple-match.
38926 * configure.ac (with-matchpd-partitions,
38927 DEFAULT_MATCHPD_PARTITIONS): New.
38928 * configure: Regenerate.
38930 2023-05-05 Tamar Christina <tamar.christina@arm.com>
38933 * genmatch.cc (emit_func, SIZED_BASED_CHUNKS, get_out_file): New.
38934 (decision_tree::gen): Accept list of files instead of single and update
38935 to write function definition to header and main file.
38936 (write_predicate): Likewise.
38937 (write_header): Emit pragmas and new includes.
38938 (main): Create file buffers and cleanup.
38939 (showUsage, write_header_includes): New.
38941 2023-05-05 Tamar Christina <tamar.christina@arm.com>
38944 * Makefile.in (OBJS): Add gimple-match-exports.o.
38945 * genmatch.cc (decision_tree::gen): Export gimple_gimplify helpers.
38946 * gimple-match-head.cc (gimple_simplify, gimple_resimplify1,
38947 gimple_resimplify2, gimple_resimplify3, gimple_resimplify4,
38948 gimple_resimplify5, constant_for_folding, convert_conditional_op,
38949 maybe_resimplify_conditional_op, gimple_match_op::resimplify,
38950 maybe_build_generic_op, build_call_internal, maybe_push_res_to_seq,
38951 do_valueize, try_conditional_simplification, gimple_extract,
38952 gimple_extract_op, canonicalize_code, commutative_binary_op_p,
38953 commutative_ternary_op_p, first_commutative_argument,
38954 associative_binary_op_p, directly_supported_p,
38955 get_conditional_internal_fn): Moved to gimple-match-exports.cc
38956 * gimple-match-exports.cc: New file.
38958 2023-05-05 Tamar Christina <tamar.christina@arm.com>
38961 * genmatch.cc (decision_tree::gen, write_predicate): Generate new
38963 (dt_simplify::gen_1): Use it.
38965 2023-05-05 Tamar Christina <tamar.christina@arm.com>
38968 * genmatch.cc (output_line_directive): Only emit commented directive
38971 2023-05-05 Tamar Christina <tamar.christina@arm.com>
38974 * genmatch.cc (dt_simplify::gen_1): Only emit labels if used.
38976 2023-05-05 Tobias Burnus <tobias@codesourcery.com>
38978 * config/gcn/gcn.cc (gcn_vectorize_builtin_vectorized_function): Remove
38979 unused in_mode/in_n variables.
38981 2023-05-05 Richard Biener <rguenther@suse.de>
38983 PR tree-optimization/109735
38984 * tree-vect-stmts.cc (vectorizable_operation): Perform
38985 conversion for POINTER_DIFF_EXPR unconditionally.
38987 2023-05-05 Uros Bizjak <ubizjak@gmail.com>
38989 * config/i386/mmx.md (mulv2si3): New expander.
38990 (*mulv2si3): New insn pattern.
38992 2023-05-05 Tobias Burnus <tobias@codesourcery.com>
38993 Thomas Schwinge <thomas@codesourcery.com>
38996 * config/nvptx/mkoffload.cc (process): Emit dummy procedure
38997 alongside reverse-offload function table to prevent NULL values
38998 of the function addresses.
39000 2023-05-05 Jakub Jelinek <jakub@redhat.com>
39002 * builtins.cc (do_mpfr_ckconv, do_mpc_ckconv): Fix comment typo,
39004 * fold-const-call.cc (do_mpfr_ckconv, do_mpc_ckconv): Likewise.
39006 2023-05-05 Andrew Pinski <apinski@marvell.com>
39008 PR tree-optimization/109732
39009 * tree-ssa-phiopt.cc (match_simplify_replacement): Fix the selection
39010 of the argtrue/argfalse.
39012 2023-05-05 Andrew Pinski <apinski@marvell.com>
39014 PR tree-optimization/109722
39015 * match.pd: Extend the `ABS<a> == 0` pattern
39016 to cover `ABSU<a> == 0` too.
39018 2023-05-04 Uros Bizjak <ubizjak@gmail.com>
39021 * config/i386/predicates.md (index_reg_operand): New predicate.
39022 * config/i386/i386.md (ashift to lea spliter): Use
39023 general_reg_operand and index_reg_operand predicates.
39025 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
39027 * config/aarch64/aarch64-simd.md (aarch64_<sur><addsub>hn2<mode>_insn_le):
39028 Rename and reimplement with RTL codes to...
39029 (aarch64_<optab>hn2<mode>_insn_le): .. This.
39030 (aarch64_r<optab>hn2<mode>_insn_le): New pattern.
39031 (aarch64_<sur><addsub>hn2<mode>_insn_be): Rename and reimplement with RTL
39033 (aarch64_<optab>hn2<mode>_insn_be): ... This.
39034 (aarch64_r<optab>hn2<mode>_insn_be): New pattern.
39035 (aarch64_<sur><addsub>hn2<mode>): Rename and adjust expander to...
39036 (aarch64_<optab>hn2<mode>): ... This.
39037 (aarch64_r<optab>hn2<mode>): New expander.
39038 * config/aarch64/iterators.md (UNSPEC_ADDHN, UNSPEC_RADDHN,
39039 UNSPEC_SUBHN, UNSPEC_RSUBHN): Delete unspecs.
39040 (ADDSUBHN): Delete.
39041 (sur): Remove handling of the above.
39042 (addsub): Likewise.
39044 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
39046 * config/aarch64/aarch64-simd.md (aarch64_<sur><addsub>hn<mode>_insn_le):
39048 (aarch64_<optab>hn<mode>_insn<vczle><vczbe>): New define_insn.
39049 (aarch64_<sur><addsub>hn<mode>_insn_be): Delete.
39050 (aarch64_r<optab>hn<mode>_insn<vczle><vczbe>): New define_insn.
39051 (aarch64_<sur><addsub>hn<mode>): Delete.
39052 (aarch64_<optab>hn<mode>): New define_expand.
39053 (aarch64_r<optab>hn<mode>): Likewise.
39054 * config/aarch64/predicates.md (aarch64_simd_raddsubhn_imm_vec):
39057 2023-05-04 Andrew Pinski <apinski@marvell.com>
39059 * tree-ssa-phiopt.cc (replace_phi_edge_with_variable): Handle
39060 diamond form bb with forwarder only empty blocks better.
39062 2023-05-04 Andrew Pinski <apinski@marvell.com>
39064 * tree-ssa-threadupdate.cc (copy_phi_arg_into_existing_phi): Move to ...
39065 * tree-cfg.cc (copy_phi_arg_into_existing_phi): Here and remove static.
39066 (gimple_duplicate_sese_tail): Use copy_phi_arg_into_existing_phi instead
39067 of an inline version of it.
39068 * tree-cfgcleanup.cc (remove_forwarder_block): Likewise.
39069 * tree-cfg.h (copy_phi_arg_into_existing_phi): New declaration.
39071 2023-05-04 Andrew Pinski <apinski@marvell.com>
39073 * tree-ssa-phiopt.cc (replace_phi_edge_with_variable): Change
39074 the default argument value for dce_ssa_names to nullptr.
39075 Check to make sure dce_ssa_names is a non-nullptr before
39076 calling simple_dce_from_worklist.
39078 2023-05-04 Uros Bizjak <ubizjak@gmail.com>
39080 * config/i386/predicates.md (index_register_operand): Reject
39081 arg_pointer_rtx, frame_pointer_rtx, stack_pointer_rtx and
39082 VIRTUAL_REGISTER_P operands. Allow subregs of memory before reload.
39083 (call_register_no_elim_operand): Rewrite as ...
39084 (call_register_operand): ... this.
39085 (call_insn_operand): Use call_register_operand predicate.
39087 2023-05-04 Richard Biener <rguenther@suse.de>
39089 PR tree-optimization/109721
39090 * tree-vect-stmts.cc (vectorizable_operation): Make sure
39091 to test word_mode for all !target_support_p operations.
39093 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
39096 * config/aarch64/aarch64-simd.md (aarch64_<su>aba<mode>): Rename to...
39097 (aarch64_<su>aba<mode><vczle><vczbe>): ... This.
39098 (aarch64_mla<mode>): Rename to...
39099 (aarch64_mla<mode><vczle><vczbe>): ... This.
39100 (*aarch64_mla_elt<mode>): Rename to...
39101 (*aarch64_mla_elt<mode><vczle><vczbe>): ... This.
39102 (*aarch64_mla_elt_<vswap_width_name><mode>): Rename to...
39103 (*aarch64_mla_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
39104 (aarch64_mla_n<mode>): Rename to...
39105 (aarch64_mla_n<mode><vczle><vczbe>): ... This.
39106 (aarch64_mls<mode>): Rename to...
39107 (aarch64_mls<mode><vczle><vczbe>): ... This.
39108 (*aarch64_mls_elt<mode>): Rename to...
39109 (*aarch64_mls_elt<mode><vczle><vczbe>): ... This.
39110 (*aarch64_mls_elt_<vswap_width_name><mode>): Rename to...
39111 (*aarch64_mls_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
39112 (aarch64_mls_n<mode>): Rename to...
39113 (aarch64_mls_n<mode><vczle><vczbe>): ... This.
39114 (fma<mode>4): Rename to...
39115 (fma<mode>4<vczle><vczbe>): ... This.
39116 (*aarch64_fma4_elt<mode>): Rename to...
39117 (*aarch64_fma4_elt<mode><vczle><vczbe>): ... This.
39118 (*aarch64_fma4_elt_<vswap_width_name><mode>): Rename to...
39119 (*aarch64_fma4_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
39120 (*aarch64_fma4_elt_from_dup<mode>): Rename to...
39121 (*aarch64_fma4_elt_from_dup<mode><vczle><vczbe>): ... This.
39122 (fnma<mode>4): Rename to...
39123 (fnma<mode>4<vczle><vczbe>): ... This.
39124 (*aarch64_fnma4_elt<mode>): Rename to...
39125 (*aarch64_fnma4_elt<mode><vczle><vczbe>): ... This.
39126 (*aarch64_fnma4_elt_<vswap_width_name><mode>): Rename to...
39127 (*aarch64_fnma4_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
39128 (*aarch64_fnma4_elt_from_dup<mode>): Rename to...
39129 (*aarch64_fnma4_elt_from_dup<mode><vczle><vczbe>): ... This.
39130 (aarch64_simd_bsl<mode>_internal): Rename to...
39131 (aarch64_simd_bsl<mode>_internal<vczle><vczbe>): ... This.
39132 (*aarch64_simd_bsl<mode>_alt): Rename to...
39133 (*aarch64_simd_bsl<mode>_alt<vczle><vczbe>): ... This.
39135 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
39138 * config/aarch64/aarch64-simd.md (aarch64_<su>abd<mode>): Rename to...
39139 (aarch64_<su>abd<mode><vczle><vczbe>): ... This.
39140 (fabd<mode>3): Rename to...
39141 (fabd<mode>3<vczle><vczbe>): ... This.
39142 (aarch64_<optab>p<mode>): Rename to...
39143 (aarch64_<optab>p<mode><vczle><vczbe>): ... This.
39144 (aarch64_faddp<mode>): Rename to...
39145 (aarch64_faddp<mode><vczle><vczbe>): ... This.
39147 2023-05-04 Martin Liska <mliska@suse.cz>
39149 * gcov.cc (GCOV_JSON_FORMAT_VERSION): New definition.
39150 (print_version): Use it.
39151 (generate_results): Likewise.
39153 2023-05-04 Richard Biener <rguenther@suse.de>
39155 * tree-cfg.h (last_stmt): Rename to ...
39156 (last_nondebug_stmt): ... this.
39157 * tree-cfg.cc (last_stmt): Rename to ...
39158 (last_nondebug_stmt): ... this.
39159 (assign_discriminators): Adjust.
39160 (group_case_labels_stmt): Likewise.
39161 (gimple_can_duplicate_bb_p): Likewise.
39162 (execute_fixup_cfg): Likewise.
39163 * auto-profile.cc (afdo_propagate_circuit): Likewise.
39164 * gimple-range.cc (gimple_ranger::range_on_exit): Likewise.
39165 * omp-expand.cc (workshare_safe_to_combine_p): Likewise.
39166 (determine_parallel_type): Likewise.
39167 (adjust_context_and_scope): Likewise.
39168 (expand_task_call): Likewise.
39169 (remove_exit_barrier): Likewise.
39170 (expand_omp_taskreg): Likewise.
39171 (expand_omp_for_init_counts): Likewise.
39172 (expand_omp_for_init_vars): Likewise.
39173 (expand_omp_for_static_chunk): Likewise.
39174 (expand_omp_simd): Likewise.
39175 (expand_oacc_for): Likewise.
39176 (expand_omp_for): Likewise.
39177 (expand_omp_sections): Likewise.
39178 (expand_omp_atomic_fetch_op): Likewise.
39179 (expand_omp_atomic_cas): Likewise.
39180 (expand_omp_atomic): Likewise.
39181 (expand_omp_target): Likewise.
39182 (expand_omp): Likewise.
39183 (omp_make_gimple_edges): Likewise.
39184 * trans-mem.cc (tm_region_init): Likewise.
39185 * tree-inline.cc (redirect_all_calls): Likewise.
39186 * tree-parloops.cc (gen_parallel_loop): Likewise.
39187 * tree-ssa-loop-ch.cc (do_while_loop_p): Likewise.
39188 * tree-ssa-loop-ivcanon.cc (canonicalize_loop_induction_variables):
39190 * tree-ssa-loop-ivopts.cc (stmt_after_ip_normal_pos): Likewise.
39191 (may_eliminate_iv): Likewise.
39192 * tree-ssa-loop-manip.cc (standard_iv_increment_position): Likewise.
39193 * tree-ssa-loop-niter.cc (do_warn_aggressive_loop_optimizations):
39195 (estimate_numbers_of_iterations): Likewise.
39196 * tree-ssa-loop-split.cc (compute_added_num_insns): Likewise.
39197 * tree-ssa-loop-unswitch.cc (get_predicates_for_bb): Likewise.
39198 (set_predicates_for_bb): Likewise.
39199 (init_loop_unswitch_info): Likewise.
39200 (hoist_guard): Likewise.
39201 * tree-ssa-phiopt.cc (match_simplify_replacement): Likewise.
39202 (minmax_replacement): Likewise.
39203 * tree-ssa-reassoc.cc (update_range_test): Likewise.
39204 (optimize_range_tests_to_bit_test): Likewise.
39205 (optimize_range_tests_var_bound): Likewise.
39206 (optimize_range_tests): Likewise.
39207 (no_side_effect_bb): Likewise.
39208 (suitable_cond_bb): Likewise.
39209 (maybe_optimize_range_tests): Likewise.
39210 (reassociate_bb): Likewise.
39211 * tree-vrp.cc (rvrp_folder::pre_fold_bb): Likewise.
39213 2023-05-04 Jakub Jelinek <jakub@redhat.com>
39216 * config/i386/i386-features.cc (timode_scalar_chain::convert_insn):
39217 If src is REG, change its mode to V1TImode and call fix_debug_reg_uses
39218 for it only if it still has TImode. Don't decide whether to call
39219 fix_debug_reg_uses based on whether SRC is ever set or not.
39221 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
39223 * config/cris/cris.cc (cris_split_constant): New function.
39224 * config/cris/cris.md (splitop): New iterator.
39225 (opsplit1): New define_peephole2.
39226 * config/cris/cris-protos.h (cris_split_constant): Declare.
39227 (cris_splittable_constant_p): New macro.
39229 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
39231 * config/cris/cris.cc (TARGET_SPILL_CLASS): Define
39234 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
39236 * config/cris/cris.cc (cris_side_effect_mode_ok): Use
39237 lra_in_progress, not reload_in_progress.
39238 * config/cris/cris.md ("movdi", "*addi_reload"): Ditto.
39239 * config/cris/constraints.md ("Q"): Ditto.
39241 2023-05-03 Andrew Pinski <apinski@marvell.com>
39243 * tree-ssa-dce.cc (simple_dce_from_worklist): Record
39244 stats on removed number of statements and phis.
39246 2023-05-03 Aldy Hernandez <aldyh@redhat.com>
39248 PR tree-optimization/109711
39249 * value-range.cc (irange::verify_range): Allow types of
39252 2023-05-03 Alexander Monakov <amonakov@ispras.ru>
39255 * calls.cc (can_implement_as_sibling_call_p): Reject calls
39256 to __sanitizer_cov_trace_pc.
39258 2023-05-03 Richard Sandiford <richard.sandiford@arm.com>
39261 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Add
39262 a new ABI break parameter for GCC 14. Set it to the alignment
39263 of enums that have an underlying type. Take the true alignment
39264 of such enums from the TYPE_ALIGN of the underlying type's
39266 (aarch64_function_arg_boundary): Update accordingly.
39267 (aarch64_layout_arg, aarch64_gimplify_va_arg_expr): Likewise.
39268 Warn about ABI differences.
39270 2023-05-03 Richard Sandiford <richard.sandiford@arm.com>
39273 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Rename
39274 ABI break variables to abi_break_gcc_9 and abi_break_gcc_13.
39275 (aarch64_layout_arg, aarch64_function_arg_boundary): Likewise.
39276 (aarch64_gimplify_va_arg_expr): Likewise.
39278 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
39280 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_M_N_NO_F)
39281 (FUNCTION_WITHOUT_N_NO_F, FUNCTION_WITH_M_N_NO_U_F): New.
39282 (vhaddq, vhsubq, vmulhq, vqaddq, vqsubq, vqdmulhq, vrhaddq)
39284 * config/arm/arm-mve-builtins-base.def (vhaddq, vhsubq, vmulhq)
39285 (vqaddq, vqsubq, vqdmulhq, vrhaddq, vrmulhq): New.
39286 * config/arm/arm-mve-builtins-base.h (vhaddq, vhsubq, vmulhq)
39287 (vqaddq, vqsubq, vqdmulhq, vrhaddq, vrmulhq): New.
39288 * config/arm/arm_mve.h (vhsubq): Remove.
39290 (vhaddq_m): Remove.
39291 (vhsubq_m): Remove.
39292 (vhaddq_x): Remove.
39293 (vhsubq_x): Remove.
39294 (vhsubq_u8): Remove.
39295 (vhsubq_n_u8): Remove.
39296 (vhaddq_u8): Remove.
39297 (vhaddq_n_u8): Remove.
39298 (vhsubq_s8): Remove.
39299 (vhsubq_n_s8): Remove.
39300 (vhaddq_s8): Remove.
39301 (vhaddq_n_s8): Remove.
39302 (vhsubq_u16): Remove.
39303 (vhsubq_n_u16): Remove.
39304 (vhaddq_u16): Remove.
39305 (vhaddq_n_u16): Remove.
39306 (vhsubq_s16): Remove.
39307 (vhsubq_n_s16): Remove.
39308 (vhaddq_s16): Remove.
39309 (vhaddq_n_s16): Remove.
39310 (vhsubq_u32): Remove.
39311 (vhsubq_n_u32): Remove.
39312 (vhaddq_u32): Remove.
39313 (vhaddq_n_u32): Remove.
39314 (vhsubq_s32): Remove.
39315 (vhsubq_n_s32): Remove.
39316 (vhaddq_s32): Remove.
39317 (vhaddq_n_s32): Remove.
39318 (vhaddq_m_n_s8): Remove.
39319 (vhaddq_m_n_s32): Remove.
39320 (vhaddq_m_n_s16): Remove.
39321 (vhaddq_m_n_u8): Remove.
39322 (vhaddq_m_n_u32): Remove.
39323 (vhaddq_m_n_u16): Remove.
39324 (vhaddq_m_s8): Remove.
39325 (vhaddq_m_s32): Remove.
39326 (vhaddq_m_s16): Remove.
39327 (vhaddq_m_u8): Remove.
39328 (vhaddq_m_u32): Remove.
39329 (vhaddq_m_u16): Remove.
39330 (vhsubq_m_n_s8): Remove.
39331 (vhsubq_m_n_s32): Remove.
39332 (vhsubq_m_n_s16): Remove.
39333 (vhsubq_m_n_u8): Remove.
39334 (vhsubq_m_n_u32): Remove.
39335 (vhsubq_m_n_u16): Remove.
39336 (vhsubq_m_s8): Remove.
39337 (vhsubq_m_s32): Remove.
39338 (vhsubq_m_s16): Remove.
39339 (vhsubq_m_u8): Remove.
39340 (vhsubq_m_u32): Remove.
39341 (vhsubq_m_u16): Remove.
39342 (vhaddq_x_n_s8): Remove.
39343 (vhaddq_x_n_s16): Remove.
39344 (vhaddq_x_n_s32): Remove.
39345 (vhaddq_x_n_u8): Remove.
39346 (vhaddq_x_n_u16): Remove.
39347 (vhaddq_x_n_u32): Remove.
39348 (vhaddq_x_s8): Remove.
39349 (vhaddq_x_s16): Remove.
39350 (vhaddq_x_s32): Remove.
39351 (vhaddq_x_u8): Remove.
39352 (vhaddq_x_u16): Remove.
39353 (vhaddq_x_u32): Remove.
39354 (vhsubq_x_n_s8): Remove.
39355 (vhsubq_x_n_s16): Remove.
39356 (vhsubq_x_n_s32): Remove.
39357 (vhsubq_x_n_u8): Remove.
39358 (vhsubq_x_n_u16): Remove.
39359 (vhsubq_x_n_u32): Remove.
39360 (vhsubq_x_s8): Remove.
39361 (vhsubq_x_s16): Remove.
39362 (vhsubq_x_s32): Remove.
39363 (vhsubq_x_u8): Remove.
39364 (vhsubq_x_u16): Remove.
39365 (vhsubq_x_u32): Remove.
39366 (__arm_vhsubq_u8): Remove.
39367 (__arm_vhsubq_n_u8): Remove.
39368 (__arm_vhaddq_u8): Remove.
39369 (__arm_vhaddq_n_u8): Remove.
39370 (__arm_vhsubq_s8): Remove.
39371 (__arm_vhsubq_n_s8): Remove.
39372 (__arm_vhaddq_s8): Remove.
39373 (__arm_vhaddq_n_s8): Remove.
39374 (__arm_vhsubq_u16): Remove.
39375 (__arm_vhsubq_n_u16): Remove.
39376 (__arm_vhaddq_u16): Remove.
39377 (__arm_vhaddq_n_u16): Remove.
39378 (__arm_vhsubq_s16): Remove.
39379 (__arm_vhsubq_n_s16): Remove.
39380 (__arm_vhaddq_s16): Remove.
39381 (__arm_vhaddq_n_s16): Remove.
39382 (__arm_vhsubq_u32): Remove.
39383 (__arm_vhsubq_n_u32): Remove.
39384 (__arm_vhaddq_u32): Remove.
39385 (__arm_vhaddq_n_u32): Remove.
39386 (__arm_vhsubq_s32): Remove.
39387 (__arm_vhsubq_n_s32): Remove.
39388 (__arm_vhaddq_s32): Remove.
39389 (__arm_vhaddq_n_s32): Remove.
39390 (__arm_vhaddq_m_n_s8): Remove.
39391 (__arm_vhaddq_m_n_s32): Remove.
39392 (__arm_vhaddq_m_n_s16): Remove.
39393 (__arm_vhaddq_m_n_u8): Remove.
39394 (__arm_vhaddq_m_n_u32): Remove.
39395 (__arm_vhaddq_m_n_u16): Remove.
39396 (__arm_vhaddq_m_s8): Remove.
39397 (__arm_vhaddq_m_s32): Remove.
39398 (__arm_vhaddq_m_s16): Remove.
39399 (__arm_vhaddq_m_u8): Remove.
39400 (__arm_vhaddq_m_u32): Remove.
39401 (__arm_vhaddq_m_u16): Remove.
39402 (__arm_vhsubq_m_n_s8): Remove.
39403 (__arm_vhsubq_m_n_s32): Remove.
39404 (__arm_vhsubq_m_n_s16): Remove.
39405 (__arm_vhsubq_m_n_u8): Remove.
39406 (__arm_vhsubq_m_n_u32): Remove.
39407 (__arm_vhsubq_m_n_u16): Remove.
39408 (__arm_vhsubq_m_s8): Remove.
39409 (__arm_vhsubq_m_s32): Remove.
39410 (__arm_vhsubq_m_s16): Remove.
39411 (__arm_vhsubq_m_u8): Remove.
39412 (__arm_vhsubq_m_u32): Remove.
39413 (__arm_vhsubq_m_u16): Remove.
39414 (__arm_vhaddq_x_n_s8): Remove.
39415 (__arm_vhaddq_x_n_s16): Remove.
39416 (__arm_vhaddq_x_n_s32): Remove.
39417 (__arm_vhaddq_x_n_u8): Remove.
39418 (__arm_vhaddq_x_n_u16): Remove.
39419 (__arm_vhaddq_x_n_u32): Remove.
39420 (__arm_vhaddq_x_s8): Remove.
39421 (__arm_vhaddq_x_s16): Remove.
39422 (__arm_vhaddq_x_s32): Remove.
39423 (__arm_vhaddq_x_u8): Remove.
39424 (__arm_vhaddq_x_u16): Remove.
39425 (__arm_vhaddq_x_u32): Remove.
39426 (__arm_vhsubq_x_n_s8): Remove.
39427 (__arm_vhsubq_x_n_s16): Remove.
39428 (__arm_vhsubq_x_n_s32): Remove.
39429 (__arm_vhsubq_x_n_u8): Remove.
39430 (__arm_vhsubq_x_n_u16): Remove.
39431 (__arm_vhsubq_x_n_u32): Remove.
39432 (__arm_vhsubq_x_s8): Remove.
39433 (__arm_vhsubq_x_s16): Remove.
39434 (__arm_vhsubq_x_s32): Remove.
39435 (__arm_vhsubq_x_u8): Remove.
39436 (__arm_vhsubq_x_u16): Remove.
39437 (__arm_vhsubq_x_u32): Remove.
39438 (__arm_vhsubq): Remove.
39439 (__arm_vhaddq): Remove.
39440 (__arm_vhaddq_m): Remove.
39441 (__arm_vhsubq_m): Remove.
39442 (__arm_vhaddq_x): Remove.
39443 (__arm_vhsubq_x): Remove.
39445 (vmulhq_m): Remove.
39446 (vmulhq_x): Remove.
39447 (vmulhq_u8): Remove.
39448 (vmulhq_s8): Remove.
39449 (vmulhq_u16): Remove.
39450 (vmulhq_s16): Remove.
39451 (vmulhq_u32): Remove.
39452 (vmulhq_s32): Remove.
39453 (vmulhq_m_s8): Remove.
39454 (vmulhq_m_s32): Remove.
39455 (vmulhq_m_s16): Remove.
39456 (vmulhq_m_u8): Remove.
39457 (vmulhq_m_u32): Remove.
39458 (vmulhq_m_u16): Remove.
39459 (vmulhq_x_s8): Remove.
39460 (vmulhq_x_s16): Remove.
39461 (vmulhq_x_s32): Remove.
39462 (vmulhq_x_u8): Remove.
39463 (vmulhq_x_u16): Remove.
39464 (vmulhq_x_u32): Remove.
39465 (__arm_vmulhq_u8): Remove.
39466 (__arm_vmulhq_s8): Remove.
39467 (__arm_vmulhq_u16): Remove.
39468 (__arm_vmulhq_s16): Remove.
39469 (__arm_vmulhq_u32): Remove.
39470 (__arm_vmulhq_s32): Remove.
39471 (__arm_vmulhq_m_s8): Remove.
39472 (__arm_vmulhq_m_s32): Remove.
39473 (__arm_vmulhq_m_s16): Remove.
39474 (__arm_vmulhq_m_u8): Remove.
39475 (__arm_vmulhq_m_u32): Remove.
39476 (__arm_vmulhq_m_u16): Remove.
39477 (__arm_vmulhq_x_s8): Remove.
39478 (__arm_vmulhq_x_s16): Remove.
39479 (__arm_vmulhq_x_s32): Remove.
39480 (__arm_vmulhq_x_u8): Remove.
39481 (__arm_vmulhq_x_u16): Remove.
39482 (__arm_vmulhq_x_u32): Remove.
39483 (__arm_vmulhq): Remove.
39484 (__arm_vmulhq_m): Remove.
39485 (__arm_vmulhq_x): Remove.
39488 (vqaddq_m): Remove.
39489 (vqsubq_m): Remove.
39490 (vqsubq_u8): Remove.
39491 (vqsubq_n_u8): Remove.
39492 (vqaddq_u8): Remove.
39493 (vqaddq_n_u8): Remove.
39494 (vqsubq_s8): Remove.
39495 (vqsubq_n_s8): Remove.
39496 (vqaddq_s8): Remove.
39497 (vqaddq_n_s8): Remove.
39498 (vqsubq_u16): Remove.
39499 (vqsubq_n_u16): Remove.
39500 (vqaddq_u16): Remove.
39501 (vqaddq_n_u16): Remove.
39502 (vqsubq_s16): Remove.
39503 (vqsubq_n_s16): Remove.
39504 (vqaddq_s16): Remove.
39505 (vqaddq_n_s16): Remove.
39506 (vqsubq_u32): Remove.
39507 (vqsubq_n_u32): Remove.
39508 (vqaddq_u32): Remove.
39509 (vqaddq_n_u32): Remove.
39510 (vqsubq_s32): Remove.
39511 (vqsubq_n_s32): Remove.
39512 (vqaddq_s32): Remove.
39513 (vqaddq_n_s32): Remove.
39514 (vqaddq_m_n_s8): Remove.
39515 (vqaddq_m_n_s32): Remove.
39516 (vqaddq_m_n_s16): Remove.
39517 (vqaddq_m_n_u8): Remove.
39518 (vqaddq_m_n_u32): Remove.
39519 (vqaddq_m_n_u16): Remove.
39520 (vqaddq_m_s8): Remove.
39521 (vqaddq_m_s32): Remove.
39522 (vqaddq_m_s16): Remove.
39523 (vqaddq_m_u8): Remove.
39524 (vqaddq_m_u32): Remove.
39525 (vqaddq_m_u16): Remove.
39526 (vqsubq_m_n_s8): Remove.
39527 (vqsubq_m_n_s32): Remove.
39528 (vqsubq_m_n_s16): Remove.
39529 (vqsubq_m_n_u8): Remove.
39530 (vqsubq_m_n_u32): Remove.
39531 (vqsubq_m_n_u16): Remove.
39532 (vqsubq_m_s8): Remove.
39533 (vqsubq_m_s32): Remove.
39534 (vqsubq_m_s16): Remove.
39535 (vqsubq_m_u8): Remove.
39536 (vqsubq_m_u32): Remove.
39537 (vqsubq_m_u16): Remove.
39538 (__arm_vqsubq_u8): Remove.
39539 (__arm_vqsubq_n_u8): Remove.
39540 (__arm_vqaddq_u8): Remove.
39541 (__arm_vqaddq_n_u8): Remove.
39542 (__arm_vqsubq_s8): Remove.
39543 (__arm_vqsubq_n_s8): Remove.
39544 (__arm_vqaddq_s8): Remove.
39545 (__arm_vqaddq_n_s8): Remove.
39546 (__arm_vqsubq_u16): Remove.
39547 (__arm_vqsubq_n_u16): Remove.
39548 (__arm_vqaddq_u16): Remove.
39549 (__arm_vqaddq_n_u16): Remove.
39550 (__arm_vqsubq_s16): Remove.
39551 (__arm_vqsubq_n_s16): Remove.
39552 (__arm_vqaddq_s16): Remove.
39553 (__arm_vqaddq_n_s16): Remove.
39554 (__arm_vqsubq_u32): Remove.
39555 (__arm_vqsubq_n_u32): Remove.
39556 (__arm_vqaddq_u32): Remove.
39557 (__arm_vqaddq_n_u32): Remove.
39558 (__arm_vqsubq_s32): Remove.
39559 (__arm_vqsubq_n_s32): Remove.
39560 (__arm_vqaddq_s32): Remove.
39561 (__arm_vqaddq_n_s32): Remove.
39562 (__arm_vqaddq_m_n_s8): Remove.
39563 (__arm_vqaddq_m_n_s32): Remove.
39564 (__arm_vqaddq_m_n_s16): Remove.
39565 (__arm_vqaddq_m_n_u8): Remove.
39566 (__arm_vqaddq_m_n_u32): Remove.
39567 (__arm_vqaddq_m_n_u16): Remove.
39568 (__arm_vqaddq_m_s8): Remove.
39569 (__arm_vqaddq_m_s32): Remove.
39570 (__arm_vqaddq_m_s16): Remove.
39571 (__arm_vqaddq_m_u8): Remove.
39572 (__arm_vqaddq_m_u32): Remove.
39573 (__arm_vqaddq_m_u16): Remove.
39574 (__arm_vqsubq_m_n_s8): Remove.
39575 (__arm_vqsubq_m_n_s32): Remove.
39576 (__arm_vqsubq_m_n_s16): Remove.
39577 (__arm_vqsubq_m_n_u8): Remove.
39578 (__arm_vqsubq_m_n_u32): Remove.
39579 (__arm_vqsubq_m_n_u16): Remove.
39580 (__arm_vqsubq_m_s8): Remove.
39581 (__arm_vqsubq_m_s32): Remove.
39582 (__arm_vqsubq_m_s16): Remove.
39583 (__arm_vqsubq_m_u8): Remove.
39584 (__arm_vqsubq_m_u32): Remove.
39585 (__arm_vqsubq_m_u16): Remove.
39586 (__arm_vqsubq): Remove.
39587 (__arm_vqaddq): Remove.
39588 (__arm_vqaddq_m): Remove.
39589 (__arm_vqsubq_m): Remove.
39590 (vqdmulhq): Remove.
39591 (vqdmulhq_m): Remove.
39592 (vqdmulhq_s8): Remove.
39593 (vqdmulhq_n_s8): Remove.
39594 (vqdmulhq_s16): Remove.
39595 (vqdmulhq_n_s16): Remove.
39596 (vqdmulhq_s32): Remove.
39597 (vqdmulhq_n_s32): Remove.
39598 (vqdmulhq_m_n_s8): Remove.
39599 (vqdmulhq_m_n_s32): Remove.
39600 (vqdmulhq_m_n_s16): Remove.
39601 (vqdmulhq_m_s8): Remove.
39602 (vqdmulhq_m_s32): Remove.
39603 (vqdmulhq_m_s16): Remove.
39604 (__arm_vqdmulhq_s8): Remove.
39605 (__arm_vqdmulhq_n_s8): Remove.
39606 (__arm_vqdmulhq_s16): Remove.
39607 (__arm_vqdmulhq_n_s16): Remove.
39608 (__arm_vqdmulhq_s32): Remove.
39609 (__arm_vqdmulhq_n_s32): Remove.
39610 (__arm_vqdmulhq_m_n_s8): Remove.
39611 (__arm_vqdmulhq_m_n_s32): Remove.
39612 (__arm_vqdmulhq_m_n_s16): Remove.
39613 (__arm_vqdmulhq_m_s8): Remove.
39614 (__arm_vqdmulhq_m_s32): Remove.
39615 (__arm_vqdmulhq_m_s16): Remove.
39616 (__arm_vqdmulhq): Remove.
39617 (__arm_vqdmulhq_m): Remove.
39619 (vrhaddq_m): Remove.
39620 (vrhaddq_x): Remove.
39621 (vrhaddq_u8): Remove.
39622 (vrhaddq_s8): Remove.
39623 (vrhaddq_u16): Remove.
39624 (vrhaddq_s16): Remove.
39625 (vrhaddq_u32): Remove.
39626 (vrhaddq_s32): Remove.
39627 (vrhaddq_m_s8): Remove.
39628 (vrhaddq_m_s32): Remove.
39629 (vrhaddq_m_s16): Remove.
39630 (vrhaddq_m_u8): Remove.
39631 (vrhaddq_m_u32): Remove.
39632 (vrhaddq_m_u16): Remove.
39633 (vrhaddq_x_s8): Remove.
39634 (vrhaddq_x_s16): Remove.
39635 (vrhaddq_x_s32): Remove.
39636 (vrhaddq_x_u8): Remove.
39637 (vrhaddq_x_u16): Remove.
39638 (vrhaddq_x_u32): Remove.
39639 (__arm_vrhaddq_u8): Remove.
39640 (__arm_vrhaddq_s8): Remove.
39641 (__arm_vrhaddq_u16): Remove.
39642 (__arm_vrhaddq_s16): Remove.
39643 (__arm_vrhaddq_u32): Remove.
39644 (__arm_vrhaddq_s32): Remove.
39645 (__arm_vrhaddq_m_s8): Remove.
39646 (__arm_vrhaddq_m_s32): Remove.
39647 (__arm_vrhaddq_m_s16): Remove.
39648 (__arm_vrhaddq_m_u8): Remove.
39649 (__arm_vrhaddq_m_u32): Remove.
39650 (__arm_vrhaddq_m_u16): Remove.
39651 (__arm_vrhaddq_x_s8): Remove.
39652 (__arm_vrhaddq_x_s16): Remove.
39653 (__arm_vrhaddq_x_s32): Remove.
39654 (__arm_vrhaddq_x_u8): Remove.
39655 (__arm_vrhaddq_x_u16): Remove.
39656 (__arm_vrhaddq_x_u32): Remove.
39657 (__arm_vrhaddq): Remove.
39658 (__arm_vrhaddq_m): Remove.
39659 (__arm_vrhaddq_x): Remove.
39661 (vrmulhq_m): Remove.
39662 (vrmulhq_x): Remove.
39663 (vrmulhq_u8): Remove.
39664 (vrmulhq_s8): Remove.
39665 (vrmulhq_u16): Remove.
39666 (vrmulhq_s16): Remove.
39667 (vrmulhq_u32): Remove.
39668 (vrmulhq_s32): Remove.
39669 (vrmulhq_m_s8): Remove.
39670 (vrmulhq_m_s32): Remove.
39671 (vrmulhq_m_s16): Remove.
39672 (vrmulhq_m_u8): Remove.
39673 (vrmulhq_m_u32): Remove.
39674 (vrmulhq_m_u16): Remove.
39675 (vrmulhq_x_s8): Remove.
39676 (vrmulhq_x_s16): Remove.
39677 (vrmulhq_x_s32): Remove.
39678 (vrmulhq_x_u8): Remove.
39679 (vrmulhq_x_u16): Remove.
39680 (vrmulhq_x_u32): Remove.
39681 (__arm_vrmulhq_u8): Remove.
39682 (__arm_vrmulhq_s8): Remove.
39683 (__arm_vrmulhq_u16): Remove.
39684 (__arm_vrmulhq_s16): Remove.
39685 (__arm_vrmulhq_u32): Remove.
39686 (__arm_vrmulhq_s32): Remove.
39687 (__arm_vrmulhq_m_s8): Remove.
39688 (__arm_vrmulhq_m_s32): Remove.
39689 (__arm_vrmulhq_m_s16): Remove.
39690 (__arm_vrmulhq_m_u8): Remove.
39691 (__arm_vrmulhq_m_u32): Remove.
39692 (__arm_vrmulhq_m_u16): Remove.
39693 (__arm_vrmulhq_x_s8): Remove.
39694 (__arm_vrmulhq_x_s16): Remove.
39695 (__arm_vrmulhq_x_s32): Remove.
39696 (__arm_vrmulhq_x_u8): Remove.
39697 (__arm_vrmulhq_x_u16): Remove.
39698 (__arm_vrmulhq_x_u32): Remove.
39699 (__arm_vrmulhq): Remove.
39700 (__arm_vrmulhq_m): Remove.
39701 (__arm_vrmulhq_x): Remove.
39703 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
39705 * config/arm/iterators.md (MVE_INT_SU_BINARY): New.
39706 (mve_insn): Add vabdq, vhaddq, vhsubq, vmulhq, vqaddq, vqdmulhq,
39707 vqrdmulhq, vqrshlq, vqshlq, vqsubq, vrhaddq, vrmulhq, vrshlq.
39708 (supf): Add VQDMULHQ_S, VQRDMULHQ_S.
39709 * config/arm/mve.md (mve_vabdq_<supf><mode>)
39710 (@mve_vhaddq_<supf><mode>, mve_vhsubq_<supf><mode>)
39711 (mve_vmulhq_<supf><mode>, mve_vqaddq_<supf><mode>)
39712 (mve_vqdmulhq_s<mode>, mve_vqrdmulhq_s<mode>)
39713 (mve_vqrshlq_<supf><mode>, mve_vqshlq_<supf><mode>)
39714 (mve_vqsubq_<supf><mode>, @mve_vrhaddq_<supf><mode>)
39715 (mve_vrmulhq_<supf><mode>, mve_vrshlq_<supf><mode>): Merge into
39717 (@mve_<mve_insn>q_<supf><mode>): ... this.
39718 * config/arm/vec-common.md (avg<mode>3_floor, uavg<mode>3_floor)
39719 (avg<mode>3_ceil, uavg<mode>3_ceil): Use gen_mve_q instead of
39720 gen_mve_vhaddq / gen_mve_vrhaddq.
39722 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
39724 * config/arm/iterators.md (MVE_INT_SU_M_N_BINARY): New.
39725 (mve_insn): Add vhaddq, vhsubq, vmlaq, vmlasq, vqaddq, vqdmlahq,
39726 vqdmlashq, vqdmulhq, vqrdmlahq, vqrdmlashq, vqrdmulhq, vqsubq.
39727 (supf): Add VQDMLAHQ_M_N_S, VQDMLASHQ_M_N_S, VQRDMLAHQ_M_N_S,
39728 VQRDMLASHQ_M_N_S, VQDMULHQ_M_N_S, VQRDMULHQ_M_N_S.
39729 * config/arm/mve.md (mve_vhaddq_m_n_<supf><mode>)
39730 (mve_vhsubq_m_n_<supf><mode>, mve_vmlaq_m_n_<supf><mode>)
39731 (mve_vmlasq_m_n_<supf><mode>, mve_vqaddq_m_n_<supf><mode>)
39732 (mve_vqdmlahq_m_n_s<mode>, mve_vqdmlashq_m_n_s<mode>)
39733 (mve_vqrdmlahq_m_n_s<mode>, mve_vqrdmlashq_m_n_s<mode>)
39734 (mve_vqsubq_m_n_<supf><mode>, mve_vqdmulhq_m_n_s<mode>)
39735 (mve_vqrdmulhq_m_n_s<mode>): Merge into ...
39736 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
39738 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
39740 * config/arm/iterators.md (MVE_INT_SU_N_BINARY): New.
39741 (mve_insn): Add vhaddq, vhsubq, vqaddq, vqdmulhq, vqrdmulhq,
39743 (supf): Add VQDMULHQ_N_S, VQRDMULHQ_N_S.
39744 * config/arm/mve.md (mve_vhaddq_n_<supf><mode>)
39745 (mve_vhsubq_n_<supf><mode>, mve_vqaddq_n_<supf><mode>)
39746 (mve_vqdmulhq_n_s<mode>, mve_vqrdmulhq_n_s<mode>)
39747 (mve_vqsubq_n_<supf><mode>): Merge into ...
39748 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
39750 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
39752 * config/arm/iterators.md (MVE_INT_SU_M_BINARY): New.
39753 (mve_insn): Add vabdq, vhaddq, vhsubq, vmaxq, vminq, vmulhq,
39754 vqaddq, vqdmladhq, vqdmladhxq, vqdmlsdhq, vqdmlsdhxq, vqdmulhq,
39755 vqrdmladhq, vqrdmladhxq, vqrdmlsdhq, vqrdmlsdhxq, vqrdmulhq,
39756 vqrshlq, vqshlq, vqsubq, vrhaddq, vrmulhq, vrshlq, vshlq.
39757 (supf): Add VQDMLADHQ_M_S, VQDMLADHXQ_M_S, VQDMLSDHQ_M_S,
39758 VQDMLSDHXQ_M_S, VQDMULHQ_M_S, VQRDMLADHQ_M_S, VQRDMLADHXQ_M_S,
39759 VQRDMLSDHQ_M_S, VQRDMLSDHXQ_M_S, VQRDMULHQ_M_S.
39760 * config/arm/mve.md (@mve_<mve_insn>q_m_<supf><mode>): New.
39761 (mve_vshlq_m_<supf><mode>): Merged into
39762 @mve_<mve_insn>q_m_<supf><mode>.
39763 (mve_vabdq_m_<supf><mode>): Likewise.
39764 (mve_vhaddq_m_<supf><mode>): Likewise.
39765 (mve_vhsubq_m_<supf><mode>): Likewise.
39766 (mve_vmaxq_m_<supf><mode>): Likewise.
39767 (mve_vminq_m_<supf><mode>): Likewise.
39768 (mve_vmulhq_m_<supf><mode>): Likewise.
39769 (mve_vqaddq_m_<supf><mode>): Likewise.
39770 (mve_vqrshlq_m_<supf><mode>): Likewise.
39771 (mve_vqshlq_m_<supf><mode>): Likewise.
39772 (mve_vqsubq_m_<supf><mode>): Likewise.
39773 (mve_vrhaddq_m_<supf><mode>): Likewise.
39774 (mve_vrmulhq_m_<supf><mode>): Likewise.
39775 (mve_vrshlq_m_<supf><mode>): Likewise.
39776 (mve_vqdmladhq_m_s<mode>): Likewise.
39777 (mve_vqdmladhxq_m_s<mode>): Likewise.
39778 (mve_vqdmlsdhq_m_s<mode>): Likewise.
39779 (mve_vqdmlsdhxq_m_s<mode>): Likewise.
39780 (mve_vqdmulhq_m_s<mode>): Likewise.
39781 (mve_vqrdmladhq_m_s<mode>): Likewise.
39782 (mve_vqrdmladhxq_m_s<mode>): Likewise.
39783 (mve_vqrdmlsdhq_m_s<mode>): Likewise.
39784 (mve_vqrdmlsdhxq_m_s<mode>): Likewise.
39785 (mve_vqrdmulhq_m_s<mode>): Likewise.
39787 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
39789 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_M_N): New. (vcreateq): New.
39790 * config/arm/arm-mve-builtins-base.def (vcreateq): New.
39791 * config/arm/arm-mve-builtins-base.h (vcreateq): New.
39792 * config/arm/arm_mve.h (vcreateq_f16): Remove.
39793 (vcreateq_f32): Remove.
39794 (vcreateq_u8): Remove.
39795 (vcreateq_u16): Remove.
39796 (vcreateq_u32): Remove.
39797 (vcreateq_u64): Remove.
39798 (vcreateq_s8): Remove.
39799 (vcreateq_s16): Remove.
39800 (vcreateq_s32): Remove.
39801 (vcreateq_s64): Remove.
39802 (__arm_vcreateq_u8): Remove.
39803 (__arm_vcreateq_u16): Remove.
39804 (__arm_vcreateq_u32): Remove.
39805 (__arm_vcreateq_u64): Remove.
39806 (__arm_vcreateq_s8): Remove.
39807 (__arm_vcreateq_s16): Remove.
39808 (__arm_vcreateq_s32): Remove.
39809 (__arm_vcreateq_s64): Remove.
39810 (__arm_vcreateq_f16): Remove.
39811 (__arm_vcreateq_f32): Remove.
39813 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
39815 * config/arm/iterators.md (MVE_FP_CREATE_ONLY): New.
39816 (mve_insn): Add VCREATEQ_S, VCREATEQ_U, VCREATEQ_F.
39817 * config/arm/mve.md (mve_vcreateq_f<mode>): Rename into ...
39818 (@mve_<mve_insn>q_f<mode>): ... this.
39819 (mve_vcreateq_<supf><mode>): Rename into ...
39820 (@mve_<mve_insn>q_<supf><mode>): ... this.
39822 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
39824 * config/arm/arm-mve-builtins-shapes.cc (create): New.
39825 * config/arm/arm-mve-builtins-shapes.h: (create): New.
39827 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
39829 * config/arm/arm-mve-builtins-functions.h (class
39830 unspec_mve_function_exact_insn): New.
39832 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
39834 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_N_NO_N_F): New.
39836 * config/arm/arm-mve-builtins-base.def (vorrq): New.
39837 * config/arm/arm-mve-builtins-base.h (vorrq): New.
39838 * config/arm/arm-mve-builtins.cc
39839 (function_instance::has_inactive_argument): Handle vorrq.
39840 * config/arm/arm_mve.h (vorrq): Remove.
39841 (vorrq_m_n): Remove.
39844 (vorrq_u8): Remove.
39845 (vorrq_s8): Remove.
39846 (vorrq_u16): Remove.
39847 (vorrq_s16): Remove.
39848 (vorrq_u32): Remove.
39849 (vorrq_s32): Remove.
39850 (vorrq_n_u16): Remove.
39851 (vorrq_f16): Remove.
39852 (vorrq_n_s16): Remove.
39853 (vorrq_n_u32): Remove.
39854 (vorrq_f32): Remove.
39855 (vorrq_n_s32): Remove.
39856 (vorrq_m_n_s16): Remove.
39857 (vorrq_m_n_u16): Remove.
39858 (vorrq_m_n_s32): Remove.
39859 (vorrq_m_n_u32): Remove.
39860 (vorrq_m_s8): Remove.
39861 (vorrq_m_s32): Remove.
39862 (vorrq_m_s16): Remove.
39863 (vorrq_m_u8): Remove.
39864 (vorrq_m_u32): Remove.
39865 (vorrq_m_u16): Remove.
39866 (vorrq_m_f32): Remove.
39867 (vorrq_m_f16): Remove.
39868 (vorrq_x_s8): Remove.
39869 (vorrq_x_s16): Remove.
39870 (vorrq_x_s32): Remove.
39871 (vorrq_x_u8): Remove.
39872 (vorrq_x_u16): Remove.
39873 (vorrq_x_u32): Remove.
39874 (vorrq_x_f16): Remove.
39875 (vorrq_x_f32): Remove.
39876 (__arm_vorrq_u8): Remove.
39877 (__arm_vorrq_s8): Remove.
39878 (__arm_vorrq_u16): Remove.
39879 (__arm_vorrq_s16): Remove.
39880 (__arm_vorrq_u32): Remove.
39881 (__arm_vorrq_s32): Remove.
39882 (__arm_vorrq_n_u16): Remove.
39883 (__arm_vorrq_n_s16): Remove.
39884 (__arm_vorrq_n_u32): Remove.
39885 (__arm_vorrq_n_s32): Remove.
39886 (__arm_vorrq_m_n_s16): Remove.
39887 (__arm_vorrq_m_n_u16): Remove.
39888 (__arm_vorrq_m_n_s32): Remove.
39889 (__arm_vorrq_m_n_u32): Remove.
39890 (__arm_vorrq_m_s8): Remove.
39891 (__arm_vorrq_m_s32): Remove.
39892 (__arm_vorrq_m_s16): Remove.
39893 (__arm_vorrq_m_u8): Remove.
39894 (__arm_vorrq_m_u32): Remove.
39895 (__arm_vorrq_m_u16): Remove.
39896 (__arm_vorrq_x_s8): Remove.
39897 (__arm_vorrq_x_s16): Remove.
39898 (__arm_vorrq_x_s32): Remove.
39899 (__arm_vorrq_x_u8): Remove.
39900 (__arm_vorrq_x_u16): Remove.
39901 (__arm_vorrq_x_u32): Remove.
39902 (__arm_vorrq_f16): Remove.
39903 (__arm_vorrq_f32): Remove.
39904 (__arm_vorrq_m_f32): Remove.
39905 (__arm_vorrq_m_f16): Remove.
39906 (__arm_vorrq_x_f16): Remove.
39907 (__arm_vorrq_x_f32): Remove.
39908 (__arm_vorrq): Remove.
39909 (__arm_vorrq_m_n): Remove.
39910 (__arm_vorrq_m): Remove.
39911 (__arm_vorrq_x): Remove.
39913 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
39915 * config/arm/arm-mve-builtins-shapes.cc (binary_orrq): New.
39916 * config/arm/arm-mve-builtins-shapes.h (binary_orrq): New.
39917 * config/arm/arm-mve-builtins.cc (preds_m_or_none): Remove static.
39918 * config/arm/arm-mve-builtins.h (preds_m_or_none): Declare.
39920 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
39922 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M): New.
39923 (vandq,veorq): New.
39924 * config/arm/arm-mve-builtins-base.def (vandq, veorq): New.
39925 * config/arm/arm-mve-builtins-base.h (vandq, veorq): New.
39926 * config/arm/arm_mve.h (vandq): Remove.
39929 (vandq_u8): Remove.
39930 (vandq_s8): Remove.
39931 (vandq_u16): Remove.
39932 (vandq_s16): Remove.
39933 (vandq_u32): Remove.
39934 (vandq_s32): Remove.
39935 (vandq_f16): Remove.
39936 (vandq_f32): Remove.
39937 (vandq_m_s8): Remove.
39938 (vandq_m_s32): Remove.
39939 (vandq_m_s16): Remove.
39940 (vandq_m_u8): Remove.
39941 (vandq_m_u32): Remove.
39942 (vandq_m_u16): Remove.
39943 (vandq_m_f32): Remove.
39944 (vandq_m_f16): Remove.
39945 (vandq_x_s8): Remove.
39946 (vandq_x_s16): Remove.
39947 (vandq_x_s32): Remove.
39948 (vandq_x_u8): Remove.
39949 (vandq_x_u16): Remove.
39950 (vandq_x_u32): Remove.
39951 (vandq_x_f16): Remove.
39952 (vandq_x_f32): Remove.
39953 (__arm_vandq_u8): Remove.
39954 (__arm_vandq_s8): Remove.
39955 (__arm_vandq_u16): Remove.
39956 (__arm_vandq_s16): Remove.
39957 (__arm_vandq_u32): Remove.
39958 (__arm_vandq_s32): Remove.
39959 (__arm_vandq_m_s8): Remove.
39960 (__arm_vandq_m_s32): Remove.
39961 (__arm_vandq_m_s16): Remove.
39962 (__arm_vandq_m_u8): Remove.
39963 (__arm_vandq_m_u32): Remove.
39964 (__arm_vandq_m_u16): Remove.
39965 (__arm_vandq_x_s8): Remove.
39966 (__arm_vandq_x_s16): Remove.
39967 (__arm_vandq_x_s32): Remove.
39968 (__arm_vandq_x_u8): Remove.
39969 (__arm_vandq_x_u16): Remove.
39970 (__arm_vandq_x_u32): Remove.
39971 (__arm_vandq_f16): Remove.
39972 (__arm_vandq_f32): Remove.
39973 (__arm_vandq_m_f32): Remove.
39974 (__arm_vandq_m_f16): Remove.
39975 (__arm_vandq_x_f16): Remove.
39976 (__arm_vandq_x_f32): Remove.
39977 (__arm_vandq): Remove.
39978 (__arm_vandq_m): Remove.
39979 (__arm_vandq_x): Remove.
39982 (veorq_u8): Remove.
39983 (veorq_s8): Remove.
39984 (veorq_u16): Remove.
39985 (veorq_s16): Remove.
39986 (veorq_u32): Remove.
39987 (veorq_s32): Remove.
39988 (veorq_f16): Remove.
39989 (veorq_f32): Remove.
39990 (veorq_m_s8): Remove.
39991 (veorq_m_s32): Remove.
39992 (veorq_m_s16): Remove.
39993 (veorq_m_u8): Remove.
39994 (veorq_m_u32): Remove.
39995 (veorq_m_u16): Remove.
39996 (veorq_m_f32): Remove.
39997 (veorq_m_f16): Remove.
39998 (veorq_x_s8): Remove.
39999 (veorq_x_s16): Remove.
40000 (veorq_x_s32): Remove.
40001 (veorq_x_u8): Remove.
40002 (veorq_x_u16): Remove.
40003 (veorq_x_u32): Remove.
40004 (veorq_x_f16): Remove.
40005 (veorq_x_f32): Remove.
40006 (__arm_veorq_u8): Remove.
40007 (__arm_veorq_s8): Remove.
40008 (__arm_veorq_u16): Remove.
40009 (__arm_veorq_s16): Remove.
40010 (__arm_veorq_u32): Remove.
40011 (__arm_veorq_s32): Remove.
40012 (__arm_veorq_m_s8): Remove.
40013 (__arm_veorq_m_s32): Remove.
40014 (__arm_veorq_m_s16): Remove.
40015 (__arm_veorq_m_u8): Remove.
40016 (__arm_veorq_m_u32): Remove.
40017 (__arm_veorq_m_u16): Remove.
40018 (__arm_veorq_x_s8): Remove.
40019 (__arm_veorq_x_s16): Remove.
40020 (__arm_veorq_x_s32): Remove.
40021 (__arm_veorq_x_u8): Remove.
40022 (__arm_veorq_x_u16): Remove.
40023 (__arm_veorq_x_u32): Remove.
40024 (__arm_veorq_f16): Remove.
40025 (__arm_veorq_f32): Remove.
40026 (__arm_veorq_m_f32): Remove.
40027 (__arm_veorq_m_f16): Remove.
40028 (__arm_veorq_x_f16): Remove.
40029 (__arm_veorq_x_f32): Remove.
40030 (__arm_veorq): Remove.
40031 (__arm_veorq_m): Remove.
40032 (__arm_veorq_x): Remove.
40034 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
40036 * config/arm/iterators.md (MVE_INT_M_BINARY_LOGIC)
40037 (MVE_FP_M_BINARY_LOGIC): New.
40038 (MVE_INT_M_N_BINARY_LOGIC): New.
40039 (MVE_INT_N_BINARY_LOGIC): New.
40040 (mve_insn): Add vand, veor, vorr, vbic.
40041 * config/arm/mve.md (mve_vandq_m_<supf><mode>)
40042 (mve_veorq_m_<supf><mode>, mve_vorrq_m_<supf><mode>)
40043 (mve_vbicq_m_<supf><mode>): Merge into ...
40044 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
40045 (mve_vandq_m_f<mode>, mve_veorq_m_f<mode>, mve_vorrq_m_f<mode>)
40046 (mve_vbicq_m_f<mode>): Merge into ...
40047 (@mve_<mve_insn>q_m_f<mode>): ... this.
40048 (mve_vorrq_n_<supf><mode>)
40049 (mve_vbicq_n_<supf><mode>): Merge into ...
40050 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
40051 (mve_vorrq_m_n_<supf><mode>, mve_vbicq_m_n_<supf><mode>): Merge
40053 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
40055 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
40057 * config/arm/arm-mve-builtins-shapes.cc (binary): New.
40058 * config/arm/arm-mve-builtins-shapes.h (binary): New.
40060 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
40062 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_N):
40064 (vaddq, vmulq, vsubq): New.
40065 * config/arm/arm-mve-builtins-base.def (vaddq, vmulq, vsubq): New.
40066 * config/arm/arm-mve-builtins-base.h (vaddq, vmulq, vsubq): New.
40067 * config/arm/arm_mve.h (vaddq): Remove.
40070 (vaddq_n_u8): Remove.
40071 (vaddq_n_s8): Remove.
40072 (vaddq_n_u16): Remove.
40073 (vaddq_n_s16): Remove.
40074 (vaddq_n_u32): Remove.
40075 (vaddq_n_s32): Remove.
40076 (vaddq_n_f16): Remove.
40077 (vaddq_n_f32): Remove.
40078 (vaddq_m_n_s8): Remove.
40079 (vaddq_m_n_s32): Remove.
40080 (vaddq_m_n_s16): Remove.
40081 (vaddq_m_n_u8): Remove.
40082 (vaddq_m_n_u32): Remove.
40083 (vaddq_m_n_u16): Remove.
40084 (vaddq_m_s8): Remove.
40085 (vaddq_m_s32): Remove.
40086 (vaddq_m_s16): Remove.
40087 (vaddq_m_u8): Remove.
40088 (vaddq_m_u32): Remove.
40089 (vaddq_m_u16): Remove.
40090 (vaddq_m_f32): Remove.
40091 (vaddq_m_f16): Remove.
40092 (vaddq_m_n_f32): Remove.
40093 (vaddq_m_n_f16): Remove.
40094 (vaddq_s8): Remove.
40095 (vaddq_s16): Remove.
40096 (vaddq_s32): Remove.
40097 (vaddq_u8): Remove.
40098 (vaddq_u16): Remove.
40099 (vaddq_u32): Remove.
40100 (vaddq_f16): Remove.
40101 (vaddq_f32): Remove.
40102 (vaddq_x_s8): Remove.
40103 (vaddq_x_s16): Remove.
40104 (vaddq_x_s32): Remove.
40105 (vaddq_x_n_s8): Remove.
40106 (vaddq_x_n_s16): Remove.
40107 (vaddq_x_n_s32): Remove.
40108 (vaddq_x_u8): Remove.
40109 (vaddq_x_u16): Remove.
40110 (vaddq_x_u32): Remove.
40111 (vaddq_x_n_u8): Remove.
40112 (vaddq_x_n_u16): Remove.
40113 (vaddq_x_n_u32): Remove.
40114 (vaddq_x_f16): Remove.
40115 (vaddq_x_f32): Remove.
40116 (vaddq_x_n_f16): Remove.
40117 (vaddq_x_n_f32): Remove.
40118 (__arm_vaddq_n_u8): Remove.
40119 (__arm_vaddq_n_s8): Remove.
40120 (__arm_vaddq_n_u16): Remove.
40121 (__arm_vaddq_n_s16): Remove.
40122 (__arm_vaddq_n_u32): Remove.
40123 (__arm_vaddq_n_s32): Remove.
40124 (__arm_vaddq_m_n_s8): Remove.
40125 (__arm_vaddq_m_n_s32): Remove.
40126 (__arm_vaddq_m_n_s16): Remove.
40127 (__arm_vaddq_m_n_u8): Remove.
40128 (__arm_vaddq_m_n_u32): Remove.
40129 (__arm_vaddq_m_n_u16): Remove.
40130 (__arm_vaddq_m_s8): Remove.
40131 (__arm_vaddq_m_s32): Remove.
40132 (__arm_vaddq_m_s16): Remove.
40133 (__arm_vaddq_m_u8): Remove.
40134 (__arm_vaddq_m_u32): Remove.
40135 (__arm_vaddq_m_u16): Remove.
40136 (__arm_vaddq_s8): Remove.
40137 (__arm_vaddq_s16): Remove.
40138 (__arm_vaddq_s32): Remove.
40139 (__arm_vaddq_u8): Remove.
40140 (__arm_vaddq_u16): Remove.
40141 (__arm_vaddq_u32): Remove.
40142 (__arm_vaddq_x_s8): Remove.
40143 (__arm_vaddq_x_s16): Remove.
40144 (__arm_vaddq_x_s32): Remove.
40145 (__arm_vaddq_x_n_s8): Remove.
40146 (__arm_vaddq_x_n_s16): Remove.
40147 (__arm_vaddq_x_n_s32): Remove.
40148 (__arm_vaddq_x_u8): Remove.
40149 (__arm_vaddq_x_u16): Remove.
40150 (__arm_vaddq_x_u32): Remove.
40151 (__arm_vaddq_x_n_u8): Remove.
40152 (__arm_vaddq_x_n_u16): Remove.
40153 (__arm_vaddq_x_n_u32): Remove.
40154 (__arm_vaddq_n_f16): Remove.
40155 (__arm_vaddq_n_f32): Remove.
40156 (__arm_vaddq_m_f32): Remove.
40157 (__arm_vaddq_m_f16): Remove.
40158 (__arm_vaddq_m_n_f32): Remove.
40159 (__arm_vaddq_m_n_f16): Remove.
40160 (__arm_vaddq_f16): Remove.
40161 (__arm_vaddq_f32): Remove.
40162 (__arm_vaddq_x_f16): Remove.
40163 (__arm_vaddq_x_f32): Remove.
40164 (__arm_vaddq_x_n_f16): Remove.
40165 (__arm_vaddq_x_n_f32): Remove.
40166 (__arm_vaddq): Remove.
40167 (__arm_vaddq_m): Remove.
40168 (__arm_vaddq_x): Remove.
40172 (vmulq_u8): Remove.
40173 (vmulq_n_u8): Remove.
40174 (vmulq_s8): Remove.
40175 (vmulq_n_s8): Remove.
40176 (vmulq_u16): Remove.
40177 (vmulq_n_u16): Remove.
40178 (vmulq_s16): Remove.
40179 (vmulq_n_s16): Remove.
40180 (vmulq_u32): Remove.
40181 (vmulq_n_u32): Remove.
40182 (vmulq_s32): Remove.
40183 (vmulq_n_s32): Remove.
40184 (vmulq_n_f16): Remove.
40185 (vmulq_f16): Remove.
40186 (vmulq_n_f32): Remove.
40187 (vmulq_f32): Remove.
40188 (vmulq_m_n_s8): Remove.
40189 (vmulq_m_n_s32): Remove.
40190 (vmulq_m_n_s16): Remove.
40191 (vmulq_m_n_u8): Remove.
40192 (vmulq_m_n_u32): Remove.
40193 (vmulq_m_n_u16): Remove.
40194 (vmulq_m_s8): Remove.
40195 (vmulq_m_s32): Remove.
40196 (vmulq_m_s16): Remove.
40197 (vmulq_m_u8): Remove.
40198 (vmulq_m_u32): Remove.
40199 (vmulq_m_u16): Remove.
40200 (vmulq_m_f32): Remove.
40201 (vmulq_m_f16): Remove.
40202 (vmulq_m_n_f32): Remove.
40203 (vmulq_m_n_f16): Remove.
40204 (vmulq_x_s8): Remove.
40205 (vmulq_x_s16): Remove.
40206 (vmulq_x_s32): Remove.
40207 (vmulq_x_n_s8): Remove.
40208 (vmulq_x_n_s16): Remove.
40209 (vmulq_x_n_s32): Remove.
40210 (vmulq_x_u8): Remove.
40211 (vmulq_x_u16): Remove.
40212 (vmulq_x_u32): Remove.
40213 (vmulq_x_n_u8): Remove.
40214 (vmulq_x_n_u16): Remove.
40215 (vmulq_x_n_u32): Remove.
40216 (vmulq_x_f16): Remove.
40217 (vmulq_x_f32): Remove.
40218 (vmulq_x_n_f16): Remove.
40219 (vmulq_x_n_f32): Remove.
40220 (__arm_vmulq_u8): Remove.
40221 (__arm_vmulq_n_u8): Remove.
40222 (__arm_vmulq_s8): Remove.
40223 (__arm_vmulq_n_s8): Remove.
40224 (__arm_vmulq_u16): Remove.
40225 (__arm_vmulq_n_u16): Remove.
40226 (__arm_vmulq_s16): Remove.
40227 (__arm_vmulq_n_s16): Remove.
40228 (__arm_vmulq_u32): Remove.
40229 (__arm_vmulq_n_u32): Remove.
40230 (__arm_vmulq_s32): Remove.
40231 (__arm_vmulq_n_s32): Remove.
40232 (__arm_vmulq_m_n_s8): Remove.
40233 (__arm_vmulq_m_n_s32): Remove.
40234 (__arm_vmulq_m_n_s16): Remove.
40235 (__arm_vmulq_m_n_u8): Remove.
40236 (__arm_vmulq_m_n_u32): Remove.
40237 (__arm_vmulq_m_n_u16): Remove.
40238 (__arm_vmulq_m_s8): Remove.
40239 (__arm_vmulq_m_s32): Remove.
40240 (__arm_vmulq_m_s16): Remove.
40241 (__arm_vmulq_m_u8): Remove.
40242 (__arm_vmulq_m_u32): Remove.
40243 (__arm_vmulq_m_u16): Remove.
40244 (__arm_vmulq_x_s8): Remove.
40245 (__arm_vmulq_x_s16): Remove.
40246 (__arm_vmulq_x_s32): Remove.
40247 (__arm_vmulq_x_n_s8): Remove.
40248 (__arm_vmulq_x_n_s16): Remove.
40249 (__arm_vmulq_x_n_s32): Remove.
40250 (__arm_vmulq_x_u8): Remove.
40251 (__arm_vmulq_x_u16): Remove.
40252 (__arm_vmulq_x_u32): Remove.
40253 (__arm_vmulq_x_n_u8): Remove.
40254 (__arm_vmulq_x_n_u16): Remove.
40255 (__arm_vmulq_x_n_u32): Remove.
40256 (__arm_vmulq_n_f16): Remove.
40257 (__arm_vmulq_f16): Remove.
40258 (__arm_vmulq_n_f32): Remove.
40259 (__arm_vmulq_f32): Remove.
40260 (__arm_vmulq_m_f32): Remove.
40261 (__arm_vmulq_m_f16): Remove.
40262 (__arm_vmulq_m_n_f32): Remove.
40263 (__arm_vmulq_m_n_f16): Remove.
40264 (__arm_vmulq_x_f16): Remove.
40265 (__arm_vmulq_x_f32): Remove.
40266 (__arm_vmulq_x_n_f16): Remove.
40267 (__arm_vmulq_x_n_f32): Remove.
40268 (__arm_vmulq): Remove.
40269 (__arm_vmulq_m): Remove.
40270 (__arm_vmulq_x): Remove.
40274 (vsubq_n_f16): Remove.
40275 (vsubq_n_f32): Remove.
40276 (vsubq_u8): Remove.
40277 (vsubq_n_u8): Remove.
40278 (vsubq_s8): Remove.
40279 (vsubq_n_s8): Remove.
40280 (vsubq_u16): Remove.
40281 (vsubq_n_u16): Remove.
40282 (vsubq_s16): Remove.
40283 (vsubq_n_s16): Remove.
40284 (vsubq_u32): Remove.
40285 (vsubq_n_u32): Remove.
40286 (vsubq_s32): Remove.
40287 (vsubq_n_s32): Remove.
40288 (vsubq_f16): Remove.
40289 (vsubq_f32): Remove.
40290 (vsubq_m_s8): Remove.
40291 (vsubq_m_u8): Remove.
40292 (vsubq_m_s16): Remove.
40293 (vsubq_m_u16): Remove.
40294 (vsubq_m_s32): Remove.
40295 (vsubq_m_u32): Remove.
40296 (vsubq_m_n_s8): Remove.
40297 (vsubq_m_n_s32): Remove.
40298 (vsubq_m_n_s16): Remove.
40299 (vsubq_m_n_u8): Remove.
40300 (vsubq_m_n_u32): Remove.
40301 (vsubq_m_n_u16): Remove.
40302 (vsubq_m_f32): Remove.
40303 (vsubq_m_f16): Remove.
40304 (vsubq_m_n_f32): Remove.
40305 (vsubq_m_n_f16): Remove.
40306 (vsubq_x_s8): Remove.
40307 (vsubq_x_s16): Remove.
40308 (vsubq_x_s32): Remove.
40309 (vsubq_x_n_s8): Remove.
40310 (vsubq_x_n_s16): Remove.
40311 (vsubq_x_n_s32): Remove.
40312 (vsubq_x_u8): Remove.
40313 (vsubq_x_u16): Remove.
40314 (vsubq_x_u32): Remove.
40315 (vsubq_x_n_u8): Remove.
40316 (vsubq_x_n_u16): Remove.
40317 (vsubq_x_n_u32): Remove.
40318 (vsubq_x_f16): Remove.
40319 (vsubq_x_f32): Remove.
40320 (vsubq_x_n_f16): Remove.
40321 (vsubq_x_n_f32): Remove.
40322 (__arm_vsubq_u8): Remove.
40323 (__arm_vsubq_n_u8): Remove.
40324 (__arm_vsubq_s8): Remove.
40325 (__arm_vsubq_n_s8): Remove.
40326 (__arm_vsubq_u16): Remove.
40327 (__arm_vsubq_n_u16): Remove.
40328 (__arm_vsubq_s16): Remove.
40329 (__arm_vsubq_n_s16): Remove.
40330 (__arm_vsubq_u32): Remove.
40331 (__arm_vsubq_n_u32): Remove.
40332 (__arm_vsubq_s32): Remove.
40333 (__arm_vsubq_n_s32): Remove.
40334 (__arm_vsubq_m_s8): Remove.
40335 (__arm_vsubq_m_u8): Remove.
40336 (__arm_vsubq_m_s16): Remove.
40337 (__arm_vsubq_m_u16): Remove.
40338 (__arm_vsubq_m_s32): Remove.
40339 (__arm_vsubq_m_u32): Remove.
40340 (__arm_vsubq_m_n_s8): Remove.
40341 (__arm_vsubq_m_n_s32): Remove.
40342 (__arm_vsubq_m_n_s16): Remove.
40343 (__arm_vsubq_m_n_u8): Remove.
40344 (__arm_vsubq_m_n_u32): Remove.
40345 (__arm_vsubq_m_n_u16): Remove.
40346 (__arm_vsubq_x_s8): Remove.
40347 (__arm_vsubq_x_s16): Remove.
40348 (__arm_vsubq_x_s32): Remove.
40349 (__arm_vsubq_x_n_s8): Remove.
40350 (__arm_vsubq_x_n_s16): Remove.
40351 (__arm_vsubq_x_n_s32): Remove.
40352 (__arm_vsubq_x_u8): Remove.
40353 (__arm_vsubq_x_u16): Remove.
40354 (__arm_vsubq_x_u32): Remove.
40355 (__arm_vsubq_x_n_u8): Remove.
40356 (__arm_vsubq_x_n_u16): Remove.
40357 (__arm_vsubq_x_n_u32): Remove.
40358 (__arm_vsubq_n_f16): Remove.
40359 (__arm_vsubq_n_f32): Remove.
40360 (__arm_vsubq_f16): Remove.
40361 (__arm_vsubq_f32): Remove.
40362 (__arm_vsubq_m_f32): Remove.
40363 (__arm_vsubq_m_f16): Remove.
40364 (__arm_vsubq_m_n_f32): Remove.
40365 (__arm_vsubq_m_n_f16): Remove.
40366 (__arm_vsubq_x_f16): Remove.
40367 (__arm_vsubq_x_f32): Remove.
40368 (__arm_vsubq_x_n_f16): Remove.
40369 (__arm_vsubq_x_n_f32): Remove.
40370 (__arm_vsubq): Remove.
40371 (__arm_vsubq_m): Remove.
40372 (__arm_vsubq_x): Remove.
40373 * config/arm/arm_mve_builtins.def (vsubq_u, vsubq_s, vsubq_f):
40375 (vmulq_u, vmulq_s, vmulq_f): Remove.
40376 * config/arm/mve.md (mve_vsubq_<supf><mode>): Remove.
40377 (mve_vmulq_<supf><mode>): Remove.
40379 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
40381 * config/arm/iterators.md (MVE_INT_BINARY_RTX, MVE_INT_M_BINARY)
40382 (MVE_INT_M_N_BINARY, MVE_INT_N_BINARY, MVE_FP_M_BINARY)
40383 (MVE_FP_M_N_BINARY, MVE_FP_N_BINARY, mve_addsubmul, mve_insn): New
40385 * config/arm/mve.md
40386 (mve_vsubq_n_f<mode>, mve_vaddq_n_f<mode>, mve_vmulq_n_f<mode>):
40388 (@mve_<mve_insn>q_n_f<mode>): ... this.
40389 (mve_vaddq_n_<supf><mode>, mve_vmulq_n_<supf><mode>)
40390 (mve_vsubq_n_<supf><mode>): Factorize into ...
40391 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
40392 (mve_vaddq<mode>, mve_vmulq<mode>, mve_vsubq<mode>): Factorize
40394 (mve_<mve_addsubmul>q<mode>): ... this.
40395 (mve_vaddq_f<mode>, mve_vmulq_f<mode>, mve_vsubq_f<mode>):
40397 (mve_<mve_addsubmul>q_f<mode>): ... this.
40398 (mve_vaddq_m_<supf><mode>, mve_vmulq_m_<supf><mode>)
40399 (mve_vsubq_m_<supf><mode>): Factorize into ...
40400 (@mve_<mve_insn>q_m_<supf><mode>): ... this,
40401 (mve_vaddq_m_n_<supf><mode>, mve_vmulq_m_n_<supf><mode>)
40402 (mve_vsubq_m_n_<supf><mode>): Factorize into ...
40403 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
40404 (mve_vaddq_m_f<mode>, mve_vmulq_m_f<mode>, mve_vsubq_m_f<mode>):
40406 (@mve_<mve_insn>q_m_f<mode>): ... this.
40407 (mve_vaddq_m_n_f<mode>, mve_vmulq_m_n_f<mode>)
40408 (mve_vsubq_m_n_f<mode>): Factorize into ...
40409 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
40411 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
40413 * config/arm/arm-mve-builtins-functions.h (class
40414 unspec_based_mve_function_base): New.
40415 (class unspec_based_mve_function_exact_insn): New.
40417 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
40419 * config/arm/arm-mve-builtins-shapes.cc (binary_opt_n): New.
40420 * config/arm/arm-mve-builtins-shapes.h (binary_opt_n): New.
40422 2023-05-03 Murray Steele <murray.steele@arm.com>
40423 Christophe Lyon <christophe.lyon@arm.com>
40425 * config/arm/arm-mve-builtins-base.cc (class
40426 vuninitializedq_impl): New.
40427 * config/arm/arm-mve-builtins-base.def (vuninitializedq): New.
40428 * config/arm/arm-mve-builtins-base.h (vuninitializedq): New
40430 * config/arm/arm-mve-builtins-shapes.cc (inherent): New.
40431 * config/arm/arm-mve-builtins-shapes.h (inherent): New
40433 * config/arm/arm_mve_types.h (__arm_vuninitializedq): Move to ...
40434 * config/arm/arm_mve.h (__arm_vuninitializedq): ... here.
40435 (__arm_vuninitializedq_u8): Remove.
40436 (__arm_vuninitializedq_u16): Remove.
40437 (__arm_vuninitializedq_u32): Remove.
40438 (__arm_vuninitializedq_u64): Remove.
40439 (__arm_vuninitializedq_s8): Remove.
40440 (__arm_vuninitializedq_s16): Remove.
40441 (__arm_vuninitializedq_s32): Remove.
40442 (__arm_vuninitializedq_s64): Remove.
40443 (__arm_vuninitializedq_f16): Remove.
40444 (__arm_vuninitializedq_f32): Remove.
40446 2023-05-03 Murray Steele <murray.steele@arm.com>
40447 Christophe Lyon <christophe.lyon@arm.com>
40449 * config/arm/arm-mve-builtins-base.cc (vreinterpretq_impl): New class.
40450 * config/arm/arm-mve-builtins-base.def: Define vreinterpretq.
40451 * config/arm/arm-mve-builtins-base.h (vreinterpretq): New declaration.
40452 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type): New function.
40453 (parse_type): Likewise.
40454 (parse_signature): Likewise.
40455 (build_one): Likewise.
40456 (build_all): Likewise.
40457 (overloaded_base): New struct.
40458 (unary_convert_def): Likewise.
40459 * config/arm/arm-mve-builtins-shapes.h (unary_convert): Declare.
40460 * config/arm/arm-mve-builtins.cc (TYPES_reinterpret_signed1): New
40462 (TYPES_reinterpret_unsigned1): Likewise.
40463 (TYPES_reinterpret_integer): Likewise.
40464 (TYPES_reinterpret_integer1): Likewise.
40465 (TYPES_reinterpret_float1): Likewise.
40466 (TYPES_reinterpret_float): Likewise.
40467 (reinterpret_integer): New.
40468 (reinterpret_float): New.
40469 (handle_arm_mve_h): Register builtins.
40470 * config/arm/arm_mve.h (vreinterpretq_s16): Remove.
40471 (vreinterpretq_s32): Likewise.
40472 (vreinterpretq_s64): Likewise.
40473 (vreinterpretq_s8): Likewise.
40474 (vreinterpretq_u16): Likewise.
40475 (vreinterpretq_u32): Likewise.
40476 (vreinterpretq_u64): Likewise.
40477 (vreinterpretq_u8): Likewise.
40478 (vreinterpretq_f16): Likewise.
40479 (vreinterpretq_f32): Likewise.
40480 (vreinterpretq_s16_s32): Likewise.
40481 (vreinterpretq_s16_s64): Likewise.
40482 (vreinterpretq_s16_s8): Likewise.
40483 (vreinterpretq_s16_u16): Likewise.
40484 (vreinterpretq_s16_u32): Likewise.
40485 (vreinterpretq_s16_u64): Likewise.
40486 (vreinterpretq_s16_u8): Likewise.
40487 (vreinterpretq_s32_s16): Likewise.
40488 (vreinterpretq_s32_s64): Likewise.
40489 (vreinterpretq_s32_s8): Likewise.
40490 (vreinterpretq_s32_u16): Likewise.
40491 (vreinterpretq_s32_u32): Likewise.
40492 (vreinterpretq_s32_u64): Likewise.
40493 (vreinterpretq_s32_u8): Likewise.
40494 (vreinterpretq_s64_s16): Likewise.
40495 (vreinterpretq_s64_s32): Likewise.
40496 (vreinterpretq_s64_s8): Likewise.
40497 (vreinterpretq_s64_u16): Likewise.
40498 (vreinterpretq_s64_u32): Likewise.
40499 (vreinterpretq_s64_u64): Likewise.
40500 (vreinterpretq_s64_u8): Likewise.
40501 (vreinterpretq_s8_s16): Likewise.
40502 (vreinterpretq_s8_s32): Likewise.
40503 (vreinterpretq_s8_s64): Likewise.
40504 (vreinterpretq_s8_u16): Likewise.
40505 (vreinterpretq_s8_u32): Likewise.
40506 (vreinterpretq_s8_u64): Likewise.
40507 (vreinterpretq_s8_u8): Likewise.
40508 (vreinterpretq_u16_s16): Likewise.
40509 (vreinterpretq_u16_s32): Likewise.
40510 (vreinterpretq_u16_s64): Likewise.
40511 (vreinterpretq_u16_s8): Likewise.
40512 (vreinterpretq_u16_u32): Likewise.
40513 (vreinterpretq_u16_u64): Likewise.
40514 (vreinterpretq_u16_u8): Likewise.
40515 (vreinterpretq_u32_s16): Likewise.
40516 (vreinterpretq_u32_s32): Likewise.
40517 (vreinterpretq_u32_s64): Likewise.
40518 (vreinterpretq_u32_s8): Likewise.
40519 (vreinterpretq_u32_u16): Likewise.
40520 (vreinterpretq_u32_u64): Likewise.
40521 (vreinterpretq_u32_u8): Likewise.
40522 (vreinterpretq_u64_s16): Likewise.
40523 (vreinterpretq_u64_s32): Likewise.
40524 (vreinterpretq_u64_s64): Likewise.
40525 (vreinterpretq_u64_s8): Likewise.
40526 (vreinterpretq_u64_u16): Likewise.
40527 (vreinterpretq_u64_u32): Likewise.
40528 (vreinterpretq_u64_u8): Likewise.
40529 (vreinterpretq_u8_s16): Likewise.
40530 (vreinterpretq_u8_s32): Likewise.
40531 (vreinterpretq_u8_s64): Likewise.
40532 (vreinterpretq_u8_s8): Likewise.
40533 (vreinterpretq_u8_u16): Likewise.
40534 (vreinterpretq_u8_u32): Likewise.
40535 (vreinterpretq_u8_u64): Likewise.
40536 (vreinterpretq_s32_f16): Likewise.
40537 (vreinterpretq_s32_f32): Likewise.
40538 (vreinterpretq_u16_f16): Likewise.
40539 (vreinterpretq_u16_f32): Likewise.
40540 (vreinterpretq_u32_f16): Likewise.
40541 (vreinterpretq_u32_f32): Likewise.
40542 (vreinterpretq_u64_f16): Likewise.
40543 (vreinterpretq_u64_f32): Likewise.
40544 (vreinterpretq_u8_f16): Likewise.
40545 (vreinterpretq_u8_f32): Likewise.
40546 (vreinterpretq_f16_f32): Likewise.
40547 (vreinterpretq_f16_s16): Likewise.
40548 (vreinterpretq_f16_s32): Likewise.
40549 (vreinterpretq_f16_s64): Likewise.
40550 (vreinterpretq_f16_s8): Likewise.
40551 (vreinterpretq_f16_u16): Likewise.
40552 (vreinterpretq_f16_u32): Likewise.
40553 (vreinterpretq_f16_u64): Likewise.
40554 (vreinterpretq_f16_u8): Likewise.
40555 (vreinterpretq_f32_f16): Likewise.
40556 (vreinterpretq_f32_s16): Likewise.
40557 (vreinterpretq_f32_s32): Likewise.
40558 (vreinterpretq_f32_s64): Likewise.
40559 (vreinterpretq_f32_s8): Likewise.
40560 (vreinterpretq_f32_u16): Likewise.
40561 (vreinterpretq_f32_u32): Likewise.
40562 (vreinterpretq_f32_u64): Likewise.
40563 (vreinterpretq_f32_u8): Likewise.
40564 (vreinterpretq_s16_f16): Likewise.
40565 (vreinterpretq_s16_f32): Likewise.
40566 (vreinterpretq_s64_f16): Likewise.
40567 (vreinterpretq_s64_f32): Likewise.
40568 (vreinterpretq_s8_f16): Likewise.
40569 (vreinterpretq_s8_f32): Likewise.
40570 (__arm_vreinterpretq_f16): Likewise.
40571 (__arm_vreinterpretq_f32): Likewise.
40572 (__arm_vreinterpretq_s16): Likewise.
40573 (__arm_vreinterpretq_s32): Likewise.
40574 (__arm_vreinterpretq_s64): Likewise.
40575 (__arm_vreinterpretq_s8): Likewise.
40576 (__arm_vreinterpretq_u16): Likewise.
40577 (__arm_vreinterpretq_u32): Likewise.
40578 (__arm_vreinterpretq_u64): Likewise.
40579 (__arm_vreinterpretq_u8): Likewise.
40580 * config/arm/arm_mve_types.h (__arm_vreinterpretq_s16_s32): Remove.
40581 (__arm_vreinterpretq_s16_s64): Likewise.
40582 (__arm_vreinterpretq_s16_s8): Likewise.
40583 (__arm_vreinterpretq_s16_u16): Likewise.
40584 (__arm_vreinterpretq_s16_u32): Likewise.
40585 (__arm_vreinterpretq_s16_u64): Likewise.
40586 (__arm_vreinterpretq_s16_u8): Likewise.
40587 (__arm_vreinterpretq_s32_s16): Likewise.
40588 (__arm_vreinterpretq_s32_s64): Likewise.
40589 (__arm_vreinterpretq_s32_s8): Likewise.
40590 (__arm_vreinterpretq_s32_u16): Likewise.
40591 (__arm_vreinterpretq_s32_u32): Likewise.
40592 (__arm_vreinterpretq_s32_u64): Likewise.
40593 (__arm_vreinterpretq_s32_u8): Likewise.
40594 (__arm_vreinterpretq_s64_s16): Likewise.
40595 (__arm_vreinterpretq_s64_s32): Likewise.
40596 (__arm_vreinterpretq_s64_s8): Likewise.
40597 (__arm_vreinterpretq_s64_u16): Likewise.
40598 (__arm_vreinterpretq_s64_u32): Likewise.
40599 (__arm_vreinterpretq_s64_u64): Likewise.
40600 (__arm_vreinterpretq_s64_u8): Likewise.
40601 (__arm_vreinterpretq_s8_s16): Likewise.
40602 (__arm_vreinterpretq_s8_s32): Likewise.
40603 (__arm_vreinterpretq_s8_s64): Likewise.
40604 (__arm_vreinterpretq_s8_u16): Likewise.
40605 (__arm_vreinterpretq_s8_u32): Likewise.
40606 (__arm_vreinterpretq_s8_u64): Likewise.
40607 (__arm_vreinterpretq_s8_u8): Likewise.
40608 (__arm_vreinterpretq_u16_s16): Likewise.
40609 (__arm_vreinterpretq_u16_s32): Likewise.
40610 (__arm_vreinterpretq_u16_s64): Likewise.
40611 (__arm_vreinterpretq_u16_s8): Likewise.
40612 (__arm_vreinterpretq_u16_u32): Likewise.
40613 (__arm_vreinterpretq_u16_u64): Likewise.
40614 (__arm_vreinterpretq_u16_u8): Likewise.
40615 (__arm_vreinterpretq_u32_s16): Likewise.
40616 (__arm_vreinterpretq_u32_s32): Likewise.
40617 (__arm_vreinterpretq_u32_s64): Likewise.
40618 (__arm_vreinterpretq_u32_s8): Likewise.
40619 (__arm_vreinterpretq_u32_u16): Likewise.
40620 (__arm_vreinterpretq_u32_u64): Likewise.
40621 (__arm_vreinterpretq_u32_u8): Likewise.
40622 (__arm_vreinterpretq_u64_s16): Likewise.
40623 (__arm_vreinterpretq_u64_s32): Likewise.
40624 (__arm_vreinterpretq_u64_s64): Likewise.
40625 (__arm_vreinterpretq_u64_s8): Likewise.
40626 (__arm_vreinterpretq_u64_u16): Likewise.
40627 (__arm_vreinterpretq_u64_u32): Likewise.
40628 (__arm_vreinterpretq_u64_u8): Likewise.
40629 (__arm_vreinterpretq_u8_s16): Likewise.
40630 (__arm_vreinterpretq_u8_s32): Likewise.
40631 (__arm_vreinterpretq_u8_s64): Likewise.
40632 (__arm_vreinterpretq_u8_s8): Likewise.
40633 (__arm_vreinterpretq_u8_u16): Likewise.
40634 (__arm_vreinterpretq_u8_u32): Likewise.
40635 (__arm_vreinterpretq_u8_u64): Likewise.
40636 (__arm_vreinterpretq_s32_f16): Likewise.
40637 (__arm_vreinterpretq_s32_f32): Likewise.
40638 (__arm_vreinterpretq_s16_f16): Likewise.
40639 (__arm_vreinterpretq_s16_f32): Likewise.
40640 (__arm_vreinterpretq_s64_f16): Likewise.
40641 (__arm_vreinterpretq_s64_f32): Likewise.
40642 (__arm_vreinterpretq_s8_f16): Likewise.
40643 (__arm_vreinterpretq_s8_f32): Likewise.
40644 (__arm_vreinterpretq_u16_f16): Likewise.
40645 (__arm_vreinterpretq_u16_f32): Likewise.
40646 (__arm_vreinterpretq_u32_f16): Likewise.
40647 (__arm_vreinterpretq_u32_f32): Likewise.
40648 (__arm_vreinterpretq_u64_f16): Likewise.
40649 (__arm_vreinterpretq_u64_f32): Likewise.
40650 (__arm_vreinterpretq_u8_f16): Likewise.
40651 (__arm_vreinterpretq_u8_f32): Likewise.
40652 (__arm_vreinterpretq_f16_f32): Likewise.
40653 (__arm_vreinterpretq_f16_s16): Likewise.
40654 (__arm_vreinterpretq_f16_s32): Likewise.
40655 (__arm_vreinterpretq_f16_s64): Likewise.
40656 (__arm_vreinterpretq_f16_s8): Likewise.
40657 (__arm_vreinterpretq_f16_u16): Likewise.
40658 (__arm_vreinterpretq_f16_u32): Likewise.
40659 (__arm_vreinterpretq_f16_u64): Likewise.
40660 (__arm_vreinterpretq_f16_u8): Likewise.
40661 (__arm_vreinterpretq_f32_f16): Likewise.
40662 (__arm_vreinterpretq_f32_s16): Likewise.
40663 (__arm_vreinterpretq_f32_s32): Likewise.
40664 (__arm_vreinterpretq_f32_s64): Likewise.
40665 (__arm_vreinterpretq_f32_s8): Likewise.
40666 (__arm_vreinterpretq_f32_u16): Likewise.
40667 (__arm_vreinterpretq_f32_u32): Likewise.
40668 (__arm_vreinterpretq_f32_u64): Likewise.
40669 (__arm_vreinterpretq_f32_u8): Likewise.
40670 (__arm_vreinterpretq_s16): Likewise.
40671 (__arm_vreinterpretq_s32): Likewise.
40672 (__arm_vreinterpretq_s64): Likewise.
40673 (__arm_vreinterpretq_s8): Likewise.
40674 (__arm_vreinterpretq_u16): Likewise.
40675 (__arm_vreinterpretq_u32): Likewise.
40676 (__arm_vreinterpretq_u64): Likewise.
40677 (__arm_vreinterpretq_u8): Likewise.
40678 (__arm_vreinterpretq_f16): Likewise.
40679 (__arm_vreinterpretq_f32): Likewise.
40680 * config/arm/mve.md (@arm_mve_reinterpret<mode>): New pattern.
40681 * config/arm/unspecs.md: (REINTERPRET): New unspec.
40683 2023-05-03 Murray Steele <murray.steele@arm.com>
40684 Christophe Lyon <christophe.lyon@arm.com>
40685 Christophe Lyon <christophe.lyon@arm.com
40687 * config.gcc: Add arm-mve-builtins-base.o and
40688 arm-mve-builtins-shapes.o to extra_objs.
40689 * config/arm/arm-builtins.cc (arm_builtin_decl): Handle MVE builtin
40691 (arm_expand_builtin): Likewise
40692 (arm_check_builtin_call): Likewise
40693 (arm_describe_resolver): Likewise.
40694 * config/arm/arm-builtins.h (enum resolver_ident): Add
40696 * config/arm/arm-c.cc (arm_pragma_arm): Handle new pragma.
40697 (arm_resolve_overloaded_builtin): Handle MVE builtins.
40698 (arm_register_target_pragmas): Register arm_check_builtin_call.
40699 * config/arm/arm-mve-builtins.cc (class registered_function): New
40701 (struct registered_function_hasher): New struct.
40702 (pred_suffixes): New table.
40703 (mode_suffixes): New table.
40704 (type_suffix_info): New table.
40705 (TYPES_float16): New.
40706 (TYPES_all_float): New.
40707 (TYPES_integer_8): New.
40708 (TYPES_integer_8_16): New.
40709 (TYPES_integer_16_32): New.
40710 (TYPES_integer_32): New.
40711 (TYPES_signed_16_32): New.
40712 (TYPES_signed_32): New.
40713 (TYPES_all_signed): New.
40714 (TYPES_all_unsigned): New.
40715 (TYPES_all_integer): New.
40716 (TYPES_all_integer_with_64): New.
40717 (DEF_VECTOR_TYPE): New.
40718 (DEF_DOUBLE_TYPE): New.
40719 (DEF_MVE_TYPES_ARRAY): New.
40720 (all_integer): New.
40721 (all_integer_with_64): New.
40725 (all_unsigned): New.
40727 (integer_8_16): New.
40728 (integer_16_32): New.
40730 (signed_16_32): New.
40732 (register_vector_type): Use void_type_node for mve.fp-only types when
40733 mve.fp is not enabled.
40734 (register_builtin_tuple_types): Likewise.
40735 (handle_arm_mve_h): New function..
40736 (matches_type_p): Likewise..
40737 (report_out_of_range): Likewise.
40738 (report_not_enum): Likewise.
40739 (report_missing_float): Likewise.
40740 (report_non_ice): Likewise.
40741 (check_requires_float): Likewise.
40742 (function_instance::hash): Likewise
40743 (function_instance::call_properties): Likewise.
40744 (function_instance::reads_global_state_p): Likewise.
40745 (function_instance::modifies_global_state_p): Likewise.
40746 (function_instance::could_trap_p): Likewise.
40747 (function_instance::has_inactive_argument): Likewise.
40748 (registered_function_hasher::hash): Likewise.
40749 (registered_function_hasher::equal): Likewise.
40750 (function_builder::function_builder): Likewise.
40751 (function_builder::~function_builder): Likewise.
40752 (function_builder::append_name): Likewise.
40753 (function_builder::finish_name): Likewise.
40754 (function_builder::get_name): Likewise.
40755 (add_attribute): Likewise.
40756 (function_builder::get_attributes): Likewise.
40757 (function_builder::add_function): Likewise.
40758 (function_builder::add_unique_function): Likewise.
40759 (function_builder::add_overloaded_function): Likewise.
40760 (function_builder::add_overloaded_functions): Likewise.
40761 (function_builder::register_function_group): Likewise.
40762 (function_call_info::function_call_info): Likewise.
40763 (function_resolver::function_resolver): Likewise.
40764 (function_resolver::get_vector_type): Likewise.
40765 (function_resolver::get_scalar_type_name): Likewise.
40766 (function_resolver::get_argument_type): Likewise.
40767 (function_resolver::scalar_argument_p): Likewise.
40768 (function_resolver::report_no_such_form): Likewise.
40769 (function_resolver::lookup_form): Likewise.
40770 (function_resolver::resolve_to): Likewise.
40771 (function_resolver::infer_vector_or_tuple_type): Likewise.
40772 (function_resolver::infer_vector_type): Likewise.
40773 (function_resolver::require_vector_or_scalar_type): Likewise.
40774 (function_resolver::require_vector_type): Likewise.
40775 (function_resolver::require_matching_vector_type): Likewise.
40776 (function_resolver::require_derived_vector_type): Likewise.
40777 (function_resolver::require_derived_scalar_type): Likewise.
40778 (function_resolver::require_integer_immediate): Likewise.
40779 (function_resolver::require_scalar_type): Likewise.
40780 (function_resolver::check_num_arguments): Likewise.
40781 (function_resolver::check_gp_argument): Likewise.
40782 (function_resolver::finish_opt_n_resolution): Likewise.
40783 (function_resolver::resolve_unary): Likewise.
40784 (function_resolver::resolve_unary_n): Likewise.
40785 (function_resolver::resolve_uniform): Likewise.
40786 (function_resolver::resolve_uniform_opt_n): Likewise.
40787 (function_resolver::resolve): Likewise.
40788 (function_checker::function_checker): Likewise.
40789 (function_checker::argument_exists_p): Likewise.
40790 (function_checker::require_immediate): Likewise.
40791 (function_checker::require_immediate_enum): Likewise.
40792 (function_checker::require_immediate_range): Likewise.
40793 (function_checker::check): Likewise.
40794 (gimple_folder::gimple_folder): Likewise.
40795 (gimple_folder::fold): Likewise.
40796 (function_expander::function_expander): Likewise.
40797 (function_expander::direct_optab_handler): Likewise.
40798 (function_expander::get_fallback_value): Likewise.
40799 (function_expander::get_reg_target): Likewise.
40800 (function_expander::add_output_operand): Likewise.
40801 (function_expander::add_input_operand): Likewise.
40802 (function_expander::add_integer_operand): Likewise.
40803 (function_expander::generate_insn): Likewise.
40804 (function_expander::use_exact_insn): Likewise.
40805 (function_expander::use_unpred_insn): Likewise.
40806 (function_expander::use_pred_x_insn): Likewise.
40807 (function_expander::use_cond_insn): Likewise.
40808 (function_expander::map_to_rtx_codes): Likewise.
40809 (function_expander::expand): Likewise.
40810 (resolve_overloaded_builtin): Likewise.
40811 (check_builtin_call): Likewise.
40812 (gimple_fold_builtin): Likewise.
40813 (expand_builtin): Likewise.
40814 (gt_ggc_mx): Likewise.
40815 (gt_pch_nx): Likewise.
40816 (gt_pch_nx): Likewise.
40817 * config/arm/arm-mve-builtins.def(s8): Define new type suffix.
40828 (offset): New mode.
40829 * config/arm/arm-mve-builtins.h (MAX_TUPLE_SIZE): New constant.
40830 (CP_READ_FPCR): Likewise.
40831 (CP_RAISE_FP_EXCEPTIONS): Likewise.
40832 (CP_READ_MEMORY): Likewise.
40833 (CP_WRITE_MEMORY): Likewise.
40834 (enum units_index): New enum.
40835 (enum predication_index): New.
40836 (enum type_class_index): New.
40837 (enum mode_suffix_index): New enum.
40838 (enum type_suffix_index): New.
40839 (struct mode_suffix_info): New struct.
40840 (struct type_suffix_info): New.
40841 (struct function_group_info): Likewise.
40842 (class function_instance): Likewise.
40843 (class registered_function): Likewise.
40844 (class function_builder): Likewise.
40845 (class function_call_info): Likewise.
40846 (class function_resolver): Likewise.
40847 (class function_checker): Likewise.
40848 (class gimple_folder): Likewise.
40849 (class function_expander): Likewise.
40850 (get_mve_pred16_t): Likewise.
40851 (find_mode_suffix): New function.
40852 (class function_base): Likewise.
40853 (class function_shape): Likewise.
40854 (function_instance::operator==): New function.
40855 (function_instance::operator!=): Likewise.
40856 (function_instance::vectors_per_tuple): Likewise.
40857 (function_instance::mode_suffix): Likewise.
40858 (function_instance::type_suffix): Likewise.
40859 (function_instance::scalar_type): Likewise.
40860 (function_instance::vector_type): Likewise.
40861 (function_instance::tuple_type): Likewise.
40862 (function_instance::vector_mode): Likewise.
40863 (function_call_info::function_returns_void_p): Likewise.
40864 (function_base::call_properties): Likewise.
40865 * config/arm/arm-protos.h (enum arm_builtin_class): Add
40867 (handle_arm_mve_h): New.
40868 (resolve_overloaded_builtin): New.
40869 (check_builtin_call): New.
40870 (gimple_fold_builtin): New.
40871 (expand_builtin): New.
40872 * config/arm/arm.cc (TARGET_GIMPLE_FOLD_BUILTIN): Define as
40873 arm_gimple_fold_builtin.
40874 (arm_gimple_fold_builtin): New function.
40875 * config/arm/arm_mve.h: Use new arm_mve.h pragma.
40876 * config/arm/predicates.md (arm_any_register_operand): New predicate.
40877 * config/arm/t-arm: (arm-mve-builtins.o): Add includes.
40878 (arm-mve-builtins-shapes.o): New target.
40879 (arm-mve-builtins-base.o): New target.
40880 * config/arm/arm-mve-builtins-base.cc: New file.
40881 * config/arm/arm-mve-builtins-base.def: New file.
40882 * config/arm/arm-mve-builtins-base.h: New file.
40883 * config/arm/arm-mve-builtins-functions.h: New file.
40884 * config/arm/arm-mve-builtins-shapes.cc: New file.
40885 * config/arm/arm-mve-builtins-shapes.h: New file.
40887 2023-05-03 Murray Steele <murray.steele@arm.com>
40888 Christophe Lyon <christophe.lyon@arm.com>
40889 Christophe Lyon <christophe.lyon@arm.com>
40891 * config/arm/arm-builtins.cc (arm_general_add_builtin_function):
40893 (arm_init_builtin): Use arm_general_add_builtin_function instead
40894 of arm_add_builtin_function.
40895 (arm_init_acle_builtins): Likewise.
40896 (arm_init_mve_builtins): Likewise.
40897 (arm_init_crypto_builtins): Likewise.
40898 (arm_init_builtins): Likewise.
40899 (arm_general_builtin_decl): New function.
40900 (arm_builtin_decl): Defer to numberspace-specialized functions.
40901 (arm_expand_builtin_args): Rename into arm_general_expand_builtin_args.
40902 (arm_expand_builtin_1): Rename into arm_general_expand_builtin_1 and ...
40903 (arm_general_expand_builtin_1): ... specialize for general builtins.
40904 (arm_expand_acle_builtin): Use arm_general_expand_builtin
40905 instead of arm_expand_builtin.
40906 (arm_expand_mve_builtin): Likewise.
40907 (arm_expand_neon_builtin): Likewise.
40908 (arm_expand_vfp_builtin): Likewise.
40909 (arm_general_expand_builtin): New function.
40910 (arm_expand_builtin): Specialize for general builtins.
40911 (arm_general_check_builtin_call): New function.
40912 (arm_check_builtin_call): Specialize for general builtins.
40913 (arm_describe_resolver): Validate numberspace.
40914 (arm_cde_end_args): Likewise.
40915 * config/arm/arm-protos.h (enum arm_builtin_class): New enum.
40916 (ARM_BUILTIN_SHIFT, ARM_BUILTIN_CLASS): New constants.
40918 2023-05-03 Martin Liska <mliska@suse.cz>
40921 * config/riscv/sync.md: Add gcc_unreachable to a switch.
40923 2023-05-03 Richard Biener <rguenther@suse.de>
40925 * tree-ssa-loop-split.cc (split_at_bb_p): Avoid last_stmt.
40926 (patch_loop_exit): Likewise.
40927 (connect_loops): Likewise.
40928 (split_loop): Likewise.
40929 (control_dep_semi_invariant_p): Likewise.
40930 (do_split_loop_on_cond): Likewise.
40931 (split_loop_on_cond): Likewise.
40932 * tree-ssa-loop-unswitch.cc (find_unswitching_predicates_for_bb):
40934 (simplify_loop_version): Likewise.
40935 (evaluate_bbs): Likewise.
40936 (find_loop_guard): Likewise.
40937 (clean_up_after_unswitching): Likewise.
40938 * tree-ssa-math-opts.cc (maybe_optimize_guarding_check):
40940 (optimize_spaceship): Take a gcond * argument, avoid
40942 (math_opts_dom_walker::after_dom_children): Adjust call to
40943 optimize_spaceship.
40944 * tree-vrp.cc (maybe_set_nonzero_bits): Avoid last_stmt.
40945 * value-pointer-equiv.cc (pointer_equiv_analyzer::visit_edge):
40948 2023-05-03 Andreas Schwab <schwab@suse.de>
40950 * config/riscv/linux.h (LIB_SPEC): Don't redefine.
40952 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
40954 * config/riscv/riscv-vector-builtins-bases.cc (fold_fault_load):
40956 (class vlseg): New class.
40957 (class vsseg): Ditto.
40958 (class vlsseg): Ditto.
40959 (class vssseg): Ditto.
40960 (class seg_indexed_load): Ditto.
40961 (class seg_indexed_store): Ditto.
40962 (class vlsegff): Ditto.
40964 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
40965 * config/riscv/riscv-vector-builtins-functions.def (vlseg):
40975 * config/riscv/riscv-vector-builtins-shapes.cc (struct
40976 seg_loadstore_def): Ditto.
40977 (struct seg_indexed_loadstore_def): Ditto.
40978 (struct seg_fault_load_def): Ditto.
40980 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
40981 * config/riscv/riscv-vector-builtins.cc
40982 (function_builder::append_nf): New function.
40983 * config/riscv/riscv-vector-builtins.def (vfloat32m1x2_t):
40984 Change ptr from double into float.
40985 (vfloat32m1x3_t): Ditto.
40986 (vfloat32m1x4_t): Ditto.
40987 (vfloat32m1x5_t): Ditto.
40988 (vfloat32m1x6_t): Ditto.
40989 (vfloat32m1x7_t): Ditto.
40990 (vfloat32m1x8_t): Ditto.
40991 (vfloat32m2x2_t): Ditto.
40992 (vfloat32m2x3_t): Ditto.
40993 (vfloat32m2x4_t): Ditto.
40994 (vfloat32m4x2_t): Ditto.
40995 * config/riscv/riscv-vector-builtins.h: Add segment intrinsics.
40996 * config/riscv/riscv-vsetvl.cc (fault_first_load_p): Adapt for
40998 * config/riscv/riscv.md: Add segment instructions.
40999 * config/riscv/vector-iterators.md: Support segment intrinsics.
41000 * config/riscv/vector.md (@pred_unit_strided_load<mode>): New
41002 (@pred_unit_strided_store<mode>): Ditto.
41003 (@pred_strided_load<mode>): Ditto.
41004 (@pred_strided_store<mode>): Ditto.
41005 (@pred_fault_load<mode>): Ditto.
41006 (@pred_indexed_<order>load<V1T:mode><V1I:mode>): Ditto.
41007 (@pred_indexed_<order>load<V2T:mode><V2I:mode>): Ditto.
41008 (@pred_indexed_<order>load<V4T:mode><V4I:mode>): Ditto.
41009 (@pred_indexed_<order>load<V8T:mode><V8I:mode>): Ditto.
41010 (@pred_indexed_<order>load<V16T:mode><V16I:mode>): Ditto.
41011 (@pred_indexed_<order>load<V32T:mode><V32I:mode>): Ditto.
41012 (@pred_indexed_<order>load<V64T:mode><V64I:mode>): Ditto.
41013 (@pred_indexed_<order>store<V1T:mode><V1I:mode>): Ditto.
41014 (@pred_indexed_<order>store<V2T:mode><V2I:mode>): Ditto.
41015 (@pred_indexed_<order>store<V4T:mode><V4I:mode>): Ditto.
41016 (@pred_indexed_<order>store<V8T:mode><V8I:mode>): Ditto.
41017 (@pred_indexed_<order>store<V16T:mode><V16I:mode>): Ditto.
41018 (@pred_indexed_<order>store<V32T:mode><V32I:mode>): Ditto.
41019 (@pred_indexed_<order>store<V64T:mode><V64I:mode>): Ditto.
41021 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
41023 * config/riscv/genrvv-type-indexer.cc (valid_type): Adapt for
41024 tuple type support.
41026 (floattype): Ditto.
41028 * config/riscv/riscv-vector-builtins-bases.cc: Ditto.
41029 * config/riscv/riscv-vector-builtins-functions.def (vset): Add
41031 (vget): Add tuple type vget.
41032 * config/riscv/riscv-vector-builtins-types.def
41033 (DEF_RVV_TUPLE_OPS): New macro.
41034 (vint8mf8x2_t): Ditto.
41035 (vuint8mf8x2_t): Ditto.
41036 (vint8mf8x3_t): Ditto.
41037 (vuint8mf8x3_t): Ditto.
41038 (vint8mf8x4_t): Ditto.
41039 (vuint8mf8x4_t): Ditto.
41040 (vint8mf8x5_t): Ditto.
41041 (vuint8mf8x5_t): Ditto.
41042 (vint8mf8x6_t): Ditto.
41043 (vuint8mf8x6_t): Ditto.
41044 (vint8mf8x7_t): Ditto.
41045 (vuint8mf8x7_t): Ditto.
41046 (vint8mf8x8_t): Ditto.
41047 (vuint8mf8x8_t): Ditto.
41048 (vint8mf4x2_t): Ditto.
41049 (vuint8mf4x2_t): Ditto.
41050 (vint8mf4x3_t): Ditto.
41051 (vuint8mf4x3_t): Ditto.
41052 (vint8mf4x4_t): Ditto.
41053 (vuint8mf4x4_t): Ditto.
41054 (vint8mf4x5_t): Ditto.
41055 (vuint8mf4x5_t): Ditto.
41056 (vint8mf4x6_t): Ditto.
41057 (vuint8mf4x6_t): Ditto.
41058 (vint8mf4x7_t): Ditto.
41059 (vuint8mf4x7_t): Ditto.
41060 (vint8mf4x8_t): Ditto.
41061 (vuint8mf4x8_t): Ditto.
41062 (vint8mf2x2_t): Ditto.
41063 (vuint8mf2x2_t): Ditto.
41064 (vint8mf2x3_t): Ditto.
41065 (vuint8mf2x3_t): Ditto.
41066 (vint8mf2x4_t): Ditto.
41067 (vuint8mf2x4_t): Ditto.
41068 (vint8mf2x5_t): Ditto.
41069 (vuint8mf2x5_t): Ditto.
41070 (vint8mf2x6_t): Ditto.
41071 (vuint8mf2x6_t): Ditto.
41072 (vint8mf2x7_t): Ditto.
41073 (vuint8mf2x7_t): Ditto.
41074 (vint8mf2x8_t): Ditto.
41075 (vuint8mf2x8_t): Ditto.
41076 (vint8m1x2_t): Ditto.
41077 (vuint8m1x2_t): Ditto.
41078 (vint8m1x3_t): Ditto.
41079 (vuint8m1x3_t): Ditto.
41080 (vint8m1x4_t): Ditto.
41081 (vuint8m1x4_t): Ditto.
41082 (vint8m1x5_t): Ditto.
41083 (vuint8m1x5_t): Ditto.
41084 (vint8m1x6_t): Ditto.
41085 (vuint8m1x6_t): Ditto.
41086 (vint8m1x7_t): Ditto.
41087 (vuint8m1x7_t): Ditto.
41088 (vint8m1x8_t): Ditto.
41089 (vuint8m1x8_t): Ditto.
41090 (vint8m2x2_t): Ditto.
41091 (vuint8m2x2_t): Ditto.
41092 (vint8m2x3_t): Ditto.
41093 (vuint8m2x3_t): Ditto.
41094 (vint8m2x4_t): Ditto.
41095 (vuint8m2x4_t): Ditto.
41096 (vint8m4x2_t): Ditto.
41097 (vuint8m4x2_t): Ditto.
41098 (vint16mf4x2_t): Ditto.
41099 (vuint16mf4x2_t): Ditto.
41100 (vint16mf4x3_t): Ditto.
41101 (vuint16mf4x3_t): Ditto.
41102 (vint16mf4x4_t): Ditto.
41103 (vuint16mf4x4_t): Ditto.
41104 (vint16mf4x5_t): Ditto.
41105 (vuint16mf4x5_t): Ditto.
41106 (vint16mf4x6_t): Ditto.
41107 (vuint16mf4x6_t): Ditto.
41108 (vint16mf4x7_t): Ditto.
41109 (vuint16mf4x7_t): Ditto.
41110 (vint16mf4x8_t): Ditto.
41111 (vuint16mf4x8_t): Ditto.
41112 (vint16mf2x2_t): Ditto.
41113 (vuint16mf2x2_t): Ditto.
41114 (vint16mf2x3_t): Ditto.
41115 (vuint16mf2x3_t): Ditto.
41116 (vint16mf2x4_t): Ditto.
41117 (vuint16mf2x4_t): Ditto.
41118 (vint16mf2x5_t): Ditto.
41119 (vuint16mf2x5_t): Ditto.
41120 (vint16mf2x6_t): Ditto.
41121 (vuint16mf2x6_t): Ditto.
41122 (vint16mf2x7_t): Ditto.
41123 (vuint16mf2x7_t): Ditto.
41124 (vint16mf2x8_t): Ditto.
41125 (vuint16mf2x8_t): Ditto.
41126 (vint16m1x2_t): Ditto.
41127 (vuint16m1x2_t): Ditto.
41128 (vint16m1x3_t): Ditto.
41129 (vuint16m1x3_t): Ditto.
41130 (vint16m1x4_t): Ditto.
41131 (vuint16m1x4_t): Ditto.
41132 (vint16m1x5_t): Ditto.
41133 (vuint16m1x5_t): Ditto.
41134 (vint16m1x6_t): Ditto.
41135 (vuint16m1x6_t): Ditto.
41136 (vint16m1x7_t): Ditto.
41137 (vuint16m1x7_t): Ditto.
41138 (vint16m1x8_t): Ditto.
41139 (vuint16m1x8_t): Ditto.
41140 (vint16m2x2_t): Ditto.
41141 (vuint16m2x2_t): Ditto.
41142 (vint16m2x3_t): Ditto.
41143 (vuint16m2x3_t): Ditto.
41144 (vint16m2x4_t): Ditto.
41145 (vuint16m2x4_t): Ditto.
41146 (vint16m4x2_t): Ditto.
41147 (vuint16m4x2_t): Ditto.
41148 (vint32mf2x2_t): Ditto.
41149 (vuint32mf2x2_t): Ditto.
41150 (vint32mf2x3_t): Ditto.
41151 (vuint32mf2x3_t): Ditto.
41152 (vint32mf2x4_t): Ditto.
41153 (vuint32mf2x4_t): Ditto.
41154 (vint32mf2x5_t): Ditto.
41155 (vuint32mf2x5_t): Ditto.
41156 (vint32mf2x6_t): Ditto.
41157 (vuint32mf2x6_t): Ditto.
41158 (vint32mf2x7_t): Ditto.
41159 (vuint32mf2x7_t): Ditto.
41160 (vint32mf2x8_t): Ditto.
41161 (vuint32mf2x8_t): Ditto.
41162 (vint32m1x2_t): Ditto.
41163 (vuint32m1x2_t): Ditto.
41164 (vint32m1x3_t): Ditto.
41165 (vuint32m1x3_t): Ditto.
41166 (vint32m1x4_t): Ditto.
41167 (vuint32m1x4_t): Ditto.
41168 (vint32m1x5_t): Ditto.
41169 (vuint32m1x5_t): Ditto.
41170 (vint32m1x6_t): Ditto.
41171 (vuint32m1x6_t): Ditto.
41172 (vint32m1x7_t): Ditto.
41173 (vuint32m1x7_t): Ditto.
41174 (vint32m1x8_t): Ditto.
41175 (vuint32m1x8_t): Ditto.
41176 (vint32m2x2_t): Ditto.
41177 (vuint32m2x2_t): Ditto.
41178 (vint32m2x3_t): Ditto.
41179 (vuint32m2x3_t): Ditto.
41180 (vint32m2x4_t): Ditto.
41181 (vuint32m2x4_t): Ditto.
41182 (vint32m4x2_t): Ditto.
41183 (vuint32m4x2_t): Ditto.
41184 (vint64m1x2_t): Ditto.
41185 (vuint64m1x2_t): Ditto.
41186 (vint64m1x3_t): Ditto.
41187 (vuint64m1x3_t): Ditto.
41188 (vint64m1x4_t): Ditto.
41189 (vuint64m1x4_t): Ditto.
41190 (vint64m1x5_t): Ditto.
41191 (vuint64m1x5_t): Ditto.
41192 (vint64m1x6_t): Ditto.
41193 (vuint64m1x6_t): Ditto.
41194 (vint64m1x7_t): Ditto.
41195 (vuint64m1x7_t): Ditto.
41196 (vint64m1x8_t): Ditto.
41197 (vuint64m1x8_t): Ditto.
41198 (vint64m2x2_t): Ditto.
41199 (vuint64m2x2_t): Ditto.
41200 (vint64m2x3_t): Ditto.
41201 (vuint64m2x3_t): Ditto.
41202 (vint64m2x4_t): Ditto.
41203 (vuint64m2x4_t): Ditto.
41204 (vint64m4x2_t): Ditto.
41205 (vuint64m4x2_t): Ditto.
41206 (vfloat32mf2x2_t): Ditto.
41207 (vfloat32mf2x3_t): Ditto.
41208 (vfloat32mf2x4_t): Ditto.
41209 (vfloat32mf2x5_t): Ditto.
41210 (vfloat32mf2x6_t): Ditto.
41211 (vfloat32mf2x7_t): Ditto.
41212 (vfloat32mf2x8_t): Ditto.
41213 (vfloat32m1x2_t): Ditto.
41214 (vfloat32m1x3_t): Ditto.
41215 (vfloat32m1x4_t): Ditto.
41216 (vfloat32m1x5_t): Ditto.
41217 (vfloat32m1x6_t): Ditto.
41218 (vfloat32m1x7_t): Ditto.
41219 (vfloat32m1x8_t): Ditto.
41220 (vfloat32m2x2_t): Ditto.
41221 (vfloat32m2x3_t): Ditto.
41222 (vfloat32m2x4_t): Ditto.
41223 (vfloat32m4x2_t): Ditto.
41224 (vfloat64m1x2_t): Ditto.
41225 (vfloat64m1x3_t): Ditto.
41226 (vfloat64m1x4_t): Ditto.
41227 (vfloat64m1x5_t): Ditto.
41228 (vfloat64m1x6_t): Ditto.
41229 (vfloat64m1x7_t): Ditto.
41230 (vfloat64m1x8_t): Ditto.
41231 (vfloat64m2x2_t): Ditto.
41232 (vfloat64m2x3_t): Ditto.
41233 (vfloat64m2x4_t): Ditto.
41234 (vfloat64m4x2_t): Ditto.
41235 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TUPLE_OPS):
41237 (DEF_RVV_TYPE_INDEX): Ditto.
41238 (rvv_arg_type_info::get_tuple_subpart_type): New function.
41239 (DEF_RVV_TUPLE_TYPE): New macro.
41240 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE_INDEX):
41241 Adapt for tuple vget/vset support.
41242 (vint8mf4_t): Ditto.
41243 (vuint8mf4_t): Ditto.
41244 (vint8mf2_t): Ditto.
41245 (vuint8mf2_t): Ditto.
41246 (vint8m1_t): Ditto.
41247 (vuint8m1_t): Ditto.
41248 (vint8m2_t): Ditto.
41249 (vuint8m2_t): Ditto.
41250 (vint8m4_t): Ditto.
41251 (vuint8m4_t): Ditto.
41252 (vint8m8_t): Ditto.
41253 (vuint8m8_t): Ditto.
41254 (vint16mf4_t): Ditto.
41255 (vuint16mf4_t): Ditto.
41256 (vint16mf2_t): Ditto.
41257 (vuint16mf2_t): Ditto.
41258 (vint16m1_t): Ditto.
41259 (vuint16m1_t): Ditto.
41260 (vint16m2_t): Ditto.
41261 (vuint16m2_t): Ditto.
41262 (vint16m4_t): Ditto.
41263 (vuint16m4_t): Ditto.
41264 (vint16m8_t): Ditto.
41265 (vuint16m8_t): Ditto.
41266 (vint32mf2_t): Ditto.
41267 (vuint32mf2_t): Ditto.
41268 (vint32m1_t): Ditto.
41269 (vuint32m1_t): Ditto.
41270 (vint32m2_t): Ditto.
41271 (vuint32m2_t): Ditto.
41272 (vint32m4_t): Ditto.
41273 (vuint32m4_t): Ditto.
41274 (vint32m8_t): Ditto.
41275 (vuint32m8_t): Ditto.
41276 (vint64m1_t): Ditto.
41277 (vuint64m1_t): Ditto.
41278 (vint64m2_t): Ditto.
41279 (vuint64m2_t): Ditto.
41280 (vint64m4_t): Ditto.
41281 (vuint64m4_t): Ditto.
41282 (vint64m8_t): Ditto.
41283 (vuint64m8_t): Ditto.
41284 (vfloat32mf2_t): Ditto.
41285 (vfloat32m1_t): Ditto.
41286 (vfloat32m2_t): Ditto.
41287 (vfloat32m4_t): Ditto.
41288 (vfloat32m8_t): Ditto.
41289 (vfloat64m1_t): Ditto.
41290 (vfloat64m2_t): Ditto.
41291 (vfloat64m4_t): Ditto.
41292 (vfloat64m8_t): Ditto.
41293 (tuple_subpart): Add tuple subpart base type.
41294 * config/riscv/riscv-vector-builtins.h (struct
41295 rvv_arg_type_info): Ditto.
41296 (tuple_type_field): New function.
41298 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
41300 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
41301 (RVV_TUPLE_PARTIAL_MODES): Ditto.
41302 * config/riscv/riscv-protos.h (riscv_v_ext_tuple_mode_p): New
41305 (get_subpart_mode): Ditto.
41306 (get_tuple_mode): Ditto.
41307 (expand_tuple_move): Ditto.
41308 * config/riscv/riscv-v.cc (ENTRY): New macro.
41309 (TUPLE_ENTRY): Ditto.
41310 (get_nf): New function.
41311 (get_subpart_mode): Ditto.
41312 (get_tuple_mode): Ditto.
41313 (expand_tuple_move): Ditto.
41314 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TUPLE_TYPE):
41316 (register_tuple_type): New function
41317 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TUPLE_TYPE):
41319 (vint8mf8x2_t): New macro.
41320 (vuint8mf8x2_t): Ditto.
41321 (vint8mf8x3_t): Ditto.
41322 (vuint8mf8x3_t): Ditto.
41323 (vint8mf8x4_t): Ditto.
41324 (vuint8mf8x4_t): Ditto.
41325 (vint8mf8x5_t): Ditto.
41326 (vuint8mf8x5_t): Ditto.
41327 (vint8mf8x6_t): Ditto.
41328 (vuint8mf8x6_t): Ditto.
41329 (vint8mf8x7_t): Ditto.
41330 (vuint8mf8x7_t): Ditto.
41331 (vint8mf8x8_t): Ditto.
41332 (vuint8mf8x8_t): Ditto.
41333 (vint8mf4x2_t): Ditto.
41334 (vuint8mf4x2_t): Ditto.
41335 (vint8mf4x3_t): Ditto.
41336 (vuint8mf4x3_t): Ditto.
41337 (vint8mf4x4_t): Ditto.
41338 (vuint8mf4x4_t): Ditto.
41339 (vint8mf4x5_t): Ditto.
41340 (vuint8mf4x5_t): Ditto.
41341 (vint8mf4x6_t): Ditto.
41342 (vuint8mf4x6_t): Ditto.
41343 (vint8mf4x7_t): Ditto.
41344 (vuint8mf4x7_t): Ditto.
41345 (vint8mf4x8_t): Ditto.
41346 (vuint8mf4x8_t): Ditto.
41347 (vint8mf2x2_t): Ditto.
41348 (vuint8mf2x2_t): Ditto.
41349 (vint8mf2x3_t): Ditto.
41350 (vuint8mf2x3_t): Ditto.
41351 (vint8mf2x4_t): Ditto.
41352 (vuint8mf2x4_t): Ditto.
41353 (vint8mf2x5_t): Ditto.
41354 (vuint8mf2x5_t): Ditto.
41355 (vint8mf2x6_t): Ditto.
41356 (vuint8mf2x6_t): Ditto.
41357 (vint8mf2x7_t): Ditto.
41358 (vuint8mf2x7_t): Ditto.
41359 (vint8mf2x8_t): Ditto.
41360 (vuint8mf2x8_t): Ditto.
41361 (vint8m1x2_t): Ditto.
41362 (vuint8m1x2_t): Ditto.
41363 (vint8m1x3_t): Ditto.
41364 (vuint8m1x3_t): Ditto.
41365 (vint8m1x4_t): Ditto.
41366 (vuint8m1x4_t): Ditto.
41367 (vint8m1x5_t): Ditto.
41368 (vuint8m1x5_t): Ditto.
41369 (vint8m1x6_t): Ditto.
41370 (vuint8m1x6_t): Ditto.
41371 (vint8m1x7_t): Ditto.
41372 (vuint8m1x7_t): Ditto.
41373 (vint8m1x8_t): Ditto.
41374 (vuint8m1x8_t): Ditto.
41375 (vint8m2x2_t): Ditto.
41376 (vuint8m2x2_t): Ditto.
41377 (vint8m2x3_t): Ditto.
41378 (vuint8m2x3_t): Ditto.
41379 (vint8m2x4_t): Ditto.
41380 (vuint8m2x4_t): Ditto.
41381 (vint8m4x2_t): Ditto.
41382 (vuint8m4x2_t): Ditto.
41383 (vint16mf4x2_t): Ditto.
41384 (vuint16mf4x2_t): Ditto.
41385 (vint16mf4x3_t): Ditto.
41386 (vuint16mf4x3_t): Ditto.
41387 (vint16mf4x4_t): Ditto.
41388 (vuint16mf4x4_t): Ditto.
41389 (vint16mf4x5_t): Ditto.
41390 (vuint16mf4x5_t): Ditto.
41391 (vint16mf4x6_t): Ditto.
41392 (vuint16mf4x6_t): Ditto.
41393 (vint16mf4x7_t): Ditto.
41394 (vuint16mf4x7_t): Ditto.
41395 (vint16mf4x8_t): Ditto.
41396 (vuint16mf4x8_t): Ditto.
41397 (vint16mf2x2_t): Ditto.
41398 (vuint16mf2x2_t): Ditto.
41399 (vint16mf2x3_t): Ditto.
41400 (vuint16mf2x3_t): Ditto.
41401 (vint16mf2x4_t): Ditto.
41402 (vuint16mf2x4_t): Ditto.
41403 (vint16mf2x5_t): Ditto.
41404 (vuint16mf2x5_t): Ditto.
41405 (vint16mf2x6_t): Ditto.
41406 (vuint16mf2x6_t): Ditto.
41407 (vint16mf2x7_t): Ditto.
41408 (vuint16mf2x7_t): Ditto.
41409 (vint16mf2x8_t): Ditto.
41410 (vuint16mf2x8_t): Ditto.
41411 (vint16m1x2_t): Ditto.
41412 (vuint16m1x2_t): Ditto.
41413 (vint16m1x3_t): Ditto.
41414 (vuint16m1x3_t): Ditto.
41415 (vint16m1x4_t): Ditto.
41416 (vuint16m1x4_t): Ditto.
41417 (vint16m1x5_t): Ditto.
41418 (vuint16m1x5_t): Ditto.
41419 (vint16m1x6_t): Ditto.
41420 (vuint16m1x6_t): Ditto.
41421 (vint16m1x7_t): Ditto.
41422 (vuint16m1x7_t): Ditto.
41423 (vint16m1x8_t): Ditto.
41424 (vuint16m1x8_t): Ditto.
41425 (vint16m2x2_t): Ditto.
41426 (vuint16m2x2_t): Ditto.
41427 (vint16m2x3_t): Ditto.
41428 (vuint16m2x3_t): Ditto.
41429 (vint16m2x4_t): Ditto.
41430 (vuint16m2x4_t): Ditto.
41431 (vint16m4x2_t): Ditto.
41432 (vuint16m4x2_t): Ditto.
41433 (vint32mf2x2_t): Ditto.
41434 (vuint32mf2x2_t): Ditto.
41435 (vint32mf2x3_t): Ditto.
41436 (vuint32mf2x3_t): Ditto.
41437 (vint32mf2x4_t): Ditto.
41438 (vuint32mf2x4_t): Ditto.
41439 (vint32mf2x5_t): Ditto.
41440 (vuint32mf2x5_t): Ditto.
41441 (vint32mf2x6_t): Ditto.
41442 (vuint32mf2x6_t): Ditto.
41443 (vint32mf2x7_t): Ditto.
41444 (vuint32mf2x7_t): Ditto.
41445 (vint32mf2x8_t): Ditto.
41446 (vuint32mf2x8_t): Ditto.
41447 (vint32m1x2_t): Ditto.
41448 (vuint32m1x2_t): Ditto.
41449 (vint32m1x3_t): Ditto.
41450 (vuint32m1x3_t): Ditto.
41451 (vint32m1x4_t): Ditto.
41452 (vuint32m1x4_t): Ditto.
41453 (vint32m1x5_t): Ditto.
41454 (vuint32m1x5_t): Ditto.
41455 (vint32m1x6_t): Ditto.
41456 (vuint32m1x6_t): Ditto.
41457 (vint32m1x7_t): Ditto.
41458 (vuint32m1x7_t): Ditto.
41459 (vint32m1x8_t): Ditto.
41460 (vuint32m1x8_t): Ditto.
41461 (vint32m2x2_t): Ditto.
41462 (vuint32m2x2_t): Ditto.
41463 (vint32m2x3_t): Ditto.
41464 (vuint32m2x3_t): Ditto.
41465 (vint32m2x4_t): Ditto.
41466 (vuint32m2x4_t): Ditto.
41467 (vint32m4x2_t): Ditto.
41468 (vuint32m4x2_t): Ditto.
41469 (vint64m1x2_t): Ditto.
41470 (vuint64m1x2_t): Ditto.
41471 (vint64m1x3_t): Ditto.
41472 (vuint64m1x3_t): Ditto.
41473 (vint64m1x4_t): Ditto.
41474 (vuint64m1x4_t): Ditto.
41475 (vint64m1x5_t): Ditto.
41476 (vuint64m1x5_t): Ditto.
41477 (vint64m1x6_t): Ditto.
41478 (vuint64m1x6_t): Ditto.
41479 (vint64m1x7_t): Ditto.
41480 (vuint64m1x7_t): Ditto.
41481 (vint64m1x8_t): Ditto.
41482 (vuint64m1x8_t): Ditto.
41483 (vint64m2x2_t): Ditto.
41484 (vuint64m2x2_t): Ditto.
41485 (vint64m2x3_t): Ditto.
41486 (vuint64m2x3_t): Ditto.
41487 (vint64m2x4_t): Ditto.
41488 (vuint64m2x4_t): Ditto.
41489 (vint64m4x2_t): Ditto.
41490 (vuint64m4x2_t): Ditto.
41491 (vfloat32mf2x2_t): Ditto.
41492 (vfloat32mf2x3_t): Ditto.
41493 (vfloat32mf2x4_t): Ditto.
41494 (vfloat32mf2x5_t): Ditto.
41495 (vfloat32mf2x6_t): Ditto.
41496 (vfloat32mf2x7_t): Ditto.
41497 (vfloat32mf2x8_t): Ditto.
41498 (vfloat32m1x2_t): Ditto.
41499 (vfloat32m1x3_t): Ditto.
41500 (vfloat32m1x4_t): Ditto.
41501 (vfloat32m1x5_t): Ditto.
41502 (vfloat32m1x6_t): Ditto.
41503 (vfloat32m1x7_t): Ditto.
41504 (vfloat32m1x8_t): Ditto.
41505 (vfloat32m2x2_t): Ditto.
41506 (vfloat32m2x3_t): Ditto.
41507 (vfloat32m2x4_t): Ditto.
41508 (vfloat32m4x2_t): Ditto.
41509 (vfloat64m1x2_t): Ditto.
41510 (vfloat64m1x3_t): Ditto.
41511 (vfloat64m1x4_t): Ditto.
41512 (vfloat64m1x5_t): Ditto.
41513 (vfloat64m1x6_t): Ditto.
41514 (vfloat64m1x7_t): Ditto.
41515 (vfloat64m1x8_t): Ditto.
41516 (vfloat64m2x2_t): Ditto.
41517 (vfloat64m2x3_t): Ditto.
41518 (vfloat64m2x4_t): Ditto.
41519 (vfloat64m4x2_t): Ditto.
41520 * config/riscv/riscv-vector-builtins.h (DEF_RVV_TUPLE_TYPE):
41522 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): Ditto.
41523 * config/riscv/riscv.cc (riscv_v_ext_tuple_mode_p): New
41525 (TUPLE_ENTRY): Ditto.
41526 (riscv_v_ext_mode_p): New function.
41527 (riscv_v_adjust_nunits): Add tuple mode adjustment.
41528 (riscv_classify_address): Ditto.
41529 (riscv_binary_cost): Ditto.
41530 (riscv_rtx_costs): Ditto.
41531 (riscv_secondary_memory_needed): Ditto.
41532 (riscv_hard_regno_nregs): Ditto.
41533 (riscv_hard_regno_mode_ok): Ditto.
41534 (riscv_vector_mode_supported_p): Ditto.
41535 (riscv_regmode_natural_size): Ditto.
41536 (riscv_array_mode): New function.
41537 (TARGET_ARRAY_MODE): New target hook.
41538 * config/riscv/riscv.md: Add tuple modes.
41539 * config/riscv/vector-iterators.md: Ditto.
41540 * config/riscv/vector.md (mov<mode>): Add tuple modes data
41542 (*mov<VT:mode>_<P:mode>): Ditto.
41544 2023-05-03 Richard Biener <rguenther@suse.de>
41546 * cse.cc (cse_insn): Track an equivalence to the destination
41547 separately and delay using src_related for it.
41549 2023-05-03 Richard Biener <rguenther@suse.de>
41551 * cse.cc (HASH): Turn into inline function and mix
41552 in another HASH_SHIFT bits.
41553 (SAFE_HASH): Likewise.
41555 2023-05-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
41558 * config/aarch64/aarch64-simd.md (aarch64_<sur>h<addsub><mode>): Rename to...
41559 (aarch64_<sur>h<addsub><mode><vczle><vczbe>): ... This.
41561 2023-05-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
41564 * config/aarch64/aarch64-simd.md (add<mode>3): Rename to...
41565 (add<mode>3<vczle><vczbe>): ... This.
41566 (sub<mode>3): Rename to...
41567 (sub<mode>3<vczle><vczbe>): ... This.
41568 (mul<mode>3): Rename to...
41569 (mul<mode>3<vczle><vczbe>): ... This.
41570 (*div<mode>3): Rename to...
41571 (*div<mode>3<vczle><vczbe>): ... This.
41572 (neg<mode>2): Rename to...
41573 (neg<mode>2<vczle><vczbe>): ... This.
41574 (abs<mode>2): Rename to...
41575 (abs<mode>2<vczle><vczbe>): ... This.
41576 (<frint_pattern><mode>2): Rename to...
41577 (<frint_pattern><mode>2<vczle><vczbe>): ... This.
41578 (<fmaxmin><mode>3): Rename to...
41579 (<fmaxmin><mode>3<vczle><vczbe>): ... This.
41580 (*sqrt<mode>2): Rename to...
41581 (*sqrt<mode>2<vczle><vczbe>): ... This.
41583 2023-05-03 Kito Cheng <kito.cheng@sifive.com>
41585 * doc/md.texi (RISC-V): Add vr, vm, vd constarint.
41587 2023-05-03 Martin Liska <mliska@suse.cz>
41589 PR tree-optimization/109693
41590 * value-range-storage.cc (vrange_allocator::vrange_allocator):
41591 Remove unused field.
41592 * value-range-storage.h: Likewise.
41594 2023-05-02 Andrew Pinski <apinski@marvell.com>
41596 * tree-ssa-phiopt.cc (move_stmt): New function.
41597 (match_simplify_replacement): Use move_stmt instead
41598 of the inlined version.
41600 2023-05-02 Andrew Pinski <apinski@marvell.com>
41602 * match.pd (a != 0 ? CLRSB(a) : CST -> CLRSB(a)): New
41605 2023-05-02 Andrew Pinski <apinski@marvell.com>
41607 PR tree-optimization/109702
41608 * match.pd: Fix "a != 0 ? FUNC(a) : CST" patterns
41609 for FUNC of POPCOUNT BSWAP FFS PARITY CLZ and CTZ.
41611 2023-05-02 Andrew Pinski <apinski@marvell.com>
41614 * config/aarch64/aarch64.md (*cmov<mode>_insn_m1): New
41615 insn_and_split pattern.
41617 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
41619 * config/riscv/sync.md (atomic_load<mode>): Implement atomic
41622 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
41624 * config/riscv/sync.md (mem_thread_fence_1): Change fence
41625 depending on the given memory model.
41627 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
41629 * config/riscv/riscv-protos.h (riscv_union_memmodels): Expose
41630 riscv_union_memmodels function to sync.md.
41631 * config/riscv/riscv.cc (riscv_union_memmodels): Add function to
41632 get the union of two memmodels in sync.md.
41633 (riscv_print_operand): Add %I and %J flags that output the
41634 optimal LR/SC flag bits for a given memory model.
41635 * config/riscv/sync.md: Remove static .aqrl bits on LR op/.rl
41636 bits on SC op and replace with optimized %I, %J flags.
41638 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
41640 * config/riscv/riscv.cc
41641 (riscv_memmodel_needs_amo_release): Change function name.
41642 (riscv_print_operand): Remove unneeded %F case.
41643 * config/riscv/sync.md: Remove unneeded fences.
41645 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
41648 * config/riscv/sync.md (atomic_store<mode>): Use simple store
41649 instruction in combination with fence(s).
41651 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
41653 * config/riscv/riscv.cc (riscv_print_operand): Change behavior
41654 of %A to include release bits.
41656 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
41658 * config/riscv/sync.md (atomic_cas_value_strong<mode>): Change
41659 FENCE/LR.aq/SC.aq into sequentially consistent LR.aqrl/SC.rl
41662 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
41664 * config/riscv/sync.md: Change LR.aq/SC.rl pairs into
41665 sequentially consistent LR.aqrl/SC.rl pairs.
41667 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
41669 * config/riscv/riscv.cc: Remove MEMMODEL_SYNC_* cases and
41670 sanitize memmodel input with memmodel_base.
41672 2023-05-02 Yanzhang Wang <yanzhang.wang@intel.com>
41673 Pan Li <pan2.li@intel.com>
41676 * config/riscv/vector-iterators.md: Support VNx2HI and VNX4DI when MIN_VLEN >= 128.
41678 2023-05-02 Romain Naour <romain.naour@gmail.com>
41680 * config/riscv/genrvv-type-indexer.cc: Use log2 from the C header, without
41683 2023-05-02 Martin Liska <mliska@suse.cz>
41685 * doc/invoke.texi: Update documentation based on param.opt file.
41687 2023-05-02 Richard Biener <rguenther@suse.de>
41689 PR tree-optimization/109672
41690 * tree-vect-stmts.cc (vectorizable_operation): For plus,
41691 minus and negate always check the vector mode is word mode.
41693 2023-05-01 Andrew Pinski <apinski@marvell.com>
41695 * tree-ssa-phiopt.cc: Update comment about
41696 how the transformation are implemented.
41698 2023-05-01 Jeff Law <jlaw@ventanamicro>
41700 * config/stormy16/stormy16.cc (TARGET_LRA_P): Remove defintion.
41702 2023-05-01 Jeff Law <jlaw@ventanamicro>
41704 * config/cris/cris.cc (TARGET_LRA_P): Remove.
41705 * config/epiphany/epiphany.cc (TARGET_LRA_P): Remove.
41706 * config/iq2000/iq2000.cc (TARGET_LRA_P): Remove.
41707 * config/m32r/m32r.cc (TARGET_LRA_P): Remove.
41708 * config/microblaze/microblaze.cc (TARGET_LRA_P): Remove.
41709 * config/mmix/mmix.cc (TARGET_LRA_P): Remove.
41711 2023-05-01 Rasmus Villemoes <rasmus.villemoes@prevas.dk>
41713 * print-tree.h (PRINT_DECL_REMAP_DEBUG): New flag.
41714 * print-tree.cc (print_decl_identifier): Implement it.
41715 * toplev.cc (output_stack_usage_1): Use it.
41717 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
41719 * value-range.h (class int_range): Remove gt_ggc_mx and gt_pch_nx
41722 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
41724 * value-range.h (irange::set_nonzero): Inline.
41726 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
41728 * gimple-range-op.cc (cfn_ffs::fold_range): Use the correct
41730 * gimple-ssa-warn-alloca.cc (alloca_call_type): Use <2> for
41731 invalid_range, as it is an inverse range.
41732 * tree-vrp.cc (find_case_label_range): Avoid trees.
41733 * value-range.cc (irange::irange_set): Delete.
41734 (irange::irange_set_1bit_anti_range): Delete.
41735 (irange::irange_set_anti_range): Delete.
41736 (irange::set): Cleanup.
41737 * value-range.h (class irange): Remove irange_set,
41738 irange_set_anti_range, irange_set_1bit_anti_range.
41739 (irange::set_undefined): Remove set to m_type.
41741 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
41743 * range-op.cc (update_known_bitmask): Adjust for irange containing
41744 wide_ints internally.
41745 * tree-ssanames.cc (set_nonzero_bits): Same.
41746 * tree-ssanames.h (set_nonzero_bits): Same.
41747 * value-range-storage.cc (irange_storage::set_irange): Same.
41748 (irange_storage::get_irange): Same.
41749 * value-range.cc (irange::operator=): Same.
41750 (irange::irange_set): Same.
41751 (irange::irange_set_1bit_anti_range): Same.
41752 (irange::irange_set_anti_range): Same.
41753 (irange::set): Same.
41754 (irange::verify_range): Same.
41755 (irange::contains_p): Same.
41756 (irange::irange_single_pair_union): Same.
41757 (irange::union_): Same.
41758 (irange::irange_contains_p): Same.
41759 (irange::intersect): Same.
41760 (irange::invert): Same.
41761 (irange::set_range_from_nonzero_bits): Same.
41762 (irange::set_nonzero_bits): Same.
41763 (mask_to_wi): Same.
41764 (irange::intersect_nonzero_bits): Same.
41765 (irange::union_nonzero_bits): Same.
41768 (tree_range): Same.
41769 (range_tests_strict_enum): Same.
41770 (range_tests_misc): Same.
41771 (range_tests_nonzero_bits): Same.
41772 * value-range.h (irange::type): Same.
41773 (irange::varying_compatible_p): Same.
41774 (irange::irange): Same.
41775 (int_range::int_range): Same.
41776 (irange::set_undefined): Same.
41777 (irange::set_varying): Same.
41778 (irange::lower_bound): Same.
41779 (irange::upper_bound): Same.
41781 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
41783 * gimple-range-fold.cc (tree_lower_bound): Delete.
41784 (tree_upper_bound): Delete.
41785 (vrp_val_max): Delete.
41786 (vrp_val_min): Delete.
41787 (fold_using_range::range_of_ssa_name_with_loop_info): Call
41788 range_of_var_in_loop.
41789 * vr-values.cc (valid_value_p): Delete.
41790 (fix_overflow): Delete.
41791 (get_scev_info): New.
41792 (bounds_of_var_in_loop): Refactor into...
41793 (induction_variable_may_overflow_p): ...this,
41794 (range_from_loop_direction): ...and this,
41795 (range_of_var_in_loop): ...and this.
41796 * vr-values.h (bounds_of_var_in_loop): Delete.
41797 (range_of_var_in_loop): New.
41799 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
41801 * gimple-range-fold.cc (adjust_pointer_diff_expr): Rewrite with
41803 (vrp_val_max): New.
41804 (vrp_val_min): New.
41805 * gimple-range-op.cc (cfn_strlen::fold_range): Use irange_val_*.
41806 * range-op.cc (max_limit): Same.
41808 (plus_minus_ranges): Same.
41809 (operator_rshift::op1_range): Same.
41810 (operator_cast::inside_domain_p): Same.
41811 * value-range.cc (vrp_val_is_max): Delete.
41812 (vrp_val_is_min): Delete.
41813 (range_tests_misc): Use irange_val_*.
41814 * value-range.h (vrp_val_is_min): Delete.
41815 (vrp_val_is_max): Delete.
41816 (vrp_val_max): Delete.
41817 (irange_val_min): New.
41818 (vrp_val_min): Delete.
41819 (irange_val_max): New.
41820 * vr-values.cc (check_for_binary_op_overflow): Use irange_val_*.
41822 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
41824 * fold-const.cc (expr_not_equal_to): Convert to irange wide_int API.
41825 * gimple-fold.cc (size_must_be_zero_p): Same.
41826 * gimple-loop-versioning.cc
41827 (loop_versioning::prune_loop_conditions): Same.
41828 * gimple-range-edge.cc (gcond_edge_range): Same.
41829 (gimple_outgoing_range::calc_switch_ranges): Same.
41830 * gimple-range-fold.cc (adjust_imagpart_expr): Same.
41831 (adjust_realpart_expr): Same.
41832 (fold_using_range::range_of_address): Same.
41833 (fold_using_range::relation_fold_and_or): Same.
41834 * gimple-range-gori.cc (gori_compute::gori_compute): Same.
41835 (range_is_either_true_or_false): Same.
41836 * gimple-range-op.cc (cfn_toupper_tolower::get_letter_range): Same.
41837 (cfn_clz::fold_range): Same.
41838 (cfn_ctz::fold_range): Same.
41839 * gimple-range-tests.cc (class test_expr_eval): Same.
41840 * gimple-ssa-warn-alloca.cc (alloca_call_type): Same.
41841 * ipa-cp.cc (ipa_value_range_from_jfunc): Same.
41842 (propagate_vr_across_jump_function): Same.
41843 (decide_whether_version_node): Same.
41844 * ipa-prop.cc (ipa_get_value_range): Same.
41845 * ipa-prop.h (ipa_range_set_and_normalize): Same.
41846 * range-op.cc (get_shift_range): Same.
41847 (value_range_from_overflowed_bounds): Same.
41848 (value_range_with_overflow): Same.
41849 (create_possibly_reversed_range): Same.
41850 (equal_op1_op2_relation): Same.
41851 (not_equal_op1_op2_relation): Same.
41852 (lt_op1_op2_relation): Same.
41853 (le_op1_op2_relation): Same.
41854 (gt_op1_op2_relation): Same.
41855 (ge_op1_op2_relation): Same.
41856 (operator_mult::op1_range): Same.
41857 (operator_exact_divide::op1_range): Same.
41858 (operator_lshift::op1_range): Same.
41859 (operator_rshift::op1_range): Same.
41860 (operator_cast::op1_range): Same.
41861 (operator_logical_and::fold_range): Same.
41862 (set_nonzero_range_from_mask): Same.
41863 (operator_bitwise_or::op1_range): Same.
41864 (operator_bitwise_xor::op1_range): Same.
41865 (operator_addr_expr::fold_range): Same.
41866 (pointer_plus_operator::wi_fold): Same.
41867 (pointer_or_operator::op1_range): Same.
41874 (range_op_cast_tests): Same.
41875 (range_op_lshift_tests): Same.
41876 (range_op_rshift_tests): Same.
41877 (range_op_bitwise_and_tests): Same.
41878 (range_relational_tests): Same.
41879 * range.cc (range_zero): Same.
41880 (range_nonzero): Same.
41881 * range.h (range_true): Same.
41882 (range_false): Same.
41883 (range_true_and_false): Same.
41884 * tree-data-ref.cc (split_constant_offset_1): Same.
41885 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Same.
41886 * tree-ssa-loop-unswitch.cc (struct unswitch_predicate): Same.
41887 (find_unswitching_predicates_for_bb): Same.
41888 * tree-ssa-phiopt.cc (value_replacement): Same.
41889 * tree-ssa-threadbackward.cc
41890 (back_threader::find_taken_edge_cond): Same.
41891 * tree-ssanames.cc (ssa_name_has_boolean_range): Same.
41892 * tree-vrp.cc (find_case_label_range): Same.
41893 * value-query.cc (range_query::get_tree_range): Same.
41894 * value-range.cc (irange::set_nonnegative): Same.
41895 (frange::contains_p): Same.
41896 (frange::singleton_p): Same.
41897 (frange::internal_singleton_p): Same.
41898 (irange::irange_set): Same.
41899 (irange::irange_set_1bit_anti_range): Same.
41900 (irange::irange_set_anti_range): Same.
41901 (irange::set): Same.
41902 (irange::operator==): Same.
41903 (irange::singleton_p): Same.
41904 (irange::contains_p): Same.
41905 (irange::set_range_from_nonzero_bits): Same.
41906 (DEFINE_INT_RANGE_INSTANCE): Same.
41916 (range_uint128): New.
41917 (range_uchar): New.
41919 (build_range3): Convert to irange wide_int API.
41920 (range_tests_irange3): Same.
41921 (range_tests_int_range_max): Same.
41922 (range_tests_strict_enum): Same.
41923 (range_tests_misc): Same.
41924 (range_tests_nonzero_bits): Same.
41925 (range_tests_nan): Same.
41926 (range_tests_signed_zeros): Same.
41927 * value-range.h (Value_Range::Value_Range): Same.
41928 (irange::set): Same.
41929 (irange::nonzero_p): Same.
41930 (irange::contains_p): Same.
41931 (range_includes_zero_p): Same.
41932 (irange::set_nonzero): Same.
41933 (irange::set_zero): Same.
41934 (contains_zero_p): Same.
41935 (frange::contains_p): Same.
41937 (simplify_using_ranges::op_with_boolean_value_range_p): Same.
41938 (bounds_of_var_in_loop): Same.
41939 (simplify_using_ranges::legacy_fold_cond_overflow): Same.
41941 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
41943 * value-range.cc (irange::irange_union): Rename to...
41944 (irange::union_): ...this.
41945 (irange::irange_intersect): Rename to...
41946 (irange::intersect): ...this.
41947 * value-range.h (irange::union_): Delete.
41948 (irange::intersect): Delete.
41950 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
41952 * vr-values.cc (bounds_of_var_in_loop): Convert to irange API.
41954 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
41956 * vr-values.cc (check_for_binary_op_overflow): Tidy up by using
41958 (compare_ranges): Delete.
41959 (compare_range_with_value): Delete.
41960 (bounds_of_var_in_loop): Tidy up by using ranger API.
41961 (simplify_using_ranges::fold_cond_with_ops): Cleanup and rename
41962 from vrp_evaluate_conditional_warnv_with_ops_using_ranges.
41963 (simplify_using_ranges::legacy_fold_cond_overflow): Remove
41964 strict_overflow_p and only_ranges.
41965 (simplify_using_ranges::legacy_fold_cond): Adjust call to
41966 legacy_fold_cond_overflow.
41967 (simplify_using_ranges::simplify_abs_using_ranges): Adjust for
41969 (range_fits_type_p): Rename value_range to irange.
41970 * vr-values.h (range_fits_type_p): Adjust prototype.
41972 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
41974 * value-range.cc (irange::irange_set_anti_range): Remove uses of
41975 tree_lower_bound and tree_upper_bound.
41976 (irange::verify_range): Same.
41977 (irange::operator==): Same.
41978 (irange::singleton_p): Same.
41979 * value-range.h (irange::tree_lower_bound): Delete.
41980 (irange::tree_upper_bound): Delete.
41981 (irange::lower_bound): Delete.
41982 (irange::upper_bound): Delete.
41983 (irange::zero_p): Remove uses of tree_lower_bound and
41986 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
41988 * tree-ssa-loop-niter.cc (refine_value_range_using_guard): Remove
41990 (determine_value_range): Same.
41991 (record_nonwrapping_iv): Same.
41992 (infer_loop_bounds_from_signedness): Same.
41993 (scev_var_range_cant_overflow): Same.
41994 * tree-vrp.cc (operand_less_p): Delete.
41995 * tree-vrp.h (operand_less_p): Delete.
41996 * value-range.cc (get_legacy_range): Remove uses of deprecated API.
41997 (irange::value_inside_range): Delete.
41998 * value-range.h (vrange::kind): Delete.
41999 (irange::num_pairs): Remove check of m_kind.
42000 (irange::min): Delete.
42001 (irange::max): Delete.
42003 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
42005 * gimple-fold.cc (maybe_fold_comparisons_from_match_pd): Adjust
42006 for vrange_storage.
42007 * gimple-range-cache.cc (sbr_vector::sbr_vector): Same.
42008 (sbr_vector::grow): Same.
42009 (sbr_vector::set_bb_range): Same.
42010 (sbr_vector::get_bb_range): Same.
42011 (sbr_sparse_bitmap::sbr_sparse_bitmap): Same.
42012 (sbr_sparse_bitmap::set_bb_range): Same.
42013 (sbr_sparse_bitmap::get_bb_range): Same.
42014 (block_range_cache::block_range_cache): Same.
42015 (ssa_global_cache::ssa_global_cache): Same.
42016 (ssa_global_cache::get_global_range): Same.
42017 (ssa_global_cache::set_global_range): Same.
42018 * gimple-range-cache.h: Same.
42019 * gimple-range-edge.cc
42020 (gimple_outgoing_range::gimple_outgoing_range): Same.
42021 (gimple_outgoing_range::switch_edge_range): Same.
42022 (gimple_outgoing_range::calc_switch_ranges): Same.
42023 * gimple-range-edge.h: Same.
42024 * gimple-range-infer.cc
42025 (infer_range_manager::infer_range_manager): Same.
42026 (infer_range_manager::get_nonzero): Same.
42027 (infer_range_manager::maybe_adjust_range): Same.
42028 (infer_range_manager::add_range): Same.
42029 * gimple-range-infer.h: Rename obstack_vrange_allocator to
42031 * tree-core.h (struct irange_storage_slot): Remove.
42032 (struct tree_ssa_name): Remove irange_info and frange_info. Make
42033 range_info a pointer to vrange_storage.
42034 * tree-ssanames.cc (range_info_fits_p): Adjust for vrange_storage.
42035 (range_info_alloc): Same.
42036 (range_info_free): Same.
42037 (range_info_get_range): Same.
42038 (range_info_set_range): Same.
42039 (get_nonzero_bits): Same.
42040 * value-query.cc (get_ssa_name_range_info): Same.
42041 * value-range-storage.cc (class vrange_internal_alloc): New.
42042 (class vrange_obstack_alloc): New.
42043 (class vrange_ggc_alloc): New.
42044 (vrange_allocator::vrange_allocator): New.
42045 (vrange_allocator::~vrange_allocator): New.
42046 (vrange_storage::alloc_slot): New.
42047 (vrange_allocator::alloc): New.
42048 (vrange_allocator::free): New.
42049 (vrange_allocator::clone): New.
42050 (vrange_allocator::clone_varying): New.
42051 (vrange_allocator::clone_undefined): New.
42052 (vrange_storage::alloc): New.
42053 (vrange_storage::set_vrange): Remove slot argument.
42054 (vrange_storage::get_vrange): Same.
42055 (vrange_storage::fits_p): Same.
42056 (vrange_storage::equal_p): New.
42057 (irange_storage::write_lengths_address): New.
42058 (irange_storage::lengths_address): New.
42059 (irange_storage_slot::alloc_slot): Remove.
42060 (irange_storage::alloc): New.
42061 (irange_storage_slot::irange_storage_slot): Remove.
42062 (irange_storage::irange_storage): New.
42063 (write_wide_int): New.
42064 (irange_storage_slot::set_irange): Remove.
42065 (irange_storage::set_irange): New.
42066 (read_wide_int): New.
42067 (irange_storage_slot::get_irange): Remove.
42068 (irange_storage::get_irange): New.
42069 (irange_storage_slot::size): Remove.
42070 (irange_storage::equal_p): New.
42071 (irange_storage_slot::num_wide_ints_needed): Remove.
42072 (irange_storage::size): New.
42073 (irange_storage_slot::fits_p): Remove.
42074 (irange_storage::fits_p): New.
42075 (irange_storage_slot::dump): Remove.
42076 (irange_storage::dump): New.
42077 (frange_storage_slot::alloc_slot): Remove.
42078 (frange_storage::alloc): New.
42079 (frange_storage_slot::set_frange): Remove.
42080 (frange_storage::set_frange): New.
42081 (frange_storage_slot::get_frange): Remove.
42082 (frange_storage::get_frange): New.
42083 (frange_storage_slot::fits_p): Remove.
42084 (frange_storage::equal_p): New.
42085 (frange_storage::fits_p): New.
42086 (ggc_vrange_allocator): New.
42087 (ggc_alloc_vrange_storage): New.
42088 * value-range-storage.h (class vrange_storage): Rewrite.
42089 (class irange_storage): Rewrite.
42090 (class frange_storage): Rewrite.
42091 (class obstack_vrange_allocator): Remove.
42092 (class ggc_vrange_allocator): Remove.
42093 (vrange_allocator::alloc_vrange): Remove.
42094 (vrange_allocator::alloc_irange): Remove.
42095 (vrange_allocator::alloc_frange): Remove.
42096 (ggc_alloc_vrange_storage): New.
42097 * value-range.h (class irange): Rename vrange_allocator to
42099 (class frange): Same.
42101 2023-04-30 Roger Sayle <roger@nextmovesoftware.com>
42103 * config/stormy16/stormy16.md (neghi2): Rewrite pattern using
42104 inc to avoid clobbering the carry flag.
42106 2023-04-30 Andrew Pinski <apinski@marvell.com>
42108 * match.pd: Add patterns for "a != 0 ? FUNC(a) : CST"
42109 for FUNC of POPCOUNT BSWAP FFS PARITY CLZ and CTZ.
42111 2023-04-30 Andrew Pinski <apinski@marvell.com>
42113 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
42114 Allow some builtin/internal function calls which
42115 are known not to trap/throw.
42116 (phiopt_worker::match_simplify_replacement):
42117 Use name instead of getting the lhs again.
42119 2023-04-30 Joakim Nohlgård <joakim@nohlgard.se>
42121 * configure: Regenerate.
42122 * configure.ac: Use ld -r in the check for HAVE_LD_RO_RW_SECTION_MIXING
42124 2023-04-29 Hans-Peter Nilsson <hp@axis.com>
42126 * reload1.cc (emit_insn_if_valid_for_reload_1): Rename from
42127 emit_insn_if_valid_for_reload.
42128 (emit_insn_if_valid_for_reload): Call new helper, and if a SET fails
42129 to be recognized, also try emitting a parallel that clobbers
42130 TARGET_FLAGS_REGNUM, as applicable.
42132 2023-04-29 Roger Sayle <roger@nextmovesoftware.com>
42134 * config/stormy16/stormy16.md (neghi2): Convert from a define_expand
42136 (*rotatehi_1): New define_insn for efficient 2 insn sequence.
42137 (*rotatehi_8, *rotaterthi_8): New define_insn to emit a swpb.
42139 2023-04-29 Roger Sayle <roger@nextmovesoftware.com>
42141 * config/stormy16/stormy16.md (any_lshift): New code iterator.
42142 (any_or_plus): Likewise.
42143 (any_rotate): Likewise.
42144 (*<any_lshift>_and_internal): New define_insn_and_split to
42145 recognize a logical shift followed by an AND, and split it
42146 again after reload.
42147 (*swpn): New define_insn matching xstormy16's swpn.
42148 (*swpn_zext): New define_insn recognizing swpn followed by
42149 zero_extendqihi2, i.e. with the high byte set to zero.
42150 (*swpn_sext): Likewise, for swpn followed by cbw.
42151 (*swpn_sext_2): Likewise, for an alternate RTL form.
42152 (*swpn_zext_ior): A pre-reload splitter so that an swpn+zext+ior
42153 sequence is split in the correct place to recognize the *swpn_zext
42154 followed by any_or_plus (ior, xor or plus) instruction.
42156 2023-04-29 Mikael Pettersson <mikpelinux@gmail.com>
42159 * config.gcc (vax-*-linux*): Add glibc-stdint.h.
42160 (lm32-*-uclinux*): Likewise.
42162 2023-04-29 Fei Gao <gaofei@eswincomputing.com>
42164 * config/riscv/riscv.cc (riscv_avoid_save_libcall): helper function
42165 for riscv_use_save_libcall.
42166 (riscv_use_save_libcall): call riscv_avoid_save_libcall.
42167 (riscv_compute_frame_info): restructure to decouple stack allocation
42168 for rv32e w/o save-restore.
42170 2023-04-28 Eugene Rozenfeld <erozen@microsoft.com>
42172 * doc/install.texi: Fix documentation typo
42174 2023-04-28 Matevos Mehrabyan <matevosmehrabyan@gmail.com>
42176 * config/riscv/iterators.md (only_div, paired_mod): New iterators.
42177 (u): Add div/udiv cases.
42178 * config/riscv/riscv-protos.h (riscv_use_divmod_expander): Prototype.
42179 * config/riscv/riscv.cc (struct riscv_tune_param): Add field for
42181 (rocket_tune_info, sifive_7_tune_info): Initialize new field.
42182 (thead_c906_tune_info): Likewise.
42183 (optimize_size_tune_info): Likewise.
42184 (riscv_use_divmod_expander): New function.
42185 * config/riscv/riscv.md (<u>divmod<mode>4): New expander.
42187 2023-04-28 Karen Sargsyan <karen1999411@gmail.com>
42189 * config/riscv/bitmanip.md: Added clmulr instruction.
42190 * config/riscv/riscv-builtins.cc (AVAIL): Add new.
42191 * config/riscv/riscv.md: (UNSPEC_CLMULR): Add new unspec type.
42193 * config/riscv/riscv-cmo.def: Added built-in function for clmulr.
42194 * config/riscv/crypto.md: Move clmul[h] instructions to bitmanip.md.
42195 * config/riscv/riscv-scalar-crypto.def: Move clmul[h] built-in
42196 functions to riscv-cmo.def.
42197 * config/riscv/generic.md: Add clmul to list of instructions
42198 using the generic_imul reservation.
42200 2023-04-28 Jivan Hakobyan <jivanhakobyan9@gmail.com>
42202 * config/riscv/bitmanip.md: Added expanders for minu/maxu instructions
42204 2023-04-28 Andrew Pinski <apinski@marvell.com>
42206 PR tree-optimization/100958
42207 * tree-ssa-phiopt.cc (two_value_replacement): Remove.
42208 (pass_phiopt::execute): Don't call two_value_replacement.
42209 * match.pd (a !=/== CST1 ? CST2 : CST3): Add pattern to
42210 handle what two_value_replacement did.
42212 2023-04-28 Andrew Pinski <apinski@marvell.com>
42214 * match.pd: Add patterns for
42215 "(A CMP B) ? MIN/MAX<A, C> : MIN/MAX <B, C>".
42217 2023-04-28 Andrew Pinski <apinski@marvell.com>
42219 * match.pd: Factor out the deciding the min/max from
42220 the "(cond (cmp (convert1? x) c1) (convert2? x) c2)"
42222 * fold-const.cc (minmax_from_comparison): this new function.
42223 * fold-const.h (minmax_from_comparison): New prototype.
42225 2023-04-28 Roger Sayle <roger@nextmovesoftware.com>
42227 PR rtl-optimization/109476
42228 * lower-subreg.cc: Include explow.h for force_reg.
42229 (find_decomposable_shift_zext): Pass an additional SPEED_P argument.
42230 If decomposing a suitable LSHIFTRT and we're not splitting
42231 ZERO_EXTEND (based on the current SPEED_P), then use a ZERO_EXTEND
42232 instead of setting a high part SUBREG to zero, which helps combine.
42233 (decompose_multiword_subregs): Update call to resolve_shift_zext.
42235 2023-04-28 Richard Biener <rguenther@suse.de>
42237 * tree-vect-data-refs.cc (vect_analyze_data_refs): Always
42239 * tree-vect-stmts.cc (vect_model_store_cost): Pass in the
42240 gather-scatter info and cost emulated scatters accordingly.
42241 (get_load_store_type): Support emulated scatters.
42242 (vectorizable_store): Likewise. Emulate them by extracting
42243 scalar offsets and data, doing scalar stores.
42245 2023-04-28 Richard Biener <rguenther@suse.de>
42247 * config/i386/i386.cc (ix86_vector_costs::add_stmt_cost):
42248 Tame down element extracts and scalar loads for gather/scatter
42249 similar to elementwise strided accesses.
42251 2023-04-28 Pan Li <pan2.li@intel.com>
42252 kito-cheng <kito.cheng@sifive.com>
42254 * config/riscv/vector.md: Add new define split to perform
42255 the simplification.
42257 2023-04-28 Richard Biener <rguenther@suse.de>
42260 * ipa-param-manipulation.cc
42261 (ipa_param_body_adjustments::modify_expression): Allow
42262 conversion of a register to a non-register type. Elide
42263 conversions inside BIT_FIELD_REFs.
42265 2023-04-28 Richard Biener <rguenther@suse.de>
42267 PR tree-optimization/109644
42268 * tree-cfg.cc (verify_types_in_gimple_reference): Check
42269 register constraints on the outermost VIEW_CONVERT_EXPR
42270 only. Do not allow register or invariant bases on
42271 multi-level or possibly variable index handled components.
42273 2023-04-28 Richard Biener <rguenther@suse.de>
42275 * gimplify.cc (gimplify_compound_lval): When there's a
42276 non-register type produced by one of the handled component
42277 operations make sure we get a non-register base.
42279 2023-04-28 Richard Biener <rguenther@suse.de>
42281 PR tree-optimization/108752
42282 * tree-vect-generic.cc (build_replicated_const): Rename
42283 to build_replicated_int_cst and move to tree.{h,cc}.
42284 (do_plus_minus): Adjust.
42285 (do_negate): Likewise.
42286 * tree-vect-stmts.cc (vectorizable_operation): Emit emulated
42287 arithmetic vector operations in lowered form.
42288 * tree.h (build_replicated_int_cst): Declare.
42289 * tree.cc (build_replicated_int_cst): Moved from
42290 tree-vect-generic.cc build_replicated_const.
42292 2023-04-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
42295 * config/aarch64/aarch64-simd.md (aarch64_rbit<mode>): Rename to...
42296 (aarch64_rbit<mode><vczle><vczbe>): ... This.
42297 (neg<mode>2): Rename to...
42298 (neg<mode>2<vczle><vczbe>): ... This.
42299 (abs<mode>2): Rename to...
42300 (abs<mode>2<vczle><vczbe>): ... This.
42301 (aarch64_abs<mode>): Rename to...
42302 (aarch64_abs<mode><vczle><vczbe>): ... This.
42303 (one_cmpl<mode>2): Rename to...
42304 (one_cmpl<mode>2<vczle><vczbe>): ... This.
42305 (clrsb<mode>2): Rename to...
42306 (clrsb<mode>2<vczle><vczbe>): ... This.
42307 (clz<mode>2): Rename to...
42308 (clz<mode>2<vczle><vczbe>): ... This.
42309 (popcount<mode>2): Rename to...
42310 (popcount<mode>2<vczle><vczbe>): ... This.
42312 2023-04-28 Jakub Jelinek <jakub@redhat.com>
42314 * gimple-range-op.cc (class cfn_sqrt): New type.
42315 (op_cfn_sqrt): New variable.
42316 (gimple_range_op_handler::maybe_builtin_call): Handle
42317 CASE_CFN_SQRT{,_FN}.
42319 2023-04-28 Aldy Hernandez <aldyh@redhat.com>
42320 Jakub Jelinek <jakub@redhat.com>
42322 * value-range.h (frange_nextafter): Declare.
42323 * gimple-range-op.cc (class cfn_sincos): New.
42324 (op_cfn_sin, op_cfn_cos): New variables.
42325 (gimple_range_op_handler::maybe_builtin_call): Handle
42326 CASE_CFN_{SIN,COS}{,_FN}.
42328 2023-04-28 Jakub Jelinek <jakub@redhat.com>
42330 * target.def (libm_function_max_error): New target hook.
42331 * doc/tm.texi.in (TARGET_LIBM_FUNCTION_MAX_ERROR): Add.
42332 * doc/tm.texi: Regenerated.
42333 * targhooks.h (default_libm_function_max_error,
42334 glibc_linux_libm_function_max_error): Declare.
42335 * targhooks.cc: Include case-cfn-macros.h.
42336 (default_libm_function_max_error,
42337 glibc_linux_libm_function_max_error): New functions.
42338 * config/linux.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
42339 * config/linux-protos.h (linux_libm_function_max_error): Declare.
42340 * config/linux.cc: Include target.h and targhooks.h.
42341 (linux_libm_function_max_error): New function.
42342 * config/arc/arc.cc: Include targhooks.h and case-cfn-macros.h.
42343 (arc_libm_function_max_error): New function.
42344 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
42345 * config/i386/i386.cc (ix86_libc_has_fast_function): Formatting fix.
42346 (ix86_libm_function_max_error): New function.
42347 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
42348 * config/rs6000/rs6000-protos.h
42349 (rs6000_linux_libm_function_max_error): Declare.
42350 * config/rs6000/rs6000-linux.cc: Include target.h, targhooks.h, tree.h
42351 and case-cfn-macros.h.
42352 (rs6000_linux_libm_function_max_error): New function.
42353 * config/rs6000/linux.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
42354 * config/rs6000/linux64.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
42355 * config/or1k/or1k.cc: Include targhooks.h and case-cfn-macros.h.
42356 (or1k_libm_function_max_error): New function.
42357 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
42359 2023-04-28 Alexandre Oliva <oliva@adacore.com>
42361 * gimple-harden-conditionals.cc (insert_edge_check_and_trap):
42362 Move detach value calls...
42363 (pass_harden_conditional_branches::execute): ... here.
42364 (pass_harden_compares::execute): Detach values before
42367 2023-04-27 Andrew Stubbs <ams@codesourcery.com>
42369 * config/gcn/gcn-valu.md (cmul<conj_op><mode>3): Use gcn_gen_undef.
42370 (cml<addsub_as><mode>4): Likewise.
42371 (vec_addsub<mode>3): Likewise.
42372 (cadd<rot><mode>3): Likewise.
42373 (vec_fmaddsub<mode>4): Likewise.
42374 (vec_fmsubadd<mode>4): Likewise, and use sub for the odd lanes.
42376 2023-04-27 Andrew Pinski <apinski@marvell.com>
42378 * tree-ssa-phiopt.cc (phiopt_early_allow): Allow for
42379 up to 2 min/max expressions in the sequence/match code.
42381 2023-04-27 Andrew Pinski <apinski@marvell.com>
42383 * rtlanal.cc (may_trap_p_1): Treat SMIN/SMAX similar as
42385 * tree-eh.cc (operation_could_trap_helper_p): Treate
42386 MIN_EXPR/MAX_EXPR similar as other comparisons.
42388 2023-04-27 Andrew Pinski <apinski@marvell.com>
42390 * tree-ssa-phiopt.cc (cond_store_replacement): Remove
42392 (cond_if_else_store_replacement): Likewise.
42393 (get_non_trapping): Likewise.
42394 (store_elim_worker): Move into ...
42395 (pass_cselim::execute): This.
42397 2023-04-27 Andrew Pinski <apinski@marvell.com>
42399 * tree-ssa-phiopt.cc (two_value_replacement): Remove
42401 (match_simplify_replacement): Likewise.
42402 (factor_out_conditional_conversion): Likewise.
42403 (value_replacement): Likewise.
42404 (minmax_replacement): Likewise.
42405 (spaceship_replacement): Likewise.
42406 (cond_removal_in_builtin_zero_pattern): Likewise.
42407 (hoist_adjacent_loads): Likewise.
42408 (tree_ssa_phiopt_worker): Move into ...
42409 (pass_phiopt::execute): this.
42411 2023-04-27 Andrew Pinski <apinski@marvell.com>
42413 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove
42414 do_store_elim argument and split that part out to ...
42415 (store_elim_worker): This new function.
42416 (pass_cselim::execute): Call store_elim_worker.
42417 (pass_phiopt::execute): Update call to tree_ssa_phiopt_worker.
42419 2023-04-27 Jan Hubicka <jh@suse.cz>
42421 * cfgloopmanip.h (unloop_loops): Export.
42422 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Unloop loops
42423 that no longer loop.
42424 * tree-ssa-loop-ivcanon.cc (unloop_loops): Export; do not free
42425 vectors of loops to unloop.
42426 (canonicalize_induction_variables): Free vectors here.
42427 (tree_unroll_loops_completely): Free vectors here.
42429 2023-04-27 Richard Biener <rguenther@suse.de>
42431 PR tree-optimization/109170
42432 * gimple-range-op.cc (gimple_range_op_handler::maybe_builtin_call):
42433 Handle __builtin_expect and similar via cfn_pass_through_arg1
42434 and inspecting the calls fnspec.
42435 * builtins.cc (builtin_fnspec): Handle BUILT_IN_EXPECT
42436 and BUILT_IN_EXPECT_WITH_PROBABILITY.
42438 2023-04-27 Alexandre Oliva <oliva@adacore.com>
42440 * genmultilib: Use CONFIG_SHELL to run sub-scripts.
42442 2023-04-27 Aldy Hernandez <aldyh@redhat.com>
42444 PR tree-optimization/109639
42445 * ipa-cp.cc (ipa_value_range_from_jfunc): Normalize range.
42446 (propagate_vr_across_jump_function): Same.
42447 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
42448 * ipa-prop.h (ipa_range_set_and_normalize): New.
42449 * value-range.cc (irange::set): Assert min and max are INTEGER_CST.
42451 2023-04-27 Richard Biener <rguenther@suse.de>
42453 * match.pd (BIT_FIELD_REF CONSTRUCTOR@0 @1 @2): Do not
42454 create a CTOR operand in the result when simplifying GIMPLE.
42456 2023-04-27 Richard Biener <rguenther@suse.de>
42458 * gimplify.cc (gimplify_compound_lval): When the base
42459 gimplified to a register make sure to split up chains
42462 2023-04-27 Richard Biener <rguenther@suse.de>
42465 * ipa-param-manipulation.h
42466 (ipa_param_body_adjustments::modify_expression): Add extra_stmts
42468 * ipa-param-manipulation.cc
42469 (ipa_param_body_adjustments::modify_expression): Likewise.
42470 When we need a conversion and the replacement is a register
42471 split the conversion out.
42472 (ipa_param_body_adjustments::modify_assignment): Pass
42473 extra_stmts to RHS modify_expression.
42475 2023-04-27 Jonathan Wakely <jwakely@redhat.com>
42477 * doc/extend.texi (Zero Length): Describe example.
42479 2023-04-27 Richard Biener <rguenther@suse.de>
42481 PR tree-optimization/109594
42482 * tree-ssa.cc (non_rewritable_mem_ref_base): Constrain
42483 what we rewrite to a register based on the above.
42485 2023-04-26 Patrick O'Neill <patrick@rivosinc.com>
42487 * config/riscv/riscv.cc: Fix whitespace.
42488 * config/riscv/sync.md: Fix whitespace.
42490 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
42492 PR tree-optimization/108697
42493 * gimple-range-cache.cc (ssa_global_cache::clear_range): Do
42494 not clear the vector on an out of range query.
42495 (ssa_cache::dump): Use dump_range_query instead of get_range.
42496 (ssa_cache::dump_range_query): New.
42497 (ssa_lazy_cache::dump_range_query): New.
42498 (ssa_lazy_cache::set_range): New.
42499 * gimple-range-cache.h (ssa_cache::dump_range_query): New.
42500 (class ssa_lazy_cache): New.
42501 (ssa_lazy_cache::ssa_lazy_cache): New.
42502 (ssa_lazy_cache::~ssa_lazy_cache): New.
42503 (ssa_lazy_cache::get_range): New.
42504 (ssa_lazy_cache::clear_range): New.
42505 (ssa_lazy_cache::clear): New.
42506 (ssa_lazy_cache::dump): New.
42507 * gimple-range-path.cc (path_range_query::path_range_query): Do
42508 not allocate a ssa_cache object nor has_cache bitmap.
42509 (path_range_query::~path_range_query): Do not free objects.
42510 (path_range_query::clear_cache): Remove.
42511 (path_range_query::get_cache): Adjust.
42512 (path_range_query::set_cache): Remove.
42513 (path_range_query::dump): Don't call through a pointer.
42514 (path_range_query::internal_range_of_expr): Set cache directly.
42515 (path_range_query::reset_path): Clear cache directly.
42516 (path_range_query::ssa_range_in_phi): Fold with globals only.
42517 (path_range_query::compute_ranges_in_phis): Simply set range.
42518 (path_range_query::compute_ranges_in_block): Call cache directly.
42519 * gimple-range-path.h (class path_range_query): Replace bitmap
42520 and cache pointer with lazy cache object.
42521 * gimple-range.h (class assume_query): Use ssa_lazy_cache.
42523 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
42525 * gimple-range-cache.cc (ssa_cache::ssa_cache): Rename.
42526 (ssa_cache::~ssa_cache): Rename.
42527 (ssa_cache::has_range): New.
42528 (ssa_cache::get_range): Rename.
42529 (ssa_cache::set_range): Rename.
42530 (ssa_cache::clear_range): Rename.
42531 (ssa_cache::clear): Rename.
42532 (ssa_cache::dump): Rename and use get_range.
42533 (ranger_cache::get_global_range): Use get_range and set_range.
42534 (ranger_cache::range_of_def): Use get_range.
42535 * gimple-range-cache.h (class ssa_cache): Rename class and methods.
42536 (class ranger_cache): Use ssa_cache.
42537 * gimple-range-path.cc (path_range_query::path_range_query): Use
42539 (path_range_query::get_cache): Use get_range.
42540 (path_range_query::set_cache): Use set_range.
42541 * gimple-range-path.h (class path_range_query): Use ssa_cache.
42542 * gimple-range.cc (assume_query::assume_range_p): Use get_range.
42543 (assume_query::range_of_expr): Use get_range.
42544 (assume_query::assume_query): Use set_range.
42545 (assume_query::calculate_op): Use get_range and set_range.
42546 * gimple-range.h (class assume_query): Use ssa_cache.
42548 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
42550 * gimple-range-cache.cc (sbr_vector::sbr_vector): Add parameter
42551 and local to optionally zero memory.
42552 (br_vector::grow): Only zero memory if flag is set.
42553 (class sbr_lazy_vector): New.
42554 (sbr_lazy_vector::sbr_lazy_vector): New.
42555 (sbr_lazy_vector::set_bb_range): New.
42556 (sbr_lazy_vector::get_bb_range): New.
42557 (sbr_lazy_vector::bb_range_p): New.
42558 (block_range_cache::set_bb_range): Check flags and Use sbr_lazy_vector.
42559 * gimple-range-gori.cc (gori_map::calculate_gori): Use
42560 param_vrp_switch_limit.
42561 (gori_compute::gori_compute): Use param_vrp_switch_limit.
42562 * params.opt (vrp_sparse_threshold): Rename from evrp_sparse_threshold.
42563 (vrp_switch_limit): Rename from evrp_switch_limit.
42564 (vrp_vector_threshold): New.
42566 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
42568 * value-relation.cc (dom_oracle::query_relation): Check early for lack
42570 * value-relation.h (equiv_oracle::has_equiv_p): New.
42572 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
42574 PR tree-optimization/109417
42575 * gimple-range-gori.cc (range_def_chain::register_dependency):
42576 Save the ssa version number, not the pointer.
42577 (gori_compute::may_recompute_p): No need to check if a dependency
42578 is in the free list.
42579 * gimple-range-gori.h (class range_def_chain): Change ssa1 and ssa2
42580 fields to be unsigned int instead of trees.
42581 (ange_def_chain::depend1): Adjust.
42582 (ange_def_chain::depend2): Adjust.
42583 * gimple-range.h: Include "ssa.h" to inline ssa_name().
42585 2023-04-26 David Edelsohn <dje.gcc@gmail.com>
42587 * config/rs6000/aix72.h (TARGET_DEFAULT): Use ISA_2_6_MASKS_SERVER.
42588 * config/rs6000/aix73.h (TARGET_DEFAULT): Use ISA_2_7_MASKS_SERVER.
42589 (PROCESSOR_DEFAULT): Use PROCESSOR_POWER8.
42591 2023-04-26 Patrick O'Neill <patrick@rivosinc.com>
42594 * config/riscv/riscv-protos.h: Add helper function stubs.
42595 * config/riscv/riscv.cc: Add helper functions for subword masking.
42596 * config/riscv/riscv.opt: Add command-line flags -minline-atomics and
42597 -mno-inline-atomics.
42598 * config/riscv/sync.md: Add masking logic and inline asm for fetch_and_op,
42599 fetch_and_nand, CAS, and exchange ops.
42600 * doc/invoke.texi: Add blurb regarding new command-line flags
42601 -minline-atomics and -mno-inline-atomics.
42603 2023-04-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
42605 * config/aarch64/aarch64-simd.md (aarch64_rshrn2<mode>_insn_le):
42606 Reimplement using standard RTL codes instead of unspec.
42607 (aarch64_rshrn2<mode>_insn_be): Likewise.
42608 (aarch64_rshrn2<mode>): Adjust for the above.
42609 * config/aarch64/aarch64.md (UNSPEC_RSHRN): Delete.
42611 2023-04-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
42613 * config/aarch64/aarch64-simd.md (aarch64_rshrn<mode>_insn_le): Reimplement
42614 with standard RTL codes instead of an UNSPEC.
42615 (aarch64_rshrn<mode>_insn_be): Likewise.
42616 (aarch64_rshrn<mode>): Adjust for the above.
42617 * config/aarch64/predicates.md (aarch64_simd_rshrn_imm_vec): Define.
42619 2023-04-26 Pan Li <pan2.li@intel.com>
42620 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
42622 * config/riscv/riscv.cc (riscv_classify_address): Allow
42623 const0_rtx for the RVV load/store.
42625 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
42627 * range-op.cc (range_op_cast_tests): Remove legacy support.
42628 * value-range-storage.h (vrange_allocator::alloc_irange): Same.
42629 * value-range.cc (irange::operator=): Same.
42630 (get_legacy_range): Same.
42631 (irange::copy_legacy_to_multi_range): Delete.
42632 (irange::copy_to_legacy): Delete.
42633 (irange::irange_set_anti_range): Delete.
42634 (irange::set): Remove legacy support.
42635 (irange::verify_range): Same.
42636 (irange::legacy_lower_bound): Delete.
42637 (irange::legacy_upper_bound): Delete.
42638 (irange::legacy_equal_p): Delete.
42639 (irange::operator==): Remove legacy support.
42640 (irange::singleton_p): Same.
42641 (irange::value_inside_range): Same.
42642 (irange::contains_p): Same.
42643 (intersect_ranges): Delete.
42644 (irange::legacy_intersect): Delete.
42645 (union_ranges): Delete.
42646 (irange::legacy_union): Delete.
42647 (irange::legacy_verbose_union_): Delete.
42648 (irange::legacy_verbose_intersect): Delete.
42649 (irange::irange_union): Remove legacy support.
42650 (irange::irange_intersect): Same.
42651 (irange::intersect): Same.
42652 (irange::invert): Same.
42653 (ranges_from_anti_range): Delete.
42654 (gt_pch_nx): Adjust for legacy removal.
42656 (range_tests_legacy): Delete.
42657 (range_tests_misc): Adjust for legacy removal.
42658 (range_tests): Same.
42659 * value-range.h (class irange): Same.
42660 (irange::legacy_mode_p): Delete.
42661 (ranges_from_anti_range): Delete.
42662 (irange::nonzero_p): Adjust for legacy removal.
42663 (irange::lower_bound): Same.
42664 (irange::upper_bound): Same.
42665 (irange::union_): Same.
42666 (irange::intersect): Same.
42667 (irange::set_nonzero): Same.
42668 (irange::set_zero): Same.
42669 * vr-values.cc (simplify_using_ranges::legacy_fold_cond_overflow): Same.
42671 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
42673 * value-range.cc (irange::copy_legacy_to_multi_range): Rewrite use
42674 of range_has_numeric_bounds_p with irange API.
42675 (range_has_numeric_bounds_p): Delete.
42676 * value-range.h (range_has_numeric_bounds_p): Delete.
42678 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
42680 * tree-data-ref.cc (compute_distributive_range): Replace uses of
42681 range_int_cst_p with irange API.
42682 * tree-ssa-strlen.cc (get_range_strlen_dynamic): Same.
42683 * tree-vrp.h (range_int_cst_p): Delete.
42684 * vr-values.cc (check_for_binary_op_overflow): Replace usees of
42685 range_int_cst_p with irange API.
42686 (vr_set_zero_nonzero_bits): Same.
42687 (range_fits_type_p): Same.
42688 (simplify_using_ranges::simplify_casted_cond): Same.
42689 * tree-vrp.cc (range_int_cst_p): Remove.
42691 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
42693 * tree-ssa-strlen.cc (compare_nonzero_chars): Convert to wide_ints.
42695 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
42697 * builtins.cc (expand_builtin_strnlen): Rewrite deprecated irange
42698 API uses to new API.
42699 * gimple-predicate-analysis.cc (find_var_cmp_const): Same.
42700 * internal-fn.cc (get_min_precision): Same.
42702 * tree-affine.cc (expr_to_aff_combination): Same.
42703 * tree-data-ref.cc (dr_step_indicator): Same.
42704 * tree-dfa.cc (get_ref_base_and_extent): Same.
42705 * tree-scalar-evolution.cc (iv_can_overflow_p): Same.
42706 * tree-ssa-phiopt.cc (two_value_replacement): Same.
42707 * tree-ssa-pre.cc (insert_into_preds_of_block): Same.
42708 * tree-ssa-reassoc.cc (optimize_range_tests_to_bit_test): Same.
42709 * tree-ssa-strlen.cc (compare_nonzero_chars): Same.
42710 * tree-switch-conversion.cc (bit_test_cluster::emit): Same.
42711 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Same.
42712 * tree.cc (get_range_pos_neg): Same.
42714 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
42716 * ipa-prop.cc (ipa_print_node_jump_functions_for_edge): Use
42717 vrange::dump instead of ad-hoc dumper.
42718 * tree-ssa-strlen.cc (dump_strlen_info): Same.
42719 * value-range-pretty-print.cc (visit): Pass TDF_NOUID to
42722 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
42724 * range-op.cc (operator_cast::op1_range): Use
42725 create_possibly_reversed_range.
42726 (operator_bitwise_and::simple_op1_range_solver): Same.
42727 * value-range.cc (swap_out_of_order_endpoints): Delete.
42728 (irange::set): Remove call to swap_out_of_order_endpoints.
42730 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
42732 * builtins.cc (determine_block_size): Convert use of legacy API to
42734 * gimple-array-bounds.cc (check_out_of_bounds_and_warn): Same.
42735 (array_bounds_checker::check_array_ref): Same.
42736 * gimple-ssa-warn-restrict.cc
42737 (builtin_memref::extend_offset_range): Same.
42738 * ipa-cp.cc (ipcp_store_vr_results): Same.
42739 * ipa-fnsummary.cc (set_switch_stmt_execution_predicate): Same.
42740 * ipa-prop.cc (struct ipa_vr_ggc_hash_traits): Same.
42741 (ipa_write_jump_function): Same.
42742 * pointer-query.cc (get_size_range): Same.
42743 * tree-data-ref.cc (split_constant_offset): Same.
42744 * tree-ssa-strlen.cc (get_range): Same.
42745 (maybe_diag_stxncpy_trunc): Same.
42746 (strlen_pass::get_len_or_size): Same.
42747 (strlen_pass::count_nonzero_bytes_addr): Same.
42748 * tree-vect-patterns.cc (vect_get_range_info): Same.
42749 * value-range.cc (irange::maybe_anti_range): Remove.
42750 (get_legacy_range): New.
42751 (irange::copy_to_legacy): Use get_legacy_range.
42752 (ranges_from_anti_range): Same.
42753 * value-range.h (class irange): Remove maybe_anti_range.
42754 (get_legacy_range): New.
42755 * vr-values.cc (check_for_binary_op_overflow): Convert use of
42756 legacy API to get_legacy_range.
42757 (compare_ranges): Same.
42758 (compare_range_with_value): Same.
42759 (bounds_of_var_in_loop): Same.
42760 (find_case_label_ranges): Same.
42761 (simplify_using_ranges::simplify_switch_using_ranges): Same.
42763 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
42765 * value-range-pretty-print.cc (vrange_printer::visit): Remove
42767 * value-range.cc (irange::constant_p): Remove.
42768 (irange::get_nonzero_bits_from_range): Remove constant_p use.
42769 * value-range.h (class irange): Remove constant_p.
42770 (irange::num_pairs): Remove constant_p use.
42772 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
42774 * value-range.cc (irange::copy_legacy_to_multi_range): Remove
42776 (irange::set): Same.
42777 (irange::legacy_lower_bound): Same.
42778 (irange::legacy_upper_bound): Same.
42779 (irange::contains_p): Same.
42780 (range_tests_legacy): Same.
42781 (irange::normalize_addresses): Remove.
42782 (irange::normalize_symbolics): Remove.
42783 (irange::symbolic_p): Remove.
42784 * value-range.h (class irange): Remove symbolic_p,
42785 normalize_symbolics, and normalize_addresses.
42786 * vr-values.cc (simplify_using_ranges::two_valued_val_range_p):
42787 Remove symbolics support.
42789 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
42791 * value-range.cc (irange::may_contain_p): Remove.
42792 * value-range.h (range_includes_zero_p): Rewrite may_contain_p
42793 usage with contains_p.
42794 * vr-values.cc (compare_range_with_value): Same.
42796 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
42798 * tree-vrp.cc (supported_types_p): Remove.
42799 (defined_ranges_p): Remove.
42800 (range_fold_binary_expr): Remove.
42801 (range_fold_unary_expr): Remove.
42802 * tree-vrp.h (range_fold_unary_expr): Remove.
42803 (range_fold_binary_expr): Remove.
42805 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
42807 * ipa-cp.cc (ipa_vr_operation_and_type_effects): Convert to ranger API.
42808 (ipa_value_range_from_jfunc): Same.
42809 (propagate_vr_across_jump_function): Same.
42810 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
42811 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Same.
42812 * vr-values.cc (bounds_of_var_in_loop): Same.
42814 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
42816 * gimple-array-bounds.cc (array_bounds_checker::get_value_range):
42817 Add irange argument.
42818 (check_out_of_bounds_and_warn): Remove check for vr.
42819 (array_bounds_checker::check_array_ref): Remove pointer qualifier
42820 for vr and adjust accordingly.
42821 * gimple-array-bounds.h (get_value_range): Add irange argument.
42822 * value-query.cc (class equiv_allocator): Delete.
42823 (range_query::get_value_range): Delete.
42824 (range_query::range_query): Remove allocator access.
42825 (range_query::~range_query): Same.
42826 * value-query.h (get_value_range): Delete.
42828 (simplify_using_ranges::op_with_boolean_value_range_p): Remove
42829 call to get_value_range.
42830 (check_for_binary_op_overflow): Same.
42831 (simplify_using_ranges::legacy_fold_cond_overflow): Same.
42832 (simplify_using_ranges::simplify_abs_using_ranges): Same.
42833 (simplify_using_ranges::simplify_cond_using_ranges_1): Same.
42834 (simplify_using_ranges::simplify_casted_cond): Same.
42835 (simplify_using_ranges::simplify_switch_using_ranges): Same.
42836 (simplify_using_ranges::two_valued_val_range_p): Same.
42838 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
42841 (simplify_using_ranges::vrp_evaluate_conditional_warnv_with_ops):
42843 (simplify_using_ranges::legacy_fold_cond_overflow): ...this.
42844 (simplify_using_ranges::vrp_visit_cond_stmt): Rename to...
42845 (simplify_using_ranges::legacy_fold_cond): ...this.
42846 (simplify_using_ranges::fold_cond): Rename
42847 vrp_evaluate_conditional_warnv_with_ops to
42848 legacy_fold_cond_overflow.
42849 * vr-values.h (class vr_values): Replace vrp_visit_cond_stmt and
42850 vrp_evaluate_conditional_warnv_with_ops with legacy_fold_cond and
42851 legacy_fold_cond_overflow respectively.
42853 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
42855 * vr-values.cc (get_vr_for_comparison): Remove.
42856 (compare_name_with_value): Same.
42857 (vrp_evaluate_conditional_warnv_with_ops): Remove calls to
42858 compare_name_with_value.
42859 * vr-values.h: Remove compare_name_with_value.
42860 Remove get_vr_for_comparison.
42862 2023-04-26 Roger Sayle <roger@nextmovesoftware.com>
42864 * config/stormy16/stormy16.md (bswaphi2): New define_insn.
42865 (bswapsi2): New define_insn.
42866 (swaphi): New define_insn to exchange two registers (swpw).
42867 (define_peephole2): Recognize exchange of registers as swaphi.
42869 2023-04-26 Richard Biener <rguenther@suse.de>
42871 * gimple-range-path.cc (path_range_query::compute_outgoing_relations):
42873 * ipa-pure-const.cc (pass_nothrow::execute): Likewise.
42874 * predict.cc (apply_return_prediction): Likewise.
42875 * sese.cc (set_ifsese_condition): Likewise. Simplify.
42876 * tree-cfg.cc (assert_unreachable_fallthru_edge_p): Avoid last_stmt.
42877 (make_edges_bb): Likewise.
42878 (make_cond_expr_edges): Likewise.
42879 (end_recording_case_labels): Likewise.
42880 (make_gimple_asm_edges): Likewise.
42881 (cleanup_dead_labels): Likewise.
42882 (group_case_labels): Likewise.
42883 (gimple_can_merge_blocks_p): Likewise.
42884 (gimple_merge_blocks): Likewise.
42885 (find_taken_edge): Likewise. Also handle empty fallthru blocks.
42886 (gimple_duplicate_sese_tail): Avoid last_stmt.
42887 (find_loop_dist_alias): Likewise.
42888 (gimple_block_ends_with_condjump_p): Likewise.
42889 (gimple_purge_dead_eh_edges): Likewise.
42890 (gimple_purge_dead_abnormal_call_edges): Likewise.
42891 (pass_warn_function_return::execute): Likewise.
42892 (execute_fixup_cfg): Likewise.
42893 * tree-eh.cc (redirect_eh_edge_1): Likewise.
42894 (pass_lower_resx::execute): Likewise.
42895 (pass_lower_eh_dispatch::execute): Likewise.
42896 (cleanup_empty_eh): Likewise.
42897 * tree-if-conv.cc (if_convertible_bb_p): Likewise.
42898 (predicate_bbs): Likewise.
42899 (ifcvt_split_critical_edges): Likewise.
42900 * tree-loop-distribution.cc (create_edge_for_control_dependence):
42902 (loop_distribution::transform_reduction_loop): Likewise.
42903 * tree-parloops.cc (transform_to_exit_first_loop_alt): Likewise.
42904 (try_transform_to_exit_first_loop_alt): Likewise.
42905 (transform_to_exit_first_loop): Likewise.
42906 (create_parallel_loop): Likewise.
42907 * tree-scalar-evolution.cc (get_loop_exit_condition): Likewise.
42908 * tree-ssa-dce.cc (mark_last_stmt_necessary): Likewise.
42909 (eliminate_unnecessary_stmts): Likewise.
42911 (dom_opt_dom_walker::set_global_ranges_from_unreachable_edges):
42913 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Likewise.
42914 (pass_tree_ifcombine::execute): Likewise.
42915 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Likewise.
42916 (should_duplicate_loop_header_p): Likewise.
42917 * tree-ssa-loop-ivcanon.cc (create_canonical_iv): Likewise.
42918 (tree_estimate_loop_size): Likewise.
42919 (try_unroll_loop_completely): Likewise.
42920 * tree-ssa-loop-ivopts.cc (tree_ssa_iv_optimize_loop): Likewise.
42921 * tree-ssa-loop-manip.cc (ip_normal_pos): Likewise.
42922 (canonicalize_loop_ivs): Likewise.
42923 * tree-ssa-loop-niter.cc (determine_value_range): Likewise.
42924 (bound_difference): Likewise.
42925 (number_of_iterations_popcount): Likewise.
42926 (number_of_iterations_cltz): Likewise.
42927 (number_of_iterations_cltz_complement): Likewise.
42928 (simplify_using_initial_conditions): Likewise.
42929 (number_of_iterations_exit_assumptions): Likewise.
42930 (loop_niter_by_eval): Likewise.
42931 (estimate_numbers_of_iterations): Likewise.
42933 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
42935 * config/riscv/vector.md: Refine vmadc/vmsbc RA constraint.
42937 2023-04-26 Kewen Lin <linkw@linux.ibm.com>
42940 * config/rs6000/rs6000-builtins.def
42941 (__builtin_vsx_scalar_cmp_exp_qp_eq, __builtin_vsx_scalar_cmp_exp_qp_gt
42942 __builtin_vsx_scalar_cmp_exp_qp_lt,
42943 __builtin_vsx_scalar_cmp_exp_qp_unordered): Move from stanza ieee128-hw
42946 2023-04-26 Kewen Lin <linkw@linux.ibm.com>
42949 * config/rs6000/altivec.md (sldoi_to_mov<mode>): Replace predicate
42950 easy_vector_constant with const_vector_each_byte_same, add
42951 handlings in preparation for !easy_vector_constant, and update
42952 VECTOR_UNIT_ALTIVEC_OR_VSX_P with VECTOR_MEM_ALTIVEC_OR_VSX_P.
42953 * config/rs6000/predicates.md (const_vector_each_byte_same): New
42956 2023-04-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
42958 * config/riscv/vector.md (*pred_cmp<mode>_merge_tie_mask): New pattern.
42959 (*pred_ltge<mode>_merge_tie_mask): Ditto.
42960 (*pred_cmp<mode>_scalar_merge_tie_mask): Ditto.
42961 (*pred_eqne<mode>_scalar_merge_tie_mask): Ditto.
42962 (*pred_cmp<mode>_extended_scalar_merge_tie_mask): Ditto.
42963 (*pred_eqne<mode>_extended_scalar_merge_tie_mask): Ditto.
42964 (*pred_cmp<mode>_narrow_merge_tie_mask): Ditto.
42966 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
42968 * config/riscv/vector.md: Fix redundant vmv1r.v.
42970 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
42972 * config/riscv/vector.md: Fix RA constraint.
42974 2023-04-26 Pan Li <pan2.li@intel.com>
42977 * tree-ssa-sccvn.cc (vn_reference_eq): add type vector subparts
42978 check for vn_reference equal.
42980 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
42982 * config/riscv/riscv-opts.h (enum riscv_autovec_preference_enum): Add enum for
42983 auto-vectorization preference.
42984 (enum riscv_autovec_lmul_enum): Add enum for choosing LMUL of RVV
42985 auto-vectorization.
42986 * config/riscv/riscv.opt: Add compile option for RVV auto-vectorization.
42988 2023-04-26 Jivan Hakobyan <jivanhakobyan9@gmail.com>
42990 * config/riscv/bitmanip.md: Updated predicates of bclri<mode>_nottwobits
42991 and bclridisi_nottwobits patterns.
42992 * config/riscv/predicates.md: (not_uimm_extra_bit_or_nottwobits): Adjust
42993 predicate to avoid splitting arith constants.
42994 (const_nottwobits_not_arith_operand): New predicate.
42996 2023-04-25 Hans-Peter Nilsson <hp@axis.com>
42998 * recog.cc (peep2_attempt, peep2_update_life): Correct
42999 head-comment description of parameter match_len.
43001 2023-04-25 Vineet Gupta <vineetg@rivosinc.com>
43003 * config/riscv/riscv.md: riscv_move_integer() drop in_splitter arg.
43004 riscv_split_symbol() drop in_splitter arg.
43005 * config/riscv/riscv.cc: riscv_move_integer() drop in_splitter arg.
43006 riscv_split_symbol() drop in_splitter arg.
43007 riscv_force_temporary() drop in_splitter arg.
43008 * config/riscv/riscv-protos.h: riscv_move_integer() drop in_splitter arg.
43009 riscv_split_symbol() drop in_splitter arg.
43011 2023-04-25 Eric Botcazou <ebotcazou@adacore.com>
43013 * tree-ssa.cc (insert_debug_temp_for_var_def): Do not create
43014 superfluous debug temporaries for single GIMPLE assignments.
43016 2023-04-25 Richard Biener <rguenther@suse.de>
43018 PR tree-optimization/109609
43019 * attr-fnspec.h (arg_max_access_size_given_by_arg_p):
43021 * tree-ssa-alias.cc (check_fnspec): Correctly interpret
43022 the size given by arg_max_access_size_given_by_arg_p as
43023 maximum, not exact, size.
43025 2023-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
43028 * config/aarch64/aarch64-simd.md (orn<mode>3): Rename to...
43029 (orn<mode>3<vczle><vczbe>): ... This.
43030 (bic<mode>3): Rename to...
43031 (bic<mode>3<vczle><vczbe>): ... This.
43032 (<su><maxmin><mode>3): Rename to...
43033 (<su><maxmin><mode>3<vczle><vczbe>): ... This.
43035 2023-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
43037 * config/aarch64/aarch64-simd.md (<su_optab>div<mode>3): New define_expand.
43038 * config/aarch64/iterators.md (VQDIV): New mode iterator.
43039 (vnx2di): New mode attribute.
43041 2023-04-25 Richard Biener <rguenther@suse.de>
43043 PR rtl-optimization/109585
43044 * tree-ssa-alias.cc (aliasing_component_refs_p): Fix typo.
43046 2023-04-25 Jakub Jelinek <jakub@redhat.com>
43049 * config/rs6000/rs6000.cc (rs6000_is_valid_rotate_dot_mask): For
43050 !TARGET_64BIT, don't return true if UINTVAL (mask) << (63 - nb)
43051 is larger than signed int maximum.
43053 2023-04-25 Martin Liska <mliska@suse.cz>
43055 * doc/gcov.texi: Document the new "calls" field and document
43056 the API bump. Mention also "block_ids" for lines.
43057 * gcov.cc (output_intermediate_json_line): Output info about
43058 calls and extend branches as well.
43059 (generate_results): Bump version to 2.
43060 (output_line_details): Use block ID instead of a non-sensual
43063 2023-04-25 Roger Sayle <roger@nextmovesoftware.com>
43065 * config/stormy16/stormy16.md (zero_extendqihi2): Restore/fix
43066 length attribute for the first (memory operand) alternative.
43068 2023-04-25 Victor Do Nascimento <victor.donascimento@arm.com>
43070 * config/aarch64/aarch64-simd.md(aarch64_simd_stp<mode>): New.
43071 * config/aarch64/constraints.md: Make "Umn" relaxed memory
43073 * config/aarch64/iterators.md(ldpstp_vel_sz): New.
43075 2023-04-25 Aldy Hernandez <aldyh@redhat.com>
43077 * value-range.cc (frange::set): Adjust constructor.
43078 * value-range.h (nan_state::nan_state): Replace default
43079 constructor with one taking an argument.
43081 2023-04-25 Aldy Hernandez <aldyh@redhat.com>
43083 * ipa-cp.cc (ipa_range_contains_p): New.
43084 (decide_whether_version_node): Use it.
43086 2023-04-24 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
43088 * tree-ssa-forwprop.cc (is_combined_permutation_identity): Try to
43089 simplify two successive VEC_PERM_EXPRs with same VLA mask,
43090 where mask chooses elements in reverse order.
43092 2023-04-24 Andrew Pinski <apinski@marvell.com>
43094 * tree-ssa-phiopt.cc (match_simplify_replacement): Add new arguments
43095 and support diamond shaped basic block form.
43096 (tree_ssa_phiopt_worker): Update call to match_simplify_replacement
43098 2023-04-24 Andrew Pinski <apinski@marvell.com>
43100 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
43101 Instead of calling last_and_only_stmt, look for the last statement
43104 2023-04-24 Andrew Pinski <apinski@marvell.com>
43106 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
43108 (match_simplify_replacement): Call
43109 empty_bb_or_one_feeding_into_p instead of doing it inline.
43111 2023-04-24 Andrew Pinski <apinski@marvell.com>
43113 PR tree-optimization/68894
43114 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove the
43115 continue for the do_hoist_loads diamond case.
43117 2023-04-24 Andrew Pinski <apinski@marvell.com>
43119 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Rearrange
43120 code for better code readability.
43122 2023-04-24 Andrew Pinski <apinski@marvell.com>
43124 PR tree-optimization/109604
43125 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Move the
43126 diamond form check from ...
43127 (minmax_replacement): Here.
43129 2023-04-24 Patrick Palka <ppalka@redhat.com>
43131 * tree.cc (strip_array_types): Don't define here.
43132 (is_typedef_decl): Don't define here.
43133 (typedef_variant_p): Don't define here.
43134 * tree.h (strip_array_types): Define here.
43135 (is_typedef_decl): Define here.
43136 (typedef_variant_p): Define here.
43138 2023-04-24 Frederik Harwath <frederik@codesourcery.com>
43140 * doc/generic.texi (OpenMP): Add != to allowed
43141 conditions and state that vars can be unsigned.
43142 * tree.def (OMP_FOR): Likewise.
43144 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
43146 * config/aarch64/aarch64-simd.md (mulv2di3): New expander.
43148 2023-04-24 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
43150 * doc/install.texi: Consistently use Solaris rather than Solaris 2.
43151 Remove explicit Solaris 11 references.
43153 (Options specification, --with-gnu-as): as and gas always differ
43155 Remove /usr/ccs/bin reference.
43156 (Installing GCC: Binaries, Solaris (SPARC, Intel)): Remove.
43157 (i?86-*-solaris2*): Merge assembler, linker recommendations ...
43158 (*-*-solaris2*): ... here.
43159 Update bundled GCC versions.
43160 Don't refer to pre-built binaries.
43161 Remove /bin/sh warning.
43162 Update assembler, linker recommendations.
43163 Document GNAT bootstrap compiler.
43164 (sparc-sun-solaris2*): Remove non-UltraSPARC reference.
43165 (sparc64-*-solaris2*): Move content...
43166 (sparcv9-*-solaris2*): ...here.
43167 Add GDC for 64-bit bootstrap compilers.
43169 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
43172 * config/aarch64/aarch64-sve.md (<optab><mode>3): Handle TARGET_SVE2 MUL
43174 * config/aarch64/aarch64-sve2.md (*aarch64_mul_unpredicated_<mode>): New
43177 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
43179 * config/aarch64/aarch64-simd.md (aarch64_<sur>abal2<mode>): Rename to...
43180 (aarch64_<su>abal2<mode>_insn): ... This. Use RTL codes instead of unspec.
43181 (aarch64_<su>abal2<mode>): New define_expand.
43182 * config/aarch64/aarch64.cc (aarch64_abd_rtx_p): New function.
43183 (aarch64_rtx_costs): Handle ABD rtxes.
43184 * config/aarch64/aarch64.md (UNSPEC_SABAL2, UNSPEC_UABAL2): Delete.
43185 * config/aarch64/iterators.md (ABAL2): Delete.
43186 (sur): Remove handling of UNSPEC_UABAL2 and UNSPEC_SABAL2.
43188 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
43190 * config/aarch64/aarch64-simd.md (aarch64_<sur>abal<mode>): Rename to...
43191 (aarch64_<su>abal<mode>): ... This. Use RTL codes instead of unspec.
43192 (<sur>sadv16qi): Rename to...
43193 (<su>sadv16qi): ... This. Adjust for the above.
43194 * config/aarch64/aarch64-sve.md (<sur>sad<vsi2qi>): Rename to...
43195 (<su>sad<vsi2qi>): ... This. Adjust for the above.
43196 * config/aarch64/aarch64.md (UNSPEC_SABAL, UNSPEC_UABAL): Delete.
43197 * config/aarch64/iterators.md (ABAL): Delete.
43198 (sur): Remove handling of UNSPEC_SABAL and UNSPEC_UABAL.
43200 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
43202 * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl2<mode>): Rename to...
43203 (aarch64_<su>abdl2<mode>_insn): ... This. Use RTL codes instead of unspec.
43204 (aarch64_<su>abdl2<mode>): New define_expand.
43205 * config/aarch64/aarch64.md (UNSPEC_SABDL2, UNSPEC_UABDL2): Delete.
43206 * config/aarch64/iterators.md (ABDL2): Delete.
43207 (sur): Remove handling of UNSPEC_SABDL2 and UNSPEC_UABDL2.
43209 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
43211 * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl<mode>): Rename to...
43212 (aarch64_<su>abdl<mode>): ... This. Use standard RTL ops instead of
43214 * config/aarch64/aarch64.md (UNSPEC_SABDL, UNSPEC_UABDL): Delete.
43215 * config/aarch64/iterators.md (ABDL): Delete.
43216 (sur): Remove handling of UNSPEC_SABDL and UNSPEC_UABDL.
43218 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
43220 * config/aarch64/aarch64-simd.md
43221 (*aarch64_<su>addlv<VDQV_L:mode>_ze<GPI:mode>): New pattern.
43223 2023-04-24 Richard Biener <rguenther@suse.de>
43225 * gimple-ssa-split-paths.cc (is_feasible_trace): Avoid
43227 * graphite-scop-detection.cc (single_pred_cond_non_loop_exit):
43229 * ipa-fnsummary.cc (set_cond_stmt_execution_predicate): Likewise.
43230 (set_switch_stmt_execution_predicate): Likewise.
43231 (phi_result_unknown_predicate): Likewise.
43232 * ipa-prop.cc (compute_complex_ancestor_jump_func): Likewise.
43233 (ipa_analyze_indirect_call_uses): Likewise.
43234 * predict.cc (predict_iv_comparison): Likewise.
43235 (predict_extra_loop_exits): Likewise.
43236 (predict_loops): Likewise.
43237 (tree_predict_by_opcode): Likewise.
43238 * gimple-predicate-analysis.cc (predicate::init_from_control_deps):
43240 * gimple-pretty-print.cc (dump_implicit_edges): Likewise.
43241 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Likewise.
43242 (replace_phi_edge_with_variable): Likewise.
43243 (two_value_replacement): Likewise.
43244 (value_replacement): Likewise.
43245 (minmax_replacement): Likewise.
43246 (spaceship_replacement): Likewise.
43247 (cond_removal_in_builtin_zero_pattern): Likewise.
43248 * tree-ssa-reassoc.cc (maybe_optimize_range_tests): Likewise.
43249 * tree-ssa-sccvn.cc (vn_phi_eq): Likewise.
43250 (vn_phi_lookup): Likewise.
43251 (vn_phi_insert): Likewise.
43252 * tree-ssa-structalias.cc (compute_points_to_sets): Likewise.
43253 * tree-ssa-threadbackward.cc (back_threader::maybe_thread_block):
43255 (back_threader_profitability::possibly_profitable_path_p):
43257 * tree-ssa-threadedge.cc (jump_threader::thread_outgoing_edges):
43259 * tree-switch-conversion.cc (pass_convert_switch::execute):
43261 (pass_lower_switch<O0>::execute): Likewise.
43262 * tree-tailcall.cc (tree_optimize_tail_calls_1): Likewise.
43263 * tree-vect-loop-manip.cc (vect_loop_versioning): Likewise.
43264 * tree-vect-slp.cc (vect_slp_function): Likewise.
43265 * tree-vect-stmts.cc (cfun_returns): Likewise.
43266 * tree-vectorizer.cc (vect_loop_vectorized_call): Likewise.
43267 (vect_loop_dist_alias_call): Likewise.
43269 2023-04-24 Richard Biener <rguenther@suse.de>
43271 * cfgcleanup.cc (outgoing_edges_match): Use FORWARDER_BLOCK_P.
43273 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
43275 * config/riscv/riscv-vsetvl.cc
43276 (vector_infos_manager::all_avail_in_compatible_p): New function.
43277 (pass_vsetvl::refine_vsetvls): Optimize vsetvls.
43278 * config/riscv/riscv-vsetvl.h: New function.
43280 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
43282 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::pre_vsetvl): Add function
43283 comment for cleanup_insns.
43285 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
43287 * config/riscv/vector-iterators.md: New unspec to refine fault first load pattern.
43288 * config/riscv/vector.md: Refine fault first load pattern to erase avl from instructions
43289 with the fault first load property.
43291 2023-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
43293 * config/aarch64/aarch64-simd.md (aarch64_float_truncate_lo_): Rename to...
43294 (aarch64_float_truncate_lo_<mode><vczle><vczbe>): ... This.
43296 2023-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
43299 * config/aarch64/aarch64-simd.md (aarch64_addp<mode>): Rename to...
43300 (aarch64_addp<mode><vczle><vczbe>): ... This.
43302 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
43304 * config/stormy16/stormy16.cc (xstormy16_rtx_costs): Rewrite to
43305 provide reasonable values for common arithmetic operations and
43306 immediate operands (in several machine modes).
43308 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
43310 * config/stormy16/stormy16.cc (xstormy16_print_operand): Add %h
43311 format specifier to output high_part register name of SImode reg.
43312 * config/stormy16/stormy16.md (extendhisi2): New define_insn.
43313 (zero_extendqihi2): Fix lengths, consistent formatting and add
43314 "and Rx,#255" alternative, for documentation purposes.
43315 (zero_extendhisi2): New define_insn.
43317 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
43319 * config/stormy16/stormy16.cc (xstormy16_output_shift): Implement
43320 SImode shifts by two by performing a single bit SImode shift twice.
43322 2023-04-23 Aldy Hernandez <aldyh@redhat.com>
43324 PR tree-optimization/109593
43325 * value-range.cc (frange::operator==): Handle NANs.
43327 2023-04-23 liuhongt <hongtao.liu@intel.com>
43329 PR rtl-optimization/108707
43330 * ira-costs.cc (scan_one_insn): Use NO_REGS instead of
43331 GENERAL_REGS when preferred reg_class is not known.
43333 2023-04-22 Andrew Pinski <apinski@marvell.com>
43335 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker):
43336 Change the code around slightly to move diamond
43337 handling for do_store_elim/do_hoist_loads out of
43340 2023-04-22 Andrew Pinski <apinski@marvell.com>
43342 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker):
43343 Remove check on empty_block_p.
43345 2023-04-22 Jakub Jelinek <jakub@redhat.com>
43347 PR bootstrap/109589
43348 * system.h (class auto_mpz): Workaround PR62101 bug in GCC 4.8 and 4.9.
43349 * realmpfr.h (class auto_mpfr): Likewise.
43351 2023-04-22 Jakub Jelinek <jakub@redhat.com>
43353 PR tree-optimization/109583
43354 * match.pd (fneg/fadd simplify): Don't call related_vector_mode
43355 if vec_mode is not VECTOR_MODE_P.
43357 2023-04-22 Jan Hubicka <hubicka@ucw.cz>
43358 Ondrej Kubanek <kubanek0ondrej@gmail.com>
43360 * cfgloopmanip.h (adjust_loop_info_after_peeling): Declare.
43361 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Fix updating of
43362 loop profile and bounds after header duplication.
43363 * tree-ssa-loop-ivcanon.cc (adjust_loop_info_after_peeling):
43364 Break out from try_peel_loop; fix handling of 0 iterations.
43365 (try_peel_loop): Use adjust_loop_info_after_peeling.
43367 2023-04-21 Andrew MacLeod <amacleod@redhat.com>
43369 PR tree-optimization/109546
43370 * tree-vrp.cc (remove_unreachable::remove_and_update_globals): Do
43371 not fold conditions with ADDR_EXPR early.
43373 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
43375 * config/aarch64/aarch64.md (aarch64_umax<mode>3_insn): Delete.
43376 (umax<mode>3): Emit raw UMAX RTL instead of going through gen_ function
43378 (<optab><mode>3): New define_expand for MAXMIN_NOUMAX codes.
43379 (*aarch64_<optab><mode>3_zero): Define.
43380 (*aarch64_<optab><mode>3_cssc): Likewise.
43381 * config/aarch64/iterators.md (maxminand): New code attribute.
43383 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
43386 * config/aarch64/aarch64-opts.h (enum aarch64_tp_reg): Define.
43387 * config/aarch64/aarch64-protos.h (aarch64_output_load_tp):
43389 * config/aarch64/aarch64.cc (aarch64_tpidr_register): Declare.
43390 (aarch64_override_options_internal): Handle the above.
43391 (aarch64_output_load_tp): New function.
43392 * config/aarch64/aarch64.md (aarch64_load_tp_hard): Call
43393 aarch64_output_load_tp.
43394 * config/aarch64/aarch64.opt (aarch64_tp_reg): Define enum.
43395 (mtp=): New option.
43396 * doc/invoke.texi (AArch64 Options): Document -mtp=.
43398 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
43401 * config/aarch64/aarch64-simd.md (add_vec_concat_subst_le): Define.
43402 (add_vec_concat_subst_be): Likewise.
43405 (add<mode>3): Rename to...
43406 (add<mode>3<vczle><vczbe>): ... This.
43407 (sub<mode>3): Rename to...
43408 (sub<mode>3<vczle><vczbe>): ... This.
43409 (mul<mode>3): Rename to...
43410 (mul<mode>3<vczle><vczbe>): ... This.
43411 (and<mode>3): Rename to...
43412 (and<mode>3<vczle><vczbe>): ... This.
43413 (ior<mode>3): Rename to...
43414 (ior<mode>3<vczle><vczbe>): ... This.
43415 (xor<mode>3): Rename to...
43416 (xor<mode>3<vczle><vczbe>): ... This.
43417 * config/aarch64/iterators.md (VDZ): Define.
43419 2023-04-21 Patrick Palka <ppalka@redhat.com>
43421 * tree.cc (walk_tree_1): Avoid repeatedly dereferencing tp
43424 2023-04-21 Jan Hubicka <jh@suse.cz>
43426 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Fix previous
43429 2023-04-21 Vineet Gupta <vineetg@rivosinc.com>
43431 * expmed.h (x_shift*_cost): convert to int [speed][mode][shift].
43432 (shift*_cost_ptr ()): Access x_shift*_cost array directly.
43434 2023-04-21 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
43436 * config/aarch64/aarch64.cc (aarch64_simd_dup_constant): Use
43437 force_reg instead of copy_to_mode_reg.
43438 (aarch64_expand_vector_init): Likewise.
43440 2023-04-21 Uroš Bizjak <ubizjak@gmail.com>
43442 * config/i386/i386.h (REG_OK_FOR_INDEX_P, REG_OK_FOR_BASE_P): Remove.
43443 (REG_OK_FOR_INDEX_NONSTRICT_P, REG_OK_FOR_BASE_NONSTRICT_P): Ditto.
43444 (REG_OK_FOR_INDEX_STRICT_P, REG_OK_FOR_BASE_STRICT_P): Ditto.
43445 (FIRST_INDEX_REG, LAST_INDEX_REG): New defines.
43446 (LEGACY_INDEX_REG_P, LEGACY_INDEX_REGNO_P): New macros.
43447 (INDEX_REG_P, INDEX_REGNO_P): Ditto.
43448 (REGNO_OK_FOR_INDEX_P): Use INDEX_REGNO_P predicates.
43449 (REGNO_OK_FOR_INDEX_NONSTRICT_P): New macro.
43450 (EG_OK_FOR_BASE_NONSTRICT_P): Ditto.
43451 * config/i386/predicates.md (index_register_operand):
43452 Use REGNO_OK_FOR_INDEX_P and REGNO_OK_FOR_INDEX_NONSTRICT_P macros.
43453 * config/i386/i386.cc (ix86_legitimate_address_p): Use
43454 REGNO_OK_FOR_BASE_P, REGNO_OK_FOR_BASE_NONSTRICT_P,
43455 REGNO_OK_FOR_INDEX_P and REGNO_OK_FOR_INDEX_NONSTRICT_P macros.
43457 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
43458 Ondrej Kubanek <kubanek0ondrej@gmail.com>
43460 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Update loop header and
43463 2023-04-21 Richard Biener <rguenther@suse.de>
43465 * is-a.h (safe_is_a): New.
43467 2023-04-21 Richard Biener <rguenther@suse.de>
43469 * gimple-iterator.h (gimple_stmt_iterator::operator*): Add.
43470 (gphi_iterator::operator*): Likewise.
43472 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
43473 Michal Jires <michal@jires.eu>
43475 * ipa-inline.cc (class inline_badness): New class.
43476 (edge_heap_t, edge_heap_node_t): Use inline_badness for badness instead
43478 (update_edge_key): Update.
43479 (lookup_recursive_calls): Likewise.
43480 (recursive_inlining): Likewise.
43481 (add_new_edges_to_heap): Likewise.
43482 (inline_small_functions): Likewise.
43484 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
43486 * ipa-devirt.cc (odr_types_equivalent_p): Cleanup warned checks.
43488 2023-04-21 Richard Biener <rguenther@suse.de>
43490 PR tree-optimization/109573
43491 * tree-vect-loop.cc (vectorizable_live_operation): Allow
43492 unhandled SSA copy as well. Demote assert to checking only.
43494 2023-04-21 Richard Biener <rguenther@suse.de>
43496 * df-core.cc (df_analyze): Compute RPO on the reverse graph
43497 for DF_BACKWARD problems.
43498 (loop_post_order_compute): Rename to ...
43499 (loop_rev_post_order_compute): ... this, compute a RPO.
43500 (loop_inverted_post_order_compute): Rename to ...
43501 (loop_inverted_rev_post_order_compute): ... this, compute a RPO.
43502 (df_analyze_loop): Use RPO on the forward graph for DF_FORWARD
43503 problems, RPO on the inverted graph for DF_BACKWARD.
43505 2023-04-21 Richard Biener <rguenther@suse.de>
43507 * cfganal.h (inverted_rev_post_order_compute): Rename
43509 (inverted_post_order_compute): ... this. Add struct function
43510 argument, change allocation to a C array.
43511 * cfganal.cc (inverted_rev_post_order_compute): Likewise.
43512 * lcm.cc (compute_antinout_edge): Adjust.
43513 * lra-lives.cc (lra_create_live_ranges_1): Likewise.
43514 * tree-ssa-dce.cc (remove_dead_stmt): Likewise.
43515 * tree-ssa-pre.cc (compute_antic): Likewise.
43517 2023-04-21 Richard Biener <rguenther@suse.de>
43519 * df.h (df_d::postorder_inverted): Change back to int *,
43521 * df-core.cc (rest_of_handle_df_finish): Adjust.
43522 (df_analyze_1): Likewise.
43523 (df_analyze): For DF_FORWARD problems use RPO on the forward
43525 (loop_inverted_post_order_compute): Adjust API.
43526 (df_analyze_loop): Adjust.
43527 (df_get_n_blocks): Likewise.
43528 (df_get_postorder): Likewise.
43530 2023-04-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
43533 * config/riscv/riscv-vsetvl.cc
43534 (vector_infos_manager::all_empty_predecessor_p): New function.
43535 (pass_vsetvl::backward_demand_fusion): Ditto.
43536 * config/riscv/riscv-vsetvl.h: Ditto.
43538 2023-04-21 Robin Dapp <rdapp@ventanamicro.com>
43541 * config/riscv/generic.md: Change standard names to insn names.
43543 2023-04-21 Richard Biener <rguenther@suse.de>
43545 * lcm.cc (compute_antinout_edge): Use RPO on the inverted graph.
43546 (compute_laterin): Use RPO.
43547 (compute_available): Likewise.
43549 2023-04-21 Peng Fan <fanpeng@loongson.cn>
43551 * config/loongarch/gnu-user.h (MUSL_DYNAMIC_LINKER): Redefine.
43553 2023-04-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
43556 * config/riscv/riscv-vsetvl.cc (local_eliminate_vsetvl_insn): New function.
43557 (vector_insn_info::skip_avl_compatible_p): Ditto.
43558 (vector_insn_info::merge): Remove default value.
43559 (pass_vsetvl::compute_local_backward_infos): Ditto.
43560 (pass_vsetvl::cleanup_insns): Add local vsetvl elimination.
43561 * config/riscv/riscv-vsetvl.h: Ditto.
43563 2023-04-20 Alejandro Colomar <alx.manpages@gmail.com>
43565 * doc/extend.texi (Common Function Attributes): Remove duplicate
43568 2023-04-20 Andrew MacLeod <amacleod@redhat.com>
43570 PR tree-optimization/109564
43571 * gimple-range-fold.cc (fold_using_range::range_of_phi): Do no ignore
43572 UNDEFINED range names when deciding if all PHI arguments are the same,
43574 2023-04-20 Jakub Jelinek <jakub@redhat.com>
43576 PR tree-optimization/109011
43577 * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern): Use
43578 .CTZ (X) = .POPCOUNT ((X - 1) & ~X) in preference to
43579 .CTZ (X) = PREC - .POPCOUNT (X | -X).
43581 2023-04-20 Vladimir N. Makarov <vmakarov@redhat.com>
43583 * lra-constraints.cc (match_reload): Exclude some hard regs for
43584 multi-reg inout reload pseudos used in asm in different mode.
43586 2023-04-20 Uros Bizjak <ubizjak@gmail.com>
43588 * config/arm/arm.cc (thumb1_legitimate_address_p):
43589 Use VIRTUAL_REGISTER_P predicate.
43590 (arm_eliminable_register): Ditto.
43591 * config/avr/avr.md (push<mode>_1): Ditto.
43592 * config/bfin/predicates.md (register_no_elim_operand): Ditto.
43593 * config/h8300/predicates.md (register_no_sp_elim_operand): Ditto.
43594 * config/i386/predicates.md (register_no_elim_operand): Ditto.
43595 * config/iq2000/predicates.md (call_insn_operand): Ditto.
43596 * config/microblaze/microblaze.h (CALL_INSN_OP): Ditto.
43598 2023-04-20 Uros Bizjak <ubizjak@gmail.com>
43601 * config/i386/predicates.md (extract_operator): New predicate.
43602 * config/i386/i386.md (any_extract): Remove code iterator.
43603 (*cmpqi_ext<mode>_1_mem_rex64): Use extract_operator predicate.
43604 (*cmpqi_ext<mode>_1): Ditto.
43605 (*cmpqi_ext<mode>_2): Ditto.
43606 (*cmpqi_ext<mode>_3_mem_rex64): Ditto.
43607 (*cmpqi_ext<mode>_3): Ditto.
43608 (*cmpqi_ext<mode>_4): Ditto.
43609 (*extzvqi_mem_rex64): Ditto.
43611 (*insvqi_2): Ditto.
43612 (*extendqi<SWI24:mode>_ext_1): Ditto.
43613 (*addqi_ext<mode>_0): Ditto.
43614 (*addqi_ext<mode>_1): Ditto.
43615 (*addqi_ext<mode>_2): Ditto.
43616 (*subqi_ext<mode>_0): Ditto.
43617 (*subqi_ext<mode>_2): Ditto.
43618 (*testqi_ext<mode>_1): Ditto.
43619 (*testqi_ext<mode>_2): Ditto.
43620 (*andqi_ext<mode>_0): Ditto.
43621 (*andqi_ext<mode>_1): Ditto.
43622 (*andqi_ext<mode>_1_cc): Ditto.
43623 (*andqi_ext<mode>_2): Ditto.
43624 (*<any_or:code>qi_ext<mode>_0): Ditto.
43625 (*<any_or:code>qi_ext<mode>_1): Ditto.
43626 (*<any_or:code>qi_ext<mode>_2): Ditto.
43627 (*xorqi_ext<mode>_1_cc): Ditto.
43628 (*negqi_ext<mode>_2): Ditto.
43629 (*ashlqi_ext<mode>_2): Ditto.
43630 (*<any_shiftrt:insn>qi_ext<mode>_2): Ditto.
43632 2023-04-20 Raphael Zinsly <rzinsly@ventanamicro.com>
43635 * config/riscv/bitmanip.md (clz, ctz, pcnt, min, max patterns): Use
43636 <bitmanip_insn> as the type to allow for fine grained control of
43637 scheduling these insns.
43638 * config/riscv/generic.md (generic_alu): Add bitmanip, clz, ctz, pcnt,
43640 * config/riscv/riscv.md (type attribute): Add types for clz, ctz,
43641 pcnt, signed and unsigned min/max.
43643 2023-04-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
43644 kito-cheng <kito.cheng@sifive.com>
43646 * config/riscv/riscv.h (enum reg_class): Fix RVV register order.
43648 2023-04-20 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43649 kito-cheng <kito.cheng@sifive.com>
43652 * config/riscv/riscv-vsetvl.cc (count_regno_occurrences): New function.
43653 (pass_vsetvl::cleanup_insns): Fix bug.
43655 2023-04-20 Andrew Stubbs <ams@codesourcery.com>
43657 * config/gcn/gcn-valu.md (vnsi, VnSI): Add scalar modes.
43658 (ldexp<mode>3): Delete.
43659 (ldexp<mode>3<exec>): Change "B" to "A".
43661 2023-04-20 Jakub Jelinek <jakub@redhat.com>
43662 Jonathan Wakely <jwakely@redhat.com>
43664 * tree.h (built_in_function_equal_p): New helper function.
43665 (fndecl_built_in_p): Turn into variadic template to support
43666 1 or more built_in_function arguments.
43667 * builtins.cc (fold_builtin_expect): Use 3 argument fndecl_built_in_p.
43668 * gimplify.cc (goa_stabilize_expr): Likewise.
43669 * cgraphclones.cc (cgraph_node::create_clone): Likewise.
43670 * ipa-fnsummary.cc (compute_fn_summary): Likewise.
43671 * omp-low.cc (setjmp_or_longjmp_p): Likewise.
43672 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee,
43673 cgraph_update_edges_for_call_stmt_node,
43674 cgraph_edge::verify_corresponds_to_fndecl,
43675 cgraph_node::verify_node): Likewise.
43676 * tree-stdarg.cc (optimize_va_list_gpr_fpr_size): Likewise.
43677 * gimple-ssa-warn-access.cc (matching_alloc_calls_p): Likewise.
43678 * ipa-prop.cc (try_make_edge_direct_virtual_call): Likewise.
43680 2023-04-20 Jakub Jelinek <jakub@redhat.com>
43682 PR tree-optimization/109011
43683 * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern): New function.
43684 (vect_recog_popcount_clz_ctz_ffs_pattern): Move vect_pattern_detected
43685 call later. Don't punt for IFN_CTZ or IFN_FFS if it doesn't have
43686 direct optab support, but has instead IFN_CLZ, IFN_POPCOUNT or
43687 for IFN_FFS IFN_CTZ support, use vect_recog_ctz_ffs_pattern for that
43689 (vect_vect_recog_func_ptrs): Add ctz_ffs entry.
43691 2023-04-20 Richard Biener <rguenther@suse.de>
43693 * df-core.cc (rest_of_handle_df_initialize): Remove
43694 computation of df->postorder, df->postorder_inverted and
43697 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
43699 * common/config/i386/i386-common.cc
43700 (OPTION_MASK_ISA2_AVX_UNSET): Add OPTION_MASK_ISA2_VAES_UNSET.
43701 (ix86_handle_option): Set AVX flag for VAES.
43702 * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
43703 Add OPTION_MASK_ISA2_VAES_UNSET.
43704 (def_builtin): Share builtin between AES and VAES.
43705 * config/i386/i386-expand.cc (ix86_check_builtin_isa_match):
43707 * config/i386/i386.md (aes): New isa attribute.
43708 * config/i386/sse.md (aesenc): Add pattern for VAES with xmm.
43709 (aesenclast): Ditto.
43711 (aesdeclast): Ditto.
43712 * config/i386/vaesintrin.h: Remove redundant avx target push.
43713 * config/i386/wmmintrin.h (_mm_aesdec_si128): Change to macro.
43714 (_mm_aesdeclast_si128): Ditto.
43715 (_mm_aesenc_si128): Ditto.
43716 (_mm_aesenclast_si128): Ditto.
43718 2023-04-20 Hu, Lin1 <lin1.hu@intel.com>
43720 * config/i386/avx2intrin.h
43721 (_MM_REDUCE_OPERATOR_BASIC_EPI16): New macro.
43722 (_MM_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto.
43723 (_MM256_REDUCE_OPERATOR_BASIC_EPI16): Ditto.
43724 (_MM256_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto.
43725 (_MM_REDUCE_OPERATOR_BASIC_EPI8): Ditto.
43726 (_MM_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto.
43727 (_MM256_REDUCE_OPERATOR_BASIC_EPI8): Ditto.
43728 (_MM256_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto.
43729 (_mm_reduce_add_epi16): New instrinsics.
43730 (_mm_reduce_mul_epi16): Ditto.
43731 (_mm_reduce_and_epi16): Ditto.
43732 (_mm_reduce_or_epi16): Ditto.
43733 (_mm_reduce_max_epi16): Ditto.
43734 (_mm_reduce_max_epu16): Ditto.
43735 (_mm_reduce_min_epi16): Ditto.
43736 (_mm_reduce_min_epu16): Ditto.
43737 (_mm256_reduce_add_epi16): Ditto.
43738 (_mm256_reduce_mul_epi16): Ditto.
43739 (_mm256_reduce_and_epi16): Ditto.
43740 (_mm256_reduce_or_epi16): Ditto.
43741 (_mm256_reduce_max_epi16): Ditto.
43742 (_mm256_reduce_max_epu16): Ditto.
43743 (_mm256_reduce_min_epi16): Ditto.
43744 (_mm256_reduce_min_epu16): Ditto.
43745 (_mm_reduce_add_epi8): Ditto.
43746 (_mm_reduce_mul_epi8): Ditto.
43747 (_mm_reduce_and_epi8): Ditto.
43748 (_mm_reduce_or_epi8): Ditto.
43749 (_mm_reduce_max_epi8): Ditto.
43750 (_mm_reduce_max_epu8): Ditto.
43751 (_mm_reduce_min_epi8): Ditto.
43752 (_mm_reduce_min_epu8): Ditto.
43753 (_mm256_reduce_add_epi8): Ditto.
43754 (_mm256_reduce_mul_epi8): Ditto.
43755 (_mm256_reduce_and_epi8): Ditto.
43756 (_mm256_reduce_or_epi8): Ditto.
43757 (_mm256_reduce_max_epi8): Ditto.
43758 (_mm256_reduce_max_epu8): Ditto.
43759 (_mm256_reduce_min_epi8): Ditto.
43760 (_mm256_reduce_min_epu8): Ditto.
43761 * config/i386/avx512vlbwintrin.h:
43762 (_mm_mask_reduce_add_epi16): Ditto.
43763 (_mm_mask_reduce_mul_epi16): Ditto.
43764 (_mm_mask_reduce_and_epi16): Ditto.
43765 (_mm_mask_reduce_or_epi16): Ditto.
43766 (_mm_mask_reduce_max_epi16): Ditto.
43767 (_mm_mask_reduce_max_epu16): Ditto.
43768 (_mm_mask_reduce_min_epi16): Ditto.
43769 (_mm_mask_reduce_min_epu16): Ditto.
43770 (_mm256_mask_reduce_add_epi16): Ditto.
43771 (_mm256_mask_reduce_mul_epi16): Ditto.
43772 (_mm256_mask_reduce_and_epi16): Ditto.
43773 (_mm256_mask_reduce_or_epi16): Ditto.
43774 (_mm256_mask_reduce_max_epi16): Ditto.
43775 (_mm256_mask_reduce_max_epu16): Ditto.
43776 (_mm256_mask_reduce_min_epi16): Ditto.
43777 (_mm256_mask_reduce_min_epu16): Ditto.
43778 (_mm_mask_reduce_add_epi8): Ditto.
43779 (_mm_mask_reduce_mul_epi8): Ditto.
43780 (_mm_mask_reduce_and_epi8): Ditto.
43781 (_mm_mask_reduce_or_epi8): Ditto.
43782 (_mm_mask_reduce_max_epi8): Ditto.
43783 (_mm_mask_reduce_max_epu8): Ditto.
43784 (_mm_mask_reduce_min_epi8): Ditto.
43785 (_mm_mask_reduce_min_epu8): Ditto.
43786 (_mm256_mask_reduce_add_epi8): Ditto.
43787 (_mm256_mask_reduce_mul_epi8): Ditto.
43788 (_mm256_mask_reduce_and_epi8): Ditto.
43789 (_mm256_mask_reduce_or_epi8): Ditto.
43790 (_mm256_mask_reduce_max_epi8): Ditto.
43791 (_mm256_mask_reduce_max_epu8): Ditto.
43792 (_mm256_mask_reduce_min_epi8): Ditto.
43793 (_mm256_mask_reduce_min_epu8): Ditto.
43795 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
43797 * common/config/i386/i386-common.cc
43798 (OPTION_MASK_ISA_VPCLMULQDQ_SET):
43799 Add OPTION_MASK_ISA_PCLMUL_SET and OPTION_MASK_ISA_AVX_SET.
43800 (OPTION_MASK_ISA_AVX_UNSET):
43801 Add OPTION_MASK_ISA_VPCLMULQDQ_UNSET.
43802 (OPTION_MASK_ISA_PCLMUL_UNSET): Ditto.
43803 * config/i386/i386.md (vpclmulqdqvl): New.
43804 * config/i386/sse.md (pclmulqdq): Add evex encoding.
43805 * config/i386/vpclmulqdqintrin.h: Remove redudant avx target
43808 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
43810 * config/i386/avx512vlbwintrin.h
43811 (_mm_mask_blend_epi16): Remove __OPTIMIZE__ wrapper.
43812 (_mm_mask_blend_epi8): Ditto.
43813 (_mm256_mask_blend_epi16): Ditto.
43814 (_mm256_mask_blend_epi8): Ditto.
43815 * config/i386/avx512vlintrin.h
43816 (_mm256_mask_blend_pd): Ditto.
43817 (_mm256_mask_blend_ps): Ditto.
43818 (_mm256_mask_blend_epi64): Ditto.
43819 (_mm256_mask_blend_epi32): Ditto.
43820 (_mm_mask_blend_pd): Ditto.
43821 (_mm_mask_blend_ps): Ditto.
43822 (_mm_mask_blend_epi64): Ditto.
43823 (_mm_mask_blend_epi32): Ditto.
43824 * config/i386/sse.md (VF_AVX512BWHFBF16): Removed.
43825 (VF_AVX512HFBFVL): Move it before the first usage.
43826 (<avx512>_blendm<mode>): Change iterator from VF_AVX512BWHFBF16
43827 to VF_AVX512HFBFVL.
43829 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
43831 * common/config/i386/i386-common.cc
43832 (OPTION_MASK_ISA_AVX512VBMI2_SET): Change OPTION_MASK_ISA_AVX512F_SET
43833 to OPTION_MASK_ISA_AVX512BW_SET.
43834 (OPTION_MASK_ISA_AVX512F_UNSET):
43835 Remove OPTION_MASK_ISA_AVX512VBMI2_UNSET.
43836 (OPTION_MASK_ISA_AVX512BW_UNSET):
43837 Add OPTION_MASK_ISA_AVX512VBMI2_UNSET.
43838 * config/i386/avx512vbmi2intrin.h: Do not push avx512bw.
43839 * config/i386/avx512vbmi2vlintrin.h: Ditto.
43840 * config/i386/i386-builtin.def: Remove OPTION_MASK_ISA_AVX512BW.
43841 * config/i386/sse.md (VI12_AVX512VLBW): Removed.
43842 (VI12_VI48F_AVX512VLBW): Rename to VI12_VI48F_AVX512VL.
43843 (compress<mode>_mask): Change iterator from VI12_AVX512VLBW to
43845 (compressstore<mode>_mask): Ditto.
43846 (expand<mode>_mask): Ditto.
43847 (expand<mode>_maskz): Ditto.
43848 (*expand<mode>_mask): Change iterator from VI12_VI48F_AVX512VLBW to
43849 VI12_VI48F_AVX512VL.
43851 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
43853 * common/config/i386/i386-common.cc
43854 (OPTION_MASK_ISA_AVX512BITALG_SET):
43855 Change OPTION_MASK_ISA_AVX512F_SET
43856 to OPTION_MASK_ISA_AVX512BW_SET.
43857 (OPTION_MASK_ISA_AVX512F_UNSET):
43858 Remove OPTION_MASK_ISA_AVX512BITALG_SET.
43859 (OPTION_MASK_ISA_AVX512BW_UNSET):
43860 Add OPTION_MASK_ISA_AVX512BITALG_SET.
43861 * config/i386/avx512bitalgintrin.h: Do not push avx512bw.
43862 * config/i386/i386-builtin.def:
43863 Remove redundant OPTION_MASK_ISA_AVX512BW.
43864 * config/i386/sse.md (VI1_AVX512VLBW): Removed.
43865 (avx512vl_vpshufbitqmb<mode><mask_scalar_merge_name>):
43866 Change the iterator from VI1_AVX512VLBW to VI1_AVX512VL.
43868 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
43870 * config/i386/i386-expand.cc
43871 (ix86_check_builtin_isa_match): Correct wrong comments.
43872 Add a new macro SHARE_BUILTIN and refactor the current if
43875 2023-04-20 Mo, Zewei <zewei.mo@intel.com>
43877 * config/i386/cpuid.h: Open a new section for Extended Features
43878 Leaf (%eax == 7, %ecx == 0) and Extended Features Sub-leaf (%eax == 7,
43881 2023-04-20 Hu, Lin1 <lin1.hu@intel.com>
43883 * config/i386/sse.md: Modify insn vperm{i,f}
43886 2023-04-19 Max Filippov <jcmvbkbc@gmail.com>
43888 * config/xtensa/xtensa-opts.h: New header.
43889 * config/xtensa/xtensa.h (STRICT_ALIGNMENT): Redefine as
43890 xtensa_strict_align.
43891 * config/xtensa/xtensa.cc (xtensa_option_override): When
43892 -m[no-]strict-align is not specified in the command line set
43893 xtensa_strict_align to 0 if the hardware supports both unaligned
43894 loads and stores or to 1 otherwise.
43895 * config/xtensa/xtensa.opt (mstrict-align): New option.
43896 * doc/invoke.texi (Xtensa Options): Document -m[no-]strict-align.
43898 2023-04-19 Max Filippov <jcmvbkbc@gmail.com>
43900 * config/xtensa/xtensa-dynconfig.cc (xtensa_get_config_v4): New
43903 2023-04-19 Andrew Pinski <apinski@marvell.com>
43905 * config/i386/i386.md (*movsicc_noc_zext_1): New pattern.
43907 2023-04-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
43909 * config/riscv/riscv-modes.def (FLOAT_MODE): Add chunk 128 support.
43910 (VECTOR_BOOL_MODE): Ditto.
43911 (ADJUST_NUNITS): Ditto.
43912 (ADJUST_ALIGNMENT): Ditto.
43913 (ADJUST_BYTESIZE): Ditto.
43914 (ADJUST_PRECISION): Ditto.
43915 (RVV_MODES): Ditto.
43916 (VECTOR_MODE_WITH_PREFIX): Ditto.
43917 * config/riscv/riscv-v.cc (ENTRY): Ditto.
43918 (get_vlmul): Ditto.
43919 (get_ratio): Ditto.
43920 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
43921 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): Ditto.
43922 (vbool64_t): Ditto.
43923 (vbool32_t): Ditto.
43924 (vbool16_t): Ditto.
43929 (vint8mf8_t): Ditto.
43930 (vuint8mf8_t): Ditto.
43931 (vint8mf4_t): Ditto.
43932 (vuint8mf4_t): Ditto.
43933 (vint8mf2_t): Ditto.
43934 (vuint8mf2_t): Ditto.
43935 (vint8m1_t): Ditto.
43936 (vuint8m1_t): Ditto.
43937 (vint8m2_t): Ditto.
43938 (vuint8m2_t): Ditto.
43939 (vint8m4_t): Ditto.
43940 (vuint8m4_t): Ditto.
43941 (vint8m8_t): Ditto.
43942 (vuint8m8_t): Ditto.
43943 (vint16mf4_t): Ditto.
43944 (vuint16mf4_t): Ditto.
43945 (vint16mf2_t): Ditto.
43946 (vuint16mf2_t): Ditto.
43947 (vint16m1_t): Ditto.
43948 (vuint16m1_t): Ditto.
43949 (vint16m2_t): Ditto.
43950 (vuint16m2_t): Ditto.
43951 (vint16m4_t): Ditto.
43952 (vuint16m4_t): Ditto.
43953 (vint16m8_t): Ditto.
43954 (vuint16m8_t): Ditto.
43955 (vint32mf2_t): Ditto.
43956 (vuint32mf2_t): Ditto.
43957 (vint32m1_t): Ditto.
43958 (vuint32m1_t): Ditto.
43959 (vint32m2_t): Ditto.
43960 (vuint32m2_t): Ditto.
43961 (vint32m4_t): Ditto.
43962 (vuint32m4_t): Ditto.
43963 (vint32m8_t): Ditto.
43964 (vuint32m8_t): Ditto.
43965 (vint64m1_t): Ditto.
43966 (vuint64m1_t): Ditto.
43967 (vint64m2_t): Ditto.
43968 (vuint64m2_t): Ditto.
43969 (vint64m4_t): Ditto.
43970 (vuint64m4_t): Ditto.
43971 (vint64m8_t): Ditto.
43972 (vuint64m8_t): Ditto.
43973 (vfloat32mf2_t): Ditto.
43974 (vfloat32m1_t): Ditto.
43975 (vfloat32m2_t): Ditto.
43976 (vfloat32m4_t): Ditto.
43977 (vfloat32m8_t): Ditto.
43978 (vfloat64m1_t): Ditto.
43979 (vfloat64m2_t): Ditto.
43980 (vfloat64m4_t): Ditto.
43981 (vfloat64m8_t): Ditto.
43982 * config/riscv/riscv-vector-switch.def (ENTRY): Ditto.
43983 * config/riscv/riscv.cc (riscv_legitimize_poly_move): Ditto.
43984 (riscv_convert_vector_bits): Ditto.
43985 * config/riscv/riscv.md:
43986 * config/riscv/vector-iterators.md:
43987 * config/riscv/vector.md
43988 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
43989 (@pred_indexed_<order>store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
43990 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
43991 (@pred_indexed_<order>store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
43992 (@pred_indexed_<order>store<VNX128_Q:mode><VNX128_Q:mode>): Ditto.
43993 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Ditto.
43994 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve64>): Ditto.
43995 (@pred_reduc_plus<order><mode><vlmul1_zve64>): Ditto.
43996 (@pred_widen_reduc_plus<order><mode><vwlmul1_zve64>): Ditto.
43998 2023-04-19 Pan Li <pan2.li@intel.com>
44000 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
44001 Align IOR (A | (~A) -> -1) optimization MODE_CLASS condition to AND.
44003 2023-04-19 Uros Bizjak <ubizjak@gmail.com>
44007 * config/i386/i386.md (*cmpqi_ext<mode>_1_mem_rex64): New insn pattern.
44008 (*cmpqi_ext<mode>_1): Use nonimmediate_operand predicate
44009 for operand 0. Use any_extract code iterator.
44010 (*cmpqi_ext<mode>_1 peephole2): New peephole2 pattern.
44011 (*cmpqi_ext<mode>_2): Use any_extract code iterator.
44012 (*cmpqi_ext<mode>_3_mem_rex64): New insn pattern.
44013 (*cmpqi_ext<mode>_1): Use general_operand predicate
44014 for operand 1. Use any_extract code iterator.
44015 (*cmpqi_ext<mode>_3 peephole2): New peephole2 pattern.
44016 (*cmpqi_ext<mode>_4): Use any_extract code iterator.
44018 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
44020 * config/aarch64/aarch64-simd.md (aarch64_saddw2<mode>): Delete.
44021 (aarch64_uaddw2<mode>): Delete.
44022 (aarch64_ssubw2<mode>): Delete.
44023 (aarch64_usubw2<mode>): Delete.
44024 (aarch64_<ANY_EXTEND:su><ADDSUB:optab>w2<mode>): New define_expand.
44026 2023-04-19 Richard Biener <rguenther@suse.de>
44028 * tree-ssa-structalias.cc (do_ds_constraint): Use
44029 solve_add_graph_edge.
44031 2023-04-19 Richard Biener <rguenther@suse.de>
44033 * tree-ssa-structalias.cc (solve_add_graph_edge): New function,
44035 (do_sd_constraint): ... here.
44037 2023-04-19 Richard Biener <rguenther@suse.de>
44039 * tree-cfg.cc (gimple_can_merge_blocks_p): Remove condition
44040 rejecting the merge when A contains only a non-local label.
44042 2023-04-19 Uros Bizjak <ubizjak@gmail.com>
44044 * rtl.h (VIRTUAL_REGISTER_P): New predicate.
44045 (VIRTUAL_REGISTER_NUM_P): Ditto.
44046 (REGNO_PTR_FRAME_P): Use VIRTUAL_REGISTER_NUM_P predicate.
44047 * expr.cc (force_operand): Use VIRTUAL_REGISTER_P predicate.
44048 * function.cc (instantiate_decl_rtl): Ditto.
44049 * rtlanal.cc (rtx_addr_can_trap_p_1): Ditto.
44050 (nonzero_address_p): Ditto.
44051 (refers_to_regno_p): Use VIRTUAL_REGISTER_NUM_P predicate.
44053 2023-04-19 Aldy Hernandez <aldyh@redhat.com>
44055 * value-range.h (Value_Range::Value_Range): Avoid pointer sharing.
44057 2023-04-19 Richard Biener <rguenther@suse.de>
44059 * system.h (auto_mpz::operator->()): New.
44060 * realmpfr.h (auto_mpfr::operator->()): New.
44061 * builtins.cc (do_mpfr_lgamma_r): Use auto_mpfr.
44062 * real.cc (real_from_string): Likewise.
44063 (dconst_e_ptr): Likewise.
44064 (dconst_sqrt2_ptr): Likewise.
44065 * tree-ssa-loop-niter.cc (refine_value_range_using_guard):
44067 (bound_difference_of_offsetted_base): Likewise.
44068 (number_of_iterations_ne): Likewise.
44069 (number_of_iterations_lt_to_ne): Likewise.
44070 * ubsan.cc: Include realmpfr.h.
44071 (ubsan_instrument_float_cast): Use auto_mpfr.
44073 2023-04-19 Richard Biener <rguenther@suse.de>
44075 * tree-ssa-structalias.cc (solve_graph): Remove self-copy
44076 edges, remove edges from escaped after special-casing them.
44078 2023-04-19 Richard Biener <rguenther@suse.de>
44080 * tree-ssa-structalias.cc (do_sd_constraint): Fixup escape
44083 2023-04-19 Richard Biener <rguenther@suse.de>
44085 * tree-ssa-structalias.cc (do_sd_constraint): Do not write
44086 to the LHS varinfo solution member.
44088 2023-04-19 Richard Biener <rguenther@suse.de>
44090 * tree-ssa-structalias.cc (topo_visit): Look at the real
44091 destination of edges.
44093 2023-04-19 Richard Biener <rguenther@suse.de>
44095 PR tree-optimization/44794
44096 * tree-ssa-loop-manip.cc (tree_transform_and_unroll_loop):
44097 If an epilogue loop is required set its iteration upper bound.
44099 2023-04-19 Xi Ruoyao <xry111@xry111.site>
44102 * config/loongarch/loongarch-protos.h
44103 (loongarch_expand_block_move): Add a parameter as alignment RTX.
44104 * config/loongarch/loongarch.h:
44105 (LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER): Remove.
44106 (LARCH_MAX_MOVE_BYTES_STRAIGHT): Remove.
44107 (LARCH_MAX_MOVE_OPS_PER_LOOP_ITER): Define.
44108 (LARCH_MAX_MOVE_OPS_STRAIGHT): Define.
44109 (MOVE_RATIO): Use LARCH_MAX_MOVE_OPS_PER_LOOP_ITER instead of
44110 LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER.
44111 * config/loongarch/loongarch.cc (loongarch_expand_block_move):
44112 Take the alignment from the parameter, but set it to
44113 UNITS_PER_WORD if !TARGET_STRICT_ALIGN. Limit the length of
44114 straight-line implementation with LARCH_MAX_MOVE_OPS_STRAIGHT
44115 instead of LARCH_MAX_MOVE_BYTES_STRAIGHT.
44116 (loongarch_block_move_straight): When there are left-over bytes,
44117 half the mode size instead of falling back to byte mode at once.
44118 (loongarch_block_move_loop): Limit the length of loop body with
44119 LARCH_MAX_MOVE_OPS_PER_LOOP_ITER instead of
44120 LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER.
44121 * config/loongarch/loongarch.md (cpymemsi): Pass the alignment
44122 to loongarch_expand_block_move.
44124 2023-04-19 Xi Ruoyao <xry111@xry111.site>
44126 * config/loongarch/loongarch.cc
44127 (loongarch_setup_incoming_varargs): Don't save more GARs than
44128 cfun->va_list_gpr_size / UNITS_PER_WORD.
44130 2023-04-19 Richard Biener <rguenther@suse.de>
44132 * tree-ssa-loop-manip.cc (determine_exit_conditions): Fix
44133 no epilogue condition.
44135 2023-04-19 Richard Biener <rguenther@suse.de>
44137 * gimple.h (gimple_assign_load): Outline...
44138 * gimple.cc (gimple_assign_load): ... here. Avoid
44139 get_base_address and instead just strip the outermost
44140 handled component, treating a remaining handled component
44143 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
44145 * config/aarch64/aarch64-simd-builtins.def (neg): Delete builtins
44147 * config/aarch64/arm_fp16.h (vnegh_f16): Reimplement using normal negation.
44149 2023-04-19 Jakub Jelinek <jakub@redhat.com>
44151 PR tree-optimization/109011
44152 * tree-vect-patterns.cc (vect_recog_popcount_pattern): Rename to ...
44153 (vect_recog_popcount_clz_ctz_ffs_pattern): ... this. Handle also
44154 CLZ, CTZ and FFS. Remove vargs variable, use
44155 gimple_build_call_internal rather than gimple_build_call_internal_vec.
44156 (vect_vect_recog_func_ptrs): Adjust popcount entry.
44158 2023-04-19 Jakub Jelinek <jakub@redhat.com>
44161 * dse.cc (replace_read): If read_reg is a SUBREG of a word mode
44162 REG, for WORD_REGISTER_OPERATIONS copy SUBREG_REG of it into
44163 a new REG rather than the SUBREG.
44165 2023-04-19 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
44167 * config/aarch64/aarch64-simd.md (aarch64_simd_vec_set_zero<mode>):
44170 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
44173 * config/aarch64/aarch64.cc (aarch64_rtx_costs): Merge ASHIFT and
44174 ROTATE, ROTATERT, LSHIFTRT, ASHIFTRT cases. Handle subregs in op1.
44176 2023-04-19 Richard Biener <rguenther@suse.de>
44178 PR rtl-optimization/109237
44179 * cse.cc (insn_live_p): Remove NEXT_INSN walk, instead check
44180 TREE_VISITED on INSN_VAR_LOCATION_DECL.
44181 (delete_trivially_dead_insns): Maintain TREE_VISITED on
44182 active debug bind INSN_VAR_LOCATION_DECL.
44184 2023-04-19 Richard Biener <rguenther@suse.de>
44186 PR rtl-optimization/109237
44187 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
44189 2023-04-19 Christophe Lyon <christophe.lyon@arm.com>
44191 * doc/install.texi (enable-decimal-float): Add AArch64.
44193 2023-04-19 liuhongt <hongtao.liu@intel.com>
44195 PR rtl-optimization/109351
44196 * ira.cc (setup_class_subset_and_memory_move_costs): Check
44197 hard_regno_mode_ok before setting lowest memory move cost for
44198 the mode with different reg classes.
44200 2023-04-18 Jason Merrill <jason@redhat.com>
44202 * doc/invoke.texi: Remove stray @gol.
44204 2023-04-18 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
44206 * ifcvt.cc (cond_move_process_if_block): Consider the result of
44207 targetm.noce_conversion_profitable_p() when replacing the original
44208 sequence with the converted one.
44210 2023-04-18 Mark Harmstone <mark@harmstone.com>
44212 * common.opt (gcodeview): Add new option.
44213 * gcc.cc (driver_handle_option); Handle OPT_gcodeview.
44214 * opts.cc (command_handle_option): Similarly.
44215 * doc/invoke.texi: Add documentation for -gcodeview.
44217 2023-04-18 Andrew Pinski <apinski@marvell.com>
44219 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove declaration.
44220 (make_pass_phiopt): Make execute out of line.
44221 (tree_ssa_cs_elim): Move code into ...
44222 (pass_cselim::execute): here.
44224 2023-04-18 Sam James <sam@gentoo.org>
44226 * system.h: Drop unused INCLUDE_PTHREAD_H.
44228 2023-04-18 Kevin Lee <kevinl@rivosinc.com>
44230 * tree-vect-data-refs.cc (vect_grouped_store_supported): Add new
44233 2023-04-18 Sinan Lin <sinan.lin@linux.alibaba.com>
44235 * config/riscv/bitmanip.md (rotr<mode>3 expander): Enable for ZBKB.
44236 (bswapdi2, bswapsi2): Similarly.
44238 2023-04-18 Uros Bizjak <ubizjak@gmail.com>
44241 * config/i386/i386-builtin.def (__builtin_ia32_insertps128):
44242 Use CODE_FOR_sse4_1_insertps_v4sf.
44243 * config/i386/i386-expand.cc (expand_vec_perm_insertps): New.
44244 (expand_vec_perm_1): Call expand_vec_per_insertps.
44245 * config/i386/i386.md ("unspec"): Declare UNSPEC_INSERTPS here.
44246 * config/i386/mmx.md (mmxscalarmode): New mode attribute.
44247 (@sse4_1_insertps_<mode>): New insn pattern.
44248 * config/i386/sse.md (@sse4_1_insertps_<mode>): Macroize insn
44249 pattern from sse4_1_insertps using VI4F_128 mode iterator.
44251 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
44253 * value-range.cc (gt_ggc_mx): New.
44255 * value-range.h (class vrange): Add GTY marker.
44256 (class frange): Same.
44257 (gt_ggc_mx): Remove.
44258 (gt_pch_nx): Remove.
44260 2023-04-18 Victor L. Do Nascimento <victor.donascimento@arm.com>
44262 * lra-constraints.cc (constraint_unique): New.
44263 (process_address_1): Apply constraint_unique test.
44264 * recog.cc (constrain_operands): Allow relaxed memory
44267 2023-04-18 Kito Cheng <kito.cheng@sifive.com>
44269 * doc/extend.texi (Target Builtins): Add RISC-V Vector
44271 (RISC-V Vector Intrinsics): Document GCC implemented which
44272 version of RISC-V vector intrinsics and its reference.
44274 2023-04-18 Richard Biener <rguenther@suse.de>
44276 PR middle-end/108786
44277 * bitmap.h (bitmap_clear_first_set_bit): New.
44278 * bitmap.cc (bitmap_first_set_bit_worker): Rename from
44279 bitmap_first_set_bit and add optional clearing of the bit.
44280 (bitmap_first_set_bit): Wrap bitmap_first_set_bit_worker.
44281 (bitmap_clear_first_set_bit): Likewise.
44282 * df-core.cc (df_worklist_dataflow_doublequeue): Use
44283 bitmap_clear_first_set_bit.
44284 * graphite-scop-detection.cc (scop_detection::merge_sese):
44286 * sanopt.cc (sanitize_asan_mark_unpoison): Likewise.
44287 (sanitize_asan_mark_poison): Likewise.
44288 * tree-cfgcleanup.cc (cleanup_tree_cfg_noloop): Likewise.
44289 * tree-into-ssa.cc (rewrite_blocks): Likewise.
44290 * tree-ssa-dce.cc (simple_dce_from_worklist): Likewise.
44291 * tree-ssa-sccvn.cc (do_rpo_vn_1): Likewise.
44293 2023-04-18 Richard Biener <rguenther@suse.de>
44295 * tree-ssa-structalias.cc (dump_sa_stats): Split out from...
44296 (dump_sa_points_to_info): ... this function.
44297 (compute_points_to_sets): Guard large dumps with TDF_DETAILS,
44298 and call dump_sa_stats guarded with TDF_STATS.
44299 (ipa_pta_execute): Likewise.
44300 (compute_may_aliases): Guard dump_alias_info with
44301 TDF_DETAILS|TDF_ALIAS.
44303 2023-04-18 Andrew Pinski <apinski@marvell.com>
44305 * tree-ssa-phiopt.cc (gimple_simplify_phiopt): Dump
44306 the expression that is being tried when TDF_FOLDING
44308 (phiopt_worker::match_simplify_replacement): Dump
44309 the sequence which was created by gimple_simplify_phiopt
44310 when TDF_FOLDING is true.
44312 2023-04-18 Andrew Pinski <apinski@marvell.com>
44314 * tree-ssa-phiopt.cc (match_simplify_replacement):
44315 Simplify code that does the movement slightly.
44317 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
44319 * config/aarch64/aarch64.md (@aarch64_rev16<mode>): Change to
44321 (rev16<mode>2): Rename to...
44322 (aarch64_rev16<mode>2_alt1): ... This.
44323 (rev16<mode>2_alt): Rename to...
44324 (*aarch64_rev16<mode>2_alt2): ... This.
44326 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
44328 * emit-rtl.cc (init_emit_once): Initialize dconstm0.
44329 * gimple-range-op.cc (class cfn_signbit): Remove dconstm0
44331 * range-op-float.cc (zero_range): Use dconstm0.
44332 (zero_to_inf_range): Same.
44333 * real.h (dconstm0): New.
44334 * value-range.cc (frange::flush_denormals_to_zero): Use dconstm0.
44335 (frange::set_zero): Do not declare dconstm0.
44337 2023-04-18 Richard Biener <rguenther@suse.de>
44339 * system.h (class auto_mpz): New,
44340 * realmpfr.h (class auto_mpfr): Likewise.
44341 * fold-const-call.cc (do_mpfr_arg1): Use auto_mpfr.
44342 (do_mpfr_arg2): Likewise.
44343 * tree-ssa-loop-niter.cc (bound_difference): Use auto_mpz;
44345 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
44347 * config/aarch64/aarch64-builtins.cc (aarch64_init_simd_intrinsics): Take
44348 builtin flags from intrinsic data rather than hardcoded FLAG_AUTO_FP.
44350 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
44352 * value-range.cc (frange::operator==): Adjust for NAN.
44353 (range_tests_nan): Remove some NAN tests.
44355 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
44357 * inchash.cc (hash::add_real_value): New.
44358 * inchash.h (class hash): Add add_real_value.
44359 * value-range.cc (add_vrange): New.
44360 * value-range.h (inchash::add_vrange): New.
44362 2023-04-18 Richard Biener <rguenther@suse.de>
44364 PR tree-optimization/109539
44365 * gimple-ssa-warn-access.cc (pass_waccess::check_pointer_uses):
44366 Re-implement pointer relatedness for PHIs.
44368 2023-04-18 Andrew Stubbs <ams@codesourcery.com>
44370 * config/gcn/gcn-valu.md (SV_SFDF): New iterator.
44371 (SV_FP): New iterator.
44372 (scalar_mode, SCALAR_MODE): Add identity mappings for scalar modes.
44373 (recip<mode>2): Unify the two patterns using SV_FP.
44374 (div_scale<mode><exec_vcc>): New insn.
44375 (div_fmas<mode><exec>): New insn.
44376 (div_fixup<mode><exec>): New insn.
44377 (div<mode>3): Unify the two expanders and rewrite using hardfp.
44378 * config/gcn/gcn.cc (gcn_md_reorg): Support "vccwait" attribute.
44379 * config/gcn/gcn.md (unspec): Add UNSPEC_DIV_SCALE, UNSPEC_DIV_FMAS,
44380 and UNSPEC_DIV_FIXUP.
44381 (vccwait): New attribute.
44383 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
44385 * config/aarch64/aarch64.cc (aarch64_validate_mcpu): Add hint to use -march
44386 if the argument matches that.
44388 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
44390 * config/aarch64/atomics.md
44391 (*aarch64_atomic_load<ALLX:mode>_rcpc_zext):
44392 Use SD_HSDI for destination mode iterator.
44394 2023-04-18 Jin Ma <jinma@linux.alibaba.com>
44396 * common/config/riscv/riscv-common.cc (multi_letter_subset_rank): Swap the order
44397 of z-extensions and s-extensions.
44398 (riscv_subset_list::parse): Likewise.
44400 2023-04-18 Jakub Jelinek <jakub@redhat.com>
44402 PR tree-optimization/109240
44403 * match.pd (fneg/fadd): Rewrite such that it handles both plus as
44404 first vec_perm operand and minus as second using fneg/fadd and
44405 minus as first vec_perm operand and plus as second using fneg/fsub.
44407 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
44409 * data-streamer.cc (bp_pack_real_value): New.
44410 (bp_unpack_real_value): New.
44411 * data-streamer.h (bp_pack_real_value): New.
44412 (bp_unpack_real_value): New.
44413 * tree-streamer-in.cc (unpack_ts_real_cst_value_fields): Use
44414 bp_unpack_real_value.
44415 * tree-streamer-out.cc (pack_ts_real_cst_value_fields): Use
44416 bp_pack_real_value.
44418 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
44420 * wide-int.h (WIDE_INT_MAX_HWIS): New.
44421 (class fixed_wide_int_storage): Use it.
44422 (trailing_wide_ints <N>::set_precision): Use it.
44423 (trailing_wide_ints <N>::extra_size): Use it.
44425 2023-04-18 Xi Ruoyao <xry111@xry111.site>
44427 * config/loongarch/loongarch-protos.h
44428 (loongarch_addu16i_imm12_operand_p): New function prototype.
44429 (loongarch_split_plus_constant): Likewise.
44430 * config/loongarch/loongarch.cc
44431 (loongarch_addu16i_imm12_operand_p): New function.
44432 (loongarch_split_plus_constant): Likewise.
44433 * config/loongarch/loongarch.h (ADDU16I_OPERAND): New macro.
44434 (DUAL_IMM12_OPERAND): Likewise.
44435 (DUAL_ADDU16I_OPERAND): Likewise.
44436 * config/loongarch/constraints.md (La, Lb, Lc, Ld, Le): New
44438 * config/loongarch/predicates.md (const_dual_imm12_operand): New
44440 (const_addu16i_operand): Likewise.
44441 (const_addu16i_imm12_di_operand): Likewise.
44442 (const_addu16i_imm12_si_operand): Likewise.
44443 (plus_di_operand): Likewise.
44444 (plus_si_operand): Likewise.
44445 (plus_si_extend_operand): Likewise.
44446 * config/loongarch/loongarch.md (add<mode>3): Convert to
44447 define_insn_and_split. Use plus_<mode>_operand predicate
44448 instead of arith_operand. Add alternatives for La, Lb, Lc, Ld,
44449 and Le constraints.
44450 (*addsi3_extended): Convert to define_insn_and_split. Use
44451 plus_si_extend_operand instead of arith_operand. Add
44452 alternatives for La and Le alternatives.
44454 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
44456 * value-range.h (Value_Range::Value_Range): New.
44457 (Value_Range::contains_p): New.
44459 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
44461 * value-range.h (class vrange): Make m_discriminator const.
44462 (class irange): Make m_max_ranges const. Adjust constructors
44464 (class unsupported_range): Construct vrange appropriately.
44465 (class frange): Same.
44467 2023-04-18 Lulu Cheng <chenglulu@loongson.cn>
44469 * config/loongarch/loongarch.h (LOGICAL_OP_NON_SHORT_CIRCUIT): Remove the macro
44472 2023-04-18 Lulu Cheng <chenglulu@loongson.cn>
44474 * doc/extend.texi: Add section for LoongArch Base Built-in functions.
44476 2023-04-18 Fei Gao <gaofei@eswincomputing.com>
44478 * config/riscv/riscv.cc (riscv_first_stack_step): Make codes more
44480 (riscv_expand_epilogue): Likewise.
44482 2023-04-17 Fei Gao <gaofei@eswincomputing.com>
44484 * config/riscv/riscv.cc (riscv_expand_prologue): Consider save-restore in
44486 (riscv_expand_epilogue): Consider save-restore in stack deallocation.
44488 2023-04-17 Andrew Pinski <apinski@marvell.com>
44490 * tree-ssa-phiopt.cc (gate_hoist_loads): Remove
44493 2023-04-17 Aldy Hernandez <aldyh@redhat.com>
44495 * gimple-ssa-warn-alloca.cc (pass_walloca::execute): Do not export
44498 2023-04-17 Fei Gao <gaofei@eswincomputing.com>
44500 * config/riscv/riscv.cc (riscv_first_stack_step): Add a new function
44501 parameter remaining_size.
44502 (riscv_compute_frame_info): Adapt new riscv_first_stack_step interface.
44503 (riscv_expand_prologue): Likewise.
44504 (riscv_expand_epilogue): Likewise.
44506 2023-04-17 Feng Wang <wangfeng@eswincomputing.com>
44508 * config/riscv/bitmanip.md (rotrsi3_sext): Support generating
44509 roriw for constant counts.
44510 * rtl.h (reverse_rotate_by_imm_p): Add function declartion
44511 * simplify-rtx.cc (reverse_rotate_by_imm_p): New function.
44512 (simplify_context::simplify_binary_operation_1): Use it.
44513 * expmed.cc (expand_shift_1): Likewise.
44515 2023-04-17 Martin Jambor <mjambor@suse.cz>
44519 * cgraph.h (symtab_node::find_reference): Add parameter use_type.
44520 * ipa-prop.h (ipa_pass_through_data): New flag refdesc_decremented.
44521 (ipa_zap_jf_refdesc): New function.
44522 (ipa_get_jf_pass_through_refdesc_decremented): Likewise.
44523 (ipa_set_jf_pass_through_refdesc_decremented): Likewise.
44524 * ipa-cp.cc (ipcp_discover_new_direct_edges): Provide a value for
44525 the new parameter of find_reference.
44526 (adjust_references_in_caller): Likewise. Make sure the constant jump
44527 function is not used to decrement a refdec counter again. Only
44528 decrement refdesc counters when the pass_through jump function allows
44529 it. Added a detailed dump when decrementing refdesc counters.
44530 * ipa-prop.cc (ipa_print_node_jump_functions_for_edge): Dump new flag.
44531 (ipa_set_jf_simple_pass_through): Initialize the new flag.
44532 (ipa_set_jf_unary_pass_through): Likewise.
44533 (ipa_set_jf_arith_pass_through): Likewise.
44534 (remove_described_reference): Provide a value for the new parameter of
44536 (update_jump_functions_after_inlining): Zap refdesc of new jfunc if
44537 the previous pass_through had a flag mandating that we do so.
44538 (propagate_controlled_uses): Likewise. Only decrement refdesc
44539 counters when the pass_through jump function allows it.
44540 (ipa_edge_args_sum_t::duplicate): Provide a value for the new
44541 parameter of find_reference.
44542 (ipa_write_jump_function): Assert the new flag does not have to be
44544 * symtab.cc (symtab_node::find_reference): Add parameter use_type, use
44547 2023-04-17 Philipp Tomsich <philipp.tomsich@vrull.eu>
44548 Di Zhao <di.zhao@amperecomputing.com>
44550 * config/aarch64/aarch64-tuning-flags.def (AARCH64_EXTRA_TUNING_OPTION):
44551 Add AARCH64_EXTRA_TUNE_NO_LDP_COMBINE.
44552 * config/aarch64/aarch64.cc (aarch64_operands_ok_for_ldpstp):
44553 Check for the above tuning option when processing loads.
44555 2023-04-17 Richard Biener <rguenther@suse.de>
44557 PR tree-optimization/109524
44558 * tree-vrp.cc (remove_unreachable::m_list): Change to a
44559 vector of pairs of block indices.
44560 (remove_unreachable::maybe_register_block): Adjust.
44561 (remove_unreachable::remove_and_update_globals): Likewise.
44562 Deal with removed blocks.
44564 2023-04-16 Jeff Law <jlaw@ventanamicro>
44567 * config/riscv/riscv.cc (riscv_expand_conditional_move): For
44568 TARGET_SFB_ALU, force the true arm into a register.
44570 2023-04-15 John David Anglin <danglin@gcc.gnu.org>
44573 * config/pa/pa-protos.h (pa_function_arg_size): Update prototype.
44574 * config/pa/pa.cc (pa_function_arg): Return NULL_RTX if argument
44576 (pa_arg_partial_bytes): Don't call pa_function_arg_size twice.
44577 (pa_function_arg_size): Change return type to int. Return zero
44578 for arguments larger than 1 GB. Update comments.
44580 2023-04-15 Jakub Jelinek <jakub@redhat.com>
44582 PR tree-optimization/109154
44583 * tree-if-conv.cc (predicate_scalar_phi): For complex PHIs, emit just
44584 args_len - 1 COND_EXPRs rather than args_len. Formatting fix.
44586 2023-04-15 Jason Merrill <jason@redhat.com>
44589 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores):
44590 Overhaul lhs_ref.ref analysis.
44592 2023-04-14 Richard Biener <rguenther@suse.de>
44594 PR tree-optimization/109502
44595 * tree-vect-stmts.cc (vectorizable_assignment): Fix
44596 check for conversion between mask and non-mask types.
44598 2023-04-14 Jeff Law <jlaw@ventanamicro.com>
44599 Jakub Jelinek <jakub@redhat.com>
44603 * combine.cc (simplify_and_const_int_1): Compute nonzero_bits in
44604 word_mode rather than mode if WORD_REGISTER_OPERATIONS and mode is
44605 smaller than word_mode.
44606 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1)
44607 <case AND>: Likewise.
44609 2023-04-14 Jakub Jelinek <jakub@redhat.com>
44611 * loop-iv.cc (iv_number_of_iterations): Use gen_int_mode instead
44614 2023-04-13 Andrew MacLeod <amacleod@redhat.com>
44616 PR tree-optimization/108139
44617 PR tree-optimization/109462
44618 * gimple-range-cache.cc (ranger_cache::fill_block_cache): Remove
44619 equivalency check for PHI nodes.
44620 * gimple-range-fold.cc (fold_using_range::range_of_phi): Ensure def
44621 does not dominate single-arg equivalency edges.
44623 2023-04-13 Richard Sandiford <richard.sandiford@arm.com>
44626 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Do
44627 not trust TYPE_ALIGN for pointer types; use POINTER_SIZE instead.
44629 2023-04-13 Richard Biener <rguenther@suse.de>
44631 PR tree-optimization/109491
44632 * tree-ssa-sccvn.cc (expressions_equal_p): Restore the
44633 NULL operands test.
44635 2023-04-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44638 * config/riscv/riscv-vector-builtins-types.def (vint8mf8_t): Fix predicate.
44639 (vint16mf4_t): Ditto.
44640 (vint32mf2_t): Ditto.
44641 (vint64m1_t): Ditto.
44642 (vint64m2_t): Ditto.
44643 (vint64m4_t): Ditto.
44644 (vint64m8_t): Ditto.
44645 (vuint8mf8_t): Ditto.
44646 (vuint16mf4_t): Ditto.
44647 (vuint32mf2_t): Ditto.
44648 (vuint64m1_t): Ditto.
44649 (vuint64m2_t): Ditto.
44650 (vuint64m4_t): Ditto.
44651 (vuint64m8_t): Ditto.
44652 (vfloat32mf2_t): Ditto.
44653 (vbool64_t): Ditto.
44654 * config/riscv/riscv-vector-builtins.cc (register_builtin_type): Add comments.
44655 (register_vector_type): Ditto.
44656 (check_required_extensions): Fix condition.
44657 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_ZVE64): Remove it.
44658 (RVV_REQUIRE_ELEN_64): New define.
44659 (RVV_REQUIRE_MIN_VLEN_64): Ditto.
44660 * config/riscv/riscv-vector-switch.def (TARGET_VECTOR_FP32): Remove it.
44661 (TARGET_VECTOR_FP64): Ditto.
44662 (ENTRY): Fix predicate.
44663 * config/riscv/vector-iterators.md: Fix predicate.
44665 2023-04-12 Jakub Jelinek <jakub@redhat.com>
44667 PR tree-optimization/109410
44668 * tree-ssa-reassoc.cc (build_and_add_sum): Split edge from entry
44669 block if first statement of the function is a call to returns_twice
44672 2023-04-12 Jakub Jelinek <jakub@redhat.com>
44675 * config/i386/i386.cc: Include rtl-error.h.
44676 (ix86_print_operand): For z modifier warning, use warning_for_asm
44677 if this_is_asm_operands. For Z modifier errors, use %c and code
44678 instead of hardcoded Z.
44680 2023-04-12 Costas Argyris <costas.argyris@gmail.com>
44682 * config/i386/x-mingw32-utf8: Remove extrataneous $@
44684 2023-04-12 Andrew MacLeod <amacleod@redhat.com>
44686 PR tree-optimization/109462
44687 * gimple-range-cache.cc (ranger_cache::fill_block_cache): Don't
44688 check for equivalences if NAME is a phi node.
44690 2023-04-12 Richard Biener <rguenther@suse.de>
44692 PR tree-optimization/109473
44693 * tree-vect-loop.cc (vect_create_epilog_for_reduction):
44694 Convert scalar result to the computation type before performing
44695 the reduction adjustment.
44697 2023-04-12 Richard Biener <rguenther@suse.de>
44699 PR tree-optimization/109469
44700 * tree-vect-slp.cc (vect_slp_function): Skip region starts with
44701 a returns-twice call.
44703 2023-04-12 Richard Biener <rguenther@suse.de>
44705 PR tree-optimization/109434
44706 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Properly
44707 handle possibly throwing calls when processing the LHS
44708 and may-defs are not OK.
44710 2023-04-11 Lin Sinan <mynameisxiaou@gmail.com>
44712 * config/riscv/predicates.md (uimm_extra_bit_or_twobits): Adjust
44713 predicate to avoid splitting arith constants.
44715 2023-04-11 Yanzhang Wang <yanzhang.wang@intel.com>
44716 Pan Li <pan2.li@intel.com>
44717 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44718 Kito Cheng <kito.cheng@sifive.com>
44721 * config/riscv/riscv-protos.h (emit_hard_vlmax_vsetvl): New.
44722 * config/riscv/riscv-v.cc (emit_hard_vlmax_vsetvl): New.
44723 (emit_vlmax_vsetvl): Use emit_hard_vlmax_vsetvl.
44724 * config/riscv/riscv.cc (vector_zero_call_used_regs): New.
44725 (riscv_zero_call_used_regs): New.
44726 (TARGET_ZERO_CALL_USED_REGS): New.
44728 2023-04-11 Martin Liska <mliska@suse.cz>
44731 * opts.cc (finish_options): Drop also
44732 x_flag_var_tracking_assignments.
44734 2023-04-11 Andre Vieira <andre.simoesdiasvieira@arm.com>
44736 PR tree-optimization/108888
44737 * tree-if-conv.cc (predicate_statements): Fix gimple call check.
44739 2023-04-11 Haochen Gui <guihaoc@gcc.gnu.org>
44742 * config/rs6000/vsx.md (vsx_sign_extend_qi_<mode>): Rename to...
44743 (vsx_sign_extend_v16qi_<mode>): ... this.
44744 (vsx_sign_extend_hi_<mode>): Rename to...
44745 (vsx_sign_extend_v8hi_<mode>): ... this.
44746 (vsx_sign_extend_si_v2di): Rename to...
44747 (vsx_sign_extend_v4si_v2di): ... this.
44748 (vsignextend_qi_<mode>): Remove.
44749 (vsignextend_hi_<mode>): Remove.
44750 (vsignextend_si_v2di): Remove.
44751 (vsignextend_v2di_v1ti): Remove.
44752 (*xxspltib_<mode>_split): Replace gen_vsx_sign_extend_qi_v2di with
44753 gen_vsx_sign_extend_v16qi_v2di and gen_vsx_sign_extend_qi_v4si
44754 with gen_vsx_sign_extend_v16qi_v4si.
44755 * config/rs6000/rs6000.md (split for DI constant generation):
44756 Replace gen_vsx_sign_extend_qi_si with gen_vsx_sign_extend_v16qi_si.
44757 (split for HSDI constant generation): Replace gen_vsx_sign_extend_qi_di
44758 with gen_vsx_sign_extend_v16qi_di and gen_vsx_sign_extend_qi_si
44759 with gen_vsx_sign_extend_v16qi_si.
44760 * config/rs6000/rs6000-builtins.def (__builtin_altivec_vsignextsb2d):
44761 Set bif-pattern to vsx_sign_extend_v16qi_v2di.
44762 (__builtin_altivec_vsignextsb2w): Set bif-pattern to
44763 vsx_sign_extend_v16qi_v4si.
44764 (__builtin_altivec_visgnextsh2d): Set bif-pattern to
44765 vsx_sign_extend_v8hi_v2di.
44766 (__builtin_altivec_vsignextsh2w): Set bif-pattern to
44767 vsx_sign_extend_v8hi_v4si.
44768 (__builtin_altivec_vsignextsw2d): Set bif-pattern to
44769 vsx_sign_extend_si_v2di.
44770 (__builtin_altivec_vsignext): Set bif-pattern to
44771 vsx_sign_extend_v2di_v1ti.
44772 * config/rs6000/rs6000-builtin.cc (lxvrse_expand_builtin): Replace
44773 gen_vsx_sign_extend_qi_v2di with gen_vsx_sign_extend_v16qi_v2di,
44774 gen_vsx_sign_extend_hi_v2di with gen_vsx_sign_extend_v8hi_v2di and
44775 gen_vsx_sign_extend_si_v2di with gen_vsx_sign_extend_v4si_v2di.
44777 2023-04-10 Michael Meissner <meissner@linux.ibm.com>
44780 * config/rs6000/vsx.md (vsx_fmav4sf4): Do not generate vmaddfp.
44781 (vsx_nfmsv4sf4): Do not generate vnmsubfp.
44783 2023-04-10 Haochen Jiang <haochen.jiang@intel.com>
44785 * config/i386/i386.h (PTA_GRANITERAPIDS): Add PTA_AMX_COMPLEX.
44787 2023-04-10 Haochen Jiang <haochen.jiang@intel.com>
44789 * common/config/i386/cpuinfo.h (get_available_features):
44790 Detect AMX-COMPLEX.
44791 * common/config/i386/i386-common.cc
44792 (OPTION_MASK_ISA2_AMX_COMPLEX_SET,
44793 OPTION_MASK_ISA2_AMX_COMPLEX_UNSET): New.
44794 (ix86_handle_option): Handle -mamx-complex.
44795 * common/config/i386/i386-cpuinfo.h (enum processor_features):
44796 Add FEATURE_AMX_COMPLEX.
44797 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
44799 * config.gcc: Add amxcomplexintrin.h.
44800 * config/i386/cpuid.h (bit_AMX_COMPLEX): New.
44801 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
44803 * config/i386/i386-isa.def (AMX_COMPLEX): Add DEF_PTA(AMX_COMPLEX).
44804 * config/i386/i386-options.cc (ix86_valid_target_attribute_inner_p):
44805 Handle amx-complex.
44806 * config/i386/i386.opt: Add option -mamx-complex.
44807 * config/i386/immintrin.h: Include amxcomplexintrin.h.
44808 * doc/extend.texi: Document amx-complex.
44809 * doc/invoke.texi: Document -mamx-complex.
44810 * doc/sourcebuild.texi: Document target amx-complex.
44811 * config/i386/amxcomplexintrin.h: New file.
44813 2023-04-08 Jakub Jelinek <jakub@redhat.com>
44815 PR tree-optimization/109392
44816 * tree-vect-generic.cc (tree_vec_extract): Handle failure
44817 of maybe_push_res_to_seq better.
44819 2023-04-08 Jakub Jelinek <jakub@redhat.com>
44821 * Makefile.in (CORETYPES_H): Depend on align.h, poly-int.h and
44823 (SYSTEM_H): Depend on $(HASHTAB_H).
44824 * config/riscv/t-riscv (build/genrvv-type-indexer.o): Remove unused
44825 dependency on $(RTL_BASE_H), remove redundant dependency on
44828 2023-04-06 Richard Earnshaw <rearnsha@arm.com>
44831 * config/arm/arm.cc (arm_effective_regno): New function.
44832 (mve_vector_mem_operand): Use it.
44834 2023-04-06 Andrew MacLeod <amacleod@redhat.com>
44836 PR tree-optimization/109417
44837 * gimple-range-gori.cc (gori_compute::may_recompute_p): Check if
44838 dependency is in SSA_NAME_FREE_LIST.
44840 2023-04-06 Andrew Pinski <apinski@marvell.com>
44842 PR tree-optimization/109427
44843 * params.opt (-param=vect-induction-float=):
44844 Fix option attribute typo for IntegerRange.
44846 2023-04-05 Jeff Law <jlaw@ventanamicro>
44849 * combine.cc (combine_instructions): Force re-recognition when
44850 after restoring the body of an insn to its original form.
44852 2023-04-05 Martin Jambor <mjambor@suse.cz>
44855 * ipa-sra.cc (zap_useless_ipcp_results): New function.
44856 (process_isra_node_results): Call it.
44858 2023-04-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44860 * config/riscv/vector.md: Fix incorrect operand order.
44862 2023-04-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
44864 * config/riscv/riscv-vsetvl.cc
44865 (pass_vsetvl::compute_local_backward_infos): Update user vsetvl in local
44868 2023-04-05 Li Xu <xuli1@eswincomputing.com>
44870 * config/riscv/riscv-vector-builtins.def: Fix typo.
44871 * config/riscv/riscv.cc (riscv_dwarf_poly_indeterminate_value): Ditto.
44872 * config/riscv/vector-iterators.md: Ditto.
44874 2023-04-04 Hans-Peter Nilsson <hp@axis.com>
44876 * doc/md.texi (Including Patterns): Fix page break.
44878 2023-04-04 Jakub Jelinek <jakub@redhat.com>
44880 PR tree-optimization/109386
44881 * range-op-float.cc (foperator_lt::op1_range, foperator_lt::op2_range,
44882 foperator_le::op1_range, foperator_le::op2_range,
44883 foperator_gt::op1_range, foperator_gt::op2_range,
44884 foperator_ge::op1_range, foperator_ge::op2_range): Make r varying for
44885 BRS_FALSE case even if the other op is maybe_isnan, not just
44887 (foperator_unordered_lt::op1_range, foperator_unordered_lt::op2_range,
44888 foperator_unordered_le::op1_range, foperator_unordered_le::op2_range,
44889 foperator_unordered_gt::op1_range, foperator_unordered_gt::op2_range,
44890 foperator_unordered_ge::op1_range, foperator_unordered_ge::op2_range):
44891 Make r varying for BRS_TRUE case even if the other op is maybe_isnan,
44892 not just known_isnan.
44894 2023-04-04 Marek Polacek <polacek@redhat.com>
44896 PR sanitizer/109107
44897 * fold-const.cc (fold_binary_loc): Use TYPE_OVERFLOW_SANITIZED
44899 * match.pd: Use TYPE_OVERFLOW_SANITIZED.
44901 2023-04-04 Stam Markianos-Wright <stam.markianos-wright@arm.com>
44903 * config/arm/mve.md (mve_vcvtq_n_to_f_<supf><mode>): Swap operands.
44904 (mve_vcreateq_f<mode>): Swap operands.
44906 2023-04-04 Andrew Stubbs <ams@codesourcery.com>
44908 * config/gcn/gcn-valu.md (one_cmpl<mode>2<exec>): New.
44910 2023-04-04 Jakub Jelinek <jakub@redhat.com>
44913 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
44914 Reword diagnostics about zfinx conflict with f, formatting fixes.
44916 2023-04-04 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
44918 * config/sol2.h (LIB_SPEC): Don't link with -lpthread.
44920 2023-04-04 Richard Biener <rguenther@suse.de>
44922 PR tree-optimization/109304
44923 * tree-profile.cc (tree_profiling): Use symtab node
44924 availability to decide whether to skip adjusting calls.
44925 Do not adjust calls to internal functions.
44927 2023-04-04 Kewen Lin <linkw@linux.ibm.com>
44930 * config/rs6000/rs6000.cc (rs6000_expand_vector_set_var_p9): Fix gen
44931 function for permutation control vector by considering big endianness.
44933 2023-04-04 Kewen Lin <linkw@linux.ibm.com>
44936 * config/rs6000/altivec.md (*p9v_parity<mode>2): Rename to ...
44937 (rs6000_vprtyb<mode>2): ... this.
44938 * config/rs6000/rs6000-builtins.def (VPRTYBD): Replace parityv2di2 with
44939 rs6000_vprtybv2di2.
44940 (VPRTYBW): Replace parityv4si2 with rs6000_vprtybv4si2.
44941 (VPRTYBQ): Replace parityv1ti2 with rs6000_vprtybv1ti2.
44942 * config/rs6000/vector.md (parity<mode>2 with VEC_IP): Expand with
44943 popcountv16qi2 and the corresponding rs6000_vprtyb<mode>2.
44945 2023-04-04 Hans-Peter Nilsson <hp@axis.com>
44946 Sandra Loosemore <sandra@codesourcery.com>
44948 * doc/md.texi (Insn Splitting): Tweak wording for readability.
44950 2023-04-03 Martin Jambor <mjambor@suse.cz>
44953 * ipa-prop.cc (determine_known_aggregate_parts): Check that the
44954 offset + size will be representable in unsigned int.
44956 2023-04-03 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
44958 * configure.ac (ZSTD_LIB): Move before zstd.h check.
44959 Unset gcc_cv_header_zstd_h without libzstd.
44960 * configure: Regenerate.
44962 2023-04-03 Martin Liska <mliska@suse.cz>
44964 * doc/invoke.texi: Document new param.
44966 2023-04-03 Cupertino Miranda <cupertino.miranda@oracle.com>
44968 * doc/sourcebuild.texi (const_volatile_readonly_section): Document
44969 new check_effective_target function.
44971 2023-04-03 Li Xu <xuli1@eswincomputing.com>
44973 * config/riscv/riscv-vector-builtins.def (vuint32m8_t): Fix typo.
44974 (vfloat32m8_t): Likewise
44976 2023-04-03 liuhongt <hongtao.liu@intel.com>
44978 * doc/md.texi: Document signbitm2.
44980 2023-04-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
44981 kito-cheng <kito.cheng@sifive.com>
44983 * config/riscv/vector.md: Fix RA constraint.
44985 2023-04-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
44987 * config/riscv/riscv-protos.h (gen_avl_for_scalar_move): New function.
44988 * config/riscv/riscv-v.cc (gen_avl_for_scalar_move): New function.
44989 * config/riscv/vector.md: Fix scalar move bug.
44991 2023-04-01 Jakub Jelinek <jakub@redhat.com>
44993 * range-op-float.cc (foperator_equal::fold_range): If at least
44994 one of the op ranges is not singleton and neither is NaN and all
44995 4 bounds are zero, return [1, 1].
44996 (foperator_not_equal::fold_range): In the same case return [0, 0].
44998 2023-04-01 Jakub Jelinek <jakub@redhat.com>
45000 * range-op-float.cc (foperator_equal::fold_range): Perform the
45001 non-singleton handling regardless of maybe_isnan (op1, op2).
45002 (foperator_not_equal::fold_range): Likewise.
45003 (foperator_lt::fold_range, foperator_le::fold_range,
45004 foperator_gt::fold_range, foperator_ge::fold_range): Perform the
45005 real_* comparison check which results in range_false (type)
45006 even if maybe_isnan (op1, op2). Simplify.
45007 (foperator_ltgt): New class.
45008 (fop_ltgt): New variable.
45009 (floating_op_table::floating_op_table): Handle LTGT_EXPR using
45012 2023-04-01 Jakub Jelinek <jakub@redhat.com>
45015 * builtins.cc (apply_args_size): If targetm.calls.get_raw_arg_mode
45016 returns VOIDmode, handle it like if the register isn't used for
45017 passing arguments at all.
45018 (apply_result_size): If targetm.calls.get_raw_result_mode returns
45019 VOIDmode, handle it like if the register isn't used for returning
45021 * target.def (get_raw_result_mode, get_raw_arg_mode): Document what it
45022 means to return VOIDmode.
45023 * doc/tm.texi: Regenerated.
45024 * config/aarch64/aarch64.cc (aarch64_function_value_regno_p): Return
45025 TARGET_SVE for P0_REGNUM.
45026 (aarch64_function_arg_regno_p): Also return true for p0-p3.
45027 (aarch64_get_reg_raw_mode): Return VOIDmode for PR_REGNUM_P regs.
45029 2023-03-31 Vladimir N. Makarov <vmakarov@redhat.com>
45031 * lra-constraints.cc: (combine_reload_insn): New function.
45033 2023-03-31 Jakub Jelinek <jakub@redhat.com>
45035 PR tree-optimization/91645
45036 * range-op-float.cc (foperator_unordered_lt::fold_range,
45037 foperator_unordered_le::fold_range,
45038 foperator_unordered_gt::fold_range,
45039 foperator_unordered_ge::fold_range,
45040 foperator_unordered_equal::fold_range): Call the ordered
45041 fold_range on ranges with cleared NaNs.
45042 * value-query.cc (range_query::get_tree_range): Handle also
45043 COMPARISON_CLASS_P trees.
45045 2023-03-31 Kito Cheng <kito.cheng@sifive.com>
45046 Andrew Pinski <pinskia@gmail.com>
45049 * config/riscv/t-riscv: Add missing dependencies.
45051 2023-03-31 liuhongt <hongtao.liu@intel.com>
45053 * config/i386/i386.cc (inline_memory_move_cost): Return 100
45054 for MASK_REGS when MODE_SIZE > 8.
45056 2023-03-31 liuhongt <hongtao.liu@intel.com>
45059 * config/i386/i386-builtin.def (BDESC): Adjust icode name from
45060 ufloat/ufix to floatuns/fixuns.
45061 * config/i386/i386-expand.cc
45062 (ix86_expand_vector_convert_uns_vsivsf): Adjust comments.
45063 * config/i386/sse.md
45064 (ufloat<sseintvecmodelower><mode>2<mask_name><round_name>):
45066 (<mask_codefor>floatuns<sseintvecmodelower><mode>2<mask_name><round_name>):.. this.
45067 (<mask_codefor><avx512>_ufix_notrunc<sf2simodelower><mode><mask_name><round_name>):
45069 (<mask_codefor><avx512>_fixuns_notrunc<sf2simodelower><mode><mask_name><round_name>):
45071 (<fixsuffix>fix_truncv16sfv16si2<mask_name><round_saeonly_name>):
45073 (fix<fixunssuffix>_truncv16sfv16si2<mask_name><round_saeonly_name>):.. this.
45074 (ufloat<si2dfmodelower><mode>2<mask_name>): Renamed to ..
45075 (floatuns<si2dfmodelower><mode>2<mask_name>): .. this.
45076 (ufloatv2siv2df2<mask_name>): Renamed to ..
45077 (<mask_codefor>floatunsv2siv2df2<mask_name>): .. this.
45078 (ufix_notrunc<mode><si2dfmodelower>2<mask_name><round_name>):
45080 (fixuns_notrunc<mode><si2dfmodelower>2<mask_name><round_name>):
45082 (ufix_notruncv2dfv2si2): Renamed to ..
45083 (fixuns_notruncv2dfv2si2):.. this.
45084 (ufix_notruncv2dfv2si2_mask): Renamed to ..
45085 (fixuns_notruncv2dfv2si2_mask): .. this.
45086 (*ufix_notruncv2dfv2si2_mask_1): Renamed to ..
45087 (*fixuns_notruncv2dfv2si2_mask_1): .. this.
45088 (ufix_truncv2dfv2si2): Renamed to ..
45089 (*fixuns_truncv2dfv2si2): .. this.
45090 (ufix_truncv2dfv2si2_mask): Renamed to ..
45091 (fixuns_truncv2dfv2si2_mask): .. this.
45092 (*ufix_truncv2dfv2si2_mask_1): Renamed to ..
45093 (*fixuns_truncv2dfv2si2_mask_1): .. this.
45094 (ufix_truncv4dfv4si2<mask_name>): Renamed to ..
45095 (fixuns_truncv4dfv4si2<mask_name>): .. this.
45096 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
45098 (fixuns_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
45100 (ufix_trunc<mode><sseintvecmodelower>2<mask_name>): Renamed to ..
45101 (<mask_codefor>fixuns_trunc<mode><sseintvecmodelower>2<mask_name>):
45104 2023-03-30 Andrew MacLeod <amacleod@redhat.com>
45106 PR tree-optimization/109154
45107 * gimple-range-gori.cc (gori_compute::may_recompute_p): Add depth limit.
45108 * gimple-range-gori.h (may_recompute_p): Add depth param.
45109 * params.opt (ranger-recompute-depth): New param.
45111 2023-03-30 Jason Merrill <jason@redhat.com>
45115 * cgraph.h: Move reset() from cgraph_node to symtab_node.
45116 * cgraphunit.cc (symtab_node::reset): Adjust. Also call
45117 remove_from_same_comdat_group.
45119 2023-03-30 Richard Biener <rguenther@suse.de>
45121 PR tree-optimization/107561
45122 * gimple-ssa-warn-access.cc (get_size_range): Add flags
45123 argument and pass it on.
45124 (check_access): When querying for the size range pass
45125 SR_ALLOW_ZERO when the known destination size is zero.
45127 2023-03-30 Richard Biener <rguenther@suse.de>
45129 PR tree-optimization/109342
45130 * tree-ssa-sccvn.cc (vn_nary_op_get_predicated_value): New
45131 overload for edge. When that edge is a backedge use
45132 dominated_by_p directly.
45134 2023-03-30 liuhongt <hongtao.liu@intel.com>
45136 * config/i386/i386-expand.cc (expand_vec_perm_blend): Generate
45137 vpblendd instead of vpblendw for V4SI under avx2.
45139 2023-03-29 Hans-Peter Nilsson <hp@axis.com>
45141 * config/cris/cris.cc (cris_rtx_costs) [CONST_INT]: Return 0
45142 for many quick operands, for register-sized modes.
45144 2023-03-29 Jiawei <jiawei@iscas.ac.cn>
45146 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
45149 2023-03-29 Martin Liska <mliska@suse.cz>
45151 PR bootstrap/109310
45152 * configure.ac: Emit a warning for deprecated option
45153 --enable-link-mutex.
45154 * configure: Regenerate.
45156 2023-03-29 Richard Biener <rguenther@suse.de>
45158 PR tree-optimization/109331
45159 * tree-ssa-forwprop.cc (pass_forwprop::execute): When we
45160 discover a taken edge make sure to cleanup the CFG.
45162 2023-03-29 Richard Biener <rguenther@suse.de>
45164 PR tree-optimization/109327
45165 * tree-ssa-forwprop.cc (pass_forwprop::execute): Deal with
45166 already removed stmts when draining to_remove.
45168 2023-03-29 Richard Biener <rguenther@suse.de>
45171 * dwarf2out.cc (lookup_type_die): Reset TREE_ASM_WRITTEN
45172 so we can re-create the DIE for the type if required.
45174 2023-03-29 Jakub Jelinek <jakub@redhat.com>
45175 Richard Biener <rguenther@suse.de>
45177 PR tree-optimization/109301
45178 * tree-ssa-math-opts.cc (pass_data_cse_sincos): Change
45179 properties_provided from PROP_gimple_opt_math to 0.
45180 (pass_data_expand_powcabs): Change properties_provided from 0 to
45181 PROP_gimple_opt_math.
45183 2023-03-29 Richard Biener <rguenther@suse.de>
45185 PR tree-optimization/109154
45186 * tree-if-conv.cc (gen_phi_arg_condition): Handle single
45187 inverted condition specially by inverting at the caller.
45188 (gen_phi_arg_condition): Swap COND_EXPR arms if requested.
45190 2023-03-28 David Malcolm <dmalcolm@redhat.com>
45193 * diagnostic-show-locus.cc (column_range::column_range): Factor
45194 out assertion conditional into...
45195 (column_range::valid_p): ...this new function.
45196 (line_corrections::add_hint): Don't attempt to consolidate hints
45197 if it would lead to invalid column_range instances.
45199 2023-03-28 Kito Cheng <kito.cheng@sifive.com>
45202 * config/riscv/riscv-c.cc (riscv_ext_version_value): New.
45203 (riscv_cpu_cpp_builtins): Define __riscv_v_intrinsic and
45206 2023-03-28 Alexander Monakov <amonakov@ispras.ru>
45208 PR rtl-optimization/109187
45209 * haifa-sched.cc (autopref_rank_for_schedule): Avoid use of overflowing
45210 subtraction in three-way comparison.
45212 2023-03-28 Andrew MacLeod <amacleod@redhat.com>
45214 PR tree-optimization/109265
45215 PR tree-optimization/109274
45216 * gimple-range-gori.cc (gori_compute::compute_operand_range): Do
45217 not create a relation record is op1 and op2 are the same symbol.
45218 (gori_compute::compute_operand1_range): Pass op1 == op2 to the
45219 handler for this stmt, but create a new record only if this statement
45220 generates a relation based on the ranges.
45221 (gori_compute::compute_operand2_range): Ditto.
45222 * value-relation.h (value_relation::set_relation): Always create the
45223 record that is requested.
45225 2023-03-28 Richard Biener <rguenther@suse.de>
45227 PR tree-optimization/107087
45228 * tree-ssa-forwprop.cc (pass_forwprop::execute): Track
45229 executable regions to avoid useless work and to better
45230 propagate degenerate PHIs.
45232 2023-03-28 Costas Argyris <costas.argyris@gmail.com>
45234 * config/i386/x-mingw32-utf8: update comments.
45236 2023-03-28 Richard Sandiford <richard.sandiford@arm.com>
45239 * config/aarch64/aarch64-protos.h (aarch64_vector_load_decl): Declare.
45240 * config/aarch64/aarch64.h (machine_function::vector_load_decls): New
45242 * config/aarch64/aarch64-builtins.cc (aarch64_record_vector_load_arg):
45244 (aarch64_general_gimple_fold_builtin): Delay folding of vld1 until
45245 after inlining. Record which decls are loaded from. Fix handling
45246 of vops for loads and stores.
45247 * config/aarch64/aarch64.cc (aarch64_vector_load_decl): New function.
45248 (aarch64_accesses_vector_load_decl_p): Likewise.
45249 (aarch64_vector_costs::m_stores_to_vector_load_decl): New member
45251 (aarch64_vector_costs::add_stmt_cost): If the function has a vld1
45252 that loads from a decl, treat vector stores to those decls as
45254 (aarch64_vector_costs::finish_cost): ...and in that case,
45255 if the vector code does nothing more than a store, give the
45256 prologue a zero cost as well.
45258 2023-03-28 Richard Biener <rguenther@suse.de>
45261 PR tree-optimization/108129
45262 * genmatch.cc (lower_for): For (match ...) delay
45263 substituting into the match operator if possible.
45264 (dt_operand::gen_gimple_expr): For user_id look at the
45265 first substitute for determining how to access operands.
45266 (dt_operand::gen_generic_expr): Likewise.
45267 (dt_node::gen_kids): Properly sort user_ids according
45268 to their substitutes.
45269 (dt_node::gen_kids_1): Code-generate user_id matching.
45271 2023-03-28 Jakub Jelinek <jakub@redhat.com>
45272 Jonathan Wakely <jwakely@redhat.com>
45274 * gcov-tool.cc (do_merge, do_merge_stream, do_rewrite, do_overlap):
45275 Use subcommand rather than sub-command in function comments.
45277 2023-03-28 Jakub Jelinek <jakub@redhat.com>
45279 PR tree-optimization/109154
45280 * value-range.h (frange::flush_denormals_to_zero): Make it public
45281 rather than private.
45282 * value-range.cc (frange::set): Don't call flush_denormals_to_zero
45284 * range-op-float.cc (range_operator_float::fold_range): Call
45285 flush_denormals_to_zero.
45287 2023-03-28 Jakub Jelinek <jakub@redhat.com>
45289 PR middle-end/106190
45290 * sanopt.cc (pass_sanopt::execute): Return TODO_cleanup_cfg if any
45291 of the IFN_{UB,HWA,A}SAN_* internal fns are lowered.
45293 2023-03-28 Jakub Jelinek <jakub@redhat.com>
45295 * range-op-float.cc (float_widen_lhs_range): Use pass get_nan_state
45296 as 4th argument to set to avoid clear_nan and union_ calls.
45298 2023-03-28 Jakub Jelinek <jakub@redhat.com>
45301 * config/i386/i386.cc (assign_386_stack_local): For DImode
45302 with SLOT_FLOATxFDI_387 and -m32 -mpreferred-stack-boundary=2 pass
45303 align 32 rather than 0 to assign_stack_local.
45305 2023-03-28 Eric Botcazou <ebotcazou@adacore.com>
45308 * config/sparc/sparc.cc (sparc_expand_vcond): Call signed_condition
45309 on operand #3 to get the final condition code. Use std::swap.
45310 * config/sparc/sparc.md (vcondv8qiv8qi): New VIS 4 expander.
45311 (fucmp<gcond:code>8<P:mode>_vis): Move around.
45312 (fpcmpu<gcond:code><GCM:gcm_name><P:mode>_vis): Likewise.
45313 (vcondu<GCM:mode><GCM:mode>): New VIS 4 expander.
45315 2023-03-28 Eric Botcazou <ebotcazou@adacore.com>
45317 * doc/gm2.texi: Add missing Next, Previous and Top fields to most
45318 top-level sections.
45320 2023-03-28 Costas Argyris <costas.argyris@gmail.com>
45322 * config.host: Pull in i386/x-mingw32-utf8 Makefile
45323 fragment and reference utf8rc-mingw32.o explicitly
45325 * config/i386/sym-mingw32.cc: prevent name mangling of
45327 * config/i386/x-mingw32-utf8: Make utf8rc-mingw32.o
45328 depend on manifest file explicitly.
45330 2023-03-28 Richard Biener <rguenther@suse.de>
45333 2023-03-27 Richard Biener <rguenther@suse.de>
45335 PR rtl-optimization/109237
45336 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
45338 2023-03-28 Richard Biener <rguenther@suse.de>
45340 * common.opt (gdwarf): Remove Negative(gdwarf-).
45342 2023-03-28 Richard Biener <rguenther@suse.de>
45344 * common.opt (gdwarf): Add RejectNegative.
45345 (gdwarf-): Likewise.
45349 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
45351 * config/cris/constraints.md ("T"): Correct to
45352 define_memory_constraint.
45354 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
45356 * config/cris/cris.md (BW2): New mode-iterator.
45357 (lra_szext_decomposed, lra_szext_decomposed_indirect_with_offset): New
45360 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
45362 * config/cris/cris.md ("*add<mode>3_addi"): Improve to bail only
45363 for possible eliminable compares.
45365 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
45367 * config/cris/constraints.md ("R"): Remove unused constraint.
45369 2023-03-27 Jonathan Wakely <jwakely@redhat.com>
45371 PR gcov-profile/109297
45372 * gcov-tool.cc (merge_usage): Fix "subcomand" typo.
45373 (merge_stream_usage): Likewise.
45374 (overlap_usage): Likewise.
45376 2023-03-27 Christoph Müllner <christoph.muellner@vrull.eu>
45379 * config/riscv/thead.md: Add missing mode specifiers.
45381 2023-03-27 Philipp Tomsich <philipp.tomsich@vrull.eu>
45382 Jiangning Liu <jiangning.liu@amperecomputing.com>
45383 Manolis Tsamis <manolis.tsamis@vrull.eu>
45385 * config/aarch64/aarch64.cc: Update vector costs for ampere1.
45387 2023-03-27 Richard Biener <rguenther@suse.de>
45389 PR rtl-optimization/109237
45390 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
45392 2023-03-27 Richard Biener <rguenther@suse.de>
45395 * lto-wrapper.cc (run_gcc): Parse alternate debug options
45396 as well, they always enable debug.
45398 2023-03-27 Kewen Lin <linkw@linux.ibm.com>
45401 * config/rs6000/emmintrin.h (_mm_bslli_si128): Move the implementation
45403 (_mm_slli_si128): ... here. Change to call _mm_bslli_si128 directly.
45405 2023-03-27 Kewen Lin <linkw@linux.ibm.com>
45408 * config/rs6000/emmintrin.h (_mm_bslli_si128): Check __N is not less
45409 than zero when calling vec_sld.
45410 (_mm_bsrli_si128): Return __A if __N is zero, check __N is bigger than
45411 zero when calling vec_sld.
45412 (_mm_slli_si128): Return __A if _imm5 is zero, check _imm5 is bigger
45413 than zero when calling vec_sld.
45415 2023-03-27 Sandra Loosemore <sandra@codesourcery.com>
45417 * doc/generic.texi (OpenMP): Document OMP_SIMD, OMP_DISTRIBUTE,
45418 OMP_TASKLOOP, and OMP_LOOP with OMP_FOR. Document how collapsed
45419 loops are represented and which fields are vectors. Add
45420 documentation for OMP_FOR_PRE_BODY field. Document internal
45421 form of non-rectangular loops and OMP_FOR_NON_RECTANGULAR.
45422 * tree.def (OMP_FOR): Make documentation consistent with the
45423 Texinfo manual, to fill some gaps and correct errors.
45425 2023-03-26 Andreas Schwab <schwab@linux-m68k.org>
45428 * config/m68k/m68k.h (FINAL_PRESCAN_INSN): Define.
45429 * config/m68k/m68k.cc (m68k_final_prescan_insn): Define.
45430 (handle_move_double): Call it before handle_movsi.
45431 * config/m68k/m68k-protos.h: Declare it.
45433 2023-03-26 Jakub Jelinek <jakub@redhat.com>
45435 PR tree-optimization/109230
45436 * match.pd (fneg/fadd simplify): Verify also odd permutation indexes.
45438 2023-03-26 Jakub Jelinek <jakub@redhat.com>
45441 * predict.cc (compute_function_frequency): Don't call
45442 warn_function_cold if function already has cold attribute.
45444 2023-03-26 Gerald Pfeifer <gerald@pfeifer.com>
45446 * doc/install.texi: Remove anachronistic note
45447 related to languages built and separate source tarballs.
45449 2023-03-25 David Malcolm <dmalcolm@redhat.com>
45452 * diagnostic-format-sarif.cc (read_until_eof): Delete.
45453 (maybe_read_file): Delete.
45454 (sarif_builder::maybe_make_artifact_content_object): Use
45455 get_source_file_content rather than maybe_read_file.
45456 Reject it if it's not valid UTF-8.
45457 * input.cc (file_cache_slot::get_full_file_content): New.
45458 (get_source_file_content): New.
45459 (selftest::check_cpp_valid_utf8_p): New.
45460 (selftest::test_cpp_valid_utf8_p): New.
45461 (selftest::input_cc_tests): Call selftest::test_cpp_valid_utf8_p.
45462 * input.h (get_source_file_content): New prototype.
45464 2023-03-24 David Malcolm <dmalcolm@redhat.com>
45466 * doc/analyzer.texi (Debugging the Analyzer): Add notes on useful
45468 (Special Functions for Debugging the Analyzer): Convert to a
45469 table, and rewrite in places.
45470 (Other Debugging Techniques): Add notes on how to compare two
45471 different exploded graphs.
45473 2023-03-24 David Malcolm <dmalcolm@redhat.com>
45476 * json.cc: Update comments to indicate that we now preserve
45477 insertion order of keys within objects.
45478 (object::print): Traverse keys in insertion order.
45479 (object::set): Preserve insertion order of keys.
45480 (selftest::test_writing_objects): Add an additional key to verify
45481 that we preserve insertion order.
45482 * json.h (object::m_keys): New field.
45484 2023-03-24 Andrew MacLeod <amacleod@redhat.com>
45486 PR tree-optimization/109238
45487 * gimple-range-cache.cc (ranger_cache::resolve_dom): Ignore
45488 predecessors which this block dominates.
45490 2023-03-24 Richard Biener <rguenther@suse.de>
45492 PR tree-optimization/106912
45493 * tree-profile.cc (tree_profiling): Update stmts only when
45494 profiling or testing coverage. Make sure to update calls
45495 fntype, stripping 'const' there.
45497 2023-03-24 Jakub Jelinek <jakub@redhat.com>
45499 PR middle-end/109258
45500 * builtins.cc (inline_expand_builtin_bytecmp): Return NULL_RTX early
45501 if target == const0_rtx.
45503 2023-03-24 Alexandre Oliva <oliva@adacore.com>
45505 * doc/sourcebuild.texi (weak_undefined, posix_memalign):
45506 Document options and effective targets.
45508 2023-03-24 Costas Argyris <costas.argyris@gmail.com>
45510 * config/i386/x-mingw32-utf8: Make HOST_EXTRA_OBJS_SYMBOL
45513 2023-03-23 Pat Haugen <pthaugen@linux.ibm.com>
45515 * config/rs6000/rs6000.md (*mod<mode>3, umod<mode>3): Add
45516 non-earlyclobber alternative.
45518 2023-03-23 Andrew Pinski <apinski@marvell.com>
45521 * fold-const.cc (maybe_lvalue_p): Treat COMPOUND_LITERAL_EXPR
45524 2023-03-23 Richard Biener <rguenther@suse.de>
45526 PR tree-optimization/107569
45527 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_stmt):
45528 Do not push SSA names with zero uses as available leader.
45529 (process_bb): Likewise.
45531 2023-03-23 Richard Biener <rguenther@suse.de>
45533 PR tree-optimization/109262
45534 * tree-ssa-forwprop.cc (pass_forwprop::execute): When
45535 combining a piecewise complex load avoid touching loads
45536 that throw internally. Use fun, not cfun throughout.
45538 2023-03-23 Jakub Jelinek <jakub@redhat.com>
45540 * value-range.cc (irange::irange_union, irange::intersect): Fix
45541 comment spelling bugs.
45542 * gimple-range-trace.cc (range_tracer::do_header): Likewise.
45543 * gimple-range-trace.h: Likewise.
45544 * gimple-range-edge.cc: Likewise.
45545 (gimple_outgoing_range_stmt_p,
45546 gimple_outgoing_range::switch_edge_range,
45547 gimple_outgoing_range::edge_range_p): Likewise.
45548 * gimple-range.cc (gimple_ranger::prefill_stmt_dependencies,
45549 gimple_ranger::fold_stmt, gimple_ranger::register_transitive_infer,
45550 assume_query::assume_query, assume_query::calculate_phi): Likewise.
45551 * gimple-range-edge.h: Likewise.
45552 * value-range.h (Value_Range::set, Value_Range::lower_bound,
45553 Value_Range::upper_bound, frange::set_undefined): Likewise.
45554 * gimple-range-gori.h (range_def_chain::depend, gori_map::m_outgoing,
45555 gori_compute): Likewise.
45556 * gimple-range-fold.h (fold_using_range): Likewise.
45557 * gimple-range-path.cc (path_range_query::compute_ranges_in_phis):
45559 * gimple-range-gori.cc (range_def_chain::in_chain_p,
45560 range_def_chain::dump, gori_map::calculate_gori,
45561 gori_compute::compute_operand_range_switch,
45562 gori_compute::logical_combine, gori_compute::refine_using_relation,
45563 gori_compute::compute_operand1_range, gori_compute::may_recompute_p):
45565 * gimple-range.h: Likewise.
45566 (enable_ranger): Likewise.
45567 * range-op.h (empty_range_varying): Likewise.
45568 * value-query.h (value_query): Likewise.
45569 * gimple-range-cache.cc (block_range_cache::set_bb_range,
45570 block_range_cache::dump, ssa_global_cache::clear_global_range,
45571 temporal_cache::temporal_value, temporal_cache::current_p,
45572 ranger_cache::range_of_def, ranger_cache::propagate_updated_value,
45573 ranger_cache::range_from_dom, ranger_cache::register_inferred_value):
45575 * gimple-range-fold.cc (fur_edge::get_phi_operand,
45576 fur_stmt::get_operand, gimple_range_adjustment,
45577 fold_using_range::range_of_phi,
45578 fold_using_range::relation_fold_and_or): Likewise.
45579 * value-range-storage.h (irange_storage_slot::MAX_INTS): Likewise.
45580 * value-query.cc (range_query::value_of_expr,
45581 range_query::value_on_edge, range_query::query_relation): Likewise.
45582 * tree-vrp.cc (remove_unreachable::remove_and_update_globals,
45583 intersect_range_with_nonzero_bits): Likewise.
45584 * gimple-range-infer.cc (gimple_infer_range::check_assume_func,
45585 exit_range): Likewise.
45586 * value-relation.h: Likewise.
45587 (equiv_oracle, relation_trio::relation_trio, value_relation,
45588 value_relation::value_relation, pe_min): Likewise.
45589 * range-op-float.cc (range_operator_float::rv_fold,
45590 frange_arithmetic, foperator_unordered_equal::op1_range,
45591 foperator_div::rv_fold): Likewise.
45592 * gimple-range-op.cc (cfn_clz::fold_range): Likewise.
45593 * value-relation.cc (equiv_oracle::query_relation,
45594 equiv_oracle::register_equiv, equiv_oracle::add_equiv_to_block,
45595 value_relation::apply_transitive, relation_chain_head::find_relation,
45596 dom_oracle::query_relation, dom_oracle::find_relation_block,
45597 dom_oracle::find_relation_dom, path_oracle::register_equiv): Likewise.
45598 * range-op.cc (range_operator::wi_fold_in_parts_equiv,
45599 create_possibly_reversed_range, adjust_op1_for_overflow,
45600 operator_mult::wi_fold, operator_exact_divide::op1_range,
45601 operator_cast::lhs_op1_relation, operator_cast::fold_pair,
45602 operator_cast::fold_range, operator_abs::wi_fold, range_op_cast_tests,
45603 range_op_lshift_tests): Likewise.
45605 2023-03-23 Andrew Stubbs <ams@codesourcery.com>
45607 * config/gcn/gcn.cc (gcn_class_max_nregs): Handle vectors in SGPRs.
45608 (move_callee_saved_registers): Detect the bug condition early.
45610 2023-03-23 Andrew Stubbs <ams@codesourcery.com>
45612 * config/gcn/gcn-protos.h (gcn_stepped_zero_int_parallel_p): New.
45613 * config/gcn/gcn-valu.md (V_1REG_ALT): New.
45615 (vec_extract<V_1REG:mode><V_1REG_ALT:mode>_nop): New.
45616 (vec_extract<V_2REG:mode><V_2REG_ALT:mode>_nop): New.
45617 (vec_extract<V_ALL:mode><V_ALL_ALT:mode>): Use new patterns.
45618 * config/gcn/gcn.cc (gcn_stepped_zero_int_parallel_p): New.
45619 * config/gcn/predicates.md (ascending_zero_int_parallel): New.
45621 2023-03-23 Jakub Jelinek <jakub@redhat.com>
45623 PR tree-optimization/109176
45624 * tree-vect-generic.cc (expand_vector_condition): If a has
45625 vector boolean type and is a comparison, also check if both
45626 the comparison and VEC_COND_EXPR could be successfully expanded
45629 2023-03-23 Pan Li <pan2.li@intel.com>
45630 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45634 * config/riscv/riscv-modes.def (ADJUST_BYTESIZE): Adjust size
45635 for vector mask modes.
45636 * config/riscv/riscv.cc (riscv_v_adjust_bytesize): New.
45637 * config/riscv/riscv.h (riscv_v_adjust_bytesize): New.
45639 2023-03-23 Songhe Zhu <zhusonghe@eswincomputing.com>
45641 * config/riscv/multilib-generator: Adjusting the loop of 'alt' in 'alts'.
45643 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45646 * config/riscv/riscv-protos.h (emit_vlmax_vsetvl): Define as global.
45647 (emit_vlmax_op): Ditto.
45648 * config/riscv/riscv-v.cc (get_sew): New function.
45649 (emit_vlmax_vsetvl): Adapt function.
45650 (emit_pred_op): Ditto.
45651 (emit_vlmax_op): Ditto.
45652 (emit_nonvlmax_op): Ditto.
45653 (legitimize_move): Fix LRA ICE.
45654 (gen_no_side_effects_vsetvl_rtx): Adapt function.
45655 * config/riscv/vector.md (@mov<V_FRACT:mode><P:mode>_lra): New pattern.
45656 (@mov<VB:mode><P:mode>_lra): Ditto.
45657 (*mov<V_FRACT:mode><P:mode>_lra): Ditto.
45658 (*mov<VB:mode><P:mode>_lra): Ditto.
45660 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45663 * config/riscv/riscv-vector-builtins-bases.cc (class vlenb): Add
45664 __riscv_vlenb support.
45666 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
45667 * config/riscv/riscv-vector-builtins-functions.def (vlenb): Ditto.
45668 * config/riscv/riscv-vector-builtins-shapes.cc (struct vlenb_def): Ditto.
45670 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
45671 * config/riscv/riscv-vector-builtins.cc: Ditto.
45673 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45674 kito-cheng <kito.cheng@sifive.com>
45676 * config/riscv/riscv-vsetvl.cc (reg_available_p): Fix bugs.
45677 (pass_vsetvl::compute_local_backward_infos): Fix bugs.
45678 (pass_vsetvl::need_vsetvl): Fix bugs.
45679 (pass_vsetvl::backward_demand_fusion): Fix bugs.
45680 (pass_vsetvl::demand_fusion): Fix bugs.
45681 (eliminate_insn): Fix bugs.
45682 (insert_vsetvl): Ditto.
45683 (pass_vsetvl::emit_local_forward_vsetvls): Ditto.
45684 * config/riscv/riscv-vsetvl.h (enum vsetvl_type): Ditto.
45685 * config/riscv/vector.md: Ditto.
45687 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45688 kito-cheng <kito.cheng@sifive.com>
45690 * config/riscv/riscv-vector-builtins-bases.cc: Fix ternary bug.
45691 * config/riscv/vector-iterators.md (nmsac): Ditto.
45697 * config/riscv/vector.md (@pred_mul_<optab><mode>): Ditto.
45698 (@pred_mul_plus<mode>): Ditto.
45699 (*pred_madd<mode>): Ditto.
45700 (*pred_macc<mode>): Ditto.
45701 (*pred_mul_plus<mode>): Ditto.
45702 (@pred_mul_plus<mode>_scalar): Ditto.
45703 (*pred_madd<mode>_scalar): Ditto.
45704 (*pred_macc<mode>_scalar): Ditto.
45705 (*pred_mul_plus<mode>_scalar): Ditto.
45706 (*pred_madd<mode>_extended_scalar): Ditto.
45707 (*pred_macc<mode>_extended_scalar): Ditto.
45708 (*pred_mul_plus<mode>_extended_scalar): Ditto.
45709 (@pred_minus_mul<mode>): Ditto.
45710 (*pred_<madd_nmsub><mode>): Ditto.
45711 (*pred_nmsub<mode>): Ditto.
45712 (*pred_<macc_nmsac><mode>): Ditto.
45713 (*pred_nmsac<mode>): Ditto.
45714 (*pred_mul_<optab><mode>): Ditto.
45715 (*pred_minus_mul<mode>): Ditto.
45716 (@pred_mul_<optab><mode>_scalar): Ditto.
45717 (@pred_minus_mul<mode>_scalar): Ditto.
45718 (*pred_<madd_nmsub><mode>_scalar): Ditto.
45719 (*pred_nmsub<mode>_scalar): Ditto.
45720 (*pred_<macc_nmsac><mode>_scalar): Ditto.
45721 (*pred_nmsac<mode>_scalar): Ditto.
45722 (*pred_mul_<optab><mode>_scalar): Ditto.
45723 (*pred_minus_mul<mode>_scalar): Ditto.
45724 (*pred_<madd_nmsub><mode>_extended_scalar): Ditto.
45725 (*pred_nmsub<mode>_extended_scalar): Ditto.
45726 (*pred_<macc_nmsac><mode>_extended_scalar): Ditto.
45727 (*pred_nmsac<mode>_extended_scalar): Ditto.
45728 (*pred_mul_<optab><mode>_extended_scalar): Ditto.
45729 (*pred_minus_mul<mode>_extended_scalar): Ditto.
45730 (*pred_<madd_msub><mode>): Ditto.
45731 (*pred_<macc_msac><mode>): Ditto.
45732 (*pred_<madd_msub><mode>_scalar): Ditto.
45733 (*pred_<macc_msac><mode>_scalar): Ditto.
45734 (@pred_neg_mul_<optab><mode>): Ditto.
45735 (@pred_mul_neg_<optab><mode>): Ditto.
45736 (*pred_<nmadd_msub><mode>): Ditto.
45737 (*pred_<nmsub_nmadd><mode>): Ditto.
45738 (*pred_<nmacc_msac><mode>): Ditto.
45739 (*pred_<nmsac_nmacc><mode>): Ditto.
45740 (*pred_neg_mul_<optab><mode>): Ditto.
45741 (*pred_mul_neg_<optab><mode>): Ditto.
45742 (@pred_neg_mul_<optab><mode>_scalar): Ditto.
45743 (@pred_mul_neg_<optab><mode>_scalar): Ditto.
45744 (*pred_<nmadd_msub><mode>_scalar): Ditto.
45745 (*pred_<nmsub_nmadd><mode>_scalar): Ditto.
45746 (*pred_<nmacc_msac><mode>_scalar): Ditto.
45747 (*pred_<nmsac_nmacc><mode>_scalar): Ditto.
45748 (*pred_neg_mul_<optab><mode>_scalar): Ditto.
45749 (*pred_mul_neg_<optab><mode>_scalar): Ditto.
45750 (@pred_widen_neg_mul_<optab><mode>): Ditto.
45751 (@pred_widen_mul_neg_<optab><mode>): Ditto.
45752 (@pred_widen_neg_mul_<optab><mode>_scalar): Ditto.
45753 (@pred_widen_mul_neg_<optab><mode>_scalar): Ditto.
45755 2023-03-23 liuhongt <hongtao.liu@intel.com>
45757 * builtins.cc (builtin_memset_read_str): Replace
45758 targetm.gen_memset_scratch_rtx with gen_reg_rtx.
45759 (builtin_memset_gen_str): Ditto.
45760 * config/i386/i386-expand.cc
45761 (ix86_convert_const_wide_int_to_broadcast): Replace
45762 ix86_gen_scratch_sse_rtx with gen_reg_rtx.
45763 (ix86_expand_vector_move): Ditto.
45764 * config/i386/i386-protos.h (ix86_gen_scratch_sse_rtx):
45766 * config/i386/i386.cc (ix86_gen_scratch_sse_rtx): Removed.
45767 (TARGET_GEN_MEMSET_SCRATCH_RTX): Removed.
45768 * doc/tm.texi: Remove TARGET_GEN_MEMSET_SCRATCH_RTX.
45769 * doc/tm.texi.in: Ditto.
45770 * target.def: Ditto.
45772 2023-03-22 Vladimir N. Makarov <vmakarov@redhat.com>
45774 * lra.cc (lra): Do not repeat inheritance and live range splitting
45775 when asm error is found.
45777 2023-03-22 Andrew Jenner <andrew@codesourcery.com>
45779 * config/gcn/gcn-protos.h (gcn_expand_dpp_swap_pairs_insn)
45780 (gcn_expand_dpp_distribute_even_insn)
45781 (gcn_expand_dpp_distribute_odd_insn): Declare.
45782 * config/gcn/gcn-valu.md (@dpp_swap_pairs<mode>)
45783 (@dpp_distribute_even<mode>, @dpp_distribute_odd<mode>)
45784 (cmul<conj_op><mode>3, cml<addsub_as><mode>4, vec_addsub<mode>3)
45785 (cadd<rot><mode>3, vec_fmaddsub<mode>4, vec_fmsubadd<mode>4)
45786 (fms<mode>4<exec>, fms<mode>4_negop2<exec>, fms<mode>4)
45787 (fms<mode>4_negop2): New patterns.
45788 * config/gcn/gcn.cc (gcn_expand_dpp_swap_pairs_insn)
45789 (gcn_expand_dpp_distribute_even_insn)
45790 (gcn_expand_dpp_distribute_odd_insn): New functions.
45791 * config/gcn/gcn.md: Add entries to unspec enum.
45793 2023-03-22 Aldy Hernandez <aldyh@redhat.com>
45795 PR tree-optimization/109008
45796 * value-range.cc (frange::set): Add nan_state argument.
45797 * value-range.h (class nan_state): New.
45798 (frange::get_nan_state): New.
45800 2023-03-22 Martin Liska <mliska@suse.cz>
45802 * configure: Regenerate.
45804 2023-03-21 Joseph Myers <joseph@codesourcery.com>
45806 * stor-layout.cc (finalize_type_size): Copy TYPE_TYPELESS_STORAGE
45809 2023-03-21 Andrew MacLeod <amacleod@redhat.com>
45811 PR tree-optimization/109192
45812 * gimple-range-gori.cc (gori_compute::compute_operand_range):
45813 Terminate gori calculations if a relation is not relevant.
45814 * value-relation.h (value_relation::set_relation): Allow
45815 equality between op1 and op2 if they are the same.
45817 2023-03-21 Richard Biener <rguenther@suse.de>
45819 PR tree-optimization/109219
45820 * tree-vect-loop.cc (vectorizable_reduction): Check
45821 slp_node, not STMT_SLP_TYPE.
45822 * tree-vect-stmts.cc (vectorizable_condition): Likewise.
45823 * tree-vect-slp.cc (vect_slp_analyze_node_operations_1):
45824 Remove assertion on STMT_SLP_TYPE.
45826 2023-03-21 Jakub Jelinek <jakub@redhat.com>
45828 PR tree-optimization/109215
45829 * tree.h (enum special_array_member): Adjust comments for int_0
45831 * tree.cc (component_ref_sam_type): Clear zero_elts if memtype
45832 has zero sized element type and the array has variable number of
45833 elements or constant one or more elements.
45834 (component_ref_size): Adjust comments, formatting fix.
45836 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
45838 * configure.ac: Add check for the Texinfo 6.8
45839 CONTENTS_OUTPUT_LOCATION customization variable and set it if
45841 * configure: Regenerate.
45842 * Makefile.in (MAKEINFO_TOC_INLINE_FLAG): New variable. Set by
45843 configure.ac to -c CONTENTS_OUTPUT_LOCATION=inline if
45844 CONTENTS_OUTPUT_LOCATION support is detected, empty otherwise.
45845 ($(build_htmldir)/%/index.html): Pass MAKEINFO_TOC_INLINE_FLAG.
45847 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
45849 * doc/extend.texi: Associate use_hazard_barrier_return index
45850 entry with its attribute.
45851 * doc/invoke.texi: Associate -fcanon-prefix-map index entry with
45854 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
45856 * doc/implement-c.texi: Remove usage of @gol.
45857 * doc/invoke.texi: Ditto.
45858 * doc/sourcebuild.texi: Ditto.
45859 * doc/include/gcc-common.texi: Remove @gol. In new Makeinfo and
45860 texinfo.tex versions, the bug it was working around appears to
45863 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
45865 * doc/include/texinfo.tex: Update to 2023-01-17.19.
45867 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
45869 * doc/include/gcc-common.texi: Add @defbuiltin{,x} and
45870 @enddefbuiltin for defining built-in functions.
45871 * doc/extend.texi: Apply @defbuiltin{,x} to many, but not all,
45872 places where it should be used.
45874 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
45876 * doc/extend.texi (Formatted Output Function Checking): New
45877 subsection for grouping together printf et al.
45878 (Exception handling) Fix missing @ sign before copyright
45879 header, which lead to the copyright line leaking into
45880 '(gcc)Exception handling'.
45881 * doc/gcc.texi: Set document language to en_US.
45882 (@copying): Wrap front cover texts in quotations, move in manual
45885 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
45887 * doc/gcc.texi: Add the Indices appendix, to make texinfo
45888 generate nice indices overview page.
45890 2023-03-21 Richard Biener <rguenther@suse.de>
45892 PR tree-optimization/109170
45893 * gimple-range-op.cc (cfn_pass_through_arg1): New.
45894 (gimple_range_op_handler::maybe_builtin_call): Handle
45895 __builtin_expect via cfn_pass_through_arg1.
45897 2023-03-20 Michael Meissner <meissner@linux.ibm.com>
45900 * config/rs6000/rs6000.cc (create_complex_muldiv): Delete.
45901 (init_float128_ieee): Delete code to switch complex multiply and divide
45903 (complex_multiply_builtin_code): New helper function.
45904 (complex_divide_builtin_code): Likewise.
45905 (rs6000_mangle_decl_assembler_name): Add support for mangling the name
45906 of complex 128-bit multiply and divide built-in functions.
45908 2023-03-20 Peter Bergner <bergner@linux.ibm.com>
45911 * config/rs6000/rs6000-builtin.cc (stv_expand_builtin): Use tmode.
45913 2023-03-19 Jonny Grant <jg@jguk.org>
45915 * doc/extend.texi (Common Function Attributes) <nonnull>:
45918 2023-03-18 Peter Bergner <bergner@linux.ibm.com>
45920 PR rtl-optimization/109179
45921 * lra-constraints.cc (combine_reload_insn): Enforce TO is not a debug
45922 insn or note. Move the tests earlier to guard lra_get_insn_recog_data.
45924 2023-03-17 Jakub Jelinek <jakub@redhat.com>
45927 * function.h (push_struct_function): Add ABSTRACT_P argument defaulted
45929 * function.cc (push_struct_function): Add ABSTRACT_P argument, pass it
45930 to allocate_struct_function instead of false.
45931 * tree-inline.cc (initialize_cfun): Don't copy DECL_ARGUMENTS
45932 nor DECL_RESULT here. Pass true as ABSTRACT_P to
45933 push_struct_function. Call targetm.target_option.relayout_function
45935 (tree_function_versioning): Formatting fix.
45937 2023-03-17 Vladimir N. Makarov <vmakarov@redhat.com>
45939 * lra-constraints.cc: Include hooks.h.
45940 (combine_reload_insn): New function.
45941 (lra_constraints): Call it.
45943 2023-03-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45944 kito-cheng <kito.cheng@sifive.com>
45946 * config/riscv/riscv-v.cc (legitimize_move): Allow undef value
45947 as legitimate value.
45948 * config/riscv/riscv-vector-builtins.cc
45949 (function_expander::use_ternop_insn): Fix bugs of ternary intrinsic.
45950 (function_expander::use_widen_ternop_insn): Ditto.
45951 * config/riscv/vector.md (@vundefined<mode>): New pattern.
45952 (pred_mul_<optab><mode>_undef_merge): Remove.
45953 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
45954 (*pred_mul_<optab><mode>_undef_merge_extended_scalar): Ditto.
45955 (pred_neg_mul_<optab><mode>_undef_merge): Ditto.
45956 (*pred_neg_mul_<optab><mode>_undef_merge_scalar): Ditto.
45958 2023-03-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45961 * config/riscv/riscv.md: Fix subreg bug.
45963 2023-03-17 Jakub Jelinek <jakub@redhat.com>
45965 PR middle-end/108685
45966 * omp-expand.cc (expand_omp_for_ordered_loops): Add L0_BB argument,
45967 use its loop_father rather than BODY_BB's loop_father.
45968 (expand_omp_for_generic): Adjust expand_omp_for_ordered_loops caller.
45969 If broken_loop with ordered > collapse and at least one of those
45970 extra loops aren't guaranteed to have at least one iteration, change
45971 l0_bb's loop_father to entry_bb's loop_father. Set cont_bb's
45972 loop_father to l0_bb's loop_father rather than l1_bb's.
45974 2023-03-17 Jakub Jelinek <jakub@redhat.com>
45977 * gdbhooks.py (TreePrinter.to_string): Wrap
45978 gdb.parse_and_eval('tree_code_type') in a try block, parse
45979 and eval 'tree_code_type_tmpl<0>::tree_code_type' instead if it
45980 raises exception. Update comments for the recent tree_code_type
45983 2023-03-17 Sandra Loosemore <sandra@codesourcery.com>
45985 * doc/extend.texi (BPF Built-in Functions): Fix numerous markup
45986 issues. Add more line breaks to example so it doesn't overflow
45989 2023-03-17 Sandra Loosemore <sandra@codesourcery.com>
45991 * doc/extend.texi (Common Function Attributes) <access>: Fix bad
45992 line breaks in examples.
45993 <malloc>: Fix bad line breaks in running text, also copy-edit
45995 (Extended Asm) <Generic Operand Modifiers>: Fix @multitable width.
45996 * doc/invoke.texi (Option Summary) <Developer Options>: Fix misplaced
45998 (C++ Dialect Options) <-fcontracts>: Add line break in example.
45999 <-Wctad-maybe-unsupported>: Likewise.
46000 <-Winvalid-constexpr>: Likewise.
46001 (Warning Options) <-Wdangling-pointer>: Likewise.
46002 <-Winterference-size>: Likewise.
46003 <-Wvla-parameter>: Likewise.
46004 (Static Analyzer Options): Fix bad line breaks in running text,
46005 plus add some missing markup.
46006 (Optimize Options) <openacc-privatization>: Fix more bad line
46007 breaks in running text.
46009 2023-03-16 Uros Bizjak <ubizjak@gmail.com>
46011 * config/i386/i386-expand.cc (expand_vec_perm_pblendv):
46012 Handle 8-byte modes only with TARGET_MMX_WITH_SSE.
46013 (expand_vec_perm_2perm_pblendv): Ditto.
46015 2023-03-16 Martin Liska <mliska@suse.cz>
46017 PR middle-end/106133
46018 * gcc.cc (driver_handle_option): Use x_main_input_basename
46019 if x_dump_base_name is null.
46020 * opts.cc (common_handle_option): Likewise.
46022 2023-03-16 Richard Biener <rguenther@suse.de>
46024 PR tree-optimization/109123
46025 * gimple-ssa-warn-access.cc (pass_waccess::warn_invalid_pointer):
46026 Do not emit -Wuse-after-free late.
46027 (pass_waccess::check_call): Always check call pointer uses.
46029 2023-03-16 Richard Biener <rguenther@suse.de>
46031 PR tree-optimization/109141
46032 * tree-dfa.h (renumber_gimple_stmt_uids_in_block): New.
46033 * tree-dfa.cc (renumber_gimple_stmt_uids_in_block): Split
46035 (renumber_gimple_stmt_uids): ... here and
46036 (renumber_gimple_stmt_uids_in_blocks): ... here.
46037 * gimple-ssa-warn-access.cc (pass_waccess::use_after_inval_p):
46038 Use renumber_gimple_stmt_uids_in_block to also assign UIDs
46040 (pass_waccess::check_pointer_uses): Process all PHIs.
46042 2023-03-15 David Malcolm <dmalcolm@redhat.com>
46045 * diagnostic-format-sarif.cc (class sarif_invocation): New.
46046 (class sarif_ice_notification): New.
46047 (sarif_builder::m_invocation_obj): New field.
46048 (sarif_invocation::add_notification_for_ice): New.
46049 (sarif_invocation::prepare_to_flush): New.
46050 (sarif_ice_notification::sarif_ice_notification): New.
46051 (sarif_builder::sarif_builder): Add m_invocation_obj.
46052 (sarif_builder::end_diagnostic): Special-case DK_ICE and
46054 (sarif_builder::flush_to_file): Call prepare_to_flush on
46055 m_invocation_obj. Pass the latter to make_top_level_object.
46056 (sarif_builder::make_result_object): Move creation of "locations"
46058 (sarif_builder::make_locations_arr): ...this new function.
46059 (sarif_builder::make_top_level_object): Add "invocation_obj" param
46060 and pass it to make_run_object.
46061 (sarif_builder::make_run_object): Add "invocation_obj" param and
46063 (sarif_ice_handler): New callback.
46064 (diagnostic_output_format_init_sarif): Wire up sarif_ice_handler.
46065 * diagnostic.cc (diagnostic_initialize): Initialize new field
46067 (diagnostic_action_after_output): If it is set, make one attempt
46068 to call ice_handler_cb.
46069 * diagnostic.h (diagnostic_context::ice_handler_cb): New field.
46071 2023-03-15 Uros Bizjak <ubizjak@gmail.com>
46073 * config/i386/i386-expand.cc (expand_vec_perm_blend):
46074 Handle 8-byte modes only with TARGET_MMX_WITH_SSE. Handle V2SFmode
46075 and fix V2HImode handling.
46076 (expand_vec_perm_1): Try to emit BLEND instruction
46077 before MOVSS/MOVSD.
46078 * config/i386/mmx.md (*mmx_blendps): New insn pattern.
46080 2023-03-15 Tobias Burnus <tobias@codesourcery.com>
46082 * omp-low.cc (omp_runtime_api_call): Add omp_in_explicit_task.
46084 2023-03-15 Richard Biener <rguenther@suse.de>
46086 * gimple-ssa-warn-access.cc (pass_waccess::check_pointer_uses):
46087 Do not diagnose clobbers.
46089 2023-03-15 Richard Biener <rguenther@suse.de>
46091 PR tree-optimization/109139
46092 * tree-ssa-live.cc (remove_unused_locals): Look at the
46093 base address for unused decls on the LHS of .DEFERRED_INIT.
46095 2023-03-15 Xi Ruoyao <xry111@xry111.site>
46098 * builtins.cc (inline_string_cmp): Force the character
46099 difference into "result" pseudo-register, instead of reassign
46100 the pseudo-register.
46102 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
46104 * config.gcc: Add thead.o to RISC-V extra_objs.
46105 * config/riscv/peephole.md: Add mempair peephole passes.
46106 * config/riscv/riscv-protos.h (riscv_split_64bit_move_p): New
46108 (th_mempair_operands_p): Likewise.
46109 (th_mempair_order_operands): Likewise.
46110 (th_mempair_prepare_save_restore_operands): Likewise.
46111 (th_mempair_save_restore_regs): Likewise.
46112 (th_mempair_output_move): Likewise.
46113 * config/riscv/riscv.cc (riscv_save_reg): Move code.
46114 (riscv_restore_reg): Move code.
46115 (riscv_for_each_saved_reg): Add code to emit mempair insns.
46116 * config/riscv/t-riscv: Add thead.cc.
46117 * config/riscv/thead.md (*th_mempair_load_<GPR:mode>2):
46119 (*th_mempair_store_<GPR:mode>2): Likewise.
46120 (*th_mempair_load_extendsidi2): Likewise.
46121 (*th_mempair_load_zero_extendsidi2): Likewise.
46122 * config/riscv/thead.cc: New file.
46124 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
46126 * config/riscv/constraints.md (TARGET_XTHEADFMV ? FP_REGS : NO_REGS)
46127 New constraint "th_f_fmv".
46128 (TARGET_XTHEADFMV ? GR_REGS : NO_REGS): New constraint
46130 * config/riscv/riscv.cc (riscv_split_doubleword_move):
46131 Add split code for XTheadFmv.
46132 (riscv_secondary_memory_needed): XTheadFmv does not need
46134 * config/riscv/riscv.md: Add new UNSPEC_XTHEADFMV and
46135 UNSPEC_XTHEADFMV_HW. Add support for XTheadFmv to
46136 movdf_hardfloat_rv32.
46137 * config/riscv/thead.md (th_fmv_hw_w_x): New INSN.
46138 (th_fmv_x_w): New INSN.
46139 (th_fmv_x_hw): New INSN.
46141 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
46143 * config/riscv/riscv.md (maddhisi4): New expand.
46144 (msubhisi4): New expand.
46145 * config/riscv/thead.md (*th_mula<mode>): New pattern.
46146 (*th_mulawsi): New pattern.
46147 (*th_mulawsi2): New pattern.
46148 (*th_maddhisi4): New pattern.
46149 (*th_sextw_maddhisi4): New pattern.
46150 (*th_muls<mode>): New pattern.
46151 (*th_mulswsi): New pattern.
46152 (*th_mulswsi2): New pattern.
46153 (*th_msubhisi4): New pattern.
46154 (*th_sextw_msubhisi4): New pattern.
46156 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
46158 * config/riscv/iterators.md (TARGET_64BIT): Add GPR2 iterator.
46159 * config/riscv/riscv-protos.h (riscv_expand_conditional_move):
46161 * config/riscv/riscv.cc (riscv_rtx_costs): Add costs for
46163 (riscv_expand_conditional_move): New function.
46164 (riscv_expand_conditional_move_onesided): New function.
46165 * config/riscv/riscv.md: Add support for XTheadCondMov.
46166 * config/riscv/thead.md (*th_cond_mov<GPR:mode><GPR2:mode>): Add
46167 support for XTheadCondMov.
46168 (*th_cond_gpr_mov<GPR:mode><GPR2:mode>): Likewise.
46170 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
46172 * config/riscv/bitmanip.md (clzdi2): New expand.
46173 (clzsi2): New expand.
46174 (ctz<mode>2): New expand.
46175 (popcount<mode>2): New expand.
46176 (<bitmanip_optab>si2): Rename INSN.
46177 (*<bitmanip_optab>si2): Hide INSN name.
46178 (<bitmanip_optab>di2): Rename INSN.
46179 (*<bitmanip_optab>di2): Hide INSN name.
46180 (rotrsi3): Remove INSN.
46181 (rotr<mode>3): Add expand.
46182 (*rotrsi3): New INSN.
46183 (rotrdi3): Rename INSN.
46184 (*rotrdi3): Hide INSN name.
46185 (rotrsi3_sext): Rename INSN.
46186 (*rotrsi3_sext): Hide INSN name.
46187 (bswap<mode>2): Remove INSN.
46188 (bswapdi2): Add expand.
46189 (bswapsi2): Add expand.
46190 (*bswap<mode>2): Hide INSN name.
46191 * config/riscv/riscv.cc (riscv_rtx_costs): Add costs for sign
46193 * config/riscv/riscv.md (extv<mode>): New expand.
46194 (extzv<mode>): New expand.
46195 * config/riscv/thead.md (*th_srri<mode>3): New INSN.
46196 (*th_ext<mode>): New INSN.
46197 (*th_extu<mode>): New INSN.
46198 (*th_clz<mode>2): New INSN.
46199 (*th_rev<mode>2): New INSN.
46201 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
46203 * config/riscv/riscv.cc (riscv_rtx_costs): Add xthead:tst cost.
46204 * config/riscv/thead.md (*th_tst<mode>3): New INSN.
46206 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
46208 * config/riscv/riscv.md: Include thead.md
46209 * config/riscv/thead.md: New file.
46211 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
46213 * config/riscv/riscv-cores.def (RISCV_CORE): Add "thead-c906".
46215 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
46217 * common/config/riscv/riscv-common.cc: Add xthead* extensions.
46218 * config/riscv/riscv-opts.h (MASK_XTHEADBA): New.
46219 (MASK_XTHEADBB): New.
46220 (MASK_XTHEADBS): New.
46221 (MASK_XTHEADCMO): New.
46222 (MASK_XTHEADCONDMOV): New.
46223 (MASK_XTHEADFMEMIDX): New.
46224 (MASK_XTHEADFMV): New.
46225 (MASK_XTHEADINT): New.
46226 (MASK_XTHEADMAC): New.
46227 (MASK_XTHEADMEMIDX): New.
46228 (MASK_XTHEADMEMPAIR): New.
46229 (MASK_XTHEADSYNC): New.
46230 (TARGET_XTHEADBA): New.
46231 (TARGET_XTHEADBB): New.
46232 (TARGET_XTHEADBS): New.
46233 (TARGET_XTHEADCMO): New.
46234 (TARGET_XTHEADCONDMOV): New.
46235 (TARGET_XTHEADFMEMIDX): New.
46236 (TARGET_XTHEADFMV): New.
46237 (TARGET_XTHEADINT): New.
46238 (TARGET_XTHEADMAC): New.
46239 (TARGET_XTHEADMEMIDX): New.
46240 (TARGET_XTHEADMEMPAIR): new.
46241 (TARGET_XTHEADSYNC): New.
46242 * config/riscv/riscv.opt: Add riscv_xthead_subext.
46244 2023-03-15 Hu, Lin1 <lin1.hu@intel.com>
46247 * config/i386/i386-builtin.def (__builtin_ia32_vaesdec_v16qi,
46248 __builtin_ia32_vaesdeclast_v16qi,__builtin_ia32_vaesenc_v16qi,
46249 __builtin_ia32_vaesenclast_v16qi): Require OPTION_MASK_ISA_AVX512VL.
46251 2023-03-14 Jakub Jelinek <jakub@redhat.com>
46254 * config/i386/i386-expand.cc (split_double_concat): Fix splitting
46255 when lo is equal to dhi and hi is a MEM which uses dlo register.
46257 2023-03-14 Martin Jambor <mjambor@suse.cz>
46260 * ipa-cp.cc (update_profiling_info): Drop counts of orig_node to
46261 global0 instead of zeroing when it does not have as many counts as
46264 2023-03-14 Martin Jambor <mjambor@suse.cz>
46267 * ipa-cp.cc (update_specialized_profile): Drop orig_node_count to
46268 ipa count, remove assert, lenient_count_portion_handling, dump
46269 also orig_node_count.
46271 2023-03-14 Uros Bizjak <ubizjak@gmail.com>
46273 * config/i386/i386-expand.cc (expand_vec_perm_movs):
46274 Handle V2SImode for TARGET_MMX_WITH_SSE.
46275 * config/i386/mmx.md (*mmx_movss_<mode>): Rename from *mmx_movss
46276 using V2FI mode iterator to handle both V2SI and V2SF modes.
46278 2023-03-14 Sam James <sam@gentoo.org>
46280 * config/riscv/genrvv-type-indexer.cc: Avoid calloc() poisoning on musl by
46281 including <sstream> earlier.
46282 * system.h: Add INCLUDE_SSTREAM.
46284 2023-03-14 Richard Biener <rguenther@suse.de>
46286 * tree-ssa-live.cc (remove_unused_locals): Do not treat
46287 the .DEFERRED_INIT of a variable as use, instead remove
46288 that if it is the only use.
46290 2023-03-14 Eric Botcazou <ebotcazou@adacore.com>
46292 PR rtl-optimization/107762
46293 * expr.cc (emit_group_store): Revert latest change.
46295 2023-03-14 Andre Vieira <andre.simoesdiasvieira@arm.com>
46297 PR tree-optimization/109005
46298 * tree-if-conv.cc (get_bitfield_rep): Replace BLKmode check with
46299 aggregate type check.
46301 2023-03-14 Jakub Jelinek <jakub@redhat.com>
46303 PR tree-optimization/109115
46304 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Don't use
46305 r.upper_bound () on r.undefined_p () range.
46307 2023-03-14 Jan Hubicka <hubicka@ucw.cz>
46309 PR tree-optimization/106896
46310 * profile-count.cc (profile_count::to_sreal_scale): Synchronize
46311 implementatoin with probability_in; avoid some asserts.
46313 2023-03-13 Max Filippov <jcmvbkbc@gmail.com>
46315 * config/xtensa/linux.h (TARGET_ASM_FILE_END): New macro.
46317 2023-03-13 Sean Bright <sean@seanbright.com>
46319 * doc/invoke.texi (Warning Options): Remove errant 'See'
46322 2023-03-13 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
46324 * config/xtensa/xtensa.h (REG_OK_STRICT, REG_OK_FOR_INDEX_P,
46325 REG_OK_FOR_BASE_P): Remove.
46327 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46329 * config/riscv/vector-iterators.md (=vd,vr): Fine tune.
46330 (=vd,vd,vr,vr): Ditto.
46331 * config/riscv/vector.md: Ditto.
46333 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46335 * config/riscv/riscv-vector-builtins.cc
46336 (function_expander::use_compare_insn): Add operand predicate check.
46338 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46340 * config/riscv/vector.md: Fine tune RA constraints.
46342 2023-03-13 Tobias Burnus <tobias@codesourcery.com>
46344 * config/gcn/mkoffload.cc (main): Pass -save-temps on for the
46345 hsaco assemble/link.
46347 2023-03-13 Richard Biener <rguenther@suse.de>
46349 PR tree-optimization/109046
46350 * tree-ssa-forwprop.cc (pass_forwprop::execute): Combine
46351 piecewise complex loads.
46353 2023-03-12 Jakub Jelinek <jakub@redhat.com>
46355 * config/aarch64/aarch64.h (aarch64_bf16_type_node): Remove.
46356 (aarch64_bf16_ptr_type_node): Adjust comment.
46357 * config/aarch64/aarch64.cc (aarch64_gimplify_va_arg_expr): Use
46358 bfloat16_type_node rather than aarch64_bf16_type_node.
46359 (aarch64_libgcc_floating_mode_supported_p,
46360 aarch64_scalar_mode_supported_p): Also support BFmode.
46361 (aarch64_invalid_conversion, aarch64_invalid_unary_op): Remove.
46362 (aarch64_invalid_binary_op): Remove BFmode related rejections.
46363 (TARGET_INVALID_CONVERSION, TARGET_INVALID_UNARY_OP): Don't redefine.
46364 * config/aarch64/aarch64-builtins.cc (aarch64_bf16_type_node): Remove.
46365 (aarch64_int_or_fp_type): Use bfloat16_type_node rather than
46366 aarch64_bf16_type_node.
46367 (aarch64_init_simd_builtin_types): Likewise.
46368 (aarch64_init_bf16_types): Likewise. Don't create bfloat16_type_node,
46369 which is created in tree.cc already.
46370 * config/aarch64/aarch64-sve-builtins.def (svbfloat16_t): Likewise.
46372 2023-03-12 Roger Sayle <roger@nextmovesoftware.com>
46374 PR middle-end/109031
46375 * tree-chrec.cc (chrec_apply): When folding "{a, +, a} (x-1)",
46376 ensure that the type of x is as wide or wider than the type of a.
46378 2023-03-12 Tamar Christina <tamar.christina@arm.com>
46381 * config/aarch64/aarch64-simd.md (@aarch64_bitmask_udiv<mode>3): Remove.
46382 (*bitmask_shift_plus<mode>): New.
46383 * config/aarch64/aarch64-sve2.md (*bitmask_shift_plus<mode>): New.
46384 (@aarch64_bitmask_udiv<mode>3): Remove.
46385 * config/aarch64/aarch64.cc
46386 (aarch64_vectorize_can_special_div_by_constant,
46387 TARGET_VECTORIZE_CAN_SPECIAL_DIV_BY_CONST): Removed.
46388 (TARGET_VECTORIZE_PREFERRED_DIV_AS_SHIFTS_OVER_MULT,
46389 aarch64_vectorize_preferred_div_as_shifts_over_mult): New.
46391 2023-03-12 Tamar Christina <tamar.christina@arm.com>
46394 * target.def (preferred_div_as_shifts_over_mult): New.
46395 * doc/tm.texi.in: Document it.
46396 * doc/tm.texi: Regenerate.
46397 * targhooks.cc (default_preferred_div_as_shifts_over_mult): New.
46398 * targhooks.h (default_preferred_div_as_shifts_over_mult): New.
46399 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Use it.
46401 2023-03-12 Tamar Christina <tamar.christina@arm.com>
46402 Richard Sandiford <richard.sandiford@arm.com>
46405 * tree-ssa-math-opts.cc (convert_mult_to_fma): Inhibit FMA in case not
46408 2023-03-12 Tamar Christina <tamar.christina@arm.com>
46409 Andrew MacLeod <amacleod@redhat.com>
46412 * gimple-range-op.h (gimple_range_op_handler): Add maybe_non_standard.
46413 * gimple-range-op.cc (gimple_range_op_handler::gimple_range_op_handler):
46415 (gimple_range_op_handler::maybe_non_standard): New.
46416 * range-op.cc (class operator_widen_plus_signed,
46417 operator_widen_plus_signed::wi_fold, class operator_widen_plus_unsigned,
46418 operator_widen_plus_unsigned::wi_fold, class operator_widen_mult_signed,
46419 operator_widen_mult_signed::wi_fold, class operator_widen_mult_unsigned,
46420 operator_widen_mult_unsigned::wi_fold,
46421 ptr_op_widen_mult_signed, ptr_op_widen_mult_unsigned,
46422 ptr_op_widen_plus_signed, ptr_op_widen_plus_unsigned): New.
46423 * range-op.h (ptr_op_widen_mult_signed, ptr_op_widen_mult_unsigned,
46424 ptr_op_widen_plus_signed, ptr_op_widen_plus_unsigned): New
46426 2023-03-12 Tamar Christina <tamar.christina@arm.com>
46429 * doc/tm.texi (TARGET_VECTORIZE_CAN_SPECIAL_DIV_BY_CONST): Remove.
46430 * doc/tm.texi.in: Likewise.
46431 * explow.cc (round_push, align_dynamic_address): Revert previous patch.
46432 * expmed.cc (expand_divmod): Likewise.
46433 * expmed.h (expand_divmod): Likewise.
46434 * expr.cc (force_operand, expand_expr_divmod): Likewise.
46435 * optabs.cc (expand_doubleword_mod, expand_doubleword_divmod): Likewise.
46436 * target.def (can_special_div_by_const): Remove.
46437 * target.h: Remove tree-core.h include
46438 * targhooks.cc (default_can_special_div_by_const): Remove.
46439 * targhooks.h (default_can_special_div_by_const): Remove.
46440 * tree-vect-generic.cc (expand_vector_operation): Remove hook.
46441 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Remove hook.
46442 * tree-vect-stmts.cc (vectorizable_operation): Remove hook.
46444 2023-03-12 Sandra Loosemore <sandra@codesourcery.com>
46446 * doc/install.texi2html: Fix issue number typo in comment.
46448 2023-03-12 Gaius Mulley <gaiusmod2@gmail.com>
46450 * doc/gm2.texi (Elementary data types): Equivalence BOOLEAN with
46453 2023-03-12 Sandra Loosemore <sandra@codesourcery.com>
46455 * doc/invoke.texi (Optimize Options): Add markup to
46456 description of asan-kernel-mem-intrinsic-prefix, and clarify
46459 2023-03-11 Gerald Pfeifer <gerald@pfeifer.com>
46461 * doc/extend.texi (Named Address Spaces): Drop a redundant link
46464 2023-03-11 Jeff Law <jlaw@ventanamicro>
46467 * doc/extend.texi: Clarify Attribute Syntax a bit.
46469 2023-03-11 Sandra Loosemore <sandra@codesourcery.com>
46471 * doc/install.texi (Prerequisites): Suggest using newer versions
46473 (Final install): Clean up and modernize discussion of how to
46474 build or obtain the GCC manuals.
46475 * doc/install.texi2html: Update comment to point to the PR instead
46476 of "makeinfo 4.7 brokenness" (it's not specific to that version).
46478 2023-03-10 Jakub Jelinek <jakub@redhat.com>
46481 * optabs.cc (expand_fix): For conversions from BFmode to integral,
46482 use shifts to convert it to SFmode first and then convert SFmode
46485 2023-03-10 Andrew Pinski <apinski@marvell.com>
46487 * config/aarch64/aarch64.md: Add a new define_split
46490 2023-03-10 Richard Biener <rguenther@suse.de>
46492 * tree-ssa-structalias.cc (solve_graph): Immediately
46493 iterate self-cycles.
46495 2023-03-10 Jakub Jelinek <jakub@redhat.com>
46497 PR tree-optimization/109008
46498 * range-op-float.cc (float_widen_lhs_range): If not
46499 -frounding-math and not IBM double double format, extend lhs
46500 range just by 0.5ulp rather than 1ulp in each direction.
46502 2023-03-10 Jakub Jelinek <jakub@redhat.com>
46505 * config.gcc (x86_64-*-cygwin*): Don't add i386/t-cygwin-w64 into
46507 * config/i386/t-cygwin-w64: Remove.
46509 2023-03-10 Jakub Jelinek <jakub@redhat.com>
46512 * tree-core.h (tree_code_type, tree_code_length): For C++11 or
46513 C++14, don't declare as extern const arrays.
46514 (tree_code_type_tmpl, tree_code_length_tmpl): New types with
46515 static constexpr member arrays for C++11 or C++14.
46516 * tree.h (TREE_CODE_CLASS): For C++11 or C++14 use
46517 tree_code_type_tmpl <0>::tree_code_type instead of tree_code_type.
46518 (TREE_CODE_LENGTH): For C++11 or C++14 use
46519 tree_code_length_tmpl <0>::tree_code_length instead of
46521 * tree.cc (tree_code_type, tree_code_length): Remove.
46523 2023-03-10 Jakub Jelinek <jakub@redhat.com>
46526 * common.opt (fcanon-prefix-map): New option.
46527 * opts.cc: Include file-prefix-map.h.
46528 (flag_canon_prefix_map): New variable.
46529 (common_handle_option): Handle OPT_fcanon_prefix_map.
46530 (gen_command_line_string): Ignore OPT_fcanon_prefix_map.
46531 * file-prefix-map.h (flag_canon_prefix_map): Declare.
46532 * file-prefix-map.cc (struct file_prefix_map): Add canonicalize
46534 (add_prefix_map): Initialize canonicalize member from
46535 flag_canon_prefix_map, and if true canonicalize it using lrealpath.
46536 (remap_filename): Revert 2022-11-01 and 2022-11-07 changes,
46537 use lrealpath result only for map->canonicalize map entries.
46538 * lto-opts.cc (lto_write_options): Ignore OPT_fcanon_prefix_map.
46539 * opts-global.cc (handle_common_deferred_options): Clear
46540 flag_canon_prefix_map at the start and handle OPT_fcanon_prefix_map.
46541 * doc/invoke.texi (-fcanon-prefix-map): Document.
46542 (-ffile-prefix-map, -fdebug-prefix-map, -fprofile-prefix-map): Add
46543 see also for -fcanon-prefix-map.
46544 * doc/cppopts.texi (-fmacro-prefix-map): Likewise.
46546 2023-03-10 Jakub Jelinek <jakub@redhat.com>
46549 * cgraphunit.cc (check_global_declaration): Don't warn for unused
46550 variables which have OPT_Wunused_variable warning suppressed.
46552 2023-03-10 Jakub Jelinek <jakub@redhat.com>
46554 PR tree-optimization/109008
46555 * range-op-float.cc (float_widen_lhs_range): If lb is
46556 minimum representable finite number or ub is maximum
46557 representable finite number, instead of widening it to
46558 -inf or inf widen it to negative or positive 0x0.8p+(EMAX+1).
46559 Temporarily clear flag_finite_math_only when canonicalizing
46562 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46564 * config/riscv/riscv-builtins.cc (riscv_gimple_fold_builtin): New function.
46565 * config/riscv/riscv-protos.h (riscv_gimple_fold_builtin): Ditto.
46566 (gimple_fold_builtin): Ditto.
46567 * config/riscv/riscv-vector-builtins-bases.cc (class read_vl): New class.
46568 (class vleff): Ditto.
46570 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
46571 * config/riscv/riscv-vector-builtins-functions.def (read_vl): Ditto.
46573 * config/riscv/riscv-vector-builtins-shapes.cc (struct read_vl_def): Ditto.
46574 (struct fault_load_def): Ditto.
46576 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
46577 * config/riscv/riscv-vector-builtins.cc
46578 (rvv_arg_type_info::get_tree_type): Add size_ptr.
46579 (gimple_folder::gimple_folder): New class.
46580 (gimple_folder::fold): Ditto.
46581 (gimple_fold_builtin): New function.
46582 (get_read_vl_instance): Ditto.
46583 (get_read_vl_decl): Ditto.
46584 * config/riscv/riscv-vector-builtins.def (size_ptr): Add size_ptr.
46585 * config/riscv/riscv-vector-builtins.h (class gimple_folder): New class.
46586 (get_read_vl_instance): New function.
46587 (get_read_vl_decl): Ditto.
46588 * config/riscv/riscv-vsetvl.cc (fault_first_load_p): Ditto.
46589 (read_vl_insn_p): Ditto.
46590 (available_occurrence_p): Ditto.
46591 (backward_propagate_worthwhile_p): Ditto.
46592 (gen_vsetvl_pat): Adapt for vleff support.
46593 (get_forward_read_vl_insn): New function.
46594 (get_backward_fault_first_load_insn): Ditto.
46595 (source_equal_p): Adapt for vleff support.
46596 (first_ratio_invalid_for_second_sew_p): Remove.
46597 (first_ratio_invalid_for_second_lmul_p): Ditto.
46598 (first_lmul_less_than_second_lmul_p): Ditto.
46599 (first_ratio_less_than_second_ratio_p): Ditto.
46600 (support_relaxed_compatible_p): New function.
46601 (vector_insn_info::operator>): Remove.
46602 (vector_insn_info::operator>=): Refine.
46603 (vector_insn_info::parse_insn): Adapt for vleff support.
46604 (vector_insn_info::compatible_p): Ditto.
46605 (vector_insn_info::update_fault_first_load_avl): New function.
46606 (pass_vsetvl::transfer_after): Adapt for vleff support.
46607 (pass_vsetvl::demand_fusion): Ditto.
46608 (pass_vsetvl::cleanup_insns): Ditto.
46609 * config/riscv/riscv-vsetvl.def (DEF_INCOMPATIBLE_COND): Remove
46610 redundant condtions.
46611 * config/riscv/riscv-vsetvl.h (struct demands_cond): New function.
46612 * config/riscv/riscv.cc (TARGET_GIMPLE_FOLD_BUILTIN): New target hook.
46613 * config/riscv/riscv.md: Adapt for vleff support.
46614 * config/riscv/t-riscv: Ditto.
46615 * config/riscv/vector-iterators.md: New iterator.
46616 * config/riscv/vector.md (read_vlsi): New pattern.
46617 (read_vldi_zero_extend): Ditto.
46618 (@pred_fault_load<mode>): Ditto.
46620 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46622 * config/riscv/riscv-vector-builtins.cc
46623 (function_expander::use_ternop_insn): Use maybe_gen_insn instead.
46624 (function_expander::use_widen_ternop_insn): Ditto.
46625 * optabs.cc (maybe_gen_insn): Extend nops handling.
46627 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46629 * config/riscv/riscv-vector-builtins-bases.cc: Split indexed load
46630 patterns according to RVV ISA.
46631 * config/riscv/vector-iterators.md: New iterators.
46632 * config/riscv/vector.md
46633 (@pred_indexed_<order>load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Remove.
46634 (@pred_indexed_<order>load<mode>_same_eew): New pattern.
46635 (@pred_indexed_<order>load<mode>_x2_greater_eew): Ditto.
46636 (@pred_indexed_<order>load<mode>_x4_greater_eew): Ditto.
46637 (@pred_indexed_<order>load<mode>_x8_greater_eew): Ditto.
46638 (@pred_indexed_<order>load<mode>_x2_smaller_eew): Ditto.
46639 (@pred_indexed_<order>load<mode>_x4_smaller_eew): Ditto.
46640 (@pred_indexed_<order>load<mode>_x8_smaller_eew): Ditto.
46641 (@pred_indexed_<order>load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Remove.
46642 (@pred_indexed_<order>load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
46643 (@pred_indexed_<order>load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
46644 (@pred_indexed_<order>load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
46645 (@pred_indexed_<order>load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
46646 (@pred_indexed_<order>load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
46648 2023-03-10 Michael Collison <collison@rivosinc.com>
46650 * tree-vect-loop-manip.cc (vect_do_peeling): Use
46651 result of constant_lower_bound instead of vf for the lower
46652 bound of the epilog loop trip count.
46654 2023-03-09 Tamar Christina <tamar.christina@arm.com>
46656 * passes.cc (emergency_dump_function): Finish graph generation.
46658 2023-03-09 Tamar Christina <tamar.christina@arm.com>
46660 * config/aarch64/aarch64.md (tbranch_<code><mode>3): Restrict to SHORT
46661 and bottom bit only.
46663 2023-03-09 Andrew Pinski <apinski@marvell.com>
46665 PR tree-optimization/108980
46666 * gimple-array-bounds.cc (array_bounds_checker::check_array_ref):
46667 Reorgnize the call to warning for not strict flexible arrays
46668 to be before the check of warned.
46670 2023-03-09 Jason Merrill <jason@redhat.com>
46672 * doc/extend.texi: Comment out __is_deducible docs.
46674 2023-03-09 Jason Merrill <jason@redhat.com>
46677 * doc/extend.texi (Type Traits):: Document __is_deducible.
46679 2023-03-09 Costas Argyris <costas.argyris@gmail.com>
46682 * config.host: add object for x86_64-*-mingw*.
46683 * config/i386/sym-mingw32.cc: dummy file to attach
46685 * config/i386/utf8-mingw32.rc: windres resource file.
46686 * config/i386/winnt-utf8.manifest: XML manifest to
46688 * config/i386/x-mingw32: reference to x-mingw32-utf8.
46689 * config/i386/x-mingw32-utf8: Makefile fragment to
46690 embed UTF-8 manifest.
46692 2023-03-09 Vladimir N. Makarov <vmakarov@redhat.com>
46694 * lra-constraints.cc (process_alt_operands): Use operand modes for
46695 clobbered regs instead of the biggest access mode.
46697 2023-03-09 Richard Biener <rguenther@suse.de>
46699 PR middle-end/108995
46700 * fold-const.cc (extract_muldiv_1): Avoid folding
46701 (CST * b) / CST2 when sanitizing overflow and we rely on
46702 overflow being undefined.
46704 2023-03-09 Jakub Jelinek <jakub@redhat.com>
46705 Richard Biener <rguenther@suse.de>
46707 PR tree-optimization/109008
46708 * range-op-float.cc (float_widen_lhs_range): New function.
46709 (foperator_plus::op1_range, foperator_minus::op1_range,
46710 foperator_minus::op2_range, foperator_mult::op1_range,
46711 foperator_div::op1_range, foperator_div::op2_range): Use it.
46713 2023-03-07 Jonathan Grant <jg@jguk.org>
46716 * doc/invoke.texi (Instrumentation Options): Clarify
46717 LeakSanitizer behavior.
46719 2023-03-07 Benson Muite <benson_muite@emailplus.org>
46721 * doc/install.texi (Prerequisites): Add link to gmplib.org.
46723 2023-03-07 Pan Li <pan2.li@intel.com>
46724 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46728 * config/riscv/riscv-modes.def (ADJUST_PRECISION): Adjust VNx*BI
46730 * config/riscv/riscv.cc (riscv_v_adjust_precision): New.
46731 * config/riscv/riscv.h (riscv_v_adjust_precision): New.
46732 * genmodes.cc (adj_precision): New.
46733 (ADJUST_PRECISION): New.
46734 (emit_mode_adjustments): Handle ADJUST_PRECISION.
46736 2023-03-07 Hans-Peter Nilsson <hp@axis.com>
46738 * doc/sourcebuild.texi: Document check_effective_target_tail_call.
46740 2023-03-06 Paul-Antoine Arras <pa@codesourcery.com>
46742 * config/gcn/gcn-valu.md (<expander><mode>3_exec): Add patterns for
46743 {s|u}{max|min} in QI, HI and DI modes.
46744 (<expander><mode>3): Add pattern for {s|u}{max|min} in DI mode.
46745 (cond_<fexpander><mode>): Add pattern for cond_f{max|min}.
46746 (cond_<expander><mode>): Add pattern for cond_{s|u}{max|min}.
46747 * config/gcn/gcn.cc (gcn_spill_class): Allow the exec register to be
46750 2023-03-06 Richard Biener <rguenther@suse.de>
46752 PR tree-optimization/109025
46753 * tree-vect-loop.cc (vect_is_simple_reduction): Verify
46754 the inner LC PHI use is the inner loop PHI latch definition
46755 before classifying an outer PHI as double reduction.
46757 2023-03-06 Jan Hubicka <hubicka@ucw.cz>
46760 * config/i386/x86-tune.def (X86_TUNE_USE_SCATTER_2PARTS): Enable for
46762 (X86_TUNE_USE_SCATTER_4PARTS): Likewise.
46763 (X86_TUNE_USE_SCATTER): Likewise.
46765 2023-03-06 Xi Ruoyao <xry111@xry111.site>
46768 * config/loongarch/loongarch.h (FP_RETURN): Use
46769 TARGET_*_FLOAT_ABI instead of TARGET_*_FLOAT.
46770 (UNITS_PER_FP_ARG): Likewise.
46772 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46774 * config/riscv/riscv-vsetvl.cc (reg_available_p): Fix bug.
46775 (pass_vsetvl::backward_demand_fusion): Ditto.
46777 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
46778 SiYu Wu <siyu@isrc.iscas.ac.cn>
46780 * config/riscv/crypto.md (riscv_sm3p0_<mode>): Add ZKSED's and ZKSH's
46782 (riscv_sm3p1_<mode>): New.
46783 (riscv_sm4ed_<mode>): New.
46784 (riscv_sm4ks_<mode>): New.
46785 * config/riscv/riscv-builtins.cc (AVAIL): Add ZKSED's and ZKSH's AVAIL.
46786 * config/riscv/riscv-scalar-crypto.def (RISCV_BUILTIN): Add ZKSED's and
46787 ZKSH's built-in functions.
46789 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
46790 SiYu Wu <siyu@isrc.iscas.ac.cn>
46792 * config/riscv/crypto.md (riscv_sha256sig0_<mode>): Add ZKNH's instructions.
46793 (riscv_sha256sig1_<mode>): New.
46794 (riscv_sha256sum0_<mode>): New.
46795 (riscv_sha256sum1_<mode>): New.
46796 (riscv_sha512sig0h): New.
46797 (riscv_sha512sig0l): New.
46798 (riscv_sha512sig1h): New.
46799 (riscv_sha512sig1l): New.
46800 (riscv_sha512sum0r): New.
46801 (riscv_sha512sum1r): New.
46802 (riscv_sha512sig0): New.
46803 (riscv_sha512sig1): New.
46804 (riscv_sha512sum0): New.
46805 (riscv_sha512sum1): New.
46806 * config/riscv/riscv-builtins.cc (AVAIL): And ZKNH's AVAIL.
46807 * config/riscv/riscv-scalar-crypto.def (RISCV_BUILTIN): And ZKNH's
46808 built-in functions.
46809 (DIRECT_BUILTIN): Add new.
46811 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
46812 SiYu Wu <siyu@isrc.iscas.ac.cn>
46814 * config/riscv/constraints.md (D03): Add constants of bs and rnum.
46816 * config/riscv/crypto.md (riscv_aes32dsi): Add ZKND's and ZKNE's instructions.
46817 (riscv_aes32dsmi): New.
46818 (riscv_aes64ds): New.
46819 (riscv_aes64dsm): New.
46820 (riscv_aes64im): New.
46821 (riscv_aes64ks1i): New.
46822 (riscv_aes64ks2): New.
46823 (riscv_aes32esi): New.
46824 (riscv_aes32esmi): New.
46825 (riscv_aes64es): New.
46826 (riscv_aes64esm): New.
46827 * config/riscv/riscv-builtins.cc (AVAIL): Add ZKND's and ZKNE's AVAIL.
46828 * config/riscv/riscv-scalar-crypto.def (DIRECT_BUILTIN): Add ZKND's and
46829 ZKNE's built-in functions.
46831 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
46832 SiYu Wu <siyu@isrc.iscas.ac.cn>
46834 * config/riscv/bitmanip.md: Add ZBKB's instructions.
46835 * config/riscv/riscv-builtins.cc (AVAIL): Add new.
46836 * config/riscv/riscv.md: Add new type for crypto instructions.
46837 * config/riscv/crypto.md: Add Scalar Cryptography extension's machine
46839 * config/riscv/riscv-scalar-crypto.def: Add Scalar Cryptography
46840 extension's built-in function file.
46842 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
46843 SiYu Wu <siyu@isrc.iscas.ac.cn>
46845 * config/riscv/riscv-builtins.cc (RISCV_FTYPE_NAME2): New.
46846 (RISCV_FTYPE_NAME3): New.
46847 (RISCV_ATYPE_QI): New.
46848 (RISCV_ATYPE_HI): New.
46849 (RISCV_FTYPE_ATYPES2): New.
46850 (RISCV_FTYPE_ATYPES3): New.
46851 * config/riscv/riscv-ftypes.def (2): New.
46854 2023-03-05 Vineet Gupta <vineetg@rivosinc.com>
46856 * config/riscv/riscv.cc (riscv_rtx_costs): Fixed IN_RANGE() to
46859 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46860 kito-cheng <kito.cheng@sifive.com>
46862 * config/riscv/predicates.md (vector_any_register_operand): New predicate.
46863 * config/riscv/riscv-c.cc (riscv_check_builtin_call): New function.
46864 (riscv_register_pragmas): Add builtin function check call.
46865 * config/riscv/riscv-protos.h (RVV_VUNDEF): Adapt macro.
46866 (check_builtin_call): New function.
46867 * config/riscv/riscv-vector-builtins-bases.cc (class vundefined): New class.
46868 (class vreinterpret): Ditto.
46869 (class vlmul_ext): Ditto.
46870 (class vlmul_trunc): Ditto.
46871 (class vset): Ditto.
46872 (class vget): Ditto.
46874 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
46875 * config/riscv/riscv-vector-builtins-functions.def (vluxei8): Change name.
46891 (vundefined): Add new intrinsic.
46892 (vreinterpret): Ditto.
46893 (vlmul_ext): Ditto.
46894 (vlmul_trunc): Ditto.
46897 * config/riscv/riscv-vector-builtins-shapes.cc (struct return_mask_def): New class.
46898 (struct narrow_alu_def): Ditto.
46899 (struct reduc_alu_def): Ditto.
46900 (struct vundefined_def): Ditto.
46901 (struct misc_def): Ditto.
46902 (struct vset_def): Ditto.
46903 (struct vget_def): Ditto.
46905 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
46906 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_EEW8_INTERPRET_OPS): New def.
46907 (DEF_RVV_EEW16_INTERPRET_OPS): Ditto.
46908 (DEF_RVV_EEW32_INTERPRET_OPS): Ditto.
46909 (DEF_RVV_EEW64_INTERPRET_OPS): Ditto.
46910 (DEF_RVV_X2_VLMUL_EXT_OPS): Ditto.
46911 (DEF_RVV_X4_VLMUL_EXT_OPS): Ditto.
46912 (DEF_RVV_X8_VLMUL_EXT_OPS): Ditto.
46913 (DEF_RVV_X16_VLMUL_EXT_OPS): Ditto.
46914 (DEF_RVV_X32_VLMUL_EXT_OPS): Ditto.
46915 (DEF_RVV_X64_VLMUL_EXT_OPS): Ditto.
46916 (DEF_RVV_LMUL1_OPS): Ditto.
46917 (DEF_RVV_LMUL2_OPS): Ditto.
46918 (DEF_RVV_LMUL4_OPS): Ditto.
46919 (vint16mf4_t): Ditto.
46920 (vint16mf2_t): Ditto.
46921 (vint16m1_t): Ditto.
46922 (vint16m2_t): Ditto.
46923 (vint16m4_t): Ditto.
46924 (vint16m8_t): Ditto.
46925 (vint32mf2_t): Ditto.
46926 (vint32m1_t): Ditto.
46927 (vint32m2_t): Ditto.
46928 (vint32m4_t): Ditto.
46929 (vint32m8_t): Ditto.
46930 (vint64m1_t): Ditto.
46931 (vint64m2_t): Ditto.
46932 (vint64m4_t): Ditto.
46933 (vint64m8_t): Ditto.
46934 (vuint16mf4_t): Ditto.
46935 (vuint16mf2_t): Ditto.
46936 (vuint16m1_t): Ditto.
46937 (vuint16m2_t): Ditto.
46938 (vuint16m4_t): Ditto.
46939 (vuint16m8_t): Ditto.
46940 (vuint32mf2_t): Ditto.
46941 (vuint32m1_t): Ditto.
46942 (vuint32m2_t): Ditto.
46943 (vuint32m4_t): Ditto.
46944 (vuint32m8_t): Ditto.
46945 (vuint64m1_t): Ditto.
46946 (vuint64m2_t): Ditto.
46947 (vuint64m4_t): Ditto.
46948 (vuint64m8_t): Ditto.
46949 (vint8mf4_t): Ditto.
46950 (vint8mf2_t): Ditto.
46951 (vint8m1_t): Ditto.
46952 (vint8m2_t): Ditto.
46953 (vint8m4_t): Ditto.
46954 (vint8m8_t): Ditto.
46955 (vuint8mf4_t): Ditto.
46956 (vuint8mf2_t): Ditto.
46957 (vuint8m1_t): Ditto.
46958 (vuint8m2_t): Ditto.
46959 (vuint8m4_t): Ditto.
46960 (vuint8m8_t): Ditto.
46961 (vint8mf8_t): Ditto.
46962 (vuint8mf8_t): Ditto.
46963 (vfloat32mf2_t): Ditto.
46964 (vfloat32m1_t): Ditto.
46965 (vfloat32m2_t): Ditto.
46966 (vfloat32m4_t): Ditto.
46967 (vfloat64m1_t): Ditto.
46968 (vfloat64m2_t): Ditto.
46969 (vfloat64m4_t): Ditto.
46970 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
46971 (DEF_RVV_EEW8_INTERPRET_OPS): Ditto.
46972 (DEF_RVV_EEW16_INTERPRET_OPS): Ditto.
46973 (DEF_RVV_EEW32_INTERPRET_OPS): Ditto.
46974 (DEF_RVV_EEW64_INTERPRET_OPS): Ditto.
46975 (DEF_RVV_X2_VLMUL_EXT_OPS): Ditto.
46976 (DEF_RVV_X4_VLMUL_EXT_OPS): Ditto.
46977 (DEF_RVV_X8_VLMUL_EXT_OPS): Ditto.
46978 (DEF_RVV_X16_VLMUL_EXT_OPS): Ditto.
46979 (DEF_RVV_X32_VLMUL_EXT_OPS): Ditto.
46980 (DEF_RVV_X64_VLMUL_EXT_OPS): Ditto.
46981 (DEF_RVV_LMUL1_OPS): Ditto.
46982 (DEF_RVV_LMUL2_OPS): Ditto.
46983 (DEF_RVV_LMUL4_OPS): Ditto.
46984 (DEF_RVV_TYPE_INDEX): Ditto.
46985 (required_extensions_p): Adapt for new intrinsic support/
46986 (get_required_extensions): New function.
46987 (check_required_extensions): Ditto.
46988 (unsigned_base_type_p): Remove.
46989 (rvv_arg_type_info::get_scalar_ptr_type): New function.
46990 (get_mode_for_bitsize): Remove.
46991 (rvv_arg_type_info::get_scalar_const_ptr_type): New function.
46992 (rvv_arg_type_info::get_base_vector_type): Ditto.
46993 (rvv_arg_type_info::get_function_type_index): Ditto.
46994 (DEF_RVV_BASE_TYPE): New def.
46995 (function_builder::apply_predication): New class.
46996 (function_expander::mask_mode): Ditto.
46997 (function_checker::function_checker): Ditto.
46998 (function_checker::report_non_ice): Ditto.
46999 (function_checker::report_out_of_range): Ditto.
47000 (function_checker::require_immediate): Ditto.
47001 (function_checker::require_immediate_range): Ditto.
47002 (function_checker::check): Ditto.
47003 (check_builtin_call): Ditto.
47004 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): New def.
47005 (DEF_RVV_BASE_TYPE): Ditto.
47006 (DEF_RVV_TYPE_INDEX): Ditto.
47007 (vbool64_t): Ditto.
47008 (vbool32_t): Ditto.
47009 (vbool16_t): Ditto.
47014 (vuint8mf8_t): Ditto.
47015 (vuint8mf4_t): Ditto.
47016 (vuint8mf2_t): Ditto.
47017 (vuint8m1_t): Ditto.
47018 (vuint8m2_t): Ditto.
47019 (vint8m4_t): Ditto.
47020 (vuint8m4_t): Ditto.
47021 (vint8m8_t): Ditto.
47022 (vuint8m8_t): Ditto.
47023 (vint16mf4_t): Ditto.
47024 (vuint16mf2_t): Ditto.
47025 (vuint16m1_t): Ditto.
47026 (vuint16m2_t): Ditto.
47027 (vuint16m4_t): Ditto.
47028 (vuint16m8_t): Ditto.
47029 (vint32mf2_t): Ditto.
47030 (vuint32m1_t): Ditto.
47031 (vuint32m2_t): Ditto.
47032 (vuint32m4_t): Ditto.
47033 (vuint32m8_t): Ditto.
47034 (vuint64m1_t): Ditto.
47035 (vuint64m2_t): Ditto.
47036 (vuint64m4_t): Ditto.
47037 (vuint64m8_t): Ditto.
47038 (vfloat32mf2_t): Ditto.
47039 (vfloat32m1_t): Ditto.
47040 (vfloat32m2_t): Ditto.
47041 (vfloat32m4_t): Ditto.
47042 (vfloat32m8_t): Ditto.
47043 (vfloat64m1_t): Ditto.
47044 (vfloat64m4_t): Ditto.
47045 (vector): Move it def.
47048 (signed_vector): Ditto.
47049 (unsigned_vector): Ditto.
47050 (unsigned_scalar): Ditto.
47051 (vector_ptr): Ditto.
47052 (scalar_ptr): Ditto.
47053 (scalar_const_ptr): Ditto.
47057 (unsigned_long): Ditto.
47059 (eew8_index): Ditto.
47060 (eew16_index): Ditto.
47061 (eew32_index): Ditto.
47062 (eew64_index): Ditto.
47063 (shift_vector): Ditto.
47064 (double_trunc_vector): Ditto.
47065 (quad_trunc_vector): Ditto.
47066 (oct_trunc_vector): Ditto.
47067 (double_trunc_scalar): Ditto.
47068 (double_trunc_signed_vector): Ditto.
47069 (double_trunc_unsigned_vector): Ditto.
47070 (double_trunc_unsigned_scalar): Ditto.
47071 (double_trunc_float_vector): Ditto.
47072 (float_vector): Ditto.
47073 (lmul1_vector): Ditto.
47074 (widen_lmul1_vector): Ditto.
47075 (eew8_interpret): Ditto.
47076 (eew16_interpret): Ditto.
47077 (eew32_interpret): Ditto.
47078 (eew64_interpret): Ditto.
47079 (vlmul_ext_x2): Ditto.
47080 (vlmul_ext_x4): Ditto.
47081 (vlmul_ext_x8): Ditto.
47082 (vlmul_ext_x16): Ditto.
47083 (vlmul_ext_x32): Ditto.
47084 (vlmul_ext_x64): Ditto.
47085 * config/riscv/riscv-vector-builtins.h (DEF_RVV_BASE_TYPE): New def.
47086 (struct function_type_info): New function.
47087 (struct rvv_arg_type_info): Ditto.
47088 (class function_checker): New class.
47089 (rvv_arg_type_info::get_scalar_type): New function.
47090 (rvv_arg_type_info::get_vector_type): Ditto.
47091 (function_expander::ret_mode): New function.
47092 (function_checker::arg_mode): Ditto.
47093 (function_checker::ret_mode): Ditto.
47094 * config/riscv/t-riscv: Add generator.
47095 * config/riscv/vector-iterators.md: New iterators.
47096 * config/riscv/vector.md (vundefined<mode>): New pattern.
47097 (@vundefined<mode>): Ditto.
47098 (@vreinterpret<mode>): Ditto.
47099 (@vlmul_extx2<mode>): Ditto.
47100 (@vlmul_extx4<mode>): Ditto.
47101 (@vlmul_extx8<mode>): Ditto.
47102 (@vlmul_extx16<mode>): Ditto.
47103 (@vlmul_extx32<mode>): Ditto.
47104 (@vlmul_extx64<mode>): Ditto.
47105 (*vlmul_extx2<mode>): Ditto.
47106 (*vlmul_extx4<mode>): Ditto.
47107 (*vlmul_extx8<mode>): Ditto.
47108 (*vlmul_extx16<mode>): Ditto.
47109 (*vlmul_extx32<mode>): Ditto.
47110 (*vlmul_extx64<mode>): Ditto.
47111 * config/riscv/genrvv-type-indexer.cc: New file.
47113 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
47115 * config/riscv/riscv-protos.h (enum vlen_enum): New enum.
47116 (slide1_sew64_helper): New function.
47117 * config/riscv/riscv-v.cc (compute_vlmax): Ditto.
47118 (get_unknown_min_value): Ditto.
47119 (force_vector_length_operand): Ditto.
47120 (gen_no_side_effects_vsetvl_rtx): Ditto.
47121 (get_vl_x2_rtx): Ditto.
47122 (slide1_sew64_helper): Ditto.
47123 * config/riscv/riscv-vector-builtins-bases.cc (class slideop): New class.
47124 (class vrgather): Ditto.
47125 (class vrgatherei16): Ditto.
47126 (class vcompress): Ditto.
47128 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
47129 * config/riscv/riscv-vector-builtins-functions.def (vslideup): Ditto.
47130 (vslidedown): Ditto.
47131 (vslide1up): Ditto.
47132 (vslide1down): Ditto.
47133 (vfslide1up): Ditto.
47134 (vfslide1down): Ditto.
47136 (vrgatherei16): Ditto.
47137 (vcompress): Ditto.
47138 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_EI16_OPS): New macro.
47139 (vint8mf8_t): Ditto.
47140 (vint8mf4_t): Ditto.
47141 (vint8mf2_t): Ditto.
47142 (vint8m1_t): Ditto.
47143 (vint8m2_t): Ditto.
47144 (vint8m4_t): Ditto.
47145 (vint16mf4_t): Ditto.
47146 (vint16mf2_t): Ditto.
47147 (vint16m1_t): Ditto.
47148 (vint16m2_t): Ditto.
47149 (vint16m4_t): Ditto.
47150 (vint16m8_t): Ditto.
47151 (vint32mf2_t): Ditto.
47152 (vint32m1_t): Ditto.
47153 (vint32m2_t): Ditto.
47154 (vint32m4_t): Ditto.
47155 (vint32m8_t): Ditto.
47156 (vint64m1_t): Ditto.
47157 (vint64m2_t): Ditto.
47158 (vint64m4_t): Ditto.
47159 (vint64m8_t): Ditto.
47160 (vuint8mf8_t): Ditto.
47161 (vuint8mf4_t): Ditto.
47162 (vuint8mf2_t): Ditto.
47163 (vuint8m1_t): Ditto.
47164 (vuint8m2_t): Ditto.
47165 (vuint8m4_t): Ditto.
47166 (vuint16mf4_t): Ditto.
47167 (vuint16mf2_t): Ditto.
47168 (vuint16m1_t): Ditto.
47169 (vuint16m2_t): Ditto.
47170 (vuint16m4_t): Ditto.
47171 (vuint16m8_t): Ditto.
47172 (vuint32mf2_t): Ditto.
47173 (vuint32m1_t): Ditto.
47174 (vuint32m2_t): Ditto.
47175 (vuint32m4_t): Ditto.
47176 (vuint32m8_t): Ditto.
47177 (vuint64m1_t): Ditto.
47178 (vuint64m2_t): Ditto.
47179 (vuint64m4_t): Ditto.
47180 (vuint64m8_t): Ditto.
47181 (vfloat32mf2_t): Ditto.
47182 (vfloat32m1_t): Ditto.
47183 (vfloat32m2_t): Ditto.
47184 (vfloat32m4_t): Ditto.
47185 (vfloat32m8_t): Ditto.
47186 (vfloat64m1_t): Ditto.
47187 (vfloat64m2_t): Ditto.
47188 (vfloat64m4_t): Ditto.
47189 (vfloat64m8_t): Ditto.
47190 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_EI16_OPS): Ditto.
47191 * config/riscv/riscv.md: Adjust RVV instruction types.
47192 * config/riscv/vector-iterators.md (down): New iterator.
47193 (=vd,vr): New attribute.
47194 (UNSPEC_VSLIDE1UP): New unspec.
47195 * config/riscv/vector.md (@pred_slide<ud><mode>): New pattern.
47196 (*pred_slide<ud><mode>): Ditto.
47197 (*pred_slide<ud><mode>_extended): Ditto.
47198 (@pred_gather<mode>): Ditto.
47199 (@pred_gather<mode>_scalar): Ditto.
47200 (@pred_gatherei16<mode>): Ditto.
47201 (@pred_compress<mode>): Ditto.
47203 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
47205 * config/riscv/riscv-vector-builtins.cc: Remove void_type_node.
47207 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
47209 * config/riscv/constraints.md (Wb1): New constraint.
47210 * config/riscv/predicates.md
47211 (vector_least_significant_set_mask_operand): New predicate.
47212 (vector_broadcast_mask_operand): Ditto.
47213 * config/riscv/riscv-protos.h (enum vlmul_type): Adjust.
47214 (gen_scalar_move_mask): New function.
47215 * config/riscv/riscv-v.cc (gen_scalar_move_mask): Ditto.
47216 * config/riscv/riscv-vector-builtins-bases.cc (class vmv): New class.
47217 (class vmv_s): Ditto.
47219 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
47220 * config/riscv/riscv-vector-builtins-functions.def (vmv_x): Ditto.
47224 * config/riscv/riscv-vector-builtins-shapes.cc (struct scalar_move_def): Ditto.
47226 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
47227 * config/riscv/riscv-vector-builtins.cc (function_expander::mask_mode): Ditto.
47228 (function_expander::use_exact_insn): New function.
47229 (function_expander::use_contiguous_load_insn): New function.
47230 (function_expander::use_contiguous_store_insn): New function.
47231 (function_expander::use_ternop_insn): New function.
47232 (function_expander::use_widen_ternop_insn): New function.
47233 (function_expander::use_scalar_move_insn): New function.
47234 * config/riscv/riscv-vector-builtins.def (s): New operand suffix.
47235 * config/riscv/riscv-vector-builtins.h
47236 (function_expander::add_scalar_move_mask_operand): New class.
47237 * config/riscv/riscv-vsetvl.cc (ignore_vlmul_insn_p): New function.
47238 (scalar_move_insn_p): Ditto.
47239 (has_vsetvl_killed_avl_p): Ditto.
47240 (anticipatable_occurrence_p): Ditto.
47241 (insert_vsetvl): Ditto.
47242 (get_vl_vtype_info): Ditto.
47243 (calculate_sew): Ditto.
47244 (calculate_vlmul): Ditto.
47245 (incompatible_avl_p): Ditto.
47246 (different_sew_p): Ditto.
47247 (different_lmul_p): Ditto.
47248 (different_ratio_p): Ditto.
47249 (different_tail_policy_p): Ditto.
47250 (different_mask_policy_p): Ditto.
47251 (possible_zero_avl_p): Ditto.
47252 (first_ratio_invalid_for_second_sew_p): Ditto.
47253 (first_ratio_invalid_for_second_lmul_p): Ditto.
47254 (second_ratio_invalid_for_first_sew_p): Ditto.
47255 (second_ratio_invalid_for_first_lmul_p): Ditto.
47256 (second_sew_less_than_first_sew_p): Ditto.
47257 (first_sew_less_than_second_sew_p): Ditto.
47258 (compare_lmul): Ditto.
47259 (second_lmul_less_than_first_lmul_p): Ditto.
47260 (first_lmul_less_than_second_lmul_p): Ditto.
47261 (first_ratio_less_than_second_ratio_p): Ditto.
47262 (second_ratio_less_than_first_ratio_p): Ditto.
47263 (DEF_INCOMPATIBLE_COND): Ditto.
47264 (greatest_sew): Ditto.
47265 (first_sew): Ditto.
47266 (second_sew): Ditto.
47267 (first_vlmul): Ditto.
47268 (second_vlmul): Ditto.
47269 (first_ratio): Ditto.
47270 (second_ratio): Ditto.
47271 (vlmul_for_first_sew_second_ratio): Ditto.
47272 (ratio_for_second_sew_first_vlmul): Ditto.
47273 (DEF_SEW_LMUL_FUSE_RULE): Ditto.
47274 (always_unavailable): Ditto.
47275 (avl_unavailable_p): Ditto.
47276 (sew_unavailable_p): Ditto.
47277 (lmul_unavailable_p): Ditto.
47278 (ge_sew_unavailable_p): Ditto.
47279 (ge_sew_lmul_unavailable_p): Ditto.
47280 (ge_sew_ratio_unavailable_p): Ditto.
47281 (DEF_UNAVAILABLE_COND): Ditto.
47282 (same_sew_lmul_demand_p): Ditto.
47283 (propagate_avl_across_demands_p): Ditto.
47284 (reg_available_p): Ditto.
47285 (avl_info::has_non_zero_avl): Ditto.
47286 (vl_vtype_info::has_non_zero_avl): Ditto.
47287 (vector_insn_info::operator>=): Refactor.
47288 (vector_insn_info::parse_insn): Adjust for scalar move.
47289 (vector_insn_info::demand_vl_vtype): Remove.
47290 (vector_insn_info::compatible_p): New function.
47291 (vector_insn_info::compatible_avl_p): Ditto.
47292 (vector_insn_info::compatible_vtype_p): Ditto.
47293 (vector_insn_info::available_p): Ditto.
47294 (vector_insn_info::merge): Ditto.
47295 (vector_insn_info::fuse_avl): Ditto.
47296 (vector_insn_info::fuse_sew_lmul): Ditto.
47297 (vector_insn_info::fuse_tail_policy): Ditto.
47298 (vector_insn_info::fuse_mask_policy): Ditto.
47299 (vector_insn_info::dump): Ditto.
47300 (vector_infos_manager::release): Ditto.
47301 (pass_vsetvl::compute_local_backward_infos): Adjust for scalar move support.
47302 (pass_vsetvl::get_backward_fusion_type): Adjust for scalar move support.
47303 (pass_vsetvl::hard_empty_block_p): Ditto.
47304 (pass_vsetvl::backward_demand_fusion): Ditto.
47305 (pass_vsetvl::forward_demand_fusion): Ditto.
47306 (pass_vsetvl::refine_vsetvls): Ditto.
47307 (pass_vsetvl::cleanup_vsetvls): Ditto.
47308 (pass_vsetvl::commit_vsetvls): Ditto.
47309 (pass_vsetvl::propagate_avl): Ditto.
47310 * config/riscv/riscv-vsetvl.h (enum demand_status): New class.
47311 (struct demands_pair): Ditto.
47312 (struct demands_cond): Ditto.
47313 (struct demands_fuse_rule): Ditto.
47314 * config/riscv/vector-iterators.md: New iterator.
47315 * config/riscv/vector.md (@pred_broadcast<mode>): New pattern.
47316 (*pred_broadcast<mode>): Ditto.
47317 (*pred_broadcast<mode>_extended_scalar): Ditto.
47318 (@pred_extract_first<mode>): Ditto.
47319 (*pred_extract_first<mode>): Ditto.
47320 (@pred_extract_first_trunc<mode>): Ditto.
47321 * config/riscv/riscv-vsetvl.def: New file.
47323 2023-03-05 Lin Sinan <sinan.lin@linux.alibaba.com>
47325 * config/riscv/bitmanip.md: allow 0 constant in max/min
47328 2023-03-05 Lin Sinan <sinan.lin@linux.alibaba.com>
47330 * config/riscv/bitmanip.md: Fix wrong index in the check.
47332 2023-03-04 Jakub Jelinek <jakub@redhat.com>
47334 PR middle-end/109006
47335 * vec.cc (test_auto_alias): Adjust comment for removal of
47337 * read-rtl-function.cc (function_reader::parse_block): Likewise.
47338 * gdbhooks.py: Likewise.
47340 2023-03-04 Jakub Jelinek <jakub@redhat.com>
47342 PR testsuite/108973
47343 * selftest-diagnostic.cc
47344 (test_diagnostic_context::test_diagnostic_context): Set
47345 caret_max_width to 80.
47347 2023-03-03 Alexandre Oliva <oliva@adacore.com>
47349 * gimple-ssa-warn-access.cc
47350 (pass_waccess::check_dangling_stores): Skip non-stores.
47352 2023-03-03 Alexandre Oliva <oliva@adacore.com>
47354 * config/arm/vfp.md (*thumb2_movsi_vfp): Drop blank after tab
47355 after vmsr and vmrs, and lower the case of P0.
47357 2023-03-03 Jonathan Wakely <jwakely@redhat.com>
47359 PR middle-end/109006
47360 * gdbhooks.py (VecPrinter): Handle vec<T> as well as vec<T>*.
47362 2023-03-03 Jonathan Wakely <jwakely@redhat.com>
47364 PR middle-end/109006
47365 * gdbhooks.py (VecPrinter): Adjust for new vec layout.
47367 2023-03-03 Jakub Jelinek <jakub@redhat.com>
47370 * gimple-ssa-warn-access.cc (pass_waccess::maybe_check_access_sizes):
47371 Return immediately if OPT_Wnonnull or OPT_Wstringop_overflow_ is
47372 suppressed on stmt. For [static %E] warning, print access_nelts
47373 rather than access_size. Fix up comment wording.
47375 2023-03-03 Robin Dapp <rdapp@linux.ibm.com>
47377 * config/s390/driver-native.cc (s390_host_detect_local_cpu): Use
47378 arch14 instead of z16.
47380 2023-03-03 Anthony Green <green@moxielogic.com>
47382 * config/moxie/moxie.cc (TARGET_LRA_P): Remove.
47384 2023-03-03 Anthony Green <green@moxielogic.com>
47386 * config/moxie/constraints.md (A, B, W): Change
47387 define_constraint to define_memory_constraint.
47389 2023-03-03 Xi Ruoyao <xry111@xry111.site>
47391 * toplev.cc (process_options): Fix the spelling of
47392 "-fstack-clash-protection".
47394 2023-03-03 Richard Biener <rguenther@suse.de>
47396 PR tree-optimization/109002
47397 * tree-ssa-pre.cc (compute_partial_antic_aux): Properly
47398 PHI-translate ANTIC_IN.
47400 2023-03-03 Jakub Jelinek <jakub@redhat.com>
47402 PR tree-optimization/108988
47403 * gimple-fold.cc (gimple_fold_builtin_fputs): Fold len to
47404 size_type_node before passing it as argument to fwrite. Formatting
47407 2023-03-03 Richard Biener <rguenther@suse.de>
47410 * config/i386/i386.opt (--param x86-stv-max-visits): New param.
47411 * doc/invoke.texi (--param x86-stv-max-visits): Document it.
47412 * config/i386/i386-features.h (scalar_chain::max_visits): New.
47413 (scalar_chain::build): Add bitmap parameter, return boolean.
47414 (scalar_chain::add_insn): Likewise.
47415 (scalar_chain::analyze_register_chain): Likewise.
47416 * config/i386/i386-features.cc (scalar_chain::scalar_chain):
47417 Initialize max_visits.
47418 (scalar_chain::analyze_register_chain): When we exhaust
47419 max_visits, abort. Also abort when running into any
47421 (scalar_chain::add_insn): Propagate abort.
47422 (scalar_chain::build): Likewise. When aborting amend
47423 the set of disallowed insn with the insns set.
47424 (convert_scalars_to_vector): Adjust. Do not convert aborted
47427 2023-03-03 Richard Biener <rguenther@suse.de>
47430 * dwarf2out.cc (dwarf2out_late_global_decl): Do not
47431 generate a DIE for a function scope static.
47433 2023-03-03 Alexandre Oliva <oliva@adacore.com>
47435 * config/vx-common.h (WINT_TYPE): Alias to "wchar_t".
47437 2023-03-02 Jakub Jelinek <jakub@redhat.com>
47440 * target.h (emit_support_tinfos_callback): New typedef.
47441 * targhooks.h (default_emit_support_tinfos): Declare.
47442 * targhooks.cc (default_emit_support_tinfos): New function.
47443 * target.def (emit_support_tinfos): New target hook.
47444 * doc/tm.texi.in (emit_support_tinfos): Document it.
47445 * doc/tm.texi: Regenerated.
47446 * config/i386/i386.cc (ix86_emit_support_tinfos): New function.
47447 (TARGET_EMIT_SUPPORT_TINFOS): Redefine.
47449 2023-03-02 Vladimir N. Makarov <vmakarov@redhat.com>
47451 * ira-costs.cc: Include print-rtl.h.
47452 (record_reg_classes, scan_one_insn): Add code to print debug info.
47453 (record_operand_costs): Find and use smaller cost for hard reg
47456 2023-03-02 Kwok Cheung Yeung <kcy@codesourcery.com>
47457 Paul-Antoine Arras <pa@codesourcery.com>
47459 * builtins.cc (mathfn_built_in_explicit): New.
47460 * config/gcn/gcn.cc: Include case-cfn-macros.h.
47461 (mathfn_built_in_explicit): Add prototype.
47462 (gcn_vectorize_builtin_vectorized_function): New.
47463 (gcn_libc_has_function): New.
47464 (TARGET_LIBC_HAS_FUNCTION): Define.
47465 (TARGET_VECTORIZE_BUILTIN_VECTORIZED_FUNCTION): Define.
47467 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
47469 PR tree-optimization/108979
47470 * tree-vect-stmts.cc (vectorizable_operation): Don't mask
47471 operations on invariants.
47473 2023-03-02 Robin Dapp <rdapp@linux.ibm.com>
47475 * config/s390/predicates.md (vll_bias_operand): Add -1 bias.
47476 * config/s390/s390.cc (s390_option_override_internal): Make
47477 partial vector usage the default from z13 on.
47478 * config/s390/vector.md (len_load_v16qi): Add.
47479 (len_store_v16qi): Add.
47481 2023-03-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
47483 * simplify-rtx.cc (simplify_context::simplify_subreg): Use byte instead
47484 of constant 0 offset.
47486 2023-03-02 Robert Suchanek <robert.suchanek@imgtec.com>
47488 * config/mips/mips.cc (mips_set_text_contents_type): Use HOST_WIDE_INT
47490 * config/mips/mips-protos.h (mips_set_text_contents_type): Likewise.
47492 2023-03-02 Junxian Zhu <zhujunxian@oss.cipunited.com>
47494 * config.gcc: add -with-{no-}msa build option.
47495 * config/mips/mips.h: Likewise.
47496 * doc/install.texi: Likewise.
47498 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
47500 PR tree-optimization/108603
47501 * explow.cc (convert_memory_address_addr_space_1): Only wrap
47502 the result of a recursive call in a CONST if no instructions
47505 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
47507 PR tree-optimization/108430
47508 * tree-vect-stmts.cc (vectorizable_condition): Fix handling
47509 of inverted condition.
47511 2023-03-02 Jakub Jelinek <jakub@redhat.com>
47514 * fold-const.cc (native_interpret_expr) <case REAL_CST>: Before memcmp
47515 comparison copy the bytes from ptr to a temporary buffer and clearing
47516 padding bits in there.
47518 2023-03-01 Tobias Burnus <tobias@codesourcery.com>
47520 PR middle-end/108545
47521 * gimplify.cc (struct tree_operand_hash_no_se): New.
47522 (omp_index_mapping_groups_1, omp_index_mapping_groups,
47523 omp_reindex_mapping_groups, omp_mapped_by_containing_struct,
47524 omp_tsort_mapping_groups_1, omp_tsort_mapping_groups,
47525 oacc_resolve_clause_dependencies, omp_build_struct_sibling_lists,
47526 gimplify_scan_omp_clauses): Use tree_operand_hash_no_se instead
47527 of tree_operand_hash.
47529 2023-03-01 LIU Hao <lh_mouse@126.com>
47532 * config/i386/host-mingw32.cc (mingw32_gt_pch_get_address):
47533 Remove the size limit `pch_VA_max_size`
47535 2023-03-01 Tobias Burnus <tobias@codesourcery.com>
47537 PR middle-end/108546
47538 * omp-low.cc (lower_omp_target): Remove optional handling
47539 on the receiver side, i.e. inside target (data), for
47542 2023-03-01 Jakub Jelinek <jakub@redhat.com>
47545 * cfgexpand.cc (expand_debug_expr): Handle WIDEN_{PLUS,MINUS}_EXPR
47546 and VEC_WIDEN_{PLUS,MINUS}_{HI,LO}_EXPR.
47548 2023-03-01 Richard Biener <rguenther@suse.de>
47550 PR tree-optimization/108970
47551 * tree-vect-loop-manip.cc (slpeel_can_duplicate_loop_p):
47552 Check we can copy the BBs.
47553 (slpeel_tree_duplicate_loop_to_edge_cfg): Avoid redundant
47555 (vect_do_peeling): Streamline error handling.
47557 2023-03-01 Richard Biener <rguenther@suse.de>
47559 PR tree-optimization/108950
47560 * tree-vect-patterns.cc (vect_recog_widen_sum_pattern):
47561 Check oprnd0 is defined in the loop.
47562 * tree-vect-loop.cc (vectorizable_reduction): Record all
47563 operands vector types, compute that of invariants and
47564 properly update their SLP nodes.
47566 2023-03-01 Kewen Lin <linkw@linux.ibm.com>
47569 * config/rs6000/rs6000.cc (rs6000_option_override_internal): Allow
47570 implicit powerpc64 setting to be unset if 64 bit is enabled implicitly.
47572 2023-02-28 Qing Zhao <qing.zhao@oracle.com>
47574 PR middle-end/107411
47575 PR middle-end/107411
47576 * gimplify.cc (gimple_add_init_for_auto_var): Use sprintf to replace
47578 * tree-ssa-uninit.cc (warn_uninit): Handle the case when the
47579 LHS varaible of a .DEFERRED_INIT call doesn't have a DECL_NAME.
47581 2023-02-28 Jakub Jelinek <jakub@redhat.com>
47583 PR sanitizer/108894
47584 * ubsan.cc (ubsan_expand_bounds_ifn): Emit index >= bound
47585 comparison rather than index > bound.
47586 * gimple-fold.cc (gimple_fold_call): Use tree_int_cst_lt
47587 rather than tree_int_cst_le for IFN_UBSAN_BOUND comparison.
47588 * doc/invoke.texi (-fsanitize=bounds): Document that whether
47589 flexible array member-like arrays are instrumented or not depends
47590 on -fstrict-flex-arrays* options of strict_flex_array attributes.
47591 (-fsanitize=bounds-strict): Document that flexible array members
47592 are not instrumented.
47594 2023-02-27 Uroš Bizjak <ubizjak@gmail.com>
47598 * config/i386/i386.md (fmodxf3): Enable for flag_finite_math_only only.
47599 (fmod<mode>3): Ditto.
47600 (fpremxf4_i387): Ditto.
47601 (reminderxf3): Ditto.
47602 (reminder<mode>3): Ditto.
47603 (fprem1xf4_i387): Ditto.
47605 2023-02-27 Roger Sayle <roger@nextmovesoftware.com>
47607 * simplify-rtx.cc (simplify_unary_operation_1) <case FFS>: Avoid
47608 generating FFS with mismatched operand and result modes, by using
47609 an explicit SIGN_EXTEND/ZERO_EXTEND.
47610 <case POPCOUNT>: Likewise, for POPCOUNT of ZERO_EXTEND.
47611 <case PARITY>: Likewise, for PARITY of {ZERO,SIGN}_EXTEND.
47613 2023-02-27 Patrick Palka <ppalka@redhat.com>
47615 * hash-table.h (gt_pch_nx(hash_table<D>)): Remove static.
47616 * lra-int.h (lra_change_class): Likewise.
47617 * recog.h (which_op_alt): Likewise.
47618 * sel-sched-ir.h (sel_bb_empty_or_nop_p): Declare inline
47621 2023-02-27 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
47623 * config/xtensa/xtensa-protos.h (xtensa_match_CLAMPS_imms_p):
47625 * config/xtensa/xtensa.cc (xtensa_match_CLAMPS_imms_p):
47627 * config/xtensa/xtensa.h (TARGET_CLAMPS): New macro definition.
47628 * config/xtensa/xtensa.md (*xtensa_clamps): New insn pattern.
47630 2023-02-27 Max Filippov <jcmvbkbc@gmail.com>
47632 * config/xtensa/xtensa-dynconfig.cc (xtensa_get_config_v2)
47633 (xtensa_get_config_v3): New functions.
47635 2023-02-27 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
47637 * config/aarch64/aarch64-simd.md (aarch64_abs<mode>): Fix typo in comment.
47639 2023-02-27 Lulu Cheng <chenglulu@loongson.cn>
47641 * config/host-linux.cc (TRY_EMPTY_VM_SPACE): Modify the value of
47642 the macro to 0x1000000000.
47644 2023-02-25 Gaius Mulley <gaiusmod2@gmail.com>
47647 * doc/gm2.texi (-fm2-pathname): New option documented.
47648 (-fm2-pathnameI): New option documented.
47649 (-fm2-prefix=): New option documented.
47650 (-fruntime-modules=): Update default module list.
47652 2023-02-25 Max Filippov <jcmvbkbc@gmail.com>
47655 * config/xtensa/xtensa-protos.h
47656 (xtensa_prepare_expand_call): Rename to xtensa_expand_call.
47657 * config/xtensa/xtensa.cc (xtensa_prepare_expand_call): Rename
47658 to xtensa_expand_call.
47659 (xtensa_expand_call): Emit the call and add a clobber expression
47660 for the static chain to it in case of windowed ABI.
47661 * config/xtensa/xtensa.md (call, call_value, sibcall)
47662 (sibcall_value): Call xtensa_expand_call and complete expansion
47663 right after that call.
47665 2023-02-24 Richard Biener <rguenther@suse.de>
47667 * vec.h (vec<T, A, vl_embed>::m_vecdata): Remove.
47668 (vec<T, A, vl_embed>::m_vecpfx): Align as T to avoid
47669 changing alignment of vec<T, A, vl_embed> and simplifying
47671 (vec<T, A, vl_embed>::address): Compute as this + 1.
47672 (vec<T, A, vl_embed>::embedded_size): Use sizeof the
47673 vector instead of the offset of the m_vecdata member.
47674 (auto_vec<T, N>::m_data): Turn storage into
47675 uninitialized unsigned char.
47676 (auto_vec<T, N>::auto_vec): Allow allocation of one
47677 stack member. Initialize m_vec in a special way to
47678 avoid later stringop overflow diagnostics.
47679 * vec.cc (test_auto_alias): New.
47680 (vec_cc_tests): Call it.
47682 2023-02-24 Richard Biener <rguenther@suse.de>
47684 * vec.h (vec<T, A, vl_embed>::lower_bound): Adjust to
47685 take a const reference to the object, use address to
47687 (vec<T, A, vl_embed>::contains): Use address to access data.
47688 (vec<T, A, vl_embed>::operator[]): Use address instead of
47689 m_vecdata to access data.
47690 (vec<T, A, vl_embed>::iterate): Likewise.
47691 (vec<T, A, vl_embed>::copy): Likewise.
47692 (vec<T, A, vl_embed>::quick_push): Likewise.
47693 (vec<T, A, vl_embed>::pop): Likewise.
47694 (vec<T, A, vl_embed>::quick_insert): Likewise.
47695 (vec<T, A, vl_embed>::ordered_remove): Likewise.
47696 (vec<T, A, vl_embed>::unordered_remove): Likewise.
47697 (vec<T, A, vl_embed>::block_remove): Likewise.
47698 (vec<T, A, vl_heap>::address): Likewise.
47700 2023-02-24 Martin Liska <mliska@suse.cz>
47702 PR sanitizer/108834
47703 * asan.cc (asan_add_global): Use proper TU name for normal
47704 global variables (and aux_base_name for the artificial one).
47706 2023-02-24 Jakub Jelinek <jakub@redhat.com>
47708 * config/i386/i386-builtin.def: Update description of BDESC
47709 and BDESC_FIRST in file comment to include mask2.
47711 2023-02-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
47713 * config/aarch64/aarch64-cores.def (FLAGS): Update comment.
47715 2023-02-24 Jakub Jelinek <jakub@redhat.com>
47717 PR middle-end/108854
47718 * cgraphclones.cc (duplicate_thunk_for_node): If no parameter
47719 changes are needed, copy at least DECL_ARGUMENTS PARM_DECL
47720 nodes and adjust their DECL_CONTEXT.
47722 2023-02-24 Jakub Jelinek <jakub@redhat.com>
47725 * config/i386/i386-builtin.def (__builtin_ia32_cvtne2ps2bf16_v16bf,
47726 __builtin_ia32_cvtne2ps2bf16_v16bf_mask,
47727 __builtin_ia32_cvtne2ps2bf16_v16bf_maskz,
47728 __builtin_ia32_cvtne2ps2bf16_v8bf,
47729 __builtin_ia32_cvtne2ps2bf16_v8bf_mask,
47730 __builtin_ia32_cvtne2ps2bf16_v8bf_maskz,
47731 __builtin_ia32_cvtneps2bf16_v8sf_mask,
47732 __builtin_ia32_cvtneps2bf16_v8sf_maskz,
47733 __builtin_ia32_cvtneps2bf16_v4sf_mask,
47734 __builtin_ia32_cvtneps2bf16_v4sf_maskz,
47735 __builtin_ia32_dpbf16ps_v8sf, __builtin_ia32_dpbf16ps_v8sf_mask,
47736 __builtin_ia32_dpbf16ps_v8sf_maskz, __builtin_ia32_dpbf16ps_v4sf,
47737 __builtin_ia32_dpbf16ps_v4sf_mask,
47738 __builtin_ia32_dpbf16ps_v4sf_maskz): Require also
47739 OPTION_MASK_ISA_AVX512VL.
47741 2023-02-24 Sebastian Huber <sebastian.huber@embedded-brains.de>
47743 * config/riscv/t-rtems: Keep only -mcmodel=medany 64-bit multilibs.
47744 Add non-compact 32-bit multilibs.
47746 2023-02-24 Junxian Zhu <zhujunxian@oss.cipunited.com>
47748 * config/mips/mips.md (*clo<mode>2): New pattern.
47750 2023-02-24 Prachi Godbole <prachi.godbole@imgtec.com>
47752 * config/mips/mips.h (machine_function): New variable
47753 use_hazard_barrier_return_p.
47754 * config/mips/mips.md (UNSPEC_JRHB): New unspec.
47755 (mips_hb_return_internal): New insn pattern.
47756 * config/mips/mips.cc (mips_attribute_table): Add attribute
47757 use_hazard_barrier_return.
47758 (mips_use_hazard_barrier_return_p): New static function.
47759 (mips_function_attr_inlinable_p): Likewise.
47760 (mips_compute_frame_info): Set use_hazard_barrier_return_p.
47761 Emit error for unsupported architecture choice.
47762 (mips_function_ok_for_sibcall, mips_can_use_return_insn):
47763 Return false for use_hazard_barrier_return.
47764 (mips_expand_epilogue): Emit hazard barrier return.
47765 * doc/extend.texi: Document use_hazard_barrier_return.
47767 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
47769 * config/xtensa/xtensa-dynconfig.cc (config.h, system.h)
47770 (coretypes.h, diagnostic.h, intl.h): Use "..." instead of <...>
47771 for the gcc-internal headers.
47773 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
47775 * config/xtensa/t-xtensa (xtensa-dynconfig.o): Use $(COMPILE)
47776 and $(POSTCOMPILE) instead of manual dependency listing.
47777 * config/xtensa/xtensa-dynconfig.c: Rename to ...
47778 * config/xtensa/xtensa-dynconfig.cc: ... this.
47780 2023-02-23 Arsen Arsenović <arsen@aarsen.me>
47782 * doc/cfg.texi: Reorder index entries around @items.
47783 * doc/cpp.texi: Ditto.
47784 * doc/cppenv.texi: Ditto.
47785 * doc/cppopts.texi: Ditto.
47786 * doc/generic.texi: Ditto.
47787 * doc/install.texi: Ditto.
47788 * doc/extend.texi: Ditto.
47789 * doc/invoke.texi: Ditto.
47790 * doc/md.texi: Ditto.
47791 * doc/rtl.texi: Ditto.
47792 * doc/tm.texi.in: Ditto.
47793 * doc/trouble.texi: Ditto.
47794 * doc/tm.texi: Regenerate.
47796 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
47798 * config/xtensa/xtensa.md: New peephole2 pattern that eliminates
47799 the occurrence of general-purpose register used only once and for
47800 transferring intermediate value.
47802 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
47804 * config/xtensa/xtensa.cc (machine_function): Add new member
47805 'eliminated_callee_saved_bmp'.
47806 (xtensa_can_eliminate_callee_saved_reg_p): New function to
47807 determine whether the register can be eliminated or not.
47808 (xtensa_expand_prologue): Add invoking the above function and
47809 elimination the use of callee-saved register by using its stack
47810 slot through the stack pointer (or the frame pointer if needed)
47812 (xtensa_expand_prologue): Modify to not emit register restoration
47813 insn from its stack slot if the register is already eliminated.
47815 2023-02-23 Jakub Jelinek <jakub@redhat.com>
47817 PR translation/108890
47818 * config/xtensa/xtensa-dynconfig.c (xtensa_load_config): Drop _()s
47819 around fatal_error format strings.
47821 2023-02-23 Richard Biener <rguenther@suse.de>
47823 * tree-ssa-structalias.cc (handle_lhs_call): Do not
47824 re-create rhsc, only truncate it.
47826 2023-02-23 Jakub Jelinek <jakub@redhat.com>
47828 PR middle-end/106258
47829 * ipa-prop.cc (try_make_edge_direct_virtual_call): Handle
47830 BUILT_IN_UNREACHABLE_TRAP like BUILT_IN_UNREACHABLE.
47832 2023-02-23 Richard Biener <rguenther@suse.de>
47834 * tree-if-conv.cc (tree_if_conversion): Properly manage
47835 memory of refs and the contained data references.
47837 2023-02-23 Richard Biener <rguenther@suse.de>
47839 PR tree-optimization/108888
47840 * tree-if-conv.cc (if_convertible_stmt_p): Set PLF_2 on
47841 calls to predicate.
47842 (predicate_statements): Only predicate calls with PLF_2.
47844 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
47846 * config/xtensa/xtensa.md
47847 (zero_cost_loop_start, zero_cost_loop_end, loop_end):
47848 Add missing "SI:" to PLUS RTXes.
47850 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
47853 * config/xtensa/xtensa.cc (xtensa_expand_epilogue):
47854 Emit (use (reg:SI A0_REG)) at the end in the sibling call
47855 (i.e. the same place as (return) in the normal call).
47857 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
47860 2023-02-21 Max Filippov <jcmvbkbc@gmail.com>
47863 * config/xtensa/xtensa.cc (xtensa_expand_epilogue): Drop emit_use
47865 * config/xtensa/xtensa.md (sibcall, sibcall_internal)
47866 (sibcall_value, sibcall_value_internal): Add 'use' expression
47869 2023-02-23 Arsen Arsenović <arsen@aarsen.me>
47871 * doc/cppdiropts.texi: Reorder @opindex commands to precede
47872 @items they relate to.
47873 * doc/cppopts.texi: Ditto.
47874 * doc/cppwarnopts.texi: Ditto.
47875 * doc/invoke.texi: Ditto.
47876 * doc/lto.texi: Ditto.
47878 2023-02-22 Andrew Stubbs <ams@codesourcery.com>
47880 * internal-fn.cc (expand_MASK_CALL): New.
47881 * internal-fn.def (MASK_CALL): New.
47882 * internal-fn.h (expand_MASK_CALL): New prototype.
47883 * omp-simd-clone.cc (simd_clone_adjust_argument_types): Set vector_type
47884 for mask arguments also.
47885 * tree-if-conv.cc: Include cgraph.h.
47886 (if_convertible_stmt_p): Do if conversions for calls to SIMD calls.
47887 (predicate_statements): Convert functions to IFN_MASK_CALL.
47888 * tree-vect-loop.cc (vect_get_datarefs_in_loop): Recognise
47889 IFN_MASK_CALL as a SIMD function call.
47890 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Handle
47891 IFN_MASK_CALL as an inbranch SIMD function call.
47892 Generate the mask vector arguments.
47894 2023-02-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
47896 * config/riscv/riscv-vector-builtins-bases.cc (class reducop): New class.
47897 (class widen_reducop): Ditto.
47898 (class freducop): Ditto.
47899 (class widen_freducop): Ditto.
47901 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
47902 * config/riscv/riscv-vector-builtins-functions.def (vredsum): Add reduction support.
47911 (vwredsumu): Ditto.
47912 (vfredusum): Ditto.
47913 (vfredosum): Ditto.
47916 (vfwredosum): Ditto.
47917 (vfwredusum): Ditto.
47918 * config/riscv/riscv-vector-builtins-shapes.cc (struct reduc_alu_def): Ditto.
47920 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
47921 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WI_OPS): New macro.
47922 (DEF_RVV_WU_OPS): Ditto.
47923 (DEF_RVV_WF_OPS): Ditto.
47924 (vint8mf8_t): Ditto.
47925 (vint8mf4_t): Ditto.
47926 (vint8mf2_t): Ditto.
47927 (vint8m1_t): Ditto.
47928 (vint8m2_t): Ditto.
47929 (vint8m4_t): Ditto.
47930 (vint8m8_t): Ditto.
47931 (vint16mf4_t): Ditto.
47932 (vint16mf2_t): Ditto.
47933 (vint16m1_t): Ditto.
47934 (vint16m2_t): Ditto.
47935 (vint16m4_t): Ditto.
47936 (vint16m8_t): Ditto.
47937 (vint32mf2_t): Ditto.
47938 (vint32m1_t): Ditto.
47939 (vint32m2_t): Ditto.
47940 (vint32m4_t): Ditto.
47941 (vint32m8_t): Ditto.
47942 (vuint8mf8_t): Ditto.
47943 (vuint8mf4_t): Ditto.
47944 (vuint8mf2_t): Ditto.
47945 (vuint8m1_t): Ditto.
47946 (vuint8m2_t): Ditto.
47947 (vuint8m4_t): Ditto.
47948 (vuint8m8_t): Ditto.
47949 (vuint16mf4_t): Ditto.
47950 (vuint16mf2_t): Ditto.
47951 (vuint16m1_t): Ditto.
47952 (vuint16m2_t): Ditto.
47953 (vuint16m4_t): Ditto.
47954 (vuint16m8_t): Ditto.
47955 (vuint32mf2_t): Ditto.
47956 (vuint32m1_t): Ditto.
47957 (vuint32m2_t): Ditto.
47958 (vuint32m4_t): Ditto.
47959 (vuint32m8_t): Ditto.
47960 (vfloat32mf2_t): Ditto.
47961 (vfloat32m1_t): Ditto.
47962 (vfloat32m2_t): Ditto.
47963 (vfloat32m4_t): Ditto.
47964 (vfloat32m8_t): Ditto.
47965 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WI_OPS): Ditto.
47966 (DEF_RVV_WU_OPS): Ditto.
47967 (DEF_RVV_WF_OPS): Ditto.
47968 (required_extensions_p): Add reduction support.
47969 (rvv_arg_type_info::get_base_vector_type): Ditto.
47970 (rvv_arg_type_info::get_tree_type): Ditto.
47971 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
47972 * config/riscv/riscv.md: Ditto.
47973 * config/riscv/vector-iterators.md (minu): Ditto.
47974 * config/riscv/vector.md (@pred_reduc_<reduc><mode><vlmul1>): New patern.
47975 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Ditto.
47976 (@pred_widen_reduc_plus<v_su><mode><vwlmul1>): Ditto.
47977 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve32>):Ditto.
47978 (@pred_reduc_plus<order><mode><vlmul1>): Ditto.
47979 (@pred_reduc_plus<order><mode><vlmul1_zve32>): Ditto.
47980 (@pred_widen_reduc_plus<order><mode><vwlmul1>): Ditto.
47982 2023-02-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
47984 * config/riscv/iterators.md: New iterator.
47985 * config/riscv/riscv-vector-builtins-bases.cc (class widen_binop): New class.
47986 (enum ternop_type): New enum.
47987 (class vmacc): New class.
47988 (class imac): Ditto.
47989 (class vnmsac): Ditto.
47990 (enum widen_ternop_type): New enum.
47991 (class vmadd): Ditto.
47992 (class vnmsub): Ditto.
47993 (class iwmac): Ditto.
47994 (class vwmacc): Ditto.
47995 (class vwmaccu): Ditto.
47996 (class vwmaccsu): Ditto.
47997 (class vwmaccus): Ditto.
47998 (class reverse_binop): Ditto.
47999 (class vfmacc): Ditto.
48000 (class vfnmsac): Ditto.
48001 (class vfmadd): Ditto.
48002 (class vfnmsub): Ditto.
48003 (class vfnmacc): Ditto.
48004 (class vfmsac): Ditto.
48005 (class vfnmadd): Ditto.
48006 (class vfmsub): Ditto.
48007 (class vfwmacc): Ditto.
48008 (class vfwnmacc): Ditto.
48009 (class vfwmsac): Ditto.
48010 (class vfwnmsac): Ditto.
48011 (class float_misc): Ditto.
48012 (class fcmp): Ditto.
48013 (class vfclass): Ditto.
48014 (class vfcvt_x): Ditto.
48015 (class vfcvt_rtz_x): Ditto.
48016 (class vfcvt_f): Ditto.
48017 (class vfwcvt_x): Ditto.
48018 (class vfwcvt_rtz_x): Ditto.
48019 (class vfwcvt_f): Ditto.
48020 (class vfncvt_x): Ditto.
48021 (class vfncvt_rtz_x): Ditto.
48022 (class vfncvt_f): Ditto.
48023 (class vfncvt_rod_f): Ditto.
48025 * config/riscv/riscv-vector-builtins-bases.h:
48026 * config/riscv/riscv-vector-builtins-functions.def (vzext): Ditto.
48070 (vfcvt_rtz_x): Ditto.
48071 (vfcvt_rtz_xu): Ditto.
48074 (vfwcvt_xu): Ditto.
48075 (vfwcvt_rtz_x): Ditto.
48076 (vfwcvt_rtz_xu): Ditto.
48079 (vfncvt_xu): Ditto.
48080 (vfncvt_rtz_x): Ditto.
48081 (vfncvt_rtz_xu): Ditto.
48083 (vfncvt_rod_f): Ditto.
48084 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
48085 (struct move_def): Ditto.
48086 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WEXTF_OPS): New macro.
48087 (DEF_RVV_CONVERT_I_OPS): Ditto.
48088 (DEF_RVV_CONVERT_U_OPS): Ditto.
48089 (DEF_RVV_WCONVERT_I_OPS): Ditto.
48090 (DEF_RVV_WCONVERT_U_OPS): Ditto.
48091 (DEF_RVV_WCONVERT_F_OPS): Ditto.
48092 (vfloat64m1_t): Ditto.
48093 (vfloat64m2_t): Ditto.
48094 (vfloat64m4_t): Ditto.
48095 (vfloat64m8_t): Ditto.
48096 (vint32mf2_t): Ditto.
48097 (vint32m1_t): Ditto.
48098 (vint32m2_t): Ditto.
48099 (vint32m4_t): Ditto.
48100 (vint32m8_t): Ditto.
48101 (vint64m1_t): Ditto.
48102 (vint64m2_t): Ditto.
48103 (vint64m4_t): Ditto.
48104 (vint64m8_t): Ditto.
48105 (vuint32mf2_t): Ditto.
48106 (vuint32m1_t): Ditto.
48107 (vuint32m2_t): Ditto.
48108 (vuint32m4_t): Ditto.
48109 (vuint32m8_t): Ditto.
48110 (vuint64m1_t): Ditto.
48111 (vuint64m2_t): Ditto.
48112 (vuint64m4_t): Ditto.
48113 (vuint64m8_t): Ditto.
48114 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_CONVERT_I_OPS): Ditto.
48115 (DEF_RVV_CONVERT_U_OPS): Ditto.
48116 (DEF_RVV_WCONVERT_I_OPS): Ditto.
48117 (DEF_RVV_WCONVERT_U_OPS): Ditto.
48118 (DEF_RVV_WCONVERT_F_OPS): Ditto.
48119 (DEF_RVV_F_OPS): Ditto.
48120 (DEF_RVV_WEXTF_OPS): Ditto.
48121 (required_extensions_p): Adjust for floating-point support.
48122 (check_required_extensions): Ditto.
48123 (unsigned_base_type_p): Ditto.
48124 (get_mode_for_bitsize): Ditto.
48125 (rvv_arg_type_info::get_base_vector_type): Ditto.
48126 (rvv_arg_type_info::get_tree_type): Ditto.
48127 * config/riscv/riscv-vector-builtins.def (v_f): New define.
48130 (xu_v): New define.
48132 (xu_w): New define.
48133 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): New enum.
48134 (function_expander::arg_mode): New function.
48135 * config/riscv/vector-iterators.md (sof): New iterator.
48141 (fixuns_trunc): Ditto.
48143 * config/riscv/vector.md (@pred_broadcast<mode>): New pattern.
48144 (@pred_<optab><mode>): Ditto.
48145 (@pred_<optab><mode>_scalar): Ditto.
48146 (@pred_<optab><mode>_reverse_scalar): Ditto.
48147 (@pred_<copysign><mode>): Ditto.
48148 (@pred_<copysign><mode>_scalar): Ditto.
48149 (@pred_mul_<optab><mode>): Ditto.
48150 (pred_mul_<optab><mode>_undef_merge): Ditto.
48151 (*pred_<madd_nmsub><mode>): Ditto.
48152 (*pred_<macc_nmsac><mode>): Ditto.
48153 (*pred_mul_<optab><mode>): Ditto.
48154 (@pred_mul_<optab><mode>_scalar): Ditto.
48155 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
48156 (*pred_<madd_nmsub><mode>_scalar): Ditto.
48157 (*pred_<macc_nmsac><mode>_scalar): Ditto.
48158 (*pred_mul_<optab><mode>_scalar): Ditto.
48159 (@pred_neg_mul_<optab><mode>): Ditto.
48160 (pred_neg_mul_<optab><mode>_undef_merge): Ditto.
48161 (*pred_<nmadd_msub><mode>): Ditto.
48162 (*pred_<nmacc_msac><mode>): Ditto.
48163 (*pred_neg_mul_<optab><mode>): Ditto.
48164 (@pred_neg_mul_<optab><mode>_scalar): Ditto.
48165 (*pred_neg_mul_<optab><mode>_undef_merge_scalar): Ditto.
48166 (*pred_<nmadd_msub><mode>_scalar): Ditto.
48167 (*pred_<nmacc_msac><mode>_scalar): Ditto.
48168 (*pred_neg_mul_<optab><mode>_scalar): Ditto.
48169 (@pred_<misc_op><mode>): Ditto.
48170 (@pred_class<mode>): Ditto.
48171 (@pred_dual_widen_<optab><mode>): Ditto.
48172 (@pred_dual_widen_<optab><mode>_scalar): Ditto.
48173 (@pred_single_widen_<plus_minus:optab><mode>): Ditto.
48174 (@pred_single_widen_<plus_minus:optab><mode>_scalar): Ditto.
48175 (@pred_widen_mul_<optab><mode>): Ditto.
48176 (@pred_widen_mul_<optab><mode>_scalar): Ditto.
48177 (@pred_widen_neg_mul_<optab><mode>): Ditto.
48178 (@pred_widen_neg_mul_<optab><mode>_scalar): Ditto.
48179 (@pred_cmp<mode>): Ditto.
48180 (*pred_cmp<mode>): Ditto.
48181 (*pred_cmp<mode>_narrow): Ditto.
48182 (@pred_cmp<mode>_scalar): Ditto.
48183 (*pred_cmp<mode>_scalar): Ditto.
48184 (*pred_cmp<mode>_scalar_narrow): Ditto.
48185 (@pred_eqne<mode>_scalar): Ditto.
48186 (*pred_eqne<mode>_scalar): Ditto.
48187 (*pred_eqne<mode>_scalar_narrow): Ditto.
48188 (@pred_merge<mode>_scalar): Ditto.
48189 (@pred_fcvt_x<v_su>_f<mode>): Ditto.
48190 (@pred_<fix_cvt><mode>): Ditto.
48191 (@pred_<float_cvt><mode>): Ditto.
48192 (@pred_widen_fcvt_x<v_su>_f<mode>): Ditto.
48193 (@pred_widen_<fix_cvt><mode>): Ditto.
48194 (@pred_widen_<float_cvt><mode>): Ditto.
48195 (@pred_extend<mode>): Ditto.
48196 (@pred_narrow_fcvt_x<v_su>_f<mode>): Ditto.
48197 (@pred_narrow_<fix_cvt><mode>): Ditto.
48198 (@pred_narrow_<float_cvt><mode>): Ditto.
48199 (@pred_trunc<mode>): Ditto.
48200 (@pred_rod_trunc<mode>): Ditto.
48202 2023-02-22 Jakub Jelinek <jakub@redhat.com>
48204 PR middle-end/106258
48205 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee,
48206 cgraph_update_edges_for_call_stmt_node, cgraph_node::verify_node):
48207 Handle BUILT_IN_UNREACHABLE_TRAP like BUILT_IN_UNREACHABLE.
48208 * cgraphclones.cc (cgraph_node::create_clone): Likewise.
48210 2023-02-22 Thomas Schwinge <thomas@codesourcery.com>
48212 * common.opt (-Wcomplain-wrong-lang): New.
48213 * doc/invoke.texi (-Wno-complain-wrong-lang): Document it.
48214 * opts-common.cc (prune_options): Handle it.
48215 * opts-global.cc (complain_wrong_lang): Use it.
48217 2023-02-21 David Malcolm <dmalcolm@redhat.com>
48220 * doc/invoke.texi: Document -fno-analyzer-suppress-followups.
48222 2023-02-21 Max Filippov <jcmvbkbc@gmail.com>
48225 * config/xtensa/xtensa.cc (xtensa_expand_epilogue): Drop emit_use
48227 * config/xtensa/xtensa.md (sibcall, sibcall_internal)
48228 (sibcall_value, sibcall_value_internal): Add 'use' expression
48231 2023-02-21 Richard Biener <rguenther@suse.de>
48233 PR tree-optimization/108691
48234 * tree-ssa-dce.cc (eliminate_unnecessary_stmts): Remove
48235 assert about calls_setjmp not becoming true when it was false.
48237 2023-02-21 Richard Biener <rguenther@suse.de>
48239 PR tree-optimization/108793
48240 * tree-ssa-loop-niter.cc (number_of_iterations_until_wrap):
48241 Use convert operands to niter_type when computing num.
48243 2023-02-21 Richard Biener <rguenther@suse.de>
48246 2023-02-13 Richard Biener <rguenther@suse.de>
48248 PR tree-optimization/108691
48249 * tree-cfg.cc (notice_special_calls): When the CFG is built
48250 honor gimple_call_ctrl_altering_p.
48251 * cfgexpand.cc (expand_call_stmt): Clear cfun->calls_setjmp
48252 temporarily if the call is not control-altering.
48253 * calls.cc (emit_call_1): Do not add REG_SETJMP if
48254 cfun->calls_setjmp is not set. Do not alter cfun->calls_setjmp.
48256 2023-02-21 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
48258 * config/xtensa/xtensa.cc (xtensa_call_save_reg): Change to return
48259 true if register A0 (return address register) when -Og is specified.
48261 2023-02-20 Uroš Bizjak <ubizjak@gmail.com>
48263 * config/i386/predicates.md
48264 (general_x64constmem_operand): New predicate.
48265 * config/i386/i386.md (*cmpqi_ext<mode>_1):
48266 Use nonimm_x64constmem_operand.
48267 (*cmpqi_ext<mode>_3): Use general_x64constmem_operand.
48268 (*addqi_ext<mode>_1): Ditto.
48269 (*testqi_ext<mode>_1): Ditto.
48270 (*andqi_ext<mode>_1): Ditto.
48271 (*andqi_ext<mode>_1_cc): Ditto.
48272 (*<any_or:code>qi_ext<mode>_1): Ditto.
48273 (*xorqi_ext<mode>_1_cc): Ditto.
48275 2023-02-20 Jakub Jelinek <jakub2redhat.com>
48278 * config/rs6000/rs6000.md (umaddditi4): Swap gen_maddlddi4 with
48279 gen_umadddi4_highpart{,_le}.
48281 2023-02-20 Kito Cheng <kito.cheng@sifive.com>
48283 * config/riscv/riscv.md (prefetch): Use r instead of p for the
48285 (riscv_prefetchi_<mode>): Ditto.
48287 2023-02-20 Richard Biener <rguenther@suse.de>
48289 PR tree-optimization/108816
48290 * tree-vect-loop-manip.cc (vect_loop_versioning): Adjust
48291 versioning condition split prerequesite, assert required
48294 2023-02-20 Richard Biener <rguenther@suse.de>
48296 PR tree-optimization/108825
48297 * tree-ssa-loop-manip.cc (verify_loop_closed_ssa): For
48298 loop-local verfication only verify there's no pending SSA
48301 2023-02-20 Richard Biener <rguenther@suse.de>
48303 PR tree-optimization/108819
48304 * tree-ssa-loop-niter.cc (number_of_iterations_cltz): Check
48305 we have an SSA name as iv_2 as expected.
48307 2023-02-18 Jakub Jelinek <jakub@redhat.com>
48309 PR tree-optimization/108819
48310 * tree-ssa-reassoc.cc (update_ops): Fold new stmt in place.
48312 2023-02-18 Jakub Jelinek <jakub@redhat.com>
48315 * config/i386/i386-protos.h (ix86_replace_reg_with_reg): Declare.
48316 * config/i386/i386-expand.cc (ix86_replace_reg_with_reg): New
48318 * config/i386/i386.md: Replace replace_rtx calls in all peephole2s
48319 with ix86_replace_reg_with_reg.
48321 2023-02-18 Gerald Pfeifer <gerald@pfeifer.com>
48323 * doc/invoke.texi (AVR Options): Update link to AVR-LibC.
48325 2023-02-18 Xi Ruoyao <xry111@xry111.site>
48327 * config.gcc (triplet_abi): Set its value based on $with_abi,
48328 instead of $target.
48329 (la_canonical_triplet): Set it after $triplet_abi is set
48331 * config/loongarch/t-linux (MULTILIB_OSDIRNAMES): Make the
48332 multiarch tuple for lp64d "loongarch64-linux-gnu" (without
48335 2023-02-18 Andrew Pinski <apinski@marvell.com>
48337 * match.pd: Remove #if GIMPLE around the
48340 2023-02-18 Andrew Pinski <apinski@marvell.com>
48342 * value-query.h (get_range_query): Return the global ranges
48343 for a nullptr func.
48345 2023-02-17 Siddhesh Poyarekar <siddhesh@gotplt.org>
48347 * doc/invoke.texi (@item -Wall): Fix typo in
48350 2023-02-17 Uroš Bizjak <ubizjak@gmail.com>
48353 * config/i386/predicates.md
48354 (nonimm_x64constmem_operand): New predicate.
48355 * config/i386/i386.md (*addqi_ext<mode>_0): New insn pattern.
48356 (*subqi_ext<mode>_0): Ditto.
48357 (*andqi_ext<mode>_0): Ditto.
48358 (*<any_or:code>qi_ext<mode>_0): Ditto.
48360 2023-02-17 Uroš Bizjak <ubizjak@gmail.com>
48363 * simplify-rtx.cc (simplify_context::simplify_subreg): Use
48364 int_outermode instead of GET_MODE (tem) to prevent
48365 VOIDmode from entering simplify_gen_subreg.
48367 2023-02-17 Richard Biener <rguenther@suse.de>
48369 PR tree-optimization/108821
48370 * tree-ssa-loop-im.cc (sm_seq_valid_bb): We can also not
48371 move volatile accesses.
48373 2023-02-17 Richard Biener <rguenther@suse.de>
48375 * tree-ssa.cc (ssa_undefined_value_p): Assert we are not
48376 called on virtual operands.
48377 * tree-ssa-sccvn.cc (vn_phi_lookup): Guard
48378 ssa_undefined_value_p calls.
48379 (vn_phi_insert): Likewise.
48380 (set_ssa_val_to): Likewise.
48381 (visit_phi): Avoid extra work with equivalences for
48382 virtual operand PHIs.
48384 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
48386 * config/riscv/riscv-vector-builtins-bases.cc (class mask_logic): New
48388 (class mask_nlogic): Ditto.
48389 (class mask_notlogic): Ditto.
48390 (class vmmv): Ditto.
48391 (class vmclr): Ditto.
48392 (class vmset): Ditto.
48393 (class vmnot): Ditto.
48394 (class vcpop): Ditto.
48395 (class vfirst): Ditto.
48396 (class mask_misc): Ditto.
48397 (class viota): Ditto.
48398 (class vid): Ditto.
48400 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
48401 * config/riscv/riscv-vector-builtins-functions.def (vmand): Ditto.
48420 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
48421 (struct mask_alu_def): Ditto.
48423 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
48424 * config/riscv/riscv-vector-builtins.cc: Ditto.
48425 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_insns): Fix bug
48426 for dest it scalar RVV intrinsics.
48427 * config/riscv/vector-iterators.md (sof): New iterator.
48428 * config/riscv/vector.md (@pred_<optab>n<mode>): New pattern.
48429 (@pred_<optab>not<mode>): New pattern.
48430 (@pred_popcount<VB:mode><P:mode>): New pattern.
48431 (@pred_ffs<VB:mode><P:mode>): New pattern.
48432 (@pred_<misc_op><mode>): New pattern.
48433 (@pred_iota<mode>): New pattern.
48434 (@pred_series<mode>): New pattern.
48436 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
48438 * config/riscv/riscv-vector-builtins-functions.def (vadc): Rename.
48442 * config/riscv/riscv-vector-builtins.cc: Ditto.
48444 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
48445 kito-cheng <kito.cheng@sifive.com>
48447 * config/riscv/riscv-protos.h (sew64_scalar_helper): New function.
48448 * config/riscv/riscv-v.cc (has_vi_variant_p): Adjust.
48449 (sew64_scalar_helper): New function.
48450 * config/riscv/vector.md: Normalization.
48452 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
48454 * config/riscv/riscv-vector-builtins-functions.def (vsetvlmax): Rearrange.
48516 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
48518 * config/riscv/vector.md (@pred_<optab><mode>): Rearrange.
48519 (@pred_<optab><mode>_scalar): Ditto.
48520 (*pred_<optab><mode>_scalar): Ditto.
48521 (*pred_<optab><mode>_extended_scalar): Ditto.
48523 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
48525 * config/riscv/riscv-protos.h (riscv_run_selftests): Remove 'extern'.
48526 (init_builtins): Ditto.
48527 (mangle_builtin_type): Ditto.
48528 (verify_type_context): Ditto.
48529 (handle_pragma_vector): Ditto.
48530 (builtin_decl): Ditto.
48531 (expand_builtin): Ditto.
48532 (const_vec_all_same_in_range_p): Ditto.
48533 (legitimize_move): Ditto.
48534 (emit_vlmax_op): Ditto.
48535 (emit_nonvlmax_op): Ditto.
48536 (get_vlmul): Ditto.
48537 (get_ratio): Ditto.
48540 (get_avl_type): Ditto.
48541 (calculate_ratio): Ditto.
48542 (enum vlmul_type): Ditto.
48544 (neg_simm5_p): Ditto.
48545 (has_vi_variant_p): Ditto.
48547 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
48549 * config/riscv/riscv-protos.h (simm32_p): Remove.
48550 * config/riscv/riscv-v.cc (simm32_p): Ditto.
48551 * config/riscv/vector.md: Use immediate_operand
48552 instead of riscv_vector::simm32_p.
48554 2023-02-16 Gerald Pfeifer <gerald@pfeifer.com>
48556 * doc/invoke.texi (Optimize Options): Reword the explanation
48557 getting minimal, maximal and default values of a parameter.
48559 2023-02-16 Patrick Palka <ppalka@redhat.com>
48561 * addresses.h: Mechanically drop 'static' from 'static inline'
48562 functions via s/^static inline/inline/g.
48563 * asan.h: Likewise.
48564 * attribs.h: Likewise.
48565 * basic-block.h: Likewise.
48566 * bitmap.h: Likewise.
48567 * cfghooks.h: Likewise.
48568 * cfgloop.h: Likewise.
48569 * cgraph.h: Likewise.
48570 * cselib.h: Likewise.
48571 * data-streamer.h: Likewise.
48572 * debug.h: Likewise.
48574 * diagnostic.h: Likewise.
48575 * dominance.h: Likewise.
48576 * dumpfile.h: Likewise.
48577 * emit-rtl.h: Likewise.
48578 * except.h: Likewise.
48579 * expmed.h: Likewise.
48580 * expr.h: Likewise.
48581 * fixed-value.h: Likewise.
48582 * gengtype.h: Likewise.
48583 * gimple-expr.h: Likewise.
48584 * gimple-iterator.h: Likewise.
48585 * gimple-predict.h: Likewise.
48586 * gimple-range-fold.h: Likewise.
48587 * gimple-ssa.h: Likewise.
48588 * gimple.h: Likewise.
48589 * graphite.h: Likewise.
48590 * hard-reg-set.h: Likewise.
48591 * hash-map.h: Likewise.
48592 * hash-set.h: Likewise.
48593 * hash-table.h: Likewise.
48594 * hwint.h: Likewise.
48595 * input.h: Likewise.
48596 * insn-addr.h: Likewise.
48597 * internal-fn.h: Likewise.
48598 * ipa-fnsummary.h: Likewise.
48599 * ipa-icf-gimple.h: Likewise.
48600 * ipa-inline.h: Likewise.
48601 * ipa-modref.h: Likewise.
48602 * ipa-prop.h: Likewise.
48603 * ira-int.h: Likewise.
48605 * lra-int.h: Likewise.
48607 * lto-streamer.h: Likewise.
48608 * memmodel.h: Likewise.
48609 * omp-general.h: Likewise.
48610 * optabs-query.h: Likewise.
48611 * optabs.h: Likewise.
48612 * plugin.h: Likewise.
48613 * pretty-print.h: Likewise.
48614 * range.h: Likewise.
48615 * read-md.h: Likewise.
48616 * recog.h: Likewise.
48617 * regs.h: Likewise.
48618 * rtl-iter.h: Likewise.
48620 * sbitmap.h: Likewise.
48621 * sched-int.h: Likewise.
48622 * sel-sched-ir.h: Likewise.
48623 * sese.h: Likewise.
48624 * sparseset.h: Likewise.
48625 * ssa-iterators.h: Likewise.
48626 * system.h: Likewise.
48627 * target-globals.h: Likewise.
48628 * target.h: Likewise.
48629 * timevar.h: Likewise.
48630 * tree-chrec.h: Likewise.
48631 * tree-data-ref.h: Likewise.
48632 * tree-iterator.h: Likewise.
48633 * tree-outof-ssa.h: Likewise.
48634 * tree-phinodes.h: Likewise.
48635 * tree-scalar-evolution.h: Likewise.
48636 * tree-sra.h: Likewise.
48637 * tree-ssa-alias.h: Likewise.
48638 * tree-ssa-live.h: Likewise.
48639 * tree-ssa-loop-manip.h: Likewise.
48640 * tree-ssa-loop.h: Likewise.
48641 * tree-ssa-operands.h: Likewise.
48642 * tree-ssa-propagate.h: Likewise.
48643 * tree-ssa-sccvn.h: Likewise.
48644 * tree-ssa.h: Likewise.
48645 * tree-ssanames.h: Likewise.
48646 * tree-streamer.h: Likewise.
48647 * tree-switch-conversion.h: Likewise.
48648 * tree-vectorizer.h: Likewise.
48649 * tree.h: Likewise.
48650 * wide-int.h: Likewise.
48652 2023-02-16 Jakub Jelinek <jakub@redhat.com>
48654 PR tree-optimization/108657
48655 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): If lhs of stmt
48656 exists and is not a SSA_NAME, call ao_ref_init even if the stmt
48657 is a call to internal or builtin function.
48659 2023-02-16 Jonathan Wakely <jwakely@redhat.com>
48661 * doc/invoke.texi (C++ Dialect Options): Suggest adding a
48662 using-declaration to unhide functions.
48664 2023-02-16 Jakub Jelinek <jakub@redhat.com>
48666 PR tree-optimization/108783
48667 * tree-ssa-reassoc.cc (eliminate_redundant_comparison): If lcode
48668 is equal to TREE_CODE (t), op1 to newop1 and op2 to newop2, set
48669 t to curr->op. Otherwise, punt if either newop1 or newop2 are
48670 SSA_NAME_OCCURS_IN_ABNORMAL_PHI SSA_NAMEs.
48672 2023-02-16 Richard Biener <rguenther@suse.de>
48674 PR tree-optimization/108791
48675 * tree-ssa-forwprop.cc (optimize_vector_load): Build
48676 the ADDR_EXPR of a TARGET_MEM_REF using a more meaningful
48679 2023-02-15 Eric Botcazou <ebotcazou@adacore.com>
48682 * config/i386/i386.cc (ix86_compute_frame_layout): Disable the
48683 effects of -fstack-clash-protection for TARGET_STACK_PROBE.
48684 (ix86_expand_prologue): Likewise.
48686 2023-02-15 Jan-Benedict Glaw <jbglaw@lug-owl.de>
48688 * config/bpf/bpf.cc (bpf_option_override): Fix doubled space.
48690 2023-02-15 Uroš Bizjak <ubizjak@gmail.com>
48692 * config/i386/i386.md (*cmpqi_ext<mode>_1): Use
48693 int248_register_operand predicate in zero_extract sub-RTX.
48694 (*cmpqi_ext<mode>_2): Ditto.
48695 (*cmpqi_ext<mode>_3): Ditto.
48696 (*cmpqi_ext<mode>_4): Ditto.
48697 (*extzvqi_mem_rex64): Ditto.
48699 (*insvqi_1_mem_rex64): Ditto.
48700 (@insv<mode>_1): Ditto.
48701 (*insvqi_1): Ditto.
48702 (*insvqi_2): Ditto.
48703 (*insvqi_3): Ditto.
48704 (*extendqi<SWI24:mode>_ext_1): Ditto.
48705 (*addqi_ext<mode>_1): Ditto.
48706 (*addqi_ext<mode>_2): Ditto.
48707 (*subqi_ext<mode>_2): Ditto.
48708 (*testqi_ext<mode>_1): Ditto.
48709 (*testqi_ext<mode>_2): Ditto.
48710 (*andqi_ext<mode>_1): Ditto.
48711 (*andqi_ext<mode>_1_cc): Ditto.
48712 (*andqi_ext<mode>_2): Ditto.
48713 (*<any_or:code>qi_ext<mode>_1): Ditto.
48714 (*<any_or:code>qi_ext<mode>_2): Ditto.
48715 (*xorqi_ext<mode>_1_cc): Ditto.
48716 (*negqi_ext<mode>_2): Ditto.
48717 (*ashlqi_ext<mode>_2): Ditto.
48718 (*<any_shiftrt:insn>qi_ext<mode>_2): Ditto.
48720 2023-02-15 Uroš Bizjak <ubizjak@gmail.com>
48722 * config/i386/predicates.md (int248_register_operand):
48723 Rename from extr_register_operand.
48724 * config/i386/i386.md (*extv<mode>): Update for renamed predicate.
48725 (*extzx<mode>): Ditto.
48726 (*ashl<dwi>3_doubleword_mask): Use int248_register_operand predicate.
48727 (*ashl<mode>3_mask): Ditto.
48728 (*<any_shiftrt:insn><mode>3_mask): Ditto.
48729 (*<any_shiftrt:insn><dwi>3_doubleword_mask): Ditto.
48730 (*<any_rotate:insn><mode>3_mask): Ditto.
48731 (*<btsc><mode>_mask): Ditto.
48732 (*btr<mode>_mask): Ditto.
48733 (*jcc_bt<mode>_mask_1): Ditto.
48735 2023-02-15 Richard Biener <rguenther@suse.de>
48737 PR middle-end/26854
48738 * df-core.cc (df_worklist_propagate_forward): Put later
48739 blocks on worklist and only earlier blocks on pending.
48740 (df_worklist_propagate_backward): Likewise.
48741 (df_worklist_dataflow_doublequeue): Change the iteration
48742 to process new blocks in the same iteration if that
48743 maintains the iteration order.
48745 2023-02-15 Marek Polacek <polacek@redhat.com>
48747 PR middle-end/106080
48748 * gimple-ssa-warn-access.cc (is_auto_decl): Remove. Use auto_var_p
48751 2023-02-15 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
48753 * config/riscv/predicates.md: Refine codes.
48754 * config/riscv/riscv-protos.h (RVV_VUNDEF): New macro.
48755 * config/riscv/riscv-v.cc: Refine codes.
48756 * config/riscv/riscv-vector-builtins-bases.cc (enum ternop_type): New
48758 (class imac): New class.
48759 (enum widen_ternop_type): New enum.
48760 (class iwmac): New class.
48762 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
48763 * config/riscv/riscv-vector-builtins-functions.def (vmacc): Ditto.
48771 * config/riscv/riscv-vector-builtins.cc
48772 (function_builder::apply_predication): Adjust for multiply-add support.
48773 (function_expander::add_vundef_operand): Refine codes.
48774 (function_expander::use_ternop_insn): New function.
48775 (function_expander::use_widen_ternop_insn): Ditto.
48776 * config/riscv/riscv-vector-builtins.h: New function.
48777 * config/riscv/vector.md (@pred_mul_<optab><mode>): New pattern.
48778 (pred_mul_<optab><mode>_undef_merge): Ditto.
48779 (*pred_<madd_nmsub><mode>): Ditto.
48780 (*pred_<macc_nmsac><mode>): Ditto.
48781 (*pred_mul_<optab><mode>): Ditto.
48782 (@pred_mul_<optab><mode>_scalar): Ditto.
48783 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
48784 (*pred_<madd_nmsub><mode>_scalar): Ditto.
48785 (*pred_<macc_nmsac><mode>_scalar): Ditto.
48786 (*pred_mul_<optab><mode>_scalar): Ditto.
48787 (*pred_mul_<optab><mode>_undef_merge_extended_scalar): Ditto.
48788 (*pred_<madd_nmsub><mode>_extended_scalar): Ditto.
48789 (*pred_<macc_nmsac><mode>_extended_scalar): Ditto.
48790 (*pred_mul_<optab><mode>_extended_scalar): Ditto.
48791 (@pred_widen_mul_plus<su><mode>): Ditto.
48792 (@pred_widen_mul_plus<su><mode>_scalar): Ditto.
48793 (@pred_widen_mul_plussu<mode>): Ditto.
48794 (@pred_widen_mul_plussu<mode>_scalar): Ditto.
48795 (@pred_widen_mul_plusus<mode>_scalar): Ditto.
48797 2023-02-15 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
48799 * config/riscv/predicates.md (vector_mask_operand): Refine the codes.
48800 (vector_all_trues_mask_operand): New predicate.
48801 (vector_undef_operand): New predicate.
48802 (ltge_operator): New predicate.
48803 (comparison_except_ltge_operator): New predicate.
48804 (comparison_except_eqge_operator): New predicate.
48805 (ge_operator): New predicate.
48806 * config/riscv/riscv-v.cc (has_vi_variant_p): Add compare support.
48807 * config/riscv/riscv-vector-builtins-bases.cc (class icmp): New class.
48809 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
48810 * config/riscv/riscv-vector-builtins-functions.def (vmseq): Ditto.
48820 * config/riscv/riscv-vector-builtins-shapes.cc
48821 (struct return_mask_def): Adjust for compare support.
48822 * config/riscv/riscv-vector-builtins.cc
48823 (function_expander::use_compare_insn): New function.
48824 * config/riscv/riscv-vector-builtins.h
48825 (function_expander::add_integer_operand): Ditto.
48826 * config/riscv/riscv.cc (riscv_print_operand): Add compare support.
48827 * config/riscv/riscv.md: Add vector min/max attributes.
48828 * config/riscv/vector-iterators.md (xnor): New iterator.
48829 * config/riscv/vector.md (@pred_cmp<mode>): New pattern.
48830 (*pred_cmp<mode>): Ditto.
48831 (*pred_cmp<mode>_narrow): Ditto.
48832 (@pred_ltge<mode>): Ditto.
48833 (*pred_ltge<mode>): Ditto.
48834 (*pred_ltge<mode>_narrow): Ditto.
48835 (@pred_cmp<mode>_scalar): Ditto.
48836 (*pred_cmp<mode>_scalar): Ditto.
48837 (*pred_cmp<mode>_scalar_narrow): Ditto.
48838 (@pred_eqne<mode>_scalar): Ditto.
48839 (*pred_eqne<mode>_scalar): Ditto.
48840 (*pred_eqne<mode>_scalar_narrow): Ditto.
48841 (*pred_cmp<mode>_extended_scalar): Ditto.
48842 (*pred_cmp<mode>_extended_scalar_narrow): Ditto.
48843 (*pred_eqne<mode>_extended_scalar): Ditto.
48844 (*pred_eqne<mode>_extended_scalar_narrow): Ditto.
48845 (@pred_ge<mode>_scalar): Ditto.
48846 (@pred_<optab><mode>): Ditto.
48847 (@pred_n<optab><mode>): Ditto.
48848 (@pred_<optab>n<mode>): Ditto.
48849 (@pred_not<mode>): Ditto.
48851 2023-02-15 Martin Jambor <mjambor@suse.cz>
48854 * ipa-sra.cc (push_param_adjustments_for_index): Do not omit
48855 creation of non-scalar replacements even if IPA-CP knows their
48858 2023-02-15 Jakub Jelinek <jakub@redhat.com>
48862 * config/rs6000/rs6000.md (<u>maddditi4): Change into umaddditi4 only
48863 expander, change operand 3 to be TImode, emit maddlddi4 and
48864 umadddi4_highpart{,_le} with its low half and finally add the high
48865 half to the result.
48867 2023-02-15 Martin Liska <mliska@suse.cz>
48869 * doc/invoke.texi: Document --param=asan-kernel-mem-intrinsic-prefix.
48871 2023-02-15 Richard Biener <rguenther@suse.de>
48873 * sanopt.cc (sanitize_asan_mark_unpoison): Use bitmap
48874 for with_poison and alias worklist to it.
48875 (sanitize_asan_mark_poison): Likewise.
48877 2023-02-15 Richard Biener <rguenther@suse.de>
48880 * config/i386/i386-features.cc (scalar_chain::add_to_queue):
48881 Combine bitmap test and set.
48882 (scalar_chain::add_insn): Likewise.
48883 (scalar_chain::analyze_register_chain): Remove redundant
48884 attempt to add to queue and instead strengthen assert.
48885 Sink common attempts to mark the def dual-mode.
48886 (scalar_chain::add_to_queue): Remove redundant insn bitmap
48889 2023-02-15 Richard Biener <rguenther@suse.de>
48892 * config/i386/i386-features.cc (convert_scalars_to_vector):
48893 Switch candidates bitmaps to tree view before building the chains.
48895 2023-02-15 Hans-Peter Nilsson <hp@axis.com>
48897 * reload1.cc (gen_reload): Correct rtx parameter for fatal_insn
48898 "failure trying to reload" call.
48900 2023-02-15 Hans-Peter Nilsson <hp@axis.com>
48902 * gdbinit.in (phrs): New command.
48903 * sel-sched-dump.cc (debug_hard_reg_set): Remove debug-function.
48904 * ira-color.cc (debug_hard_reg_set): New, calling print_hard_reg_set.
48906 2023-02-14 David Faust <david.faust@oracle.com>
48909 * config/bpf/constraints.md (q): New memory constraint.
48910 * config/bpf/bpf.md (zero_extendhidi2): Use it here.
48911 (zero_extendqidi2): Likewise.
48912 (zero_extendsidi2): Likewise.
48913 (*mov<MM:mode>): Likewise.
48915 2023-02-14 Andrew Pinski <apinski@marvell.com>
48917 PR tree-optimization/108355
48918 PR tree-optimization/96921
48919 * match.pd: Add pattern for "1 - bool_val".
48921 2023-02-14 Richard Biener <rguenther@suse.de>
48923 * tree-ssa-sccvn.cc (vn_phi_compute_hash): Key skipping
48924 basic block index hashing on the availability of ->cclhs.
48925 (vn_phi_eq): Avoid re-doing sanity checks for CSE but
48926 rely on ->cclhs availability.
48927 (vn_phi_lookup): Set ->cclhs only when we are eventually
48928 going to CSE the PHI.
48929 (vn_phi_insert): Likewise.
48931 2023-02-14 Eric Botcazou <ebotcazou@adacore.com>
48933 * gimplify.cc (gimplify_save_expr): Add missing guard.
48935 2023-02-14 Richard Biener <rguenther@suse.de>
48937 PR tree-optimization/108782
48938 * tree-vect-loop.cc (vect_phi_first_order_recurrence_p):
48939 Make sure we're not vectorizing an inner loop.
48941 2023-02-14 Jakub Jelinek <jakub@redhat.com>
48943 PR sanitizer/108777
48944 * params.opt (-param=asan-kernel-mem-intrinsic-prefix=): New param.
48945 * asan.h (asan_memfn_rtl): Declare.
48946 * asan.cc (asan_memfn_rtls): New variable.
48947 (asan_memfn_rtl): New function.
48948 * builtins.cc (expand_builtin): If
48949 param_asan_kernel_mem_intrinsic_prefix and function is
48950 kernel-{,hw}address sanitized, emit calls to
48951 __{,hw}asan_{memcpy,memmove,memset} rather than
48952 {memcpy,memmove,memset}. Use sanitize_flags_p (SANITIZE_ADDRESS)
48953 instead of flag_sanitize & SANITIZE_ADDRESS to check if
48954 asan_intercepted_p functions shouldn't be expanded inline.
48956 2023-02-14 Richard Sandiford <richard.sandiford@arm.com>
48958 PR tree-optimization/96373
48959 * tree-vect-stmts.cc (vectorizable_operation): Predicate trapping
48960 operations on the loop mask. Reject partial vectors if this isn't
48963 2023-02-13 Richard Sandiford <richard.sandiford@arm.com>
48965 PR rtl-optimization/108681
48966 * lra-spills.cc (lra_final_code_change): Extend subreg replacement
48967 code to handle bare uses and clobbers.
48969 2023-02-13 Vladimir N. Makarov <vmakarov@redhat.com>
48971 * ira.cc (ira_update_equiv_info_by_shuffle_insn): Clear equiv
48972 caller_save_p flag when clearing defined_p flag.
48973 (setup_reg_equiv): Ditto.
48974 * lra-constraints.cc (lra_constraints): Ditto.
48976 2023-02-13 Uroš Bizjak <ubizjak@gmail.com>
48979 * config/i386/predicates.md (extr_register_operand):
48980 New special predicate.
48981 * config/i386/i386.md (*extv<mode>): Use extr_register_operand
48982 as operand 1 predicate.
48983 (*exzv<mode>): Ditto.
48984 (*extendqi<SWI24:mode>_ext_1): New insn pattern.
48986 2023-02-13 Richard Biener <rguenther@suse.de>
48988 PR tree-optimization/28614
48989 * tree-ssa-sccvn.cc (can_track_predicate_on_edge): Avoid
48990 walking all edges in most cases.
48991 (vn_nary_op_insert_pieces_predicated): Avoid repeated
48992 calls to can_track_predicate_on_edge unless checking is
48994 (process_bb): Instead call it once here for each edge
48995 we register possibly multiple predicates on.
48997 2023-02-13 Richard Biener <rguenther@suse.de>
48999 PR tree-optimization/108691
49000 * tree-cfg.cc (notice_special_calls): When the CFG is built
49001 honor gimple_call_ctrl_altering_p.
49002 * cfgexpand.cc (expand_call_stmt): Clear cfun->calls_setjmp
49003 temporarily if the call is not control-altering.
49004 * calls.cc (emit_call_1): Do not add REG_SETJMP if
49005 cfun->calls_setjmp is not set. Do not alter cfun->calls_setjmp.
49007 2023-02-13 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
49010 * config/s390/s390.cc (s390_bb_fallthru_entry_likely): Remove.
49011 (struct s390_sched_state): Initialise to zero.
49012 (s390_sched_variable_issue): For better debuggability also emit
49014 (s390_sched_init): Unconditionally reset scheduler state.
49016 2023-02-13 Richard Sandiford <richard.sandiford@arm.com>
49018 * ifcvt.h (noce_if_info::cond_inverted): New field.
49019 * ifcvt.cc (cond_move_convert_if_block): Swap the then and else
49020 values when cond_inverted is true.
49021 (noce_find_if_block): Allow the condition to be inverted when
49022 handling conditional moves.
49024 2023-02-13 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
49026 * config/s390/predicates.md (execute_operation): Use
49027 constrain_operands instead of extract_constrain_insn in order to
49028 determine wheter there exists a valid alternative.
49030 2023-02-13 Claudiu Zissulescu <claziss@gmail.com>
49032 * common/config/arc/arc-common.cc (arc_option_optimization_table):
49033 Remove millicode from list.
49035 2023-02-13 Martin Liska <mliska@suse.cz>
49037 * doc/invoke.texi: Document ira-simple-lra-insn-threshold.
49039 2023-02-13 Richard Biener <rguenther@suse.de>
49041 PR tree-optimization/106722
49042 * tree-ssa-dce.cc (mark_last_stmt_necessary): Return
49043 whether we marked a stmt.
49044 (mark_control_dependent_edges_necessary): When
49045 mark_last_stmt_necessary didn't mark any stmt make sure
49046 to mark its control dependent edges.
49047 (propagate_necessity): Likewise.
49049 2023-02-13 Kito Cheng <kito.cheng@sifive.com>
49051 * config/riscv/riscv.h (RISCV_DWARF_VLENB): New.
49052 (DWARF_FRAME_REGISTERS): New.
49053 (DWARF_REG_TO_UNWIND_COLUMN): New.
49055 2023-02-12 Gerald Pfeifer <gerald@pfeifer.com>
49057 * doc/sourcebuild.texi: Remove (broken) direct reference to
49058 "The GNU configure and build system".
49060 2023-02-12 Jin Ma <jinma@linux.alibaba.com>
49062 * config/riscv/riscv.cc (riscv_adjust_libcall_cfi_prologue): Change
49063 gen_add3_insn to gen_rtx_SET.
49064 (riscv_adjust_libcall_cfi_epilogue): Likewise.
49066 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
49068 * config/riscv/riscv-vector-builtins-bases.cc (class sat_op): New class.
49069 (class vnclip): Ditto.
49071 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
49072 * config/riscv/riscv-vector-builtins-functions.def (vaadd): Ditto.
49081 * config/riscv/vector-iterators.md (su): Add instruction.
49084 * config/riscv/vector.md (@pred_<sat_op><mode>): New pattern.
49085 (@pred_<sat_op><mode>_scalar): Ditto.
49086 (*pred_<sat_op><mode>_scalar): Ditto.
49087 (*pred_<sat_op><mode>_extended_scalar): Ditto.
49088 (@pred_narrow_clip<v_su><mode>): Ditto.
49089 (@pred_narrow_clip<v_su><mode>_scalar): Ditto.
49091 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
49093 * config/riscv/constraints.md (Wbr): Remove unused constraint.
49094 * config/riscv/predicates.md: Fix move operand predicate.
49095 * config/riscv/riscv-vector-builtins-bases.cc (class vnshift): New class.
49096 (class vncvt_x): Ditto.
49097 (class vmerge): Ditto.
49098 (class vmv_v): Ditto.
49100 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
49101 * config/riscv/riscv-vector-builtins-functions.def (vsra): Ditto.
49108 * config/riscv/riscv-vector-builtins-shapes.cc (struct narrow_alu_def): Ditto.
49109 (struct move_def): Ditto.
49111 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
49112 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WEXTI_OPS): New variable.
49113 (DEF_RVV_WEXTU_OPS): Ditto
49114 * config/riscv/riscv-vector-builtins.def (x_x_w): Fix type for suffix.
49119 * config/riscv/riscv.cc (riscv_print_operand): Refine ASM printting rule.
49120 * config/riscv/vector-iterators.md (nmsac):New iterator.
49121 (nmsub): New iterator.
49122 * config/riscv/vector.md (@pred_merge<mode>): New pattern.
49123 (@pred_merge<mode>_scalar): New pattern.
49124 (*pred_merge<mode>_scalar): New pattern.
49125 (*pred_merge<mode>_extended_scalar): New pattern.
49126 (@pred_narrow_<optab><mode>): New pattern.
49127 (@pred_narrow_<optab><mode>_scalar): New pattern.
49128 (@pred_trunc<mode>): New pattern.
49130 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
49132 * config/riscv/riscv-vector-builtins-bases.cc (class vmadc): New class.
49133 (class vmsbc): Ditto.
49134 (BASE): Define new class.
49135 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
49136 * config/riscv/riscv-vector-builtins-functions.def (vmadc): New define.
49138 * config/riscv/riscv-vector-builtins-shapes.cc (struct return_mask_def):
49141 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
49142 * config/riscv/riscv-vector-builtins.cc
49143 (function_expander::use_exact_insn): Adjust for new support
49144 * config/riscv/riscv-vector-builtins.h
49145 (function_base::has_merge_operand_p): New function.
49146 * config/riscv/vector-iterators.md: New iterator.
49147 * config/riscv/vector.md (@pred_madc<mode>): New pattern.
49148 (@pred_msbc<mode>): Ditto.
49149 (@pred_madc<mode>_scalar): Ditto.
49150 (@pred_msbc<mode>_scalar): Ditto.
49151 (*pred_madc<mode>_scalar): Ditto.
49152 (*pred_madc<mode>_extended_scalar): Ditto.
49153 (*pred_msbc<mode>_scalar): Ditto.
49154 (*pred_msbc<mode>_extended_scalar): Ditto.
49155 (@pred_madc<mode>_overflow): Ditto.
49156 (@pred_msbc<mode>_overflow): Ditto.
49157 (@pred_madc<mode>_overflow_scalar): Ditto.
49158 (@pred_msbc<mode>_overflow_scalar): Ditto.
49159 (*pred_madc<mode>_overflow_scalar): Ditto.
49160 (*pred_madc<mode>_overflow_extended_scalar): Ditto.
49161 (*pred_msbc<mode>_overflow_scalar): Ditto.
49162 (*pred_msbc<mode>_overflow_extended_scalar): Ditto.
49164 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
49166 * config/riscv/riscv-protos.h (simm5_p): Add vadc/vsbc support.
49167 * config/riscv/riscv-v.cc (simm32_p): Ditto.
49168 * config/riscv/riscv-vector-builtins-bases.cc (class vadc): New class.
49169 (class vsbc): Ditto.
49171 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
49172 * config/riscv/riscv-vector-builtins-functions.def (vadc): Ditto.
49174 * config/riscv/riscv-vector-builtins-shapes.cc
49175 (struct no_mask_policy_def): Ditto.
49177 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
49178 * config/riscv/riscv-vector-builtins.cc
49179 (rvv_arg_type_info::get_base_vector_type): Add vadc/vsbc support.
49180 (rvv_arg_type_info::get_tree_type): Ditto.
49181 (function_expander::use_exact_insn): Ditto.
49182 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
49183 (function_base::use_mask_predication_p): New function.
49184 * config/riscv/vector-iterators.md: New iterator.
49185 * config/riscv/vector.md (@pred_adc<mode>): New pattern.
49186 (@pred_sbc<mode>): Ditto.
49187 (@pred_adc<mode>_scalar): Ditto.
49188 (@pred_sbc<mode>_scalar): Ditto.
49189 (*pred_adc<mode>_scalar): Ditto.
49190 (*pred_adc<mode>_extended_scalar): Ditto.
49191 (*pred_sbc<mode>_scalar): Ditto.
49192 (*pred_sbc<mode>_extended_scalar): Ditto.
49194 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
49196 * config/riscv/vector.md: use "zero" reg.
49198 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
49200 * config/riscv/riscv-vector-builtins-bases.cc (class widen_binop): New
49202 (class vwmulsu): Ditto.
49203 (class vwcvt): Ditto.
49204 (BASE): Add integer widening support.
49205 * config/riscv/riscv-vector-builtins-bases.h: Ditto
49206 * config/riscv/riscv-vector-builtins-functions.def (vwadd): New class.
49207 (vwsub): New class.
49208 (vwmul): New class.
49209 (vwmulu): New class.
49210 (vwmulsu): New class.
49211 (vwaddu): New class.
49212 (vwsubu): New class.
49213 (vwcvt_x): New class.
49214 (vwcvtu_x): New class.
49215 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): New
49217 (struct widen_alu_def): New class.
49218 (SHAPE): New class.
49219 * config/riscv/riscv-vector-builtins-shapes.h: New class.
49220 * config/riscv/riscv-vector-builtins.cc
49221 (rvv_arg_type_info::get_base_vector_type): Add integer widening support.
49222 (rvv_arg_type_info::get_tree_type): Ditto.
49223 * config/riscv/riscv-vector-builtins.def (x_x_v): Change into "x_v"
49225 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Add integer
49227 * config/riscv/riscv-vsetvl.cc (change_insn): Fix reg_equal use bug.
49228 * config/riscv/riscv.h (X0_REGNUM): New constant.
49229 * config/riscv/vector-iterators.md: New iterators.
49230 * config/riscv/vector.md
49231 (@pred_dual_widen_<any_widen_binop:optab><any_extend:su><mode>): New
49233 (@pred_dual_widen_<any_widen_binop:optab><any_extend:su><mode>_scalar):
49235 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>): Ditto.
49236 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>_scalar):
49238 (@pred_widen_mulsu<mode>): Ditto.
49239 (@pred_widen_mulsu<mode>_scalar): Ditto.
49240 (@pred_<optab><mode>): Ditto.
49242 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
49243 kito-cheng <kito.cheng@sifive.com>
49245 * common/config/riscv/riscv-common.cc: Add flag for 'V' extension.
49246 * config/riscv/riscv-vector-builtins-bases.cc (class vmulh): New class.
49248 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
49249 * config/riscv/riscv-vector-builtins-functions.def (vmulh): Add vmulh
49253 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_FULL_V_I_OPS):
49255 (DEF_RVV_FULL_V_U_OPS): Ditto.
49256 (vint8mf8_t): Ditto.
49257 (vint8mf4_t): Ditto.
49258 (vint8mf2_t): Ditto.
49259 (vint8m1_t): Ditto.
49260 (vint8m2_t): Ditto.
49261 (vint8m4_t): Ditto.
49262 (vint8m8_t): Ditto.
49263 (vint16mf4_t): Ditto.
49264 (vint16mf2_t): Ditto.
49265 (vint16m1_t): Ditto.
49266 (vint16m2_t): Ditto.
49267 (vint16m4_t): Ditto.
49268 (vint16m8_t): Ditto.
49269 (vint32mf2_t): Ditto.
49270 (vint32m1_t): Ditto.
49271 (vint32m2_t): Ditto.
49272 (vint32m4_t): Ditto.
49273 (vint32m8_t): Ditto.
49274 (vint64m1_t): Ditto.
49275 (vint64m2_t): Ditto.
49276 (vint64m4_t): Ditto.
49277 (vint64m8_t): Ditto.
49278 (vuint8mf8_t): Ditto.
49279 (vuint8mf4_t): Ditto.
49280 (vuint8mf2_t): Ditto.
49281 (vuint8m1_t): Ditto.
49282 (vuint8m2_t): Ditto.
49283 (vuint8m4_t): Ditto.
49284 (vuint8m8_t): Ditto.
49285 (vuint16mf4_t): Ditto.
49286 (vuint16mf2_t): Ditto.
49287 (vuint16m1_t): Ditto.
49288 (vuint16m2_t): Ditto.
49289 (vuint16m4_t): Ditto.
49290 (vuint16m8_t): Ditto.
49291 (vuint32mf2_t): Ditto.
49292 (vuint32m1_t): Ditto.
49293 (vuint32m2_t): Ditto.
49294 (vuint32m4_t): Ditto.
49295 (vuint32m8_t): Ditto.
49296 (vuint64m1_t): Ditto.
49297 (vuint64m2_t): Ditto.
49298 (vuint64m4_t): Ditto.
49299 (vuint64m8_t): Ditto.
49300 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_FULL_V_I_OPS): Ditto.
49301 (DEF_RVV_FULL_V_U_OPS): Ditto.
49302 (check_required_extensions): Add vmulh support.
49303 (rvv_arg_type_info::get_tree_type): Ditto.
49304 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_FULL_V): Ditto.
49305 (enum rvv_base_type): Ditto.
49306 * config/riscv/riscv.opt: Add 'V' extension flag.
49307 * config/riscv/vector-iterators.md (su): New iterator.
49308 * config/riscv/vector.md (@pred_mulh<v_su><mode>): New pattern.
49309 (@pred_mulh<v_su><mode>_scalar): Ditto.
49310 (*pred_mulh<v_su><mode>_scalar): Ditto.
49311 (*pred_mulh<v_su><mode>_extended_scalar): Ditto.
49313 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
49315 * config/riscv/iterators.md: Add sign_extend/zero_extend.
49316 * config/riscv/riscv-vector-builtins-bases.cc (class ext): New class.
49318 * config/riscv/riscv-vector-builtins-bases.h: Add vsext/vzext support.
49319 * config/riscv/riscv-vector-builtins-functions.def (vsext): New macro
49322 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Adjust
49323 for vsext/vzext support.
49324 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WEXTI_OPS): New
49326 (DEF_RVV_QEXTI_OPS): Ditto.
49327 (DEF_RVV_OEXTI_OPS): Ditto.
49328 (DEF_RVV_WEXTU_OPS): Ditto.
49329 (DEF_RVV_QEXTU_OPS): Ditto.
49330 (DEF_RVV_OEXTU_OPS): Ditto.
49331 (vint16mf4_t): Ditto.
49332 (vint16mf2_t): Ditto.
49333 (vint16m1_t): Ditto.
49334 (vint16m2_t): Ditto.
49335 (vint16m4_t): Ditto.
49336 (vint16m8_t): Ditto.
49337 (vint32mf2_t): Ditto.
49338 (vint32m1_t): Ditto.
49339 (vint32m2_t): Ditto.
49340 (vint32m4_t): Ditto.
49341 (vint32m8_t): Ditto.
49342 (vint64m1_t): Ditto.
49343 (vint64m2_t): Ditto.
49344 (vint64m4_t): Ditto.
49345 (vint64m8_t): Ditto.
49346 (vuint16mf4_t): Ditto.
49347 (vuint16mf2_t): Ditto.
49348 (vuint16m1_t): Ditto.
49349 (vuint16m2_t): Ditto.
49350 (vuint16m4_t): Ditto.
49351 (vuint16m8_t): Ditto.
49352 (vuint32mf2_t): Ditto.
49353 (vuint32m1_t): Ditto.
49354 (vuint32m2_t): Ditto.
49355 (vuint32m4_t): Ditto.
49356 (vuint32m8_t): Ditto.
49357 (vuint64m1_t): Ditto.
49358 (vuint64m2_t): Ditto.
49359 (vuint64m4_t): Ditto.
49360 (vuint64m8_t): Ditto.
49361 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WEXTI_OPS): Ditto.
49362 (DEF_RVV_QEXTI_OPS): Ditto.
49363 (DEF_RVV_OEXTI_OPS): Ditto.
49364 (DEF_RVV_WEXTU_OPS): Ditto.
49365 (DEF_RVV_QEXTU_OPS): Ditto.
49366 (DEF_RVV_OEXTU_OPS): Ditto.
49367 (rvv_arg_type_info::get_base_vector_type): Add sign_exted/zero_extend
49369 (rvv_arg_type_info::get_tree_type): Ditto.
49370 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
49371 * config/riscv/vector-iterators.md (z): New attribute.
49372 * config/riscv/vector.md (@pred_<optab><mode>_vf2): New pattern.
49373 (@pred_<optab><mode>_vf4): Ditto.
49374 (@pred_<optab><mode>_vf8): Ditto.
49376 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
49378 * config/riscv/iterators.md: Add saturating Addition && Subtraction.
49379 * config/riscv/riscv-v.cc (has_vi_variant_p): Ditto.
49380 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Ditto.
49381 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
49382 * config/riscv/riscv-vector-builtins-functions.def (vsadd): New def.
49386 * config/riscv/vector-iterators.md (sll.vi): Adjust for Saturating
49391 * config/riscv/vector.md (@pred_<optab><mode>): New pattern.
49392 (@pred_<optab><mode>_scalar): New pattern.
49393 (*pred_<optab><mode>_scalar): New pattern.
49394 (*pred_<optab><mode>_extended_scalar): New pattern.
49396 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
49398 * config/riscv/iterators.md: Add neg and not.
49399 * config/riscv/riscv-vector-builtins-bases.cc (class unop): New class.
49401 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
49402 * config/riscv/riscv-vector-builtins-functions.def (vadd): Rename binop
49423 * config/riscv/riscv-vector-builtins-shapes.cc (struct binop_def): Ditto.
49424 (struct alu_def): Ditto.
49426 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
49427 * config/riscv/riscv-vector-builtins.cc: Support unary C/C/++.
49428 * config/riscv/vector-iterators.md: New iterator.
49429 * config/riscv/vector.md (@pred_<optab><mode>): New pattern
49431 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
49433 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::compute_probabilities): Skip exit block.
49435 2023-02-11 Jakub Jelinek <jakub@redhat.com>
49438 * ipa-cp.cc (ipa_agg_value_from_jfunc): Return NULL_TREE also if
49439 item->offset bit position is too large to be representable as
49440 unsigned int byte position.
49442 2023-02-11 Gerald Pfeifer <gerald@pfeifer.com>
49444 * doc/extend.texi (Other Builtins): Adjust link to WG14 N965.
49446 2023-02-10 Vladimir N. Makarov <vmakarov@redhat.com>
49448 * ira.cc (update_equiv_regs): Set up ira_reg_equiv for
49449 valid_combine only when ira_use_lra_p is true.
49451 2023-02-10 Vladimir N. Makarov <vmakarov@redhat.com>
49453 * params.opt (ira-simple-lra-insn-threshold): Add new param.
49454 * ira.cc (ira): Use the param to switch on simple LRA.
49456 2023-02-10 Andrew MacLeod <amacleod@redhat.com>
49458 PR tree-optimization/108687
49459 * gimple-range-cache.cc (ranger_cache::range_on_edge): Revert
49460 back to RFD_NONE mode for calculations.
49461 (ranger_cache::propagate_cache): Call the internal edge range API
49462 with RFD_READ_ONLY instead of changing the external routine.
49464 2023-02-10 Andrew MacLeod <amacleod@redhat.com>
49466 PR tree-optimization/108520
49467 * gimple-range-infer.cc (check_assume_func): Invoke
49468 gimple_range_global directly instead using global_range_query.
49469 * value-query.cc (get_range_global): Add function context and
49470 avoid calling nonnull_arg_p if not cfun.
49471 (gimple_range_global): Add function context pointer.
49472 * value-query.h (imple_range_global): Add function context.
49474 2023-02-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
49476 * config/riscv/constraints.md (Wdm): Adjust constraint.
49477 (Wbr): New constraint.
49478 * config/riscv/predicates.md (reg_or_int_operand): New predicate.
49479 * config/riscv/riscv-protos.h (emit_pred_op): Remove function.
49480 (emit_vlmax_op): New function.
49481 (emit_nonvlmax_op): Ditto.
49483 (neg_simm5_p): Ditto.
49484 (has_vi_variant_p): Ditto.
49485 * config/riscv/riscv-v.cc (emit_pred_op): Adjust function.
49486 (emit_vlmax_op): New function.
49487 (emit_nonvlmax_op): Ditto.
49488 (expand_const_vector): Adjust function.
49489 (legitimize_move): Ditto.
49490 (simm32_p): New function.
49492 (neg_simm5_p): Ditto.
49493 (has_vi_variant_p): Ditto.
49494 * config/riscv/riscv-vector-builtins-bases.cc (class vrsub): New class.
49496 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
49497 * config/riscv/riscv-vector-builtins-functions.def (vmin): Remove
49500 (vminu): Remove signed cases.
49502 (vdiv): Remove unsigned cases.
49504 (vdivu): Remove signed cases.
49508 (vrsub): New class.
49513 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_U_OPS): New macro.
49514 * config/riscv/riscv.h: change VL/VTYPE as fixed reg.
49515 * config/riscv/vector-iterators.md: New iterators.
49516 * config/riscv/vector.md (@pred_broadcast<mode>): Adjust pattern for vx
49518 (@pred_<optab><mode>_scalar): New pattern.
49519 (@pred_sub<mode>_reverse_scalar): Ditto.
49520 (*pred_<optab><mode>_scalar): Ditto.
49521 (*pred_<optab><mode>_extended_scalar): Ditto.
49522 (*pred_sub<mode>_reverse_scalar): Ditto.
49523 (*pred_sub<mode>_extended_reverse_scalar): Ditto.
49525 2023-02-10 Richard Biener <rguenther@suse.de>
49527 PR tree-optimization/108724
49528 * tree-vect-stmts.cc (vectorizable_operation): Avoid
49529 using word_mode vectors when vector lowering will
49530 decompose them to elementwise operations.
49532 2023-02-10 Jakub Jelinek <jakub@redhat.com>
49535 2023-02-09 Martin Liska <mliska@suse.cz>
49538 * doc/extend.texi: Document that the function
49539 does not work correctly for old VIA processors.
49541 2023-02-10 Andrew Pinski <apinski@marvell.com>
49542 Andrew Macleod <amacleod@redhat.com>
49544 PR tree-optimization/108684
49545 * tree-ssa-dce.cc (simple_dce_from_worklist):
49546 Check all ssa names and not just non-vdef ones
49547 before accepting the inline-asm.
49548 Call unlink_stmt_vdef on the statement before
49551 2023-02-09 Vladimir N. Makarov <vmakarov@redhat.com>
49553 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
49554 * ira.cc (validate_equiv_mem): Check memref address variance.
49555 (no_equiv): Clear caller_save_p flag.
49556 (update_equiv_regs): Define caller save equivalence for
49558 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
49559 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
49560 call_save_p. Use caller save equivalence depending on the arg.
49561 (split_reg): Adjust the call.
49563 2023-02-09 Jakub Jelinek <jakub@redhat.com>
49566 * common/config/i386/cpuinfo.h (get_zhaoxin_cpu): Formatting fixes.
49567 (cpu_indicator_init): Call get_available_features for all CPUs with
49568 max_level >= 1, rather than just Intel, AMD or Zhaoxin. Formatting
49571 2023-02-09 Jakub Jelinek <jakub@redhat.com>
49573 PR tree-optimization/108688
49574 * match.pd (bit_field_ref [bit_insert]): Simplify BIT_FIELD_REF
49575 of BIT_INSERT_EXPR extracting exactly all inserted bits even
49576 when without mode precision. Formatting fixes.
49578 2023-02-09 Andrew Pinski <apinski@marvell.com>
49580 PR tree-optimization/108688
49581 * match.pd (bit_field_ref [bit_insert]): Avoid generating
49582 BIT_FIELD_REFs of non-mode-precision integral operands.
49584 2023-02-09 Martin Liska <mliska@suse.cz>
49587 * doc/extend.texi: Document that the function
49588 does not work correctly for old VIA processors.
49590 2023-02-09 Andreas Schwab <schwab@suse.de>
49592 * lto-wrapper.cc (merge_and_complain): Handle
49593 -funwind-tables and -fasynchronous-unwind-tables.
49594 (append_compiler_options): Likewise.
49596 2023-02-09 Richard Biener <rguenther@suse.de>
49598 PR tree-optimization/26854
49599 * tree-into-ssa.cc (update_ssa): Turn blocks_to_update to tree
49600 view around insert_updated_phi_nodes_for.
49601 * tree-ssa-alias.cc (maybe_skip_until): Allocate visited bitmap
49603 (walk_aliased_vdefs_1): Likewise.
49605 2023-02-08 Gerald Pfeifer <gerald@pfeifer.com>
49607 * doc/include/gpl_v3.texi: Change fsf.org to www.fsf.org.
49609 2023-02-08 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
49612 * config.gcc (tm_mlib_file): Define new variable.
49614 2023-02-08 Jakub Jelinek <jakub@redhat.com>
49616 PR tree-optimization/108692
49617 * tree-vect-patterns.cc (vect_widened_op_tree): If rhs_code is
49618 widened_code which is different from code, don't call
49619 vect_look_through_possible_promotion but instead just check op is
49620 SSA_NAME with integral type for which vect_is_simple_use is true
49621 and call set_op on this_unprom.
49623 2023-02-08 Andrea Corallo <andrea.corallo@arm.com>
49625 * config/aarch64/aarch64-protos.h (aarch_ra_sign_key): Remove
49627 * config/aarch64/aarch64.cc (aarch_ra_sign_key): Remove
49629 * config/aarch64/aarch64.opt (aarch64_ra_sign_key): Rename
49630 to 'aarch_ra_sign_key'.
49631 * config/arm/aarch-common.cc (aarch_ra_sign_key): Remove
49633 * config/arm/arm-protos.h (aarch_ra_sign_key): Likewise.
49634 * config/arm/arm.cc (enum aarch_key_type): Remove definition.
49635 * config/arm/arm.opt: Define.
49637 2023-02-08 Richard Sandiford <richard.sandiford@arm.com>
49639 PR tree-optimization/108316
49640 * tree-vect-stmts.cc (get_load_store_type): When using
49641 internal functions for gather/scatter, make sure that the type
49642 of the offset argument is consistent with the offset vector type.
49644 2023-02-08 Vladimir N. Makarov <vmakarov@redhat.com>
49647 2023-02-07 Vladimir N. Makarov <vmakarov@redhat.com>
49649 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
49650 * ira.cc (validate_equiv_mem): Check memref address variance.
49651 (update_equiv_regs): Define caller save equivalence for
49653 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
49654 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
49655 call_save_p. Use caller save equivalence depending on the arg.
49656 (split_reg): Adjust the call.
49658 2023-02-08 Jakub Jelinek <jakub@redhat.com>
49660 * tree.def (SAD_EXPR): Remove outdated comment about missing
49663 2023-02-07 Marek Polacek <polacek@redhat.com>
49665 * doc/invoke.texi: Update -fchar8_t documentation.
49667 2023-02-07 Vladimir N. Makarov <vmakarov@redhat.com>
49669 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
49670 * ira.cc (validate_equiv_mem): Check memref address variance.
49671 (update_equiv_regs): Define caller save equivalence for
49673 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
49674 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
49675 call_save_p. Use caller save equivalence depending on the arg.
49676 (split_reg): Adjust the call.
49678 2023-02-07 Richard Biener <rguenther@suse.de>
49680 PR tree-optimization/26854
49681 * gimple-fold.cc (has_use_on_stmt): Look at stmt operands
49682 instead of immediate uses.
49684 2023-02-07 Jakub Jelinek <jakub@redhat.com>
49686 PR tree-optimization/106923
49687 * ipa-split.cc (execute_split_functions): Don't split returns_twice
49690 2023-02-07 Jakub Jelinek <jakub@redhat.com>
49692 PR tree-optimization/106433
49693 * cgraph.cc (set_const_flag_1): Recurse on simd clones too.
49694 (cgraph_node::set_pure_flag): Call set_pure_flag_1 on simd clones too.
49696 2023-02-07 Jan Hubicka <jh@suse.cz>
49698 * config/i386/x86-tune.def (X86_TUNE_AVX256_OPTIMAL): Turn off
49701 2023-02-06 Andrew Stubbs <ams@codesourcery.com>
49703 * config/gcn/mkoffload.cc (gcn_stack_size): New global variable.
49704 (process_asm): Create a constructor for GCN_STACK_SIZE.
49705 (main): Parse the -mstack-size option.
49707 2023-02-06 Alex Coplan <alex.coplan@arm.com>
49710 * config/aarch64/aarch64-simd.md (aarch64_bfmlal<bt>_lane<q>v4sf):
49711 Use correct constraint for operand 3.
49713 2023-02-06 Martin Jambor <mjambor@suse.cz>
49715 * ipa-sra.cc (adjust_parameter_descriptions): Fix a typo in a dump.
49717 2023-02-06 Xi Ruoyao <xry111@xry111.site>
49719 * config/loongarch/loongarch.md (bytepick_w_ashift_amount):
49720 New define_int_iterator.
49721 (bytepick_d_ashift_amount): Likewise.
49722 (bytepick_imm): New define_int_attr.
49723 (bytepick_w_lshiftrt_amount): Likewise.
49724 (bytepick_d_lshiftrt_amount): Likewise.
49725 (bytepick_w_<bytepick_imm>): New define_insn template.
49726 (bytepick_w_<bytepick_imm>_extend): Likewise.
49727 (bytepick_d_<bytepick_imm>): Likewise.
49728 (bytepick_w): Remove unused define_insn.
49729 (bytepick_d): Likewise.
49730 (UNSPEC_BYTEPICK_W): Remove unused unspec.
49731 (UNSPEC_BYTEPICK_D): Likewise.
49732 * config/loongarch/predicates.md (const_0_to_3_operand):
49733 Remove unused define_predicate.
49734 (const_0_to_7_operand): Likewise.
49736 2023-02-06 Jakub Jelinek <jakub@redhat.com>
49738 PR tree-optimization/108655
49739 * ubsan.cc (sanitize_unreachable_fn): For -funreachable-traps
49740 or -fsanitize=unreachable -fsanitize-trap=unreachable return
49741 BUILT_IN_UNREACHABLE_TRAP decl rather than BUILT_IN_TRAP.
49743 2023-02-05 Gerald Pfeifer <gerald@pfeifer.com>
49745 * doc/install.texi (Specific): Remove PW32.
49747 2023-02-03 Jakub Jelinek <jakub@redhat.com>
49749 PR tree-optimization/108647
49750 * range-op.cc (operator_equal::op1_range,
49751 operator_not_equal::op1_range): Don't test op2 bound
49752 equality if op2.undefined_p (), instead set_varying.
49753 (operator_lt::op1_range, operator_le::op1_range,
49754 operator_gt::op1_range, operator_ge::op1_range): Return false if
49755 op2.undefined_p ().
49756 (operator_lt::op2_range, operator_le::op2_range,
49757 operator_gt::op2_range, operator_ge::op2_range): Return false if
49758 op1.undefined_p ().
49760 2023-02-03 Aldy Hernandez <aldyh@redhat.com>
49762 PR tree-optimization/108639
49763 * value-range.cc (irange::legacy_equal_p): Compare nonzero bits as
49765 (irange::operator==): Same.
49767 2023-02-03 Aldy Hernandez <aldyh@redhat.com>
49769 PR tree-optimization/108647
49770 * range-op-float.cc (foperator_lt::op1_range): Handle undefined ranges.
49771 (foperator_lt::op2_range): Same.
49772 (foperator_le::op1_range): Same.
49773 (foperator_le::op2_range): Same.
49774 (foperator_gt::op1_range): Same.
49775 (foperator_gt::op2_range): Same.
49776 (foperator_ge::op1_range): Same.
49777 (foperator_ge::op2_range): Same.
49778 (foperator_unordered_lt::op1_range): Same.
49779 (foperator_unordered_lt::op2_range): Same.
49780 (foperator_unordered_le::op1_range): Same.
49781 (foperator_unordered_le::op2_range): Same.
49782 (foperator_unordered_gt::op1_range): Same.
49783 (foperator_unordered_gt::op2_range): Same.
49784 (foperator_unordered_ge::op1_range): Same.
49785 (foperator_unordered_ge::op2_range): Same.
49787 2023-02-03 Andrew MacLeod <amacleod@redhat.com>
49789 PR tree-optimization/107570
49790 * tree-vrp.cc (remove_and_update_globals): Reset SCEV.
49792 2023-02-03 Gaius Mulley <gaiusmod2@gmail.com>
49794 * doc/gm2.texi (Internals): Remove from menu.
49795 (Using): Comment out ifnohtml conditional.
49796 (Documentation): Use gcc url.
49797 (License): Node simplified.
49798 (Copying): New node. Include gpl_v3_without_node.
49799 (Contributing): Node simplified.
49800 (Internals): Commented out.
49801 (Libraries): Node simplified.
49804 (Functions): Ditto.
49806 2023-02-03 Christophe Lyon <christophe.lyon@arm.com>
49808 * config/arm/mve.md (mve_vabavq_p_<supf><mode>): Add length
49810 (mve_vqshluq_m_n_s<mode>): Likewise.
49811 (mve_vshlq_m_<supf><mode>): Likewise.
49812 (mve_vsriq_m_n_<supf><mode>): Likewise.
49813 (mve_vsubq_m_<supf><mode>): Likewise.
49815 2023-02-03 Martin Jambor <mjambor@suse.cz>
49818 * ipa-sra.cc (push_param_adjustments_for_index): Remove a size check
49819 when comparing to an IPA-CP value.
49820 (dump_list_of_param_indices): New function.
49821 (adjust_parameter_descriptions): Check for mismatching IPA-CP values.
49822 Dump removed candidates using dump_list_of_param_indices.
49823 * ipa-param-manipulation.cc
49824 (ipa_param_body_adjustments::modify_expression): Add assert checking
49825 sizes of a VIEW_CONVERT_EXPR will match.
49826 (ipa_param_body_adjustments::modify_assignment): Likewise.
49828 2023-02-03 Monk Chiang <monk.chiang@sifive.com>
49830 * config/riscv/riscv.h: Remove VL_REGS, VTYPE_REGS class.
49831 * config/riscv/riscv.cc: Ditto.
49833 2023-02-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
49835 * config/riscv/vector-iterators.md (sll.vi): Fix constraint bug.
49839 * config/riscv/vector.md: Ditto.
49841 2023-02-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
49843 * config/riscv/predicates.md (pmode_reg_or_uimm5_operand): New predicate.
49844 * config/riscv/riscv-vector-builtins-bases.cc: New class.
49845 * config/riscv/riscv-vector-builtins-functions.def (vsll): Ditto.
49848 * config/riscv/riscv-vector-builtins.cc: Ditto.
49849 * config/riscv/vector.md (@pred_<optab><mode>_scalar): New pattern.
49851 2023-02-02 Iain Sandoe <iain@sandoe.co.uk>
49853 * toplev.cc (toplev::main): Only print the version information header
49854 from toplevel main().
49856 2023-02-02 Paul-Antoine Arras <pa@codesourcery.com>
49858 * config/gcn/gcn-valu.md (cond_<expander><mode>): Add
49859 cond_{ashl|ashr|lshr}
49861 2023-02-02 Richard Sandiford <richard.sandiford@arm.com>
49863 PR rtl-optimization/108086
49864 * rtl-ssa/insns.h (insn_info): Make m_num_defs a full unsigned int.
49865 Adjust size-related commentary accordingly.
49867 2023-02-02 Richard Sandiford <richard.sandiford@arm.com>
49869 PR rtl-optimization/108508
49870 * rtl-ssa/accesses.cc (function_info::split_clobber_group): When
49871 the splay tree search gives the first clobber in the second group,
49872 make sure that the root of the first clobber group is updated
49873 correctly. Enter the new clobber group into the definition splay
49876 2023-02-02 Jin Ma <jinma@linux.alibaba.com>
49878 * common/config/riscv/riscv-common.cc (riscv_compute_multilib):
49879 Fix finding best match score.
49881 2023-02-02 Jakub Jelinek <jakub@redhat.com>
49884 PR rtl-optimization/108463
49886 * cselib.cc (cselib_current_insn): Move declaration earlier.
49887 (cselib_hasher::equal): For debug only locs, temporarily override
49888 cselib_current_insn to their l->setting_insn for the
49889 rtx_equal_for_cselib_1 call, so that unsuccessful comparisons don't
49890 promote some debug locs.
49891 * sched-deps.cc (sched_analyze_2) <case MEM>: For MEMs in DEBUG_INSNs
49892 when using cselib call cselib_lookup_from_insn on the address but
49893 don't substitute it.
49895 2023-02-02 Richard Biener <rguenther@suse.de>
49897 PR middle-end/108625
49898 * genmatch.cc (expr::gen_transform): Also disallow resimplification
49899 from pushing to lseq with force_leaf.
49900 (dt_simplify::gen_1): Likewise.
49902 2023-02-02 Andrew Stubbs <ams@codesourcery.com>
49904 * config/gcn/gcn-run.cc: Include libgomp-gcn.h.
49905 (struct kernargs): Replace the common content with kernargs_abi.
49906 (struct heap): Delete.
49907 (main): Read GCN_STACK_SIZE envvar.
49908 Allocate space for the device stacks.
49909 Write the new kernargs fields.
49910 * config/gcn/gcn.cc (gcn_option_override): Remove stack_size_opt.
49911 (default_requested_args): Remove PRIVATE_SEGMENT_BUFFER_ARG and
49912 PRIVATE_SEGMENT_WAVE_OFFSET_ARG.
49913 (gcn_addr_space_convert): Mask the QUEUE_PTR_ARG content.
49914 (gcn_expand_prologue): Move the TARGET_PACKED_WORK_ITEMS to the top.
49915 Set up the stacks from the values in the kernargs, not private.
49916 (gcn_expand_builtin_1): Match the stack configuration in the prologue.
49917 (gcn_hsa_declare_function_name): Turn off the private segment.
49918 (gcn_conditional_register_usage): Ensure QUEUE_PTR is fixed.
49919 * config/gcn/gcn.h (FIXED_REGISTERS): Fix the QUEUE_PTR register.
49920 * config/gcn/gcn.opt (mstack-size): Change the description.
49922 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
49925 * config/arm/arm.h (VALID_MVE_PRED_MODE): Add V2QI.
49926 * config/arm/arm.cc (thumb2_legitimate_address_p): Use HImode for
49927 addressing MVE predicate modes.
49928 (mve_bool_vec_to_const): Change to represent correct MVE predicate
49930 (arm_hard_regno_mode_ok): Use VALID_MVE_PRED_MODE instead of checking
49932 (arm_vector_mode_supported_p): Likewise.
49933 (arm_mode_to_pred_mode): Add V2QI.
49934 * config/arm/arm-builtins.cc (UNOP_PRED_UNONE_QUALIFIERS): New
49936 (UNOP_PRED_PRED_QUALIFIERS): New qualifier
49937 (BINOP_PRED_UNONE_PRED_QUALIFIERS): New qualifier.
49938 (v2qi_UP): New macro.
49939 (v4bi_UP): New macro.
49940 (v8bi_UP): New macro.
49941 (v16bi_UP): New macro.
49942 (arm_expand_builtin_args): Make it able to expand the new predicate
49944 * config/arm/arm-modes.def (V2QI): New mode.
49945 * config/arm/arm-simd-builtin-types.def (Pred1x16_t, Pred2x8_t
49946 Pred4x4_t): Remove unused predicate builtin types.
49947 * config/arm/arm_mve.h (__arm_vctp16q, __arm_vctp32q, __arm_vctp64q,
49948 __arm_vctp8q, __arm_vpnot, __arm_vctp8q_m, __arm_vctp64q_m,
49949 __arm_vctp32q_m, __arm_vctp16q_m): Use predicate modes.
49950 * config/arm/arm_mve_builtins.def (vctp16q, vctp32q, vctp64q, vctp8q,
49951 vpnot, vctp8q_m, vctp16q_m, vctp32q_m, vctp64q_m): Likewise.
49952 * config/arm/constraints.md (DB): Check for VALID_MVE_PRED_MODE instead
49953 of MODE_VECTOR_BOOL.
49954 * config/arm/iterators.md (MVE_7, MVE_7_HI): Add V2QI
49955 (MVE_VPRED): Likewise.
49956 (MVE_vpred): Add V2QI and map upper case predicate modes to lower case.
49957 (MVE_vctp): New mode attribute.
49961 * config/arm/mve.md (mve_vctp<mode1>qhi): Rename this...
49962 (mve_vctp<MVE_vctp>q<MVE_vpred>): ... to this. And use new mode
49964 (mve_vpnothi): Rename this...
49965 (mve_vpnotv16bi): ... to this.
49966 (mve_vctp<mode1>q_mhi): Rename this...
49967 (mve_vctp<MVE_vctp>q_m<MVE_vpred>):... to this.
49968 (mve_vldrdq_gather_base_z_<supf>v2di,
49969 mve_vldrdq_gather_offset_z_<supf>v2di,
49970 mve_vldrdq_gather_shifted_offset_z_<supf>v2di,
49971 mve_vstrdq_scatter_base_p_<supf>v2di,
49972 mve_vstrdq_scatter_offset_p_<supf>v2di,
49973 mve_vstrdq_scatter_offset_p_<supf>v2di_insn,
49974 mve_vstrdq_scatter_shifted_offset_p_<supf>v2di,
49975 mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn,
49976 mve_vstrdq_scatter_base_wb_p_<supf>v2di,
49977 mve_vldrdq_gather_base_wb_z_<supf>v2di,
49978 mve_vldrdq_gather_base_nowb_z_<supf>v2di,
49979 mve_vldrdq_gather_base_wb_z_<supf>v2di_insn): Use V2QI insead of HI for
49981 * config/arm/unspecs.md (VCTP8Q, VCTP16Q, VCTP32Q, VCTP64Q): Replace
49983 (VCTP): ... with this.
49984 (VCTP8Q_M, VCTP16Q_M, VCTP32Q_M, VCTP64Q_M): Replace these...
49985 (VCTP_M): ... with this.
49986 * config/arm/vfp.md (*thumb2_movhi_vfp, *thumb2_movhi_fp16): Use
49987 VALID_MVE_PRED_MODE instead of checking for MODE_VECTOR_BOOL class.
49989 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
49992 * config/arm/arm.cc (arm_hard_regno_mode_ok): Use new MACRO.
49993 (arm_modes_tieable_p): Make MVE predicate modes tieable.
49994 * config/arm/arm.h (VALID_MVE_PRED_MODE): New define.
49995 * simplify-rtx.cc (simplify_context::simplify_subreg): Teach
49996 simplify_subreg to simplify subregs where the outermode is not scalar.
49998 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
50001 * config/arm/arm-builtins.cc (arm_simd_builtin_type): Rewrite to use
50002 new qualifiers parameter and use unsigned short type for MVE predicate.
50003 (arm_init_builtin): Call arm_simd_builtin_type with qualifiers
50005 (arm_init_crypto_builtins): Likewise.
50007 2023-02-02 Jakub Jelinek <jakub@redhat.com>
50010 * builtins.def (BUILT_IN_UNREACHABLE_TRAP): New builtin.
50011 * internal-fn.def (TRAP): Remove.
50012 * internal-fn.cc (expand_TRAP): Remove.
50013 * tree.cc (build_common_builtin_nodes): Define
50014 BUILT_IN_UNREACHABLE_TRAP if not yet defined.
50015 (builtin_decl_unreachable): Use BUILT_IN_UNREACHABLE_TRAP
50016 instead of BUILT_IN_TRAP.
50017 * gimple.cc (gimple_build_builtin_unreachable): Remove
50018 emitting internal function for BUILT_IN_TRAP.
50019 * asan.cc (maybe_instrument_call): Handle BUILT_IN_UNREACHABLE_TRAP.
50020 * cgraph.cc (cgraph_edge::verify_corresponds_to_fndecl): Handle
50021 BUILT_IN_UNREACHABLE_TRAP instead of BUILT_IN_TRAP.
50022 * ipa-devirt.cc (possible_polymorphic_call_target_p): Handle
50023 BUILT_IN_UNREACHABLE_TRAP.
50024 * builtins.cc (expand_builtin, is_inexpensive_builtin): Likewise.
50025 * tree-cfg.cc (verify_gimple_call,
50026 pass_warn_function_return::execute): Likewise.
50027 * attribs.cc (decl_attributes): Don't report exclusions on
50028 BUILT_IN_UNREACHABLE_TRAP either.
50030 2023-02-02 liuhongt <hongtao.liu@intel.com>
50032 PR tree-optimization/108601
50033 * tree-vectorizer.h (vect_can_peel_nonlinear_iv_p): Removed.
50034 * tree-vect-loop.cc
50035 (vectorizable_nonlinear_induction): Remove
50036 vect_can_peel_nonlinear_iv_p.
50037 (vect_can_peel_nonlinear_iv_p): Don't peel
50038 nonlinear iv(mult or shift) for epilog when vf is not
50039 constant and moved the defination to ..
50040 * tree-vect-loop-manip.cc (vect_can_peel_nonlinear_iv_p):
50043 2023-02-02 Jakub Jelinek <jakub@redhat.com>
50045 PR middle-end/108435
50046 * tree-nested.cc (convert_nonlocal_omp_clauses)
50047 <case OMP_CLAUSE_LASTPRIVATE>: If info->new_local_var_chain and *seq
50048 is not a GIMPLE_BIND, wrap the sequence into a new GIMPLE_BIND
50049 before calling declare_vars.
50050 (convert_nonlocal_omp_clauses) <case OMP_CLAUSE_LINEAR>: Merge
50051 with the OMP_CLAUSE_LASTPRIVATE handling except for whether
50052 seq is initialized to &OMP_CLAUSE_LASTPRIVATE_GIMPLE_SEQ (clause)
50053 or &OMP_CLAUSE_LINEAR_GIMPLE_SEQ (clause).
50055 2023-02-01 Tamar Christina <tamar.christina@arm.com>
50057 * common/config/aarch64/aarch64-common.cc
50058 (struct aarch64_option_extension): Add native_detect and document struct
50060 (all_extensions): Set new field native_detect.
50061 * config/aarch64/aarch64.cc (struct aarch64_option_extension): Delete
50064 2023-02-01 Martin Liska <mliska@suse.cz>
50066 * ipa-devirt.cc (odr_types_equivalent_p): Respect *warned
50069 2023-02-01 Andrew MacLeod <amacleod@redhat.com>
50071 PR tree-optimization/108356
50072 * gimple-range-cache.cc (ranger_cache::range_on_edge): Always
50073 do a search of the DOM tree for a range.
50075 2023-02-01 Martin Liska <mliska@suse.cz>
50078 * cgraphunit.cc (walk_polymorphic_call_targets): Insert
50079 ony non-null values.
50080 * ipa.cc (walk_polymorphic_call_targets): Likewise.
50082 2023-02-01 Martin Liska <mliska@suse.cz>
50085 * gcc.cc (LINK_COMPRESS_DEBUG_SPEC): Report error only for
50088 2023-02-01 Jakub Jelinek <jakub@redhat.com>
50091 * ree.cc (combine_reaching_defs): Don't return false for paradoxical
50092 subregs in DEBUG_INSNs.
50094 2023-02-01 Richard Sandiford <richard.sandiford@arm.com>
50096 * compare-elim.cc (find_flags_uses_in_insn): Guard use of SET_SRC.
50098 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
50100 * config/s390/s390.cc (s390_restore_gpr_p): New function.
50101 (s390_preserve_gpr_arg_in_range_p): New function.
50102 (s390_preserve_gpr_arg_p): New function.
50103 (s390_preserve_fpr_arg_p): New function.
50104 (s390_register_info_stdarg_fpr): Rename to ...
50105 (s390_register_info_arg_fpr): ... this. Add -mpreserve-args handling.
50106 (s390_register_info_stdarg_gpr): Rename to ...
50107 (s390_register_info_arg_gpr): ... this. Add -mpreserve-args handling.
50108 (s390_register_info): Use the renamed functions above.
50109 (s390_optimize_register_info): Likewise.
50110 (save_fpr): Generate CFI for -mpreserve-args.
50111 (save_gprs): Generate CFI for -mpreserve-args. Drop return value.
50112 (s390_emit_prologue): Adjust to changed calling convention of save_gprs.
50113 (s390_optimize_prologue): Likewise.
50114 * config/s390/s390.opt: New option -mpreserve-args
50116 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
50118 * config/s390/s390.cc (save_gprs): Use gen_frame_mem.
50119 (restore_gprs): Likewise.
50120 (s390_emit_stack_tie): Make the stack_tie to be dependent on the
50121 frame pointer if a frame-pointer is used.
50122 (s390_emit_prologue): Emit stack_tie when frame-pointer is needed.
50123 * config/s390/s390.md (stack_tie): Add a register operand and
50125 (@stack_tie<mode>): ... this.
50127 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
50129 * dwarf2cfi.cc (dwarf2out_frame_debug_cfa_restore): Add
50130 EMIT_CFI parameter.
50131 (dwarf2out_frame_debug): Add case for REG_CFA_NORESTORE.
50132 * reg-notes.def (REG_CFA_NOTE): New reg note definition.
50134 2023-02-01 Richard Biener <rguenther@suse.de>
50136 PR middle-end/108500
50137 * dominance.cc (assign_dfs_numbers): Replace recursive DFS
50138 with tree traversal algorithm.
50140 2023-02-01 Jason Merrill <jason@redhat.com>
50142 * doc/invoke.texi: Document -Wno-changes-meaning.
50144 2023-02-01 David Malcolm <dmalcolm@redhat.com>
50146 * doc/invoke.texi (Static Analyzer Options): Add notes about
50147 limitations of -fanalyzer.
50149 2023-01-31 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
50151 * config/riscv/constraints.md (vj): New.
50153 * config/riscv/iterators.md: Add more opcode.
50154 * config/riscv/predicates.md (vector_arith_operand): New.
50155 (vector_neg_arith_operand): New.
50156 (vector_shift_operand): New.
50157 * config/riscv/riscv-vector-builtins-bases.cc (class binop): New.
50158 * config/riscv/riscv-vector-builtins-bases.h: (vadd): New.
50175 * config/riscv/riscv-vector-builtins-functions.def (vadd): New.
50192 * config/riscv/riscv-vector-builtins-shapes.cc (struct binop_def): New.
50193 * config/riscv/riscv-vector-builtins-shapes.h (binop): New.
50194 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_I_OPS): New.
50195 (DEF_RVV_U_OPS): New.
50196 (rvv_arg_type_info::get_base_vector_type): Handle
50197 RVV_BASE_shift_vector.
50198 (rvv_arg_type_info::get_tree_type): Ditto.
50199 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Add
50200 RVV_BASE_shift_vector.
50201 * config/riscv/riscv.cc (riscv_print_operand): Handle 'V'.
50202 * config/riscv/vector-iterators.md: Handle more opcode.
50203 * config/riscv/vector.md (@pred_<optab><mode>): New.
50205 2023-01-31 Philipp Tomsich <philipp.tomsich@vrull.eu>
50208 * config/aarch64/aarch64.cc (aarch_macro_fusion_pair_p): Check
50211 2023-01-31 Richard Sandiford <richard.sandiford@arm.com>
50213 PR tree-optimization/108608
50214 * tree-vect-loop.cc (vect_transform_reduction): Handle single
50215 def-use cycles that involve function calls rather than tree codes.
50217 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
50219 PR tree-optimization/108385
50220 * gimple-range-gori.cc (gori_compute::compute_operand_range):
50221 Allow VARYING computations to continue if there is a relation.
50222 * range-op.cc (pointer_plus_operator::op2_range): New.
50224 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
50226 PR tree-optimization/108359
50227 * range-op.cc (range_operator::wi_fold_in_parts_equiv): New.
50228 (range_operator::fold_range): If op1 is equivalent to op2 then
50229 invoke new fold_in_parts_equiv to operate on sub-components.
50230 * range-op.h (wi_fold_in_parts_equiv): New prototype.
50232 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
50234 * gimple-range-gori.cc (gori_compute::compute_operand_range): Do
50235 not abort calculations if there is a valid relation available.
50236 (gori_compute::refine_using_relation): Pass correct relation trio.
50237 (gori_compute::compute_operand1_range): Create trio and use it.
50238 (gori_compute::compute_operand2_range): Ditto.
50239 * range-op.cc (operator_plus::op1_range): Use correct trio member.
50240 (operator_minus::op1_range): Use correct trio member.
50241 * value-relation.cc (value_relation::create_trio): New.
50242 * value-relation.h (value_relation::create_trio): New prototype.
50244 2023-01-31 Jakub Jelinek <jakub@redhat.com>
50247 * config/i386/i386-expand.cc
50248 (ix86_convert_const_wide_int_to_broadcast): Return nullptr if
50249 CONST_WIDE_INT_NUNITS (op) times HOST_BITS_PER_WIDE_INT isn't
50250 equal to bitsize of mode.
50252 2023-01-31 Jakub Jelinek <jakub@redhat.com>
50254 PR rtl-optimization/108596
50255 * bb-reorder.cc (fix_up_fall_thru_edges): Handle the case where cur_bb
50256 ends with asm goto and has a crossing fallthrough edge to the same bb
50257 that contains at least one of its labels by restoring EDGE_CROSSING
50258 flag even on possible edge from cur_bb to new_bb successor.
50260 2023-01-31 Jakub Jelinek <jakub@redhat.com>
50263 * config/i386/avx512erintrin.h (_mm512_exp2a23_round_pd,
50264 _mm512_exp2a23_round_ps, _mm512_rcp28_round_pd, _mm512_rcp28_round_ps,
50265 _mm512_rsqrt28_round_pd, _mm512_rsqrt28_round_ps): Use
50266 _mm512_undefined_pd () or _mm512_undefined_ps () instead of using
50267 uninitialized automatic variable __W.
50269 2023-01-31 Gerald Pfeifer <gerald@pfeifer.com>
50271 * doc/include/fdl.texi: Change fsf.org to www.fsf.org.
50273 2023-01-30 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
50275 * config/riscv/riscv-protos.h (get_vector_mode): New function.
50276 * config/riscv/riscv-v.cc (get_vector_mode): Ditto.
50277 * config/riscv/riscv-vector-builtins-bases.cc (enum lst_type): New enum.
50278 (class loadstore): Adjust for indexed loads/stores support.
50280 * config/riscv/riscv-vector-builtins-bases.h: New function declare.
50281 * config/riscv/riscv-vector-builtins-functions.def (vluxei8): Ditto.
50297 * config/riscv/riscv-vector-builtins-shapes.cc
50298 (struct indexed_loadstore_def): New class.
50300 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
50301 * config/riscv/riscv-vector-builtins.cc (required_extensions_p): Adjust
50302 for indexed loads/stores support.
50303 (check_required_extensions): Ditto.
50304 (rvv_arg_type_info::get_base_vector_type): New function.
50305 (rvv_arg_type_info::get_tree_type): Ditto.
50306 (function_builder::add_unique_function): Adjust for indexed loads/stores
50308 (function_expander::use_exact_insn): New function.
50309 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Adjust for
50310 indexed loads/stores support.
50311 (struct rvv_arg_type_info): Ditto.
50312 (function_expander::index_mode): New function.
50313 (function_base::apply_tail_policy_p): Ditto.
50314 (function_base::apply_mask_policy_p): Ditto.
50315 * config/riscv/vector-iterators.md (unspec): New unspec.
50316 * config/riscv/vector.md (unspec): Ditto.
50317 (@pred_indexed_<order>load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): New
50319 (@pred_indexed_<order>store<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Ditto.
50320 (@pred_indexed_<order>load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
50321 (@pred_indexed_<order>store<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
50322 (@pred_indexed_<order>load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
50323 (@pred_indexed_<order>store<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
50324 (@pred_indexed_<order>load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
50325 (@pred_indexed_<order>store<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
50326 (@pred_indexed_<order>load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
50327 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
50328 (@pred_indexed_<order>load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
50329 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
50330 (@pred_indexed_<order>load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
50331 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
50333 2023-01-30 Flavio Cruz <flaviocruz@gmail.com>
50335 * config.gcc: Recognize x86_64-*-gnu* targets and include
50337 * config/i386/gnu64.h: Define configuration for new target
50338 including ld.so location.
50340 2023-01-30 Philipp Tomsich <philipp.tomsich@vrull.eu>
50342 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Update
50343 ampere1a to include SM4.
50345 2023-01-30 Andrew Pinski <apinski@marvell.com>
50347 PR tree-optimization/108582
50348 * tree-ssa-phiopt.cc (match_simplify_replacement): Add check
50349 for middlebb to have no phi nodes.
50351 2023-01-30 Richard Biener <rguenther@suse.de>
50353 PR tree-optimization/108574
50354 * tree-ssa-sccvn.cc (visit_phi): Instead of swapping
50355 sameval and def, ignore the equivalence if there's the
50356 danger of oscillating between two values.
50358 2023-01-30 Andreas Schwab <schwab@suse.de>
50360 * common/config/riscv/riscv-common.cc
50361 (riscv_option_optimization_table)
50362 [TARGET_DEFAULT_ASYNC_UNWIND_TABLES]: Enable
50363 -fasynchronous-unwind-tables and -funwind-tables.
50364 * config.gcc (riscv*-*-linux*): Define
50365 TARGET_DEFAULT_ASYNC_UNWIND_TABLES.
50367 2023-01-30 YunQiang Su <yunqiang.su@cipunited.com>
50369 * Makefile.in (CROSS_SYSTEM_HEADER_DIR): set according the
50370 value of includedir.
50372 2023-01-30 Richard Biener <rguenther@suse.de>
50375 * cgraph.cc (possibly_call_in_translation_unit_p): Relax
50378 2023-01-30 liuhongt <hongtao.liu@intel.com>
50380 * config/i386/i386.opt: Change AVX512FP16 to AVX512-FP16.
50381 * doc/invoke.texi: Ditto.
50383 2023-01-29 Jan Hubicka <hubicka@ucw.cz>
50385 * ipa-utils.cc: Include calls.h, cfgloop.h and cfganal.h
50386 (stmt_may_terminate_function_p): If assuming return or EH
50387 volatile asm is safe.
50388 (find_always_executed_bbs): Fix handling of terminating BBS and
50389 infinite loops; add debug output.
50390 * tree-ssa-alias.cc (stmt_kills_ref_p): Fix debug output
50392 2023-01-28 Philipp Tomsich <philipp.tomsich@vrull.eu>
50394 * config/aarch64/aarch64.cc (aarch64_uxt_size): fix an
50395 off-by-one in checking the permissible shift-amount.
50397 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
50399 * doc/extend.texi (Named Address Spaces): Update link to the
50402 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
50404 * doc/standards.texi (Standards): Fix markup.
50406 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
50408 * doc/standards.texi (Standards): Update link to Objective-C book.
50410 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
50412 * doc/invoke.texi (Instrumentation Options): Update reference to
50415 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
50417 * doc/standards.texi: Update Go1 link.
50419 2023-01-28 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
50421 * config/riscv/predicates.md (pmode_reg_or_0_operand): New predicate.
50422 * config/riscv/riscv-vector-builtins-bases.cc (class loadstore):
50425 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
50426 * config/riscv/riscv-vector-builtins-functions.def (vlse): New class.
50428 * config/riscv/riscv-vector-builtins.cc
50429 (function_expander::use_contiguous_load_insn): Support vlse/vsse.
50430 * config/riscv/vector.md (@pred_strided_load<mode>): New md pattern.
50431 (@pred_strided_store<mode>): Ditto.
50433 2023-01-28 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
50435 * config/riscv/vector.md (tail_policy_op_idx): Remove.
50436 (mask_policy_op_idx): Remove.
50437 (avl_type_op_idx): Remove.
50439 2023-01-27 Richard Sandiford <richard.sandiford@arm.com>
50441 PR tree-optimization/96373
50442 * tree.h (sign_mask_for): Declare.
50443 * tree.cc (sign_mask_for): New function.
50444 (signed_or_unsigned_type_for): For vector types, try to use the
50445 related_int_vector_mode.
50446 * genmatch.cc (commutative_op): Handle conditional internal functions.
50447 * match.pd: Fold an IFN_COND_MUL+copysign into an IFN_COND_XOR+and.
50449 2023-01-27 Richard Sandiford <richard.sandiford@arm.com>
50451 * tree-vectorizer.cc (vector_costs::compare_inside_loop_cost):
50452 Use the likely minimum VF when bounding the denominators to
50453 the estimated number of iterations.
50455 2023-01-27 Richard Biener <rguenther@suse.de>
50458 * doc/invoke.texi (-shared): Clarify effect on -ffast-math
50459 and -Ofast FP environment side-effects.
50461 2023-01-27 Richard Biener <rguenther@suse.de>
50464 * config/mips/gnu-user.h (GNU_USER_TARGET_MATHFILE_SPEC):
50465 Don't add crtfastmath.o for -shared.
50467 2023-01-27 Richard Biener <rguenther@suse.de>
50470 * config/ia64/linux.h (ENDFILE_SPEC): Don't add crtfastmath.o
50473 2023-01-27 Richard Biener <rguenther@suse.de>
50476 * config/alpha/linux.h (ENDFILE_SPEC): Don't add
50477 crtfastmath.o for -shared.
50479 2023-01-27 Andrew MacLeod <amacleod@redhat.com>
50481 PR tree-optimization/108306
50482 * range-op.cc (operator_lshift::fold_range): Return [0, 0] not
50483 varying for shifts that are always out of void range.
50484 (operator_rshift::fold_range): Return [0, 0] not
50485 varying for shifts that are always out of void range.
50487 2023-01-27 Andrew MacLeod <amacleod@redhat.com>
50489 PR tree-optimization/108447
50490 * gimple-range-fold.cc (old_using_range::relation_fold_and_or):
50491 Do not attempt to fold HONOR_NAN types.
50493 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
50495 * config/riscv/riscv-vector-builtins-shapes.cc (struct loadstore_def):
50496 Remove _m suffix for "vop_m" C++ overloaded API name.
50498 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
50500 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Add vlm/vsm support.
50501 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
50502 * config/riscv/riscv-vector-builtins-functions.def (vlm): New define.
50504 * config/riscv/riscv-vector-builtins-shapes.cc (struct loadstore_def): Add vlm/vsm support.
50505 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_B_OPS): Ditto.
50506 (vbool64_t): Ditto.
50507 (vbool32_t): Ditto.
50508 (vbool16_t): Ditto.
50513 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_B_OPS): Ditto.
50514 (rvv_arg_type_info::get_tree_type): Ditto.
50515 (function_expander::use_contiguous_load_insn): Ditto.
50516 * config/riscv/vector.md (@pred_store<mode>): Ditto.
50518 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
50520 * config/riscv/riscv-vsetvl.cc (vsetvl_insn_p): Add condition to avoid ICE.
50521 (vsetvl_discard_result_insn_p): New function.
50522 (reg_killed_by_bb_p): rename to find_reg_killed_by.
50523 (find_reg_killed_by): New name.
50524 (get_vl): allow it to be called by more functions.
50525 (has_vsetvl_killed_avl_p): Add condition.
50526 (get_avl): allow it to be called by more functions.
50527 (insn_should_be_added_p): New function.
50528 (get_all_nonphi_defs): Refine function.
50529 (get_all_sets): Ditto.
50530 (get_same_bb_set): New function.
50531 (any_insn_in_bb_p): Ditto.
50532 (any_set_in_bb_p): Ditto.
50533 (get_vl_vtype_info): Add VLMAX forward optimization.
50534 (source_equal_p): Fix issues.
50535 (extract_single_source): Refine.
50536 (avl_info::multiple_source_equal_p): New function.
50537 (avl_info::operator==): Adjust for final version.
50538 (vl_vtype_info::operator==): Ditto.
50539 (vl_vtype_info::same_avl_p): Ditto.
50540 (vector_insn_info::parse_insn): Ditto.
50541 (vector_insn_info::available_p): New function.
50542 (vector_insn_info::merge): Adjust for final version.
50543 (vector_insn_info::dump): Add hard_empty.
50544 (pass_vsetvl::hard_empty_block_p): New function.
50545 (pass_vsetvl::backward_demand_fusion): Adjust for final version.
50546 (pass_vsetvl::forward_demand_fusion): Ditto.
50547 (pass_vsetvl::demand_fusion): Ditto.
50548 (pass_vsetvl::cleanup_illegal_dirty_blocks): New function.
50549 (pass_vsetvl::compute_local_properties): Adjust for final version.
50550 (pass_vsetvl::can_refine_vsetvl_p): Ditto.
50551 (pass_vsetvl::refine_vsetvls): Ditto.
50552 (pass_vsetvl::commit_vsetvls): Ditto.
50553 (pass_vsetvl::propagate_avl): New function.
50554 (pass_vsetvl::lazy_vsetvl): Adjust for new version.
50555 * config/riscv/riscv-vsetvl.h (enum def_type): New enum.
50557 2023-01-27 Jakub Jelinek <jakub@redhat.com>
50560 * doc/extend.texi: Fix up return type of __builtin_va_arg_pack_len
50561 from size_t to int.
50563 2023-01-27 Jakub Jelinek <jakub@redhat.com>
50566 * cgraph.cc (cgraph_edge::verify_corresponds_to_fndecl): Allow
50567 redirection of calls to __builtin_trap in addition to redirection
50568 to __builtin_unreachable.
50570 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
50572 * config/riscv/riscv-vsetvl.cc (before_p): Fix bug.
50574 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
50576 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Refine function args.
50577 (emit_vsetvl_insn): Ditto.
50579 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
50581 * config/riscv/vector.md: Fix constraints.
50583 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
50585 * config/riscv/vector-iterators.md: Add TARGET_MIN_VLEN > 32 predicates.
50587 2023-01-27 Patrick Palka <ppalka@redhat.com>
50588 Jakub Jelinek <jakub@redhat.com>
50590 * tree-core.h (tree_code_type, tree_code_length): For
50591 C++17 and later, add inline keyword, otherwise don't define
50592 the arrays, but declare extern arrays.
50593 * tree.cc (tree_code_type, tree_code_length): Define these
50594 arrays for C++14 and older.
50596 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
50598 * config/riscv/riscv-vsetvl.h: Change it into public.
50600 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
50602 * config/riscv/riscv-passes.def (INSERT_PASS_BEFORE): Reorder VSETVL
50605 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
50607 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::execute): Always call split_all_insns.
50609 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
50611 * config/riscv/vector.md: Fix incorrect attributes.
50613 2023-01-27 Richard Biener <rguenther@suse.de>
50616 * config/loongarch/gnu-user.h (GNU_USER_TARGET_MATHFILE_SPEC):
50617 Don't add crtfastmath.o for -shared.
50619 2023-01-27 Alexandre Oliva <oliva@gnu.org>
50621 * doc/options.texi (option, RejectNegative): Mention that
50622 -g-started options are also implicitly negatable.
50624 2023-01-26 Kito Cheng <kito.cheng@sifive.com>
50626 * config/riscv/riscv-vector-builtins.cc (register_builtin_types):
50627 Use get_typenode_from_name to get fixed-width integer type
50629 * config/riscv/riscv-vector-builtins.def: Update define with
50630 fixed-width integer type nodes.
50632 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
50634 * config/riscv/riscv-vsetvl.cc (same_bb_and_before_p): Remove it.
50635 (real_insn_and_same_bb_p): New function.
50636 (same_bb_and_after_or_equal_p): Remove it.
50637 (before_p): New function.
50638 (reg_killed_by_bb_p): Ditto.
50639 (has_vsetvl_killed_avl_p): Ditto.
50640 (get_vl): Move location so that we can call it.
50641 (anticipatable_occurrence_p): Fix issue of AVL=REG support.
50642 (available_occurrence_p): Ditto.
50643 (dominate_probability_p): Remove it.
50644 (can_backward_propagate_p): Remove it.
50645 (get_all_nonphi_defs): New function.
50646 (get_all_predecessors): Ditto.
50647 (any_insn_in_bb_p): Ditto.
50648 (insert_vsetvl): Adjust AVL REG.
50649 (source_equal_p): New function.
50650 (extract_single_source): Ditto.
50651 (avl_info::single_source_equal_p): Ditto.
50652 (avl_info::operator==): Adjust for AVL=REG.
50653 (vl_vtype_info::same_avl_p): Ditto.
50654 (vector_insn_info::set_demand_info): Remove it.
50655 (vector_insn_info::compatible_p): Adjust for AVL=REG.
50656 (vector_insn_info::compatible_avl_p): New function.
50657 (vector_insn_info::merge): Adjust AVL=REG.
50658 (vector_insn_info::dump): Ditto.
50659 (pass_vsetvl::merge_successors): Remove it.
50660 (enum fusion_type): New enum.
50661 (pass_vsetvl::get_backward_fusion_type): New function.
50662 (pass_vsetvl::backward_demand_fusion): Adjust for AVL=REG.
50663 (pass_vsetvl::forward_demand_fusion): Ditto.
50664 (pass_vsetvl::demand_fusion): Ditto.
50665 (pass_vsetvl::prune_expressions): Ditto.
50666 (pass_vsetvl::compute_local_properties): Ditto.
50667 (pass_vsetvl::cleanup_vsetvls): Ditto.
50668 (pass_vsetvl::commit_vsetvls): Ditto.
50669 (pass_vsetvl::init): Ditto.
50670 * config/riscv/riscv-vsetvl.h (enum fusion_type): New enum.
50671 (enum merge_type): New enum.
50673 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
50675 * config/riscv/riscv-vsetvl.cc
50676 (vector_infos_manager::vector_infos_manager): Add probability.
50677 (vector_infos_manager::dump): Ditto.
50678 (pass_vsetvl::compute_probabilities): Ditto.
50679 * config/riscv/riscv-vsetvl.h (struct vector_block_info): Ditto.
50681 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
50683 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator==): Remove dirty_pat.
50684 (vector_insn_info::merge): Ditto.
50685 (vector_insn_info::dump): Ditto.
50686 (pass_vsetvl::merge_successors): Ditto.
50687 (pass_vsetvl::backward_demand_fusion): Ditto.
50688 (pass_vsetvl::forward_demand_fusion): Ditto.
50689 (pass_vsetvl::commit_vsetvls): Ditto.
50690 * config/riscv/riscv-vsetvl.h: Ditto.
50692 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
50694 * config/riscv/riscv-vsetvl.cc (add_label_notes): Rename insn to
50697 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
50699 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::backward_demand_fusion): Refine codes.
50701 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
50703 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::forward_demand_fusion):
50704 Add pre-check for redundant flow.
50706 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
50708 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::create_bitmap_vectors): New function.
50709 (vector_infos_manager::free_bitmap_vectors): Ditto.
50710 (pass_vsetvl::pre_vsetvl): Adjust codes.
50711 * config/riscv/riscv-vsetvl.h: New function declaration.
50713 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
50715 * config/riscv/riscv-vsetvl.cc (can_backward_propagate_p): Fix for null iter_bb.
50716 (vector_insn_info::set_demand_info): New function.
50717 (pass_vsetvl::emit_local_forward_vsetvls): Adjust for refinement of Phase 3.
50718 (pass_vsetvl::merge_successors): Ditto.
50719 (pass_vsetvl::compute_global_backward_infos): Ditto.
50720 (pass_vsetvl::backward_demand_fusion): Ditto.
50721 (pass_vsetvl::forward_demand_fusion): Ditto.
50722 (pass_vsetvl::demand_fusion): New function.
50723 (pass_vsetvl::lazy_vsetvl): Adjust for refinement of phase 3.
50724 * config/riscv/riscv-vsetvl.h: New function declaration.
50726 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
50728 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator>=): Fix available condition.
50730 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
50732 * config/riscv/riscv-vsetvl.cc (change_vsetvl_insn): New function.
50733 (pass_vsetvl::compute_global_backward_infos): Simplify codes.
50735 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
50737 * config/riscv/riscv-vsetvl.cc (loop_basic_block_p): Adjust function.
50738 (backward_propagate_worthwhile_p): Fix non-worthwhile.
50740 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
50742 * config/riscv/riscv-vsetvl.cc (change_insn): Adjust in_group in validate_change.
50744 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
50746 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::all_same_avl_p): New function.
50747 (pass_vsetvl::can_refine_vsetvl_p): Add AVL check.
50748 (pass_vsetvl::commit_vsetvls): Ditto.
50749 * config/riscv/riscv-vsetvl.h: New function declaration.
50751 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
50753 * config/riscv/vector.md:
50755 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
50757 * config/riscv/riscv-vector-builtins-bases.cc (class loadstore): use
50758 pred_store for vse.
50759 * config/riscv/riscv-vector-builtins.cc
50760 (function_expander::add_mem_operand): Refine function.
50761 (function_expander::use_contiguous_load_insn): Adjust new
50763 (function_expander::use_contiguous_store_insn): Ditto.
50764 * config/riscv/riscv-vector-builtins.h: Refine function.
50765 * config/riscv/vector.md (@pred_store<mode>): New pattern.
50767 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
50769 * config/riscv/riscv-vector-builtins.cc: Change to scalar pointer.
50771 2023-01-26 Marek Polacek <polacek@redhat.com>
50773 PR middle-end/108543
50774 * opts.cc (parse_sanitizer_options): Don't always clear SANITIZE_ADDRESS
50775 if it was previously set.
50777 2023-01-26 Jakub Jelinek <jakub@redhat.com>
50779 PR tree-optimization/108540
50780 * range-op-float.cc (foperator_equal::fold_range): If both op1 and op2
50781 are singletons, use range_true even if op1 != op2
50782 when one range is [-0.0, -0.0] and another [0.0, 0.0]. Similarly,
50783 even if intersection of the ranges is empty and one has
50784 zero low bound and another zero high bound, use range_true_and_false
50785 rather than range_false.
50786 (foperator_not_equal::fold_range): If both op1 and op2
50787 are singletons, use range_false even if op1 != op2
50788 when one range is [-0.0, -0.0] and another [0.0, 0.0]. Similarly,
50789 even if intersection of the ranges is empty and one has
50790 zero low bound and another zero high bound, use range_true_and_false
50791 rather than range_true.
50793 2023-01-26 Jakub Jelinek <jakub@redhat.com>
50795 * value-relation.cc (kind_string): Add const.
50796 (rr_negate_table, rr_swap_table, rr_intersect_table,
50797 rr_union_table, rr_transitive_table): Add static const, change
50798 element type from relation_kind to unsigned char.
50799 (relation_negate, relation_swap, relation_intersect, relation_union,
50800 relation_transitive): Cast rr_*_table element to relation_kind.
50801 (relation_to_code): Add static const.
50802 (relation_tests): Assert VREL_LAST is smaller than UCHAR_MAX.
50804 2023-01-26 Richard Biener <rguenther@suse.de>
50806 PR tree-optimization/108547
50807 * gimple-predicate-analysis.cc (value_sat_pred_p):
50810 2023-01-26 Siddhesh Poyarekar <siddhesh@gotplt.org>
50812 PR tree-optimization/108522
50813 * tree-object-size.cc (compute_object_offset): Make EXPR
50814 argument non-const. Call component_ref_field_offset.
50816 2023-01-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
50818 * config/aarch64/aarch64-option-extensions.def (cssc): Specify
50819 FEATURE_STRING field.
50821 2023-01-26 Gerald Pfeifer <gerald@pfeifer.com>
50823 * doc/sourcebuild.texi: Refer to projects as GCC and GDB.
50825 2023-01-25 Iain Sandoe <iain@sandoe.co.uk>
50829 * gcc.cc: Provide default specs for Modula-2 so that when the
50830 language is not built-in better diagnostics are emitted for
50831 attempts to use .mod or .m2i file extensions.
50833 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
50835 * config/arm/mve.md (mve_vqnegq_s<mode>): Fix spacing.
50837 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
50839 * config/arm/mve.md (mve_vqabsq_s<mode>): Fix spacing.
50841 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
50843 * config/arm/mve.md (mve_vnegq_f<mode>, mve_vnegq_s<mode>):
50846 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
50848 * config/arm/mve.md (@mve_vclzq_s<mode>): Fix spacing.
50850 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
50852 * config/arm/mve.md (mve_vclsq_s<mode>): Fix spacing.
50854 2023-01-25 Richard Biener <rguenther@suse.de>
50856 PR tree-optimization/108523
50857 * tree-ssa-sccvn.cc (visit_phi): Avoid using the exclusive
50858 backedge value for the result when using predication to
50861 2023-01-25 Richard Biener <rguenther@suse.de>
50863 * doc/lto.texi (Command line options): Reword and update reference
50864 to removed lto_read_all_file_options.
50866 2023-01-25 Richard Sandiford <richard.sandiford@arm.com>
50868 * config/aarch64/aarch64.md (umax<mode>3): Separate the CNT and CSSC
50871 2023-01-25 Gerald Pfeifer <gerald@pfeifer.com>
50873 * doc/contrib.texi: Add Jose E. Marchesi.
50875 2023-01-25 Jakub Jelinek <jakub@redhat.com>
50877 PR tree-optimization/108498
50878 * gimple-ssa-store-merging.cc (class store_operand_info):
50879 End coment with full stop rather than comma.
50880 (split_group): Likewise.
50881 (merged_store_group::apply_stores): Clear string_concatenation if
50882 start or end aren't on a byte boundary.
50884 2023-01-25 Siddhesh Poyarekar <siddhesh@gotplt.org>
50885 Jakub Jelinek <jakub@redhat.com>
50887 PR tree-optimization/108522
50888 * tree-object-size.cc (compute_object_offset): Use
50889 TREE_OPERAND(ref, 2) for COMPONENT_REF when available.
50891 2023-01-24 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
50893 * config/xtensa/xtensa.md:
50894 Fix exit from loops detecting references before overwriting in the
50897 2023-01-24 Vladimir N. Makarov <vmakarov@redhat.com>
50899 * lra-constraints.cc (get_hard_regno): Remove final_p arg. Always
50900 do elimination but only for hard register.
50901 (operands_match_p, uses_hard_regs_p, process_alt_operands): Adjust
50902 calls of get_hard_regno.
50904 2023-01-24 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
50906 * config/s390/s390-d.cc (s390_d_target_versions): Fix detection
50909 2023-01-24 Andre Vieira <andre.simoesdiasvieira@arm.com>
50912 * config/arm/mve.md (mve_vstrbq_p_<supf><mode>, mve_vstrhq_p_fv8hf,
50913 mve_vstrhq_p_<supf><mode>, mve_vstrwq_p_<supf>v4si): Add memory operand
50916 2023-01-24 Xianmiao Qu <cooper.qu@linux.alibaba.com>
50918 * config.gcc(csky-*-linux*): Define CSKY_ENABLE_MULTILIB
50919 and only include 'csky/t-csky-linux' when enable multilib.
50920 * config/csky/csky-linux-elf.h(SYSROOT_SUFFIX_SPEC): Don't
50921 define it when disable multilib.
50923 2023-01-24 Richard Biener <rguenther@suse.de>
50925 PR tree-optimization/108500
50926 * dominance.h (calculate_dominance_info): Add parameter
50927 to indicate fast-query compute, defaulted to true.
50928 * dominance.cc (calculate_dominance_info): Honor
50929 fast-query compute parameter.
50930 * tree-cfgcleanup.cc (cleanup_tree_cfg_noloop): Do
50931 not compute the dominator fast-query DFS numbers.
50933 2023-01-24 Eric Biggers <ebiggers@google.com>
50936 * optc-save-gen.awk: Fix copy-and-paste error.
50938 2023-01-24 Jakub Jelinek <jakub@redhat.com>
50941 * cgraphbuild.cc: Include gimplify.h.
50942 (record_reference): Replace VAR_DECLs with DECL_HAS_VALUE_EXPR_P with
50943 their corresponding DECL_VALUE_EXPR expressions after unsharing.
50945 2023-01-24 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
50948 * config.gcc (tm_file): Move the variable out of loop.
50950 2023-01-24 Lulu Cheng <chenglulu@loongson.cn>
50951 Yang Yujie <yangyujie@loongson.cn>
50954 * config/loongarch/loongarch.cc (loongarch_classify_address):
50955 Add precessint for CONST_INT.
50956 (loongarch_print_operand_reloc): Operand modifier 'c' is supported.
50957 (loongarch_print_operand): Increase the processing of '%c'.
50958 * doc/extend.texi: Adds documents for LoongArch operand modifiers.
50959 And port the public operand modifiers information to this document.
50961 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
50963 * doc/invoke.texi (-mbranch-protection): Update documentation.
50965 2023-01-23 Richard Biener <rguenther@suse.de>
50968 * config/sparc/freebsd.h (ENDFILE_SPEC): Don't add crtfastmath.o
50970 * config/sparc/linux.h (ENDFILE_SPEC): Likewise.
50971 * config/sparc/linux64.h (ENDFILE_SPEC): Likewise.
50972 * config/sparc/sp-elf.h (ENDFILE_SPEC): Likewise.
50973 * config/sparc/sp64-elf.h (ENDFILE_SPEC): Likewise.
50975 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
50977 * config/arm/aout.h (ra_auth_code): Add entry in enum.
50978 * config/arm/arm.cc (emit_multi_reg_push): Add RA_AUTH_CODE register
50979 to dwarf frame expression.
50980 (arm_emit_multi_reg_pop): Restore RA_AUTH_CODE register.
50981 (arm_expand_prologue): Update frame related information and reg notes
50982 for pac/pacbit insn.
50983 (arm_regno_class): Check for pac pseudo reigster.
50984 (arm_dbx_register_number): Assign ra_auth_code register number in dwarf.
50985 (arm_init_machine_status): Set pacspval_needed to zero.
50986 (arm_debugger_regno): Check for PAC register.
50987 (arm_unwind_emit_sequence): Print .save directive with ra_auth_code
50989 (arm_unwind_emit_set): Add entry for IP_REGNUM in switch case.
50990 (arm_unwind_emit): Update REG_CFA_REGISTER case._
50991 * config/arm/arm.h (FIRST_PSEUDO_REGISTER): Modify.
50992 (DWARF_PAC_REGNUM): Define.
50993 (IS_PAC_REGNUM): Likewise.
50994 (enum reg_class): Add PAC_REG entry.
50995 (machine_function): Add pacbti_needed state to structure.
50996 * config/arm/arm.md (RA_AUTH_CODE): Define.
50998 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
51000 * config.gcc ($tm_file): Update variable.
51001 * config/arm/arm-mlib.h: Create new header file.
51002 * config/arm/t-rmprofile (MULTI_ARCH_DIRS_RM): Rename mbranch-protection
51003 multilib arch directory.
51004 (MULTILIB_REUSE): Add multilib reuse rules.
51005 (MULTILIB_MATCHES): Add multilib match rules.
51007 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
51009 * config/arm/arm-cpus.in (cortex-m85): Define new CPU.
51010 * config/arm/arm-tables.opt: Regenerate.
51011 * config/arm/arm-tune.md: Likewise.
51012 * doc/invoke.texi (Arm Options): Document -mcpu=cortex-m85.
51013 * (-mfix-cmse-cve-2021-35465): Likewise.
51015 2023-01-23 Richard Biener <rguenther@suse.de>
51017 PR tree-optimization/108482
51018 * tree-vect-generic.cc (expand_vector_operations): Fold remaining
51019 .LOOP_DIST_ALIAS calls.
51021 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
51023 * config.gcc (arm*-*-*): Add 'aarch-bti-insert.o' object.
51024 * config/arm/arm-protos.h: Update.
51025 * config/arm/aarch-common-protos.h: Declare
51026 'aarch_bti_arch_check'.
51027 * config/arm/arm.cc (aarch_bti_enabled) Update.
51028 (aarch_bti_j_insn_p, aarch_pac_insn_p, aarch_gen_bti_c)
51029 (aarch_gen_bti_j, aarch_bti_arch_check): New functions.
51030 * config/arm/arm.md (bti_nop): New insn.
51031 * config/arm/t-arm (PASSES_EXTRA): Add 'arm-passes.def'.
51032 (aarch-bti-insert.o): New target.
51033 * config/arm/unspecs.md (VUNSPEC_BTI_NOP): New unspec.
51034 * config/arm/aarch-bti-insert.cc (rest_of_insert_bti): Verify arch
51036 (gate): Make use of 'aarch_bti_arch_check'.
51037 * config/arm/arm-passes.def: New file.
51038 * config/aarch64/aarch64.cc (aarch_bti_arch_check): New function.
51040 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
51042 * config.gcc (aarch64*-*-*): Rename 'aarch64-bti-insert.o' into
51043 'aarch-bti-insert.o'.
51044 * config/aarch64/aarch64-protos.h: Remove 'aarch64_bti_enabled'
51046 * config/aarch64/aarch64.cc (aarch_bti_enabled): Rename.
51047 (aarch_bti_j_insn_p, aarch_pac_insn_p): New functions.
51048 (aarch64_output_mi_thunk)
51049 (aarch64_print_patchable_function_entry)
51050 (aarch64_file_end_indicate_exec_stack): Update renamed function
51051 calls to renamed functions.
51052 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Likewise.
51053 * config/aarch64/t-aarch64 (aarch-bti-insert.o): Update
51055 * config/aarch64/aarch64-bti-insert.cc: Delete.
51056 * config/arm/aarch-bti-insert.cc: New file including and
51057 generalizing code from aarch64-bti-insert.cc.
51058 * config/arm/aarch-common-protos.h: Update.
51060 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
51062 * config/arm/arm.h (arm_arch8m_main): Declare it.
51063 * config/arm/arm-protos.h (arm_current_function_pac_enabled_p):
51065 * config/arm/arm.cc (arm_arch8m_main): Define it.
51066 (arm_option_reconfigure_globals): Set arm_arch8m_main.
51067 (arm_compute_frame_layout, arm_expand_prologue)
51068 (thumb2_expand_return, arm_expand_epilogue)
51069 (arm_conditional_register_usage): Update for pac codegen.
51070 (arm_current_function_pac_enabled_p): New function.
51071 (aarch_bti_enabled) New function.
51072 (use_return_insn): Return zero when pac is enabled.
51073 * config/arm/arm.md (pac_ip_lr_sp, pacbti_ip_lr_sp, aut_ip_lr_sp):
51075 * config/arm/unspecs.md (UNSPEC_PAC_NOP)
51076 (VUNSPEC_PACBTI_NOP, VUNSPEC_AUT_NOP): Add unspecs.
51078 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
51080 * config/arm/t-rmprofile: Add multilib rules for march +pacbti and
51081 mbranch-protection.
51083 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
51084 Tejas Belagod <tbelagod@arm.com>
51086 * config/arm/arm.cc (arm_file_start): Emit EABI attributes for
51087 Tag_PAC_extension, Tag_BTI_extension, TAG_BTI_use, TAG_PACRET_use.
51089 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
51090 Tejas Belagod <tbelagod@arm.com>
51091 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
51093 * ginclude/unwind-arm-common.h (_Unwind_VRS_RegClass): Introduce
51094 new pseudo register class _UVRSC_PAC.
51096 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
51097 Tejas Belagod <tbelagod@arm.com>
51099 * config/arm/arm-c.cc (arm_cpu_builtins): Define
51100 __ARM_FEATURE_BTI_DEFAULT, __ARM_FEATURE_PAC_DEFAULT,
51101 __ARM_FEATURE_PAUTH and __ARM_FEATURE_BTI.
51103 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
51104 Tejas Belagod <tbelagod@arm.com>
51106 * doc/sourcebuild.texi: Document arm_pacbti_hw.
51108 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
51109 Tejas Belagod <tbelagod@arm.com>
51110 Richard Earnshaw <Richard.Earnshaw@arm.com>
51112 * config/arm/arm.cc (arm_configure_build_target): Parse and validate
51113 -mbranch-protection option and initialize appropriate data structures.
51114 * config/arm/arm.opt (-mbranch-protection): New option.
51115 * doc/invoke.texi (Arm Options): Document it.
51117 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
51118 Tejas Belagod <tbelagod@arm.com>
51120 * config/arm/arm.h (TARGET_HAVE_PACBTI): New macro.
51121 * config/arm/arm-cpus.in (pacbti): New feature.
51122 * doc/invoke.texi (Arm Options): Document it.
51124 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
51125 Tejas Belagod <tbelagod@arm.com>
51127 * common/config/aarch64/aarch64-common.cc: Include aarch-common.h.
51128 (all_architectures): Fix comment.
51129 (aarch64_parse_extension): Rename return type, enum value names.
51130 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Rename
51131 factored out aarch_ra_sign_scope and aarch_ra_sign_key variables.
51132 Also rename corresponding enum values.
51133 * config/aarch64/aarch64-opts.h (aarch64_function_type): Factor
51134 out aarch64_function_type and move it to common code as
51135 aarch_function_type in aarch-common.h.
51136 * config/aarch64/aarch64-protos.h: Include common types header,
51137 move out types aarch64_parse_opt_result and aarch64_key_type to
51139 * config/aarch64/aarch64.cc: Move mbranch-protection parsing types
51140 and functions out into aarch-common.h and aarch-common.cc. Fix up
51141 all the name changes resulting from the move.
51142 * config/aarch64/aarch64.md: Fix up aarch64_ra_sign_key type name change
51144 * config/aarch64/aarch64.opt: Include aarch-common.h to import
51145 type move. Fix up name changes from factoring out common code and
51147 * config/arm/aarch-common-protos.h: Export factored out routines to both
51149 * config/arm/aarch-common.cc: Include newly factored out types.
51150 Move all mbranch-protection code and data structures from
51152 * config/arm/aarch-common.h: New header that declares types shared
51153 between aarch32 and aarch64 backends.
51154 * config/arm/arm-protos.h: Declare types and variables that are
51155 made common to aarch64 and aarch32 backends - aarch_ra_sign_key,
51156 aarch_ra_sign_scope and aarch_enable_bti.
51157 * config/arm/arm.opt (config/arm/aarch-common.h): Include header.
51158 (aarch_ra_sign_scope, aarch_enable_bti): Declare variable.
51159 * config/arm/arm.cc: Add missing includes.
51161 2023-01-23 Tobias Burnus <tobias@codesourcery.com>
51163 * doc/install.texi (amdgcn, nvptx): Require newlib 4.3.0.
51165 2023-01-23 Richard Biener <rguenther@suse.de>
51167 PR tree-optimization/108449
51168 * cgraphunit.cc (check_global_declaration): Do not turn
51169 undefined statics into externs.
51171 2023-01-22 Dimitar Dimitrov <dimitar@dinux.eu>
51173 * config/pru/pru.h (CLZ_DEFINED_VALUE_AT_ZERO): Fix value for QI
51174 and HI input modes.
51175 * config/pru/pru.md (clz): Fix generated code for QI and HI
51178 2023-01-22 Cupertino Miranda <cupertino.miranda@oracle.com>
51180 * config/v850/v850.cc (v850_select_section): Put const volatile
51181 objects into read-only sections.
51183 2023-01-20 Tejas Belagod <tejas.belagod@arm.com>
51185 * config/aarch64/arm_neon.h (vmull_p64, vmull_high_p64, vaeseq_u8,
51186 vaesdq_u8, vaesmcq_u8, vaesimcq_u8): Gate under "nothing+aes".
51187 (vsha1*_u32, vsha256*_u32): Gate under "nothing+sha2".
51189 2023-01-20 Jakub Jelinek <jakub@redhat.com>
51191 PR tree-optimization/108457
51192 * tree-ssa-loop-niter.cc (build_cltz_expr): Use
51193 SCALAR_INT_TYPE_MODE (utype) directly as C[LT]Z_DEFINED_VALUE_AT_ZERO
51194 argument instead of a temporary. Formatting fixes.
51196 2023-01-19 Jakub Jelinek <jakub@redhat.com>
51198 PR tree-optimization/108447
51199 * value-relation.cc (rr_union_table): Fix VREL_UNDEFINED row order.
51200 (relation_tests): Add self-tests for relation_{intersect,union}
51202 * selftest.h (relation_tests): Declare.
51203 * function-tests.cc (test_ranges): Call it.
51205 2023-01-19 H.J. Lu <hjl.tools@gmail.com>
51208 * config/i386/i386-expand.cc (ix86_expand_builtin): Check
51209 invalid third argument to __builtin_ia32_prefetch.
51211 2023-01-19 Jakub Jelinek <jakub@redhat.com>
51213 PR middle-end/108459
51214 * omp-expand.cc (expand_omp_for_init_counts): Use fold_build1 rather
51215 than fold_unary for NEGATE_EXPR.
51217 2023-01-19 Christophe Lyon <christophe.lyon@arm.com>
51220 * config/aarch64/aarch64.cc (aarch64_layout_arg): Improve
51221 comment. Move assert about alignment a bit later.
51223 2023-01-19 Jakub Jelinek <jakub@redhat.com>
51225 PR tree-optimization/108440
51226 * tree-ssa-forwprop.cc: Include gimple-range.h.
51227 (simplify_rotate): For the forms with T2 wider than T and shift counts of
51228 Y and B - Y add & (B - 1) masking for the rotate count if Y could be equal
51229 to B. For the forms with T2 wider than T and shift counts of
51230 Y and (-Y) & (B - 1), don't punt if range could be [B, B2], but only if
51231 range doesn't guarantee Y < B or Y = N * B. If range doesn't guarantee
51232 Y < B, also add & (B - 1) masking for the rotate count. Use lazily created
51233 pass specific ranger instead of get_global_range_query.
51234 (pass_forwprop::execute): Disable that ranger at the end of pass if it has
51237 2023-01-19 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
51239 * config/aarch64/aarch64-simd.md (aarch64_simd_vec_set<mode>): Use
51240 exact_log2 (INTVAL (operands[2])) >= 0 as condition for gating
51242 (aarch64_simd_vec_copy_lane<mode>): Likewise.
51243 (aarch64_simd_vec_copy_lane_<vswap_width_name><mode>): Likewise.
51245 2023-01-19 Alexandre Oliva <oliva@adacore.com>
51248 * sched-deps.cc (sched_analyze_2): Skip cselib address lookup
51249 within debug insns.
51251 2023-01-18 Martin Jambor <mjambor@suse.cz>
51254 * cgraph.cc (cgraph_node::remove): Check whether nodes up the
51255 lcone_of chain also do not need the body.
51257 2023-01-18 Richard Biener <rguenther@suse.de>
51260 2022-12-16 Richard Biener <rguenther@suse.de>
51262 PR middle-end/108086
51263 * tree-inline.cc (remap_ssa_name): Do not unshare the
51264 result from the decl_map.
51266 2023-01-18 Murray Steele <murray.steele@arm.com>
51269 * config/arm/arm_mve.h (__arm_vst1q_p_u8): Use prefixed intrinsic
51271 (__arm_vst1q_p_s8): Likewise.
51272 (__arm_vld1q_z_u8): Likewise.
51273 (__arm_vld1q_z_s8): Likewise.
51274 (__arm_vst1q_p_u16): Likewise.
51275 (__arm_vst1q_p_s16): Likewise.
51276 (__arm_vld1q_z_u16): Likewise.
51277 (__arm_vld1q_z_s16): Likewise.
51278 (__arm_vst1q_p_u32): Likewise.
51279 (__arm_vst1q_p_s32): Likewise.
51280 (__arm_vld1q_z_u32): Likewise.
51281 (__arm_vld1q_z_s32): Likewise.
51282 (__arm_vld1q_z_f16): Likewise.
51283 (__arm_vst1q_p_f16): Likewise.
51284 (__arm_vld1q_z_f32): Likewise.
51285 (__arm_vst1q_p_f32): Likewise.
51287 2023-01-18 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
51289 * config/xtensa/xtensa.md (xorsi3_internal):
51290 Rename from the original of "xorsi3".
51291 (xorsi3): New expansion pattern that emits addition rather than
51292 bitwise-XOR when the second source is a constant of -2147483648
51295 2023-01-18 Kewen Lin <linkw@linux.ibm.com>
51296 Andrew Pinski <apinski@marvell.com>
51299 * config/rs6000/rs6000-overload.def (VEC_VSUBCUQ): Fix typo
51300 vec_vsubcuqP with vec_vsubcuq.
51302 2023-01-18 Kewen Lin <linkw@linux.ibm.com>
51305 * config/rs6000/rs6000.cc (rs6000_opaque_type_invalid_use_p): Add the
51306 support for invalid uses of MMA opaque type in function arguments.
51308 2023-01-18 liuhongt <hongtao.liu@intel.com>
51311 * config/i386/cygwin.h (ENDFILE_SPEC): Link crtfastmath.o
51312 whenever -mdaz-ftz is specified. Don't link crtfastmath.o when
51313 -share or -mno-daz-ftz is specified.
51314 * config/i386/darwin.h (ENDFILE_SPEC): Ditto.
51315 * config/i386/mingw32.h (ENDFILE_SPEC): Ditto.
51317 2023-01-17 Jose E. Marchesi <jose.marchesi@oracle.com>
51319 * config/bpf/bpf.cc (bpf_option_override): Disable
51322 2023-01-17 Jakub Jelinek <jakub@redhat.com>
51324 PR tree-optimization/106523
51325 * tree-ssa-forwprop.cc (simplify_rotate): For the
51326 patterns with (-Y) & (B - 1) in one operand's shift
51327 count and Y in another, if T2 has wider precision than T,
51328 punt if Y could have a value in [B, B2 - 1] range.
51330 2023-01-16 H.J. Lu <hjl.tools@gmail.com>
51333 * config/i386/i386.cc (x86_output_mi_thunk): Disable
51334 -mforce-indirect-call for PIC in 32-bit mode.
51336 2023-01-16 Jan Hubicka <hubicka@ucw.cz>
51339 * ipa-modref.cc (modref_access_analysis::analyze): Use
51340 find_always_executed_bbs.
51341 * ipa-sra.cc (process_scan_results): Likewise.
51342 * ipa-utils.cc (stmt_may_terminate_function_p): New function.
51343 (find_always_executed_bbs): New function.
51344 * ipa-utils.h (stmt_may_terminate_function_p): Declare.
51345 (find_always_executed_bbs): Declare.
51347 2023-01-16 Jan Hubicka <jh@suse.cz>
51349 * config/i386/i386.cc (ix86_vectorize_builtin_scatter): Guard scatter
51350 by TARGET_USE_SCATTER.
51351 * config/i386/i386.h (TARGET_USE_SCATTER_2PARTS,
51352 TARGET_USE_SCATTER_4PARTS, TARGET_USE_SCATTER): New macros.
51353 * config/i386/x86-tune.def (TARGET_USE_SCATTER_2PARTS,
51354 TARGET_USE_SCATTER_4PARTS, TARGET_USE_SCATTER): New tunes.
51355 (X86_TUNE_AVOID_256FMA_CHAINS, X86_TUNE_AVOID_512FMA_CHAINS): Disable
51356 for znver4. (X86_TUNE_USE_GATHER): Disable for zen4.
51358 2023-01-16 Richard Biener <rguenther@suse.de>
51361 * config/sol2.h (ENDFILE_SPEC): Don't add crtfastmath.o for -shared.
51363 2023-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
51367 * config/arm/arm_mve.h (__ARM_mve_coerce2): Split types.
51368 (__ARM_mve_coerce3): Likewise.
51370 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
51372 * tree-ssa-loop-niter.cc (build_popcount_expr): Add IFN support.
51374 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
51376 * tree-ssa-loop-niter.cc (number_of_iterations_cltz): New.
51377 (number_of_iterations_bitcount): Add call to the above.
51378 (number_of_iterations_exit_assumptions): Add EQ_EXPR case for
51379 c[lt]z idiom recognition.
51381 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
51383 * doc/sourcebuild.texi: Add missing target attributes.
51385 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
51387 PR tree-optimization/94793
51388 * tree-scalar-evolution.cc (expression_expensive_p): Add checks
51390 * tree-ssa-loop-niter.cc (build_cltz_expr): New.
51391 (number_of_iterations_cltz_complement): New.
51392 (number_of_iterations_bitcount): Add call to the above.
51394 2023-01-16 Jonathan Wakely <jwakely@redhat.com>
51396 * doc/extend.texi (Common Function Attributes): Fix grammar.
51398 2023-01-16 Jakub Jelinek <jakub@redhat.com>
51401 * config/riscv/riscv-vsetvl.h: Add space in between Copyright and (C).
51402 * config/riscv/riscv-vsetvl.cc: Likewise.
51404 2023-01-16 Jakub Jelinek <jakub@redhat.com>
51407 * config/i386/xmmintrin.h (_mm_undefined_ps): Temporarily
51408 disable -Winit-self using pragma GCC diagnostic ignored.
51409 * config/i386/emmintrin.h (_mm_undefined_pd, _mm_undefined_si128):
51411 * config/i386/avxintrin.h (_mm256_undefined_pd, _mm256_undefined_ps,
51412 _mm256_undefined_si256): Likewise.
51413 * config/i386/avx512fintrin.h (_mm512_undefined_pd,
51414 _mm512_undefined_ps, _mm512_undefined_epi32): Likewise.
51415 * config/i386/avx512fp16intrin.h (_mm_undefined_ph,
51416 _mm256_undefined_ph, _mm512_undefined_ph): Likewise.
51418 2023-01-16 Kewen Lin <linkw@linux.ibm.com>
51421 * config/rs6000/rs6000.cc (rs6000_opaque_type_invalid_use_p): Add the
51422 support for invalid uses in inline asm, factor out the checking and
51423 erroring to lambda function check_and_error_invalid_use.
51425 2023-01-15 Aldy Hernandez <aldyh@redhat.com>
51427 PR tree-optimization/107608
51428 * range-op-float.cc (range_operator_float::fold_range): Avoid
51429 folding into INF when flag_trapping_math.
51430 * value-range.h (frange::known_isinf): Return false for possible NANs.
51432 2023-01-15 Xianmiao Qu <cooper.qu@linux.alibaba.com>
51434 * config.gcc (csky-*-*): Support --with-float=softfp.
51436 2023-01-14 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
51438 * config/xtensa/xtensa-protos.h (order_regs_for_local_alloc):
51439 Rename to xtensa_adjust_reg_alloc_order.
51440 * config/xtensa/xtensa.cc (xtensa_adjust_reg_alloc_order):
51441 Ditto. And also remove code to reorder register numbers for
51442 leaf functions, rename the tables, and adjust the allocation
51443 order for the call0 ABI to use register A0 more.
51444 (xtensa_leaf_regs): Remove.
51445 * config/xtensa/xtensa.h (REG_ALLOC_ORDER): Cosmetics.
51446 (order_regs_for_local_alloc): Rename as the above.
51447 (LEAF_REGISTERS, LEAF_REG_REMAP, leaf_function): Remove.
51449 2023-01-14 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
51451 * config/aarch64/aarch64-sve.md (aarch64_vec_duplicate_vq<mode>_le):
51452 Change to define_insn_and_split to fold ldr+dup to ld1rq.
51453 * config/aarch64/predicates.md (aarch64_sve_dup_ld1rq_operand): New.
51455 2023-01-14 Alexandre Oliva <oliva@adacore.com>
51457 * hash-table.h (is_deleted): Precheck !is_empty.
51458 (mark_deleted): Postcheck !is_empty.
51459 (copy constructor): Test is_empty before is_deleted.
51461 2023-01-14 Alexandre Oliva <oliva@adacore.com>
51464 * config/arm/arm.md (movmisaligndi): Prefer aligned SImode
51467 2023-01-13 Eric Botcazou <ebotcazou@adacore.com>
51469 PR rtl-optimization/108274
51470 * function.cc (thread_prologue_and_epilogue_insns): Also update the
51471 DF information for calls in a few more cases.
51473 2023-01-13 John David Anglin <danglin@gcc.gnu.org>
51475 * config/pa/pa-linux.h (TARGET_SYNC_LIBCALL): Delete define.
51476 * config/pa/pa.cc (pa_init_libfuncs): Use MAX_SYNC_LIBFUNC_SIZE
51478 * config/pa/pa.h (TARGET_SYNC_LIBCALLS): Use flag_sync_libcalls.
51479 (MAX_SYNC_LIBFUNC_SIZE): Define.
51480 (TARGET_CPU_CPP_BUILTINS): Define __SOFTFP__ when soft float is
51482 * config/pa/pa.md (atomic_storeqi): Emit __atomic_exchange_1
51483 libcall when sync libcalls are disabled.
51484 (atomic_storehi, atomic_storesi, atomic_storedi): Likewise.
51485 (atomic_loaddi): Emit __atomic_load_8 libcall when sync libcalls
51486 are disabled on 32-bit target.
51487 * config/pa/pa.opt (matomic-libcalls): New option.
51488 * doc/invoke.texi (HPPA Options): Update.
51490 2023-01-13 Alexander Monakov <amonakov@ispras.ru>
51492 PR rtl-optimization/108117
51493 PR rtl-optimization/108132
51494 * sched-deps.cc (deps_analyze_insn): Do not schedule across
51495 calls before reload.
51497 2023-01-13 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
51499 * common/config/arm/arm-common.cc (arm_canon_arch_option_1): Ignore cde
51500 options for -mlibarch.
51501 * config/arm/arm-cpus.in (begin cpu cortex-m55): Add cde options.
51502 * doc/invoke.texi (CDE): Document options for Cortex-M55 CPU.
51504 2023-01-13 Qing Zhao <qing.zhao@oracle.com>
51506 * attribs.cc (strict_flex_array_level_of): Move this function to ...
51507 * attribs.h (strict_flex_array_level_of): Remove the declaration.
51508 * gimple-array-bounds.cc (array_bounds_checker::check_array_ref):
51509 replace the referece to strict_flex_array_level_of with
51510 DECL_NOT_FLEXARRAY.
51511 * tree.cc (component_ref_size): Likewise.
51513 2023-01-13 Richard Biener <rguenther@suse.de>
51516 * config/arm/linux-eabi.h (ENDFILE_SPEC): Don't add
51517 crtfastmath.o for -shared.
51518 * config/arm/unknown-elf.h (STARTFILE_SPEC): Likewise.
51520 2023-01-13 Richard Biener <rguenther@suse.de>
51523 * config/aarch64/aarch64-elf-raw.h (ENDFILE_SPEC): Don't add
51524 crtfastmath.o for -shared.
51525 * config/aarch64/aarch64-freebsd.h (GNU_USER_TARGET_MATHFILE_SPEC):
51527 * config/aarch64/aarch64-linux.h (GNU_USER_TARGET_MATHFILE_SPEC):
51530 2023-01-13 Richard Sandiford <richard.sandiford@arm.com>
51532 * config/aarch64/aarch64.cc (aarch64_dwarf_frame_reg_mode): New
51534 (TARGET_DWARF_FRAME_REG_MODE): Define.
51536 2023-01-13 Richard Biener <rguenther@suse.de>
51539 * config/aarch64/aarch64.cc (aarch64_gimple_fold_builtin): Don't
51540 update EH info on the fly.
51542 2023-01-13 Richard Biener <rguenther@suse.de>
51544 PR tree-optimization/108387
51545 * tree-ssa-sccvn.cc (visit_nary_op): Check for SSA_NAME
51546 value before inserting expression into the tables.
51548 2023-01-12 Andrew Pinski <apinski@marvell.com>
51549 Roger Sayle <roger@nextmovesoftware.com>
51551 PR tree-optimization/92342
51552 * match.pd ((m1 CMP m2) * d -> (m1 CMP m2) ? d : 0):
51553 Use tcc_comparison and :c for the multiply.
51554 (b & -(a CMP c) -> (a CMP c)?b:0): New pattern.
51556 2023-01-12 Christophe Lyon <christophe.lyon@arm.com>
51557 Richard Sandiford <richard.sandiford@arm.com>
51560 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment):
51561 Check DECL_PACKED for bitfield.
51562 (aarch64_layout_arg): Warn when parameter passing ABI changes.
51563 (aarch64_function_arg_boundary): Do not warn here.
51564 (aarch64_gimplify_va_arg_expr): Warn when parameter passing ABI
51567 2023-01-12 Christophe Lyon <christophe.lyon@arm.com>
51568 Richard Sandiford <richard.sandiford@arm.com>
51570 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Fix
51572 (aarch64_layout_arg): Factorize warning conditions.
51573 (aarch64_function_arg_boundary): Fix typo.
51574 * function.cc (currently_expanding_function_start): New variable.
51575 (expand_function_start): Handle
51576 currently_expanding_function_start.
51577 * function.h (currently_expanding_function_start): Declare.
51579 2023-01-12 Richard Biener <rguenther@suse.de>
51581 PR tree-optimization/99412
51582 * tree-ssa-reassoc.cc (is_phi_for_stmt): Remove.
51583 (swap_ops_for_binary_stmt): Remove reduction handling.
51584 (rewrite_expr_tree_parallel): Adjust.
51585 (reassociate_bb): Likewise.
51586 * tree-parloops.cc (build_new_reduction): Handle MINUS_EXPR.
51588 2023-01-12 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
51590 * config/xtensa/xtensa.md (ctzsi2, ffssi2):
51591 Rearrange the emitting codes.
51593 2023-01-12 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
51595 * config/xtensa/xtensa.md (*btrue):
51596 Correct value of the attribute "length" that depends on
51597 TARGET_DENSITY and operands, and add '?' character to the register
51598 constraint of the compared operand.
51600 2023-01-12 Alexandre Oliva <oliva@adacore.com>
51602 * hash-table.h (expand): Check elements and deleted counts.
51603 (verify): Likewise.
51605 2023-01-11 Roger Sayle <roger@nextmovesoftware.com>
51607 PR tree-optimization/71343
51608 * tree-ssa-sccvn.cc (visit_nary_op) <case LSHIFT_EXPR>: Make
51609 the value number of the expression X << C the same as the value
51610 number for the multiplication X * (1<<C).
51612 2023-01-11 David Faust <david.faust@oracle.com>
51615 * config/bpf/bpf.cc (bpf_print_operand): Correct handling for
51616 floating point modes.
51618 2023-01-11 Eric Botcazou <ebotcazou@adacore.com>
51620 PR tree-optimization/108199
51621 * tree-sra.cc (sra_modify_expr): Deal with reverse storage order
51622 for bit-field references.
51624 2023-01-11 Kewen Lin <linkw@linux.ibm.com>
51626 * config/rs6000/rs6000.cc (rs6000_option_override_internal): Make
51627 OPTION_MASK_P10_FUSION implicit setting honour Power10 tuning setting.
51628 * config/rs6000/rs6000-cpus.def (ISA_3_1_MASKS_SERVER): Remove
51629 OPTION_MASK_P10_FUSION.
51631 2023-01-11 Richard Biener <rguenther@suse.de>
51633 PR tree-optimization/107767
51634 * tree-cfgcleanup.cc (phi_alternatives_equal): Export.
51635 * tree-cfgcleanup.h (phi_alternatives_equal): Declare.
51636 * tree-switch-conversion.cc (switch_conversion::collect):
51637 Count unique non-default targets accounting for later
51638 merging opportunities.
51640 2023-01-11 Martin Liska <mliska@suse.cz>
51642 PR middle-end/107976
51643 * params.opt: Limit JT params.
51644 * stmt.cc (emit_case_dispatch_table): Use auto_vec.
51646 2023-01-11 Richard Biener <rguenther@suse.de>
51648 PR tree-optimization/108352
51649 * tree-ssa-threadbackward.cc
51650 (back_threader_profitability::profitable_path_p): Adjust
51651 heuristic that allows non-multi-way branch threads creating
51653 * doc/invoke.texi (--param fsm-scale-path-blocks): Remove.
51654 (--param fsm-scale-path-stmts): Adjust.
51655 * params.opt (--param=fsm-scale-path-blocks=): Remove.
51656 (-param=fsm-scale-path-stmts=): Adjust description.
51658 2023-01-11 Richard Biener <rguenther@suse.de>
51660 PR tree-optimization/108353
51661 * tree-ssa-propagate.cc (cfg_blocks_back, ssa_edge_worklist_back):
51663 (add_ssa_edge): Simplify.
51664 (add_control_edge): Likewise.
51665 (ssa_prop_init): Likewise.
51666 (ssa_prop_fini): Likewise.
51667 (ssa_propagation_engine::ssa_propagate): Likewise.
51669 2023-01-11 Andreas Krebbel <krebbel@linux.ibm.com>
51671 * config/s390/s390.md (*not<mode>): New pattern.
51673 2023-01-11 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
51675 * config/xtensa/xtensa.cc (xtensa_insn_cost):
51676 Let insn cost for size be obtained by applying COSTS_N_INSNS()
51677 to instruction length and then dividing by 3.
51679 2023-01-10 Richard Biener <rguenther@suse.de>
51681 PR tree-optimization/106293
51682 * tree-ssa-dse.cc (dse_classify_store): Use a worklist to
51683 process degenerate PHI defs.
51685 2023-01-10 Roger Sayle <roger@nextmovesoftware.com>
51687 PR rtl-optimization/106421
51688 * cprop.cc (bypass_block): Check that DEST is local to this
51689 function (non-NULL) before calling find_edge.
51691 2023-01-10 Martin Jambor <mjambor@suse.cz>
51694 * ipa-param-manipulation.h (ipa_param_body_adjustments): New members
51695 sort_replacements, lookup_first_base_replacement and
51696 m_sorted_replacements_p.
51697 * ipa-param-manipulation.cc: Define INCLUDE_ALGORITHM.
51698 (ipa_param_body_adjustments::register_replacement): Set
51699 m_sorted_replacements_p to false.
51700 (compare_param_body_replacement): New function.
51701 (ipa_param_body_adjustments::sort_replacements): Likewise.
51702 (ipa_param_body_adjustments::common_initialization): Call
51704 (ipa_param_body_adjustments::ipa_param_body_adjustments): Initialize
51705 m_sorted_replacements_p.
51706 (ipa_param_body_adjustments::lookup_replacement_1): Rework to use
51708 (ipa_param_body_adjustments::lookup_first_base_replacement): New
51710 (ipa_param_body_adjustments::modify_call_stmt): Use
51711 lookup_first_base_replacement.
51712 * omp-simd-clone.cc (ipa_simd_modify_function_body): Call
51713 adjustments->sort_replacements.
51715 2023-01-10 Richard Biener <rguenther@suse.de>
51717 PR tree-optimization/108314
51718 * tree-vect-stmts.cc (vectorizable_condition): Do not
51719 perform BIT_NOT_EXPR optimization for EXTRACT_LAST_REDUCTION.
51721 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
51723 * config/csky/csky-linux-elf.h (SYSROOT_SUFFIX_SPEC): New.
51725 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
51727 * config/csky/csky.h (MULTILIB_DEFAULTS): Fix float abi option.
51729 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
51731 * config/csky/csky.cc (csky_cpu_cpp_builtins): Add builtin
51732 defines for soft float abi.
51734 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
51736 * config/csky/csky.md (smart_bseti): Change condition to CSKY_ISA_FEATURE (E1).
51737 (smart_bclri): Likewise.
51738 (fast_bseti): Change condition to CSKY_ISA_FEATURE (E2).
51739 (fast_bclri): Likewise.
51740 (fast_cmpnesi_i): Likewise.
51741 (*fast_cmpltsi_i): Likewise.
51742 (*fast_cmpgeusi_i): Likewise.
51744 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
51746 * config/csky/csky_insn_fpuv3.md (l<frm_pattern><fixsuop><mode>si2): Test
51747 flag_fp_int_builtin_inexact || !flag_trapping_math.
51748 (<frm_pattern><mode>2): Likewise.
51750 2023-01-10 Andreas Krebbel <krebbel@linux.ibm.com>
51752 * config/s390/s390.cc (s390_register_info): Check call_used_regs
51753 instead of hard-coding the register numbers for call saved
51755 (s390_optimize_register_info): Likewise.
51757 2023-01-09 Eric Botcazou <ebotcazou@adacore.com>
51759 * doc/gm2.texi (Overview): Fix @node markers.
51760 (Using): Likewise. Remove subsections that were moved to Overview
51761 from the menu and move others around.
51763 2023-01-09 Richard Biener <rguenther@suse.de>
51765 PR middle-end/108209
51766 * genmatch.cc (commutative_op): Fix return value for
51767 user-id with non-commutative first replacement.
51769 2023-01-09 Jakub Jelinek <jakub@redhat.com>
51772 * calls.cc (expand_call): For calls with
51773 TYPE_NO_NAMED_ARGS_STDARG_P (funtype) use zero for n_named_args.
51776 2023-01-09 Richard Biener <rguenther@suse.de>
51778 PR middle-end/69482
51779 * cfgexpand.cc (discover_nonconstant_array_refs_r): Volatile
51780 qualified accesses also force objects to memory.
51782 2023-01-09 Martin Liska <mliska@suse.cz>
51785 * lto-cgraph.cc (compute_ltrans_boundary): Do not insert
51786 NULL (deleleted value) to a hash_set.
51788 2023-01-08 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
51790 * config/xtensa/xtensa.md (*splice_bits):
51791 New insn_and_split pattern.
51793 2023-01-07 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
51795 * config/xtensa/xtensa.cc
51796 (xtensa_split_imm_two_addends, xtensa_emit_add_imm):
51797 New helper functions.
51798 (xtensa_set_return_address, xtensa_output_mi_thunk):
51799 Change to use the helper function.
51800 (xtensa_emit_adjust_stack_ptr): Ditto.
51801 And also change to try reusing the content of scratch register
51802 A9 if the register is not modified in the function body.
51804 2023-01-07 LIU Hao <lh_mouse@126.com>
51806 PR middle-end/108300
51807 * config/xtensa/xtensa-dynconfig.c: Define `WIN32_LEAN_AND_MEAN`
51808 before <windows.h>.
51809 * diagnostic-color.cc: Likewise.
51810 * plugin.cc: Likewise.
51811 * prefix.cc: Likewise.
51813 2023-01-06 Joseph Myers <joseph@codesourcery.com>
51815 * doc/extend.texi (__builtin_tgmath): Do not restate standard rule
51816 for handling real integer types.
51818 2023-01-06 Tamar Christina <tamar.christina@arm.com>
51821 2022-12-12 Tamar Christina <tamar.christina@arm.com>
51823 * config/aarch64/aarch64-simd.md (*aarch64_simd_movv2hf): New.
51824 (mov<mode>, movmisalign<mode>, aarch64_dup_lane<mode>,
51825 aarch64_store_lane0<mode>, aarch64_simd_vec_set<mode>,
51826 @aarch64_simd_vec_copy_lane<mode>, vec_set<mode>,
51827 reduc_<optab>_scal_<mode>, reduc_<fmaxmin>_scal_<mode>,
51828 aarch64_reduc_<optab>_internal<mode>, aarch64_get_lane<mode>,
51829 vec_init<mode><Vel>, vec_extract<mode><Vel>): Support V2HF.
51830 (aarch64_simd_dupv2hf): New.
51831 * config/aarch64/aarch64.cc (aarch64_classify_vector_mode):
51833 * config/aarch64/iterators.md (VHSDF_P): New.
51834 (V2F, VMOVE, nunits, Vtype, Vmtype, Vetype, stype, VEL,
51835 Vel, q, vp): Add V2HF.
51836 * config/arm/types.md (neon_fp_reduc_add_h): New.
51838 2023-01-06 Martin Liska <mliska@suse.cz>
51840 PR middle-end/107966
51841 * doc/options.texi: Fix Var documentation in internal manual.
51843 2023-01-05 Roger Sayle <roger@nextmovesoftware.com>
51846 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
51848 * config/i386/i386-expand.cc (ix86_expand_int_movcc): Rewrite
51849 RTL expansion to allow condition (mask) to be shared/reused,
51850 by avoiding overwriting pseudos and adding REG_EQUAL notes.
51852 2023-01-05 Iain Sandoe <iain@sandoe.co.uk>
51854 * common.opt: Add -static-libgm2.
51855 * config/darwin.h (LINK_SPEC): Handle static-libgm2.
51856 * doc/gm2.texi: Document static-libgm2.
51857 * gcc.cc (driver_handle_option): Allow static-libgm2.
51859 2023-01-05 Tejas Joshi <TejasSanjay.Joshi@amd.com>
51861 * common/config/i386/i386-common.cc (processor_alias_table):
51862 Use CPU_ZNVER4 for znver4.
51863 * config/i386/i386.md: Add znver4.md.
51864 * config/i386/znver4.md: New.
51866 2023-01-04 Jakub Jelinek <jakub@redhat.com>
51868 PR tree-optimization/108253
51869 * tree-vrp.cc (maybe_set_nonzero_bits): Handle var with pointer
51872 2023-01-04 Jakub Jelinek <jakub@redhat.com>
51874 PR middle-end/108237
51875 * generic-match-head.cc: Include tree-pass.h.
51876 (canonicalize_math_p, optimize_vectors_before_lowering_p): Define
51877 to false if cfun and cfun->curr_properties has PROP_gimple_opt_math
51878 resp. PROP_gimple_lvec property set.
51880 2023-01-04 Jakub Jelinek <jakub@redhat.com>
51882 PR sanitizer/108256
51883 * convert.cc (do_narrow): Punt for MULT_EXPR if original
51884 type doesn't wrap around and -fsanitize=signed-integer-overflow
51886 * fold-const.cc (fold_unary_loc) <CASE_CONVERT>: Likewise.
51888 2023-01-04 Hu, Lin1 <lin1.hu@intel.com>
51890 * common/config/i386/cpuinfo.h (get_intel_cpu): Handle Emeraldrapids.
51891 * common/config/i386/i386-common.cc: Add Emeraldrapids.
51893 2023-01-04 Hu, Lin1 <lin1.hu@intel.com>
51895 * common/config/i386/cpuinfo.h (get_intel_cpu): Remove case 0xb5
51898 2023-01-03 Sandra Loosemore <sandra@codesourcery.com>
51900 * cgraph.h (struct cgraph_node): Add gc_candidate bit, modify
51901 default constructor to initialize it.
51902 * cgraphunit.cc (expand_all_functions): Save gc_candidate functions
51903 for last and iterate to handle recursive calls. Delete leftover
51904 candidates at the end.
51905 * omp-simd-clone.cc (simd_clone_create): Set gc_candidate bit
51907 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Clear
51908 gc_candidate bit when a clone is used.
51910 2023-01-03 Florian Weimer <fweimer@redhat.com>
51913 2023-01-02 Florian Weimer <fweimer@redhat.com>
51915 * dwarf2cfi.cc (init_return_column_size): Remove.
51916 (init_one_dwarf_reg_size): Adjust.
51917 (generate_dwarf_reg_sizes): New function. Extracted
51918 from expand_builtin_init_dwarf_reg_sizes.
51919 (expand_builtin_init_dwarf_reg_sizes): Call
51920 generate_dwarf_reg_sizes.
51921 * target.def (init_dwarf_reg_sizes_extra): Adjust
51923 * config/msp430/msp430.cc
51924 (msp430_init_dwarf_reg_sizes_extra): Adjust.
51925 * config/rs6000/rs6000.cc
51926 (rs6000_init_dwarf_reg_sizes_extra): Likewise.
51927 * doc/tm.texi: Update.
51929 2023-01-03 Florian Weimer <fweimer@redhat.com>
51932 2023-01-02 Florian Weimer <fweimer@redhat.com>
51934 * debug.h (dwarf_reg_sizes_constant): Declare.
51935 * dwarf2cfi.cc (dwarf_reg_sizes_constant): New function.
51937 2023-01-03 Siddhesh Poyarekar <siddhesh@gotplt.org>
51939 PR tree-optimization/105043
51940 * doc/extend.texi (Object Size Checking): Split out into two
51941 subsections and mention _FORTIFY_SOURCE.
51943 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
51945 * config/i386/i386-expand.cc (ix86_expand_int_movcc): Rewrite
51946 RTL expansion to allow condition (mask) to be shared/reused,
51947 by avoiding overwriting pseudos and adding REG_EQUAL notes.
51949 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
51952 * config/i386/i386-features.cc
51953 (general_scalar_chain::compute_convert_gain) <case PLUS>: Consider
51954 the gain/cost of converting a MEM operand.
51956 2023-01-03 Jakub Jelinek <jakub@redhat.com>
51958 PR middle-end/108264
51959 * expr.cc (store_expr): For stores into SUBREG_PROMOTED_* targets
51960 from source which doesn't have scalar integral mode first convert
51963 2023-01-03 Jakub Jelinek <jakub@redhat.com>
51965 PR rtl-optimization/108263
51966 * cfgrtl.cc (fixup_reorder_chain): Avoid trying to redirect
51969 2023-01-02 Alexander Monakov <amonakov@ispras.ru>
51972 * config/i386/lujiazui.md (lujiazui_div): New automaton.
51973 (lua_div): New unit.
51974 (lua_idiv_qi): Correct unit in the reservation.
51975 (lua_idiv_qi_load): Ditto.
51976 (lua_idiv_hi): Ditto.
51977 (lua_idiv_hi_load): Ditto.
51978 (lua_idiv_si): Ditto.
51979 (lua_idiv_si_load): Ditto.
51980 (lua_idiv_di): Ditto.
51981 (lua_idiv_di_load): Ditto.
51982 (lua_fdiv_SF): Ditto.
51983 (lua_fdiv_SF_load): Ditto.
51984 (lua_fdiv_DF): Ditto.
51985 (lua_fdiv_DF_load): Ditto.
51986 (lua_fdiv_XF): Ditto.
51987 (lua_fdiv_XF_load): Ditto.
51988 (lua_ssediv_SF): Ditto.
51989 (lua_ssediv_load_SF): Ditto.
51990 (lua_ssediv_V4SF): Ditto.
51991 (lua_ssediv_load_V4SF): Ditto.
51992 (lua_ssediv_V8SF): Ditto.
51993 (lua_ssediv_load_V8SF): Ditto.
51994 (lua_ssediv_SD): Ditto.
51995 (lua_ssediv_load_SD): Ditto.
51996 (lua_ssediv_V2DF): Ditto.
51997 (lua_ssediv_load_V2DF): Ditto.
51998 (lua_ssediv_V4DF): Ditto.
51999 (lua_ssediv_load_V4DF): Ditto.
52001 2023-01-02 Florian Weimer <fweimer@redhat.com>
52003 * debug.h (dwarf_reg_sizes_constant): Declare.
52004 * dwarf2cfi.cc (dwarf_reg_sizes_constant): New function.
52006 2023-01-02 Florian Weimer <fweimer@redhat.com>
52008 * dwarf2cfi.cc (init_return_column_size): Remove.
52009 (init_one_dwarf_reg_size): Adjust.
52010 (generate_dwarf_reg_sizes): New function. Extracted
52011 from expand_builtin_init_dwarf_reg_sizes.
52012 (expand_builtin_init_dwarf_reg_sizes): Call
52013 generate_dwarf_reg_sizes.
52014 * target.def (init_dwarf_reg_sizes_extra): Adjust
52016 * config/msp430/msp430.cc
52017 (msp430_init_dwarf_reg_sizes_extra): Adjust.
52018 * config/rs6000/rs6000.cc
52019 (rs6000_init_dwarf_reg_sizes_extra): Likewise.
52020 * doc/tm.texi: Update.
52022 2023-01-02 Jakub Jelinek <jakub@redhat.com>
52024 * gcc.cc (process_command): Update copyright notice dates.
52025 * gcov-dump.cc (print_version): Ditto.
52026 * gcov.cc (print_version): Ditto.
52027 * gcov-tool.cc (print_version): Ditto.
52028 * gengtype.cc (create_file): Ditto.
52029 * doc/cpp.texi: Bump @copying's copyright year.
52030 * doc/cppinternals.texi: Ditto.
52031 * doc/gcc.texi: Ditto.
52032 * doc/gccint.texi: Ditto.
52033 * doc/gcov.texi: Ditto.
52034 * doc/install.texi: Ditto.
52035 * doc/invoke.texi: Ditto.
52037 2023-01-01 Roger Sayle <roger@nextmovesoftware.com>
52038 Uroš Bizjak <ubizjak@gmail.com>
52040 * config/i386/i386.md (extendditi2): New define_insn.
52041 (define_split): Use DWIH mode iterator to treat new extendditi2
52042 identically to existing extendsidi2_1.
52043 (define_peephole2): Likewise.
52044 (define_peephole2): Likewise.
52045 (define_Split): Likewise.
52048 Copyright (C) 2023 Free Software Foundation, Inc.
52050 Copying and distribution of this file, with or without modification,
52051 are permitted in any medium without royalty provided the copyright
52052 notice and this notice are preserved.