Daily bump.
[official-gcc.git] / gcc / resource.c
blob5b19fe45450ccef6a7dc5bb0f44f438b68dcf184
1 /* Definitions for computing resource usage of specific insns.
2 Copyright (C) 1999, 2000, 2001 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 2, or (at your option) any later
9 version.
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING. If not, write to the Free
18 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
19 02111-1307, USA. */
21 #include "config.h"
22 #include "system.h"
23 #include "toplev.h"
24 #include "rtl.h"
25 #include "tm_p.h"
26 #include "hard-reg-set.h"
27 #include "basic-block.h"
28 #include "function.h"
29 #include "regs.h"
30 #include "flags.h"
31 #include "output.h"
32 #include "resource.h"
33 #include "except.h"
34 #include "insn-attr.h"
35 #include "params.h"
37 /* This structure is used to record liveness information at the targets or
38 fallthrough insns of branches. We will most likely need the information
39 at targets again, so save them in a hash table rather than recomputing them
40 each time. */
42 struct target_info
44 int uid; /* INSN_UID of target. */
45 struct target_info *next; /* Next info for same hash bucket. */
46 HARD_REG_SET live_regs; /* Registers live at target. */
47 int block; /* Basic block number containing target. */
48 int bb_tick; /* Generation count of basic block info. */
51 #define TARGET_HASH_PRIME 257
53 /* Indicates what resources are required at the beginning of the epilogue. */
54 static struct resources start_of_epilogue_needs;
56 /* Indicates what resources are required at function end. */
57 static struct resources end_of_function_needs;
59 /* Define the hash table itself. */
60 static struct target_info **target_hash_table = NULL;
62 /* For each basic block, we maintain a generation number of its basic
63 block info, which is updated each time we move an insn from the
64 target of a jump. This is the generation number indexed by block
65 number. */
67 static int *bb_ticks;
69 /* Marks registers possibly live at the current place being scanned by
70 mark_target_live_regs. Also used by update_live_status. */
72 static HARD_REG_SET current_live_regs;
74 /* Marks registers for which we have seen a REG_DEAD note but no assignment.
75 Also only used by the next two functions. */
77 static HARD_REG_SET pending_dead_regs;
79 static void update_live_status PARAMS ((rtx, rtx, void *));
80 static int find_basic_block PARAMS ((rtx, int));
81 static rtx next_insn_no_annul PARAMS ((rtx));
82 static rtx find_dead_or_set_registers PARAMS ((rtx, struct resources*,
83 rtx*, int, struct resources,
84 struct resources));
86 /* Utility function called from mark_target_live_regs via note_stores.
87 It deadens any CLOBBERed registers and livens any SET registers. */
89 static void
90 update_live_status (dest, x, data)
91 rtx dest;
92 rtx x;
93 void *data ATTRIBUTE_UNUSED;
95 int first_regno, last_regno;
96 int i;
98 if (GET_CODE (dest) != REG
99 && (GET_CODE (dest) != SUBREG || GET_CODE (SUBREG_REG (dest)) != REG))
100 return;
102 if (GET_CODE (dest) == SUBREG)
103 first_regno = subreg_regno (dest);
104 else
105 first_regno = REGNO (dest);
107 last_regno = first_regno + HARD_REGNO_NREGS (first_regno, GET_MODE (dest));
109 if (GET_CODE (x) == CLOBBER)
110 for (i = first_regno; i < last_regno; i++)
111 CLEAR_HARD_REG_BIT (current_live_regs, i);
112 else
113 for (i = first_regno; i < last_regno; i++)
115 SET_HARD_REG_BIT (current_live_regs, i);
116 CLEAR_HARD_REG_BIT (pending_dead_regs, i);
120 /* Find the number of the basic block with correct live register
121 information that starts closest to INSN. Return -1 if we couldn't
122 find such a basic block or the beginning is more than
123 SEARCH_LIMIT instructions before INSN. Use SEARCH_LIMIT = -1 for
124 an unlimited search.
126 The delay slot filling code destroys the control-flow graph so,
127 instead of finding the basic block containing INSN, we search
128 backwards toward a BARRIER where the live register information is
129 correct. */
131 static int
132 find_basic_block (insn, search_limit)
133 rtx insn;
134 int search_limit;
136 int i;
138 /* Scan backwards to the previous BARRIER. Then see if we can find a
139 label that starts a basic block. Return the basic block number. */
140 for (insn = prev_nonnote_insn (insn);
141 insn && GET_CODE (insn) != BARRIER && search_limit != 0;
142 insn = prev_nonnote_insn (insn), --search_limit)
145 /* The closest BARRIER is too far away. */
146 if (search_limit == 0)
147 return -1;
149 /* The start of the function is basic block zero. */
150 else if (insn == 0)
151 return 0;
153 /* See if any of the upcoming CODE_LABELs start a basic block. If we reach
154 anything other than a CODE_LABEL or note, we can't find this code. */
155 for (insn = next_nonnote_insn (insn);
156 insn && GET_CODE (insn) == CODE_LABEL;
157 insn = next_nonnote_insn (insn))
159 for (i = 0; i < n_basic_blocks; i++)
160 if (insn == BLOCK_HEAD (i))
161 return i;
164 return -1;
167 /* Similar to next_insn, but ignores insns in the delay slots of
168 an annulled branch. */
170 static rtx
171 next_insn_no_annul (insn)
172 rtx insn;
174 if (insn)
176 /* If INSN is an annulled branch, skip any insns from the target
177 of the branch. */
178 if (INSN_ANNULLED_BRANCH_P (insn)
179 && NEXT_INSN (PREV_INSN (insn)) != insn)
180 while (INSN_FROM_TARGET_P (NEXT_INSN (insn)))
181 insn = NEXT_INSN (insn);
183 insn = NEXT_INSN (insn);
184 if (insn && GET_CODE (insn) == INSN
185 && GET_CODE (PATTERN (insn)) == SEQUENCE)
186 insn = XVECEXP (PATTERN (insn), 0, 0);
189 return insn;
192 /* Given X, some rtl, and RES, a pointer to a `struct resource', mark
193 which resources are referenced by the insn. If INCLUDE_DELAYED_EFFECTS
194 is TRUE, resources used by the called routine will be included for
195 CALL_INSNs. */
197 void
198 mark_referenced_resources (x, res, include_delayed_effects)
199 rtx x;
200 struct resources *res;
201 int include_delayed_effects;
203 enum rtx_code code = GET_CODE (x);
204 int i, j;
205 unsigned int r;
206 const char *format_ptr;
208 /* Handle leaf items for which we set resource flags. Also, special-case
209 CALL, SET and CLOBBER operators. */
210 switch (code)
212 case CONST:
213 case CONST_INT:
214 case CONST_DOUBLE:
215 case PC:
216 case SYMBOL_REF:
217 case LABEL_REF:
218 return;
220 case SUBREG:
221 if (GET_CODE (SUBREG_REG (x)) != REG)
222 mark_referenced_resources (SUBREG_REG (x), res, 0);
223 else
225 unsigned int regno = subreg_regno (x);
226 unsigned int last_regno
227 = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
229 if (last_regno > FIRST_PSEUDO_REGISTER)
230 abort ();
231 for (r = regno; r < last_regno; r++)
232 SET_HARD_REG_BIT (res->regs, r);
234 return;
236 case REG:
238 unsigned int regno = REGNO (x);
239 unsigned int last_regno
240 = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
242 if (last_regno > FIRST_PSEUDO_REGISTER)
243 abort ();
244 for (r = regno; r < last_regno; r++)
245 SET_HARD_REG_BIT (res->regs, r);
247 return;
249 case MEM:
250 /* If this memory shouldn't change, it really isn't referencing
251 memory. */
252 if (RTX_UNCHANGING_P (x))
253 res->unch_memory = 1;
254 else
255 res->memory = 1;
256 res->volatil |= MEM_VOLATILE_P (x);
258 /* Mark registers used to access memory. */
259 mark_referenced_resources (XEXP (x, 0), res, 0);
260 return;
262 case CC0:
263 res->cc = 1;
264 return;
266 case UNSPEC_VOLATILE:
267 case ASM_INPUT:
268 /* Traditional asm's are always volatile. */
269 res->volatil = 1;
270 return;
272 case TRAP_IF:
273 res->volatil = 1;
274 break;
276 case ASM_OPERANDS:
277 res->volatil |= MEM_VOLATILE_P (x);
279 /* For all ASM_OPERANDS, we must traverse the vector of input operands.
280 We can not just fall through here since then we would be confused
281 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
282 traditional asms unlike their normal usage. */
284 for (i = 0; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
285 mark_referenced_resources (ASM_OPERANDS_INPUT (x, i), res, 0);
286 return;
288 case CALL:
289 /* The first operand will be a (MEM (xxx)) but doesn't really reference
290 memory. The second operand may be referenced, though. */
291 mark_referenced_resources (XEXP (XEXP (x, 0), 0), res, 0);
292 mark_referenced_resources (XEXP (x, 1), res, 0);
293 return;
295 case SET:
296 /* Usually, the first operand of SET is set, not referenced. But
297 registers used to access memory are referenced. SET_DEST is
298 also referenced if it is a ZERO_EXTRACT or SIGN_EXTRACT. */
300 mark_referenced_resources (SET_SRC (x), res, 0);
302 x = SET_DEST (x);
303 if (GET_CODE (x) == SIGN_EXTRACT
304 || GET_CODE (x) == ZERO_EXTRACT
305 || GET_CODE (x) == STRICT_LOW_PART)
306 mark_referenced_resources (x, res, 0);
307 else if (GET_CODE (x) == SUBREG)
308 x = SUBREG_REG (x);
309 if (GET_CODE (x) == MEM)
310 mark_referenced_resources (XEXP (x, 0), res, 0);
311 return;
313 case CLOBBER:
314 return;
316 case CALL_INSN:
317 if (include_delayed_effects)
319 /* A CALL references memory, the frame pointer if it exists, the
320 stack pointer, any global registers and any registers given in
321 USE insns immediately in front of the CALL.
323 However, we may have moved some of the parameter loading insns
324 into the delay slot of this CALL. If so, the USE's for them
325 don't count and should be skipped. */
326 rtx insn = PREV_INSN (x);
327 rtx sequence = 0;
328 int seq_size = 0;
329 int i;
331 /* If we are part of a delay slot sequence, point at the SEQUENCE. */
332 if (NEXT_INSN (insn) != x)
334 sequence = PATTERN (NEXT_INSN (insn));
335 seq_size = XVECLEN (sequence, 0);
336 if (GET_CODE (sequence) != SEQUENCE)
337 abort ();
340 res->memory = 1;
341 SET_HARD_REG_BIT (res->regs, STACK_POINTER_REGNUM);
342 if (frame_pointer_needed)
344 SET_HARD_REG_BIT (res->regs, FRAME_POINTER_REGNUM);
345 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
346 SET_HARD_REG_BIT (res->regs, HARD_FRAME_POINTER_REGNUM);
347 #endif
350 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
351 if (global_regs[i])
352 SET_HARD_REG_BIT (res->regs, i);
354 /* Check for a REG_SETJMP. If it exists, then we must
355 assume that this call can need any register.
357 This is done to be more conservative about how we handle setjmp.
358 We assume that they both use and set all registers. Using all
359 registers ensures that a register will not be considered dead
360 just because it crosses a setjmp call. A register should be
361 considered dead only if the setjmp call returns non-zero. */
362 if (find_reg_note (x, REG_SETJMP, NULL))
363 SET_HARD_REG_SET (res->regs);
366 rtx link;
368 for (link = CALL_INSN_FUNCTION_USAGE (x);
369 link;
370 link = XEXP (link, 1))
371 if (GET_CODE (XEXP (link, 0)) == USE)
373 for (i = 1; i < seq_size; i++)
375 rtx slot_pat = PATTERN (XVECEXP (sequence, 0, i));
376 if (GET_CODE (slot_pat) == SET
377 && rtx_equal_p (SET_DEST (slot_pat),
378 XEXP (XEXP (link, 0), 0)))
379 break;
381 if (i >= seq_size)
382 mark_referenced_resources (XEXP (XEXP (link, 0), 0),
383 res, 0);
388 /* ... fall through to other INSN processing ... */
390 case INSN:
391 case JUMP_INSN:
393 #ifdef INSN_REFERENCES_ARE_DELAYED
394 if (! include_delayed_effects
395 && INSN_REFERENCES_ARE_DELAYED (x))
396 return;
397 #endif
399 /* No special processing, just speed up. */
400 mark_referenced_resources (PATTERN (x), res, include_delayed_effects);
401 return;
403 default:
404 break;
407 /* Process each sub-expression and flag what it needs. */
408 format_ptr = GET_RTX_FORMAT (code);
409 for (i = 0; i < GET_RTX_LENGTH (code); i++)
410 switch (*format_ptr++)
412 case 'e':
413 mark_referenced_resources (XEXP (x, i), res, include_delayed_effects);
414 break;
416 case 'E':
417 for (j = 0; j < XVECLEN (x, i); j++)
418 mark_referenced_resources (XVECEXP (x, i, j), res,
419 include_delayed_effects);
420 break;
424 /* A subroutine of mark_target_live_regs. Search forward from TARGET
425 looking for registers that are set before they are used. These are dead.
426 Stop after passing a few conditional jumps, and/or a small
427 number of unconditional branches. */
429 static rtx
430 find_dead_or_set_registers (target, res, jump_target, jump_count, set, needed)
431 rtx target;
432 struct resources *res;
433 rtx *jump_target;
434 int jump_count;
435 struct resources set, needed;
437 HARD_REG_SET scratch;
438 rtx insn, next;
439 rtx jump_insn = 0;
440 int i;
442 for (insn = target; insn; insn = next)
444 rtx this_jump_insn = insn;
446 next = NEXT_INSN (insn);
448 /* If this instruction can throw an exception, then we don't
449 know where we might end up next. That means that we have to
450 assume that whatever we have already marked as live really is
451 live. */
452 if (can_throw_internal (insn))
453 break;
455 switch (GET_CODE (insn))
457 case CODE_LABEL:
458 /* After a label, any pending dead registers that weren't yet
459 used can be made dead. */
460 AND_COMPL_HARD_REG_SET (pending_dead_regs, needed.regs);
461 AND_COMPL_HARD_REG_SET (res->regs, pending_dead_regs);
462 CLEAR_HARD_REG_SET (pending_dead_regs);
464 continue;
466 case BARRIER:
467 case NOTE:
468 continue;
470 case INSN:
471 if (GET_CODE (PATTERN (insn)) == USE)
473 /* If INSN is a USE made by update_block, we care about the
474 underlying insn. Any registers set by the underlying insn
475 are live since the insn is being done somewhere else. */
476 if (INSN_P (XEXP (PATTERN (insn), 0)))
477 mark_set_resources (XEXP (PATTERN (insn), 0), res, 0,
478 MARK_SRC_DEST_CALL);
480 /* All other USE insns are to be ignored. */
481 continue;
483 else if (GET_CODE (PATTERN (insn)) == CLOBBER)
484 continue;
485 else if (GET_CODE (PATTERN (insn)) == SEQUENCE)
487 /* An unconditional jump can be used to fill the delay slot
488 of a call, so search for a JUMP_INSN in any position. */
489 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
491 this_jump_insn = XVECEXP (PATTERN (insn), 0, i);
492 if (GET_CODE (this_jump_insn) == JUMP_INSN)
493 break;
497 default:
498 break;
501 if (GET_CODE (this_jump_insn) == JUMP_INSN)
503 if (jump_count++ < 10)
505 if (any_uncondjump_p (this_jump_insn)
506 || GET_CODE (PATTERN (this_jump_insn)) == RETURN)
508 next = JUMP_LABEL (this_jump_insn);
509 if (jump_insn == 0)
511 jump_insn = insn;
512 if (jump_target)
513 *jump_target = JUMP_LABEL (this_jump_insn);
516 else if (any_condjump_p (this_jump_insn))
518 struct resources target_set, target_res;
519 struct resources fallthrough_res;
521 /* We can handle conditional branches here by following
522 both paths, and then IOR the results of the two paths
523 together, which will give us registers that are dead
524 on both paths. Since this is expensive, we give it
525 a much higher cost than unconditional branches. The
526 cost was chosen so that we will follow at most 1
527 conditional branch. */
529 jump_count += 4;
530 if (jump_count >= 10)
531 break;
533 mark_referenced_resources (insn, &needed, 1);
535 /* For an annulled branch, mark_set_resources ignores slots
536 filled by instructions from the target. This is correct
537 if the branch is not taken. Since we are following both
538 paths from the branch, we must also compute correct info
539 if the branch is taken. We do this by inverting all of
540 the INSN_FROM_TARGET_P bits, calling mark_set_resources,
541 and then inverting the INSN_FROM_TARGET_P bits again. */
543 if (GET_CODE (PATTERN (insn)) == SEQUENCE
544 && INSN_ANNULLED_BRANCH_P (this_jump_insn))
546 for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
547 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i))
548 = ! INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i));
550 target_set = set;
551 mark_set_resources (insn, &target_set, 0,
552 MARK_SRC_DEST_CALL);
554 for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
555 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i))
556 = ! INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i));
558 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
560 else
562 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
563 target_set = set;
566 target_res = *res;
567 COPY_HARD_REG_SET (scratch, target_set.regs);
568 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
569 AND_COMPL_HARD_REG_SET (target_res.regs, scratch);
571 fallthrough_res = *res;
572 COPY_HARD_REG_SET (scratch, set.regs);
573 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
574 AND_COMPL_HARD_REG_SET (fallthrough_res.regs, scratch);
576 find_dead_or_set_registers (JUMP_LABEL (this_jump_insn),
577 &target_res, 0, jump_count,
578 target_set, needed);
579 find_dead_or_set_registers (next,
580 &fallthrough_res, 0, jump_count,
581 set, needed);
582 IOR_HARD_REG_SET (fallthrough_res.regs, target_res.regs);
583 AND_HARD_REG_SET (res->regs, fallthrough_res.regs);
584 break;
586 else
587 break;
589 else
591 /* Don't try this optimization if we expired our jump count
592 above, since that would mean there may be an infinite loop
593 in the function being compiled. */
594 jump_insn = 0;
595 break;
599 mark_referenced_resources (insn, &needed, 1);
600 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
602 COPY_HARD_REG_SET (scratch, set.regs);
603 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
604 AND_COMPL_HARD_REG_SET (res->regs, scratch);
607 return jump_insn;
610 /* Given X, a part of an insn, and a pointer to a `struct resource',
611 RES, indicate which resources are modified by the insn. If
612 MARK_TYPE is MARK_SRC_DEST_CALL, also mark resources potentially
613 set by the called routine. If MARK_TYPE is MARK_DEST, only mark SET_DESTs
615 If IN_DEST is nonzero, it means we are inside a SET. Otherwise,
616 objects are being referenced instead of set.
618 We never mark the insn as modifying the condition code unless it explicitly
619 SETs CC0 even though this is not totally correct. The reason for this is
620 that we require a SET of CC0 to immediately precede the reference to CC0.
621 So if some other insn sets CC0 as a side-effect, we know it cannot affect
622 our computation and thus may be placed in a delay slot. */
624 void
625 mark_set_resources (x, res, in_dest, mark_type)
626 rtx x;
627 struct resources *res;
628 int in_dest;
629 enum mark_resource_type mark_type;
631 enum rtx_code code;
632 int i, j;
633 unsigned int r;
634 const char *format_ptr;
636 restart:
638 code = GET_CODE (x);
640 switch (code)
642 case NOTE:
643 case BARRIER:
644 case CODE_LABEL:
645 case USE:
646 case CONST_INT:
647 case CONST_DOUBLE:
648 case LABEL_REF:
649 case SYMBOL_REF:
650 case CONST:
651 case PC:
652 /* These don't set any resources. */
653 return;
655 case CC0:
656 if (in_dest)
657 res->cc = 1;
658 return;
660 case CALL_INSN:
661 /* Called routine modifies the condition code, memory, any registers
662 that aren't saved across calls, global registers and anything
663 explicitly CLOBBERed immediately after the CALL_INSN. */
665 if (mark_type == MARK_SRC_DEST_CALL)
667 rtx link;
669 res->cc = res->memory = 1;
670 for (r = 0; r < FIRST_PSEUDO_REGISTER; r++)
671 if (call_used_regs[r] || global_regs[r])
672 SET_HARD_REG_BIT (res->regs, r);
674 for (link = CALL_INSN_FUNCTION_USAGE (x);
675 link; link = XEXP (link, 1))
676 if (GET_CODE (XEXP (link, 0)) == CLOBBER)
677 mark_set_resources (SET_DEST (XEXP (link, 0)), res, 1,
678 MARK_SRC_DEST);
680 /* Check for a REG_SETJMP. If it exists, then we must
681 assume that this call can clobber any register. */
682 if (find_reg_note (x, REG_SETJMP, NULL))
683 SET_HARD_REG_SET (res->regs);
686 /* ... and also what its RTL says it modifies, if anything. */
688 case JUMP_INSN:
689 case INSN:
691 /* An insn consisting of just a CLOBBER (or USE) is just for flow
692 and doesn't actually do anything, so we ignore it. */
694 #ifdef INSN_SETS_ARE_DELAYED
695 if (mark_type != MARK_SRC_DEST_CALL
696 && INSN_SETS_ARE_DELAYED (x))
697 return;
698 #endif
700 x = PATTERN (x);
701 if (GET_CODE (x) != USE && GET_CODE (x) != CLOBBER)
702 goto restart;
703 return;
705 case SET:
706 /* If the source of a SET is a CALL, this is actually done by
707 the called routine. So only include it if we are to include the
708 effects of the calling routine. */
710 mark_set_resources (SET_DEST (x), res,
711 (mark_type == MARK_SRC_DEST_CALL
712 || GET_CODE (SET_SRC (x)) != CALL),
713 mark_type);
715 if (mark_type != MARK_DEST)
716 mark_set_resources (SET_SRC (x), res, 0, MARK_SRC_DEST);
717 return;
719 case CLOBBER:
720 mark_set_resources (XEXP (x, 0), res, 1, MARK_SRC_DEST);
721 return;
723 case SEQUENCE:
724 for (i = 0; i < XVECLEN (x, 0); i++)
725 if (! (INSN_ANNULLED_BRANCH_P (XVECEXP (x, 0, 0))
726 && INSN_FROM_TARGET_P (XVECEXP (x, 0, i))))
727 mark_set_resources (XVECEXP (x, 0, i), res, 0, mark_type);
728 return;
730 case POST_INC:
731 case PRE_INC:
732 case POST_DEC:
733 case PRE_DEC:
734 mark_set_resources (XEXP (x, 0), res, 1, MARK_SRC_DEST);
735 return;
737 case PRE_MODIFY:
738 case POST_MODIFY:
739 mark_set_resources (XEXP (x, 0), res, 1, MARK_SRC_DEST);
740 mark_set_resources (XEXP (XEXP (x, 1), 0), res, 0, MARK_SRC_DEST);
741 mark_set_resources (XEXP (XEXP (x, 1), 1), res, 0, MARK_SRC_DEST);
742 return;
744 case SIGN_EXTRACT:
745 case ZERO_EXTRACT:
746 if (! (mark_type == MARK_DEST && in_dest))
748 mark_set_resources (XEXP (x, 0), res, in_dest, MARK_SRC_DEST);
749 mark_set_resources (XEXP (x, 1), res, 0, MARK_SRC_DEST);
750 mark_set_resources (XEXP (x, 2), res, 0, MARK_SRC_DEST);
752 return;
754 case MEM:
755 if (in_dest)
757 res->memory = 1;
758 res->unch_memory |= RTX_UNCHANGING_P (x);
759 res->volatil |= MEM_VOLATILE_P (x);
762 mark_set_resources (XEXP (x, 0), res, 0, MARK_SRC_DEST);
763 return;
765 case SUBREG:
766 if (in_dest)
768 if (GET_CODE (SUBREG_REG (x)) != REG)
769 mark_set_resources (SUBREG_REG (x), res, in_dest, mark_type);
770 else
772 unsigned int regno = subreg_regno (x);
773 unsigned int last_regno
774 = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
776 if (last_regno > FIRST_PSEUDO_REGISTER)
777 abort ();
778 for (r = regno; r < last_regno; r++)
779 SET_HARD_REG_BIT (res->regs, r);
782 return;
784 case REG:
785 if (in_dest)
787 unsigned int regno = REGNO (x);
788 unsigned int last_regno
789 = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
791 if (last_regno > FIRST_PSEUDO_REGISTER)
792 abort ();
793 for (r = regno; r < last_regno; r++)
794 SET_HARD_REG_BIT (res->regs, r);
796 return;
798 case STRICT_LOW_PART:
799 if (! (mark_type == MARK_DEST && in_dest))
801 mark_set_resources (XEXP (x, 0), res, 0, MARK_SRC_DEST);
802 return;
805 case UNSPEC_VOLATILE:
806 case ASM_INPUT:
807 /* Traditional asm's are always volatile. */
808 res->volatil = 1;
809 return;
811 case TRAP_IF:
812 res->volatil = 1;
813 break;
815 case ASM_OPERANDS:
816 res->volatil |= MEM_VOLATILE_P (x);
818 /* For all ASM_OPERANDS, we must traverse the vector of input operands.
819 We can not just fall through here since then we would be confused
820 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
821 traditional asms unlike their normal usage. */
823 for (i = 0; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
824 mark_set_resources (ASM_OPERANDS_INPUT (x, i), res, in_dest,
825 MARK_SRC_DEST);
826 return;
828 default:
829 break;
832 /* Process each sub-expression and flag what it needs. */
833 format_ptr = GET_RTX_FORMAT (code);
834 for (i = 0; i < GET_RTX_LENGTH (code); i++)
835 switch (*format_ptr++)
837 case 'e':
838 mark_set_resources (XEXP (x, i), res, in_dest, mark_type);
839 break;
841 case 'E':
842 for (j = 0; j < XVECLEN (x, i); j++)
843 mark_set_resources (XVECEXP (x, i, j), res, in_dest, mark_type);
844 break;
848 /* Set the resources that are live at TARGET.
850 If TARGET is zero, we refer to the end of the current function and can
851 return our precomputed value.
853 Otherwise, we try to find out what is live by consulting the basic block
854 information. This is tricky, because we must consider the actions of
855 reload and jump optimization, which occur after the basic block information
856 has been computed.
858 Accordingly, we proceed as follows::
860 We find the previous BARRIER and look at all immediately following labels
861 (with no intervening active insns) to see if any of them start a basic
862 block. If we hit the start of the function first, we use block 0.
864 Once we have found a basic block and a corresponding first insns, we can
865 accurately compute the live status from basic_block_live_regs and
866 reg_renumber. (By starting at a label following a BARRIER, we are immune
867 to actions taken by reload and jump.) Then we scan all insns between
868 that point and our target. For each CLOBBER (or for call-clobbered regs
869 when we pass a CALL_INSN), mark the appropriate registers are dead. For
870 a SET, mark them as live.
872 We have to be careful when using REG_DEAD notes because they are not
873 updated by such things as find_equiv_reg. So keep track of registers
874 marked as dead that haven't been assigned to, and mark them dead at the
875 next CODE_LABEL since reload and jump won't propagate values across labels.
877 If we cannot find the start of a basic block (should be a very rare
878 case, if it can happen at all), mark everything as potentially live.
880 Next, scan forward from TARGET looking for things set or clobbered
881 before they are used. These are not live.
883 Because we can be called many times on the same target, save our results
884 in a hash table indexed by INSN_UID. This is only done if the function
885 init_resource_info () was invoked before we are called. */
887 void
888 mark_target_live_regs (insns, target, res)
889 rtx insns;
890 rtx target;
891 struct resources *res;
893 int b = -1;
894 unsigned int i;
895 struct target_info *tinfo = NULL;
896 rtx insn;
897 rtx jump_insn = 0;
898 rtx jump_target;
899 HARD_REG_SET scratch;
900 struct resources set, needed;
902 /* Handle end of function. */
903 if (target == 0)
905 *res = end_of_function_needs;
906 return;
909 /* We have to assume memory is needed, but the CC isn't. */
910 res->memory = 1;
911 res->volatil = res->unch_memory = 0;
912 res->cc = 0;
914 /* See if we have computed this value already. */
915 if (target_hash_table != NULL)
917 for (tinfo = target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME];
918 tinfo; tinfo = tinfo->next)
919 if (tinfo->uid == INSN_UID (target))
920 break;
922 /* Start by getting the basic block number. If we have saved
923 information, we can get it from there unless the insn at the
924 start of the basic block has been deleted. */
925 if (tinfo && tinfo->block != -1
926 && ! INSN_DELETED_P (BLOCK_HEAD (tinfo->block)))
927 b = tinfo->block;
930 if (b == -1)
931 b = find_basic_block (target, MAX_DELAY_SLOT_LIVE_SEARCH);
933 if (target_hash_table != NULL)
935 if (tinfo)
937 /* If the information is up-to-date, use it. Otherwise, we will
938 update it below. */
939 if (b == tinfo->block && b != -1 && tinfo->bb_tick == bb_ticks[b])
941 COPY_HARD_REG_SET (res->regs, tinfo->live_regs);
942 return;
945 else
947 /* Allocate a place to put our results and chain it into the
948 hash table. */
949 tinfo = (struct target_info *) xmalloc (sizeof (struct target_info));
950 tinfo->uid = INSN_UID (target);
951 tinfo->block = b;
952 tinfo->next
953 = target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME];
954 target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME] = tinfo;
958 CLEAR_HARD_REG_SET (pending_dead_regs);
960 /* If we found a basic block, get the live registers from it and update
961 them with anything set or killed between its start and the insn before
962 TARGET. Otherwise, we must assume everything is live. */
963 if (b != -1)
965 regset regs_live = BASIC_BLOCK (b)->global_live_at_start;
966 unsigned int j;
967 unsigned int regno;
968 rtx start_insn, stop_insn;
970 /* Compute hard regs live at start of block -- this is the real hard regs
971 marked live, plus live pseudo regs that have been renumbered to
972 hard regs. */
974 REG_SET_TO_HARD_REG_SET (current_live_regs, regs_live);
976 EXECUTE_IF_SET_IN_REG_SET
977 (regs_live, FIRST_PSEUDO_REGISTER, i,
979 if (reg_renumber[i] >= 0)
981 regno = reg_renumber[i];
982 for (j = regno;
983 j < regno + HARD_REGNO_NREGS (regno,
984 PSEUDO_REGNO_MODE (i));
985 j++)
986 SET_HARD_REG_BIT (current_live_regs, j);
990 /* Get starting and ending insn, handling the case where each might
991 be a SEQUENCE. */
992 start_insn = (b == 0 ? insns : BLOCK_HEAD (b));
993 stop_insn = target;
995 if (GET_CODE (start_insn) == INSN
996 && GET_CODE (PATTERN (start_insn)) == SEQUENCE)
997 start_insn = XVECEXP (PATTERN (start_insn), 0, 0);
999 if (GET_CODE (stop_insn) == INSN
1000 && GET_CODE (PATTERN (stop_insn)) == SEQUENCE)
1001 stop_insn = next_insn (PREV_INSN (stop_insn));
1003 for (insn = start_insn; insn != stop_insn;
1004 insn = next_insn_no_annul (insn))
1006 rtx link;
1007 rtx real_insn = insn;
1009 /* If this insn is from the target of a branch, it isn't going to
1010 be used in the sequel. If it is used in both cases, this
1011 test will not be true. */
1012 if (INSN_FROM_TARGET_P (insn))
1013 continue;
1015 /* If this insn is a USE made by update_block, we care about the
1016 underlying insn. */
1017 if (GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == USE
1018 && INSN_P (XEXP (PATTERN (insn), 0)))
1019 real_insn = XEXP (PATTERN (insn), 0);
1021 if (GET_CODE (real_insn) == CALL_INSN)
1023 /* CALL clobbers all call-used regs that aren't fixed except
1024 sp, ap, and fp. Do this before setting the result of the
1025 call live. */
1026 AND_COMPL_HARD_REG_SET (current_live_regs,
1027 regs_invalidated_by_call);
1029 /* A CALL_INSN sets any global register live, since it may
1030 have been modified by the call. */
1031 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1032 if (global_regs[i])
1033 SET_HARD_REG_BIT (current_live_regs, i);
1036 /* Mark anything killed in an insn to be deadened at the next
1037 label. Ignore USE insns; the only REG_DEAD notes will be for
1038 parameters. But they might be early. A CALL_INSN will usually
1039 clobber registers used for parameters. It isn't worth bothering
1040 with the unlikely case when it won't. */
1041 if ((GET_CODE (real_insn) == INSN
1042 && GET_CODE (PATTERN (real_insn)) != USE
1043 && GET_CODE (PATTERN (real_insn)) != CLOBBER)
1044 || GET_CODE (real_insn) == JUMP_INSN
1045 || GET_CODE (real_insn) == CALL_INSN)
1047 for (link = REG_NOTES (real_insn); link; link = XEXP (link, 1))
1048 if (REG_NOTE_KIND (link) == REG_DEAD
1049 && GET_CODE (XEXP (link, 0)) == REG
1050 && REGNO (XEXP (link, 0)) < FIRST_PSEUDO_REGISTER)
1052 unsigned int first_regno = REGNO (XEXP (link, 0));
1053 unsigned int last_regno
1054 = (first_regno
1055 + HARD_REGNO_NREGS (first_regno,
1056 GET_MODE (XEXP (link, 0))));
1058 for (i = first_regno; i < last_regno; i++)
1059 SET_HARD_REG_BIT (pending_dead_regs, i);
1062 note_stores (PATTERN (real_insn), update_live_status, NULL);
1064 /* If any registers were unused after this insn, kill them.
1065 These notes will always be accurate. */
1066 for (link = REG_NOTES (real_insn); link; link = XEXP (link, 1))
1067 if (REG_NOTE_KIND (link) == REG_UNUSED
1068 && GET_CODE (XEXP (link, 0)) == REG
1069 && REGNO (XEXP (link, 0)) < FIRST_PSEUDO_REGISTER)
1071 unsigned int first_regno = REGNO (XEXP (link, 0));
1072 unsigned int last_regno
1073 = (first_regno
1074 + HARD_REGNO_NREGS (first_regno,
1075 GET_MODE (XEXP (link, 0))));
1077 for (i = first_regno; i < last_regno; i++)
1078 CLEAR_HARD_REG_BIT (current_live_regs, i);
1082 else if (GET_CODE (real_insn) == CODE_LABEL)
1084 /* A label clobbers the pending dead registers since neither
1085 reload nor jump will propagate a value across a label. */
1086 AND_COMPL_HARD_REG_SET (current_live_regs, pending_dead_regs);
1087 CLEAR_HARD_REG_SET (pending_dead_regs);
1090 /* The beginning of the epilogue corresponds to the end of the
1091 RTL chain when there are no epilogue insns. Certain resources
1092 are implicitly required at that point. */
1093 else if (GET_CODE (real_insn) == NOTE
1094 && NOTE_LINE_NUMBER (real_insn) == NOTE_INSN_EPILOGUE_BEG)
1095 IOR_HARD_REG_SET (current_live_regs, start_of_epilogue_needs.regs);
1098 COPY_HARD_REG_SET (res->regs, current_live_regs);
1099 if (tinfo != NULL)
1101 tinfo->block = b;
1102 tinfo->bb_tick = bb_ticks[b];
1105 else
1106 /* We didn't find the start of a basic block. Assume everything
1107 in use. This should happen only extremely rarely. */
1108 SET_HARD_REG_SET (res->regs);
1110 CLEAR_RESOURCE (&set);
1111 CLEAR_RESOURCE (&needed);
1113 jump_insn = find_dead_or_set_registers (target, res, &jump_target, 0,
1114 set, needed);
1116 /* If we hit an unconditional branch, we have another way of finding out
1117 what is live: we can see what is live at the branch target and include
1118 anything used but not set before the branch. We add the live
1119 resources found using the test below to those found until now. */
1121 if (jump_insn)
1123 struct resources new_resources;
1124 rtx stop_insn = next_active_insn (jump_insn);
1126 mark_target_live_regs (insns, next_active_insn (jump_target),
1127 &new_resources);
1128 CLEAR_RESOURCE (&set);
1129 CLEAR_RESOURCE (&needed);
1131 /* Include JUMP_INSN in the needed registers. */
1132 for (insn = target; insn != stop_insn; insn = next_active_insn (insn))
1134 mark_referenced_resources (insn, &needed, 1);
1136 COPY_HARD_REG_SET (scratch, needed.regs);
1137 AND_COMPL_HARD_REG_SET (scratch, set.regs);
1138 IOR_HARD_REG_SET (new_resources.regs, scratch);
1140 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
1143 IOR_HARD_REG_SET (res->regs, new_resources.regs);
1146 if (tinfo != NULL)
1148 COPY_HARD_REG_SET (tinfo->live_regs, res->regs);
1152 /* Initialize the resources required by mark_target_live_regs ().
1153 This should be invoked before the first call to mark_target_live_regs. */
1155 void
1156 init_resource_info (epilogue_insn)
1157 rtx epilogue_insn;
1159 int i;
1161 /* Indicate what resources are required to be valid at the end of the current
1162 function. The condition code never is and memory always is. If the
1163 frame pointer is needed, it is and so is the stack pointer unless
1164 EXIT_IGNORE_STACK is non-zero. If the frame pointer is not needed, the
1165 stack pointer is. Registers used to return the function value are
1166 needed. Registers holding global variables are needed. */
1168 end_of_function_needs.cc = 0;
1169 end_of_function_needs.memory = 1;
1170 end_of_function_needs.unch_memory = 0;
1171 CLEAR_HARD_REG_SET (end_of_function_needs.regs);
1173 if (frame_pointer_needed)
1175 SET_HARD_REG_BIT (end_of_function_needs.regs, FRAME_POINTER_REGNUM);
1176 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
1177 SET_HARD_REG_BIT (end_of_function_needs.regs, HARD_FRAME_POINTER_REGNUM);
1178 #endif
1179 #ifdef EXIT_IGNORE_STACK
1180 if (! EXIT_IGNORE_STACK
1181 || current_function_sp_is_unchanging)
1182 #endif
1183 SET_HARD_REG_BIT (end_of_function_needs.regs, STACK_POINTER_REGNUM);
1185 else
1186 SET_HARD_REG_BIT (end_of_function_needs.regs, STACK_POINTER_REGNUM);
1188 if (current_function_return_rtx != 0)
1189 mark_referenced_resources (current_function_return_rtx,
1190 &end_of_function_needs, 1);
1192 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1193 if (global_regs[i]
1194 #ifdef EPILOGUE_USES
1195 || EPILOGUE_USES (i)
1196 #endif
1198 SET_HARD_REG_BIT (end_of_function_needs.regs, i);
1200 /* The registers required to be live at the end of the function are
1201 represented in the flow information as being dead just prior to
1202 reaching the end of the function. For example, the return of a value
1203 might be represented by a USE of the return register immediately
1204 followed by an unconditional jump to the return label where the
1205 return label is the end of the RTL chain. The end of the RTL chain
1206 is then taken to mean that the return register is live.
1208 This sequence is no longer maintained when epilogue instructions are
1209 added to the RTL chain. To reconstruct the original meaning, the
1210 start of the epilogue (NOTE_INSN_EPILOGUE_BEG) is regarded as the
1211 point where these registers become live (start_of_epilogue_needs).
1212 If epilogue instructions are present, the registers set by those
1213 instructions won't have been processed by flow. Thus, those
1214 registers are additionally required at the end of the RTL chain
1215 (end_of_function_needs). */
1217 start_of_epilogue_needs = end_of_function_needs;
1219 while ((epilogue_insn = next_nonnote_insn (epilogue_insn)))
1220 mark_set_resources (epilogue_insn, &end_of_function_needs, 0,
1221 MARK_SRC_DEST_CALL);
1223 /* Allocate and initialize the tables used by mark_target_live_regs. */
1224 target_hash_table = (struct target_info **)
1225 xcalloc (TARGET_HASH_PRIME, sizeof (struct target_info *));
1226 bb_ticks = (int *) xcalloc (n_basic_blocks, sizeof (int));
1229 /* Free up the resources allcated to mark_target_live_regs (). This
1230 should be invoked after the last call to mark_target_live_regs (). */
1232 void
1233 free_resource_info ()
1235 if (target_hash_table != NULL)
1237 int i;
1239 for (i = 0; i < TARGET_HASH_PRIME; ++i)
1241 struct target_info *ti = target_hash_table[i];
1243 while (ti)
1245 struct target_info *next = ti->next;
1246 free (ti);
1247 ti = next;
1251 free (target_hash_table);
1252 target_hash_table = NULL;
1255 if (bb_ticks != NULL)
1257 free (bb_ticks);
1258 bb_ticks = NULL;
1262 /* Clear any hashed information that we have stored for INSN. */
1264 void
1265 clear_hashed_info_for_insn (insn)
1266 rtx insn;
1268 struct target_info *tinfo;
1270 if (target_hash_table != NULL)
1272 for (tinfo = target_hash_table[INSN_UID (insn) % TARGET_HASH_PRIME];
1273 tinfo; tinfo = tinfo->next)
1274 if (tinfo->uid == INSN_UID (insn))
1275 break;
1277 if (tinfo)
1278 tinfo->block = -1;
1282 /* Increment the tick count for the basic block that contains INSN. */
1284 void
1285 incr_ticks_for_insn (insn)
1286 rtx insn;
1288 int b = find_basic_block (insn, MAX_DELAY_SLOT_LIVE_SEARCH);
1290 if (b != -1)
1291 bb_ticks[b]++;
1294 /* Add TRIAL to the set of resources used at the end of the current
1295 function. */
1296 void
1297 mark_end_of_function_resources (trial, include_delayed_effects)
1298 rtx trial;
1299 int include_delayed_effects;
1301 mark_referenced_resources (trial, &end_of_function_needs,
1302 include_delayed_effects);