1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
55 #include "basic-block.h"
58 #include "langhooks.h"
60 /* Commonly used modes. */
62 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
63 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
64 enum machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
65 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
68 /* This is *not* reset after each function. It gives each CODE_LABEL
69 in the entire compilation a unique label number. */
71 static int label_num
= 1;
73 /* Highest label number in current function.
74 Zero means use the value of label_num instead.
75 This is nonzero only when belatedly compiling an inline function. */
77 static int last_label_num
;
79 /* Value label_num had when set_new_first_and_last_label_number was called.
80 If label_num has not changed since then, last_label_num is valid. */
82 static int base_label_num
;
84 /* Nonzero means do not generate NOTEs for source line numbers. */
86 static int no_line_numbers
;
88 /* Commonly used rtx's, so that we only need space for one copy.
89 These are initialized once for the entire compilation.
90 All of these except perhaps the floating-point CONST_DOUBLEs
91 are unique; no other rtx-object will be equal to any of these. */
93 rtx global_rtl
[GR_MAX
];
95 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
96 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
97 record a copy of const[012]_rtx. */
99 rtx const_tiny_rtx
[3][(int) MAX_MACHINE_MODE
];
103 REAL_VALUE_TYPE dconst0
;
104 REAL_VALUE_TYPE dconst1
;
105 REAL_VALUE_TYPE dconst2
;
106 REAL_VALUE_TYPE dconstm1
;
108 /* All references to the following fixed hard registers go through
109 these unique rtl objects. On machines where the frame-pointer and
110 arg-pointer are the same register, they use the same unique object.
112 After register allocation, other rtl objects which used to be pseudo-regs
113 may be clobbered to refer to the frame-pointer register.
114 But references that were originally to the frame-pointer can be
115 distinguished from the others because they contain frame_pointer_rtx.
117 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
118 tricky: until register elimination has taken place hard_frame_pointer_rtx
119 should be used if it is being set, and frame_pointer_rtx otherwise. After
120 register elimination hard_frame_pointer_rtx should always be used.
121 On machines where the two registers are same (most) then these are the
124 In an inline procedure, the stack and frame pointer rtxs may not be
125 used for anything else. */
126 rtx struct_value_rtx
; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
127 rtx struct_value_incoming_rtx
; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
128 rtx static_chain_rtx
; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
129 rtx static_chain_incoming_rtx
; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
130 rtx pic_offset_table_rtx
; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
132 /* This is used to implement __builtin_return_address for some machines.
133 See for instance the MIPS port. */
134 rtx return_address_pointer_rtx
; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
136 /* We make one copy of (const_int C) where C is in
137 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
138 to save space during the compilation and simplify comparisons of
141 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
143 /* A hash table storing CONST_INTs whose absolute value is greater
144 than MAX_SAVED_CONST_INT. */
146 static htab_t const_int_htab
;
148 /* A hash table storing memory attribute structures. */
149 static htab_t mem_attrs_htab
;
151 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
152 shortly thrown away. We use two mechanisms to prevent this waste:
154 For sizes up to 5 elements, we keep a SEQUENCE and its associated
155 rtvec for use by gen_sequence. One entry for each size is
156 sufficient because most cases are calls to gen_sequence followed by
157 immediately emitting the SEQUENCE. Reuse is safe since emitting a
158 sequence is destructive on the insn in it anyway and hence can't be
161 We do not bother to save this cached data over nested function calls.
162 Instead, we just reinitialize them. */
164 #define SEQUENCE_RESULT_SIZE 5
166 static rtx sequence_result
[SEQUENCE_RESULT_SIZE
];
168 /* During RTL generation, we also keep a list of free INSN rtl codes. */
169 static rtx free_insn
;
171 #define first_insn (cfun->emit->x_first_insn)
172 #define last_insn (cfun->emit->x_last_insn)
173 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
174 #define last_linenum (cfun->emit->x_last_linenum)
175 #define last_filename (cfun->emit->x_last_filename)
176 #define first_label_num (cfun->emit->x_first_label_num)
178 static rtx make_jump_insn_raw
PARAMS ((rtx
));
179 static rtx make_call_insn_raw
PARAMS ((rtx
));
180 static rtx find_line_note
PARAMS ((rtx
));
181 static void mark_sequence_stack
PARAMS ((struct sequence_stack
*));
182 static rtx change_address_1
PARAMS ((rtx
, enum machine_mode
, rtx
,
184 static void unshare_all_rtl_1
PARAMS ((rtx
));
185 static void unshare_all_decls
PARAMS ((tree
));
186 static void reset_used_decls
PARAMS ((tree
));
187 static void mark_label_nuses
PARAMS ((rtx
));
188 static hashval_t const_int_htab_hash
PARAMS ((const void *));
189 static int const_int_htab_eq
PARAMS ((const void *,
191 static hashval_t mem_attrs_htab_hash
PARAMS ((const void *));
192 static int mem_attrs_htab_eq
PARAMS ((const void *,
194 static void mem_attrs_mark
PARAMS ((const void *));
195 static mem_attrs
*get_mem_attrs
PARAMS ((HOST_WIDE_INT
, tree
, rtx
,
198 static tree component_ref_for_mem_expr
PARAMS ((tree
));
199 static rtx gen_const_vector_0
PARAMS ((enum machine_mode
));
201 /* Probability of the conditional branch currently proceeded by try_split.
202 Set to -1 otherwise. */
203 int split_branch_probability
= -1;
205 /* Returns a hash code for X (which is a really a CONST_INT). */
208 const_int_htab_hash (x
)
211 return (hashval_t
) INTVAL ((const struct rtx_def
*) x
);
214 /* Returns non-zero if the value represented by X (which is really a
215 CONST_INT) is the same as that given by Y (which is really a
219 const_int_htab_eq (x
, y
)
223 return (INTVAL ((const struct rtx_def
*) x
) == *((const HOST_WIDE_INT
*) y
));
226 /* Returns a hash code for X (which is a really a mem_attrs *). */
229 mem_attrs_htab_hash (x
)
232 mem_attrs
*p
= (mem_attrs
*) x
;
234 return (p
->alias
^ (p
->align
* 1000)
235 ^ ((p
->offset
? INTVAL (p
->offset
) : 0) * 50000)
236 ^ ((p
->size
? INTVAL (p
->size
) : 0) * 2500000)
240 /* Returns non-zero if the value represented by X (which is really a
241 mem_attrs *) is the same as that given by Y (which is also really a
245 mem_attrs_htab_eq (x
, y
)
249 mem_attrs
*p
= (mem_attrs
*) x
;
250 mem_attrs
*q
= (mem_attrs
*) y
;
252 return (p
->alias
== q
->alias
&& p
->expr
== q
->expr
&& p
->offset
== q
->offset
253 && p
->size
== q
->size
&& p
->align
== q
->align
);
256 /* This routine is called when we determine that we need a mem_attrs entry.
257 It marks the associated decl and RTL as being used, if present. */
263 mem_attrs
*p
= (mem_attrs
*) x
;
266 ggc_mark_tree (p
->expr
);
269 ggc_mark_rtx (p
->offset
);
272 ggc_mark_rtx (p
->size
);
275 /* Allocate a new mem_attrs structure and insert it into the hash table if
276 one identical to it is not already in the table. We are doing this for
280 get_mem_attrs (alias
, expr
, offset
, size
, align
, mode
)
286 enum machine_mode mode
;
291 /* If everything is the default, we can just return zero. */
292 if (alias
== 0 && expr
== 0 && offset
== 0
294 || (mode
!= BLKmode
&& GET_MODE_SIZE (mode
) == INTVAL (size
)))
295 && (align
== BITS_PER_UNIT
297 && mode
!= BLKmode
&& align
== GET_MODE_ALIGNMENT (mode
))))
302 attrs
.offset
= offset
;
306 slot
= htab_find_slot (mem_attrs_htab
, &attrs
, INSERT
);
309 *slot
= ggc_alloc (sizeof (mem_attrs
));
310 memcpy (*slot
, &attrs
, sizeof (mem_attrs
));
316 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
317 don't attempt to share with the various global pieces of rtl (such as
318 frame_pointer_rtx). */
321 gen_raw_REG (mode
, regno
)
322 enum machine_mode mode
;
325 rtx x
= gen_rtx_raw_REG (mode
, regno
);
326 ORIGINAL_REGNO (x
) = regno
;
330 /* There are some RTL codes that require special attention; the generation
331 functions do the raw handling. If you add to this list, modify
332 special_rtx in gengenrtl.c as well. */
335 gen_rtx_CONST_INT (mode
, arg
)
336 enum machine_mode mode ATTRIBUTE_UNUSED
;
341 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
342 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
344 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
345 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
346 return const_true_rtx
;
349 /* Look up the CONST_INT in the hash table. */
350 slot
= htab_find_slot_with_hash (const_int_htab
, &arg
,
351 (hashval_t
) arg
, INSERT
);
353 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
359 gen_int_mode (c
, mode
)
361 enum machine_mode mode
;
363 return GEN_INT (trunc_int_for_mode (c
, mode
));
366 /* CONST_DOUBLEs needs special handling because their length is known
370 gen_rtx_CONST_DOUBLE (mode
, arg0
, arg1
)
371 enum machine_mode mode
;
372 HOST_WIDE_INT arg0
, arg1
;
374 rtx r
= rtx_alloc (CONST_DOUBLE
);
378 X0EXP (r
, 0) = NULL_RTX
;
382 for (i
= GET_RTX_LENGTH (CONST_DOUBLE
) - 1; i
> 2; --i
)
389 gen_rtx_REG (mode
, regno
)
390 enum machine_mode mode
;
393 /* In case the MD file explicitly references the frame pointer, have
394 all such references point to the same frame pointer. This is
395 used during frame pointer elimination to distinguish the explicit
396 references to these registers from pseudos that happened to be
399 If we have eliminated the frame pointer or arg pointer, we will
400 be using it as a normal register, for example as a spill
401 register. In such cases, we might be accessing it in a mode that
402 is not Pmode and therefore cannot use the pre-allocated rtx.
404 Also don't do this when we are making new REGs in reload, since
405 we don't want to get confused with the real pointers. */
407 if (mode
== Pmode
&& !reload_in_progress
)
409 if (regno
== FRAME_POINTER_REGNUM
)
410 return frame_pointer_rtx
;
411 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
412 if (regno
== HARD_FRAME_POINTER_REGNUM
)
413 return hard_frame_pointer_rtx
;
415 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
416 if (regno
== ARG_POINTER_REGNUM
)
417 return arg_pointer_rtx
;
419 #ifdef RETURN_ADDRESS_POINTER_REGNUM
420 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
421 return return_address_pointer_rtx
;
423 if (regno
== PIC_OFFSET_TABLE_REGNUM
424 && fixed_regs
[PIC_OFFSET_TABLE_REGNUM
])
425 return pic_offset_table_rtx
;
426 if (regno
== STACK_POINTER_REGNUM
)
427 return stack_pointer_rtx
;
430 return gen_raw_REG (mode
, regno
);
434 gen_rtx_MEM (mode
, addr
)
435 enum machine_mode mode
;
438 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
440 /* This field is not cleared by the mere allocation of the rtx, so
448 gen_rtx_SUBREG (mode
, reg
, offset
)
449 enum machine_mode mode
;
453 /* This is the most common failure type.
454 Catch it early so we can see who does it. */
455 if ((offset
% GET_MODE_SIZE (mode
)) != 0)
458 /* This check isn't usable right now because combine will
459 throw arbitrary crap like a CALL into a SUBREG in
460 gen_lowpart_for_combine so we must just eat it. */
462 /* Check for this too. */
463 if (offset
>= GET_MODE_SIZE (GET_MODE (reg
)))
466 return gen_rtx_fmt_ei (SUBREG
, mode
, reg
, offset
);
469 /* Generate a SUBREG representing the least-significant part of REG if MODE
470 is smaller than mode of REG, otherwise paradoxical SUBREG. */
473 gen_lowpart_SUBREG (mode
, reg
)
474 enum machine_mode mode
;
477 enum machine_mode inmode
;
479 inmode
= GET_MODE (reg
);
480 if (inmode
== VOIDmode
)
482 return gen_rtx_SUBREG (mode
, reg
,
483 subreg_lowpart_offset (mode
, inmode
));
486 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
488 ** This routine generates an RTX of the size specified by
489 ** <code>, which is an RTX code. The RTX structure is initialized
490 ** from the arguments <element1> through <elementn>, which are
491 ** interpreted according to the specific RTX type's format. The
492 ** special machine mode associated with the rtx (if any) is specified
495 ** gen_rtx can be invoked in a way which resembles the lisp-like
496 ** rtx it will generate. For example, the following rtx structure:
498 ** (plus:QI (mem:QI (reg:SI 1))
499 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
501 ** ...would be generated by the following C code:
503 ** gen_rtx (PLUS, QImode,
504 ** gen_rtx (MEM, QImode,
505 ** gen_rtx (REG, SImode, 1)),
506 ** gen_rtx (MEM, QImode,
507 ** gen_rtx (PLUS, SImode,
508 ** gen_rtx (REG, SImode, 2),
509 ** gen_rtx (REG, SImode, 3)))),
514 gen_rtx
VPARAMS ((enum rtx_code code
, enum machine_mode mode
, ...))
516 int i
; /* Array indices... */
517 const char *fmt
; /* Current rtx's format... */
518 rtx rt_val
; /* RTX to return to caller... */
521 VA_FIXEDARG (p
, enum rtx_code
, code
);
522 VA_FIXEDARG (p
, enum machine_mode
, mode
);
527 rt_val
= gen_rtx_CONST_INT (mode
, va_arg (p
, HOST_WIDE_INT
));
532 HOST_WIDE_INT arg0
= va_arg (p
, HOST_WIDE_INT
);
533 HOST_WIDE_INT arg1
= va_arg (p
, HOST_WIDE_INT
);
535 rt_val
= gen_rtx_CONST_DOUBLE (mode
, arg0
, arg1
);
540 rt_val
= gen_rtx_REG (mode
, va_arg (p
, int));
544 rt_val
= gen_rtx_MEM (mode
, va_arg (p
, rtx
));
548 rt_val
= rtx_alloc (code
); /* Allocate the storage space. */
549 rt_val
->mode
= mode
; /* Store the machine mode... */
551 fmt
= GET_RTX_FORMAT (code
); /* Find the right format... */
552 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
556 case '0': /* Unused field. */
559 case 'i': /* An integer? */
560 XINT (rt_val
, i
) = va_arg (p
, int);
563 case 'w': /* A wide integer? */
564 XWINT (rt_val
, i
) = va_arg (p
, HOST_WIDE_INT
);
567 case 's': /* A string? */
568 XSTR (rt_val
, i
) = va_arg (p
, char *);
571 case 'e': /* An expression? */
572 case 'u': /* An insn? Same except when printing. */
573 XEXP (rt_val
, i
) = va_arg (p
, rtx
);
576 case 'E': /* An RTX vector? */
577 XVEC (rt_val
, i
) = va_arg (p
, rtvec
);
580 case 'b': /* A bitmap? */
581 XBITMAP (rt_val
, i
) = va_arg (p
, bitmap
);
584 case 't': /* A tree? */
585 XTREE (rt_val
, i
) = va_arg (p
, tree
);
599 /* gen_rtvec (n, [rt1, ..., rtn])
601 ** This routine creates an rtvec and stores within it the
602 ** pointers to rtx's which are its arguments.
607 gen_rtvec
VPARAMS ((int n
, ...))
613 VA_FIXEDARG (p
, int, n
);
616 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
618 vector
= (rtx
*) alloca (n
* sizeof (rtx
));
620 for (i
= 0; i
< n
; i
++)
621 vector
[i
] = va_arg (p
, rtx
);
623 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
627 return gen_rtvec_v (save_n
, vector
);
631 gen_rtvec_v (n
, argp
)
639 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
641 rt_val
= rtvec_alloc (n
); /* Allocate an rtvec... */
643 for (i
= 0; i
< n
; i
++)
644 rt_val
->elem
[i
] = *argp
++;
649 /* Generate a REG rtx for a new pseudo register of mode MODE.
650 This pseudo is assigned the next sequential register number. */
654 enum machine_mode mode
;
656 struct function
*f
= cfun
;
659 /* Don't let anything called after initial flow analysis create new
664 if (generating_concat_p
665 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
666 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
668 /* For complex modes, don't make a single pseudo.
669 Instead, make a CONCAT of two pseudos.
670 This allows noncontiguous allocation of the real and imaginary parts,
671 which makes much better code. Besides, allocating DCmode
672 pseudos overstrains reload on some machines like the 386. */
673 rtx realpart
, imagpart
;
674 int size
= GET_MODE_UNIT_SIZE (mode
);
675 enum machine_mode partmode
676 = mode_for_size (size
* BITS_PER_UNIT
,
677 (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
678 ? MODE_FLOAT
: MODE_INT
),
681 realpart
= gen_reg_rtx (partmode
);
682 imagpart
= gen_reg_rtx (partmode
);
683 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
686 /* Make sure regno_pointer_align, regno_decl, and regno_reg_rtx are large
687 enough to have an element for this pseudo reg number. */
689 if (reg_rtx_no
== f
->emit
->regno_pointer_align_length
)
691 int old_size
= f
->emit
->regno_pointer_align_length
;
696 new = xrealloc (f
->emit
->regno_pointer_align
, old_size
* 2);
697 memset (new + old_size
, 0, old_size
);
698 f
->emit
->regno_pointer_align
= (unsigned char *) new;
700 new1
= (rtx
*) xrealloc (f
->emit
->x_regno_reg_rtx
,
701 old_size
* 2 * sizeof (rtx
));
702 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
703 regno_reg_rtx
= new1
;
705 new2
= (tree
*) xrealloc (f
->emit
->regno_decl
,
706 old_size
* 2 * sizeof (tree
));
707 memset (new2
+ old_size
, 0, old_size
* sizeof (tree
));
708 f
->emit
->regno_decl
= new2
;
710 f
->emit
->regno_pointer_align_length
= old_size
* 2;
713 val
= gen_raw_REG (mode
, reg_rtx_no
);
714 regno_reg_rtx
[reg_rtx_no
++] = val
;
718 /* Identify REG (which may be a CONCAT) as a user register. */
724 if (GET_CODE (reg
) == CONCAT
)
726 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
727 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
729 else if (GET_CODE (reg
) == REG
)
730 REG_USERVAR_P (reg
) = 1;
735 /* Identify REG as a probable pointer register and show its alignment
736 as ALIGN, if nonzero. */
739 mark_reg_pointer (reg
, align
)
743 if (! REG_POINTER (reg
))
745 REG_POINTER (reg
) = 1;
748 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
750 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
751 /* We can no-longer be sure just how aligned this pointer is */
752 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
755 /* Return 1 plus largest pseudo reg number used in the current function. */
763 /* Return 1 + the largest label number used so far in the current function. */
768 if (last_label_num
&& label_num
== base_label_num
)
769 return last_label_num
;
773 /* Return first label number used in this function (if any were used). */
776 get_first_label_num ()
778 return first_label_num
;
781 /* Return the final regno of X, which is a SUBREG of a hard
784 subreg_hard_regno (x
, check_mode
)
788 enum machine_mode mode
= GET_MODE (x
);
789 unsigned int byte_offset
, base_regno
, final_regno
;
790 rtx reg
= SUBREG_REG (x
);
792 /* This is where we attempt to catch illegal subregs
793 created by the compiler. */
794 if (GET_CODE (x
) != SUBREG
795 || GET_CODE (reg
) != REG
)
797 base_regno
= REGNO (reg
);
798 if (base_regno
>= FIRST_PSEUDO_REGISTER
)
800 if (check_mode
&& ! HARD_REGNO_MODE_OK (base_regno
, GET_MODE (reg
)))
803 /* Catch non-congruent offsets too. */
804 byte_offset
= SUBREG_BYTE (x
);
805 if ((byte_offset
% GET_MODE_SIZE (mode
)) != 0)
808 final_regno
= subreg_regno (x
);
813 /* Return a value representing some low-order bits of X, where the number
814 of low-order bits is given by MODE. Note that no conversion is done
815 between floating-point and fixed-point values, rather, the bit
816 representation is returned.
818 This function handles the cases in common between gen_lowpart, below,
819 and two variants in cse.c and combine.c. These are the cases that can
820 be safely handled at all points in the compilation.
822 If this is not a case we can handle, return 0. */
825 gen_lowpart_common (mode
, x
)
826 enum machine_mode mode
;
829 int msize
= GET_MODE_SIZE (mode
);
830 int xsize
= GET_MODE_SIZE (GET_MODE (x
));
833 if (GET_MODE (x
) == mode
)
836 /* MODE must occupy no more words than the mode of X. */
837 if (GET_MODE (x
) != VOIDmode
838 && ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
839 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
)))
842 offset
= subreg_lowpart_offset (mode
, GET_MODE (x
));
844 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
845 && (GET_MODE_CLASS (mode
) == MODE_INT
846 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
848 /* If we are getting the low-order part of something that has been
849 sign- or zero-extended, we can either just use the object being
850 extended or make a narrower extension. If we want an even smaller
851 piece than the size of the object being extended, call ourselves
854 This case is used mostly by combine and cse. */
856 if (GET_MODE (XEXP (x
, 0)) == mode
)
858 else if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
859 return gen_lowpart_common (mode
, XEXP (x
, 0));
860 else if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (x
)))
861 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
863 else if (GET_CODE (x
) == SUBREG
|| GET_CODE (x
) == REG
864 || GET_CODE (x
) == CONCAT
)
865 return simplify_gen_subreg (mode
, x
, GET_MODE (x
), offset
);
866 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
867 from the low-order part of the constant. */
868 else if ((GET_MODE_CLASS (mode
) == MODE_INT
869 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
870 && GET_MODE (x
) == VOIDmode
871 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
))
873 /* If MODE is twice the host word size, X is already the desired
874 representation. Otherwise, if MODE is wider than a word, we can't
875 do this. If MODE is exactly a word, return just one CONST_INT. */
877 if (GET_MODE_BITSIZE (mode
) >= 2 * HOST_BITS_PER_WIDE_INT
)
879 else if (GET_MODE_BITSIZE (mode
) > HOST_BITS_PER_WIDE_INT
)
881 else if (GET_MODE_BITSIZE (mode
) == HOST_BITS_PER_WIDE_INT
)
882 return (GET_CODE (x
) == CONST_INT
? x
883 : GEN_INT (CONST_DOUBLE_LOW (x
)));
886 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
887 HOST_WIDE_INT val
= (GET_CODE (x
) == CONST_INT
? INTVAL (x
)
888 : CONST_DOUBLE_LOW (x
));
890 /* Sign extend to HOST_WIDE_INT. */
891 val
= trunc_int_for_mode (val
, mode
);
893 return (GET_CODE (x
) == CONST_INT
&& INTVAL (x
) == val
? x
898 /* The floating-point emulator can handle all conversions between
899 FP and integer operands. This simplifies reload because it
900 doesn't have to deal with constructs like (subreg:DI
901 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
902 /* Single-precision floats are always 32-bits and double-precision
903 floats are always 64-bits. */
905 else if (GET_MODE_CLASS (mode
) == MODE_FLOAT
906 && GET_MODE_BITSIZE (mode
) == 32
907 && GET_CODE (x
) == CONST_INT
)
913 r
= REAL_VALUE_FROM_TARGET_SINGLE (i
);
914 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
916 else if (GET_MODE_CLASS (mode
) == MODE_FLOAT
917 && GET_MODE_BITSIZE (mode
) == 64
918 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
)
919 && GET_MODE (x
) == VOIDmode
)
923 HOST_WIDE_INT low
, high
;
925 if (GET_CODE (x
) == CONST_INT
)
928 high
= low
>> (HOST_BITS_PER_WIDE_INT
- 1);
932 low
= CONST_DOUBLE_LOW (x
);
933 high
= CONST_DOUBLE_HIGH (x
);
936 #if HOST_BITS_PER_WIDE_INT == 32
937 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
939 if (WORDS_BIG_ENDIAN
)
940 i
[0] = high
, i
[1] = low
;
942 i
[0] = low
, i
[1] = high
;
947 r
= REAL_VALUE_FROM_TARGET_DOUBLE (i
);
948 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
950 else if ((GET_MODE_CLASS (mode
) == MODE_INT
951 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
952 && GET_CODE (x
) == CONST_DOUBLE
953 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_FLOAT
)
956 long i
[4]; /* Only the low 32 bits of each 'long' are used. */
957 int endian
= WORDS_BIG_ENDIAN
? 1 : 0;
959 /* Convert 'r' into an array of four 32-bit words in target word
961 REAL_VALUE_FROM_CONST_DOUBLE (r
, x
);
962 switch (GET_MODE_BITSIZE (GET_MODE (x
)))
965 REAL_VALUE_TO_TARGET_SINGLE (r
, i
[3 * endian
]);
968 i
[3 - 3 * endian
] = 0;
971 REAL_VALUE_TO_TARGET_DOUBLE (r
, i
+ 2 * endian
);
972 i
[2 - 2 * endian
] = 0;
973 i
[3 - 2 * endian
] = 0;
976 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r
, i
+ endian
);
977 i
[3 - 3 * endian
] = 0;
980 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r
, i
);
985 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
987 #if HOST_BITS_PER_WIDE_INT == 32
988 return immed_double_const (i
[3 * endian
], i
[1 + endian
], mode
);
990 if (HOST_BITS_PER_WIDE_INT
!= 64)
993 return immed_double_const ((((unsigned long) i
[3 * endian
])
994 | ((HOST_WIDE_INT
) i
[1 + endian
] << 32)),
995 (((unsigned long) i
[2 - endian
])
996 | ((HOST_WIDE_INT
) i
[3 - 3 * endian
] << 32)),
1001 /* Otherwise, we can't do this. */
1005 /* Return the real part (which has mode MODE) of a complex value X.
1006 This always comes at the low address in memory. */
1009 gen_realpart (mode
, x
)
1010 enum machine_mode mode
;
1013 if (WORDS_BIG_ENDIAN
1014 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
1016 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1018 ("can't access real part of complex value in hard register");
1019 else if (WORDS_BIG_ENDIAN
)
1020 return gen_highpart (mode
, x
);
1022 return gen_lowpart (mode
, x
);
1025 /* Return the imaginary part (which has mode MODE) of a complex value X.
1026 This always comes at the high address in memory. */
1029 gen_imagpart (mode
, x
)
1030 enum machine_mode mode
;
1033 if (WORDS_BIG_ENDIAN
)
1034 return gen_lowpart (mode
, x
);
1035 else if (! WORDS_BIG_ENDIAN
1036 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
1038 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1040 ("can't access imaginary part of complex value in hard register");
1042 return gen_highpart (mode
, x
);
1045 /* Return 1 iff X, assumed to be a SUBREG,
1046 refers to the real part of the complex value in its containing reg.
1047 Complex values are always stored with the real part in the first word,
1048 regardless of WORDS_BIG_ENDIAN. */
1051 subreg_realpart_p (x
)
1054 if (GET_CODE (x
) != SUBREG
)
1057 return ((unsigned int) SUBREG_BYTE (x
)
1058 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x
))));
1061 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1062 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1063 least-significant part of X.
1064 MODE specifies how big a part of X to return;
1065 it usually should not be larger than a word.
1066 If X is a MEM whose address is a QUEUED, the value may be so also. */
1069 gen_lowpart (mode
, x
)
1070 enum machine_mode mode
;
1073 rtx result
= gen_lowpart_common (mode
, x
);
1077 else if (GET_CODE (x
) == REG
)
1079 /* Must be a hard reg that's not valid in MODE. */
1080 result
= gen_lowpart_common (mode
, copy_to_reg (x
));
1085 else if (GET_CODE (x
) == MEM
)
1087 /* The only additional case we can do is MEM. */
1089 if (WORDS_BIG_ENDIAN
)
1090 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
1091 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
1093 if (BYTES_BIG_ENDIAN
)
1094 /* Adjust the address so that the address-after-the-data
1096 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
1097 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
1099 return adjust_address (x
, mode
, offset
);
1101 else if (GET_CODE (x
) == ADDRESSOF
)
1102 return gen_lowpart (mode
, force_reg (GET_MODE (x
), x
));
1107 /* Like `gen_lowpart', but refer to the most significant part.
1108 This is used to access the imaginary part of a complex number. */
1111 gen_highpart (mode
, x
)
1112 enum machine_mode mode
;
1115 unsigned int msize
= GET_MODE_SIZE (mode
);
1118 /* This case loses if X is a subreg. To catch bugs early,
1119 complain if an invalid MODE is used even in other cases. */
1120 if (msize
> UNITS_PER_WORD
1121 && msize
!= GET_MODE_UNIT_SIZE (GET_MODE (x
)))
1124 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1125 subreg_highpart_offset (mode
, GET_MODE (x
)));
1127 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1128 the target if we have a MEM. gen_highpart must return a valid operand,
1129 emitting code if necessary to do so. */
1130 if (result
!= NULL_RTX
&& GET_CODE (result
) == MEM
)
1131 result
= validize_mem (result
);
1138 /* Like gen_highpart_mode, but accept mode of EXP operand in case EXP can
1139 be VOIDmode constant. */
1141 gen_highpart_mode (outermode
, innermode
, exp
)
1142 enum machine_mode outermode
, innermode
;
1145 if (GET_MODE (exp
) != VOIDmode
)
1147 if (GET_MODE (exp
) != innermode
)
1149 return gen_highpart (outermode
, exp
);
1151 return simplify_gen_subreg (outermode
, exp
, innermode
,
1152 subreg_highpart_offset (outermode
, innermode
));
1154 /* Return offset in bytes to get OUTERMODE low part
1155 of the value in mode INNERMODE stored in memory in target format. */
1158 subreg_lowpart_offset (outermode
, innermode
)
1159 enum machine_mode outermode
, innermode
;
1161 unsigned int offset
= 0;
1162 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1166 if (WORDS_BIG_ENDIAN
)
1167 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1168 if (BYTES_BIG_ENDIAN
)
1169 offset
+= difference
% UNITS_PER_WORD
;
1175 /* Return offset in bytes to get OUTERMODE high part
1176 of the value in mode INNERMODE stored in memory in target format. */
1178 subreg_highpart_offset (outermode
, innermode
)
1179 enum machine_mode outermode
, innermode
;
1181 unsigned int offset
= 0;
1182 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1184 if (GET_MODE_SIZE (innermode
) < GET_MODE_SIZE (outermode
))
1189 if (! WORDS_BIG_ENDIAN
)
1190 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1191 if (! BYTES_BIG_ENDIAN
)
1192 offset
+= difference
% UNITS_PER_WORD
;
1198 /* Return 1 iff X, assumed to be a SUBREG,
1199 refers to the least significant part of its containing reg.
1200 If X is not a SUBREG, always return 1 (it is its own low part!). */
1203 subreg_lowpart_p (x
)
1206 if (GET_CODE (x
) != SUBREG
)
1208 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1211 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1212 == SUBREG_BYTE (x
));
1216 /* Helper routine for all the constant cases of operand_subword.
1217 Some places invoke this directly. */
1220 constant_subword (op
, offset
, mode
)
1223 enum machine_mode mode
;
1225 int size_ratio
= HOST_BITS_PER_WIDE_INT
/ BITS_PER_WORD
;
1228 /* If OP is already an integer word, return it. */
1229 if (GET_MODE_CLASS (mode
) == MODE_INT
1230 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
)
1233 /* The output is some bits, the width of the target machine's word.
1234 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1236 if (HOST_BITS_PER_WIDE_INT
>= BITS_PER_WORD
1237 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1238 && GET_MODE_BITSIZE (mode
) == 64
1239 && GET_CODE (op
) == CONST_DOUBLE
)
1244 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1245 REAL_VALUE_TO_TARGET_DOUBLE (rv
, k
);
1247 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1248 which the words are written depends on the word endianness.
1249 ??? This is a potential portability problem and should
1250 be fixed at some point.
1252 We must exercise caution with the sign bit. By definition there
1253 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1254 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1255 So we explicitly mask and sign-extend as necessary. */
1256 if (BITS_PER_WORD
== 32)
1259 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1260 return GEN_INT (val
);
1262 #if HOST_BITS_PER_WIDE_INT >= 64
1263 else if (BITS_PER_WORD
>= 64 && offset
== 0)
1265 val
= k
[! WORDS_BIG_ENDIAN
];
1266 val
= (((val
& 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1267 val
|= (HOST_WIDE_INT
) k
[WORDS_BIG_ENDIAN
] & 0xffffffff;
1268 return GEN_INT (val
);
1271 else if (BITS_PER_WORD
== 16)
1273 val
= k
[offset
>> 1];
1274 if ((offset
& 1) == ! WORDS_BIG_ENDIAN
)
1276 val
= ((val
& 0xffff) ^ 0x8000) - 0x8000;
1277 return GEN_INT (val
);
1282 else if (HOST_BITS_PER_WIDE_INT
>= BITS_PER_WORD
1283 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1284 && GET_MODE_BITSIZE (mode
) > 64
1285 && GET_CODE (op
) == CONST_DOUBLE
)
1290 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1291 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv
, k
);
1293 if (BITS_PER_WORD
== 32)
1296 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1297 return GEN_INT (val
);
1299 #if HOST_BITS_PER_WIDE_INT >= 64
1300 else if (BITS_PER_WORD
>= 64 && offset
<= 1)
1302 val
= k
[offset
* 2 + ! WORDS_BIG_ENDIAN
];
1303 val
= (((val
& 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1304 val
|= (HOST_WIDE_INT
) k
[offset
* 2 + WORDS_BIG_ENDIAN
] & 0xffffffff;
1305 return GEN_INT (val
);
1312 /* Single word float is a little harder, since single- and double-word
1313 values often do not have the same high-order bits. We have already
1314 verified that we want the only defined word of the single-word value. */
1315 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1316 && GET_MODE_BITSIZE (mode
) == 32
1317 && GET_CODE (op
) == CONST_DOUBLE
)
1322 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1323 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
1325 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1327 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1329 if (BITS_PER_WORD
== 16)
1331 if ((offset
& 1) == ! WORDS_BIG_ENDIAN
)
1333 val
= ((val
& 0xffff) ^ 0x8000) - 0x8000;
1336 return GEN_INT (val
);
1339 /* The only remaining cases that we can handle are integers.
1340 Convert to proper endianness now since these cases need it.
1341 At this point, offset == 0 means the low-order word.
1343 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1344 in general. However, if OP is (const_int 0), we can just return
1347 if (op
== const0_rtx
)
1350 if (GET_MODE_CLASS (mode
) != MODE_INT
1351 || (GET_CODE (op
) != CONST_INT
&& GET_CODE (op
) != CONST_DOUBLE
)
1352 || BITS_PER_WORD
> HOST_BITS_PER_WIDE_INT
)
1355 if (WORDS_BIG_ENDIAN
)
1356 offset
= GET_MODE_SIZE (mode
) / UNITS_PER_WORD
- 1 - offset
;
1358 /* Find out which word on the host machine this value is in and get
1359 it from the constant. */
1360 val
= (offset
/ size_ratio
== 0
1361 ? (GET_CODE (op
) == CONST_INT
? INTVAL (op
) : CONST_DOUBLE_LOW (op
))
1362 : (GET_CODE (op
) == CONST_INT
1363 ? (INTVAL (op
) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op
)));
1365 /* Get the value we want into the low bits of val. */
1366 if (BITS_PER_WORD
< HOST_BITS_PER_WIDE_INT
)
1367 val
= ((val
>> ((offset
% size_ratio
) * BITS_PER_WORD
)));
1369 val
= trunc_int_for_mode (val
, word_mode
);
1371 return GEN_INT (val
);
1374 /* Return subword OFFSET of operand OP.
1375 The word number, OFFSET, is interpreted as the word number starting
1376 at the low-order address. OFFSET 0 is the low-order word if not
1377 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1379 If we cannot extract the required word, we return zero. Otherwise,
1380 an rtx corresponding to the requested word will be returned.
1382 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1383 reload has completed, a valid address will always be returned. After
1384 reload, if a valid address cannot be returned, we return zero.
1386 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1387 it is the responsibility of the caller.
1389 MODE is the mode of OP in case it is a CONST_INT.
1391 ??? This is still rather broken for some cases. The problem for the
1392 moment is that all callers of this thing provide no 'goal mode' to
1393 tell us to work with. This exists because all callers were written
1394 in a word based SUBREG world.
1395 Now use of this function can be deprecated by simplify_subreg in most
1400 operand_subword (op
, offset
, validate_address
, mode
)
1402 unsigned int offset
;
1403 int validate_address
;
1404 enum machine_mode mode
;
1406 if (mode
== VOIDmode
)
1407 mode
= GET_MODE (op
);
1409 if (mode
== VOIDmode
)
1412 /* If OP is narrower than a word, fail. */
1414 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1417 /* If we want a word outside OP, return zero. */
1419 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1422 /* Form a new MEM at the requested address. */
1423 if (GET_CODE (op
) == MEM
)
1425 rtx
new = adjust_address_nv (op
, word_mode
, offset
* UNITS_PER_WORD
);
1427 if (! validate_address
)
1430 else if (reload_completed
)
1432 if (! strict_memory_address_p (word_mode
, XEXP (new, 0)))
1436 return replace_equiv_address (new, XEXP (new, 0));
1439 /* Rest can be handled by simplify_subreg. */
1440 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1443 /* Similar to `operand_subword', but never return 0. If we can't extract
1444 the required subword, put OP into a register and try again. If that fails,
1445 abort. We always validate the address in this case.
1447 MODE is the mode of OP, in case it is CONST_INT. */
1450 operand_subword_force (op
, offset
, mode
)
1452 unsigned int offset
;
1453 enum machine_mode mode
;
1455 rtx result
= operand_subword (op
, offset
, 1, mode
);
1460 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1462 /* If this is a register which can not be accessed by words, copy it
1463 to a pseudo register. */
1464 if (GET_CODE (op
) == REG
)
1465 op
= copy_to_reg (op
);
1467 op
= force_reg (mode
, op
);
1470 result
= operand_subword (op
, offset
, 1, mode
);
1477 /* Given a compare instruction, swap the operands.
1478 A test instruction is changed into a compare of 0 against the operand. */
1481 reverse_comparison (insn
)
1484 rtx body
= PATTERN (insn
);
1487 if (GET_CODE (body
) == SET
)
1488 comp
= SET_SRC (body
);
1490 comp
= SET_SRC (XVECEXP (body
, 0, 0));
1492 if (GET_CODE (comp
) == COMPARE
)
1494 rtx op0
= XEXP (comp
, 0);
1495 rtx op1
= XEXP (comp
, 1);
1496 XEXP (comp
, 0) = op1
;
1497 XEXP (comp
, 1) = op0
;
1501 rtx
new = gen_rtx_COMPARE (VOIDmode
,
1502 CONST0_RTX (GET_MODE (comp
)), comp
);
1503 if (GET_CODE (body
) == SET
)
1504 SET_SRC (body
) = new;
1506 SET_SRC (XVECEXP (body
, 0, 0)) = new;
1510 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1511 or (2) a component ref of something variable. Represent the later with
1512 a NULL expression. */
1515 component_ref_for_mem_expr (ref
)
1518 tree inner
= TREE_OPERAND (ref
, 0);
1520 if (TREE_CODE (inner
) == COMPONENT_REF
)
1521 inner
= component_ref_for_mem_expr (inner
);
1524 tree placeholder_ptr
= 0;
1526 /* Now remove any conversions: they don't change what the underlying
1527 object is. Likewise for SAVE_EXPR. Also handle PLACEHOLDER_EXPR. */
1528 while (TREE_CODE (inner
) == NOP_EXPR
|| TREE_CODE (inner
) == CONVERT_EXPR
1529 || TREE_CODE (inner
) == NON_LVALUE_EXPR
1530 || TREE_CODE (inner
) == VIEW_CONVERT_EXPR
1531 || TREE_CODE (inner
) == SAVE_EXPR
1532 || TREE_CODE (inner
) == PLACEHOLDER_EXPR
)
1533 if (TREE_CODE (inner
) == PLACEHOLDER_EXPR
)
1534 inner
= find_placeholder (inner
, &placeholder_ptr
);
1536 inner
= TREE_OPERAND (inner
, 0);
1538 if (! DECL_P (inner
))
1542 if (inner
== TREE_OPERAND (ref
, 0))
1545 return build (COMPONENT_REF
, TREE_TYPE (ref
), inner
,
1546 TREE_OPERAND (ref
, 1));
1549 /* Given REF, a MEM, and T, either the type of X or the expression
1550 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1551 if we are making a new object of this type. */
1554 set_mem_attributes (ref
, t
, objectp
)
1559 HOST_WIDE_INT alias
= MEM_ALIAS_SET (ref
);
1560 tree expr
= MEM_EXPR (ref
);
1561 rtx offset
= MEM_OFFSET (ref
);
1562 rtx size
= MEM_SIZE (ref
);
1563 unsigned int align
= MEM_ALIGN (ref
);
1566 /* It can happen that type_for_mode was given a mode for which there
1567 is no language-level type. In which case it returns NULL, which
1572 type
= TYPE_P (t
) ? t
: TREE_TYPE (t
);
1574 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1575 wrong answer, as it assumes that DECL_RTL already has the right alias
1576 info. Callers should not set DECL_RTL until after the call to
1577 set_mem_attributes. */
1578 if (DECL_P (t
) && ref
== DECL_RTL_IF_SET (t
))
1581 /* Get the alias set from the expression or type (perhaps using a
1582 front-end routine) and use it. */
1583 alias
= get_alias_set (t
);
1585 MEM_VOLATILE_P (ref
) = TYPE_VOLATILE (type
);
1586 MEM_IN_STRUCT_P (ref
) = AGGREGATE_TYPE_P (type
);
1587 RTX_UNCHANGING_P (ref
)
1588 |= ((lang_hooks
.honor_readonly
1589 && (TYPE_READONLY (type
) || TREE_READONLY (t
)))
1590 || (! TYPE_P (t
) && TREE_CONSTANT (t
)));
1592 /* If we are making an object of this type, or if this is a DECL, we know
1593 that it is a scalar if the type is not an aggregate. */
1594 if ((objectp
|| DECL_P (t
)) && ! AGGREGATE_TYPE_P (type
))
1595 MEM_SCALAR_P (ref
) = 1;
1597 /* We can set the alignment from the type if we are making an object,
1598 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1599 if (objectp
|| TREE_CODE (t
) == INDIRECT_REF
|| TYPE_ALIGN_OK (type
))
1600 align
= MAX (align
, TYPE_ALIGN (type
));
1602 /* If the size is known, we can set that. */
1603 if (TYPE_SIZE_UNIT (type
) && host_integerp (TYPE_SIZE_UNIT (type
), 1))
1604 size
= GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type
), 1));
1606 /* If T is not a type, we may be able to deduce some more information about
1610 maybe_set_unchanging (ref
, t
);
1611 if (TREE_THIS_VOLATILE (t
))
1612 MEM_VOLATILE_P (ref
) = 1;
1614 /* Now remove any conversions: they don't change what the underlying
1615 object is. Likewise for SAVE_EXPR. */
1616 while (TREE_CODE (t
) == NOP_EXPR
|| TREE_CODE (t
) == CONVERT_EXPR
1617 || TREE_CODE (t
) == NON_LVALUE_EXPR
1618 || TREE_CODE (t
) == VIEW_CONVERT_EXPR
1619 || TREE_CODE (t
) == SAVE_EXPR
)
1620 t
= TREE_OPERAND (t
, 0);
1622 /* If this expression can't be addressed (e.g., it contains a reference
1623 to a non-addressable field), show we don't change its alias set. */
1624 if (! can_address_p (t
))
1625 MEM_KEEP_ALIAS_SET_P (ref
) = 1;
1627 /* If this is a decl, set the attributes of the MEM from it. */
1631 offset
= const0_rtx
;
1632 size
= (DECL_SIZE_UNIT (t
)
1633 && host_integerp (DECL_SIZE_UNIT (t
), 1)
1634 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t
), 1)) : 0);
1635 align
= DECL_ALIGN (t
);
1638 /* If this is a constant, we know the alignment. */
1639 else if (TREE_CODE_CLASS (TREE_CODE (t
)) == 'c')
1641 align
= TYPE_ALIGN (type
);
1642 #ifdef CONSTANT_ALIGNMENT
1643 align
= CONSTANT_ALIGNMENT (t
, align
);
1647 /* If this is a field reference and not a bit-field, record it. */
1648 /* ??? There is some information that can be gleened from bit-fields,
1649 such as the word offset in the structure that might be modified.
1650 But skip it for now. */
1651 else if (TREE_CODE (t
) == COMPONENT_REF
1652 && ! DECL_BIT_FIELD (TREE_OPERAND (t
, 1)))
1654 expr
= component_ref_for_mem_expr (t
);
1655 offset
= const0_rtx
;
1656 /* ??? Any reason the field size would be different than
1657 the size we got from the type? */
1660 /* If this is an array reference, look for an outer field reference. */
1661 else if (TREE_CODE (t
) == ARRAY_REF
)
1663 tree off_tree
= size_zero_node
;
1668 = fold (build (PLUS_EXPR
, sizetype
,
1669 fold (build (MULT_EXPR
, sizetype
,
1670 TREE_OPERAND (t
, 1),
1671 TYPE_SIZE_UNIT (TREE_TYPE (t
)))),
1673 t
= TREE_OPERAND (t
, 0);
1675 while (TREE_CODE (t
) == ARRAY_REF
);
1677 if (TREE_CODE (t
) == COMPONENT_REF
)
1679 expr
= component_ref_for_mem_expr (t
);
1680 if (host_integerp (off_tree
, 1))
1681 offset
= GEN_INT (tree_low_cst (off_tree
, 1));
1682 /* ??? Any reason the field size would be different than
1683 the size we got from the type? */
1688 /* Now set the attributes we computed above. */
1690 = get_mem_attrs (alias
, expr
, offset
, size
, align
, GET_MODE (ref
));
1692 /* If this is already known to be a scalar or aggregate, we are done. */
1693 if (MEM_IN_STRUCT_P (ref
) || MEM_SCALAR_P (ref
))
1696 /* If it is a reference into an aggregate, this is part of an aggregate.
1697 Otherwise we don't know. */
1698 else if (TREE_CODE (t
) == COMPONENT_REF
|| TREE_CODE (t
) == ARRAY_REF
1699 || TREE_CODE (t
) == ARRAY_RANGE_REF
1700 || TREE_CODE (t
) == BIT_FIELD_REF
)
1701 MEM_IN_STRUCT_P (ref
) = 1;
1704 /* Set the alias set of MEM to SET. */
1707 set_mem_alias_set (mem
, set
)
1711 #ifdef ENABLE_CHECKING
1712 /* If the new and old alias sets don't conflict, something is wrong. */
1713 if (!alias_sets_conflict_p (set
, MEM_ALIAS_SET (mem
)))
1717 MEM_ATTRS (mem
) = get_mem_attrs (set
, MEM_EXPR (mem
), MEM_OFFSET (mem
),
1718 MEM_SIZE (mem
), MEM_ALIGN (mem
),
1722 /* Set the alignment of MEM to ALIGN bits. */
1725 set_mem_align (mem
, align
)
1729 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1730 MEM_OFFSET (mem
), MEM_SIZE (mem
), align
,
1734 /* Set the expr for MEM to EXPR. */
1737 set_mem_expr (mem
, expr
)
1742 = get_mem_attrs (MEM_ALIAS_SET (mem
), expr
, MEM_OFFSET (mem
),
1743 MEM_SIZE (mem
), MEM_ALIGN (mem
), GET_MODE (mem
));
1746 /* Set the offset of MEM to OFFSET. */
1749 set_mem_offset (mem
, offset
)
1752 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1753 offset
, MEM_SIZE (mem
), MEM_ALIGN (mem
),
1757 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1758 and its address changed to ADDR. (VOIDmode means don't change the mode.
1759 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1760 returned memory location is required to be valid. The memory
1761 attributes are not changed. */
1764 change_address_1 (memref
, mode
, addr
, validate
)
1766 enum machine_mode mode
;
1772 if (GET_CODE (memref
) != MEM
)
1774 if (mode
== VOIDmode
)
1775 mode
= GET_MODE (memref
);
1777 addr
= XEXP (memref
, 0);
1781 if (reload_in_progress
|| reload_completed
)
1783 if (! memory_address_p (mode
, addr
))
1787 addr
= memory_address (mode
, addr
);
1790 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
1793 new = gen_rtx_MEM (mode
, addr
);
1794 MEM_COPY_ATTRIBUTES (new, memref
);
1798 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1799 way we are changing MEMREF, so we only preserve the alias set. */
1802 change_address (memref
, mode
, addr
)
1804 enum machine_mode mode
;
1807 rtx
new = change_address_1 (memref
, mode
, addr
, 1);
1808 enum machine_mode mmode
= GET_MODE (new);
1811 = get_mem_attrs (MEM_ALIAS_SET (memref
), 0, 0,
1812 mmode
== BLKmode
? 0 : GEN_INT (GET_MODE_SIZE (mmode
)),
1813 (mmode
== BLKmode
? BITS_PER_UNIT
1814 : GET_MODE_ALIGNMENT (mmode
)),
1820 /* Return a memory reference like MEMREF, but with its mode changed
1821 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1822 nonzero, the memory address is forced to be valid.
1823 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1824 and caller is responsible for adjusting MEMREF base register. */
1827 adjust_address_1 (memref
, mode
, offset
, validate
, adjust
)
1829 enum machine_mode mode
;
1830 HOST_WIDE_INT offset
;
1831 int validate
, adjust
;
1833 rtx addr
= XEXP (memref
, 0);
1835 rtx memoffset
= MEM_OFFSET (memref
);
1837 unsigned int memalign
= MEM_ALIGN (memref
);
1839 /* ??? Prefer to create garbage instead of creating shared rtl.
1840 This may happen even if offset is non-zero -- consider
1841 (plus (plus reg reg) const_int) -- so do this always. */
1842 addr
= copy_rtx (addr
);
1846 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1847 object, we can merge it into the LO_SUM. */
1848 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
1850 && (unsigned HOST_WIDE_INT
) offset
1851 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
1852 addr
= gen_rtx_LO_SUM (Pmode
, XEXP (addr
, 0),
1853 plus_constant (XEXP (addr
, 1), offset
));
1855 addr
= plus_constant (addr
, offset
);
1858 new = change_address_1 (memref
, mode
, addr
, validate
);
1860 /* Compute the new values of the memory attributes due to this adjustment.
1861 We add the offsets and update the alignment. */
1863 memoffset
= GEN_INT (offset
+ INTVAL (memoffset
));
1865 /* Compute the new alignment by taking the MIN of the alignment and the
1866 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
1871 (unsigned HOST_WIDE_INT
) (offset
& -offset
) * BITS_PER_UNIT
);
1873 /* We can compute the size in a number of ways. */
1874 if (GET_MODE (new) != BLKmode
)
1875 size
= GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
1876 else if (MEM_SIZE (memref
))
1877 size
= plus_constant (MEM_SIZE (memref
), -offset
);
1879 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
),
1880 memoffset
, size
, memalign
, GET_MODE (new));
1882 /* At some point, we should validate that this offset is within the object,
1883 if all the appropriate values are known. */
1887 /* Return a memory reference like MEMREF, but with its mode changed
1888 to MODE and its address changed to ADDR, which is assumed to be
1889 MEMREF offseted by OFFSET bytes. If VALIDATE is
1890 nonzero, the memory address is forced to be valid. */
1893 adjust_automodify_address_1 (memref
, mode
, addr
, offset
, validate
)
1895 enum machine_mode mode
;
1897 HOST_WIDE_INT offset
;
1900 memref
= change_address_1 (memref
, VOIDmode
, addr
, validate
);
1901 return adjust_address_1 (memref
, mode
, offset
, validate
, 0);
1904 /* Return a memory reference like MEMREF, but whose address is changed by
1905 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
1906 known to be in OFFSET (possibly 1). */
1909 offset_address (memref
, offset
, pow2
)
1914 rtx
new, addr
= XEXP (memref
, 0);
1916 new = simplify_gen_binary (PLUS
, Pmode
, addr
, offset
);
1918 /* At this point we don't know _why_ the address is invalid. It
1919 could have secondary memory refereces, multiplies or anything.
1921 However, if we did go and rearrange things, we can wind up not
1922 being able to recognize the magic around pic_offset_table_rtx.
1923 This stuff is fragile, and is yet another example of why it is
1924 bad to expose PIC machinery too early. */
1925 if (! memory_address_p (GET_MODE (memref
), new)
1926 && GET_CODE (addr
) == PLUS
1927 && XEXP (addr
, 0) == pic_offset_table_rtx
)
1929 addr
= force_reg (GET_MODE (addr
), addr
);
1930 new = simplify_gen_binary (PLUS
, Pmode
, addr
, offset
);
1933 update_temp_slot_address (XEXP (memref
, 0), new);
1934 new = change_address_1 (memref
, VOIDmode
, new, 1);
1936 /* Update the alignment to reflect the offset. Reset the offset, which
1939 = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
), 0, 0,
1940 MIN (MEM_ALIGN (memref
),
1941 (unsigned HOST_WIDE_INT
) pow2
* BITS_PER_UNIT
),
1946 /* Return a memory reference like MEMREF, but with its address changed to
1947 ADDR. The caller is asserting that the actual piece of memory pointed
1948 to is the same, just the form of the address is being changed, such as
1949 by putting something into a register. */
1952 replace_equiv_address (memref
, addr
)
1956 /* change_address_1 copies the memory attribute structure without change
1957 and that's exactly what we want here. */
1958 update_temp_slot_address (XEXP (memref
, 0), addr
);
1959 return change_address_1 (memref
, VOIDmode
, addr
, 1);
1962 /* Likewise, but the reference is not required to be valid. */
1965 replace_equiv_address_nv (memref
, addr
)
1969 return change_address_1 (memref
, VOIDmode
, addr
, 0);
1972 /* Return a memory reference like MEMREF, but with its mode widened to
1973 MODE and offset by OFFSET. This would be used by targets that e.g.
1974 cannot issue QImode memory operations and have to use SImode memory
1975 operations plus masking logic. */
1978 widen_memory_access (memref
, mode
, offset
)
1980 enum machine_mode mode
;
1981 HOST_WIDE_INT offset
;
1983 rtx
new = adjust_address_1 (memref
, mode
, offset
, 1, 1);
1984 tree expr
= MEM_EXPR (new);
1985 rtx memoffset
= MEM_OFFSET (new);
1986 unsigned int size
= GET_MODE_SIZE (mode
);
1988 /* If we don't know what offset we were at within the expression, then
1989 we can't know if we've overstepped the bounds. */
1990 if (! memoffset
&& offset
!= 0)
1995 if (TREE_CODE (expr
) == COMPONENT_REF
)
1997 tree field
= TREE_OPERAND (expr
, 1);
1999 if (! DECL_SIZE_UNIT (field
))
2005 /* Is the field at least as large as the access? If so, ok,
2006 otherwise strip back to the containing structure. */
2007 if (TREE_CODE (DECL_SIZE_UNIT (field
)) == INTEGER_CST
2008 && compare_tree_int (DECL_SIZE_UNIT (field
), size
) >= 0
2009 && INTVAL (memoffset
) >= 0)
2012 if (! host_integerp (DECL_FIELD_OFFSET (field
), 1))
2018 expr
= TREE_OPERAND (expr
, 0);
2019 memoffset
= (GEN_INT (INTVAL (memoffset
)
2020 + tree_low_cst (DECL_FIELD_OFFSET (field
), 1)
2021 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field
), 1)
2024 /* Similarly for the decl. */
2025 else if (DECL_P (expr
)
2026 && DECL_SIZE_UNIT (expr
)
2027 && compare_tree_int (DECL_SIZE_UNIT (expr
), size
) >= 0
2028 && (! memoffset
|| INTVAL (memoffset
) >= 0))
2032 /* The widened memory access overflows the expression, which means
2033 that it could alias another expression. Zap it. */
2040 memoffset
= NULL_RTX
;
2042 /* The widened memory may alias other stuff, so zap the alias set. */
2043 /* ??? Maybe use get_alias_set on any remaining expression. */
2045 MEM_ATTRS (new) = get_mem_attrs (0, expr
, memoffset
, GEN_INT (size
),
2046 MEM_ALIGN (new), mode
);
2051 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2058 label
= gen_rtx_CODE_LABEL (VOIDmode
, 0, NULL_RTX
,
2059 NULL_RTX
, label_num
++, NULL
, NULL
);
2061 LABEL_NUSES (label
) = 0;
2062 LABEL_ALTERNATE_NAME (label
) = NULL
;
2066 /* For procedure integration. */
2068 /* Install new pointers to the first and last insns in the chain.
2069 Also, set cur_insn_uid to one higher than the last in use.
2070 Used for an inline-procedure after copying the insn chain. */
2073 set_new_first_and_last_insn (first
, last
)
2082 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2083 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2088 /* Set the range of label numbers found in the current function.
2089 This is used when belatedly compiling an inline function. */
2092 set_new_first_and_last_label_num (first
, last
)
2095 base_label_num
= label_num
;
2096 first_label_num
= first
;
2097 last_label_num
= last
;
2100 /* Set the last label number found in the current function.
2101 This is used when belatedly compiling an inline function. */
2104 set_new_last_label_num (last
)
2107 base_label_num
= label_num
;
2108 last_label_num
= last
;
2111 /* Restore all variables describing the current status from the structure *P.
2112 This is used after a nested function. */
2115 restore_emit_status (p
)
2116 struct function
*p ATTRIBUTE_UNUSED
;
2119 clear_emit_caches ();
2122 /* Clear out all parts of the state in F that can safely be discarded
2123 after the function has been compiled, to let garbage collection
2124 reclaim the memory. */
2127 free_emit_status (f
)
2130 free (f
->emit
->x_regno_reg_rtx
);
2131 free (f
->emit
->regno_pointer_align
);
2132 free (f
->emit
->regno_decl
);
2137 /* Go through all the RTL insn bodies and copy any invalid shared
2138 structure. This routine should only be called once. */
2141 unshare_all_rtl (fndecl
, insn
)
2147 /* Make sure that virtual parameters are not shared. */
2148 for (decl
= DECL_ARGUMENTS (fndecl
); decl
; decl
= TREE_CHAIN (decl
))
2149 SET_DECL_RTL (decl
, copy_rtx_if_shared (DECL_RTL (decl
)));
2151 /* Make sure that virtual stack slots are not shared. */
2152 unshare_all_decls (DECL_INITIAL (fndecl
));
2154 /* Unshare just about everything else. */
2155 unshare_all_rtl_1 (insn
);
2157 /* Make sure the addresses of stack slots found outside the insn chain
2158 (such as, in DECL_RTL of a variable) are not shared
2159 with the insn chain.
2161 This special care is necessary when the stack slot MEM does not
2162 actually appear in the insn chain. If it does appear, its address
2163 is unshared from all else at that point. */
2164 stack_slot_list
= copy_rtx_if_shared (stack_slot_list
);
2167 /* Go through all the RTL insn bodies and copy any invalid shared
2168 structure, again. This is a fairly expensive thing to do so it
2169 should be done sparingly. */
2172 unshare_all_rtl_again (insn
)
2178 for (p
= insn
; p
; p
= NEXT_INSN (p
))
2181 reset_used_flags (PATTERN (p
));
2182 reset_used_flags (REG_NOTES (p
));
2183 reset_used_flags (LOG_LINKS (p
));
2186 /* Make sure that virtual stack slots are not shared. */
2187 reset_used_decls (DECL_INITIAL (cfun
->decl
));
2189 /* Make sure that virtual parameters are not shared. */
2190 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= TREE_CHAIN (decl
))
2191 reset_used_flags (DECL_RTL (decl
));
2193 reset_used_flags (stack_slot_list
);
2195 unshare_all_rtl (cfun
->decl
, insn
);
2198 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2199 Assumes the mark bits are cleared at entry. */
2202 unshare_all_rtl_1 (insn
)
2205 for (; insn
; insn
= NEXT_INSN (insn
))
2208 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
2209 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
2210 LOG_LINKS (insn
) = copy_rtx_if_shared (LOG_LINKS (insn
));
2214 /* Go through all virtual stack slots of a function and copy any
2215 shared structure. */
2217 unshare_all_decls (blk
)
2222 /* Copy shared decls. */
2223 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2224 if (DECL_RTL_SET_P (t
))
2225 SET_DECL_RTL (t
, copy_rtx_if_shared (DECL_RTL (t
)));
2227 /* Now process sub-blocks. */
2228 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
2229 unshare_all_decls (t
);
2232 /* Go through all virtual stack slots of a function and mark them as
2235 reset_used_decls (blk
)
2241 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2242 if (DECL_RTL_SET_P (t
))
2243 reset_used_flags (DECL_RTL (t
));
2245 /* Now process sub-blocks. */
2246 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
2247 reset_used_decls (t
);
2250 /* Similar to `copy_rtx' except that if MAY_SHARE is present, it is
2251 placed in the result directly, rather than being copied. MAY_SHARE is
2252 either a MEM of an EXPR_LIST of MEMs. */
2255 copy_most_rtx (orig
, may_share
)
2262 const char *format_ptr
;
2264 if (orig
== may_share
2265 || (GET_CODE (may_share
) == EXPR_LIST
2266 && in_expr_list_p (may_share
, orig
)))
2269 code
= GET_CODE (orig
);
2287 copy
= rtx_alloc (code
);
2288 PUT_MODE (copy
, GET_MODE (orig
));
2289 copy
->in_struct
= orig
->in_struct
;
2290 copy
->volatil
= orig
->volatil
;
2291 copy
->unchanging
= orig
->unchanging
;
2292 copy
->integrated
= orig
->integrated
;
2293 copy
->frame_related
= orig
->frame_related
;
2295 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
2297 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
2299 switch (*format_ptr
++)
2302 XEXP (copy
, i
) = XEXP (orig
, i
);
2303 if (XEXP (orig
, i
) != NULL
&& XEXP (orig
, i
) != may_share
)
2304 XEXP (copy
, i
) = copy_most_rtx (XEXP (orig
, i
), may_share
);
2308 XEXP (copy
, i
) = XEXP (orig
, i
);
2313 XVEC (copy
, i
) = XVEC (orig
, i
);
2314 if (XVEC (orig
, i
) != NULL
)
2316 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
2317 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
2318 XVECEXP (copy
, i
, j
)
2319 = copy_most_rtx (XVECEXP (orig
, i
, j
), may_share
);
2324 XWINT (copy
, i
) = XWINT (orig
, i
);
2329 XINT (copy
, i
) = XINT (orig
, i
);
2333 XTREE (copy
, i
) = XTREE (orig
, i
);
2338 XSTR (copy
, i
) = XSTR (orig
, i
);
2342 /* Copy this through the wide int field; that's safest. */
2343 X0WINT (copy
, i
) = X0WINT (orig
, i
);
2353 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2354 Recursively does the same for subexpressions. */
2357 copy_rtx_if_shared (orig
)
2363 const char *format_ptr
;
2369 code
= GET_CODE (x
);
2371 /* These types may be freely shared. */
2385 /* SCRATCH must be shared because they represent distinct values. */
2389 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2390 a LABEL_REF, it isn't sharable. */
2391 if (GET_CODE (XEXP (x
, 0)) == PLUS
2392 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
2393 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
2402 /* The chain of insns is not being copied. */
2406 /* A MEM is allowed to be shared if its address is constant.
2408 We used to allow sharing of MEMs which referenced
2409 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
2410 that can lose. instantiate_virtual_regs will not unshare
2411 the MEMs, and combine may change the structure of the address
2412 because it looks safe and profitable in one context, but
2413 in some other context it creates unrecognizable RTL. */
2414 if (CONSTANT_ADDRESS_P (XEXP (x
, 0)))
2423 /* This rtx may not be shared. If it has already been seen,
2424 replace it with a copy of itself. */
2430 copy
= rtx_alloc (code
);
2432 (sizeof (*copy
) - sizeof (copy
->fld
)
2433 + sizeof (copy
->fld
[0]) * GET_RTX_LENGTH (code
)));
2439 /* Now scan the subexpressions recursively.
2440 We can store any replaced subexpressions directly into X
2441 since we know X is not shared! Any vectors in X
2442 must be copied if X was copied. */
2444 format_ptr
= GET_RTX_FORMAT (code
);
2446 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2448 switch (*format_ptr
++)
2451 XEXP (x
, i
) = copy_rtx_if_shared (XEXP (x
, i
));
2455 if (XVEC (x
, i
) != NULL
)
2458 int len
= XVECLEN (x
, i
);
2460 if (copied
&& len
> 0)
2461 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
2462 for (j
= 0; j
< len
; j
++)
2463 XVECEXP (x
, i
, j
) = copy_rtx_if_shared (XVECEXP (x
, i
, j
));
2471 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2472 to look for shared sub-parts. */
2475 reset_used_flags (x
)
2480 const char *format_ptr
;
2485 code
= GET_CODE (x
);
2487 /* These types may be freely shared so we needn't do any resetting
2509 /* The chain of insns is not being copied. */
2518 format_ptr
= GET_RTX_FORMAT (code
);
2519 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2521 switch (*format_ptr
++)
2524 reset_used_flags (XEXP (x
, i
));
2528 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2529 reset_used_flags (XVECEXP (x
, i
, j
));
2535 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2536 Return X or the rtx for the pseudo reg the value of X was copied into.
2537 OTHER must be valid as a SET_DEST. */
2540 make_safe_from (x
, other
)
2544 switch (GET_CODE (other
))
2547 other
= SUBREG_REG (other
);
2549 case STRICT_LOW_PART
:
2552 other
= XEXP (other
, 0);
2558 if ((GET_CODE (other
) == MEM
2560 && GET_CODE (x
) != REG
2561 && GET_CODE (x
) != SUBREG
)
2562 || (GET_CODE (other
) == REG
2563 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
2564 || reg_mentioned_p (other
, x
))))
2566 rtx temp
= gen_reg_rtx (GET_MODE (x
));
2567 emit_move_insn (temp
, x
);
2573 /* Emission of insns (adding them to the doubly-linked list). */
2575 /* Return the first insn of the current sequence or current function. */
2583 /* Specify a new insn as the first in the chain. */
2586 set_first_insn (insn
)
2589 if (PREV_INSN (insn
) != 0)
2594 /* Return the last insn emitted in current sequence or current function. */
2602 /* Specify a new insn as the last in the chain. */
2605 set_last_insn (insn
)
2608 if (NEXT_INSN (insn
) != 0)
2613 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2616 get_last_insn_anywhere ()
2618 struct sequence_stack
*stack
;
2621 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
2622 if (stack
->last
!= 0)
2627 /* Return a number larger than any instruction's uid in this function. */
2632 return cur_insn_uid
;
2635 /* Renumber instructions so that no instruction UIDs are wasted. */
2638 renumber_insns (stream
)
2643 /* If we're not supposed to renumber instructions, don't. */
2644 if (!flag_renumber_insns
)
2647 /* If there aren't that many instructions, then it's not really
2648 worth renumbering them. */
2649 if (flag_renumber_insns
== 1 && get_max_uid () < 25000)
2654 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
2657 fprintf (stream
, "Renumbering insn %d to %d\n",
2658 INSN_UID (insn
), cur_insn_uid
);
2659 INSN_UID (insn
) = cur_insn_uid
++;
2663 /* Return the next insn. If it is a SEQUENCE, return the first insn
2672 insn
= NEXT_INSN (insn
);
2673 if (insn
&& GET_CODE (insn
) == INSN
2674 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2675 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2681 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2685 previous_insn (insn
)
2690 insn
= PREV_INSN (insn
);
2691 if (insn
&& GET_CODE (insn
) == INSN
2692 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2693 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
2699 /* Return the next insn after INSN that is not a NOTE. This routine does not
2700 look inside SEQUENCEs. */
2703 next_nonnote_insn (insn
)
2708 insn
= NEXT_INSN (insn
);
2709 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2716 /* Return the previous insn before INSN that is not a NOTE. This routine does
2717 not look inside SEQUENCEs. */
2720 prev_nonnote_insn (insn
)
2725 insn
= PREV_INSN (insn
);
2726 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2733 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2734 or 0, if there is none. This routine does not look inside
2738 next_real_insn (insn
)
2743 insn
= NEXT_INSN (insn
);
2744 if (insn
== 0 || GET_CODE (insn
) == INSN
2745 || GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
)
2752 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2753 or 0, if there is none. This routine does not look inside
2757 prev_real_insn (insn
)
2762 insn
= PREV_INSN (insn
);
2763 if (insn
== 0 || GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
2764 || GET_CODE (insn
) == JUMP_INSN
)
2771 /* Find the next insn after INSN that really does something. This routine
2772 does not look inside SEQUENCEs. Until reload has completed, this is the
2773 same as next_real_insn. */
2776 active_insn_p (insn
)
2779 return (GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
2780 || (GET_CODE (insn
) == INSN
2781 && (! reload_completed
2782 || (GET_CODE (PATTERN (insn
)) != USE
2783 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
2787 next_active_insn (insn
)
2792 insn
= NEXT_INSN (insn
);
2793 if (insn
== 0 || active_insn_p (insn
))
2800 /* Find the last insn before INSN that really does something. This routine
2801 does not look inside SEQUENCEs. Until reload has completed, this is the
2802 same as prev_real_insn. */
2805 prev_active_insn (insn
)
2810 insn
= PREV_INSN (insn
);
2811 if (insn
== 0 || active_insn_p (insn
))
2818 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2826 insn
= NEXT_INSN (insn
);
2827 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
2834 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2842 insn
= PREV_INSN (insn
);
2843 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
2851 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2852 and REG_CC_USER notes so we can find it. */
2855 link_cc0_insns (insn
)
2858 rtx user
= next_nonnote_insn (insn
);
2860 if (GET_CODE (user
) == INSN
&& GET_CODE (PATTERN (user
)) == SEQUENCE
)
2861 user
= XVECEXP (PATTERN (user
), 0, 0);
2863 REG_NOTES (user
) = gen_rtx_INSN_LIST (REG_CC_SETTER
, insn
,
2865 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_CC_USER
, user
, REG_NOTES (insn
));
2868 /* Return the next insn that uses CC0 after INSN, which is assumed to
2869 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2870 applied to the result of this function should yield INSN).
2872 Normally, this is simply the next insn. However, if a REG_CC_USER note
2873 is present, it contains the insn that uses CC0.
2875 Return 0 if we can't find the insn. */
2878 next_cc0_user (insn
)
2881 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
2884 return XEXP (note
, 0);
2886 insn
= next_nonnote_insn (insn
);
2887 if (insn
&& GET_CODE (insn
) == INSN
&& GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2888 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2890 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
2896 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2897 note, it is the previous insn. */
2900 prev_cc0_setter (insn
)
2903 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
2906 return XEXP (note
, 0);
2908 insn
= prev_nonnote_insn (insn
);
2909 if (! sets_cc0_p (PATTERN (insn
)))
2916 /* Increment the label uses for all labels present in rtx. */
2926 code
= GET_CODE (x
);
2927 if (code
== LABEL_REF
)
2928 LABEL_NUSES (XEXP (x
, 0))++;
2930 fmt
= GET_RTX_FORMAT (code
);
2931 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2934 mark_label_nuses (XEXP (x
, i
));
2935 else if (fmt
[i
] == 'E')
2936 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
2937 mark_label_nuses (XVECEXP (x
, i
, j
));
2942 /* Try splitting insns that can be split for better scheduling.
2943 PAT is the pattern which might split.
2944 TRIAL is the insn providing PAT.
2945 LAST is non-zero if we should return the last insn of the sequence produced.
2947 If this routine succeeds in splitting, it returns the first or last
2948 replacement insn depending on the value of LAST. Otherwise, it
2949 returns TRIAL. If the insn to be returned can be split, it will be. */
2952 try_split (pat
, trial
, last
)
2956 rtx before
= PREV_INSN (trial
);
2957 rtx after
= NEXT_INSN (trial
);
2958 int has_barrier
= 0;
2963 if (any_condjump_p (trial
)
2964 && (note
= find_reg_note (trial
, REG_BR_PROB
, 0)))
2965 split_branch_probability
= INTVAL (XEXP (note
, 0));
2966 probability
= split_branch_probability
;
2968 seq
= split_insns (pat
, trial
);
2970 split_branch_probability
= -1;
2972 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2973 We may need to handle this specially. */
2974 if (after
&& GET_CODE (after
) == BARRIER
)
2977 after
= NEXT_INSN (after
);
2982 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2983 The latter case will normally arise only when being done so that
2984 it, in turn, will be split (SFmode on the 29k is an example). */
2985 if (GET_CODE (seq
) == SEQUENCE
)
2989 /* Avoid infinite loop if any insn of the result matches
2990 the original pattern. */
2991 for (i
= 0; i
< XVECLEN (seq
, 0); i
++)
2992 if (GET_CODE (XVECEXP (seq
, 0, i
)) == INSN
2993 && rtx_equal_p (PATTERN (XVECEXP (seq
, 0, i
)), pat
))
2997 for (i
= XVECLEN (seq
, 0) - 1; i
>= 0; i
--)
2998 if (GET_CODE (XVECEXP (seq
, 0, i
)) == JUMP_INSN
)
3000 rtx insn
= XVECEXP (seq
, 0, i
);
3001 mark_jump_label (PATTERN (insn
),
3002 XVECEXP (seq
, 0, i
), 0);
3004 if (probability
!= -1
3005 && any_condjump_p (insn
)
3006 && !find_reg_note (insn
, REG_BR_PROB
, 0))
3008 /* We can preserve the REG_BR_PROB notes only if exactly
3009 one jump is created, otherwise the machine description
3010 is responsible for this step using
3011 split_branch_probability variable. */
3015 = gen_rtx_EXPR_LIST (REG_BR_PROB
,
3016 GEN_INT (probability
),
3021 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3022 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3023 if (GET_CODE (trial
) == CALL_INSN
)
3024 for (i
= XVECLEN (seq
, 0) - 1; i
>= 0; i
--)
3025 if (GET_CODE (XVECEXP (seq
, 0, i
)) == CALL_INSN
)
3026 CALL_INSN_FUNCTION_USAGE (XVECEXP (seq
, 0, i
))
3027 = CALL_INSN_FUNCTION_USAGE (trial
);
3029 /* Copy notes, particularly those related to the CFG. */
3030 for (note
= REG_NOTES (trial
); note
; note
= XEXP (note
, 1))
3032 switch (REG_NOTE_KIND (note
))
3035 for (i
= XVECLEN (seq
, 0) - 1; i
>= 0; i
--)
3037 rtx insn
= XVECEXP (seq
, 0, i
);
3038 if (GET_CODE (insn
) == CALL_INSN
3039 || (flag_non_call_exceptions
3040 && may_trap_p (PATTERN (insn
))))
3042 = gen_rtx_EXPR_LIST (REG_EH_REGION
,
3050 case REG_ALWAYS_RETURN
:
3051 for (i
= XVECLEN (seq
, 0) - 1; i
>= 0; i
--)
3053 rtx insn
= XVECEXP (seq
, 0, i
);
3054 if (GET_CODE (insn
) == CALL_INSN
)
3056 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
3062 case REG_NON_LOCAL_GOTO
:
3063 for (i
= XVECLEN (seq
, 0) - 1; i
>= 0; i
--)
3065 rtx insn
= XVECEXP (seq
, 0, i
);
3066 if (GET_CODE (insn
) == JUMP_INSN
)
3068 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
3079 /* If there are LABELS inside the split insns increment the
3080 usage count so we don't delete the label. */
3081 if (GET_CODE (trial
) == INSN
)
3082 for (i
= XVECLEN (seq
, 0) - 1; i
>= 0; i
--)
3083 if (GET_CODE (XVECEXP (seq
, 0, i
)) == INSN
)
3084 mark_label_nuses (PATTERN (XVECEXP (seq
, 0, i
)));
3086 tem
= emit_insn_after (seq
, trial
);
3088 delete_insn (trial
);
3090 emit_barrier_after (tem
);
3092 /* Recursively call try_split for each new insn created; by the
3093 time control returns here that insn will be fully split, so
3094 set LAST and continue from the insn after the one returned.
3095 We can't use next_active_insn here since AFTER may be a note.
3096 Ignore deleted insns, which can be occur if not optimizing. */
3097 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
3098 if (! INSN_DELETED_P (tem
) && INSN_P (tem
))
3099 tem
= try_split (PATTERN (tem
), tem
, 1);
3101 /* Avoid infinite loop if the result matches the original pattern. */
3102 else if (rtx_equal_p (seq
, pat
))
3106 PATTERN (trial
) = seq
;
3107 INSN_CODE (trial
) = -1;
3108 try_split (seq
, trial
, last
);
3111 /* Return either the first or the last insn, depending on which was
3114 ? (after
? PREV_INSN (after
) : last_insn
)
3115 : NEXT_INSN (before
);
3121 /* Make and return an INSN rtx, initializing all its slots.
3122 Store PATTERN in the pattern slots. */
3125 make_insn_raw (pattern
)
3130 insn
= rtx_alloc (INSN
);
3132 INSN_UID (insn
) = cur_insn_uid
++;
3133 PATTERN (insn
) = pattern
;
3134 INSN_CODE (insn
) = -1;
3135 LOG_LINKS (insn
) = NULL
;
3136 REG_NOTES (insn
) = NULL
;
3138 #ifdef ENABLE_RTL_CHECKING
3141 && (returnjump_p (insn
)
3142 || (GET_CODE (insn
) == SET
3143 && SET_DEST (insn
) == pc_rtx
)))
3145 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3153 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
3156 make_jump_insn_raw (pattern
)
3161 insn
= rtx_alloc (JUMP_INSN
);
3162 INSN_UID (insn
) = cur_insn_uid
++;
3164 PATTERN (insn
) = pattern
;
3165 INSN_CODE (insn
) = -1;
3166 LOG_LINKS (insn
) = NULL
;
3167 REG_NOTES (insn
) = NULL
;
3168 JUMP_LABEL (insn
) = NULL
;
3173 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
3176 make_call_insn_raw (pattern
)
3181 insn
= rtx_alloc (CALL_INSN
);
3182 INSN_UID (insn
) = cur_insn_uid
++;
3184 PATTERN (insn
) = pattern
;
3185 INSN_CODE (insn
) = -1;
3186 LOG_LINKS (insn
) = NULL
;
3187 REG_NOTES (insn
) = NULL
;
3188 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
3193 /* Add INSN to the end of the doubly-linked list.
3194 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3200 PREV_INSN (insn
) = last_insn
;
3201 NEXT_INSN (insn
) = 0;
3203 if (NULL
!= last_insn
)
3204 NEXT_INSN (last_insn
) = insn
;
3206 if (NULL
== first_insn
)
3212 /* Add INSN into the doubly-linked list after insn AFTER. This and
3213 the next should be the only functions called to insert an insn once
3214 delay slots have been filled since only they know how to update a
3218 add_insn_after (insn
, after
)
3221 rtx next
= NEXT_INSN (after
);
3224 if (optimize
&& INSN_DELETED_P (after
))
3227 NEXT_INSN (insn
) = next
;
3228 PREV_INSN (insn
) = after
;
3232 PREV_INSN (next
) = insn
;
3233 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
3234 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
3236 else if (last_insn
== after
)
3240 struct sequence_stack
*stack
= seq_stack
;
3241 /* Scan all pending sequences too. */
3242 for (; stack
; stack
= stack
->next
)
3243 if (after
== stack
->last
)
3253 if (basic_block_for_insn
3254 && (unsigned int) INSN_UID (after
) < basic_block_for_insn
->num_elements
3255 && (bb
= BLOCK_FOR_INSN (after
)))
3257 set_block_for_insn (insn
, bb
);
3259 bb
->flags
|= BB_DIRTY
;
3260 /* Should not happen as first in the BB is always
3261 either NOTE or LABEL. */
3262 if (bb
->end
== after
3263 /* Avoid clobbering of structure when creating new BB. */
3264 && GET_CODE (insn
) != BARRIER
3265 && (GET_CODE (insn
) != NOTE
3266 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_BASIC_BLOCK
))
3270 NEXT_INSN (after
) = insn
;
3271 if (GET_CODE (after
) == INSN
&& GET_CODE (PATTERN (after
)) == SEQUENCE
)
3273 rtx sequence
= PATTERN (after
);
3274 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3278 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3279 the previous should be the only functions called to insert an insn once
3280 delay slots have been filled since only they know how to update a
3284 add_insn_before (insn
, before
)
3287 rtx prev
= PREV_INSN (before
);
3290 if (optimize
&& INSN_DELETED_P (before
))
3293 PREV_INSN (insn
) = prev
;
3294 NEXT_INSN (insn
) = before
;
3298 NEXT_INSN (prev
) = insn
;
3299 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3301 rtx sequence
= PATTERN (prev
);
3302 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3305 else if (first_insn
== before
)
3309 struct sequence_stack
*stack
= seq_stack
;
3310 /* Scan all pending sequences too. */
3311 for (; stack
; stack
= stack
->next
)
3312 if (before
== stack
->first
)
3314 stack
->first
= insn
;
3322 if (basic_block_for_insn
3323 && (unsigned int) INSN_UID (before
) < basic_block_for_insn
->num_elements
3324 && (bb
= BLOCK_FOR_INSN (before
)))
3326 set_block_for_insn (insn
, bb
);
3328 bb
->flags
|= BB_DIRTY
;
3329 /* Should not happen as first in the BB is always
3330 either NOTE or LABEl. */
3331 if (bb
->head
== insn
3332 /* Avoid clobbering of structure when creating new BB. */
3333 && GET_CODE (insn
) != BARRIER
3334 && (GET_CODE (insn
) != NOTE
3335 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_BASIC_BLOCK
))
3339 PREV_INSN (before
) = insn
;
3340 if (GET_CODE (before
) == INSN
&& GET_CODE (PATTERN (before
)) == SEQUENCE
)
3341 PREV_INSN (XVECEXP (PATTERN (before
), 0, 0)) = insn
;
3344 /* Remove an insn from its doubly-linked list. This function knows how
3345 to handle sequences. */
3350 rtx next
= NEXT_INSN (insn
);
3351 rtx prev
= PREV_INSN (insn
);
3356 NEXT_INSN (prev
) = next
;
3357 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3359 rtx sequence
= PATTERN (prev
);
3360 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
3363 else if (first_insn
== insn
)
3367 struct sequence_stack
*stack
= seq_stack
;
3368 /* Scan all pending sequences too. */
3369 for (; stack
; stack
= stack
->next
)
3370 if (insn
== stack
->first
)
3372 stack
->first
= next
;
3382 PREV_INSN (next
) = prev
;
3383 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
3384 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = prev
;
3386 else if (last_insn
== insn
)
3390 struct sequence_stack
*stack
= seq_stack
;
3391 /* Scan all pending sequences too. */
3392 for (; stack
; stack
= stack
->next
)
3393 if (insn
== stack
->last
)
3402 if (basic_block_for_insn
3403 && (unsigned int) INSN_UID (insn
) < basic_block_for_insn
->num_elements
3404 && (bb
= BLOCK_FOR_INSN (insn
)))
3407 bb
->flags
|= BB_DIRTY
;
3408 if (bb
->head
== insn
)
3410 /* Never ever delete the basic block note without deleting whole
3412 if (GET_CODE (insn
) == NOTE
)
3416 if (bb
->end
== insn
)
3421 /* Delete all insns made since FROM.
3422 FROM becomes the new last instruction. */
3425 delete_insns_since (from
)
3431 NEXT_INSN (from
) = 0;
3435 /* This function is deprecated, please use sequences instead.
3437 Move a consecutive bunch of insns to a different place in the chain.
3438 The insns to be moved are those between FROM and TO.
3439 They are moved to a new position after the insn AFTER.
3440 AFTER must not be FROM or TO or any insn in between.
3442 This function does not know about SEQUENCEs and hence should not be
3443 called after delay-slot filling has been done. */
3446 reorder_insns_nobb (from
, to
, after
)
3447 rtx from
, to
, after
;
3449 /* Splice this bunch out of where it is now. */
3450 if (PREV_INSN (from
))
3451 NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
3453 PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
3454 if (last_insn
== to
)
3455 last_insn
= PREV_INSN (from
);
3456 if (first_insn
== from
)
3457 first_insn
= NEXT_INSN (to
);
3459 /* Make the new neighbors point to it and it to them. */
3460 if (NEXT_INSN (after
))
3461 PREV_INSN (NEXT_INSN (after
)) = to
;
3463 NEXT_INSN (to
) = NEXT_INSN (after
);
3464 PREV_INSN (from
) = after
;
3465 NEXT_INSN (after
) = from
;
3466 if (after
== last_insn
)
3470 /* Same as function above, but take care to update BB boundaries. */
3472 reorder_insns (from
, to
, after
)
3473 rtx from
, to
, after
;
3475 rtx prev
= PREV_INSN (from
);
3476 basic_block bb
, bb2
;
3478 reorder_insns_nobb (from
, to
, after
);
3480 if (basic_block_for_insn
3481 && (unsigned int) INSN_UID (after
) < basic_block_for_insn
->num_elements
3482 && (bb
= BLOCK_FOR_INSN (after
)))
3485 bb
->flags
|= BB_DIRTY
;
3487 if (basic_block_for_insn
3488 && ((unsigned int) INSN_UID (from
)
3489 < basic_block_for_insn
->num_elements
)
3490 && (bb2
= BLOCK_FOR_INSN (from
)))
3494 bb2
->flags
|= BB_DIRTY
;
3497 if (bb
->end
== after
)
3500 for (x
= from
; x
!= NEXT_INSN (to
); x
= NEXT_INSN (x
))
3501 set_block_for_insn (x
, bb
);
3505 /* Return the line note insn preceding INSN. */
3508 find_line_note (insn
)
3511 if (no_line_numbers
)
3514 for (; insn
; insn
= PREV_INSN (insn
))
3515 if (GET_CODE (insn
) == NOTE
3516 && NOTE_LINE_NUMBER (insn
) >= 0)
3522 /* Like reorder_insns, but inserts line notes to preserve the line numbers
3523 of the moved insns when debugging. This may insert a note between AFTER
3524 and FROM, and another one after TO. */
3527 reorder_insns_with_line_notes (from
, to
, after
)
3528 rtx from
, to
, after
;
3530 rtx from_line
= find_line_note (from
);
3531 rtx after_line
= find_line_note (after
);
3533 reorder_insns (from
, to
, after
);
3535 if (from_line
== after_line
)
3539 emit_line_note_after (NOTE_SOURCE_FILE (from_line
),
3540 NOTE_LINE_NUMBER (from_line
),
3543 emit_line_note_after (NOTE_SOURCE_FILE (after_line
),
3544 NOTE_LINE_NUMBER (after_line
),
3548 /* Remove unnecessary notes from the instruction stream. */
3551 remove_unnecessary_notes ()
3553 rtx block_stack
= NULL_RTX
;
3554 rtx eh_stack
= NULL_RTX
;
3559 /* We must not remove the first instruction in the function because
3560 the compiler depends on the first instruction being a note. */
3561 for (insn
= NEXT_INSN (get_insns ()); insn
; insn
= next
)
3563 /* Remember what's next. */
3564 next
= NEXT_INSN (insn
);
3566 /* We're only interested in notes. */
3567 if (GET_CODE (insn
) != NOTE
)
3570 switch (NOTE_LINE_NUMBER (insn
))
3572 case NOTE_INSN_DELETED
:
3573 case NOTE_INSN_LOOP_END_TOP_COND
:
3577 case NOTE_INSN_EH_REGION_BEG
:
3578 eh_stack
= alloc_INSN_LIST (insn
, eh_stack
);
3581 case NOTE_INSN_EH_REGION_END
:
3582 /* Too many end notes. */
3583 if (eh_stack
== NULL_RTX
)
3585 /* Mismatched nesting. */
3586 if (NOTE_EH_HANDLER (XEXP (eh_stack
, 0)) != NOTE_EH_HANDLER (insn
))
3589 eh_stack
= XEXP (eh_stack
, 1);
3590 free_INSN_LIST_node (tmp
);
3593 case NOTE_INSN_BLOCK_BEG
:
3594 /* By now, all notes indicating lexical blocks should have
3595 NOTE_BLOCK filled in. */
3596 if (NOTE_BLOCK (insn
) == NULL_TREE
)
3598 block_stack
= alloc_INSN_LIST (insn
, block_stack
);
3601 case NOTE_INSN_BLOCK_END
:
3602 /* Too many end notes. */
3603 if (block_stack
== NULL_RTX
)
3605 /* Mismatched nesting. */
3606 if (NOTE_BLOCK (XEXP (block_stack
, 0)) != NOTE_BLOCK (insn
))
3609 block_stack
= XEXP (block_stack
, 1);
3610 free_INSN_LIST_node (tmp
);
3612 /* Scan back to see if there are any non-note instructions
3613 between INSN and the beginning of this block. If not,
3614 then there is no PC range in the generated code that will
3615 actually be in this block, so there's no point in
3616 remembering the existence of the block. */
3617 for (tmp
= PREV_INSN (insn
); tmp
; tmp
= PREV_INSN (tmp
))
3619 /* This block contains a real instruction. Note that we
3620 don't include labels; if the only thing in the block
3621 is a label, then there are still no PC values that
3622 lie within the block. */
3626 /* We're only interested in NOTEs. */
3627 if (GET_CODE (tmp
) != NOTE
)
3630 if (NOTE_LINE_NUMBER (tmp
) == NOTE_INSN_BLOCK_BEG
)
3632 /* We just verified that this BLOCK matches us with
3633 the block_stack check above. Never delete the
3634 BLOCK for the outermost scope of the function; we
3635 can refer to names from that scope even if the
3636 block notes are messed up. */
3637 if (! is_body_block (NOTE_BLOCK (insn
))
3638 && (*debug_hooks
->ignore_block
) (NOTE_BLOCK (insn
)))
3645 else if (NOTE_LINE_NUMBER (tmp
) == NOTE_INSN_BLOCK_END
)
3646 /* There's a nested block. We need to leave the
3647 current block in place since otherwise the debugger
3648 wouldn't be able to show symbols from our block in
3649 the nested block. */
3655 /* Too many begin notes. */
3656 if (block_stack
|| eh_stack
)
3661 /* Emit an insn of given code and pattern
3662 at a specified place within the doubly-linked list. */
3664 /* Make an instruction with body PATTERN
3665 and output it before the instruction BEFORE. */
3668 emit_insn_before (pattern
, before
)
3669 rtx pattern
, before
;
3673 if (GET_CODE (pattern
) == SEQUENCE
)
3677 for (i
= 0; i
< XVECLEN (pattern
, 0); i
++)
3679 insn
= XVECEXP (pattern
, 0, i
);
3680 add_insn_before (insn
, before
);
3685 insn
= make_insn_raw (pattern
);
3686 add_insn_before (insn
, before
);
3692 /* Make an instruction with body PATTERN and code JUMP_INSN
3693 and output it before the instruction BEFORE. */
3696 emit_jump_insn_before (pattern
, before
)
3697 rtx pattern
, before
;
3701 if (GET_CODE (pattern
) == SEQUENCE
)
3702 insn
= emit_insn_before (pattern
, before
);
3705 insn
= make_jump_insn_raw (pattern
);
3706 add_insn_before (insn
, before
);
3712 /* Make an instruction with body PATTERN and code CALL_INSN
3713 and output it before the instruction BEFORE. */
3716 emit_call_insn_before (pattern
, before
)
3717 rtx pattern
, before
;
3721 if (GET_CODE (pattern
) == SEQUENCE
)
3722 insn
= emit_insn_before (pattern
, before
);
3725 insn
= make_call_insn_raw (pattern
);
3726 add_insn_before (insn
, before
);
3727 PUT_CODE (insn
, CALL_INSN
);
3733 /* Make an insn of code BARRIER
3734 and output it before the insn BEFORE. */
3737 emit_barrier_before (before
)
3740 rtx insn
= rtx_alloc (BARRIER
);
3742 INSN_UID (insn
) = cur_insn_uid
++;
3744 add_insn_before (insn
, before
);
3748 /* Emit the label LABEL before the insn BEFORE. */
3751 emit_label_before (label
, before
)
3754 /* This can be called twice for the same label as a result of the
3755 confusion that follows a syntax error! So make it harmless. */
3756 if (INSN_UID (label
) == 0)
3758 INSN_UID (label
) = cur_insn_uid
++;
3759 add_insn_before (label
, before
);
3765 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
3768 emit_note_before (subtype
, before
)
3772 rtx note
= rtx_alloc (NOTE
);
3773 INSN_UID (note
) = cur_insn_uid
++;
3774 NOTE_SOURCE_FILE (note
) = 0;
3775 NOTE_LINE_NUMBER (note
) = subtype
;
3777 add_insn_before (note
, before
);
3781 /* Make an insn of code INSN with body PATTERN
3782 and output it after the insn AFTER. */
3785 emit_insn_after (pattern
, after
)
3790 if (GET_CODE (pattern
) == SEQUENCE
)
3794 for (i
= 0; i
< XVECLEN (pattern
, 0); i
++)
3796 insn
= XVECEXP (pattern
, 0, i
);
3797 add_insn_after (insn
, after
);
3803 insn
= make_insn_raw (pattern
);
3804 add_insn_after (insn
, after
);
3810 /* Similar to emit_insn_after, except that line notes are to be inserted so
3811 as to act as if this insn were at FROM. */
3814 emit_insn_after_with_line_notes (pattern
, after
, from
)
3815 rtx pattern
, after
, from
;
3817 rtx from_line
= find_line_note (from
);
3818 rtx after_line
= find_line_note (after
);
3819 rtx insn
= emit_insn_after (pattern
, after
);
3822 emit_line_note_after (NOTE_SOURCE_FILE (from_line
),
3823 NOTE_LINE_NUMBER (from_line
),
3827 emit_line_note_after (NOTE_SOURCE_FILE (after_line
),
3828 NOTE_LINE_NUMBER (after_line
),
3832 /* Make an insn of code JUMP_INSN with body PATTERN
3833 and output it after the insn AFTER. */
3836 emit_jump_insn_after (pattern
, after
)
3841 if (GET_CODE (pattern
) == SEQUENCE
)
3842 insn
= emit_insn_after (pattern
, after
);
3845 insn
= make_jump_insn_raw (pattern
);
3846 add_insn_after (insn
, after
);
3852 /* Make an insn of code BARRIER
3853 and output it after the insn AFTER. */
3856 emit_barrier_after (after
)
3859 rtx insn
= rtx_alloc (BARRIER
);
3861 INSN_UID (insn
) = cur_insn_uid
++;
3863 add_insn_after (insn
, after
);
3867 /* Emit the label LABEL after the insn AFTER. */
3870 emit_label_after (label
, after
)
3873 /* This can be called twice for the same label
3874 as a result of the confusion that follows a syntax error!
3875 So make it harmless. */
3876 if (INSN_UID (label
) == 0)
3878 INSN_UID (label
) = cur_insn_uid
++;
3879 add_insn_after (label
, after
);
3885 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
3888 emit_note_after (subtype
, after
)
3892 rtx note
= rtx_alloc (NOTE
);
3893 INSN_UID (note
) = cur_insn_uid
++;
3894 NOTE_SOURCE_FILE (note
) = 0;
3895 NOTE_LINE_NUMBER (note
) = subtype
;
3896 add_insn_after (note
, after
);
3900 /* Emit a line note for FILE and LINE after the insn AFTER. */
3903 emit_line_note_after (file
, line
, after
)
3910 if (no_line_numbers
&& line
> 0)
3916 note
= rtx_alloc (NOTE
);
3917 INSN_UID (note
) = cur_insn_uid
++;
3918 NOTE_SOURCE_FILE (note
) = file
;
3919 NOTE_LINE_NUMBER (note
) = line
;
3920 add_insn_after (note
, after
);
3924 /* Make an insn of code INSN with pattern PATTERN
3925 and add it to the end of the doubly-linked list.
3926 If PATTERN is a SEQUENCE, take the elements of it
3927 and emit an insn for each element.
3929 Returns the last insn emitted. */
3935 rtx insn
= last_insn
;
3937 if (GET_CODE (pattern
) == SEQUENCE
)
3941 for (i
= 0; i
< XVECLEN (pattern
, 0); i
++)
3943 insn
= XVECEXP (pattern
, 0, i
);
3949 insn
= make_insn_raw (pattern
);
3956 /* Emit the insns in a chain starting with INSN.
3957 Return the last insn emitted. */
3967 rtx next
= NEXT_INSN (insn
);
3976 /* Emit the insns in a chain starting with INSN and place them in front of
3977 the insn BEFORE. Return the last insn emitted. */
3980 emit_insns_before (insn
, before
)
3988 rtx next
= NEXT_INSN (insn
);
3989 add_insn_before (insn
, before
);
3997 /* Emit the insns in a chain starting with FIRST and place them in back of
3998 the insn AFTER. Return the last insn emitted. */
4001 emit_insns_after (first
, after
)
4015 if (basic_block_for_insn
4016 && (unsigned int) INSN_UID (after
) < basic_block_for_insn
->num_elements
4017 && (bb
= BLOCK_FOR_INSN (after
)))
4019 bb
->flags
|= BB_DIRTY
;
4020 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4021 set_block_for_insn (last
, bb
);
4022 set_block_for_insn (last
, bb
);
4023 if (bb
->end
== after
)
4027 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4030 after_after
= NEXT_INSN (after
);
4032 NEXT_INSN (after
) = first
;
4033 PREV_INSN (first
) = after
;
4034 NEXT_INSN (last
) = after_after
;
4036 PREV_INSN (after_after
) = last
;
4038 if (after
== last_insn
)
4043 /* Make an insn of code JUMP_INSN with pattern PATTERN
4044 and add it to the end of the doubly-linked list. */
4047 emit_jump_insn (pattern
)
4050 if (GET_CODE (pattern
) == SEQUENCE
)
4051 return emit_insn (pattern
);
4054 rtx insn
= make_jump_insn_raw (pattern
);
4060 /* Make an insn of code CALL_INSN with pattern PATTERN
4061 and add it to the end of the doubly-linked list. */
4064 emit_call_insn (pattern
)
4067 if (GET_CODE (pattern
) == SEQUENCE
)
4068 return emit_insn (pattern
);
4071 rtx insn
= make_call_insn_raw (pattern
);
4073 PUT_CODE (insn
, CALL_INSN
);
4078 /* Add the label LABEL to the end of the doubly-linked list. */
4084 /* This can be called twice for the same label
4085 as a result of the confusion that follows a syntax error!
4086 So make it harmless. */
4087 if (INSN_UID (label
) == 0)
4089 INSN_UID (label
) = cur_insn_uid
++;
4095 /* Make an insn of code BARRIER
4096 and add it to the end of the doubly-linked list. */
4101 rtx barrier
= rtx_alloc (BARRIER
);
4102 INSN_UID (barrier
) = cur_insn_uid
++;
4107 /* Make an insn of code NOTE
4108 with data-fields specified by FILE and LINE
4109 and add it to the end of the doubly-linked list,
4110 but only if line-numbers are desired for debugging info. */
4113 emit_line_note (file
, line
)
4117 set_file_and_line_for_stmt (file
, line
);
4120 if (no_line_numbers
)
4124 return emit_note (file
, line
);
4127 /* Make an insn of code NOTE
4128 with data-fields specified by FILE and LINE
4129 and add it to the end of the doubly-linked list.
4130 If it is a line-number NOTE, omit it if it matches the previous one. */
4133 emit_note (file
, line
)
4141 if (file
&& last_filename
&& !strcmp (file
, last_filename
)
4142 && line
== last_linenum
)
4144 last_filename
= file
;
4145 last_linenum
= line
;
4148 if (no_line_numbers
&& line
> 0)
4154 note
= rtx_alloc (NOTE
);
4155 INSN_UID (note
) = cur_insn_uid
++;
4156 NOTE_SOURCE_FILE (note
) = file
;
4157 NOTE_LINE_NUMBER (note
) = line
;
4162 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
4165 emit_line_note_force (file
, line
)
4170 return emit_line_note (file
, line
);
4173 /* Cause next statement to emit a line note even if the line number
4174 has not changed. This is used at the beginning of a function. */
4177 force_next_line_note ()
4182 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4183 note of this type already exists, remove it first. */
4186 set_unique_reg_note (insn
, kind
, datum
)
4191 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
4197 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4198 has multiple sets (some callers assume single_set
4199 means the insn only has one set, when in fact it
4200 means the insn only has one * useful * set). */
4201 if (GET_CODE (PATTERN (insn
)) == PARALLEL
&& multiple_sets (insn
))
4208 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4209 It serves no useful purpose and breaks eliminate_regs. */
4210 if (GET_CODE (datum
) == ASM_OPERANDS
)
4220 XEXP (note
, 0) = datum
;
4224 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (kind
, datum
, REG_NOTES (insn
));
4225 return REG_NOTES (insn
);
4228 /* Return an indication of which type of insn should have X as a body.
4229 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4235 if (GET_CODE (x
) == CODE_LABEL
)
4237 if (GET_CODE (x
) == CALL
)
4239 if (GET_CODE (x
) == RETURN
)
4241 if (GET_CODE (x
) == SET
)
4243 if (SET_DEST (x
) == pc_rtx
)
4245 else if (GET_CODE (SET_SRC (x
)) == CALL
)
4250 if (GET_CODE (x
) == PARALLEL
)
4253 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
4254 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
4256 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
4257 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
4259 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
4260 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
4266 /* Emit the rtl pattern X as an appropriate kind of insn.
4267 If X is a label, it is simply added into the insn chain. */
4273 enum rtx_code code
= classify_insn (x
);
4275 if (code
== CODE_LABEL
)
4276 return emit_label (x
);
4277 else if (code
== INSN
)
4278 return emit_insn (x
);
4279 else if (code
== JUMP_INSN
)
4281 rtx insn
= emit_jump_insn (x
);
4282 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
4283 return emit_barrier ();
4286 else if (code
== CALL_INSN
)
4287 return emit_call_insn (x
);
4292 /* Begin emitting insns to a sequence which can be packaged in an
4293 RTL_EXPR. If this sequence will contain something that might cause
4294 the compiler to pop arguments to function calls (because those
4295 pops have previously been deferred; see INHIBIT_DEFER_POP for more
4296 details), use do_pending_stack_adjust before calling this function.
4297 That will ensure that the deferred pops are not accidentally
4298 emitted in the middle of this sequence. */
4303 struct sequence_stack
*tem
;
4305 tem
= (struct sequence_stack
*) xmalloc (sizeof (struct sequence_stack
));
4307 tem
->next
= seq_stack
;
4308 tem
->first
= first_insn
;
4309 tem
->last
= last_insn
;
4310 tem
->sequence_rtl_expr
= seq_rtl_expr
;
4318 /* Similarly, but indicate that this sequence will be placed in T, an
4319 RTL_EXPR. See the documentation for start_sequence for more
4320 information about how to use this function. */
4323 start_sequence_for_rtl_expr (t
)
4331 /* Set up the insn chain starting with FIRST as the current sequence,
4332 saving the previously current one. See the documentation for
4333 start_sequence for more information about how to use this function. */
4336 push_to_sequence (first
)
4343 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
));
4349 /* Set up the insn chain from a chain stort in FIRST to LAST. */
4352 push_to_full_sequence (first
, last
)
4358 /* We really should have the end of the insn chain here. */
4359 if (last
&& NEXT_INSN (last
))
4363 /* Set up the outer-level insn chain
4364 as the current sequence, saving the previously current one. */
4367 push_topmost_sequence ()
4369 struct sequence_stack
*stack
, *top
= NULL
;
4373 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
4376 first_insn
= top
->first
;
4377 last_insn
= top
->last
;
4378 seq_rtl_expr
= top
->sequence_rtl_expr
;
4381 /* After emitting to the outer-level insn chain, update the outer-level
4382 insn chain, and restore the previous saved state. */
4385 pop_topmost_sequence ()
4387 struct sequence_stack
*stack
, *top
= NULL
;
4389 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
4392 top
->first
= first_insn
;
4393 top
->last
= last_insn
;
4394 /* ??? Why don't we save seq_rtl_expr here? */
4399 /* After emitting to a sequence, restore previous saved state.
4401 To get the contents of the sequence just made, you must call
4402 `gen_sequence' *before* calling here.
4404 If the compiler might have deferred popping arguments while
4405 generating this sequence, and this sequence will not be immediately
4406 inserted into the instruction stream, use do_pending_stack_adjust
4407 before calling gen_sequence. That will ensure that the deferred
4408 pops are inserted into this sequence, and not into some random
4409 location in the instruction stream. See INHIBIT_DEFER_POP for more
4410 information about deferred popping of arguments. */
4415 struct sequence_stack
*tem
= seq_stack
;
4417 first_insn
= tem
->first
;
4418 last_insn
= tem
->last
;
4419 seq_rtl_expr
= tem
->sequence_rtl_expr
;
4420 seq_stack
= tem
->next
;
4425 /* This works like end_sequence, but records the old sequence in FIRST
4429 end_full_sequence (first
, last
)
4432 *first
= first_insn
;
4437 /* Return 1 if currently emitting into a sequence. */
4442 return seq_stack
!= 0;
4445 /* Generate a SEQUENCE rtx containing the insns already emitted
4446 to the current sequence.
4448 This is how the gen_... function from a DEFINE_EXPAND
4449 constructs the SEQUENCE that it returns. */
4459 /* Count the insns in the chain. */
4461 for (tem
= first_insn
; tem
; tem
= NEXT_INSN (tem
))
4464 /* If only one insn, return it rather than a SEQUENCE.
4465 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
4466 the case of an empty list.)
4467 We only return the pattern of an insn if its code is INSN and it
4468 has no notes. This ensures that no information gets lost. */
4470 && ! RTX_FRAME_RELATED_P (first_insn
)
4471 && GET_CODE (first_insn
) == INSN
4472 /* Don't throw away any reg notes. */
4473 && REG_NOTES (first_insn
) == 0)
4474 return PATTERN (first_insn
);
4476 result
= gen_rtx_SEQUENCE (VOIDmode
, rtvec_alloc (len
));
4478 for (i
= 0, tem
= first_insn
; tem
; tem
= NEXT_INSN (tem
), i
++)
4479 XVECEXP (result
, 0, i
) = tem
;
4484 /* Put the various virtual registers into REGNO_REG_RTX. */
4487 init_virtual_regs (es
)
4488 struct emit_status
*es
;
4490 rtx
*ptr
= es
->x_regno_reg_rtx
;
4491 ptr
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
4492 ptr
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
4493 ptr
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
4494 ptr
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
4495 ptr
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
4499 clear_emit_caches ()
4503 /* Clear the start_sequence/gen_sequence cache. */
4504 for (i
= 0; i
< SEQUENCE_RESULT_SIZE
; i
++)
4505 sequence_result
[i
] = 0;
4509 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4510 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
4511 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
4512 static int copy_insn_n_scratches
;
4514 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4515 copied an ASM_OPERANDS.
4516 In that case, it is the original input-operand vector. */
4517 static rtvec orig_asm_operands_vector
;
4519 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4520 copied an ASM_OPERANDS.
4521 In that case, it is the copied input-operand vector. */
4522 static rtvec copy_asm_operands_vector
;
4524 /* Likewise for the constraints vector. */
4525 static rtvec orig_asm_constraints_vector
;
4526 static rtvec copy_asm_constraints_vector
;
4528 /* Recursively create a new copy of an rtx for copy_insn.
4529 This function differs from copy_rtx in that it handles SCRATCHes and
4530 ASM_OPERANDs properly.
4531 Normally, this function is not used directly; use copy_insn as front end.
4532 However, you could first copy an insn pattern with copy_insn and then use
4533 this function afterwards to properly copy any REG_NOTEs containing
4543 const char *format_ptr
;
4545 code
= GET_CODE (orig
);
4562 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
4563 if (copy_insn_scratch_in
[i
] == orig
)
4564 return copy_insn_scratch_out
[i
];
4568 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
4569 a LABEL_REF, it isn't sharable. */
4570 if (GET_CODE (XEXP (orig
, 0)) == PLUS
4571 && GET_CODE (XEXP (XEXP (orig
, 0), 0)) == SYMBOL_REF
4572 && GET_CODE (XEXP (XEXP (orig
, 0), 1)) == CONST_INT
)
4576 /* A MEM with a constant address is not sharable. The problem is that
4577 the constant address may need to be reloaded. If the mem is shared,
4578 then reloading one copy of this mem will cause all copies to appear
4579 to have been reloaded. */
4585 copy
= rtx_alloc (code
);
4587 /* Copy the various flags, and other information. We assume that
4588 all fields need copying, and then clear the fields that should
4589 not be copied. That is the sensible default behavior, and forces
4590 us to explicitly document why we are *not* copying a flag. */
4591 memcpy (copy
, orig
, sizeof (struct rtx_def
) - sizeof (rtunion
));
4593 /* We do not copy the USED flag, which is used as a mark bit during
4594 walks over the RTL. */
4597 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
4598 if (GET_RTX_CLASS (code
) == 'i')
4602 copy
->frame_related
= 0;
4605 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
4607 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
4609 copy
->fld
[i
] = orig
->fld
[i
];
4610 switch (*format_ptr
++)
4613 if (XEXP (orig
, i
) != NULL
)
4614 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
4619 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
4620 XVEC (copy
, i
) = copy_asm_constraints_vector
;
4621 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
4622 XVEC (copy
, i
) = copy_asm_operands_vector
;
4623 else if (XVEC (orig
, i
) != NULL
)
4625 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
4626 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
4627 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
4638 /* These are left unchanged. */
4646 if (code
== SCRATCH
)
4648 i
= copy_insn_n_scratches
++;
4649 if (i
>= MAX_RECOG_OPERANDS
)
4651 copy_insn_scratch_in
[i
] = orig
;
4652 copy_insn_scratch_out
[i
] = copy
;
4654 else if (code
== ASM_OPERANDS
)
4656 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
4657 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
4658 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
4659 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
4665 /* Create a new copy of an rtx.
4666 This function differs from copy_rtx in that it handles SCRATCHes and
4667 ASM_OPERANDs properly.
4668 INSN doesn't really have to be a full INSN; it could be just the
4674 copy_insn_n_scratches
= 0;
4675 orig_asm_operands_vector
= 0;
4676 orig_asm_constraints_vector
= 0;
4677 copy_asm_operands_vector
= 0;
4678 copy_asm_constraints_vector
= 0;
4679 return copy_insn_1 (insn
);
4682 /* Initialize data structures and variables in this file
4683 before generating rtl for each function. */
4688 struct function
*f
= cfun
;
4690 f
->emit
= (struct emit_status
*) xmalloc (sizeof (struct emit_status
));
4693 seq_rtl_expr
= NULL
;
4695 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
4698 first_label_num
= label_num
;
4702 clear_emit_caches ();
4704 /* Init the tables that describe all the pseudo regs. */
4706 f
->emit
->regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
4708 f
->emit
->regno_pointer_align
4709 = (unsigned char *) xcalloc (f
->emit
->regno_pointer_align_length
,
4710 sizeof (unsigned char));
4713 = (rtx
*) xcalloc (f
->emit
->regno_pointer_align_length
, sizeof (rtx
));
4716 = (tree
*) xcalloc (f
->emit
->regno_pointer_align_length
, sizeof (tree
));
4718 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
4719 init_virtual_regs (f
->emit
);
4721 /* Indicate that the virtual registers and stack locations are
4723 REG_POINTER (stack_pointer_rtx
) = 1;
4724 REG_POINTER (frame_pointer_rtx
) = 1;
4725 REG_POINTER (hard_frame_pointer_rtx
) = 1;
4726 REG_POINTER (arg_pointer_rtx
) = 1;
4728 REG_POINTER (virtual_incoming_args_rtx
) = 1;
4729 REG_POINTER (virtual_stack_vars_rtx
) = 1;
4730 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
4731 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
4732 REG_POINTER (virtual_cfa_rtx
) = 1;
4734 #ifdef STACK_BOUNDARY
4735 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
4736 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
4737 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
4738 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
4740 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
4741 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
4742 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
4743 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
4744 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
4747 #ifdef INIT_EXPANDERS
4752 /* Mark SS for GC. */
4755 mark_sequence_stack (ss
)
4756 struct sequence_stack
*ss
;
4760 ggc_mark_rtx (ss
->first
);
4761 ggc_mark_tree (ss
->sequence_rtl_expr
);
4766 /* Mark ES for GC. */
4769 mark_emit_status (es
)
4770 struct emit_status
*es
;
4779 for (i
= es
->regno_pointer_align_length
, r
= es
->x_regno_reg_rtx
,
4781 i
> 0; --i
, ++r
, ++t
)
4787 mark_sequence_stack (es
->sequence_stack
);
4788 ggc_mark_tree (es
->sequence_rtl_expr
);
4789 ggc_mark_rtx (es
->x_first_insn
);
4792 /* Generate the constant 0. */
4795 gen_const_vector_0 (mode
)
4796 enum machine_mode mode
;
4801 enum machine_mode inner
;
4803 units
= GET_MODE_NUNITS (mode
);
4804 inner
= GET_MODE_INNER (mode
);
4806 v
= rtvec_alloc (units
);
4808 /* We need to call this function after we to set CONST0_RTX first. */
4809 if (!CONST0_RTX (inner
))
4812 for (i
= 0; i
< units
; ++i
)
4813 RTVEC_ELT (v
, i
) = CONST0_RTX (inner
);
4815 tem
= gen_rtx_CONST_VECTOR (mode
, v
);
4819 /* Create some permanent unique rtl objects shared between all functions.
4820 LINE_NUMBERS is nonzero if line numbers are to be generated. */
4823 init_emit_once (line_numbers
)
4827 enum machine_mode mode
;
4828 enum machine_mode double_mode
;
4830 /* Initialize the CONST_INT and memory attribute hash tables. */
4831 const_int_htab
= htab_create (37, const_int_htab_hash
,
4832 const_int_htab_eq
, NULL
);
4833 ggc_add_deletable_htab (const_int_htab
, 0, 0);
4835 mem_attrs_htab
= htab_create (37, mem_attrs_htab_hash
,
4836 mem_attrs_htab_eq
, NULL
);
4837 ggc_add_deletable_htab (mem_attrs_htab
, 0, mem_attrs_mark
);
4839 no_line_numbers
= ! line_numbers
;
4841 /* Compute the word and byte modes. */
4843 byte_mode
= VOIDmode
;
4844 word_mode
= VOIDmode
;
4845 double_mode
= VOIDmode
;
4847 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
4848 mode
= GET_MODE_WIDER_MODE (mode
))
4850 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
4851 && byte_mode
== VOIDmode
)
4854 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
4855 && word_mode
== VOIDmode
)
4859 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
4860 mode
= GET_MODE_WIDER_MODE (mode
))
4862 if (GET_MODE_BITSIZE (mode
) == DOUBLE_TYPE_SIZE
4863 && double_mode
== VOIDmode
)
4867 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
4869 /* Assign register numbers to the globally defined register rtx.
4870 This must be done at runtime because the register number field
4871 is in a union and some compilers can't initialize unions. */
4873 pc_rtx
= gen_rtx (PC
, VOIDmode
);
4874 cc0_rtx
= gen_rtx (CC0
, VOIDmode
);
4875 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
4876 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
4877 if (hard_frame_pointer_rtx
== 0)
4878 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
,
4879 HARD_FRAME_POINTER_REGNUM
);
4880 if (arg_pointer_rtx
== 0)
4881 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
4882 virtual_incoming_args_rtx
=
4883 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
4884 virtual_stack_vars_rtx
=
4885 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
4886 virtual_stack_dynamic_rtx
=
4887 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
4888 virtual_outgoing_args_rtx
=
4889 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
4890 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
4892 /* These rtx must be roots if GC is enabled. */
4893 ggc_add_rtx_root (global_rtl
, GR_MAX
);
4895 #ifdef INIT_EXPANDERS
4896 /* This is to initialize {init|mark|free}_machine_status before the first
4897 call to push_function_context_to. This is needed by the Chill front
4898 end which calls push_function_context_to before the first call to
4899 init_function_start. */
4903 /* Create the unique rtx's for certain rtx codes and operand values. */
4905 /* Don't use gen_rtx here since gen_rtx in this case
4906 tries to use these variables. */
4907 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
4908 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
4909 gen_rtx_raw_CONST_INT (VOIDmode
, i
);
4910 ggc_add_rtx_root (const_int_rtx
, 2 * MAX_SAVED_CONST_INT
+ 1);
4912 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
4913 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
4914 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
4916 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
4918 dconst0
= REAL_VALUE_ATOF ("0", double_mode
);
4919 dconst1
= REAL_VALUE_ATOF ("1", double_mode
);
4920 dconst2
= REAL_VALUE_ATOF ("2", double_mode
);
4921 dconstm1
= REAL_VALUE_ATOF ("-1", double_mode
);
4923 for (i
= 0; i
<= 2; i
++)
4925 REAL_VALUE_TYPE
*r
=
4926 (i
== 0 ? &dconst0
: i
== 1 ? &dconst1
: &dconst2
);
4928 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
4929 mode
= GET_MODE_WIDER_MODE (mode
))
4931 rtx tem
= rtx_alloc (CONST_DOUBLE
);
4933 /* Can't use CONST_DOUBLE_FROM_REAL_VALUE here; that uses the
4934 tables we're setting up right now. */
4935 memcpy (&CONST_DOUBLE_LOW (tem
), r
, sizeof (REAL_VALUE_TYPE
));
4936 CONST_DOUBLE_CHAIN (tem
) = NULL_RTX
;
4937 PUT_MODE (tem
, mode
);
4939 const_tiny_rtx
[i
][(int) mode
] = tem
;
4942 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
4944 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
4945 mode
= GET_MODE_WIDER_MODE (mode
))
4946 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
4948 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT
);
4950 mode
= GET_MODE_WIDER_MODE (mode
))
4951 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
4954 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT
);
4956 mode
= GET_MODE_WIDER_MODE (mode
))
4957 const_tiny_rtx
[0][(int) mode
] = gen_const_vector_0 (mode
);
4959 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT
);
4961 mode
= GET_MODE_WIDER_MODE (mode
))
4962 const_tiny_rtx
[0][(int) mode
] = gen_const_vector_0 (mode
);
4964 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
4965 if (GET_MODE_CLASS ((enum machine_mode
) i
) == MODE_CC
)
4966 const_tiny_rtx
[0][i
] = const0_rtx
;
4968 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
4969 if (STORE_FLAG_VALUE
== 1)
4970 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
4972 /* For bounded pointers, `&const_tiny_rtx[0][0]' is not the same as
4973 `(rtx *) const_tiny_rtx'. The former has bounds that only cover
4974 `const_tiny_rtx[0]', whereas the latter has bounds that cover all. */
4975 ggc_add_rtx_root ((rtx
*) const_tiny_rtx
, sizeof const_tiny_rtx
/ sizeof (rtx
));
4976 ggc_add_rtx_root (&const_true_rtx
, 1);
4978 #ifdef RETURN_ADDRESS_POINTER_REGNUM
4979 return_address_pointer_rtx
4980 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
4984 struct_value_rtx
= STRUCT_VALUE
;
4986 struct_value_rtx
= gen_rtx_REG (Pmode
, STRUCT_VALUE_REGNUM
);
4989 #ifdef STRUCT_VALUE_INCOMING
4990 struct_value_incoming_rtx
= STRUCT_VALUE_INCOMING
;
4992 #ifdef STRUCT_VALUE_INCOMING_REGNUM
4993 struct_value_incoming_rtx
4994 = gen_rtx_REG (Pmode
, STRUCT_VALUE_INCOMING_REGNUM
);
4996 struct_value_incoming_rtx
= struct_value_rtx
;
5000 #ifdef STATIC_CHAIN_REGNUM
5001 static_chain_rtx
= gen_rtx_REG (Pmode
, STATIC_CHAIN_REGNUM
);
5003 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5004 if (STATIC_CHAIN_INCOMING_REGNUM
!= STATIC_CHAIN_REGNUM
)
5005 static_chain_incoming_rtx
5006 = gen_rtx_REG (Pmode
, STATIC_CHAIN_INCOMING_REGNUM
);
5009 static_chain_incoming_rtx
= static_chain_rtx
;
5013 static_chain_rtx
= STATIC_CHAIN
;
5015 #ifdef STATIC_CHAIN_INCOMING
5016 static_chain_incoming_rtx
= STATIC_CHAIN_INCOMING
;
5018 static_chain_incoming_rtx
= static_chain_rtx
;
5022 if (PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
5023 pic_offset_table_rtx
= gen_raw_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
5025 ggc_add_rtx_root (&pic_offset_table_rtx
, 1);
5026 ggc_add_rtx_root (&struct_value_rtx
, 1);
5027 ggc_add_rtx_root (&struct_value_incoming_rtx
, 1);
5028 ggc_add_rtx_root (&static_chain_rtx
, 1);
5029 ggc_add_rtx_root (&static_chain_incoming_rtx
, 1);
5030 ggc_add_rtx_root (&return_address_pointer_rtx
, 1);
5033 /* Query and clear/ restore no_line_numbers. This is used by the
5034 switch / case handling in stmt.c to give proper line numbers in
5035 warnings about unreachable code. */
5038 force_line_numbers ()
5040 int old
= no_line_numbers
;
5042 no_line_numbers
= 0;
5044 force_next_line_note ();
5049 restore_line_number_status (old_value
)
5052 no_line_numbers
= old_value
;