1 /* If-conversion support.
2 Copyright (C) 2000-2023 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GCC is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
39 #include "cfgcleanup.h"
43 #include "tree-pass.h"
45 #include "shrink-wrap.h"
49 #ifndef MAX_CONDITIONAL_EXECUTE
50 #define MAX_CONDITIONAL_EXECUTE \
51 (BRANCH_COST (optimize_function_for_speed_p (cfun), false) \
55 #define IFCVT_MULTIPLE_DUMPS 1
57 #define NULL_BLOCK ((basic_block) NULL)
59 /* True if after combine pass. */
60 static bool ifcvt_after_combine
;
62 /* True if the target has the cbranchcc4 optab. */
63 static bool have_cbranchcc4
;
65 /* # of IF-THEN or IF-THEN-ELSE blocks we looked at */
66 static int num_possible_if_blocks
;
68 /* # of IF-THEN or IF-THEN-ELSE blocks were converted to conditional
70 static int num_updated_if_blocks
;
72 /* # of changes made. */
73 static int num_true_changes
;
75 /* Whether conditional execution changes were made. */
76 static bool cond_exec_changed_p
;
78 /* Forward references. */
79 static int count_bb_insns (const_basic_block
);
80 static bool cheap_bb_rtx_cost_p (const_basic_block
, profile_probability
, int);
81 static rtx_insn
*first_active_insn (basic_block
);
82 static rtx_insn
*last_active_insn (basic_block
, bool);
83 static rtx_insn
*find_active_insn_before (basic_block
, rtx_insn
*);
84 static rtx_insn
*find_active_insn_after (basic_block
, rtx_insn
*);
85 static basic_block
block_fallthru (basic_block
);
86 static rtx
cond_exec_get_condition (rtx_insn
*, bool);
87 static rtx
noce_get_condition (rtx_insn
*, rtx_insn
**, bool);
88 static bool noce_operand_ok (const_rtx
);
89 static void merge_if_block (ce_if_block
*);
90 static bool find_cond_trap (basic_block
, edge
, edge
);
91 static basic_block
find_if_header (basic_block
, int);
92 static int block_jumps_and_fallthru (basic_block
, basic_block
);
93 static bool noce_find_if_block (basic_block
, edge
, edge
, int);
94 static bool cond_exec_find_if_block (ce_if_block
*);
95 static bool find_if_case_1 (basic_block
, edge
, edge
);
96 static bool find_if_case_2 (basic_block
, edge
, edge
);
97 static bool dead_or_predicable (basic_block
, basic_block
, basic_block
,
99 static void noce_emit_move_insn (rtx
, rtx
);
100 static rtx_insn
*block_has_only_trap (basic_block
);
101 static void need_cmov_or_rewire (basic_block
, hash_set
<rtx_insn
*> *,
102 hash_map
<rtx_insn
*, int> *);
103 static bool noce_convert_multiple_sets_1 (struct noce_if_info
*,
104 hash_set
<rtx_insn
*> *,
105 hash_map
<rtx_insn
*, int> *,
108 auto_vec
<rtx_insn
*> *, int *);
110 /* Count the number of non-jump active insns in BB. */
113 count_bb_insns (const_basic_block bb
)
116 rtx_insn
*insn
= BB_HEAD (bb
);
120 if (active_insn_p (insn
) && !JUMP_P (insn
))
123 if (insn
== BB_END (bb
))
125 insn
= NEXT_INSN (insn
);
131 /* Determine whether the total insn_cost on non-jump insns in
132 basic block BB is less than MAX_COST. This function returns
133 false if the cost of any instruction could not be estimated.
135 The cost of the non-jump insns in BB is scaled by REG_BR_PROB_BASE
136 as those insns are being speculated. MAX_COST is scaled with SCALE
137 plus a small fudge factor. */
140 cheap_bb_rtx_cost_p (const_basic_block bb
,
141 profile_probability prob
, int max_cost
)
144 rtx_insn
*insn
= BB_HEAD (bb
);
145 bool speed
= optimize_bb_for_speed_p (bb
);
146 int scale
= prob
.initialized_p () ? prob
.to_reg_br_prob_base ()
149 /* Set scale to REG_BR_PROB_BASE to void the identical scaling
150 applied to insn_cost when optimizing for size. Only do
151 this after combine because if-conversion might interfere with
152 passes before combine.
154 Use optimize_function_for_speed_p instead of the pre-defined
155 variable speed to make sure it is set to same value for all
156 basic blocks in one if-conversion transformation. */
157 if (!optimize_function_for_speed_p (cfun
) && ifcvt_after_combine
)
158 scale
= REG_BR_PROB_BASE
;
159 /* Our branch probability/scaling factors are just estimates and don't
160 account for cases where we can get speculation for free and other
161 secondary benefits. So we fudge the scale factor to make speculating
162 appear a little more profitable when optimizing for performance. */
164 scale
+= REG_BR_PROB_BASE
/ 8;
171 if (NONJUMP_INSN_P (insn
))
173 int cost
= insn_cost (insn
, speed
) * REG_BR_PROB_BASE
;
177 /* If this instruction is the load or set of a "stack" register,
178 such as a floating point register on x87, then the cost of
179 speculatively executing this insn may need to include
180 the additional cost of popping its result off of the
181 register stack. Unfortunately, correctly recognizing and
182 accounting for this additional overhead is tricky, so for
183 now we simply prohibit such speculative execution. */
186 rtx set
= single_set (insn
);
187 if (set
&& STACK_REG_P (SET_DEST (set
)))
193 if (count
>= max_cost
)
196 else if (CALL_P (insn
))
199 if (insn
== BB_END (bb
))
201 insn
= NEXT_INSN (insn
);
207 /* Return the first non-jump active insn in the basic block. */
210 first_active_insn (basic_block bb
)
212 rtx_insn
*insn
= BB_HEAD (bb
);
216 if (insn
== BB_END (bb
))
218 insn
= NEXT_INSN (insn
);
221 while (NOTE_P (insn
) || DEBUG_INSN_P (insn
))
223 if (insn
== BB_END (bb
))
225 insn
= NEXT_INSN (insn
);
234 /* Return the last non-jump active (non-jump) insn in the basic block. */
237 last_active_insn (basic_block bb
, bool skip_use_p
)
239 rtx_insn
*insn
= BB_END (bb
);
240 rtx_insn
*head
= BB_HEAD (bb
);
244 || DEBUG_INSN_P (insn
)
246 && NONJUMP_INSN_P (insn
)
247 && GET_CODE (PATTERN (insn
)) == USE
))
251 insn
= PREV_INSN (insn
);
260 /* Return the active insn before INSN inside basic block CURR_BB. */
263 find_active_insn_before (basic_block curr_bb
, rtx_insn
*insn
)
265 if (!insn
|| insn
== BB_HEAD (curr_bb
))
268 while ((insn
= PREV_INSN (insn
)) != NULL_RTX
)
270 if (NONJUMP_INSN_P (insn
) || JUMP_P (insn
) || CALL_P (insn
))
273 /* No other active insn all the way to the start of the basic block. */
274 if (insn
== BB_HEAD (curr_bb
))
281 /* Return the active insn after INSN inside basic block CURR_BB. */
284 find_active_insn_after (basic_block curr_bb
, rtx_insn
*insn
)
286 if (!insn
|| insn
== BB_END (curr_bb
))
289 while ((insn
= NEXT_INSN (insn
)) != NULL_RTX
)
291 if (NONJUMP_INSN_P (insn
) || JUMP_P (insn
) || CALL_P (insn
))
294 /* No other active insn all the way to the end of the basic block. */
295 if (insn
== BB_END (curr_bb
))
302 /* Return the basic block reached by falling though the basic block BB. */
305 block_fallthru (basic_block bb
)
307 edge e
= find_fallthru_edge (bb
->succs
);
309 return (e
) ? e
->dest
: NULL_BLOCK
;
312 /* Return true if RTXs A and B can be safely interchanged. */
315 rtx_interchangeable_p (const_rtx a
, const_rtx b
)
317 if (!rtx_equal_p (a
, b
))
320 if (GET_CODE (a
) != MEM
)
323 /* A dead type-unsafe memory reference is legal, but a live type-unsafe memory
324 reference is not. Interchanging a dead type-unsafe memory reference with
325 a live type-safe one creates a live type-unsafe memory reference, in other
326 words, it makes the program illegal.
327 We check here conservatively whether the two memory references have equal
328 memory attributes. */
330 return mem_attrs_eq_p (get_mem_attrs (a
), get_mem_attrs (b
));
334 /* Go through a bunch of insns, converting them to conditional
335 execution format if possible. Return TRUE if all of the non-note
336 insns were processed. */
339 cond_exec_process_insns (ce_if_block
*ce_info ATTRIBUTE_UNUSED
,
340 /* if block information */rtx_insn
*start
,
341 /* first insn to look at */rtx end
,
342 /* last insn to look at */rtx test
,
343 /* conditional execution test */profile_probability
345 /* probability of branch taken. */bool mod_ok
)
347 bool must_be_last
= false;
355 for (insn
= start
; ; insn
= NEXT_INSN (insn
))
357 /* dwarf2out can't cope with conditional prologues. */
358 if (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_PROLOGUE_END
)
361 if (NOTE_P (insn
) || DEBUG_INSN_P (insn
))
364 gcc_assert (NONJUMP_INSN_P (insn
) || CALL_P (insn
));
366 /* dwarf2out can't cope with conditional unwind info. */
367 if (RTX_FRAME_RELATED_P (insn
))
370 /* Remove USE insns that get in the way. */
371 if (reload_completed
&& GET_CODE (PATTERN (insn
)) == USE
)
373 /* ??? Ug. Actually unlinking the thing is problematic,
374 given what we'd have to coordinate with our callers. */
375 SET_INSN_DELETED (insn
);
379 /* Last insn wasn't last? */
383 if (modified_in_p (test
, insn
))
390 /* Now build the conditional form of the instruction. */
391 pattern
= PATTERN (insn
);
392 xtest
= copy_rtx (test
);
394 /* If this is already a COND_EXEC, rewrite the test to be an AND of the
396 if (GET_CODE (pattern
) == COND_EXEC
)
398 if (GET_MODE (xtest
) != GET_MODE (COND_EXEC_TEST (pattern
)))
401 xtest
= gen_rtx_AND (GET_MODE (xtest
), xtest
,
402 COND_EXEC_TEST (pattern
));
403 pattern
= COND_EXEC_CODE (pattern
);
406 pattern
= gen_rtx_COND_EXEC (VOIDmode
, xtest
, pattern
);
408 /* If the machine needs to modify the insn being conditionally executed,
409 say for example to force a constant integer operand into a temp
410 register, do so here. */
411 #ifdef IFCVT_MODIFY_INSN
412 IFCVT_MODIFY_INSN (ce_info
, pattern
, insn
);
417 validate_change (insn
, &PATTERN (insn
), pattern
, 1);
419 if (CALL_P (insn
) && prob_val
.initialized_p ())
420 validate_change (insn
, ®_NOTES (insn
),
421 gen_rtx_INT_LIST ((machine_mode
) REG_BR_PROB
,
422 prob_val
.to_reg_br_prob_note (),
423 REG_NOTES (insn
)), 1);
433 /* Return the condition for a jump. Do not do any special processing. */
436 cond_exec_get_condition (rtx_insn
*jump
, bool get_reversed
= false)
440 if (any_condjump_p (jump
))
441 test_if
= SET_SRC (pc_set (jump
));
444 cond
= XEXP (test_if
, 0);
446 /* If this branches to JUMP_LABEL when the condition is false,
447 reverse the condition. */
449 || (GET_CODE (XEXP (test_if
, 2)) == LABEL_REF
450 && label_ref_label (XEXP (test_if
, 2))
451 == JUMP_LABEL (jump
)))
453 enum rtx_code rev
= reversed_comparison_code (cond
, jump
);
457 cond
= gen_rtx_fmt_ee (rev
, GET_MODE (cond
), XEXP (cond
, 0),
464 /* Given a simple IF-THEN or IF-THEN-ELSE block, attempt to convert it
465 to conditional execution. Return TRUE if we were successful at
466 converting the block. */
469 cond_exec_process_if_block (ce_if_block
* ce_info
,
470 /* if block information */bool do_multiple_p
)
472 basic_block test_bb
= ce_info
->test_bb
; /* last test block */
473 basic_block then_bb
= ce_info
->then_bb
; /* THEN */
474 basic_block else_bb
= ce_info
->else_bb
; /* ELSE or NULL */
475 rtx test_expr
; /* expression in IF_THEN_ELSE that is tested */
476 rtx_insn
*then_start
; /* first insn in THEN block */
477 rtx_insn
*then_end
; /* last insn + 1 in THEN block */
478 rtx_insn
*else_start
= NULL
; /* first insn in ELSE block or NULL */
479 rtx_insn
*else_end
= NULL
; /* last insn + 1 in ELSE block */
480 int max
; /* max # of insns to convert. */
481 bool then_mod_ok
; /* whether conditional mods are ok in THEN */
482 rtx true_expr
; /* test for else block insns */
483 rtx false_expr
; /* test for then block insns */
484 profile_probability true_prob_val
;/* probability of else block */
485 profile_probability false_prob_val
;/* probability of then block */
486 rtx_insn
*then_last_head
= NULL
; /* Last match at the head of THEN */
487 rtx_insn
*else_last_head
= NULL
; /* Last match at the head of ELSE */
488 rtx_insn
*then_first_tail
= NULL
; /* First match at the tail of THEN */
489 rtx_insn
*else_first_tail
= NULL
; /* First match at the tail of ELSE */
490 int then_n_insns
, else_n_insns
, n_insns
;
491 enum rtx_code false_code
;
494 /* If test is comprised of && or || elements, and we've failed at handling
495 all of them together, just use the last test if it is the special case of
496 && elements without an ELSE block. */
497 if (!do_multiple_p
&& ce_info
->num_multiple_test_blocks
)
499 if (else_bb
|| ! ce_info
->and_and_p
)
502 ce_info
->test_bb
= test_bb
= ce_info
->last_test_bb
;
503 ce_info
->num_multiple_test_blocks
= 0;
504 ce_info
->num_and_and_blocks
= 0;
505 ce_info
->num_or_or_blocks
= 0;
508 /* Find the conditional jump to the ELSE or JOIN part, and isolate
510 test_expr
= cond_exec_get_condition (BB_END (test_bb
));
514 /* If the conditional jump is more than just a conditional jump,
515 then we cannot do conditional execution conversion on this block. */
516 if (! onlyjump_p (BB_END (test_bb
)))
519 /* Collect the bounds of where we're to search, skipping any labels, jumps
520 and notes at the beginning and end of the block. Then count the total
521 number of insns and see if it is small enough to convert. */
522 then_start
= first_active_insn (then_bb
);
523 then_end
= last_active_insn (then_bb
, true);
524 then_n_insns
= ce_info
->num_then_insns
= count_bb_insns (then_bb
);
525 n_insns
= then_n_insns
;
526 max
= MAX_CONDITIONAL_EXECUTE
;
533 else_start
= first_active_insn (else_bb
);
534 else_end
= last_active_insn (else_bb
, true);
535 else_n_insns
= ce_info
->num_else_insns
= count_bb_insns (else_bb
);
536 n_insns
+= else_n_insns
;
538 /* Look for matching sequences at the head and tail of the two blocks,
539 and limit the range of insns to be converted if possible. */
540 n_matching
= flow_find_cross_jump (then_bb
, else_bb
,
541 &then_first_tail
, &else_first_tail
,
543 if (then_first_tail
== BB_HEAD (then_bb
))
544 then_start
= then_end
= NULL
;
545 if (else_first_tail
== BB_HEAD (else_bb
))
546 else_start
= else_end
= NULL
;
551 then_end
= find_active_insn_before (then_bb
, then_first_tail
);
553 else_end
= find_active_insn_before (else_bb
, else_first_tail
);
554 n_insns
-= 2 * n_matching
;
559 && then_n_insns
> n_matching
560 && else_n_insns
> n_matching
)
562 int longest_match
= MIN (then_n_insns
- n_matching
,
563 else_n_insns
- n_matching
);
565 = flow_find_head_matching_sequence (then_bb
, else_bb
,
574 /* We won't pass the insns in the head sequence to
575 cond_exec_process_insns, so we need to test them here
576 to make sure that they don't clobber the condition. */
577 for (insn
= BB_HEAD (then_bb
);
578 insn
!= NEXT_INSN (then_last_head
);
579 insn
= NEXT_INSN (insn
))
580 if (!LABEL_P (insn
) && !NOTE_P (insn
)
581 && !DEBUG_INSN_P (insn
)
582 && modified_in_p (test_expr
, insn
))
586 if (then_last_head
== then_end
)
587 then_start
= then_end
= NULL
;
588 if (else_last_head
== else_end
)
589 else_start
= else_end
= NULL
;
594 then_start
= find_active_insn_after (then_bb
, then_last_head
);
596 else_start
= find_active_insn_after (else_bb
, else_last_head
);
597 n_insns
-= 2 * n_matching
;
605 /* Map test_expr/test_jump into the appropriate MD tests to use on
606 the conditionally executed code. */
608 true_expr
= test_expr
;
610 false_code
= reversed_comparison_code (true_expr
, BB_END (test_bb
));
611 if (false_code
!= UNKNOWN
)
612 false_expr
= gen_rtx_fmt_ee (false_code
, GET_MODE (true_expr
),
613 XEXP (true_expr
, 0), XEXP (true_expr
, 1));
615 false_expr
= NULL_RTX
;
617 #ifdef IFCVT_MODIFY_TESTS
618 /* If the machine description needs to modify the tests, such as setting a
619 conditional execution register from a comparison, it can do so here. */
620 IFCVT_MODIFY_TESTS (ce_info
, true_expr
, false_expr
);
622 /* See if the conversion failed. */
623 if (!true_expr
|| !false_expr
)
627 note
= find_reg_note (BB_END (test_bb
), REG_BR_PROB
, NULL_RTX
);
630 true_prob_val
= profile_probability::from_reg_br_prob_note (XINT (note
, 0));
631 false_prob_val
= true_prob_val
.invert ();
635 true_prob_val
= profile_probability::uninitialized ();
636 false_prob_val
= profile_probability::uninitialized ();
639 /* If we have && or || tests, do them here. These tests are in the adjacent
640 blocks after the first block containing the test. */
641 if (ce_info
->num_multiple_test_blocks
> 0)
643 basic_block bb
= test_bb
;
644 basic_block last_test_bb
= ce_info
->last_test_bb
;
651 rtx_insn
*start
, *end
;
653 enum rtx_code f_code
;
655 bb
= block_fallthru (bb
);
656 start
= first_active_insn (bb
);
657 end
= last_active_insn (bb
, true);
659 && ! cond_exec_process_insns (ce_info
, start
, end
, false_expr
,
660 false_prob_val
, false))
663 /* If the conditional jump is more than just a conditional jump, then
664 we cannot do conditional execution conversion on this block. */
665 if (! onlyjump_p (BB_END (bb
)))
668 /* Find the conditional jump and isolate the test. */
669 t
= cond_exec_get_condition (BB_END (bb
));
673 f_code
= reversed_comparison_code (t
, BB_END (bb
));
674 if (f_code
== UNKNOWN
)
677 f
= gen_rtx_fmt_ee (f_code
, GET_MODE (t
), XEXP (t
, 0), XEXP (t
, 1));
678 if (ce_info
->and_and_p
)
680 t
= gen_rtx_AND (GET_MODE (t
), true_expr
, t
);
681 f
= gen_rtx_IOR (GET_MODE (t
), false_expr
, f
);
685 t
= gen_rtx_IOR (GET_MODE (t
), true_expr
, t
);
686 f
= gen_rtx_AND (GET_MODE (t
), false_expr
, f
);
689 /* If the machine description needs to modify the tests, such as
690 setting a conditional execution register from a comparison, it can
692 #ifdef IFCVT_MODIFY_MULTIPLE_TESTS
693 IFCVT_MODIFY_MULTIPLE_TESTS (ce_info
, bb
, t
, f
);
695 /* See if the conversion failed. */
703 while (bb
!= last_test_bb
);
706 /* For IF-THEN-ELSE blocks, we don't allow modifications of the test
707 on then THEN block. */
708 then_mod_ok
= (else_bb
== NULL_BLOCK
);
710 /* Go through the THEN and ELSE blocks converting the insns if possible
711 to conditional execution. */
715 || ! cond_exec_process_insns (ce_info
, then_start
, then_end
,
716 false_expr
, false_prob_val
,
720 if (else_bb
&& else_end
721 && ! cond_exec_process_insns (ce_info
, else_start
, else_end
,
722 true_expr
, true_prob_val
, true))
725 /* If we cannot apply the changes, fail. Do not go through the normal fail
726 processing, since apply_change_group will call cancel_changes. */
727 if (! apply_change_group ())
729 #ifdef IFCVT_MODIFY_CANCEL
730 /* Cancel any machine dependent changes. */
731 IFCVT_MODIFY_CANCEL (ce_info
);
736 #ifdef IFCVT_MODIFY_FINAL
737 /* Do any machine dependent final modifications. */
738 IFCVT_MODIFY_FINAL (ce_info
);
741 /* Conversion succeeded. */
743 fprintf (dump_file
, "%d insn%s converted to conditional execution.\n",
744 n_insns
, (n_insns
== 1) ? " was" : "s were");
746 /* Merge the blocks! If we had matching sequences, make sure to delete one
747 copy at the appropriate location first: delete the copy in the THEN branch
748 for a tail sequence so that the remaining one is executed last for both
749 branches, and delete the copy in the ELSE branch for a head sequence so
750 that the remaining one is executed first for both branches. */
753 rtx_insn
*from
= then_first_tail
;
755 from
= find_active_insn_after (then_bb
, from
);
756 delete_insn_chain (from
, get_last_bb_insn (then_bb
), false);
759 delete_insn_chain (first_active_insn (else_bb
), else_last_head
, false);
761 merge_if_block (ce_info
);
762 cond_exec_changed_p
= true;
766 #ifdef IFCVT_MODIFY_CANCEL
767 /* Cancel any machine dependent changes. */
768 IFCVT_MODIFY_CANCEL (ce_info
);
775 static rtx
noce_emit_store_flag (struct noce_if_info
*, rtx
, bool, int);
776 static bool noce_try_move (struct noce_if_info
*);
777 static bool noce_try_ifelse_collapse (struct noce_if_info
*);
778 static bool noce_try_store_flag (struct noce_if_info
*);
779 static bool noce_try_addcc (struct noce_if_info
*);
780 static bool noce_try_store_flag_constants (struct noce_if_info
*);
781 static bool noce_try_store_flag_mask (struct noce_if_info
*);
782 static rtx
noce_emit_cmove (struct noce_if_info
*, rtx
, enum rtx_code
, rtx
,
783 rtx
, rtx
, rtx
, rtx
= NULL
, rtx
= NULL
);
784 static bool noce_try_cmove (struct noce_if_info
*);
785 static bool noce_try_cmove_arith (struct noce_if_info
*);
786 static rtx
noce_get_alt_condition (struct noce_if_info
*, rtx
, rtx_insn
**);
787 static bool noce_try_minmax (struct noce_if_info
*);
788 static bool noce_try_abs (struct noce_if_info
*);
789 static bool noce_try_sign_mask (struct noce_if_info
*);
791 /* Return the comparison code for reversed condition for IF_INFO,
792 or UNKNOWN if reversing the condition is not possible. */
794 static inline enum rtx_code
795 noce_reversed_cond_code (struct noce_if_info
*if_info
)
797 if (if_info
->rev_cond
)
798 return GET_CODE (if_info
->rev_cond
);
799 return reversed_comparison_code (if_info
->cond
, if_info
->jump
);
802 /* Return true if SEQ is a good candidate as a replacement for the
803 if-convertible sequence described in IF_INFO.
804 This is the default implementation that targets can override
805 through a target hook. */
808 default_noce_conversion_profitable_p (rtx_insn
*seq
,
809 struct noce_if_info
*if_info
)
811 bool speed_p
= if_info
->speed_p
;
813 /* Cost up the new sequence. */
814 unsigned int cost
= seq_cost (seq
, speed_p
);
816 if (cost
<= if_info
->original_cost
)
819 /* When compiling for size, we can make a reasonably accurately guess
820 at the size growth. When compiling for speed, use the maximum. */
821 return speed_p
&& cost
<= if_info
->max_seq_cost
;
824 /* Helper function for noce_try_store_flag*. */
827 noce_emit_store_flag (struct noce_if_info
*if_info
, rtx x
, bool reversep
,
830 rtx cond
= if_info
->cond
;
834 cond_complex
= (! general_operand (XEXP (cond
, 0), VOIDmode
)
835 || ! general_operand (XEXP (cond
, 1), VOIDmode
));
837 /* If earliest == jump, or when the condition is complex, try to
838 build the store_flag insn directly. */
842 rtx set
= pc_set (if_info
->jump
);
843 cond
= XEXP (SET_SRC (set
), 0);
844 if (GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
845 && label_ref_label (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (if_info
->jump
))
846 reversep
= !reversep
;
847 if (if_info
->then_else_reversed
)
848 reversep
= !reversep
;
852 && general_operand (XEXP (if_info
->rev_cond
, 0), VOIDmode
)
853 && general_operand (XEXP (if_info
->rev_cond
, 1), VOIDmode
))
855 cond
= if_info
->rev_cond
;
860 code
= reversed_comparison_code (cond
, if_info
->jump
);
862 code
= GET_CODE (cond
);
864 if ((if_info
->cond_earliest
== if_info
->jump
|| cond_complex
)
865 && (normalize
== 0 || STORE_FLAG_VALUE
== normalize
))
867 rtx src
= gen_rtx_fmt_ee (code
, GET_MODE (x
), XEXP (cond
, 0),
869 rtx set
= gen_rtx_SET (x
, src
);
872 rtx_insn
*insn
= emit_insn (set
);
874 if (recog_memoized (insn
) >= 0)
876 rtx_insn
*seq
= get_insns ();
880 if_info
->cond_earliest
= if_info
->jump
;
888 /* Don't even try if the comparison operands or the mode of X are weird. */
889 if (cond_complex
|| !SCALAR_INT_MODE_P (GET_MODE (x
)))
892 return emit_store_flag (x
, code
, XEXP (cond
, 0),
893 XEXP (cond
, 1), VOIDmode
,
894 (code
== LTU
|| code
== LEU
895 || code
== GEU
|| code
== GTU
), normalize
);
898 /* Return true if X can be safely forced into a register by copy_to_mode_reg
902 noce_can_force_operand (rtx x
)
904 if (general_operand (x
, VOIDmode
))
908 if (!noce_can_force_operand (SUBREG_REG (x
)))
912 if (ARITHMETIC_P (x
))
914 if (!noce_can_force_operand (XEXP (x
, 0))
915 || !noce_can_force_operand (XEXP (x
, 1)))
917 switch (GET_CODE (x
))
926 return code_to_optab (GET_CODE (x
));
931 if (!noce_can_force_operand (XEXP (x
, 0)))
933 switch (GET_CODE (x
))
946 return code_to_optab (GET_CODE (x
));
952 /* Emit instruction to move an rtx, possibly into STRICT_LOW_PART.
953 X is the destination/target and Y is the value to copy. */
956 noce_emit_move_insn (rtx x
, rtx y
)
958 machine_mode outmode
;
962 if (GET_CODE (x
) != STRICT_LOW_PART
)
964 rtx_insn
*seq
, *insn
;
969 /* Check that the SET_SRC is reasonable before calling emit_move_insn,
970 otherwise construct a suitable SET pattern ourselves. */
971 insn
= (OBJECT_P (y
) || CONSTANT_P (y
) || GET_CODE (y
) == SUBREG
)
972 ? emit_move_insn (x
, y
)
973 : emit_insn (gen_rtx_SET (x
, y
));
977 if (recog_memoized (insn
) <= 0)
979 if (GET_CODE (x
) == ZERO_EXTRACT
)
981 rtx op
= XEXP (x
, 0);
982 unsigned HOST_WIDE_INT size
= INTVAL (XEXP (x
, 1));
983 unsigned HOST_WIDE_INT start
= INTVAL (XEXP (x
, 2));
985 /* store_bit_field expects START to be relative to
986 BYTES_BIG_ENDIAN and adjusts this value for machines with
987 BITS_BIG_ENDIAN != BYTES_BIG_ENDIAN. In order to be able to
988 invoke store_bit_field again it is necessary to have the START
989 value from the first call. */
990 if (BITS_BIG_ENDIAN
!= BYTES_BIG_ENDIAN
)
993 start
= BITS_PER_UNIT
- start
- size
;
996 gcc_assert (REG_P (op
));
997 start
= BITS_PER_WORD
- start
- size
;
1001 gcc_assert (start
< (MEM_P (op
) ? BITS_PER_UNIT
: BITS_PER_WORD
));
1002 store_bit_field (op
, size
, start
, 0, 0, GET_MODE (x
), y
, false,
1007 switch (GET_RTX_CLASS (GET_CODE (y
)))
1010 ot
= code_to_optab (GET_CODE (y
));
1011 if (ot
&& noce_can_force_operand (XEXP (y
, 0)))
1014 target
= expand_unop (GET_MODE (y
), ot
, XEXP (y
, 0), x
, 0);
1015 if (target
!= NULL_RTX
)
1018 emit_move_insn (x
, target
);
1026 case RTX_COMM_ARITH
:
1027 ot
= code_to_optab (GET_CODE (y
));
1029 && noce_can_force_operand (XEXP (y
, 0))
1030 && noce_can_force_operand (XEXP (y
, 1)))
1033 target
= expand_binop (GET_MODE (y
), ot
,
1034 XEXP (y
, 0), XEXP (y
, 1),
1035 x
, 0, OPTAB_DIRECT
);
1036 if (target
!= NULL_RTX
)
1039 emit_move_insn (x
, target
);
1055 outer
= XEXP (x
, 0);
1056 inner
= XEXP (outer
, 0);
1057 outmode
= GET_MODE (outer
);
1058 bitpos
= SUBREG_BYTE (outer
) * BITS_PER_UNIT
;
1059 store_bit_field (inner
, GET_MODE_BITSIZE (outmode
), bitpos
,
1060 0, 0, outmode
, y
, false, false);
1063 /* Return the CC reg if it is used in COND. */
1066 cc_in_cond (rtx cond
)
1068 if (have_cbranchcc4
&& cond
1069 && GET_MODE_CLASS (GET_MODE (XEXP (cond
, 0))) == MODE_CC
)
1070 return XEXP (cond
, 0);
1075 /* Return sequence of instructions generated by if conversion. This
1076 function calls end_sequence() to end the current stream, ensures
1077 that the instructions are unshared, recognizable non-jump insns.
1078 On failure, this function returns a NULL_RTX. */
1081 end_ifcvt_sequence (struct noce_if_info
*if_info
)
1084 rtx_insn
*seq
= get_insns ();
1085 rtx cc
= cc_in_cond (if_info
->cond
);
1087 set_used_flags (if_info
->x
);
1088 set_used_flags (if_info
->cond
);
1089 set_used_flags (if_info
->a
);
1090 set_used_flags (if_info
->b
);
1092 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
1093 set_used_flags (insn
);
1095 unshare_all_rtl_in_chain (seq
);
1098 /* Make sure that all of the instructions emitted are recognizable,
1099 and that we haven't introduced a new jump instruction.
1100 As an exercise for the reader, build a general mechanism that
1101 allows proper placement of required clobbers. */
1102 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
1104 || recog_memoized (insn
) == -1
1105 /* Make sure new generated code does not clobber CC. */
1106 || (cc
&& set_of (cc
, insn
)))
1112 /* Return true iff the then and else basic block (if it exists)
1113 consist of a single simple set instruction. */
1116 noce_simple_bbs (struct noce_if_info
*if_info
)
1118 if (!if_info
->then_simple
)
1121 if (if_info
->else_bb
)
1122 return if_info
->else_simple
;
1127 /* Convert "if (a != b) x = a; else x = b" into "x = a" and
1128 "if (a == b) x = a; else x = b" into "x = b". */
1131 noce_try_move (struct noce_if_info
*if_info
)
1133 rtx cond
= if_info
->cond
;
1134 enum rtx_code code
= GET_CODE (cond
);
1138 if (code
!= NE
&& code
!= EQ
)
1141 if (!noce_simple_bbs (if_info
))
1144 /* This optimization isn't valid if either A or B could be a NaN
1145 or a signed zero. */
1146 if (HONOR_NANS (if_info
->x
)
1147 || HONOR_SIGNED_ZEROS (if_info
->x
))
1150 /* Check whether the operands of the comparison are A and in
1152 if ((rtx_equal_p (if_info
->a
, XEXP (cond
, 0))
1153 && rtx_equal_p (if_info
->b
, XEXP (cond
, 1)))
1154 || (rtx_equal_p (if_info
->a
, XEXP (cond
, 1))
1155 && rtx_equal_p (if_info
->b
, XEXP (cond
, 0))))
1157 if (!rtx_interchangeable_p (if_info
->a
, if_info
->b
))
1160 y
= (code
== EQ
) ? if_info
->a
: if_info
->b
;
1162 /* Avoid generating the move if the source is the destination. */
1163 if (! rtx_equal_p (if_info
->x
, y
))
1166 noce_emit_move_insn (if_info
->x
, y
);
1167 seq
= end_ifcvt_sequence (if_info
);
1171 emit_insn_before_setloc (seq
, if_info
->jump
,
1172 INSN_LOCATION (if_info
->insn_a
));
1174 if_info
->transform_name
= "noce_try_move";
1180 /* Try forming an IF_THEN_ELSE (cond, b, a) and collapsing that
1181 through simplify_rtx. Sometimes that can eliminate the IF_THEN_ELSE.
1182 If that is the case, emit the result into x. */
1185 noce_try_ifelse_collapse (struct noce_if_info
* if_info
)
1187 if (!noce_simple_bbs (if_info
))
1190 machine_mode mode
= GET_MODE (if_info
->x
);
1191 rtx if_then_else
= simplify_gen_ternary (IF_THEN_ELSE
, mode
, mode
,
1192 if_info
->cond
, if_info
->b
,
1195 if (GET_CODE (if_then_else
) == IF_THEN_ELSE
)
1200 noce_emit_move_insn (if_info
->x
, if_then_else
);
1201 seq
= end_ifcvt_sequence (if_info
);
1205 emit_insn_before_setloc (seq
, if_info
->jump
,
1206 INSN_LOCATION (if_info
->insn_a
));
1208 if_info
->transform_name
= "noce_try_ifelse_collapse";
1213 /* Convert "if (test) x = 1; else x = 0".
1215 Only try 0 and STORE_FLAG_VALUE here. Other combinations will be
1216 tried in noce_try_store_flag_constants after noce_try_cmove has had
1217 a go at the conversion. */
1220 noce_try_store_flag (struct noce_if_info
*if_info
)
1226 if (!noce_simple_bbs (if_info
))
1229 if (CONST_INT_P (if_info
->b
)
1230 && INTVAL (if_info
->b
) == STORE_FLAG_VALUE
1231 && if_info
->a
== const0_rtx
)
1233 else if (if_info
->b
== const0_rtx
1234 && CONST_INT_P (if_info
->a
)
1235 && INTVAL (if_info
->a
) == STORE_FLAG_VALUE
1236 && noce_reversed_cond_code (if_info
) != UNKNOWN
)
1243 target
= noce_emit_store_flag (if_info
, if_info
->x
, reversep
, 0);
1246 if (target
!= if_info
->x
)
1247 noce_emit_move_insn (if_info
->x
, target
);
1249 seq
= end_ifcvt_sequence (if_info
);
1253 emit_insn_before_setloc (seq
, if_info
->jump
,
1254 INSN_LOCATION (if_info
->insn_a
));
1255 if_info
->transform_name
= "noce_try_store_flag";
1266 /* Convert "if (test) x = -A; else x = A" into
1267 x = A; if (test) x = -x if the machine can do the
1268 conditional negate form of this cheaply.
1269 Try this before noce_try_cmove that will just load the
1270 immediates into two registers and do a conditional select
1271 between them. If the target has a conditional negate or
1272 conditional invert operation we can save a potentially
1273 expensive constant synthesis. */
1276 noce_try_inverse_constants (struct noce_if_info
*if_info
)
1278 if (!noce_simple_bbs (if_info
))
1281 if (!CONST_INT_P (if_info
->a
)
1282 || !CONST_INT_P (if_info
->b
)
1283 || !REG_P (if_info
->x
))
1286 machine_mode mode
= GET_MODE (if_info
->x
);
1288 HOST_WIDE_INT val_a
= INTVAL (if_info
->a
);
1289 HOST_WIDE_INT val_b
= INTVAL (if_info
->b
);
1291 rtx cond
= if_info
->cond
;
1299 if (val_b
!= HOST_WIDE_INT_MIN
&& val_a
== -val_b
)
1301 else if (val_a
== ~val_b
)
1309 rtx tmp
= gen_reg_rtx (mode
);
1310 noce_emit_move_insn (tmp
, if_info
->a
);
1312 target
= emit_conditional_neg_or_complement (x
, code
, mode
, cond
, tmp
, tmp
);
1316 rtx_insn
*seq
= get_insns ();
1324 if (target
!= if_info
->x
)
1325 noce_emit_move_insn (if_info
->x
, target
);
1327 seq
= end_ifcvt_sequence (if_info
);
1332 emit_insn_before_setloc (seq
, if_info
->jump
,
1333 INSN_LOCATION (if_info
->insn_a
));
1334 if_info
->transform_name
= "noce_try_inverse_constants";
1343 /* Convert "if (test) x = a; else x = b", for A and B constant.
1344 Also allow A = y + c1, B = y + c2, with a common y between A
1348 noce_try_store_flag_constants (struct noce_if_info
*if_info
)
1353 HOST_WIDE_INT itrue
, ifalse
, diff
, tmp
;
1356 machine_mode mode
= GET_MODE (if_info
->x
);
1357 rtx common
= NULL_RTX
;
1362 /* Handle cases like x := test ? y + 3 : y + 4. */
1363 if (GET_CODE (a
) == PLUS
1364 && GET_CODE (b
) == PLUS
1365 && CONST_INT_P (XEXP (a
, 1))
1366 && CONST_INT_P (XEXP (b
, 1))
1367 && rtx_equal_p (XEXP (a
, 0), XEXP (b
, 0))
1368 /* Allow expressions that are not using the result or plain
1369 registers where we handle overlap below. */
1370 && (REG_P (XEXP (a
, 0))
1371 || (noce_operand_ok (XEXP (a
, 0))
1372 && ! reg_overlap_mentioned_p (if_info
->x
, XEXP (a
, 0)))))
1374 common
= XEXP (a
, 0);
1379 if (!noce_simple_bbs (if_info
))
1385 ifalse
= INTVAL (a
);
1387 bool subtract_flag_p
= false;
1389 diff
= (unsigned HOST_WIDE_INT
) itrue
- ifalse
;
1390 /* Make sure we can represent the difference between the two values. */
1392 != ((ifalse
< 0) != (itrue
< 0) ? ifalse
< 0 : ifalse
< itrue
))
1395 diff
= trunc_int_for_mode (diff
, mode
);
1397 can_reverse
= noce_reversed_cond_code (if_info
) != UNKNOWN
;
1399 if (diff
== STORE_FLAG_VALUE
|| diff
== -STORE_FLAG_VALUE
)
1402 /* We could collapse these cases but it is easier to follow the
1403 diff/STORE_FLAG_VALUE combinations when they are listed
1407 => 4 + (test != 0). */
1408 if (diff
< 0 && STORE_FLAG_VALUE
< 0)
1411 => can_reverse | 4 + (test == 0)
1412 !can_reverse | 3 - (test != 0). */
1413 else if (diff
> 0 && STORE_FLAG_VALUE
< 0)
1415 reversep
= can_reverse
;
1416 subtract_flag_p
= !can_reverse
;
1417 /* If we need to subtract the flag and we have PLUS-immediate
1418 A and B then it is unlikely to be beneficial to play tricks
1420 if (subtract_flag_p
&& common
)
1424 => can_reverse | 3 + (test == 0)
1425 !can_reverse | 4 - (test != 0). */
1426 else if (diff
< 0 && STORE_FLAG_VALUE
> 0)
1428 reversep
= can_reverse
;
1429 subtract_flag_p
= !can_reverse
;
1430 /* If we need to subtract the flag and we have PLUS-immediate
1431 A and B then it is unlikely to be beneficial to play tricks
1433 if (subtract_flag_p
&& common
)
1437 => 4 + (test != 0). */
1438 else if (diff
> 0 && STORE_FLAG_VALUE
> 0)
1443 /* Is this (cond) ? 2^n : 0? */
1444 else if (ifalse
== 0 && pow2p_hwi (itrue
)
1445 && STORE_FLAG_VALUE
== 1)
1447 /* Is this (cond) ? 0 : 2^n? */
1448 else if (itrue
== 0 && pow2p_hwi (ifalse
) && can_reverse
1449 && STORE_FLAG_VALUE
== 1)
1454 /* Is this (cond) ? -1 : x? */
1455 else if (itrue
== -1
1456 && STORE_FLAG_VALUE
== -1)
1458 /* Is this (cond) ? x : -1? */
1459 else if (ifalse
== -1 && can_reverse
1460 && STORE_FLAG_VALUE
== -1)
1470 std::swap (itrue
, ifalse
);
1471 diff
= trunc_int_for_mode (-(unsigned HOST_WIDE_INT
) diff
, mode
);
1476 /* If we have x := test ? x + 3 : x + 4 then move the original
1477 x out of the way while we store flags. */
1478 if (common
&& rtx_equal_p (common
, if_info
->x
))
1480 common
= gen_reg_rtx (mode
);
1481 noce_emit_move_insn (common
, if_info
->x
);
1484 target
= noce_emit_store_flag (if_info
, if_info
->x
, reversep
, normalize
);
1491 /* if (test) x = 3; else x = 4;
1492 => x = 3 + (test == 0); */
1493 if (diff
== STORE_FLAG_VALUE
|| diff
== -STORE_FLAG_VALUE
)
1495 /* Add the common part now. This may allow combine to merge this
1496 with the store flag operation earlier into some sort of conditional
1497 increment/decrement if the target allows it. */
1499 target
= expand_simple_binop (mode
, PLUS
,
1501 target
, 0, OPTAB_WIDEN
);
1503 /* Always use ifalse here. It should have been swapped with itrue
1504 when appropriate when reversep is true. */
1505 target
= expand_simple_binop (mode
, subtract_flag_p
? MINUS
: PLUS
,
1506 gen_int_mode (ifalse
, mode
), target
,
1507 if_info
->x
, 0, OPTAB_WIDEN
);
1509 /* Other cases are not beneficial when the original A and B are PLUS
1516 /* if (test) x = 8; else x = 0;
1517 => x = (test != 0) << 3; */
1518 else if (ifalse
== 0 && (tmp
= exact_log2 (itrue
)) >= 0)
1520 target
= expand_simple_binop (mode
, ASHIFT
,
1521 target
, GEN_INT (tmp
), if_info
->x
, 0,
1525 /* if (test) x = -1; else x = b;
1526 => x = -(test != 0) | b; */
1527 else if (itrue
== -1)
1529 target
= expand_simple_binop (mode
, IOR
,
1530 target
, gen_int_mode (ifalse
, mode
),
1531 if_info
->x
, 0, OPTAB_WIDEN
);
1545 if (target
!= if_info
->x
)
1546 noce_emit_move_insn (if_info
->x
, target
);
1548 seq
= end_ifcvt_sequence (if_info
);
1549 if (!seq
|| !targetm
.noce_conversion_profitable_p (seq
, if_info
))
1552 emit_insn_before_setloc (seq
, if_info
->jump
,
1553 INSN_LOCATION (if_info
->insn_a
));
1554 if_info
->transform_name
= "noce_try_store_flag_constants";
1562 /* Convert "if (test) foo++" into "foo += (test != 0)", and
1563 similarly for "foo--". */
1566 noce_try_addcc (struct noce_if_info
*if_info
)
1573 if (!noce_simple_bbs (if_info
))
1576 if (GET_CODE (if_info
->a
) == PLUS
1577 && rtx_equal_p (XEXP (if_info
->a
, 0), if_info
->b
)
1578 && noce_reversed_cond_code (if_info
) != UNKNOWN
)
1580 rtx cond
= if_info
->rev_cond
;
1583 if (cond
== NULL_RTX
)
1585 cond
= if_info
->cond
;
1586 code
= reversed_comparison_code (cond
, if_info
->jump
);
1589 code
= GET_CODE (cond
);
1591 /* First try to use addcc pattern. */
1592 if (general_operand (XEXP (cond
, 0), VOIDmode
)
1593 && general_operand (XEXP (cond
, 1), VOIDmode
))
1596 target
= emit_conditional_add (if_info
->x
, code
,
1601 XEXP (if_info
->a
, 1),
1602 GET_MODE (if_info
->x
),
1603 (code
== LTU
|| code
== GEU
1604 || code
== LEU
|| code
== GTU
));
1607 if (target
!= if_info
->x
)
1608 noce_emit_move_insn (if_info
->x
, target
);
1610 seq
= end_ifcvt_sequence (if_info
);
1611 if (!seq
|| !targetm
.noce_conversion_profitable_p (seq
, if_info
))
1614 emit_insn_before_setloc (seq
, if_info
->jump
,
1615 INSN_LOCATION (if_info
->insn_a
));
1616 if_info
->transform_name
= "noce_try_addcc";
1623 /* If that fails, construct conditional increment or decrement using
1624 setcc. We're changing a branch and an increment to a comparison and
1626 if (XEXP (if_info
->a
, 1) == const1_rtx
1627 || XEXP (if_info
->a
, 1) == constm1_rtx
)
1630 if (STORE_FLAG_VALUE
== INTVAL (XEXP (if_info
->a
, 1)))
1631 subtract
= false, normalize
= 0;
1632 else if (-STORE_FLAG_VALUE
== INTVAL (XEXP (if_info
->a
, 1)))
1633 subtract
= true, normalize
= 0;
1635 subtract
= false, normalize
= INTVAL (XEXP (if_info
->a
, 1));
1638 target
= noce_emit_store_flag (if_info
,
1639 gen_reg_rtx (GET_MODE (if_info
->x
)),
1643 target
= expand_simple_binop (GET_MODE (if_info
->x
),
1644 subtract
? MINUS
: PLUS
,
1645 if_info
->b
, target
, if_info
->x
,
1649 if (target
!= if_info
->x
)
1650 noce_emit_move_insn (if_info
->x
, target
);
1652 seq
= end_ifcvt_sequence (if_info
);
1653 if (!seq
|| !targetm
.noce_conversion_profitable_p (seq
, if_info
))
1656 emit_insn_before_setloc (seq
, if_info
->jump
,
1657 INSN_LOCATION (if_info
->insn_a
));
1658 if_info
->transform_name
= "noce_try_addcc";
1668 /* Convert "if (test) x = 0;" to "x &= -(test == 0);" */
1671 noce_try_store_flag_mask (struct noce_if_info
*if_info
)
1677 if (!noce_simple_bbs (if_info
))
1682 if ((if_info
->a
== const0_rtx
1683 && (REG_P (if_info
->b
) || rtx_equal_p (if_info
->b
, if_info
->x
)))
1684 || ((reversep
= (noce_reversed_cond_code (if_info
) != UNKNOWN
))
1685 && if_info
->b
== const0_rtx
1686 && (REG_P (if_info
->a
) || rtx_equal_p (if_info
->a
, if_info
->x
))))
1689 target
= noce_emit_store_flag (if_info
,
1690 gen_reg_rtx (GET_MODE (if_info
->x
)),
1693 target
= expand_simple_binop (GET_MODE (if_info
->x
), AND
,
1694 reversep
? if_info
->a
: if_info
->b
,
1695 target
, if_info
->x
, 0,
1700 if (target
!= if_info
->x
)
1701 noce_emit_move_insn (if_info
->x
, target
);
1703 seq
= end_ifcvt_sequence (if_info
);
1704 if (!seq
|| !targetm
.noce_conversion_profitable_p (seq
, if_info
))
1707 emit_insn_before_setloc (seq
, if_info
->jump
,
1708 INSN_LOCATION (if_info
->insn_a
));
1709 if_info
->transform_name
= "noce_try_store_flag_mask";
1720 /* Helper function for noce_try_cmove and noce_try_cmove_arith. */
1723 noce_emit_cmove (struct noce_if_info
*if_info
, rtx x
, enum rtx_code code
,
1724 rtx cmp_a
, rtx cmp_b
, rtx vfalse
, rtx vtrue
, rtx cc_cmp
,
1727 rtx target ATTRIBUTE_UNUSED
;
1728 bool unsignedp ATTRIBUTE_UNUSED
;
1730 /* If earliest == jump, try to build the cmove insn directly.
1731 This is helpful when combine has created some complex condition
1732 (like for alpha's cmovlbs) that we can't hope to regenerate
1733 through the normal interface. */
1735 if (if_info
->cond_earliest
== if_info
->jump
)
1737 rtx cond
= gen_rtx_fmt_ee (code
, GET_MODE (if_info
->cond
), cmp_a
, cmp_b
);
1738 rtx if_then_else
= gen_rtx_IF_THEN_ELSE (GET_MODE (x
),
1739 cond
, vtrue
, vfalse
);
1740 rtx set
= gen_rtx_SET (x
, if_then_else
);
1743 rtx_insn
*insn
= emit_insn (set
);
1745 if (recog_memoized (insn
) >= 0)
1747 rtx_insn
*seq
= get_insns ();
1757 unsignedp
= (code
== LTU
|| code
== GEU
1758 || code
== LEU
|| code
== GTU
);
1760 if (cc_cmp
!= NULL_RTX
&& rev_cc_cmp
!= NULL_RTX
)
1761 target
= emit_conditional_move (x
, cc_cmp
, rev_cc_cmp
,
1762 vtrue
, vfalse
, GET_MODE (x
));
1765 /* Don't even try if the comparison operands are weird
1766 except that the target supports cbranchcc4. */
1767 if (! general_operand (cmp_a
, GET_MODE (cmp_a
))
1768 || ! general_operand (cmp_b
, GET_MODE (cmp_b
)))
1770 if (!have_cbranchcc4
1771 || GET_MODE_CLASS (GET_MODE (cmp_a
)) != MODE_CC
1772 || cmp_b
!= const0_rtx
)
1776 target
= emit_conditional_move (x
, { code
, cmp_a
, cmp_b
, VOIDmode
},
1777 vtrue
, vfalse
, GET_MODE (x
),
1784 /* We might be faced with a situation like:
1787 vtrue = (subreg:M (reg:N VTRUE) BYTE)
1788 vfalse = (subreg:M (reg:N VFALSE) BYTE)
1790 We can't do a conditional move in mode M, but it's possible that we
1791 could do a conditional move in mode N instead and take a subreg of
1794 If we can't create new pseudos, though, don't bother. */
1795 if (reload_completed
)
1798 if (GET_CODE (vtrue
) == SUBREG
&& GET_CODE (vfalse
) == SUBREG
)
1800 rtx reg_vtrue
= SUBREG_REG (vtrue
);
1801 rtx reg_vfalse
= SUBREG_REG (vfalse
);
1802 poly_uint64 byte_vtrue
= SUBREG_BYTE (vtrue
);
1803 poly_uint64 byte_vfalse
= SUBREG_BYTE (vfalse
);
1804 rtx promoted_target
;
1806 if (GET_MODE (reg_vtrue
) != GET_MODE (reg_vfalse
)
1807 || maybe_ne (byte_vtrue
, byte_vfalse
)
1808 || (SUBREG_PROMOTED_VAR_P (vtrue
)
1809 != SUBREG_PROMOTED_VAR_P (vfalse
))
1810 || (SUBREG_PROMOTED_GET (vtrue
)
1811 != SUBREG_PROMOTED_GET (vfalse
)))
1814 promoted_target
= gen_reg_rtx (GET_MODE (reg_vtrue
));
1816 target
= emit_conditional_move (promoted_target
,
1817 { code
, cmp_a
, cmp_b
, VOIDmode
},
1818 reg_vtrue
, reg_vfalse
,
1819 GET_MODE (reg_vtrue
), unsignedp
);
1820 /* Nope, couldn't do it in that mode either. */
1824 target
= gen_rtx_SUBREG (GET_MODE (vtrue
), promoted_target
, byte_vtrue
);
1825 SUBREG_PROMOTED_VAR_P (target
) = SUBREG_PROMOTED_VAR_P (vtrue
);
1826 SUBREG_PROMOTED_SET (target
, SUBREG_PROMOTED_GET (vtrue
));
1827 emit_move_insn (x
, target
);
1834 /* Try only simple constants and registers here. More complex cases
1835 are handled in noce_try_cmove_arith after noce_try_store_flag_arith
1836 has had a go at it. */
1839 noce_try_cmove (struct noce_if_info
*if_info
)
1845 if (!noce_simple_bbs (if_info
))
1848 if ((CONSTANT_P (if_info
->a
) || register_operand (if_info
->a
, VOIDmode
))
1849 && (CONSTANT_P (if_info
->b
) || register_operand (if_info
->b
, VOIDmode
)))
1853 code
= GET_CODE (if_info
->cond
);
1854 target
= noce_emit_cmove (if_info
, if_info
->x
, code
,
1855 XEXP (if_info
->cond
, 0),
1856 XEXP (if_info
->cond
, 1),
1857 if_info
->a
, if_info
->b
);
1861 if (target
!= if_info
->x
)
1862 noce_emit_move_insn (if_info
->x
, target
);
1864 seq
= end_ifcvt_sequence (if_info
);
1865 if (!seq
|| !targetm
.noce_conversion_profitable_p (seq
, if_info
))
1868 emit_insn_before_setloc (seq
, if_info
->jump
,
1869 INSN_LOCATION (if_info
->insn_a
));
1870 if_info
->transform_name
= "noce_try_cmove";
1874 /* If both a and b are constants try a last-ditch transformation:
1875 if (test) x = a; else x = b;
1876 => x = (-(test != 0) & (b - a)) + a;
1877 Try this only if the target-specific expansion above has failed.
1878 The target-specific expander may want to generate sequences that
1879 we don't know about, so give them a chance before trying this
1881 else if (!targetm
.have_conditional_execution ()
1882 && CONST_INT_P (if_info
->a
) && CONST_INT_P (if_info
->b
))
1884 machine_mode mode
= GET_MODE (if_info
->x
);
1885 HOST_WIDE_INT ifalse
= INTVAL (if_info
->a
);
1886 HOST_WIDE_INT itrue
= INTVAL (if_info
->b
);
1887 rtx target
= noce_emit_store_flag (if_info
, if_info
->x
, false, -1);
1894 HOST_WIDE_INT diff
= (unsigned HOST_WIDE_INT
) itrue
- ifalse
;
1895 /* Make sure we can represent the difference
1896 between the two values. */
1898 != ((ifalse
< 0) != (itrue
< 0) ? ifalse
< 0 : ifalse
< itrue
))
1904 diff
= trunc_int_for_mode (diff
, mode
);
1905 target
= expand_simple_binop (mode
, AND
,
1906 target
, gen_int_mode (diff
, mode
),
1907 if_info
->x
, 0, OPTAB_WIDEN
);
1909 target
= expand_simple_binop (mode
, PLUS
,
1910 target
, gen_int_mode (ifalse
, mode
),
1911 if_info
->x
, 0, OPTAB_WIDEN
);
1914 if (target
!= if_info
->x
)
1915 noce_emit_move_insn (if_info
->x
, target
);
1917 seq
= end_ifcvt_sequence (if_info
);
1918 if (!seq
|| !targetm
.noce_conversion_profitable_p (seq
, if_info
))
1921 emit_insn_before_setloc (seq
, if_info
->jump
,
1922 INSN_LOCATION (if_info
->insn_a
));
1923 if_info
->transform_name
= "noce_try_cmove";
1939 /* Return true if X contains a conditional code mode rtx. */
1942 contains_ccmode_rtx_p (rtx x
)
1944 subrtx_iterator::array_type array
;
1945 FOR_EACH_SUBRTX (iter
, array
, x
, ALL
)
1946 if (GET_MODE_CLASS (GET_MODE (*iter
)) == MODE_CC
)
1952 /* Helper for bb_valid_for_noce_process_p. Validate that
1953 the rtx insn INSN is a single set that does not set
1954 the conditional register CC and is in general valid for
1958 insn_valid_noce_process_p (rtx_insn
*insn
, rtx cc
)
1961 || !NONJUMP_INSN_P (insn
)
1962 || (cc
&& set_of (cc
, insn
)))
1965 rtx sset
= single_set (insn
);
1967 /* Currently support only simple single sets in test_bb. */
1969 || !noce_operand_ok (SET_DEST (sset
))
1970 || contains_ccmode_rtx_p (SET_DEST (sset
))
1971 || !noce_operand_ok (SET_SRC (sset
)))
1978 /* Return true iff the registers that the insns in BB_A set do not get
1979 used in BB_B. If TO_RENAME is non-NULL then it is a location that will be
1980 renamed later by the caller and so conflicts on it should be ignored
1981 in this function. */
1984 bbs_ok_for_cmove_arith (basic_block bb_a
, basic_block bb_b
, rtx to_rename
)
1987 bitmap bba_sets
= BITMAP_ALLOC (®_obstack
);
1992 FOR_BB_INSNS (bb_a
, a_insn
)
1994 if (!active_insn_p (a_insn
))
1997 rtx sset_a
= single_set (a_insn
);
2001 BITMAP_FREE (bba_sets
);
2004 /* Record all registers that BB_A sets. */
2005 FOR_EACH_INSN_DEF (def
, a_insn
)
2006 if (!(to_rename
&& DF_REF_REG (def
) == to_rename
))
2007 bitmap_set_bit (bba_sets
, DF_REF_REGNO (def
));
2012 FOR_BB_INSNS (bb_b
, b_insn
)
2014 if (!active_insn_p (b_insn
))
2017 rtx sset_b
= single_set (b_insn
);
2021 BITMAP_FREE (bba_sets
);
2025 /* Make sure this is a REG and not some instance
2026 of ZERO_EXTRACT or non-paradoxical SUBREG or other dangerous stuff.
2027 If we have a memory destination then we have a pair of simple
2028 basic blocks performing an operation of the form [addr] = c ? a : b.
2029 bb_valid_for_noce_process_p will have ensured that these are
2030 the only stores present. In that case [addr] should be the location
2031 to be renamed. Assert that the callers set this up properly. */
2032 if (MEM_P (SET_DEST (sset_b
)))
2033 gcc_assert (rtx_equal_p (SET_DEST (sset_b
), to_rename
));
2034 else if (!REG_P (SET_DEST (sset_b
))
2035 && !paradoxical_subreg_p (SET_DEST (sset_b
)))
2037 BITMAP_FREE (bba_sets
);
2041 /* If the insn uses a reg set in BB_A return false. */
2042 FOR_EACH_INSN_USE (use
, b_insn
)
2044 if (bitmap_bit_p (bba_sets
, DF_REF_REGNO (use
)))
2046 BITMAP_FREE (bba_sets
);
2053 BITMAP_FREE (bba_sets
);
2057 /* Emit copies of all the active instructions in BB except the last.
2058 This is a helper for noce_try_cmove_arith. */
2061 noce_emit_all_but_last (basic_block bb
)
2063 rtx_insn
*last
= last_active_insn (bb
, false);
2065 FOR_BB_INSNS (bb
, insn
)
2067 if (insn
!= last
&& active_insn_p (insn
))
2069 rtx_insn
*to_emit
= as_a
<rtx_insn
*> (copy_rtx (insn
));
2071 emit_insn (PATTERN (to_emit
));
2076 /* Helper for noce_try_cmove_arith. Emit the pattern TO_EMIT and return
2077 the resulting insn or NULL if it's not a valid insn. */
2080 noce_emit_insn (rtx to_emit
)
2082 gcc_assert (to_emit
);
2083 rtx_insn
*insn
= emit_insn (to_emit
);
2085 if (recog_memoized (insn
) < 0)
2091 /* Helper for noce_try_cmove_arith. Emit a copy of the insns up to
2092 and including the penultimate one in BB if it is not simple
2093 (as indicated by SIMPLE). Then emit LAST_INSN as the last
2094 insn in the block. The reason for that is that LAST_INSN may
2095 have been modified by the preparation in noce_try_cmove_arith. */
2098 noce_emit_bb (rtx last_insn
, basic_block bb
, bool simple
)
2101 noce_emit_all_but_last (bb
);
2103 if (last_insn
&& !noce_emit_insn (last_insn
))
2109 /* Try more complex cases involving conditional_move. */
2112 noce_try_cmove_arith (struct noce_if_info
*if_info
)
2118 rtx_insn
*insn_a
, *insn_b
;
2119 bool a_simple
= if_info
->then_simple
;
2120 bool b_simple
= if_info
->else_simple
;
2121 basic_block then_bb
= if_info
->then_bb
;
2122 basic_block else_bb
= if_info
->else_bb
;
2124 bool is_mem
= false;
2126 rtx cond
= if_info
->cond
;
2127 rtx_insn
*ifcvt_seq
;
2129 /* A conditional move from two memory sources is equivalent to a
2130 conditional on their addresses followed by a load. Don't do this
2131 early because it'll screw alias analysis. Note that we've
2132 already checked for no side effects. */
2133 if (cse_not_expected
2134 && MEM_P (a
) && MEM_P (b
)
2135 && MEM_ADDR_SPACE (a
) == MEM_ADDR_SPACE (b
))
2137 machine_mode address_mode
= get_address_mode (a
);
2141 x
= gen_reg_rtx (address_mode
);
2145 /* ??? We could handle this if we knew that a load from A or B could
2146 not trap or fault. This is also true if we've already loaded
2147 from the address along the path from ENTRY. */
2148 else if (may_trap_or_fault_p (a
) || may_trap_or_fault_p (b
))
2151 /* if (test) x = a + b; else x = c - d;
2158 code
= GET_CODE (cond
);
2159 insn_a
= if_info
->insn_a
;
2160 insn_b
= if_info
->insn_b
;
2162 machine_mode x_mode
= GET_MODE (x
);
2164 if (!can_conditionally_move_p (x_mode
))
2167 /* Possibly rearrange operands to make things come out more natural. */
2168 if (noce_reversed_cond_code (if_info
) != UNKNOWN
)
2170 bool reversep
= false;
2171 if (rtx_equal_p (b
, x
))
2173 else if (general_operand (b
, GET_MODE (b
)))
2178 if (if_info
->rev_cond
)
2180 cond
= if_info
->rev_cond
;
2181 code
= GET_CODE (cond
);
2184 code
= reversed_comparison_code (cond
, if_info
->jump
);
2186 std::swap (insn_a
, insn_b
);
2187 std::swap (a_simple
, b_simple
);
2188 std::swap (then_bb
, else_bb
);
2192 if (then_bb
&& else_bb
2193 && (!bbs_ok_for_cmove_arith (then_bb
, else_bb
, if_info
->orig_x
)
2194 || !bbs_ok_for_cmove_arith (else_bb
, then_bb
, if_info
->orig_x
)))
2199 /* If one of the blocks is empty then the corresponding B or A value
2200 came from the test block. The non-empty complex block that we will
2201 emit might clobber the register used by B or A, so move it to a pseudo
2204 rtx tmp_a
= NULL_RTX
;
2205 rtx tmp_b
= NULL_RTX
;
2207 if (b_simple
|| !else_bb
)
2208 tmp_b
= gen_reg_rtx (x_mode
);
2210 if (a_simple
|| !then_bb
)
2211 tmp_a
= gen_reg_rtx (x_mode
);
2216 rtx emit_a
= NULL_RTX
;
2217 rtx emit_b
= NULL_RTX
;
2218 rtx_insn
*tmp_insn
= NULL
;
2219 bool modified_in_a
= false;
2220 bool modified_in_b
= false;
2221 /* If either operand is complex, load it into a register first.
2222 The best way to do this is to copy the original insn. In this
2223 way we preserve any clobbers etc that the insn may have had.
2224 This is of course not possible in the IS_MEM case. */
2226 if (! general_operand (a
, GET_MODE (a
)) || tmp_a
)
2231 rtx reg
= gen_reg_rtx (GET_MODE (a
));
2232 emit_a
= gen_rtx_SET (reg
, a
);
2238 a
= tmp_a
? tmp_a
: gen_reg_rtx (GET_MODE (a
));
2240 rtx_insn
*copy_of_a
= as_a
<rtx_insn
*> (copy_rtx (insn_a
));
2241 rtx set
= single_set (copy_of_a
);
2244 emit_a
= PATTERN (copy_of_a
);
2248 rtx tmp_reg
= tmp_a
? tmp_a
: gen_reg_rtx (GET_MODE (a
));
2249 emit_a
= gen_rtx_SET (tmp_reg
, a
);
2255 if (! general_operand (b
, GET_MODE (b
)) || tmp_b
)
2259 rtx reg
= gen_reg_rtx (GET_MODE (b
));
2260 emit_b
= gen_rtx_SET (reg
, b
);
2266 b
= tmp_b
? tmp_b
: gen_reg_rtx (GET_MODE (b
));
2267 rtx_insn
*copy_of_b
= as_a
<rtx_insn
*> (copy_rtx (insn_b
));
2268 rtx set
= single_set (copy_of_b
);
2271 emit_b
= PATTERN (copy_of_b
);
2275 rtx tmp_reg
= tmp_b
? tmp_b
: gen_reg_rtx (GET_MODE (b
));
2276 emit_b
= gen_rtx_SET (tmp_reg
, b
);
2282 modified_in_a
= emit_a
!= NULL_RTX
&& modified_in_p (orig_b
, emit_a
);
2283 if (tmp_b
&& then_bb
)
2285 FOR_BB_INSNS (then_bb
, tmp_insn
)
2286 /* Don't check inside insn_a. We will have changed it to emit_a
2287 with a destination that doesn't conflict. */
2288 if (!(insn_a
&& tmp_insn
== insn_a
)
2289 && modified_in_p (orig_b
, tmp_insn
))
2291 modified_in_a
= true;
2297 modified_in_b
= emit_b
!= NULL_RTX
&& modified_in_p (orig_a
, emit_b
);
2298 if (tmp_a
&& else_bb
)
2300 FOR_BB_INSNS (else_bb
, tmp_insn
)
2301 /* Don't check inside insn_b. We will have changed it to emit_b
2302 with a destination that doesn't conflict. */
2303 if (!(insn_b
&& tmp_insn
== insn_b
)
2304 && modified_in_p (orig_a
, tmp_insn
))
2306 modified_in_b
= true;
2311 /* If insn to set up A clobbers any registers B depends on, try to
2312 swap insn that sets up A with the one that sets up B. If even
2313 that doesn't help, punt. */
2314 if (modified_in_a
&& !modified_in_b
)
2316 if (!noce_emit_bb (emit_b
, else_bb
, b_simple
))
2317 goto end_seq_and_fail
;
2319 if (!noce_emit_bb (emit_a
, then_bb
, a_simple
))
2320 goto end_seq_and_fail
;
2322 else if (!modified_in_a
)
2324 if (!noce_emit_bb (emit_a
, then_bb
, a_simple
))
2325 goto end_seq_and_fail
;
2327 if (!noce_emit_bb (emit_b
, else_bb
, b_simple
))
2328 goto end_seq_and_fail
;
2331 goto end_seq_and_fail
;
2333 target
= noce_emit_cmove (if_info
, x
, code
, XEXP (cond
, 0), XEXP (cond
, 1),
2337 goto end_seq_and_fail
;
2339 /* If we're handling a memory for above, emit the load now. */
2342 rtx mem
= gen_rtx_MEM (GET_MODE (if_info
->x
), target
);
2344 /* Copy over flags as appropriate. */
2345 if (MEM_VOLATILE_P (if_info
->a
) || MEM_VOLATILE_P (if_info
->b
))
2346 MEM_VOLATILE_P (mem
) = 1;
2347 if (MEM_ALIAS_SET (if_info
->a
) == MEM_ALIAS_SET (if_info
->b
))
2348 set_mem_alias_set (mem
, MEM_ALIAS_SET (if_info
->a
));
2350 MIN (MEM_ALIGN (if_info
->a
), MEM_ALIGN (if_info
->b
)));
2352 gcc_assert (MEM_ADDR_SPACE (if_info
->a
) == MEM_ADDR_SPACE (if_info
->b
));
2353 set_mem_addr_space (mem
, MEM_ADDR_SPACE (if_info
->a
));
2355 noce_emit_move_insn (if_info
->x
, mem
);
2357 else if (target
!= x
)
2358 noce_emit_move_insn (x
, target
);
2360 ifcvt_seq
= end_ifcvt_sequence (if_info
);
2361 if (!ifcvt_seq
|| !targetm
.noce_conversion_profitable_p (ifcvt_seq
, if_info
))
2364 emit_insn_before_setloc (ifcvt_seq
, if_info
->jump
,
2365 INSN_LOCATION (if_info
->insn_a
));
2366 if_info
->transform_name
= "noce_try_cmove_arith";
2374 /* For most cases, the simplified condition we found is the best
2375 choice, but this is not the case for the min/max/abs transforms.
2376 For these we wish to know that it is A or B in the condition. */
2379 noce_get_alt_condition (struct noce_if_info
*if_info
, rtx target
,
2380 rtx_insn
**earliest
)
2386 /* If target is already mentioned in the known condition, return it. */
2387 if (reg_mentioned_p (target
, if_info
->cond
))
2389 *earliest
= if_info
->cond_earliest
;
2390 return if_info
->cond
;
2393 set
= pc_set (if_info
->jump
);
2394 cond
= XEXP (SET_SRC (set
), 0);
2396 = GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
2397 && label_ref_label (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (if_info
->jump
);
2398 if (if_info
->then_else_reversed
)
2401 /* If we're looking for a constant, try to make the conditional
2402 have that constant in it. There are two reasons why it may
2403 not have the constant we want:
2405 1. GCC may have needed to put the constant in a register, because
2406 the target can't compare directly against that constant. For
2407 this case, we look for a SET immediately before the comparison
2408 that puts a constant in that register.
2410 2. GCC may have canonicalized the conditional, for example
2411 replacing "if x < 4" with "if x <= 3". We can undo that (or
2412 make equivalent types of changes) to get the constants we need
2413 if they're off by one in the right direction. */
2415 if (CONST_INT_P (target
))
2417 enum rtx_code code
= GET_CODE (if_info
->cond
);
2418 rtx op_a
= XEXP (if_info
->cond
, 0);
2419 rtx op_b
= XEXP (if_info
->cond
, 1);
2420 rtx_insn
*prev_insn
;
2422 /* First, look to see if we put a constant in a register. */
2423 prev_insn
= prev_nonnote_nondebug_insn (if_info
->cond_earliest
);
2425 && BLOCK_FOR_INSN (prev_insn
)
2426 == BLOCK_FOR_INSN (if_info
->cond_earliest
)
2427 && INSN_P (prev_insn
)
2428 && GET_CODE (PATTERN (prev_insn
)) == SET
)
2430 rtx src
= find_reg_equal_equiv_note (prev_insn
);
2432 src
= SET_SRC (PATTERN (prev_insn
));
2433 if (CONST_INT_P (src
))
2435 if (rtx_equal_p (op_a
, SET_DEST (PATTERN (prev_insn
))))
2437 else if (rtx_equal_p (op_b
, SET_DEST (PATTERN (prev_insn
))))
2440 if (CONST_INT_P (op_a
))
2442 std::swap (op_a
, op_b
);
2443 code
= swap_condition (code
);
2448 /* Now, look to see if we can get the right constant by
2449 adjusting the conditional. */
2450 if (CONST_INT_P (op_b
))
2452 HOST_WIDE_INT desired_val
= INTVAL (target
);
2453 HOST_WIDE_INT actual_val
= INTVAL (op_b
);
2458 if (desired_val
!= HOST_WIDE_INT_MAX
2459 && actual_val
== desired_val
+ 1)
2462 op_b
= GEN_INT (desired_val
);
2466 if (desired_val
!= HOST_WIDE_INT_MIN
2467 && actual_val
== desired_val
- 1)
2470 op_b
= GEN_INT (desired_val
);
2474 if (desired_val
!= HOST_WIDE_INT_MIN
2475 && actual_val
== desired_val
- 1)
2478 op_b
= GEN_INT (desired_val
);
2482 if (desired_val
!= HOST_WIDE_INT_MAX
2483 && actual_val
== desired_val
+ 1)
2486 op_b
= GEN_INT (desired_val
);
2494 /* If we made any changes, generate a new conditional that is
2495 equivalent to what we started with, but has the right
2497 if (code
!= GET_CODE (if_info
->cond
)
2498 || op_a
!= XEXP (if_info
->cond
, 0)
2499 || op_b
!= XEXP (if_info
->cond
, 1))
2501 cond
= gen_rtx_fmt_ee (code
, GET_MODE (cond
), op_a
, op_b
);
2502 *earliest
= if_info
->cond_earliest
;
2507 cond
= canonicalize_condition (if_info
->jump
, cond
, reverse
,
2508 earliest
, target
, have_cbranchcc4
, true);
2509 if (! cond
|| ! reg_mentioned_p (target
, cond
))
2512 /* We almost certainly searched back to a different place.
2513 Need to re-verify correct lifetimes. */
2515 /* X may not be mentioned in the range (cond_earliest, jump]. */
2516 for (insn
= if_info
->jump
; insn
!= *earliest
; insn
= PREV_INSN (insn
))
2517 if (INSN_P (insn
) && reg_overlap_mentioned_p (if_info
->x
, PATTERN (insn
)))
2520 /* A and B may not be modified in the range [cond_earliest, jump). */
2521 for (insn
= *earliest
; insn
!= if_info
->jump
; insn
= NEXT_INSN (insn
))
2523 && (modified_in_p (if_info
->a
, insn
)
2524 || modified_in_p (if_info
->b
, insn
)))
2530 /* Convert "if (a < b) x = a; else x = b;" to "x = min(a, b);", etc. */
2533 noce_try_minmax (struct noce_if_info
*if_info
)
2536 rtx_insn
*earliest
, *seq
;
2537 enum rtx_code code
, op
;
2540 if (!noce_simple_bbs (if_info
))
2543 /* ??? Reject modes with NaNs or signed zeros since we don't know how
2544 they will be resolved with an SMIN/SMAX. It wouldn't be too hard
2545 to get the target to tell us... */
2546 if (HONOR_SIGNED_ZEROS (if_info
->x
)
2547 || HONOR_NANS (if_info
->x
))
2550 cond
= noce_get_alt_condition (if_info
, if_info
->a
, &earliest
);
2554 /* Verify the condition is of the form we expect, and canonicalize
2555 the comparison code. */
2556 code
= GET_CODE (cond
);
2557 if (rtx_equal_p (XEXP (cond
, 0), if_info
->a
))
2559 if (! rtx_equal_p (XEXP (cond
, 1), if_info
->b
))
2562 else if (rtx_equal_p (XEXP (cond
, 1), if_info
->a
))
2564 if (! rtx_equal_p (XEXP (cond
, 0), if_info
->b
))
2566 code
= swap_condition (code
);
2571 /* Determine what sort of operation this is. Note that the code is for
2572 a taken branch, so the code->operation mapping appears backwards. */
2605 target
= expand_simple_binop (GET_MODE (if_info
->x
), op
,
2606 if_info
->a
, if_info
->b
,
2607 if_info
->x
, unsignedp
, OPTAB_WIDEN
);
2613 if (target
!= if_info
->x
)
2614 noce_emit_move_insn (if_info
->x
, target
);
2616 seq
= end_ifcvt_sequence (if_info
);
2620 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2621 if_info
->cond
= cond
;
2622 if_info
->cond_earliest
= earliest
;
2623 if_info
->rev_cond
= NULL_RTX
;
2624 if_info
->transform_name
= "noce_try_minmax";
2629 /* Convert "if (a < 0) x = -a; else x = a;" to "x = abs(a);",
2630 "if (a < 0) x = ~a; else x = a;" to "x = one_cmpl_abs(a);",
2634 noce_try_abs (struct noce_if_info
*if_info
)
2636 rtx cond
, target
, a
, b
, c
;
2637 rtx_insn
*earliest
, *seq
;
2639 bool one_cmpl
= false;
2641 if (!noce_simple_bbs (if_info
))
2644 /* Reject modes with signed zeros. */
2645 if (HONOR_SIGNED_ZEROS (if_info
->x
))
2648 /* Recognize A and B as constituting an ABS or NABS. The canonical
2649 form is a branch around the negation, taken when the object is the
2650 first operand of a comparison against 0 that evaluates to true. */
2653 if (GET_CODE (a
) == NEG
&& rtx_equal_p (XEXP (a
, 0), b
))
2655 else if (GET_CODE (b
) == NEG
&& rtx_equal_p (XEXP (b
, 0), a
))
2660 else if (GET_CODE (a
) == NOT
&& rtx_equal_p (XEXP (a
, 0), b
))
2665 else if (GET_CODE (b
) == NOT
&& rtx_equal_p (XEXP (b
, 0), a
))
2674 cond
= noce_get_alt_condition (if_info
, b
, &earliest
);
2678 /* Verify the condition is of the form we expect. */
2679 if (rtx_equal_p (XEXP (cond
, 0), b
))
2681 else if (rtx_equal_p (XEXP (cond
, 1), b
))
2689 /* Verify that C is zero. Search one step backward for a
2690 REG_EQUAL note or a simple source if necessary. */
2694 rtx_insn
*insn
= prev_nonnote_nondebug_insn (earliest
);
2696 && BLOCK_FOR_INSN (insn
) == BLOCK_FOR_INSN (earliest
)
2697 && (set
= single_set (insn
))
2698 && rtx_equal_p (SET_DEST (set
), c
))
2700 rtx note
= find_reg_equal_equiv_note (insn
);
2710 && GET_CODE (XEXP (c
, 0)) == SYMBOL_REF
2711 && CONSTANT_POOL_ADDRESS_P (XEXP (c
, 0)))
2712 c
= get_pool_constant (XEXP (c
, 0));
2714 /* Work around funny ideas get_condition has wrt canonicalization.
2715 Note that these rtx constants are known to be CONST_INT, and
2716 therefore imply integer comparisons.
2717 The one_cmpl case is more complicated, as we want to handle
2718 only x < 0 ? ~x : x or x >= 0 ? x : ~x to one_cmpl_abs (x)
2719 and x < 0 ? x : ~x or x >= 0 ? ~x : x to ~one_cmpl_abs (x),
2720 but not other cases (x > -1 is equivalent of x >= 0). */
2721 if (c
== constm1_rtx
&& GET_CODE (cond
) == GT
)
2723 else if (c
== const1_rtx
&& GET_CODE (cond
) == LT
)
2728 else if (c
== CONST0_RTX (GET_MODE (b
)))
2731 && GET_CODE (cond
) != GE
2732 && GET_CODE (cond
) != LT
)
2738 /* Determine what sort of operation this is. */
2739 switch (GET_CODE (cond
))
2758 target
= expand_one_cmpl_abs_nojump (GET_MODE (if_info
->x
), b
,
2761 target
= expand_abs_nojump (GET_MODE (if_info
->x
), b
, if_info
->x
, 1);
2763 /* ??? It's a quandary whether cmove would be better here, especially
2764 for integers. Perhaps combine will clean things up. */
2765 if (target
&& negate
)
2768 target
= expand_simple_unop (GET_MODE (target
), NOT
, target
,
2771 target
= expand_simple_unop (GET_MODE (target
), NEG
, target
,
2781 if (target
!= if_info
->x
)
2782 noce_emit_move_insn (if_info
->x
, target
);
2784 seq
= end_ifcvt_sequence (if_info
);
2788 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2789 if_info
->cond
= cond
;
2790 if_info
->cond_earliest
= earliest
;
2791 if_info
->rev_cond
= NULL_RTX
;
2792 if_info
->transform_name
= "noce_try_abs";
2797 /* Convert "if (m < 0) x = b; else x = 0;" to "x = (m >> C) & b;". */
2800 noce_try_sign_mask (struct noce_if_info
*if_info
)
2806 bool t_unconditional
;
2808 if (!noce_simple_bbs (if_info
))
2811 cond
= if_info
->cond
;
2812 code
= GET_CODE (cond
);
2817 if (if_info
->a
== const0_rtx
)
2819 if ((code
== LT
&& c
== const0_rtx
)
2820 || (code
== LE
&& c
== constm1_rtx
))
2823 else if (if_info
->b
== const0_rtx
)
2825 if ((code
== GE
&& c
== const0_rtx
)
2826 || (code
== GT
&& c
== constm1_rtx
))
2830 if (! t
|| side_effects_p (t
))
2833 /* We currently don't handle different modes. */
2834 mode
= GET_MODE (t
);
2835 if (GET_MODE (m
) != mode
)
2838 /* This is only profitable if T is unconditionally executed/evaluated in the
2839 original insn sequence or T is cheap and can't trap or fault. The former
2840 happens if B is the non-zero (T) value and if INSN_B was taken from
2841 TEST_BB, or there was no INSN_B which can happen for e.g. conditional
2842 stores to memory. For the cost computation use the block TEST_BB where
2843 the evaluation will end up after the transformation. */
2846 && (if_info
->insn_b
== NULL_RTX
2847 || BLOCK_FOR_INSN (if_info
->insn_b
) == if_info
->test_bb
));
2848 if (!(t_unconditional
2849 || ((set_src_cost (t
, mode
, if_info
->speed_p
)
2850 < COSTS_N_INSNS (2))
2851 && !may_trap_or_fault_p (t
))))
2854 if (!noce_can_force_operand (t
))
2858 /* Use emit_store_flag to generate "m < 0 ? -1 : 0" instead of expanding
2859 "(signed) m >> 31" directly. This benefits targets with specialized
2860 insns to obtain the signmask, but still uses ashr_optab otherwise. */
2861 m
= emit_store_flag (gen_reg_rtx (mode
), LT
, m
, const0_rtx
, mode
, 0, -1);
2862 t
= m
? expand_binop (mode
, and_optab
, m
, t
, NULL_RTX
, 0, OPTAB_DIRECT
)
2871 noce_emit_move_insn (if_info
->x
, t
);
2873 seq
= end_ifcvt_sequence (if_info
);
2877 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2878 if_info
->transform_name
= "noce_try_sign_mask";
2884 /* Optimize away "if (x & C) x |= C" and similar bit manipulation
2888 noce_try_bitop (struct noce_if_info
*if_info
)
2890 rtx cond
, x
, a
, result
;
2892 scalar_int_mode mode
;
2897 cond
= if_info
->cond
;
2898 code
= GET_CODE (cond
);
2900 /* Check for an integer operation. */
2901 if (!is_a
<scalar_int_mode
> (GET_MODE (x
), &mode
))
2904 if (!noce_simple_bbs (if_info
))
2907 /* Check for no else condition. */
2908 if (! rtx_equal_p (x
, if_info
->b
))
2911 /* Check for a suitable condition. */
2912 if (code
!= NE
&& code
!= EQ
)
2914 if (XEXP (cond
, 1) != const0_rtx
)
2916 cond
= XEXP (cond
, 0);
2918 /* ??? We could also handle AND here. */
2919 if (GET_CODE (cond
) == ZERO_EXTRACT
)
2921 if (XEXP (cond
, 1) != const1_rtx
2922 || !CONST_INT_P (XEXP (cond
, 2))
2923 || ! rtx_equal_p (x
, XEXP (cond
, 0)))
2925 bitnum
= INTVAL (XEXP (cond
, 2));
2926 if (BITS_BIG_ENDIAN
)
2927 bitnum
= GET_MODE_BITSIZE (mode
) - 1 - bitnum
;
2928 if (bitnum
< 0 || bitnum
>= HOST_BITS_PER_WIDE_INT
)
2935 if (GET_CODE (a
) == IOR
|| GET_CODE (a
) == XOR
)
2937 /* Check for "if (X & C) x = x op C". */
2938 if (! rtx_equal_p (x
, XEXP (a
, 0))
2939 || !CONST_INT_P (XEXP (a
, 1))
2940 || (INTVAL (XEXP (a
, 1)) & GET_MODE_MASK (mode
))
2941 != HOST_WIDE_INT_1U
<< bitnum
)
2944 /* if ((x & C) == 0) x |= C; is transformed to x |= C. */
2945 /* if ((x & C) != 0) x |= C; is transformed to nothing. */
2946 if (GET_CODE (a
) == IOR
)
2947 result
= (code
== NE
) ? a
: NULL_RTX
;
2948 else if (code
== NE
)
2950 /* if ((x & C) == 0) x ^= C; is transformed to x |= C. */
2951 result
= gen_int_mode (HOST_WIDE_INT_1
<< bitnum
, mode
);
2952 result
= simplify_gen_binary (IOR
, mode
, x
, result
);
2956 /* if ((x & C) != 0) x ^= C; is transformed to x &= ~C. */
2957 result
= gen_int_mode (~(HOST_WIDE_INT_1
<< bitnum
), mode
);
2958 result
= simplify_gen_binary (AND
, mode
, x
, result
);
2961 else if (GET_CODE (a
) == AND
)
2963 /* Check for "if (X & C) x &= ~C". */
2964 if (! rtx_equal_p (x
, XEXP (a
, 0))
2965 || !CONST_INT_P (XEXP (a
, 1))
2966 || (INTVAL (XEXP (a
, 1)) & GET_MODE_MASK (mode
))
2967 != (~(HOST_WIDE_INT_1
<< bitnum
) & GET_MODE_MASK (mode
)))
2970 /* if ((x & C) == 0) x &= ~C; is transformed to nothing. */
2971 /* if ((x & C) != 0) x &= ~C; is transformed to x &= ~C. */
2972 result
= (code
== EQ
) ? a
: NULL_RTX
;
2980 noce_emit_move_insn (x
, result
);
2981 seq
= end_ifcvt_sequence (if_info
);
2985 emit_insn_before_setloc (seq
, if_info
->jump
,
2986 INSN_LOCATION (if_info
->insn_a
));
2988 if_info
->transform_name
= "noce_try_bitop";
2993 /* Similar to get_condition, only the resulting condition must be
2994 valid at JUMP, instead of at EARLIEST.
2996 If THEN_ELSE_REVERSED is true, the fallthrough does not go to the
2997 THEN block of the caller, and we have to reverse the condition. */
3000 noce_get_condition (rtx_insn
*jump
, rtx_insn
**earliest
,
3001 bool then_else_reversed
)
3006 if (! any_condjump_p (jump
))
3009 set
= pc_set (jump
);
3011 /* If this branches to JUMP_LABEL when the condition is false,
3012 reverse the condition. */
3013 reverse
= (GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
3014 && label_ref_label (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (jump
));
3016 /* We may have to reverse because the caller's if block is not canonical,
3017 i.e. the THEN block isn't the fallthrough block for the TEST block
3018 (see find_if_header). */
3019 if (then_else_reversed
)
3022 /* If the condition variable is a register and is MODE_INT, accept it. */
3024 cond
= XEXP (SET_SRC (set
), 0);
3025 tmp
= XEXP (cond
, 0);
3026 if (REG_P (tmp
) && GET_MODE_CLASS (GET_MODE (tmp
)) == MODE_INT
3027 && (GET_MODE (tmp
) != BImode
3028 || !targetm
.small_register_classes_for_mode_p (BImode
)))
3033 cond
= gen_rtx_fmt_ee (reverse_condition (GET_CODE (cond
)),
3034 GET_MODE (cond
), tmp
, XEXP (cond
, 1));
3038 /* Otherwise, fall back on canonicalize_condition to do the dirty
3039 work of manipulating MODE_CC values and COMPARE rtx codes. */
3040 tmp
= canonicalize_condition (jump
, cond
, reverse
, earliest
,
3041 NULL_RTX
, have_cbranchcc4
, true);
3043 /* We don't handle side-effects in the condition, like handling
3044 REG_INC notes and making sure no duplicate conditions are emitted. */
3045 if (tmp
!= NULL_RTX
&& side_effects_p (tmp
))
3051 /* Return true if OP is ok for if-then-else processing. */
3054 noce_operand_ok (const_rtx op
)
3056 if (side_effects_p (op
))
3059 /* We special-case memories, so handle any of them with
3060 no address side effects. */
3062 return ! side_effects_p (XEXP (op
, 0));
3064 return ! may_trap_p (op
);
3067 /* Return true iff basic block TEST_BB is valid for noce if-conversion.
3068 The condition used in this if-conversion is in COND.
3069 In practice, check that TEST_BB ends with a single set
3070 x := a and all previous computations
3071 in TEST_BB don't produce any values that are live after TEST_BB.
3072 In other words, all the insns in TEST_BB are there only
3073 to compute a value for x. Add the rtx cost of the insns
3074 in TEST_BB to COST. Record whether TEST_BB is a single simple
3075 set instruction in SIMPLE_P. */
3078 bb_valid_for_noce_process_p (basic_block test_bb
, rtx cond
,
3079 unsigned int *cost
, bool *simple_p
)
3084 rtx_insn
*last_insn
= last_active_insn (test_bb
, false);
3085 rtx last_set
= NULL_RTX
;
3087 rtx cc
= cc_in_cond (cond
);
3089 if (!insn_valid_noce_process_p (last_insn
, cc
))
3092 /* Punt on blocks ending with asm goto or jumps with other side-effects,
3093 last_active_insn ignores JUMP_INSNs. */
3094 if (JUMP_P (BB_END (test_bb
)) && !onlyjump_p (BB_END (test_bb
)))
3097 last_set
= single_set (last_insn
);
3099 rtx x
= SET_DEST (last_set
);
3100 rtx_insn
*first_insn
= first_active_insn (test_bb
);
3101 rtx first_set
= single_set (first_insn
);
3106 /* We have a single simple set, that's okay. */
3107 bool speed_p
= optimize_bb_for_speed_p (test_bb
);
3109 if (first_insn
== last_insn
)
3111 *simple_p
= noce_operand_ok (SET_DEST (first_set
));
3112 *cost
+= pattern_cost (first_set
, speed_p
);
3116 rtx_insn
*prev_last_insn
= PREV_INSN (last_insn
);
3117 gcc_assert (prev_last_insn
);
3119 /* For now, disallow setting x multiple times in test_bb. */
3120 if (REG_P (x
) && reg_set_between_p (x
, first_insn
, prev_last_insn
))
3123 bitmap test_bb_temps
= BITMAP_ALLOC (®_obstack
);
3125 /* The regs that are live out of test_bb. */
3126 bitmap test_bb_live_out
= df_get_live_out (test_bb
);
3128 int potential_cost
= pattern_cost (last_set
, speed_p
);
3130 FOR_BB_INSNS (test_bb
, insn
)
3132 if (insn
!= last_insn
)
3134 if (!active_insn_p (insn
))
3137 if (!insn_valid_noce_process_p (insn
, cc
))
3138 goto free_bitmap_and_fail
;
3140 rtx sset
= single_set (insn
);
3142 rtx dest
= SET_DEST (sset
);
3143 if (SUBREG_P (dest
))
3144 dest
= SUBREG_REG (dest
);
3146 if (contains_mem_rtx_p (SET_SRC (sset
))
3148 || reg_overlap_mentioned_p (dest
, cond
))
3149 goto free_bitmap_and_fail
;
3151 potential_cost
+= pattern_cost (sset
, speed_p
);
3152 bitmap_set_bit (test_bb_temps
, REGNO (dest
));
3156 /* If any of the intermediate results in test_bb are live after test_bb
3158 if (bitmap_intersect_p (test_bb_live_out
, test_bb_temps
))
3159 goto free_bitmap_and_fail
;
3161 BITMAP_FREE (test_bb_temps
);
3162 *cost
+= potential_cost
;
3166 free_bitmap_and_fail
:
3167 BITMAP_FREE (test_bb_temps
);
3171 /* Helper function to emit a cmov sequence encapsulated in
3172 start_sequence () and end_sequence (). If NEED_CMOV is true
3173 we call noce_emit_cmove to create a cmove sequence. Otherwise emit
3174 a simple move. If successful, store the first instruction of the
3175 sequence in TEMP_DEST and the sequence costs in SEQ_COST. */
3178 try_emit_cmove_seq (struct noce_if_info
*if_info
, rtx temp
,
3179 rtx cond
, rtx new_val
, rtx old_val
, bool need_cmov
,
3180 unsigned *cost
, rtx
*temp_dest
,
3181 rtx cc_cmp
= NULL
, rtx rev_cc_cmp
= NULL
)
3183 rtx_insn
*seq
= NULL
;
3186 rtx x
= XEXP (cond
, 0);
3187 rtx y
= XEXP (cond
, 1);
3188 rtx_code cond_code
= GET_CODE (cond
);
3193 *temp_dest
= noce_emit_cmove (if_info
, temp
, cond_code
,
3194 x
, y
, new_val
, old_val
, cc_cmp
, rev_cc_cmp
);
3198 if (if_info
->then_else_reversed
)
3199 noce_emit_move_insn (temp
, old_val
);
3201 noce_emit_move_insn (temp
, new_val
);
3204 if (*temp_dest
!= NULL_RTX
)
3207 *cost
= seq_cost (seq
, if_info
->speed_p
);
3215 /* We have something like:
3218 { i = a; j = b; k = c; }
3222 tmp_i = (x > y) ? a : i;
3223 tmp_j = (x > y) ? b : j;
3224 tmp_k = (x > y) ? c : k;
3229 Subsequent passes are expected to clean up the extra moves.
3231 Look for special cases such as writes to one register which are
3232 read back in another SET, as might occur in a swap idiom or
3241 Which we want to rewrite to:
3243 tmp_i = (x > y) ? a : i;
3244 tmp_j = (x > y) ? tmp_i : j;
3248 We can catch these when looking at (SET x y) by keeping a list of the
3249 registers we would have targeted before if-conversion and looking back
3250 through it for an overlap with Y. If we find one, we rewire the
3251 conditional set to use the temporary we introduced earlier.
3253 IF_INFO contains the useful information about the block structure and
3254 jump instructions. */
3257 noce_convert_multiple_sets (struct noce_if_info
*if_info
)
3259 basic_block test_bb
= if_info
->test_bb
;
3260 basic_block then_bb
= if_info
->then_bb
;
3261 basic_block join_bb
= if_info
->join_bb
;
3262 rtx_insn
*jump
= if_info
->jump
;
3263 rtx_insn
*cond_earliest
;
3268 /* Decompose the condition attached to the jump. */
3269 rtx cond
= noce_get_condition (jump
, &cond_earliest
, false);
3270 rtx x
= XEXP (cond
, 0);
3271 rtx y
= XEXP (cond
, 1);
3273 /* The true targets for a conditional move. */
3274 auto_vec
<rtx
> targets
;
3275 /* The temporaries introduced to allow us to not consider register
3277 auto_vec
<rtx
> temporaries
;
3278 /* The insns we've emitted. */
3279 auto_vec
<rtx_insn
*> unmodified_insns
;
3281 hash_set
<rtx_insn
*> need_no_cmov
;
3282 hash_map
<rtx_insn
*, int> rewired_src
;
3284 need_cmov_or_rewire (then_bb
, &need_no_cmov
, &rewired_src
);
3286 int last_needs_comparison
= -1;
3288 bool ok
= noce_convert_multiple_sets_1
3289 (if_info
, &need_no_cmov
, &rewired_src
, &targets
, &temporaries
,
3290 &unmodified_insns
, &last_needs_comparison
);
3294 /* If there are insns that overwrite part of the initial
3295 comparison, we can still omit creating temporaries for
3297 As the second try will always create a less expensive,
3298 valid sequence, we do not need to compare and can discard
3300 if (last_needs_comparison
!= -1)
3304 ok
= noce_convert_multiple_sets_1
3305 (if_info
, &need_no_cmov
, &rewired_src
, &targets
, &temporaries
,
3306 &unmodified_insns
, &last_needs_comparison
);
3307 /* Actually we should not fail anymore if we reached here,
3308 but better still check. */
3313 /* We must have seen some sort of insn to insert, otherwise we were
3314 given an empty BB to convert, and we can't handle that. */
3315 gcc_assert (!unmodified_insns
.is_empty ());
3317 /* Now fixup the assignments. */
3318 for (unsigned i
= 0; i
< targets
.length (); i
++)
3319 if (targets
[i
] != temporaries
[i
])
3320 noce_emit_move_insn (targets
[i
], temporaries
[i
]);
3322 /* Actually emit the sequence if it isn't too expensive. */
3323 rtx_insn
*seq
= get_insns ();
3325 if (!targetm
.noce_conversion_profitable_p (seq
, if_info
))
3331 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
3332 set_used_flags (insn
);
3334 /* Mark all our temporaries and targets as used. */
3335 for (unsigned i
= 0; i
< targets
.length (); i
++)
3337 set_used_flags (temporaries
[i
]);
3338 set_used_flags (targets
[i
]);
3341 set_used_flags (cond
);
3345 unshare_all_rtl_in_chain (seq
);
3351 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
3353 || recog_memoized (insn
) == -1)
3356 emit_insn_before_setloc (seq
, if_info
->jump
,
3357 INSN_LOCATION (unmodified_insns
.last ()));
3359 /* Clean up THEN_BB and the edges in and out of it. */
3360 remove_edge (find_edge (test_bb
, join_bb
));
3361 remove_edge (find_edge (then_bb
, join_bb
));
3362 redirect_edge_and_branch_force (single_succ_edge (test_bb
), join_bb
);
3363 delete_basic_block (then_bb
);
3366 /* Maybe merge blocks now the jump is simple enough. */
3367 if (can_merge_blocks_p (test_bb
, join_bb
))
3369 merge_blocks (test_bb
, join_bb
);
3373 num_updated_if_blocks
++;
3374 if_info
->transform_name
= "noce_convert_multiple_sets";
3378 /* Helper function for noce_convert_multiple_sets_1. If store to
3379 DEST can affect P[0] or P[1], clear P[0]. Called via note_stores. */
3382 check_for_cc_cmp_clobbers (rtx dest
, const_rtx
, void *p0
)
3384 rtx
*p
= (rtx
*) p0
;
3385 if (p
[0] == NULL_RTX
)
3387 if (reg_overlap_mentioned_p (dest
, p
[0])
3388 || (p
[1] && reg_overlap_mentioned_p (dest
, p
[1])))
3392 /* This goes through all relevant insns of IF_INFO->then_bb and tries to
3393 create conditional moves. In case a simple move sufficis the insn
3394 should be listed in NEED_NO_CMOV. The rewired-src cases should be
3395 specified via REWIRED_SRC. TARGETS, TEMPORARIES and UNMODIFIED_INSNS
3396 are specified and used in noce_convert_multiple_sets and should be passed
3397 to this function.. */
3400 noce_convert_multiple_sets_1 (struct noce_if_info
*if_info
,
3401 hash_set
<rtx_insn
*> *need_no_cmov
,
3402 hash_map
<rtx_insn
*, int> *rewired_src
,
3403 auto_vec
<rtx
> *targets
,
3404 auto_vec
<rtx
> *temporaries
,
3405 auto_vec
<rtx_insn
*> *unmodified_insns
,
3406 int *last_needs_comparison
)
3408 basic_block then_bb
= if_info
->then_bb
;
3409 rtx_insn
*jump
= if_info
->jump
;
3410 rtx_insn
*cond_earliest
;
3412 /* Decompose the condition attached to the jump. */
3413 rtx cond
= noce_get_condition (jump
, &cond_earliest
, false);
3415 rtx cc_cmp
= cond_exec_get_condition (jump
);
3417 cc_cmp
= copy_rtx (cc_cmp
);
3418 rtx rev_cc_cmp
= cond_exec_get_condition (jump
, /* get_reversed */ true);
3420 rev_cc_cmp
= copy_rtx (rev_cc_cmp
);
3425 targets
->truncate (0);
3426 temporaries
->truncate (0);
3427 unmodified_insns
->truncate (0);
3429 bool second_try
= *last_needs_comparison
!= -1;
3431 FOR_BB_INSNS (then_bb
, insn
)
3433 /* Skip over non-insns. */
3434 if (!active_insn_p (insn
))
3437 rtx set
= single_set (insn
);
3438 gcc_checking_assert (set
);
3440 rtx target
= SET_DEST (set
);
3443 rtx new_val
= SET_SRC (set
);
3444 if (int *ii
= rewired_src
->get (insn
))
3445 new_val
= simplify_replace_rtx (new_val
, (*targets
)[*ii
],
3446 (*temporaries
)[*ii
]);
3447 rtx old_val
= target
;
3449 /* As we are transforming
3459 we potentially check x > y before every set.
3460 Even though the check might be removed by subsequent passes, this means
3461 that we cannot transform
3470 since this would invalidate x and the following to-be-removed checks.
3471 Therefore we introduce a temporary every time we are about to
3472 overwrite a variable used in the check. Costing of a sequence with
3473 these is going to be inaccurate so only use temporaries when
3476 If performing a second try, we know how many insns require a
3477 temporary. For the last of these, we can omit creating one. */
3478 if (reg_overlap_mentioned_p (target
, cond
)
3479 && (!second_try
|| count
< *last_needs_comparison
))
3480 temp
= gen_reg_rtx (GET_MODE (target
));
3484 /* We have identified swap-style idioms before. A normal
3485 set will need to be a cmov while the first instruction of a swap-style
3486 idiom can be a regular move. This helps with costing. */
3487 bool need_cmov
= !need_no_cmov
->contains (insn
);
3489 /* If we had a non-canonical conditional jump (i.e. one where
3490 the fallthrough is to the "else" case) we need to reverse
3491 the conditional select. */
3492 if (if_info
->then_else_reversed
)
3493 std::swap (old_val
, new_val
);
3496 /* We allow simple lowpart register subreg SET sources in
3497 bb_ok_for_noce_convert_multiple_sets. Be careful when processing
3499 (set (reg:SI r1) (reg:SI r2))
3500 (set (reg:HI r3) (subreg:HI (r1)))
3501 For the second insn new_val or old_val (r1 in this example) will be
3502 taken from the temporaries and have the wider mode which will not
3503 match with the mode of the other source of the conditional move, so
3504 we'll end up trying to emit r4:HI = cond ? (r1:SI) : (r3:HI).
3505 Wrap the two cmove operands into subregs if appropriate to prevent
3508 if (!CONSTANT_P (new_val
)
3509 && GET_MODE (new_val
) != GET_MODE (temp
))
3511 machine_mode src_mode
= GET_MODE (new_val
);
3512 machine_mode dst_mode
= GET_MODE (temp
);
3513 if (!partial_subreg_p (dst_mode
, src_mode
))
3518 new_val
= lowpart_subreg (dst_mode
, new_val
, src_mode
);
3520 if (!CONSTANT_P (old_val
)
3521 && GET_MODE (old_val
) != GET_MODE (temp
))
3523 machine_mode src_mode
= GET_MODE (old_val
);
3524 machine_mode dst_mode
= GET_MODE (temp
);
3525 if (!partial_subreg_p (dst_mode
, src_mode
))
3530 old_val
= lowpart_subreg (dst_mode
, old_val
, src_mode
);
3533 /* Try emitting a conditional move passing the backend the
3534 canonicalized comparison. The backend is then able to
3535 recognize expressions like
3540 as min/max and emit an insn, accordingly. */
3541 unsigned cost1
= 0, cost2
= 0;
3542 rtx_insn
*seq
, *seq1
, *seq2
= NULL
;
3543 rtx temp_dest
= NULL_RTX
, temp_dest1
= NULL_RTX
, temp_dest2
= NULL_RTX
;
3544 bool read_comparison
= false;
3546 seq1
= try_emit_cmove_seq (if_info
, temp
, cond
,
3547 new_val
, old_val
, need_cmov
,
3548 &cost1
, &temp_dest1
);
3550 /* Here, we try to pass the backend a non-canonicalized cc comparison
3551 as well. This allows the backend to emit a cmov directly without
3552 creating an additional compare for each. If successful, costing
3553 is easier and this sequence is usually preferred. */
3555 seq2
= try_emit_cmove_seq (if_info
, temp
, cond
,
3556 new_val
, old_val
, need_cmov
,
3557 &cost2
, &temp_dest2
, cc_cmp
, rev_cc_cmp
);
3559 /* The backend might have created a sequence that uses the
3560 condition. Check this. */
3561 rtx_insn
*walk
= seq2
;
3564 rtx set
= single_set (walk
);
3566 if (!set
|| !SET_SRC (set
))
3568 walk
= NEXT_INSN (walk
);
3572 rtx src
= SET_SRC (set
);
3574 if (XEXP (set
, 1) && GET_CODE (XEXP (set
, 1)) == IF_THEN_ELSE
)
3575 ; /* We assume that this is the cmove created by the backend that
3576 naturally uses the condition. Therefore we ignore it. */
3579 if (reg_mentioned_p (XEXP (cond
, 0), src
)
3580 || reg_mentioned_p (XEXP (cond
, 1), src
))
3582 read_comparison
= true;
3587 walk
= NEXT_INSN (walk
);
3590 /* Check which version is less expensive. */
3591 if (seq1
!= NULL_RTX
&& (cost1
<= cost2
|| seq2
== NULL_RTX
))
3594 temp_dest
= temp_dest1
;
3596 *last_needs_comparison
= count
;
3598 else if (seq2
!= NULL_RTX
)
3601 temp_dest
= temp_dest2
;
3602 if (!second_try
&& read_comparison
)
3603 *last_needs_comparison
= count
;
3607 /* Nothing worked, bail out. */
3614 /* Check if SEQ can clobber registers mentioned in
3615 cc_cmp and/or rev_cc_cmp. If yes, we need to use
3616 only seq1 from that point on. */
3617 rtx cc_cmp_pair
[2] = { cc_cmp
, rev_cc_cmp
};
3618 for (walk
= seq
; walk
; walk
= NEXT_INSN (walk
))
3620 note_stores (walk
, check_for_cc_cmp_clobbers
, cc_cmp_pair
);
3621 if (cc_cmp_pair
[0] == NULL_RTX
)
3624 rev_cc_cmp
= NULL_RTX
;
3630 /* End the sub sequence and emit to the main sequence. */
3635 targets
->safe_push (target
);
3636 temporaries
->safe_push (temp_dest
);
3637 unmodified_insns
->safe_push (insn
);
3640 /* Even if we did not actually need the comparison, we want to make sure
3641 to try a second time in order to get rid of the temporaries. */
3642 if (*last_needs_comparison
== -1)
3643 *last_needs_comparison
= 0;
3651 /* Return true iff basic block TEST_BB is comprised of only
3652 (SET (REG) (REG)) insns suitable for conversion to a series
3653 of conditional moves. Also check that we have more than one set
3654 (other routines can handle a single set better than we would), and
3655 fewer than PARAM_MAX_RTL_IF_CONVERSION_INSNS sets. While going
3656 through the insns store the sum of their potential costs in COST. */
3659 bb_ok_for_noce_convert_multiple_sets (basic_block test_bb
, unsigned *cost
)
3663 unsigned param
= param_max_rtl_if_conversion_insns
;
3664 bool speed_p
= optimize_bb_for_speed_p (test_bb
);
3665 unsigned potential_cost
= 0;
3667 FOR_BB_INSNS (test_bb
, insn
)
3669 /* Skip over notes etc. */
3670 if (!active_insn_p (insn
))
3673 /* We only handle SET insns. */
3674 rtx set
= single_set (insn
);
3675 if (set
== NULL_RTX
)
3678 rtx dest
= SET_DEST (set
);
3679 rtx src
= SET_SRC (set
);
3681 /* We can possibly relax this, but for now only handle REG to REG
3682 (including subreg) moves. This avoids any issues that might come
3683 from introducing loads/stores that might violate data-race-freedom
3688 if (!((REG_P (src
) || CONSTANT_P (src
))
3689 || (GET_CODE (src
) == SUBREG
&& REG_P (SUBREG_REG (src
))
3690 && subreg_lowpart_p (src
))))
3693 /* Destination must be appropriate for a conditional write. */
3694 if (!noce_operand_ok (dest
))
3697 /* We must be able to conditionally move in this mode. */
3698 if (!can_conditionally_move_p (GET_MODE (dest
)))
3701 potential_cost
+= insn_cost (insn
, speed_p
);
3706 *cost
+= potential_cost
;
3708 /* If we would only put out one conditional move, the other strategies
3709 this pass tries are better optimized and will be more appropriate.
3710 Some targets want to strictly limit the number of conditional moves
3711 that are emitted, they set this through PARAM, we need to respect
3713 return count
> 1 && count
<= param
;
3716 /* Compute average of two given costs weighted by relative probabilities
3717 of respective basic blocks in an IF-THEN-ELSE. E is the IF-THEN edge.
3718 With P as the probability to take the IF-THEN branch, return
3719 P * THEN_COST + (1 - P) * ELSE_COST. */
3721 average_cost (unsigned then_cost
, unsigned else_cost
, edge e
)
3723 return else_cost
+ e
->probability
.apply ((signed) (then_cost
- else_cost
));
3726 /* Given a simple IF-THEN-JOIN or IF-THEN-ELSE-JOIN block, attempt to convert
3727 it without using conditional execution. Return TRUE if we were successful
3728 at converting the block. */
3731 noce_process_if_block (struct noce_if_info
*if_info
)
3733 basic_block test_bb
= if_info
->test_bb
; /* test block */
3734 basic_block then_bb
= if_info
->then_bb
; /* THEN */
3735 basic_block else_bb
= if_info
->else_bb
; /* ELSE or NULL */
3736 basic_block join_bb
= if_info
->join_bb
; /* JOIN */
3737 rtx_insn
*jump
= if_info
->jump
;
3738 rtx cond
= if_info
->cond
;
3739 rtx_insn
*insn_a
, *insn_b
;
3741 rtx orig_x
, x
, a
, b
;
3743 /* We're looking for patterns of the form
3745 (1) if (...) x = a; else x = b;
3746 (2) x = b; if (...) x = a;
3747 (3) if (...) x = a; // as if with an initial x = x.
3748 (4) if (...) { x = a; y = b; z = c; } // Like 3, for multiple SETS.
3749 The later patterns require jumps to be more expensive.
3750 For the if (...) x = a; else x = b; case we allow multiple insns
3751 inside the then and else blocks as long as their only effect is
3752 to calculate a value for x.
3753 ??? For future expansion, further expand the "multiple X" rules. */
3755 /* First look for multiple SETS. The original costs already include
3756 a base cost of COSTS_N_INSNS (2): one instruction for the compare
3757 (which we will be needing either way) and one instruction for the
3758 branch. When comparing costs we want to use the branch instruction
3759 cost and the sets vs. the cmovs generated here. Therefore subtract
3760 the costs of the compare before checking.
3761 ??? Actually, instead of the branch instruction costs we might want
3762 to use COSTS_N_INSNS (BRANCH_COST ()) as in other places. */
3764 unsigned potential_cost
= if_info
->original_cost
- COSTS_N_INSNS (1);
3765 unsigned old_cost
= if_info
->original_cost
;
3767 && HAVE_conditional_move
3768 && bb_ok_for_noce_convert_multiple_sets (then_bb
, &potential_cost
))
3770 /* Temporarily set the original costs to what we estimated so
3771 we can determine if the transformation is worth it. */
3772 if_info
->original_cost
= potential_cost
;
3773 if (noce_convert_multiple_sets (if_info
))
3775 if (dump_file
&& if_info
->transform_name
)
3776 fprintf (dump_file
, "if-conversion succeeded through %s\n",
3777 if_info
->transform_name
);
3781 /* Restore the original costs. */
3782 if_info
->original_cost
= old_cost
;
3785 bool speed_p
= optimize_bb_for_speed_p (test_bb
);
3786 unsigned int then_cost
= 0, else_cost
= 0;
3787 if (!bb_valid_for_noce_process_p (then_bb
, cond
, &then_cost
,
3788 &if_info
->then_simple
))
3792 && !bb_valid_for_noce_process_p (else_bb
, cond
, &else_cost
,
3793 &if_info
->else_simple
))
3797 if_info
->original_cost
+= average_cost (then_cost
, else_cost
,
3798 find_edge (test_bb
, then_bb
));
3800 if_info
->original_cost
+= then_cost
+ else_cost
;
3802 insn_a
= last_active_insn (then_bb
, false);
3803 set_a
= single_set (insn_a
);
3806 x
= SET_DEST (set_a
);
3807 a
= SET_SRC (set_a
);
3809 /* Look for the other potential set. Make sure we've got equivalent
3811 /* ??? This is overconservative. Storing to two different mems is
3812 as easy as conditionally computing the address. Storing to a
3813 single mem merely requires a scratch memory to use as one of the
3814 destination addresses; often the memory immediately below the
3815 stack pointer is available for this. */
3819 insn_b
= last_active_insn (else_bb
, false);
3820 set_b
= single_set (insn_b
);
3823 if (!rtx_interchangeable_p (x
, SET_DEST (set_b
)))
3828 insn_b
= if_info
->cond_earliest
;
3830 insn_b
= prev_nonnote_nondebug_insn (insn_b
);
3832 && (BLOCK_FOR_INSN (insn_b
)
3833 == BLOCK_FOR_INSN (if_info
->cond_earliest
))
3834 && !modified_in_p (x
, insn_b
));
3836 /* We're going to be moving the evaluation of B down from above
3837 COND_EARLIEST to JUMP. Make sure the relevant data is still
3840 || BLOCK_FOR_INSN (insn_b
) != BLOCK_FOR_INSN (if_info
->cond_earliest
)
3841 || !NONJUMP_INSN_P (insn_b
)
3842 || (set_b
= single_set (insn_b
)) == NULL_RTX
3843 || ! rtx_interchangeable_p (x
, SET_DEST (set_b
))
3844 || ! noce_operand_ok (SET_SRC (set_b
))
3845 || reg_overlap_mentioned_p (x
, SET_SRC (set_b
))
3846 || modified_between_p (SET_SRC (set_b
), insn_b
, jump
)
3847 /* Avoid extending the lifetime of hard registers on small
3848 register class machines. */
3849 || (REG_P (SET_SRC (set_b
))
3850 && HARD_REGISTER_P (SET_SRC (set_b
))
3851 && targetm
.small_register_classes_for_mode_p
3852 (GET_MODE (SET_SRC (set_b
))))
3853 /* Likewise with X. In particular this can happen when
3854 noce_get_condition looks farther back in the instruction
3855 stream than one might expect. */
3856 || reg_overlap_mentioned_p (x
, cond
)
3857 || reg_overlap_mentioned_p (x
, a
)
3858 || modified_between_p (x
, insn_b
, jump
))
3865 /* If x has side effects then only the if-then-else form is safe to
3866 convert. But even in that case we would need to restore any notes
3867 (such as REG_INC) at then end. That can be tricky if
3868 noce_emit_move_insn expands to more than one insn, so disable the
3869 optimization entirely for now if there are side effects. */
3870 if (side_effects_p (x
))
3873 b
= (set_b
? SET_SRC (set_b
) : x
);
3875 /* Only operate on register destinations, and even then avoid extending
3876 the lifetime of hard registers on small register class machines. */
3878 if_info
->orig_x
= orig_x
;
3880 || (HARD_REGISTER_P (x
)
3881 && targetm
.small_register_classes_for_mode_p (GET_MODE (x
))))
3883 if (GET_MODE (x
) == BLKmode
)
3886 if (GET_CODE (x
) == ZERO_EXTRACT
3887 && (!CONST_INT_P (XEXP (x
, 1))
3888 || !CONST_INT_P (XEXP (x
, 2))))
3891 x
= gen_reg_rtx (GET_MODE (GET_CODE (x
) == STRICT_LOW_PART
3892 ? XEXP (x
, 0) : x
));
3895 /* Don't operate on sources that may trap or are volatile. */
3896 if (! noce_operand_ok (a
) || ! noce_operand_ok (b
))
3900 /* Set up the info block for our subroutines. */
3901 if_info
->insn_a
= insn_a
;
3902 if_info
->insn_b
= insn_b
;
3907 /* Try optimizations in some approximation of a useful order. */
3908 /* ??? Should first look to see if X is live incoming at all. If it
3909 isn't, we don't need anything but an unconditional set. */
3911 /* Look and see if A and B are really the same. Avoid creating silly
3912 cmove constructs that no one will fix up later. */
3913 if (noce_simple_bbs (if_info
)
3914 && rtx_interchangeable_p (a
, b
))
3916 /* If we have an INSN_B, we don't have to create any new rtl. Just
3917 move the instruction that we already have. If we don't have an
3918 INSN_B, that means that A == X, and we've got a noop move. In
3919 that case don't do anything and let the code below delete INSN_A. */
3920 if (insn_b
&& else_bb
)
3924 if (else_bb
&& insn_b
== BB_END (else_bb
))
3925 BB_END (else_bb
) = PREV_INSN (insn_b
);
3926 reorder_insns (insn_b
, insn_b
, PREV_INSN (jump
));
3928 /* If there was a REG_EQUAL note, delete it since it may have been
3929 true due to this insn being after a jump. */
3930 if ((note
= find_reg_note (insn_b
, REG_EQUAL
, NULL_RTX
)) != 0)
3931 remove_note (insn_b
, note
);
3935 /* If we have "x = b; if (...) x = a;", and x has side-effects, then
3936 x must be executed twice. */
3937 else if (insn_b
&& side_effects_p (orig_x
))
3944 if (!set_b
&& MEM_P (orig_x
))
3945 /* We want to avoid store speculation to avoid cases like
3946 if (pthread_mutex_trylock(mutex))
3948 Rather than go to much effort here, we rely on the SSA optimizers,
3949 which do a good enough job these days. */
3952 if (noce_try_move (if_info
))
3954 if (noce_try_ifelse_collapse (if_info
))
3956 if (noce_try_store_flag (if_info
))
3958 if (noce_try_bitop (if_info
))
3960 if (noce_try_minmax (if_info
))
3962 if (noce_try_abs (if_info
))
3964 if (noce_try_inverse_constants (if_info
))
3966 if (!targetm
.have_conditional_execution ()
3967 && noce_try_store_flag_constants (if_info
))
3969 if (HAVE_conditional_move
3970 && noce_try_cmove (if_info
))
3972 if (! targetm
.have_conditional_execution ())
3974 if (noce_try_addcc (if_info
))
3976 if (noce_try_store_flag_mask (if_info
))
3978 if (HAVE_conditional_move
3979 && noce_try_cmove_arith (if_info
))
3981 if (noce_try_sign_mask (if_info
))
3985 if (!else_bb
&& set_b
)
3996 if (dump_file
&& if_info
->transform_name
)
3997 fprintf (dump_file
, "if-conversion succeeded through %s\n",
3998 if_info
->transform_name
);
4000 /* If we used a temporary, fix it up now. */
4006 noce_emit_move_insn (orig_x
, x
);
4008 set_used_flags (orig_x
);
4009 unshare_all_rtl_in_chain (seq
);
4012 emit_insn_before_setloc (seq
, BB_END (test_bb
), INSN_LOCATION (insn_a
));
4015 /* The original THEN and ELSE blocks may now be removed. The test block
4016 must now jump to the join block. If the test block and the join block
4017 can be merged, do so. */
4020 delete_basic_block (else_bb
);
4024 remove_edge (find_edge (test_bb
, join_bb
));
4026 remove_edge (find_edge (then_bb
, join_bb
));
4027 redirect_edge_and_branch_force (single_succ_edge (test_bb
), join_bb
);
4028 delete_basic_block (then_bb
);
4031 if (can_merge_blocks_p (test_bb
, join_bb
))
4033 merge_blocks (test_bb
, join_bb
);
4037 num_updated_if_blocks
++;
4041 /* Check whether a block is suitable for conditional move conversion.
4042 Every insn must be a simple set of a register to a constant or a
4043 register. For each assignment, store the value in the pointer map
4044 VALS, keyed indexed by register pointer, then store the register
4045 pointer in REGS. COND is the condition we will test. */
4048 check_cond_move_block (basic_block bb
,
4049 hash_map
<rtx
, rtx
> *vals
,
4054 rtx cc
= cc_in_cond (cond
);
4056 /* We can only handle simple jumps at the end of the basic block.
4057 It is almost impossible to update the CFG otherwise. */
4059 if (JUMP_P (insn
) && !onlyjump_p (insn
))
4062 FOR_BB_INSNS (bb
, insn
)
4066 if (!NONDEBUG_INSN_P (insn
) || JUMP_P (insn
))
4068 set
= single_set (insn
);
4072 dest
= SET_DEST (set
);
4073 src
= SET_SRC (set
);
4075 || (HARD_REGISTER_P (dest
)
4076 && targetm
.small_register_classes_for_mode_p (GET_MODE (dest
))))
4079 if (!CONSTANT_P (src
) && !register_operand (src
, VOIDmode
))
4082 if (side_effects_p (src
) || side_effects_p (dest
))
4085 if (may_trap_p (src
) || may_trap_p (dest
))
4088 /* Don't try to handle this if the source register was
4089 modified earlier in the block. */
4092 || (GET_CODE (src
) == SUBREG
&& REG_P (SUBREG_REG (src
))
4093 && vals
->get (SUBREG_REG (src
))))
4096 /* Don't try to handle this if the destination register was
4097 modified earlier in the block. */
4098 if (vals
->get (dest
))
4101 /* Don't try to handle this if the condition uses the
4102 destination register. */
4103 if (reg_overlap_mentioned_p (dest
, cond
))
4106 /* Don't try to handle this if the source register is modified
4107 later in the block. */
4108 if (!CONSTANT_P (src
)
4109 && modified_between_p (src
, insn
, NEXT_INSN (BB_END (bb
))))
4112 /* Skip it if the instruction to be moved might clobber CC. */
4113 if (cc
&& set_of (cc
, insn
))
4116 vals
->put (dest
, src
);
4118 regs
->safe_push (dest
);
4124 /* Find local swap-style idioms in BB and mark the first insn (1)
4125 that is only a temporary as not needing a conditional move as
4126 it is going to be dead afterwards anyway.
4136 a = cond ? b : a_old;
4137 b = cond ? tmp : b_old;
4139 Additionally, store the index of insns like (2) when a subsequent
4140 SET reads from their destination.
4148 c = cond ? a : c_old;
4149 d = cond ? d : c; // Need to use c rather than c_old here.
4153 need_cmov_or_rewire (basic_block bb
,
4154 hash_set
<rtx_insn
*> *need_no_cmov
,
4155 hash_map
<rtx_insn
*, int> *rewired_src
)
4159 auto_vec
<rtx_insn
*> insns
;
4160 auto_vec
<rtx
> dests
;
4162 /* Iterate over all SETs, storing the destinations
4164 - If we hit a SET that reads from a destination
4165 that we have seen before and the corresponding register
4166 is dead afterwards, the register does not need to be
4167 moved conditionally.
4168 - If we encounter a previously changed register,
4169 rewire the read to the original source. */
4170 FOR_BB_INSNS (bb
, insn
)
4174 if (!active_insn_p (insn
))
4177 set
= single_set (insn
);
4178 if (set
== NULL_RTX
)
4181 src
= SET_SRC (set
);
4183 src
= SUBREG_REG (src
);
4184 dest
= SET_DEST (set
);
4186 /* Check if the current SET's source is the same
4187 as any previously seen destination.
4188 This is quadratic but the number of insns in BB
4189 is bounded by PARAM_MAX_RTL_IF_CONVERSION_INSNS. */
4191 for (int i
= count
- 1; i
>= 0; --i
)
4192 if (reg_overlap_mentioned_p (src
, dests
[i
]))
4194 if (find_reg_note (insn
, REG_DEAD
, src
) != NULL_RTX
)
4195 need_no_cmov
->add (insns
[i
]);
4197 rewired_src
->put (insn
, i
);
4200 insns
.safe_push (insn
);
4201 dests
.safe_push (dest
);
4207 /* Given a basic block BB suitable for conditional move conversion,
4208 a condition COND, and pointer maps THEN_VALS and ELSE_VALS containing
4209 the register values depending on COND, emit the insns in the block as
4210 conditional moves. If ELSE_BLOCK is true, THEN_BB was already
4211 processed. The caller has started a sequence for the conversion.
4212 Return true if successful, false if something goes wrong. */
4215 cond_move_convert_if_block (struct noce_if_info
*if_infop
,
4216 basic_block bb
, rtx cond
,
4217 hash_map
<rtx
, rtx
> *then_vals
,
4218 hash_map
<rtx
, rtx
> *else_vals
,
4223 rtx cond_arg0
, cond_arg1
;
4225 code
= GET_CODE (cond
);
4226 cond_arg0
= XEXP (cond
, 0);
4227 cond_arg1
= XEXP (cond
, 1);
4229 FOR_BB_INSNS (bb
, insn
)
4231 rtx set
, target
, dest
, t
, e
;
4233 /* ??? Maybe emit conditional debug insn? */
4234 if (!NONDEBUG_INSN_P (insn
) || JUMP_P (insn
))
4236 set
= single_set (insn
);
4237 gcc_assert (set
&& REG_P (SET_DEST (set
)));
4239 dest
= SET_DEST (set
);
4241 rtx
*then_slot
= then_vals
->get (dest
);
4242 rtx
*else_slot
= else_vals
->get (dest
);
4243 t
= then_slot
? *then_slot
: NULL_RTX
;
4244 e
= else_slot
? *else_slot
: NULL_RTX
;
4248 /* If this register was set in the then block, we already
4249 handled this case there. */
4262 if (if_infop
->cond_inverted
)
4265 target
= noce_emit_cmove (if_infop
, dest
, code
, cond_arg0
, cond_arg1
,
4271 noce_emit_move_insn (dest
, target
);
4277 /* Given a simple IF-THEN-JOIN or IF-THEN-ELSE-JOIN block, attempt to convert
4278 it using only conditional moves. Return TRUE if we were successful at
4279 converting the block. */
4282 cond_move_process_if_block (struct noce_if_info
*if_info
)
4284 basic_block test_bb
= if_info
->test_bb
;
4285 basic_block then_bb
= if_info
->then_bb
;
4286 basic_block else_bb
= if_info
->else_bb
;
4287 basic_block join_bb
= if_info
->join_bb
;
4288 rtx_insn
*jump
= if_info
->jump
;
4289 rtx cond
= if_info
->cond
;
4290 rtx_insn
*seq
, *loc_insn
;
4292 vec
<rtx
> then_regs
= vNULL
;
4293 vec
<rtx
> else_regs
= vNULL
;
4294 bool success_p
= false;
4295 int limit
= param_max_rtl_if_conversion_insns
;
4297 /* Build a mapping for each block to the value used for each
4299 hash_map
<rtx
, rtx
> then_vals
;
4300 hash_map
<rtx
, rtx
> else_vals
;
4302 /* Make sure the blocks are suitable. */
4303 if (!check_cond_move_block (then_bb
, &then_vals
, &then_regs
, cond
)
4305 && !check_cond_move_block (else_bb
, &else_vals
, &else_regs
, cond
)))
4308 /* Make sure the blocks can be used together. If the same register
4309 is set in both blocks, and is not set to a constant in both
4310 cases, then both blocks must set it to the same register. We
4311 have already verified that if it is set to a register, that the
4312 source register does not change after the assignment. Also count
4313 the number of registers set in only one of the blocks. */
4315 for (rtx reg
: then_regs
)
4317 rtx
*then_slot
= then_vals
.get (reg
);
4318 rtx
*else_slot
= else_vals
.get (reg
);
4320 gcc_checking_assert (then_slot
);
4325 rtx then_val
= *then_slot
;
4326 rtx else_val
= *else_slot
;
4327 if (!CONSTANT_P (then_val
) && !CONSTANT_P (else_val
)
4328 && !rtx_equal_p (then_val
, else_val
))
4333 /* Finish off c for MAX_CONDITIONAL_EXECUTE. */
4334 for (rtx reg
: else_regs
)
4336 gcc_checking_assert (else_vals
.get (reg
));
4337 if (!then_vals
.get (reg
))
4341 /* Make sure it is reasonable to convert this block. What matters
4342 is the number of assignments currently made in only one of the
4343 branches, since if we convert we are going to always execute
4345 if (c
> MAX_CONDITIONAL_EXECUTE
4349 /* Try to emit the conditional moves. First do the then block,
4350 then do anything left in the else blocks. */
4352 if (!cond_move_convert_if_block (if_info
, then_bb
, cond
,
4353 &then_vals
, &else_vals
, false)
4355 && !cond_move_convert_if_block (if_info
, else_bb
, cond
,
4356 &then_vals
, &else_vals
, true)))
4361 seq
= end_ifcvt_sequence (if_info
);
4362 if (!seq
|| !targetm
.noce_conversion_profitable_p (seq
, if_info
))
4365 loc_insn
= first_active_insn (then_bb
);
4368 loc_insn
= first_active_insn (else_bb
);
4369 gcc_assert (loc_insn
);
4371 emit_insn_before_setloc (seq
, jump
, INSN_LOCATION (loc_insn
));
4375 delete_basic_block (else_bb
);
4379 remove_edge (find_edge (test_bb
, join_bb
));
4381 remove_edge (find_edge (then_bb
, join_bb
));
4382 redirect_edge_and_branch_force (single_succ_edge (test_bb
), join_bb
);
4383 delete_basic_block (then_bb
);
4386 if (can_merge_blocks_p (test_bb
, join_bb
))
4388 merge_blocks (test_bb
, join_bb
);
4392 num_updated_if_blocks
++;
4396 then_regs
.release ();
4397 else_regs
.release ();
4402 /* Determine if a given basic block heads a simple IF-THEN-JOIN or an
4403 IF-THEN-ELSE-JOIN block.
4405 If so, we'll try to convert the insns to not require the branch,
4406 using only transformations that do not require conditional execution.
4408 Return TRUE if we were successful at converting the block. */
4411 noce_find_if_block (basic_block test_bb
, edge then_edge
, edge else_edge
,
4414 basic_block then_bb
, else_bb
, join_bb
;
4415 bool then_else_reversed
= false;
4417 rtx_insn
*cond_earliest
;
4418 struct noce_if_info if_info
;
4419 bool speed_p
= optimize_bb_for_speed_p (test_bb
);
4421 /* We only ever should get here before reload. */
4422 gcc_assert (!reload_completed
);
4424 /* Recognize an IF-THEN-ELSE-JOIN block. */
4425 if (single_pred_p (then_edge
->dest
)
4426 && single_succ_p (then_edge
->dest
)
4427 && single_pred_p (else_edge
->dest
)
4428 && single_succ_p (else_edge
->dest
)
4429 && single_succ (then_edge
->dest
) == single_succ (else_edge
->dest
))
4431 then_bb
= then_edge
->dest
;
4432 else_bb
= else_edge
->dest
;
4433 join_bb
= single_succ (then_bb
);
4435 /* Recognize an IF-THEN-JOIN block. */
4436 else if (single_pred_p (then_edge
->dest
)
4437 && single_succ_p (then_edge
->dest
)
4438 && single_succ (then_edge
->dest
) == else_edge
->dest
)
4440 then_bb
= then_edge
->dest
;
4441 else_bb
= NULL_BLOCK
;
4442 join_bb
= else_edge
->dest
;
4444 /* Recognize an IF-ELSE-JOIN block. We can have those because the order
4445 of basic blocks in cfglayout mode does not matter, so the fallthrough
4446 edge can go to any basic block (and not just to bb->next_bb, like in
4448 else if (single_pred_p (else_edge
->dest
)
4449 && single_succ_p (else_edge
->dest
)
4450 && single_succ (else_edge
->dest
) == then_edge
->dest
)
4452 /* The noce transformations do not apply to IF-ELSE-JOIN blocks.
4453 To make this work, we have to invert the THEN and ELSE blocks
4454 and reverse the jump condition. */
4455 then_bb
= else_edge
->dest
;
4456 else_bb
= NULL_BLOCK
;
4457 join_bb
= single_succ (then_bb
);
4458 then_else_reversed
= true;
4461 /* Not a form we can handle. */
4464 /* The edges of the THEN and ELSE blocks cannot have complex edges. */
4465 if (single_succ_edge (then_bb
)->flags
& EDGE_COMPLEX
)
4468 && single_succ_edge (else_bb
)->flags
& EDGE_COMPLEX
)
4471 num_possible_if_blocks
++;
4476 "\nIF-THEN%s-JOIN block found, pass %d, test %d, then %d",
4477 (else_bb
) ? "-ELSE" : "",
4478 pass
, test_bb
->index
, then_bb
->index
);
4481 fprintf (dump_file
, ", else %d", else_bb
->index
);
4483 fprintf (dump_file
, ", join %d\n", join_bb
->index
);
4486 /* If the conditional jump is more than just a conditional
4487 jump, then we cannot do if-conversion on this block. */
4488 jump
= BB_END (test_bb
);
4489 if (! onlyjump_p (jump
))
4492 /* Initialize an IF_INFO struct to pass around. */
4493 memset (&if_info
, 0, sizeof if_info
);
4494 if_info
.test_bb
= test_bb
;
4495 if_info
.then_bb
= then_bb
;
4496 if_info
.else_bb
= else_bb
;
4497 if_info
.join_bb
= join_bb
;
4498 if_info
.cond
= noce_get_condition (jump
, &cond_earliest
,
4499 then_else_reversed
);
4500 rtx_insn
*rev_cond_earliest
;
4501 if_info
.rev_cond
= noce_get_condition (jump
, &rev_cond_earliest
,
4502 !then_else_reversed
);
4503 if (!if_info
.cond
&& !if_info
.rev_cond
)
4507 std::swap (if_info
.cond
, if_info
.rev_cond
);
4508 std::swap (cond_earliest
, rev_cond_earliest
);
4509 if_info
.cond_inverted
= true;
4511 /* We must be comparing objects whose modes imply the size. */
4512 if (GET_MODE (XEXP (if_info
.cond
, 0)) == BLKmode
)
4514 gcc_assert (if_info
.rev_cond
== NULL_RTX
4515 || rev_cond_earliest
== cond_earliest
);
4516 if_info
.cond_earliest
= cond_earliest
;
4517 if_info
.jump
= jump
;
4518 if_info
.then_else_reversed
= then_else_reversed
;
4519 if_info
.speed_p
= speed_p
;
4520 if_info
.max_seq_cost
4521 = targetm
.max_noce_ifcvt_seq_cost (then_edge
);
4522 /* We'll add in the cost of THEN_BB and ELSE_BB later, when we check
4523 that they are valid to transform. We can't easily get back to the insn
4524 for COND (and it may not exist if we had to canonicalize to get COND),
4525 and jump_insns are always given a cost of 1 by seq_cost, so treat
4526 both instructions as having cost COSTS_N_INSNS (1). */
4527 if_info
.original_cost
= COSTS_N_INSNS (2);
4530 /* Do the real work. */
4532 /* ??? noce_process_if_block has not yet been updated to handle
4533 inverted conditions. */
4534 if (!if_info
.cond_inverted
&& noce_process_if_block (&if_info
))
4537 if (HAVE_conditional_move
4538 && cond_move_process_if_block (&if_info
))
4545 /* Merge the blocks and mark for local life update. */
4548 merge_if_block (struct ce_if_block
* ce_info
)
4550 basic_block test_bb
= ce_info
->test_bb
; /* last test block */
4551 basic_block then_bb
= ce_info
->then_bb
; /* THEN */
4552 basic_block else_bb
= ce_info
->else_bb
; /* ELSE or NULL */
4553 basic_block join_bb
= ce_info
->join_bb
; /* join block */
4554 basic_block combo_bb
;
4556 /* All block merging is done into the lower block numbers. */
4559 df_set_bb_dirty (test_bb
);
4561 /* Merge any basic blocks to handle && and || subtests. Each of
4562 the blocks are on the fallthru path from the predecessor block. */
4563 if (ce_info
->num_multiple_test_blocks
> 0)
4565 basic_block bb
= test_bb
;
4566 basic_block last_test_bb
= ce_info
->last_test_bb
;
4567 basic_block fallthru
= block_fallthru (bb
);
4572 fallthru
= block_fallthru (bb
);
4573 merge_blocks (combo_bb
, bb
);
4576 while (bb
!= last_test_bb
);
4579 /* Merge TEST block into THEN block. Normally the THEN block won't have a
4580 label, but it might if there were || tests. That label's count should be
4581 zero, and it normally should be removed. */
4585 /* If THEN_BB has no successors, then there's a BARRIER after it.
4586 If COMBO_BB has more than one successor (THEN_BB), then that BARRIER
4587 is no longer needed, and in fact it is incorrect to leave it in
4589 if (EDGE_COUNT (then_bb
->succs
) == 0
4590 && EDGE_COUNT (combo_bb
->succs
) > 1)
4592 rtx_insn
*end
= NEXT_INSN (BB_END (then_bb
));
4593 while (end
&& NOTE_P (end
) && !NOTE_INSN_BASIC_BLOCK_P (end
))
4594 end
= NEXT_INSN (end
);
4596 if (end
&& BARRIER_P (end
))
4599 merge_blocks (combo_bb
, then_bb
);
4603 /* The ELSE block, if it existed, had a label. That label count
4604 will almost always be zero, but odd things can happen when labels
4605 get their addresses taken. */
4608 /* If ELSE_BB has no successors, then there's a BARRIER after it.
4609 If COMBO_BB has more than one successor (ELSE_BB), then that BARRIER
4610 is no longer needed, and in fact it is incorrect to leave it in
4612 if (EDGE_COUNT (else_bb
->succs
) == 0
4613 && EDGE_COUNT (combo_bb
->succs
) > 1)
4615 rtx_insn
*end
= NEXT_INSN (BB_END (else_bb
));
4616 while (end
&& NOTE_P (end
) && !NOTE_INSN_BASIC_BLOCK_P (end
))
4617 end
= NEXT_INSN (end
);
4619 if (end
&& BARRIER_P (end
))
4622 merge_blocks (combo_bb
, else_bb
);
4626 /* If there was no join block reported, that means it was not adjacent
4627 to the others, and so we cannot merge them. */
4631 rtx_insn
*last
= BB_END (combo_bb
);
4633 /* The outgoing edge for the current COMBO block should already
4634 be correct. Verify this. */
4635 if (EDGE_COUNT (combo_bb
->succs
) == 0)
4636 gcc_assert (find_reg_note (last
, REG_NORETURN
, NULL
)
4637 || (NONJUMP_INSN_P (last
)
4638 && GET_CODE (PATTERN (last
)) == TRAP_IF
4639 && (TRAP_CONDITION (PATTERN (last
))
4640 == const_true_rtx
)));
4643 /* There should still be something at the end of the THEN or ELSE
4644 blocks taking us to our final destination. */
4645 gcc_assert (JUMP_P (last
)
4646 || (EDGE_SUCC (combo_bb
, 0)->dest
4647 == EXIT_BLOCK_PTR_FOR_FN (cfun
)
4649 && SIBLING_CALL_P (last
))
4650 || ((EDGE_SUCC (combo_bb
, 0)->flags
& EDGE_EH
)
4651 && can_throw_internal (last
)));
4654 /* The JOIN block may have had quite a number of other predecessors too.
4655 Since we've already merged the TEST, THEN and ELSE blocks, we should
4656 have only one remaining edge from our if-then-else diamond. If there
4657 is more than one remaining edge, it must come from elsewhere. There
4658 may be zero incoming edges if the THEN block didn't actually join
4659 back up (as with a call to a non-return function). */
4660 else if (EDGE_COUNT (join_bb
->preds
) < 2
4661 && join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4663 /* We can merge the JOIN cleanly and update the dataflow try
4664 again on this pass.*/
4665 merge_blocks (combo_bb
, join_bb
);
4670 /* We cannot merge the JOIN. */
4672 /* The outgoing edge for the current COMBO block should already
4673 be correct. Verify this. */
4674 gcc_assert (single_succ_p (combo_bb
)
4675 && single_succ (combo_bb
) == join_bb
);
4677 /* Remove the jump and cruft from the end of the COMBO block. */
4678 if (join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4679 tidy_fallthru_edge (single_succ_edge (combo_bb
));
4682 num_updated_if_blocks
++;
4685 /* Find a block ending in a simple IF condition and try to transform it
4686 in some way. When converting a multi-block condition, put the new code
4687 in the first such block and delete the rest. Return a pointer to this
4688 first block if some transformation was done. Return NULL otherwise. */
4691 find_if_header (basic_block test_bb
, int pass
)
4693 ce_if_block ce_info
;
4697 /* The kind of block we're looking for has exactly two successors. */
4698 if (EDGE_COUNT (test_bb
->succs
) != 2)
4701 then_edge
= EDGE_SUCC (test_bb
, 0);
4702 else_edge
= EDGE_SUCC (test_bb
, 1);
4704 if (df_get_bb_dirty (then_edge
->dest
))
4706 if (df_get_bb_dirty (else_edge
->dest
))
4709 /* Neither edge should be abnormal. */
4710 if ((then_edge
->flags
& EDGE_COMPLEX
)
4711 || (else_edge
->flags
& EDGE_COMPLEX
))
4714 /* Nor exit the loop. */
4715 if ((then_edge
->flags
& EDGE_LOOP_EXIT
)
4716 || (else_edge
->flags
& EDGE_LOOP_EXIT
))
4719 /* The THEN edge is canonically the one that falls through. */
4720 if (then_edge
->flags
& EDGE_FALLTHRU
)
4722 else if (else_edge
->flags
& EDGE_FALLTHRU
)
4723 std::swap (then_edge
, else_edge
);
4725 /* Otherwise this must be a multiway branch of some sort. */
4728 memset (&ce_info
, 0, sizeof (ce_info
));
4729 ce_info
.test_bb
= test_bb
;
4730 ce_info
.then_bb
= then_edge
->dest
;
4731 ce_info
.else_bb
= else_edge
->dest
;
4732 ce_info
.pass
= pass
;
4734 #ifdef IFCVT_MACHDEP_INIT
4735 IFCVT_MACHDEP_INIT (&ce_info
);
4738 if (!reload_completed
4739 && noce_find_if_block (test_bb
, then_edge
, else_edge
, pass
))
4742 if (reload_completed
4743 && targetm
.have_conditional_execution ()
4744 && cond_exec_find_if_block (&ce_info
))
4747 if (targetm
.have_trap ()
4748 && optab_handler (ctrap_optab
, word_mode
) != CODE_FOR_nothing
4749 && find_cond_trap (test_bb
, then_edge
, else_edge
))
4752 if (dom_info_state (CDI_POST_DOMINATORS
) >= DOM_NO_FAST_QUERY
4753 && (reload_completed
|| !targetm
.have_conditional_execution ()))
4755 if (find_if_case_1 (test_bb
, then_edge
, else_edge
))
4757 if (find_if_case_2 (test_bb
, then_edge
, else_edge
))
4765 fprintf (dump_file
, "Conversion succeeded on pass %d.\n", pass
);
4766 /* Set this so we continue looking. */
4767 cond_exec_changed_p
= true;
4768 return ce_info
.test_bb
;
4771 /* Return true if a block has two edges, one of which falls through to the next
4772 block, and the other jumps to a specific block, so that we can tell if the
4773 block is part of an && test or an || test. Returns either -1 or the number
4774 of non-note, non-jump, non-USE/CLOBBER insns in the block. */
4777 block_jumps_and_fallthru (basic_block cur_bb
, basic_block target_bb
)
4780 bool fallthru_p
= false;
4781 bool jump_p
= false;
4787 if (!cur_bb
|| !target_bb
)
4790 /* If no edges, obviously it doesn't jump or fallthru. */
4791 if (EDGE_COUNT (cur_bb
->succs
) == 0)
4794 FOR_EACH_EDGE (cur_edge
, ei
, cur_bb
->succs
)
4796 if (cur_edge
->flags
& EDGE_COMPLEX
)
4797 /* Anything complex isn't what we want. */
4800 else if (cur_edge
->flags
& EDGE_FALLTHRU
)
4803 else if (cur_edge
->dest
== target_bb
)
4810 if ((jump_p
& fallthru_p
) == 0)
4813 /* Don't allow calls in the block, since this is used to group && and ||
4814 together for conditional execution support. ??? we should support
4815 conditional execution support across calls for IA-64 some day, but
4816 for now it makes the code simpler. */
4817 end
= BB_END (cur_bb
);
4818 insn
= BB_HEAD (cur_bb
);
4820 while (insn
!= NULL_RTX
)
4827 && !DEBUG_INSN_P (insn
)
4828 && GET_CODE (PATTERN (insn
)) != USE
4829 && GET_CODE (PATTERN (insn
)) != CLOBBER
)
4835 insn
= NEXT_INSN (insn
);
4841 /* Determine if a given basic block heads a simple IF-THEN or IF-THEN-ELSE
4842 block. If so, we'll try to convert the insns to not require the branch.
4843 Return TRUE if we were successful at converting the block. */
4846 cond_exec_find_if_block (struct ce_if_block
* ce_info
)
4848 basic_block test_bb
= ce_info
->test_bb
;
4849 basic_block then_bb
= ce_info
->then_bb
;
4850 basic_block else_bb
= ce_info
->else_bb
;
4851 basic_block join_bb
= NULL_BLOCK
;
4856 ce_info
->last_test_bb
= test_bb
;
4858 /* We only ever should get here after reload,
4859 and if we have conditional execution. */
4860 gcc_assert (reload_completed
&& targetm
.have_conditional_execution ());
4862 /* Discover if any fall through predecessors of the current test basic block
4863 were && tests (which jump to the else block) or || tests (which jump to
4865 if (single_pred_p (test_bb
)
4866 && single_pred_edge (test_bb
)->flags
== EDGE_FALLTHRU
)
4868 basic_block bb
= single_pred (test_bb
);
4869 basic_block target_bb
;
4870 int max_insns
= MAX_CONDITIONAL_EXECUTE
;
4873 /* Determine if the preceding block is an && or || block. */
4874 if ((n_insns
= block_jumps_and_fallthru (bb
, else_bb
)) >= 0)
4876 ce_info
->and_and_p
= true;
4877 target_bb
= else_bb
;
4879 else if ((n_insns
= block_jumps_and_fallthru (bb
, then_bb
)) >= 0)
4881 ce_info
->and_and_p
= false;
4882 target_bb
= then_bb
;
4885 target_bb
= NULL_BLOCK
;
4887 if (target_bb
&& n_insns
<= max_insns
)
4889 int total_insns
= 0;
4892 ce_info
->last_test_bb
= test_bb
;
4894 /* Found at least one && or || block, look for more. */
4897 ce_info
->test_bb
= test_bb
= bb
;
4898 total_insns
+= n_insns
;
4901 if (!single_pred_p (bb
))
4904 bb
= single_pred (bb
);
4905 n_insns
= block_jumps_and_fallthru (bb
, target_bb
);
4907 while (n_insns
>= 0 && (total_insns
+ n_insns
) <= max_insns
);
4909 ce_info
->num_multiple_test_blocks
= blocks
;
4910 ce_info
->num_multiple_test_insns
= total_insns
;
4912 if (ce_info
->and_and_p
)
4913 ce_info
->num_and_and_blocks
= blocks
;
4915 ce_info
->num_or_or_blocks
= blocks
;
4919 /* The THEN block of an IF-THEN combo must have exactly one predecessor,
4920 other than any || blocks which jump to the THEN block. */
4921 if ((EDGE_COUNT (then_bb
->preds
) - ce_info
->num_or_or_blocks
) != 1)
4924 /* The edges of the THEN and ELSE blocks cannot have complex edges. */
4925 FOR_EACH_EDGE (cur_edge
, ei
, then_bb
->preds
)
4927 if (cur_edge
->flags
& EDGE_COMPLEX
)
4931 FOR_EACH_EDGE (cur_edge
, ei
, else_bb
->preds
)
4933 if (cur_edge
->flags
& EDGE_COMPLEX
)
4937 /* The THEN block of an IF-THEN combo must have zero or one successors. */
4938 if (EDGE_COUNT (then_bb
->succs
) > 0
4939 && (!single_succ_p (then_bb
)
4940 || (single_succ_edge (then_bb
)->flags
& EDGE_COMPLEX
)
4941 || (epilogue_completed
4942 && tablejump_p (BB_END (then_bb
), NULL
, NULL
))))
4945 /* If the THEN block has no successors, conditional execution can still
4946 make a conditional call. Don't do this unless the ELSE block has
4947 only one incoming edge -- the CFG manipulation is too ugly otherwise.
4948 Check for the last insn of the THEN block being an indirect jump, which
4949 is listed as not having any successors, but confuses the rest of the CE
4950 code processing. ??? we should fix this in the future. */
4951 if (EDGE_COUNT (then_bb
->succs
) == 0)
4953 if (single_pred_p (else_bb
) && else_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4955 rtx_insn
*last_insn
= BB_END (then_bb
);
4958 && NOTE_P (last_insn
)
4959 && last_insn
!= BB_HEAD (then_bb
))
4960 last_insn
= PREV_INSN (last_insn
);
4963 && JUMP_P (last_insn
)
4964 && ! simplejump_p (last_insn
))
4968 else_bb
= NULL_BLOCK
;
4974 /* If the THEN block's successor is the other edge out of the TEST block,
4975 then we have an IF-THEN combo without an ELSE. */
4976 else if (single_succ (then_bb
) == else_bb
)
4979 else_bb
= NULL_BLOCK
;
4982 /* If the THEN and ELSE block meet in a subsequent block, and the ELSE
4983 has exactly one predecessor and one successor, and the outgoing edge
4984 is not complex, then we have an IF-THEN-ELSE combo. */
4985 else if (single_succ_p (else_bb
)
4986 && single_succ (then_bb
) == single_succ (else_bb
)
4987 && single_pred_p (else_bb
)
4988 && !(single_succ_edge (else_bb
)->flags
& EDGE_COMPLEX
)
4989 && !(epilogue_completed
4990 && tablejump_p (BB_END (else_bb
), NULL
, NULL
)))
4991 join_bb
= single_succ (else_bb
);
4993 /* Otherwise it is not an IF-THEN or IF-THEN-ELSE combination. */
4997 num_possible_if_blocks
++;
5002 "\nIF-THEN%s block found, pass %d, start block %d "
5003 "[insn %d], then %d [%d]",
5004 (else_bb
) ? "-ELSE" : "",
5007 BB_HEAD (test_bb
) ? (int)INSN_UID (BB_HEAD (test_bb
)) : -1,
5009 BB_HEAD (then_bb
) ? (int)INSN_UID (BB_HEAD (then_bb
)) : -1);
5012 fprintf (dump_file
, ", else %d [%d]",
5014 BB_HEAD (else_bb
) ? (int)INSN_UID (BB_HEAD (else_bb
)) : -1);
5016 fprintf (dump_file
, ", join %d [%d]",
5018 BB_HEAD (join_bb
) ? (int)INSN_UID (BB_HEAD (join_bb
)) : -1);
5020 if (ce_info
->num_multiple_test_blocks
> 0)
5021 fprintf (dump_file
, ", %d %s block%s last test %d [%d]",
5022 ce_info
->num_multiple_test_blocks
,
5023 (ce_info
->and_and_p
) ? "&&" : "||",
5024 (ce_info
->num_multiple_test_blocks
== 1) ? "" : "s",
5025 ce_info
->last_test_bb
->index
,
5026 ((BB_HEAD (ce_info
->last_test_bb
))
5027 ? (int)INSN_UID (BB_HEAD (ce_info
->last_test_bb
))
5030 fputc ('\n', dump_file
);
5033 /* Make sure IF, THEN, and ELSE, blocks are adjacent. Actually, we get the
5034 first condition for free, since we've already asserted that there's a
5035 fallthru edge from IF to THEN. Likewise for the && and || blocks, since
5036 we checked the FALLTHRU flag, those are already adjacent to the last IF
5038 /* ??? As an enhancement, move the ELSE block. Have to deal with
5039 BLOCK notes, if by no other means than backing out the merge if they
5040 exist. Sticky enough I don't want to think about it now. */
5042 if (else_bb
&& (next
= next
->next_bb
) != else_bb
)
5044 if ((next
= next
->next_bb
) != join_bb
5045 && join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
5053 /* Do the real work. */
5055 ce_info
->else_bb
= else_bb
;
5056 ce_info
->join_bb
= join_bb
;
5058 /* If we have && and || tests, try to first handle combining the && and ||
5059 tests into the conditional code, and if that fails, go back and handle
5060 it without the && and ||, which at present handles the && case if there
5061 was no ELSE block. */
5062 if (cond_exec_process_if_block (ce_info
, true))
5065 if (ce_info
->num_multiple_test_blocks
)
5069 if (cond_exec_process_if_block (ce_info
, false))
5076 /* Convert a branch over a trap, or a branch
5077 to a trap, into a conditional trap. */
5080 find_cond_trap (basic_block test_bb
, edge then_edge
, edge else_edge
)
5082 basic_block then_bb
= then_edge
->dest
;
5083 basic_block else_bb
= else_edge
->dest
;
5084 basic_block other_bb
, trap_bb
;
5085 rtx_insn
*trap
, *jump
;
5087 rtx_insn
*cond_earliest
;
5089 /* Locate the block with the trap instruction. */
5090 /* ??? While we look for no successors, we really ought to allow
5091 EH successors. Need to fix merge_if_block for that to work. */
5092 if ((trap
= block_has_only_trap (then_bb
)) != NULL
)
5093 trap_bb
= then_bb
, other_bb
= else_bb
;
5094 else if ((trap
= block_has_only_trap (else_bb
)) != NULL
)
5095 trap_bb
= else_bb
, other_bb
= then_bb
;
5101 fprintf (dump_file
, "\nTRAP-IF block found, start %d, trap %d\n",
5102 test_bb
->index
, trap_bb
->index
);
5105 /* If this is not a standard conditional jump, we can't parse it. */
5106 jump
= BB_END (test_bb
);
5107 cond
= noce_get_condition (jump
, &cond_earliest
, then_bb
== trap_bb
);
5111 /* If the conditional jump is more than just a conditional jump, then
5112 we cannot do if-conversion on this block. Give up for returnjump_p,
5113 changing a conditional return followed by unconditional trap for
5114 conditional trap followed by unconditional return is likely not
5115 beneficial and harder to handle. */
5116 if (! onlyjump_p (jump
) || returnjump_p (jump
))
5119 /* We must be comparing objects whose modes imply the size. */
5120 if (GET_MODE (XEXP (cond
, 0)) == BLKmode
)
5123 /* Attempt to generate the conditional trap. */
5124 rtx_insn
*seq
= gen_cond_trap (GET_CODE (cond
), copy_rtx (XEXP (cond
, 0)),
5125 copy_rtx (XEXP (cond
, 1)),
5126 TRAP_CODE (PATTERN (trap
)));
5130 /* If that results in an invalid insn, back out. */
5131 for (rtx_insn
*x
= seq
; x
; x
= NEXT_INSN (x
))
5132 if (reload_completed
5134 : recog_memoized (x
) < 0)
5137 /* Emit the new insns before cond_earliest. */
5138 emit_insn_before_setloc (seq
, cond_earliest
, INSN_LOCATION (trap
));
5140 /* Delete the trap block if possible. */
5141 remove_edge (trap_bb
== then_bb
? then_edge
: else_edge
);
5142 df_set_bb_dirty (test_bb
);
5143 df_set_bb_dirty (then_bb
);
5144 df_set_bb_dirty (else_bb
);
5146 if (EDGE_COUNT (trap_bb
->preds
) == 0)
5148 delete_basic_block (trap_bb
);
5152 /* Wire together the blocks again. */
5153 if (current_ir_type () == IR_RTL_CFGLAYOUT
)
5154 single_succ_edge (test_bb
)->flags
|= EDGE_FALLTHRU
;
5155 else if (trap_bb
== then_bb
)
5157 rtx lab
= JUMP_LABEL (jump
);
5158 rtx_insn
*seq
= targetm
.gen_jump (lab
);
5159 rtx_jump_insn
*newjump
= emit_jump_insn_after (seq
, jump
);
5160 LABEL_NUSES (lab
) += 1;
5161 JUMP_LABEL (newjump
) = lab
;
5162 emit_barrier_after (newjump
);
5166 if (can_merge_blocks_p (test_bb
, other_bb
))
5168 merge_blocks (test_bb
, other_bb
);
5172 num_updated_if_blocks
++;
5176 /* Subroutine of find_cond_trap: if BB contains only a trap insn,
5180 block_has_only_trap (basic_block bb
)
5184 /* We're not the exit block. */
5185 if (bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
5188 /* The block must have no successors. */
5189 if (EDGE_COUNT (bb
->succs
) > 0)
5192 /* The only instruction in the THEN block must be the trap. */
5193 trap
= first_active_insn (bb
);
5194 if (! (trap
== BB_END (bb
)
5195 && GET_CODE (PATTERN (trap
)) == TRAP_IF
5196 && TRAP_CONDITION (PATTERN (trap
)) == const_true_rtx
))
5202 /* Look for IF-THEN-ELSE cases in which one of THEN or ELSE is
5203 transformable, but not necessarily the other. There need be no
5206 Return TRUE if we were successful at converting the block.
5208 Cases we'd like to look at:
5211 if (test) goto over; // x not live
5219 if (! test) goto label;
5222 if (test) goto E; // x not live
5236 (3) // This one's really only interesting for targets that can do
5237 // multiway branching, e.g. IA-64 BBB bundles. For other targets
5238 // it results in multiple branches on a cache line, which often
5239 // does not sit well with predictors.
5241 if (test1) goto E; // predicted not taken
5257 (A) Don't do (2) if the branch is predicted against the block we're
5258 eliminating. Do it anyway if we can eliminate a branch; this requires
5259 that the sole successor of the eliminated block postdominate the other
5262 (B) With CE, on (3) we can steal from both sides of the if, creating
5271 Again, this is most useful if J postdominates.
5273 (C) CE substitutes for helpful life information.
5275 (D) These heuristics need a lot of work. */
5277 /* Tests for case 1 above. */
5280 find_if_case_1 (basic_block test_bb
, edge then_edge
, edge else_edge
)
5282 basic_block then_bb
= then_edge
->dest
;
5283 basic_block else_bb
= else_edge
->dest
;
5286 profile_probability then_prob
;
5287 rtx else_target
= NULL_RTX
;
5289 /* If we are partitioning hot/cold basic blocks, we don't want to
5290 mess up unconditional or indirect jumps that cross between hot
5293 Basic block partitioning may result in some jumps that appear to
5294 be optimizable (or blocks that appear to be mergeable), but which really
5295 must be left untouched (they are required to make it safely across
5296 partition boundaries). See the comments at the top of
5297 bb-reorder.cc:partition_hot_cold_basic_blocks for complete details. */
5299 if ((BB_END (then_bb
)
5300 && JUMP_P (BB_END (then_bb
))
5301 && CROSSING_JUMP_P (BB_END (then_bb
)))
5302 || (JUMP_P (BB_END (test_bb
))
5303 && CROSSING_JUMP_P (BB_END (test_bb
)))
5304 || (BB_END (else_bb
)
5305 && JUMP_P (BB_END (else_bb
))
5306 && CROSSING_JUMP_P (BB_END (else_bb
))))
5309 /* Verify test_bb ends in a conditional jump with no other side-effects. */
5310 if (!onlyjump_p (BB_END (test_bb
)))
5313 /* THEN has one successor. */
5314 if (!single_succ_p (then_bb
))
5317 /* THEN does not fall through, but is not strange either. */
5318 if (single_succ_edge (then_bb
)->flags
& (EDGE_COMPLEX
| EDGE_FALLTHRU
))
5321 /* THEN has one predecessor. */
5322 if (!single_pred_p (then_bb
))
5325 /* THEN must do something. */
5326 if (forwarder_block_p (then_bb
))
5329 num_possible_if_blocks
++;
5332 "\nIF-CASE-1 found, start %d, then %d\n",
5333 test_bb
->index
, then_bb
->index
);
5335 then_prob
= then_edge
->probability
.invert ();
5337 /* We're speculating from the THEN path, we want to make sure the cost
5338 of speculation is within reason. */
5339 if (! cheap_bb_rtx_cost_p (then_bb
, then_prob
,
5340 COSTS_N_INSNS (BRANCH_COST (optimize_bb_for_speed_p (then_edge
->src
),
5341 predictable_edge_p (then_edge
)))))
5344 if (else_bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
5346 rtx_insn
*jump
= BB_END (else_edge
->src
);
5347 gcc_assert (JUMP_P (jump
));
5348 else_target
= JUMP_LABEL (jump
);
5351 /* Registers set are dead, or are predicable. */
5352 if (! dead_or_predicable (test_bb
, then_bb
, else_bb
,
5353 single_succ_edge (then_bb
), true))
5356 /* Conversion went ok, including moving the insns and fixing up the
5357 jump. Adjust the CFG to match. */
5359 /* We can avoid creating a new basic block if then_bb is immediately
5360 followed by else_bb, i.e. deleting then_bb allows test_bb to fall
5361 through to else_bb. */
5363 if (then_bb
->next_bb
== else_bb
5364 && then_bb
->prev_bb
== test_bb
5365 && else_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
5367 redirect_edge_succ (FALLTHRU_EDGE (test_bb
), else_bb
);
5370 else if (else_bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
5371 new_bb
= force_nonfallthru_and_redirect (FALLTHRU_EDGE (test_bb
),
5372 else_bb
, else_target
);
5374 new_bb
= redirect_edge_and_branch_force (FALLTHRU_EDGE (test_bb
),
5377 df_set_bb_dirty (test_bb
);
5378 df_set_bb_dirty (else_bb
);
5380 then_bb_index
= then_bb
->index
;
5381 delete_basic_block (then_bb
);
5383 /* Make rest of code believe that the newly created block is the THEN_BB
5384 block we removed. */
5387 df_bb_replace (then_bb_index
, new_bb
);
5388 /* This should have been done above via force_nonfallthru_and_redirect
5389 (possibly called from redirect_edge_and_branch_force). */
5390 gcc_checking_assert (BB_PARTITION (new_bb
) == BB_PARTITION (test_bb
));
5394 num_updated_if_blocks
++;
5398 /* Test for case 2 above. */
5401 find_if_case_2 (basic_block test_bb
, edge then_edge
, edge else_edge
)
5403 basic_block then_bb
= then_edge
->dest
;
5404 basic_block else_bb
= else_edge
->dest
;
5406 profile_probability then_prob
, else_prob
;
5408 /* We do not want to speculate (empty) loop latches. */
5410 && else_bb
->loop_father
->latch
== else_bb
)
5413 /* If we are partitioning hot/cold basic blocks, we don't want to
5414 mess up unconditional or indirect jumps that cross between hot
5417 Basic block partitioning may result in some jumps that appear to
5418 be optimizable (or blocks that appear to be mergeable), but which really
5419 must be left untouched (they are required to make it safely across
5420 partition boundaries). See the comments at the top of
5421 bb-reorder.cc:partition_hot_cold_basic_blocks for complete details. */
5423 if ((BB_END (then_bb
)
5424 && JUMP_P (BB_END (then_bb
))
5425 && CROSSING_JUMP_P (BB_END (then_bb
)))
5426 || (JUMP_P (BB_END (test_bb
))
5427 && CROSSING_JUMP_P (BB_END (test_bb
)))
5428 || (BB_END (else_bb
)
5429 && JUMP_P (BB_END (else_bb
))
5430 && CROSSING_JUMP_P (BB_END (else_bb
))))
5433 /* Verify test_bb ends in a conditional jump with no other side-effects. */
5434 if (!onlyjump_p (BB_END (test_bb
)))
5437 /* ELSE has one successor. */
5438 if (!single_succ_p (else_bb
))
5441 else_succ
= single_succ_edge (else_bb
);
5443 /* ELSE outgoing edge is not complex. */
5444 if (else_succ
->flags
& EDGE_COMPLEX
)
5447 /* ELSE has one predecessor. */
5448 if (!single_pred_p (else_bb
))
5451 /* THEN is not EXIT. */
5452 if (then_bb
->index
< NUM_FIXED_BLOCKS
)
5455 else_prob
= else_edge
->probability
;
5456 then_prob
= else_prob
.invert ();
5458 /* ELSE is predicted or SUCC(ELSE) postdominates THEN. */
5459 if (else_prob
> then_prob
)
5461 else if (else_succ
->dest
->index
< NUM_FIXED_BLOCKS
5462 || dominated_by_p (CDI_POST_DOMINATORS
, then_bb
,
5468 num_possible_if_blocks
++;
5471 "\nIF-CASE-2 found, start %d, else %d\n",
5472 test_bb
->index
, else_bb
->index
);
5474 /* We're speculating from the ELSE path, we want to make sure the cost
5475 of speculation is within reason. */
5476 if (! cheap_bb_rtx_cost_p (else_bb
, else_prob
,
5477 COSTS_N_INSNS (BRANCH_COST (optimize_bb_for_speed_p (else_edge
->src
),
5478 predictable_edge_p (else_edge
)))))
5481 /* Registers set are dead, or are predicable. */
5482 if (! dead_or_predicable (test_bb
, else_bb
, then_bb
, else_succ
, false))
5485 /* Conversion went ok, including moving the insns and fixing up the
5486 jump. Adjust the CFG to match. */
5488 df_set_bb_dirty (test_bb
);
5489 df_set_bb_dirty (then_bb
);
5490 delete_basic_block (else_bb
);
5493 num_updated_if_blocks
++;
5495 /* ??? We may now fallthru from one of THEN's successors into a join
5496 block. Rerun cleanup_cfg? Examine things manually? Wait? */
5501 /* Used by the code above to perform the actual rtl transformations.
5502 Return TRUE if successful.
5504 TEST_BB is the block containing the conditional branch. MERGE_BB
5505 is the block containing the code to manipulate. DEST_EDGE is an
5506 edge representing a jump to the join block; after the conversion,
5507 TEST_BB should be branching to its destination.
5508 REVERSEP is true if the sense of the branch should be reversed. */
5511 dead_or_predicable (basic_block test_bb
, basic_block merge_bb
,
5512 basic_block other_bb
, edge dest_edge
, bool reversep
)
5514 basic_block new_dest
= dest_edge
->dest
;
5515 rtx_insn
*head
, *end
, *jump
;
5516 rtx_insn
*earliest
= NULL
;
5518 bitmap merge_set
= NULL
;
5519 /* Number of pending changes. */
5520 int n_validated_changes
= 0;
5521 rtx new_dest_label
= NULL_RTX
;
5523 jump
= BB_END (test_bb
);
5525 /* Find the extent of the real code in the merge block. */
5526 head
= BB_HEAD (merge_bb
);
5527 end
= BB_END (merge_bb
);
5529 while (DEBUG_INSN_P (end
) && end
!= head
)
5530 end
= PREV_INSN (end
);
5532 /* If merge_bb ends with a tablejump, predicating/moving insn's
5533 into test_bb and then deleting merge_bb will result in the jumptable
5534 that follows merge_bb being removed along with merge_bb and then we
5535 get an unresolved reference to the jumptable. */
5536 if (tablejump_p (end
, NULL
, NULL
))
5540 head
= NEXT_INSN (head
);
5541 while (DEBUG_INSN_P (head
) && head
!= end
)
5542 head
= NEXT_INSN (head
);
5550 head
= NEXT_INSN (head
);
5551 while (DEBUG_INSN_P (head
) && head
!= end
)
5552 head
= NEXT_INSN (head
);
5557 if (!onlyjump_p (end
))
5564 end
= PREV_INSN (end
);
5565 while (DEBUG_INSN_P (end
) && end
!= head
)
5566 end
= PREV_INSN (end
);
5569 /* Don't move frame-related insn across the conditional branch. This
5570 can lead to one of the paths of the branch having wrong unwind info. */
5571 if (epilogue_completed
)
5573 rtx_insn
*insn
= head
;
5576 if (INSN_P (insn
) && RTX_FRAME_RELATED_P (insn
))
5580 insn
= NEXT_INSN (insn
);
5584 /* Disable handling dead code by conditional execution if the machine needs
5585 to do anything funny with the tests, etc. */
5586 #ifndef IFCVT_MODIFY_TESTS
5587 if (targetm
.have_conditional_execution ())
5589 /* In the conditional execution case, we have things easy. We know
5590 the condition is reversible. We don't have to check life info
5591 because we're going to conditionally execute the code anyway.
5592 All that's left is making sure the insns involved can actually
5597 /* If the conditional jump is more than just a conditional jump,
5598 then we cannot do conditional execution conversion on this block. */
5599 if (!onlyjump_p (jump
))
5602 cond
= cond_exec_get_condition (jump
);
5606 rtx note
= find_reg_note (jump
, REG_BR_PROB
, NULL_RTX
);
5607 profile_probability prob_val
5608 = (note
? profile_probability::from_reg_br_prob_note (XINT (note
, 0))
5609 : profile_probability::uninitialized ());
5613 enum rtx_code rev
= reversed_comparison_code (cond
, jump
);
5616 cond
= gen_rtx_fmt_ee (rev
, GET_MODE (cond
), XEXP (cond
, 0),
5618 prob_val
= prob_val
.invert ();
5621 if (cond_exec_process_insns (NULL
, head
, end
, cond
, prob_val
, false)
5622 && verify_changes (0))
5623 n_validated_changes
= num_validated_changes ();
5632 /* If we allocated new pseudos (e.g. in the conditional move
5633 expander called from noce_emit_cmove), we must resize the
5635 if (max_regno
< max_reg_num ())
5636 max_regno
= max_reg_num ();
5638 /* Try the NCE path if the CE path did not result in any changes. */
5639 if (n_validated_changes
== 0)
5646 /* In the non-conditional execution case, we have to verify that there
5647 are no trapping operations, no calls, no references to memory, and
5648 that any registers modified are dead at the branch site. */
5650 if (!any_condjump_p (jump
))
5653 /* Find the extent of the conditional. */
5654 cond
= noce_get_condition (jump
, &earliest
, false);
5658 live
= BITMAP_ALLOC (®_obstack
);
5659 simulate_backwards_to_point (merge_bb
, live
, end
);
5660 success
= can_move_insns_across (head
, end
, earliest
, jump
,
5662 df_get_live_in (other_bb
), NULL
);
5667 /* Collect the set of registers set in MERGE_BB. */
5668 merge_set
= BITMAP_ALLOC (®_obstack
);
5670 FOR_BB_INSNS (merge_bb
, insn
)
5671 if (NONDEBUG_INSN_P (insn
))
5672 df_simulate_find_defs (insn
, merge_set
);
5674 /* If shrink-wrapping, disable this optimization when test_bb is
5675 the first basic block and merge_bb exits. The idea is to not
5676 move code setting up a return register as that may clobber a
5677 register used to pass function parameters, which then must be
5678 saved in caller-saved regs. A caller-saved reg requires the
5679 prologue, killing a shrink-wrap opportunity. */
5680 if ((SHRINK_WRAPPING_ENABLED
&& !epilogue_completed
)
5681 && ENTRY_BLOCK_PTR_FOR_FN (cfun
)->next_bb
== test_bb
5682 && single_succ_p (new_dest
)
5683 && single_succ (new_dest
) == EXIT_BLOCK_PTR_FOR_FN (cfun
)
5684 && bitmap_intersect_p (df_get_live_in (new_dest
), merge_set
))
5689 return_regs
= BITMAP_ALLOC (®_obstack
);
5691 /* Start off with the intersection of regs used to pass
5692 params and regs used to return values. */
5693 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5694 if (FUNCTION_ARG_REGNO_P (i
)
5695 && targetm
.calls
.function_value_regno_p (i
))
5696 bitmap_set_bit (return_regs
, INCOMING_REGNO (i
));
5698 bitmap_and_into (return_regs
,
5699 df_get_live_out (ENTRY_BLOCK_PTR_FOR_FN (cfun
)));
5700 bitmap_and_into (return_regs
,
5701 df_get_live_in (EXIT_BLOCK_PTR_FOR_FN (cfun
)));
5702 if (!bitmap_empty_p (return_regs
))
5704 FOR_BB_INSNS_REVERSE (new_dest
, insn
)
5705 if (NONDEBUG_INSN_P (insn
))
5709 /* If this insn sets any reg in return_regs, add all
5710 reg uses to the set of regs we're interested in. */
5711 FOR_EACH_INSN_DEF (def
, insn
)
5712 if (bitmap_bit_p (return_regs
, DF_REF_REGNO (def
)))
5714 df_simulate_uses (insn
, return_regs
);
5718 if (bitmap_intersect_p (merge_set
, return_regs
))
5720 BITMAP_FREE (return_regs
);
5721 BITMAP_FREE (merge_set
);
5725 BITMAP_FREE (return_regs
);
5730 /* We don't want to use normal invert_jump or redirect_jump because
5731 we don't want to delete_insn called. Also, we want to do our own
5732 change group management. */
5734 old_dest
= JUMP_LABEL (jump
);
5735 if (other_bb
!= new_dest
)
5737 if (!any_condjump_p (jump
))
5740 if (JUMP_P (BB_END (dest_edge
->src
)))
5741 new_dest_label
= JUMP_LABEL (BB_END (dest_edge
->src
));
5742 else if (new_dest
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
5743 new_dest_label
= ret_rtx
;
5745 new_dest_label
= block_label (new_dest
);
5747 rtx_jump_insn
*jump_insn
= as_a
<rtx_jump_insn
*> (jump
);
5749 ? ! invert_jump_1 (jump_insn
, new_dest_label
)
5750 : ! redirect_jump_1 (jump_insn
, new_dest_label
))
5754 if (verify_changes (n_validated_changes
))
5755 confirm_change_group ();
5759 if (other_bb
!= new_dest
)
5761 redirect_jump_2 (as_a
<rtx_jump_insn
*> (jump
), old_dest
, new_dest_label
,
5764 redirect_edge_succ (BRANCH_EDGE (test_bb
), new_dest
);
5767 std::swap (BRANCH_EDGE (test_bb
)->probability
,
5768 FALLTHRU_EDGE (test_bb
)->probability
);
5769 update_br_prob_note (test_bb
);
5773 /* Move the insns out of MERGE_BB to before the branch. */
5778 if (end
== BB_END (merge_bb
))
5779 BB_END (merge_bb
) = PREV_INSN (head
);
5781 /* PR 21767: when moving insns above a conditional branch, the REG_EQUAL
5782 notes being moved might become invalid. */
5788 if (! INSN_P (insn
))
5790 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
5793 remove_note (insn
, note
);
5794 } while (insn
!= end
&& (insn
= NEXT_INSN (insn
)));
5796 /* PR46315: when moving insns above a conditional branch, the REG_EQUAL
5797 notes referring to the registers being set might become invalid. */
5803 EXECUTE_IF_SET_IN_BITMAP (merge_set
, 0, i
, bi
)
5804 remove_reg_equal_equiv_notes_for_regno (i
);
5806 BITMAP_FREE (merge_set
);
5809 reorder_insns (head
, end
, PREV_INSN (earliest
));
5812 /* Remove the jump and edge if we can. */
5813 if (other_bb
== new_dest
)
5816 remove_edge (BRANCH_EDGE (test_bb
));
5817 /* ??? Can't merge blocks here, as then_bb is still in use.
5818 At minimum, the merge will get done just before bb-reorder. */
5827 BITMAP_FREE (merge_set
);
5832 /* Main entry point for all if-conversion. AFTER_COMBINE is true if
5833 we are after combine pass. */
5836 if_convert (bool after_combine
)
5843 df_live_add_problem ();
5844 df_live_set_all_dirty ();
5847 /* Record whether we are after combine pass. */
5848 ifcvt_after_combine
= after_combine
;
5849 have_cbranchcc4
= (direct_optab_handler (cbranch_optab
, CCmode
)
5850 != CODE_FOR_nothing
);
5851 num_possible_if_blocks
= 0;
5852 num_updated_if_blocks
= 0;
5853 num_true_changes
= 0;
5855 loop_optimizer_init (AVOID_CFG_MODIFICATIONS
);
5856 mark_loop_exit_edges ();
5857 loop_optimizer_finalize ();
5858 free_dominance_info (CDI_DOMINATORS
);
5860 /* Compute postdominators. */
5861 calculate_dominance_info (CDI_POST_DOMINATORS
);
5863 df_set_flags (DF_LR_RUN_DCE
);
5865 /* Go through each of the basic blocks looking for things to convert. If we
5866 have conditional execution, we make multiple passes to allow us to handle
5867 IF-THEN{-ELSE} blocks within other IF-THEN{-ELSE} blocks. */
5872 /* Only need to do dce on the first pass. */
5873 df_clear_flags (DF_LR_RUN_DCE
);
5874 cond_exec_changed_p
= false;
5877 #ifdef IFCVT_MULTIPLE_DUMPS
5878 if (dump_file
&& pass
> 1)
5879 fprintf (dump_file
, "\n\n========== Pass %d ==========\n", pass
);
5882 FOR_EACH_BB_FN (bb
, cfun
)
5885 while (!df_get_bb_dirty (bb
)
5886 && (new_bb
= find_if_header (bb
, pass
)) != NULL
)
5890 #ifdef IFCVT_MULTIPLE_DUMPS
5891 if (dump_file
&& cond_exec_changed_p
)
5892 print_rtl_with_bb (dump_file
, get_insns (), dump_flags
);
5895 while (cond_exec_changed_p
);
5897 #ifdef IFCVT_MULTIPLE_DUMPS
5899 fprintf (dump_file
, "\n\n========== no more changes\n");
5902 free_dominance_info (CDI_POST_DOMINATORS
);
5907 clear_aux_for_blocks ();
5909 /* If we allocated new pseudos, we must resize the array for sched1. */
5910 if (max_regno
< max_reg_num ())
5911 max_regno
= max_reg_num ();
5913 /* Write the final stats. */
5914 if (dump_file
&& num_possible_if_blocks
> 0)
5917 "\n%d possible IF blocks searched.\n",
5918 num_possible_if_blocks
);
5920 "%d IF blocks converted.\n",
5921 num_updated_if_blocks
);
5923 "%d true changes made.\n\n\n",
5928 df_remove_problem (df_live
);
5930 /* Some non-cold blocks may now be only reachable from cold blocks.
5932 fixup_partitions ();
5934 checking_verify_flow_info ();
5937 /* If-conversion and CFG cleanup. */
5939 rest_of_handle_if_conversion (void)
5943 if (flag_if_conversion
)
5947 dump_reg_info (dump_file
);
5948 dump_flow_info (dump_file
, dump_flags
);
5950 cleanup_cfg (CLEANUP_EXPENSIVE
);
5952 if (num_updated_if_blocks
)
5953 /* Get rid of any dead CC-related instructions. */
5954 flags
|= CLEANUP_FORCE_FAST_DCE
;
5957 cleanup_cfg (flags
);
5962 const pass_data pass_data_rtl_ifcvt
=
5964 RTL_PASS
, /* type */
5966 OPTGROUP_NONE
, /* optinfo_flags */
5967 TV_IFCVT
, /* tv_id */
5968 0, /* properties_required */
5969 0, /* properties_provided */
5970 0, /* properties_destroyed */
5971 0, /* todo_flags_start */
5972 TODO_df_finish
, /* todo_flags_finish */
5975 class pass_rtl_ifcvt
: public rtl_opt_pass
5978 pass_rtl_ifcvt (gcc::context
*ctxt
)
5979 : rtl_opt_pass (pass_data_rtl_ifcvt
, ctxt
)
5982 /* opt_pass methods: */
5983 bool gate (function
*) final override
5985 return (optimize
> 0) && dbg_cnt (if_conversion
);
5988 unsigned int execute (function
*) final override
5990 rest_of_handle_if_conversion ();
5994 }; // class pass_rtl_ifcvt
5999 make_pass_rtl_ifcvt (gcc::context
*ctxt
)
6001 return new pass_rtl_ifcvt (ctxt
);
6005 /* Rerun if-conversion, as combine may have simplified things enough
6006 to now meet sequence length restrictions. */
6010 const pass_data pass_data_if_after_combine
=
6012 RTL_PASS
, /* type */
6014 OPTGROUP_NONE
, /* optinfo_flags */
6015 TV_IFCVT
, /* tv_id */
6016 0, /* properties_required */
6017 0, /* properties_provided */
6018 0, /* properties_destroyed */
6019 0, /* todo_flags_start */
6020 TODO_df_finish
, /* todo_flags_finish */
6023 class pass_if_after_combine
: public rtl_opt_pass
6026 pass_if_after_combine (gcc::context
*ctxt
)
6027 : rtl_opt_pass (pass_data_if_after_combine
, ctxt
)
6030 /* opt_pass methods: */
6031 bool gate (function
*) final override
6033 return optimize
> 0 && flag_if_conversion
6034 && dbg_cnt (if_after_combine
);
6037 unsigned int execute (function
*) final override
6043 }; // class pass_if_after_combine
6048 make_pass_if_after_combine (gcc::context
*ctxt
)
6050 return new pass_if_after_combine (ctxt
);
6056 const pass_data pass_data_if_after_reload
=
6058 RTL_PASS
, /* type */
6060 OPTGROUP_NONE
, /* optinfo_flags */
6061 TV_IFCVT2
, /* tv_id */
6062 0, /* properties_required */
6063 0, /* properties_provided */
6064 0, /* properties_destroyed */
6065 0, /* todo_flags_start */
6066 TODO_df_finish
, /* todo_flags_finish */
6069 class pass_if_after_reload
: public rtl_opt_pass
6072 pass_if_after_reload (gcc::context
*ctxt
)
6073 : rtl_opt_pass (pass_data_if_after_reload
, ctxt
)
6076 /* opt_pass methods: */
6077 bool gate (function
*) final override
6079 return optimize
> 0 && flag_if_conversion2
6080 && dbg_cnt (if_after_reload
);
6083 unsigned int execute (function
*) final override
6089 }; // class pass_if_after_reload
6094 make_pass_if_after_reload (gcc::context
*ctxt
)
6096 return new pass_if_after_reload (ctxt
);