gcc/testsuite/gcc.dg/rs6000-power2-1.c

   1 /* { dg-do compile { target powerpc-*-* rs6000-*-* }  } */
   2 /* { dg-options "-O3 -mcpu=power2 -fno-schedule-insns -w -mhard-float" } */
   3 /* This used to ICE as the peephole was not checking to see
   4    if the register is a floating point one (I think this cannot
   5    happen in real life except in this example).  */
   6
   7 register volatile double t1 __asm__("r14");
   8 register volatile double t2 __asm__("r15");
   9 register volatile double t3 __asm__("r16"), t4 __asm__("r17");
  10 void t(double *a, double *b)
  11 {
  12         t1 = a[-1];
  13         t2 = a[0];
  14         t3 = a[1];
  15         t4 = a[2];
  16         b[-1] = t1;
  17         b[0] = t2;
  18         b[1] = t3;
  19         b[2] = t4;
  20 }
  21