1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998
3 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* stdio.h must precede rtl.h for FFS. */
25 #include "coretypes.h"
31 #include "hard-reg-set.h"
32 #include "basic-block.h"
35 #include "insn-config.h"
46 #include "rtlhooks-def.h"
48 /* The basic idea of common subexpression elimination is to go
49 through the code, keeping a record of expressions that would
50 have the same value at the current scan point, and replacing
51 expressions encountered with the cheapest equivalent expression.
53 It is too complicated to keep track of the different possibilities
54 when control paths merge in this code; so, at each label, we forget all
55 that is known and start fresh. This can be described as processing each
56 extended basic block separately. We have a separate pass to perform
59 Note CSE can turn a conditional or computed jump into a nop or
60 an unconditional jump. When this occurs we arrange to run the jump
61 optimizer after CSE to delete the unreachable code.
63 We use two data structures to record the equivalent expressions:
64 a hash table for most expressions, and a vector of "quantity
65 numbers" to record equivalent (pseudo) registers.
67 The use of the special data structure for registers is desirable
68 because it is faster. It is possible because registers references
69 contain a fairly small number, the register number, taken from
70 a contiguously allocated series, and two register references are
71 identical if they have the same number. General expressions
72 do not have any such thing, so the only way to retrieve the
73 information recorded on an expression other than a register
74 is to keep it in a hash table.
76 Registers and "quantity numbers":
78 At the start of each basic block, all of the (hardware and pseudo)
79 registers used in the function are given distinct quantity
80 numbers to indicate their contents. During scan, when the code
81 copies one register into another, we copy the quantity number.
82 When a register is loaded in any other way, we allocate a new
83 quantity number to describe the value generated by this operation.
84 `reg_qty' records what quantity a register is currently thought
87 All real quantity numbers are greater than or equal to zero.
88 If register N has not been assigned a quantity, reg_qty[N] will
89 equal -N - 1, which is always negative.
91 Quantity numbers below zero do not exist and none of the `qty_table'
92 entries should be referenced with a negative index.
94 We also maintain a bidirectional chain of registers for each
95 quantity number. The `qty_table` members `first_reg' and `last_reg',
96 and `reg_eqv_table' members `next' and `prev' hold these chains.
98 The first register in a chain is the one whose lifespan is least local.
99 Among equals, it is the one that was seen first.
100 We replace any equivalent register with that one.
102 If two registers have the same quantity number, it must be true that
103 REG expressions with qty_table `mode' must be in the hash table for both
104 registers and must be in the same class.
106 The converse is not true. Since hard registers may be referenced in
107 any mode, two REG expressions might be equivalent in the hash table
108 but not have the same quantity number if the quantity number of one
109 of the registers is not the same mode as those expressions.
111 Constants and quantity numbers
113 When a quantity has a known constant value, that value is stored
114 in the appropriate qty_table `const_rtx'. This is in addition to
115 putting the constant in the hash table as is usual for non-regs.
117 Whether a reg or a constant is preferred is determined by the configuration
118 macro CONST_COSTS and will often depend on the constant value. In any
119 event, expressions containing constants can be simplified, by fold_rtx.
121 When a quantity has a known nearly constant value (such as an address
122 of a stack slot), that value is stored in the appropriate qty_table
125 Integer constants don't have a machine mode. However, cse
126 determines the intended machine mode from the destination
127 of the instruction that moves the constant. The machine mode
128 is recorded in the hash table along with the actual RTL
129 constant expression so that different modes are kept separate.
133 To record known equivalences among expressions in general
134 we use a hash table called `table'. It has a fixed number of buckets
135 that contain chains of `struct table_elt' elements for expressions.
136 These chains connect the elements whose expressions have the same
139 Other chains through the same elements connect the elements which
140 currently have equivalent values.
142 Register references in an expression are canonicalized before hashing
143 the expression. This is done using `reg_qty' and qty_table `first_reg'.
144 The hash code of a register reference is computed using the quantity
145 number, not the register number.
147 When the value of an expression changes, it is necessary to remove from the
148 hash table not just that expression but all expressions whose values
149 could be different as a result.
151 1. If the value changing is in memory, except in special cases
152 ANYTHING referring to memory could be changed. That is because
153 nobody knows where a pointer does not point.
154 The function `invalidate_memory' removes what is necessary.
156 The special cases are when the address is constant or is
157 a constant plus a fixed register such as the frame pointer
158 or a static chain pointer. When such addresses are stored in,
159 we can tell exactly which other such addresses must be invalidated
160 due to overlap. `invalidate' does this.
161 All expressions that refer to non-constant
162 memory addresses are also invalidated. `invalidate_memory' does this.
164 2. If the value changing is a register, all expressions
165 containing references to that register, and only those,
168 Because searching the entire hash table for expressions that contain
169 a register is very slow, we try to figure out when it isn't necessary.
170 Precisely, this is necessary only when expressions have been
171 entered in the hash table using this register, and then the value has
172 changed, and then another expression wants to be added to refer to
173 the register's new value. This sequence of circumstances is rare
174 within any one basic block.
176 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
177 reg_tick[i] is incremented whenever a value is stored in register i.
178 reg_in_table[i] holds -1 if no references to register i have been
179 entered in the table; otherwise, it contains the value reg_tick[i] had
180 when the references were entered. If we want to enter a reference
181 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
182 Until we want to enter a new entry, the mere fact that the two vectors
183 don't match makes the entries be ignored if anyone tries to match them.
185 Registers themselves are entered in the hash table as well as in
186 the equivalent-register chains. However, the vectors `reg_tick'
187 and `reg_in_table' do not apply to expressions which are simple
188 register references. These expressions are removed from the table
189 immediately when they become invalid, and this can be done even if
190 we do not immediately search for all the expressions that refer to
193 A CLOBBER rtx in an instruction invalidates its operand for further
194 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
195 invalidates everything that resides in memory.
199 Constant expressions that differ only by an additive integer
200 are called related. When a constant expression is put in
201 the table, the related expression with no constant term
202 is also entered. These are made to point at each other
203 so that it is possible to find out if there exists any
204 register equivalent to an expression related to a given expression. */
206 /* One plus largest register number used in this function. */
210 /* One plus largest instruction UID used in this function at time of
213 static int max_insn_uid
;
215 /* Length of qty_table vector. We know in advance we will not need
216 a quantity number this big. */
220 /* Next quantity number to be allocated.
221 This is 1 + the largest number needed so far. */
225 /* Per-qty information tracking.
227 `first_reg' and `last_reg' track the head and tail of the
228 chain of registers which currently contain this quantity.
230 `mode' contains the machine mode of this quantity.
232 `const_rtx' holds the rtx of the constant value of this
233 quantity, if known. A summations of the frame/arg pointer
234 and a constant can also be entered here. When this holds
235 a known value, `const_insn' is the insn which stored the
238 `comparison_{code,const,qty}' are used to track when a
239 comparison between a quantity and some constant or register has
240 been passed. In such a case, we know the results of the comparison
241 in case we see it again. These members record a comparison that
242 is known to be true. `comparison_code' holds the rtx code of such
243 a comparison, else it is set to UNKNOWN and the other two
244 comparison members are undefined. `comparison_const' holds
245 the constant being compared against, or zero if the comparison
246 is not against a constant. `comparison_qty' holds the quantity
247 being compared against when the result is known. If the comparison
248 is not with a register, `comparison_qty' is -1. */
250 struct qty_table_elem
254 rtx comparison_const
;
256 unsigned int first_reg
, last_reg
;
257 /* The sizes of these fields should match the sizes of the
258 code and mode fields of struct rtx_def (see rtl.h). */
259 ENUM_BITFIELD(rtx_code
) comparison_code
: 16;
260 ENUM_BITFIELD(machine_mode
) mode
: 8;
263 /* The table of all qtys, indexed by qty number. */
264 static struct qty_table_elem
*qty_table
;
267 /* For machines that have a CC0, we do not record its value in the hash
268 table since its use is guaranteed to be the insn immediately following
269 its definition and any other insn is presumed to invalidate it.
271 Instead, we store below the value last assigned to CC0. If it should
272 happen to be a constant, it is stored in preference to the actual
273 assigned value. In case it is a constant, we store the mode in which
274 the constant should be interpreted. */
276 static rtx prev_insn_cc0
;
277 static enum machine_mode prev_insn_cc0_mode
;
279 /* Previous actual insn. 0 if at first insn of basic block. */
281 static rtx prev_insn
;
284 /* Insn being scanned. */
286 static rtx this_insn
;
288 /* Index by register number, gives the number of the next (or
289 previous) register in the chain of registers sharing the same
292 Or -1 if this register is at the end of the chain.
294 If reg_qty[N] == N, reg_eqv_table[N].next is undefined. */
296 /* Per-register equivalence chain. */
302 /* The table of all register equivalence chains. */
303 static struct reg_eqv_elem
*reg_eqv_table
;
307 /* Next in hash chain. */
308 struct cse_reg_info
*hash_next
;
310 /* The next cse_reg_info structure in the free or used list. */
311 struct cse_reg_info
*next
;
316 /* The quantity number of the register's current contents. */
319 /* The number of times the register has been altered in the current
323 /* The REG_TICK value at which rtx's containing this register are
324 valid in the hash table. If this does not equal the current
325 reg_tick value, such expressions existing in the hash table are
329 /* The SUBREG that was set when REG_TICK was last incremented. Set
330 to -1 if the last store was to the whole register, not a subreg. */
331 unsigned int subreg_ticked
;
334 /* A free list of cse_reg_info entries. */
335 static struct cse_reg_info
*cse_reg_info_free_list
;
337 /* A used list of cse_reg_info entries. */
338 static struct cse_reg_info
*cse_reg_info_used_list
;
339 static struct cse_reg_info
*cse_reg_info_used_list_end
;
341 /* A mapping from registers to cse_reg_info data structures. */
342 #define REGHASH_SHIFT 7
343 #define REGHASH_SIZE (1 << REGHASH_SHIFT)
344 #define REGHASH_MASK (REGHASH_SIZE - 1)
345 static struct cse_reg_info
*reg_hash
[REGHASH_SIZE
];
347 #define REGHASH_FN(REGNO) \
348 (((REGNO) ^ ((REGNO) >> REGHASH_SHIFT)) & REGHASH_MASK)
350 /* The last lookup we did into the cse_reg_info_tree. This allows us
351 to cache repeated lookups. */
352 static unsigned int cached_regno
;
353 static struct cse_reg_info
*cached_cse_reg_info
;
355 /* A HARD_REG_SET containing all the hard registers for which there is
356 currently a REG expression in the hash table. Note the difference
357 from the above variables, which indicate if the REG is mentioned in some
358 expression in the table. */
360 static HARD_REG_SET hard_regs_in_table
;
362 /* CUID of insn that starts the basic block currently being cse-processed. */
364 static int cse_basic_block_start
;
366 /* CUID of insn that ends the basic block currently being cse-processed. */
368 static int cse_basic_block_end
;
370 /* Vector mapping INSN_UIDs to cuids.
371 The cuids are like uids but increase monotonically always.
372 We use them to see whether a reg is used outside a given basic block. */
374 static int *uid_cuid
;
376 /* Highest UID in UID_CUID. */
379 /* Get the cuid of an insn. */
381 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
383 /* Nonzero if this pass has made changes, and therefore it's
384 worthwhile to run the garbage collector. */
386 static int cse_altered
;
388 /* Nonzero if cse has altered conditional jump insns
389 in such a way that jump optimization should be redone. */
391 static int cse_jumps_altered
;
393 /* Nonzero if we put a LABEL_REF into the hash table for an INSN without a
394 REG_LABEL, we have to rerun jump after CSE to put in the note. */
395 static int recorded_label_ref
;
397 /* canon_hash stores 1 in do_not_record
398 if it notices a reference to CC0, PC, or some other volatile
401 static int do_not_record
;
403 /* canon_hash stores 1 in hash_arg_in_memory
404 if it notices a reference to memory within the expression being hashed. */
406 static int hash_arg_in_memory
;
408 /* The hash table contains buckets which are chains of `struct table_elt's,
409 each recording one expression's information.
410 That expression is in the `exp' field.
412 The canon_exp field contains a canonical (from the point of view of
413 alias analysis) version of the `exp' field.
415 Those elements with the same hash code are chained in both directions
416 through the `next_same_hash' and `prev_same_hash' fields.
418 Each set of expressions with equivalent values
419 are on a two-way chain through the `next_same_value'
420 and `prev_same_value' fields, and all point with
421 the `first_same_value' field at the first element in
422 that chain. The chain is in order of increasing cost.
423 Each element's cost value is in its `cost' field.
425 The `in_memory' field is nonzero for elements that
426 involve any reference to memory. These elements are removed
427 whenever a write is done to an unidentified location in memory.
428 To be safe, we assume that a memory address is unidentified unless
429 the address is either a symbol constant or a constant plus
430 the frame pointer or argument pointer.
432 The `related_value' field is used to connect related expressions
433 (that differ by adding an integer).
434 The related expressions are chained in a circular fashion.
435 `related_value' is zero for expressions for which this
438 The `cost' field stores the cost of this element's expression.
439 The `regcost' field stores the value returned by approx_reg_cost for
440 this element's expression.
442 The `is_const' flag is set if the element is a constant (including
445 The `flag' field is used as a temporary during some search routines.
447 The `mode' field is usually the same as GET_MODE (`exp'), but
448 if `exp' is a CONST_INT and has no machine mode then the `mode'
449 field is the mode it was being used as. Each constant is
450 recorded separately for each mode it is used with. */
456 struct table_elt
*next_same_hash
;
457 struct table_elt
*prev_same_hash
;
458 struct table_elt
*next_same_value
;
459 struct table_elt
*prev_same_value
;
460 struct table_elt
*first_same_value
;
461 struct table_elt
*related_value
;
464 /* The size of this field should match the size
465 of the mode field of struct rtx_def (see rtl.h). */
466 ENUM_BITFIELD(machine_mode
) mode
: 8;
472 /* We don't want a lot of buckets, because we rarely have very many
473 things stored in the hash table, and a lot of buckets slows
474 down a lot of loops that happen frequently. */
476 #define HASH_SIZE (1 << HASH_SHIFT)
477 #define HASH_MASK (HASH_SIZE - 1)
479 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
480 register (hard registers may require `do_not_record' to be set). */
483 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
484 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
485 : canon_hash (X, M)) & HASH_MASK)
487 /* Like HASH, but without side-effects. */
488 #define SAFE_HASH(X, M) \
489 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
490 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
491 : safe_hash (X, M)) & HASH_MASK)
493 /* Determine whether register number N is considered a fixed register for the
494 purpose of approximating register costs.
495 It is desirable to replace other regs with fixed regs, to reduce need for
497 A reg wins if it is either the frame pointer or designated as fixed. */
498 #define FIXED_REGNO_P(N) \
499 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
500 || fixed_regs[N] || global_regs[N])
502 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
503 hard registers and pointers into the frame are the cheapest with a cost
504 of 0. Next come pseudos with a cost of one and other hard registers with
505 a cost of 2. Aside from these special cases, call `rtx_cost'. */
507 #define CHEAP_REGNO(N) \
508 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
509 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
510 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
511 || ((N) < FIRST_PSEUDO_REGISTER \
512 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
514 #define COST(X) (REG_P (X) ? 0 : notreg_cost (X, SET))
515 #define COST_IN(X,OUTER) (REG_P (X) ? 0 : notreg_cost (X, OUTER))
517 /* Get the info associated with register N. */
519 #define GET_CSE_REG_INFO(N) \
520 (((N) == cached_regno && cached_cse_reg_info) \
521 ? cached_cse_reg_info : get_cse_reg_info ((N)))
523 /* Get the number of times this register has been updated in this
526 #define REG_TICK(N) ((GET_CSE_REG_INFO (N))->reg_tick)
528 /* Get the point at which REG was recorded in the table. */
530 #define REG_IN_TABLE(N) ((GET_CSE_REG_INFO (N))->reg_in_table)
532 /* Get the SUBREG set at the last increment to REG_TICK (-1 if not a
535 #define SUBREG_TICKED(N) ((GET_CSE_REG_INFO (N))->subreg_ticked)
537 /* Get the quantity number for REG. */
539 #define REG_QTY(N) ((GET_CSE_REG_INFO (N))->reg_qty)
541 /* Determine if the quantity number for register X represents a valid index
542 into the qty_table. */
544 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) >= 0)
546 static struct table_elt
*table
[HASH_SIZE
];
548 /* Chain of `struct table_elt's made so far for this function
549 but currently removed from the table. */
551 static struct table_elt
*free_element_chain
;
553 /* Number of `struct table_elt' structures made so far for this function. */
555 static int n_elements_made
;
557 /* Maximum value `n_elements_made' has had so far in this compilation
558 for functions previously processed. */
560 static int max_elements_made
;
562 /* Set to the cost of a constant pool reference if one was found for a
563 symbolic constant. If this was found, it means we should try to
564 convert constants into constant pool entries if they don't fit in
567 static int constant_pool_entries_cost
;
568 static int constant_pool_entries_regcost
;
570 /* This data describes a block that will be processed by cse_basic_block. */
572 struct cse_basic_block_data
574 /* Lowest CUID value of insns in block. */
576 /* Highest CUID value of insns in block. */
578 /* Total number of SETs in block. */
580 /* Last insn in the block. */
582 /* Size of current branch path, if any. */
584 /* Current branch path, indicating which branches will be taken. */
587 /* The branch insn. */
589 /* Whether it should be taken or not. AROUND is the same as taken
590 except that it is used when the destination label is not preceded
592 enum taken
{PATH_TAKEN
, PATH_NOT_TAKEN
, PATH_AROUND
} status
;
596 static bool fixed_base_plus_p (rtx x
);
597 static int notreg_cost (rtx
, enum rtx_code
);
598 static int approx_reg_cost_1 (rtx
*, void *);
599 static int approx_reg_cost (rtx
);
600 static int preferable (int, int, int, int);
601 static void new_basic_block (void);
602 static void make_new_qty (unsigned int, enum machine_mode
);
603 static void make_regs_eqv (unsigned int, unsigned int);
604 static void delete_reg_equiv (unsigned int);
605 static int mention_regs (rtx
);
606 static int insert_regs (rtx
, struct table_elt
*, int);
607 static void remove_from_table (struct table_elt
*, unsigned);
608 static struct table_elt
*lookup (rtx
, unsigned, enum machine_mode
);
609 static struct table_elt
*lookup_for_remove (rtx
, unsigned, enum machine_mode
);
610 static rtx
lookup_as_function (rtx
, enum rtx_code
);
611 static struct table_elt
*insert (rtx
, struct table_elt
*, unsigned,
613 static void merge_equiv_classes (struct table_elt
*, struct table_elt
*);
614 static void invalidate (rtx
, enum machine_mode
);
615 static int cse_rtx_varies_p (rtx
, int);
616 static void remove_invalid_refs (unsigned int);
617 static void remove_invalid_subreg_refs (unsigned int, unsigned int,
619 static void rehash_using_reg (rtx
);
620 static void invalidate_memory (void);
621 static void invalidate_for_call (void);
622 static rtx
use_related_value (rtx
, struct table_elt
*);
624 static inline unsigned canon_hash (rtx
, enum machine_mode
);
625 static inline unsigned safe_hash (rtx
, enum machine_mode
);
626 static unsigned hash_rtx_string (const char *);
628 static rtx
canon_reg (rtx
, rtx
);
629 static void find_best_addr (rtx
, rtx
*, enum machine_mode
);
630 static enum rtx_code
find_comparison_args (enum rtx_code
, rtx
*, rtx
*,
632 enum machine_mode
*);
633 static rtx
fold_rtx (rtx
, rtx
);
634 static rtx
equiv_constant (rtx
);
635 static void record_jump_equiv (rtx
, int);
636 static void record_jump_cond (enum rtx_code
, enum machine_mode
, rtx
, rtx
,
638 static void cse_insn (rtx
, rtx
);
639 static void cse_end_of_basic_block (rtx
, struct cse_basic_block_data
*,
641 static int addr_affects_sp_p (rtx
);
642 static void invalidate_from_clobbers (rtx
);
643 static rtx
cse_process_notes (rtx
, rtx
);
644 static void invalidate_skipped_set (rtx
, rtx
, void *);
645 static void invalidate_skipped_block (rtx
);
646 static rtx
cse_basic_block (rtx
, rtx
, struct branch_path
*);
647 static void count_reg_usage (rtx
, int *, int);
648 static int check_for_label_ref (rtx
*, void *);
649 extern void dump_class (struct table_elt
*);
650 static struct cse_reg_info
* get_cse_reg_info (unsigned int);
651 static int check_dependence (rtx
*, void *);
653 static void flush_hash_table (void);
654 static bool insn_live_p (rtx
, int *);
655 static bool set_live_p (rtx
, rtx
, int *);
656 static bool dead_libcall_p (rtx
, int *);
657 static int cse_change_cc_mode (rtx
*, void *);
658 static void cse_change_cc_mode_insns (rtx
, rtx
, rtx
);
659 static enum machine_mode
cse_cc_succs (basic_block
, rtx
, rtx
, bool);
662 #undef RTL_HOOKS_GEN_LOWPART
663 #define RTL_HOOKS_GEN_LOWPART gen_lowpart_if_possible
665 static const struct rtl_hooks cse_rtl_hooks
= RTL_HOOKS_INITIALIZER
;
667 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
668 virtual regs here because the simplify_*_operation routines are called
669 by integrate.c, which is called before virtual register instantiation. */
672 fixed_base_plus_p (rtx x
)
674 switch (GET_CODE (x
))
677 if (x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
)
679 if (x
== arg_pointer_rtx
&& fixed_regs
[ARG_POINTER_REGNUM
])
681 if (REGNO (x
) >= FIRST_VIRTUAL_REGISTER
682 && REGNO (x
) <= LAST_VIRTUAL_REGISTER
)
687 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
)
689 return fixed_base_plus_p (XEXP (x
, 0));
696 /* Dump the expressions in the equivalence class indicated by CLASSP.
697 This function is used only for debugging. */
699 dump_class (struct table_elt
*classp
)
701 struct table_elt
*elt
;
703 fprintf (stderr
, "Equivalence chain for ");
704 print_rtl (stderr
, classp
->exp
);
705 fprintf (stderr
, ": \n");
707 for (elt
= classp
->first_same_value
; elt
; elt
= elt
->next_same_value
)
709 print_rtl (stderr
, elt
->exp
);
710 fprintf (stderr
, "\n");
714 /* Subroutine of approx_reg_cost; called through for_each_rtx. */
717 approx_reg_cost_1 (rtx
*xp
, void *data
)
724 unsigned int regno
= REGNO (x
);
726 if (! CHEAP_REGNO (regno
))
728 if (regno
< FIRST_PSEUDO_REGISTER
)
730 if (SMALL_REGISTER_CLASSES
)
742 /* Return an estimate of the cost of the registers used in an rtx.
743 This is mostly the number of different REG expressions in the rtx;
744 however for some exceptions like fixed registers we use a cost of
745 0. If any other hard register reference occurs, return MAX_COST. */
748 approx_reg_cost (rtx x
)
752 if (for_each_rtx (&x
, approx_reg_cost_1
, (void *) &cost
))
758 /* Return a negative value if an rtx A, whose costs are given by COST_A
759 and REGCOST_A, is more desirable than an rtx B.
760 Return a positive value if A is less desirable, or 0 if the two are
763 preferable (int cost_a
, int regcost_a
, int cost_b
, int regcost_b
)
765 /* First, get rid of cases involving expressions that are entirely
767 if (cost_a
!= cost_b
)
769 if (cost_a
== MAX_COST
)
771 if (cost_b
== MAX_COST
)
775 /* Avoid extending lifetimes of hardregs. */
776 if (regcost_a
!= regcost_b
)
778 if (regcost_a
== MAX_COST
)
780 if (regcost_b
== MAX_COST
)
784 /* Normal operation costs take precedence. */
785 if (cost_a
!= cost_b
)
786 return cost_a
- cost_b
;
787 /* Only if these are identical consider effects on register pressure. */
788 if (regcost_a
!= regcost_b
)
789 return regcost_a
- regcost_b
;
793 /* Internal function, to compute cost when X is not a register; called
794 from COST macro to keep it simple. */
797 notreg_cost (rtx x
, enum rtx_code outer
)
799 return ((GET_CODE (x
) == SUBREG
800 && REG_P (SUBREG_REG (x
))
801 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_INT
802 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x
))) == MODE_INT
803 && (GET_MODE_SIZE (GET_MODE (x
))
804 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
805 && subreg_lowpart_p (x
)
806 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x
)),
807 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
)))))
809 : rtx_cost (x
, outer
) * 2);
813 static struct cse_reg_info
*
814 get_cse_reg_info (unsigned int regno
)
816 struct cse_reg_info
**hash_head
= ®_hash
[REGHASH_FN (regno
)];
817 struct cse_reg_info
*p
;
819 for (p
= *hash_head
; p
!= NULL
; p
= p
->hash_next
)
820 if (p
->regno
== regno
)
825 /* Get a new cse_reg_info structure. */
826 if (cse_reg_info_free_list
)
828 p
= cse_reg_info_free_list
;
829 cse_reg_info_free_list
= p
->next
;
832 p
= xmalloc (sizeof (struct cse_reg_info
));
834 /* Insert into hash table. */
835 p
->hash_next
= *hash_head
;
840 p
->reg_in_table
= -1;
841 p
->subreg_ticked
= -1;
842 p
->reg_qty
= -regno
- 1;
844 p
->next
= cse_reg_info_used_list
;
845 cse_reg_info_used_list
= p
;
846 if (!cse_reg_info_used_list_end
)
847 cse_reg_info_used_list_end
= p
;
850 /* Cache this lookup; we tend to be looking up information about the
851 same register several times in a row. */
852 cached_regno
= regno
;
853 cached_cse_reg_info
= p
;
858 /* Clear the hash table and initialize each register with its own quantity,
859 for a new basic block. */
862 new_basic_block (void)
868 /* Clear out hash table state for this pass. */
870 memset (reg_hash
, 0, sizeof reg_hash
);
872 if (cse_reg_info_used_list
)
874 cse_reg_info_used_list_end
->next
= cse_reg_info_free_list
;
875 cse_reg_info_free_list
= cse_reg_info_used_list
;
876 cse_reg_info_used_list
= cse_reg_info_used_list_end
= 0;
878 cached_cse_reg_info
= 0;
880 CLEAR_HARD_REG_SET (hard_regs_in_table
);
882 /* The per-quantity values used to be initialized here, but it is
883 much faster to initialize each as it is made in `make_new_qty'. */
885 for (i
= 0; i
< HASH_SIZE
; i
++)
887 struct table_elt
*first
;
892 struct table_elt
*last
= first
;
896 while (last
->next_same_hash
!= NULL
)
897 last
= last
->next_same_hash
;
899 /* Now relink this hash entire chain into
900 the free element list. */
902 last
->next_same_hash
= free_element_chain
;
903 free_element_chain
= first
;
913 /* Say that register REG contains a quantity in mode MODE not in any
914 register before and initialize that quantity. */
917 make_new_qty (unsigned int reg
, enum machine_mode mode
)
920 struct qty_table_elem
*ent
;
921 struct reg_eqv_elem
*eqv
;
923 gcc_assert (next_qty
< max_qty
);
925 q
= REG_QTY (reg
) = next_qty
++;
927 ent
->first_reg
= reg
;
930 ent
->const_rtx
= ent
->const_insn
= NULL_RTX
;
931 ent
->comparison_code
= UNKNOWN
;
933 eqv
= ®_eqv_table
[reg
];
934 eqv
->next
= eqv
->prev
= -1;
937 /* Make reg NEW equivalent to reg OLD.
938 OLD is not changing; NEW is. */
941 make_regs_eqv (unsigned int new, unsigned int old
)
943 unsigned int lastr
, firstr
;
944 int q
= REG_QTY (old
);
945 struct qty_table_elem
*ent
;
949 /* Nothing should become eqv until it has a "non-invalid" qty number. */
950 gcc_assert (REGNO_QTY_VALID_P (old
));
953 firstr
= ent
->first_reg
;
954 lastr
= ent
->last_reg
;
956 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
957 hard regs. Among pseudos, if NEW will live longer than any other reg
958 of the same qty, and that is beyond the current basic block,
959 make it the new canonical replacement for this qty. */
960 if (! (firstr
< FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (firstr
))
961 /* Certain fixed registers might be of the class NO_REGS. This means
962 that not only can they not be allocated by the compiler, but
963 they cannot be used in substitutions or canonicalizations
965 && (new >= FIRST_PSEUDO_REGISTER
|| REGNO_REG_CLASS (new) != NO_REGS
)
966 && ((new < FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (new))
967 || (new >= FIRST_PSEUDO_REGISTER
968 && (firstr
< FIRST_PSEUDO_REGISTER
969 || ((uid_cuid
[REGNO_LAST_UID (new)] > cse_basic_block_end
970 || (uid_cuid
[REGNO_FIRST_UID (new)]
971 < cse_basic_block_start
))
972 && (uid_cuid
[REGNO_LAST_UID (new)]
973 > uid_cuid
[REGNO_LAST_UID (firstr
)]))))))
975 reg_eqv_table
[firstr
].prev
= new;
976 reg_eqv_table
[new].next
= firstr
;
977 reg_eqv_table
[new].prev
= -1;
978 ent
->first_reg
= new;
982 /* If NEW is a hard reg (known to be non-fixed), insert at end.
983 Otherwise, insert before any non-fixed hard regs that are at the
984 end. Registers of class NO_REGS cannot be used as an
985 equivalent for anything. */
986 while (lastr
< FIRST_PSEUDO_REGISTER
&& reg_eqv_table
[lastr
].prev
>= 0
987 && (REGNO_REG_CLASS (lastr
) == NO_REGS
|| ! FIXED_REGNO_P (lastr
))
988 && new >= FIRST_PSEUDO_REGISTER
)
989 lastr
= reg_eqv_table
[lastr
].prev
;
990 reg_eqv_table
[new].next
= reg_eqv_table
[lastr
].next
;
991 if (reg_eqv_table
[lastr
].next
>= 0)
992 reg_eqv_table
[reg_eqv_table
[lastr
].next
].prev
= new;
994 qty_table
[q
].last_reg
= new;
995 reg_eqv_table
[lastr
].next
= new;
996 reg_eqv_table
[new].prev
= lastr
;
1000 /* Remove REG from its equivalence class. */
1003 delete_reg_equiv (unsigned int reg
)
1005 struct qty_table_elem
*ent
;
1006 int q
= REG_QTY (reg
);
1009 /* If invalid, do nothing. */
1010 if (! REGNO_QTY_VALID_P (reg
))
1013 ent
= &qty_table
[q
];
1015 p
= reg_eqv_table
[reg
].prev
;
1016 n
= reg_eqv_table
[reg
].next
;
1019 reg_eqv_table
[n
].prev
= p
;
1023 reg_eqv_table
[p
].next
= n
;
1027 REG_QTY (reg
) = -reg
- 1;
1030 /* Remove any invalid expressions from the hash table
1031 that refer to any of the registers contained in expression X.
1033 Make sure that newly inserted references to those registers
1034 as subexpressions will be considered valid.
1036 mention_regs is not called when a register itself
1037 is being stored in the table.
1039 Return 1 if we have done something that may have changed the hash code
1043 mention_regs (rtx x
)
1053 code
= GET_CODE (x
);
1056 unsigned int regno
= REGNO (x
);
1057 unsigned int endregno
1058 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
1059 : hard_regno_nregs
[regno
][GET_MODE (x
)]);
1062 for (i
= regno
; i
< endregno
; i
++)
1064 if (REG_IN_TABLE (i
) >= 0 && REG_IN_TABLE (i
) != REG_TICK (i
))
1065 remove_invalid_refs (i
);
1067 REG_IN_TABLE (i
) = REG_TICK (i
);
1068 SUBREG_TICKED (i
) = -1;
1074 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1075 pseudo if they don't use overlapping words. We handle only pseudos
1076 here for simplicity. */
1077 if (code
== SUBREG
&& REG_P (SUBREG_REG (x
))
1078 && REGNO (SUBREG_REG (x
)) >= FIRST_PSEUDO_REGISTER
)
1080 unsigned int i
= REGNO (SUBREG_REG (x
));
1082 if (REG_IN_TABLE (i
) >= 0 && REG_IN_TABLE (i
) != REG_TICK (i
))
1084 /* If REG_IN_TABLE (i) differs from REG_TICK (i) by one, and
1085 the last store to this register really stored into this
1086 subreg, then remove the memory of this subreg.
1087 Otherwise, remove any memory of the entire register and
1088 all its subregs from the table. */
1089 if (REG_TICK (i
) - REG_IN_TABLE (i
) > 1
1090 || SUBREG_TICKED (i
) != REGNO (SUBREG_REG (x
)))
1091 remove_invalid_refs (i
);
1093 remove_invalid_subreg_refs (i
, SUBREG_BYTE (x
), GET_MODE (x
));
1096 REG_IN_TABLE (i
) = REG_TICK (i
);
1097 SUBREG_TICKED (i
) = REGNO (SUBREG_REG (x
));
1101 /* If X is a comparison or a COMPARE and either operand is a register
1102 that does not have a quantity, give it one. This is so that a later
1103 call to record_jump_equiv won't cause X to be assigned a different
1104 hash code and not found in the table after that call.
1106 It is not necessary to do this here, since rehash_using_reg can
1107 fix up the table later, but doing this here eliminates the need to
1108 call that expensive function in the most common case where the only
1109 use of the register is in the comparison. */
1111 if (code
== COMPARE
|| COMPARISON_P (x
))
1113 if (REG_P (XEXP (x
, 0))
1114 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0))))
1115 if (insert_regs (XEXP (x
, 0), NULL
, 0))
1117 rehash_using_reg (XEXP (x
, 0));
1121 if (REG_P (XEXP (x
, 1))
1122 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 1))))
1123 if (insert_regs (XEXP (x
, 1), NULL
, 0))
1125 rehash_using_reg (XEXP (x
, 1));
1130 fmt
= GET_RTX_FORMAT (code
);
1131 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1133 changed
|= mention_regs (XEXP (x
, i
));
1134 else if (fmt
[i
] == 'E')
1135 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1136 changed
|= mention_regs (XVECEXP (x
, i
, j
));
1141 /* Update the register quantities for inserting X into the hash table
1142 with a value equivalent to CLASSP.
1143 (If the class does not contain a REG, it is irrelevant.)
1144 If MODIFIED is nonzero, X is a destination; it is being modified.
1145 Note that delete_reg_equiv should be called on a register
1146 before insert_regs is done on that register with MODIFIED != 0.
1148 Nonzero value means that elements of reg_qty have changed
1149 so X's hash code may be different. */
1152 insert_regs (rtx x
, struct table_elt
*classp
, int modified
)
1156 unsigned int regno
= REGNO (x
);
1159 /* If REGNO is in the equivalence table already but is of the
1160 wrong mode for that equivalence, don't do anything here. */
1162 qty_valid
= REGNO_QTY_VALID_P (regno
);
1165 struct qty_table_elem
*ent
= &qty_table
[REG_QTY (regno
)];
1167 if (ent
->mode
!= GET_MODE (x
))
1171 if (modified
|| ! qty_valid
)
1174 for (classp
= classp
->first_same_value
;
1176 classp
= classp
->next_same_value
)
1177 if (REG_P (classp
->exp
)
1178 && GET_MODE (classp
->exp
) == GET_MODE (x
))
1180 make_regs_eqv (regno
, REGNO (classp
->exp
));
1184 /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
1185 than REG_IN_TABLE to find out if there was only a single preceding
1186 invalidation - for the SUBREG - or another one, which would be
1187 for the full register. However, if we find here that REG_TICK
1188 indicates that the register is invalid, it means that it has
1189 been invalidated in a separate operation. The SUBREG might be used
1190 now (then this is a recursive call), or we might use the full REG
1191 now and a SUBREG of it later. So bump up REG_TICK so that
1192 mention_regs will do the right thing. */
1194 && REG_IN_TABLE (regno
) >= 0
1195 && REG_TICK (regno
) == REG_IN_TABLE (regno
) + 1)
1197 make_new_qty (regno
, GET_MODE (x
));
1204 /* If X is a SUBREG, we will likely be inserting the inner register in the
1205 table. If that register doesn't have an assigned quantity number at
1206 this point but does later, the insertion that we will be doing now will
1207 not be accessible because its hash code will have changed. So assign
1208 a quantity number now. */
1210 else if (GET_CODE (x
) == SUBREG
&& REG_P (SUBREG_REG (x
))
1211 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x
))))
1213 insert_regs (SUBREG_REG (x
), NULL
, 0);
1218 return mention_regs (x
);
1221 /* Look in or update the hash table. */
1223 /* Remove table element ELT from use in the table.
1224 HASH is its hash code, made using the HASH macro.
1225 It's an argument because often that is known in advance
1226 and we save much time not recomputing it. */
1229 remove_from_table (struct table_elt
*elt
, unsigned int hash
)
1234 /* Mark this element as removed. See cse_insn. */
1235 elt
->first_same_value
= 0;
1237 /* Remove the table element from its equivalence class. */
1240 struct table_elt
*prev
= elt
->prev_same_value
;
1241 struct table_elt
*next
= elt
->next_same_value
;
1244 next
->prev_same_value
= prev
;
1247 prev
->next_same_value
= next
;
1250 struct table_elt
*newfirst
= next
;
1253 next
->first_same_value
= newfirst
;
1254 next
= next
->next_same_value
;
1259 /* Remove the table element from its hash bucket. */
1262 struct table_elt
*prev
= elt
->prev_same_hash
;
1263 struct table_elt
*next
= elt
->next_same_hash
;
1266 next
->prev_same_hash
= prev
;
1269 prev
->next_same_hash
= next
;
1270 else if (table
[hash
] == elt
)
1274 /* This entry is not in the proper hash bucket. This can happen
1275 when two classes were merged by `merge_equiv_classes'. Search
1276 for the hash bucket that it heads. This happens only very
1277 rarely, so the cost is acceptable. */
1278 for (hash
= 0; hash
< HASH_SIZE
; hash
++)
1279 if (table
[hash
] == elt
)
1284 /* Remove the table element from its related-value circular chain. */
1286 if (elt
->related_value
!= 0 && elt
->related_value
!= elt
)
1288 struct table_elt
*p
= elt
->related_value
;
1290 while (p
->related_value
!= elt
)
1291 p
= p
->related_value
;
1292 p
->related_value
= elt
->related_value
;
1293 if (p
->related_value
== p
)
1294 p
->related_value
= 0;
1297 /* Now add it to the free element chain. */
1298 elt
->next_same_hash
= free_element_chain
;
1299 free_element_chain
= elt
;
1302 /* Look up X in the hash table and return its table element,
1303 or 0 if X is not in the table.
1305 MODE is the machine-mode of X, or if X is an integer constant
1306 with VOIDmode then MODE is the mode with which X will be used.
1308 Here we are satisfied to find an expression whose tree structure
1311 static struct table_elt
*
1312 lookup (rtx x
, unsigned int hash
, enum machine_mode mode
)
1314 struct table_elt
*p
;
1316 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1317 if (mode
== p
->mode
&& ((x
== p
->exp
&& REG_P (x
))
1318 || exp_equiv_p (x
, p
->exp
, !REG_P (x
), false)))
1324 /* Like `lookup' but don't care whether the table element uses invalid regs.
1325 Also ignore discrepancies in the machine mode of a register. */
1327 static struct table_elt
*
1328 lookup_for_remove (rtx x
, unsigned int hash
, enum machine_mode mode
)
1330 struct table_elt
*p
;
1334 unsigned int regno
= REGNO (x
);
1336 /* Don't check the machine mode when comparing registers;
1337 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1338 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1340 && REGNO (p
->exp
) == regno
)
1345 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1347 && (x
== p
->exp
|| exp_equiv_p (x
, p
->exp
, 0, false)))
1354 /* Look for an expression equivalent to X and with code CODE.
1355 If one is found, return that expression. */
1358 lookup_as_function (rtx x
, enum rtx_code code
)
1361 = lookup (x
, SAFE_HASH (x
, VOIDmode
), GET_MODE (x
));
1363 /* If we are looking for a CONST_INT, the mode doesn't really matter, as
1364 long as we are narrowing. So if we looked in vain for a mode narrower
1365 than word_mode before, look for word_mode now. */
1366 if (p
== 0 && code
== CONST_INT
1367 && GET_MODE_SIZE (GET_MODE (x
)) < GET_MODE_SIZE (word_mode
))
1370 PUT_MODE (x
, word_mode
);
1371 p
= lookup (x
, SAFE_HASH (x
, VOIDmode
), word_mode
);
1377 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
1378 if (GET_CODE (p
->exp
) == code
1379 /* Make sure this is a valid entry in the table. */
1380 && exp_equiv_p (p
->exp
, p
->exp
, 1, false))
1386 /* Insert X in the hash table, assuming HASH is its hash code
1387 and CLASSP is an element of the class it should go in
1388 (or 0 if a new class should be made).
1389 It is inserted at the proper position to keep the class in
1390 the order cheapest first.
1392 MODE is the machine-mode of X, or if X is an integer constant
1393 with VOIDmode then MODE is the mode with which X will be used.
1395 For elements of equal cheapness, the most recent one
1396 goes in front, except that the first element in the list
1397 remains first unless a cheaper element is added. The order of
1398 pseudo-registers does not matter, as canon_reg will be called to
1399 find the cheapest when a register is retrieved from the table.
1401 The in_memory field in the hash table element is set to 0.
1402 The caller must set it nonzero if appropriate.
1404 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1405 and if insert_regs returns a nonzero value
1406 you must then recompute its hash code before calling here.
1408 If necessary, update table showing constant values of quantities. */
1410 #define CHEAPER(X, Y) \
1411 (preferable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0)
1413 static struct table_elt
*
1414 insert (rtx x
, struct table_elt
*classp
, unsigned int hash
, enum machine_mode mode
)
1416 struct table_elt
*elt
;
1418 /* If X is a register and we haven't made a quantity for it,
1419 something is wrong. */
1420 gcc_assert (!REG_P (x
) || REGNO_QTY_VALID_P (REGNO (x
)));
1422 /* If X is a hard register, show it is being put in the table. */
1423 if (REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1425 unsigned int regno
= REGNO (x
);
1426 unsigned int endregno
= regno
+ hard_regno_nregs
[regno
][GET_MODE (x
)];
1429 for (i
= regno
; i
< endregno
; i
++)
1430 SET_HARD_REG_BIT (hard_regs_in_table
, i
);
1433 /* Put an element for X into the right hash bucket. */
1435 elt
= free_element_chain
;
1437 free_element_chain
= elt
->next_same_hash
;
1441 elt
= xmalloc (sizeof (struct table_elt
));
1445 elt
->canon_exp
= NULL_RTX
;
1446 elt
->cost
= COST (x
);
1447 elt
->regcost
= approx_reg_cost (x
);
1448 elt
->next_same_value
= 0;
1449 elt
->prev_same_value
= 0;
1450 elt
->next_same_hash
= table
[hash
];
1451 elt
->prev_same_hash
= 0;
1452 elt
->related_value
= 0;
1455 elt
->is_const
= (CONSTANT_P (x
) || fixed_base_plus_p (x
));
1458 table
[hash
]->prev_same_hash
= elt
;
1461 /* Put it into the proper value-class. */
1464 classp
= classp
->first_same_value
;
1465 if (CHEAPER (elt
, classp
))
1466 /* Insert at the head of the class. */
1468 struct table_elt
*p
;
1469 elt
->next_same_value
= classp
;
1470 classp
->prev_same_value
= elt
;
1471 elt
->first_same_value
= elt
;
1473 for (p
= classp
; p
; p
= p
->next_same_value
)
1474 p
->first_same_value
= elt
;
1478 /* Insert not at head of the class. */
1479 /* Put it after the last element cheaper than X. */
1480 struct table_elt
*p
, *next
;
1482 for (p
= classp
; (next
= p
->next_same_value
) && CHEAPER (next
, elt
);
1485 /* Put it after P and before NEXT. */
1486 elt
->next_same_value
= next
;
1488 next
->prev_same_value
= elt
;
1490 elt
->prev_same_value
= p
;
1491 p
->next_same_value
= elt
;
1492 elt
->first_same_value
= classp
;
1496 elt
->first_same_value
= elt
;
1498 /* If this is a constant being set equivalent to a register or a register
1499 being set equivalent to a constant, note the constant equivalence.
1501 If this is a constant, it cannot be equivalent to a different constant,
1502 and a constant is the only thing that can be cheaper than a register. So
1503 we know the register is the head of the class (before the constant was
1506 If this is a register that is not already known equivalent to a
1507 constant, we must check the entire class.
1509 If this is a register that is already known equivalent to an insn,
1510 update the qtys `const_insn' to show that `this_insn' is the latest
1511 insn making that quantity equivalent to the constant. */
1513 if (elt
->is_const
&& classp
&& REG_P (classp
->exp
)
1516 int exp_q
= REG_QTY (REGNO (classp
->exp
));
1517 struct qty_table_elem
*exp_ent
= &qty_table
[exp_q
];
1519 exp_ent
->const_rtx
= gen_lowpart (exp_ent
->mode
, x
);
1520 exp_ent
->const_insn
= this_insn
;
1525 && ! qty_table
[REG_QTY (REGNO (x
))].const_rtx
1528 struct table_elt
*p
;
1530 for (p
= classp
; p
!= 0; p
= p
->next_same_value
)
1532 if (p
->is_const
&& !REG_P (p
->exp
))
1534 int x_q
= REG_QTY (REGNO (x
));
1535 struct qty_table_elem
*x_ent
= &qty_table
[x_q
];
1538 = gen_lowpart (GET_MODE (x
), p
->exp
);
1539 x_ent
->const_insn
= this_insn
;
1546 && qty_table
[REG_QTY (REGNO (x
))].const_rtx
1547 && GET_MODE (x
) == qty_table
[REG_QTY (REGNO (x
))].mode
)
1548 qty_table
[REG_QTY (REGNO (x
))].const_insn
= this_insn
;
1550 /* If this is a constant with symbolic value,
1551 and it has a term with an explicit integer value,
1552 link it up with related expressions. */
1553 if (GET_CODE (x
) == CONST
)
1555 rtx subexp
= get_related_value (x
);
1557 struct table_elt
*subelt
, *subelt_prev
;
1561 /* Get the integer-free subexpression in the hash table. */
1562 subhash
= SAFE_HASH (subexp
, mode
);
1563 subelt
= lookup (subexp
, subhash
, mode
);
1565 subelt
= insert (subexp
, NULL
, subhash
, mode
);
1566 /* Initialize SUBELT's circular chain if it has none. */
1567 if (subelt
->related_value
== 0)
1568 subelt
->related_value
= subelt
;
1569 /* Find the element in the circular chain that precedes SUBELT. */
1570 subelt_prev
= subelt
;
1571 while (subelt_prev
->related_value
!= subelt
)
1572 subelt_prev
= subelt_prev
->related_value
;
1573 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1574 This way the element that follows SUBELT is the oldest one. */
1575 elt
->related_value
= subelt_prev
->related_value
;
1576 subelt_prev
->related_value
= elt
;
1583 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1584 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1585 the two classes equivalent.
1587 CLASS1 will be the surviving class; CLASS2 should not be used after this
1590 Any invalid entries in CLASS2 will not be copied. */
1593 merge_equiv_classes (struct table_elt
*class1
, struct table_elt
*class2
)
1595 struct table_elt
*elt
, *next
, *new;
1597 /* Ensure we start with the head of the classes. */
1598 class1
= class1
->first_same_value
;
1599 class2
= class2
->first_same_value
;
1601 /* If they were already equal, forget it. */
1602 if (class1
== class2
)
1605 for (elt
= class2
; elt
; elt
= next
)
1609 enum machine_mode mode
= elt
->mode
;
1611 next
= elt
->next_same_value
;
1613 /* Remove old entry, make a new one in CLASS1's class.
1614 Don't do this for invalid entries as we cannot find their
1615 hash code (it also isn't necessary). */
1616 if (REG_P (exp
) || exp_equiv_p (exp
, exp
, 1, false))
1618 bool need_rehash
= false;
1620 hash_arg_in_memory
= 0;
1621 hash
= HASH (exp
, mode
);
1625 need_rehash
= REGNO_QTY_VALID_P (REGNO (exp
));
1626 delete_reg_equiv (REGNO (exp
));
1629 remove_from_table (elt
, hash
);
1631 if (insert_regs (exp
, class1
, 0) || need_rehash
)
1633 rehash_using_reg (exp
);
1634 hash
= HASH (exp
, mode
);
1636 new = insert (exp
, class1
, hash
, mode
);
1637 new->in_memory
= hash_arg_in_memory
;
1642 /* Flush the entire hash table. */
1645 flush_hash_table (void)
1648 struct table_elt
*p
;
1650 for (i
= 0; i
< HASH_SIZE
; i
++)
1651 for (p
= table
[i
]; p
; p
= table
[i
])
1653 /* Note that invalidate can remove elements
1654 after P in the current hash chain. */
1656 invalidate (p
->exp
, p
->mode
);
1658 remove_from_table (p
, i
);
1662 /* Function called for each rtx to check whether true dependence exist. */
1663 struct check_dependence_data
1665 enum machine_mode mode
;
1671 check_dependence (rtx
*x
, void *data
)
1673 struct check_dependence_data
*d
= (struct check_dependence_data
*) data
;
1674 if (*x
&& MEM_P (*x
))
1675 return canon_true_dependence (d
->exp
, d
->mode
, d
->addr
, *x
,
1681 /* Remove from the hash table, or mark as invalid, all expressions whose
1682 values could be altered by storing in X. X is a register, a subreg, or
1683 a memory reference with nonvarying address (because, when a memory
1684 reference with a varying address is stored in, all memory references are
1685 removed by invalidate_memory so specific invalidation is superfluous).
1686 FULL_MODE, if not VOIDmode, indicates that this much should be
1687 invalidated instead of just the amount indicated by the mode of X. This
1688 is only used for bitfield stores into memory.
1690 A nonvarying address may be just a register or just a symbol reference,
1691 or it may be either of those plus a numeric offset. */
1694 invalidate (rtx x
, enum machine_mode full_mode
)
1697 struct table_elt
*p
;
1700 switch (GET_CODE (x
))
1704 /* If X is a register, dependencies on its contents are recorded
1705 through the qty number mechanism. Just change the qty number of
1706 the register, mark it as invalid for expressions that refer to it,
1707 and remove it itself. */
1708 unsigned int regno
= REGNO (x
);
1709 unsigned int hash
= HASH (x
, GET_MODE (x
));
1711 /* Remove REGNO from any quantity list it might be on and indicate
1712 that its value might have changed. If it is a pseudo, remove its
1713 entry from the hash table.
1715 For a hard register, we do the first two actions above for any
1716 additional hard registers corresponding to X. Then, if any of these
1717 registers are in the table, we must remove any REG entries that
1718 overlap these registers. */
1720 delete_reg_equiv (regno
);
1722 SUBREG_TICKED (regno
) = -1;
1724 if (regno
>= FIRST_PSEUDO_REGISTER
)
1726 /* Because a register can be referenced in more than one mode,
1727 we might have to remove more than one table entry. */
1728 struct table_elt
*elt
;
1730 while ((elt
= lookup_for_remove (x
, hash
, GET_MODE (x
))))
1731 remove_from_table (elt
, hash
);
1735 HOST_WIDE_INT in_table
1736 = TEST_HARD_REG_BIT (hard_regs_in_table
, regno
);
1737 unsigned int endregno
1738 = regno
+ hard_regno_nregs
[regno
][GET_MODE (x
)];
1739 unsigned int tregno
, tendregno
, rn
;
1740 struct table_elt
*p
, *next
;
1742 CLEAR_HARD_REG_BIT (hard_regs_in_table
, regno
);
1744 for (rn
= regno
+ 1; rn
< endregno
; rn
++)
1746 in_table
|= TEST_HARD_REG_BIT (hard_regs_in_table
, rn
);
1747 CLEAR_HARD_REG_BIT (hard_regs_in_table
, rn
);
1748 delete_reg_equiv (rn
);
1750 SUBREG_TICKED (rn
) = -1;
1754 for (hash
= 0; hash
< HASH_SIZE
; hash
++)
1755 for (p
= table
[hash
]; p
; p
= next
)
1757 next
= p
->next_same_hash
;
1760 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1763 tregno
= REGNO (p
->exp
);
1765 = tregno
+ hard_regno_nregs
[tregno
][GET_MODE (p
->exp
)];
1766 if (tendregno
> regno
&& tregno
< endregno
)
1767 remove_from_table (p
, hash
);
1774 invalidate (SUBREG_REG (x
), VOIDmode
);
1778 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; --i
)
1779 invalidate (XVECEXP (x
, 0, i
), VOIDmode
);
1783 /* This is part of a disjoint return value; extract the location in
1784 question ignoring the offset. */
1785 invalidate (XEXP (x
, 0), VOIDmode
);
1789 addr
= canon_rtx (get_addr (XEXP (x
, 0)));
1790 /* Calculate the canonical version of X here so that
1791 true_dependence doesn't generate new RTL for X on each call. */
1794 /* Remove all hash table elements that refer to overlapping pieces of
1796 if (full_mode
== VOIDmode
)
1797 full_mode
= GET_MODE (x
);
1799 for (i
= 0; i
< HASH_SIZE
; i
++)
1801 struct table_elt
*next
;
1803 for (p
= table
[i
]; p
; p
= next
)
1805 next
= p
->next_same_hash
;
1808 struct check_dependence_data d
;
1810 /* Just canonicalize the expression once;
1811 otherwise each time we call invalidate
1812 true_dependence will canonicalize the
1813 expression again. */
1815 p
->canon_exp
= canon_rtx (p
->exp
);
1819 if (for_each_rtx (&p
->canon_exp
, check_dependence
, &d
))
1820 remove_from_table (p
, i
);
1831 /* Remove all expressions that refer to register REGNO,
1832 since they are already invalid, and we are about to
1833 mark that register valid again and don't want the old
1834 expressions to reappear as valid. */
1837 remove_invalid_refs (unsigned int regno
)
1840 struct table_elt
*p
, *next
;
1842 for (i
= 0; i
< HASH_SIZE
; i
++)
1843 for (p
= table
[i
]; p
; p
= next
)
1845 next
= p
->next_same_hash
;
1847 && refers_to_regno_p (regno
, regno
+ 1, p
->exp
, (rtx
*) 0))
1848 remove_from_table (p
, i
);
1852 /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET,
1855 remove_invalid_subreg_refs (unsigned int regno
, unsigned int offset
,
1856 enum machine_mode mode
)
1859 struct table_elt
*p
, *next
;
1860 unsigned int end
= offset
+ (GET_MODE_SIZE (mode
) - 1);
1862 for (i
= 0; i
< HASH_SIZE
; i
++)
1863 for (p
= table
[i
]; p
; p
= next
)
1866 next
= p
->next_same_hash
;
1869 && (GET_CODE (exp
) != SUBREG
1870 || !REG_P (SUBREG_REG (exp
))
1871 || REGNO (SUBREG_REG (exp
)) != regno
1872 || (((SUBREG_BYTE (exp
)
1873 + (GET_MODE_SIZE (GET_MODE (exp
)) - 1)) >= offset
)
1874 && SUBREG_BYTE (exp
) <= end
))
1875 && refers_to_regno_p (regno
, regno
+ 1, p
->exp
, (rtx
*) 0))
1876 remove_from_table (p
, i
);
1880 /* Recompute the hash codes of any valid entries in the hash table that
1881 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1883 This is called when we make a jump equivalence. */
1886 rehash_using_reg (rtx x
)
1889 struct table_elt
*p
, *next
;
1892 if (GET_CODE (x
) == SUBREG
)
1895 /* If X is not a register or if the register is known not to be in any
1896 valid entries in the table, we have no work to do. */
1899 || REG_IN_TABLE (REGNO (x
)) < 0
1900 || REG_IN_TABLE (REGNO (x
)) != REG_TICK (REGNO (x
)))
1903 /* Scan all hash chains looking for valid entries that mention X.
1904 If we find one and it is in the wrong hash chain, move it. */
1906 for (i
= 0; i
< HASH_SIZE
; i
++)
1907 for (p
= table
[i
]; p
; p
= next
)
1909 next
= p
->next_same_hash
;
1910 if (reg_mentioned_p (x
, p
->exp
)
1911 && exp_equiv_p (p
->exp
, p
->exp
, 1, false)
1912 && i
!= (hash
= SAFE_HASH (p
->exp
, p
->mode
)))
1914 if (p
->next_same_hash
)
1915 p
->next_same_hash
->prev_same_hash
= p
->prev_same_hash
;
1917 if (p
->prev_same_hash
)
1918 p
->prev_same_hash
->next_same_hash
= p
->next_same_hash
;
1920 table
[i
] = p
->next_same_hash
;
1922 p
->next_same_hash
= table
[hash
];
1923 p
->prev_same_hash
= 0;
1925 table
[hash
]->prev_same_hash
= p
;
1931 /* Remove from the hash table any expression that is a call-clobbered
1932 register. Also update their TICK values. */
1935 invalidate_for_call (void)
1937 unsigned int regno
, endregno
;
1940 struct table_elt
*p
, *next
;
1943 /* Go through all the hard registers. For each that is clobbered in
1944 a CALL_INSN, remove the register from quantity chains and update
1945 reg_tick if defined. Also see if any of these registers is currently
1948 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
1949 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, regno
))
1951 delete_reg_equiv (regno
);
1952 if (REG_TICK (regno
) >= 0)
1955 SUBREG_TICKED (regno
) = -1;
1958 in_table
|= (TEST_HARD_REG_BIT (hard_regs_in_table
, regno
) != 0);
1961 /* In the case where we have no call-clobbered hard registers in the
1962 table, we are done. Otherwise, scan the table and remove any
1963 entry that overlaps a call-clobbered register. */
1966 for (hash
= 0; hash
< HASH_SIZE
; hash
++)
1967 for (p
= table
[hash
]; p
; p
= next
)
1969 next
= p
->next_same_hash
;
1972 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1975 regno
= REGNO (p
->exp
);
1976 endregno
= regno
+ hard_regno_nregs
[regno
][GET_MODE (p
->exp
)];
1978 for (i
= regno
; i
< endregno
; i
++)
1979 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, i
))
1981 remove_from_table (p
, hash
);
1987 /* Given an expression X of type CONST,
1988 and ELT which is its table entry (or 0 if it
1989 is not in the hash table),
1990 return an alternate expression for X as a register plus integer.
1991 If none can be found, return 0. */
1994 use_related_value (rtx x
, struct table_elt
*elt
)
1996 struct table_elt
*relt
= 0;
1997 struct table_elt
*p
, *q
;
1998 HOST_WIDE_INT offset
;
2000 /* First, is there anything related known?
2001 If we have a table element, we can tell from that.
2002 Otherwise, must look it up. */
2004 if (elt
!= 0 && elt
->related_value
!= 0)
2006 else if (elt
== 0 && GET_CODE (x
) == CONST
)
2008 rtx subexp
= get_related_value (x
);
2010 relt
= lookup (subexp
,
2011 SAFE_HASH (subexp
, GET_MODE (subexp
)),
2018 /* Search all related table entries for one that has an
2019 equivalent register. */
2024 /* This loop is strange in that it is executed in two different cases.
2025 The first is when X is already in the table. Then it is searching
2026 the RELATED_VALUE list of X's class (RELT). The second case is when
2027 X is not in the table. Then RELT points to a class for the related
2030 Ensure that, whatever case we are in, that we ignore classes that have
2031 the same value as X. */
2033 if (rtx_equal_p (x
, p
->exp
))
2036 for (q
= p
->first_same_value
; q
; q
= q
->next_same_value
)
2043 p
= p
->related_value
;
2045 /* We went all the way around, so there is nothing to be found.
2046 Alternatively, perhaps RELT was in the table for some other reason
2047 and it has no related values recorded. */
2048 if (p
== relt
|| p
== 0)
2055 offset
= (get_integer_term (x
) - get_integer_term (p
->exp
));
2056 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2057 return plus_constant (q
->exp
, offset
);
2060 /* Hash a string. Just add its bytes up. */
2061 static inline unsigned
2062 hash_rtx_string (const char *ps
)
2065 const unsigned char *p
= (const unsigned char *) ps
;
2074 /* Hash an rtx. We are careful to make sure the value is never negative.
2075 Equivalent registers hash identically.
2076 MODE is used in hashing for CONST_INTs only;
2077 otherwise the mode of X is used.
2079 Store 1 in DO_NOT_RECORD_P if any subexpression is volatile.
2081 If HASH_ARG_IN_MEMORY_P is not NULL, store 1 in it if X contains
2082 a MEM rtx which does not have the RTX_UNCHANGING_P bit set.
2084 Note that cse_insn knows that the hash code of a MEM expression
2085 is just (int) MEM plus the hash code of the address. */
2088 hash_rtx (rtx x
, enum machine_mode mode
, int *do_not_record_p
,
2089 int *hash_arg_in_memory_p
, bool have_reg_qty
)
2096 /* Used to turn recursion into iteration. We can't rely on GCC's
2097 tail-recursion elimination since we need to keep accumulating values
2103 code
= GET_CODE (x
);
2108 unsigned int regno
= REGNO (x
);
2110 if (!reload_completed
)
2112 /* On some machines, we can't record any non-fixed hard register,
2113 because extending its life will cause reload problems. We
2114 consider ap, fp, sp, gp to be fixed for this purpose.
2116 We also consider CCmode registers to be fixed for this purpose;
2117 failure to do so leads to failure to simplify 0<100 type of
2120 On all machines, we can't record any global registers.
2121 Nor should we record any register that is in a small
2122 class, as defined by CLASS_LIKELY_SPILLED_P. */
2125 if (regno
>= FIRST_PSEUDO_REGISTER
)
2127 else if (x
== frame_pointer_rtx
2128 || x
== hard_frame_pointer_rtx
2129 || x
== arg_pointer_rtx
2130 || x
== stack_pointer_rtx
2131 || x
== pic_offset_table_rtx
)
2133 else if (global_regs
[regno
])
2135 else if (fixed_regs
[regno
])
2137 else if (GET_MODE_CLASS (GET_MODE (x
)) == MODE_CC
)
2139 else if (SMALL_REGISTER_CLASSES
)
2141 else if (CLASS_LIKELY_SPILLED_P (REGNO_REG_CLASS (regno
)))
2148 *do_not_record_p
= 1;
2153 hash
+= ((unsigned int) REG
<< 7);
2154 hash
+= (have_reg_qty
? (unsigned) REG_QTY (regno
) : regno
);
2158 /* We handle SUBREG of a REG specially because the underlying
2159 reg changes its hash value with every value change; we don't
2160 want to have to forget unrelated subregs when one subreg changes. */
2163 if (REG_P (SUBREG_REG (x
)))
2165 hash
+= (((unsigned int) SUBREG
<< 7)
2166 + REGNO (SUBREG_REG (x
))
2167 + (SUBREG_BYTE (x
) / UNITS_PER_WORD
));
2174 hash
+= (((unsigned int) CONST_INT
<< 7) + (unsigned int) mode
2175 + (unsigned int) INTVAL (x
));
2179 /* This is like the general case, except that it only counts
2180 the integers representing the constant. */
2181 hash
+= (unsigned int) code
+ (unsigned int) GET_MODE (x
);
2182 if (GET_MODE (x
) != VOIDmode
)
2183 hash
+= real_hash (CONST_DOUBLE_REAL_VALUE (x
));
2185 hash
+= ((unsigned int) CONST_DOUBLE_LOW (x
)
2186 + (unsigned int) CONST_DOUBLE_HIGH (x
));
2194 units
= CONST_VECTOR_NUNITS (x
);
2196 for (i
= 0; i
< units
; ++i
)
2198 elt
= CONST_VECTOR_ELT (x
, i
);
2199 hash
+= hash_rtx (elt
, GET_MODE (elt
), do_not_record_p
,
2200 hash_arg_in_memory_p
, have_reg_qty
);
2206 /* Assume there is only one rtx object for any given label. */
2208 /* We don't hash on the address of the CODE_LABEL to avoid bootstrap
2209 differences and differences between each stage's debugging dumps. */
2210 hash
+= (((unsigned int) LABEL_REF
<< 7)
2211 + CODE_LABEL_NUMBER (XEXP (x
, 0)));
2216 /* Don't hash on the symbol's address to avoid bootstrap differences.
2217 Different hash values may cause expressions to be recorded in
2218 different orders and thus different registers to be used in the
2219 final assembler. This also avoids differences in the dump files
2220 between various stages. */
2222 const unsigned char *p
= (const unsigned char *) XSTR (x
, 0);
2225 h
+= (h
<< 7) + *p
++; /* ??? revisit */
2227 hash
+= ((unsigned int) SYMBOL_REF
<< 7) + h
;
2232 /* We don't record if marked volatile or if BLKmode since we don't
2233 know the size of the move. */
2234 if (MEM_VOLATILE_P (x
) || GET_MODE (x
) == BLKmode
)
2236 *do_not_record_p
= 1;
2239 if (hash_arg_in_memory_p
&& !MEM_READONLY_P (x
))
2240 *hash_arg_in_memory_p
= 1;
2242 /* Now that we have already found this special case,
2243 might as well speed it up as much as possible. */
2244 hash
+= (unsigned) MEM
;
2249 /* A USE that mentions non-volatile memory needs special
2250 handling since the MEM may be BLKmode which normally
2251 prevents an entry from being made. Pure calls are
2252 marked by a USE which mentions BLKmode memory.
2253 See calls.c:emit_call_1. */
2254 if (MEM_P (XEXP (x
, 0))
2255 && ! MEM_VOLATILE_P (XEXP (x
, 0)))
2257 hash
+= (unsigned) USE
;
2260 if (hash_arg_in_memory_p
&& !MEM_READONLY_P (x
))
2261 *hash_arg_in_memory_p
= 1;
2263 /* Now that we have already found this special case,
2264 might as well speed it up as much as possible. */
2265 hash
+= (unsigned) MEM
;
2280 case UNSPEC_VOLATILE
:
2281 *do_not_record_p
= 1;
2285 if (MEM_VOLATILE_P (x
))
2287 *do_not_record_p
= 1;
2292 /* We don't want to take the filename and line into account. */
2293 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
)
2294 + hash_rtx_string (ASM_OPERANDS_TEMPLATE (x
))
2295 + hash_rtx_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x
))
2296 + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x
);
2298 if (ASM_OPERANDS_INPUT_LENGTH (x
))
2300 for (i
= 1; i
< ASM_OPERANDS_INPUT_LENGTH (x
); i
++)
2302 hash
+= (hash_rtx (ASM_OPERANDS_INPUT (x
, i
),
2303 GET_MODE (ASM_OPERANDS_INPUT (x
, i
)),
2304 do_not_record_p
, hash_arg_in_memory_p
,
2307 (ASM_OPERANDS_INPUT_CONSTRAINT (x
, i
)));
2310 hash
+= hash_rtx_string (ASM_OPERANDS_INPUT_CONSTRAINT (x
, 0));
2311 x
= ASM_OPERANDS_INPUT (x
, 0);
2312 mode
= GET_MODE (x
);
2324 i
= GET_RTX_LENGTH (code
) - 1;
2325 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
);
2326 fmt
= GET_RTX_FORMAT (code
);
2332 /* If we are about to do the last recursive call
2333 needed at this level, change it into iteration.
2334 This function is called enough to be worth it. */
2341 hash
+= hash_rtx (XEXP (x
, i
), 0, do_not_record_p
,
2342 hash_arg_in_memory_p
, have_reg_qty
);
2346 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2347 hash
+= hash_rtx (XVECEXP (x
, i
, j
), 0, do_not_record_p
,
2348 hash_arg_in_memory_p
, have_reg_qty
);
2352 hash
+= hash_rtx_string (XSTR (x
, i
));
2356 hash
+= (unsigned int) XINT (x
, i
);
2371 /* Hash an rtx X for cse via hash_rtx.
2372 Stores 1 in do_not_record if any subexpression is volatile.
2373 Stores 1 in hash_arg_in_memory if X contains a mem rtx which
2374 does not have the RTX_UNCHANGING_P bit set. */
2376 static inline unsigned
2377 canon_hash (rtx x
, enum machine_mode mode
)
2379 return hash_rtx (x
, mode
, &do_not_record
, &hash_arg_in_memory
, true);
2382 /* Like canon_hash but with no side effects, i.e. do_not_record
2383 and hash_arg_in_memory are not changed. */
2385 static inline unsigned
2386 safe_hash (rtx x
, enum machine_mode mode
)
2388 int dummy_do_not_record
;
2389 return hash_rtx (x
, mode
, &dummy_do_not_record
, NULL
, true);
2392 /* Return 1 iff X and Y would canonicalize into the same thing,
2393 without actually constructing the canonicalization of either one.
2394 If VALIDATE is nonzero,
2395 we assume X is an expression being processed from the rtl
2396 and Y was found in the hash table. We check register refs
2397 in Y for being marked as valid.
2399 If FOR_GCSE is true, we compare X and Y for equivalence for GCSE. */
2402 exp_equiv_p (rtx x
, rtx y
, int validate
, bool for_gcse
)
2408 /* Note: it is incorrect to assume an expression is equivalent to itself
2409 if VALIDATE is nonzero. */
2410 if (x
== y
&& !validate
)
2413 if (x
== 0 || y
== 0)
2416 code
= GET_CODE (x
);
2417 if (code
!= GET_CODE (y
))
2420 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2421 if (GET_MODE (x
) != GET_MODE (y
))
2432 return XEXP (x
, 0) == XEXP (y
, 0);
2435 return XSTR (x
, 0) == XSTR (y
, 0);
2439 return REGNO (x
) == REGNO (y
);
2442 unsigned int regno
= REGNO (y
);
2444 unsigned int endregno
2445 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
2446 : hard_regno_nregs
[regno
][GET_MODE (y
)]);
2448 /* If the quantities are not the same, the expressions are not
2449 equivalent. If there are and we are not to validate, they
2450 are equivalent. Otherwise, ensure all regs are up-to-date. */
2452 if (REG_QTY (REGNO (x
)) != REG_QTY (regno
))
2458 for (i
= regno
; i
< endregno
; i
++)
2459 if (REG_IN_TABLE (i
) != REG_TICK (i
))
2468 /* Can't merge two expressions in different alias sets, since we
2469 can decide that the expression is transparent in a block when
2470 it isn't, due to it being set with the different alias set. */
2471 if (MEM_ALIAS_SET (x
) != MEM_ALIAS_SET (y
))
2474 /* A volatile mem should not be considered equivalent to any
2476 if (MEM_VOLATILE_P (x
) || MEM_VOLATILE_P (y
))
2481 /* For commutative operations, check both orders. */
2489 return ((exp_equiv_p (XEXP (x
, 0), XEXP (y
, 0),
2491 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 1),
2492 validate
, for_gcse
))
2493 || (exp_equiv_p (XEXP (x
, 0), XEXP (y
, 1),
2495 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 0),
2496 validate
, for_gcse
)));
2499 /* We don't use the generic code below because we want to
2500 disregard filename and line numbers. */
2502 /* A volatile asm isn't equivalent to any other. */
2503 if (MEM_VOLATILE_P (x
) || MEM_VOLATILE_P (y
))
2506 if (GET_MODE (x
) != GET_MODE (y
)
2507 || strcmp (ASM_OPERANDS_TEMPLATE (x
), ASM_OPERANDS_TEMPLATE (y
))
2508 || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x
),
2509 ASM_OPERANDS_OUTPUT_CONSTRAINT (y
))
2510 || ASM_OPERANDS_OUTPUT_IDX (x
) != ASM_OPERANDS_OUTPUT_IDX (y
)
2511 || ASM_OPERANDS_INPUT_LENGTH (x
) != ASM_OPERANDS_INPUT_LENGTH (y
))
2514 if (ASM_OPERANDS_INPUT_LENGTH (x
))
2516 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
2517 if (! exp_equiv_p (ASM_OPERANDS_INPUT (x
, i
),
2518 ASM_OPERANDS_INPUT (y
, i
),
2520 || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x
, i
),
2521 ASM_OPERANDS_INPUT_CONSTRAINT (y
, i
)))
2531 /* Compare the elements. If any pair of corresponding elements
2532 fail to match, return 0 for the whole thing. */
2534 fmt
= GET_RTX_FORMAT (code
);
2535 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2540 if (! exp_equiv_p (XEXP (x
, i
), XEXP (y
, i
),
2541 validate
, for_gcse
))
2546 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2548 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2549 if (! exp_equiv_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
),
2550 validate
, for_gcse
))
2555 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
2560 if (XINT (x
, i
) != XINT (y
, i
))
2565 if (XWINT (x
, i
) != XWINT (y
, i
))
2581 /* Return 1 if X has a value that can vary even between two
2582 executions of the program. 0 means X can be compared reliably
2583 against certain constants or near-constants. */
2586 cse_rtx_varies_p (rtx x
, int from_alias
)
2588 /* We need not check for X and the equivalence class being of the same
2589 mode because if X is equivalent to a constant in some mode, it
2590 doesn't vary in any mode. */
2593 && REGNO_QTY_VALID_P (REGNO (x
)))
2595 int x_q
= REG_QTY (REGNO (x
));
2596 struct qty_table_elem
*x_ent
= &qty_table
[x_q
];
2598 if (GET_MODE (x
) == x_ent
->mode
2599 && x_ent
->const_rtx
!= NULL_RTX
)
2603 if (GET_CODE (x
) == PLUS
2604 && GET_CODE (XEXP (x
, 1)) == CONST_INT
2605 && REG_P (XEXP (x
, 0))
2606 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0))))
2608 int x0_q
= REG_QTY (REGNO (XEXP (x
, 0)));
2609 struct qty_table_elem
*x0_ent
= &qty_table
[x0_q
];
2611 if ((GET_MODE (XEXP (x
, 0)) == x0_ent
->mode
)
2612 && x0_ent
->const_rtx
!= NULL_RTX
)
2616 /* This can happen as the result of virtual register instantiation, if
2617 the initial constant is too large to be a valid address. This gives
2618 us a three instruction sequence, load large offset into a register,
2619 load fp minus a constant into a register, then a MEM which is the
2620 sum of the two `constant' registers. */
2621 if (GET_CODE (x
) == PLUS
2622 && REG_P (XEXP (x
, 0))
2623 && REG_P (XEXP (x
, 1))
2624 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0)))
2625 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 1))))
2627 int x0_q
= REG_QTY (REGNO (XEXP (x
, 0)));
2628 int x1_q
= REG_QTY (REGNO (XEXP (x
, 1)));
2629 struct qty_table_elem
*x0_ent
= &qty_table
[x0_q
];
2630 struct qty_table_elem
*x1_ent
= &qty_table
[x1_q
];
2632 if ((GET_MODE (XEXP (x
, 0)) == x0_ent
->mode
)
2633 && x0_ent
->const_rtx
!= NULL_RTX
2634 && (GET_MODE (XEXP (x
, 1)) == x1_ent
->mode
)
2635 && x1_ent
->const_rtx
!= NULL_RTX
)
2639 return rtx_varies_p (x
, from_alias
);
2642 /* Subroutine of canon_reg. Pass *XLOC through canon_reg, and validate
2643 the result if necessary. INSN is as for canon_reg. */
2646 validate_canon_reg (rtx
*xloc
, rtx insn
)
2648 rtx
new = canon_reg (*xloc
, insn
);
2651 /* If replacing pseudo with hard reg or vice versa, ensure the
2652 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2653 if (insn
!= 0 && new != 0
2654 && REG_P (new) && REG_P (*xloc
)
2655 && (((REGNO (new) < FIRST_PSEUDO_REGISTER
)
2656 != (REGNO (*xloc
) < FIRST_PSEUDO_REGISTER
))
2657 || GET_MODE (new) != GET_MODE (*xloc
)
2658 || (insn_code
= recog_memoized (insn
)) < 0
2659 || insn_data
[insn_code
].n_dups
> 0))
2660 validate_change (insn
, xloc
, new, 1);
2665 /* Canonicalize an expression:
2666 replace each register reference inside it
2667 with the "oldest" equivalent register.
2669 If INSN is nonzero and we are replacing a pseudo with a hard register
2670 or vice versa, validate_change is used to ensure that INSN remains valid
2671 after we make our substitution. The calls are made with IN_GROUP nonzero
2672 so apply_change_group must be called upon the outermost return from this
2673 function (unless INSN is zero). The result of apply_change_group can
2674 generally be discarded since the changes we are making are optional. */
2677 canon_reg (rtx x
, rtx insn
)
2686 code
= GET_CODE (x
);
2705 struct qty_table_elem
*ent
;
2707 /* Never replace a hard reg, because hard regs can appear
2708 in more than one machine mode, and we must preserve the mode
2709 of each occurrence. Also, some hard regs appear in
2710 MEMs that are shared and mustn't be altered. Don't try to
2711 replace any reg that maps to a reg of class NO_REGS. */
2712 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
2713 || ! REGNO_QTY_VALID_P (REGNO (x
)))
2716 q
= REG_QTY (REGNO (x
));
2717 ent
= &qty_table
[q
];
2718 first
= ent
->first_reg
;
2719 return (first
>= FIRST_PSEUDO_REGISTER
? regno_reg_rtx
[first
]
2720 : REGNO_REG_CLASS (first
) == NO_REGS
? x
2721 : gen_rtx_REG (ent
->mode
, first
));
2728 fmt
= GET_RTX_FORMAT (code
);
2729 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2734 validate_canon_reg (&XEXP (x
, i
), insn
);
2735 else if (fmt
[i
] == 'E')
2736 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2737 validate_canon_reg (&XVECEXP (x
, i
, j
), insn
);
2743 /* LOC is a location within INSN that is an operand address (the contents of
2744 a MEM). Find the best equivalent address to use that is valid for this
2747 On most CISC machines, complicated address modes are costly, and rtx_cost
2748 is a good approximation for that cost. However, most RISC machines have
2749 only a few (usually only one) memory reference formats. If an address is
2750 valid at all, it is often just as cheap as any other address. Hence, for
2751 RISC machines, we use `address_cost' to compare the costs of various
2752 addresses. For two addresses of equal cost, choose the one with the
2753 highest `rtx_cost' value as that has the potential of eliminating the
2754 most insns. For equal costs, we choose the first in the equivalence
2755 class. Note that we ignore the fact that pseudo registers are cheaper than
2756 hard registers here because we would also prefer the pseudo registers. */
2759 find_best_addr (rtx insn
, rtx
*loc
, enum machine_mode mode
)
2761 struct table_elt
*elt
;
2763 struct table_elt
*p
;
2764 int found_better
= 1;
2765 int save_do_not_record
= do_not_record
;
2766 int save_hash_arg_in_memory
= hash_arg_in_memory
;
2771 /* Do not try to replace constant addresses or addresses of local and
2772 argument slots. These MEM expressions are made only once and inserted
2773 in many instructions, as well as being used to control symbol table
2774 output. It is not safe to clobber them.
2776 There are some uncommon cases where the address is already in a register
2777 for some reason, but we cannot take advantage of that because we have
2778 no easy way to unshare the MEM. In addition, looking up all stack
2779 addresses is costly. */
2780 if ((GET_CODE (addr
) == PLUS
2781 && REG_P (XEXP (addr
, 0))
2782 && GET_CODE (XEXP (addr
, 1)) == CONST_INT
2783 && (regno
= REGNO (XEXP (addr
, 0)),
2784 regno
== FRAME_POINTER_REGNUM
|| regno
== HARD_FRAME_POINTER_REGNUM
2785 || regno
== ARG_POINTER_REGNUM
))
2787 && (regno
= REGNO (addr
), regno
== FRAME_POINTER_REGNUM
2788 || regno
== HARD_FRAME_POINTER_REGNUM
2789 || regno
== ARG_POINTER_REGNUM
))
2790 || CONSTANT_ADDRESS_P (addr
))
2793 /* If this address is not simply a register, try to fold it. This will
2794 sometimes simplify the expression. Many simplifications
2795 will not be valid, but some, usually applying the associative rule, will
2796 be valid and produce better code. */
2799 rtx folded
= fold_rtx (copy_rtx (addr
), NULL_RTX
);
2800 int addr_folded_cost
= address_cost (folded
, mode
);
2801 int addr_cost
= address_cost (addr
, mode
);
2803 if ((addr_folded_cost
< addr_cost
2804 || (addr_folded_cost
== addr_cost
2805 /* ??? The rtx_cost comparison is left over from an older
2806 version of this code. It is probably no longer helpful. */
2807 && (rtx_cost (folded
, MEM
) > rtx_cost (addr
, MEM
)
2808 || approx_reg_cost (folded
) < approx_reg_cost (addr
))))
2809 && validate_change (insn
, loc
, folded
, 0))
2813 /* If this address is not in the hash table, we can't look for equivalences
2814 of the whole address. Also, ignore if volatile. */
2817 hash
= HASH (addr
, Pmode
);
2818 addr_volatile
= do_not_record
;
2819 do_not_record
= save_do_not_record
;
2820 hash_arg_in_memory
= save_hash_arg_in_memory
;
2825 elt
= lookup (addr
, hash
, Pmode
);
2829 /* We need to find the best (under the criteria documented above) entry
2830 in the class that is valid. We use the `flag' field to indicate
2831 choices that were invalid and iterate until we can't find a better
2832 one that hasn't already been tried. */
2834 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2837 while (found_better
)
2839 int best_addr_cost
= address_cost (*loc
, mode
);
2840 int best_rtx_cost
= (elt
->cost
+ 1) >> 1;
2842 struct table_elt
*best_elt
= elt
;
2845 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2849 || exp_equiv_p (p
->exp
, p
->exp
, 1, false))
2850 && ((exp_cost
= address_cost (p
->exp
, mode
)) < best_addr_cost
2851 || (exp_cost
== best_addr_cost
2852 && ((p
->cost
+ 1) >> 1) > best_rtx_cost
)))
2855 best_addr_cost
= exp_cost
;
2856 best_rtx_cost
= (p
->cost
+ 1) >> 1;
2863 if (validate_change (insn
, loc
,
2864 canon_reg (copy_rtx (best_elt
->exp
),
2873 /* If the address is a binary operation with the first operand a register
2874 and the second a constant, do the same as above, but looking for
2875 equivalences of the register. Then try to simplify before checking for
2876 the best address to use. This catches a few cases: First is when we
2877 have REG+const and the register is another REG+const. We can often merge
2878 the constants and eliminate one insn and one register. It may also be
2879 that a machine has a cheap REG+REG+const. Finally, this improves the
2880 code on the Alpha for unaligned byte stores. */
2882 if (flag_expensive_optimizations
2883 && ARITHMETIC_P (*loc
)
2884 && REG_P (XEXP (*loc
, 0)))
2886 rtx op1
= XEXP (*loc
, 1);
2889 hash
= HASH (XEXP (*loc
, 0), Pmode
);
2890 do_not_record
= save_do_not_record
;
2891 hash_arg_in_memory
= save_hash_arg_in_memory
;
2893 elt
= lookup (XEXP (*loc
, 0), hash
, Pmode
);
2897 /* We need to find the best (under the criteria documented above) entry
2898 in the class that is valid. We use the `flag' field to indicate
2899 choices that were invalid and iterate until we can't find a better
2900 one that hasn't already been tried. */
2902 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2905 while (found_better
)
2907 int best_addr_cost
= address_cost (*loc
, mode
);
2908 int best_rtx_cost
= (COST (*loc
) + 1) >> 1;
2909 struct table_elt
*best_elt
= elt
;
2910 rtx best_rtx
= *loc
;
2913 /* This is at worst case an O(n^2) algorithm, so limit our search
2914 to the first 32 elements on the list. This avoids trouble
2915 compiling code with very long basic blocks that can easily
2916 call simplify_gen_binary so many times that we run out of
2920 for (p
= elt
->first_same_value
, count
= 0;
2922 p
= p
->next_same_value
, count
++)
2925 || exp_equiv_p (p
->exp
, p
->exp
, 1, false)))
2927 rtx
new = simplify_gen_binary (GET_CODE (*loc
), Pmode
,
2930 new_cost
= address_cost (new, mode
);
2932 if (new_cost
< best_addr_cost
2933 || (new_cost
== best_addr_cost
2934 && (COST (new) + 1) >> 1 > best_rtx_cost
))
2937 best_addr_cost
= new_cost
;
2938 best_rtx_cost
= (COST (new) + 1) >> 1;
2946 if (validate_change (insn
, loc
,
2947 canon_reg (copy_rtx (best_rtx
),
2957 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2958 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2959 what values are being compared.
2961 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2962 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2963 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2964 compared to produce cc0.
2966 The return value is the comparison operator and is either the code of
2967 A or the code corresponding to the inverse of the comparison. */
2969 static enum rtx_code
2970 find_comparison_args (enum rtx_code code
, rtx
*parg1
, rtx
*parg2
,
2971 enum machine_mode
*pmode1
, enum machine_mode
*pmode2
)
2975 arg1
= *parg1
, arg2
= *parg2
;
2977 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2979 while (arg2
== CONST0_RTX (GET_MODE (arg1
)))
2981 /* Set nonzero when we find something of interest. */
2983 int reverse_code
= 0;
2984 struct table_elt
*p
= 0;
2986 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2987 On machines with CC0, this is the only case that can occur, since
2988 fold_rtx will return the COMPARE or item being compared with zero
2991 if (GET_CODE (arg1
) == COMPARE
&& arg2
== const0_rtx
)
2994 /* If ARG1 is a comparison operator and CODE is testing for
2995 STORE_FLAG_VALUE, get the inner arguments. */
2997 else if (COMPARISON_P (arg1
))
2999 #ifdef FLOAT_STORE_FLAG_VALUE
3000 REAL_VALUE_TYPE fsfv
;
3004 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
3005 && code
== LT
&& STORE_FLAG_VALUE
== -1)
3006 #ifdef FLOAT_STORE_FLAG_VALUE
3007 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_FLOAT
3008 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
3009 REAL_VALUE_NEGATIVE (fsfv
)))
3014 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
3015 && code
== GE
&& STORE_FLAG_VALUE
== -1)
3016 #ifdef FLOAT_STORE_FLAG_VALUE
3017 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_FLOAT
3018 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
3019 REAL_VALUE_NEGATIVE (fsfv
)))
3022 x
= arg1
, reverse_code
= 1;
3025 /* ??? We could also check for
3027 (ne (and (eq (...) (const_int 1))) (const_int 0))
3029 and related forms, but let's wait until we see them occurring. */
3032 /* Look up ARG1 in the hash table and see if it has an equivalence
3033 that lets us see what is being compared. */
3034 p
= lookup (arg1
, SAFE_HASH (arg1
, GET_MODE (arg1
)), GET_MODE (arg1
));
3037 p
= p
->first_same_value
;
3039 /* If what we compare is already known to be constant, that is as
3041 We need to break the loop in this case, because otherwise we
3042 can have an infinite loop when looking at a reg that is known
3043 to be a constant which is the same as a comparison of a reg
3044 against zero which appears later in the insn stream, which in
3045 turn is constant and the same as the comparison of the first reg
3051 for (; p
; p
= p
->next_same_value
)
3053 enum machine_mode inner_mode
= GET_MODE (p
->exp
);
3054 #ifdef FLOAT_STORE_FLAG_VALUE
3055 REAL_VALUE_TYPE fsfv
;
3058 /* If the entry isn't valid, skip it. */
3059 if (! exp_equiv_p (p
->exp
, p
->exp
, 1, false))
3062 if (GET_CODE (p
->exp
) == COMPARE
3063 /* Another possibility is that this machine has a compare insn
3064 that includes the comparison code. In that case, ARG1 would
3065 be equivalent to a comparison operation that would set ARG1 to
3066 either STORE_FLAG_VALUE or zero. If this is an NE operation,
3067 ORIG_CODE is the actual comparison being done; if it is an EQ,
3068 we must reverse ORIG_CODE. On machine with a negative value
3069 for STORE_FLAG_VALUE, also look at LT and GE operations. */
3072 && GET_MODE_CLASS (inner_mode
) == MODE_INT
3073 && (GET_MODE_BITSIZE (inner_mode
)
3074 <= HOST_BITS_PER_WIDE_INT
)
3075 && (STORE_FLAG_VALUE
3076 & ((HOST_WIDE_INT
) 1
3077 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
3078 #ifdef FLOAT_STORE_FLAG_VALUE
3080 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
3081 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
3082 REAL_VALUE_NEGATIVE (fsfv
)))
3085 && COMPARISON_P (p
->exp
)))
3090 else if ((code
== EQ
3092 && GET_MODE_CLASS (inner_mode
) == MODE_INT
3093 && (GET_MODE_BITSIZE (inner_mode
)
3094 <= HOST_BITS_PER_WIDE_INT
)
3095 && (STORE_FLAG_VALUE
3096 & ((HOST_WIDE_INT
) 1
3097 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
3098 #ifdef FLOAT_STORE_FLAG_VALUE
3100 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
3101 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
3102 REAL_VALUE_NEGATIVE (fsfv
)))
3105 && COMPARISON_P (p
->exp
))
3112 /* If this non-trapping address, e.g. fp + constant, the
3113 equivalent is a better operand since it may let us predict
3114 the value of the comparison. */
3115 else if (!rtx_addr_can_trap_p (p
->exp
))
3122 /* If we didn't find a useful equivalence for ARG1, we are done.
3123 Otherwise, set up for the next iteration. */
3127 /* If we need to reverse the comparison, make sure that that is
3128 possible -- we can't necessarily infer the value of GE from LT
3129 with floating-point operands. */
3132 enum rtx_code reversed
= reversed_comparison_code (x
, NULL_RTX
);
3133 if (reversed
== UNKNOWN
)
3138 else if (COMPARISON_P (x
))
3139 code
= GET_CODE (x
);
3140 arg1
= XEXP (x
, 0), arg2
= XEXP (x
, 1);
3143 /* Return our results. Return the modes from before fold_rtx
3144 because fold_rtx might produce const_int, and then it's too late. */
3145 *pmode1
= GET_MODE (arg1
), *pmode2
= GET_MODE (arg2
);
3146 *parg1
= fold_rtx (arg1
, 0), *parg2
= fold_rtx (arg2
, 0);
3151 /* If X is a nontrivial arithmetic operation on an argument
3152 for which a constant value can be determined, return
3153 the result of operating on that value, as a constant.
3154 Otherwise, return X, possibly with one or more operands
3155 modified by recursive calls to this function.
3157 If X is a register whose contents are known, we do NOT
3158 return those contents here. equiv_constant is called to
3161 INSN is the insn that we may be modifying. If it is 0, make a copy
3162 of X before modifying it. */
3165 fold_rtx (rtx x
, rtx insn
)
3168 enum machine_mode mode
;
3175 /* Folded equivalents of first two operands of X. */
3179 /* Constant equivalents of first three operands of X;
3180 0 when no such equivalent is known. */
3185 /* The mode of the first operand of X. We need this for sign and zero
3187 enum machine_mode mode_arg0
;
3192 mode
= GET_MODE (x
);
3193 code
= GET_CODE (x
);
3203 /* No use simplifying an EXPR_LIST
3204 since they are used only for lists of args
3205 in a function call's REG_EQUAL note. */
3211 return prev_insn_cc0
;
3215 /* If the next insn is a CODE_LABEL followed by a jump table,
3216 PC's value is a LABEL_REF pointing to that label. That
3217 lets us fold switch statements on the VAX. */
3220 if (insn
&& tablejump_p (insn
, &next
, NULL
))
3221 return gen_rtx_LABEL_REF (Pmode
, next
);
3226 /* See if we previously assigned a constant value to this SUBREG. */
3227 if ((new = lookup_as_function (x
, CONST_INT
)) != 0
3228 || (new = lookup_as_function (x
, CONST_DOUBLE
)) != 0)
3231 /* If this is a paradoxical SUBREG, we have no idea what value the
3232 extra bits would have. However, if the operand is equivalent
3233 to a SUBREG whose operand is the same as our mode, and all the
3234 modes are within a word, we can just use the inner operand
3235 because these SUBREGs just say how to treat the register.
3237 Similarly if we find an integer constant. */
3239 if (GET_MODE_SIZE (mode
) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
3241 enum machine_mode imode
= GET_MODE (SUBREG_REG (x
));
3242 struct table_elt
*elt
;
3244 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
3245 && GET_MODE_SIZE (imode
) <= UNITS_PER_WORD
3246 && (elt
= lookup (SUBREG_REG (x
), HASH (SUBREG_REG (x
), imode
),
3248 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
3250 if (CONSTANT_P (elt
->exp
)
3251 && GET_MODE (elt
->exp
) == VOIDmode
)
3254 if (GET_CODE (elt
->exp
) == SUBREG
3255 && GET_MODE (SUBREG_REG (elt
->exp
)) == mode
3256 && exp_equiv_p (elt
->exp
, elt
->exp
, 1, false))
3257 return copy_rtx (SUBREG_REG (elt
->exp
));
3263 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
3264 We might be able to if the SUBREG is extracting a single word in an
3265 integral mode or extracting the low part. */
3267 folded_arg0
= fold_rtx (SUBREG_REG (x
), insn
);
3268 const_arg0
= equiv_constant (folded_arg0
);
3270 folded_arg0
= const_arg0
;
3272 if (folded_arg0
!= SUBREG_REG (x
))
3274 new = simplify_subreg (mode
, folded_arg0
,
3275 GET_MODE (SUBREG_REG (x
)), SUBREG_BYTE (x
));
3280 if (REG_P (folded_arg0
)
3281 && GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (folded_arg0
)))
3283 struct table_elt
*elt
;
3285 elt
= lookup (folded_arg0
,
3286 HASH (folded_arg0
, GET_MODE (folded_arg0
)),
3287 GET_MODE (folded_arg0
));
3290 elt
= elt
->first_same_value
;
3292 if (subreg_lowpart_p (x
))
3293 /* If this is a narrowing SUBREG and our operand is a REG, see
3294 if we can find an equivalence for REG that is an arithmetic
3295 operation in a wider mode where both operands are paradoxical
3296 SUBREGs from objects of our result mode. In that case, we
3297 couldn-t report an equivalent value for that operation, since we
3298 don't know what the extra bits will be. But we can find an
3299 equivalence for this SUBREG by folding that operation in the
3300 narrow mode. This allows us to fold arithmetic in narrow modes
3301 when the machine only supports word-sized arithmetic.
3303 Also look for a case where we have a SUBREG whose operand
3304 is the same as our result. If both modes are smaller
3305 than a word, we are simply interpreting a register in
3306 different modes and we can use the inner value. */
3308 for (; elt
; elt
= elt
->next_same_value
)
3310 enum rtx_code eltcode
= GET_CODE (elt
->exp
);
3312 /* Just check for unary and binary operations. */
3313 if (UNARY_P (elt
->exp
)
3314 && eltcode
!= SIGN_EXTEND
3315 && eltcode
!= ZERO_EXTEND
3316 && GET_CODE (XEXP (elt
->exp
, 0)) == SUBREG
3317 && GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 0))) == mode
3318 && (GET_MODE_CLASS (mode
)
3319 == GET_MODE_CLASS (GET_MODE (XEXP (elt
->exp
, 0)))))
3321 rtx op0
= SUBREG_REG (XEXP (elt
->exp
, 0));
3323 if (!REG_P (op0
) && ! CONSTANT_P (op0
))
3324 op0
= fold_rtx (op0
, NULL_RTX
);
3326 op0
= equiv_constant (op0
);
3328 new = simplify_unary_operation (GET_CODE (elt
->exp
), mode
,
3331 else if (ARITHMETIC_P (elt
->exp
)
3332 && eltcode
!= DIV
&& eltcode
!= MOD
3333 && eltcode
!= UDIV
&& eltcode
!= UMOD
3334 && eltcode
!= ASHIFTRT
&& eltcode
!= LSHIFTRT
3335 && eltcode
!= ROTATE
&& eltcode
!= ROTATERT
3336 && ((GET_CODE (XEXP (elt
->exp
, 0)) == SUBREG
3337 && (GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 0)))
3339 || CONSTANT_P (XEXP (elt
->exp
, 0)))
3340 && ((GET_CODE (XEXP (elt
->exp
, 1)) == SUBREG
3341 && (GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 1)))
3343 || CONSTANT_P (XEXP (elt
->exp
, 1))))
3345 rtx op0
= gen_lowpart_common (mode
, XEXP (elt
->exp
, 0));
3346 rtx op1
= gen_lowpart_common (mode
, XEXP (elt
->exp
, 1));
3348 if (op0
&& !REG_P (op0
) && ! CONSTANT_P (op0
))
3349 op0
= fold_rtx (op0
, NULL_RTX
);
3352 op0
= equiv_constant (op0
);
3354 if (op1
&& !REG_P (op1
) && ! CONSTANT_P (op1
))
3355 op1
= fold_rtx (op1
, NULL_RTX
);
3358 op1
= equiv_constant (op1
);
3360 /* If we are looking for the low SImode part of
3361 (ashift:DI c (const_int 32)), it doesn't work
3362 to compute that in SImode, because a 32-bit shift
3363 in SImode is unpredictable. We know the value is 0. */
3365 && GET_CODE (elt
->exp
) == ASHIFT
3366 && GET_CODE (op1
) == CONST_INT
3367 && INTVAL (op1
) >= GET_MODE_BITSIZE (mode
))
3370 < GET_MODE_BITSIZE (GET_MODE (elt
->exp
)))
3371 /* If the count fits in the inner mode's width,
3372 but exceeds the outer mode's width,
3373 the value will get truncated to 0
3375 new = CONST0_RTX (mode
);
3377 /* If the count exceeds even the inner mode's width,
3378 don't fold this expression. */
3381 else if (op0
&& op1
)
3382 new = simplify_binary_operation (GET_CODE (elt
->exp
), mode
, op0
, op1
);
3385 else if (GET_CODE (elt
->exp
) == SUBREG
3386 && GET_MODE (SUBREG_REG (elt
->exp
)) == mode
3387 && (GET_MODE_SIZE (GET_MODE (folded_arg0
))
3389 && exp_equiv_p (elt
->exp
, elt
->exp
, 1, false))
3390 new = copy_rtx (SUBREG_REG (elt
->exp
));
3396 /* A SUBREG resulting from a zero extension may fold to zero if
3397 it extracts higher bits than the ZERO_EXTEND's source bits.
3398 FIXME: if combine tried to, er, combine these instructions,
3399 this transformation may be moved to simplify_subreg. */
3400 for (; elt
; elt
= elt
->next_same_value
)
3402 if (GET_CODE (elt
->exp
) == ZERO_EXTEND
3404 >= GET_MODE_BITSIZE (GET_MODE (XEXP (elt
->exp
, 0))))
3405 return CONST0_RTX (mode
);
3413 /* If we have (NOT Y), see if Y is known to be (NOT Z).
3414 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
3415 new = lookup_as_function (XEXP (x
, 0), code
);
3417 return fold_rtx (copy_rtx (XEXP (new, 0)), insn
);
3421 /* If we are not actually processing an insn, don't try to find the
3422 best address. Not only don't we care, but we could modify the
3423 MEM in an invalid way since we have no insn to validate against. */
3425 find_best_addr (insn
, &XEXP (x
, 0), GET_MODE (x
));
3428 /* Even if we don't fold in the insn itself,
3429 we can safely do so here, in hopes of getting a constant. */
3430 rtx addr
= fold_rtx (XEXP (x
, 0), NULL_RTX
);
3432 HOST_WIDE_INT offset
= 0;
3435 && REGNO_QTY_VALID_P (REGNO (addr
)))
3437 int addr_q
= REG_QTY (REGNO (addr
));
3438 struct qty_table_elem
*addr_ent
= &qty_table
[addr_q
];
3440 if (GET_MODE (addr
) == addr_ent
->mode
3441 && addr_ent
->const_rtx
!= NULL_RTX
)
3442 addr
= addr_ent
->const_rtx
;
3445 /* If address is constant, split it into a base and integer offset. */
3446 if (GET_CODE (addr
) == SYMBOL_REF
|| GET_CODE (addr
) == LABEL_REF
)
3448 else if (GET_CODE (addr
) == CONST
&& GET_CODE (XEXP (addr
, 0)) == PLUS
3449 && GET_CODE (XEXP (XEXP (addr
, 0), 1)) == CONST_INT
)
3451 base
= XEXP (XEXP (addr
, 0), 0);
3452 offset
= INTVAL (XEXP (XEXP (addr
, 0), 1));
3454 else if (GET_CODE (addr
) == LO_SUM
3455 && GET_CODE (XEXP (addr
, 1)) == SYMBOL_REF
)
3456 base
= XEXP (addr
, 1);
3458 /* If this is a constant pool reference, we can fold it into its
3459 constant to allow better value tracking. */
3460 if (base
&& GET_CODE (base
) == SYMBOL_REF
3461 && CONSTANT_POOL_ADDRESS_P (base
))
3463 rtx constant
= get_pool_constant (base
);
3464 enum machine_mode const_mode
= get_pool_mode (base
);
3467 if (CONSTANT_P (constant
) && GET_CODE (constant
) != CONST_INT
)
3469 constant_pool_entries_cost
= COST (constant
);
3470 constant_pool_entries_regcost
= approx_reg_cost (constant
);
3473 /* If we are loading the full constant, we have an equivalence. */
3474 if (offset
== 0 && mode
== const_mode
)
3477 /* If this actually isn't a constant (weird!), we can't do
3478 anything. Otherwise, handle the two most common cases:
3479 extracting a word from a multi-word constant, and extracting
3480 the low-order bits. Other cases don't seem common enough to
3482 if (! CONSTANT_P (constant
))
3485 if (GET_MODE_CLASS (mode
) == MODE_INT
3486 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
3487 && offset
% UNITS_PER_WORD
== 0
3488 && (new = operand_subword (constant
,
3489 offset
/ UNITS_PER_WORD
,
3490 0, const_mode
)) != 0)
3493 if (((BYTES_BIG_ENDIAN
3494 && offset
== GET_MODE_SIZE (GET_MODE (constant
)) - 1)
3495 || (! BYTES_BIG_ENDIAN
&& offset
== 0))
3496 && (new = gen_lowpart (mode
, constant
)) != 0)
3500 /* If this is a reference to a label at a known position in a jump
3501 table, we also know its value. */
3502 if (base
&& GET_CODE (base
) == LABEL_REF
)
3504 rtx label
= XEXP (base
, 0);
3505 rtx table_insn
= NEXT_INSN (label
);
3507 if (table_insn
&& JUMP_P (table_insn
)
3508 && GET_CODE (PATTERN (table_insn
)) == ADDR_VEC
)
3510 rtx table
= PATTERN (table_insn
);
3513 && (offset
/ GET_MODE_SIZE (GET_MODE (table
))
3514 < XVECLEN (table
, 0)))
3515 return XVECEXP (table
, 0,
3516 offset
/ GET_MODE_SIZE (GET_MODE (table
)));
3518 if (table_insn
&& JUMP_P (table_insn
)
3519 && GET_CODE (PATTERN (table_insn
)) == ADDR_DIFF_VEC
)
3521 rtx table
= PATTERN (table_insn
);
3524 && (offset
/ GET_MODE_SIZE (GET_MODE (table
))
3525 < XVECLEN (table
, 1)))
3527 offset
/= GET_MODE_SIZE (GET_MODE (table
));
3528 new = gen_rtx_MINUS (Pmode
, XVECEXP (table
, 1, offset
),
3531 if (GET_MODE (table
) != Pmode
)
3532 new = gen_rtx_TRUNCATE (GET_MODE (table
), new);
3534 /* Indicate this is a constant. This isn't a
3535 valid form of CONST, but it will only be used
3536 to fold the next insns and then discarded, so
3539 Note this expression must be explicitly discarded,
3540 by cse_insn, else it may end up in a REG_EQUAL note
3541 and "escape" to cause problems elsewhere. */
3542 return gen_rtx_CONST (GET_MODE (new), new);
3550 #ifdef NO_FUNCTION_CSE
3552 if (CONSTANT_P (XEXP (XEXP (x
, 0), 0)))
3558 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
3559 validate_change (insn
, &ASM_OPERANDS_INPUT (x
, i
),
3560 fold_rtx (ASM_OPERANDS_INPUT (x
, i
), insn
), 0);
3570 mode_arg0
= VOIDmode
;
3572 /* Try folding our operands.
3573 Then see which ones have constant values known. */
3575 fmt
= GET_RTX_FORMAT (code
);
3576 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3579 rtx arg
= XEXP (x
, i
);
3580 rtx folded_arg
= arg
, const_arg
= 0;
3581 enum machine_mode mode_arg
= GET_MODE (arg
);
3582 rtx cheap_arg
, expensive_arg
;
3583 rtx replacements
[2];
3585 int old_cost
= COST_IN (XEXP (x
, i
), code
);
3587 /* Most arguments are cheap, so handle them specially. */
3588 switch (GET_CODE (arg
))
3591 /* This is the same as calling equiv_constant; it is duplicated
3593 if (REGNO_QTY_VALID_P (REGNO (arg
)))
3595 int arg_q
= REG_QTY (REGNO (arg
));
3596 struct qty_table_elem
*arg_ent
= &qty_table
[arg_q
];
3598 if (arg_ent
->const_rtx
!= NULL_RTX
3599 && !REG_P (arg_ent
->const_rtx
)
3600 && GET_CODE (arg_ent
->const_rtx
) != PLUS
)
3602 = gen_lowpart (GET_MODE (arg
),
3603 arg_ent
->const_rtx
);
3618 folded_arg
= prev_insn_cc0
;
3619 mode_arg
= prev_insn_cc0_mode
;
3620 const_arg
= equiv_constant (folded_arg
);
3625 folded_arg
= fold_rtx (arg
, insn
);
3626 const_arg
= equiv_constant (folded_arg
);
3629 /* For the first three operands, see if the operand
3630 is constant or equivalent to a constant. */
3634 folded_arg0
= folded_arg
;
3635 const_arg0
= const_arg
;
3636 mode_arg0
= mode_arg
;
3639 folded_arg1
= folded_arg
;
3640 const_arg1
= const_arg
;
3643 const_arg2
= const_arg
;
3647 /* Pick the least expensive of the folded argument and an
3648 equivalent constant argument. */
3649 if (const_arg
== 0 || const_arg
== folded_arg
3650 || COST_IN (const_arg
, code
) > COST_IN (folded_arg
, code
))
3651 cheap_arg
= folded_arg
, expensive_arg
= const_arg
;
3653 cheap_arg
= const_arg
, expensive_arg
= folded_arg
;
3655 /* Try to replace the operand with the cheapest of the two
3656 possibilities. If it doesn't work and this is either of the first
3657 two operands of a commutative operation, try swapping them.
3658 If THAT fails, try the more expensive, provided it is cheaper
3659 than what is already there. */
3661 if (cheap_arg
== XEXP (x
, i
))
3664 if (insn
== 0 && ! copied
)
3670 /* Order the replacements from cheapest to most expensive. */
3671 replacements
[0] = cheap_arg
;
3672 replacements
[1] = expensive_arg
;
3674 for (j
= 0; j
< 2 && replacements
[j
]; j
++)
3676 int new_cost
= COST_IN (replacements
[j
], code
);
3678 /* Stop if what existed before was cheaper. Prefer constants
3679 in the case of a tie. */
3680 if (new_cost
> old_cost
3681 || (new_cost
== old_cost
&& CONSTANT_P (XEXP (x
, i
))))
3684 /* It's not safe to substitute the operand of a conversion
3685 operator with a constant, as the conversion's identity
3686 depends upon the mode of it's operand. This optimization
3687 is handled by the call to simplify_unary_operation. */
3688 if (GET_RTX_CLASS (code
) == RTX_UNARY
3689 && GET_MODE (replacements
[j
]) != mode_arg0
3690 && (code
== ZERO_EXTEND
3691 || code
== SIGN_EXTEND
3693 || code
== FLOAT_TRUNCATE
3694 || code
== FLOAT_EXTEND
3697 || code
== UNSIGNED_FLOAT
3698 || code
== UNSIGNED_FIX
))
3701 if (validate_change (insn
, &XEXP (x
, i
), replacements
[j
], 0))
3704 if (GET_RTX_CLASS (code
) == RTX_COMM_COMPARE
3705 || GET_RTX_CLASS (code
) == RTX_COMM_ARITH
)
3707 validate_change (insn
, &XEXP (x
, i
), XEXP (x
, 1 - i
), 1);
3708 validate_change (insn
, &XEXP (x
, 1 - i
), replacements
[j
], 1);
3710 if (apply_change_group ())
3712 /* Swap them back to be invalid so that this loop can
3713 continue and flag them to be swapped back later. */
3716 tem
= XEXP (x
, 0); XEXP (x
, 0) = XEXP (x
, 1);
3728 /* Don't try to fold inside of a vector of expressions.
3729 Doing nothing is harmless. */
3733 /* If a commutative operation, place a constant integer as the second
3734 operand unless the first operand is also a constant integer. Otherwise,
3735 place any constant second unless the first operand is also a constant. */
3737 if (COMMUTATIVE_P (x
))
3740 || swap_commutative_operands_p (const_arg0
? const_arg0
3742 const_arg1
? const_arg1
3745 rtx tem
= XEXP (x
, 0);
3747 if (insn
== 0 && ! copied
)
3753 validate_change (insn
, &XEXP (x
, 0), XEXP (x
, 1), 1);
3754 validate_change (insn
, &XEXP (x
, 1), tem
, 1);
3755 if (apply_change_group ())
3757 tem
= const_arg0
, const_arg0
= const_arg1
, const_arg1
= tem
;
3758 tem
= folded_arg0
, folded_arg0
= folded_arg1
, folded_arg1
= tem
;
3763 /* If X is an arithmetic operation, see if we can simplify it. */
3765 switch (GET_RTX_CLASS (code
))
3771 /* We can't simplify extension ops unless we know the
3773 if ((code
== ZERO_EXTEND
|| code
== SIGN_EXTEND
)
3774 && mode_arg0
== VOIDmode
)
3777 /* If we had a CONST, strip it off and put it back later if we
3779 if (const_arg0
!= 0 && GET_CODE (const_arg0
) == CONST
)
3780 is_const
= 1, const_arg0
= XEXP (const_arg0
, 0);
3782 new = simplify_unary_operation (code
, mode
,
3783 const_arg0
? const_arg0
: folded_arg0
,
3785 /* NEG of PLUS could be converted into MINUS, but that causes
3786 expressions of the form
3787 (CONST (MINUS (CONST_INT) (SYMBOL_REF)))
3788 which many ports mistakenly treat as LEGITIMATE_CONSTANT_P.
3789 FIXME: those ports should be fixed. */
3790 if (new != 0 && is_const
3791 && GET_CODE (new) == PLUS
3792 && (GET_CODE (XEXP (new, 0)) == SYMBOL_REF
3793 || GET_CODE (XEXP (new, 0)) == LABEL_REF
)
3794 && GET_CODE (XEXP (new, 1)) == CONST_INT
)
3795 new = gen_rtx_CONST (mode
, new);
3800 case RTX_COMM_COMPARE
:
3801 /* See what items are actually being compared and set FOLDED_ARG[01]
3802 to those values and CODE to the actual comparison code. If any are
3803 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3804 do anything if both operands are already known to be constant. */
3806 if (const_arg0
== 0 || const_arg1
== 0)
3808 struct table_elt
*p0
, *p1
;
3809 rtx true_rtx
= const_true_rtx
, false_rtx
= const0_rtx
;
3810 enum machine_mode mode_arg1
;
3812 #ifdef FLOAT_STORE_FLAG_VALUE
3813 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
3815 true_rtx
= (CONST_DOUBLE_FROM_REAL_VALUE
3816 (FLOAT_STORE_FLAG_VALUE (mode
), mode
));
3817 false_rtx
= CONST0_RTX (mode
);
3821 code
= find_comparison_args (code
, &folded_arg0
, &folded_arg1
,
3822 &mode_arg0
, &mode_arg1
);
3823 const_arg0
= equiv_constant (folded_arg0
);
3824 const_arg1
= equiv_constant (folded_arg1
);
3826 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3827 what kinds of things are being compared, so we can't do
3828 anything with this comparison. */
3830 if (mode_arg0
== VOIDmode
|| GET_MODE_CLASS (mode_arg0
) == MODE_CC
)
3833 /* If we do not now have two constants being compared, see
3834 if we can nevertheless deduce some things about the
3836 if (const_arg0
== 0 || const_arg1
== 0)
3838 /* Some addresses are known to be nonzero. We don't know
3839 their sign, but equality comparisons are known. */
3840 if (const_arg1
== const0_rtx
3841 && nonzero_address_p (folded_arg0
))
3845 else if (code
== NE
)
3849 /* See if the two operands are the same. */
3851 if (folded_arg0
== folded_arg1
3852 || (REG_P (folded_arg0
)
3853 && REG_P (folded_arg1
)
3854 && (REG_QTY (REGNO (folded_arg0
))
3855 == REG_QTY (REGNO (folded_arg1
))))
3856 || ((p0
= lookup (folded_arg0
,
3857 SAFE_HASH (folded_arg0
, mode_arg0
),
3859 && (p1
= lookup (folded_arg1
,
3860 SAFE_HASH (folded_arg1
, mode_arg0
),
3862 && p0
->first_same_value
== p1
->first_same_value
))
3864 /* Sadly two equal NaNs are not equivalent. */
3865 if (!HONOR_NANS (mode_arg0
))
3866 return ((code
== EQ
|| code
== LE
|| code
== GE
3867 || code
== LEU
|| code
== GEU
|| code
== UNEQ
3868 || code
== UNLE
|| code
== UNGE
3870 ? true_rtx
: false_rtx
);
3871 /* Take care for the FP compares we can resolve. */
3872 if (code
== UNEQ
|| code
== UNLE
|| code
== UNGE
)
3874 if (code
== LTGT
|| code
== LT
|| code
== GT
)
3878 /* If FOLDED_ARG0 is a register, see if the comparison we are
3879 doing now is either the same as we did before or the reverse
3880 (we only check the reverse if not floating-point). */
3881 else if (REG_P (folded_arg0
))
3883 int qty
= REG_QTY (REGNO (folded_arg0
));
3885 if (REGNO_QTY_VALID_P (REGNO (folded_arg0
)))
3887 struct qty_table_elem
*ent
= &qty_table
[qty
];
3889 if ((comparison_dominates_p (ent
->comparison_code
, code
)
3890 || (! FLOAT_MODE_P (mode_arg0
)
3891 && comparison_dominates_p (ent
->comparison_code
,
3892 reverse_condition (code
))))
3893 && (rtx_equal_p (ent
->comparison_const
, folded_arg1
)
3895 && rtx_equal_p (ent
->comparison_const
,
3897 || (REG_P (folded_arg1
)
3898 && (REG_QTY (REGNO (folded_arg1
)) == ent
->comparison_qty
))))
3899 return (comparison_dominates_p (ent
->comparison_code
, code
)
3900 ? true_rtx
: false_rtx
);
3906 /* If we are comparing against zero, see if the first operand is
3907 equivalent to an IOR with a constant. If so, we may be able to
3908 determine the result of this comparison. */
3910 if (const_arg1
== const0_rtx
)
3912 rtx y
= lookup_as_function (folded_arg0
, IOR
);
3916 && (inner_const
= equiv_constant (XEXP (y
, 1))) != 0
3917 && GET_CODE (inner_const
) == CONST_INT
3918 && INTVAL (inner_const
) != 0)
3920 int sign_bitnum
= GET_MODE_BITSIZE (mode_arg0
) - 1;
3921 int has_sign
= (HOST_BITS_PER_WIDE_INT
>= sign_bitnum
3922 && (INTVAL (inner_const
)
3923 & ((HOST_WIDE_INT
) 1 << sign_bitnum
)));
3924 rtx true_rtx
= const_true_rtx
, false_rtx
= const0_rtx
;
3926 #ifdef FLOAT_STORE_FLAG_VALUE
3927 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
3929 true_rtx
= (CONST_DOUBLE_FROM_REAL_VALUE
3930 (FLOAT_STORE_FLAG_VALUE (mode
), mode
));
3931 false_rtx
= CONST0_RTX (mode
);
3956 rtx op0
= const_arg0
? const_arg0
: folded_arg0
;
3957 rtx op1
= const_arg1
? const_arg1
: folded_arg1
;
3958 new = simplify_relational_operation (code
, mode
, mode_arg0
, op0
, op1
);
3963 case RTX_COMM_ARITH
:
3967 /* If the second operand is a LABEL_REF, see if the first is a MINUS
3968 with that LABEL_REF as its second operand. If so, the result is
3969 the first operand of that MINUS. This handles switches with an
3970 ADDR_DIFF_VEC table. */
3971 if (const_arg1
&& GET_CODE (const_arg1
) == LABEL_REF
)
3974 = GET_CODE (folded_arg0
) == MINUS
? folded_arg0
3975 : lookup_as_function (folded_arg0
, MINUS
);
3977 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
3978 && XEXP (XEXP (y
, 1), 0) == XEXP (const_arg1
, 0))
3981 /* Now try for a CONST of a MINUS like the above. */
3982 if ((y
= (GET_CODE (folded_arg0
) == CONST
? folded_arg0
3983 : lookup_as_function (folded_arg0
, CONST
))) != 0
3984 && GET_CODE (XEXP (y
, 0)) == MINUS
3985 && GET_CODE (XEXP (XEXP (y
, 0), 1)) == LABEL_REF
3986 && XEXP (XEXP (XEXP (y
, 0), 1), 0) == XEXP (const_arg1
, 0))
3987 return XEXP (XEXP (y
, 0), 0);
3990 /* Likewise if the operands are in the other order. */
3991 if (const_arg0
&& GET_CODE (const_arg0
) == LABEL_REF
)
3994 = GET_CODE (folded_arg1
) == MINUS
? folded_arg1
3995 : lookup_as_function (folded_arg1
, MINUS
);
3997 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
3998 && XEXP (XEXP (y
, 1), 0) == XEXP (const_arg0
, 0))
4001 /* Now try for a CONST of a MINUS like the above. */
4002 if ((y
= (GET_CODE (folded_arg1
) == CONST
? folded_arg1
4003 : lookup_as_function (folded_arg1
, CONST
))) != 0
4004 && GET_CODE (XEXP (y
, 0)) == MINUS
4005 && GET_CODE (XEXP (XEXP (y
, 0), 1)) == LABEL_REF
4006 && XEXP (XEXP (XEXP (y
, 0), 1), 0) == XEXP (const_arg0
, 0))
4007 return XEXP (XEXP (y
, 0), 0);
4010 /* If second operand is a register equivalent to a negative
4011 CONST_INT, see if we can find a register equivalent to the
4012 positive constant. Make a MINUS if so. Don't do this for
4013 a non-negative constant since we might then alternate between
4014 choosing positive and negative constants. Having the positive
4015 constant previously-used is the more common case. Be sure
4016 the resulting constant is non-negative; if const_arg1 were
4017 the smallest negative number this would overflow: depending
4018 on the mode, this would either just be the same value (and
4019 hence not save anything) or be incorrect. */
4020 if (const_arg1
!= 0 && GET_CODE (const_arg1
) == CONST_INT
4021 && INTVAL (const_arg1
) < 0
4022 /* This used to test
4024 -INTVAL (const_arg1) >= 0
4026 But The Sun V5.0 compilers mis-compiled that test. So
4027 instead we test for the problematic value in a more direct
4028 manner and hope the Sun compilers get it correct. */
4029 && INTVAL (const_arg1
) !=
4030 ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
- 1))
4031 && REG_P (folded_arg1
))
4033 rtx new_const
= GEN_INT (-INTVAL (const_arg1
));
4035 = lookup (new_const
, SAFE_HASH (new_const
, mode
), mode
);
4038 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
4040 return simplify_gen_binary (MINUS
, mode
, folded_arg0
,
4041 canon_reg (p
->exp
, NULL_RTX
));
4046 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
4047 If so, produce (PLUS Z C2-C). */
4048 if (const_arg1
!= 0 && GET_CODE (const_arg1
) == CONST_INT
)
4050 rtx y
= lookup_as_function (XEXP (x
, 0), PLUS
);
4051 if (y
&& GET_CODE (XEXP (y
, 1)) == CONST_INT
)
4052 return fold_rtx (plus_constant (copy_rtx (y
),
4053 -INTVAL (const_arg1
)),
4060 case SMIN
: case SMAX
: case UMIN
: case UMAX
:
4061 case IOR
: case AND
: case XOR
:
4063 case ASHIFT
: case LSHIFTRT
: case ASHIFTRT
:
4064 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
4065 is known to be of similar form, we may be able to replace the
4066 operation with a combined operation. This may eliminate the
4067 intermediate operation if every use is simplified in this way.
4068 Note that the similar optimization done by combine.c only works
4069 if the intermediate operation's result has only one reference. */
4071 if (REG_P (folded_arg0
)
4072 && const_arg1
&& GET_CODE (const_arg1
) == CONST_INT
)
4075 = (code
== ASHIFT
|| code
== ASHIFTRT
|| code
== LSHIFTRT
);
4076 rtx y
= lookup_as_function (folded_arg0
, code
);
4078 enum rtx_code associate_code
;
4082 || 0 == (inner_const
4083 = equiv_constant (fold_rtx (XEXP (y
, 1), 0)))
4084 || GET_CODE (inner_const
) != CONST_INT
4085 /* If we have compiled a statement like
4086 "if (x == (x & mask1))", and now are looking at
4087 "x & mask2", we will have a case where the first operand
4088 of Y is the same as our first operand. Unless we detect
4089 this case, an infinite loop will result. */
4090 || XEXP (y
, 0) == folded_arg0
)
4093 /* Don't associate these operations if they are a PLUS with the
4094 same constant and it is a power of two. These might be doable
4095 with a pre- or post-increment. Similarly for two subtracts of
4096 identical powers of two with post decrement. */
4098 if (code
== PLUS
&& const_arg1
== inner_const
4099 && ((HAVE_PRE_INCREMENT
4100 && exact_log2 (INTVAL (const_arg1
)) >= 0)
4101 || (HAVE_POST_INCREMENT
4102 && exact_log2 (INTVAL (const_arg1
)) >= 0)
4103 || (HAVE_PRE_DECREMENT
4104 && exact_log2 (- INTVAL (const_arg1
)) >= 0)
4105 || (HAVE_POST_DECREMENT
4106 && exact_log2 (- INTVAL (const_arg1
)) >= 0)))
4109 /* Compute the code used to compose the constants. For example,
4110 A-C1-C2 is A-(C1 + C2), so if CODE == MINUS, we want PLUS. */
4112 associate_code
= (is_shift
|| code
== MINUS
? PLUS
: code
);
4114 new_const
= simplify_binary_operation (associate_code
, mode
,
4115 const_arg1
, inner_const
);
4120 /* If we are associating shift operations, don't let this
4121 produce a shift of the size of the object or larger.
4122 This could occur when we follow a sign-extend by a right
4123 shift on a machine that does a sign-extend as a pair
4126 if (is_shift
&& GET_CODE (new_const
) == CONST_INT
4127 && INTVAL (new_const
) >= GET_MODE_BITSIZE (mode
))
4129 /* As an exception, we can turn an ASHIFTRT of this
4130 form into a shift of the number of bits - 1. */
4131 if (code
== ASHIFTRT
)
4132 new_const
= GEN_INT (GET_MODE_BITSIZE (mode
) - 1);
4137 y
= copy_rtx (XEXP (y
, 0));
4139 /* If Y contains our first operand (the most common way this
4140 can happen is if Y is a MEM), we would do into an infinite
4141 loop if we tried to fold it. So don't in that case. */
4143 if (! reg_mentioned_p (folded_arg0
, y
))
4144 y
= fold_rtx (y
, insn
);
4146 return simplify_gen_binary (code
, mode
, y
, new_const
);
4150 case DIV
: case UDIV
:
4151 /* ??? The associative optimization performed immediately above is
4152 also possible for DIV and UDIV using associate_code of MULT.
4153 However, we would need extra code to verify that the
4154 multiplication does not overflow, that is, there is no overflow
4155 in the calculation of new_const. */
4162 new = simplify_binary_operation (code
, mode
,
4163 const_arg0
? const_arg0
: folded_arg0
,
4164 const_arg1
? const_arg1
: folded_arg1
);
4168 /* (lo_sum (high X) X) is simply X. */
4169 if (code
== LO_SUM
&& const_arg0
!= 0
4170 && GET_CODE (const_arg0
) == HIGH
4171 && rtx_equal_p (XEXP (const_arg0
, 0), const_arg1
))
4176 case RTX_BITFIELD_OPS
:
4177 new = simplify_ternary_operation (code
, mode
, mode_arg0
,
4178 const_arg0
? const_arg0
: folded_arg0
,
4179 const_arg1
? const_arg1
: folded_arg1
,
4180 const_arg2
? const_arg2
: XEXP (x
, 2));
4187 return new ? new : x
;
4190 /* Return a constant value currently equivalent to X.
4191 Return 0 if we don't know one. */
4194 equiv_constant (rtx x
)
4197 && REGNO_QTY_VALID_P (REGNO (x
)))
4199 int x_q
= REG_QTY (REGNO (x
));
4200 struct qty_table_elem
*x_ent
= &qty_table
[x_q
];
4202 if (x_ent
->const_rtx
)
4203 x
= gen_lowpart (GET_MODE (x
), x_ent
->const_rtx
);
4206 if (x
== 0 || CONSTANT_P (x
))
4209 /* If X is a MEM, try to fold it outside the context of any insn to see if
4210 it might be equivalent to a constant. That handles the case where it
4211 is a constant-pool reference. Then try to look it up in the hash table
4212 in case it is something whose value we have seen before. */
4216 struct table_elt
*elt
;
4218 x
= fold_rtx (x
, NULL_RTX
);
4222 elt
= lookup (x
, SAFE_HASH (x
, GET_MODE (x
)), GET_MODE (x
));
4226 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
4227 if (elt
->is_const
&& CONSTANT_P (elt
->exp
))
4234 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
4235 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
4236 least-significant part of X.
4237 MODE specifies how big a part of X to return.
4239 If the requested operation cannot be done, 0 is returned.
4241 This is similar to gen_lowpart_general in emit-rtl.c. */
4244 gen_lowpart_if_possible (enum machine_mode mode
, rtx x
)
4246 rtx result
= gen_lowpart_common (mode
, x
);
4252 /* This is the only other case we handle. */
4256 if (WORDS_BIG_ENDIAN
)
4257 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
4258 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
4259 if (BYTES_BIG_ENDIAN
)
4260 /* Adjust the address so that the address-after-the-data is
4262 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
4263 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
4265 new = adjust_address_nv (x
, mode
, offset
);
4266 if (! memory_address_p (mode
, XEXP (new, 0)))
4275 /* Given INSN, a jump insn, PATH_TAKEN indicates if we are following the "taken"
4276 branch. It will be zero if not.
4278 In certain cases, this can cause us to add an equivalence. For example,
4279 if we are following the taken case of
4281 we can add the fact that `i' and '2' are now equivalent.
4283 In any case, we can record that this comparison was passed. If the same
4284 comparison is seen later, we will know its value. */
4287 record_jump_equiv (rtx insn
, int taken
)
4289 int cond_known_true
;
4292 enum machine_mode mode
, mode0
, mode1
;
4293 int reversed_nonequality
= 0;
4296 /* Ensure this is the right kind of insn. */
4297 if (! any_condjump_p (insn
))
4299 set
= pc_set (insn
);
4301 /* See if this jump condition is known true or false. */
4303 cond_known_true
= (XEXP (SET_SRC (set
), 2) == pc_rtx
);
4305 cond_known_true
= (XEXP (SET_SRC (set
), 1) == pc_rtx
);
4307 /* Get the type of comparison being done and the operands being compared.
4308 If we had to reverse a non-equality condition, record that fact so we
4309 know that it isn't valid for floating-point. */
4310 code
= GET_CODE (XEXP (SET_SRC (set
), 0));
4311 op0
= fold_rtx (XEXP (XEXP (SET_SRC (set
), 0), 0), insn
);
4312 op1
= fold_rtx (XEXP (XEXP (SET_SRC (set
), 0), 1), insn
);
4314 code
= find_comparison_args (code
, &op0
, &op1
, &mode0
, &mode1
);
4315 if (! cond_known_true
)
4317 code
= reversed_comparison_code_parts (code
, op0
, op1
, insn
);
4319 /* Don't remember if we can't find the inverse. */
4320 if (code
== UNKNOWN
)
4324 /* The mode is the mode of the non-constant. */
4326 if (mode1
!= VOIDmode
)
4329 record_jump_cond (code
, mode
, op0
, op1
, reversed_nonequality
);
4332 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
4333 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
4334 Make any useful entries we can with that information. Called from
4335 above function and called recursively. */
4338 record_jump_cond (enum rtx_code code
, enum machine_mode mode
, rtx op0
,
4339 rtx op1
, int reversed_nonequality
)
4341 unsigned op0_hash
, op1_hash
;
4342 int op0_in_memory
, op1_in_memory
;
4343 struct table_elt
*op0_elt
, *op1_elt
;
4345 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
4346 we know that they are also equal in the smaller mode (this is also
4347 true for all smaller modes whether or not there is a SUBREG, but
4348 is not worth testing for with no SUBREG). */
4350 /* Note that GET_MODE (op0) may not equal MODE. */
4351 if (code
== EQ
&& GET_CODE (op0
) == SUBREG
4352 && (GET_MODE_SIZE (GET_MODE (op0
))
4353 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
)))))
4355 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
4356 rtx tem
= gen_lowpart (inner_mode
, op1
);
4358 record_jump_cond (code
, mode
, SUBREG_REG (op0
),
4359 tem
? tem
: gen_rtx_SUBREG (inner_mode
, op1
, 0),
4360 reversed_nonequality
);
4363 if (code
== EQ
&& GET_CODE (op1
) == SUBREG
4364 && (GET_MODE_SIZE (GET_MODE (op1
))
4365 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
)))))
4367 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
4368 rtx tem
= gen_lowpart (inner_mode
, op0
);
4370 record_jump_cond (code
, mode
, SUBREG_REG (op1
),
4371 tem
? tem
: gen_rtx_SUBREG (inner_mode
, op0
, 0),
4372 reversed_nonequality
);
4375 /* Similarly, if this is an NE comparison, and either is a SUBREG
4376 making a smaller mode, we know the whole thing is also NE. */
4378 /* Note that GET_MODE (op0) may not equal MODE;
4379 if we test MODE instead, we can get an infinite recursion
4380 alternating between two modes each wider than MODE. */
4382 if (code
== NE
&& GET_CODE (op0
) == SUBREG
4383 && subreg_lowpart_p (op0
)
4384 && (GET_MODE_SIZE (GET_MODE (op0
))
4385 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
)))))
4387 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
4388 rtx tem
= gen_lowpart (inner_mode
, op1
);
4390 record_jump_cond (code
, mode
, SUBREG_REG (op0
),
4391 tem
? tem
: gen_rtx_SUBREG (inner_mode
, op1
, 0),
4392 reversed_nonequality
);
4395 if (code
== NE
&& GET_CODE (op1
) == SUBREG
4396 && subreg_lowpart_p (op1
)
4397 && (GET_MODE_SIZE (GET_MODE (op1
))
4398 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
)))))
4400 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
4401 rtx tem
= gen_lowpart (inner_mode
, op0
);
4403 record_jump_cond (code
, mode
, SUBREG_REG (op1
),
4404 tem
? tem
: gen_rtx_SUBREG (inner_mode
, op0
, 0),
4405 reversed_nonequality
);
4408 /* Hash both operands. */
4411 hash_arg_in_memory
= 0;
4412 op0_hash
= HASH (op0
, mode
);
4413 op0_in_memory
= hash_arg_in_memory
;
4419 hash_arg_in_memory
= 0;
4420 op1_hash
= HASH (op1
, mode
);
4421 op1_in_memory
= hash_arg_in_memory
;
4426 /* Look up both operands. */
4427 op0_elt
= lookup (op0
, op0_hash
, mode
);
4428 op1_elt
= lookup (op1
, op1_hash
, mode
);
4430 /* If both operands are already equivalent or if they are not in the
4431 table but are identical, do nothing. */
4432 if ((op0_elt
!= 0 && op1_elt
!= 0
4433 && op0_elt
->first_same_value
== op1_elt
->first_same_value
)
4434 || op0
== op1
|| rtx_equal_p (op0
, op1
))
4437 /* If we aren't setting two things equal all we can do is save this
4438 comparison. Similarly if this is floating-point. In the latter
4439 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
4440 If we record the equality, we might inadvertently delete code
4441 whose intent was to change -0 to +0. */
4443 if (code
!= EQ
|| FLOAT_MODE_P (GET_MODE (op0
)))
4445 struct qty_table_elem
*ent
;
4448 /* If we reversed a floating-point comparison, if OP0 is not a
4449 register, or if OP1 is neither a register or constant, we can't
4453 op1
= equiv_constant (op1
);
4455 if ((reversed_nonequality
&& FLOAT_MODE_P (mode
))
4456 || !REG_P (op0
) || op1
== 0)
4459 /* Put OP0 in the hash table if it isn't already. This gives it a
4460 new quantity number. */
4463 if (insert_regs (op0
, NULL
, 0))
4465 rehash_using_reg (op0
);
4466 op0_hash
= HASH (op0
, mode
);
4468 /* If OP0 is contained in OP1, this changes its hash code
4469 as well. Faster to rehash than to check, except
4470 for the simple case of a constant. */
4471 if (! CONSTANT_P (op1
))
4472 op1_hash
= HASH (op1
,mode
);
4475 op0_elt
= insert (op0
, NULL
, op0_hash
, mode
);
4476 op0_elt
->in_memory
= op0_in_memory
;
4479 qty
= REG_QTY (REGNO (op0
));
4480 ent
= &qty_table
[qty
];
4482 ent
->comparison_code
= code
;
4485 /* Look it up again--in case op0 and op1 are the same. */
4486 op1_elt
= lookup (op1
, op1_hash
, mode
);
4488 /* Put OP1 in the hash table so it gets a new quantity number. */
4491 if (insert_regs (op1
, NULL
, 0))
4493 rehash_using_reg (op1
);
4494 op1_hash
= HASH (op1
, mode
);
4497 op1_elt
= insert (op1
, NULL
, op1_hash
, mode
);
4498 op1_elt
->in_memory
= op1_in_memory
;
4501 ent
->comparison_const
= NULL_RTX
;
4502 ent
->comparison_qty
= REG_QTY (REGNO (op1
));
4506 ent
->comparison_const
= op1
;
4507 ent
->comparison_qty
= -1;
4513 /* If either side is still missing an equivalence, make it now,
4514 then merge the equivalences. */
4518 if (insert_regs (op0
, NULL
, 0))
4520 rehash_using_reg (op0
);
4521 op0_hash
= HASH (op0
, mode
);
4524 op0_elt
= insert (op0
, NULL
, op0_hash
, mode
);
4525 op0_elt
->in_memory
= op0_in_memory
;
4530 if (insert_regs (op1
, NULL
, 0))
4532 rehash_using_reg (op1
);
4533 op1_hash
= HASH (op1
, mode
);
4536 op1_elt
= insert (op1
, NULL
, op1_hash
, mode
);
4537 op1_elt
->in_memory
= op1_in_memory
;
4540 merge_equiv_classes (op0_elt
, op1_elt
);
4543 /* CSE processing for one instruction.
4544 First simplify sources and addresses of all assignments
4545 in the instruction, using previously-computed equivalents values.
4546 Then install the new sources and destinations in the table
4547 of available values.
4549 If LIBCALL_INSN is nonzero, don't record any equivalence made in
4550 the insn. It means that INSN is inside libcall block. In this
4551 case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */
4553 /* Data on one SET contained in the instruction. */
4557 /* The SET rtx itself. */
4559 /* The SET_SRC of the rtx (the original value, if it is changing). */
4561 /* The hash-table element for the SET_SRC of the SET. */
4562 struct table_elt
*src_elt
;
4563 /* Hash value for the SET_SRC. */
4565 /* Hash value for the SET_DEST. */
4567 /* The SET_DEST, with SUBREG, etc., stripped. */
4569 /* Nonzero if the SET_SRC is in memory. */
4571 /* Nonzero if the SET_SRC contains something
4572 whose value cannot be predicted and understood. */
4574 /* Original machine mode, in case it becomes a CONST_INT.
4575 The size of this field should match the size of the mode
4576 field of struct rtx_def (see rtl.h). */
4577 ENUM_BITFIELD(machine_mode
) mode
: 8;
4578 /* A constant equivalent for SET_SRC, if any. */
4580 /* Original SET_SRC value used for libcall notes. */
4582 /* Hash value of constant equivalent for SET_SRC. */
4583 unsigned src_const_hash
;
4584 /* Table entry for constant equivalent for SET_SRC, if any. */
4585 struct table_elt
*src_const_elt
;
4589 cse_insn (rtx insn
, rtx libcall_insn
)
4591 rtx x
= PATTERN (insn
);
4597 /* Records what this insn does to set CC0. */
4598 rtx this_insn_cc0
= 0;
4599 enum machine_mode this_insn_cc0_mode
= VOIDmode
;
4603 struct table_elt
*src_eqv_elt
= 0;
4604 int src_eqv_volatile
= 0;
4605 int src_eqv_in_memory
= 0;
4606 unsigned src_eqv_hash
= 0;
4608 struct set
*sets
= (struct set
*) 0;
4612 /* Find all the SETs and CLOBBERs in this instruction.
4613 Record all the SETs in the array `set' and count them.
4614 Also determine whether there is a CLOBBER that invalidates
4615 all memory references, or all references at varying addresses. */
4619 for (tem
= CALL_INSN_FUNCTION_USAGE (insn
); tem
; tem
= XEXP (tem
, 1))
4621 if (GET_CODE (XEXP (tem
, 0)) == CLOBBER
)
4622 invalidate (SET_DEST (XEXP (tem
, 0)), VOIDmode
);
4623 XEXP (tem
, 0) = canon_reg (XEXP (tem
, 0), insn
);
4627 if (GET_CODE (x
) == SET
)
4629 sets
= alloca (sizeof (struct set
));
4632 /* Ignore SETs that are unconditional jumps.
4633 They never need cse processing, so this does not hurt.
4634 The reason is not efficiency but rather
4635 so that we can test at the end for instructions
4636 that have been simplified to unconditional jumps
4637 and not be misled by unchanged instructions
4638 that were unconditional jumps to begin with. */
4639 if (SET_DEST (x
) == pc_rtx
4640 && GET_CODE (SET_SRC (x
)) == LABEL_REF
)
4643 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4644 The hard function value register is used only once, to copy to
4645 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
4646 Ensure we invalidate the destination register. On the 80386 no
4647 other code would invalidate it since it is a fixed_reg.
4648 We need not check the return of apply_change_group; see canon_reg. */
4650 else if (GET_CODE (SET_SRC (x
)) == CALL
)
4652 canon_reg (SET_SRC (x
), insn
);
4653 apply_change_group ();
4654 fold_rtx (SET_SRC (x
), insn
);
4655 invalidate (SET_DEST (x
), VOIDmode
);
4660 else if (GET_CODE (x
) == PARALLEL
)
4662 int lim
= XVECLEN (x
, 0);
4664 sets
= alloca (lim
* sizeof (struct set
));
4666 /* Find all regs explicitly clobbered in this insn,
4667 and ensure they are not replaced with any other regs
4668 elsewhere in this insn.
4669 When a reg that is clobbered is also used for input,
4670 we should presume that that is for a reason,
4671 and we should not substitute some other register
4672 which is not supposed to be clobbered.
4673 Therefore, this loop cannot be merged into the one below
4674 because a CALL may precede a CLOBBER and refer to the
4675 value clobbered. We must not let a canonicalization do
4676 anything in that case. */
4677 for (i
= 0; i
< lim
; i
++)
4679 rtx y
= XVECEXP (x
, 0, i
);
4680 if (GET_CODE (y
) == CLOBBER
)
4682 rtx clobbered
= XEXP (y
, 0);
4684 if (REG_P (clobbered
)
4685 || GET_CODE (clobbered
) == SUBREG
)
4686 invalidate (clobbered
, VOIDmode
);
4687 else if (GET_CODE (clobbered
) == STRICT_LOW_PART
4688 || GET_CODE (clobbered
) == ZERO_EXTRACT
)
4689 invalidate (XEXP (clobbered
, 0), GET_MODE (clobbered
));
4693 for (i
= 0; i
< lim
; i
++)
4695 rtx y
= XVECEXP (x
, 0, i
);
4696 if (GET_CODE (y
) == SET
)
4698 /* As above, we ignore unconditional jumps and call-insns and
4699 ignore the result of apply_change_group. */
4700 if (GET_CODE (SET_SRC (y
)) == CALL
)
4702 canon_reg (SET_SRC (y
), insn
);
4703 apply_change_group ();
4704 fold_rtx (SET_SRC (y
), insn
);
4705 invalidate (SET_DEST (y
), VOIDmode
);
4707 else if (SET_DEST (y
) == pc_rtx
4708 && GET_CODE (SET_SRC (y
)) == LABEL_REF
)
4711 sets
[n_sets
++].rtl
= y
;
4713 else if (GET_CODE (y
) == CLOBBER
)
4715 /* If we clobber memory, canon the address.
4716 This does nothing when a register is clobbered
4717 because we have already invalidated the reg. */
4718 if (MEM_P (XEXP (y
, 0)))
4719 canon_reg (XEXP (y
, 0), NULL_RTX
);
4721 else if (GET_CODE (y
) == USE
4722 && ! (REG_P (XEXP (y
, 0))
4723 && REGNO (XEXP (y
, 0)) < FIRST_PSEUDO_REGISTER
))
4724 canon_reg (y
, NULL_RTX
);
4725 else if (GET_CODE (y
) == CALL
)
4727 /* The result of apply_change_group can be ignored; see
4729 canon_reg (y
, insn
);
4730 apply_change_group ();
4735 else if (GET_CODE (x
) == CLOBBER
)
4737 if (MEM_P (XEXP (x
, 0)))
4738 canon_reg (XEXP (x
, 0), NULL_RTX
);
4741 /* Canonicalize a USE of a pseudo register or memory location. */
4742 else if (GET_CODE (x
) == USE
4743 && ! (REG_P (XEXP (x
, 0))
4744 && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
))
4745 canon_reg (XEXP (x
, 0), NULL_RTX
);
4746 else if (GET_CODE (x
) == CALL
)
4748 /* The result of apply_change_group can be ignored; see canon_reg. */
4749 canon_reg (x
, insn
);
4750 apply_change_group ();
4754 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
4755 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
4756 is handled specially for this case, and if it isn't set, then there will
4757 be no equivalence for the destination. */
4758 if (n_sets
== 1 && REG_NOTES (insn
) != 0
4759 && (tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
)) != 0
4760 && (! rtx_equal_p (XEXP (tem
, 0), SET_SRC (sets
[0].rtl
))
4761 || GET_CODE (SET_DEST (sets
[0].rtl
)) == STRICT_LOW_PART
))
4763 src_eqv
= fold_rtx (canon_reg (XEXP (tem
, 0), NULL_RTX
), insn
);
4764 XEXP (tem
, 0) = src_eqv
;
4767 /* Canonicalize sources and addresses of destinations.
4768 We do this in a separate pass to avoid problems when a MATCH_DUP is
4769 present in the insn pattern. In that case, we want to ensure that
4770 we don't break the duplicate nature of the pattern. So we will replace
4771 both operands at the same time. Otherwise, we would fail to find an
4772 equivalent substitution in the loop calling validate_change below.
4774 We used to suppress canonicalization of DEST if it appears in SRC,
4775 but we don't do this any more. */
4777 for (i
= 0; i
< n_sets
; i
++)
4779 rtx dest
= SET_DEST (sets
[i
].rtl
);
4780 rtx src
= SET_SRC (sets
[i
].rtl
);
4781 rtx
new = canon_reg (src
, insn
);
4784 sets
[i
].orig_src
= src
;
4785 if ((REG_P (new) && REG_P (src
)
4786 && ((REGNO (new) < FIRST_PSEUDO_REGISTER
)
4787 != (REGNO (src
) < FIRST_PSEUDO_REGISTER
)))
4788 || (insn_code
= recog_memoized (insn
)) < 0
4789 || insn_data
[insn_code
].n_dups
> 0)
4790 validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new, 1);
4792 SET_SRC (sets
[i
].rtl
) = new;
4794 if (GET_CODE (dest
) == ZERO_EXTRACT
|| GET_CODE (dest
) == SIGN_EXTRACT
)
4796 validate_change (insn
, &XEXP (dest
, 1),
4797 canon_reg (XEXP (dest
, 1), insn
), 1);
4798 validate_change (insn
, &XEXP (dest
, 2),
4799 canon_reg (XEXP (dest
, 2), insn
), 1);
4802 while (GET_CODE (dest
) == SUBREG
|| GET_CODE (dest
) == STRICT_LOW_PART
4803 || GET_CODE (dest
) == ZERO_EXTRACT
4804 || GET_CODE (dest
) == SIGN_EXTRACT
)
4805 dest
= XEXP (dest
, 0);
4808 canon_reg (dest
, insn
);
4811 /* Now that we have done all the replacements, we can apply the change
4812 group and see if they all work. Note that this will cause some
4813 canonicalizations that would have worked individually not to be applied
4814 because some other canonicalization didn't work, but this should not
4817 The result of apply_change_group can be ignored; see canon_reg. */
4819 apply_change_group ();
4821 /* Set sets[i].src_elt to the class each source belongs to.
4822 Detect assignments from or to volatile things
4823 and set set[i] to zero so they will be ignored
4824 in the rest of this function.
4826 Nothing in this loop changes the hash table or the register chains. */
4828 for (i
= 0; i
< n_sets
; i
++)
4832 struct table_elt
*elt
= 0, *p
;
4833 enum machine_mode mode
;
4836 rtx src_related
= 0;
4837 struct table_elt
*src_const_elt
= 0;
4838 int src_cost
= MAX_COST
;
4839 int src_eqv_cost
= MAX_COST
;
4840 int src_folded_cost
= MAX_COST
;
4841 int src_related_cost
= MAX_COST
;
4842 int src_elt_cost
= MAX_COST
;
4843 int src_regcost
= MAX_COST
;
4844 int src_eqv_regcost
= MAX_COST
;
4845 int src_folded_regcost
= MAX_COST
;
4846 int src_related_regcost
= MAX_COST
;
4847 int src_elt_regcost
= MAX_COST
;
4848 /* Set nonzero if we need to call force_const_mem on with the
4849 contents of src_folded before using it. */
4850 int src_folded_force_flag
= 0;
4852 dest
= SET_DEST (sets
[i
].rtl
);
4853 src
= SET_SRC (sets
[i
].rtl
);
4855 /* If SRC is a constant that has no machine mode,
4856 hash it with the destination's machine mode.
4857 This way we can keep different modes separate. */
4859 mode
= GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
4860 sets
[i
].mode
= mode
;
4864 enum machine_mode eqvmode
= mode
;
4865 if (GET_CODE (dest
) == STRICT_LOW_PART
)
4866 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
4868 hash_arg_in_memory
= 0;
4869 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
4871 /* Find the equivalence class for the equivalent expression. */
4874 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, eqvmode
);
4876 src_eqv_volatile
= do_not_record
;
4877 src_eqv_in_memory
= hash_arg_in_memory
;
4880 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
4881 value of the INNER register, not the destination. So it is not
4882 a valid substitution for the source. But save it for later. */
4883 if (GET_CODE (dest
) == STRICT_LOW_PART
)
4886 src_eqv_here
= src_eqv
;
4888 /* Simplify and foldable subexpressions in SRC. Then get the fully-
4889 simplified result, which may not necessarily be valid. */
4890 src_folded
= fold_rtx (src
, insn
);
4893 /* ??? This caused bad code to be generated for the m68k port with -O2.
4894 Suppose src is (CONST_INT -1), and that after truncation src_folded
4895 is (CONST_INT 3). Suppose src_folded is then used for src_const.
4896 At the end we will add src and src_const to the same equivalence
4897 class. We now have 3 and -1 on the same equivalence class. This
4898 causes later instructions to be mis-optimized. */
4899 /* If storing a constant in a bitfield, pre-truncate the constant
4900 so we will be able to record it later. */
4901 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
4902 || GET_CODE (SET_DEST (sets
[i
].rtl
)) == SIGN_EXTRACT
)
4904 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
4906 if (GET_CODE (src
) == CONST_INT
4907 && GET_CODE (width
) == CONST_INT
4908 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
4909 && (INTVAL (src
) & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
4911 = GEN_INT (INTVAL (src
) & (((HOST_WIDE_INT
) 1
4912 << INTVAL (width
)) - 1));
4916 /* Compute SRC's hash code, and also notice if it
4917 should not be recorded at all. In that case,
4918 prevent any further processing of this assignment. */
4920 hash_arg_in_memory
= 0;
4923 sets
[i
].src_hash
= HASH (src
, mode
);
4924 sets
[i
].src_volatile
= do_not_record
;
4925 sets
[i
].src_in_memory
= hash_arg_in_memory
;
4927 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
4928 a pseudo, do not record SRC. Using SRC as a replacement for
4929 anything else will be incorrect in that situation. Note that
4930 this usually occurs only for stack slots, in which case all the
4931 RTL would be referring to SRC, so we don't lose any optimization
4932 opportunities by not having SRC in the hash table. */
4935 && find_reg_note (insn
, REG_EQUIV
, NULL_RTX
) != 0
4937 && REGNO (dest
) >= FIRST_PSEUDO_REGISTER
)
4938 sets
[i
].src_volatile
= 1;
4941 /* It is no longer clear why we used to do this, but it doesn't
4942 appear to still be needed. So let's try without it since this
4943 code hurts cse'ing widened ops. */
4944 /* If source is a paradoxical subreg (such as QI treated as an SI),
4945 treat it as volatile. It may do the work of an SI in one context
4946 where the extra bits are not being used, but cannot replace an SI
4948 if (GET_CODE (src
) == SUBREG
4949 && (GET_MODE_SIZE (GET_MODE (src
))
4950 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))))
4951 sets
[i
].src_volatile
= 1;
4954 /* Locate all possible equivalent forms for SRC. Try to replace
4955 SRC in the insn with each cheaper equivalent.
4957 We have the following types of equivalents: SRC itself, a folded
4958 version, a value given in a REG_EQUAL note, or a value related
4961 Each of these equivalents may be part of an additional class
4962 of equivalents (if more than one is in the table, they must be in
4963 the same class; we check for this).
4965 If the source is volatile, we don't do any table lookups.
4967 We note any constant equivalent for possible later use in a
4970 if (!sets
[i
].src_volatile
)
4971 elt
= lookup (src
, sets
[i
].src_hash
, mode
);
4973 sets
[i
].src_elt
= elt
;
4975 if (elt
&& src_eqv_here
&& src_eqv_elt
)
4977 if (elt
->first_same_value
!= src_eqv_elt
->first_same_value
)
4979 /* The REG_EQUAL is indicating that two formerly distinct
4980 classes are now equivalent. So merge them. */
4981 merge_equiv_classes (elt
, src_eqv_elt
);
4982 src_eqv_hash
= HASH (src_eqv
, elt
->mode
);
4983 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, elt
->mode
);
4989 else if (src_eqv_elt
)
4992 /* Try to find a constant somewhere and record it in `src_const'.
4993 Record its table element, if any, in `src_const_elt'. Look in
4994 any known equivalences first. (If the constant is not in the
4995 table, also set `sets[i].src_const_hash'). */
4997 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
5001 src_const_elt
= elt
;
5006 && (CONSTANT_P (src_folded
)
5007 /* Consider (minus (label_ref L1) (label_ref L2)) as
5008 "constant" here so we will record it. This allows us
5009 to fold switch statements when an ADDR_DIFF_VEC is used. */
5010 || (GET_CODE (src_folded
) == MINUS
5011 && GET_CODE (XEXP (src_folded
, 0)) == LABEL_REF
5012 && GET_CODE (XEXP (src_folded
, 1)) == LABEL_REF
)))
5013 src_const
= src_folded
, src_const_elt
= elt
;
5014 else if (src_const
== 0 && src_eqv_here
&& CONSTANT_P (src_eqv_here
))
5015 src_const
= src_eqv_here
, src_const_elt
= src_eqv_elt
;
5017 /* If we don't know if the constant is in the table, get its
5018 hash code and look it up. */
5019 if (src_const
&& src_const_elt
== 0)
5021 sets
[i
].src_const_hash
= HASH (src_const
, mode
);
5022 src_const_elt
= lookup (src_const
, sets
[i
].src_const_hash
, mode
);
5025 sets
[i
].src_const
= src_const
;
5026 sets
[i
].src_const_elt
= src_const_elt
;
5028 /* If the constant and our source are both in the table, mark them as
5029 equivalent. Otherwise, if a constant is in the table but the source
5030 isn't, set ELT to it. */
5031 if (src_const_elt
&& elt
5032 && src_const_elt
->first_same_value
!= elt
->first_same_value
)
5033 merge_equiv_classes (elt
, src_const_elt
);
5034 else if (src_const_elt
&& elt
== 0)
5035 elt
= src_const_elt
;
5037 /* See if there is a register linearly related to a constant
5038 equivalent of SRC. */
5040 && (GET_CODE (src_const
) == CONST
5041 || (src_const_elt
&& src_const_elt
->related_value
!= 0)))
5043 src_related
= use_related_value (src_const
, src_const_elt
);
5046 struct table_elt
*src_related_elt
5047 = lookup (src_related
, HASH (src_related
, mode
), mode
);
5048 if (src_related_elt
&& elt
)
5050 if (elt
->first_same_value
5051 != src_related_elt
->first_same_value
)
5052 /* This can occur when we previously saw a CONST
5053 involving a SYMBOL_REF and then see the SYMBOL_REF
5054 twice. Merge the involved classes. */
5055 merge_equiv_classes (elt
, src_related_elt
);
5058 src_related_elt
= 0;
5060 else if (src_related_elt
&& elt
== 0)
5061 elt
= src_related_elt
;
5065 /* See if we have a CONST_INT that is already in a register in a
5068 if (src_const
&& src_related
== 0 && GET_CODE (src_const
) == CONST_INT
5069 && GET_MODE_CLASS (mode
) == MODE_INT
5070 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
)
5072 enum machine_mode wider_mode
;
5074 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
5075 GET_MODE_BITSIZE (wider_mode
) <= BITS_PER_WORD
5076 && src_related
== 0;
5077 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
5079 struct table_elt
*const_elt
5080 = lookup (src_const
, HASH (src_const
, wider_mode
), wider_mode
);
5085 for (const_elt
= const_elt
->first_same_value
;
5086 const_elt
; const_elt
= const_elt
->next_same_value
)
5087 if (REG_P (const_elt
->exp
))
5089 src_related
= gen_lowpart (mode
,
5096 /* Another possibility is that we have an AND with a constant in
5097 a mode narrower than a word. If so, it might have been generated
5098 as part of an "if" which would narrow the AND. If we already
5099 have done the AND in a wider mode, we can use a SUBREG of that
5102 if (flag_expensive_optimizations
&& ! src_related
5103 && GET_CODE (src
) == AND
&& GET_CODE (XEXP (src
, 1)) == CONST_INT
5104 && GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
5106 enum machine_mode tmode
;
5107 rtx new_and
= gen_rtx_AND (VOIDmode
, NULL_RTX
, XEXP (src
, 1));
5109 for (tmode
= GET_MODE_WIDER_MODE (mode
);
5110 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
5111 tmode
= GET_MODE_WIDER_MODE (tmode
))
5113 rtx inner
= gen_lowpart (tmode
, XEXP (src
, 0));
5114 struct table_elt
*larger_elt
;
5118 PUT_MODE (new_and
, tmode
);
5119 XEXP (new_and
, 0) = inner
;
5120 larger_elt
= lookup (new_and
, HASH (new_and
, tmode
), tmode
);
5121 if (larger_elt
== 0)
5124 for (larger_elt
= larger_elt
->first_same_value
;
5125 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
5126 if (REG_P (larger_elt
->exp
))
5129 = gen_lowpart (mode
, larger_elt
->exp
);
5139 #ifdef LOAD_EXTEND_OP
5140 /* See if a MEM has already been loaded with a widening operation;
5141 if it has, we can use a subreg of that. Many CISC machines
5142 also have such operations, but this is only likely to be
5143 beneficial on these machines. */
5145 if (flag_expensive_optimizations
&& src_related
== 0
5146 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
5147 && GET_MODE_CLASS (mode
) == MODE_INT
5148 && MEM_P (src
) && ! do_not_record
5149 && LOAD_EXTEND_OP (mode
) != UNKNOWN
)
5151 struct rtx_def memory_extend_buf
;
5152 rtx memory_extend_rtx
= &memory_extend_buf
;
5153 enum machine_mode tmode
;
5155 /* Set what we are trying to extend and the operation it might
5156 have been extended with. */
5157 memset (memory_extend_rtx
, 0, sizeof(*memory_extend_rtx
));
5158 PUT_CODE (memory_extend_rtx
, LOAD_EXTEND_OP (mode
));
5159 XEXP (memory_extend_rtx
, 0) = src
;
5161 for (tmode
= GET_MODE_WIDER_MODE (mode
);
5162 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
5163 tmode
= GET_MODE_WIDER_MODE (tmode
))
5165 struct table_elt
*larger_elt
;
5167 PUT_MODE (memory_extend_rtx
, tmode
);
5168 larger_elt
= lookup (memory_extend_rtx
,
5169 HASH (memory_extend_rtx
, tmode
), tmode
);
5170 if (larger_elt
== 0)
5173 for (larger_elt
= larger_elt
->first_same_value
;
5174 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
5175 if (REG_P (larger_elt
->exp
))
5177 src_related
= gen_lowpart (mode
,
5186 #endif /* LOAD_EXTEND_OP */
5188 if (src
== src_folded
)
5191 /* At this point, ELT, if nonzero, points to a class of expressions
5192 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
5193 and SRC_RELATED, if nonzero, each contain additional equivalent
5194 expressions. Prune these latter expressions by deleting expressions
5195 already in the equivalence class.
5197 Check for an equivalent identical to the destination. If found,
5198 this is the preferred equivalent since it will likely lead to
5199 elimination of the insn. Indicate this by placing it in
5203 elt
= elt
->first_same_value
;
5204 for (p
= elt
; p
; p
= p
->next_same_value
)
5206 enum rtx_code code
= GET_CODE (p
->exp
);
5208 /* If the expression is not valid, ignore it. Then we do not
5209 have to check for validity below. In most cases, we can use
5210 `rtx_equal_p', since canonicalization has already been done. */
5211 if (code
!= REG
&& ! exp_equiv_p (p
->exp
, p
->exp
, 1, false))
5214 /* Also skip paradoxical subregs, unless that's what we're
5217 && (GET_MODE_SIZE (GET_MODE (p
->exp
))
5218 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p
->exp
))))
5220 && GET_CODE (src
) == SUBREG
5221 && GET_MODE (src
) == GET_MODE (p
->exp
)
5222 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))
5223 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p
->exp
))))))
5226 if (src
&& GET_CODE (src
) == code
&& rtx_equal_p (src
, p
->exp
))
5228 else if (src_folded
&& GET_CODE (src_folded
) == code
5229 && rtx_equal_p (src_folded
, p
->exp
))
5231 else if (src_eqv_here
&& GET_CODE (src_eqv_here
) == code
5232 && rtx_equal_p (src_eqv_here
, p
->exp
))
5234 else if (src_related
&& GET_CODE (src_related
) == code
5235 && rtx_equal_p (src_related
, p
->exp
))
5238 /* This is the same as the destination of the insns, we want
5239 to prefer it. Copy it to src_related. The code below will
5240 then give it a negative cost. */
5241 if (GET_CODE (dest
) == code
&& rtx_equal_p (p
->exp
, dest
))
5245 /* Find the cheapest valid equivalent, trying all the available
5246 possibilities. Prefer items not in the hash table to ones
5247 that are when they are equal cost. Note that we can never
5248 worsen an insn as the current contents will also succeed.
5249 If we find an equivalent identical to the destination, use it as best,
5250 since this insn will probably be eliminated in that case. */
5253 if (rtx_equal_p (src
, dest
))
5254 src_cost
= src_regcost
= -1;
5257 src_cost
= COST (src
);
5258 src_regcost
= approx_reg_cost (src
);
5264 if (rtx_equal_p (src_eqv_here
, dest
))
5265 src_eqv_cost
= src_eqv_regcost
= -1;
5268 src_eqv_cost
= COST (src_eqv_here
);
5269 src_eqv_regcost
= approx_reg_cost (src_eqv_here
);
5275 if (rtx_equal_p (src_folded
, dest
))
5276 src_folded_cost
= src_folded_regcost
= -1;
5279 src_folded_cost
= COST (src_folded
);
5280 src_folded_regcost
= approx_reg_cost (src_folded
);
5286 if (rtx_equal_p (src_related
, dest
))
5287 src_related_cost
= src_related_regcost
= -1;
5290 src_related_cost
= COST (src_related
);
5291 src_related_regcost
= approx_reg_cost (src_related
);
5295 /* If this was an indirect jump insn, a known label will really be
5296 cheaper even though it looks more expensive. */
5297 if (dest
== pc_rtx
&& src_const
&& GET_CODE (src_const
) == LABEL_REF
)
5298 src_folded
= src_const
, src_folded_cost
= src_folded_regcost
= -1;
5300 /* Terminate loop when replacement made. This must terminate since
5301 the current contents will be tested and will always be valid. */
5306 /* Skip invalid entries. */
5307 while (elt
&& !REG_P (elt
->exp
)
5308 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, false))
5309 elt
= elt
->next_same_value
;
5311 /* A paradoxical subreg would be bad here: it'll be the right
5312 size, but later may be adjusted so that the upper bits aren't
5313 what we want. So reject it. */
5315 && GET_CODE (elt
->exp
) == SUBREG
5316 && (GET_MODE_SIZE (GET_MODE (elt
->exp
))
5317 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt
->exp
))))
5318 /* It is okay, though, if the rtx we're trying to match
5319 will ignore any of the bits we can't predict. */
5321 && GET_CODE (src
) == SUBREG
5322 && GET_MODE (src
) == GET_MODE (elt
->exp
)
5323 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))
5324 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt
->exp
))))))
5326 elt
= elt
->next_same_value
;
5332 src_elt_cost
= elt
->cost
;
5333 src_elt_regcost
= elt
->regcost
;
5336 /* Find cheapest and skip it for the next time. For items
5337 of equal cost, use this order:
5338 src_folded, src, src_eqv, src_related and hash table entry. */
5340 && preferable (src_folded_cost
, src_folded_regcost
,
5341 src_cost
, src_regcost
) <= 0
5342 && preferable (src_folded_cost
, src_folded_regcost
,
5343 src_eqv_cost
, src_eqv_regcost
) <= 0
5344 && preferable (src_folded_cost
, src_folded_regcost
,
5345 src_related_cost
, src_related_regcost
) <= 0
5346 && preferable (src_folded_cost
, src_folded_regcost
,
5347 src_elt_cost
, src_elt_regcost
) <= 0)
5349 trial
= src_folded
, src_folded_cost
= MAX_COST
;
5350 if (src_folded_force_flag
)
5352 rtx forced
= force_const_mem (mode
, trial
);
5358 && preferable (src_cost
, src_regcost
,
5359 src_eqv_cost
, src_eqv_regcost
) <= 0
5360 && preferable (src_cost
, src_regcost
,
5361 src_related_cost
, src_related_regcost
) <= 0
5362 && preferable (src_cost
, src_regcost
,
5363 src_elt_cost
, src_elt_regcost
) <= 0)
5364 trial
= src
, src_cost
= MAX_COST
;
5365 else if (src_eqv_here
5366 && preferable (src_eqv_cost
, src_eqv_regcost
,
5367 src_related_cost
, src_related_regcost
) <= 0
5368 && preferable (src_eqv_cost
, src_eqv_regcost
,
5369 src_elt_cost
, src_elt_regcost
) <= 0)
5370 trial
= copy_rtx (src_eqv_here
), src_eqv_cost
= MAX_COST
;
5371 else if (src_related
5372 && preferable (src_related_cost
, src_related_regcost
,
5373 src_elt_cost
, src_elt_regcost
) <= 0)
5374 trial
= copy_rtx (src_related
), src_related_cost
= MAX_COST
;
5377 trial
= copy_rtx (elt
->exp
);
5378 elt
= elt
->next_same_value
;
5379 src_elt_cost
= MAX_COST
;
5382 /* We don't normally have an insn matching (set (pc) (pc)), so
5383 check for this separately here. We will delete such an
5386 For other cases such as a table jump or conditional jump
5387 where we know the ultimate target, go ahead and replace the
5388 operand. While that may not make a valid insn, we will
5389 reemit the jump below (and also insert any necessary
5391 if (n_sets
== 1 && dest
== pc_rtx
5393 || (GET_CODE (trial
) == LABEL_REF
5394 && ! condjump_p (insn
))))
5396 /* Don't substitute non-local labels, this confuses CFG. */
5397 if (GET_CODE (trial
) == LABEL_REF
5398 && LABEL_REF_NONLOCAL_P (trial
))
5401 SET_SRC (sets
[i
].rtl
) = trial
;
5402 cse_jumps_altered
= 1;
5406 /* Look for a substitution that makes a valid insn. */
5407 else if (validate_change (insn
, &SET_SRC (sets
[i
].rtl
), trial
, 0))
5409 rtx
new = canon_reg (SET_SRC (sets
[i
].rtl
), insn
);
5411 /* If we just made a substitution inside a libcall, then we
5412 need to make the same substitution in any notes attached
5413 to the RETVAL insn. */
5415 && (REG_P (sets
[i
].orig_src
)
5416 || GET_CODE (sets
[i
].orig_src
) == SUBREG
5417 || MEM_P (sets
[i
].orig_src
)))
5419 rtx note
= find_reg_equal_equiv_note (libcall_insn
);
5421 XEXP (note
, 0) = simplify_replace_rtx (XEXP (note
, 0),
5426 /* The result of apply_change_group can be ignored; see
5429 validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new, 1);
5430 apply_change_group ();
5434 /* If we previously found constant pool entries for
5435 constants and this is a constant, try making a
5436 pool entry. Put it in src_folded unless we already have done
5437 this since that is where it likely came from. */
5439 else if (constant_pool_entries_cost
5440 && CONSTANT_P (trial
)
5441 /* Reject cases that will abort in decode_rtx_const.
5442 On the alpha when simplifying a switch, we get
5443 (const (truncate (minus (label_ref) (label_ref)))). */
5444 && ! (GET_CODE (trial
) == CONST
5445 && GET_CODE (XEXP (trial
, 0)) == TRUNCATE
)
5446 /* Likewise on IA-64, except without the truncate. */
5447 && ! (GET_CODE (trial
) == CONST
5448 && GET_CODE (XEXP (trial
, 0)) == MINUS
5449 && GET_CODE (XEXP (XEXP (trial
, 0), 0)) == LABEL_REF
5450 && GET_CODE (XEXP (XEXP (trial
, 0), 1)) == LABEL_REF
)
5452 || (!MEM_P (src_folded
)
5453 && ! src_folded_force_flag
))
5454 && GET_MODE_CLASS (mode
) != MODE_CC
5455 && mode
!= VOIDmode
)
5457 src_folded_force_flag
= 1;
5459 src_folded_cost
= constant_pool_entries_cost
;
5460 src_folded_regcost
= constant_pool_entries_regcost
;
5464 src
= SET_SRC (sets
[i
].rtl
);
5466 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5467 However, there is an important exception: If both are registers
5468 that are not the head of their equivalence class, replace SET_SRC
5469 with the head of the class. If we do not do this, we will have
5470 both registers live over a portion of the basic block. This way,
5471 their lifetimes will likely abut instead of overlapping. */
5473 && REGNO_QTY_VALID_P (REGNO (dest
)))
5475 int dest_q
= REG_QTY (REGNO (dest
));
5476 struct qty_table_elem
*dest_ent
= &qty_table
[dest_q
];
5478 if (dest_ent
->mode
== GET_MODE (dest
)
5479 && dest_ent
->first_reg
!= REGNO (dest
)
5480 && REG_P (src
) && REGNO (src
) == REGNO (dest
)
5481 /* Don't do this if the original insn had a hard reg as
5482 SET_SRC or SET_DEST. */
5483 && (!REG_P (sets
[i
].src
)
5484 || REGNO (sets
[i
].src
) >= FIRST_PSEUDO_REGISTER
)
5485 && (!REG_P (dest
) || REGNO (dest
) >= FIRST_PSEUDO_REGISTER
))
5486 /* We can't call canon_reg here because it won't do anything if
5487 SRC is a hard register. */
5489 int src_q
= REG_QTY (REGNO (src
));
5490 struct qty_table_elem
*src_ent
= &qty_table
[src_q
];
5491 int first
= src_ent
->first_reg
;
5493 = (first
>= FIRST_PSEUDO_REGISTER
5494 ? regno_reg_rtx
[first
] : gen_rtx_REG (GET_MODE (src
), first
));
5496 /* We must use validate-change even for this, because this
5497 might be a special no-op instruction, suitable only to
5499 if (validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new_src
, 0))
5502 /* If we had a constant that is cheaper than what we are now
5503 setting SRC to, use that constant. We ignored it when we
5504 thought we could make this into a no-op. */
5505 if (src_const
&& COST (src_const
) < COST (src
)
5506 && validate_change (insn
, &SET_SRC (sets
[i
].rtl
),
5513 /* If we made a change, recompute SRC values. */
5514 if (src
!= sets
[i
].src
)
5518 hash_arg_in_memory
= 0;
5520 sets
[i
].src_hash
= HASH (src
, mode
);
5521 sets
[i
].src_volatile
= do_not_record
;
5522 sets
[i
].src_in_memory
= hash_arg_in_memory
;
5523 sets
[i
].src_elt
= lookup (src
, sets
[i
].src_hash
, mode
);
5526 /* If this is a single SET, we are setting a register, and we have an
5527 equivalent constant, we want to add a REG_NOTE. We don't want
5528 to write a REG_EQUAL note for a constant pseudo since verifying that
5529 that pseudo hasn't been eliminated is a pain. Such a note also
5530 won't help anything.
5532 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5533 which can be created for a reference to a compile time computable
5534 entry in a jump table. */
5536 if (n_sets
== 1 && src_const
&& REG_P (dest
)
5537 && !REG_P (src_const
)
5538 && ! (GET_CODE (src_const
) == CONST
5539 && GET_CODE (XEXP (src_const
, 0)) == MINUS
5540 && GET_CODE (XEXP (XEXP (src_const
, 0), 0)) == LABEL_REF
5541 && GET_CODE (XEXP (XEXP (src_const
, 0), 1)) == LABEL_REF
))
5543 /* We only want a REG_EQUAL note if src_const != src. */
5544 if (! rtx_equal_p (src
, src_const
))
5546 /* Make sure that the rtx is not shared. */
5547 src_const
= copy_rtx (src_const
);
5549 /* Record the actual constant value in a REG_EQUAL note,
5550 making a new one if one does not already exist. */
5551 set_unique_reg_note (insn
, REG_EQUAL
, src_const
);
5555 /* Now deal with the destination. */
5558 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
5559 to the MEM or REG within it. */
5560 while (GET_CODE (dest
) == SIGN_EXTRACT
5561 || GET_CODE (dest
) == ZERO_EXTRACT
5562 || GET_CODE (dest
) == SUBREG
5563 || GET_CODE (dest
) == STRICT_LOW_PART
)
5564 dest
= XEXP (dest
, 0);
5566 sets
[i
].inner_dest
= dest
;
5570 #ifdef PUSH_ROUNDING
5571 /* Stack pushes invalidate the stack pointer. */
5572 rtx addr
= XEXP (dest
, 0);
5573 if (GET_RTX_CLASS (GET_CODE (addr
)) == RTX_AUTOINC
5574 && XEXP (addr
, 0) == stack_pointer_rtx
)
5575 invalidate (stack_pointer_rtx
, Pmode
);
5577 dest
= fold_rtx (dest
, insn
);
5580 /* Compute the hash code of the destination now,
5581 before the effects of this instruction are recorded,
5582 since the register values used in the address computation
5583 are those before this instruction. */
5584 sets
[i
].dest_hash
= HASH (dest
, mode
);
5586 /* Don't enter a bit-field in the hash table
5587 because the value in it after the store
5588 may not equal what was stored, due to truncation. */
5590 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
5591 || GET_CODE (SET_DEST (sets
[i
].rtl
)) == SIGN_EXTRACT
)
5593 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
5595 if (src_const
!= 0 && GET_CODE (src_const
) == CONST_INT
5596 && GET_CODE (width
) == CONST_INT
5597 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
5598 && ! (INTVAL (src_const
)
5599 & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
5600 /* Exception: if the value is constant,
5601 and it won't be truncated, record it. */
5605 /* This is chosen so that the destination will be invalidated
5606 but no new value will be recorded.
5607 We must invalidate because sometimes constant
5608 values can be recorded for bitfields. */
5609 sets
[i
].src_elt
= 0;
5610 sets
[i
].src_volatile
= 1;
5616 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5618 else if (n_sets
== 1 && dest
== pc_rtx
&& src
== pc_rtx
)
5620 /* One less use of the label this insn used to jump to. */
5622 cse_jumps_altered
= 1;
5623 /* No more processing for this set. */
5627 /* If this SET is now setting PC to a label, we know it used to
5628 be a conditional or computed branch. */
5629 else if (dest
== pc_rtx
&& GET_CODE (src
) == LABEL_REF
5630 && !LABEL_REF_NONLOCAL_P (src
))
5632 /* Now emit a BARRIER after the unconditional jump. */
5633 if (NEXT_INSN (insn
) == 0
5634 || !BARRIER_P (NEXT_INSN (insn
)))
5635 emit_barrier_after (insn
);
5637 /* We reemit the jump in as many cases as possible just in
5638 case the form of an unconditional jump is significantly
5639 different than a computed jump or conditional jump.
5641 If this insn has multiple sets, then reemitting the
5642 jump is nontrivial. So instead we just force rerecognition
5643 and hope for the best. */
5648 new = emit_jump_insn_after (gen_jump (XEXP (src
, 0)), insn
);
5649 JUMP_LABEL (new) = XEXP (src
, 0);
5650 LABEL_NUSES (XEXP (src
, 0))++;
5652 /* Make sure to copy over REG_NON_LOCAL_GOTO. */
5653 note
= find_reg_note (insn
, REG_NON_LOCAL_GOTO
, 0);
5656 XEXP (note
, 1) = NULL_RTX
;
5657 REG_NOTES (new) = note
;
5663 /* Now emit a BARRIER after the unconditional jump. */
5664 if (NEXT_INSN (insn
) == 0
5665 || !BARRIER_P (NEXT_INSN (insn
)))
5666 emit_barrier_after (insn
);
5669 INSN_CODE (insn
) = -1;
5671 /* Do not bother deleting any unreachable code,
5672 let jump/flow do that. */
5674 cse_jumps_altered
= 1;
5678 /* If destination is volatile, invalidate it and then do no further
5679 processing for this assignment. */
5681 else if (do_not_record
)
5683 if (REG_P (dest
) || GET_CODE (dest
) == SUBREG
)
5684 invalidate (dest
, VOIDmode
);
5685 else if (MEM_P (dest
))
5687 /* Outgoing arguments for a libcall don't
5688 affect any recorded expressions. */
5689 if (! libcall_insn
|| insn
== libcall_insn
)
5690 invalidate (dest
, VOIDmode
);
5692 else if (GET_CODE (dest
) == STRICT_LOW_PART
5693 || GET_CODE (dest
) == ZERO_EXTRACT
)
5694 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
5698 if (sets
[i
].rtl
!= 0 && dest
!= SET_DEST (sets
[i
].rtl
))
5699 sets
[i
].dest_hash
= HASH (SET_DEST (sets
[i
].rtl
), mode
);
5702 /* If setting CC0, record what it was set to, or a constant, if it
5703 is equivalent to a constant. If it is being set to a floating-point
5704 value, make a COMPARE with the appropriate constant of 0. If we
5705 don't do this, later code can interpret this as a test against
5706 const0_rtx, which can cause problems if we try to put it into an
5707 insn as a floating-point operand. */
5708 if (dest
== cc0_rtx
)
5710 this_insn_cc0
= src_const
&& mode
!= VOIDmode
? src_const
: src
;
5711 this_insn_cc0_mode
= mode
;
5712 if (FLOAT_MODE_P (mode
))
5713 this_insn_cc0
= gen_rtx_COMPARE (VOIDmode
, this_insn_cc0
,
5719 /* Now enter all non-volatile source expressions in the hash table
5720 if they are not already present.
5721 Record their equivalence classes in src_elt.
5722 This way we can insert the corresponding destinations into
5723 the same classes even if the actual sources are no longer in them
5724 (having been invalidated). */
5726 if (src_eqv
&& src_eqv_elt
== 0 && sets
[0].rtl
!= 0 && ! src_eqv_volatile
5727 && ! rtx_equal_p (src_eqv
, SET_DEST (sets
[0].rtl
)))
5729 struct table_elt
*elt
;
5730 struct table_elt
*classp
= sets
[0].src_elt
;
5731 rtx dest
= SET_DEST (sets
[0].rtl
);
5732 enum machine_mode eqvmode
= GET_MODE (dest
);
5734 if (GET_CODE (dest
) == STRICT_LOW_PART
)
5736 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
5739 if (insert_regs (src_eqv
, classp
, 0))
5741 rehash_using_reg (src_eqv
);
5742 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
5744 elt
= insert (src_eqv
, classp
, src_eqv_hash
, eqvmode
);
5745 elt
->in_memory
= src_eqv_in_memory
;
5748 /* Check to see if src_eqv_elt is the same as a set source which
5749 does not yet have an elt, and if so set the elt of the set source
5751 for (i
= 0; i
< n_sets
; i
++)
5752 if (sets
[i
].rtl
&& sets
[i
].src_elt
== 0
5753 && rtx_equal_p (SET_SRC (sets
[i
].rtl
), src_eqv
))
5754 sets
[i
].src_elt
= src_eqv_elt
;
5757 for (i
= 0; i
< n_sets
; i
++)
5758 if (sets
[i
].rtl
&& ! sets
[i
].src_volatile
5759 && ! rtx_equal_p (SET_SRC (sets
[i
].rtl
), SET_DEST (sets
[i
].rtl
)))
5761 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == STRICT_LOW_PART
)
5763 /* REG_EQUAL in setting a STRICT_LOW_PART
5764 gives an equivalent for the entire destination register,
5765 not just for the subreg being stored in now.
5766 This is a more interesting equivalence, so we arrange later
5767 to treat the entire reg as the destination. */
5768 sets
[i
].src_elt
= src_eqv_elt
;
5769 sets
[i
].src_hash
= src_eqv_hash
;
5773 /* Insert source and constant equivalent into hash table, if not
5775 struct table_elt
*classp
= src_eqv_elt
;
5776 rtx src
= sets
[i
].src
;
5777 rtx dest
= SET_DEST (sets
[i
].rtl
);
5778 enum machine_mode mode
5779 = GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
5781 /* It's possible that we have a source value known to be
5782 constant but don't have a REG_EQUAL note on the insn.
5783 Lack of a note will mean src_eqv_elt will be NULL. This
5784 can happen where we've generated a SUBREG to access a
5785 CONST_INT that is already in a register in a wider mode.
5786 Ensure that the source expression is put in the proper
5789 classp
= sets
[i
].src_const_elt
;
5791 if (sets
[i
].src_elt
== 0)
5793 /* Don't put a hard register source into the table if this is
5794 the last insn of a libcall. In this case, we only need
5795 to put src_eqv_elt in src_elt. */
5796 if (! find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
5798 struct table_elt
*elt
;
5800 /* Note that these insert_regs calls cannot remove
5801 any of the src_elt's, because they would have failed to
5802 match if not still valid. */
5803 if (insert_regs (src
, classp
, 0))
5805 rehash_using_reg (src
);
5806 sets
[i
].src_hash
= HASH (src
, mode
);
5808 elt
= insert (src
, classp
, sets
[i
].src_hash
, mode
);
5809 elt
->in_memory
= sets
[i
].src_in_memory
;
5810 sets
[i
].src_elt
= classp
= elt
;
5813 sets
[i
].src_elt
= classp
;
5815 if (sets
[i
].src_const
&& sets
[i
].src_const_elt
== 0
5816 && src
!= sets
[i
].src_const
5817 && ! rtx_equal_p (sets
[i
].src_const
, src
))
5818 sets
[i
].src_elt
= insert (sets
[i
].src_const
, classp
,
5819 sets
[i
].src_const_hash
, mode
);
5822 else if (sets
[i
].src_elt
== 0)
5823 /* If we did not insert the source into the hash table (e.g., it was
5824 volatile), note the equivalence class for the REG_EQUAL value, if any,
5825 so that the destination goes into that class. */
5826 sets
[i
].src_elt
= src_eqv_elt
;
5828 invalidate_from_clobbers (x
);
5830 /* Some registers are invalidated by subroutine calls. Memory is
5831 invalidated by non-constant calls. */
5835 if (! CONST_OR_PURE_CALL_P (insn
))
5836 invalidate_memory ();
5837 invalidate_for_call ();
5840 /* Now invalidate everything set by this instruction.
5841 If a SUBREG or other funny destination is being set,
5842 sets[i].rtl is still nonzero, so here we invalidate the reg
5843 a part of which is being set. */
5845 for (i
= 0; i
< n_sets
; i
++)
5848 /* We can't use the inner dest, because the mode associated with
5849 a ZERO_EXTRACT is significant. */
5850 rtx dest
= SET_DEST (sets
[i
].rtl
);
5852 /* Needed for registers to remove the register from its
5853 previous quantity's chain.
5854 Needed for memory if this is a nonvarying address, unless
5855 we have just done an invalidate_memory that covers even those. */
5856 if (REG_P (dest
) || GET_CODE (dest
) == SUBREG
)
5857 invalidate (dest
, VOIDmode
);
5858 else if (MEM_P (dest
))
5860 /* Outgoing arguments for a libcall don't
5861 affect any recorded expressions. */
5862 if (! libcall_insn
|| insn
== libcall_insn
)
5863 invalidate (dest
, VOIDmode
);
5865 else if (GET_CODE (dest
) == STRICT_LOW_PART
5866 || GET_CODE (dest
) == ZERO_EXTRACT
)
5867 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
5870 /* A volatile ASM invalidates everything. */
5871 if (NONJUMP_INSN_P (insn
)
5872 && GET_CODE (PATTERN (insn
)) == ASM_OPERANDS
5873 && MEM_VOLATILE_P (PATTERN (insn
)))
5874 flush_hash_table ();
5876 /* Make sure registers mentioned in destinations
5877 are safe for use in an expression to be inserted.
5878 This removes from the hash table
5879 any invalid entry that refers to one of these registers.
5881 We don't care about the return value from mention_regs because
5882 we are going to hash the SET_DEST values unconditionally. */
5884 for (i
= 0; i
< n_sets
; i
++)
5888 rtx x
= SET_DEST (sets
[i
].rtl
);
5894 /* We used to rely on all references to a register becoming
5895 inaccessible when a register changes to a new quantity,
5896 since that changes the hash code. However, that is not
5897 safe, since after HASH_SIZE new quantities we get a
5898 hash 'collision' of a register with its own invalid
5899 entries. And since SUBREGs have been changed not to
5900 change their hash code with the hash code of the register,
5901 it wouldn't work any longer at all. So we have to check
5902 for any invalid references lying around now.
5903 This code is similar to the REG case in mention_regs,
5904 but it knows that reg_tick has been incremented, and
5905 it leaves reg_in_table as -1 . */
5906 unsigned int regno
= REGNO (x
);
5907 unsigned int endregno
5908 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
5909 : hard_regno_nregs
[regno
][GET_MODE (x
)]);
5912 for (i
= regno
; i
< endregno
; i
++)
5914 if (REG_IN_TABLE (i
) >= 0)
5916 remove_invalid_refs (i
);
5917 REG_IN_TABLE (i
) = -1;
5924 /* We may have just removed some of the src_elt's from the hash table.
5925 So replace each one with the current head of the same class. */
5927 for (i
= 0; i
< n_sets
; i
++)
5930 if (sets
[i
].src_elt
&& sets
[i
].src_elt
->first_same_value
== 0)
5931 /* If elt was removed, find current head of same class,
5932 or 0 if nothing remains of that class. */
5934 struct table_elt
*elt
= sets
[i
].src_elt
;
5936 while (elt
&& elt
->prev_same_value
)
5937 elt
= elt
->prev_same_value
;
5939 while (elt
&& elt
->first_same_value
== 0)
5940 elt
= elt
->next_same_value
;
5941 sets
[i
].src_elt
= elt
? elt
->first_same_value
: 0;
5945 /* Now insert the destinations into their equivalence classes. */
5947 for (i
= 0; i
< n_sets
; i
++)
5950 rtx dest
= SET_DEST (sets
[i
].rtl
);
5951 struct table_elt
*elt
;
5953 /* Don't record value if we are not supposed to risk allocating
5954 floating-point values in registers that might be wider than
5956 if ((flag_float_store
5958 && FLOAT_MODE_P (GET_MODE (dest
)))
5959 /* Don't record BLKmode values, because we don't know the
5960 size of it, and can't be sure that other BLKmode values
5961 have the same or smaller size. */
5962 || GET_MODE (dest
) == BLKmode
5963 /* Don't record values of destinations set inside a libcall block
5964 since we might delete the libcall. Things should have been set
5965 up so we won't want to reuse such a value, but we play it safe
5968 /* If we didn't put a REG_EQUAL value or a source into the hash
5969 table, there is no point is recording DEST. */
5970 || sets
[i
].src_elt
== 0
5971 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
5972 or SIGN_EXTEND, don't record DEST since it can cause
5973 some tracking to be wrong.
5975 ??? Think about this more later. */
5976 || (GET_CODE (dest
) == SUBREG
5977 && (GET_MODE_SIZE (GET_MODE (dest
))
5978 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))))
5979 && (GET_CODE (sets
[i
].src
) == SIGN_EXTEND
5980 || GET_CODE (sets
[i
].src
) == ZERO_EXTEND
)))
5983 /* STRICT_LOW_PART isn't part of the value BEING set,
5984 and neither is the SUBREG inside it.
5985 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
5986 if (GET_CODE (dest
) == STRICT_LOW_PART
)
5987 dest
= SUBREG_REG (XEXP (dest
, 0));
5989 if (REG_P (dest
) || GET_CODE (dest
) == SUBREG
)
5990 /* Registers must also be inserted into chains for quantities. */
5991 if (insert_regs (dest
, sets
[i
].src_elt
, 1))
5993 /* If `insert_regs' changes something, the hash code must be
5995 rehash_using_reg (dest
);
5996 sets
[i
].dest_hash
= HASH (dest
, GET_MODE (dest
));
5999 elt
= insert (dest
, sets
[i
].src_elt
,
6000 sets
[i
].dest_hash
, GET_MODE (dest
));
6002 elt
->in_memory
= (MEM_P (sets
[i
].inner_dest
)
6003 && !MEM_READONLY_P (sets
[i
].inner_dest
));
6005 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
6006 narrower than M2, and both M1 and M2 are the same number of words,
6007 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
6008 make that equivalence as well.
6010 However, BAR may have equivalences for which gen_lowpart
6011 will produce a simpler value than gen_lowpart applied to
6012 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
6013 BAR's equivalences. If we don't get a simplified form, make
6014 the SUBREG. It will not be used in an equivalence, but will
6015 cause two similar assignments to be detected.
6017 Note the loop below will find SUBREG_REG (DEST) since we have
6018 already entered SRC and DEST of the SET in the table. */
6020 if (GET_CODE (dest
) == SUBREG
6021 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))) - 1)
6023 == (GET_MODE_SIZE (GET_MODE (dest
)) - 1) / UNITS_PER_WORD
)
6024 && (GET_MODE_SIZE (GET_MODE (dest
))
6025 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))))
6026 && sets
[i
].src_elt
!= 0)
6028 enum machine_mode new_mode
= GET_MODE (SUBREG_REG (dest
));
6029 struct table_elt
*elt
, *classp
= 0;
6031 for (elt
= sets
[i
].src_elt
->first_same_value
; elt
;
6032 elt
= elt
->next_same_value
)
6036 struct table_elt
*src_elt
;
6039 /* Ignore invalid entries. */
6040 if (!REG_P (elt
->exp
)
6041 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, false))
6044 /* We may have already been playing subreg games. If the
6045 mode is already correct for the destination, use it. */
6046 if (GET_MODE (elt
->exp
) == new_mode
)
6050 /* Calculate big endian correction for the SUBREG_BYTE.
6051 We have already checked that M1 (GET_MODE (dest))
6052 is not narrower than M2 (new_mode). */
6053 if (BYTES_BIG_ENDIAN
)
6054 byte
= (GET_MODE_SIZE (GET_MODE (dest
))
6055 - GET_MODE_SIZE (new_mode
));
6057 new_src
= simplify_gen_subreg (new_mode
, elt
->exp
,
6058 GET_MODE (dest
), byte
);
6061 /* The call to simplify_gen_subreg fails if the value
6062 is VOIDmode, yet we can't do any simplification, e.g.
6063 for EXPR_LISTs denoting function call results.
6064 It is invalid to construct a SUBREG with a VOIDmode
6065 SUBREG_REG, hence a zero new_src means we can't do
6066 this substitution. */
6070 src_hash
= HASH (new_src
, new_mode
);
6071 src_elt
= lookup (new_src
, src_hash
, new_mode
);
6073 /* Put the new source in the hash table is if isn't
6077 if (insert_regs (new_src
, classp
, 0))
6079 rehash_using_reg (new_src
);
6080 src_hash
= HASH (new_src
, new_mode
);
6082 src_elt
= insert (new_src
, classp
, src_hash
, new_mode
);
6083 src_elt
->in_memory
= elt
->in_memory
;
6085 else if (classp
&& classp
!= src_elt
->first_same_value
)
6086 /* Show that two things that we've seen before are
6087 actually the same. */
6088 merge_equiv_classes (src_elt
, classp
);
6090 classp
= src_elt
->first_same_value
;
6091 /* Ignore invalid entries. */
6093 && !REG_P (classp
->exp
)
6094 && ! exp_equiv_p (classp
->exp
, classp
->exp
, 1, false))
6095 classp
= classp
->next_same_value
;
6100 /* Special handling for (set REG0 REG1) where REG0 is the
6101 "cheapest", cheaper than REG1. After cse, REG1 will probably not
6102 be used in the sequel, so (if easily done) change this insn to
6103 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
6104 that computed their value. Then REG1 will become a dead store
6105 and won't cloud the situation for later optimizations.
6107 Do not make this change if REG1 is a hard register, because it will
6108 then be used in the sequel and we may be changing a two-operand insn
6109 into a three-operand insn.
6111 Also do not do this if we are operating on a copy of INSN.
6113 Also don't do this if INSN ends a libcall; this would cause an unrelated
6114 register to be set in the middle of a libcall, and we then get bad code
6115 if the libcall is deleted. */
6117 if (n_sets
== 1 && sets
[0].rtl
&& REG_P (SET_DEST (sets
[0].rtl
))
6118 && NEXT_INSN (PREV_INSN (insn
)) == insn
6119 && REG_P (SET_SRC (sets
[0].rtl
))
6120 && REGNO (SET_SRC (sets
[0].rtl
)) >= FIRST_PSEUDO_REGISTER
6121 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets
[0].rtl
))))
6123 int src_q
= REG_QTY (REGNO (SET_SRC (sets
[0].rtl
)));
6124 struct qty_table_elem
*src_ent
= &qty_table
[src_q
];
6126 if ((src_ent
->first_reg
== REGNO (SET_DEST (sets
[0].rtl
)))
6127 && ! find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
6130 /* Scan for the previous nonnote insn, but stop at a basic
6134 prev
= PREV_INSN (prev
);
6136 while (prev
&& NOTE_P (prev
)
6137 && NOTE_LINE_NUMBER (prev
) != NOTE_INSN_BASIC_BLOCK
);
6139 /* Do not swap the registers around if the previous instruction
6140 attaches a REG_EQUIV note to REG1.
6142 ??? It's not entirely clear whether we can transfer a REG_EQUIV
6143 from the pseudo that originally shadowed an incoming argument
6144 to another register. Some uses of REG_EQUIV might rely on it
6145 being attached to REG1 rather than REG2.
6147 This section previously turned the REG_EQUIV into a REG_EQUAL
6148 note. We cannot do that because REG_EQUIV may provide an
6149 uninitialized stack slot when REG_PARM_STACK_SPACE is used. */
6151 if (prev
!= 0 && NONJUMP_INSN_P (prev
)
6152 && GET_CODE (PATTERN (prev
)) == SET
6153 && SET_DEST (PATTERN (prev
)) == SET_SRC (sets
[0].rtl
)
6154 && ! find_reg_note (prev
, REG_EQUIV
, NULL_RTX
))
6156 rtx dest
= SET_DEST (sets
[0].rtl
);
6157 rtx src
= SET_SRC (sets
[0].rtl
);
6160 validate_change (prev
, &SET_DEST (PATTERN (prev
)), dest
, 1);
6161 validate_change (insn
, &SET_DEST (sets
[0].rtl
), src
, 1);
6162 validate_change (insn
, &SET_SRC (sets
[0].rtl
), dest
, 1);
6163 apply_change_group ();
6165 /* If INSN has a REG_EQUAL note, and this note mentions
6166 REG0, then we must delete it, because the value in
6167 REG0 has changed. If the note's value is REG1, we must
6168 also delete it because that is now this insn's dest. */
6169 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
6171 && (reg_mentioned_p (dest
, XEXP (note
, 0))
6172 || rtx_equal_p (src
, XEXP (note
, 0))))
6173 remove_note (insn
, note
);
6178 /* If this is a conditional jump insn, record any known equivalences due to
6179 the condition being tested. */
6182 && n_sets
== 1 && GET_CODE (x
) == SET
6183 && GET_CODE (SET_SRC (x
)) == IF_THEN_ELSE
)
6184 record_jump_equiv (insn
, 0);
6187 /* If the previous insn set CC0 and this insn no longer references CC0,
6188 delete the previous insn. Here we use the fact that nothing expects CC0
6189 to be valid over an insn, which is true until the final pass. */
6190 if (prev_insn
&& NONJUMP_INSN_P (prev_insn
)
6191 && (tem
= single_set (prev_insn
)) != 0
6192 && SET_DEST (tem
) == cc0_rtx
6193 && ! reg_mentioned_p (cc0_rtx
, x
))
6194 delete_insn (prev_insn
);
6196 prev_insn_cc0
= this_insn_cc0
;
6197 prev_insn_cc0_mode
= this_insn_cc0_mode
;
6202 /* Remove from the hash table all expressions that reference memory. */
6205 invalidate_memory (void)
6208 struct table_elt
*p
, *next
;
6210 for (i
= 0; i
< HASH_SIZE
; i
++)
6211 for (p
= table
[i
]; p
; p
= next
)
6213 next
= p
->next_same_hash
;
6215 remove_from_table (p
, i
);
6219 /* If ADDR is an address that implicitly affects the stack pointer, return
6220 1 and update the register tables to show the effect. Else, return 0. */
6223 addr_affects_sp_p (rtx addr
)
6225 if (GET_RTX_CLASS (GET_CODE (addr
)) == RTX_AUTOINC
6226 && REG_P (XEXP (addr
, 0))
6227 && REGNO (XEXP (addr
, 0)) == STACK_POINTER_REGNUM
)
6229 if (REG_TICK (STACK_POINTER_REGNUM
) >= 0)
6231 REG_TICK (STACK_POINTER_REGNUM
)++;
6232 /* Is it possible to use a subreg of SP? */
6233 SUBREG_TICKED (STACK_POINTER_REGNUM
) = -1;
6236 /* This should be *very* rare. */
6237 if (TEST_HARD_REG_BIT (hard_regs_in_table
, STACK_POINTER_REGNUM
))
6238 invalidate (stack_pointer_rtx
, VOIDmode
);
6246 /* Perform invalidation on the basis of everything about an insn
6247 except for invalidating the actual places that are SET in it.
6248 This includes the places CLOBBERed, and anything that might
6249 alias with something that is SET or CLOBBERed.
6251 X is the pattern of the insn. */
6254 invalidate_from_clobbers (rtx x
)
6256 if (GET_CODE (x
) == CLOBBER
)
6258 rtx ref
= XEXP (x
, 0);
6261 if (REG_P (ref
) || GET_CODE (ref
) == SUBREG
6263 invalidate (ref
, VOIDmode
);
6264 else if (GET_CODE (ref
) == STRICT_LOW_PART
6265 || GET_CODE (ref
) == ZERO_EXTRACT
)
6266 invalidate (XEXP (ref
, 0), GET_MODE (ref
));
6269 else if (GET_CODE (x
) == PARALLEL
)
6272 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
6274 rtx y
= XVECEXP (x
, 0, i
);
6275 if (GET_CODE (y
) == CLOBBER
)
6277 rtx ref
= XEXP (y
, 0);
6278 if (REG_P (ref
) || GET_CODE (ref
) == SUBREG
6280 invalidate (ref
, VOIDmode
);
6281 else if (GET_CODE (ref
) == STRICT_LOW_PART
6282 || GET_CODE (ref
) == ZERO_EXTRACT
)
6283 invalidate (XEXP (ref
, 0), GET_MODE (ref
));
6289 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
6290 and replace any registers in them with either an equivalent constant
6291 or the canonical form of the register. If we are inside an address,
6292 only do this if the address remains valid.
6294 OBJECT is 0 except when within a MEM in which case it is the MEM.
6296 Return the replacement for X. */
6299 cse_process_notes (rtx x
, rtx object
)
6301 enum rtx_code code
= GET_CODE (x
);
6302 const char *fmt
= GET_RTX_FORMAT (code
);
6319 validate_change (x
, &XEXP (x
, 0),
6320 cse_process_notes (XEXP (x
, 0), x
), 0);
6325 if (REG_NOTE_KIND (x
) == REG_EQUAL
)
6326 XEXP (x
, 0) = cse_process_notes (XEXP (x
, 0), NULL_RTX
);
6328 XEXP (x
, 1) = cse_process_notes (XEXP (x
, 1), NULL_RTX
);
6335 rtx
new = cse_process_notes (XEXP (x
, 0), object
);
6336 /* We don't substitute VOIDmode constants into these rtx,
6337 since they would impede folding. */
6338 if (GET_MODE (new) != VOIDmode
)
6339 validate_change (object
, &XEXP (x
, 0), new, 0);
6344 i
= REG_QTY (REGNO (x
));
6346 /* Return a constant or a constant register. */
6347 if (REGNO_QTY_VALID_P (REGNO (x
)))
6349 struct qty_table_elem
*ent
= &qty_table
[i
];
6351 if (ent
->const_rtx
!= NULL_RTX
6352 && (CONSTANT_P (ent
->const_rtx
)
6353 || REG_P (ent
->const_rtx
)))
6355 rtx
new = gen_lowpart (GET_MODE (x
), ent
->const_rtx
);
6361 /* Otherwise, canonicalize this register. */
6362 return canon_reg (x
, NULL_RTX
);
6368 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
6370 validate_change (object
, &XEXP (x
, i
),
6371 cse_process_notes (XEXP (x
, i
), object
), 0);
6376 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
6377 since they are done elsewhere. This function is called via note_stores. */
6380 invalidate_skipped_set (rtx dest
, rtx set
, void *data ATTRIBUTE_UNUSED
)
6382 enum rtx_code code
= GET_CODE (dest
);
6385 && ! addr_affects_sp_p (dest
) /* If this is not a stack push ... */
6386 /* There are times when an address can appear varying and be a PLUS
6387 during this scan when it would be a fixed address were we to know
6388 the proper equivalences. So invalidate all memory if there is
6389 a BLKmode or nonscalar memory reference or a reference to a
6390 variable address. */
6391 && (MEM_IN_STRUCT_P (dest
) || GET_MODE (dest
) == BLKmode
6392 || cse_rtx_varies_p (XEXP (dest
, 0), 0)))
6394 invalidate_memory ();
6398 if (GET_CODE (set
) == CLOBBER
6403 if (code
== STRICT_LOW_PART
|| code
== ZERO_EXTRACT
)
6404 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
6405 else if (code
== REG
|| code
== SUBREG
|| code
== MEM
)
6406 invalidate (dest
, VOIDmode
);
6409 /* Invalidate all insns from START up to the end of the function or the
6410 next label. This called when we wish to CSE around a block that is
6411 conditionally executed. */
6414 invalidate_skipped_block (rtx start
)
6418 for (insn
= start
; insn
&& !LABEL_P (insn
);
6419 insn
= NEXT_INSN (insn
))
6421 if (! INSN_P (insn
))
6426 if (! CONST_OR_PURE_CALL_P (insn
))
6427 invalidate_memory ();
6428 invalidate_for_call ();
6431 invalidate_from_clobbers (PATTERN (insn
));
6432 note_stores (PATTERN (insn
), invalidate_skipped_set
, NULL
);
6436 /* Find the end of INSN's basic block and return its range,
6437 the total number of SETs in all the insns of the block, the last insn of the
6438 block, and the branch path.
6440 The branch path indicates which branches should be followed. If a nonzero
6441 path size is specified, the block should be rescanned and a different set
6442 of branches will be taken. The branch path is only used if
6443 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is nonzero.
6445 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
6446 used to describe the block. It is filled in with the information about
6447 the current block. The incoming structure's branch path, if any, is used
6448 to construct the output branch path. */
6451 cse_end_of_basic_block (rtx insn
, struct cse_basic_block_data
*data
,
6452 int follow_jumps
, int skip_blocks
)
6456 int low_cuid
= INSN_CUID (insn
), high_cuid
= INSN_CUID (insn
);
6457 rtx next
= INSN_P (insn
) ? insn
: next_real_insn (insn
);
6458 int path_size
= data
->path_size
;
6462 /* Update the previous branch path, if any. If the last branch was
6463 previously PATH_TAKEN, mark it PATH_NOT_TAKEN.
6464 If it was previously PATH_NOT_TAKEN,
6465 shorten the path by one and look at the previous branch. We know that
6466 at least one branch must have been taken if PATH_SIZE is nonzero. */
6467 while (path_size
> 0)
6469 if (data
->path
[path_size
- 1].status
!= PATH_NOT_TAKEN
)
6471 data
->path
[path_size
- 1].status
= PATH_NOT_TAKEN
;
6478 /* If the first instruction is marked with QImode, that means we've
6479 already processed this block. Our caller will look at DATA->LAST
6480 to figure out where to go next. We want to return the next block
6481 in the instruction stream, not some branched-to block somewhere
6482 else. We accomplish this by pretending our called forbid us to
6483 follow jumps, or skip blocks. */
6484 if (GET_MODE (insn
) == QImode
)
6485 follow_jumps
= skip_blocks
= 0;
6487 /* Scan to end of this basic block. */
6488 while (p
&& !LABEL_P (p
))
6490 /* Don't cse over a call to setjmp; on some machines (eg VAX)
6491 the regs restored by the longjmp come from
6492 a later time than the setjmp. */
6493 if (PREV_INSN (p
) && CALL_P (PREV_INSN (p
))
6494 && find_reg_note (PREV_INSN (p
), REG_SETJMP
, NULL
))
6497 /* A PARALLEL can have lots of SETs in it,
6498 especially if it is really an ASM_OPERANDS. */
6499 if (INSN_P (p
) && GET_CODE (PATTERN (p
)) == PARALLEL
)
6500 nsets
+= XVECLEN (PATTERN (p
), 0);
6501 else if (!NOTE_P (p
))
6504 /* Ignore insns made by CSE; they cannot affect the boundaries of
6507 if (INSN_UID (p
) <= max_uid
&& INSN_CUID (p
) > high_cuid
)
6508 high_cuid
= INSN_CUID (p
);
6509 if (INSN_UID (p
) <= max_uid
&& INSN_CUID (p
) < low_cuid
)
6510 low_cuid
= INSN_CUID (p
);
6512 /* See if this insn is in our branch path. If it is and we are to
6514 if (path_entry
< path_size
&& data
->path
[path_entry
].branch
== p
)
6516 if (data
->path
[path_entry
].status
!= PATH_NOT_TAKEN
)
6519 /* Point to next entry in path, if any. */
6523 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
6524 was specified, we haven't reached our maximum path length, there are
6525 insns following the target of the jump, this is the only use of the
6526 jump label, and the target label is preceded by a BARRIER.
6528 Alternatively, we can follow the jump if it branches around a
6529 block of code and there are no other branches into the block.
6530 In this case invalidate_skipped_block will be called to invalidate any
6531 registers set in the block when following the jump. */
6533 else if ((follow_jumps
|| skip_blocks
) && path_size
< PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH
) - 1
6535 && GET_CODE (PATTERN (p
)) == SET
6536 && GET_CODE (SET_SRC (PATTERN (p
))) == IF_THEN_ELSE
6537 && JUMP_LABEL (p
) != 0
6538 && LABEL_NUSES (JUMP_LABEL (p
)) == 1
6539 && NEXT_INSN (JUMP_LABEL (p
)) != 0)
6541 for (q
= PREV_INSN (JUMP_LABEL (p
)); q
; q
= PREV_INSN (q
))
6543 || NOTE_LINE_NUMBER (q
) == NOTE_INSN_LOOP_END
6544 || (PREV_INSN (q
) && CALL_P (PREV_INSN (q
))
6545 && find_reg_note (PREV_INSN (q
), REG_SETJMP
, NULL
)))
6546 && (!LABEL_P (q
) || LABEL_NUSES (q
) != 0))
6549 /* If we ran into a BARRIER, this code is an extension of the
6550 basic block when the branch is taken. */
6551 if (follow_jumps
&& q
!= 0 && BARRIER_P (q
))
6553 /* Don't allow ourself to keep walking around an
6554 always-executed loop. */
6555 if (next_real_insn (q
) == next
)
6561 /* Similarly, don't put a branch in our path more than once. */
6562 for (i
= 0; i
< path_entry
; i
++)
6563 if (data
->path
[i
].branch
== p
)
6566 if (i
!= path_entry
)
6569 data
->path
[path_entry
].branch
= p
;
6570 data
->path
[path_entry
++].status
= PATH_TAKEN
;
6572 /* This branch now ends our path. It was possible that we
6573 didn't see this branch the last time around (when the
6574 insn in front of the target was a JUMP_INSN that was
6575 turned into a no-op). */
6576 path_size
= path_entry
;
6579 /* Mark block so we won't scan it again later. */
6580 PUT_MODE (NEXT_INSN (p
), QImode
);
6582 /* Detect a branch around a block of code. */
6583 else if (skip_blocks
&& q
!= 0 && !LABEL_P (q
))
6587 if (next_real_insn (q
) == next
)
6593 for (i
= 0; i
< path_entry
; i
++)
6594 if (data
->path
[i
].branch
== p
)
6597 if (i
!= path_entry
)
6600 /* This is no_labels_between_p (p, q) with an added check for
6601 reaching the end of a function (in case Q precedes P). */
6602 for (tmp
= NEXT_INSN (p
); tmp
&& tmp
!= q
; tmp
= NEXT_INSN (tmp
))
6608 data
->path
[path_entry
].branch
= p
;
6609 data
->path
[path_entry
++].status
= PATH_AROUND
;
6611 path_size
= path_entry
;
6614 /* Mark block so we won't scan it again later. */
6615 PUT_MODE (NEXT_INSN (p
), QImode
);
6622 data
->low_cuid
= low_cuid
;
6623 data
->high_cuid
= high_cuid
;
6624 data
->nsets
= nsets
;
6627 /* If all jumps in the path are not taken, set our path length to zero
6628 so a rescan won't be done. */
6629 for (i
= path_size
- 1; i
>= 0; i
--)
6630 if (data
->path
[i
].status
!= PATH_NOT_TAKEN
)
6634 data
->path_size
= 0;
6636 data
->path_size
= path_size
;
6638 /* End the current branch path. */
6639 data
->path
[path_size
].branch
= 0;
6642 /* Perform cse on the instructions of a function.
6643 F is the first instruction.
6644 NREGS is one plus the highest pseudo-reg number used in the instruction.
6646 Returns 1 if jump_optimize should be redone due to simplifications
6647 in conditional jump instructions. */
6650 cse_main (rtx f
, int nregs
, FILE *file
)
6652 struct cse_basic_block_data val
;
6656 val
.path
= xmalloc (sizeof (struct branch_path
)
6657 * PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH
));
6659 cse_jumps_altered
= 0;
6660 recorded_label_ref
= 0;
6661 constant_pool_entries_cost
= 0;
6662 constant_pool_entries_regcost
= 0;
6664 rtl_hooks
= cse_rtl_hooks
;
6667 init_alias_analysis ();
6671 max_insn_uid
= get_max_uid ();
6673 reg_eqv_table
= xmalloc (nregs
* sizeof (struct reg_eqv_elem
));
6675 /* Reset the counter indicating how many elements have been made
6677 n_elements_made
= 0;
6679 /* Find the largest uid. */
6681 max_uid
= get_max_uid ();
6682 uid_cuid
= xcalloc (max_uid
+ 1, sizeof (int));
6684 /* Compute the mapping from uids to cuids.
6685 CUIDs are numbers assigned to insns, like uids,
6686 except that cuids increase monotonically through the code.
6687 Don't assign cuids to line-number NOTEs, so that the distance in cuids
6688 between two insns is not affected by -g. */
6690 for (insn
= f
, i
= 0; insn
; insn
= NEXT_INSN (insn
))
6693 || NOTE_LINE_NUMBER (insn
) < 0)
6694 INSN_CUID (insn
) = ++i
;
6696 /* Give a line number note the same cuid as preceding insn. */
6697 INSN_CUID (insn
) = i
;
6700 /* Loop over basic blocks.
6701 Compute the maximum number of qty's needed for each basic block
6702 (which is 2 for each SET). */
6707 cse_end_of_basic_block (insn
, &val
, flag_cse_follow_jumps
,
6708 flag_cse_skip_blocks
);
6710 /* If this basic block was already processed or has no sets, skip it. */
6711 if (val
.nsets
== 0 || GET_MODE (insn
) == QImode
)
6713 PUT_MODE (insn
, VOIDmode
);
6714 insn
= (val
.last
? NEXT_INSN (val
.last
) : 0);
6719 cse_basic_block_start
= val
.low_cuid
;
6720 cse_basic_block_end
= val
.high_cuid
;
6721 max_qty
= val
.nsets
* 2;
6724 fnotice (file
, ";; Processing block from %d to %d, %d sets.\n",
6725 INSN_UID (insn
), val
.last
? INSN_UID (val
.last
) : 0,
6728 /* Make MAX_QTY bigger to give us room to optimize
6729 past the end of this basic block, if that should prove useful. */
6733 /* If this basic block is being extended by following certain jumps,
6734 (see `cse_end_of_basic_block'), we reprocess the code from the start.
6735 Otherwise, we start after this basic block. */
6736 if (val
.path_size
> 0)
6737 cse_basic_block (insn
, val
.last
, val
.path
);
6740 int old_cse_jumps_altered
= cse_jumps_altered
;
6743 /* When cse changes a conditional jump to an unconditional
6744 jump, we want to reprocess the block, since it will give
6745 us a new branch path to investigate. */
6746 cse_jumps_altered
= 0;
6747 temp
= cse_basic_block (insn
, val
.last
, val
.path
);
6748 if (cse_jumps_altered
== 0
6749 || (flag_cse_follow_jumps
== 0 && flag_cse_skip_blocks
== 0))
6752 cse_jumps_altered
|= old_cse_jumps_altered
;
6763 if (max_elements_made
< n_elements_made
)
6764 max_elements_made
= n_elements_made
;
6767 end_alias_analysis ();
6769 free (reg_eqv_table
);
6771 rtl_hooks
= general_rtl_hooks
;
6773 return cse_jumps_altered
|| recorded_label_ref
;
6776 /* Process a single basic block. FROM and TO and the limits of the basic
6777 block. NEXT_BRANCH points to the branch path when following jumps or
6778 a null path when not following jumps.
6780 AROUND_LOOP is nonzero if we are to try to cse around to the start of a
6781 loop. This is true when we are being called for the last time on a
6782 block and this CSE pass is before loop.c. */
6785 cse_basic_block (rtx from
, rtx to
, struct branch_path
*next_branch
)
6789 rtx libcall_insn
= NULL_RTX
;
6791 int no_conflict
= 0;
6793 /* Allocate the space needed by qty_table. */
6794 qty_table
= xmalloc (max_qty
* sizeof (struct qty_table_elem
));
6798 /* TO might be a label. If so, protect it from being deleted. */
6799 if (to
!= 0 && LABEL_P (to
))
6802 for (insn
= from
; insn
!= to
; insn
= NEXT_INSN (insn
))
6804 enum rtx_code code
= GET_CODE (insn
);
6806 /* If we have processed 1,000 insns, flush the hash table to
6807 avoid extreme quadratic behavior. We must not include NOTEs
6808 in the count since there may be more of them when generating
6809 debugging information. If we clear the table at different
6810 times, code generated with -g -O might be different than code
6811 generated with -O but not -g.
6813 ??? This is a real kludge and needs to be done some other way.
6815 if (code
!= NOTE
&& num_insns
++ > 1000)
6817 flush_hash_table ();
6821 /* See if this is a branch that is part of the path. If so, and it is
6822 to be taken, do so. */
6823 if (next_branch
->branch
== insn
)
6825 enum taken status
= next_branch
++->status
;
6826 if (status
!= PATH_NOT_TAKEN
)
6828 if (status
== PATH_TAKEN
)
6829 record_jump_equiv (insn
, 1);
6831 invalidate_skipped_block (NEXT_INSN (insn
));
6833 /* Set the last insn as the jump insn; it doesn't affect cc0.
6834 Then follow this branch. */
6839 insn
= JUMP_LABEL (insn
);
6844 if (GET_MODE (insn
) == QImode
)
6845 PUT_MODE (insn
, VOIDmode
);
6847 if (GET_RTX_CLASS (code
) == RTX_INSN
)
6851 /* Process notes first so we have all notes in canonical forms when
6852 looking for duplicate operations. */
6854 if (REG_NOTES (insn
))
6855 REG_NOTES (insn
) = cse_process_notes (REG_NOTES (insn
), NULL_RTX
);
6857 /* Track when we are inside in LIBCALL block. Inside such a block,
6858 we do not want to record destinations. The last insn of a
6859 LIBCALL block is not considered to be part of the block, since
6860 its destination is the result of the block and hence should be
6863 if (REG_NOTES (insn
) != 0)
6865 if ((p
= find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
)))
6866 libcall_insn
= XEXP (p
, 0);
6867 else if (find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
6869 /* Keep libcall_insn for the last SET insn of a no-conflict
6870 block to prevent changing the destination. */
6876 else if (find_reg_note (insn
, REG_NO_CONFLICT
, NULL_RTX
))
6880 cse_insn (insn
, libcall_insn
);
6882 if (no_conflict
== -1)
6888 /* If we haven't already found an insn where we added a LABEL_REF,
6890 if (NONJUMP_INSN_P (insn
) && ! recorded_label_ref
6891 && for_each_rtx (&PATTERN (insn
), check_for_label_ref
,
6893 recorded_label_ref
= 1;
6896 /* If INSN is now an unconditional jump, skip to the end of our
6897 basic block by pretending that we just did the last insn in the
6898 basic block. If we are jumping to the end of our block, show
6899 that we can have one usage of TO. */
6901 if (any_uncondjump_p (insn
))
6909 if (JUMP_LABEL (insn
) == to
)
6912 /* Maybe TO was deleted because the jump is unconditional.
6913 If so, there is nothing left in this basic block. */
6914 /* ??? Perhaps it would be smarter to set TO
6915 to whatever follows this insn,
6916 and pretend the basic block had always ended here. */
6917 if (INSN_DELETED_P (to
))
6920 insn
= PREV_INSN (to
);
6923 /* See if it is ok to keep on going past the label
6924 which used to end our basic block. Remember that we incremented
6925 the count of that label, so we decrement it here. If we made
6926 a jump unconditional, TO_USAGE will be one; in that case, we don't
6927 want to count the use in that jump. */
6929 if (to
!= 0 && NEXT_INSN (insn
) == to
6930 && LABEL_P (to
) && --LABEL_NUSES (to
) == to_usage
)
6932 struct cse_basic_block_data val
;
6935 insn
= NEXT_INSN (to
);
6937 /* If TO was the last insn in the function, we are done. */
6944 /* If TO was preceded by a BARRIER we are done with this block
6945 because it has no continuation. */
6946 prev
= prev_nonnote_insn (to
);
6947 if (prev
&& BARRIER_P (prev
))
6953 /* Find the end of the following block. Note that we won't be
6954 following branches in this case. */
6957 val
.path
= xmalloc (sizeof (struct branch_path
)
6958 * PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH
));
6959 cse_end_of_basic_block (insn
, &val
, 0, 0);
6962 /* If the tables we allocated have enough space left
6963 to handle all the SETs in the next basic block,
6964 continue through it. Otherwise, return,
6965 and that block will be scanned individually. */
6966 if (val
.nsets
* 2 + next_qty
> max_qty
)
6969 cse_basic_block_start
= val
.low_cuid
;
6970 cse_basic_block_end
= val
.high_cuid
;
6973 /* Prevent TO from being deleted if it is a label. */
6974 if (to
!= 0 && LABEL_P (to
))
6977 /* Back up so we process the first insn in the extension. */
6978 insn
= PREV_INSN (insn
);
6982 gcc_assert (next_qty
<= max_qty
);
6986 return to
? NEXT_INSN (to
) : 0;
6989 /* Called via for_each_rtx to see if an insn is using a LABEL_REF for which
6990 there isn't a REG_LABEL note. Return one if so. DATA is the insn. */
6993 check_for_label_ref (rtx
*rtl
, void *data
)
6995 rtx insn
= (rtx
) data
;
6997 /* If this insn uses a LABEL_REF and there isn't a REG_LABEL note for it,
6998 we must rerun jump since it needs to place the note. If this is a
6999 LABEL_REF for a CODE_LABEL that isn't in the insn chain, don't do this
7000 since no REG_LABEL will be added. */
7001 return (GET_CODE (*rtl
) == LABEL_REF
7002 && ! LABEL_REF_NONLOCAL_P (*rtl
)
7003 && LABEL_P (XEXP (*rtl
, 0))
7004 && INSN_UID (XEXP (*rtl
, 0)) != 0
7005 && ! find_reg_note (insn
, REG_LABEL
, XEXP (*rtl
, 0)));
7008 /* Count the number of times registers are used (not set) in X.
7009 COUNTS is an array in which we accumulate the count, INCR is how much
7010 we count each register usage. */
7013 count_reg_usage (rtx x
, int *counts
, int incr
)
7023 switch (code
= GET_CODE (x
))
7026 counts
[REGNO (x
)] += incr
;
7040 /* If we are clobbering a MEM, mark any registers inside the address
7042 if (MEM_P (XEXP (x
, 0)))
7043 count_reg_usage (XEXP (XEXP (x
, 0), 0), counts
, incr
);
7047 /* Unless we are setting a REG, count everything in SET_DEST. */
7048 if (!REG_P (SET_DEST (x
)))
7049 count_reg_usage (SET_DEST (x
), counts
, incr
);
7050 count_reg_usage (SET_SRC (x
), counts
, incr
);
7054 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x
), counts
, incr
);
7059 count_reg_usage (PATTERN (x
), counts
, incr
);
7061 /* Things used in a REG_EQUAL note aren't dead since loop may try to
7064 note
= find_reg_equal_equiv_note (x
);
7067 rtx eqv
= XEXP (note
, 0);
7069 if (GET_CODE (eqv
) == EXPR_LIST
)
7070 /* This REG_EQUAL note describes the result of a function call.
7071 Process all the arguments. */
7074 count_reg_usage (XEXP (eqv
, 0), counts
, incr
);
7075 eqv
= XEXP (eqv
, 1);
7077 while (eqv
&& GET_CODE (eqv
) == EXPR_LIST
);
7079 count_reg_usage (eqv
, counts
, incr
);
7084 if (REG_NOTE_KIND (x
) == REG_EQUAL
7085 || (REG_NOTE_KIND (x
) != REG_NONNEG
&& GET_CODE (XEXP (x
,0)) == USE
)
7086 /* FUNCTION_USAGE expression lists may include (CLOBBER (mem /u)),
7087 involving registers in the address. */
7088 || GET_CODE (XEXP (x
, 0)) == CLOBBER
)
7089 count_reg_usage (XEXP (x
, 0), counts
, incr
);
7091 count_reg_usage (XEXP (x
, 1), counts
, incr
);
7095 /* Iterate over just the inputs, not the constraints as well. */
7096 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
7097 count_reg_usage (ASM_OPERANDS_INPUT (x
, i
), counts
, incr
);
7107 fmt
= GET_RTX_FORMAT (code
);
7108 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
7111 count_reg_usage (XEXP (x
, i
), counts
, incr
);
7112 else if (fmt
[i
] == 'E')
7113 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
7114 count_reg_usage (XVECEXP (x
, i
, j
), counts
, incr
);
7118 /* Return true if set is live. */
7120 set_live_p (rtx set
, rtx insn ATTRIBUTE_UNUSED
, /* Only used with HAVE_cc0. */
7127 if (set_noop_p (set
))
7131 else if (GET_CODE (SET_DEST (set
)) == CC0
7132 && !side_effects_p (SET_SRC (set
))
7133 && ((tem
= next_nonnote_insn (insn
)) == 0
7135 || !reg_referenced_p (cc0_rtx
, PATTERN (tem
))))
7138 else if (!REG_P (SET_DEST (set
))
7139 || REGNO (SET_DEST (set
)) < FIRST_PSEUDO_REGISTER
7140 || counts
[REGNO (SET_DEST (set
))] != 0
7141 || side_effects_p (SET_SRC (set
)))
7146 /* Return true if insn is live. */
7149 insn_live_p (rtx insn
, int *counts
)
7152 if (flag_non_call_exceptions
&& may_trap_p (PATTERN (insn
)))
7154 else if (GET_CODE (PATTERN (insn
)) == SET
)
7155 return set_live_p (PATTERN (insn
), insn
, counts
);
7156 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
7158 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
7160 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
7162 if (GET_CODE (elt
) == SET
)
7164 if (set_live_p (elt
, insn
, counts
))
7167 else if (GET_CODE (elt
) != CLOBBER
&& GET_CODE (elt
) != USE
)
7176 /* Return true if libcall is dead as a whole. */
7179 dead_libcall_p (rtx insn
, int *counts
)
7183 /* See if there's a REG_EQUAL note on this insn and try to
7184 replace the source with the REG_EQUAL expression.
7186 We assume that insns with REG_RETVALs can only be reg->reg
7187 copies at this point. */
7188 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
7192 set
= single_set (insn
);
7196 new = simplify_rtx (XEXP (note
, 0));
7198 new = XEXP (note
, 0);
7200 /* While changing insn, we must update the counts accordingly. */
7201 count_reg_usage (insn
, counts
, -1);
7203 if (validate_change (insn
, &SET_SRC (set
), new, 0))
7205 count_reg_usage (insn
, counts
, 1);
7206 remove_note (insn
, find_reg_note (insn
, REG_RETVAL
, NULL_RTX
));
7207 remove_note (insn
, note
);
7211 if (CONSTANT_P (new))
7213 new = force_const_mem (GET_MODE (SET_DEST (set
)), new);
7214 if (new && validate_change (insn
, &SET_SRC (set
), new, 0))
7216 count_reg_usage (insn
, counts
, 1);
7217 remove_note (insn
, find_reg_note (insn
, REG_RETVAL
, NULL_RTX
));
7218 remove_note (insn
, note
);
7223 count_reg_usage (insn
, counts
, 1);
7227 /* Scan all the insns and delete any that are dead; i.e., they store a register
7228 that is never used or they copy a register to itself.
7230 This is used to remove insns made obviously dead by cse, loop or other
7231 optimizations. It improves the heuristics in loop since it won't try to
7232 move dead invariants out of loops or make givs for dead quantities. The
7233 remaining passes of the compilation are also sped up. */
7236 delete_trivially_dead_insns (rtx insns
, int nreg
)
7240 int in_libcall
= 0, dead_libcall
= 0;
7241 int ndead
= 0, nlastdead
, niterations
= 0;
7243 timevar_push (TV_DELETE_TRIVIALLY_DEAD
);
7244 /* First count the number of times each register is used. */
7245 counts
= xcalloc (nreg
, sizeof (int));
7246 for (insn
= next_real_insn (insns
); insn
; insn
= next_real_insn (insn
))
7247 count_reg_usage (insn
, counts
, 1);
7253 /* Go from the last insn to the first and delete insns that only set unused
7254 registers or copy a register to itself. As we delete an insn, remove
7255 usage counts for registers it uses.
7257 The first jump optimization pass may leave a real insn as the last
7258 insn in the function. We must not skip that insn or we may end
7259 up deleting code that is not really dead. */
7260 insn
= get_last_insn ();
7261 if (! INSN_P (insn
))
7262 insn
= prev_real_insn (insn
);
7264 for (; insn
; insn
= prev
)
7268 prev
= prev_real_insn (insn
);
7270 /* Don't delete any insns that are part of a libcall block unless
7271 we can delete the whole libcall block.
7273 Flow or loop might get confused if we did that. Remember
7274 that we are scanning backwards. */
7275 if (find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
7279 dead_libcall
= dead_libcall_p (insn
, counts
);
7281 else if (in_libcall
)
7282 live_insn
= ! dead_libcall
;
7284 live_insn
= insn_live_p (insn
, counts
);
7286 /* If this is a dead insn, delete it and show registers in it aren't
7291 count_reg_usage (insn
, counts
, -1);
7292 delete_insn_and_edges (insn
);
7296 if (find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
))
7303 while (ndead
!= nlastdead
);
7305 if (dump_file
&& ndead
)
7306 fprintf (dump_file
, "Deleted %i trivially dead insns; %i iterations\n",
7307 ndead
, niterations
);
7310 timevar_pop (TV_DELETE_TRIVIALLY_DEAD
);
7314 /* This function is called via for_each_rtx. The argument, NEWREG, is
7315 a condition code register with the desired mode. If we are looking
7316 at the same register in a different mode, replace it with
7320 cse_change_cc_mode (rtx
*loc
, void *data
)
7322 rtx newreg
= (rtx
) data
;
7326 && REGNO (*loc
) == REGNO (newreg
)
7327 && GET_MODE (*loc
) != GET_MODE (newreg
))
7335 /* Change the mode of any reference to the register REGNO (NEWREG) to
7336 GET_MODE (NEWREG), starting at START. Stop before END. Stop at
7337 any instruction which modifies NEWREG. */
7340 cse_change_cc_mode_insns (rtx start
, rtx end
, rtx newreg
)
7344 for (insn
= start
; insn
!= end
; insn
= NEXT_INSN (insn
))
7346 if (! INSN_P (insn
))
7349 if (reg_set_p (newreg
, insn
))
7352 for_each_rtx (&PATTERN (insn
), cse_change_cc_mode
, newreg
);
7353 for_each_rtx (®_NOTES (insn
), cse_change_cc_mode
, newreg
);
7357 /* BB is a basic block which finishes with CC_REG as a condition code
7358 register which is set to CC_SRC. Look through the successors of BB
7359 to find blocks which have a single predecessor (i.e., this one),
7360 and look through those blocks for an assignment to CC_REG which is
7361 equivalent to CC_SRC. CAN_CHANGE_MODE indicates whether we are
7362 permitted to change the mode of CC_SRC to a compatible mode. This
7363 returns VOIDmode if no equivalent assignments were found.
7364 Otherwise it returns the mode which CC_SRC should wind up with.
7366 The main complexity in this function is handling the mode issues.
7367 We may have more than one duplicate which we can eliminate, and we
7368 try to find a mode which will work for multiple duplicates. */
7370 static enum machine_mode
7371 cse_cc_succs (basic_block bb
, rtx cc_reg
, rtx cc_src
, bool can_change_mode
)
7374 enum machine_mode mode
;
7375 unsigned int insn_count
;
7378 enum machine_mode modes
[2];
7384 /* We expect to have two successors. Look at both before picking
7385 the final mode for the comparison. If we have more successors
7386 (i.e., some sort of table jump, although that seems unlikely),
7387 then we require all beyond the first two to use the same
7390 found_equiv
= false;
7391 mode
= GET_MODE (cc_src
);
7393 FOR_EACH_EDGE (e
, ei
, bb
->succs
)
7398 if (e
->flags
& EDGE_COMPLEX
)
7401 if (EDGE_COUNT (e
->dest
->preds
) != 1
7402 || e
->dest
== EXIT_BLOCK_PTR
)
7405 end
= NEXT_INSN (BB_END (e
->dest
));
7406 for (insn
= BB_HEAD (e
->dest
); insn
!= end
; insn
= NEXT_INSN (insn
))
7410 if (! INSN_P (insn
))
7413 /* If CC_SRC is modified, we have to stop looking for
7414 something which uses it. */
7415 if (modified_in_p (cc_src
, insn
))
7418 /* Check whether INSN sets CC_REG to CC_SRC. */
7419 set
= single_set (insn
);
7421 && REG_P (SET_DEST (set
))
7422 && REGNO (SET_DEST (set
)) == REGNO (cc_reg
))
7425 enum machine_mode set_mode
;
7426 enum machine_mode comp_mode
;
7429 set_mode
= GET_MODE (SET_SRC (set
));
7430 comp_mode
= set_mode
;
7431 if (rtx_equal_p (cc_src
, SET_SRC (set
)))
7433 else if (GET_CODE (cc_src
) == COMPARE
7434 && GET_CODE (SET_SRC (set
)) == COMPARE
7436 && rtx_equal_p (XEXP (cc_src
, 0),
7437 XEXP (SET_SRC (set
), 0))
7438 && rtx_equal_p (XEXP (cc_src
, 1),
7439 XEXP (SET_SRC (set
), 1)))
7442 comp_mode
= targetm
.cc_modes_compatible (mode
, set_mode
);
7443 if (comp_mode
!= VOIDmode
7444 && (can_change_mode
|| comp_mode
== mode
))
7451 if (insn_count
< ARRAY_SIZE (insns
))
7453 insns
[insn_count
] = insn
;
7454 modes
[insn_count
] = set_mode
;
7455 last_insns
[insn_count
] = end
;
7458 if (mode
!= comp_mode
)
7460 gcc_assert (can_change_mode
);
7462 PUT_MODE (cc_src
, mode
);
7467 if (set_mode
!= mode
)
7469 /* We found a matching expression in the
7470 wrong mode, but we don't have room to
7471 store it in the array. Punt. This case
7475 /* INSN sets CC_REG to a value equal to CC_SRC
7476 with the right mode. We can simply delete
7481 /* We found an instruction to delete. Keep looking,
7482 in the hopes of finding a three-way jump. */
7486 /* We found an instruction which sets the condition
7487 code, so don't look any farther. */
7491 /* If INSN sets CC_REG in some other way, don't look any
7493 if (reg_set_p (cc_reg
, insn
))
7497 /* If we fell off the bottom of the block, we can keep looking
7498 through successors. We pass CAN_CHANGE_MODE as false because
7499 we aren't prepared to handle compatibility between the
7500 further blocks and this block. */
7503 enum machine_mode submode
;
7505 submode
= cse_cc_succs (e
->dest
, cc_reg
, cc_src
, false);
7506 if (submode
!= VOIDmode
)
7508 gcc_assert (submode
== mode
);
7510 can_change_mode
= false;
7518 /* Now INSN_COUNT is the number of instructions we found which set
7519 CC_REG to a value equivalent to CC_SRC. The instructions are in
7520 INSNS. The modes used by those instructions are in MODES. */
7523 for (i
= 0; i
< insn_count
; ++i
)
7525 if (modes
[i
] != mode
)
7527 /* We need to change the mode of CC_REG in INSNS[i] and
7528 subsequent instructions. */
7531 if (GET_MODE (cc_reg
) == mode
)
7534 newreg
= gen_rtx_REG (mode
, REGNO (cc_reg
));
7536 cse_change_cc_mode_insns (NEXT_INSN (insns
[i
]), last_insns
[i
],
7540 delete_insn (insns
[i
]);
7546 /* If we have a fixed condition code register (or two), walk through
7547 the instructions and try to eliminate duplicate assignments. */
7550 cse_condition_code_reg (void)
7552 unsigned int cc_regno_1
;
7553 unsigned int cc_regno_2
;
7558 if (! targetm
.fixed_condition_code_regs (&cc_regno_1
, &cc_regno_2
))
7561 cc_reg_1
= gen_rtx_REG (CCmode
, cc_regno_1
);
7562 if (cc_regno_2
!= INVALID_REGNUM
)
7563 cc_reg_2
= gen_rtx_REG (CCmode
, cc_regno_2
);
7565 cc_reg_2
= NULL_RTX
;
7574 enum machine_mode mode
;
7575 enum machine_mode orig_mode
;
7577 /* Look for blocks which end with a conditional jump based on a
7578 condition code register. Then look for the instruction which
7579 sets the condition code register. Then look through the
7580 successor blocks for instructions which set the condition
7581 code register to the same value. There are other possible
7582 uses of the condition code register, but these are by far the
7583 most common and the ones which we are most likely to be able
7586 last_insn
= BB_END (bb
);
7587 if (!JUMP_P (last_insn
))
7590 if (reg_referenced_p (cc_reg_1
, PATTERN (last_insn
)))
7592 else if (cc_reg_2
&& reg_referenced_p (cc_reg_2
, PATTERN (last_insn
)))
7597 cc_src_insn
= NULL_RTX
;
7599 for (insn
= PREV_INSN (last_insn
);
7600 insn
&& insn
!= PREV_INSN (BB_HEAD (bb
));
7601 insn
= PREV_INSN (insn
))
7605 if (! INSN_P (insn
))
7607 set
= single_set (insn
);
7609 && REG_P (SET_DEST (set
))
7610 && REGNO (SET_DEST (set
)) == REGNO (cc_reg
))
7613 cc_src
= SET_SRC (set
);
7616 else if (reg_set_p (cc_reg
, insn
))
7623 if (modified_between_p (cc_src
, cc_src_insn
, NEXT_INSN (last_insn
)))
7626 /* Now CC_REG is a condition code register used for a
7627 conditional jump at the end of the block, and CC_SRC, in
7628 CC_SRC_INSN, is the value to which that condition code
7629 register is set, and CC_SRC is still meaningful at the end of
7632 orig_mode
= GET_MODE (cc_src
);
7633 mode
= cse_cc_succs (bb
, cc_reg
, cc_src
, true);
7634 if (mode
!= VOIDmode
)
7636 gcc_assert (mode
== GET_MODE (cc_src
));
7637 if (mode
!= orig_mode
)
7639 rtx newreg
= gen_rtx_REG (mode
, REGNO (cc_reg
));
7641 /* Change the mode of CC_REG in CC_SRC_INSN to
7642 GET_MODE (NEWREG). */
7643 for_each_rtx (&PATTERN (cc_src_insn
), cse_change_cc_mode
,
7645 for_each_rtx (®_NOTES (cc_src_insn
), cse_change_cc_mode
,
7648 /* Do the same in the following insns that use the
7649 current value of CC_REG within BB. */
7650 cse_change_cc_mode_insns (NEXT_INSN (cc_src_insn
),
7651 NEXT_INSN (last_insn
),