* config/i386/i386.md (mmx_pinsrw): Output operands in correct
[official-gcc.git] / gcc / cse.c
blobd36816a2e811ec79346c34bf61c8cda0d551a97f
1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998
3 1999, 2000 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 #include "config.h"
23 /* stdio.h must precede rtl.h for FFS. */
24 #include "system.h"
25 #include <setjmp.h>
27 #include "rtl.h"
28 #include "tm_p.h"
29 #include "regs.h"
30 #include "hard-reg-set.h"
31 #include "basic-block.h"
32 #include "flags.h"
33 #include "real.h"
34 #include "insn-config.h"
35 #include "recog.h"
36 #include "function.h"
37 #include "expr.h"
38 #include "toplev.h"
39 #include "output.h"
40 #include "ggc.h"
42 /* The basic idea of common subexpression elimination is to go
43 through the code, keeping a record of expressions that would
44 have the same value at the current scan point, and replacing
45 expressions encountered with the cheapest equivalent expression.
47 It is too complicated to keep track of the different possibilities
48 when control paths merge in this code; so, at each label, we forget all
49 that is known and start fresh. This can be described as processing each
50 extended basic block separately. We have a separate pass to perform
51 global CSE.
53 Note CSE can turn a conditional or computed jump into a nop or
54 an unconditional jump. When this occurs we arrange to run the jump
55 optimizer after CSE to delete the unreachable code.
57 We use two data structures to record the equivalent expressions:
58 a hash table for most expressions, and a vector of "quantity
59 numbers" to record equivalent (pseudo) registers.
61 The use of the special data structure for registers is desirable
62 because it is faster. It is possible because registers references
63 contain a fairly small number, the register number, taken from
64 a contiguously allocated series, and two register references are
65 identical if they have the same number. General expressions
66 do not have any such thing, so the only way to retrieve the
67 information recorded on an expression other than a register
68 is to keep it in a hash table.
70 Registers and "quantity numbers":
72 At the start of each basic block, all of the (hardware and pseudo)
73 registers used in the function are given distinct quantity
74 numbers to indicate their contents. During scan, when the code
75 copies one register into another, we copy the quantity number.
76 When a register is loaded in any other way, we allocate a new
77 quantity number to describe the value generated by this operation.
78 `reg_qty' records what quantity a register is currently thought
79 of as containing.
81 All real quantity numbers are greater than or equal to `max_reg'.
82 If register N has not been assigned a quantity, reg_qty[N] will equal N.
84 Quantity numbers below `max_reg' do not exist and none of the `qty_table'
85 entries should be referenced with an index below `max_reg'.
87 We also maintain a bidirectional chain of registers for each
88 quantity number. The `qty_table` members `first_reg' and `last_reg',
89 and `reg_eqv_table' members `next' and `prev' hold these chains.
91 The first register in a chain is the one whose lifespan is least local.
92 Among equals, it is the one that was seen first.
93 We replace any equivalent register with that one.
95 If two registers have the same quantity number, it must be true that
96 REG expressions with qty_table `mode' must be in the hash table for both
97 registers and must be in the same class.
99 The converse is not true. Since hard registers may be referenced in
100 any mode, two REG expressions might be equivalent in the hash table
101 but not have the same quantity number if the quantity number of one
102 of the registers is not the same mode as those expressions.
104 Constants and quantity numbers
106 When a quantity has a known constant value, that value is stored
107 in the appropriate qty_table `const_rtx'. This is in addition to
108 putting the constant in the hash table as is usual for non-regs.
110 Whether a reg or a constant is preferred is determined by the configuration
111 macro CONST_COSTS and will often depend on the constant value. In any
112 event, expressions containing constants can be simplified, by fold_rtx.
114 When a quantity has a known nearly constant value (such as an address
115 of a stack slot), that value is stored in the appropriate qty_table
116 `const_rtx'.
118 Integer constants don't have a machine mode. However, cse
119 determines the intended machine mode from the destination
120 of the instruction that moves the constant. The machine mode
121 is recorded in the hash table along with the actual RTL
122 constant expression so that different modes are kept separate.
124 Other expressions:
126 To record known equivalences among expressions in general
127 we use a hash table called `table'. It has a fixed number of buckets
128 that contain chains of `struct table_elt' elements for expressions.
129 These chains connect the elements whose expressions have the same
130 hash codes.
132 Other chains through the same elements connect the elements which
133 currently have equivalent values.
135 Register references in an expression are canonicalized before hashing
136 the expression. This is done using `reg_qty' and qty_table `first_reg'.
137 The hash code of a register reference is computed using the quantity
138 number, not the register number.
140 When the value of an expression changes, it is necessary to remove from the
141 hash table not just that expression but all expressions whose values
142 could be different as a result.
144 1. If the value changing is in memory, except in special cases
145 ANYTHING referring to memory could be changed. That is because
146 nobody knows where a pointer does not point.
147 The function `invalidate_memory' removes what is necessary.
149 The special cases are when the address is constant or is
150 a constant plus a fixed register such as the frame pointer
151 or a static chain pointer. When such addresses are stored in,
152 we can tell exactly which other such addresses must be invalidated
153 due to overlap. `invalidate' does this.
154 All expressions that refer to non-constant
155 memory addresses are also invalidated. `invalidate_memory' does this.
157 2. If the value changing is a register, all expressions
158 containing references to that register, and only those,
159 must be removed.
161 Because searching the entire hash table for expressions that contain
162 a register is very slow, we try to figure out when it isn't necessary.
163 Precisely, this is necessary only when expressions have been
164 entered in the hash table using this register, and then the value has
165 changed, and then another expression wants to be added to refer to
166 the register's new value. This sequence of circumstances is rare
167 within any one basic block.
169 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
170 reg_tick[i] is incremented whenever a value is stored in register i.
171 reg_in_table[i] holds -1 if no references to register i have been
172 entered in the table; otherwise, it contains the value reg_tick[i] had
173 when the references were entered. If we want to enter a reference
174 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
175 Until we want to enter a new entry, the mere fact that the two vectors
176 don't match makes the entries be ignored if anyone tries to match them.
178 Registers themselves are entered in the hash table as well as in
179 the equivalent-register chains. However, the vectors `reg_tick'
180 and `reg_in_table' do not apply to expressions which are simple
181 register references. These expressions are removed from the table
182 immediately when they become invalid, and this can be done even if
183 we do not immediately search for all the expressions that refer to
184 the register.
186 A CLOBBER rtx in an instruction invalidates its operand for further
187 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
188 invalidates everything that resides in memory.
190 Related expressions:
192 Constant expressions that differ only by an additive integer
193 are called related. When a constant expression is put in
194 the table, the related expression with no constant term
195 is also entered. These are made to point at each other
196 so that it is possible to find out if there exists any
197 register equivalent to an expression related to a given expression. */
199 /* One plus largest register number used in this function. */
201 static int max_reg;
203 /* One plus largest instruction UID used in this function at time of
204 cse_main call. */
206 static int max_insn_uid;
208 /* Length of qty_table vector. We know in advance we will not need
209 a quantity number this big. */
211 static int max_qty;
213 /* Next quantity number to be allocated.
214 This is 1 + the largest number needed so far. */
216 static int next_qty;
218 /* Per-qty information tracking.
220 `first_reg' and `last_reg' track the head and tail of the
221 chain of registers which currently contain this quantity.
223 `mode' contains the machine mode of this quantity.
225 `const_rtx' holds the rtx of the constant value of this
226 quantity, if known. A summations of the frame/arg pointer
227 and a constant can also be entered here. When this holds
228 a known value, `const_insn' is the insn which stored the
229 constant value.
231 `comparison_{code,const,qty}' are used to track when a
232 comparison between a quantity and some constant or register has
233 been passed. In such a case, we know the results of the comparison
234 in case we see it again. These members record a comparison that
235 is known to be true. `comparison_code' holds the rtx code of such
236 a comparison, else it is set to UNKNOWN and the other two
237 comparison members are undefined. `comparison_const' holds
238 the constant being compared against, or zero if the comparison
239 is not against a constant. `comparison_qty' holds the quantity
240 being compared against when the result is known. If the comparison
241 is not with a register, `comparison_qty' is -1. */
243 struct qty_table_elem
245 rtx const_rtx;
246 rtx const_insn;
247 rtx comparison_const;
248 int comparison_qty;
249 unsigned int first_reg, last_reg;
250 enum machine_mode mode;
251 enum rtx_code comparison_code;
254 /* The table of all qtys, indexed by qty number. */
255 static struct qty_table_elem *qty_table;
257 #ifdef HAVE_cc0
258 /* For machines that have a CC0, we do not record its value in the hash
259 table since its use is guaranteed to be the insn immediately following
260 its definition and any other insn is presumed to invalidate it.
262 Instead, we store below the value last assigned to CC0. If it should
263 happen to be a constant, it is stored in preference to the actual
264 assigned value. In case it is a constant, we store the mode in which
265 the constant should be interpreted. */
267 static rtx prev_insn_cc0;
268 static enum machine_mode prev_insn_cc0_mode;
269 #endif
271 /* Previous actual insn. 0 if at first insn of basic block. */
273 static rtx prev_insn;
275 /* Insn being scanned. */
277 static rtx this_insn;
279 /* Index by register number, gives the number of the next (or
280 previous) register in the chain of registers sharing the same
281 value.
283 Or -1 if this register is at the end of the chain.
285 If reg_qty[N] == N, reg_eqv_table[N].next is undefined. */
287 /* Per-register equivalence chain. */
288 struct reg_eqv_elem
290 int next, prev;
293 /* The table of all register equivalence chains. */
294 static struct reg_eqv_elem *reg_eqv_table;
296 struct cse_reg_info
298 /* Next in hash chain. */
299 struct cse_reg_info *hash_next;
301 /* The next cse_reg_info structure in the free or used list. */
302 struct cse_reg_info *next;
304 /* Search key */
305 unsigned int regno;
307 /* The quantity number of the register's current contents. */
308 int reg_qty;
310 /* The number of times the register has been altered in the current
311 basic block. */
312 int reg_tick;
314 /* The REG_TICK value at which rtx's containing this register are
315 valid in the hash table. If this does not equal the current
316 reg_tick value, such expressions existing in the hash table are
317 invalid. */
318 int reg_in_table;
321 /* A free list of cse_reg_info entries. */
322 static struct cse_reg_info *cse_reg_info_free_list;
324 /* A used list of cse_reg_info entries. */
325 static struct cse_reg_info *cse_reg_info_used_list;
326 static struct cse_reg_info *cse_reg_info_used_list_end;
328 /* A mapping from registers to cse_reg_info data structures. */
329 #define REGHASH_SHIFT 7
330 #define REGHASH_SIZE (1 << REGHASH_SHIFT)
331 #define REGHASH_MASK (REGHASH_SIZE - 1)
332 static struct cse_reg_info *reg_hash[REGHASH_SIZE];
334 #define REGHASH_FN(REGNO) \
335 (((REGNO) ^ ((REGNO) >> REGHASH_SHIFT)) & REGHASH_MASK)
337 /* The last lookup we did into the cse_reg_info_tree. This allows us
338 to cache repeated lookups. */
339 static unsigned int cached_regno;
340 static struct cse_reg_info *cached_cse_reg_info;
342 /* A HARD_REG_SET containing all the hard registers for which there is
343 currently a REG expression in the hash table. Note the difference
344 from the above variables, which indicate if the REG is mentioned in some
345 expression in the table. */
347 static HARD_REG_SET hard_regs_in_table;
349 /* A HARD_REG_SET containing all the hard registers that are invalidated
350 by a CALL_INSN. */
352 static HARD_REG_SET regs_invalidated_by_call;
354 /* CUID of insn that starts the basic block currently being cse-processed. */
356 static int cse_basic_block_start;
358 /* CUID of insn that ends the basic block currently being cse-processed. */
360 static int cse_basic_block_end;
362 /* Vector mapping INSN_UIDs to cuids.
363 The cuids are like uids but increase monotonically always.
364 We use them to see whether a reg is used outside a given basic block. */
366 static int *uid_cuid;
368 /* Highest UID in UID_CUID. */
369 static int max_uid;
371 /* Get the cuid of an insn. */
373 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
375 /* Nonzero if this pass has made changes, and therefore it's
376 worthwhile to run the garbage collector. */
378 static int cse_altered;
380 /* Nonzero if cse has altered conditional jump insns
381 in such a way that jump optimization should be redone. */
383 static int cse_jumps_altered;
385 /* Nonzero if we put a LABEL_REF into the hash table. Since we may have put
386 it into an INSN without a REG_LABEL, we have to rerun jump after CSE
387 to put in the note. */
388 static int recorded_label_ref;
390 /* canon_hash stores 1 in do_not_record
391 if it notices a reference to CC0, PC, or some other volatile
392 subexpression. */
394 static int do_not_record;
396 #ifdef LOAD_EXTEND_OP
398 /* Scratch rtl used when looking for load-extended copy of a MEM. */
399 static rtx memory_extend_rtx;
400 #endif
402 /* canon_hash stores 1 in hash_arg_in_memory
403 if it notices a reference to memory within the expression being hashed. */
405 static int hash_arg_in_memory;
407 /* The hash table contains buckets which are chains of `struct table_elt's,
408 each recording one expression's information.
409 That expression is in the `exp' field.
411 The canon_exp field contains a canonical (from the point of view of
412 alias analysis) version of the `exp' field.
414 Those elements with the same hash code are chained in both directions
415 through the `next_same_hash' and `prev_same_hash' fields.
417 Each set of expressions with equivalent values
418 are on a two-way chain through the `next_same_value'
419 and `prev_same_value' fields, and all point with
420 the `first_same_value' field at the first element in
421 that chain. The chain is in order of increasing cost.
422 Each element's cost value is in its `cost' field.
424 The `in_memory' field is nonzero for elements that
425 involve any reference to memory. These elements are removed
426 whenever a write is done to an unidentified location in memory.
427 To be safe, we assume that a memory address is unidentified unless
428 the address is either a symbol constant or a constant plus
429 the frame pointer or argument pointer.
431 The `related_value' field is used to connect related expressions
432 (that differ by adding an integer).
433 The related expressions are chained in a circular fashion.
434 `related_value' is zero for expressions for which this
435 chain is not useful.
437 The `cost' field stores the cost of this element's expression.
438 The `regcost' field stores the value returned by approx_reg_cost for
439 this element's expression.
441 The `is_const' flag is set if the element is a constant (including
442 a fixed address).
444 The `flag' field is used as a temporary during some search routines.
446 The `mode' field is usually the same as GET_MODE (`exp'), but
447 if `exp' is a CONST_INT and has no machine mode then the `mode'
448 field is the mode it was being used as. Each constant is
449 recorded separately for each mode it is used with. */
451 struct table_elt
453 rtx exp;
454 rtx canon_exp;
455 struct table_elt *next_same_hash;
456 struct table_elt *prev_same_hash;
457 struct table_elt *next_same_value;
458 struct table_elt *prev_same_value;
459 struct table_elt *first_same_value;
460 struct table_elt *related_value;
461 int cost;
462 int regcost;
463 enum machine_mode mode;
464 char in_memory;
465 char is_const;
466 char flag;
469 /* We don't want a lot of buckets, because we rarely have very many
470 things stored in the hash table, and a lot of buckets slows
471 down a lot of loops that happen frequently. */
472 #define HASH_SHIFT 5
473 #define HASH_SIZE (1 << HASH_SHIFT)
474 #define HASH_MASK (HASH_SIZE - 1)
476 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
477 register (hard registers may require `do_not_record' to be set). */
479 #define HASH(X, M) \
480 ((GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
481 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
482 : canon_hash (X, M)) & HASH_MASK)
484 /* Determine whether register number N is considered a fixed register for the
485 purpose of approximating register costs.
486 It is desirable to replace other regs with fixed regs, to reduce need for
487 non-fixed hard regs.
488 A reg wins if it is either the frame pointer or designated as fixed. */
489 #define FIXED_REGNO_P(N) \
490 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
491 || fixed_regs[N] || global_regs[N])
493 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
494 hard registers and pointers into the frame are the cheapest with a cost
495 of 0. Next come pseudos with a cost of one and other hard registers with
496 a cost of 2. Aside from these special cases, call `rtx_cost'. */
498 #define CHEAP_REGNO(N) \
499 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
500 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
501 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
502 || ((N) < FIRST_PSEUDO_REGISTER \
503 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
505 #define COST(X) (GET_CODE (X) == REG ? 0 : notreg_cost (X, SET))
506 #define COST_IN(X,OUTER) (GET_CODE (X) == REG ? 0 : notreg_cost (X, OUTER))
508 /* Get the info associated with register N. */
510 #define GET_CSE_REG_INFO(N) \
511 (((N) == cached_regno && cached_cse_reg_info) \
512 ? cached_cse_reg_info : get_cse_reg_info ((N)))
514 /* Get the number of times this register has been updated in this
515 basic block. */
517 #define REG_TICK(N) ((GET_CSE_REG_INFO (N))->reg_tick)
519 /* Get the point at which REG was recorded in the table. */
521 #define REG_IN_TABLE(N) ((GET_CSE_REG_INFO (N))->reg_in_table)
523 /* Get the quantity number for REG. */
525 #define REG_QTY(N) ((GET_CSE_REG_INFO (N))->reg_qty)
527 /* Determine if the quantity number for register X represents a valid index
528 into the qty_table. */
530 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) != (int) (N))
532 static struct table_elt *table[HASH_SIZE];
534 /* Chain of `struct table_elt's made so far for this function
535 but currently removed from the table. */
537 static struct table_elt *free_element_chain;
539 /* Number of `struct table_elt' structures made so far for this function. */
541 static int n_elements_made;
543 /* Maximum value `n_elements_made' has had so far in this compilation
544 for functions previously processed. */
546 static int max_elements_made;
548 /* Surviving equivalence class when two equivalence classes are merged
549 by recording the effects of a jump in the last insn. Zero if the
550 last insn was not a conditional jump. */
552 static struct table_elt *last_jump_equiv_class;
554 /* Set to the cost of a constant pool reference if one was found for a
555 symbolic constant. If this was found, it means we should try to
556 convert constants into constant pool entries if they don't fit in
557 the insn. */
559 static int constant_pool_entries_cost;
561 /* Define maximum length of a branch path. */
563 #define PATHLENGTH 10
565 /* This data describes a block that will be processed by cse_basic_block. */
567 struct cse_basic_block_data
569 /* Lowest CUID value of insns in block. */
570 int low_cuid;
571 /* Highest CUID value of insns in block. */
572 int high_cuid;
573 /* Total number of SETs in block. */
574 int nsets;
575 /* Last insn in the block. */
576 rtx last;
577 /* Size of current branch path, if any. */
578 int path_size;
579 /* Current branch path, indicating which branches will be taken. */
580 struct branch_path
582 /* The branch insn. */
583 rtx branch;
584 /* Whether it should be taken or not. AROUND is the same as taken
585 except that it is used when the destination label is not preceded
586 by a BARRIER. */
587 enum taken {TAKEN, NOT_TAKEN, AROUND} status;
588 } path[PATHLENGTH];
591 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
592 virtual regs here because the simplify_*_operation routines are called
593 by integrate.c, which is called before virtual register instantiation.
595 ?!? FIXED_BASE_PLUS_P and NONZERO_BASE_PLUS_P need to move into
596 a header file so that their definitions can be shared with the
597 simplification routines in simplify-rtx.c. Until then, do not
598 change these macros without also changing the copy in simplify-rtx.c. */
600 #define FIXED_BASE_PLUS_P(X) \
601 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
602 || ((X) == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])\
603 || (X) == virtual_stack_vars_rtx \
604 || (X) == virtual_incoming_args_rtx \
605 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
606 && (XEXP (X, 0) == frame_pointer_rtx \
607 || XEXP (X, 0) == hard_frame_pointer_rtx \
608 || ((X) == arg_pointer_rtx \
609 && fixed_regs[ARG_POINTER_REGNUM]) \
610 || XEXP (X, 0) == virtual_stack_vars_rtx \
611 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
612 || GET_CODE (X) == ADDRESSOF)
614 /* Similar, but also allows reference to the stack pointer.
616 This used to include FIXED_BASE_PLUS_P, however, we can't assume that
617 arg_pointer_rtx by itself is nonzero, because on at least one machine,
618 the i960, the arg pointer is zero when it is unused. */
620 #define NONZERO_BASE_PLUS_P(X) \
621 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
622 || (X) == virtual_stack_vars_rtx \
623 || (X) == virtual_incoming_args_rtx \
624 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
625 && (XEXP (X, 0) == frame_pointer_rtx \
626 || XEXP (X, 0) == hard_frame_pointer_rtx \
627 || ((X) == arg_pointer_rtx \
628 && fixed_regs[ARG_POINTER_REGNUM]) \
629 || XEXP (X, 0) == virtual_stack_vars_rtx \
630 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
631 || (X) == stack_pointer_rtx \
632 || (X) == virtual_stack_dynamic_rtx \
633 || (X) == virtual_outgoing_args_rtx \
634 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
635 && (XEXP (X, 0) == stack_pointer_rtx \
636 || XEXP (X, 0) == virtual_stack_dynamic_rtx \
637 || XEXP (X, 0) == virtual_outgoing_args_rtx)) \
638 || GET_CODE (X) == ADDRESSOF)
640 static int notreg_cost PARAMS ((rtx, enum rtx_code));
641 static int approx_reg_cost_1 PARAMS ((rtx *, void *));
642 static int approx_reg_cost PARAMS ((rtx));
643 static int preferrable PARAMS ((int, int, int, int));
644 static void new_basic_block PARAMS ((void));
645 static void make_new_qty PARAMS ((unsigned int, enum machine_mode));
646 static void make_regs_eqv PARAMS ((unsigned int, unsigned int));
647 static void delete_reg_equiv PARAMS ((unsigned int));
648 static int mention_regs PARAMS ((rtx));
649 static int insert_regs PARAMS ((rtx, struct table_elt *, int));
650 static void remove_from_table PARAMS ((struct table_elt *, unsigned));
651 static struct table_elt *lookup PARAMS ((rtx, unsigned, enum machine_mode)),
652 *lookup_for_remove PARAMS ((rtx, unsigned, enum machine_mode));
653 static rtx lookup_as_function PARAMS ((rtx, enum rtx_code));
654 static struct table_elt *insert PARAMS ((rtx, struct table_elt *, unsigned,
655 enum machine_mode));
656 static void merge_equiv_classes PARAMS ((struct table_elt *,
657 struct table_elt *));
658 static void invalidate PARAMS ((rtx, enum machine_mode));
659 static int cse_rtx_varies_p PARAMS ((rtx));
660 static void remove_invalid_refs PARAMS ((unsigned int));
661 static void remove_invalid_subreg_refs PARAMS ((unsigned int, unsigned int,
662 enum machine_mode));
663 static void rehash_using_reg PARAMS ((rtx));
664 static void invalidate_memory PARAMS ((void));
665 static void invalidate_for_call PARAMS ((void));
666 static rtx use_related_value PARAMS ((rtx, struct table_elt *));
667 static unsigned canon_hash PARAMS ((rtx, enum machine_mode));
668 static unsigned canon_hash_string PARAMS ((const char *));
669 static unsigned safe_hash PARAMS ((rtx, enum machine_mode));
670 static int exp_equiv_p PARAMS ((rtx, rtx, int, int));
671 static rtx canon_reg PARAMS ((rtx, rtx));
672 static void find_best_addr PARAMS ((rtx, rtx *, enum machine_mode));
673 static enum rtx_code find_comparison_args PARAMS ((enum rtx_code, rtx *, rtx *,
674 enum machine_mode *,
675 enum machine_mode *));
676 static rtx fold_rtx PARAMS ((rtx, rtx));
677 static rtx equiv_constant PARAMS ((rtx));
678 static void record_jump_equiv PARAMS ((rtx, int));
679 static void record_jump_cond PARAMS ((enum rtx_code, enum machine_mode,
680 rtx, rtx, int));
681 static void cse_insn PARAMS ((rtx, rtx));
682 static int addr_affects_sp_p PARAMS ((rtx));
683 static void invalidate_from_clobbers PARAMS ((rtx));
684 static rtx cse_process_notes PARAMS ((rtx, rtx));
685 static void cse_around_loop PARAMS ((rtx));
686 static void invalidate_skipped_set PARAMS ((rtx, rtx, void *));
687 static void invalidate_skipped_block PARAMS ((rtx));
688 static void cse_check_loop_start PARAMS ((rtx, rtx, void *));
689 static void cse_set_around_loop PARAMS ((rtx, rtx, rtx));
690 static rtx cse_basic_block PARAMS ((rtx, rtx, struct branch_path *, int));
691 static void count_reg_usage PARAMS ((rtx, int *, rtx, int));
692 extern void dump_class PARAMS ((struct table_elt*));
693 static struct cse_reg_info * get_cse_reg_info PARAMS ((unsigned int));
694 static int check_dependence PARAMS ((rtx *, void *));
696 static void flush_hash_table PARAMS ((void));
698 /* Dump the expressions in the equivalence class indicated by CLASSP.
699 This function is used only for debugging. */
700 void
701 dump_class (classp)
702 struct table_elt *classp;
704 struct table_elt *elt;
706 fprintf (stderr, "Equivalence chain for ");
707 print_rtl (stderr, classp->exp);
708 fprintf (stderr, ": \n");
710 for (elt = classp->first_same_value; elt; elt = elt->next_same_value)
712 print_rtl (stderr, elt->exp);
713 fprintf (stderr, "\n");
717 /* Subroutine of approx_reg_cost; called through for_each_rtx. */
718 static int
719 approx_reg_cost_1 (xp, data)
720 rtx *xp;
721 void *data;
723 rtx x = *xp;
724 regset set = (regset) data;
726 if (x && GET_CODE (x) == REG)
727 SET_REGNO_REG_SET (set, REGNO (x));
728 return 0;
731 /* Return an estimate of the cost of the registers used in an rtx.
732 This is mostly the number of different REG expressions in the rtx;
733 however for some excecptions like fixed registers we use a cost of
734 0. If any other hard register reference occurs, return MAX_COST. */
736 static int
737 approx_reg_cost (x)
738 rtx x;
740 regset_head set;
741 int i;
742 int cost = 0;
743 int hardregs = 0;
745 INIT_REG_SET (&set);
746 for_each_rtx (&x, approx_reg_cost_1, (void *)&set);
748 EXECUTE_IF_SET_IN_REG_SET
749 (&set, 0, i,
751 if (! CHEAP_REGNO (i))
753 if (i < FIRST_PSEUDO_REGISTER)
754 hardregs++;
756 cost += i < FIRST_PSEUDO_REGISTER ? 2 : 1;
760 CLEAR_REG_SET (&set);
761 return hardregs && SMALL_REGISTER_CLASSES ? MAX_COST : cost;
764 /* Return a negative value if an rtx A, whose costs are given by COST_A
765 and REGCOST_A, is more desirable than an rtx B.
766 Return a positive value if A is less desirable, or 0 if the two are
767 equally good. */
768 static int
769 preferrable (cost_a, regcost_a, cost_b, regcost_b)
770 int cost_a, regcost_a, cost_b, regcost_b;
772 /* First, get rid of a cases involving expressions that are entirely
773 unwanted. */
774 if (cost_a != cost_b)
776 if (cost_a == MAX_COST)
777 return 1;
778 if (cost_b == MAX_COST)
779 return -1;
782 /* Avoid extending lifetimes of hardregs. */
783 if (regcost_a != regcost_b)
785 if (regcost_a == MAX_COST)
786 return 1;
787 if (regcost_b == MAX_COST)
788 return -1;
791 /* Normal operation costs take precedence. */
792 if (cost_a != cost_b)
793 return cost_a - cost_b;
794 /* Only if these are identical consider effects on register pressure. */
795 if (regcost_a != regcost_b)
796 return regcost_a - regcost_b;
797 return 0;
800 /* Internal function, to compute cost when X is not a register; called
801 from COST macro to keep it simple. */
803 static int
804 notreg_cost (x, outer)
805 rtx x;
806 enum rtx_code outer;
808 return ((GET_CODE (x) == SUBREG
809 && GET_CODE (SUBREG_REG (x)) == REG
810 && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
811 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
812 && (GET_MODE_SIZE (GET_MODE (x))
813 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
814 && subreg_lowpart_p (x)
815 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x)),
816 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))))
818 : rtx_cost (x, outer) * 2);
821 /* Return an estimate of the cost of computing rtx X.
822 One use is in cse, to decide which expression to keep in the hash table.
823 Another is in rtl generation, to pick the cheapest way to multiply.
824 Other uses like the latter are expected in the future. */
827 rtx_cost (x, outer_code)
828 rtx x;
829 enum rtx_code outer_code ATTRIBUTE_UNUSED;
831 register int i, j;
832 register enum rtx_code code;
833 register const char *fmt;
834 register int total;
836 if (x == 0)
837 return 0;
839 /* Compute the default costs of certain things.
840 Note that RTX_COSTS can override the defaults. */
842 code = GET_CODE (x);
843 switch (code)
845 case MULT:
846 /* Count multiplication by 2**n as a shift,
847 because if we are considering it, we would output it as a shift. */
848 if (GET_CODE (XEXP (x, 1)) == CONST_INT
849 && exact_log2 (INTVAL (XEXP (x, 1))) >= 0)
850 total = 2;
851 else
852 total = COSTS_N_INSNS (5);
853 break;
854 case DIV:
855 case UDIV:
856 case MOD:
857 case UMOD:
858 total = COSTS_N_INSNS (7);
859 break;
860 case USE:
861 /* Used in loop.c and combine.c as a marker. */
862 total = 0;
863 break;
864 default:
865 total = COSTS_N_INSNS (1);
868 switch (code)
870 case REG:
871 return 0;
873 case SUBREG:
874 /* If we can't tie these modes, make this expensive. The larger
875 the mode, the more expensive it is. */
876 if (! MODES_TIEABLE_P (GET_MODE (x), GET_MODE (SUBREG_REG (x))))
877 return COSTS_N_INSNS (2
878 + GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD);
879 break;
881 #ifdef RTX_COSTS
882 RTX_COSTS (x, code, outer_code);
883 #endif
884 #ifdef CONST_COSTS
885 CONST_COSTS (x, code, outer_code);
886 #endif
888 default:
889 #ifdef DEFAULT_RTX_COSTS
890 DEFAULT_RTX_COSTS (x, code, outer_code);
891 #endif
892 break;
895 /* Sum the costs of the sub-rtx's, plus cost of this operation,
896 which is already in total. */
898 fmt = GET_RTX_FORMAT (code);
899 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
900 if (fmt[i] == 'e')
901 total += rtx_cost (XEXP (x, i), code);
902 else if (fmt[i] == 'E')
903 for (j = 0; j < XVECLEN (x, i); j++)
904 total += rtx_cost (XVECEXP (x, i, j), code);
906 return total;
909 /* Return cost of address expression X.
910 Expect that X is propertly formed address reference. */
913 address_cost (x, mode)
914 rtx x;
915 enum machine_mode mode;
917 /* The ADDRESS_COST macro does not deal with ADDRESSOF nodes. But,
918 during CSE, such nodes are present. Using an ADDRESSOF node which
919 refers to the address of a REG is a good thing because we can then
920 turn (MEM (ADDRESSSOF (REG))) into just plain REG. */
922 if (GET_CODE (x) == ADDRESSOF && REG_P (XEXP ((x), 0)))
923 return -1;
925 /* We may be asked for cost of various unusual addresses, such as operands
926 of push instruction. It is not worthwhile to complicate writing
927 of ADDRESS_COST macro by such cases. */
929 if (!memory_address_p (mode, x))
930 return 1000;
931 #ifdef ADDRESS_COST
932 return ADDRESS_COST (x);
933 #else
934 return rtx_cost (x, MEM);
935 #endif
939 static struct cse_reg_info *
940 get_cse_reg_info (regno)
941 unsigned int regno;
943 struct cse_reg_info **hash_head = &reg_hash[REGHASH_FN (regno)];
944 struct cse_reg_info *p;
946 for (p = *hash_head; p != NULL; p = p->hash_next)
947 if (p->regno == regno)
948 break;
950 if (p == NULL)
952 /* Get a new cse_reg_info structure. */
953 if (cse_reg_info_free_list)
955 p = cse_reg_info_free_list;
956 cse_reg_info_free_list = p->next;
958 else
959 p = (struct cse_reg_info *) xmalloc (sizeof (struct cse_reg_info));
961 /* Insert into hash table. */
962 p->hash_next = *hash_head;
963 *hash_head = p;
965 /* Initialize it. */
966 p->reg_tick = 1;
967 p->reg_in_table = -1;
968 p->reg_qty = regno;
969 p->regno = regno;
970 p->next = cse_reg_info_used_list;
971 cse_reg_info_used_list = p;
972 if (!cse_reg_info_used_list_end)
973 cse_reg_info_used_list_end = p;
976 /* Cache this lookup; we tend to be looking up information about the
977 same register several times in a row. */
978 cached_regno = regno;
979 cached_cse_reg_info = p;
981 return p;
984 /* Clear the hash table and initialize each register with its own quantity,
985 for a new basic block. */
987 static void
988 new_basic_block ()
990 register int i;
992 next_qty = max_reg;
994 /* Clear out hash table state for this pass. */
996 memset ((char *) reg_hash, 0, sizeof reg_hash);
998 if (cse_reg_info_used_list)
1000 cse_reg_info_used_list_end->next = cse_reg_info_free_list;
1001 cse_reg_info_free_list = cse_reg_info_used_list;
1002 cse_reg_info_used_list = cse_reg_info_used_list_end = 0;
1004 cached_cse_reg_info = 0;
1006 CLEAR_HARD_REG_SET (hard_regs_in_table);
1008 /* The per-quantity values used to be initialized here, but it is
1009 much faster to initialize each as it is made in `make_new_qty'. */
1011 for (i = 0; i < HASH_SIZE; i++)
1013 struct table_elt *first;
1015 first = table[i];
1016 if (first != NULL)
1018 struct table_elt *last = first;
1020 table[i] = NULL;
1022 while (last->next_same_hash != NULL)
1023 last = last->next_same_hash;
1025 /* Now relink this hash entire chain into
1026 the free element list. */
1028 last->next_same_hash = free_element_chain;
1029 free_element_chain = first;
1033 prev_insn = 0;
1035 #ifdef HAVE_cc0
1036 prev_insn_cc0 = 0;
1037 #endif
1040 /* Say that register REG contains a quantity in mode MODE not in any
1041 register before and initialize that quantity. */
1043 static void
1044 make_new_qty (reg, mode)
1045 unsigned int reg;
1046 enum machine_mode mode;
1048 register int q;
1049 register struct qty_table_elem *ent;
1050 register struct reg_eqv_elem *eqv;
1052 if (next_qty >= max_qty)
1053 abort ();
1055 q = REG_QTY (reg) = next_qty++;
1056 ent = &qty_table[q];
1057 ent->first_reg = reg;
1058 ent->last_reg = reg;
1059 ent->mode = mode;
1060 ent->const_rtx = ent->const_insn = NULL_RTX;
1061 ent->comparison_code = UNKNOWN;
1063 eqv = &reg_eqv_table[reg];
1064 eqv->next = eqv->prev = -1;
1067 /* Make reg NEW equivalent to reg OLD.
1068 OLD is not changing; NEW is. */
1070 static void
1071 make_regs_eqv (new, old)
1072 unsigned int new, old;
1074 unsigned int lastr, firstr;
1075 int q = REG_QTY (old);
1076 struct qty_table_elem *ent;
1078 ent = &qty_table[q];
1080 /* Nothing should become eqv until it has a "non-invalid" qty number. */
1081 if (! REGNO_QTY_VALID_P (old))
1082 abort ();
1084 REG_QTY (new) = q;
1085 firstr = ent->first_reg;
1086 lastr = ent->last_reg;
1088 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
1089 hard regs. Among pseudos, if NEW will live longer than any other reg
1090 of the same qty, and that is beyond the current basic block,
1091 make it the new canonical replacement for this qty. */
1092 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
1093 /* Certain fixed registers might be of the class NO_REGS. This means
1094 that not only can they not be allocated by the compiler, but
1095 they cannot be used in substitutions or canonicalizations
1096 either. */
1097 && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS)
1098 && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new))
1099 || (new >= FIRST_PSEUDO_REGISTER
1100 && (firstr < FIRST_PSEUDO_REGISTER
1101 || ((uid_cuid[REGNO_LAST_UID (new)] > cse_basic_block_end
1102 || (uid_cuid[REGNO_FIRST_UID (new)]
1103 < cse_basic_block_start))
1104 && (uid_cuid[REGNO_LAST_UID (new)]
1105 > uid_cuid[REGNO_LAST_UID (firstr)]))))))
1107 reg_eqv_table[firstr].prev = new;
1108 reg_eqv_table[new].next = firstr;
1109 reg_eqv_table[new].prev = -1;
1110 ent->first_reg = new;
1112 else
1114 /* If NEW is a hard reg (known to be non-fixed), insert at end.
1115 Otherwise, insert before any non-fixed hard regs that are at the
1116 end. Registers of class NO_REGS cannot be used as an
1117 equivalent for anything. */
1118 while (lastr < FIRST_PSEUDO_REGISTER && reg_eqv_table[lastr].prev >= 0
1119 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
1120 && new >= FIRST_PSEUDO_REGISTER)
1121 lastr = reg_eqv_table[lastr].prev;
1122 reg_eqv_table[new].next = reg_eqv_table[lastr].next;
1123 if (reg_eqv_table[lastr].next >= 0)
1124 reg_eqv_table[reg_eqv_table[lastr].next].prev = new;
1125 else
1126 qty_table[q].last_reg = new;
1127 reg_eqv_table[lastr].next = new;
1128 reg_eqv_table[new].prev = lastr;
1132 /* Remove REG from its equivalence class. */
1134 static void
1135 delete_reg_equiv (reg)
1136 unsigned int reg;
1138 register struct qty_table_elem *ent;
1139 register int q = REG_QTY (reg);
1140 register int p, n;
1142 /* If invalid, do nothing. */
1143 if (q == (int) reg)
1144 return;
1146 ent = &qty_table[q];
1148 p = reg_eqv_table[reg].prev;
1149 n = reg_eqv_table[reg].next;
1151 if (n != -1)
1152 reg_eqv_table[n].prev = p;
1153 else
1154 ent->last_reg = p;
1155 if (p != -1)
1156 reg_eqv_table[p].next = n;
1157 else
1158 ent->first_reg = n;
1160 REG_QTY (reg) = reg;
1163 /* Remove any invalid expressions from the hash table
1164 that refer to any of the registers contained in expression X.
1166 Make sure that newly inserted references to those registers
1167 as subexpressions will be considered valid.
1169 mention_regs is not called when a register itself
1170 is being stored in the table.
1172 Return 1 if we have done something that may have changed the hash code
1173 of X. */
1175 static int
1176 mention_regs (x)
1177 rtx x;
1179 register enum rtx_code code;
1180 register int i, j;
1181 register const char *fmt;
1182 register int changed = 0;
1184 if (x == 0)
1185 return 0;
1187 code = GET_CODE (x);
1188 if (code == REG)
1190 unsigned int regno = REGNO (x);
1191 unsigned int endregno
1192 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
1193 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
1194 unsigned int i;
1196 for (i = regno; i < endregno; i++)
1198 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1199 remove_invalid_refs (i);
1201 REG_IN_TABLE (i) = REG_TICK (i);
1204 return 0;
1207 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1208 pseudo if they don't use overlapping words. We handle only pseudos
1209 here for simplicity. */
1210 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1211 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)
1213 unsigned int i = REGNO (SUBREG_REG (x));
1215 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1217 /* If reg_tick has been incremented more than once since
1218 reg_in_table was last set, that means that the entire
1219 register has been set before, so discard anything memorized
1220 for the entrire register, including all SUBREG expressions. */
1221 if (REG_IN_TABLE (i) != REG_TICK (i) - 1)
1222 remove_invalid_refs (i);
1223 else
1224 remove_invalid_subreg_refs (i, SUBREG_WORD (x), GET_MODE (x));
1227 REG_IN_TABLE (i) = REG_TICK (i);
1228 return 0;
1231 /* If X is a comparison or a COMPARE and either operand is a register
1232 that does not have a quantity, give it one. This is so that a later
1233 call to record_jump_equiv won't cause X to be assigned a different
1234 hash code and not found in the table after that call.
1236 It is not necessary to do this here, since rehash_using_reg can
1237 fix up the table later, but doing this here eliminates the need to
1238 call that expensive function in the most common case where the only
1239 use of the register is in the comparison. */
1241 if (code == COMPARE || GET_RTX_CLASS (code) == '<')
1243 if (GET_CODE (XEXP (x, 0)) == REG
1244 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
1245 if (insert_regs (XEXP (x, 0), NULL_PTR, 0))
1247 rehash_using_reg (XEXP (x, 0));
1248 changed = 1;
1251 if (GET_CODE (XEXP (x, 1)) == REG
1252 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
1253 if (insert_regs (XEXP (x, 1), NULL_PTR, 0))
1255 rehash_using_reg (XEXP (x, 1));
1256 changed = 1;
1260 fmt = GET_RTX_FORMAT (code);
1261 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1262 if (fmt[i] == 'e')
1263 changed |= mention_regs (XEXP (x, i));
1264 else if (fmt[i] == 'E')
1265 for (j = 0; j < XVECLEN (x, i); j++)
1266 changed |= mention_regs (XVECEXP (x, i, j));
1268 return changed;
1271 /* Update the register quantities for inserting X into the hash table
1272 with a value equivalent to CLASSP.
1273 (If the class does not contain a REG, it is irrelevant.)
1274 If MODIFIED is nonzero, X is a destination; it is being modified.
1275 Note that delete_reg_equiv should be called on a register
1276 before insert_regs is done on that register with MODIFIED != 0.
1278 Nonzero value means that elements of reg_qty have changed
1279 so X's hash code may be different. */
1281 static int
1282 insert_regs (x, classp, modified)
1283 rtx x;
1284 struct table_elt *classp;
1285 int modified;
1287 if (GET_CODE (x) == REG)
1289 unsigned int regno = REGNO (x);
1290 int qty_valid;
1292 /* If REGNO is in the equivalence table already but is of the
1293 wrong mode for that equivalence, don't do anything here. */
1295 qty_valid = REGNO_QTY_VALID_P (regno);
1296 if (qty_valid)
1298 struct qty_table_elem *ent = &qty_table[REG_QTY (regno)];
1300 if (ent->mode != GET_MODE (x))
1301 return 0;
1304 if (modified || ! qty_valid)
1306 if (classp)
1307 for (classp = classp->first_same_value;
1308 classp != 0;
1309 classp = classp->next_same_value)
1310 if (GET_CODE (classp->exp) == REG
1311 && GET_MODE (classp->exp) == GET_MODE (x))
1313 make_regs_eqv (regno, REGNO (classp->exp));
1314 return 1;
1317 /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
1318 than REG_IN_TABLE to find out if there was only a single preceding
1319 invalidation - for the SUBREG - or another one, which would be
1320 for the full register. However, if we find here that REG_TICK
1321 indicates that the register is invalid, it means that it has
1322 been invalidated in a separate operation. The SUBREG might be used
1323 now (then this is a recursive call), or we might use the full REG
1324 now and a SUBREG of it later. So bump up REG_TICK so that
1325 mention_regs will do the right thing. */
1326 if (! modified
1327 && REG_IN_TABLE (regno) >= 0
1328 && REG_TICK (regno) == REG_IN_TABLE (regno) + 1)
1329 REG_TICK (regno)++;
1330 make_new_qty (regno, GET_MODE (x));
1331 return 1;
1334 return 0;
1337 /* If X is a SUBREG, we will likely be inserting the inner register in the
1338 table. If that register doesn't have an assigned quantity number at
1339 this point but does later, the insertion that we will be doing now will
1340 not be accessible because its hash code will have changed. So assign
1341 a quantity number now. */
1343 else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1344 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1346 insert_regs (SUBREG_REG (x), NULL_PTR, 0);
1347 mention_regs (x);
1348 return 1;
1350 else
1351 return mention_regs (x);
1354 /* Look in or update the hash table. */
1356 /* Remove table element ELT from use in the table.
1357 HASH is its hash code, made using the HASH macro.
1358 It's an argument because often that is known in advance
1359 and we save much time not recomputing it. */
1361 static void
1362 remove_from_table (elt, hash)
1363 register struct table_elt *elt;
1364 unsigned hash;
1366 if (elt == 0)
1367 return;
1369 /* Mark this element as removed. See cse_insn. */
1370 elt->first_same_value = 0;
1372 /* Remove the table element from its equivalence class. */
1375 register struct table_elt *prev = elt->prev_same_value;
1376 register struct table_elt *next = elt->next_same_value;
1378 if (next)
1379 next->prev_same_value = prev;
1381 if (prev)
1382 prev->next_same_value = next;
1383 else
1385 register struct table_elt *newfirst = next;
1386 while (next)
1388 next->first_same_value = newfirst;
1389 next = next->next_same_value;
1394 /* Remove the table element from its hash bucket. */
1397 register struct table_elt *prev = elt->prev_same_hash;
1398 register struct table_elt *next = elt->next_same_hash;
1400 if (next)
1401 next->prev_same_hash = prev;
1403 if (prev)
1404 prev->next_same_hash = next;
1405 else if (table[hash] == elt)
1406 table[hash] = next;
1407 else
1409 /* This entry is not in the proper hash bucket. This can happen
1410 when two classes were merged by `merge_equiv_classes'. Search
1411 for the hash bucket that it heads. This happens only very
1412 rarely, so the cost is acceptable. */
1413 for (hash = 0; hash < HASH_SIZE; hash++)
1414 if (table[hash] == elt)
1415 table[hash] = next;
1419 /* Remove the table element from its related-value circular chain. */
1421 if (elt->related_value != 0 && elt->related_value != elt)
1423 register struct table_elt *p = elt->related_value;
1425 while (p->related_value != elt)
1426 p = p->related_value;
1427 p->related_value = elt->related_value;
1428 if (p->related_value == p)
1429 p->related_value = 0;
1432 /* Now add it to the free element chain. */
1433 elt->next_same_hash = free_element_chain;
1434 free_element_chain = elt;
1437 /* Look up X in the hash table and return its table element,
1438 or 0 if X is not in the table.
1440 MODE is the machine-mode of X, or if X is an integer constant
1441 with VOIDmode then MODE is the mode with which X will be used.
1443 Here we are satisfied to find an expression whose tree structure
1444 looks like X. */
1446 static struct table_elt *
1447 lookup (x, hash, mode)
1448 rtx x;
1449 unsigned hash;
1450 enum machine_mode mode;
1452 register struct table_elt *p;
1454 for (p = table[hash]; p; p = p->next_same_hash)
1455 if (mode == p->mode && ((x == p->exp && GET_CODE (x) == REG)
1456 || exp_equiv_p (x, p->exp, GET_CODE (x) != REG, 0)))
1457 return p;
1459 return 0;
1462 /* Like `lookup' but don't care whether the table element uses invalid regs.
1463 Also ignore discrepancies in the machine mode of a register. */
1465 static struct table_elt *
1466 lookup_for_remove (x, hash, mode)
1467 rtx x;
1468 unsigned hash;
1469 enum machine_mode mode;
1471 register struct table_elt *p;
1473 if (GET_CODE (x) == REG)
1475 unsigned int regno = REGNO (x);
1477 /* Don't check the machine mode when comparing registers;
1478 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1479 for (p = table[hash]; p; p = p->next_same_hash)
1480 if (GET_CODE (p->exp) == REG
1481 && REGNO (p->exp) == regno)
1482 return p;
1484 else
1486 for (p = table[hash]; p; p = p->next_same_hash)
1487 if (mode == p->mode && (x == p->exp || exp_equiv_p (x, p->exp, 0, 0)))
1488 return p;
1491 return 0;
1494 /* Look for an expression equivalent to X and with code CODE.
1495 If one is found, return that expression. */
1497 static rtx
1498 lookup_as_function (x, code)
1499 rtx x;
1500 enum rtx_code code;
1502 register struct table_elt *p
1503 = lookup (x, safe_hash (x, VOIDmode) & HASH_MASK, GET_MODE (x));
1505 /* If we are looking for a CONST_INT, the mode doesn't really matter, as
1506 long as we are narrowing. So if we looked in vain for a mode narrower
1507 than word_mode before, look for word_mode now. */
1508 if (p == 0 && code == CONST_INT
1509 && GET_MODE_SIZE (GET_MODE (x)) < GET_MODE_SIZE (word_mode))
1511 x = copy_rtx (x);
1512 PUT_MODE (x, word_mode);
1513 p = lookup (x, safe_hash (x, VOIDmode) & HASH_MASK, word_mode);
1516 if (p == 0)
1517 return 0;
1519 for (p = p->first_same_value; p; p = p->next_same_value)
1520 if (GET_CODE (p->exp) == code
1521 /* Make sure this is a valid entry in the table. */
1522 && exp_equiv_p (p->exp, p->exp, 1, 0))
1523 return p->exp;
1525 return 0;
1528 /* Insert X in the hash table, assuming HASH is its hash code
1529 and CLASSP is an element of the class it should go in
1530 (or 0 if a new class should be made).
1531 It is inserted at the proper position to keep the class in
1532 the order cheapest first.
1534 MODE is the machine-mode of X, or if X is an integer constant
1535 with VOIDmode then MODE is the mode with which X will be used.
1537 For elements of equal cheapness, the most recent one
1538 goes in front, except that the first element in the list
1539 remains first unless a cheaper element is added. The order of
1540 pseudo-registers does not matter, as canon_reg will be called to
1541 find the cheapest when a register is retrieved from the table.
1543 The in_memory field in the hash table element is set to 0.
1544 The caller must set it nonzero if appropriate.
1546 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1547 and if insert_regs returns a nonzero value
1548 you must then recompute its hash code before calling here.
1550 If necessary, update table showing constant values of quantities. */
1552 #define CHEAPER(X, Y) \
1553 (preferrable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0)
1555 static struct table_elt *
1556 insert (x, classp, hash, mode)
1557 register rtx x;
1558 register struct table_elt *classp;
1559 unsigned hash;
1560 enum machine_mode mode;
1562 register struct table_elt *elt;
1564 /* If X is a register and we haven't made a quantity for it,
1565 something is wrong. */
1566 if (GET_CODE (x) == REG && ! REGNO_QTY_VALID_P (REGNO (x)))
1567 abort ();
1569 /* If X is a hard register, show it is being put in the table. */
1570 if (GET_CODE (x) == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
1572 unsigned int regno = REGNO (x);
1573 unsigned int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1574 unsigned int i;
1576 for (i = regno; i < endregno; i++)
1577 SET_HARD_REG_BIT (hard_regs_in_table, i);
1580 /* If X is a label, show we recorded it. */
1581 if (GET_CODE (x) == LABEL_REF
1582 || (GET_CODE (x) == CONST && GET_CODE (XEXP (x, 0)) == PLUS
1583 && GET_CODE (XEXP (XEXP (x, 0), 0)) == LABEL_REF))
1584 recorded_label_ref = 1;
1586 /* Put an element for X into the right hash bucket. */
1588 elt = free_element_chain;
1589 if (elt)
1590 free_element_chain = elt->next_same_hash;
1591 else
1593 n_elements_made++;
1594 elt = (struct table_elt *) xmalloc (sizeof (struct table_elt));
1597 elt->exp = x;
1598 elt->canon_exp = NULL_RTX;
1599 elt->cost = COST (x);
1600 elt->regcost = approx_reg_cost (x);
1601 elt->next_same_value = 0;
1602 elt->prev_same_value = 0;
1603 elt->next_same_hash = table[hash];
1604 elt->prev_same_hash = 0;
1605 elt->related_value = 0;
1606 elt->in_memory = 0;
1607 elt->mode = mode;
1608 elt->is_const = (CONSTANT_P (x)
1609 /* GNU C++ takes advantage of this for `this'
1610 (and other const values). */
1611 || (RTX_UNCHANGING_P (x)
1612 && GET_CODE (x) == REG
1613 && REGNO (x) >= FIRST_PSEUDO_REGISTER)
1614 || FIXED_BASE_PLUS_P (x));
1616 if (table[hash])
1617 table[hash]->prev_same_hash = elt;
1618 table[hash] = elt;
1620 /* Put it into the proper value-class. */
1621 if (classp)
1623 classp = classp->first_same_value;
1624 if (CHEAPER (elt, classp))
1625 /* Insert at the head of the class */
1627 register struct table_elt *p;
1628 elt->next_same_value = classp;
1629 classp->prev_same_value = elt;
1630 elt->first_same_value = elt;
1632 for (p = classp; p; p = p->next_same_value)
1633 p->first_same_value = elt;
1635 else
1637 /* Insert not at head of the class. */
1638 /* Put it after the last element cheaper than X. */
1639 register struct table_elt *p, *next;
1641 for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
1642 p = next);
1644 /* Put it after P and before NEXT. */
1645 elt->next_same_value = next;
1646 if (next)
1647 next->prev_same_value = elt;
1649 elt->prev_same_value = p;
1650 p->next_same_value = elt;
1651 elt->first_same_value = classp;
1654 else
1655 elt->first_same_value = elt;
1657 /* If this is a constant being set equivalent to a register or a register
1658 being set equivalent to a constant, note the constant equivalence.
1660 If this is a constant, it cannot be equivalent to a different constant,
1661 and a constant is the only thing that can be cheaper than a register. So
1662 we know the register is the head of the class (before the constant was
1663 inserted).
1665 If this is a register that is not already known equivalent to a
1666 constant, we must check the entire class.
1668 If this is a register that is already known equivalent to an insn,
1669 update the qtys `const_insn' to show that `this_insn' is the latest
1670 insn making that quantity equivalent to the constant. */
1672 if (elt->is_const && classp && GET_CODE (classp->exp) == REG
1673 && GET_CODE (x) != REG)
1675 int exp_q = REG_QTY (REGNO (classp->exp));
1676 struct qty_table_elem *exp_ent = &qty_table[exp_q];
1678 exp_ent->const_rtx = gen_lowpart_if_possible (exp_ent->mode, x);
1679 exp_ent->const_insn = this_insn;
1682 else if (GET_CODE (x) == REG
1683 && classp
1684 && ! qty_table[REG_QTY (REGNO (x))].const_rtx
1685 && ! elt->is_const)
1687 register struct table_elt *p;
1689 for (p = classp; p != 0; p = p->next_same_value)
1691 if (p->is_const && GET_CODE (p->exp) != REG)
1693 int x_q = REG_QTY (REGNO (x));
1694 struct qty_table_elem *x_ent = &qty_table[x_q];
1696 x_ent->const_rtx
1697 = gen_lowpart_if_possible (GET_MODE (x), p->exp);
1698 x_ent->const_insn = this_insn;
1699 break;
1704 else if (GET_CODE (x) == REG
1705 && qty_table[REG_QTY (REGNO (x))].const_rtx
1706 && GET_MODE (x) == qty_table[REG_QTY (REGNO (x))].mode)
1707 qty_table[REG_QTY (REGNO (x))].const_insn = this_insn;
1709 /* If this is a constant with symbolic value,
1710 and it has a term with an explicit integer value,
1711 link it up with related expressions. */
1712 if (GET_CODE (x) == CONST)
1714 rtx subexp = get_related_value (x);
1715 unsigned subhash;
1716 struct table_elt *subelt, *subelt_prev;
1718 if (subexp != 0)
1720 /* Get the integer-free subexpression in the hash table. */
1721 subhash = safe_hash (subexp, mode) & HASH_MASK;
1722 subelt = lookup (subexp, subhash, mode);
1723 if (subelt == 0)
1724 subelt = insert (subexp, NULL_PTR, subhash, mode);
1725 /* Initialize SUBELT's circular chain if it has none. */
1726 if (subelt->related_value == 0)
1727 subelt->related_value = subelt;
1728 /* Find the element in the circular chain that precedes SUBELT. */
1729 subelt_prev = subelt;
1730 while (subelt_prev->related_value != subelt)
1731 subelt_prev = subelt_prev->related_value;
1732 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1733 This way the element that follows SUBELT is the oldest one. */
1734 elt->related_value = subelt_prev->related_value;
1735 subelt_prev->related_value = elt;
1739 return elt;
1742 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1743 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1744 the two classes equivalent.
1746 CLASS1 will be the surviving class; CLASS2 should not be used after this
1747 call.
1749 Any invalid entries in CLASS2 will not be copied. */
1751 static void
1752 merge_equiv_classes (class1, class2)
1753 struct table_elt *class1, *class2;
1755 struct table_elt *elt, *next, *new;
1757 /* Ensure we start with the head of the classes. */
1758 class1 = class1->first_same_value;
1759 class2 = class2->first_same_value;
1761 /* If they were already equal, forget it. */
1762 if (class1 == class2)
1763 return;
1765 for (elt = class2; elt; elt = next)
1767 unsigned int hash;
1768 rtx exp = elt->exp;
1769 enum machine_mode mode = elt->mode;
1771 next = elt->next_same_value;
1773 /* Remove old entry, make a new one in CLASS1's class.
1774 Don't do this for invalid entries as we cannot find their
1775 hash code (it also isn't necessary). */
1776 if (GET_CODE (exp) == REG || exp_equiv_p (exp, exp, 1, 0))
1778 hash_arg_in_memory = 0;
1779 hash = HASH (exp, mode);
1781 if (GET_CODE (exp) == REG)
1782 delete_reg_equiv (REGNO (exp));
1784 remove_from_table (elt, hash);
1786 if (insert_regs (exp, class1, 0))
1788 rehash_using_reg (exp);
1789 hash = HASH (exp, mode);
1791 new = insert (exp, class1, hash, mode);
1792 new->in_memory = hash_arg_in_memory;
1797 /* Flush the entire hash table. */
1799 static void
1800 flush_hash_table ()
1802 int i;
1803 struct table_elt *p;
1805 for (i = 0; i < HASH_SIZE; i++)
1806 for (p = table[i]; p; p = table[i])
1808 /* Note that invalidate can remove elements
1809 after P in the current hash chain. */
1810 if (GET_CODE (p->exp) == REG)
1811 invalidate (p->exp, p->mode);
1812 else
1813 remove_from_table (p, i);
1817 /* Function called for each rtx to check whether true dependence exist. */
1818 struct check_dependence_data
1820 enum machine_mode mode;
1821 rtx exp;
1823 static int
1824 check_dependence (x, data)
1825 rtx *x;
1826 void *data;
1828 struct check_dependence_data *d = (struct check_dependence_data *) data;
1829 if (*x && GET_CODE (*x) == MEM)
1830 return true_dependence (d->exp, d->mode, *x, cse_rtx_varies_p);
1831 else
1832 return 0;
1835 /* Remove from the hash table, or mark as invalid, all expressions whose
1836 values could be altered by storing in X. X is a register, a subreg, or
1837 a memory reference with nonvarying address (because, when a memory
1838 reference with a varying address is stored in, all memory references are
1839 removed by invalidate_memory so specific invalidation is superfluous).
1840 FULL_MODE, if not VOIDmode, indicates that this much should be
1841 invalidated instead of just the amount indicated by the mode of X. This
1842 is only used for bitfield stores into memory.
1844 A nonvarying address may be just a register or just a symbol reference,
1845 or it may be either of those plus a numeric offset. */
1847 static void
1848 invalidate (x, full_mode)
1849 rtx x;
1850 enum machine_mode full_mode;
1852 register int i;
1853 register struct table_elt *p;
1855 switch (GET_CODE (x))
1857 case REG:
1859 /* If X is a register, dependencies on its contents are recorded
1860 through the qty number mechanism. Just change the qty number of
1861 the register, mark it as invalid for expressions that refer to it,
1862 and remove it itself. */
1863 unsigned int regno = REGNO (x);
1864 unsigned int hash = HASH (x, GET_MODE (x));
1866 /* Remove REGNO from any quantity list it might be on and indicate
1867 that its value might have changed. If it is a pseudo, remove its
1868 entry from the hash table.
1870 For a hard register, we do the first two actions above for any
1871 additional hard registers corresponding to X. Then, if any of these
1872 registers are in the table, we must remove any REG entries that
1873 overlap these registers. */
1875 delete_reg_equiv (regno);
1876 REG_TICK (regno)++;
1878 if (regno >= FIRST_PSEUDO_REGISTER)
1880 /* Because a register can be referenced in more than one mode,
1881 we might have to remove more than one table entry. */
1882 struct table_elt *elt;
1884 while ((elt = lookup_for_remove (x, hash, GET_MODE (x))))
1885 remove_from_table (elt, hash);
1887 else
1889 HOST_WIDE_INT in_table
1890 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1891 unsigned int endregno
1892 = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1893 unsigned int tregno, tendregno, rn;
1894 register struct table_elt *p, *next;
1896 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1898 for (rn = regno + 1; rn < endregno; rn++)
1900 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, rn);
1901 CLEAR_HARD_REG_BIT (hard_regs_in_table, rn);
1902 delete_reg_equiv (rn);
1903 REG_TICK (rn)++;
1906 if (in_table)
1907 for (hash = 0; hash < HASH_SIZE; hash++)
1908 for (p = table[hash]; p; p = next)
1910 next = p->next_same_hash;
1912 if (GET_CODE (p->exp) != REG
1913 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1914 continue;
1916 tregno = REGNO (p->exp);
1917 tendregno
1918 = tregno + HARD_REGNO_NREGS (tregno, GET_MODE (p->exp));
1919 if (tendregno > regno && tregno < endregno)
1920 remove_from_table (p, hash);
1924 return;
1926 case SUBREG:
1927 invalidate (SUBREG_REG (x), VOIDmode);
1928 return;
1930 case PARALLEL:
1931 for (i = XVECLEN (x, 0) - 1; i >= 0; --i)
1932 invalidate (XVECEXP (x, 0, i), VOIDmode);
1933 return;
1935 case EXPR_LIST:
1936 /* This is part of a disjoint return value; extract the location in
1937 question ignoring the offset. */
1938 invalidate (XEXP (x, 0), VOIDmode);
1939 return;
1941 case MEM:
1942 /* Calculate the canonical version of X here so that
1943 true_dependence doesn't generate new RTL for X on each call. */
1944 x = canon_rtx (x);
1946 /* Remove all hash table elements that refer to overlapping pieces of
1947 memory. */
1948 if (full_mode == VOIDmode)
1949 full_mode = GET_MODE (x);
1951 for (i = 0; i < HASH_SIZE; i++)
1953 register struct table_elt *next;
1955 for (p = table[i]; p; p = next)
1957 next = p->next_same_hash;
1958 if (p->in_memory)
1960 struct check_dependence_data d;
1962 /* Just canonicalize the expression once;
1963 otherwise each time we call invalidate
1964 true_dependence will canonicalize the
1965 expression again. */
1966 if (!p->canon_exp)
1967 p->canon_exp = canon_rtx (p->exp);
1968 d.exp = x;
1969 d.mode = full_mode;
1970 if (for_each_rtx (&p->canon_exp, check_dependence, &d))
1971 remove_from_table (p, i);
1975 return;
1977 default:
1978 abort ();
1982 /* Remove all expressions that refer to register REGNO,
1983 since they are already invalid, and we are about to
1984 mark that register valid again and don't want the old
1985 expressions to reappear as valid. */
1987 static void
1988 remove_invalid_refs (regno)
1989 unsigned int regno;
1991 unsigned int i;
1992 struct table_elt *p, *next;
1994 for (i = 0; i < HASH_SIZE; i++)
1995 for (p = table[i]; p; p = next)
1997 next = p->next_same_hash;
1998 if (GET_CODE (p->exp) != REG
1999 && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR))
2000 remove_from_table (p, i);
2004 /* Likewise for a subreg with subreg_reg WORD and mode MODE. */
2005 static void
2006 remove_invalid_subreg_refs (regno, word, mode)
2007 unsigned int regno;
2008 unsigned int word;
2009 enum machine_mode mode;
2011 unsigned int i;
2012 struct table_elt *p, *next;
2013 unsigned int end = word + (GET_MODE_SIZE (mode) - 1) / UNITS_PER_WORD;
2015 for (i = 0; i < HASH_SIZE; i++)
2016 for (p = table[i]; p; p = next)
2018 rtx exp;
2019 next = p->next_same_hash;
2021 exp = p->exp;
2022 if (GET_CODE (p->exp) != REG
2023 && (GET_CODE (exp) != SUBREG
2024 || GET_CODE (SUBREG_REG (exp)) != REG
2025 || REGNO (SUBREG_REG (exp)) != regno
2026 || (((SUBREG_WORD (exp)
2027 + (GET_MODE_SIZE (GET_MODE (exp)) - 1) / UNITS_PER_WORD)
2028 >= word)
2029 && SUBREG_WORD (exp) <= end))
2030 && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR))
2031 remove_from_table (p, i);
2035 /* Recompute the hash codes of any valid entries in the hash table that
2036 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
2038 This is called when we make a jump equivalence. */
2040 static void
2041 rehash_using_reg (x)
2042 rtx x;
2044 unsigned int i;
2045 struct table_elt *p, *next;
2046 unsigned hash;
2048 if (GET_CODE (x) == SUBREG)
2049 x = SUBREG_REG (x);
2051 /* If X is not a register or if the register is known not to be in any
2052 valid entries in the table, we have no work to do. */
2054 if (GET_CODE (x) != REG
2055 || REG_IN_TABLE (REGNO (x)) < 0
2056 || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x)))
2057 return;
2059 /* Scan all hash chains looking for valid entries that mention X.
2060 If we find one and it is in the wrong hash chain, move it. We can skip
2061 objects that are registers, since they are handled specially. */
2063 for (i = 0; i < HASH_SIZE; i++)
2064 for (p = table[i]; p; p = next)
2066 next = p->next_same_hash;
2067 if (GET_CODE (p->exp) != REG && reg_mentioned_p (x, p->exp)
2068 && exp_equiv_p (p->exp, p->exp, 1, 0)
2069 && i != (hash = safe_hash (p->exp, p->mode) & HASH_MASK))
2071 if (p->next_same_hash)
2072 p->next_same_hash->prev_same_hash = p->prev_same_hash;
2074 if (p->prev_same_hash)
2075 p->prev_same_hash->next_same_hash = p->next_same_hash;
2076 else
2077 table[i] = p->next_same_hash;
2079 p->next_same_hash = table[hash];
2080 p->prev_same_hash = 0;
2081 if (table[hash])
2082 table[hash]->prev_same_hash = p;
2083 table[hash] = p;
2088 /* Remove from the hash table any expression that is a call-clobbered
2089 register. Also update their TICK values. */
2091 static void
2092 invalidate_for_call ()
2094 unsigned int regno, endregno;
2095 unsigned int i;
2096 unsigned hash;
2097 struct table_elt *p, *next;
2098 int in_table = 0;
2100 /* Go through all the hard registers. For each that is clobbered in
2101 a CALL_INSN, remove the register from quantity chains and update
2102 reg_tick if defined. Also see if any of these registers is currently
2103 in the table. */
2105 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
2106 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
2108 delete_reg_equiv (regno);
2109 if (REG_TICK (regno) >= 0)
2110 REG_TICK (regno)++;
2112 in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
2115 /* In the case where we have no call-clobbered hard registers in the
2116 table, we are done. Otherwise, scan the table and remove any
2117 entry that overlaps a call-clobbered register. */
2119 if (in_table)
2120 for (hash = 0; hash < HASH_SIZE; hash++)
2121 for (p = table[hash]; p; p = next)
2123 next = p->next_same_hash;
2125 if (GET_CODE (p->exp) != REG
2126 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
2127 continue;
2129 regno = REGNO (p->exp);
2130 endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (p->exp));
2132 for (i = regno; i < endregno; i++)
2133 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
2135 remove_from_table (p, hash);
2136 break;
2141 /* Given an expression X of type CONST,
2142 and ELT which is its table entry (or 0 if it
2143 is not in the hash table),
2144 return an alternate expression for X as a register plus integer.
2145 If none can be found, return 0. */
2147 static rtx
2148 use_related_value (x, elt)
2149 rtx x;
2150 struct table_elt *elt;
2152 register struct table_elt *relt = 0;
2153 register struct table_elt *p, *q;
2154 HOST_WIDE_INT offset;
2156 /* First, is there anything related known?
2157 If we have a table element, we can tell from that.
2158 Otherwise, must look it up. */
2160 if (elt != 0 && elt->related_value != 0)
2161 relt = elt;
2162 else if (elt == 0 && GET_CODE (x) == CONST)
2164 rtx subexp = get_related_value (x);
2165 if (subexp != 0)
2166 relt = lookup (subexp,
2167 safe_hash (subexp, GET_MODE (subexp)) & HASH_MASK,
2168 GET_MODE (subexp));
2171 if (relt == 0)
2172 return 0;
2174 /* Search all related table entries for one that has an
2175 equivalent register. */
2177 p = relt;
2178 while (1)
2180 /* This loop is strange in that it is executed in two different cases.
2181 The first is when X is already in the table. Then it is searching
2182 the RELATED_VALUE list of X's class (RELT). The second case is when
2183 X is not in the table. Then RELT points to a class for the related
2184 value.
2186 Ensure that, whatever case we are in, that we ignore classes that have
2187 the same value as X. */
2189 if (rtx_equal_p (x, p->exp))
2190 q = 0;
2191 else
2192 for (q = p->first_same_value; q; q = q->next_same_value)
2193 if (GET_CODE (q->exp) == REG)
2194 break;
2196 if (q)
2197 break;
2199 p = p->related_value;
2201 /* We went all the way around, so there is nothing to be found.
2202 Alternatively, perhaps RELT was in the table for some other reason
2203 and it has no related values recorded. */
2204 if (p == relt || p == 0)
2205 break;
2208 if (q == 0)
2209 return 0;
2211 offset = (get_integer_term (x) - get_integer_term (p->exp));
2212 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2213 return plus_constant (q->exp, offset);
2216 /* Hash a string. Just add its bytes up. */
2217 static inline unsigned
2218 canon_hash_string (ps)
2219 const char *ps;
2221 unsigned hash = 0;
2222 const unsigned char *p = (const unsigned char *)ps;
2224 if (p)
2225 while (*p)
2226 hash += *p++;
2228 return hash;
2231 /* Hash an rtx. We are careful to make sure the value is never negative.
2232 Equivalent registers hash identically.
2233 MODE is used in hashing for CONST_INTs only;
2234 otherwise the mode of X is used.
2236 Store 1 in do_not_record if any subexpression is volatile.
2238 Store 1 in hash_arg_in_memory if X contains a MEM rtx
2239 which does not have the RTX_UNCHANGING_P bit set.
2241 Note that cse_insn knows that the hash code of a MEM expression
2242 is just (int) MEM plus the hash code of the address. */
2244 static unsigned
2245 canon_hash (x, mode)
2246 rtx x;
2247 enum machine_mode mode;
2249 register int i, j;
2250 register unsigned hash = 0;
2251 register enum rtx_code code;
2252 register const char *fmt;
2254 /* repeat is used to turn tail-recursion into iteration. */
2255 repeat:
2256 if (x == 0)
2257 return hash;
2259 code = GET_CODE (x);
2260 switch (code)
2262 case REG:
2264 unsigned int regno = REGNO (x);
2266 /* On some machines, we can't record any non-fixed hard register,
2267 because extending its life will cause reload problems. We
2268 consider ap, fp, and sp to be fixed for this purpose.
2270 We also consider CCmode registers to be fixed for this purpose;
2271 failure to do so leads to failure to simplify 0<100 type of
2272 conditionals.
2274 On all machines, we can't record any global registers. */
2276 if (regno < FIRST_PSEUDO_REGISTER
2277 && (global_regs[regno]
2278 || (SMALL_REGISTER_CLASSES
2279 && ! fixed_regs[regno]
2280 && regno != FRAME_POINTER_REGNUM
2281 && regno != HARD_FRAME_POINTER_REGNUM
2282 && regno != ARG_POINTER_REGNUM
2283 && regno != STACK_POINTER_REGNUM
2284 && GET_MODE_CLASS (GET_MODE (x)) != MODE_CC)))
2286 do_not_record = 1;
2287 return 0;
2290 hash += ((unsigned) REG << 7) + (unsigned) REG_QTY (regno);
2291 return hash;
2294 /* We handle SUBREG of a REG specially because the underlying
2295 reg changes its hash value with every value change; we don't
2296 want to have to forget unrelated subregs when one subreg changes. */
2297 case SUBREG:
2299 if (GET_CODE (SUBREG_REG (x)) == REG)
2301 hash += (((unsigned) SUBREG << 7)
2302 + REGNO (SUBREG_REG (x)) + SUBREG_WORD (x));
2303 return hash;
2305 break;
2308 case CONST_INT:
2310 unsigned HOST_WIDE_INT tem = INTVAL (x);
2311 hash += ((unsigned) CONST_INT << 7) + (unsigned) mode + tem;
2312 return hash;
2315 case CONST_DOUBLE:
2316 /* This is like the general case, except that it only counts
2317 the integers representing the constant. */
2318 hash += (unsigned) code + (unsigned) GET_MODE (x);
2319 if (GET_MODE (x) != VOIDmode)
2320 for (i = 2; i < GET_RTX_LENGTH (CONST_DOUBLE); i++)
2322 unsigned HOST_WIDE_INT tem = XWINT (x, i);
2323 hash += tem;
2325 else
2326 hash += ((unsigned) CONST_DOUBLE_LOW (x)
2327 + (unsigned) CONST_DOUBLE_HIGH (x));
2328 return hash;
2330 /* Assume there is only one rtx object for any given label. */
2331 case LABEL_REF:
2332 hash += ((unsigned) LABEL_REF << 7) + (unsigned long) XEXP (x, 0);
2333 return hash;
2335 case SYMBOL_REF:
2336 hash += ((unsigned) SYMBOL_REF << 7) + (unsigned long) XSTR (x, 0);
2337 return hash;
2339 case MEM:
2340 /* We don't record if marked volatile or if BLKmode since we don't
2341 know the size of the move. */
2342 if (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode)
2344 do_not_record = 1;
2345 return 0;
2347 if (! RTX_UNCHANGING_P (x) || FIXED_BASE_PLUS_P (XEXP (x, 0)))
2349 hash_arg_in_memory = 1;
2351 /* Now that we have already found this special case,
2352 might as well speed it up as much as possible. */
2353 hash += (unsigned) MEM;
2354 x = XEXP (x, 0);
2355 goto repeat;
2357 case USE:
2358 /* A USE that mentions non-volatile memory needs special
2359 handling since the MEM may be BLKmode which normally
2360 prevents an entry from being made. Pure calls are
2361 marked by a USE which mentions BLKmode memory. */
2362 if (GET_CODE (XEXP (x, 0)) == MEM
2363 && ! MEM_VOLATILE_P (XEXP (x, 0)))
2365 hash += (unsigned)USE;
2366 x = XEXP (x, 0);
2368 if (! RTX_UNCHANGING_P (x) || FIXED_BASE_PLUS_P (XEXP (x, 0)))
2369 hash_arg_in_memory = 1;
2371 /* Now that we have already found this special case,
2372 might as well speed it up as much as possible. */
2373 hash += (unsigned) MEM;
2374 x = XEXP (x, 0);
2375 goto repeat;
2377 break;
2379 case PRE_DEC:
2380 case PRE_INC:
2381 case POST_DEC:
2382 case POST_INC:
2383 case PRE_MODIFY:
2384 case POST_MODIFY:
2385 case PC:
2386 case CC0:
2387 case CALL:
2388 case UNSPEC_VOLATILE:
2389 do_not_record = 1;
2390 return 0;
2392 case ASM_OPERANDS:
2393 if (MEM_VOLATILE_P (x))
2395 do_not_record = 1;
2396 return 0;
2398 else
2400 /* We don't want to take the filename and line into account. */
2401 hash += (unsigned) code + (unsigned) GET_MODE (x)
2402 + canon_hash_string (ASM_OPERANDS_TEMPLATE (x))
2403 + canon_hash_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x))
2404 + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x);
2406 if (ASM_OPERANDS_INPUT_LENGTH (x))
2408 for (i = 1; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
2410 hash += (canon_hash (ASM_OPERANDS_INPUT (x, i),
2411 GET_MODE (ASM_OPERANDS_INPUT (x, i)))
2412 + canon_hash_string (ASM_OPERANDS_INPUT_CONSTRAINT
2413 (x, i)));
2416 hash += canon_hash_string (ASM_OPERANDS_INPUT_CONSTRAINT (x, 0));
2417 x = ASM_OPERANDS_INPUT (x, 0);
2418 mode = GET_MODE (x);
2419 goto repeat;
2422 return hash;
2424 break;
2426 default:
2427 break;
2430 i = GET_RTX_LENGTH (code) - 1;
2431 hash += (unsigned) code + (unsigned) GET_MODE (x);
2432 fmt = GET_RTX_FORMAT (code);
2433 for (; i >= 0; i--)
2435 if (fmt[i] == 'e')
2437 rtx tem = XEXP (x, i);
2439 /* If we are about to do the last recursive call
2440 needed at this level, change it into iteration.
2441 This function is called enough to be worth it. */
2442 if (i == 0)
2444 x = tem;
2445 goto repeat;
2447 hash += canon_hash (tem, 0);
2449 else if (fmt[i] == 'E')
2450 for (j = 0; j < XVECLEN (x, i); j++)
2451 hash += canon_hash (XVECEXP (x, i, j), 0);
2452 else if (fmt[i] == 's')
2453 hash += canon_hash_string (XSTR (x, i));
2454 else if (fmt[i] == 'i')
2456 register unsigned tem = XINT (x, i);
2457 hash += tem;
2459 else if (fmt[i] == '0' || fmt[i] == 't')
2460 /* Unused. */
2462 else
2463 abort ();
2465 return hash;
2468 /* Like canon_hash but with no side effects. */
2470 static unsigned
2471 safe_hash (x, mode)
2472 rtx x;
2473 enum machine_mode mode;
2475 int save_do_not_record = do_not_record;
2476 int save_hash_arg_in_memory = hash_arg_in_memory;
2477 unsigned hash = canon_hash (x, mode);
2478 hash_arg_in_memory = save_hash_arg_in_memory;
2479 do_not_record = save_do_not_record;
2480 return hash;
2483 /* Return 1 iff X and Y would canonicalize into the same thing,
2484 without actually constructing the canonicalization of either one.
2485 If VALIDATE is nonzero,
2486 we assume X is an expression being processed from the rtl
2487 and Y was found in the hash table. We check register refs
2488 in Y for being marked as valid.
2490 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2491 that is known to be in the register. Ordinarily, we don't allow them
2492 to match, because letting them match would cause unpredictable results
2493 in all the places that search a hash table chain for an equivalent
2494 for a given value. A possible equivalent that has different structure
2495 has its hash code computed from different data. Whether the hash code
2496 is the same as that of the given value is pure luck. */
2498 static int
2499 exp_equiv_p (x, y, validate, equal_values)
2500 rtx x, y;
2501 int validate;
2502 int equal_values;
2504 register int i, j;
2505 register enum rtx_code code;
2506 register const char *fmt;
2508 /* Note: it is incorrect to assume an expression is equivalent to itself
2509 if VALIDATE is nonzero. */
2510 if (x == y && !validate)
2511 return 1;
2512 if (x == 0 || y == 0)
2513 return x == y;
2515 code = GET_CODE (x);
2516 if (code != GET_CODE (y))
2518 if (!equal_values)
2519 return 0;
2521 /* If X is a constant and Y is a register or vice versa, they may be
2522 equivalent. We only have to validate if Y is a register. */
2523 if (CONSTANT_P (x) && GET_CODE (y) == REG
2524 && REGNO_QTY_VALID_P (REGNO (y)))
2526 int y_q = REG_QTY (REGNO (y));
2527 struct qty_table_elem *y_ent = &qty_table[y_q];
2529 if (GET_MODE (y) == y_ent->mode
2530 && rtx_equal_p (x, y_ent->const_rtx)
2531 && (! validate || REG_IN_TABLE (REGNO (y)) == REG_TICK (REGNO (y))))
2532 return 1;
2535 if (CONSTANT_P (y) && code == REG
2536 && REGNO_QTY_VALID_P (REGNO (x)))
2538 int x_q = REG_QTY (REGNO (x));
2539 struct qty_table_elem *x_ent = &qty_table[x_q];
2541 if (GET_MODE (x) == x_ent->mode
2542 && rtx_equal_p (y, x_ent->const_rtx))
2543 return 1;
2546 return 0;
2549 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2550 if (GET_MODE (x) != GET_MODE (y))
2551 return 0;
2553 switch (code)
2555 case PC:
2556 case CC0:
2557 case CONST_INT:
2558 return x == y;
2560 case LABEL_REF:
2561 return XEXP (x, 0) == XEXP (y, 0);
2563 case SYMBOL_REF:
2564 return XSTR (x, 0) == XSTR (y, 0);
2566 case REG:
2568 unsigned int regno = REGNO (y);
2569 unsigned int endregno
2570 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
2571 : HARD_REGNO_NREGS (regno, GET_MODE (y)));
2572 unsigned int i;
2574 /* If the quantities are not the same, the expressions are not
2575 equivalent. If there are and we are not to validate, they
2576 are equivalent. Otherwise, ensure all regs are up-to-date. */
2578 if (REG_QTY (REGNO (x)) != REG_QTY (regno))
2579 return 0;
2581 if (! validate)
2582 return 1;
2584 for (i = regno; i < endregno; i++)
2585 if (REG_IN_TABLE (i) != REG_TICK (i))
2586 return 0;
2588 return 1;
2591 /* For commutative operations, check both orders. */
2592 case PLUS:
2593 case MULT:
2594 case AND:
2595 case IOR:
2596 case XOR:
2597 case NE:
2598 case EQ:
2599 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), validate, equal_values)
2600 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2601 validate, equal_values))
2602 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2603 validate, equal_values)
2604 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2605 validate, equal_values)));
2607 case ASM_OPERANDS:
2608 /* We don't use the generic code below because we want to
2609 disregard filename and line numbers. */
2611 /* A volatile asm isn't equivalent to any other. */
2612 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2613 return 0;
2615 if (GET_MODE (x) != GET_MODE (y)
2616 || strcmp (ASM_OPERANDS_TEMPLATE (x), ASM_OPERANDS_TEMPLATE (y))
2617 || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x),
2618 ASM_OPERANDS_OUTPUT_CONSTRAINT (y))
2619 || ASM_OPERANDS_OUTPUT_IDX (x) != ASM_OPERANDS_OUTPUT_IDX (y)
2620 || ASM_OPERANDS_INPUT_LENGTH (x) != ASM_OPERANDS_INPUT_LENGTH (y))
2621 return 0;
2623 if (ASM_OPERANDS_INPUT_LENGTH (x))
2625 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
2626 if (! exp_equiv_p (ASM_OPERANDS_INPUT (x, i),
2627 ASM_OPERANDS_INPUT (y, i),
2628 validate, equal_values)
2629 || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x, i),
2630 ASM_OPERANDS_INPUT_CONSTRAINT (y, i)))
2631 return 0;
2634 return 1;
2636 default:
2637 break;
2640 /* Compare the elements. If any pair of corresponding elements
2641 fail to match, return 0 for the whole things. */
2643 fmt = GET_RTX_FORMAT (code);
2644 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2646 switch (fmt[i])
2648 case 'e':
2649 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), validate, equal_values))
2650 return 0;
2651 break;
2653 case 'E':
2654 if (XVECLEN (x, i) != XVECLEN (y, i))
2655 return 0;
2656 for (j = 0; j < XVECLEN (x, i); j++)
2657 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2658 validate, equal_values))
2659 return 0;
2660 break;
2662 case 's':
2663 if (strcmp (XSTR (x, i), XSTR (y, i)))
2664 return 0;
2665 break;
2667 case 'i':
2668 if (XINT (x, i) != XINT (y, i))
2669 return 0;
2670 break;
2672 case 'w':
2673 if (XWINT (x, i) != XWINT (y, i))
2674 return 0;
2675 break;
2677 case '0':
2678 case 't':
2679 break;
2681 default:
2682 abort ();
2686 return 1;
2689 /* Return 1 if X has a value that can vary even between two
2690 executions of the program. 0 means X can be compared reliably
2691 against certain constants or near-constants. */
2693 static int
2694 cse_rtx_varies_p (x)
2695 register rtx x;
2697 /* We need not check for X and the equivalence class being of the same
2698 mode because if X is equivalent to a constant in some mode, it
2699 doesn't vary in any mode. */
2701 if (GET_CODE (x) == REG
2702 && REGNO_QTY_VALID_P (REGNO (x)))
2704 int x_q = REG_QTY (REGNO (x));
2705 struct qty_table_elem *x_ent = &qty_table[x_q];
2707 if (GET_MODE (x) == x_ent->mode
2708 && x_ent->const_rtx != NULL_RTX)
2709 return 0;
2712 if (GET_CODE (x) == PLUS
2713 && GET_CODE (XEXP (x, 1)) == CONST_INT
2714 && GET_CODE (XEXP (x, 0)) == REG
2715 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
2717 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2718 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2720 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2721 && x0_ent->const_rtx != NULL_RTX)
2722 return 0;
2725 /* This can happen as the result of virtual register instantiation, if
2726 the initial constant is too large to be a valid address. This gives
2727 us a three instruction sequence, load large offset into a register,
2728 load fp minus a constant into a register, then a MEM which is the
2729 sum of the two `constant' registers. */
2730 if (GET_CODE (x) == PLUS
2731 && GET_CODE (XEXP (x, 0)) == REG
2732 && GET_CODE (XEXP (x, 1)) == REG
2733 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2734 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
2736 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2737 int x1_q = REG_QTY (REGNO (XEXP (x, 1)));
2738 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2739 struct qty_table_elem *x1_ent = &qty_table[x1_q];
2741 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2742 && x0_ent->const_rtx != NULL_RTX
2743 && (GET_MODE (XEXP (x, 1)) == x1_ent->mode)
2744 && x1_ent->const_rtx != NULL_RTX)
2745 return 0;
2748 return rtx_varies_p (x);
2751 /* Canonicalize an expression:
2752 replace each register reference inside it
2753 with the "oldest" equivalent register.
2755 If INSN is non-zero and we are replacing a pseudo with a hard register
2756 or vice versa, validate_change is used to ensure that INSN remains valid
2757 after we make our substitution. The calls are made with IN_GROUP non-zero
2758 so apply_change_group must be called upon the outermost return from this
2759 function (unless INSN is zero). The result of apply_change_group can
2760 generally be discarded since the changes we are making are optional. */
2762 static rtx
2763 canon_reg (x, insn)
2764 rtx x;
2765 rtx insn;
2767 register int i;
2768 register enum rtx_code code;
2769 register const char *fmt;
2771 if (x == 0)
2772 return x;
2774 code = GET_CODE (x);
2775 switch (code)
2777 case PC:
2778 case CC0:
2779 case CONST:
2780 case CONST_INT:
2781 case CONST_DOUBLE:
2782 case SYMBOL_REF:
2783 case LABEL_REF:
2784 case ADDR_VEC:
2785 case ADDR_DIFF_VEC:
2786 return x;
2788 case REG:
2790 register int first;
2791 register int q;
2792 register struct qty_table_elem *ent;
2794 /* Never replace a hard reg, because hard regs can appear
2795 in more than one machine mode, and we must preserve the mode
2796 of each occurrence. Also, some hard regs appear in
2797 MEMs that are shared and mustn't be altered. Don't try to
2798 replace any reg that maps to a reg of class NO_REGS. */
2799 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2800 || ! REGNO_QTY_VALID_P (REGNO (x)))
2801 return x;
2803 q = REG_QTY (REGNO (x));
2804 ent = &qty_table[q];
2805 first = ent->first_reg;
2806 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2807 : REGNO_REG_CLASS (first) == NO_REGS ? x
2808 : gen_rtx_REG (ent->mode, first));
2811 default:
2812 break;
2815 fmt = GET_RTX_FORMAT (code);
2816 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2818 register int j;
2820 if (fmt[i] == 'e')
2822 rtx new = canon_reg (XEXP (x, i), insn);
2823 int insn_code;
2825 /* If replacing pseudo with hard reg or vice versa, ensure the
2826 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2827 if (insn != 0 && new != 0
2828 && GET_CODE (new) == REG && GET_CODE (XEXP (x, i)) == REG
2829 && (((REGNO (new) < FIRST_PSEUDO_REGISTER)
2830 != (REGNO (XEXP (x, i)) < FIRST_PSEUDO_REGISTER))
2831 || (insn_code = recog_memoized (insn)) < 0
2832 || insn_data[insn_code].n_dups > 0))
2833 validate_change (insn, &XEXP (x, i), new, 1);
2834 else
2835 XEXP (x, i) = new;
2837 else if (fmt[i] == 'E')
2838 for (j = 0; j < XVECLEN (x, i); j++)
2839 XVECEXP (x, i, j) = canon_reg (XVECEXP (x, i, j), insn);
2842 return x;
2845 /* LOC is a location within INSN that is an operand address (the contents of
2846 a MEM). Find the best equivalent address to use that is valid for this
2847 insn.
2849 On most CISC machines, complicated address modes are costly, and rtx_cost
2850 is a good approximation for that cost. However, most RISC machines have
2851 only a few (usually only one) memory reference formats. If an address is
2852 valid at all, it is often just as cheap as any other address. Hence, for
2853 RISC machines, we use the configuration macro `ADDRESS_COST' to compare the
2854 costs of various addresses. For two addresses of equal cost, choose the one
2855 with the highest `rtx_cost' value as that has the potential of eliminating
2856 the most insns. For equal costs, we choose the first in the equivalence
2857 class. Note that we ignore the fact that pseudo registers are cheaper
2858 than hard registers here because we would also prefer the pseudo registers.
2861 static void
2862 find_best_addr (insn, loc, mode)
2863 rtx insn;
2864 rtx *loc;
2865 enum machine_mode mode;
2867 struct table_elt *elt;
2868 rtx addr = *loc;
2869 #ifdef ADDRESS_COST
2870 struct table_elt *p;
2871 int found_better = 1;
2872 #endif
2873 int save_do_not_record = do_not_record;
2874 int save_hash_arg_in_memory = hash_arg_in_memory;
2875 int addr_volatile;
2876 int regno;
2877 unsigned hash;
2879 /* Do not try to replace constant addresses or addresses of local and
2880 argument slots. These MEM expressions are made only once and inserted
2881 in many instructions, as well as being used to control symbol table
2882 output. It is not safe to clobber them.
2884 There are some uncommon cases where the address is already in a register
2885 for some reason, but we cannot take advantage of that because we have
2886 no easy way to unshare the MEM. In addition, looking up all stack
2887 addresses is costly. */
2888 if ((GET_CODE (addr) == PLUS
2889 && GET_CODE (XEXP (addr, 0)) == REG
2890 && GET_CODE (XEXP (addr, 1)) == CONST_INT
2891 && (regno = REGNO (XEXP (addr, 0)),
2892 regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM
2893 || regno == ARG_POINTER_REGNUM))
2894 || (GET_CODE (addr) == REG
2895 && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM
2896 || regno == HARD_FRAME_POINTER_REGNUM
2897 || regno == ARG_POINTER_REGNUM))
2898 || GET_CODE (addr) == ADDRESSOF
2899 || CONSTANT_ADDRESS_P (addr))
2900 return;
2902 /* If this address is not simply a register, try to fold it. This will
2903 sometimes simplify the expression. Many simplifications
2904 will not be valid, but some, usually applying the associative rule, will
2905 be valid and produce better code. */
2906 if (GET_CODE (addr) != REG)
2908 rtx folded = fold_rtx (copy_rtx (addr), NULL_RTX);
2909 int addr_folded_cost = address_cost (folded, mode);
2910 int addr_cost = address_cost (addr, mode);
2912 if ((addr_folded_cost < addr_cost
2913 || (addr_folded_cost == addr_cost
2914 /* ??? The rtx_cost comparison is left over from an older
2915 version of this code. It is probably no longer helpful. */
2916 && (rtx_cost (folded, MEM) > rtx_cost (addr, MEM)
2917 || approx_reg_cost (folded) < approx_reg_cost (addr))))
2918 && validate_change (insn, loc, folded, 0))
2919 addr = folded;
2922 /* If this address is not in the hash table, we can't look for equivalences
2923 of the whole address. Also, ignore if volatile. */
2925 do_not_record = 0;
2926 hash = HASH (addr, Pmode);
2927 addr_volatile = do_not_record;
2928 do_not_record = save_do_not_record;
2929 hash_arg_in_memory = save_hash_arg_in_memory;
2931 if (addr_volatile)
2932 return;
2934 elt = lookup (addr, hash, Pmode);
2936 #ifndef ADDRESS_COST
2937 if (elt)
2939 int our_cost = elt->cost;
2941 /* Find the lowest cost below ours that works. */
2942 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
2943 if (elt->cost < our_cost
2944 && (GET_CODE (elt->exp) == REG
2945 || exp_equiv_p (elt->exp, elt->exp, 1, 0))
2946 && validate_change (insn, loc,
2947 canon_reg (copy_rtx (elt->exp), NULL_RTX), 0))
2948 return;
2950 #else
2952 if (elt)
2954 /* We need to find the best (under the criteria documented above) entry
2955 in the class that is valid. We use the `flag' field to indicate
2956 choices that were invalid and iterate until we can't find a better
2957 one that hasn't already been tried. */
2959 for (p = elt->first_same_value; p; p = p->next_same_value)
2960 p->flag = 0;
2962 while (found_better)
2964 int best_addr_cost = address_cost (*loc, mode);
2965 int best_rtx_cost = (elt->cost + 1) >> 1;
2966 int exp_cost;
2967 struct table_elt *best_elt = elt;
2969 found_better = 0;
2970 for (p = elt->first_same_value; p; p = p->next_same_value)
2971 if (! p->flag)
2973 if ((GET_CODE (p->exp) == REG
2974 || exp_equiv_p (p->exp, p->exp, 1, 0))
2975 && ((exp_cost = address_cost (p->exp, mode)) < best_addr_cost
2976 || (exp_cost == best_addr_cost
2977 && (p->cost + 1) >> 1 < best_rtx_cost)))
2979 found_better = 1;
2980 best_addr_cost = exp_cost;
2981 best_rtx_cost = (p->cost + 1) >> 1;
2982 best_elt = p;
2986 if (found_better)
2988 if (validate_change (insn, loc,
2989 canon_reg (copy_rtx (best_elt->exp),
2990 NULL_RTX), 0))
2991 return;
2992 else
2993 best_elt->flag = 1;
2998 /* If the address is a binary operation with the first operand a register
2999 and the second a constant, do the same as above, but looking for
3000 equivalences of the register. Then try to simplify before checking for
3001 the best address to use. This catches a few cases: First is when we
3002 have REG+const and the register is another REG+const. We can often merge
3003 the constants and eliminate one insn and one register. It may also be
3004 that a machine has a cheap REG+REG+const. Finally, this improves the
3005 code on the Alpha for unaligned byte stores. */
3007 if (flag_expensive_optimizations
3008 && (GET_RTX_CLASS (GET_CODE (*loc)) == '2'
3009 || GET_RTX_CLASS (GET_CODE (*loc)) == 'c')
3010 && GET_CODE (XEXP (*loc, 0)) == REG
3011 && GET_CODE (XEXP (*loc, 1)) == CONST_INT)
3013 rtx c = XEXP (*loc, 1);
3015 do_not_record = 0;
3016 hash = HASH (XEXP (*loc, 0), Pmode);
3017 do_not_record = save_do_not_record;
3018 hash_arg_in_memory = save_hash_arg_in_memory;
3020 elt = lookup (XEXP (*loc, 0), hash, Pmode);
3021 if (elt == 0)
3022 return;
3024 /* We need to find the best (under the criteria documented above) entry
3025 in the class that is valid. We use the `flag' field to indicate
3026 choices that were invalid and iterate until we can't find a better
3027 one that hasn't already been tried. */
3029 for (p = elt->first_same_value; p; p = p->next_same_value)
3030 p->flag = 0;
3032 while (found_better)
3034 int best_addr_cost = address_cost (*loc, mode);
3035 int best_rtx_cost = (COST (*loc) + 1) >> 1;
3036 struct table_elt *best_elt = elt;
3037 rtx best_rtx = *loc;
3038 int count;
3040 /* This is at worst case an O(n^2) algorithm, so limit our search
3041 to the first 32 elements on the list. This avoids trouble
3042 compiling code with very long basic blocks that can easily
3043 call simplify_gen_binary so many times that we run out of
3044 memory. */
3046 found_better = 0;
3047 for (p = elt->first_same_value, count = 0;
3048 p && count < 32;
3049 p = p->next_same_value, count++)
3050 if (! p->flag
3051 && (GET_CODE (p->exp) == REG
3052 || exp_equiv_p (p->exp, p->exp, 1, 0)))
3054 rtx new = simplify_gen_binary (GET_CODE (*loc), Pmode,
3055 p->exp, c);
3056 int new_cost;
3057 new_cost = address_cost (new, mode);
3059 if (new_cost < best_addr_cost
3060 || (new_cost == best_addr_cost
3061 && (COST (new) + 1) >> 1 > best_rtx_cost))
3063 found_better = 1;
3064 best_addr_cost = new_cost;
3065 best_rtx_cost = (COST (new) + 1) >> 1;
3066 best_elt = p;
3067 best_rtx = new;
3071 if (found_better)
3073 if (validate_change (insn, loc,
3074 canon_reg (copy_rtx (best_rtx),
3075 NULL_RTX), 0))
3076 return;
3077 else
3078 best_elt->flag = 1;
3082 #endif
3085 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
3086 operation (EQ, NE, GT, etc.), follow it back through the hash table and
3087 what values are being compared.
3089 *PARG1 and *PARG2 are updated to contain the rtx representing the values
3090 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
3091 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
3092 compared to produce cc0.
3094 The return value is the comparison operator and is either the code of
3095 A or the code corresponding to the inverse of the comparison. */
3097 static enum rtx_code
3098 find_comparison_args (code, parg1, parg2, pmode1, pmode2)
3099 enum rtx_code code;
3100 rtx *parg1, *parg2;
3101 enum machine_mode *pmode1, *pmode2;
3103 rtx arg1, arg2;
3105 arg1 = *parg1, arg2 = *parg2;
3107 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
3109 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
3111 /* Set non-zero when we find something of interest. */
3112 rtx x = 0;
3113 int reverse_code = 0;
3114 struct table_elt *p = 0;
3116 /* If arg1 is a COMPARE, extract the comparison arguments from it.
3117 On machines with CC0, this is the only case that can occur, since
3118 fold_rtx will return the COMPARE or item being compared with zero
3119 when given CC0. */
3121 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
3122 x = arg1;
3124 /* If ARG1 is a comparison operator and CODE is testing for
3125 STORE_FLAG_VALUE, get the inner arguments. */
3127 else if (GET_RTX_CLASS (GET_CODE (arg1)) == '<')
3129 if (code == NE
3130 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3131 && code == LT && STORE_FLAG_VALUE == -1)
3132 #ifdef FLOAT_STORE_FLAG_VALUE
3133 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
3134 && (REAL_VALUE_NEGATIVE
3135 (FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)))))
3136 #endif
3138 x = arg1;
3139 else if (code == EQ
3140 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3141 && code == GE && STORE_FLAG_VALUE == -1)
3142 #ifdef FLOAT_STORE_FLAG_VALUE
3143 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
3144 && (REAL_VALUE_NEGATIVE
3145 (FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)))))
3146 #endif
3148 x = arg1, reverse_code = 1;
3151 /* ??? We could also check for
3153 (ne (and (eq (...) (const_int 1))) (const_int 0))
3155 and related forms, but let's wait until we see them occurring. */
3157 if (x == 0)
3158 /* Look up ARG1 in the hash table and see if it has an equivalence
3159 that lets us see what is being compared. */
3160 p = lookup (arg1, safe_hash (arg1, GET_MODE (arg1)) & HASH_MASK,
3161 GET_MODE (arg1));
3162 if (p)
3163 p = p->first_same_value;
3165 for (; p; p = p->next_same_value)
3167 enum machine_mode inner_mode = GET_MODE (p->exp);
3169 /* If the entry isn't valid, skip it. */
3170 if (! exp_equiv_p (p->exp, p->exp, 1, 0))
3171 continue;
3173 if (GET_CODE (p->exp) == COMPARE
3174 /* Another possibility is that this machine has a compare insn
3175 that includes the comparison code. In that case, ARG1 would
3176 be equivalent to a comparison operation that would set ARG1 to
3177 either STORE_FLAG_VALUE or zero. If this is an NE operation,
3178 ORIG_CODE is the actual comparison being done; if it is an EQ,
3179 we must reverse ORIG_CODE. On machine with a negative value
3180 for STORE_FLAG_VALUE, also look at LT and GE operations. */
3181 || ((code == NE
3182 || (code == LT
3183 && GET_MODE_CLASS (inner_mode) == MODE_INT
3184 && (GET_MODE_BITSIZE (inner_mode)
3185 <= HOST_BITS_PER_WIDE_INT)
3186 && (STORE_FLAG_VALUE
3187 & ((HOST_WIDE_INT) 1
3188 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3189 #ifdef FLOAT_STORE_FLAG_VALUE
3190 || (code == LT
3191 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3192 && (REAL_VALUE_NEGATIVE
3193 (FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)))))
3194 #endif
3196 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<'))
3198 x = p->exp;
3199 break;
3201 else if ((code == EQ
3202 || (code == GE
3203 && GET_MODE_CLASS (inner_mode) == MODE_INT
3204 && (GET_MODE_BITSIZE (inner_mode)
3205 <= HOST_BITS_PER_WIDE_INT)
3206 && (STORE_FLAG_VALUE
3207 & ((HOST_WIDE_INT) 1
3208 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3209 #ifdef FLOAT_STORE_FLAG_VALUE
3210 || (code == GE
3211 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3212 && (REAL_VALUE_NEGATIVE
3213 (FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)))))
3214 #endif
3216 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<')
3218 reverse_code = 1;
3219 x = p->exp;
3220 break;
3223 /* If this is fp + constant, the equivalent is a better operand since
3224 it may let us predict the value of the comparison. */
3225 else if (NONZERO_BASE_PLUS_P (p->exp))
3227 arg1 = p->exp;
3228 continue;
3232 /* If we didn't find a useful equivalence for ARG1, we are done.
3233 Otherwise, set up for the next iteration. */
3234 if (x == 0)
3235 break;
3237 /* If we need to reverse the comparison, make sure that that is
3238 possible -- we can't necessarily infer the value of GE from LT
3239 with floating-point operands. */
3240 if (reverse_code && ! can_reverse_comparison_p (x, NULL_RTX))
3241 break;
3243 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
3244 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
3245 code = GET_CODE (x);
3247 if (reverse_code)
3248 code = reverse_condition (code);
3251 /* Return our results. Return the modes from before fold_rtx
3252 because fold_rtx might produce const_int, and then it's too late. */
3253 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
3254 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
3256 return code;
3259 /* If X is a nontrivial arithmetic operation on an argument
3260 for which a constant value can be determined, return
3261 the result of operating on that value, as a constant.
3262 Otherwise, return X, possibly with one or more operands
3263 modified by recursive calls to this function.
3265 If X is a register whose contents are known, we do NOT
3266 return those contents here. equiv_constant is called to
3267 perform that task.
3269 INSN is the insn that we may be modifying. If it is 0, make a copy
3270 of X before modifying it. */
3272 static rtx
3273 fold_rtx (x, insn)
3274 rtx x;
3275 rtx insn;
3277 register enum rtx_code code;
3278 register enum machine_mode mode;
3279 register const char *fmt;
3280 register int i;
3281 rtx new = 0;
3282 int copied = 0;
3283 int must_swap = 0;
3285 /* Folded equivalents of first two operands of X. */
3286 rtx folded_arg0;
3287 rtx folded_arg1;
3289 /* Constant equivalents of first three operands of X;
3290 0 when no such equivalent is known. */
3291 rtx const_arg0;
3292 rtx const_arg1;
3293 rtx const_arg2;
3295 /* The mode of the first operand of X. We need this for sign and zero
3296 extends. */
3297 enum machine_mode mode_arg0;
3299 if (x == 0)
3300 return x;
3302 mode = GET_MODE (x);
3303 code = GET_CODE (x);
3304 switch (code)
3306 case CONST:
3307 case CONST_INT:
3308 case CONST_DOUBLE:
3309 case SYMBOL_REF:
3310 case LABEL_REF:
3311 case REG:
3312 /* No use simplifying an EXPR_LIST
3313 since they are used only for lists of args
3314 in a function call's REG_EQUAL note. */
3315 case EXPR_LIST:
3316 /* Changing anything inside an ADDRESSOF is incorrect; we don't
3317 want to (e.g.,) make (addressof (const_int 0)) just because
3318 the location is known to be zero. */
3319 case ADDRESSOF:
3320 return x;
3322 #ifdef HAVE_cc0
3323 case CC0:
3324 return prev_insn_cc0;
3325 #endif
3327 case PC:
3328 /* If the next insn is a CODE_LABEL followed by a jump table,
3329 PC's value is a LABEL_REF pointing to that label. That
3330 lets us fold switch statements on the Vax. */
3331 if (insn && GET_CODE (insn) == JUMP_INSN)
3333 rtx next = next_nonnote_insn (insn);
3335 if (next && GET_CODE (next) == CODE_LABEL
3336 && NEXT_INSN (next) != 0
3337 && GET_CODE (NEXT_INSN (next)) == JUMP_INSN
3338 && (GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_VEC
3339 || GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_DIFF_VEC))
3340 return gen_rtx_LABEL_REF (Pmode, next);
3342 break;
3344 case SUBREG:
3345 /* See if we previously assigned a constant value to this SUBREG. */
3346 if ((new = lookup_as_function (x, CONST_INT)) != 0
3347 || (new = lookup_as_function (x, CONST_DOUBLE)) != 0)
3348 return new;
3350 /* If this is a paradoxical SUBREG, we have no idea what value the
3351 extra bits would have. However, if the operand is equivalent
3352 to a SUBREG whose operand is the same as our mode, and all the
3353 modes are within a word, we can just use the inner operand
3354 because these SUBREGs just say how to treat the register.
3356 Similarly if we find an integer constant. */
3358 if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
3360 enum machine_mode imode = GET_MODE (SUBREG_REG (x));
3361 struct table_elt *elt;
3363 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
3364 && GET_MODE_SIZE (imode) <= UNITS_PER_WORD
3365 && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode),
3366 imode)) != 0)
3367 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
3369 if (CONSTANT_P (elt->exp)
3370 && GET_MODE (elt->exp) == VOIDmode)
3371 return elt->exp;
3373 if (GET_CODE (elt->exp) == SUBREG
3374 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3375 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
3376 return copy_rtx (SUBREG_REG (elt->exp));
3379 return x;
3382 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
3383 We might be able to if the SUBREG is extracting a single word in an
3384 integral mode or extracting the low part. */
3386 folded_arg0 = fold_rtx (SUBREG_REG (x), insn);
3387 const_arg0 = equiv_constant (folded_arg0);
3388 if (const_arg0)
3389 folded_arg0 = const_arg0;
3391 if (folded_arg0 != SUBREG_REG (x))
3393 new = 0;
3395 if (GET_MODE_CLASS (mode) == MODE_INT
3396 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
3397 && GET_MODE (SUBREG_REG (x)) != VOIDmode)
3398 new = operand_subword (folded_arg0, SUBREG_WORD (x), 0,
3399 GET_MODE (SUBREG_REG (x)));
3400 if (new == 0 && subreg_lowpart_p (x))
3401 new = gen_lowpart_if_possible (mode, folded_arg0);
3402 if (new)
3403 return new;
3406 /* If this is a narrowing SUBREG and our operand is a REG, see if
3407 we can find an equivalence for REG that is an arithmetic operation
3408 in a wider mode where both operands are paradoxical SUBREGs
3409 from objects of our result mode. In that case, we couldn't report
3410 an equivalent value for that operation, since we don't know what the
3411 extra bits will be. But we can find an equivalence for this SUBREG
3412 by folding that operation is the narrow mode. This allows us to
3413 fold arithmetic in narrow modes when the machine only supports
3414 word-sized arithmetic.
3416 Also look for a case where we have a SUBREG whose operand is the
3417 same as our result. If both modes are smaller than a word, we
3418 are simply interpreting a register in different modes and we
3419 can use the inner value. */
3421 if (GET_CODE (folded_arg0) == REG
3422 && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0))
3423 && subreg_lowpart_p (x))
3425 struct table_elt *elt;
3427 /* We can use HASH here since we know that canon_hash won't be
3428 called. */
3429 elt = lookup (folded_arg0,
3430 HASH (folded_arg0, GET_MODE (folded_arg0)),
3431 GET_MODE (folded_arg0));
3433 if (elt)
3434 elt = elt->first_same_value;
3436 for (; elt; elt = elt->next_same_value)
3438 enum rtx_code eltcode = GET_CODE (elt->exp);
3440 /* Just check for unary and binary operations. */
3441 if (GET_RTX_CLASS (GET_CODE (elt->exp)) == '1'
3442 && GET_CODE (elt->exp) != SIGN_EXTEND
3443 && GET_CODE (elt->exp) != ZERO_EXTEND
3444 && GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3445 && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode)
3447 rtx op0 = SUBREG_REG (XEXP (elt->exp, 0));
3449 if (GET_CODE (op0) != REG && ! CONSTANT_P (op0))
3450 op0 = fold_rtx (op0, NULL_RTX);
3452 op0 = equiv_constant (op0);
3453 if (op0)
3454 new = simplify_unary_operation (GET_CODE (elt->exp), mode,
3455 op0, mode);
3457 else if ((GET_RTX_CLASS (GET_CODE (elt->exp)) == '2'
3458 || GET_RTX_CLASS (GET_CODE (elt->exp)) == 'c')
3459 && eltcode != DIV && eltcode != MOD
3460 && eltcode != UDIV && eltcode != UMOD
3461 && eltcode != ASHIFTRT && eltcode != LSHIFTRT
3462 && eltcode != ROTATE && eltcode != ROTATERT
3463 && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3464 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0)))
3465 == mode))
3466 || CONSTANT_P (XEXP (elt->exp, 0)))
3467 && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG
3468 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1)))
3469 == mode))
3470 || CONSTANT_P (XEXP (elt->exp, 1))))
3472 rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0));
3473 rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1));
3475 if (op0 && GET_CODE (op0) != REG && ! CONSTANT_P (op0))
3476 op0 = fold_rtx (op0, NULL_RTX);
3478 if (op0)
3479 op0 = equiv_constant (op0);
3481 if (op1 && GET_CODE (op1) != REG && ! CONSTANT_P (op1))
3482 op1 = fold_rtx (op1, NULL_RTX);
3484 if (op1)
3485 op1 = equiv_constant (op1);
3487 /* If we are looking for the low SImode part of
3488 (ashift:DI c (const_int 32)), it doesn't work
3489 to compute that in SImode, because a 32-bit shift
3490 in SImode is unpredictable. We know the value is 0. */
3491 if (op0 && op1
3492 && GET_CODE (elt->exp) == ASHIFT
3493 && GET_CODE (op1) == CONST_INT
3494 && INTVAL (op1) >= GET_MODE_BITSIZE (mode))
3496 if (INTVAL (op1) < GET_MODE_BITSIZE (GET_MODE (elt->exp)))
3498 /* If the count fits in the inner mode's width,
3499 but exceeds the outer mode's width,
3500 the value will get truncated to 0
3501 by the subreg. */
3502 new = const0_rtx;
3503 else
3504 /* If the count exceeds even the inner mode's width,
3505 don't fold this expression. */
3506 new = 0;
3508 else if (op0 && op1)
3509 new = simplify_binary_operation (GET_CODE (elt->exp), mode,
3510 op0, op1);
3513 else if (GET_CODE (elt->exp) == SUBREG
3514 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3515 && (GET_MODE_SIZE (GET_MODE (folded_arg0))
3516 <= UNITS_PER_WORD)
3517 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
3518 new = copy_rtx (SUBREG_REG (elt->exp));
3520 if (new)
3521 return new;
3525 return x;
3527 case NOT:
3528 case NEG:
3529 /* If we have (NOT Y), see if Y is known to be (NOT Z).
3530 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
3531 new = lookup_as_function (XEXP (x, 0), code);
3532 if (new)
3533 return fold_rtx (copy_rtx (XEXP (new, 0)), insn);
3534 break;
3536 case MEM:
3537 /* If we are not actually processing an insn, don't try to find the
3538 best address. Not only don't we care, but we could modify the
3539 MEM in an invalid way since we have no insn to validate against. */
3540 if (insn != 0)
3541 find_best_addr (insn, &XEXP (x, 0), GET_MODE (x));
3544 /* Even if we don't fold in the insn itself,
3545 we can safely do so here, in hopes of getting a constant. */
3546 rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX);
3547 rtx base = 0;
3548 HOST_WIDE_INT offset = 0;
3550 if (GET_CODE (addr) == REG
3551 && REGNO_QTY_VALID_P (REGNO (addr)))
3553 int addr_q = REG_QTY (REGNO (addr));
3554 struct qty_table_elem *addr_ent = &qty_table[addr_q];
3556 if (GET_MODE (addr) == addr_ent->mode
3557 && addr_ent->const_rtx != NULL_RTX)
3558 addr = addr_ent->const_rtx;
3561 /* If address is constant, split it into a base and integer offset. */
3562 if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF)
3563 base = addr;
3564 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
3565 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
3567 base = XEXP (XEXP (addr, 0), 0);
3568 offset = INTVAL (XEXP (XEXP (addr, 0), 1));
3570 else if (GET_CODE (addr) == LO_SUM
3571 && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF)
3572 base = XEXP (addr, 1);
3573 else if (GET_CODE (addr) == ADDRESSOF)
3574 return change_address (x, VOIDmode, addr);
3576 /* If this is a constant pool reference, we can fold it into its
3577 constant to allow better value tracking. */
3578 if (base && GET_CODE (base) == SYMBOL_REF
3579 && CONSTANT_POOL_ADDRESS_P (base))
3581 rtx constant = get_pool_constant (base);
3582 enum machine_mode const_mode = get_pool_mode (base);
3583 rtx new;
3585 if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT)
3586 constant_pool_entries_cost = COST (constant);
3588 /* If we are loading the full constant, we have an equivalence. */
3589 if (offset == 0 && mode == const_mode)
3590 return constant;
3592 /* If this actually isn't a constant (weird!), we can't do
3593 anything. Otherwise, handle the two most common cases:
3594 extracting a word from a multi-word constant, and extracting
3595 the low-order bits. Other cases don't seem common enough to
3596 worry about. */
3597 if (! CONSTANT_P (constant))
3598 return x;
3600 if (GET_MODE_CLASS (mode) == MODE_INT
3601 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
3602 && offset % UNITS_PER_WORD == 0
3603 && (new = operand_subword (constant,
3604 offset / UNITS_PER_WORD,
3605 0, const_mode)) != 0)
3606 return new;
3608 if (((BYTES_BIG_ENDIAN
3609 && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1)
3610 || (! BYTES_BIG_ENDIAN && offset == 0))
3611 && (new = gen_lowpart_if_possible (mode, constant)) != 0)
3612 return new;
3615 /* If this is a reference to a label at a known position in a jump
3616 table, we also know its value. */
3617 if (base && GET_CODE (base) == LABEL_REF)
3619 rtx label = XEXP (base, 0);
3620 rtx table_insn = NEXT_INSN (label);
3622 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
3623 && GET_CODE (PATTERN (table_insn)) == ADDR_VEC)
3625 rtx table = PATTERN (table_insn);
3627 if (offset >= 0
3628 && (offset / GET_MODE_SIZE (GET_MODE (table))
3629 < XVECLEN (table, 0)))
3630 return XVECEXP (table, 0,
3631 offset / GET_MODE_SIZE (GET_MODE (table)));
3633 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
3634 && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC)
3636 rtx table = PATTERN (table_insn);
3638 if (offset >= 0
3639 && (offset / GET_MODE_SIZE (GET_MODE (table))
3640 < XVECLEN (table, 1)))
3642 offset /= GET_MODE_SIZE (GET_MODE (table));
3643 new = gen_rtx_MINUS (Pmode, XVECEXP (table, 1, offset),
3644 XEXP (table, 0));
3646 if (GET_MODE (table) != Pmode)
3647 new = gen_rtx_TRUNCATE (GET_MODE (table), new);
3649 /* Indicate this is a constant. This isn't a
3650 valid form of CONST, but it will only be used
3651 to fold the next insns and then discarded, so
3652 it should be safe.
3654 Note this expression must be explicitly discarded,
3655 by cse_insn, else it may end up in a REG_EQUAL note
3656 and "escape" to cause problems elsewhere. */
3657 return gen_rtx_CONST (GET_MODE (new), new);
3662 return x;
3665 #ifdef NO_FUNCTION_CSE
3666 case CALL:
3667 if (CONSTANT_P (XEXP (XEXP (x, 0), 0)))
3668 return x;
3669 break;
3670 #endif
3672 case ASM_OPERANDS:
3673 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
3674 validate_change (insn, &ASM_OPERANDS_INPUT (x, i),
3675 fold_rtx (ASM_OPERANDS_INPUT (x, i), insn), 0);
3676 break;
3678 default:
3679 break;
3682 const_arg0 = 0;
3683 const_arg1 = 0;
3684 const_arg2 = 0;
3685 mode_arg0 = VOIDmode;
3687 /* Try folding our operands.
3688 Then see which ones have constant values known. */
3690 fmt = GET_RTX_FORMAT (code);
3691 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3692 if (fmt[i] == 'e')
3694 rtx arg = XEXP (x, i);
3695 rtx folded_arg = arg, const_arg = 0;
3696 enum machine_mode mode_arg = GET_MODE (arg);
3697 rtx cheap_arg, expensive_arg;
3698 rtx replacements[2];
3699 int j;
3701 /* Most arguments are cheap, so handle them specially. */
3702 switch (GET_CODE (arg))
3704 case REG:
3705 /* This is the same as calling equiv_constant; it is duplicated
3706 here for speed. */
3707 if (REGNO_QTY_VALID_P (REGNO (arg)))
3709 int arg_q = REG_QTY (REGNO (arg));
3710 struct qty_table_elem *arg_ent = &qty_table[arg_q];
3712 if (arg_ent->const_rtx != NULL_RTX
3713 && GET_CODE (arg_ent->const_rtx) != REG
3714 && GET_CODE (arg_ent->const_rtx) != PLUS)
3715 const_arg
3716 = gen_lowpart_if_possible (GET_MODE (arg),
3717 arg_ent->const_rtx);
3719 break;
3721 case CONST:
3722 case CONST_INT:
3723 case SYMBOL_REF:
3724 case LABEL_REF:
3725 case CONST_DOUBLE:
3726 const_arg = arg;
3727 break;
3729 #ifdef HAVE_cc0
3730 case CC0:
3731 folded_arg = prev_insn_cc0;
3732 mode_arg = prev_insn_cc0_mode;
3733 const_arg = equiv_constant (folded_arg);
3734 break;
3735 #endif
3737 default:
3738 folded_arg = fold_rtx (arg, insn);
3739 const_arg = equiv_constant (folded_arg);
3742 /* For the first three operands, see if the operand
3743 is constant or equivalent to a constant. */
3744 switch (i)
3746 case 0:
3747 folded_arg0 = folded_arg;
3748 const_arg0 = const_arg;
3749 mode_arg0 = mode_arg;
3750 break;
3751 case 1:
3752 folded_arg1 = folded_arg;
3753 const_arg1 = const_arg;
3754 break;
3755 case 2:
3756 const_arg2 = const_arg;
3757 break;
3760 /* Pick the least expensive of the folded argument and an
3761 equivalent constant argument. */
3762 if (const_arg == 0 || const_arg == folded_arg
3763 || COST_IN (const_arg, code) > COST_IN (folded_arg, code))
3764 cheap_arg = folded_arg, expensive_arg = const_arg;
3765 else
3766 cheap_arg = const_arg, expensive_arg = folded_arg;
3768 /* Try to replace the operand with the cheapest of the two
3769 possibilities. If it doesn't work and this is either of the first
3770 two operands of a commutative operation, try swapping them.
3771 If THAT fails, try the more expensive, provided it is cheaper
3772 than what is already there. */
3774 if (cheap_arg == XEXP (x, i))
3775 continue;
3777 if (insn == 0 && ! copied)
3779 x = copy_rtx (x);
3780 copied = 1;
3783 /* Order the replacements from cheapest to most expensive. */
3784 replacements[0] = cheap_arg;
3785 replacements[1] = expensive_arg;
3787 for (j = 0; j < 2 && replacements[j]; j++)
3789 int old_cost = COST_IN (XEXP (x, i), code);
3790 int new_cost = COST_IN (replacements[j], code);
3792 /* Stop if what existed before was cheaper. Prefer constants
3793 in the case of a tie. */
3794 if (new_cost > old_cost
3795 || (new_cost == old_cost && CONSTANT_P (XEXP (x, i))))
3796 break;
3798 if (validate_change (insn, &XEXP (x, i), replacements[j], 0))
3799 break;
3801 if (code == NE || code == EQ || GET_RTX_CLASS (code) == 'c')
3803 validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1);
3804 validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1);
3806 if (apply_change_group ())
3808 /* Swap them back to be invalid so that this loop can
3809 continue and flag them to be swapped back later. */
3810 rtx tem;
3812 tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1);
3813 XEXP (x, 1) = tem;
3814 must_swap = 1;
3815 break;
3821 else
3823 if (fmt[i] == 'E')
3824 /* Don't try to fold inside of a vector of expressions.
3825 Doing nothing is harmless. */
3829 /* If a commutative operation, place a constant integer as the second
3830 operand unless the first operand is also a constant integer. Otherwise,
3831 place any constant second unless the first operand is also a constant. */
3833 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
3835 if (must_swap || (const_arg0
3836 && (const_arg1 == 0
3837 || (GET_CODE (const_arg0) == CONST_INT
3838 && GET_CODE (const_arg1) != CONST_INT))))
3840 register rtx tem = XEXP (x, 0);
3842 if (insn == 0 && ! copied)
3844 x = copy_rtx (x);
3845 copied = 1;
3848 validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1);
3849 validate_change (insn, &XEXP (x, 1), tem, 1);
3850 if (apply_change_group ())
3852 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
3853 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
3858 /* If X is an arithmetic operation, see if we can simplify it. */
3860 switch (GET_RTX_CLASS (code))
3862 case '1':
3864 int is_const = 0;
3866 /* We can't simplify extension ops unless we know the
3867 original mode. */
3868 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
3869 && mode_arg0 == VOIDmode)
3870 break;
3872 /* If we had a CONST, strip it off and put it back later if we
3873 fold. */
3874 if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST)
3875 is_const = 1, const_arg0 = XEXP (const_arg0, 0);
3877 new = simplify_unary_operation (code, mode,
3878 const_arg0 ? const_arg0 : folded_arg0,
3879 mode_arg0);
3880 if (new != 0 && is_const)
3881 new = gen_rtx_CONST (mode, new);
3883 break;
3885 case '<':
3886 /* See what items are actually being compared and set FOLDED_ARG[01]
3887 to those values and CODE to the actual comparison code. If any are
3888 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3889 do anything if both operands are already known to be constant. */
3891 if (const_arg0 == 0 || const_arg1 == 0)
3893 struct table_elt *p0, *p1;
3894 rtx true = const_true_rtx, false = const0_rtx;
3895 enum machine_mode mode_arg1;
3897 #ifdef FLOAT_STORE_FLAG_VALUE
3898 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
3900 true = (CONST_DOUBLE_FROM_REAL_VALUE
3901 (FLOAT_STORE_FLAG_VALUE (mode), mode));
3902 false = CONST0_RTX (mode);
3904 #endif
3906 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
3907 &mode_arg0, &mode_arg1);
3908 const_arg0 = equiv_constant (folded_arg0);
3909 const_arg1 = equiv_constant (folded_arg1);
3911 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3912 what kinds of things are being compared, so we can't do
3913 anything with this comparison. */
3915 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
3916 break;
3918 /* If we do not now have two constants being compared, see
3919 if we can nevertheless deduce some things about the
3920 comparison. */
3921 if (const_arg0 == 0 || const_arg1 == 0)
3923 /* Is FOLDED_ARG0 frame-pointer plus a constant? Or
3924 non-explicit constant? These aren't zero, but we
3925 don't know their sign. */
3926 if (const_arg1 == const0_rtx
3927 && (NONZERO_BASE_PLUS_P (folded_arg0)
3928 #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address
3929 come out as 0. */
3930 || GET_CODE (folded_arg0) == SYMBOL_REF
3931 #endif
3932 || GET_CODE (folded_arg0) == LABEL_REF
3933 || GET_CODE (folded_arg0) == CONST))
3935 if (code == EQ)
3936 return false;
3937 else if (code == NE)
3938 return true;
3941 /* See if the two operands are the same. We don't do this
3942 for IEEE floating-point since we can't assume x == x
3943 since x might be a NaN. */
3945 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3946 || ! FLOAT_MODE_P (mode_arg0) || flag_fast_math)
3947 && (folded_arg0 == folded_arg1
3948 || (GET_CODE (folded_arg0) == REG
3949 && GET_CODE (folded_arg1) == REG
3950 && (REG_QTY (REGNO (folded_arg0))
3951 == REG_QTY (REGNO (folded_arg1))))
3952 || ((p0 = lookup (folded_arg0,
3953 (safe_hash (folded_arg0, mode_arg0)
3954 & HASH_MASK), mode_arg0))
3955 && (p1 = lookup (folded_arg1,
3956 (safe_hash (folded_arg1, mode_arg0)
3957 & HASH_MASK), mode_arg0))
3958 && p0->first_same_value == p1->first_same_value)))
3959 return ((code == EQ || code == LE || code == GE
3960 || code == LEU || code == GEU)
3961 ? true : false);
3963 /* If FOLDED_ARG0 is a register, see if the comparison we are
3964 doing now is either the same as we did before or the reverse
3965 (we only check the reverse if not floating-point). */
3966 else if (GET_CODE (folded_arg0) == REG)
3968 int qty = REG_QTY (REGNO (folded_arg0));
3970 if (REGNO_QTY_VALID_P (REGNO (folded_arg0)))
3972 struct qty_table_elem *ent = &qty_table[qty];
3974 if ((comparison_dominates_p (ent->comparison_code, code)
3975 || (! FLOAT_MODE_P (mode_arg0)
3976 && comparison_dominates_p (ent->comparison_code,
3977 reverse_condition (code))))
3978 && (rtx_equal_p (ent->comparison_const, folded_arg1)
3979 || (const_arg1
3980 && rtx_equal_p (ent->comparison_const,
3981 const_arg1))
3982 || (GET_CODE (folded_arg1) == REG
3983 && (REG_QTY (REGNO (folded_arg1)) == ent->comparison_qty))))
3984 return (comparison_dominates_p (ent->comparison_code, code)
3985 ? true : false);
3991 /* If we are comparing against zero, see if the first operand is
3992 equivalent to an IOR with a constant. If so, we may be able to
3993 determine the result of this comparison. */
3995 if (const_arg1 == const0_rtx)
3997 rtx y = lookup_as_function (folded_arg0, IOR);
3998 rtx inner_const;
4000 if (y != 0
4001 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
4002 && GET_CODE (inner_const) == CONST_INT
4003 && INTVAL (inner_const) != 0)
4005 int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1;
4006 int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum
4007 && (INTVAL (inner_const)
4008 & ((HOST_WIDE_INT) 1 << sign_bitnum)));
4009 rtx true = const_true_rtx, false = const0_rtx;
4011 #ifdef FLOAT_STORE_FLAG_VALUE
4012 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
4014 true = (CONST_DOUBLE_FROM_REAL_VALUE
4015 (FLOAT_STORE_FLAG_VALUE (mode), mode));
4016 false = CONST0_RTX (mode);
4018 #endif
4020 switch (code)
4022 case EQ:
4023 return false;
4024 case NE:
4025 return true;
4026 case LT: case LE:
4027 if (has_sign)
4028 return true;
4029 break;
4030 case GT: case GE:
4031 if (has_sign)
4032 return false;
4033 break;
4034 default:
4035 break;
4040 new = simplify_relational_operation (code,
4041 (mode_arg0 != VOIDmode
4042 ? mode_arg0
4043 : (GET_MODE (const_arg0
4044 ? const_arg0
4045 : folded_arg0)
4046 != VOIDmode)
4047 ? GET_MODE (const_arg0
4048 ? const_arg0
4049 : folded_arg0)
4050 : GET_MODE (const_arg1
4051 ? const_arg1
4052 : folded_arg1)),
4053 const_arg0 ? const_arg0 : folded_arg0,
4054 const_arg1 ? const_arg1 : folded_arg1);
4055 #ifdef FLOAT_STORE_FLAG_VALUE
4056 if (new != 0 && GET_MODE_CLASS (mode) == MODE_FLOAT)
4058 if (new == const0_rtx)
4059 new = CONST0_RTX (mode);
4060 else
4061 new = (CONST_DOUBLE_FROM_REAL_VALUE
4062 (FLOAT_STORE_FLAG_VALUE (mode), mode));
4064 #endif
4065 break;
4067 case '2':
4068 case 'c':
4069 switch (code)
4071 case PLUS:
4072 /* If the second operand is a LABEL_REF, see if the first is a MINUS
4073 with that LABEL_REF as its second operand. If so, the result is
4074 the first operand of that MINUS. This handles switches with an
4075 ADDR_DIFF_VEC table. */
4076 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
4078 rtx y
4079 = GET_CODE (folded_arg0) == MINUS ? folded_arg0
4080 : lookup_as_function (folded_arg0, MINUS);
4082 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
4083 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
4084 return XEXP (y, 0);
4086 /* Now try for a CONST of a MINUS like the above. */
4087 if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
4088 : lookup_as_function (folded_arg0, CONST))) != 0
4089 && GET_CODE (XEXP (y, 0)) == MINUS
4090 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
4091 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg1, 0))
4092 return XEXP (XEXP (y, 0), 0);
4095 /* Likewise if the operands are in the other order. */
4096 if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
4098 rtx y
4099 = GET_CODE (folded_arg1) == MINUS ? folded_arg1
4100 : lookup_as_function (folded_arg1, MINUS);
4102 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
4103 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0))
4104 return XEXP (y, 0);
4106 /* Now try for a CONST of a MINUS like the above. */
4107 if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
4108 : lookup_as_function (folded_arg1, CONST))) != 0
4109 && GET_CODE (XEXP (y, 0)) == MINUS
4110 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
4111 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg0, 0))
4112 return XEXP (XEXP (y, 0), 0);
4115 /* If second operand is a register equivalent to a negative
4116 CONST_INT, see if we can find a register equivalent to the
4117 positive constant. Make a MINUS if so. Don't do this for
4118 a non-negative constant since we might then alternate between
4119 chosing positive and negative constants. Having the positive
4120 constant previously-used is the more common case. Be sure
4121 the resulting constant is non-negative; if const_arg1 were
4122 the smallest negative number this would overflow: depending
4123 on the mode, this would either just be the same value (and
4124 hence not save anything) or be incorrect. */
4125 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT
4126 && INTVAL (const_arg1) < 0
4127 /* This used to test
4129 -INTVAL (const_arg1) >= 0
4131 But The Sun V5.0 compilers mis-compiled that test. So
4132 instead we test for the problematic value in a more direct
4133 manner and hope the Sun compilers get it correct. */
4134 && INTVAL (const_arg1) !=
4135 ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1))
4136 && GET_CODE (folded_arg1) == REG)
4138 rtx new_const = GEN_INT (-INTVAL (const_arg1));
4139 struct table_elt *p
4140 = lookup (new_const, safe_hash (new_const, mode) & HASH_MASK,
4141 mode);
4143 if (p)
4144 for (p = p->first_same_value; p; p = p->next_same_value)
4145 if (GET_CODE (p->exp) == REG)
4146 return simplify_gen_binary (MINUS, mode, folded_arg0,
4147 canon_reg (p->exp, NULL_RTX));
4149 goto from_plus;
4151 case MINUS:
4152 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
4153 If so, produce (PLUS Z C2-C). */
4154 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT)
4156 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
4157 if (y && GET_CODE (XEXP (y, 1)) == CONST_INT)
4158 return fold_rtx (plus_constant (copy_rtx (y),
4159 -INTVAL (const_arg1)),
4160 NULL_RTX);
4163 /* Fall through. */
4165 from_plus:
4166 case SMIN: case SMAX: case UMIN: case UMAX:
4167 case IOR: case AND: case XOR:
4168 case MULT: case DIV: case UDIV:
4169 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
4170 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
4171 is known to be of similar form, we may be able to replace the
4172 operation with a combined operation. This may eliminate the
4173 intermediate operation if every use is simplified in this way.
4174 Note that the similar optimization done by combine.c only works
4175 if the intermediate operation's result has only one reference. */
4177 if (GET_CODE (folded_arg0) == REG
4178 && const_arg1 && GET_CODE (const_arg1) == CONST_INT)
4180 int is_shift
4181 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
4182 rtx y = lookup_as_function (folded_arg0, code);
4183 rtx inner_const;
4184 enum rtx_code associate_code;
4185 rtx new_const;
4187 if (y == 0
4188 || 0 == (inner_const
4189 = equiv_constant (fold_rtx (XEXP (y, 1), 0)))
4190 || GET_CODE (inner_const) != CONST_INT
4191 /* If we have compiled a statement like
4192 "if (x == (x & mask1))", and now are looking at
4193 "x & mask2", we will have a case where the first operand
4194 of Y is the same as our first operand. Unless we detect
4195 this case, an infinite loop will result. */
4196 || XEXP (y, 0) == folded_arg0)
4197 break;
4199 /* Don't associate these operations if they are a PLUS with the
4200 same constant and it is a power of two. These might be doable
4201 with a pre- or post-increment. Similarly for two subtracts of
4202 identical powers of two with post decrement. */
4204 if (code == PLUS && INTVAL (const_arg1) == INTVAL (inner_const)
4205 && ((HAVE_PRE_INCREMENT
4206 && exact_log2 (INTVAL (const_arg1)) >= 0)
4207 || (HAVE_POST_INCREMENT
4208 && exact_log2 (INTVAL (const_arg1)) >= 0)
4209 || (HAVE_PRE_DECREMENT
4210 && exact_log2 (- INTVAL (const_arg1)) >= 0)
4211 || (HAVE_POST_DECREMENT
4212 && exact_log2 (- INTVAL (const_arg1)) >= 0)))
4213 break;
4215 /* Compute the code used to compose the constants. For example,
4216 A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */
4218 associate_code
4219 = (code == MULT || code == DIV || code == UDIV ? MULT
4220 : is_shift || code == PLUS || code == MINUS ? PLUS : code);
4222 new_const = simplify_binary_operation (associate_code, mode,
4223 const_arg1, inner_const);
4225 if (new_const == 0)
4226 break;
4228 /* If we are associating shift operations, don't let this
4229 produce a shift of the size of the object or larger.
4230 This could occur when we follow a sign-extend by a right
4231 shift on a machine that does a sign-extend as a pair
4232 of shifts. */
4234 if (is_shift && GET_CODE (new_const) == CONST_INT
4235 && INTVAL (new_const) >= GET_MODE_BITSIZE (mode))
4237 /* As an exception, we can turn an ASHIFTRT of this
4238 form into a shift of the number of bits - 1. */
4239 if (code == ASHIFTRT)
4240 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
4241 else
4242 break;
4245 y = copy_rtx (XEXP (y, 0));
4247 /* If Y contains our first operand (the most common way this
4248 can happen is if Y is a MEM), we would do into an infinite
4249 loop if we tried to fold it. So don't in that case. */
4251 if (! reg_mentioned_p (folded_arg0, y))
4252 y = fold_rtx (y, insn);
4254 return simplify_gen_binary (code, mode, y, new_const);
4256 break;
4258 default:
4259 break;
4262 new = simplify_binary_operation (code, mode,
4263 const_arg0 ? const_arg0 : folded_arg0,
4264 const_arg1 ? const_arg1 : folded_arg1);
4265 break;
4267 case 'o':
4268 /* (lo_sum (high X) X) is simply X. */
4269 if (code == LO_SUM && const_arg0 != 0
4270 && GET_CODE (const_arg0) == HIGH
4271 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
4272 return const_arg1;
4273 break;
4275 case '3':
4276 case 'b':
4277 new = simplify_ternary_operation (code, mode, mode_arg0,
4278 const_arg0 ? const_arg0 : folded_arg0,
4279 const_arg1 ? const_arg1 : folded_arg1,
4280 const_arg2 ? const_arg2 : XEXP (x, 2));
4281 break;
4283 case 'x':
4284 /* Always eliminate CONSTANT_P_RTX at this stage. */
4285 if (code == CONSTANT_P_RTX)
4286 return (const_arg0 ? const1_rtx : const0_rtx);
4287 break;
4290 return new ? new : x;
4293 /* Return a constant value currently equivalent to X.
4294 Return 0 if we don't know one. */
4296 static rtx
4297 equiv_constant (x)
4298 rtx x;
4300 if (GET_CODE (x) == REG
4301 && REGNO_QTY_VALID_P (REGNO (x)))
4303 int x_q = REG_QTY (REGNO (x));
4304 struct qty_table_elem *x_ent = &qty_table[x_q];
4306 if (x_ent->const_rtx)
4307 x = gen_lowpart_if_possible (GET_MODE (x), x_ent->const_rtx);
4310 if (x == 0 || CONSTANT_P (x))
4311 return x;
4313 /* If X is a MEM, try to fold it outside the context of any insn to see if
4314 it might be equivalent to a constant. That handles the case where it
4315 is a constant-pool reference. Then try to look it up in the hash table
4316 in case it is something whose value we have seen before. */
4318 if (GET_CODE (x) == MEM)
4320 struct table_elt *elt;
4322 x = fold_rtx (x, NULL_RTX);
4323 if (CONSTANT_P (x))
4324 return x;
4326 elt = lookup (x, safe_hash (x, GET_MODE (x)) & HASH_MASK, GET_MODE (x));
4327 if (elt == 0)
4328 return 0;
4330 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
4331 if (elt->is_const && CONSTANT_P (elt->exp))
4332 return elt->exp;
4335 return 0;
4338 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
4339 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
4340 least-significant part of X.
4341 MODE specifies how big a part of X to return.
4343 If the requested operation cannot be done, 0 is returned.
4345 This is similar to gen_lowpart in emit-rtl.c. */
4348 gen_lowpart_if_possible (mode, x)
4349 enum machine_mode mode;
4350 register rtx x;
4352 rtx result = gen_lowpart_common (mode, x);
4354 if (result)
4355 return result;
4356 else if (GET_CODE (x) == MEM)
4358 /* This is the only other case we handle. */
4359 register int offset = 0;
4360 rtx new;
4362 if (WORDS_BIG_ENDIAN)
4363 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
4364 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
4365 if (BYTES_BIG_ENDIAN)
4366 /* Adjust the address so that the address-after-the-data is
4367 unchanged. */
4368 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
4369 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
4370 new = gen_rtx_MEM (mode, plus_constant (XEXP (x, 0), offset));
4371 if (! memory_address_p (mode, XEXP (new, 0)))
4372 return 0;
4373 MEM_COPY_ATTRIBUTES (new, x);
4374 return new;
4376 else
4377 return 0;
4380 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
4381 branch. It will be zero if not.
4383 In certain cases, this can cause us to add an equivalence. For example,
4384 if we are following the taken case of
4385 if (i == 2)
4386 we can add the fact that `i' and '2' are now equivalent.
4388 In any case, we can record that this comparison was passed. If the same
4389 comparison is seen later, we will know its value. */
4391 static void
4392 record_jump_equiv (insn, taken)
4393 rtx insn;
4394 int taken;
4396 int cond_known_true;
4397 rtx op0, op1;
4398 rtx set;
4399 enum machine_mode mode, mode0, mode1;
4400 int reversed_nonequality = 0;
4401 enum rtx_code code;
4403 /* Ensure this is the right kind of insn. */
4404 if (! any_condjump_p (insn))
4405 return;
4406 set = pc_set (insn);
4408 /* See if this jump condition is known true or false. */
4409 if (taken)
4410 cond_known_true = (XEXP (SET_SRC (set), 2) == pc_rtx);
4411 else
4412 cond_known_true = (XEXP (SET_SRC (set), 1) == pc_rtx);
4414 /* Get the type of comparison being done and the operands being compared.
4415 If we had to reverse a non-equality condition, record that fact so we
4416 know that it isn't valid for floating-point. */
4417 code = GET_CODE (XEXP (SET_SRC (set), 0));
4418 op0 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 0), insn);
4419 op1 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 1), insn);
4421 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
4422 if (! cond_known_true)
4424 reversed_nonequality = (code != EQ && code != NE);
4425 code = reverse_condition (code);
4427 /* Don't remember if we can't find the inverse. */
4428 if (code == UNKNOWN)
4429 return;
4432 /* The mode is the mode of the non-constant. */
4433 mode = mode0;
4434 if (mode1 != VOIDmode)
4435 mode = mode1;
4437 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
4440 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
4441 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
4442 Make any useful entries we can with that information. Called from
4443 above function and called recursively. */
4445 static void
4446 record_jump_cond (code, mode, op0, op1, reversed_nonequality)
4447 enum rtx_code code;
4448 enum machine_mode mode;
4449 rtx op0, op1;
4450 int reversed_nonequality;
4452 unsigned op0_hash, op1_hash;
4453 int op0_in_memory, op1_in_memory;
4454 struct table_elt *op0_elt, *op1_elt;
4456 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
4457 we know that they are also equal in the smaller mode (this is also
4458 true for all smaller modes whether or not there is a SUBREG, but
4459 is not worth testing for with no SUBREG). */
4461 /* Note that GET_MODE (op0) may not equal MODE. */
4462 if (code == EQ && GET_CODE (op0) == SUBREG
4463 && (GET_MODE_SIZE (GET_MODE (op0))
4464 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4466 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4467 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
4469 record_jump_cond (code, mode, SUBREG_REG (op0),
4470 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4471 reversed_nonequality);
4474 if (code == EQ && GET_CODE (op1) == SUBREG
4475 && (GET_MODE_SIZE (GET_MODE (op1))
4476 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4478 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4479 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
4481 record_jump_cond (code, mode, SUBREG_REG (op1),
4482 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4483 reversed_nonequality);
4486 /* Similarly, if this is an NE comparison, and either is a SUBREG
4487 making a smaller mode, we know the whole thing is also NE. */
4489 /* Note that GET_MODE (op0) may not equal MODE;
4490 if we test MODE instead, we can get an infinite recursion
4491 alternating between two modes each wider than MODE. */
4493 if (code == NE && GET_CODE (op0) == SUBREG
4494 && subreg_lowpart_p (op0)
4495 && (GET_MODE_SIZE (GET_MODE (op0))
4496 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4498 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4499 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
4501 record_jump_cond (code, mode, SUBREG_REG (op0),
4502 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4503 reversed_nonequality);
4506 if (code == NE && GET_CODE (op1) == SUBREG
4507 && subreg_lowpart_p (op1)
4508 && (GET_MODE_SIZE (GET_MODE (op1))
4509 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4511 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4512 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
4514 record_jump_cond (code, mode, SUBREG_REG (op1),
4515 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4516 reversed_nonequality);
4519 /* Hash both operands. */
4521 do_not_record = 0;
4522 hash_arg_in_memory = 0;
4523 op0_hash = HASH (op0, mode);
4524 op0_in_memory = hash_arg_in_memory;
4526 if (do_not_record)
4527 return;
4529 do_not_record = 0;
4530 hash_arg_in_memory = 0;
4531 op1_hash = HASH (op1, mode);
4532 op1_in_memory = hash_arg_in_memory;
4534 if (do_not_record)
4535 return;
4537 /* Look up both operands. */
4538 op0_elt = lookup (op0, op0_hash, mode);
4539 op1_elt = lookup (op1, op1_hash, mode);
4541 /* If both operands are already equivalent or if they are not in the
4542 table but are identical, do nothing. */
4543 if ((op0_elt != 0 && op1_elt != 0
4544 && op0_elt->first_same_value == op1_elt->first_same_value)
4545 || op0 == op1 || rtx_equal_p (op0, op1))
4546 return;
4548 /* If we aren't setting two things equal all we can do is save this
4549 comparison. Similarly if this is floating-point. In the latter
4550 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
4551 If we record the equality, we might inadvertently delete code
4552 whose intent was to change -0 to +0. */
4554 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
4556 struct qty_table_elem *ent;
4557 int qty;
4559 /* If we reversed a floating-point comparison, if OP0 is not a
4560 register, or if OP1 is neither a register or constant, we can't
4561 do anything. */
4563 if (GET_CODE (op1) != REG)
4564 op1 = equiv_constant (op1);
4566 if ((reversed_nonequality && FLOAT_MODE_P (mode))
4567 || GET_CODE (op0) != REG || op1 == 0)
4568 return;
4570 /* Put OP0 in the hash table if it isn't already. This gives it a
4571 new quantity number. */
4572 if (op0_elt == 0)
4574 if (insert_regs (op0, NULL_PTR, 0))
4576 rehash_using_reg (op0);
4577 op0_hash = HASH (op0, mode);
4579 /* If OP0 is contained in OP1, this changes its hash code
4580 as well. Faster to rehash than to check, except
4581 for the simple case of a constant. */
4582 if (! CONSTANT_P (op1))
4583 op1_hash = HASH (op1,mode);
4586 op0_elt = insert (op0, NULL_PTR, op0_hash, mode);
4587 op0_elt->in_memory = op0_in_memory;
4590 qty = REG_QTY (REGNO (op0));
4591 ent = &qty_table[qty];
4593 ent->comparison_code = code;
4594 if (GET_CODE (op1) == REG)
4596 /* Look it up again--in case op0 and op1 are the same. */
4597 op1_elt = lookup (op1, op1_hash, mode);
4599 /* Put OP1 in the hash table so it gets a new quantity number. */
4600 if (op1_elt == 0)
4602 if (insert_regs (op1, NULL_PTR, 0))
4604 rehash_using_reg (op1);
4605 op1_hash = HASH (op1, mode);
4608 op1_elt = insert (op1, NULL_PTR, op1_hash, mode);
4609 op1_elt->in_memory = op1_in_memory;
4612 ent->comparison_const = NULL_RTX;
4613 ent->comparison_qty = REG_QTY (REGNO (op1));
4615 else
4617 ent->comparison_const = op1;
4618 ent->comparison_qty = -1;
4621 return;
4624 /* If either side is still missing an equivalence, make it now,
4625 then merge the equivalences. */
4627 if (op0_elt == 0)
4629 if (insert_regs (op0, NULL_PTR, 0))
4631 rehash_using_reg (op0);
4632 op0_hash = HASH (op0, mode);
4635 op0_elt = insert (op0, NULL_PTR, op0_hash, mode);
4636 op0_elt->in_memory = op0_in_memory;
4639 if (op1_elt == 0)
4641 if (insert_regs (op1, NULL_PTR, 0))
4643 rehash_using_reg (op1);
4644 op1_hash = HASH (op1, mode);
4647 op1_elt = insert (op1, NULL_PTR, op1_hash, mode);
4648 op1_elt->in_memory = op1_in_memory;
4651 merge_equiv_classes (op0_elt, op1_elt);
4652 last_jump_equiv_class = op0_elt;
4655 /* CSE processing for one instruction.
4656 First simplify sources and addresses of all assignments
4657 in the instruction, using previously-computed equivalents values.
4658 Then install the new sources and destinations in the table
4659 of available values.
4661 If LIBCALL_INSN is nonzero, don't record any equivalence made in
4662 the insn. It means that INSN is inside libcall block. In this
4663 case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */
4665 /* Data on one SET contained in the instruction. */
4667 struct set
4669 /* The SET rtx itself. */
4670 rtx rtl;
4671 /* The SET_SRC of the rtx (the original value, if it is changing). */
4672 rtx src;
4673 /* The hash-table element for the SET_SRC of the SET. */
4674 struct table_elt *src_elt;
4675 /* Hash value for the SET_SRC. */
4676 unsigned src_hash;
4677 /* Hash value for the SET_DEST. */
4678 unsigned dest_hash;
4679 /* The SET_DEST, with SUBREG, etc., stripped. */
4680 rtx inner_dest;
4681 /* Nonzero if the SET_SRC is in memory. */
4682 char src_in_memory;
4683 /* Nonzero if the SET_SRC contains something
4684 whose value cannot be predicted and understood. */
4685 char src_volatile;
4686 /* Original machine mode, in case it becomes a CONST_INT. */
4687 enum machine_mode mode;
4688 /* A constant equivalent for SET_SRC, if any. */
4689 rtx src_const;
4690 /* Original SET_SRC value used for libcall notes. */
4691 rtx orig_src;
4692 /* Hash value of constant equivalent for SET_SRC. */
4693 unsigned src_const_hash;
4694 /* Table entry for constant equivalent for SET_SRC, if any. */
4695 struct table_elt *src_const_elt;
4698 static void
4699 cse_insn (insn, libcall_insn)
4700 rtx insn;
4701 rtx libcall_insn;
4703 register rtx x = PATTERN (insn);
4704 register int i;
4705 rtx tem;
4706 register int n_sets = 0;
4708 #ifdef HAVE_cc0
4709 /* Records what this insn does to set CC0. */
4710 rtx this_insn_cc0 = 0;
4711 enum machine_mode this_insn_cc0_mode = VOIDmode;
4712 #endif
4714 rtx src_eqv = 0;
4715 struct table_elt *src_eqv_elt = 0;
4716 int src_eqv_volatile = 0;
4717 int src_eqv_in_memory = 0;
4718 unsigned src_eqv_hash = 0;
4720 struct set *sets = (struct set *) NULL_PTR;
4722 this_insn = insn;
4724 /* Find all the SETs and CLOBBERs in this instruction.
4725 Record all the SETs in the array `set' and count them.
4726 Also determine whether there is a CLOBBER that invalidates
4727 all memory references, or all references at varying addresses. */
4729 if (GET_CODE (insn) == CALL_INSN)
4731 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
4732 if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
4733 invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
4736 if (GET_CODE (x) == SET)
4738 sets = (struct set *) alloca (sizeof (struct set));
4739 sets[0].rtl = x;
4741 /* Ignore SETs that are unconditional jumps.
4742 They never need cse processing, so this does not hurt.
4743 The reason is not efficiency but rather
4744 so that we can test at the end for instructions
4745 that have been simplified to unconditional jumps
4746 and not be misled by unchanged instructions
4747 that were unconditional jumps to begin with. */
4748 if (SET_DEST (x) == pc_rtx
4749 && GET_CODE (SET_SRC (x)) == LABEL_REF)
4752 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4753 The hard function value register is used only once, to copy to
4754 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
4755 Ensure we invalidate the destination register. On the 80386 no
4756 other code would invalidate it since it is a fixed_reg.
4757 We need not check the return of apply_change_group; see canon_reg. */
4759 else if (GET_CODE (SET_SRC (x)) == CALL)
4761 canon_reg (SET_SRC (x), insn);
4762 apply_change_group ();
4763 fold_rtx (SET_SRC (x), insn);
4764 invalidate (SET_DEST (x), VOIDmode);
4766 else
4767 n_sets = 1;
4769 else if (GET_CODE (x) == PARALLEL)
4771 register int lim = XVECLEN (x, 0);
4773 sets = (struct set *) alloca (lim * sizeof (struct set));
4775 /* Find all regs explicitly clobbered in this insn,
4776 and ensure they are not replaced with any other regs
4777 elsewhere in this insn.
4778 When a reg that is clobbered is also used for input,
4779 we should presume that that is for a reason,
4780 and we should not substitute some other register
4781 which is not supposed to be clobbered.
4782 Therefore, this loop cannot be merged into the one below
4783 because a CALL may precede a CLOBBER and refer to the
4784 value clobbered. We must not let a canonicalization do
4785 anything in that case. */
4786 for (i = 0; i < lim; i++)
4788 register rtx y = XVECEXP (x, 0, i);
4789 if (GET_CODE (y) == CLOBBER)
4791 rtx clobbered = XEXP (y, 0);
4793 if (GET_CODE (clobbered) == REG
4794 || GET_CODE (clobbered) == SUBREG)
4795 invalidate (clobbered, VOIDmode);
4796 else if (GET_CODE (clobbered) == STRICT_LOW_PART
4797 || GET_CODE (clobbered) == ZERO_EXTRACT)
4798 invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
4802 for (i = 0; i < lim; i++)
4804 register rtx y = XVECEXP (x, 0, i);
4805 if (GET_CODE (y) == SET)
4807 /* As above, we ignore unconditional jumps and call-insns and
4808 ignore the result of apply_change_group. */
4809 if (GET_CODE (SET_SRC (y)) == CALL)
4811 canon_reg (SET_SRC (y), insn);
4812 apply_change_group ();
4813 fold_rtx (SET_SRC (y), insn);
4814 invalidate (SET_DEST (y), VOIDmode);
4816 else if (SET_DEST (y) == pc_rtx
4817 && GET_CODE (SET_SRC (y)) == LABEL_REF)
4819 else
4820 sets[n_sets++].rtl = y;
4822 else if (GET_CODE (y) == CLOBBER)
4824 /* If we clobber memory, canon the address.
4825 This does nothing when a register is clobbered
4826 because we have already invalidated the reg. */
4827 if (GET_CODE (XEXP (y, 0)) == MEM)
4828 canon_reg (XEXP (y, 0), NULL_RTX);
4830 else if (GET_CODE (y) == USE
4831 && ! (GET_CODE (XEXP (y, 0)) == REG
4832 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
4833 canon_reg (y, NULL_RTX);
4834 else if (GET_CODE (y) == CALL)
4836 /* The result of apply_change_group can be ignored; see
4837 canon_reg. */
4838 canon_reg (y, insn);
4839 apply_change_group ();
4840 fold_rtx (y, insn);
4844 else if (GET_CODE (x) == CLOBBER)
4846 if (GET_CODE (XEXP (x, 0)) == MEM)
4847 canon_reg (XEXP (x, 0), NULL_RTX);
4850 /* Canonicalize a USE of a pseudo register or memory location. */
4851 else if (GET_CODE (x) == USE
4852 && ! (GET_CODE (XEXP (x, 0)) == REG
4853 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
4854 canon_reg (XEXP (x, 0), NULL_RTX);
4855 else if (GET_CODE (x) == CALL)
4857 /* The result of apply_change_group can be ignored; see canon_reg. */
4858 canon_reg (x, insn);
4859 apply_change_group ();
4860 fold_rtx (x, insn);
4863 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
4864 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
4865 is handled specially for this case, and if it isn't set, then there will
4866 be no equivalence for the destination. */
4867 if (n_sets == 1 && REG_NOTES (insn) != 0
4868 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
4869 && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
4870 || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
4871 src_eqv = canon_reg (XEXP (tem, 0), NULL_RTX);
4873 /* Canonicalize sources and addresses of destinations.
4874 We do this in a separate pass to avoid problems when a MATCH_DUP is
4875 present in the insn pattern. In that case, we want to ensure that
4876 we don't break the duplicate nature of the pattern. So we will replace
4877 both operands at the same time. Otherwise, we would fail to find an
4878 equivalent substitution in the loop calling validate_change below.
4880 We used to suppress canonicalization of DEST if it appears in SRC,
4881 but we don't do this any more. */
4883 for (i = 0; i < n_sets; i++)
4885 rtx dest = SET_DEST (sets[i].rtl);
4886 rtx src = SET_SRC (sets[i].rtl);
4887 rtx new = canon_reg (src, insn);
4888 int insn_code;
4890 sets[i].orig_src = src;
4891 if ((GET_CODE (new) == REG && GET_CODE (src) == REG
4892 && ((REGNO (new) < FIRST_PSEUDO_REGISTER)
4893 != (REGNO (src) < FIRST_PSEUDO_REGISTER)))
4894 || (insn_code = recog_memoized (insn)) < 0
4895 || insn_data[insn_code].n_dups > 0)
4896 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
4897 else
4898 SET_SRC (sets[i].rtl) = new;
4900 if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT)
4902 validate_change (insn, &XEXP (dest, 1),
4903 canon_reg (XEXP (dest, 1), insn), 1);
4904 validate_change (insn, &XEXP (dest, 2),
4905 canon_reg (XEXP (dest, 2), insn), 1);
4908 while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
4909 || GET_CODE (dest) == ZERO_EXTRACT
4910 || GET_CODE (dest) == SIGN_EXTRACT)
4911 dest = XEXP (dest, 0);
4913 if (GET_CODE (dest) == MEM)
4914 canon_reg (dest, insn);
4917 /* Now that we have done all the replacements, we can apply the change
4918 group and see if they all work. Note that this will cause some
4919 canonicalizations that would have worked individually not to be applied
4920 because some other canonicalization didn't work, but this should not
4921 occur often.
4923 The result of apply_change_group can be ignored; see canon_reg. */
4925 apply_change_group ();
4927 /* Set sets[i].src_elt to the class each source belongs to.
4928 Detect assignments from or to volatile things
4929 and set set[i] to zero so they will be ignored
4930 in the rest of this function.
4932 Nothing in this loop changes the hash table or the register chains. */
4934 for (i = 0; i < n_sets; i++)
4936 register rtx src, dest;
4937 register rtx src_folded;
4938 register struct table_elt *elt = 0, *p;
4939 enum machine_mode mode;
4940 rtx src_eqv_here;
4941 rtx src_const = 0;
4942 rtx src_related = 0;
4943 struct table_elt *src_const_elt = 0;
4944 int src_cost = MAX_COST, src_eqv_cost = MAX_COST, src_folded_cost = MAX_COST;
4945 int src_related_cost = MAX_COST, src_elt_cost = MAX_COST;
4946 int src_regcost, src_eqv_regcost, src_folded_regcost;
4947 int src_related_regcost, src_elt_regcost;
4948 /* Set non-zero if we need to call force_const_mem on with the
4949 contents of src_folded before using it. */
4950 int src_folded_force_flag = 0;
4952 dest = SET_DEST (sets[i].rtl);
4953 src = SET_SRC (sets[i].rtl);
4955 /* If SRC is a constant that has no machine mode,
4956 hash it with the destination's machine mode.
4957 This way we can keep different modes separate. */
4959 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
4960 sets[i].mode = mode;
4962 if (src_eqv)
4964 enum machine_mode eqvmode = mode;
4965 if (GET_CODE (dest) == STRICT_LOW_PART)
4966 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
4967 do_not_record = 0;
4968 hash_arg_in_memory = 0;
4969 src_eqv = fold_rtx (src_eqv, insn);
4970 src_eqv_hash = HASH (src_eqv, eqvmode);
4972 /* Find the equivalence class for the equivalent expression. */
4974 if (!do_not_record)
4975 src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
4977 src_eqv_volatile = do_not_record;
4978 src_eqv_in_memory = hash_arg_in_memory;
4981 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
4982 value of the INNER register, not the destination. So it is not
4983 a valid substitution for the source. But save it for later. */
4984 if (GET_CODE (dest) == STRICT_LOW_PART)
4985 src_eqv_here = 0;
4986 else
4987 src_eqv_here = src_eqv;
4989 /* Simplify and foldable subexpressions in SRC. Then get the fully-
4990 simplified result, which may not necessarily be valid. */
4991 src_folded = fold_rtx (src, insn);
4993 #if 0
4994 /* ??? This caused bad code to be generated for the m68k port with -O2.
4995 Suppose src is (CONST_INT -1), and that after truncation src_folded
4996 is (CONST_INT 3). Suppose src_folded is then used for src_const.
4997 At the end we will add src and src_const to the same equivalence
4998 class. We now have 3 and -1 on the same equivalence class. This
4999 causes later instructions to be mis-optimized. */
5000 /* If storing a constant in a bitfield, pre-truncate the constant
5001 so we will be able to record it later. */
5002 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
5003 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
5005 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5007 if (GET_CODE (src) == CONST_INT
5008 && GET_CODE (width) == CONST_INT
5009 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5010 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
5011 src_folded
5012 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
5013 << INTVAL (width)) - 1));
5015 #endif
5017 /* Compute SRC's hash code, and also notice if it
5018 should not be recorded at all. In that case,
5019 prevent any further processing of this assignment. */
5020 do_not_record = 0;
5021 hash_arg_in_memory = 0;
5023 sets[i].src = src;
5024 sets[i].src_hash = HASH (src, mode);
5025 sets[i].src_volatile = do_not_record;
5026 sets[i].src_in_memory = hash_arg_in_memory;
5028 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
5029 a pseudo that is set more than once, do not record SRC. Using
5030 SRC as a replacement for anything else will be incorrect in that
5031 situation. Note that this usually occurs only for stack slots,
5032 in which case all the RTL would be referring to SRC, so we don't
5033 lose any optimization opportunities by not having SRC in the
5034 hash table. */
5036 if (GET_CODE (src) == MEM
5037 && find_reg_note (insn, REG_EQUIV, src) != 0
5038 && GET_CODE (dest) == REG
5039 && REGNO (dest) >= FIRST_PSEUDO_REGISTER
5040 && REG_N_SETS (REGNO (dest)) != 1)
5041 sets[i].src_volatile = 1;
5043 #if 0
5044 /* It is no longer clear why we used to do this, but it doesn't
5045 appear to still be needed. So let's try without it since this
5046 code hurts cse'ing widened ops. */
5047 /* If source is a perverse subreg (such as QI treated as an SI),
5048 treat it as volatile. It may do the work of an SI in one context
5049 where the extra bits are not being used, but cannot replace an SI
5050 in general. */
5051 if (GET_CODE (src) == SUBREG
5052 && (GET_MODE_SIZE (GET_MODE (src))
5053 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
5054 sets[i].src_volatile = 1;
5055 #endif
5057 /* Locate all possible equivalent forms for SRC. Try to replace
5058 SRC in the insn with each cheaper equivalent.
5060 We have the following types of equivalents: SRC itself, a folded
5061 version, a value given in a REG_EQUAL note, or a value related
5062 to a constant.
5064 Each of these equivalents may be part of an additional class
5065 of equivalents (if more than one is in the table, they must be in
5066 the same class; we check for this).
5068 If the source is volatile, we don't do any table lookups.
5070 We note any constant equivalent for possible later use in a
5071 REG_NOTE. */
5073 if (!sets[i].src_volatile)
5074 elt = lookup (src, sets[i].src_hash, mode);
5076 sets[i].src_elt = elt;
5078 if (elt && src_eqv_here && src_eqv_elt)
5080 if (elt->first_same_value != src_eqv_elt->first_same_value)
5082 /* The REG_EQUAL is indicating that two formerly distinct
5083 classes are now equivalent. So merge them. */
5084 merge_equiv_classes (elt, src_eqv_elt);
5085 src_eqv_hash = HASH (src_eqv, elt->mode);
5086 src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
5089 src_eqv_here = 0;
5092 else if (src_eqv_elt)
5093 elt = src_eqv_elt;
5095 /* Try to find a constant somewhere and record it in `src_const'.
5096 Record its table element, if any, in `src_const_elt'. Look in
5097 any known equivalences first. (If the constant is not in the
5098 table, also set `sets[i].src_const_hash'). */
5099 if (elt)
5100 for (p = elt->first_same_value; p; p = p->next_same_value)
5101 if (p->is_const)
5103 src_const = p->exp;
5104 src_const_elt = elt;
5105 break;
5108 if (src_const == 0
5109 && (CONSTANT_P (src_folded)
5110 /* Consider (minus (label_ref L1) (label_ref L2)) as
5111 "constant" here so we will record it. This allows us
5112 to fold switch statements when an ADDR_DIFF_VEC is used. */
5113 || (GET_CODE (src_folded) == MINUS
5114 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
5115 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
5116 src_const = src_folded, src_const_elt = elt;
5117 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
5118 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
5120 /* If we don't know if the constant is in the table, get its
5121 hash code and look it up. */
5122 if (src_const && src_const_elt == 0)
5124 sets[i].src_const_hash = HASH (src_const, mode);
5125 src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
5128 sets[i].src_const = src_const;
5129 sets[i].src_const_elt = src_const_elt;
5131 /* If the constant and our source are both in the table, mark them as
5132 equivalent. Otherwise, if a constant is in the table but the source
5133 isn't, set ELT to it. */
5134 if (src_const_elt && elt
5135 && src_const_elt->first_same_value != elt->first_same_value)
5136 merge_equiv_classes (elt, src_const_elt);
5137 else if (src_const_elt && elt == 0)
5138 elt = src_const_elt;
5140 /* See if there is a register linearly related to a constant
5141 equivalent of SRC. */
5142 if (src_const
5143 && (GET_CODE (src_const) == CONST
5144 || (src_const_elt && src_const_elt->related_value != 0)))
5146 src_related = use_related_value (src_const, src_const_elt);
5147 if (src_related)
5149 struct table_elt *src_related_elt
5150 = lookup (src_related, HASH (src_related, mode), mode);
5151 if (src_related_elt && elt)
5153 if (elt->first_same_value
5154 != src_related_elt->first_same_value)
5155 /* This can occur when we previously saw a CONST
5156 involving a SYMBOL_REF and then see the SYMBOL_REF
5157 twice. Merge the involved classes. */
5158 merge_equiv_classes (elt, src_related_elt);
5160 src_related = 0;
5161 src_related_elt = 0;
5163 else if (src_related_elt && elt == 0)
5164 elt = src_related_elt;
5168 /* See if we have a CONST_INT that is already in a register in a
5169 wider mode. */
5171 if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT
5172 && GET_MODE_CLASS (mode) == MODE_INT
5173 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
5175 enum machine_mode wider_mode;
5177 for (wider_mode = GET_MODE_WIDER_MODE (mode);
5178 GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD
5179 && src_related == 0;
5180 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
5182 struct table_elt *const_elt
5183 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
5185 if (const_elt == 0)
5186 continue;
5188 for (const_elt = const_elt->first_same_value;
5189 const_elt; const_elt = const_elt->next_same_value)
5190 if (GET_CODE (const_elt->exp) == REG)
5192 src_related = gen_lowpart_if_possible (mode,
5193 const_elt->exp);
5194 break;
5199 /* Another possibility is that we have an AND with a constant in
5200 a mode narrower than a word. If so, it might have been generated
5201 as part of an "if" which would narrow the AND. If we already
5202 have done the AND in a wider mode, we can use a SUBREG of that
5203 value. */
5205 if (flag_expensive_optimizations && ! src_related
5206 && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT
5207 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5209 enum machine_mode tmode;
5210 rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
5212 for (tmode = GET_MODE_WIDER_MODE (mode);
5213 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5214 tmode = GET_MODE_WIDER_MODE (tmode))
5216 rtx inner = gen_lowpart_if_possible (tmode, XEXP (src, 0));
5217 struct table_elt *larger_elt;
5219 if (inner)
5221 PUT_MODE (new_and, tmode);
5222 XEXP (new_and, 0) = inner;
5223 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
5224 if (larger_elt == 0)
5225 continue;
5227 for (larger_elt = larger_elt->first_same_value;
5228 larger_elt; larger_elt = larger_elt->next_same_value)
5229 if (GET_CODE (larger_elt->exp) == REG)
5231 src_related
5232 = gen_lowpart_if_possible (mode, larger_elt->exp);
5233 break;
5236 if (src_related)
5237 break;
5242 #ifdef LOAD_EXTEND_OP
5243 /* See if a MEM has already been loaded with a widening operation;
5244 if it has, we can use a subreg of that. Many CISC machines
5245 also have such operations, but this is only likely to be
5246 beneficial these machines. */
5248 if (flag_expensive_optimizations && src_related == 0
5249 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5250 && GET_MODE_CLASS (mode) == MODE_INT
5251 && GET_CODE (src) == MEM && ! do_not_record
5252 && LOAD_EXTEND_OP (mode) != NIL)
5254 enum machine_mode tmode;
5256 /* Set what we are trying to extend and the operation it might
5257 have been extended with. */
5258 PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
5259 XEXP (memory_extend_rtx, 0) = src;
5261 for (tmode = GET_MODE_WIDER_MODE (mode);
5262 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5263 tmode = GET_MODE_WIDER_MODE (tmode))
5265 struct table_elt *larger_elt;
5267 PUT_MODE (memory_extend_rtx, tmode);
5268 larger_elt = lookup (memory_extend_rtx,
5269 HASH (memory_extend_rtx, tmode), tmode);
5270 if (larger_elt == 0)
5271 continue;
5273 for (larger_elt = larger_elt->first_same_value;
5274 larger_elt; larger_elt = larger_elt->next_same_value)
5275 if (GET_CODE (larger_elt->exp) == REG)
5277 src_related = gen_lowpart_if_possible (mode,
5278 larger_elt->exp);
5279 break;
5282 if (src_related)
5283 break;
5286 #endif /* LOAD_EXTEND_OP */
5288 if (src == src_folded)
5289 src_folded = 0;
5291 /* At this point, ELT, if non-zero, points to a class of expressions
5292 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
5293 and SRC_RELATED, if non-zero, each contain additional equivalent
5294 expressions. Prune these latter expressions by deleting expressions
5295 already in the equivalence class.
5297 Check for an equivalent identical to the destination. If found,
5298 this is the preferred equivalent since it will likely lead to
5299 elimination of the insn. Indicate this by placing it in
5300 `src_related'. */
5302 if (elt)
5303 elt = elt->first_same_value;
5304 for (p = elt; p; p = p->next_same_value)
5306 enum rtx_code code = GET_CODE (p->exp);
5308 /* If the expression is not valid, ignore it. Then we do not
5309 have to check for validity below. In most cases, we can use
5310 `rtx_equal_p', since canonicalization has already been done. */
5311 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, 0))
5312 continue;
5314 /* Also skip paradoxical subregs, unless that's what we're
5315 looking for. */
5316 if (code == SUBREG
5317 && (GET_MODE_SIZE (GET_MODE (p->exp))
5318 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))
5319 && ! (src != 0
5320 && GET_CODE (src) == SUBREG
5321 && GET_MODE (src) == GET_MODE (p->exp)
5322 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5323 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))))
5324 continue;
5326 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
5327 src = 0;
5328 else if (src_folded && GET_CODE (src_folded) == code
5329 && rtx_equal_p (src_folded, p->exp))
5330 src_folded = 0;
5331 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
5332 && rtx_equal_p (src_eqv_here, p->exp))
5333 src_eqv_here = 0;
5334 else if (src_related && GET_CODE (src_related) == code
5335 && rtx_equal_p (src_related, p->exp))
5336 src_related = 0;
5338 /* This is the same as the destination of the insns, we want
5339 to prefer it. Copy it to src_related. The code below will
5340 then give it a negative cost. */
5341 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
5342 src_related = dest;
5345 /* Find the cheapest valid equivalent, trying all the available
5346 possibilities. Prefer items not in the hash table to ones
5347 that are when they are equal cost. Note that we can never
5348 worsen an insn as the current contents will also succeed.
5349 If we find an equivalent identical to the destination, use it as best,
5350 since this insn will probably be eliminated in that case. */
5351 if (src)
5353 if (rtx_equal_p (src, dest))
5354 src_cost = src_regcost = -1;
5355 else
5357 src_cost = COST (src);
5358 src_regcost = approx_reg_cost (src);
5362 if (src_eqv_here)
5364 if (rtx_equal_p (src_eqv_here, dest))
5365 src_eqv_cost = src_eqv_regcost = -1;
5366 else
5368 src_eqv_cost = COST (src_eqv_here);
5369 src_eqv_regcost = approx_reg_cost (src_eqv_here);
5373 if (src_folded)
5375 if (rtx_equal_p (src_folded, dest))
5376 src_folded_cost = src_folded_regcost = -1;
5377 else
5379 src_folded_cost = COST (src_folded);
5380 src_folded_regcost = approx_reg_cost (src_folded);
5384 if (src_related)
5386 if (rtx_equal_p (src_related, dest))
5387 src_related_cost = src_related_regcost = -1;
5388 else
5390 src_related_cost = COST (src_related);
5391 src_related_regcost = approx_reg_cost (src_related);
5395 /* If this was an indirect jump insn, a known label will really be
5396 cheaper even though it looks more expensive. */
5397 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
5398 src_folded = src_const, src_folded_cost = src_folded_regcost -1;
5400 /* Terminate loop when replacement made. This must terminate since
5401 the current contents will be tested and will always be valid. */
5402 while (1)
5404 rtx trial;
5406 /* Skip invalid entries. */
5407 while (elt && GET_CODE (elt->exp) != REG
5408 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
5409 elt = elt->next_same_value;
5411 /* A paradoxical subreg would be bad here: it'll be the right
5412 size, but later may be adjusted so that the upper bits aren't
5413 what we want. So reject it. */
5414 if (elt != 0
5415 && GET_CODE (elt->exp) == SUBREG
5416 && (GET_MODE_SIZE (GET_MODE (elt->exp))
5417 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))
5418 /* It is okay, though, if the rtx we're trying to match
5419 will ignore any of the bits we can't predict. */
5420 && ! (src != 0
5421 && GET_CODE (src) == SUBREG
5422 && GET_MODE (src) == GET_MODE (elt->exp)
5423 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5424 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))))
5426 elt = elt->next_same_value;
5427 continue;
5430 if (elt)
5432 src_elt_cost = elt->cost;
5433 src_elt_regcost = elt->regcost;
5436 /* Find cheapest and skip it for the next time. For items
5437 of equal cost, use this order:
5438 src_folded, src, src_eqv, src_related and hash table entry. */
5439 if (preferrable (src_folded_cost, src_folded_regcost,
5440 src_cost, src_regcost) <= 0
5441 && preferrable (src_folded_cost, src_folded_regcost,
5442 src_eqv_cost, src_eqv_regcost) <= 0
5443 && preferrable (src_folded_cost, src_folded_regcost,
5444 src_related_cost, src_related_regcost) <= 0
5445 && preferrable (src_folded_cost, src_folded_regcost,
5446 src_elt_cost, src_elt_regcost) <= 0)
5448 trial = src_folded, src_folded_cost = MAX_COST;
5449 if (src_folded_force_flag)
5450 trial = force_const_mem (mode, trial);
5452 else if (preferrable (src_cost, src_regcost,
5453 src_eqv_cost, src_eqv_regcost) <= 0
5454 && preferrable (src_cost, src_regcost,
5455 src_related_cost, src_related_regcost) <= 0
5456 && preferrable (src_cost, src_regcost,
5457 src_elt_cost, src_elt_regcost) <= 0)
5458 trial = src, src_cost = MAX_COST;
5459 else if (preferrable (src_eqv_cost, src_eqv_regcost,
5460 src_related_cost, src_related_regcost) <= 0
5461 && preferrable (src_eqv_cost, src_eqv_regcost,
5462 src_elt_cost, src_elt_regcost) <= 0)
5463 trial = copy_rtx (src_eqv_here), src_eqv_cost = MAX_COST;
5464 else if (preferrable (src_related_cost, src_related_regcost,
5465 src_elt_cost, src_elt_regcost) <= 0)
5466 trial = copy_rtx (src_related), src_related_cost = MAX_COST;
5467 else
5469 trial = copy_rtx (elt->exp);
5470 elt = elt->next_same_value;
5471 src_elt_cost = MAX_COST;
5474 /* We don't normally have an insn matching (set (pc) (pc)), so
5475 check for this separately here. We will delete such an
5476 insn below.
5478 Tablejump insns contain a USE of the table, so simply replacing
5479 the operand with the constant won't match. This is simply an
5480 unconditional branch, however, and is therefore valid. Just
5481 insert the substitution here and we will delete and re-emit
5482 the insn later. */
5484 if (n_sets == 1 && dest == pc_rtx
5485 && (trial == pc_rtx
5486 || (GET_CODE (trial) == LABEL_REF
5487 && ! condjump_p (insn))))
5489 if (trial == pc_rtx)
5491 SET_SRC (sets[i].rtl) = trial;
5492 cse_jumps_altered = 1;
5493 break;
5496 PATTERN (insn) = gen_jump (XEXP (trial, 0));
5497 INSN_CODE (insn) = -1;
5499 if (NEXT_INSN (insn) != 0
5500 && GET_CODE (NEXT_INSN (insn)) != BARRIER)
5501 emit_barrier_after (insn);
5503 cse_jumps_altered = 1;
5504 break;
5507 /* Look for a substitution that makes a valid insn. */
5508 else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0))
5510 /* If we just made a substitution inside a libcall, then we
5511 need to make the same substitution in any notes attached
5512 to the RETVAL insn. */
5513 if (libcall_insn
5514 && (GET_CODE (sets[i].orig_src) == REG
5515 || GET_CODE (sets[i].orig_src) == SUBREG
5516 || GET_CODE (sets[i].orig_src) == MEM))
5517 replace_rtx (REG_NOTES (libcall_insn), sets[i].orig_src,
5518 canon_reg (SET_SRC (sets[i].rtl), insn));
5520 /* The result of apply_change_group can be ignored; see
5521 canon_reg. */
5523 validate_change (insn, &SET_SRC (sets[i].rtl),
5524 canon_reg (SET_SRC (sets[i].rtl), insn),
5526 apply_change_group ();
5527 break;
5530 /* If we previously found constant pool entries for
5531 constants and this is a constant, try making a
5532 pool entry. Put it in src_folded unless we already have done
5533 this since that is where it likely came from. */
5535 else if (constant_pool_entries_cost
5536 && CONSTANT_P (trial)
5537 /* Reject cases that will abort in decode_rtx_const.
5538 On the alpha when simplifying a switch, we get
5539 (const (truncate (minus (label_ref) (label_ref)))). */
5540 && ! (GET_CODE (trial) == CONST
5541 && GET_CODE (XEXP (trial, 0)) == TRUNCATE)
5542 /* Likewise on IA-64, except without the truncate. */
5543 && ! (GET_CODE (trial) == CONST
5544 && GET_CODE (XEXP (trial, 0)) == MINUS
5545 && GET_CODE (XEXP (XEXP (trial, 0), 0)) == LABEL_REF
5546 && GET_CODE (XEXP (XEXP (trial, 0), 1)) == LABEL_REF)
5547 && (src_folded == 0
5548 || (GET_CODE (src_folded) != MEM
5549 && ! src_folded_force_flag))
5550 && GET_MODE_CLASS (mode) != MODE_CC
5551 && mode != VOIDmode)
5553 src_folded_force_flag = 1;
5554 src_folded = trial;
5555 src_folded_cost = constant_pool_entries_cost;
5559 src = SET_SRC (sets[i].rtl);
5561 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5562 However, there is an important exception: If both are registers
5563 that are not the head of their equivalence class, replace SET_SRC
5564 with the head of the class. If we do not do this, we will have
5565 both registers live over a portion of the basic block. This way,
5566 their lifetimes will likely abut instead of overlapping. */
5567 if (GET_CODE (dest) == REG
5568 && REGNO_QTY_VALID_P (REGNO (dest)))
5570 int dest_q = REG_QTY (REGNO (dest));
5571 struct qty_table_elem *dest_ent = &qty_table[dest_q];
5573 if (dest_ent->mode == GET_MODE (dest)
5574 && dest_ent->first_reg != REGNO (dest)
5575 && GET_CODE (src) == REG && REGNO (src) == REGNO (dest)
5576 /* Don't do this if the original insn had a hard reg as
5577 SET_SRC or SET_DEST. */
5578 && (GET_CODE (sets[i].src) != REG
5579 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER)
5580 && (GET_CODE (dest) != REG || REGNO (dest) >= FIRST_PSEUDO_REGISTER))
5581 /* We can't call canon_reg here because it won't do anything if
5582 SRC is a hard register. */
5584 int src_q = REG_QTY (REGNO (src));
5585 struct qty_table_elem *src_ent = &qty_table[src_q];
5586 int first = src_ent->first_reg;
5587 rtx new_src
5588 = (first >= FIRST_PSEUDO_REGISTER
5589 ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first));
5591 /* We must use validate-change even for this, because this
5592 might be a special no-op instruction, suitable only to
5593 tag notes onto. */
5594 if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0))
5596 src = new_src;
5597 /* If we had a constant that is cheaper than what we are now
5598 setting SRC to, use that constant. We ignored it when we
5599 thought we could make this into a no-op. */
5600 if (src_const && COST (src_const) < COST (src)
5601 && validate_change (insn, &SET_SRC (sets[i].rtl),
5602 src_const, 0))
5603 src = src_const;
5608 /* If we made a change, recompute SRC values. */
5609 if (src != sets[i].src)
5611 cse_altered = 1;
5612 do_not_record = 0;
5613 hash_arg_in_memory = 0;
5614 sets[i].src = src;
5615 sets[i].src_hash = HASH (src, mode);
5616 sets[i].src_volatile = do_not_record;
5617 sets[i].src_in_memory = hash_arg_in_memory;
5618 sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
5621 /* If this is a single SET, we are setting a register, and we have an
5622 equivalent constant, we want to add a REG_NOTE. We don't want
5623 to write a REG_EQUAL note for a constant pseudo since verifying that
5624 that pseudo hasn't been eliminated is a pain. Such a note also
5625 won't help anything.
5627 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5628 which can be created for a reference to a compile time computable
5629 entry in a jump table. */
5631 if (n_sets == 1 && src_const && GET_CODE (dest) == REG
5632 && GET_CODE (src_const) != REG
5633 && ! (GET_CODE (src_const) == CONST
5634 && GET_CODE (XEXP (src_const, 0)) == MINUS
5635 && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF
5636 && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF))
5638 tem = find_reg_note (insn, REG_EQUAL, NULL_RTX);
5640 /* Make sure that the rtx is not shared with any other insn. */
5641 src_const = copy_rtx (src_const);
5643 /* Record the actual constant value in a REG_EQUAL note, making
5644 a new one if one does not already exist. */
5645 if (tem)
5646 XEXP (tem, 0) = src_const;
5647 else
5648 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL,
5649 src_const, REG_NOTES (insn));
5651 /* If storing a constant value in a register that
5652 previously held the constant value 0,
5653 record this fact with a REG_WAS_0 note on this insn.
5655 Note that the *register* is required to have previously held 0,
5656 not just any register in the quantity and we must point to the
5657 insn that set that register to zero.
5659 Rather than track each register individually, we just see if
5660 the last set for this quantity was for this register. */
5662 if (REGNO_QTY_VALID_P (REGNO (dest)))
5664 int dest_q = REG_QTY (REGNO (dest));
5665 struct qty_table_elem *dest_ent = &qty_table[dest_q];
5667 if (dest_ent->const_rtx == const0_rtx)
5669 /* See if we previously had a REG_WAS_0 note. */
5670 rtx note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
5671 rtx const_insn = dest_ent->const_insn;
5673 if ((tem = single_set (const_insn)) != 0
5674 && rtx_equal_p (SET_DEST (tem), dest))
5676 if (note)
5677 XEXP (note, 0) = const_insn;
5678 else
5679 REG_NOTES (insn)
5680 = gen_rtx_INSN_LIST (REG_WAS_0, const_insn,
5681 REG_NOTES (insn));
5687 /* Now deal with the destination. */
5688 do_not_record = 0;
5690 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
5691 to the MEM or REG within it. */
5692 while (GET_CODE (dest) == SIGN_EXTRACT
5693 || GET_CODE (dest) == ZERO_EXTRACT
5694 || GET_CODE (dest) == SUBREG
5695 || GET_CODE (dest) == STRICT_LOW_PART)
5696 dest = XEXP (dest, 0);
5698 sets[i].inner_dest = dest;
5700 if (GET_CODE (dest) == MEM)
5702 #ifdef PUSH_ROUNDING
5703 /* Stack pushes invalidate the stack pointer. */
5704 rtx addr = XEXP (dest, 0);
5705 if (GET_RTX_CLASS (GET_CODE (addr)) == 'a'
5706 && XEXP (addr, 0) == stack_pointer_rtx)
5707 invalidate (stack_pointer_rtx, Pmode);
5708 #endif
5709 dest = fold_rtx (dest, insn);
5712 /* Compute the hash code of the destination now,
5713 before the effects of this instruction are recorded,
5714 since the register values used in the address computation
5715 are those before this instruction. */
5716 sets[i].dest_hash = HASH (dest, mode);
5718 /* Don't enter a bit-field in the hash table
5719 because the value in it after the store
5720 may not equal what was stored, due to truncation. */
5722 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
5723 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
5725 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5727 if (src_const != 0 && GET_CODE (src_const) == CONST_INT
5728 && GET_CODE (width) == CONST_INT
5729 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5730 && ! (INTVAL (src_const)
5731 & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
5732 /* Exception: if the value is constant,
5733 and it won't be truncated, record it. */
5735 else
5737 /* This is chosen so that the destination will be invalidated
5738 but no new value will be recorded.
5739 We must invalidate because sometimes constant
5740 values can be recorded for bitfields. */
5741 sets[i].src_elt = 0;
5742 sets[i].src_volatile = 1;
5743 src_eqv = 0;
5744 src_eqv_elt = 0;
5748 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5749 the insn. */
5750 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
5752 /* One less use of the label this insn used to jump to. */
5753 if (JUMP_LABEL (insn) != 0)
5754 --LABEL_NUSES (JUMP_LABEL (insn));
5755 PUT_CODE (insn, NOTE);
5756 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
5757 NOTE_SOURCE_FILE (insn) = 0;
5758 cse_jumps_altered = 1;
5759 /* No more processing for this set. */
5760 sets[i].rtl = 0;
5763 /* If this SET is now setting PC to a label, we know it used to
5764 be a conditional or computed branch. So we see if we can follow
5765 it. If it was a computed branch, delete it and re-emit. */
5766 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF)
5768 /* If this is not in the format for a simple branch and
5769 we are the only SET in it, re-emit it. */
5770 if (! simplejump_p (insn) && n_sets == 1)
5772 rtx new = emit_jump_insn_before (gen_jump (XEXP (src, 0)), insn);
5773 JUMP_LABEL (new) = XEXP (src, 0);
5774 LABEL_NUSES (XEXP (src, 0))++;
5775 insn = new;
5777 else
5778 /* Otherwise, force rerecognition, since it probably had
5779 a different pattern before.
5780 This shouldn't really be necessary, since whatever
5781 changed the source value above should have done this.
5782 Until the right place is found, might as well do this here. */
5783 INSN_CODE (insn) = -1;
5785 never_reached_warning (insn);
5787 /* Now emit a BARRIER after the unconditional jump. Do not bother
5788 deleting any unreachable code, let jump/flow do that. */
5789 if (NEXT_INSN (insn) != 0
5790 && GET_CODE (NEXT_INSN (insn)) != BARRIER)
5791 emit_barrier_after (insn);
5793 cse_jumps_altered = 1;
5794 sets[i].rtl = 0;
5797 /* If destination is volatile, invalidate it and then do no further
5798 processing for this assignment. */
5800 else if (do_not_record)
5802 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
5803 invalidate (dest, VOIDmode);
5804 else if (GET_CODE (dest) == MEM)
5806 /* Outgoing arguments for a libcall don't
5807 affect any recorded expressions. */
5808 if (! libcall_insn || insn == libcall_insn)
5809 invalidate (dest, VOIDmode);
5811 else if (GET_CODE (dest) == STRICT_LOW_PART
5812 || GET_CODE (dest) == ZERO_EXTRACT)
5813 invalidate (XEXP (dest, 0), GET_MODE (dest));
5814 sets[i].rtl = 0;
5817 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
5818 sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
5820 #ifdef HAVE_cc0
5821 /* If setting CC0, record what it was set to, or a constant, if it
5822 is equivalent to a constant. If it is being set to a floating-point
5823 value, make a COMPARE with the appropriate constant of 0. If we
5824 don't do this, later code can interpret this as a test against
5825 const0_rtx, which can cause problems if we try to put it into an
5826 insn as a floating-point operand. */
5827 if (dest == cc0_rtx)
5829 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
5830 this_insn_cc0_mode = mode;
5831 if (FLOAT_MODE_P (mode))
5832 this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0,
5833 CONST0_RTX (mode));
5835 #endif
5838 /* Now enter all non-volatile source expressions in the hash table
5839 if they are not already present.
5840 Record their equivalence classes in src_elt.
5841 This way we can insert the corresponding destinations into
5842 the same classes even if the actual sources are no longer in them
5843 (having been invalidated). */
5845 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
5846 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
5848 register struct table_elt *elt;
5849 register struct table_elt *classp = sets[0].src_elt;
5850 rtx dest = SET_DEST (sets[0].rtl);
5851 enum machine_mode eqvmode = GET_MODE (dest);
5853 if (GET_CODE (dest) == STRICT_LOW_PART)
5855 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
5856 classp = 0;
5858 if (insert_regs (src_eqv, classp, 0))
5860 rehash_using_reg (src_eqv);
5861 src_eqv_hash = HASH (src_eqv, eqvmode);
5863 elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
5864 elt->in_memory = src_eqv_in_memory;
5865 src_eqv_elt = elt;
5867 /* Check to see if src_eqv_elt is the same as a set source which
5868 does not yet have an elt, and if so set the elt of the set source
5869 to src_eqv_elt. */
5870 for (i = 0; i < n_sets; i++)
5871 if (sets[i].rtl && sets[i].src_elt == 0
5872 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
5873 sets[i].src_elt = src_eqv_elt;
5876 for (i = 0; i < n_sets; i++)
5877 if (sets[i].rtl && ! sets[i].src_volatile
5878 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
5880 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
5882 /* REG_EQUAL in setting a STRICT_LOW_PART
5883 gives an equivalent for the entire destination register,
5884 not just for the subreg being stored in now.
5885 This is a more interesting equivalence, so we arrange later
5886 to treat the entire reg as the destination. */
5887 sets[i].src_elt = src_eqv_elt;
5888 sets[i].src_hash = src_eqv_hash;
5890 else
5892 /* Insert source and constant equivalent into hash table, if not
5893 already present. */
5894 register struct table_elt *classp = src_eqv_elt;
5895 register rtx src = sets[i].src;
5896 register rtx dest = SET_DEST (sets[i].rtl);
5897 enum machine_mode mode
5898 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
5900 if (sets[i].src_elt == 0)
5902 /* Don't put a hard register source into the table if this is
5903 the last insn of a libcall. In this case, we only need
5904 to put src_eqv_elt in src_elt. */
5905 if (GET_CODE (src) != REG
5906 || REGNO (src) >= FIRST_PSEUDO_REGISTER
5907 || ! find_reg_note (insn, REG_RETVAL, NULL_RTX))
5909 register struct table_elt *elt;
5911 /* Note that these insert_regs calls cannot remove
5912 any of the src_elt's, because they would have failed to
5913 match if not still valid. */
5914 if (insert_regs (src, classp, 0))
5916 rehash_using_reg (src);
5917 sets[i].src_hash = HASH (src, mode);
5919 elt = insert (src, classp, sets[i].src_hash, mode);
5920 elt->in_memory = sets[i].src_in_memory;
5921 sets[i].src_elt = classp = elt;
5923 else
5924 sets[i].src_elt = classp;
5926 if (sets[i].src_const && sets[i].src_const_elt == 0
5927 && src != sets[i].src_const
5928 && ! rtx_equal_p (sets[i].src_const, src))
5929 sets[i].src_elt = insert (sets[i].src_const, classp,
5930 sets[i].src_const_hash, mode);
5933 else if (sets[i].src_elt == 0)
5934 /* If we did not insert the source into the hash table (e.g., it was
5935 volatile), note the equivalence class for the REG_EQUAL value, if any,
5936 so that the destination goes into that class. */
5937 sets[i].src_elt = src_eqv_elt;
5939 invalidate_from_clobbers (x);
5941 /* Some registers are invalidated by subroutine calls. Memory is
5942 invalidated by non-constant calls. */
5944 if (GET_CODE (insn) == CALL_INSN)
5946 if (! CONST_CALL_P (insn))
5947 invalidate_memory ();
5948 invalidate_for_call ();
5951 /* Now invalidate everything set by this instruction.
5952 If a SUBREG or other funny destination is being set,
5953 sets[i].rtl is still nonzero, so here we invalidate the reg
5954 a part of which is being set. */
5956 for (i = 0; i < n_sets; i++)
5957 if (sets[i].rtl)
5959 /* We can't use the inner dest, because the mode associated with
5960 a ZERO_EXTRACT is significant. */
5961 register rtx dest = SET_DEST (sets[i].rtl);
5963 /* Needed for registers to remove the register from its
5964 previous quantity's chain.
5965 Needed for memory if this is a nonvarying address, unless
5966 we have just done an invalidate_memory that covers even those. */
5967 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
5968 invalidate (dest, VOIDmode);
5969 else if (GET_CODE (dest) == MEM)
5971 /* Outgoing arguments for a libcall don't
5972 affect any recorded expressions. */
5973 if (! libcall_insn || insn == libcall_insn)
5974 invalidate (dest, VOIDmode);
5976 else if (GET_CODE (dest) == STRICT_LOW_PART
5977 || GET_CODE (dest) == ZERO_EXTRACT)
5978 invalidate (XEXP (dest, 0), GET_MODE (dest));
5981 /* A volatile ASM invalidates everything. */
5982 if (GET_CODE (insn) == INSN
5983 && GET_CODE (PATTERN (insn)) == ASM_OPERANDS
5984 && MEM_VOLATILE_P (PATTERN (insn)))
5985 flush_hash_table ();
5987 /* Make sure registers mentioned in destinations
5988 are safe for use in an expression to be inserted.
5989 This removes from the hash table
5990 any invalid entry that refers to one of these registers.
5992 We don't care about the return value from mention_regs because
5993 we are going to hash the SET_DEST values unconditionally. */
5995 for (i = 0; i < n_sets; i++)
5997 if (sets[i].rtl)
5999 rtx x = SET_DEST (sets[i].rtl);
6001 if (GET_CODE (x) != REG)
6002 mention_regs (x);
6003 else
6005 /* We used to rely on all references to a register becoming
6006 inaccessible when a register changes to a new quantity,
6007 since that changes the hash code. However, that is not
6008 safe, since after HASH_SIZE new quantities we get a
6009 hash 'collision' of a register with its own invalid
6010 entries. And since SUBREGs have been changed not to
6011 change their hash code with the hash code of the register,
6012 it wouldn't work any longer at all. So we have to check
6013 for any invalid references lying around now.
6014 This code is similar to the REG case in mention_regs,
6015 but it knows that reg_tick has been incremented, and
6016 it leaves reg_in_table as -1 . */
6017 unsigned int regno = REGNO (x);
6018 unsigned int endregno
6019 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
6020 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
6021 unsigned int i;
6023 for (i = regno; i < endregno; i++)
6025 if (REG_IN_TABLE (i) >= 0)
6027 remove_invalid_refs (i);
6028 REG_IN_TABLE (i) = -1;
6035 /* We may have just removed some of the src_elt's from the hash table.
6036 So replace each one with the current head of the same class. */
6038 for (i = 0; i < n_sets; i++)
6039 if (sets[i].rtl)
6041 if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
6042 /* If elt was removed, find current head of same class,
6043 or 0 if nothing remains of that class. */
6045 register struct table_elt *elt = sets[i].src_elt;
6047 while (elt && elt->prev_same_value)
6048 elt = elt->prev_same_value;
6050 while (elt && elt->first_same_value == 0)
6051 elt = elt->next_same_value;
6052 sets[i].src_elt = elt ? elt->first_same_value : 0;
6056 /* Now insert the destinations into their equivalence classes. */
6058 for (i = 0; i < n_sets; i++)
6059 if (sets[i].rtl)
6061 register rtx dest = SET_DEST (sets[i].rtl);
6062 rtx inner_dest = sets[i].inner_dest;
6063 register struct table_elt *elt;
6065 /* Don't record value if we are not supposed to risk allocating
6066 floating-point values in registers that might be wider than
6067 memory. */
6068 if ((flag_float_store
6069 && GET_CODE (dest) == MEM
6070 && FLOAT_MODE_P (GET_MODE (dest)))
6071 /* Don't record BLKmode values, because we don't know the
6072 size of it, and can't be sure that other BLKmode values
6073 have the same or smaller size. */
6074 || GET_MODE (dest) == BLKmode
6075 /* Don't record values of destinations set inside a libcall block
6076 since we might delete the libcall. Things should have been set
6077 up so we won't want to reuse such a value, but we play it safe
6078 here. */
6079 || libcall_insn
6080 /* If we didn't put a REG_EQUAL value or a source into the hash
6081 table, there is no point is recording DEST. */
6082 || sets[i].src_elt == 0
6083 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
6084 or SIGN_EXTEND, don't record DEST since it can cause
6085 some tracking to be wrong.
6087 ??? Think about this more later. */
6088 || (GET_CODE (dest) == SUBREG
6089 && (GET_MODE_SIZE (GET_MODE (dest))
6090 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
6091 && (GET_CODE (sets[i].src) == SIGN_EXTEND
6092 || GET_CODE (sets[i].src) == ZERO_EXTEND)))
6093 continue;
6095 /* STRICT_LOW_PART isn't part of the value BEING set,
6096 and neither is the SUBREG inside it.
6097 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
6098 if (GET_CODE (dest) == STRICT_LOW_PART)
6099 dest = SUBREG_REG (XEXP (dest, 0));
6101 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
6102 /* Registers must also be inserted into chains for quantities. */
6103 if (insert_regs (dest, sets[i].src_elt, 1))
6105 /* If `insert_regs' changes something, the hash code must be
6106 recalculated. */
6107 rehash_using_reg (dest);
6108 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
6111 if (GET_CODE (inner_dest) == MEM
6112 && GET_CODE (XEXP (inner_dest, 0)) == ADDRESSOF)
6113 /* Given (SET (MEM (ADDRESSOF (X))) Y) we don't want to say
6114 that (MEM (ADDRESSOF (X))) is equivalent to Y.
6115 Consider the case in which the address of the MEM is
6116 passed to a function, which alters the MEM. Then, if we
6117 later use Y instead of the MEM we'll miss the update. */
6118 elt = insert (dest, 0, sets[i].dest_hash, GET_MODE (dest));
6119 else
6120 elt = insert (dest, sets[i].src_elt,
6121 sets[i].dest_hash, GET_MODE (dest));
6123 elt->in_memory = (GET_CODE (sets[i].inner_dest) == MEM
6124 && (! RTX_UNCHANGING_P (sets[i].inner_dest)
6125 || FIXED_BASE_PLUS_P (XEXP (sets[i].inner_dest,
6126 0))));
6128 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
6129 narrower than M2, and both M1 and M2 are the same number of words,
6130 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
6131 make that equivalence as well.
6133 However, BAR may have equivalences for which gen_lowpart_if_possible
6134 will produce a simpler value than gen_lowpart_if_possible applied to
6135 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
6136 BAR's equivalences. If we don't get a simplified form, make
6137 the SUBREG. It will not be used in an equivalence, but will
6138 cause two similar assignments to be detected.
6140 Note the loop below will find SUBREG_REG (DEST) since we have
6141 already entered SRC and DEST of the SET in the table. */
6143 if (GET_CODE (dest) == SUBREG
6144 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
6145 / UNITS_PER_WORD)
6146 == (GET_MODE_SIZE (GET_MODE (dest)) - 1) / UNITS_PER_WORD)
6147 && (GET_MODE_SIZE (GET_MODE (dest))
6148 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
6149 && sets[i].src_elt != 0)
6151 enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
6152 struct table_elt *elt, *classp = 0;
6154 for (elt = sets[i].src_elt->first_same_value; elt;
6155 elt = elt->next_same_value)
6157 rtx new_src = 0;
6158 unsigned src_hash;
6159 struct table_elt *src_elt;
6161 /* Ignore invalid entries. */
6162 if (GET_CODE (elt->exp) != REG
6163 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
6164 continue;
6166 new_src = gen_lowpart_if_possible (new_mode, elt->exp);
6167 if (new_src == 0)
6168 new_src = gen_rtx_SUBREG (new_mode, elt->exp, 0);
6170 src_hash = HASH (new_src, new_mode);
6171 src_elt = lookup (new_src, src_hash, new_mode);
6173 /* Put the new source in the hash table is if isn't
6174 already. */
6175 if (src_elt == 0)
6177 if (insert_regs (new_src, classp, 0))
6179 rehash_using_reg (new_src);
6180 src_hash = HASH (new_src, new_mode);
6182 src_elt = insert (new_src, classp, src_hash, new_mode);
6183 src_elt->in_memory = elt->in_memory;
6185 else if (classp && classp != src_elt->first_same_value)
6186 /* Show that two things that we've seen before are
6187 actually the same. */
6188 merge_equiv_classes (src_elt, classp);
6190 classp = src_elt->first_same_value;
6191 /* Ignore invalid entries. */
6192 while (classp
6193 && GET_CODE (classp->exp) != REG
6194 && ! exp_equiv_p (classp->exp, classp->exp, 1, 0))
6195 classp = classp->next_same_value;
6200 /* Special handling for (set REG0 REG1) where REG0 is the
6201 "cheapest", cheaper than REG1. After cse, REG1 will probably not
6202 be used in the sequel, so (if easily done) change this insn to
6203 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
6204 that computed their value. Then REG1 will become a dead store
6205 and won't cloud the situation for later optimizations.
6207 Do not make this change if REG1 is a hard register, because it will
6208 then be used in the sequel and we may be changing a two-operand insn
6209 into a three-operand insn.
6211 Also do not do this if we are operating on a copy of INSN.
6213 Also don't do this if INSN ends a libcall; this would cause an unrelated
6214 register to be set in the middle of a libcall, and we then get bad code
6215 if the libcall is deleted. */
6217 if (n_sets == 1 && sets[0].rtl && GET_CODE (SET_DEST (sets[0].rtl)) == REG
6218 && NEXT_INSN (PREV_INSN (insn)) == insn
6219 && GET_CODE (SET_SRC (sets[0].rtl)) == REG
6220 && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
6221 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl))))
6223 int src_q = REG_QTY (REGNO (SET_SRC (sets[0].rtl)));
6224 struct qty_table_elem *src_ent = &qty_table[src_q];
6226 if ((src_ent->first_reg == REGNO (SET_DEST (sets[0].rtl)))
6227 && ! find_reg_note (insn, REG_RETVAL, NULL_RTX))
6229 rtx prev = prev_nonnote_insn (insn);
6231 if (prev != 0 && GET_CODE (prev) == INSN
6232 && GET_CODE (PATTERN (prev)) == SET
6233 && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl))
6235 rtx dest = SET_DEST (sets[0].rtl);
6236 rtx src = SET_SRC (sets[0].rtl);
6237 rtx note = find_reg_note (prev, REG_EQUIV, NULL_RTX);
6239 validate_change (prev, &SET_DEST (PATTERN (prev)), dest, 1);
6240 validate_change (insn, &SET_DEST (sets[0].rtl), src, 1);
6241 validate_change (insn, &SET_SRC (sets[0].rtl), dest, 1);
6242 apply_change_group ();
6244 /* If REG1 was equivalent to a constant, REG0 is not. */
6245 if (note)
6246 PUT_REG_NOTE_KIND (note, REG_EQUAL);
6248 /* If there was a REG_WAS_0 note on PREV, remove it. Move
6249 any REG_WAS_0 note on INSN to PREV. */
6250 note = find_reg_note (prev, REG_WAS_0, NULL_RTX);
6251 if (note)
6252 remove_note (prev, note);
6254 note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
6255 if (note)
6257 remove_note (insn, note);
6258 XEXP (note, 1) = REG_NOTES (prev);
6259 REG_NOTES (prev) = note;
6262 /* If INSN has a REG_EQUAL note, and this note mentions
6263 REG0, then we must delete it, because the value in
6264 REG0 has changed. If the note's value is REG1, we must
6265 also delete it because that is now this insn's dest. */
6266 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
6267 if (note != 0
6268 && (reg_mentioned_p (dest, XEXP (note, 0))
6269 || rtx_equal_p (src, XEXP (note, 0))))
6270 remove_note (insn, note);
6275 /* If this is a conditional jump insn, record any known equivalences due to
6276 the condition being tested. */
6278 last_jump_equiv_class = 0;
6279 if (GET_CODE (insn) == JUMP_INSN
6280 && n_sets == 1 && GET_CODE (x) == SET
6281 && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE)
6282 record_jump_equiv (insn, 0);
6284 #ifdef HAVE_cc0
6285 /* If the previous insn set CC0 and this insn no longer references CC0,
6286 delete the previous insn. Here we use the fact that nothing expects CC0
6287 to be valid over an insn, which is true until the final pass. */
6288 if (prev_insn && GET_CODE (prev_insn) == INSN
6289 && (tem = single_set (prev_insn)) != 0
6290 && SET_DEST (tem) == cc0_rtx
6291 && ! reg_mentioned_p (cc0_rtx, x))
6293 PUT_CODE (prev_insn, NOTE);
6294 NOTE_LINE_NUMBER (prev_insn) = NOTE_INSN_DELETED;
6295 NOTE_SOURCE_FILE (prev_insn) = 0;
6298 prev_insn_cc0 = this_insn_cc0;
6299 prev_insn_cc0_mode = this_insn_cc0_mode;
6300 #endif
6302 prev_insn = insn;
6305 /* Remove from the hash table all expressions that reference memory. */
6307 static void
6308 invalidate_memory ()
6310 register int i;
6311 register struct table_elt *p, *next;
6313 for (i = 0; i < HASH_SIZE; i++)
6314 for (p = table[i]; p; p = next)
6316 next = p->next_same_hash;
6317 if (p->in_memory)
6318 remove_from_table (p, i);
6322 /* If ADDR is an address that implicitly affects the stack pointer, return
6323 1 and update the register tables to show the effect. Else, return 0. */
6325 static int
6326 addr_affects_sp_p (addr)
6327 register rtx addr;
6329 if (GET_RTX_CLASS (GET_CODE (addr)) == 'a'
6330 && GET_CODE (XEXP (addr, 0)) == REG
6331 && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM)
6333 if (REG_TICK (STACK_POINTER_REGNUM) >= 0)
6334 REG_TICK (STACK_POINTER_REGNUM)++;
6336 /* This should be *very* rare. */
6337 if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM))
6338 invalidate (stack_pointer_rtx, VOIDmode);
6340 return 1;
6343 return 0;
6346 /* Perform invalidation on the basis of everything about an insn
6347 except for invalidating the actual places that are SET in it.
6348 This includes the places CLOBBERed, and anything that might
6349 alias with something that is SET or CLOBBERed.
6351 X is the pattern of the insn. */
6353 static void
6354 invalidate_from_clobbers (x)
6355 rtx x;
6357 if (GET_CODE (x) == CLOBBER)
6359 rtx ref = XEXP (x, 0);
6360 if (ref)
6362 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
6363 || GET_CODE (ref) == MEM)
6364 invalidate (ref, VOIDmode);
6365 else if (GET_CODE (ref) == STRICT_LOW_PART
6366 || GET_CODE (ref) == ZERO_EXTRACT)
6367 invalidate (XEXP (ref, 0), GET_MODE (ref));
6370 else if (GET_CODE (x) == PARALLEL)
6372 register int i;
6373 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
6375 register rtx y = XVECEXP (x, 0, i);
6376 if (GET_CODE (y) == CLOBBER)
6378 rtx ref = XEXP (y, 0);
6379 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
6380 || GET_CODE (ref) == MEM)
6381 invalidate (ref, VOIDmode);
6382 else if (GET_CODE (ref) == STRICT_LOW_PART
6383 || GET_CODE (ref) == ZERO_EXTRACT)
6384 invalidate (XEXP (ref, 0), GET_MODE (ref));
6390 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
6391 and replace any registers in them with either an equivalent constant
6392 or the canonical form of the register. If we are inside an address,
6393 only do this if the address remains valid.
6395 OBJECT is 0 except when within a MEM in which case it is the MEM.
6397 Return the replacement for X. */
6399 static rtx
6400 cse_process_notes (x, object)
6401 rtx x;
6402 rtx object;
6404 enum rtx_code code = GET_CODE (x);
6405 const char *fmt = GET_RTX_FORMAT (code);
6406 int i;
6408 switch (code)
6410 case CONST_INT:
6411 case CONST:
6412 case SYMBOL_REF:
6413 case LABEL_REF:
6414 case CONST_DOUBLE:
6415 case PC:
6416 case CC0:
6417 case LO_SUM:
6418 return x;
6420 case MEM:
6421 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), x);
6422 return x;
6424 case EXPR_LIST:
6425 case INSN_LIST:
6426 if (REG_NOTE_KIND (x) == REG_EQUAL)
6427 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX);
6428 if (XEXP (x, 1))
6429 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX);
6430 return x;
6432 case SIGN_EXTEND:
6433 case ZERO_EXTEND:
6434 case SUBREG:
6436 rtx new = cse_process_notes (XEXP (x, 0), object);
6437 /* We don't substitute VOIDmode constants into these rtx,
6438 since they would impede folding. */
6439 if (GET_MODE (new) != VOIDmode)
6440 validate_change (object, &XEXP (x, 0), new, 0);
6441 return x;
6444 case REG:
6445 i = REG_QTY (REGNO (x));
6447 /* Return a constant or a constant register. */
6448 if (REGNO_QTY_VALID_P (REGNO (x)))
6450 struct qty_table_elem *ent = &qty_table[i];
6452 if (ent->const_rtx != NULL_RTX
6453 && (CONSTANT_P (ent->const_rtx)
6454 || GET_CODE (ent->const_rtx) == REG))
6456 rtx new = gen_lowpart_if_possible (GET_MODE (x), ent->const_rtx);
6457 if (new)
6458 return new;
6462 /* Otherwise, canonicalize this register. */
6463 return canon_reg (x, NULL_RTX);
6465 default:
6466 break;
6469 for (i = 0; i < GET_RTX_LENGTH (code); i++)
6470 if (fmt[i] == 'e')
6471 validate_change (object, &XEXP (x, i),
6472 cse_process_notes (XEXP (x, i), object), 0);
6474 return x;
6477 /* Find common subexpressions between the end test of a loop and the beginning
6478 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
6480 Often we have a loop where an expression in the exit test is used
6481 in the body of the loop. For example "while (*p) *q++ = *p++;".
6482 Because of the way we duplicate the loop exit test in front of the loop,
6483 however, we don't detect that common subexpression. This will be caught
6484 when global cse is implemented, but this is a quite common case.
6486 This function handles the most common cases of these common expressions.
6487 It is called after we have processed the basic block ending with the
6488 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
6489 jumps to a label used only once. */
6491 static void
6492 cse_around_loop (loop_start)
6493 rtx loop_start;
6495 rtx insn;
6496 int i;
6497 struct table_elt *p;
6499 /* If the jump at the end of the loop doesn't go to the start, we don't
6500 do anything. */
6501 for (insn = PREV_INSN (loop_start);
6502 insn && (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0);
6503 insn = PREV_INSN (insn))
6506 if (insn == 0
6507 || GET_CODE (insn) != NOTE
6508 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG)
6509 return;
6511 /* If the last insn of the loop (the end test) was an NE comparison,
6512 we will interpret it as an EQ comparison, since we fell through
6513 the loop. Any equivalences resulting from that comparison are
6514 therefore not valid and must be invalidated. */
6515 if (last_jump_equiv_class)
6516 for (p = last_jump_equiv_class->first_same_value; p;
6517 p = p->next_same_value)
6519 if (GET_CODE (p->exp) == MEM || GET_CODE (p->exp) == REG
6520 || (GET_CODE (p->exp) == SUBREG
6521 && GET_CODE (SUBREG_REG (p->exp)) == REG))
6522 invalidate (p->exp, VOIDmode);
6523 else if (GET_CODE (p->exp) == STRICT_LOW_PART
6524 || GET_CODE (p->exp) == ZERO_EXTRACT)
6525 invalidate (XEXP (p->exp, 0), GET_MODE (p->exp));
6528 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
6529 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
6531 The only thing we do with SET_DEST is invalidate entries, so we
6532 can safely process each SET in order. It is slightly less efficient
6533 to do so, but we only want to handle the most common cases.
6535 The gen_move_insn call in cse_set_around_loop may create new pseudos.
6536 These pseudos won't have valid entries in any of the tables indexed
6537 by register number, such as reg_qty. We avoid out-of-range array
6538 accesses by not processing any instructions created after cse started. */
6540 for (insn = NEXT_INSN (loop_start);
6541 GET_CODE (insn) != CALL_INSN && GET_CODE (insn) != CODE_LABEL
6542 && INSN_UID (insn) < max_insn_uid
6543 && ! (GET_CODE (insn) == NOTE
6544 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END);
6545 insn = NEXT_INSN (insn))
6547 if (INSN_P (insn)
6548 && (GET_CODE (PATTERN (insn)) == SET
6549 || GET_CODE (PATTERN (insn)) == CLOBBER))
6550 cse_set_around_loop (PATTERN (insn), insn, loop_start);
6551 else if (INSN_P (insn) && GET_CODE (PATTERN (insn)) == PARALLEL)
6552 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
6553 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET
6554 || GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
6555 cse_set_around_loop (XVECEXP (PATTERN (insn), 0, i), insn,
6556 loop_start);
6560 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
6561 since they are done elsewhere. This function is called via note_stores. */
6563 static void
6564 invalidate_skipped_set (dest, set, data)
6565 rtx set;
6566 rtx dest;
6567 void *data ATTRIBUTE_UNUSED;
6569 enum rtx_code code = GET_CODE (dest);
6571 if (code == MEM
6572 && ! addr_affects_sp_p (dest) /* If this is not a stack push ... */
6573 /* There are times when an address can appear varying and be a PLUS
6574 during this scan when it would be a fixed address were we to know
6575 the proper equivalences. So invalidate all memory if there is
6576 a BLKmode or nonscalar memory reference or a reference to a
6577 variable address. */
6578 && (MEM_IN_STRUCT_P (dest) || GET_MODE (dest) == BLKmode
6579 || cse_rtx_varies_p (XEXP (dest, 0))))
6581 invalidate_memory ();
6582 return;
6585 if (GET_CODE (set) == CLOBBER
6586 #ifdef HAVE_cc0
6587 || dest == cc0_rtx
6588 #endif
6589 || dest == pc_rtx)
6590 return;
6592 if (code == STRICT_LOW_PART || code == ZERO_EXTRACT)
6593 invalidate (XEXP (dest, 0), GET_MODE (dest));
6594 else if (code == REG || code == SUBREG || code == MEM)
6595 invalidate (dest, VOIDmode);
6598 /* Invalidate all insns from START up to the end of the function or the
6599 next label. This called when we wish to CSE around a block that is
6600 conditionally executed. */
6602 static void
6603 invalidate_skipped_block (start)
6604 rtx start;
6606 rtx insn;
6608 for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
6609 insn = NEXT_INSN (insn))
6611 if (! INSN_P (insn))
6612 continue;
6614 if (GET_CODE (insn) == CALL_INSN)
6616 if (! CONST_CALL_P (insn))
6617 invalidate_memory ();
6618 invalidate_for_call ();
6621 invalidate_from_clobbers (PATTERN (insn));
6622 note_stores (PATTERN (insn), invalidate_skipped_set, NULL);
6626 /* If modifying X will modify the value in *DATA (which is really an
6627 `rtx *'), indicate that fact by setting the pointed to value to
6628 NULL_RTX. */
6630 static void
6631 cse_check_loop_start (x, set, data)
6632 rtx x;
6633 rtx set ATTRIBUTE_UNUSED;
6634 void *data;
6636 rtx *cse_check_loop_start_value = (rtx *) data;
6638 if (*cse_check_loop_start_value == NULL_RTX
6639 || GET_CODE (x) == CC0 || GET_CODE (x) == PC)
6640 return;
6642 if ((GET_CODE (x) == MEM && GET_CODE (*cse_check_loop_start_value) == MEM)
6643 || reg_overlap_mentioned_p (x, *cse_check_loop_start_value))
6644 *cse_check_loop_start_value = NULL_RTX;
6647 /* X is a SET or CLOBBER contained in INSN that was found near the start of
6648 a loop that starts with the label at LOOP_START.
6650 If X is a SET, we see if its SET_SRC is currently in our hash table.
6651 If so, we see if it has a value equal to some register used only in the
6652 loop exit code (as marked by jump.c).
6654 If those two conditions are true, we search backwards from the start of
6655 the loop to see if that same value was loaded into a register that still
6656 retains its value at the start of the loop.
6658 If so, we insert an insn after the load to copy the destination of that
6659 load into the equivalent register and (try to) replace our SET_SRC with that
6660 register.
6662 In any event, we invalidate whatever this SET or CLOBBER modifies. */
6664 static void
6665 cse_set_around_loop (x, insn, loop_start)
6666 rtx x;
6667 rtx insn;
6668 rtx loop_start;
6670 struct table_elt *src_elt;
6672 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
6673 are setting PC or CC0 or whose SET_SRC is already a register. */
6674 if (GET_CODE (x) == SET
6675 && GET_CODE (SET_DEST (x)) != PC && GET_CODE (SET_DEST (x)) != CC0
6676 && GET_CODE (SET_SRC (x)) != REG)
6678 src_elt = lookup (SET_SRC (x),
6679 HASH (SET_SRC (x), GET_MODE (SET_DEST (x))),
6680 GET_MODE (SET_DEST (x)));
6682 if (src_elt)
6683 for (src_elt = src_elt->first_same_value; src_elt;
6684 src_elt = src_elt->next_same_value)
6685 if (GET_CODE (src_elt->exp) == REG && REG_LOOP_TEST_P (src_elt->exp)
6686 && COST (src_elt->exp) < COST (SET_SRC (x)))
6688 rtx p, set;
6690 /* Look for an insn in front of LOOP_START that sets
6691 something in the desired mode to SET_SRC (x) before we hit
6692 a label or CALL_INSN. */
6694 for (p = prev_nonnote_insn (loop_start);
6695 p && GET_CODE (p) != CALL_INSN
6696 && GET_CODE (p) != CODE_LABEL;
6697 p = prev_nonnote_insn (p))
6698 if ((set = single_set (p)) != 0
6699 && GET_CODE (SET_DEST (set)) == REG
6700 && GET_MODE (SET_DEST (set)) == src_elt->mode
6701 && rtx_equal_p (SET_SRC (set), SET_SRC (x)))
6703 /* We now have to ensure that nothing between P
6704 and LOOP_START modified anything referenced in
6705 SET_SRC (x). We know that nothing within the loop
6706 can modify it, or we would have invalidated it in
6707 the hash table. */
6708 rtx q;
6709 rtx cse_check_loop_start_value = SET_SRC (x);
6710 for (q = p; q != loop_start; q = NEXT_INSN (q))
6711 if (INSN_P (q))
6712 note_stores (PATTERN (q),
6713 cse_check_loop_start,
6714 &cse_check_loop_start_value);
6716 /* If nothing was changed and we can replace our
6717 SET_SRC, add an insn after P to copy its destination
6718 to what we will be replacing SET_SRC with. */
6719 if (cse_check_loop_start_value
6720 && validate_change (insn, &SET_SRC (x),
6721 src_elt->exp, 0))
6723 /* If this creates new pseudos, this is unsafe,
6724 because the regno of new pseudo is unsuitable
6725 to index into reg_qty when cse_insn processes
6726 the new insn. Therefore, if a new pseudo was
6727 created, discard this optimization. */
6728 int nregs = max_reg_num ();
6729 rtx move
6730 = gen_move_insn (src_elt->exp, SET_DEST (set));
6731 if (nregs != max_reg_num ())
6733 if (! validate_change (insn, &SET_SRC (x),
6734 SET_SRC (set), 0))
6735 abort ();
6737 else
6738 emit_insn_after (move, p);
6740 break;
6745 /* Deal with the destination of X affecting the stack pointer. */
6746 addr_affects_sp_p (SET_DEST (x));
6748 /* See comment on similar code in cse_insn for explanation of these
6749 tests. */
6750 if (GET_CODE (SET_DEST (x)) == REG || GET_CODE (SET_DEST (x)) == SUBREG
6751 || GET_CODE (SET_DEST (x)) == MEM)
6752 invalidate (SET_DEST (x), VOIDmode);
6753 else if (GET_CODE (SET_DEST (x)) == STRICT_LOW_PART
6754 || GET_CODE (SET_DEST (x)) == ZERO_EXTRACT)
6755 invalidate (XEXP (SET_DEST (x), 0), GET_MODE (SET_DEST (x)));
6758 /* Find the end of INSN's basic block and return its range,
6759 the total number of SETs in all the insns of the block, the last insn of the
6760 block, and the branch path.
6762 The branch path indicates which branches should be followed. If a non-zero
6763 path size is specified, the block should be rescanned and a different set
6764 of branches will be taken. The branch path is only used if
6765 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero.
6767 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
6768 used to describe the block. It is filled in with the information about
6769 the current block. The incoming structure's branch path, if any, is used
6770 to construct the output branch path. */
6772 void
6773 cse_end_of_basic_block (insn, data, follow_jumps, after_loop, skip_blocks)
6774 rtx insn;
6775 struct cse_basic_block_data *data;
6776 int follow_jumps;
6777 int after_loop;
6778 int skip_blocks;
6780 rtx p = insn, q;
6781 int nsets = 0;
6782 int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn);
6783 rtx next = INSN_P (insn) ? insn : next_real_insn (insn);
6784 int path_size = data->path_size;
6785 int path_entry = 0;
6786 int i;
6788 /* Update the previous branch path, if any. If the last branch was
6789 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
6790 shorten the path by one and look at the previous branch. We know that
6791 at least one branch must have been taken if PATH_SIZE is non-zero. */
6792 while (path_size > 0)
6794 if (data->path[path_size - 1].status != NOT_TAKEN)
6796 data->path[path_size - 1].status = NOT_TAKEN;
6797 break;
6799 else
6800 path_size--;
6803 /* If the first instruction is marked with QImode, that means we've
6804 already processed this block. Our caller will look at DATA->LAST
6805 to figure out where to go next. We want to return the next block
6806 in the instruction stream, not some branched-to block somewhere
6807 else. We accomplish this by pretending our called forbid us to
6808 follow jumps, or skip blocks. */
6809 if (GET_MODE (insn) == QImode)
6810 follow_jumps = skip_blocks = 0;
6812 /* Scan to end of this basic block. */
6813 while (p && GET_CODE (p) != CODE_LABEL)
6815 /* Don't cse out the end of a loop. This makes a difference
6816 only for the unusual loops that always execute at least once;
6817 all other loops have labels there so we will stop in any case.
6818 Cse'ing out the end of the loop is dangerous because it
6819 might cause an invariant expression inside the loop
6820 to be reused after the end of the loop. This would make it
6821 hard to move the expression out of the loop in loop.c,
6822 especially if it is one of several equivalent expressions
6823 and loop.c would like to eliminate it.
6825 If we are running after loop.c has finished, we can ignore
6826 the NOTE_INSN_LOOP_END. */
6828 if (! after_loop && GET_CODE (p) == NOTE
6829 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
6830 break;
6832 /* Don't cse over a call to setjmp; on some machines (eg vax)
6833 the regs restored by the longjmp come from
6834 a later time than the setjmp. */
6835 if (GET_CODE (p) == NOTE
6836 && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
6837 break;
6839 /* A PARALLEL can have lots of SETs in it,
6840 especially if it is really an ASM_OPERANDS. */
6841 if (INSN_P (p) && GET_CODE (PATTERN (p)) == PARALLEL)
6842 nsets += XVECLEN (PATTERN (p), 0);
6843 else if (GET_CODE (p) != NOTE)
6844 nsets += 1;
6846 /* Ignore insns made by CSE; they cannot affect the boundaries of
6847 the basic block. */
6849 if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid)
6850 high_cuid = INSN_CUID (p);
6851 if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid)
6852 low_cuid = INSN_CUID (p);
6854 /* See if this insn is in our branch path. If it is and we are to
6855 take it, do so. */
6856 if (path_entry < path_size && data->path[path_entry].branch == p)
6858 if (data->path[path_entry].status != NOT_TAKEN)
6859 p = JUMP_LABEL (p);
6861 /* Point to next entry in path, if any. */
6862 path_entry++;
6865 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
6866 was specified, we haven't reached our maximum path length, there are
6867 insns following the target of the jump, this is the only use of the
6868 jump label, and the target label is preceded by a BARRIER.
6870 Alternatively, we can follow the jump if it branches around a
6871 block of code and there are no other branches into the block.
6872 In this case invalidate_skipped_block will be called to invalidate any
6873 registers set in the block when following the jump. */
6875 else if ((follow_jumps || skip_blocks) && path_size < PATHLENGTH - 1
6876 && GET_CODE (p) == JUMP_INSN
6877 && GET_CODE (PATTERN (p)) == SET
6878 && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE
6879 && JUMP_LABEL (p) != 0
6880 && LABEL_NUSES (JUMP_LABEL (p)) == 1
6881 && NEXT_INSN (JUMP_LABEL (p)) != 0)
6883 for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q))
6884 if ((GET_CODE (q) != NOTE
6885 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END
6886 || NOTE_LINE_NUMBER (q) == NOTE_INSN_SETJMP)
6887 && (GET_CODE (q) != CODE_LABEL || LABEL_NUSES (q) != 0))
6888 break;
6890 /* If we ran into a BARRIER, this code is an extension of the
6891 basic block when the branch is taken. */
6892 if (follow_jumps && q != 0 && GET_CODE (q) == BARRIER)
6894 /* Don't allow ourself to keep walking around an
6895 always-executed loop. */
6896 if (next_real_insn (q) == next)
6898 p = NEXT_INSN (p);
6899 continue;
6902 /* Similarly, don't put a branch in our path more than once. */
6903 for (i = 0; i < path_entry; i++)
6904 if (data->path[i].branch == p)
6905 break;
6907 if (i != path_entry)
6908 break;
6910 data->path[path_entry].branch = p;
6911 data->path[path_entry++].status = TAKEN;
6913 /* This branch now ends our path. It was possible that we
6914 didn't see this branch the last time around (when the
6915 insn in front of the target was a JUMP_INSN that was
6916 turned into a no-op). */
6917 path_size = path_entry;
6919 p = JUMP_LABEL (p);
6920 /* Mark block so we won't scan it again later. */
6921 PUT_MODE (NEXT_INSN (p), QImode);
6923 /* Detect a branch around a block of code. */
6924 else if (skip_blocks && q != 0 && GET_CODE (q) != CODE_LABEL)
6926 register rtx tmp;
6928 if (next_real_insn (q) == next)
6930 p = NEXT_INSN (p);
6931 continue;
6934 for (i = 0; i < path_entry; i++)
6935 if (data->path[i].branch == p)
6936 break;
6938 if (i != path_entry)
6939 break;
6941 /* This is no_labels_between_p (p, q) with an added check for
6942 reaching the end of a function (in case Q precedes P). */
6943 for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp))
6944 if (GET_CODE (tmp) == CODE_LABEL)
6945 break;
6947 if (tmp == q)
6949 data->path[path_entry].branch = p;
6950 data->path[path_entry++].status = AROUND;
6952 path_size = path_entry;
6954 p = JUMP_LABEL (p);
6955 /* Mark block so we won't scan it again later. */
6956 PUT_MODE (NEXT_INSN (p), QImode);
6960 p = NEXT_INSN (p);
6963 data->low_cuid = low_cuid;
6964 data->high_cuid = high_cuid;
6965 data->nsets = nsets;
6966 data->last = p;
6968 /* If all jumps in the path are not taken, set our path length to zero
6969 so a rescan won't be done. */
6970 for (i = path_size - 1; i >= 0; i--)
6971 if (data->path[i].status != NOT_TAKEN)
6972 break;
6974 if (i == -1)
6975 data->path_size = 0;
6976 else
6977 data->path_size = path_size;
6979 /* End the current branch path. */
6980 data->path[path_size].branch = 0;
6983 /* Perform cse on the instructions of a function.
6984 F is the first instruction.
6985 NREGS is one plus the highest pseudo-reg number used in the instruction.
6987 AFTER_LOOP is 1 if this is the cse call done after loop optimization
6988 (only if -frerun-cse-after-loop).
6990 Returns 1 if jump_optimize should be redone due to simplifications
6991 in conditional jump instructions. */
6994 cse_main (f, nregs, after_loop, file)
6995 rtx f;
6996 int nregs;
6997 int after_loop;
6998 FILE *file;
7000 struct cse_basic_block_data val;
7001 register rtx insn = f;
7002 register int i;
7004 cse_jumps_altered = 0;
7005 recorded_label_ref = 0;
7006 constant_pool_entries_cost = 0;
7007 val.path_size = 0;
7009 init_recog ();
7010 init_alias_analysis ();
7012 max_reg = nregs;
7014 max_insn_uid = get_max_uid ();
7016 reg_eqv_table = (struct reg_eqv_elem *)
7017 xmalloc (nregs * sizeof (struct reg_eqv_elem));
7019 #ifdef LOAD_EXTEND_OP
7021 /* Allocate scratch rtl here. cse_insn will fill in the memory reference
7022 and change the code and mode as appropriate. */
7023 memory_extend_rtx = gen_rtx_ZERO_EXTEND (VOIDmode, NULL_RTX);
7024 #endif
7026 /* Reset the counter indicating how many elements have been made
7027 thus far. */
7028 n_elements_made = 0;
7030 /* Find the largest uid. */
7032 max_uid = get_max_uid ();
7033 uid_cuid = (int *) xcalloc (max_uid + 1, sizeof (int));
7035 /* Compute the mapping from uids to cuids.
7036 CUIDs are numbers assigned to insns, like uids,
7037 except that cuids increase monotonically through the code.
7038 Don't assign cuids to line-number NOTEs, so that the distance in cuids
7039 between two insns is not affected by -g. */
7041 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
7043 if (GET_CODE (insn) != NOTE
7044 || NOTE_LINE_NUMBER (insn) < 0)
7045 INSN_CUID (insn) = ++i;
7046 else
7047 /* Give a line number note the same cuid as preceding insn. */
7048 INSN_CUID (insn) = i;
7051 /* Initialize which registers are clobbered by calls. */
7053 CLEAR_HARD_REG_SET (regs_invalidated_by_call);
7055 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
7056 if ((call_used_regs[i]
7057 /* Used to check !fixed_regs[i] here, but that isn't safe;
7058 fixed regs are still call-clobbered, and sched can get
7059 confused if they can "live across calls".
7061 The frame pointer is always preserved across calls. The arg
7062 pointer is if it is fixed. The stack pointer usually is, unless
7063 RETURN_POPS_ARGS, in which case an explicit CLOBBER
7064 will be present. If we are generating PIC code, the PIC offset
7065 table register is preserved across calls. */
7067 && i != STACK_POINTER_REGNUM
7068 && i != FRAME_POINTER_REGNUM
7069 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
7070 && i != HARD_FRAME_POINTER_REGNUM
7071 #endif
7072 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
7073 && ! (i == ARG_POINTER_REGNUM && fixed_regs[i])
7074 #endif
7075 #if defined (PIC_OFFSET_TABLE_REGNUM) && !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED)
7076 && ! (i == PIC_OFFSET_TABLE_REGNUM && flag_pic)
7077 #endif
7079 || global_regs[i])
7080 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
7082 ggc_push_context ();
7084 /* Loop over basic blocks.
7085 Compute the maximum number of qty's needed for each basic block
7086 (which is 2 for each SET). */
7087 insn = f;
7088 while (insn)
7090 cse_altered = 0;
7091 cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps, after_loop,
7092 flag_cse_skip_blocks);
7094 /* If this basic block was already processed or has no sets, skip it. */
7095 if (val.nsets == 0 || GET_MODE (insn) == QImode)
7097 PUT_MODE (insn, VOIDmode);
7098 insn = (val.last ? NEXT_INSN (val.last) : 0);
7099 val.path_size = 0;
7100 continue;
7103 cse_basic_block_start = val.low_cuid;
7104 cse_basic_block_end = val.high_cuid;
7105 max_qty = val.nsets * 2;
7107 if (file)
7108 fnotice (file, ";; Processing block from %d to %d, %d sets.\n",
7109 INSN_UID (insn), val.last ? INSN_UID (val.last) : 0,
7110 val.nsets);
7112 /* Make MAX_QTY bigger to give us room to optimize
7113 past the end of this basic block, if that should prove useful. */
7114 if (max_qty < 500)
7115 max_qty = 500;
7117 max_qty += max_reg;
7119 /* If this basic block is being extended by following certain jumps,
7120 (see `cse_end_of_basic_block'), we reprocess the code from the start.
7121 Otherwise, we start after this basic block. */
7122 if (val.path_size > 0)
7123 cse_basic_block (insn, val.last, val.path, 0);
7124 else
7126 int old_cse_jumps_altered = cse_jumps_altered;
7127 rtx temp;
7129 /* When cse changes a conditional jump to an unconditional
7130 jump, we want to reprocess the block, since it will give
7131 us a new branch path to investigate. */
7132 cse_jumps_altered = 0;
7133 temp = cse_basic_block (insn, val.last, val.path, ! after_loop);
7134 if (cse_jumps_altered == 0
7135 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
7136 insn = temp;
7138 cse_jumps_altered |= old_cse_jumps_altered;
7141 if (cse_altered)
7142 ggc_collect ();
7144 #ifdef USE_C_ALLOCA
7145 alloca (0);
7146 #endif
7149 ggc_pop_context ();
7151 if (max_elements_made < n_elements_made)
7152 max_elements_made = n_elements_made;
7154 /* Clean up. */
7155 end_alias_analysis ();
7156 free (uid_cuid);
7157 free (reg_eqv_table);
7159 return cse_jumps_altered || recorded_label_ref;
7162 /* Process a single basic block. FROM and TO and the limits of the basic
7163 block. NEXT_BRANCH points to the branch path when following jumps or
7164 a null path when not following jumps.
7166 AROUND_LOOP is non-zero if we are to try to cse around to the start of a
7167 loop. This is true when we are being called for the last time on a
7168 block and this CSE pass is before loop.c. */
7170 static rtx
7171 cse_basic_block (from, to, next_branch, around_loop)
7172 register rtx from, to;
7173 struct branch_path *next_branch;
7174 int around_loop;
7176 register rtx insn;
7177 int to_usage = 0;
7178 rtx libcall_insn = NULL_RTX;
7179 int num_insns = 0;
7181 /* This array is undefined before max_reg, so only allocate
7182 the space actually needed and adjust the start. */
7184 qty_table
7185 = (struct qty_table_elem *) xmalloc ((max_qty - max_reg)
7186 * sizeof (struct qty_table_elem));
7187 qty_table -= max_reg;
7189 new_basic_block ();
7191 /* TO might be a label. If so, protect it from being deleted. */
7192 if (to != 0 && GET_CODE (to) == CODE_LABEL)
7193 ++LABEL_NUSES (to);
7195 for (insn = from; insn != to; insn = NEXT_INSN (insn))
7197 register enum rtx_code code = GET_CODE (insn);
7199 /* If we have processed 1,000 insns, flush the hash table to
7200 avoid extreme quadratic behavior. We must not include NOTEs
7201 in the count since there may be more of them when generating
7202 debugging information. If we clear the table at different
7203 times, code generated with -g -O might be different than code
7204 generated with -O but not -g.
7206 ??? This is a real kludge and needs to be done some other way.
7207 Perhaps for 2.9. */
7208 if (code != NOTE && num_insns++ > 1000)
7210 flush_hash_table ();
7211 num_insns = 0;
7214 /* See if this is a branch that is part of the path. If so, and it is
7215 to be taken, do so. */
7216 if (next_branch->branch == insn)
7218 enum taken status = next_branch++->status;
7219 if (status != NOT_TAKEN)
7221 if (status == TAKEN)
7222 record_jump_equiv (insn, 1);
7223 else
7224 invalidate_skipped_block (NEXT_INSN (insn));
7226 /* Set the last insn as the jump insn; it doesn't affect cc0.
7227 Then follow this branch. */
7228 #ifdef HAVE_cc0
7229 prev_insn_cc0 = 0;
7230 #endif
7231 prev_insn = insn;
7232 insn = JUMP_LABEL (insn);
7233 continue;
7237 if (GET_MODE (insn) == QImode)
7238 PUT_MODE (insn, VOIDmode);
7240 if (GET_RTX_CLASS (code) == 'i')
7242 rtx p;
7244 /* Process notes first so we have all notes in canonical forms when
7245 looking for duplicate operations. */
7247 if (REG_NOTES (insn))
7248 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX);
7250 /* Track when we are inside in LIBCALL block. Inside such a block,
7251 we do not want to record destinations. The last insn of a
7252 LIBCALL block is not considered to be part of the block, since
7253 its destination is the result of the block and hence should be
7254 recorded. */
7256 if (REG_NOTES (insn) != 0)
7258 if ((p = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
7259 libcall_insn = XEXP (p, 0);
7260 else if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
7261 libcall_insn = 0;
7264 cse_insn (insn, libcall_insn);
7267 /* If INSN is now an unconditional jump, skip to the end of our
7268 basic block by pretending that we just did the last insn in the
7269 basic block. If we are jumping to the end of our block, show
7270 that we can have one usage of TO. */
7272 if (any_uncondjump_p (insn))
7274 if (to == 0)
7276 free (qty_table + max_reg);
7277 return 0;
7280 if (JUMP_LABEL (insn) == to)
7281 to_usage = 1;
7283 /* Maybe TO was deleted because the jump is unconditional.
7284 If so, there is nothing left in this basic block. */
7285 /* ??? Perhaps it would be smarter to set TO
7286 to whatever follows this insn,
7287 and pretend the basic block had always ended here. */
7288 if (INSN_DELETED_P (to))
7289 break;
7291 insn = PREV_INSN (to);
7294 /* See if it is ok to keep on going past the label
7295 which used to end our basic block. Remember that we incremented
7296 the count of that label, so we decrement it here. If we made
7297 a jump unconditional, TO_USAGE will be one; in that case, we don't
7298 want to count the use in that jump. */
7300 if (to != 0 && NEXT_INSN (insn) == to
7301 && GET_CODE (to) == CODE_LABEL && --LABEL_NUSES (to) == to_usage)
7303 struct cse_basic_block_data val;
7304 rtx prev;
7306 insn = NEXT_INSN (to);
7308 /* If TO was the last insn in the function, we are done. */
7309 if (insn == 0)
7311 free (qty_table + max_reg);
7312 return 0;
7315 /* If TO was preceded by a BARRIER we are done with this block
7316 because it has no continuation. */
7317 prev = prev_nonnote_insn (to);
7318 if (prev && GET_CODE (prev) == BARRIER)
7320 free (qty_table + max_reg);
7321 return insn;
7324 /* Find the end of the following block. Note that we won't be
7325 following branches in this case. */
7326 to_usage = 0;
7327 val.path_size = 0;
7328 cse_end_of_basic_block (insn, &val, 0, 0, 0);
7330 /* If the tables we allocated have enough space left
7331 to handle all the SETs in the next basic block,
7332 continue through it. Otherwise, return,
7333 and that block will be scanned individually. */
7334 if (val.nsets * 2 + next_qty > max_qty)
7335 break;
7337 cse_basic_block_start = val.low_cuid;
7338 cse_basic_block_end = val.high_cuid;
7339 to = val.last;
7341 /* Prevent TO from being deleted if it is a label. */
7342 if (to != 0 && GET_CODE (to) == CODE_LABEL)
7343 ++LABEL_NUSES (to);
7345 /* Back up so we process the first insn in the extension. */
7346 insn = PREV_INSN (insn);
7350 if (next_qty > max_qty)
7351 abort ();
7353 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
7354 the previous insn is the only insn that branches to the head of a loop,
7355 we can cse into the loop. Don't do this if we changed the jump
7356 structure of a loop unless we aren't going to be following jumps. */
7358 if ((cse_jumps_altered == 0
7359 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
7360 && around_loop && to != 0
7361 && GET_CODE (to) == NOTE && NOTE_LINE_NUMBER (to) == NOTE_INSN_LOOP_END
7362 && GET_CODE (PREV_INSN (to)) == JUMP_INSN
7363 && JUMP_LABEL (PREV_INSN (to)) != 0
7364 && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to))) == 1)
7365 cse_around_loop (JUMP_LABEL (PREV_INSN (to)));
7367 free (qty_table + max_reg);
7369 return to ? NEXT_INSN (to) : 0;
7372 /* Count the number of times registers are used (not set) in X.
7373 COUNTS is an array in which we accumulate the count, INCR is how much
7374 we count each register usage.
7376 Don't count a usage of DEST, which is the SET_DEST of a SET which
7377 contains X in its SET_SRC. This is because such a SET does not
7378 modify the liveness of DEST. */
7380 static void
7381 count_reg_usage (x, counts, dest, incr)
7382 rtx x;
7383 int *counts;
7384 rtx dest;
7385 int incr;
7387 enum rtx_code code;
7388 const char *fmt;
7389 int i, j;
7391 if (x == 0)
7392 return;
7394 switch (code = GET_CODE (x))
7396 case REG:
7397 if (x != dest)
7398 counts[REGNO (x)] += incr;
7399 return;
7401 case PC:
7402 case CC0:
7403 case CONST:
7404 case CONST_INT:
7405 case CONST_DOUBLE:
7406 case SYMBOL_REF:
7407 case LABEL_REF:
7408 return;
7410 case CLOBBER:
7411 /* If we are clobbering a MEM, mark any registers inside the address
7412 as being used. */
7413 if (GET_CODE (XEXP (x, 0)) == MEM)
7414 count_reg_usage (XEXP (XEXP (x, 0), 0), counts, NULL_RTX, incr);
7415 return;
7417 case SET:
7418 /* Unless we are setting a REG, count everything in SET_DEST. */
7419 if (GET_CODE (SET_DEST (x)) != REG)
7420 count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr);
7422 /* If SRC has side-effects, then we can't delete this insn, so the
7423 usage of SET_DEST inside SRC counts.
7425 ??? Strictly-speaking, we might be preserving this insn
7426 because some other SET has side-effects, but that's hard
7427 to do and can't happen now. */
7428 count_reg_usage (SET_SRC (x), counts,
7429 side_effects_p (SET_SRC (x)) ? NULL_RTX : SET_DEST (x),
7430 incr);
7431 return;
7433 case CALL_INSN:
7434 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, NULL_RTX, incr);
7435 /* Fall through. */
7437 case INSN:
7438 case JUMP_INSN:
7439 count_reg_usage (PATTERN (x), counts, NULL_RTX, incr);
7441 /* Things used in a REG_EQUAL note aren't dead since loop may try to
7442 use them. */
7444 count_reg_usage (REG_NOTES (x), counts, NULL_RTX, incr);
7445 return;
7447 case EXPR_LIST:
7448 case INSN_LIST:
7449 if (REG_NOTE_KIND (x) == REG_EQUAL
7450 || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE))
7451 count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr);
7452 count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr);
7453 return;
7455 default:
7456 break;
7459 fmt = GET_RTX_FORMAT (code);
7460 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7462 if (fmt[i] == 'e')
7463 count_reg_usage (XEXP (x, i), counts, dest, incr);
7464 else if (fmt[i] == 'E')
7465 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7466 count_reg_usage (XVECEXP (x, i, j), counts, dest, incr);
7470 /* Scan all the insns and delete any that are dead; i.e., they store a register
7471 that is never used or they copy a register to itself.
7473 This is used to remove insns made obviously dead by cse, loop or other
7474 optimizations. It improves the heuristics in loop since it won't try to
7475 move dead invariants out of loops or make givs for dead quantities. The
7476 remaining passes of the compilation are also sped up. */
7478 void
7479 delete_trivially_dead_insns (insns, nreg)
7480 rtx insns;
7481 int nreg;
7483 int *counts;
7484 rtx insn, prev;
7485 #ifdef HAVE_cc0
7486 rtx tem;
7487 #endif
7488 int i;
7489 int in_libcall = 0, dead_libcall = 0;
7491 /* First count the number of times each register is used. */
7492 counts = (int *) xcalloc (nreg, sizeof (int));
7493 for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn))
7494 count_reg_usage (insn, counts, NULL_RTX, 1);
7496 /* Go from the last insn to the first and delete insns that only set unused
7497 registers or copy a register to itself. As we delete an insn, remove
7498 usage counts for registers it uses.
7500 The first jump optimization pass may leave a real insn as the last
7501 insn in the function. We must not skip that insn or we may end
7502 up deleting code that is not really dead. */
7503 insn = get_last_insn ();
7504 if (! INSN_P (insn))
7505 insn = prev_real_insn (insn);
7507 for (; insn; insn = prev)
7509 int live_insn = 0;
7510 rtx note;
7512 prev = prev_real_insn (insn);
7514 /* Don't delete any insns that are part of a libcall block unless
7515 we can delete the whole libcall block.
7517 Flow or loop might get confused if we did that. Remember
7518 that we are scanning backwards. */
7519 if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
7521 in_libcall = 1;
7522 live_insn = 1;
7523 dead_libcall = 0;
7525 /* See if there's a REG_EQUAL note on this insn and try to
7526 replace the source with the REG_EQUAL expression.
7528 We assume that insns with REG_RETVALs can only be reg->reg
7529 copies at this point. */
7530 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
7531 if (note)
7533 rtx set = single_set (insn);
7534 rtx new = simplify_rtx (XEXP (note, 0));
7536 if (!new)
7537 new = XEXP (note, 0);
7539 if (set && validate_change (insn, &SET_SRC (set), new, 0))
7541 remove_note (insn,
7542 find_reg_note (insn, REG_RETVAL, NULL_RTX));
7543 dead_libcall = 1;
7547 else if (in_libcall)
7548 live_insn = ! dead_libcall;
7549 else if (GET_CODE (PATTERN (insn)) == SET)
7551 if ((GET_CODE (SET_DEST (PATTERN (insn))) == REG
7552 || GET_CODE (SET_DEST (PATTERN (insn))) == SUBREG)
7553 && rtx_equal_p (SET_DEST (PATTERN (insn)),
7554 SET_SRC (PATTERN (insn))))
7556 else if (GET_CODE (SET_DEST (PATTERN (insn))) == STRICT_LOW_PART
7557 && rtx_equal_p (XEXP (SET_DEST (PATTERN (insn)), 0),
7558 SET_SRC (PATTERN (insn))))
7561 #ifdef HAVE_cc0
7562 else if (GET_CODE (SET_DEST (PATTERN (insn))) == CC0
7563 && ! side_effects_p (SET_SRC (PATTERN (insn)))
7564 && ((tem = next_nonnote_insn (insn)) == 0
7565 || ! INSN_P (tem)
7566 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
7568 #endif
7569 else if (GET_CODE (SET_DEST (PATTERN (insn))) != REG
7570 || REGNO (SET_DEST (PATTERN (insn))) < FIRST_PSEUDO_REGISTER
7571 || counts[REGNO (SET_DEST (PATTERN (insn)))] != 0
7572 || side_effects_p (SET_SRC (PATTERN (insn)))
7573 /* An ADDRESSOF expression can turn into a use of the
7574 internal arg pointer, so always consider the
7575 internal arg pointer live. If it is truly dead,
7576 flow will delete the initializing insn. */
7577 || (SET_DEST (PATTERN (insn))
7578 == current_function_internal_arg_pointer))
7579 live_insn = 1;
7581 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
7582 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
7584 rtx elt = XVECEXP (PATTERN (insn), 0, i);
7586 if (GET_CODE (elt) == SET)
7588 if ((GET_CODE (SET_DEST (elt)) == REG
7589 || GET_CODE (SET_DEST (elt)) == SUBREG)
7590 && rtx_equal_p (SET_DEST (elt), SET_SRC (elt)))
7593 #ifdef HAVE_cc0
7594 else if (GET_CODE (SET_DEST (elt)) == CC0
7595 && ! side_effects_p (SET_SRC (elt))
7596 && ((tem = next_nonnote_insn (insn)) == 0
7597 || ! INSN_P (tem)
7598 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
7600 #endif
7601 else if (GET_CODE (SET_DEST (elt)) != REG
7602 || REGNO (SET_DEST (elt)) < FIRST_PSEUDO_REGISTER
7603 || counts[REGNO (SET_DEST (elt))] != 0
7604 || side_effects_p (SET_SRC (elt))
7605 /* An ADDRESSOF expression can turn into a use of the
7606 internal arg pointer, so always consider the
7607 internal arg pointer live. If it is truly dead,
7608 flow will delete the initializing insn. */
7609 || (SET_DEST (elt)
7610 == current_function_internal_arg_pointer))
7611 live_insn = 1;
7613 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
7614 live_insn = 1;
7616 else
7617 live_insn = 1;
7619 /* If this is a dead insn, delete it and show registers in it aren't
7620 being used. */
7622 if (! live_insn)
7624 count_reg_usage (insn, counts, NULL_RTX, -1);
7625 delete_insn (insn);
7628 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))
7630 in_libcall = 0;
7631 dead_libcall = 0;
7635 /* Clean up. */
7636 free (counts);