1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
31 To scan an insn, call `find_reloads'. This does two things:
32 1. sets up tables describing which values must be reloaded
33 for this insn, and what kind of hard regs they must be reloaded into;
34 2. optionally record the locations where those values appear in
35 the data, so they can be replaced properly later.
36 This is done only if the second arg to `find_reloads' is nonzero.
38 The third arg to `find_reloads' specifies the number of levels
39 of indirect addressing supported by the machine. If it is zero,
40 indirect addressing is not valid. If it is one, (MEM (REG n))
41 is valid even if (REG n) did not get a hard register; if it is two,
42 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
43 hard register, and similarly for higher values.
45 Then you must choose the hard regs to reload those pseudo regs into,
46 and generate appropriate load insns before this insn and perhaps
47 also store insns after this insn. Set up the array `reload_reg_rtx'
48 to contain the REG rtx's for the registers you used. In some
49 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
50 for certain reloads. Then that tells you which register to use,
51 so you do not need to allocate one. But you still do need to add extra
52 instructions to copy the value into and out of that register.
54 Finally you must call `subst_reloads' to substitute the reload reg rtx's
55 into the locations already recorded.
59 find_reloads can alter the operands of the instruction it is called on.
61 1. Two operands of any sort may be interchanged, if they are in a
62 commutative instruction.
63 This happens only if find_reloads thinks the instruction will compile
66 2. Pseudo-registers that are equivalent to constants are replaced
67 with those constants if they are not in hard registers.
69 1 happens every time find_reloads is called.
70 2 happens only when REPLACE is 1, which is only when
71 actually doing the reloads, not when just counting them.
73 Using a reload register for several reloads in one insn:
75 When an insn has reloads, it is considered as having three parts:
76 the input reloads, the insn itself after reloading, and the output reloads.
77 Reloads of values used in memory addresses are often needed for only one part.
79 When this is so, reload_when_needed records which part needs the reload.
80 Two reloads for different parts of the insn can share the same reload
83 When a reload is used for addresses in multiple parts, or when it is
84 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
85 a register with any other reload. */
93 #include "insn-config.h"
99 #include "hard-reg-set.h"
103 #include "function.h"
106 #ifndef REGISTER_MOVE_COST
107 #define REGISTER_MOVE_COST(m, x, y) 2
110 #ifndef REGNO_MODE_OK_FOR_BASE_P
111 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
114 #ifndef REG_MODE_OK_FOR_BASE_P
115 #define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
118 /* All reloads of the current insn are recorded here. See reload.h for
121 struct reload rld
[MAX_RELOADS
];
123 /* All the "earlyclobber" operands of the current insn
124 are recorded here. */
126 rtx reload_earlyclobbers
[MAX_RECOG_OPERANDS
];
128 int reload_n_operands
;
130 /* Replacing reloads.
132 If `replace_reloads' is nonzero, then as each reload is recorded
133 an entry is made for it in the table `replacements'.
134 Then later `subst_reloads' can look through that table and
135 perform all the replacements needed. */
137 /* Nonzero means record the places to replace. */
138 static int replace_reloads
;
140 /* Each replacement is recorded with a structure like this. */
143 rtx
*where
; /* Location to store in */
144 rtx
*subreg_loc
; /* Location of SUBREG if WHERE is inside
145 a SUBREG; 0 otherwise. */
146 int what
; /* which reload this is for */
147 enum machine_mode mode
; /* mode it must have */
150 static struct replacement replacements
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
152 /* Number of replacements currently recorded. */
153 static int n_replacements
;
155 /* Used to track what is modified by an operand. */
158 int reg_flag
; /* Nonzero if referencing a register. */
159 int safe
; /* Nonzero if this can't conflict with anything. */
160 rtx base
; /* Base address for MEM. */
161 HOST_WIDE_INT start
; /* Starting offset or register number. */
162 HOST_WIDE_INT end
; /* Ending offset or register number. */
165 #ifdef SECONDARY_MEMORY_NEEDED
167 /* Save MEMs needed to copy from one class of registers to another. One MEM
168 is used per mode, but normally only one or two modes are ever used.
170 We keep two versions, before and after register elimination. The one
171 after register elimination is record separately for each operand. This
172 is done in case the address is not valid to be sure that we separately
175 static rtx secondary_memlocs
[NUM_MACHINE_MODES
];
176 static rtx secondary_memlocs_elim
[NUM_MACHINE_MODES
][MAX_RECOG_OPERANDS
];
179 /* The instruction we are doing reloads for;
180 so we can test whether a register dies in it. */
181 static rtx this_insn
;
183 /* Nonzero if this instruction is a user-specified asm with operands. */
184 static int this_insn_is_asm
;
186 /* If hard_regs_live_known is nonzero,
187 we can tell which hard regs are currently live,
188 at least enough to succeed in choosing dummy reloads. */
189 static int hard_regs_live_known
;
191 /* Indexed by hard reg number,
192 element is nonnegative if hard reg has been spilled.
193 This vector is passed to `find_reloads' as an argument
194 and is not changed here. */
195 static short *static_reload_reg_p
;
197 /* Set to 1 in subst_reg_equivs if it changes anything. */
198 static int subst_reg_equivs_changed
;
200 /* On return from push_reload, holds the reload-number for the OUT
201 operand, which can be different for that from the input operand. */
202 static int output_reloadnum
;
204 /* Compare two RTX's. */
205 #define MATCHES(x, y) \
206 (x == y || (x != 0 && (GET_CODE (x) == REG \
207 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
208 : rtx_equal_p (x, y) && ! side_effects_p (x))))
210 /* Indicates if two reloads purposes are for similar enough things that we
211 can merge their reloads. */
212 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
213 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
214 || ((when1) == (when2) && (op1) == (op2)) \
215 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
216 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
217 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
218 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
219 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
221 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
222 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
223 ((when1) != (when2) \
224 || ! ((op1) == (op2) \
225 || (when1) == RELOAD_FOR_INPUT \
226 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
227 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
229 /* If we are going to reload an address, compute the reload type to
231 #define ADDR_TYPE(type) \
232 ((type) == RELOAD_FOR_INPUT_ADDRESS \
233 ? RELOAD_FOR_INPADDR_ADDRESS \
234 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
235 ? RELOAD_FOR_OUTADDR_ADDRESS \
238 #ifdef HAVE_SECONDARY_RELOADS
239 static int push_secondary_reload
PARAMS ((int, rtx
, int, int, enum reg_class
,
240 enum machine_mode
, enum reload_type
,
243 static enum reg_class find_valid_class
PARAMS ((enum machine_mode
, int));
244 static int reload_inner_reg_of_subreg
PARAMS ((rtx
, enum machine_mode
));
245 static void push_replacement
PARAMS ((rtx
*, int, enum machine_mode
));
246 static void combine_reloads
PARAMS ((void));
247 static int find_reusable_reload
PARAMS ((rtx
*, rtx
, enum reg_class
,
248 enum reload_type
, int, int));
249 static rtx find_dummy_reload
PARAMS ((rtx
, rtx
, rtx
*, rtx
*,
250 enum machine_mode
, enum machine_mode
,
251 enum reg_class
, int, int));
252 static int hard_reg_set_here_p
PARAMS ((unsigned int, unsigned int, rtx
));
253 static struct decomposition decompose
PARAMS ((rtx
));
254 static int immune_p
PARAMS ((rtx
, rtx
, struct decomposition
));
255 static int alternative_allows_memconst
PARAMS ((const char *, int));
256 static rtx find_reloads_toplev
PARAMS ((rtx
, int, enum reload_type
, int,
258 static rtx make_memloc
PARAMS ((rtx
, int));
259 static int find_reloads_address
PARAMS ((enum machine_mode
, rtx
*, rtx
, rtx
*,
260 int, enum reload_type
, int, rtx
));
261 static rtx subst_reg_equivs
PARAMS ((rtx
, rtx
));
262 static rtx subst_indexed_address
PARAMS ((rtx
));
263 static void update_auto_inc_notes
PARAMS ((rtx
, int, int));
264 static int find_reloads_address_1
PARAMS ((enum machine_mode
, rtx
, int, rtx
*,
265 int, enum reload_type
,int, rtx
));
266 static void find_reloads_address_part
PARAMS ((rtx
, rtx
*, enum reg_class
,
267 enum machine_mode
, int,
268 enum reload_type
, int));
269 static rtx find_reloads_subreg_address
PARAMS ((rtx
, int, int,
270 enum reload_type
, int, rtx
));
271 static void copy_replacements_1
PARAMS ((rtx
*, rtx
*, int));
272 static int find_inc_amount
PARAMS ((rtx
, rtx
));
274 #ifdef HAVE_SECONDARY_RELOADS
276 /* Determine if any secondary reloads are needed for loading (if IN_P is
277 non-zero) or storing (if IN_P is zero) X to or from a reload register of
278 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
279 are needed, push them.
281 Return the reload number of the secondary reload we made, or -1 if
282 we didn't need one. *PICODE is set to the insn_code to use if we do
283 need a secondary reload. */
286 push_secondary_reload (in_p
, x
, opnum
, optional
, reload_class
, reload_mode
,
292 enum reg_class reload_class
;
293 enum machine_mode reload_mode
;
294 enum reload_type type
;
295 enum insn_code
*picode
;
297 enum reg_class
class = NO_REGS
;
298 enum machine_mode mode
= reload_mode
;
299 enum insn_code icode
= CODE_FOR_nothing
;
300 enum reg_class t_class
= NO_REGS
;
301 enum machine_mode t_mode
= VOIDmode
;
302 enum insn_code t_icode
= CODE_FOR_nothing
;
303 enum reload_type secondary_type
;
304 int s_reload
, t_reload
= -1;
306 if (type
== RELOAD_FOR_INPUT_ADDRESS
307 || type
== RELOAD_FOR_OUTPUT_ADDRESS
308 || type
== RELOAD_FOR_INPADDR_ADDRESS
309 || type
== RELOAD_FOR_OUTADDR_ADDRESS
)
310 secondary_type
= type
;
312 secondary_type
= in_p
? RELOAD_FOR_INPUT_ADDRESS
: RELOAD_FOR_OUTPUT_ADDRESS
;
314 *picode
= CODE_FOR_nothing
;
316 /* If X is a paradoxical SUBREG, use the inner value to determine both the
317 mode and object being reloaded. */
318 if (GET_CODE (x
) == SUBREG
319 && (GET_MODE_SIZE (GET_MODE (x
))
320 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))))
323 reload_mode
= GET_MODE (x
);
326 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
327 is still a pseudo-register by now, it *must* have an equivalent MEM
328 but we don't want to assume that), use that equivalent when seeing if
329 a secondary reload is needed since whether or not a reload is needed
330 might be sensitive to the form of the MEM. */
332 if (GET_CODE (x
) == REG
&& REGNO (x
) >= FIRST_PSEUDO_REGISTER
333 && reg_equiv_mem
[REGNO (x
)] != 0)
334 x
= reg_equiv_mem
[REGNO (x
)];
336 #ifdef SECONDARY_INPUT_RELOAD_CLASS
338 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
341 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
343 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
346 /* If we don't need any secondary registers, done. */
347 if (class == NO_REGS
)
350 /* Get a possible insn to use. If the predicate doesn't accept X, don't
353 icode
= (in_p
? reload_in_optab
[(int) reload_mode
]
354 : reload_out_optab
[(int) reload_mode
]);
356 if (icode
!= CODE_FOR_nothing
357 && insn_data
[(int) icode
].operand
[in_p
].predicate
358 && (! (insn_data
[(int) icode
].operand
[in_p
].predicate
) (x
, reload_mode
)))
359 icode
= CODE_FOR_nothing
;
361 /* If we will be using an insn, see if it can directly handle the reload
362 register we will be using. If it can, the secondary reload is for a
363 scratch register. If it can't, we will use the secondary reload for
364 an intermediate register and require a tertiary reload for the scratch
367 if (icode
!= CODE_FOR_nothing
)
369 /* If IN_P is non-zero, the reload register will be the output in
370 operand 0. If IN_P is zero, the reload register will be the input
371 in operand 1. Outputs should have an initial "=", which we must
374 enum reg_class insn_class
;
376 if (insn_data
[(int) icode
].operand
[!in_p
].constraint
[0] == 0)
377 insn_class
= ALL_REGS
;
381 = insn_data
[(int) icode
].operand
[!in_p
].constraint
[in_p
];
383 = (insn_letter
== 'r' ? GENERAL_REGS
384 : REG_CLASS_FROM_LETTER ((unsigned char) insn_letter
));
386 if (insn_class
== NO_REGS
)
389 && insn_data
[(int) icode
].operand
[!in_p
].constraint
[0] != '=')
393 /* The scratch register's constraint must start with "=&". */
394 if (insn_data
[(int) icode
].operand
[2].constraint
[0] != '='
395 || insn_data
[(int) icode
].operand
[2].constraint
[1] != '&')
398 if (reg_class_subset_p (reload_class
, insn_class
))
399 mode
= insn_data
[(int) icode
].operand
[2].mode
;
402 char t_letter
= insn_data
[(int) icode
].operand
[2].constraint
[2];
404 t_mode
= insn_data
[(int) icode
].operand
[2].mode
;
405 t_class
= (t_letter
== 'r' ? GENERAL_REGS
406 : REG_CLASS_FROM_LETTER ((unsigned char) t_letter
));
408 icode
= CODE_FOR_nothing
;
412 /* This case isn't valid, so fail. Reload is allowed to use the same
413 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
414 in the case of a secondary register, we actually need two different
415 registers for correct code. We fail here to prevent the possibility of
416 silently generating incorrect code later.
418 The convention is that secondary input reloads are valid only if the
419 secondary_class is different from class. If you have such a case, you
420 can not use secondary reloads, you must work around the problem some
423 Allow this when a reload_in/out pattern is being used. I.e. assume
424 that the generated code handles this case. */
426 if (in_p
&& class == reload_class
&& icode
== CODE_FOR_nothing
427 && t_icode
== CODE_FOR_nothing
)
430 /* If we need a tertiary reload, see if we have one we can reuse or else
433 if (t_class
!= NO_REGS
)
435 for (t_reload
= 0; t_reload
< n_reloads
; t_reload
++)
436 if (rld
[t_reload
].secondary_p
437 && (reg_class_subset_p (t_class
, rld
[t_reload
].class)
438 || reg_class_subset_p (rld
[t_reload
].class, t_class
))
439 && ((in_p
&& rld
[t_reload
].inmode
== t_mode
)
440 || (! in_p
&& rld
[t_reload
].outmode
== t_mode
))
441 && ((in_p
&& (rld
[t_reload
].secondary_in_icode
442 == CODE_FOR_nothing
))
443 || (! in_p
&&(rld
[t_reload
].secondary_out_icode
444 == CODE_FOR_nothing
)))
445 && (reg_class_size
[(int) t_class
] == 1 || SMALL_REGISTER_CLASSES
)
446 && MERGABLE_RELOADS (secondary_type
,
447 rld
[t_reload
].when_needed
,
448 opnum
, rld
[t_reload
].opnum
))
451 rld
[t_reload
].inmode
= t_mode
;
453 rld
[t_reload
].outmode
= t_mode
;
455 if (reg_class_subset_p (t_class
, rld
[t_reload
].class))
456 rld
[t_reload
].class = t_class
;
458 rld
[t_reload
].opnum
= MIN (rld
[t_reload
].opnum
, opnum
);
459 rld
[t_reload
].optional
&= optional
;
460 rld
[t_reload
].secondary_p
= 1;
461 if (MERGE_TO_OTHER (secondary_type
, rld
[t_reload
].when_needed
,
462 opnum
, rld
[t_reload
].opnum
))
463 rld
[t_reload
].when_needed
= RELOAD_OTHER
;
466 if (t_reload
== n_reloads
)
468 /* We need to make a new tertiary reload for this register class. */
469 rld
[t_reload
].in
= rld
[t_reload
].out
= 0;
470 rld
[t_reload
].class = t_class
;
471 rld
[t_reload
].inmode
= in_p
? t_mode
: VOIDmode
;
472 rld
[t_reload
].outmode
= ! in_p
? t_mode
: VOIDmode
;
473 rld
[t_reload
].reg_rtx
= 0;
474 rld
[t_reload
].optional
= optional
;
475 rld
[t_reload
].inc
= 0;
476 /* Maybe we could combine these, but it seems too tricky. */
477 rld
[t_reload
].nocombine
= 1;
478 rld
[t_reload
].in_reg
= 0;
479 rld
[t_reload
].out_reg
= 0;
480 rld
[t_reload
].opnum
= opnum
;
481 rld
[t_reload
].when_needed
= secondary_type
;
482 rld
[t_reload
].secondary_in_reload
= -1;
483 rld
[t_reload
].secondary_out_reload
= -1;
484 rld
[t_reload
].secondary_in_icode
= CODE_FOR_nothing
;
485 rld
[t_reload
].secondary_out_icode
= CODE_FOR_nothing
;
486 rld
[t_reload
].secondary_p
= 1;
492 /* See if we can reuse an existing secondary reload. */
493 for (s_reload
= 0; s_reload
< n_reloads
; s_reload
++)
494 if (rld
[s_reload
].secondary_p
495 && (reg_class_subset_p (class, rld
[s_reload
].class)
496 || reg_class_subset_p (rld
[s_reload
].class, class))
497 && ((in_p
&& rld
[s_reload
].inmode
== mode
)
498 || (! in_p
&& rld
[s_reload
].outmode
== mode
))
499 && ((in_p
&& rld
[s_reload
].secondary_in_reload
== t_reload
)
500 || (! in_p
&& rld
[s_reload
].secondary_out_reload
== t_reload
))
501 && ((in_p
&& rld
[s_reload
].secondary_in_icode
== t_icode
)
502 || (! in_p
&& rld
[s_reload
].secondary_out_icode
== t_icode
))
503 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
504 && MERGABLE_RELOADS (secondary_type
, rld
[s_reload
].when_needed
,
505 opnum
, rld
[s_reload
].opnum
))
508 rld
[s_reload
].inmode
= mode
;
510 rld
[s_reload
].outmode
= mode
;
512 if (reg_class_subset_p (class, rld
[s_reload
].class))
513 rld
[s_reload
].class = class;
515 rld
[s_reload
].opnum
= MIN (rld
[s_reload
].opnum
, opnum
);
516 rld
[s_reload
].optional
&= optional
;
517 rld
[s_reload
].secondary_p
= 1;
518 if (MERGE_TO_OTHER (secondary_type
, rld
[s_reload
].when_needed
,
519 opnum
, rld
[s_reload
].opnum
))
520 rld
[s_reload
].when_needed
= RELOAD_OTHER
;
523 if (s_reload
== n_reloads
)
525 #ifdef SECONDARY_MEMORY_NEEDED
526 /* If we need a memory location to copy between the two reload regs,
527 set it up now. Note that we do the input case before making
528 the reload and the output case after. This is due to the
529 way reloads are output. */
531 if (in_p
&& icode
== CODE_FOR_nothing
532 && SECONDARY_MEMORY_NEEDED (class, reload_class
, mode
))
534 get_secondary_mem (x
, reload_mode
, opnum
, type
);
536 /* We may have just added new reloads. Make sure we add
537 the new reload at the end. */
538 s_reload
= n_reloads
;
542 /* We need to make a new secondary reload for this register class. */
543 rld
[s_reload
].in
= rld
[s_reload
].out
= 0;
544 rld
[s_reload
].class = class;
546 rld
[s_reload
].inmode
= in_p
? mode
: VOIDmode
;
547 rld
[s_reload
].outmode
= ! in_p
? mode
: VOIDmode
;
548 rld
[s_reload
].reg_rtx
= 0;
549 rld
[s_reload
].optional
= optional
;
550 rld
[s_reload
].inc
= 0;
551 /* Maybe we could combine these, but it seems too tricky. */
552 rld
[s_reload
].nocombine
= 1;
553 rld
[s_reload
].in_reg
= 0;
554 rld
[s_reload
].out_reg
= 0;
555 rld
[s_reload
].opnum
= opnum
;
556 rld
[s_reload
].when_needed
= secondary_type
;
557 rld
[s_reload
].secondary_in_reload
= in_p
? t_reload
: -1;
558 rld
[s_reload
].secondary_out_reload
= ! in_p
? t_reload
: -1;
559 rld
[s_reload
].secondary_in_icode
= in_p
? t_icode
: CODE_FOR_nothing
;
560 rld
[s_reload
].secondary_out_icode
561 = ! in_p
? t_icode
: CODE_FOR_nothing
;
562 rld
[s_reload
].secondary_p
= 1;
566 #ifdef SECONDARY_MEMORY_NEEDED
567 if (! in_p
&& icode
== CODE_FOR_nothing
568 && SECONDARY_MEMORY_NEEDED (reload_class
, class, mode
))
569 get_secondary_mem (x
, mode
, opnum
, type
);
576 #endif /* HAVE_SECONDARY_RELOADS */
578 #ifdef SECONDARY_MEMORY_NEEDED
580 /* Return a memory location that will be used to copy X in mode MODE.
581 If we haven't already made a location for this mode in this insn,
582 call find_reloads_address on the location being returned. */
585 get_secondary_mem (x
, mode
, opnum
, type
)
586 rtx x ATTRIBUTE_UNUSED
;
587 enum machine_mode mode
;
589 enum reload_type type
;
594 /* By default, if MODE is narrower than a word, widen it to a word.
595 This is required because most machines that require these memory
596 locations do not support short load and stores from all registers
597 (e.g., FP registers). */
599 #ifdef SECONDARY_MEMORY_NEEDED_MODE
600 mode
= SECONDARY_MEMORY_NEEDED_MODE (mode
);
602 if (GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
&& INTEGRAL_MODE_P (mode
))
603 mode
= mode_for_size (BITS_PER_WORD
, GET_MODE_CLASS (mode
), 0);
606 /* If we already have made a MEM for this operand in MODE, return it. */
607 if (secondary_memlocs_elim
[(int) mode
][opnum
] != 0)
608 return secondary_memlocs_elim
[(int) mode
][opnum
];
610 /* If this is the first time we've tried to get a MEM for this mode,
611 allocate a new one. `something_changed' in reload will get set
612 by noticing that the frame size has changed. */
614 if (secondary_memlocs
[(int) mode
] == 0)
616 #ifdef SECONDARY_MEMORY_NEEDED_RTX
617 secondary_memlocs
[(int) mode
] = SECONDARY_MEMORY_NEEDED_RTX (mode
);
619 secondary_memlocs
[(int) mode
]
620 = assign_stack_local (mode
, GET_MODE_SIZE (mode
), 0);
624 /* Get a version of the address doing any eliminations needed. If that
625 didn't give us a new MEM, make a new one if it isn't valid. */
627 loc
= eliminate_regs (secondary_memlocs
[(int) mode
], VOIDmode
, NULL_RTX
);
628 mem_valid
= strict_memory_address_p (mode
, XEXP (loc
, 0));
630 if (! mem_valid
&& loc
== secondary_memlocs
[(int) mode
])
631 loc
= copy_rtx (loc
);
633 /* The only time the call below will do anything is if the stack
634 offset is too large. In that case IND_LEVELS doesn't matter, so we
635 can just pass a zero. Adjust the type to be the address of the
636 corresponding object. If the address was valid, save the eliminated
637 address. If it wasn't valid, we need to make a reload each time, so
642 type
= (type
== RELOAD_FOR_INPUT
? RELOAD_FOR_INPUT_ADDRESS
643 : type
== RELOAD_FOR_OUTPUT
? RELOAD_FOR_OUTPUT_ADDRESS
646 find_reloads_address (mode
, (rtx
*) 0, XEXP (loc
, 0), &XEXP (loc
, 0),
650 secondary_memlocs_elim
[(int) mode
][opnum
] = loc
;
654 /* Clear any secondary memory locations we've made. */
657 clear_secondary_mem ()
659 memset ((char *) secondary_memlocs
, 0, sizeof secondary_memlocs
);
661 #endif /* SECONDARY_MEMORY_NEEDED */
663 /* Find the largest class for which every register number plus N is valid in
664 M1 (if in range). Abort if no such class exists. */
666 static enum reg_class
667 find_valid_class (m1
, n
)
668 enum machine_mode m1 ATTRIBUTE_UNUSED
;
673 enum reg_class best_class
= NO_REGS
;
674 unsigned int best_size
= 0;
676 for (class = 1; class < N_REG_CLASSES
; class++)
679 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
&& ! bad
; regno
++)
680 if (TEST_HARD_REG_BIT (reg_class_contents
[class], regno
)
681 && TEST_HARD_REG_BIT (reg_class_contents
[class], regno
+ n
)
682 && ! HARD_REGNO_MODE_OK (regno
+ n
, m1
))
685 if (! bad
&& reg_class_size
[class] > best_size
)
686 best_class
= class, best_size
= reg_class_size
[class];
695 /* Return the number of a previously made reload that can be combined with
696 a new one, or n_reloads if none of the existing reloads can be used.
697 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
698 push_reload, they determine the kind of the new reload that we try to
699 combine. P_IN points to the corresponding value of IN, which can be
700 modified by this function.
701 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
704 find_reusable_reload (p_in
, out
, class, type
, opnum
, dont_share
)
706 enum reg_class
class;
707 enum reload_type type
;
708 int opnum
, dont_share
;
712 /* We can't merge two reloads if the output of either one is
715 if (earlyclobber_operand_p (out
))
718 /* We can use an existing reload if the class is right
719 and at least one of IN and OUT is a match
720 and the other is at worst neutral.
721 (A zero compared against anything is neutral.)
723 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
724 for the same thing since that can cause us to need more reload registers
725 than we otherwise would. */
727 for (i
= 0; i
< n_reloads
; i
++)
728 if ((reg_class_subset_p (class, rld
[i
].class)
729 || reg_class_subset_p (rld
[i
].class, class))
730 /* If the existing reload has a register, it must fit our class. */
731 && (rld
[i
].reg_rtx
== 0
732 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
733 true_regnum (rld
[i
].reg_rtx
)))
734 && ((in
!= 0 && MATCHES (rld
[i
].in
, in
) && ! dont_share
735 && (out
== 0 || rld
[i
].out
== 0 || MATCHES (rld
[i
].out
, out
)))
736 || (out
!= 0 && MATCHES (rld
[i
].out
, out
)
737 && (in
== 0 || rld
[i
].in
== 0 || MATCHES (rld
[i
].in
, in
))))
738 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
739 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
740 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
, opnum
, rld
[i
].opnum
))
743 /* Reloading a plain reg for input can match a reload to postincrement
744 that reg, since the postincrement's value is the right value.
745 Likewise, it can match a preincrement reload, since we regard
746 the preincrementation as happening before any ref in this insn
748 for (i
= 0; i
< n_reloads
; i
++)
749 if ((reg_class_subset_p (class, rld
[i
].class)
750 || reg_class_subset_p (rld
[i
].class, class))
751 /* If the existing reload has a register, it must fit our
753 && (rld
[i
].reg_rtx
== 0
754 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
755 true_regnum (rld
[i
].reg_rtx
)))
756 && out
== 0 && rld
[i
].out
== 0 && rld
[i
].in
!= 0
757 && ((GET_CODE (in
) == REG
758 && GET_RTX_CLASS (GET_CODE (rld
[i
].in
)) == 'a'
759 && MATCHES (XEXP (rld
[i
].in
, 0), in
))
760 || (GET_CODE (rld
[i
].in
) == REG
761 && GET_RTX_CLASS (GET_CODE (in
)) == 'a'
762 && MATCHES (XEXP (in
, 0), rld
[i
].in
)))
763 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
764 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
765 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
,
766 opnum
, rld
[i
].opnum
))
768 /* Make sure reload_in ultimately has the increment,
769 not the plain register. */
770 if (GET_CODE (in
) == REG
)
777 /* Return nonzero if X is a SUBREG which will require reloading of its
778 SUBREG_REG expression. */
781 reload_inner_reg_of_subreg (x
, mode
)
783 enum machine_mode mode
;
787 /* Only SUBREGs are problematical. */
788 if (GET_CODE (x
) != SUBREG
)
791 inner
= SUBREG_REG (x
);
793 /* If INNER is a constant or PLUS, then INNER must be reloaded. */
794 if (CONSTANT_P (inner
) || GET_CODE (inner
) == PLUS
)
797 /* If INNER is not a hard register, then INNER will not need to
799 if (GET_CODE (inner
) != REG
800 || REGNO (inner
) >= FIRST_PSEUDO_REGISTER
)
803 /* If INNER is not ok for MODE, then INNER will need reloading. */
804 if (! HARD_REGNO_MODE_OK (subreg_regno (x
), mode
))
807 /* If the outer part is a word or smaller, INNER larger than a
808 word and the number of regs for INNER is not the same as the
809 number of words in INNER, then INNER will need reloading. */
810 return (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
811 && GET_MODE_SIZE (GET_MODE (inner
)) > UNITS_PER_WORD
812 && ((GET_MODE_SIZE (GET_MODE (inner
)) / UNITS_PER_WORD
)
813 != HARD_REGNO_NREGS (REGNO (inner
), GET_MODE (inner
))));
816 /* Record one reload that needs to be performed.
817 IN is an rtx saying where the data are to be found before this instruction.
818 OUT says where they must be stored after the instruction.
819 (IN is zero for data not read, and OUT is zero for data not written.)
820 INLOC and OUTLOC point to the places in the instructions where
821 IN and OUT were found.
822 If IN and OUT are both non-zero, it means the same register must be used
823 to reload both IN and OUT.
825 CLASS is a register class required for the reloaded data.
826 INMODE is the machine mode that the instruction requires
827 for the reg that replaces IN and OUTMODE is likewise for OUT.
829 If IN is zero, then OUT's location and mode should be passed as
832 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
834 OPTIONAL nonzero means this reload does not need to be performed:
835 it can be discarded if that is more convenient.
837 OPNUM and TYPE say what the purpose of this reload is.
839 The return value is the reload-number for this reload.
841 If both IN and OUT are nonzero, in some rare cases we might
842 want to make two separate reloads. (Actually we never do this now.)
843 Therefore, the reload-number for OUT is stored in
844 output_reloadnum when we return; the return value applies to IN.
845 Usually (presently always), when IN and OUT are nonzero,
846 the two reload-numbers are equal, but the caller should be careful to
850 push_reload (in
, out
, inloc
, outloc
, class,
851 inmode
, outmode
, strict_low
, optional
, opnum
, type
)
854 enum reg_class
class;
855 enum machine_mode inmode
, outmode
;
859 enum reload_type type
;
863 int dont_remove_subreg
= 0;
864 rtx
*in_subreg_loc
= 0, *out_subreg_loc
= 0;
865 int secondary_in_reload
= -1, secondary_out_reload
= -1;
866 enum insn_code secondary_in_icode
= CODE_FOR_nothing
;
867 enum insn_code secondary_out_icode
= CODE_FOR_nothing
;
869 /* INMODE and/or OUTMODE could be VOIDmode if no mode
870 has been specified for the operand. In that case,
871 use the operand's mode as the mode to reload. */
872 if (inmode
== VOIDmode
&& in
!= 0)
873 inmode
= GET_MODE (in
);
874 if (outmode
== VOIDmode
&& out
!= 0)
875 outmode
= GET_MODE (out
);
877 /* If IN is a pseudo register everywhere-equivalent to a constant, and
878 it is not in a hard register, reload straight from the constant,
879 since we want to get rid of such pseudo registers.
880 Often this is done earlier, but not always in find_reloads_address. */
881 if (in
!= 0 && GET_CODE (in
) == REG
)
883 int regno
= REGNO (in
);
885 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
886 && reg_equiv_constant
[regno
] != 0)
887 in
= reg_equiv_constant
[regno
];
890 /* Likewise for OUT. Of course, OUT will never be equivalent to
891 an actual constant, but it might be equivalent to a memory location
892 (in the case of a parameter). */
893 if (out
!= 0 && GET_CODE (out
) == REG
)
895 int regno
= REGNO (out
);
897 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
898 && reg_equiv_constant
[regno
] != 0)
899 out
= reg_equiv_constant
[regno
];
902 /* If we have a read-write operand with an address side-effect,
903 change either IN or OUT so the side-effect happens only once. */
904 if (in
!= 0 && out
!= 0 && GET_CODE (in
) == MEM
&& rtx_equal_p (in
, out
))
905 switch (GET_CODE (XEXP (in
, 0)))
907 case POST_INC
: case POST_DEC
: case POST_MODIFY
:
908 in
= replace_equiv_address_nv (in
, XEXP (XEXP (in
, 0), 0));
911 case PRE_INC
: case PRE_DEC
: case PRE_MODIFY
:
912 out
= replace_equiv_address_nv (out
, XEXP (XEXP (out
, 0), 0));
919 /* If we are reloading a (SUBREG constant ...), really reload just the
920 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
921 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
922 a pseudo and hence will become a MEM) with M1 wider than M2 and the
923 register is a pseudo, also reload the inside expression.
924 For machines that extend byte loads, do this for any SUBREG of a pseudo
925 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
926 M2 is an integral mode that gets extended when loaded.
927 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
928 either M1 is not valid for R or M2 is wider than a word but we only
929 need one word to store an M2-sized quantity in R.
930 (However, if OUT is nonzero, we need to reload the reg *and*
931 the subreg, so do nothing here, and let following statement handle it.)
933 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
934 we can't handle it here because CONST_INT does not indicate a mode.
936 Similarly, we must reload the inside expression if we have a
937 STRICT_LOW_PART (presumably, in == out in the cas).
939 Also reload the inner expression if it does not require a secondary
940 reload but the SUBREG does.
942 Finally, reload the inner expression if it is a register that is in
943 the class whose registers cannot be referenced in a different size
944 and M1 is not the same size as M2. If subreg_lowpart_p is false, we
945 cannot reload just the inside since we might end up with the wrong
946 register class. But if it is inside a STRICT_LOW_PART, we have
947 no choice, so we hope we do get the right register class there. */
949 if (in
!= 0 && GET_CODE (in
) == SUBREG
950 && (subreg_lowpart_p (in
) || strict_low
)
951 #ifdef CLASS_CANNOT_CHANGE_MODE
952 && (class != CLASS_CANNOT_CHANGE_MODE
953 || ! CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (in
)), inmode
))
955 && (CONSTANT_P (SUBREG_REG (in
))
956 || GET_CODE (SUBREG_REG (in
)) == PLUS
958 || (((GET_CODE (SUBREG_REG (in
)) == REG
959 && REGNO (SUBREG_REG (in
)) >= FIRST_PSEUDO_REGISTER
)
960 || GET_CODE (SUBREG_REG (in
)) == MEM
)
961 && ((GET_MODE_SIZE (inmode
)
962 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
963 #ifdef LOAD_EXTEND_OP
964 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
965 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
967 && (GET_MODE_SIZE (inmode
)
968 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
969 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in
)))
970 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in
))) != NIL
)
972 #ifdef WORD_REGISTER_OPERATIONS
973 || ((GET_MODE_SIZE (inmode
)
974 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
975 && ((GET_MODE_SIZE (inmode
) - 1) / UNITS_PER_WORD
==
976 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))) - 1)
980 || (GET_CODE (SUBREG_REG (in
)) == REG
981 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
982 /* The case where out is nonzero
983 is handled differently in the following statement. */
984 && (out
== 0 || subreg_lowpart_p (in
))
985 && ((GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
986 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
988 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
990 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in
)),
991 GET_MODE (SUBREG_REG (in
)))))
992 || ! HARD_REGNO_MODE_OK (subreg_regno (in
), inmode
)))
993 #ifdef SECONDARY_INPUT_RELOAD_CLASS
994 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode
, in
) != NO_REGS
995 && (SECONDARY_INPUT_RELOAD_CLASS (class,
996 GET_MODE (SUBREG_REG (in
)),
1000 #ifdef CLASS_CANNOT_CHANGE_MODE
1001 || (GET_CODE (SUBREG_REG (in
)) == REG
1002 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1003 && (TEST_HARD_REG_BIT
1004 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_MODE
],
1005 REGNO (SUBREG_REG (in
))))
1006 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (in
)),
1011 in_subreg_loc
= inloc
;
1012 inloc
= &SUBREG_REG (in
);
1014 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1015 if (GET_CODE (in
) == MEM
)
1016 /* This is supposed to happen only for paradoxical subregs made by
1017 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1018 if (GET_MODE_SIZE (GET_MODE (in
)) > GET_MODE_SIZE (inmode
))
1021 inmode
= GET_MODE (in
);
1024 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1025 either M1 is not valid for R or M2 is wider than a word but we only
1026 need one word to store an M2-sized quantity in R.
1028 However, we must reload the inner reg *as well as* the subreg in
1031 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1032 code above. This can happen if SUBREG_BYTE != 0. */
1034 if (in
!= 0 && reload_inner_reg_of_subreg (in
, inmode
))
1036 enum reg_class in_class
= class;
1038 if (GET_CODE (SUBREG_REG (in
)) == REG
)
1040 = find_valid_class (inmode
,
1041 subreg_regno_offset (REGNO (SUBREG_REG (in
)),
1042 GET_MODE (SUBREG_REG (in
)),
1046 /* This relies on the fact that emit_reload_insns outputs the
1047 instructions for input reloads of type RELOAD_OTHER in the same
1048 order as the reloads. Thus if the outer reload is also of type
1049 RELOAD_OTHER, we are guaranteed that this inner reload will be
1050 output before the outer reload. */
1051 push_reload (SUBREG_REG (in
), NULL_RTX
, &SUBREG_REG (in
), (rtx
*) 0,
1052 in_class
, VOIDmode
, VOIDmode
, 0, 0, opnum
, type
);
1053 dont_remove_subreg
= 1;
1056 /* Similarly for paradoxical and problematical SUBREGs on the output.
1057 Note that there is no reason we need worry about the previous value
1058 of SUBREG_REG (out); even if wider than out,
1059 storing in a subreg is entitled to clobber it all
1060 (except in the case of STRICT_LOW_PART,
1061 and in that case the constraint should label it input-output.) */
1062 if (out
!= 0 && GET_CODE (out
) == SUBREG
1063 && (subreg_lowpart_p (out
) || strict_low
)
1064 #ifdef CLASS_CANNOT_CHANGE_MODE
1065 && (class != CLASS_CANNOT_CHANGE_MODE
1066 || ! CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (out
)),
1069 && (CONSTANT_P (SUBREG_REG (out
))
1071 || (((GET_CODE (SUBREG_REG (out
)) == REG
1072 && REGNO (SUBREG_REG (out
)) >= FIRST_PSEUDO_REGISTER
)
1073 || GET_CODE (SUBREG_REG (out
)) == MEM
)
1074 && ((GET_MODE_SIZE (outmode
)
1075 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
1076 #ifdef WORD_REGISTER_OPERATIONS
1077 || ((GET_MODE_SIZE (outmode
)
1078 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
1079 && ((GET_MODE_SIZE (outmode
) - 1) / UNITS_PER_WORD
==
1080 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))) - 1)
1084 || (GET_CODE (SUBREG_REG (out
)) == REG
1085 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1086 && ((GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
1087 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1089 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1091 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out
)),
1092 GET_MODE (SUBREG_REG (out
)))))
1093 || ! HARD_REGNO_MODE_OK (subreg_regno (out
), outmode
)))
1094 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1095 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode
, out
) != NO_REGS
1096 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1097 GET_MODE (SUBREG_REG (out
)),
1101 #ifdef CLASS_CANNOT_CHANGE_MODE
1102 || (GET_CODE (SUBREG_REG (out
)) == REG
1103 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1104 && (TEST_HARD_REG_BIT
1105 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_MODE
],
1106 REGNO (SUBREG_REG (out
))))
1107 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (out
)),
1112 out_subreg_loc
= outloc
;
1113 outloc
= &SUBREG_REG (out
);
1115 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1116 if (GET_CODE (out
) == MEM
1117 && GET_MODE_SIZE (GET_MODE (out
)) > GET_MODE_SIZE (outmode
))
1120 outmode
= GET_MODE (out
);
1123 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1124 either M1 is not valid for R or M2 is wider than a word but we only
1125 need one word to store an M2-sized quantity in R.
1127 However, we must reload the inner reg *as well as* the subreg in
1128 that case. In this case, the inner reg is an in-out reload. */
1130 if (out
!= 0 && reload_inner_reg_of_subreg (out
, outmode
))
1132 /* This relies on the fact that emit_reload_insns outputs the
1133 instructions for output reloads of type RELOAD_OTHER in reverse
1134 order of the reloads. Thus if the outer reload is also of type
1135 RELOAD_OTHER, we are guaranteed that this inner reload will be
1136 output after the outer reload. */
1137 dont_remove_subreg
= 1;
1138 push_reload (SUBREG_REG (out
), SUBREG_REG (out
), &SUBREG_REG (out
),
1140 find_valid_class (outmode
,
1141 subreg_regno_offset (REGNO (SUBREG_REG (out
)),
1142 GET_MODE (SUBREG_REG (out
)),
1145 VOIDmode
, VOIDmode
, 0, 0,
1146 opnum
, RELOAD_OTHER
);
1149 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1150 if (in
!= 0 && out
!= 0 && GET_CODE (out
) == MEM
1151 && (GET_CODE (in
) == REG
|| GET_CODE (in
) == MEM
)
1152 && reg_overlap_mentioned_for_reload_p (in
, XEXP (out
, 0)))
1155 /* If IN is a SUBREG of a hard register, make a new REG. This
1156 simplifies some of the cases below. */
1158 if (in
!= 0 && GET_CODE (in
) == SUBREG
&& GET_CODE (SUBREG_REG (in
)) == REG
1159 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1160 && ! dont_remove_subreg
)
1161 in
= gen_rtx_REG (GET_MODE (in
), subreg_regno (in
));
1163 /* Similarly for OUT. */
1164 if (out
!= 0 && GET_CODE (out
) == SUBREG
1165 && GET_CODE (SUBREG_REG (out
)) == REG
1166 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1167 && ! dont_remove_subreg
)
1168 out
= gen_rtx_REG (GET_MODE (out
), subreg_regno (out
));
1170 /* Narrow down the class of register wanted if that is
1171 desirable on this machine for efficiency. */
1173 class = PREFERRED_RELOAD_CLASS (in
, class);
1175 /* Output reloads may need analogous treatment, different in detail. */
1176 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1178 class = PREFERRED_OUTPUT_RELOAD_CLASS (out
, class);
1181 /* Make sure we use a class that can handle the actual pseudo
1182 inside any subreg. For example, on the 386, QImode regs
1183 can appear within SImode subregs. Although GENERAL_REGS
1184 can handle SImode, QImode needs a smaller class. */
1185 #ifdef LIMIT_RELOAD_CLASS
1187 class = LIMIT_RELOAD_CLASS (inmode
, class);
1188 else if (in
!= 0 && GET_CODE (in
) == SUBREG
)
1189 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in
)), class);
1192 class = LIMIT_RELOAD_CLASS (outmode
, class);
1193 if (out
!= 0 && GET_CODE (out
) == SUBREG
)
1194 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out
)), class);
1197 /* Verify that this class is at least possible for the mode that
1199 if (this_insn_is_asm
)
1201 enum machine_mode mode
;
1202 if (GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (outmode
))
1206 if (mode
== VOIDmode
)
1208 error_for_asm (this_insn
, "cannot reload integer constant operand in `asm'");
1213 outmode
= word_mode
;
1215 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1216 if (HARD_REGNO_MODE_OK (i
, mode
)
1217 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
))
1219 int nregs
= HARD_REGNO_NREGS (i
, mode
);
1222 for (j
= 1; j
< nregs
; j
++)
1223 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
+ j
))
1228 if (i
== FIRST_PSEUDO_REGISTER
)
1230 error_for_asm (this_insn
, "impossible register constraint in `asm'");
1235 /* Optional output reloads are always OK even if we have no register class,
1236 since the function of these reloads is only to have spill_reg_store etc.
1237 set, so that the storing insn can be deleted later. */
1238 if (class == NO_REGS
1239 && (optional
== 0 || type
!= RELOAD_FOR_OUTPUT
))
1242 i
= find_reusable_reload (&in
, out
, class, type
, opnum
, dont_share
);
1246 /* See if we need a secondary reload register to move between CLASS
1247 and IN or CLASS and OUT. Get the icode and push any required reloads
1248 needed for each of them if so. */
1250 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1253 = push_secondary_reload (1, in
, opnum
, optional
, class, inmode
, type
,
1254 &secondary_in_icode
);
1257 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1258 if (out
!= 0 && GET_CODE (out
) != SCRATCH
)
1259 secondary_out_reload
1260 = push_secondary_reload (0, out
, opnum
, optional
, class, outmode
,
1261 type
, &secondary_out_icode
);
1264 /* We found no existing reload suitable for re-use.
1265 So add an additional reload. */
1267 #ifdef SECONDARY_MEMORY_NEEDED
1268 /* If a memory location is needed for the copy, make one. */
1269 if (in
!= 0 && GET_CODE (in
) == REG
1270 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1271 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in
)),
1273 get_secondary_mem (in
, inmode
, opnum
, type
);
1279 rld
[i
].class = class;
1280 rld
[i
].inmode
= inmode
;
1281 rld
[i
].outmode
= outmode
;
1283 rld
[i
].optional
= optional
;
1285 rld
[i
].nocombine
= 0;
1286 rld
[i
].in_reg
= inloc
? *inloc
: 0;
1287 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1288 rld
[i
].opnum
= opnum
;
1289 rld
[i
].when_needed
= type
;
1290 rld
[i
].secondary_in_reload
= secondary_in_reload
;
1291 rld
[i
].secondary_out_reload
= secondary_out_reload
;
1292 rld
[i
].secondary_in_icode
= secondary_in_icode
;
1293 rld
[i
].secondary_out_icode
= secondary_out_icode
;
1294 rld
[i
].secondary_p
= 0;
1298 #ifdef SECONDARY_MEMORY_NEEDED
1299 if (out
!= 0 && GET_CODE (out
) == REG
1300 && REGNO (out
) < FIRST_PSEUDO_REGISTER
1301 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out
)),
1303 get_secondary_mem (out
, outmode
, opnum
, type
);
1308 /* We are reusing an existing reload,
1309 but we may have additional information for it.
1310 For example, we may now have both IN and OUT
1311 while the old one may have just one of them. */
1313 /* The modes can be different. If they are, we want to reload in
1314 the larger mode, so that the value is valid for both modes. */
1315 if (inmode
!= VOIDmode
1316 && GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (rld
[i
].inmode
))
1317 rld
[i
].inmode
= inmode
;
1318 if (outmode
!= VOIDmode
1319 && GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (rld
[i
].outmode
))
1320 rld
[i
].outmode
= outmode
;
1323 rtx in_reg
= inloc
? *inloc
: 0;
1324 /* If we merge reloads for two distinct rtl expressions that
1325 are identical in content, there might be duplicate address
1326 reloads. Remove the extra set now, so that if we later find
1327 that we can inherit this reload, we can get rid of the
1328 address reloads altogether.
1330 Do not do this if both reloads are optional since the result
1331 would be an optional reload which could potentially leave
1332 unresolved address replacements.
1334 It is not sufficient to call transfer_replacements since
1335 choose_reload_regs will remove the replacements for address
1336 reloads of inherited reloads which results in the same
1338 if (rld
[i
].in
!= in
&& rtx_equal_p (in
, rld
[i
].in
)
1339 && ! (rld
[i
].optional
&& optional
))
1341 /* We must keep the address reload with the lower operand
1343 if (opnum
> rld
[i
].opnum
)
1345 remove_address_replacements (in
);
1347 in_reg
= rld
[i
].in_reg
;
1350 remove_address_replacements (rld
[i
].in
);
1353 rld
[i
].in_reg
= in_reg
;
1358 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1360 if (reg_class_subset_p (class, rld
[i
].class))
1361 rld
[i
].class = class;
1362 rld
[i
].optional
&= optional
;
1363 if (MERGE_TO_OTHER (type
, rld
[i
].when_needed
,
1364 opnum
, rld
[i
].opnum
))
1365 rld
[i
].when_needed
= RELOAD_OTHER
;
1366 rld
[i
].opnum
= MIN (rld
[i
].opnum
, opnum
);
1369 /* If the ostensible rtx being reloaded differs from the rtx found
1370 in the location to substitute, this reload is not safe to combine
1371 because we cannot reliably tell whether it appears in the insn. */
1373 if (in
!= 0 && in
!= *inloc
)
1374 rld
[i
].nocombine
= 1;
1377 /* This was replaced by changes in find_reloads_address_1 and the new
1378 function inc_for_reload, which go with a new meaning of reload_inc. */
1380 /* If this is an IN/OUT reload in an insn that sets the CC,
1381 it must be for an autoincrement. It doesn't work to store
1382 the incremented value after the insn because that would clobber the CC.
1383 So we must do the increment of the value reloaded from,
1384 increment it, store it back, then decrement again. */
1385 if (out
!= 0 && sets_cc0_p (PATTERN (this_insn
)))
1389 rld
[i
].inc
= find_inc_amount (PATTERN (this_insn
), in
);
1390 /* If we did not find a nonzero amount-to-increment-by,
1391 that contradicts the belief that IN is being incremented
1392 in an address in this insn. */
1393 if (rld
[i
].inc
== 0)
1398 /* If we will replace IN and OUT with the reload-reg,
1399 record where they are located so that substitution need
1400 not do a tree walk. */
1402 if (replace_reloads
)
1406 struct replacement
*r
= &replacements
[n_replacements
++];
1408 r
->subreg_loc
= in_subreg_loc
;
1412 if (outloc
!= 0 && outloc
!= inloc
)
1414 struct replacement
*r
= &replacements
[n_replacements
++];
1417 r
->subreg_loc
= out_subreg_loc
;
1422 /* If this reload is just being introduced and it has both
1423 an incoming quantity and an outgoing quantity that are
1424 supposed to be made to match, see if either one of the two
1425 can serve as the place to reload into.
1427 If one of them is acceptable, set rld[i].reg_rtx
1430 if (in
!= 0 && out
!= 0 && in
!= out
&& rld
[i
].reg_rtx
== 0)
1432 rld
[i
].reg_rtx
= find_dummy_reload (in
, out
, inloc
, outloc
,
1435 earlyclobber_operand_p (out
));
1437 /* If the outgoing register already contains the same value
1438 as the incoming one, we can dispense with loading it.
1439 The easiest way to tell the caller that is to give a phony
1440 value for the incoming operand (same as outgoing one). */
1441 if (rld
[i
].reg_rtx
== out
1442 && (GET_CODE (in
) == REG
|| CONSTANT_P (in
))
1443 && 0 != find_equiv_reg (in
, this_insn
, 0, REGNO (out
),
1444 static_reload_reg_p
, i
, inmode
))
1448 /* If this is an input reload and the operand contains a register that
1449 dies in this insn and is used nowhere else, see if it is the right class
1450 to be used for this reload. Use it if so. (This occurs most commonly
1451 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1452 this if it is also an output reload that mentions the register unless
1453 the output is a SUBREG that clobbers an entire register.
1455 Note that the operand might be one of the spill regs, if it is a
1456 pseudo reg and we are in a block where spilling has not taken place.
1457 But if there is no spilling in this block, that is OK.
1458 An explicitly used hard reg cannot be a spill reg. */
1460 if (rld
[i
].reg_rtx
== 0 && in
!= 0)
1464 enum machine_mode rel_mode
= inmode
;
1466 if (out
&& GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (inmode
))
1469 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1470 if (REG_NOTE_KIND (note
) == REG_DEAD
1471 && GET_CODE (XEXP (note
, 0)) == REG
1472 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1473 && reg_mentioned_p (XEXP (note
, 0), in
)
1474 && ! refers_to_regno_for_reload_p (regno
,
1476 + HARD_REGNO_NREGS (regno
,
1478 PATTERN (this_insn
), inloc
)
1479 /* If this is also an output reload, IN cannot be used as
1480 the reload register if it is set in this insn unless IN
1482 && (out
== 0 || in
== out
1483 || ! hard_reg_set_here_p (regno
,
1485 + HARD_REGNO_NREGS (regno
,
1487 PATTERN (this_insn
)))
1488 /* ??? Why is this code so different from the previous?
1489 Is there any simple coherent way to describe the two together?
1490 What's going on here. */
1492 || (GET_CODE (in
) == SUBREG
1493 && (((GET_MODE_SIZE (GET_MODE (in
)) + (UNITS_PER_WORD
- 1))
1495 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1496 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))))
1497 /* Make sure the operand fits in the reg that dies. */
1498 && (GET_MODE_SIZE (rel_mode
)
1499 <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0))))
1500 && HARD_REGNO_MODE_OK (regno
, inmode
)
1501 && HARD_REGNO_MODE_OK (regno
, outmode
))
1504 unsigned int nregs
= MAX (HARD_REGNO_NREGS (regno
, inmode
),
1505 HARD_REGNO_NREGS (regno
, outmode
));
1507 for (offs
= 0; offs
< nregs
; offs
++)
1508 if (fixed_regs
[regno
+ offs
]
1509 || ! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1515 rld
[i
].reg_rtx
= gen_rtx_REG (rel_mode
, regno
);
1522 output_reloadnum
= i
;
1527 /* Record an additional place we must replace a value
1528 for which we have already recorded a reload.
1529 RELOADNUM is the value returned by push_reload
1530 when the reload was recorded.
1531 This is used in insn patterns that use match_dup. */
1534 push_replacement (loc
, reloadnum
, mode
)
1537 enum machine_mode mode
;
1539 if (replace_reloads
)
1541 struct replacement
*r
= &replacements
[n_replacements
++];
1542 r
->what
= reloadnum
;
1549 /* Transfer all replacements that used to be in reload FROM to be in
1553 transfer_replacements (to
, from
)
1558 for (i
= 0; i
< n_replacements
; i
++)
1559 if (replacements
[i
].what
== from
)
1560 replacements
[i
].what
= to
;
1563 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1564 or a subpart of it. If we have any replacements registered for IN_RTX,
1565 cancel the reloads that were supposed to load them.
1566 Return non-zero if we canceled any reloads. */
1568 remove_address_replacements (in_rtx
)
1572 char reload_flags
[MAX_RELOADS
];
1573 int something_changed
= 0;
1575 memset (reload_flags
, 0, sizeof reload_flags
);
1576 for (i
= 0, j
= 0; i
< n_replacements
; i
++)
1578 if (loc_mentioned_in_p (replacements
[i
].where
, in_rtx
))
1579 reload_flags
[replacements
[i
].what
] |= 1;
1582 replacements
[j
++] = replacements
[i
];
1583 reload_flags
[replacements
[i
].what
] |= 2;
1586 /* Note that the following store must be done before the recursive calls. */
1589 for (i
= n_reloads
- 1; i
>= 0; i
--)
1591 if (reload_flags
[i
] == 1)
1593 deallocate_reload_reg (i
);
1594 remove_address_replacements (rld
[i
].in
);
1596 something_changed
= 1;
1599 return something_changed
;
1602 /* If there is only one output reload, and it is not for an earlyclobber
1603 operand, try to combine it with a (logically unrelated) input reload
1604 to reduce the number of reload registers needed.
1606 This is safe if the input reload does not appear in
1607 the value being output-reloaded, because this implies
1608 it is not needed any more once the original insn completes.
1610 If that doesn't work, see we can use any of the registers that
1611 die in this insn as a reload register. We can if it is of the right
1612 class and does not appear in the value being output-reloaded. */
1618 int output_reload
= -1;
1619 int secondary_out
= -1;
1622 /* Find the output reload; return unless there is exactly one
1623 and that one is mandatory. */
1625 for (i
= 0; i
< n_reloads
; i
++)
1626 if (rld
[i
].out
!= 0)
1628 if (output_reload
>= 0)
1633 if (output_reload
< 0 || rld
[output_reload
].optional
)
1636 /* An input-output reload isn't combinable. */
1638 if (rld
[output_reload
].in
!= 0)
1641 /* If this reload is for an earlyclobber operand, we can't do anything. */
1642 if (earlyclobber_operand_p (rld
[output_reload
].out
))
1645 /* If there is a reload for part of the address of this operand, we would
1646 need to chnage it to RELOAD_FOR_OTHER_ADDRESS. But that would extend
1647 its life to the point where doing this combine would not lower the
1648 number of spill registers needed. */
1649 for (i
= 0; i
< n_reloads
; i
++)
1650 if ((rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
1651 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
1652 && rld
[i
].opnum
== rld
[output_reload
].opnum
)
1655 /* Check each input reload; can we combine it? */
1657 for (i
= 0; i
< n_reloads
; i
++)
1658 if (rld
[i
].in
&& ! rld
[i
].optional
&& ! rld
[i
].nocombine
1659 /* Life span of this reload must not extend past main insn. */
1660 && rld
[i
].when_needed
!= RELOAD_FOR_OUTPUT_ADDRESS
1661 && rld
[i
].when_needed
!= RELOAD_FOR_OUTADDR_ADDRESS
1662 && rld
[i
].when_needed
!= RELOAD_OTHER
1663 && (CLASS_MAX_NREGS (rld
[i
].class, rld
[i
].inmode
)
1664 == CLASS_MAX_NREGS (rld
[output_reload
].class,
1665 rld
[output_reload
].outmode
))
1667 && rld
[i
].reg_rtx
== 0
1668 #ifdef SECONDARY_MEMORY_NEEDED
1669 /* Don't combine two reloads with different secondary
1670 memory locations. */
1671 && (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
] == 0
1672 || secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] == 0
1673 || rtx_equal_p (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
],
1674 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
]))
1676 && (SMALL_REGISTER_CLASSES
1677 ? (rld
[i
].class == rld
[output_reload
].class)
1678 : (reg_class_subset_p (rld
[i
].class,
1679 rld
[output_reload
].class)
1680 || reg_class_subset_p (rld
[output_reload
].class,
1682 && (MATCHES (rld
[i
].in
, rld
[output_reload
].out
)
1683 /* Args reversed because the first arg seems to be
1684 the one that we imagine being modified
1685 while the second is the one that might be affected. */
1686 || (! reg_overlap_mentioned_for_reload_p (rld
[output_reload
].out
,
1688 /* However, if the input is a register that appears inside
1689 the output, then we also can't share.
1690 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1691 If the same reload reg is used for both reg 69 and the
1692 result to be stored in memory, then that result
1693 will clobber the address of the memory ref. */
1694 && ! (GET_CODE (rld
[i
].in
) == REG
1695 && reg_overlap_mentioned_for_reload_p (rld
[i
].in
,
1696 rld
[output_reload
].out
))))
1697 && ! reload_inner_reg_of_subreg (rld
[i
].in
, rld
[i
].inmode
)
1698 && (reg_class_size
[(int) rld
[i
].class]
1699 || SMALL_REGISTER_CLASSES
)
1700 /* We will allow making things slightly worse by combining an
1701 input and an output, but no worse than that. */
1702 && (rld
[i
].when_needed
== RELOAD_FOR_INPUT
1703 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT
))
1707 /* We have found a reload to combine with! */
1708 rld
[i
].out
= rld
[output_reload
].out
;
1709 rld
[i
].out_reg
= rld
[output_reload
].out_reg
;
1710 rld
[i
].outmode
= rld
[output_reload
].outmode
;
1711 /* Mark the old output reload as inoperative. */
1712 rld
[output_reload
].out
= 0;
1713 /* The combined reload is needed for the entire insn. */
1714 rld
[i
].when_needed
= RELOAD_OTHER
;
1715 /* If the output reload had a secondary reload, copy it. */
1716 if (rld
[output_reload
].secondary_out_reload
!= -1)
1718 rld
[i
].secondary_out_reload
1719 = rld
[output_reload
].secondary_out_reload
;
1720 rld
[i
].secondary_out_icode
1721 = rld
[output_reload
].secondary_out_icode
;
1724 #ifdef SECONDARY_MEMORY_NEEDED
1725 /* Copy any secondary MEM. */
1726 if (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] != 0)
1727 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
]
1728 = secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
];
1730 /* If required, minimize the register class. */
1731 if (reg_class_subset_p (rld
[output_reload
].class,
1733 rld
[i
].class = rld
[output_reload
].class;
1735 /* Transfer all replacements from the old reload to the combined. */
1736 for (j
= 0; j
< n_replacements
; j
++)
1737 if (replacements
[j
].what
== output_reload
)
1738 replacements
[j
].what
= i
;
1743 /* If this insn has only one operand that is modified or written (assumed
1744 to be the first), it must be the one corresponding to this reload. It
1745 is safe to use anything that dies in this insn for that output provided
1746 that it does not occur in the output (we already know it isn't an
1747 earlyclobber. If this is an asm insn, give up. */
1749 if (INSN_CODE (this_insn
) == -1)
1752 for (i
= 1; i
< insn_data
[INSN_CODE (this_insn
)].n_operands
; i
++)
1753 if (insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '='
1754 || insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '+')
1757 /* See if some hard register that dies in this insn and is not used in
1758 the output is the right class. Only works if the register we pick
1759 up can fully hold our output reload. */
1760 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1761 if (REG_NOTE_KIND (note
) == REG_DEAD
1762 && GET_CODE (XEXP (note
, 0)) == REG
1763 && ! reg_overlap_mentioned_for_reload_p (XEXP (note
, 0),
1764 rld
[output_reload
].out
)
1765 && REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1766 && HARD_REGNO_MODE_OK (REGNO (XEXP (note
, 0)), rld
[output_reload
].outmode
)
1767 && TEST_HARD_REG_BIT (reg_class_contents
[(int) rld
[output_reload
].class],
1768 REGNO (XEXP (note
, 0)))
1769 && (HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), rld
[output_reload
].outmode
)
1770 <= HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), GET_MODE (XEXP (note
, 0))))
1771 /* Ensure that a secondary or tertiary reload for this output
1772 won't want this register. */
1773 && ((secondary_out
= rld
[output_reload
].secondary_out_reload
) == -1
1774 || (! (TEST_HARD_REG_BIT
1775 (reg_class_contents
[(int) rld
[secondary_out
].class],
1776 REGNO (XEXP (note
, 0))))
1777 && ((secondary_out
= rld
[secondary_out
].secondary_out_reload
) == -1
1778 || ! (TEST_HARD_REG_BIT
1779 (reg_class_contents
[(int) rld
[secondary_out
].class],
1780 REGNO (XEXP (note
, 0)))))))
1781 && ! fixed_regs
[REGNO (XEXP (note
, 0))])
1783 rld
[output_reload
].reg_rtx
1784 = gen_rtx_REG (rld
[output_reload
].outmode
,
1785 REGNO (XEXP (note
, 0)));
1790 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1791 See if one of IN and OUT is a register that may be used;
1792 this is desirable since a spill-register won't be needed.
1793 If so, return the register rtx that proves acceptable.
1795 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1796 CLASS is the register class required for the reload.
1798 If FOR_REAL is >= 0, it is the number of the reload,
1799 and in some cases when it can be discovered that OUT doesn't need
1800 to be computed, clear out rld[FOR_REAL].out.
1802 If FOR_REAL is -1, this should not be done, because this call
1803 is just to see if a register can be found, not to find and install it.
1805 EARLYCLOBBER is non-zero if OUT is an earlyclobber operand. This
1806 puts an additional constraint on being able to use IN for OUT since
1807 IN must not appear elsewhere in the insn (it is assumed that IN itself
1808 is safe from the earlyclobber). */
1811 find_dummy_reload (real_in
, real_out
, inloc
, outloc
,
1812 inmode
, outmode
, class, for_real
, earlyclobber
)
1813 rtx real_in
, real_out
;
1814 rtx
*inloc
, *outloc
;
1815 enum machine_mode inmode
, outmode
;
1816 enum reg_class
class;
1826 /* If operands exceed a word, we can't use either of them
1827 unless they have the same size. */
1828 if (GET_MODE_SIZE (outmode
) != GET_MODE_SIZE (inmode
)
1829 && (GET_MODE_SIZE (outmode
) > UNITS_PER_WORD
1830 || GET_MODE_SIZE (inmode
) > UNITS_PER_WORD
))
1833 /* Note that {in,out}_offset are needed only when 'in' or 'out'
1834 respectively refers to a hard register. */
1836 /* Find the inside of any subregs. */
1837 while (GET_CODE (out
) == SUBREG
)
1839 if (GET_CODE (SUBREG_REG (out
)) == REG
1840 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
)
1841 out_offset
+= subreg_regno_offset (REGNO (SUBREG_REG (out
)),
1842 GET_MODE (SUBREG_REG (out
)),
1845 out
= SUBREG_REG (out
);
1847 while (GET_CODE (in
) == SUBREG
)
1849 if (GET_CODE (SUBREG_REG (in
)) == REG
1850 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
)
1851 in_offset
+= subreg_regno_offset (REGNO (SUBREG_REG (in
)),
1852 GET_MODE (SUBREG_REG (in
)),
1855 in
= SUBREG_REG (in
);
1858 /* Narrow down the reg class, the same way push_reload will;
1859 otherwise we might find a dummy now, but push_reload won't. */
1860 class = PREFERRED_RELOAD_CLASS (in
, class);
1862 /* See if OUT will do. */
1863 if (GET_CODE (out
) == REG
1864 && REGNO (out
) < FIRST_PSEUDO_REGISTER
)
1866 unsigned int regno
= REGNO (out
) + out_offset
;
1867 unsigned int nwords
= HARD_REGNO_NREGS (regno
, outmode
);
1870 /* When we consider whether the insn uses OUT,
1871 ignore references within IN. They don't prevent us
1872 from copying IN into OUT, because those refs would
1873 move into the insn that reloads IN.
1875 However, we only ignore IN in its role as this reload.
1876 If the insn uses IN elsewhere and it contains OUT,
1877 that counts. We can't be sure it's the "same" operand
1878 so it might not go through this reload. */
1880 *inloc
= const0_rtx
;
1882 if (regno
< FIRST_PSEUDO_REGISTER
1883 && HARD_REGNO_MODE_OK (regno
, outmode
)
1884 && ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1885 PATTERN (this_insn
), outloc
))
1889 for (i
= 0; i
< nwords
; i
++)
1890 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1896 if (GET_CODE (real_out
) == REG
)
1899 value
= gen_rtx_REG (outmode
, regno
);
1906 /* Consider using IN if OUT was not acceptable
1907 or if OUT dies in this insn (like the quotient in a divmod insn).
1908 We can't use IN unless it is dies in this insn,
1909 which means we must know accurately which hard regs are live.
1910 Also, the result can't go in IN if IN is used within OUT,
1911 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1912 if (hard_regs_live_known
1913 && GET_CODE (in
) == REG
1914 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1916 || find_reg_note (this_insn
, REG_UNUSED
, real_out
))
1917 && find_reg_note (this_insn
, REG_DEAD
, real_in
)
1918 && !fixed_regs
[REGNO (in
)]
1919 && HARD_REGNO_MODE_OK (REGNO (in
),
1920 /* The only case where out and real_out might
1921 have different modes is where real_out
1922 is a subreg, and in that case, out
1924 (GET_MODE (out
) != VOIDmode
1925 ? GET_MODE (out
) : outmode
)))
1927 unsigned int regno
= REGNO (in
) + in_offset
;
1928 unsigned int nwords
= HARD_REGNO_NREGS (regno
, inmode
);
1930 if (! refers_to_regno_for_reload_p (regno
, regno
+ nwords
, out
, (rtx
*) 0)
1931 && ! hard_reg_set_here_p (regno
, regno
+ nwords
,
1932 PATTERN (this_insn
))
1934 || ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1935 PATTERN (this_insn
), inloc
)))
1939 for (i
= 0; i
< nwords
; i
++)
1940 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1946 /* If we were going to use OUT as the reload reg
1947 and changed our mind, it means OUT is a dummy that
1948 dies here. So don't bother copying value to it. */
1949 if (for_real
>= 0 && value
== real_out
)
1950 rld
[for_real
].out
= 0;
1951 if (GET_CODE (real_in
) == REG
)
1954 value
= gen_rtx_REG (inmode
, regno
);
1962 /* This page contains subroutines used mainly for determining
1963 whether the IN or an OUT of a reload can serve as the
1966 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
1969 earlyclobber_operand_p (x
)
1974 for (i
= 0; i
< n_earlyclobbers
; i
++)
1975 if (reload_earlyclobbers
[i
] == x
)
1981 /* Return 1 if expression X alters a hard reg in the range
1982 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1983 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1984 X should be the body of an instruction. */
1987 hard_reg_set_here_p (beg_regno
, end_regno
, x
)
1988 unsigned int beg_regno
, end_regno
;
1991 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
1993 rtx op0
= SET_DEST (x
);
1995 while (GET_CODE (op0
) == SUBREG
)
1996 op0
= SUBREG_REG (op0
);
1997 if (GET_CODE (op0
) == REG
)
1999 unsigned int r
= REGNO (op0
);
2001 /* See if this reg overlaps range under consideration. */
2003 && r
+ HARD_REGNO_NREGS (r
, GET_MODE (op0
)) > beg_regno
)
2007 else if (GET_CODE (x
) == PARALLEL
)
2009 int i
= XVECLEN (x
, 0) - 1;
2012 if (hard_reg_set_here_p (beg_regno
, end_regno
, XVECEXP (x
, 0, i
)))
2019 /* Return 1 if ADDR is a valid memory address for mode MODE,
2020 and check that each pseudo reg has the proper kind of
2024 strict_memory_address_p (mode
, addr
)
2025 enum machine_mode mode ATTRIBUTE_UNUSED
;
2028 GO_IF_LEGITIMATE_ADDRESS (mode
, addr
, win
);
2035 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2036 if they are the same hard reg, and has special hacks for
2037 autoincrement and autodecrement.
2038 This is specifically intended for find_reloads to use
2039 in determining whether two operands match.
2040 X is the operand whose number is the lower of the two.
2042 The value is 2 if Y contains a pre-increment that matches
2043 a non-incrementing address in X. */
2045 /* ??? To be completely correct, we should arrange to pass
2046 for X the output operand and for Y the input operand.
2047 For now, we assume that the output operand has the lower number
2048 because that is natural in (SET output (... input ...)). */
2051 operands_match_p (x
, y
)
2055 RTX_CODE code
= GET_CODE (x
);
2061 if ((code
== REG
|| (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
))
2062 && (GET_CODE (y
) == REG
|| (GET_CODE (y
) == SUBREG
2063 && GET_CODE (SUBREG_REG (y
)) == REG
)))
2069 i
= REGNO (SUBREG_REG (x
));
2070 if (i
>= FIRST_PSEUDO_REGISTER
)
2072 i
+= subreg_regno_offset (REGNO (SUBREG_REG (x
)),
2073 GET_MODE (SUBREG_REG (x
)),
2080 if (GET_CODE (y
) == SUBREG
)
2082 j
= REGNO (SUBREG_REG (y
));
2083 if (j
>= FIRST_PSEUDO_REGISTER
)
2085 j
+= subreg_regno_offset (REGNO (SUBREG_REG (y
)),
2086 GET_MODE (SUBREG_REG (y
)),
2093 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2094 multiple hard register group, so that for example (reg:DI 0) and
2095 (reg:SI 1) will be considered the same register. */
2096 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
2097 && i
< FIRST_PSEUDO_REGISTER
)
2098 i
+= (GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
) - 1;
2099 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (y
)) > UNITS_PER_WORD
2100 && j
< FIRST_PSEUDO_REGISTER
)
2101 j
+= (GET_MODE_SIZE (GET_MODE (y
)) / UNITS_PER_WORD
) - 1;
2105 /* If two operands must match, because they are really a single
2106 operand of an assembler insn, then two postincrements are invalid
2107 because the assembler insn would increment only once.
2108 On the other hand, an postincrement matches ordinary indexing
2109 if the postincrement is the output operand. */
2110 if (code
== POST_DEC
|| code
== POST_INC
|| code
== POST_MODIFY
)
2111 return operands_match_p (XEXP (x
, 0), y
);
2112 /* Two preincrements are invalid
2113 because the assembler insn would increment only once.
2114 On the other hand, an preincrement matches ordinary indexing
2115 if the preincrement is the input operand.
2116 In this case, return 2, since some callers need to do special
2117 things when this happens. */
2118 if (GET_CODE (y
) == PRE_DEC
|| GET_CODE (y
) == PRE_INC
2119 || GET_CODE (y
) == PRE_MODIFY
)
2120 return operands_match_p (x
, XEXP (y
, 0)) ? 2 : 0;
2124 /* Now we have disposed of all the cases
2125 in which different rtx codes can match. */
2126 if (code
!= GET_CODE (y
))
2128 if (code
== LABEL_REF
)
2129 return XEXP (x
, 0) == XEXP (y
, 0);
2130 if (code
== SYMBOL_REF
)
2131 return XSTR (x
, 0) == XSTR (y
, 0);
2133 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2135 if (GET_MODE (x
) != GET_MODE (y
))
2138 /* Compare the elements. If any pair of corresponding elements
2139 fail to match, return 0 for the whole things. */
2142 fmt
= GET_RTX_FORMAT (code
);
2143 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2149 if (XWINT (x
, i
) != XWINT (y
, i
))
2154 if (XINT (x
, i
) != XINT (y
, i
))
2159 val
= operands_match_p (XEXP (x
, i
), XEXP (y
, i
));
2162 /* If any subexpression returns 2,
2163 we should return 2 if we are successful. */
2172 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2174 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; --j
)
2176 val
= operands_match_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
));
2184 /* It is believed that rtx's at this level will never
2185 contain anything but integers and other rtx's,
2186 except for within LABEL_REFs and SYMBOL_REFs. */
2191 return 1 + success_2
;
2194 /* Describe the range of registers or memory referenced by X.
2195 If X is a register, set REG_FLAG and put the first register
2196 number into START and the last plus one into END.
2197 If X is a memory reference, put a base address into BASE
2198 and a range of integer offsets into START and END.
2199 If X is pushing on the stack, we can assume it causes no trouble,
2200 so we set the SAFE field. */
2202 static struct decomposition
2206 struct decomposition val
;
2212 if (GET_CODE (x
) == MEM
)
2214 rtx base
= NULL_RTX
, offset
= 0;
2215 rtx addr
= XEXP (x
, 0);
2217 if (GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
2218 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
2220 val
.base
= XEXP (addr
, 0);
2221 val
.start
= -GET_MODE_SIZE (GET_MODE (x
));
2222 val
.end
= GET_MODE_SIZE (GET_MODE (x
));
2223 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2227 if (GET_CODE (addr
) == PRE_MODIFY
|| GET_CODE (addr
) == POST_MODIFY
)
2229 if (GET_CODE (XEXP (addr
, 1)) == PLUS
2230 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
2231 && CONSTANT_P (XEXP (XEXP (addr
, 1), 1)))
2233 val
.base
= XEXP (addr
, 0);
2234 val
.start
= -INTVAL (XEXP (XEXP (addr
, 1), 1));
2235 val
.end
= INTVAL (XEXP (XEXP (addr
, 1), 1));
2236 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2241 if (GET_CODE (addr
) == CONST
)
2243 addr
= XEXP (addr
, 0);
2246 if (GET_CODE (addr
) == PLUS
)
2248 if (CONSTANT_P (XEXP (addr
, 0)))
2250 base
= XEXP (addr
, 1);
2251 offset
= XEXP (addr
, 0);
2253 else if (CONSTANT_P (XEXP (addr
, 1)))
2255 base
= XEXP (addr
, 0);
2256 offset
= XEXP (addr
, 1);
2263 offset
= const0_rtx
;
2265 if (GET_CODE (offset
) == CONST
)
2266 offset
= XEXP (offset
, 0);
2267 if (GET_CODE (offset
) == PLUS
)
2269 if (GET_CODE (XEXP (offset
, 0)) == CONST_INT
)
2271 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 1));
2272 offset
= XEXP (offset
, 0);
2274 else if (GET_CODE (XEXP (offset
, 1)) == CONST_INT
)
2276 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 0));
2277 offset
= XEXP (offset
, 1);
2281 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2282 offset
= const0_rtx
;
2285 else if (GET_CODE (offset
) != CONST_INT
)
2287 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2288 offset
= const0_rtx
;
2291 if (all_const
&& GET_CODE (base
) == PLUS
)
2292 base
= gen_rtx_CONST (GET_MODE (base
), base
);
2294 if (GET_CODE (offset
) != CONST_INT
)
2297 val
.start
= INTVAL (offset
);
2298 val
.end
= val
.start
+ GET_MODE_SIZE (GET_MODE (x
));
2302 else if (GET_CODE (x
) == REG
)
2305 val
.start
= true_regnum (x
);
2308 /* A pseudo with no hard reg. */
2309 val
.start
= REGNO (x
);
2310 val
.end
= val
.start
+ 1;
2314 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2316 else if (GET_CODE (x
) == SUBREG
)
2318 if (GET_CODE (SUBREG_REG (x
)) != REG
)
2319 /* This could be more precise, but it's good enough. */
2320 return decompose (SUBREG_REG (x
));
2322 val
.start
= true_regnum (x
);
2324 return decompose (SUBREG_REG (x
));
2327 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2329 else if (CONSTANT_P (x
)
2330 /* This hasn't been assigned yet, so it can't conflict yet. */
2331 || GET_CODE (x
) == SCRATCH
)
2338 /* Return 1 if altering Y will not modify the value of X.
2339 Y is also described by YDATA, which should be decompose (Y). */
2342 immune_p (x
, y
, ydata
)
2344 struct decomposition ydata
;
2346 struct decomposition xdata
;
2349 return !refers_to_regno_for_reload_p (ydata
.start
, ydata
.end
, x
, (rtx
*) 0);
2353 if (GET_CODE (y
) != MEM
)
2355 /* If Y is memory and X is not, Y can't affect X. */
2356 if (GET_CODE (x
) != MEM
)
2359 xdata
= decompose (x
);
2361 if (! rtx_equal_p (xdata
.base
, ydata
.base
))
2363 /* If bases are distinct symbolic constants, there is no overlap. */
2364 if (CONSTANT_P (xdata
.base
) && CONSTANT_P (ydata
.base
))
2366 /* Constants and stack slots never overlap. */
2367 if (CONSTANT_P (xdata
.base
)
2368 && (ydata
.base
== frame_pointer_rtx
2369 || ydata
.base
== hard_frame_pointer_rtx
2370 || ydata
.base
== stack_pointer_rtx
))
2372 if (CONSTANT_P (ydata
.base
)
2373 && (xdata
.base
== frame_pointer_rtx
2374 || xdata
.base
== hard_frame_pointer_rtx
2375 || xdata
.base
== stack_pointer_rtx
))
2377 /* If either base is variable, we don't know anything. */
2381 return (xdata
.start
>= ydata
.end
|| ydata
.start
>= xdata
.end
);
2384 /* Similar, but calls decompose. */
2387 safe_from_earlyclobber (op
, clobber
)
2390 struct decomposition early_data
;
2392 early_data
= decompose (clobber
);
2393 return immune_p (op
, clobber
, early_data
);
2396 /* Main entry point of this file: search the body of INSN
2397 for values that need reloading and record them with push_reload.
2398 REPLACE nonzero means record also where the values occur
2399 so that subst_reloads can be used.
2401 IND_LEVELS says how many levels of indirection are supported by this
2402 machine; a value of zero means that a memory reference is not a valid
2405 LIVE_KNOWN says we have valid information about which hard
2406 regs are live at each point in the program; this is true when
2407 we are called from global_alloc but false when stupid register
2408 allocation has been done.
2410 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2411 which is nonnegative if the reg has been commandeered for reloading into.
2412 It is copied into STATIC_RELOAD_REG_P and referenced from there
2413 by various subroutines.
2415 Return TRUE if some operands need to be changed, because of swapping
2416 commutative operands, reg_equiv_address substitution, or whatever. */
2419 find_reloads (insn
, replace
, ind_levels
, live_known
, reload_reg_p
)
2421 int replace
, ind_levels
;
2423 short *reload_reg_p
;
2425 int insn_code_number
;
2428 /* These start out as the constraints for the insn
2429 and they are chewed up as we consider alternatives. */
2430 char *constraints
[MAX_RECOG_OPERANDS
];
2431 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2433 enum reg_class preferred_class
[MAX_RECOG_OPERANDS
];
2434 char pref_or_nothing
[MAX_RECOG_OPERANDS
];
2435 /* Nonzero for a MEM operand whose entire address needs a reload. */
2436 int address_reloaded
[MAX_RECOG_OPERANDS
];
2437 /* Value of enum reload_type to use for operand. */
2438 enum reload_type operand_type
[MAX_RECOG_OPERANDS
];
2439 /* Value of enum reload_type to use within address of operand. */
2440 enum reload_type address_type
[MAX_RECOG_OPERANDS
];
2441 /* Save the usage of each operand. */
2442 enum reload_usage
{ RELOAD_READ
, RELOAD_READ_WRITE
, RELOAD_WRITE
} modified
[MAX_RECOG_OPERANDS
];
2443 int no_input_reloads
= 0, no_output_reloads
= 0;
2445 int this_alternative
[MAX_RECOG_OPERANDS
];
2446 char this_alternative_match_win
[MAX_RECOG_OPERANDS
];
2447 char this_alternative_win
[MAX_RECOG_OPERANDS
];
2448 char this_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2449 char this_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2450 int this_alternative_matches
[MAX_RECOG_OPERANDS
];
2452 int goal_alternative
[MAX_RECOG_OPERANDS
];
2453 int this_alternative_number
;
2454 int goal_alternative_number
= 0;
2455 int operand_reloadnum
[MAX_RECOG_OPERANDS
];
2456 int goal_alternative_matches
[MAX_RECOG_OPERANDS
];
2457 int goal_alternative_matched
[MAX_RECOG_OPERANDS
];
2458 char goal_alternative_match_win
[MAX_RECOG_OPERANDS
];
2459 char goal_alternative_win
[MAX_RECOG_OPERANDS
];
2460 char goal_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2461 char goal_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2462 int goal_alternative_swapped
;
2465 char operands_match
[MAX_RECOG_OPERANDS
][MAX_RECOG_OPERANDS
];
2466 rtx substed_operand
[MAX_RECOG_OPERANDS
];
2467 rtx body
= PATTERN (insn
);
2468 rtx set
= single_set (insn
);
2469 int goal_earlyclobber
= 0, this_earlyclobber
;
2470 enum machine_mode operand_mode
[MAX_RECOG_OPERANDS
];
2476 n_earlyclobbers
= 0;
2477 replace_reloads
= replace
;
2478 hard_regs_live_known
= live_known
;
2479 static_reload_reg_p
= reload_reg_p
;
2481 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2482 neither are insns that SET cc0. Insns that use CC0 are not allowed
2483 to have any input reloads. */
2484 if (GET_CODE (insn
) == JUMP_INSN
|| GET_CODE (insn
) == CALL_INSN
)
2485 no_output_reloads
= 1;
2488 if (reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
2489 no_input_reloads
= 1;
2490 if (reg_set_p (cc0_rtx
, PATTERN (insn
)))
2491 no_output_reloads
= 1;
2494 #ifdef SECONDARY_MEMORY_NEEDED
2495 /* The eliminated forms of any secondary memory locations are per-insn, so
2496 clear them out here. */
2498 memset ((char *) secondary_memlocs_elim
, 0, sizeof secondary_memlocs_elim
);
2501 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2502 is cheap to move between them. If it is not, there may not be an insn
2503 to do the copy, so we may need a reload. */
2504 if (GET_CODE (body
) == SET
2505 && GET_CODE (SET_DEST (body
)) == REG
2506 && REGNO (SET_DEST (body
)) < FIRST_PSEUDO_REGISTER
2507 && GET_CODE (SET_SRC (body
)) == REG
2508 && REGNO (SET_SRC (body
)) < FIRST_PSEUDO_REGISTER
2509 && REGISTER_MOVE_COST (GET_MODE (SET_SRC (body
)),
2510 REGNO_REG_CLASS (REGNO (SET_SRC (body
))),
2511 REGNO_REG_CLASS (REGNO (SET_DEST (body
)))) == 2)
2514 extract_insn (insn
);
2516 noperands
= reload_n_operands
= recog_data
.n_operands
;
2517 n_alternatives
= recog_data
.n_alternatives
;
2519 /* Just return "no reloads" if insn has no operands with constraints. */
2520 if (noperands
== 0 || n_alternatives
== 0)
2523 insn_code_number
= INSN_CODE (insn
);
2524 this_insn_is_asm
= insn_code_number
< 0;
2526 memcpy (operand_mode
, recog_data
.operand_mode
,
2527 noperands
* sizeof (enum machine_mode
));
2528 memcpy (constraints
, recog_data
.constraints
, noperands
* sizeof (char *));
2532 /* If we will need to know, later, whether some pair of operands
2533 are the same, we must compare them now and save the result.
2534 Reloading the base and index registers will clobber them
2535 and afterward they will fail to match. */
2537 for (i
= 0; i
< noperands
; i
++)
2542 substed_operand
[i
] = recog_data
.operand
[i
];
2545 modified
[i
] = RELOAD_READ
;
2547 /* Scan this operand's constraint to see if it is an output operand,
2548 an in-out operand, is commutative, or should match another. */
2553 modified
[i
] = RELOAD_WRITE
;
2555 modified
[i
] = RELOAD_READ_WRITE
;
2558 /* The last operand should not be marked commutative. */
2559 if (i
== noperands
- 1)
2564 else if (ISDIGIT (c
))
2566 c
= strtoul (p
- 1, &p
, 10);
2568 operands_match
[c
][i
]
2569 = operands_match_p (recog_data
.operand
[c
],
2570 recog_data
.operand
[i
]);
2572 /* An operand may not match itself. */
2576 /* If C can be commuted with C+1, and C might need to match I,
2577 then C+1 might also need to match I. */
2578 if (commutative
>= 0)
2580 if (c
== commutative
|| c
== commutative
+ 1)
2582 int other
= c
+ (c
== commutative
? 1 : -1);
2583 operands_match
[other
][i
]
2584 = operands_match_p (recog_data
.operand
[other
],
2585 recog_data
.operand
[i
]);
2587 if (i
== commutative
|| i
== commutative
+ 1)
2589 int other
= i
+ (i
== commutative
? 1 : -1);
2590 operands_match
[c
][other
]
2591 = operands_match_p (recog_data
.operand
[c
],
2592 recog_data
.operand
[other
]);
2594 /* Note that C is supposed to be less than I.
2595 No need to consider altering both C and I because in
2596 that case we would alter one into the other. */
2602 /* Examine each operand that is a memory reference or memory address
2603 and reload parts of the addresses into index registers.
2604 Also here any references to pseudo regs that didn't get hard regs
2605 but are equivalent to constants get replaced in the insn itself
2606 with those constants. Nobody will ever see them again.
2608 Finally, set up the preferred classes of each operand. */
2610 for (i
= 0; i
< noperands
; i
++)
2612 RTX_CODE code
= GET_CODE (recog_data
.operand
[i
]);
2614 address_reloaded
[i
] = 0;
2615 operand_type
[i
] = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT
2616 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT
2619 = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT_ADDRESS
2620 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT_ADDRESS
2623 if (*constraints
[i
] == 0)
2624 /* Ignore things like match_operator operands. */
2626 else if (constraints
[i
][0] == 'p')
2628 find_reloads_address (VOIDmode
, (rtx
*) 0,
2629 recog_data
.operand
[i
],
2630 recog_data
.operand_loc
[i
],
2631 i
, operand_type
[i
], ind_levels
, insn
);
2633 /* If we now have a simple operand where we used to have a
2634 PLUS or MULT, re-recognize and try again. */
2635 if ((GET_RTX_CLASS (GET_CODE (*recog_data
.operand_loc
[i
])) == 'o'
2636 || GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2637 && (GET_CODE (recog_data
.operand
[i
]) == MULT
2638 || GET_CODE (recog_data
.operand
[i
]) == PLUS
))
2640 INSN_CODE (insn
) = -1;
2641 retval
= find_reloads (insn
, replace
, ind_levels
, live_known
,
2646 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2647 substed_operand
[i
] = recog_data
.operand
[i
];
2649 else if (code
== MEM
)
2652 = find_reloads_address (GET_MODE (recog_data
.operand
[i
]),
2653 recog_data
.operand_loc
[i
],
2654 XEXP (recog_data
.operand
[i
], 0),
2655 &XEXP (recog_data
.operand
[i
], 0),
2656 i
, address_type
[i
], ind_levels
, insn
);
2657 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2658 substed_operand
[i
] = recog_data
.operand
[i
];
2660 else if (code
== SUBREG
)
2662 rtx reg
= SUBREG_REG (recog_data
.operand
[i
]);
2664 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2667 && &SET_DEST (set
) == recog_data
.operand_loc
[i
],
2669 &address_reloaded
[i
]);
2671 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2672 that didn't get a hard register, emit a USE with a REG_EQUAL
2673 note in front so that we might inherit a previous, possibly
2677 && GET_CODE (op
) == MEM
2678 && GET_CODE (reg
) == REG
2679 && (GET_MODE_SIZE (GET_MODE (reg
))
2680 >= GET_MODE_SIZE (GET_MODE (op
))))
2681 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode
, reg
),
2683 REG_EQUAL
, reg_equiv_memory_loc
[REGNO (reg
)]);
2685 substed_operand
[i
] = recog_data
.operand
[i
] = op
;
2687 else if (code
== PLUS
|| GET_RTX_CLASS (code
) == '1')
2688 /* We can get a PLUS as an "operand" as a result of register
2689 elimination. See eliminate_regs and gen_reload. We handle
2690 a unary operator by reloading the operand. */
2691 substed_operand
[i
] = recog_data
.operand
[i
]
2692 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2693 ind_levels
, 0, insn
,
2694 &address_reloaded
[i
]);
2695 else if (code
== REG
)
2697 /* This is equivalent to calling find_reloads_toplev.
2698 The code is duplicated for speed.
2699 When we find a pseudo always equivalent to a constant,
2700 we replace it by the constant. We must be sure, however,
2701 that we don't try to replace it in the insn in which it
2703 int regno
= REGNO (recog_data
.operand
[i
]);
2704 if (reg_equiv_constant
[regno
] != 0
2705 && (set
== 0 || &SET_DEST (set
) != recog_data
.operand_loc
[i
]))
2707 /* Record the existing mode so that the check if constants are
2708 allowed will work when operand_mode isn't specified. */
2710 if (operand_mode
[i
] == VOIDmode
)
2711 operand_mode
[i
] = GET_MODE (recog_data
.operand
[i
]);
2713 substed_operand
[i
] = recog_data
.operand
[i
]
2714 = reg_equiv_constant
[regno
];
2716 if (reg_equiv_memory_loc
[regno
] != 0
2717 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
2718 /* We need not give a valid is_set_dest argument since the case
2719 of a constant equivalence was checked above. */
2720 substed_operand
[i
] = recog_data
.operand
[i
]
2721 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2722 ind_levels
, 0, insn
,
2723 &address_reloaded
[i
]);
2725 /* If the operand is still a register (we didn't replace it with an
2726 equivalent), get the preferred class to reload it into. */
2727 code
= GET_CODE (recog_data
.operand
[i
]);
2729 = ((code
== REG
&& REGNO (recog_data
.operand
[i
])
2730 >= FIRST_PSEUDO_REGISTER
)
2731 ? reg_preferred_class (REGNO (recog_data
.operand
[i
]))
2735 && REGNO (recog_data
.operand
[i
]) >= FIRST_PSEUDO_REGISTER
2736 && reg_alternate_class (REGNO (recog_data
.operand
[i
])) == NO_REGS
);
2739 /* If this is simply a copy from operand 1 to operand 0, merge the
2740 preferred classes for the operands. */
2741 if (set
!= 0 && noperands
>= 2 && recog_data
.operand
[0] == SET_DEST (set
)
2742 && recog_data
.operand
[1] == SET_SRC (set
))
2744 preferred_class
[0] = preferred_class
[1]
2745 = reg_class_subunion
[(int) preferred_class
[0]][(int) preferred_class
[1]];
2746 pref_or_nothing
[0] |= pref_or_nothing
[1];
2747 pref_or_nothing
[1] |= pref_or_nothing
[0];
2750 /* Now see what we need for pseudo-regs that didn't get hard regs
2751 or got the wrong kind of hard reg. For this, we must consider
2752 all the operands together against the register constraints. */
2754 best
= MAX_RECOG_OPERANDS
* 2 + 600;
2757 goal_alternative_swapped
= 0;
2760 /* The constraints are made of several alternatives.
2761 Each operand's constraint looks like foo,bar,... with commas
2762 separating the alternatives. The first alternatives for all
2763 operands go together, the second alternatives go together, etc.
2765 First loop over alternatives. */
2767 for (this_alternative_number
= 0;
2768 this_alternative_number
< n_alternatives
;
2769 this_alternative_number
++)
2771 /* Loop over operands for one constraint alternative. */
2772 /* LOSERS counts those that don't fit this alternative
2773 and would require loading. */
2775 /* BAD is set to 1 if it some operand can't fit this alternative
2776 even after reloading. */
2778 /* REJECT is a count of how undesirable this alternative says it is
2779 if any reloading is required. If the alternative matches exactly
2780 then REJECT is ignored, but otherwise it gets this much
2781 counted against it in addition to the reloading needed. Each
2782 ? counts three times here since we want the disparaging caused by
2783 a bad register class to only count 1/3 as much. */
2786 this_earlyclobber
= 0;
2788 for (i
= 0; i
< noperands
; i
++)
2790 char *p
= constraints
[i
];
2793 /* 0 => this operand can be reloaded somehow for this alternative. */
2795 /* 0 => this operand can be reloaded if the alternative allows regs. */
2798 rtx operand
= recog_data
.operand
[i
];
2800 /* Nonzero means this is a MEM that must be reloaded into a reg
2801 regardless of what the constraint says. */
2802 int force_reload
= 0;
2804 /* Nonzero if a constant forced into memory would be OK for this
2807 int earlyclobber
= 0;
2809 /* If the predicate accepts a unary operator, it means that
2810 we need to reload the operand, but do not do this for
2811 match_operator and friends. */
2812 if (GET_RTX_CLASS (GET_CODE (operand
)) == '1' && *p
!= 0)
2813 operand
= XEXP (operand
, 0);
2815 /* If the operand is a SUBREG, extract
2816 the REG or MEM (or maybe even a constant) within.
2817 (Constants can occur as a result of reg_equiv_constant.) */
2819 while (GET_CODE (operand
) == SUBREG
)
2821 /* Offset only matters when operand is a REG and
2822 it is a hard reg. This is because it is passed
2823 to reg_fits_class_p if it is a REG and all pseudos
2824 return 0 from that function. */
2825 if (GET_CODE (SUBREG_REG (operand
)) == REG
2826 && REGNO (SUBREG_REG (operand
)) < FIRST_PSEUDO_REGISTER
)
2828 offset
+= subreg_regno_offset (REGNO (SUBREG_REG (operand
)),
2829 GET_MODE (SUBREG_REG (operand
)),
2830 SUBREG_BYTE (operand
),
2831 GET_MODE (operand
));
2833 operand
= SUBREG_REG (operand
);
2834 /* Force reload if this is a constant or PLUS or if there may
2835 be a problem accessing OPERAND in the outer mode. */
2836 if (CONSTANT_P (operand
)
2837 || GET_CODE (operand
) == PLUS
2838 /* We must force a reload of paradoxical SUBREGs
2839 of a MEM because the alignment of the inner value
2840 may not be enough to do the outer reference. On
2841 big-endian machines, it may also reference outside
2844 On machines that extend byte operations and we have a
2845 SUBREG where both the inner and outer modes are no wider
2846 than a word and the inner mode is narrower, is integral,
2847 and gets extended when loaded from memory, combine.c has
2848 made assumptions about the behavior of the machine in such
2849 register access. If the data is, in fact, in memory we
2850 must always load using the size assumed to be in the
2851 register and let the insn do the different-sized
2854 This is doubly true if WORD_REGISTER_OPERATIONS. In
2855 this case eliminate_regs has left non-paradoxical
2856 subregs for push_reloads to see. Make sure it does
2857 by forcing the reload.
2859 ??? When is it right at this stage to have a subreg
2860 of a mem that is _not_ to be handled specialy? IMO
2861 those should have been reduced to just a mem. */
2862 || ((GET_CODE (operand
) == MEM
2863 || (GET_CODE (operand
)== REG
2864 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
2865 #ifndef WORD_REGISTER_OPERATIONS
2866 && (((GET_MODE_BITSIZE (GET_MODE (operand
))
2867 < BIGGEST_ALIGNMENT
)
2868 && (GET_MODE_SIZE (operand_mode
[i
])
2869 > GET_MODE_SIZE (GET_MODE (operand
))))
2870 || (GET_CODE (operand
) == MEM
&& BYTES_BIG_ENDIAN
)
2871 #ifdef LOAD_EXTEND_OP
2872 || (GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2873 && (GET_MODE_SIZE (GET_MODE (operand
))
2875 && (GET_MODE_SIZE (operand_mode
[i
])
2876 > GET_MODE_SIZE (GET_MODE (operand
)))
2877 && INTEGRAL_MODE_P (GET_MODE (operand
))
2878 && LOAD_EXTEND_OP (GET_MODE (operand
)) != NIL
)
2883 /* This following hunk of code should no longer be
2884 needed at all with SUBREG_BYTE. If you need this
2885 code back, please explain to me why so I can
2886 fix the real problem. -DaveM */
2888 /* Subreg of a hard reg which can't handle the subreg's mode
2889 or which would handle that mode in the wrong number of
2890 registers for subregging to work. */
2891 || (GET_CODE (operand
) == REG
2892 && REGNO (operand
) < FIRST_PSEUDO_REGISTER
2893 && ((GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2894 && (GET_MODE_SIZE (GET_MODE (operand
))
2896 && ((GET_MODE_SIZE (GET_MODE (operand
))
2898 != HARD_REGNO_NREGS (REGNO (operand
),
2899 GET_MODE (operand
))))
2900 || ! HARD_REGNO_MODE_OK (REGNO (operand
) + offset
,
2907 this_alternative
[i
] = (int) NO_REGS
;
2908 this_alternative_win
[i
] = 0;
2909 this_alternative_match_win
[i
] = 0;
2910 this_alternative_offmemok
[i
] = 0;
2911 this_alternative_earlyclobber
[i
] = 0;
2912 this_alternative_matches
[i
] = -1;
2914 /* An empty constraint or empty alternative
2915 allows anything which matched the pattern. */
2916 if (*p
== 0 || *p
== ',')
2919 /* Scan this alternative's specs for this operand;
2920 set WIN if the operand fits any letter in this alternative.
2921 Otherwise, clear BADOP if this operand could
2922 fit some letter after reloads,
2923 or set WINREG if this operand could fit after reloads
2924 provided the constraint allows some registers. */
2926 while (*p
&& (c
= *p
++) != ',')
2929 case '=': case '+': case '*':
2933 /* The last operand should not be marked commutative. */
2934 if (i
!= noperands
- 1)
2947 /* Ignore rest of this alternative as far as
2948 reloading is concerned. */
2949 while (*p
&& *p
!= ',')
2953 case '0': case '1': case '2': case '3': case '4':
2954 case '5': case '6': case '7': case '8': case '9':
2955 c
= strtoul (p
- 1, &p
, 10);
2957 this_alternative_matches
[i
] = c
;
2958 /* We are supposed to match a previous operand.
2959 If we do, we win if that one did.
2960 If we do not, count both of the operands as losers.
2961 (This is too conservative, since most of the time
2962 only a single reload insn will be needed to make
2963 the two operands win. As a result, this alternative
2964 may be rejected when it is actually desirable.) */
2965 if ((swapped
&& (c
!= commutative
|| i
!= commutative
+ 1))
2966 /* If we are matching as if two operands were swapped,
2967 also pretend that operands_match had been computed
2969 But if I is the second of those and C is the first,
2970 don't exchange them, because operands_match is valid
2971 only on one side of its diagonal. */
2973 [(c
== commutative
|| c
== commutative
+ 1)
2974 ? 2 * commutative
+ 1 - c
: c
]
2975 [(i
== commutative
|| i
== commutative
+ 1)
2976 ? 2 * commutative
+ 1 - i
: i
])
2977 : operands_match
[c
][i
])
2979 /* If we are matching a non-offsettable address where an
2980 offsettable address was expected, then we must reject
2981 this combination, because we can't reload it. */
2982 if (this_alternative_offmemok
[c
]
2983 && GET_CODE (recog_data
.operand
[c
]) == MEM
2984 && this_alternative
[c
] == (int) NO_REGS
2985 && ! this_alternative_win
[c
])
2988 did_match
= this_alternative_win
[c
];
2992 /* Operands don't match. */
2994 /* Retroactively mark the operand we had to match
2995 as a loser, if it wasn't already. */
2996 if (this_alternative_win
[c
])
2998 this_alternative_win
[c
] = 0;
2999 if (this_alternative
[c
] == (int) NO_REGS
)
3001 /* But count the pair only once in the total badness of
3002 this alternative, if the pair can be a dummy reload. */
3004 = find_dummy_reload (recog_data
.operand
[i
],
3005 recog_data
.operand
[c
],
3006 recog_data
.operand_loc
[i
],
3007 recog_data
.operand_loc
[c
],
3008 operand_mode
[i
], operand_mode
[c
],
3009 this_alternative
[c
], -1,
3010 this_alternative_earlyclobber
[c
]);
3015 /* This can be fixed with reloads if the operand
3016 we are supposed to match can be fixed with reloads. */
3018 this_alternative
[i
] = this_alternative
[c
];
3020 /* If we have to reload this operand and some previous
3021 operand also had to match the same thing as this
3022 operand, we don't know how to do that. So reject this
3024 if (! did_match
|| force_reload
)
3025 for (j
= 0; j
< i
; j
++)
3026 if (this_alternative_matches
[j
]
3027 == this_alternative_matches
[i
])
3032 /* All necessary reloads for an address_operand
3033 were handled in find_reloads_address. */
3034 this_alternative
[i
] = (int) MODE_BASE_REG_CLASS (VOIDmode
);
3041 if (GET_CODE (operand
) == MEM
3042 || (GET_CODE (operand
) == REG
3043 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3044 && reg_renumber
[REGNO (operand
)] < 0))
3046 if (CONSTANT_P (operand
)
3047 /* force_const_mem does not accept HIGH. */
3048 && GET_CODE (operand
) != HIGH
)
3054 if (GET_CODE (operand
) == MEM
3055 && ! address_reloaded
[i
]
3056 && (GET_CODE (XEXP (operand
, 0)) == PRE_DEC
3057 || GET_CODE (XEXP (operand
, 0)) == POST_DEC
))
3062 if (GET_CODE (operand
) == MEM
3063 && ! address_reloaded
[i
]
3064 && (GET_CODE (XEXP (operand
, 0)) == PRE_INC
3065 || GET_CODE (XEXP (operand
, 0)) == POST_INC
))
3069 /* Memory operand whose address is not offsettable. */
3073 if (GET_CODE (operand
) == MEM
3074 && ! (ind_levels
? offsettable_memref_p (operand
)
3075 : offsettable_nonstrict_memref_p (operand
))
3076 /* Certain mem addresses will become offsettable
3077 after they themselves are reloaded. This is important;
3078 we don't want our own handling of unoffsettables
3079 to override the handling of reg_equiv_address. */
3080 && !(GET_CODE (XEXP (operand
, 0)) == REG
3082 || reg_equiv_address
[REGNO (XEXP (operand
, 0))] != 0)))
3086 /* Memory operand whose address is offsettable. */
3090 if ((GET_CODE (operand
) == MEM
3091 /* If IND_LEVELS, find_reloads_address won't reload a
3092 pseudo that didn't get a hard reg, so we have to
3093 reject that case. */
3094 && ((ind_levels
? offsettable_memref_p (operand
)
3095 : offsettable_nonstrict_memref_p (operand
))
3096 /* A reloaded address is offsettable because it is now
3097 just a simple register indirect. */
3098 || address_reloaded
[i
]))
3099 || (GET_CODE (operand
) == REG
3100 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3101 && reg_renumber
[REGNO (operand
)] < 0
3102 /* If reg_equiv_address is nonzero, we will be
3103 loading it into a register; hence it will be
3104 offsettable, but we cannot say that reg_equiv_mem
3105 is offsettable without checking. */
3106 && ((reg_equiv_mem
[REGNO (operand
)] != 0
3107 && offsettable_memref_p (reg_equiv_mem
[REGNO (operand
)]))
3108 || (reg_equiv_address
[REGNO (operand
)] != 0))))
3110 /* force_const_mem does not accept HIGH. */
3111 if ((CONSTANT_P (operand
) && GET_CODE (operand
) != HIGH
)
3112 || GET_CODE (operand
) == MEM
)
3119 /* Output operand that is stored before the need for the
3120 input operands (and their index registers) is over. */
3121 earlyclobber
= 1, this_earlyclobber
= 1;
3126 if (GET_CODE (operand
) == CONST_DOUBLE
)
3132 if (GET_CODE (operand
) == CONST_DOUBLE
3133 && CONST_DOUBLE_OK_FOR_LETTER_P (operand
, c
))
3138 if (GET_CODE (operand
) == CONST_INT
3139 || (GET_CODE (operand
) == CONST_DOUBLE
3140 && GET_MODE (operand
) == VOIDmode
))
3143 if (CONSTANT_P (operand
)
3144 #ifdef LEGITIMATE_PIC_OPERAND_P
3145 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (operand
))
3152 if (GET_CODE (operand
) == CONST_INT
3153 || (GET_CODE (operand
) == CONST_DOUBLE
3154 && GET_MODE (operand
) == VOIDmode
))
3166 if (GET_CODE (operand
) == CONST_INT
3167 && CONST_OK_FOR_LETTER_P (INTVAL (operand
), c
))
3177 /* A PLUS is never a valid operand, but reload can make
3178 it from a register when eliminating registers. */
3179 && GET_CODE (operand
) != PLUS
3180 /* A SCRATCH is not a valid operand. */
3181 && GET_CODE (operand
) != SCRATCH
3182 #ifdef LEGITIMATE_PIC_OPERAND_P
3183 && (! CONSTANT_P (operand
)
3185 || LEGITIMATE_PIC_OPERAND_P (operand
))
3187 && (GENERAL_REGS
== ALL_REGS
3188 || GET_CODE (operand
) != REG
3189 || (REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3190 && reg_renumber
[REGNO (operand
)] < 0)))
3192 /* Drop through into 'r' case. */
3196 = (int) reg_class_subunion
[this_alternative
[i
]][(int) GENERAL_REGS
];
3200 if (REG_CLASS_FROM_LETTER (c
) == NO_REGS
)
3202 #ifdef EXTRA_CONSTRAINT
3203 if (EXTRA_CONSTRAINT (operand
, c
))
3210 = (int) reg_class_subunion
[this_alternative
[i
]][(int) REG_CLASS_FROM_LETTER (c
)];
3212 if (GET_MODE (operand
) == BLKmode
)
3215 if (GET_CODE (operand
) == REG
3216 && reg_fits_class_p (operand
, this_alternative
[i
],
3217 offset
, GET_MODE (recog_data
.operand
[i
])))
3224 /* If this operand could be handled with a reg,
3225 and some reg is allowed, then this operand can be handled. */
3226 if (winreg
&& this_alternative
[i
] != (int) NO_REGS
)
3229 /* Record which operands fit this alternative. */
3230 this_alternative_earlyclobber
[i
] = earlyclobber
;
3231 if (win
&& ! force_reload
)
3232 this_alternative_win
[i
] = 1;
3233 else if (did_match
&& ! force_reload
)
3234 this_alternative_match_win
[i
] = 1;
3237 int const_to_mem
= 0;
3239 this_alternative_offmemok
[i
] = offmemok
;
3243 /* Alternative loses if it has no regs for a reg operand. */
3244 if (GET_CODE (operand
) == REG
3245 && this_alternative
[i
] == (int) NO_REGS
3246 && this_alternative_matches
[i
] < 0)
3249 /* If this is a constant that is reloaded into the desired
3250 class by copying it to memory first, count that as another
3251 reload. This is consistent with other code and is
3252 required to avoid choosing another alternative when
3253 the constant is moved into memory by this function on
3254 an early reload pass. Note that the test here is
3255 precisely the same as in the code below that calls
3257 if (CONSTANT_P (operand
)
3258 /* force_const_mem does not accept HIGH. */
3259 && GET_CODE (operand
) != HIGH
3260 && ((PREFERRED_RELOAD_CLASS (operand
,
3261 (enum reg_class
) this_alternative
[i
])
3263 || no_input_reloads
)
3264 && operand_mode
[i
] != VOIDmode
)
3267 if (this_alternative
[i
] != (int) NO_REGS
)
3271 /* If we can't reload this value at all, reject this
3272 alternative. Note that we could also lose due to
3273 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3276 if (! CONSTANT_P (operand
)
3277 && (enum reg_class
) this_alternative
[i
] != NO_REGS
3278 && (PREFERRED_RELOAD_CLASS (operand
,
3279 (enum reg_class
) this_alternative
[i
])
3283 /* Alternative loses if it requires a type of reload not
3284 permitted for this insn. We can always reload SCRATCH
3285 and objects with a REG_UNUSED note. */
3286 else if (GET_CODE (operand
) != SCRATCH
3287 && modified
[i
] != RELOAD_READ
&& no_output_reloads
3288 && ! find_reg_note (insn
, REG_UNUSED
, operand
))
3290 else if (modified
[i
] != RELOAD_WRITE
&& no_input_reloads
3294 /* We prefer to reload pseudos over reloading other things,
3295 since such reloads may be able to be eliminated later.
3296 If we are reloading a SCRATCH, we won't be generating any
3297 insns, just using a register, so it is also preferred.
3298 So bump REJECT in other cases. Don't do this in the
3299 case where we are forcing a constant into memory and
3300 it will then win since we don't want to have a different
3301 alternative match then. */
3302 if (! (GET_CODE (operand
) == REG
3303 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
3304 && GET_CODE (operand
) != SCRATCH
3305 && ! (const_to_mem
&& constmemok
))
3308 /* Input reloads can be inherited more often than output
3309 reloads can be removed, so penalize output reloads. */
3310 if (operand_type
[i
] != RELOAD_FOR_INPUT
3311 && GET_CODE (operand
) != SCRATCH
)
3315 /* If this operand is a pseudo register that didn't get a hard
3316 reg and this alternative accepts some register, see if the
3317 class that we want is a subset of the preferred class for this
3318 register. If not, but it intersects that class, use the
3319 preferred class instead. If it does not intersect the preferred
3320 class, show that usage of this alternative should be discouraged;
3321 it will be discouraged more still if the register is `preferred
3322 or nothing'. We do this because it increases the chance of
3323 reusing our spill register in a later insn and avoiding a pair
3324 of memory stores and loads.
3326 Don't bother with this if this alternative will accept this
3329 Don't do this for a multiword operand, since it is only a
3330 small win and has the risk of requiring more spill registers,
3331 which could cause a large loss.
3333 Don't do this if the preferred class has only one register
3334 because we might otherwise exhaust the class. */
3336 if (! win
&& ! did_match
3337 && this_alternative
[i
] != (int) NO_REGS
3338 && GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
3339 && reg_class_size
[(int) preferred_class
[i
]] > 1)
3341 if (! reg_class_subset_p (this_alternative
[i
],
3342 preferred_class
[i
]))
3344 /* Since we don't have a way of forming the intersection,
3345 we just do something special if the preferred class
3346 is a subset of the class we have; that's the most
3347 common case anyway. */
3348 if (reg_class_subset_p (preferred_class
[i
],
3349 this_alternative
[i
]))
3350 this_alternative
[i
] = (int) preferred_class
[i
];
3352 reject
+= (2 + 2 * pref_or_nothing
[i
]);
3357 /* Now see if any output operands that are marked "earlyclobber"
3358 in this alternative conflict with any input operands
3359 or any memory addresses. */
3361 for (i
= 0; i
< noperands
; i
++)
3362 if (this_alternative_earlyclobber
[i
]
3363 && (this_alternative_win
[i
] || this_alternative_match_win
[i
]))
3365 struct decomposition early_data
;
3367 early_data
= decompose (recog_data
.operand
[i
]);
3369 if (modified
[i
] == RELOAD_READ
)
3372 if (this_alternative
[i
] == NO_REGS
)
3374 this_alternative_earlyclobber
[i
] = 0;
3375 if (this_insn_is_asm
)
3376 error_for_asm (this_insn
,
3377 "`&' constraint used with no register class");
3382 for (j
= 0; j
< noperands
; j
++)
3383 /* Is this an input operand or a memory ref? */
3384 if ((GET_CODE (recog_data
.operand
[j
]) == MEM
3385 || modified
[j
] != RELOAD_WRITE
)
3387 /* Ignore things like match_operator operands. */
3388 && *recog_data
.constraints
[j
] != 0
3389 /* Don't count an input operand that is constrained to match
3390 the early clobber operand. */
3391 && ! (this_alternative_matches
[j
] == i
3392 && rtx_equal_p (recog_data
.operand
[i
],
3393 recog_data
.operand
[j
]))
3394 /* Is it altered by storing the earlyclobber operand? */
3395 && !immune_p (recog_data
.operand
[j
], recog_data
.operand
[i
],
3398 /* If the output is in a single-reg class,
3399 it's costly to reload it, so reload the input instead. */
3400 if (reg_class_size
[this_alternative
[i
]] == 1
3401 && (GET_CODE (recog_data
.operand
[j
]) == REG
3402 || GET_CODE (recog_data
.operand
[j
]) == SUBREG
))
3405 this_alternative_win
[j
] = 0;
3406 this_alternative_match_win
[j
] = 0;
3411 /* If an earlyclobber operand conflicts with something,
3412 it must be reloaded, so request this and count the cost. */
3416 this_alternative_win
[i
] = 0;
3417 this_alternative_match_win
[j
] = 0;
3418 for (j
= 0; j
< noperands
; j
++)
3419 if (this_alternative_matches
[j
] == i
3420 && this_alternative_match_win
[j
])
3422 this_alternative_win
[j
] = 0;
3423 this_alternative_match_win
[j
] = 0;
3429 /* If one alternative accepts all the operands, no reload required,
3430 choose that alternative; don't consider the remaining ones. */
3433 /* Unswap these so that they are never swapped at `finish'. */
3434 if (commutative
>= 0)
3436 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3437 recog_data
.operand
[commutative
+ 1]
3438 = substed_operand
[commutative
+ 1];
3440 for (i
= 0; i
< noperands
; i
++)
3442 goal_alternative_win
[i
] = this_alternative_win
[i
];
3443 goal_alternative_match_win
[i
] = this_alternative_match_win
[i
];
3444 goal_alternative
[i
] = this_alternative
[i
];
3445 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3446 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3447 goal_alternative_earlyclobber
[i
]
3448 = this_alternative_earlyclobber
[i
];
3450 goal_alternative_number
= this_alternative_number
;
3451 goal_alternative_swapped
= swapped
;
3452 goal_earlyclobber
= this_earlyclobber
;
3456 /* REJECT, set by the ! and ? constraint characters and when a register
3457 would be reloaded into a non-preferred class, discourages the use of
3458 this alternative for a reload goal. REJECT is incremented by six
3459 for each ? and two for each non-preferred class. */
3460 losers
= losers
* 6 + reject
;
3462 /* If this alternative can be made to work by reloading,
3463 and it needs less reloading than the others checked so far,
3464 record it as the chosen goal for reloading. */
3465 if (! bad
&& best
> losers
)
3467 for (i
= 0; i
< noperands
; i
++)
3469 goal_alternative
[i
] = this_alternative
[i
];
3470 goal_alternative_win
[i
] = this_alternative_win
[i
];
3471 goal_alternative_match_win
[i
] = this_alternative_match_win
[i
];
3472 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3473 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3474 goal_alternative_earlyclobber
[i
]
3475 = this_alternative_earlyclobber
[i
];
3477 goal_alternative_swapped
= swapped
;
3479 goal_alternative_number
= this_alternative_number
;
3480 goal_earlyclobber
= this_earlyclobber
;
3484 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3485 then we need to try each alternative twice,
3486 the second time matching those two operands
3487 as if we had exchanged them.
3488 To do this, really exchange them in operands.
3490 If we have just tried the alternatives the second time,
3491 return operands to normal and drop through. */
3493 if (commutative
>= 0)
3498 enum reg_class tclass
;
3501 recog_data
.operand
[commutative
] = substed_operand
[commutative
+ 1];
3502 recog_data
.operand
[commutative
+ 1] = substed_operand
[commutative
];
3503 /* Swap the duplicates too. */
3504 for (i
= 0; i
< recog_data
.n_dups
; i
++)
3505 if (recog_data
.dup_num
[i
] == commutative
3506 || recog_data
.dup_num
[i
] == commutative
+ 1)
3507 *recog_data
.dup_loc
[i
]
3508 = recog_data
.operand
[(int) recog_data
.dup_num
[i
]];
3510 tclass
= preferred_class
[commutative
];
3511 preferred_class
[commutative
] = preferred_class
[commutative
+ 1];
3512 preferred_class
[commutative
+ 1] = tclass
;
3514 t
= pref_or_nothing
[commutative
];
3515 pref_or_nothing
[commutative
] = pref_or_nothing
[commutative
+ 1];
3516 pref_or_nothing
[commutative
+ 1] = t
;
3518 memcpy (constraints
, recog_data
.constraints
,
3519 noperands
* sizeof (char *));
3524 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3525 recog_data
.operand
[commutative
+ 1]
3526 = substed_operand
[commutative
+ 1];
3527 /* Unswap the duplicates too. */
3528 for (i
= 0; i
< recog_data
.n_dups
; i
++)
3529 if (recog_data
.dup_num
[i
] == commutative
3530 || recog_data
.dup_num
[i
] == commutative
+ 1)
3531 *recog_data
.dup_loc
[i
]
3532 = recog_data
.operand
[(int) recog_data
.dup_num
[i
]];
3536 /* The operands don't meet the constraints.
3537 goal_alternative describes the alternative
3538 that we could reach by reloading the fewest operands.
3539 Reload so as to fit it. */
3541 if (best
== MAX_RECOG_OPERANDS
* 2 + 600)
3543 /* No alternative works with reloads?? */
3544 if (insn_code_number
>= 0)
3545 fatal_insn ("unable to generate reloads for:", insn
);
3546 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3547 /* Avoid further trouble with this insn. */
3548 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3553 /* Jump to `finish' from above if all operands are valid already.
3554 In that case, goal_alternative_win is all 1. */
3557 /* Right now, for any pair of operands I and J that are required to match,
3559 goal_alternative_matches[J] is I.
3560 Set up goal_alternative_matched as the inverse function:
3561 goal_alternative_matched[I] = J. */
3563 for (i
= 0; i
< noperands
; i
++)
3564 goal_alternative_matched
[i
] = -1;
3566 for (i
= 0; i
< noperands
; i
++)
3567 if (! goal_alternative_win
[i
]
3568 && goal_alternative_matches
[i
] >= 0)
3569 goal_alternative_matched
[goal_alternative_matches
[i
]] = i
;
3571 for (i
= 0; i
< noperands
; i
++)
3572 goal_alternative_win
[i
] |= goal_alternative_match_win
[i
];
3574 /* If the best alternative is with operands 1 and 2 swapped,
3575 consider them swapped before reporting the reloads. Update the
3576 operand numbers of any reloads already pushed. */
3578 if (goal_alternative_swapped
)
3582 tem
= substed_operand
[commutative
];
3583 substed_operand
[commutative
] = substed_operand
[commutative
+ 1];
3584 substed_operand
[commutative
+ 1] = tem
;
3585 tem
= recog_data
.operand
[commutative
];
3586 recog_data
.operand
[commutative
] = recog_data
.operand
[commutative
+ 1];
3587 recog_data
.operand
[commutative
+ 1] = tem
;
3588 tem
= *recog_data
.operand_loc
[commutative
];
3589 *recog_data
.operand_loc
[commutative
]
3590 = *recog_data
.operand_loc
[commutative
+ 1];
3591 *recog_data
.operand_loc
[commutative
+ 1] = tem
;
3593 for (i
= 0; i
< n_reloads
; i
++)
3595 if (rld
[i
].opnum
== commutative
)
3596 rld
[i
].opnum
= commutative
+ 1;
3597 else if (rld
[i
].opnum
== commutative
+ 1)
3598 rld
[i
].opnum
= commutative
;
3602 for (i
= 0; i
< noperands
; i
++)
3604 operand_reloadnum
[i
] = -1;
3606 /* If this is an earlyclobber operand, we need to widen the scope.
3607 The reload must remain valid from the start of the insn being
3608 reloaded until after the operand is stored into its destination.
3609 We approximate this with RELOAD_OTHER even though we know that we
3610 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3612 One special case that is worth checking is when we have an
3613 output that is earlyclobber but isn't used past the insn (typically
3614 a SCRATCH). In this case, we only need have the reload live
3615 through the insn itself, but not for any of our input or output
3617 But we must not accidentally narrow the scope of an existing
3618 RELOAD_OTHER reload - leave these alone.
3620 In any case, anything needed to address this operand can remain
3621 however they were previously categorized. */
3623 if (goal_alternative_earlyclobber
[i
] && operand_type
[i
] != RELOAD_OTHER
)
3625 = (find_reg_note (insn
, REG_UNUSED
, recog_data
.operand
[i
])
3626 ? RELOAD_FOR_INSN
: RELOAD_OTHER
);
3629 /* Any constants that aren't allowed and can't be reloaded
3630 into registers are here changed into memory references. */
3631 for (i
= 0; i
< noperands
; i
++)
3632 if (! goal_alternative_win
[i
]
3633 && CONSTANT_P (recog_data
.operand
[i
])
3634 /* force_const_mem does not accept HIGH. */
3635 && GET_CODE (recog_data
.operand
[i
]) != HIGH
3636 && ((PREFERRED_RELOAD_CLASS (recog_data
.operand
[i
],
3637 (enum reg_class
) goal_alternative
[i
])
3639 || no_input_reloads
)
3640 && operand_mode
[i
] != VOIDmode
)
3642 substed_operand
[i
] = recog_data
.operand
[i
]
3643 = find_reloads_toplev (force_const_mem (operand_mode
[i
],
3644 recog_data
.operand
[i
]),
3645 i
, address_type
[i
], ind_levels
, 0, insn
,
3647 if (alternative_allows_memconst (recog_data
.constraints
[i
],
3648 goal_alternative_number
))
3649 goal_alternative_win
[i
] = 1;
3652 /* Record the values of the earlyclobber operands for the caller. */
3653 if (goal_earlyclobber
)
3654 for (i
= 0; i
< noperands
; i
++)
3655 if (goal_alternative_earlyclobber
[i
])
3656 reload_earlyclobbers
[n_earlyclobbers
++] = recog_data
.operand
[i
];
3658 /* Now record reloads for all the operands that need them. */
3659 for (i
= 0; i
< noperands
; i
++)
3660 if (! goal_alternative_win
[i
])
3662 /* Operands that match previous ones have already been handled. */
3663 if (goal_alternative_matches
[i
] >= 0)
3665 /* Handle an operand with a nonoffsettable address
3666 appearing where an offsettable address will do
3667 by reloading the address into a base register.
3669 ??? We can also do this when the operand is a register and
3670 reg_equiv_mem is not offsettable, but this is a bit tricky,
3671 so we don't bother with it. It may not be worth doing. */
3672 else if (goal_alternative_matched
[i
] == -1
3673 && goal_alternative_offmemok
[i
]
3674 && GET_CODE (recog_data
.operand
[i
]) == MEM
)
3676 operand_reloadnum
[i
]
3677 = push_reload (XEXP (recog_data
.operand
[i
], 0), NULL_RTX
,
3678 &XEXP (recog_data
.operand
[i
], 0), (rtx
*) 0,
3679 MODE_BASE_REG_CLASS (VOIDmode
),
3680 GET_MODE (XEXP (recog_data
.operand
[i
], 0)),
3681 VOIDmode
, 0, 0, i
, RELOAD_FOR_INPUT
);
3682 rld
[operand_reloadnum
[i
]].inc
3683 = GET_MODE_SIZE (GET_MODE (recog_data
.operand
[i
]));
3685 /* If this operand is an output, we will have made any
3686 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3687 now we are treating part of the operand as an input, so
3688 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3690 if (modified
[i
] == RELOAD_WRITE
)
3692 for (j
= 0; j
< n_reloads
; j
++)
3694 if (rld
[j
].opnum
== i
)
3696 if (rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
)
3697 rld
[j
].when_needed
= RELOAD_FOR_INPUT_ADDRESS
;
3698 else if (rld
[j
].when_needed
3699 == RELOAD_FOR_OUTADDR_ADDRESS
)
3700 rld
[j
].when_needed
= RELOAD_FOR_INPADDR_ADDRESS
;
3705 else if (goal_alternative_matched
[i
] == -1)
3707 operand_reloadnum
[i
]
3708 = push_reload ((modified
[i
] != RELOAD_WRITE
3709 ? recog_data
.operand
[i
] : 0),
3710 (modified
[i
] != RELOAD_READ
3711 ? recog_data
.operand
[i
] : 0),
3712 (modified
[i
] != RELOAD_WRITE
3713 ? recog_data
.operand_loc
[i
] : 0),
3714 (modified
[i
] != RELOAD_READ
3715 ? recog_data
.operand_loc
[i
] : 0),
3716 (enum reg_class
) goal_alternative
[i
],
3717 (modified
[i
] == RELOAD_WRITE
3718 ? VOIDmode
: operand_mode
[i
]),
3719 (modified
[i
] == RELOAD_READ
3720 ? VOIDmode
: operand_mode
[i
]),
3721 (insn_code_number
< 0 ? 0
3722 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
3723 0, i
, operand_type
[i
]);
3725 /* In a matching pair of operands, one must be input only
3726 and the other must be output only.
3727 Pass the input operand as IN and the other as OUT. */
3728 else if (modified
[i
] == RELOAD_READ
3729 && modified
[goal_alternative_matched
[i
]] == RELOAD_WRITE
)
3731 operand_reloadnum
[i
]
3732 = push_reload (recog_data
.operand
[i
],
3733 recog_data
.operand
[goal_alternative_matched
[i
]],
3734 recog_data
.operand_loc
[i
],
3735 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
3736 (enum reg_class
) goal_alternative
[i
],
3738 operand_mode
[goal_alternative_matched
[i
]],
3739 0, 0, i
, RELOAD_OTHER
);
3740 operand_reloadnum
[goal_alternative_matched
[i
]] = output_reloadnum
;
3742 else if (modified
[i
] == RELOAD_WRITE
3743 && modified
[goal_alternative_matched
[i
]] == RELOAD_READ
)
3745 operand_reloadnum
[goal_alternative_matched
[i
]]
3746 = push_reload (recog_data
.operand
[goal_alternative_matched
[i
]],
3747 recog_data
.operand
[i
],
3748 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
3749 recog_data
.operand_loc
[i
],
3750 (enum reg_class
) goal_alternative
[i
],
3751 operand_mode
[goal_alternative_matched
[i
]],
3753 0, 0, i
, RELOAD_OTHER
);
3754 operand_reloadnum
[i
] = output_reloadnum
;
3756 else if (insn_code_number
>= 0)
3760 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3761 /* Avoid further trouble with this insn. */
3762 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3767 else if (goal_alternative_matched
[i
] < 0
3768 && goal_alternative_matches
[i
] < 0
3771 /* For each non-matching operand that's a MEM or a pseudo-register
3772 that didn't get a hard register, make an optional reload.
3773 This may get done even if the insn needs no reloads otherwise. */
3775 rtx operand
= recog_data
.operand
[i
];
3777 while (GET_CODE (operand
) == SUBREG
)
3778 operand
= SUBREG_REG (operand
);
3779 if ((GET_CODE (operand
) == MEM
3780 || (GET_CODE (operand
) == REG
3781 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3782 /* If this is only for an output, the optional reload would not
3783 actually cause us to use a register now, just note that
3784 something is stored here. */
3785 && ((enum reg_class
) goal_alternative
[i
] != NO_REGS
3786 || modified
[i
] == RELOAD_WRITE
)
3787 && ! no_input_reloads
3788 /* An optional output reload might allow to delete INSN later.
3789 We mustn't make in-out reloads on insns that are not permitted
3791 If this is an asm, we can't delete it; we must not even call
3792 push_reload for an optional output reload in this case,
3793 because we can't be sure that the constraint allows a register,
3794 and push_reload verifies the constraints for asms. */
3795 && (modified
[i
] == RELOAD_READ
3796 || (! no_output_reloads
&& ! this_insn_is_asm
)))
3797 operand_reloadnum
[i
]
3798 = push_reload ((modified
[i
] != RELOAD_WRITE
3799 ? recog_data
.operand
[i
] : 0),
3800 (modified
[i
] != RELOAD_READ
3801 ? recog_data
.operand
[i
] : 0),
3802 (modified
[i
] != RELOAD_WRITE
3803 ? recog_data
.operand_loc
[i
] : 0),
3804 (modified
[i
] != RELOAD_READ
3805 ? recog_data
.operand_loc
[i
] : 0),
3806 (enum reg_class
) goal_alternative
[i
],
3807 (modified
[i
] == RELOAD_WRITE
3808 ? VOIDmode
: operand_mode
[i
]),
3809 (modified
[i
] == RELOAD_READ
3810 ? VOIDmode
: operand_mode
[i
]),
3811 (insn_code_number
< 0 ? 0
3812 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
3813 1, i
, operand_type
[i
]);
3814 /* If a memory reference remains (either as a MEM or a pseudo that
3815 did not get a hard register), yet we can't make an optional
3816 reload, check if this is actually a pseudo register reference;
3817 we then need to emit a USE and/or a CLOBBER so that reload
3818 inheritance will do the right thing. */
3820 && (GET_CODE (operand
) == MEM
3821 || (GET_CODE (operand
) == REG
3822 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3823 && reg_renumber
[REGNO (operand
)] < 0)))
3825 operand
= *recog_data
.operand_loc
[i
];
3827 while (GET_CODE (operand
) == SUBREG
)
3828 operand
= SUBREG_REG (operand
);
3829 if (GET_CODE (operand
) == REG
)
3831 if (modified
[i
] != RELOAD_WRITE
)
3832 /* We mark the USE with QImode so that we recognize
3833 it as one that can be safely deleted at the end
3835 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, operand
),
3837 if (modified
[i
] != RELOAD_READ
)
3838 emit_insn_after (gen_rtx_CLOBBER (VOIDmode
, operand
), insn
);
3842 else if (goal_alternative_matches
[i
] >= 0
3843 && goal_alternative_win
[goal_alternative_matches
[i
]]
3844 && modified
[i
] == RELOAD_READ
3845 && modified
[goal_alternative_matches
[i
]] == RELOAD_WRITE
3846 && ! no_input_reloads
&& ! no_output_reloads
3849 /* Similarly, make an optional reload for a pair of matching
3850 objects that are in MEM or a pseudo that didn't get a hard reg. */
3852 rtx operand
= recog_data
.operand
[i
];
3854 while (GET_CODE (operand
) == SUBREG
)
3855 operand
= SUBREG_REG (operand
);
3856 if ((GET_CODE (operand
) == MEM
3857 || (GET_CODE (operand
) == REG
3858 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3859 && ((enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]]
3861 operand_reloadnum
[i
] = operand_reloadnum
[goal_alternative_matches
[i
]]
3862 = push_reload (recog_data
.operand
[goal_alternative_matches
[i
]],
3863 recog_data
.operand
[i
],
3864 recog_data
.operand_loc
[goal_alternative_matches
[i
]],
3865 recog_data
.operand_loc
[i
],
3866 (enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]],
3867 operand_mode
[goal_alternative_matches
[i
]],
3869 0, 1, goal_alternative_matches
[i
], RELOAD_OTHER
);
3872 /* Perform whatever substitutions on the operands we are supposed
3873 to make due to commutativity or replacement of registers
3874 with equivalent constants or memory slots. */
3876 for (i
= 0; i
< noperands
; i
++)
3878 /* We only do this on the last pass through reload, because it is
3879 possible for some data (like reg_equiv_address) to be changed during
3880 later passes. Moreover, we loose the opportunity to get a useful
3881 reload_{in,out}_reg when we do these replacements. */
3885 rtx substitution
= substed_operand
[i
];
3887 *recog_data
.operand_loc
[i
] = substitution
;
3889 /* If we're replacing an operand with a LABEL_REF, we need
3890 to make sure that there's a REG_LABEL note attached to
3891 this instruction. */
3892 if (GET_CODE (insn
) != JUMP_INSN
3893 && GET_CODE (substitution
) == LABEL_REF
3894 && !find_reg_note (insn
, REG_LABEL
, XEXP (substitution
, 0)))
3895 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_LABEL
,
3896 XEXP (substitution
, 0),
3900 retval
|= (substed_operand
[i
] != *recog_data
.operand_loc
[i
]);
3903 /* If this insn pattern contains any MATCH_DUP's, make sure that
3904 they will be substituted if the operands they match are substituted.
3905 Also do now any substitutions we already did on the operands.
3907 Don't do this if we aren't making replacements because we might be
3908 propagating things allocated by frame pointer elimination into places
3909 it doesn't expect. */
3911 if (insn_code_number
>= 0 && replace
)
3912 for (i
= insn_data
[insn_code_number
].n_dups
- 1; i
>= 0; i
--)
3914 int opno
= recog_data
.dup_num
[i
];
3915 *recog_data
.dup_loc
[i
] = *recog_data
.operand_loc
[opno
];
3916 if (operand_reloadnum
[opno
] >= 0)
3917 push_replacement (recog_data
.dup_loc
[i
], operand_reloadnum
[opno
],
3918 insn_data
[insn_code_number
].operand
[opno
].mode
);
3922 /* This loses because reloading of prior insns can invalidate the equivalence
3923 (or at least find_equiv_reg isn't smart enough to find it any more),
3924 causing this insn to need more reload regs than it needed before.
3925 It may be too late to make the reload regs available.
3926 Now this optimization is done safely in choose_reload_regs. */
3928 /* For each reload of a reg into some other class of reg,
3929 search for an existing equivalent reg (same value now) in the right class.
3930 We can use it as long as we don't need to change its contents. */
3931 for (i
= 0; i
< n_reloads
; i
++)
3932 if (rld
[i
].reg_rtx
== 0
3934 && GET_CODE (rld
[i
].in
) == REG
3938 = find_equiv_reg (rld
[i
].in
, insn
, rld
[i
].class, -1,
3939 static_reload_reg_p
, 0, rld
[i
].inmode
);
3940 /* Prevent generation of insn to load the value
3941 because the one we found already has the value. */
3943 rld
[i
].in
= rld
[i
].reg_rtx
;
3947 /* Perhaps an output reload can be combined with another
3948 to reduce needs by one. */
3949 if (!goal_earlyclobber
)
3952 /* If we have a pair of reloads for parts of an address, they are reloading
3953 the same object, the operands themselves were not reloaded, and they
3954 are for two operands that are supposed to match, merge the reloads and
3955 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3957 for (i
= 0; i
< n_reloads
; i
++)
3961 for (j
= i
+ 1; j
< n_reloads
; j
++)
3962 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3963 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3964 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3965 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3966 && (rld
[j
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3967 || rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3968 || rld
[j
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3969 || rld
[j
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3970 && rtx_equal_p (rld
[i
].in
, rld
[j
].in
)
3971 && (operand_reloadnum
[rld
[i
].opnum
] < 0
3972 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
)
3973 && (operand_reloadnum
[rld
[j
].opnum
] < 0
3974 || rld
[operand_reloadnum
[rld
[j
].opnum
]].optional
)
3975 && (goal_alternative_matches
[rld
[i
].opnum
] == rld
[j
].opnum
3976 || (goal_alternative_matches
[rld
[j
].opnum
]
3979 for (k
= 0; k
< n_replacements
; k
++)
3980 if (replacements
[k
].what
== j
)
3981 replacements
[k
].what
= i
;
3983 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3984 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3985 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
3987 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
3992 /* Scan all the reloads and update their type.
3993 If a reload is for the address of an operand and we didn't reload
3994 that operand, change the type. Similarly, change the operand number
3995 of a reload when two operands match. If a reload is optional, treat it
3996 as though the operand isn't reloaded.
3998 ??? This latter case is somewhat odd because if we do the optional
3999 reload, it means the object is hanging around. Thus we need only
4000 do the address reload if the optional reload was NOT done.
4002 Change secondary reloads to be the address type of their operand, not
4005 If an operand's reload is now RELOAD_OTHER, change any
4006 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
4007 RELOAD_FOR_OTHER_ADDRESS. */
4009 for (i
= 0; i
< n_reloads
; i
++)
4011 if (rld
[i
].secondary_p
4012 && rld
[i
].when_needed
== operand_type
[rld
[i
].opnum
])
4013 rld
[i
].when_needed
= address_type
[rld
[i
].opnum
];
4015 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4016 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4017 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4018 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4019 && (operand_reloadnum
[rld
[i
].opnum
] < 0
4020 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
))
4022 /* If we have a secondary reload to go along with this reload,
4023 change its type to RELOAD_FOR_OPADDR_ADDR. */
4025 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4026 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
4027 && rld
[i
].secondary_in_reload
!= -1)
4029 int secondary_in_reload
= rld
[i
].secondary_in_reload
;
4031 rld
[secondary_in_reload
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4033 /* If there's a tertiary reload we have to change it also. */
4034 if (secondary_in_reload
> 0
4035 && rld
[secondary_in_reload
].secondary_in_reload
!= -1)
4036 rld
[rld
[secondary_in_reload
].secondary_in_reload
].when_needed
4037 = RELOAD_FOR_OPADDR_ADDR
;
4040 if ((rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4041 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4042 && rld
[i
].secondary_out_reload
!= -1)
4044 int secondary_out_reload
= rld
[i
].secondary_out_reload
;
4046 rld
[secondary_out_reload
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4048 /* If there's a tertiary reload we have to change it also. */
4049 if (secondary_out_reload
4050 && rld
[secondary_out_reload
].secondary_out_reload
!= -1)
4051 rld
[rld
[secondary_out_reload
].secondary_out_reload
].when_needed
4052 = RELOAD_FOR_OPADDR_ADDR
;
4055 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4056 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4057 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4059 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
4062 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4063 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
4064 && operand_reloadnum
[rld
[i
].opnum
] >= 0
4065 && (rld
[operand_reloadnum
[rld
[i
].opnum
]].when_needed
4067 rld
[i
].when_needed
= RELOAD_FOR_OTHER_ADDRESS
;
4069 if (goal_alternative_matches
[rld
[i
].opnum
] >= 0)
4070 rld
[i
].opnum
= goal_alternative_matches
[rld
[i
].opnum
];
4073 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4074 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4075 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4077 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4078 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4079 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4080 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4081 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4082 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4083 This is complicated by the fact that a single operand can have more
4084 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4085 choose_reload_regs without affecting code quality, and cases that
4086 actually fail are extremely rare, so it turns out to be better to fix
4087 the problem here by not generating cases that choose_reload_regs will
4089 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4090 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4092 We can reduce the register pressure by exploiting that a
4093 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4094 does not conflict with any of them, if it is only used for the first of
4095 the RELOAD_FOR_X_ADDRESS reloads. */
4097 int first_op_addr_num
= -2;
4098 int first_inpaddr_num
[MAX_RECOG_OPERANDS
];
4099 int first_outpaddr_num
[MAX_RECOG_OPERANDS
];
4100 int need_change
= 0;
4101 /* We use last_op_addr_reload and the contents of the above arrays
4102 first as flags - -2 means no instance encountered, -1 means exactly
4103 one instance encountered.
4104 If more than one instance has been encountered, we store the reload
4105 number of the first reload of the kind in question; reload numbers
4106 are known to be non-negative. */
4107 for (i
= 0; i
< noperands
; i
++)
4108 first_inpaddr_num
[i
] = first_outpaddr_num
[i
] = -2;
4109 for (i
= n_reloads
- 1; i
>= 0; i
--)
4111 switch (rld
[i
].when_needed
)
4113 case RELOAD_FOR_OPERAND_ADDRESS
:
4114 if (++first_op_addr_num
>= 0)
4116 first_op_addr_num
= i
;
4120 case RELOAD_FOR_INPUT_ADDRESS
:
4121 if (++first_inpaddr_num
[rld
[i
].opnum
] >= 0)
4123 first_inpaddr_num
[rld
[i
].opnum
] = i
;
4127 case RELOAD_FOR_OUTPUT_ADDRESS
:
4128 if (++first_outpaddr_num
[rld
[i
].opnum
] >= 0)
4130 first_outpaddr_num
[rld
[i
].opnum
] = i
;
4141 for (i
= 0; i
< n_reloads
; i
++)
4144 enum reload_type type
;
4146 switch (rld
[i
].when_needed
)
4148 case RELOAD_FOR_OPADDR_ADDR
:
4149 first_num
= first_op_addr_num
;
4150 type
= RELOAD_FOR_OPERAND_ADDRESS
;
4152 case RELOAD_FOR_INPADDR_ADDRESS
:
4153 first_num
= first_inpaddr_num
[rld
[i
].opnum
];
4154 type
= RELOAD_FOR_INPUT_ADDRESS
;
4156 case RELOAD_FOR_OUTADDR_ADDRESS
:
4157 first_num
= first_outpaddr_num
[rld
[i
].opnum
];
4158 type
= RELOAD_FOR_OUTPUT_ADDRESS
;
4165 else if (i
> first_num
)
4166 rld
[i
].when_needed
= type
;
4169 /* Check if the only TYPE reload that uses reload I is
4170 reload FIRST_NUM. */
4171 for (j
= n_reloads
- 1; j
> first_num
; j
--)
4173 if (rld
[j
].when_needed
== type
4174 && (rld
[i
].secondary_p
4175 ? rld
[j
].secondary_in_reload
== i
4176 : reg_mentioned_p (rld
[i
].in
, rld
[j
].in
)))
4178 rld
[i
].when_needed
= type
;
4187 /* See if we have any reloads that are now allowed to be merged
4188 because we've changed when the reload is needed to
4189 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4190 check for the most common cases. */
4192 for (i
= 0; i
< n_reloads
; i
++)
4193 if (rld
[i
].in
!= 0 && rld
[i
].out
== 0
4194 && (rld
[i
].when_needed
== RELOAD_FOR_OPERAND_ADDRESS
4195 || rld
[i
].when_needed
== RELOAD_FOR_OPADDR_ADDR
4196 || rld
[i
].when_needed
== RELOAD_FOR_OTHER_ADDRESS
))
4197 for (j
= 0; j
< n_reloads
; j
++)
4198 if (i
!= j
&& rld
[j
].in
!= 0 && rld
[j
].out
== 0
4199 && rld
[j
].when_needed
== rld
[i
].when_needed
4200 && MATCHES (rld
[i
].in
, rld
[j
].in
)
4201 && rld
[i
].class == rld
[j
].class
4202 && !rld
[i
].nocombine
&& !rld
[j
].nocombine
4203 && rld
[i
].reg_rtx
== rld
[j
].reg_rtx
)
4205 rld
[i
].opnum
= MIN (rld
[i
].opnum
, rld
[j
].opnum
);
4206 transfer_replacements (i
, j
);
4211 /* If we made any reloads for addresses, see if they violate a
4212 "no input reloads" requirement for this insn. But loads that we
4213 do after the insn (such as for output addresses) are fine. */
4214 if (no_input_reloads
)
4215 for (i
= 0; i
< n_reloads
; i
++)
4217 && rld
[i
].when_needed
!= RELOAD_FOR_OUTADDR_ADDRESS
4218 && rld
[i
].when_needed
!= RELOAD_FOR_OUTPUT_ADDRESS
)
4222 /* Compute reload_mode and reload_nregs. */
4223 for (i
= 0; i
< n_reloads
; i
++)
4226 = (rld
[i
].inmode
== VOIDmode
4227 || (GET_MODE_SIZE (rld
[i
].outmode
)
4228 > GET_MODE_SIZE (rld
[i
].inmode
)))
4229 ? rld
[i
].outmode
: rld
[i
].inmode
;
4231 rld
[i
].nregs
= CLASS_MAX_NREGS (rld
[i
].class, rld
[i
].mode
);
4234 /* Special case a simple move with an input reload and a
4235 destination of a hard reg, if the hard reg is ok, use it. */
4236 for (i
= 0; i
< n_reloads
; i
++)
4237 if (rld
[i
].when_needed
== RELOAD_FOR_INPUT
4238 && GET_CODE (PATTERN (insn
)) == SET
4239 && GET_CODE (SET_DEST (PATTERN (insn
))) == REG
4240 && SET_SRC (PATTERN (insn
)) == rld
[i
].in
)
4242 rtx dest
= SET_DEST (PATTERN (insn
));
4243 unsigned int regno
= REGNO (dest
);
4245 if (regno
< FIRST_PSEUDO_REGISTER
4246 && TEST_HARD_REG_BIT (reg_class_contents
[rld
[i
].class], regno
)
4247 && HARD_REGNO_MODE_OK (regno
, rld
[i
].mode
))
4248 rld
[i
].reg_rtx
= dest
;
4254 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4255 accepts a memory operand with constant address. */
4258 alternative_allows_memconst (constraint
, altnum
)
4259 const char *constraint
;
4263 /* Skip alternatives before the one requested. */
4266 while (*constraint
++ != ',');
4269 /* Scan the requested alternative for 'm' or 'o'.
4270 If one of them is present, this alternative accepts memory constants. */
4271 while ((c
= *constraint
++) && c
!= ',' && c
!= '#')
4272 if (c
== 'm' || c
== 'o')
4277 /* Scan X for memory references and scan the addresses for reloading.
4278 Also checks for references to "constant" regs that we want to eliminate
4279 and replaces them with the values they stand for.
4280 We may alter X destructively if it contains a reference to such.
4281 If X is just a constant reg, we return the equivalent value
4284 IND_LEVELS says how many levels of indirect addressing this machine
4287 OPNUM and TYPE identify the purpose of the reload.
4289 IS_SET_DEST is true if X is the destination of a SET, which is not
4290 appropriate to be replaced by a constant.
4292 INSN, if nonzero, is the insn in which we do the reload. It is used
4293 to determine if we may generate output reloads, and where to put USEs
4294 for pseudos that we have to replace with stack slots.
4296 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4297 result of find_reloads_address. */
4300 find_reloads_toplev (x
, opnum
, type
, ind_levels
, is_set_dest
, insn
,
4304 enum reload_type type
;
4308 int *address_reloaded
;
4310 RTX_CODE code
= GET_CODE (x
);
4312 const char *fmt
= GET_RTX_FORMAT (code
);
4318 /* This code is duplicated for speed in find_reloads. */
4319 int regno
= REGNO (x
);
4320 if (reg_equiv_constant
[regno
] != 0 && !is_set_dest
)
4321 x
= reg_equiv_constant
[regno
];
4323 /* This creates (subreg (mem...)) which would cause an unnecessary
4324 reload of the mem. */
4325 else if (reg_equiv_mem
[regno
] != 0)
4326 x
= reg_equiv_mem
[regno
];
4328 else if (reg_equiv_memory_loc
[regno
]
4329 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
4331 rtx mem
= make_memloc (x
, regno
);
4332 if (reg_equiv_address
[regno
]
4333 || ! rtx_equal_p (mem
, reg_equiv_mem
[regno
]))
4335 /* If this is not a toplevel operand, find_reloads doesn't see
4336 this substitution. We have to emit a USE of the pseudo so
4337 that delete_output_reload can see it. */
4338 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
4339 /* We mark the USE with QImode so that we recognize it
4340 as one that can be safely deleted at the end of
4342 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, x
), insn
),
4345 i
= find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0), &XEXP (x
, 0),
4346 opnum
, type
, ind_levels
, insn
);
4347 if (address_reloaded
)
4348 *address_reloaded
= i
;
4357 i
= find_reloads_address (GET_MODE (x
), &tem
, XEXP (x
, 0), &XEXP (x
, 0),
4358 opnum
, type
, ind_levels
, insn
);
4359 if (address_reloaded
)
4360 *address_reloaded
= i
;
4365 if (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
)
4367 /* Check for SUBREG containing a REG that's equivalent to a constant.
4368 If the constant has a known value, truncate it right now.
4369 Similarly if we are extracting a single-word of a multi-word
4370 constant. If the constant is symbolic, allow it to be substituted
4371 normally. push_reload will strip the subreg later. If the
4372 constant is VOIDmode, abort because we will lose the mode of
4373 the register (this should never happen because one of the cases
4374 above should handle it). */
4376 int regno
= REGNO (SUBREG_REG (x
));
4379 if (subreg_lowpart_p (x
)
4380 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4381 && reg_equiv_constant
[regno
] != 0
4382 && (tem
= gen_lowpart_common (GET_MODE (x
),
4383 reg_equiv_constant
[regno
])) != 0)
4386 if (GET_MODE_BITSIZE (GET_MODE (x
)) == BITS_PER_WORD
4387 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4388 && reg_equiv_constant
[regno
] != 0
4389 && (tem
= operand_subword (reg_equiv_constant
[regno
],
4390 SUBREG_BYTE (x
) / UNITS_PER_WORD
, 0,
4391 GET_MODE (SUBREG_REG (x
)))) != 0)
4393 /* TEM is now a word sized constant for the bits from X that
4394 we wanted. However, TEM may be the wrong representation.
4396 Use gen_lowpart_common to convert a CONST_INT into a
4397 CONST_DOUBLE and vice versa as needed according to by the mode
4399 tem
= gen_lowpart_common (GET_MODE (x
), tem
);
4405 /* If the SUBREG is wider than a word, the above test will fail.
4406 For example, we might have a SImode SUBREG of a DImode SUBREG_REG
4407 for a 16 bit target, or a DImode SUBREG of a TImode SUBREG_REG for
4408 a 32 bit target. We still can - and have to - handle this
4409 for non-paradoxical subregs of CONST_INTs. */
4410 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4411 && reg_equiv_constant
[regno
] != 0
4412 && GET_CODE (reg_equiv_constant
[regno
]) == CONST_INT
4413 && (GET_MODE_SIZE (GET_MODE (x
))
4414 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))))
4416 int shift
= SUBREG_BYTE (x
) * BITS_PER_UNIT
;
4417 if (WORDS_BIG_ENDIAN
)
4418 shift
= (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
)))
4419 - GET_MODE_BITSIZE (GET_MODE (x
))
4421 /* Here we use the knowledge that CONST_INTs have a
4422 HOST_WIDE_INT field. */
4423 if (shift
>= HOST_BITS_PER_WIDE_INT
)
4424 shift
= HOST_BITS_PER_WIDE_INT
- 1;
4425 return GEN_INT (INTVAL (reg_equiv_constant
[regno
]) >> shift
);
4428 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4429 && reg_equiv_constant
[regno
] != 0
4430 && GET_MODE (reg_equiv_constant
[regno
]) == VOIDmode
)
4433 /* If the subreg contains a reg that will be converted to a mem,
4434 convert the subreg to a narrower memref now.
4435 Otherwise, we would get (subreg (mem ...) ...),
4436 which would force reload of the mem.
4438 We also need to do this if there is an equivalent MEM that is
4439 not offsettable. In that case, alter_subreg would produce an
4440 invalid address on big-endian machines.
4442 For machines that extend byte loads, we must not reload using
4443 a wider mode if we have a paradoxical SUBREG. find_reloads will
4444 force a reload in that case. So we should not do anything here. */
4446 else if (regno
>= FIRST_PSEUDO_REGISTER
4447 #ifdef LOAD_EXTEND_OP
4448 && (GET_MODE_SIZE (GET_MODE (x
))
4449 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4451 && (reg_equiv_address
[regno
] != 0
4452 || (reg_equiv_mem
[regno
] != 0
4453 && (! strict_memory_address_p (GET_MODE (x
),
4454 XEXP (reg_equiv_mem
[regno
], 0))
4455 || ! offsettable_memref_p (reg_equiv_mem
[regno
])
4456 || num_not_at_initial_offset
))))
4457 x
= find_reloads_subreg_address (x
, 1, opnum
, type
, ind_levels
,
4461 for (copied
= 0, i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4465 rtx new_part
= find_reloads_toplev (XEXP (x
, i
), opnum
, type
,
4466 ind_levels
, is_set_dest
, insn
,
4468 /* If we have replaced a reg with it's equivalent memory loc -
4469 that can still be handled here e.g. if it's in a paradoxical
4470 subreg - we must make the change in a copy, rather than using
4471 a destructive change. This way, find_reloads can still elect
4472 not to do the change. */
4473 if (new_part
!= XEXP (x
, i
) && ! CONSTANT_P (new_part
) && ! copied
)
4475 x
= shallow_copy_rtx (x
);
4478 XEXP (x
, i
) = new_part
;
4484 /* Return a mem ref for the memory equivalent of reg REGNO.
4485 This mem ref is not shared with anything. */
4488 make_memloc (ad
, regno
)
4492 /* We must rerun eliminate_regs, in case the elimination
4493 offsets have changed. */
4495 = XEXP (eliminate_regs (reg_equiv_memory_loc
[regno
], 0, NULL_RTX
), 0);
4497 /* If TEM might contain a pseudo, we must copy it to avoid
4498 modifying it when we do the substitution for the reload. */
4499 if (rtx_varies_p (tem
, 0))
4500 tem
= copy_rtx (tem
);
4502 tem
= replace_equiv_address_nv (reg_equiv_memory_loc
[regno
], tem
);
4503 tem
= adjust_address_nv (tem
, GET_MODE (ad
), 0);
4505 /* Copy the result if it's still the same as the equivalence, to avoid
4506 modifying it when we do the substitution for the reload. */
4507 if (tem
== reg_equiv_memory_loc
[regno
])
4508 tem
= copy_rtx (tem
);
4512 /* Record all reloads needed for handling memory address AD
4513 which appears in *LOC in a memory reference to mode MODE
4514 which itself is found in location *MEMREFLOC.
4515 Note that we take shortcuts assuming that no multi-reg machine mode
4516 occurs as part of an address.
4518 OPNUM and TYPE specify the purpose of this reload.
4520 IND_LEVELS says how many levels of indirect addressing this machine
4523 INSN, if nonzero, is the insn in which we do the reload. It is used
4524 to determine if we may generate output reloads, and where to put USEs
4525 for pseudos that we have to replace with stack slots.
4527 Value is nonzero if this address is reloaded or replaced as a whole.
4528 This is interesting to the caller if the address is an autoincrement.
4530 Note that there is no verification that the address will be valid after
4531 this routine does its work. Instead, we rely on the fact that the address
4532 was valid when reload started. So we need only undo things that reload
4533 could have broken. These are wrong register types, pseudos not allocated
4534 to a hard register, and frame pointer elimination. */
4537 find_reloads_address (mode
, memrefloc
, ad
, loc
, opnum
, type
, ind_levels
, insn
)
4538 enum machine_mode mode
;
4543 enum reload_type type
;
4548 int removed_and
= 0;
4551 /* If the address is a register, see if it is a legitimate address and
4552 reload if not. We first handle the cases where we need not reload
4553 or where we must reload in a non-standard way. */
4555 if (GET_CODE (ad
) == REG
)
4559 /* If the register is equivalent to an invariant expression, substitute
4560 the invariant, and eliminate any eliminable register references. */
4561 tem
= reg_equiv_constant
[regno
];
4563 && (tem
= eliminate_regs (tem
, mode
, insn
))
4564 && strict_memory_address_p (mode
, tem
))
4570 tem
= reg_equiv_memory_loc
[regno
];
4573 if (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
)
4575 tem
= make_memloc (ad
, regno
);
4576 if (! strict_memory_address_p (GET_MODE (tem
), XEXP (tem
, 0)))
4578 find_reloads_address (GET_MODE (tem
), (rtx
*) 0, XEXP (tem
, 0),
4579 &XEXP (tem
, 0), opnum
, ADDR_TYPE (type
),
4582 /* We can avoid a reload if the register's equivalent memory
4583 expression is valid as an indirect memory address.
4584 But not all addresses are valid in a mem used as an indirect
4585 address: only reg or reg+constant. */
4588 && strict_memory_address_p (mode
, tem
)
4589 && (GET_CODE (XEXP (tem
, 0)) == REG
4590 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4591 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4592 && CONSTANT_P (XEXP (XEXP (tem
, 0), 1)))))
4594 /* TEM is not the same as what we'll be replacing the
4595 pseudo with after reload, put a USE in front of INSN
4596 in the final reload pass. */
4598 && num_not_at_initial_offset
4599 && ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
4602 /* We mark the USE with QImode so that we
4603 recognize it as one that can be safely
4604 deleted at the end of reload. */
4605 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, ad
),
4608 /* This doesn't really count as replacing the address
4609 as a whole, since it is still a memory access. */
4617 /* The only remaining case where we can avoid a reload is if this is a
4618 hard register that is valid as a base register and which is not the
4619 subject of a CLOBBER in this insn. */
4621 else if (regno
< FIRST_PSEUDO_REGISTER
4622 && REGNO_MODE_OK_FOR_BASE_P (regno
, mode
)
4623 && ! regno_clobbered_p (regno
, this_insn
, mode
, 0))
4626 /* If we do not have one of the cases above, we must do the reload. */
4627 push_reload (ad
, NULL_RTX
, loc
, (rtx
*) 0, MODE_BASE_REG_CLASS (mode
),
4628 GET_MODE (ad
), VOIDmode
, 0, 0, opnum
, type
);
4632 if (strict_memory_address_p (mode
, ad
))
4634 /* The address appears valid, so reloads are not needed.
4635 But the address may contain an eliminable register.
4636 This can happen because a machine with indirect addressing
4637 may consider a pseudo register by itself a valid address even when
4638 it has failed to get a hard reg.
4639 So do a tree-walk to find and eliminate all such regs. */
4641 /* But first quickly dispose of a common case. */
4642 if (GET_CODE (ad
) == PLUS
4643 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
4644 && GET_CODE (XEXP (ad
, 0)) == REG
4645 && reg_equiv_constant
[REGNO (XEXP (ad
, 0))] == 0)
4648 subst_reg_equivs_changed
= 0;
4649 *loc
= subst_reg_equivs (ad
, insn
);
4651 if (! subst_reg_equivs_changed
)
4654 /* Check result for validity after substitution. */
4655 if (strict_memory_address_p (mode
, ad
))
4659 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4664 LEGITIMIZE_RELOAD_ADDRESS (ad
, GET_MODE (*memrefloc
), opnum
, type
,
4669 *memrefloc
= copy_rtx (*memrefloc
);
4670 XEXP (*memrefloc
, 0) = ad
;
4671 move_replacements (&ad
, &XEXP (*memrefloc
, 0));
4677 /* The address is not valid. We have to figure out why. First see if
4678 we have an outer AND and remove it if so. Then analyze what's inside. */
4680 if (GET_CODE (ad
) == AND
)
4683 loc
= &XEXP (ad
, 0);
4687 /* One possibility for why the address is invalid is that it is itself
4688 a MEM. This can happen when the frame pointer is being eliminated, a
4689 pseudo is not allocated to a hard register, and the offset between the
4690 frame and stack pointers is not its initial value. In that case the
4691 pseudo will have been replaced by a MEM referring to the
4693 if (GET_CODE (ad
) == MEM
)
4695 /* First ensure that the address in this MEM is valid. Then, unless
4696 indirect addresses are valid, reload the MEM into a register. */
4698 find_reloads_address (GET_MODE (ad
), &tem
, XEXP (ad
, 0), &XEXP (ad
, 0),
4699 opnum
, ADDR_TYPE (type
),
4700 ind_levels
== 0 ? 0 : ind_levels
- 1, insn
);
4702 /* If tem was changed, then we must create a new memory reference to
4703 hold it and store it back into memrefloc. */
4704 if (tem
!= ad
&& memrefloc
)
4706 *memrefloc
= copy_rtx (*memrefloc
);
4707 copy_replacements (tem
, XEXP (*memrefloc
, 0));
4708 loc
= &XEXP (*memrefloc
, 0);
4710 loc
= &XEXP (*loc
, 0);
4713 /* Check similar cases as for indirect addresses as above except
4714 that we can allow pseudos and a MEM since they should have been
4715 taken care of above. */
4718 || (GET_CODE (XEXP (tem
, 0)) == SYMBOL_REF
&& ! indirect_symref_ok
)
4719 || GET_CODE (XEXP (tem
, 0)) == MEM
4720 || ! (GET_CODE (XEXP (tem
, 0)) == REG
4721 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4722 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4723 && GET_CODE (XEXP (XEXP (tem
, 0), 1)) == CONST_INT
)))
4725 /* Must use TEM here, not AD, since it is the one that will
4726 have any subexpressions reloaded, if needed. */
4727 push_reload (tem
, NULL_RTX
, loc
, (rtx
*) 0,
4728 MODE_BASE_REG_CLASS (mode
), GET_MODE (tem
),
4731 return ! removed_and
;
4737 /* If we have address of a stack slot but it's not valid because the
4738 displacement is too large, compute the sum in a register.
4739 Handle all base registers here, not just fp/ap/sp, because on some
4740 targets (namely SH) we can also get too large displacements from
4741 big-endian corrections. */
4742 else if (GET_CODE (ad
) == PLUS
4743 && GET_CODE (XEXP (ad
, 0)) == REG
4744 && REGNO (XEXP (ad
, 0)) < FIRST_PSEUDO_REGISTER
4745 && REG_MODE_OK_FOR_BASE_P (XEXP (ad
, 0), mode
)
4746 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4748 /* Unshare the MEM rtx so we can safely alter it. */
4751 *memrefloc
= copy_rtx (*memrefloc
);
4752 loc
= &XEXP (*memrefloc
, 0);
4754 loc
= &XEXP (*loc
, 0);
4757 if (double_reg_address_ok
)
4759 /* Unshare the sum as well. */
4760 *loc
= ad
= copy_rtx (ad
);
4762 /* Reload the displacement into an index reg.
4763 We assume the frame pointer or arg pointer is a base reg. */
4764 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
4765 INDEX_REG_CLASS
, GET_MODE (ad
), opnum
,
4771 /* If the sum of two regs is not necessarily valid,
4772 reload the sum into a base reg.
4773 That will at least work. */
4774 find_reloads_address_part (ad
, loc
, MODE_BASE_REG_CLASS (mode
),
4775 Pmode
, opnum
, type
, ind_levels
);
4777 return ! removed_and
;
4780 /* If we have an indexed stack slot, there are three possible reasons why
4781 it might be invalid: The index might need to be reloaded, the address
4782 might have been made by frame pointer elimination and hence have a
4783 constant out of range, or both reasons might apply.
4785 We can easily check for an index needing reload, but even if that is the
4786 case, we might also have an invalid constant. To avoid making the
4787 conservative assumption and requiring two reloads, we see if this address
4788 is valid when not interpreted strictly. If it is, the only problem is
4789 that the index needs a reload and find_reloads_address_1 will take care
4792 If we decide to do something here, it must be that
4793 `double_reg_address_ok' is true and that this address rtl was made by
4794 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4795 rework the sum so that the reload register will be added to the index.
4796 This is safe because we know the address isn't shared.
4798 We check for fp/ap/sp as both the first and second operand of the
4801 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4802 && GET_CODE (XEXP (ad
, 0)) == PLUS
4803 && (XEXP (XEXP (ad
, 0), 0) == frame_pointer_rtx
4804 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4805 || XEXP (XEXP (ad
, 0), 0) == hard_frame_pointer_rtx
4807 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4808 || XEXP (XEXP (ad
, 0), 0) == arg_pointer_rtx
4810 || XEXP (XEXP (ad
, 0), 0) == stack_pointer_rtx
)
4811 && ! memory_address_p (mode
, ad
))
4813 *loc
= ad
= gen_rtx_PLUS (GET_MODE (ad
),
4814 plus_constant (XEXP (XEXP (ad
, 0), 0),
4815 INTVAL (XEXP (ad
, 1))),
4816 XEXP (XEXP (ad
, 0), 1));
4817 find_reloads_address_part (XEXP (ad
, 0), &XEXP (ad
, 0),
4818 MODE_BASE_REG_CLASS (mode
),
4819 GET_MODE (ad
), opnum
, type
, ind_levels
);
4820 find_reloads_address_1 (mode
, XEXP (ad
, 1), 1, &XEXP (ad
, 1), opnum
,
4826 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4827 && GET_CODE (XEXP (ad
, 0)) == PLUS
4828 && (XEXP (XEXP (ad
, 0), 1) == frame_pointer_rtx
4829 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4830 || XEXP (XEXP (ad
, 0), 1) == hard_frame_pointer_rtx
4832 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4833 || XEXP (XEXP (ad
, 0), 1) == arg_pointer_rtx
4835 || XEXP (XEXP (ad
, 0), 1) == stack_pointer_rtx
)
4836 && ! memory_address_p (mode
, ad
))
4838 *loc
= ad
= gen_rtx_PLUS (GET_MODE (ad
),
4839 XEXP (XEXP (ad
, 0), 0),
4840 plus_constant (XEXP (XEXP (ad
, 0), 1),
4841 INTVAL (XEXP (ad
, 1))));
4842 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
4843 MODE_BASE_REG_CLASS (mode
),
4844 GET_MODE (ad
), opnum
, type
, ind_levels
);
4845 find_reloads_address_1 (mode
, XEXP (ad
, 0), 1, &XEXP (ad
, 0), opnum
,
4851 /* See if address becomes valid when an eliminable register
4852 in a sum is replaced. */
4855 if (GET_CODE (ad
) == PLUS
)
4856 tem
= subst_indexed_address (ad
);
4857 if (tem
!= ad
&& strict_memory_address_p (mode
, tem
))
4859 /* Ok, we win that way. Replace any additional eliminable
4862 subst_reg_equivs_changed
= 0;
4863 tem
= subst_reg_equivs (tem
, insn
);
4865 /* Make sure that didn't make the address invalid again. */
4867 if (! subst_reg_equivs_changed
|| strict_memory_address_p (mode
, tem
))
4874 /* If constants aren't valid addresses, reload the constant address
4876 if (CONSTANT_P (ad
) && ! strict_memory_address_p (mode
, ad
))
4878 /* If AD is an address in the constant pool, the MEM rtx may be shared.
4879 Unshare it so we can safely alter it. */
4880 if (memrefloc
&& GET_CODE (ad
) == SYMBOL_REF
4881 && CONSTANT_POOL_ADDRESS_P (ad
))
4883 *memrefloc
= copy_rtx (*memrefloc
);
4884 loc
= &XEXP (*memrefloc
, 0);
4886 loc
= &XEXP (*loc
, 0);
4889 find_reloads_address_part (ad
, loc
, MODE_BASE_REG_CLASS (mode
),
4890 Pmode
, opnum
, type
, ind_levels
);
4891 return ! removed_and
;
4894 return find_reloads_address_1 (mode
, ad
, 0, loc
, opnum
, type
, ind_levels
,
4898 /* Find all pseudo regs appearing in AD
4899 that are eliminable in favor of equivalent values
4900 and do not have hard regs; replace them by their equivalents.
4901 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
4902 front of it for pseudos that we have to replace with stack slots. */
4905 subst_reg_equivs (ad
, insn
)
4909 RTX_CODE code
= GET_CODE (ad
);
4928 int regno
= REGNO (ad
);
4930 if (reg_equiv_constant
[regno
] != 0)
4932 subst_reg_equivs_changed
= 1;
4933 return reg_equiv_constant
[regno
];
4935 if (reg_equiv_memory_loc
[regno
] && num_not_at_initial_offset
)
4937 rtx mem
= make_memloc (ad
, regno
);
4938 if (! rtx_equal_p (mem
, reg_equiv_mem
[regno
]))
4940 subst_reg_equivs_changed
= 1;
4941 /* We mark the USE with QImode so that we recognize it
4942 as one that can be safely deleted at the end of
4944 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, ad
), insn
),
4953 /* Quickly dispose of a common case. */
4954 if (XEXP (ad
, 0) == frame_pointer_rtx
4955 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4963 fmt
= GET_RTX_FORMAT (code
);
4964 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4966 XEXP (ad
, i
) = subst_reg_equivs (XEXP (ad
, i
), insn
);
4970 /* Compute the sum of X and Y, making canonicalizations assumed in an
4971 address, namely: sum constant integers, surround the sum of two
4972 constants with a CONST, put the constant as the second operand, and
4973 group the constant on the outermost sum.
4975 This routine assumes both inputs are already in canonical form. */
4982 enum machine_mode mode
= GET_MODE (x
);
4984 if (mode
== VOIDmode
)
4985 mode
= GET_MODE (y
);
4987 if (mode
== VOIDmode
)
4990 if (GET_CODE (x
) == CONST_INT
)
4991 return plus_constant (y
, INTVAL (x
));
4992 else if (GET_CODE (y
) == CONST_INT
)
4993 return plus_constant (x
, INTVAL (y
));
4994 else if (CONSTANT_P (x
))
4995 tem
= x
, x
= y
, y
= tem
;
4997 if (GET_CODE (x
) == PLUS
&& CONSTANT_P (XEXP (x
, 1)))
4998 return form_sum (XEXP (x
, 0), form_sum (XEXP (x
, 1), y
));
5000 /* Note that if the operands of Y are specified in the opposite
5001 order in the recursive calls below, infinite recursion will occur. */
5002 if (GET_CODE (y
) == PLUS
&& CONSTANT_P (XEXP (y
, 1)))
5003 return form_sum (form_sum (x
, XEXP (y
, 0)), XEXP (y
, 1));
5005 /* If both constant, encapsulate sum. Otherwise, just form sum. A
5006 constant will have been placed second. */
5007 if (CONSTANT_P (x
) && CONSTANT_P (y
))
5009 if (GET_CODE (x
) == CONST
)
5011 if (GET_CODE (y
) == CONST
)
5014 return gen_rtx_CONST (VOIDmode
, gen_rtx_PLUS (mode
, x
, y
));
5017 return gen_rtx_PLUS (mode
, x
, y
);
5020 /* If ADDR is a sum containing a pseudo register that should be
5021 replaced with a constant (from reg_equiv_constant),
5022 return the result of doing so, and also apply the associative
5023 law so that the result is more likely to be a valid address.
5024 (But it is not guaranteed to be one.)
5026 Note that at most one register is replaced, even if more are
5027 replaceable. Also, we try to put the result into a canonical form
5028 so it is more likely to be a valid address.
5030 In all other cases, return ADDR. */
5033 subst_indexed_address (addr
)
5036 rtx op0
= 0, op1
= 0, op2
= 0;
5040 if (GET_CODE (addr
) == PLUS
)
5042 /* Try to find a register to replace. */
5043 op0
= XEXP (addr
, 0), op1
= XEXP (addr
, 1), op2
= 0;
5044 if (GET_CODE (op0
) == REG
5045 && (regno
= REGNO (op0
)) >= FIRST_PSEUDO_REGISTER
5046 && reg_renumber
[regno
] < 0
5047 && reg_equiv_constant
[regno
] != 0)
5048 op0
= reg_equiv_constant
[regno
];
5049 else if (GET_CODE (op1
) == REG
5050 && (regno
= REGNO (op1
)) >= FIRST_PSEUDO_REGISTER
5051 && reg_renumber
[regno
] < 0
5052 && reg_equiv_constant
[regno
] != 0)
5053 op1
= reg_equiv_constant
[regno
];
5054 else if (GET_CODE (op0
) == PLUS
5055 && (tem
= subst_indexed_address (op0
)) != op0
)
5057 else if (GET_CODE (op1
) == PLUS
5058 && (tem
= subst_indexed_address (op1
)) != op1
)
5063 /* Pick out up to three things to add. */
5064 if (GET_CODE (op1
) == PLUS
)
5065 op2
= XEXP (op1
, 1), op1
= XEXP (op1
, 0);
5066 else if (GET_CODE (op0
) == PLUS
)
5067 op2
= op1
, op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
5069 /* Compute the sum. */
5071 op1
= form_sum (op1
, op2
);
5073 op0
= form_sum (op0
, op1
);
5080 /* Update the REG_INC notes for an insn. It updates all REG_INC
5081 notes for the instruction which refer to REGNO the to refer
5082 to the reload number.
5084 INSN is the insn for which any REG_INC notes need updating.
5086 REGNO is the register number which has been reloaded.
5088 RELOADNUM is the reload number. */
5091 update_auto_inc_notes (insn
, regno
, reloadnum
)
5092 rtx insn ATTRIBUTE_UNUSED
;
5093 int regno ATTRIBUTE_UNUSED
;
5094 int reloadnum ATTRIBUTE_UNUSED
;
5099 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5100 if (REG_NOTE_KIND (link
) == REG_INC
5101 && REGNO (XEXP (link
, 0)) == regno
)
5102 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5106 /* Record the pseudo registers we must reload into hard registers in a
5107 subexpression of a would-be memory address, X referring to a value
5108 in mode MODE. (This function is not called if the address we find
5111 CONTEXT = 1 means we are considering regs as index regs,
5112 = 0 means we are considering them as base regs.
5114 OPNUM and TYPE specify the purpose of any reloads made.
5116 IND_LEVELS says how many levels of indirect addressing are
5117 supported at this point in the address.
5119 INSN, if nonzero, is the insn in which we do the reload. It is used
5120 to determine if we may generate output reloads.
5122 We return nonzero if X, as a whole, is reloaded or replaced. */
5124 /* Note that we take shortcuts assuming that no multi-reg machine mode
5125 occurs as part of an address.
5126 Also, this is not fully machine-customizable; it works for machines
5127 such as VAXen and 68000's and 32000's, but other possible machines
5128 could have addressing modes that this does not handle right. */
5131 find_reloads_address_1 (mode
, x
, context
, loc
, opnum
, type
, ind_levels
, insn
)
5132 enum machine_mode mode
;
5137 enum reload_type type
;
5141 RTX_CODE code
= GET_CODE (x
);
5147 rtx orig_op0
= XEXP (x
, 0);
5148 rtx orig_op1
= XEXP (x
, 1);
5149 RTX_CODE code0
= GET_CODE (orig_op0
);
5150 RTX_CODE code1
= GET_CODE (orig_op1
);
5154 if (GET_CODE (op0
) == SUBREG
)
5156 op0
= SUBREG_REG (op0
);
5157 code0
= GET_CODE (op0
);
5158 if (code0
== REG
&& REGNO (op0
) < FIRST_PSEUDO_REGISTER
)
5159 op0
= gen_rtx_REG (word_mode
,
5161 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0
)),
5162 GET_MODE (SUBREG_REG (orig_op0
)),
5163 SUBREG_BYTE (orig_op0
),
5164 GET_MODE (orig_op0
))));
5167 if (GET_CODE (op1
) == SUBREG
)
5169 op1
= SUBREG_REG (op1
);
5170 code1
= GET_CODE (op1
);
5171 if (code1
== REG
&& REGNO (op1
) < FIRST_PSEUDO_REGISTER
)
5172 /* ??? Why is this given op1's mode and above for
5173 ??? op0 SUBREGs we use word_mode? */
5174 op1
= gen_rtx_REG (GET_MODE (op1
),
5176 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1
)),
5177 GET_MODE (SUBREG_REG (orig_op1
)),
5178 SUBREG_BYTE (orig_op1
),
5179 GET_MODE (orig_op1
))));
5182 if (code0
== MULT
|| code0
== SIGN_EXTEND
|| code0
== TRUNCATE
5183 || code0
== ZERO_EXTEND
|| code1
== MEM
)
5185 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5186 type
, ind_levels
, insn
);
5187 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5188 type
, ind_levels
, insn
);
5191 else if (code1
== MULT
|| code1
== SIGN_EXTEND
|| code1
== TRUNCATE
5192 || code1
== ZERO_EXTEND
|| code0
== MEM
)
5194 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5195 type
, ind_levels
, insn
);
5196 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5197 type
, ind_levels
, insn
);
5200 else if (code0
== CONST_INT
|| code0
== CONST
5201 || code0
== SYMBOL_REF
|| code0
== LABEL_REF
)
5202 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5203 type
, ind_levels
, insn
);
5205 else if (code1
== CONST_INT
|| code1
== CONST
5206 || code1
== SYMBOL_REF
|| code1
== LABEL_REF
)
5207 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5208 type
, ind_levels
, insn
);
5210 else if (code0
== REG
&& code1
== REG
)
5212 if (REG_OK_FOR_INDEX_P (op0
)
5213 && REG_MODE_OK_FOR_BASE_P (op1
, mode
))
5215 else if (REG_OK_FOR_INDEX_P (op1
)
5216 && REG_MODE_OK_FOR_BASE_P (op0
, mode
))
5218 else if (REG_MODE_OK_FOR_BASE_P (op1
, mode
))
5219 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5220 type
, ind_levels
, insn
);
5221 else if (REG_MODE_OK_FOR_BASE_P (op0
, mode
))
5222 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5223 type
, ind_levels
, insn
);
5224 else if (REG_OK_FOR_INDEX_P (op1
))
5225 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5226 type
, ind_levels
, insn
);
5227 else if (REG_OK_FOR_INDEX_P (op0
))
5228 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5229 type
, ind_levels
, insn
);
5232 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5233 type
, ind_levels
, insn
);
5234 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5235 type
, ind_levels
, insn
);
5239 else if (code0
== REG
)
5241 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5242 type
, ind_levels
, insn
);
5243 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5244 type
, ind_levels
, insn
);
5247 else if (code1
== REG
)
5249 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5250 type
, ind_levels
, insn
);
5251 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5252 type
, ind_levels
, insn
);
5261 rtx op0
= XEXP (x
, 0);
5262 rtx op1
= XEXP (x
, 1);
5264 if (GET_CODE (op1
) != PLUS
&& GET_CODE (op1
) != MINUS
)
5267 /* Currently, we only support {PRE,POST}_MODIFY constructs
5268 where a base register is {inc,dec}remented by the contents
5269 of another register or by a constant value. Thus, these
5270 operands must match. */
5271 if (op0
!= XEXP (op1
, 0))
5274 /* Require index register (or constant). Let's just handle the
5275 register case in the meantime... If the target allows
5276 auto-modify by a constant then we could try replacing a pseudo
5277 register with its equivalent constant where applicable. */
5278 if (REG_P (XEXP (op1
, 1)))
5279 if (!REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1
, 1))))
5280 find_reloads_address_1 (mode
, XEXP (op1
, 1), 1, &XEXP (op1
, 1),
5281 opnum
, type
, ind_levels
, insn
);
5283 if (REG_P (XEXP (op1
, 0)))
5285 int regno
= REGNO (XEXP (op1
, 0));
5288 /* A register that is incremented cannot be constant! */
5289 if (regno
>= FIRST_PSEUDO_REGISTER
5290 && reg_equiv_constant
[regno
] != 0)
5293 /* Handle a register that is equivalent to a memory location
5294 which cannot be addressed directly. */
5295 if (reg_equiv_memory_loc
[regno
] != 0
5296 && (reg_equiv_address
[regno
] != 0
5297 || num_not_at_initial_offset
))
5299 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5301 if (reg_equiv_address
[regno
]
5302 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5304 /* First reload the memory location's address.
5305 We can't use ADDR_TYPE (type) here, because we need to
5306 write back the value after reading it, hence we actually
5307 need two registers. */
5308 find_reloads_address (GET_MODE (tem
), 0, XEXP (tem
, 0),
5309 &XEXP (tem
, 0), opnum
,
5313 /* Then reload the memory location into a base
5315 reloadnum
= push_reload (tem
, tem
, &XEXP (x
, 0),
5317 MODE_BASE_REG_CLASS (mode
),
5318 GET_MODE (x
), GET_MODE (x
), 0,
5319 0, opnum
, RELOAD_OTHER
);
5321 update_auto_inc_notes (this_insn
, regno
, reloadnum
);
5326 if (reg_renumber
[regno
] >= 0)
5327 regno
= reg_renumber
[regno
];
5329 /* We require a base register here... */
5330 if (!REGNO_MODE_OK_FOR_BASE_P (regno
, GET_MODE (x
)))
5332 reloadnum
= push_reload (XEXP (op1
, 0), XEXP (x
, 0),
5333 &XEXP (op1
, 0), &XEXP (x
, 0),
5334 MODE_BASE_REG_CLASS (mode
),
5335 GET_MODE (x
), GET_MODE (x
), 0, 0,
5336 opnum
, RELOAD_OTHER
);
5338 update_auto_inc_notes (this_insn
, regno
, reloadnum
);
5351 if (GET_CODE (XEXP (x
, 0)) == REG
)
5353 int regno
= REGNO (XEXP (x
, 0));
5357 /* A register that is incremented cannot be constant! */
5358 if (regno
>= FIRST_PSEUDO_REGISTER
5359 && reg_equiv_constant
[regno
] != 0)
5362 /* Handle a register that is equivalent to a memory location
5363 which cannot be addressed directly. */
5364 if (reg_equiv_memory_loc
[regno
] != 0
5365 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
5367 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5368 if (reg_equiv_address
[regno
]
5369 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5371 /* First reload the memory location's address.
5372 We can't use ADDR_TYPE (type) here, because we need to
5373 write back the value after reading it, hence we actually
5374 need two registers. */
5375 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5376 &XEXP (tem
, 0), opnum
, type
,
5378 /* Put this inside a new increment-expression. */
5379 x
= gen_rtx_fmt_e (GET_CODE (x
), GET_MODE (x
), tem
);
5380 /* Proceed to reload that, as if it contained a register. */
5384 /* If we have a hard register that is ok as an index,
5385 don't make a reload. If an autoincrement of a nice register
5386 isn't "valid", it must be that no autoincrement is "valid".
5387 If that is true and something made an autoincrement anyway,
5388 this must be a special context where one is allowed.
5389 (For example, a "push" instruction.)
5390 We can't improve this address, so leave it alone. */
5392 /* Otherwise, reload the autoincrement into a suitable hard reg
5393 and record how much to increment by. */
5395 if (reg_renumber
[regno
] >= 0)
5396 regno
= reg_renumber
[regno
];
5397 if ((regno
>= FIRST_PSEUDO_REGISTER
5398 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
5399 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
))))
5403 /* If we can output the register afterwards, do so, this
5404 saves the extra update.
5405 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5406 CALL_INSN - and it does not set CC0.
5407 But don't do this if we cannot directly address the
5408 memory location, since this will make it harder to
5409 reuse address reloads, and increases register pressure.
5410 Also don't do this if we can probably update x directly. */
5411 rtx equiv
= (GET_CODE (XEXP (x
, 0)) == MEM
5413 : reg_equiv_mem
[regno
]);
5414 int icode
= (int) add_optab
->handlers
[(int) Pmode
].insn_code
;
5415 if (insn
&& GET_CODE (insn
) == INSN
&& equiv
5416 && memory_operand (equiv
, GET_MODE (equiv
))
5418 && ! sets_cc0_p (PATTERN (insn
))
5420 && ! (icode
!= CODE_FOR_nothing
5421 && ((*insn_data
[icode
].operand
[0].predicate
)
5423 && ((*insn_data
[icode
].operand
[1].predicate
)
5426 /* We use the original pseudo for loc, so that
5427 emit_reload_insns() knows which pseudo this
5428 reload refers to and updates the pseudo rtx, not
5429 its equivalent memory location, as well as the
5430 corresponding entry in reg_last_reload_reg. */
5431 loc
= &XEXP (x_orig
, 0);
5434 = push_reload (x
, x
, loc
, loc
,
5435 (context
? INDEX_REG_CLASS
:
5436 MODE_BASE_REG_CLASS (mode
)),
5437 GET_MODE (x
), GET_MODE (x
), 0, 0,
5438 opnum
, RELOAD_OTHER
);
5443 = push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5444 (context
? INDEX_REG_CLASS
:
5445 MODE_BASE_REG_CLASS (mode
)),
5446 GET_MODE (x
), GET_MODE (x
), 0, 0,
5449 = find_inc_amount (PATTERN (this_insn
), XEXP (x_orig
, 0));
5454 update_auto_inc_notes (this_insn
, REGNO (XEXP (x_orig
, 0)),
5460 else if (GET_CODE (XEXP (x
, 0)) == MEM
)
5462 /* This is probably the result of a substitution, by eliminate_regs,
5463 of an equivalent address for a pseudo that was not allocated to a
5464 hard register. Verify that the specified address is valid and
5465 reload it into a register. */
5466 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
5467 rtx tem ATTRIBUTE_UNUSED
= XEXP (x
, 0);
5471 /* Since we know we are going to reload this item, don't decrement
5472 for the indirection level.
5474 Note that this is actually conservative: it would be slightly
5475 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5477 /* We can't use ADDR_TYPE (type) here, because we need to
5478 write back the value after reading it, hence we actually
5479 need two registers. */
5480 find_reloads_address (GET_MODE (x
), &XEXP (x
, 0),
5481 XEXP (XEXP (x
, 0), 0), &XEXP (XEXP (x
, 0), 0),
5482 opnum
, type
, ind_levels
, insn
);
5484 reloadnum
= push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5485 (context
? INDEX_REG_CLASS
:
5486 MODE_BASE_REG_CLASS (mode
)),
5487 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5489 = find_inc_amount (PATTERN (this_insn
), XEXP (x
, 0));
5491 link
= FIND_REG_INC_NOTE (this_insn
, tem
);
5493 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5500 /* This is probably the result of a substitution, by eliminate_regs, of
5501 an equivalent address for a pseudo that was not allocated to a hard
5502 register. Verify that the specified address is valid and reload it
5505 Since we know we are going to reload this item, don't decrement for
5506 the indirection level.
5508 Note that this is actually conservative: it would be slightly more
5509 efficient to use the value of SPILL_INDIRECT_LEVELS from
5512 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
5513 opnum
, ADDR_TYPE (type
), ind_levels
, insn
);
5514 push_reload (*loc
, NULL_RTX
, loc
, (rtx
*) 0,
5515 (context
? INDEX_REG_CLASS
: MODE_BASE_REG_CLASS (mode
)),
5516 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5521 int regno
= REGNO (x
);
5523 if (reg_equiv_constant
[regno
] != 0)
5525 find_reloads_address_part (reg_equiv_constant
[regno
], loc
,
5526 (context
? INDEX_REG_CLASS
:
5527 MODE_BASE_REG_CLASS (mode
)),
5528 GET_MODE (x
), opnum
, type
, ind_levels
);
5532 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5533 that feeds this insn. */
5534 if (reg_equiv_mem
[regno
] != 0)
5536 push_reload (reg_equiv_mem
[regno
], NULL_RTX
, loc
, (rtx
*) 0,
5537 (context
? INDEX_REG_CLASS
:
5538 MODE_BASE_REG_CLASS (mode
)),
5539 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5544 if (reg_equiv_memory_loc
[regno
]
5545 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
5547 rtx tem
= make_memloc (x
, regno
);
5548 if (reg_equiv_address
[regno
] != 0
5549 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5552 find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0),
5553 &XEXP (x
, 0), opnum
, ADDR_TYPE (type
),
5558 if (reg_renumber
[regno
] >= 0)
5559 regno
= reg_renumber
[regno
];
5561 if ((regno
>= FIRST_PSEUDO_REGISTER
5562 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
5563 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
))))
5565 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5566 (context
? INDEX_REG_CLASS
: MODE_BASE_REG_CLASS (mode
)),
5567 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5571 /* If a register appearing in an address is the subject of a CLOBBER
5572 in this insn, reload it into some other register to be safe.
5573 The CLOBBER is supposed to make the register unavailable
5574 from before this insn to after it. */
5575 if (regno_clobbered_p (regno
, this_insn
, GET_MODE (x
), 0))
5577 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5578 (context
? INDEX_REG_CLASS
: MODE_BASE_REG_CLASS (mode
)),
5579 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5586 if (GET_CODE (SUBREG_REG (x
)) == REG
)
5588 /* If this is a SUBREG of a hard register and the resulting register
5589 is of the wrong class, reload the whole SUBREG. This avoids
5590 needless copies if SUBREG_REG is multi-word. */
5591 if (REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
5593 int regno
= subreg_regno (x
);
5595 if (! (context
? REGNO_OK_FOR_INDEX_P (regno
)
5596 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
)))
5598 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5599 (context
? INDEX_REG_CLASS
:
5600 MODE_BASE_REG_CLASS (mode
)),
5601 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5605 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5606 is larger than the class size, then reload the whole SUBREG. */
5609 enum reg_class
class = (context
? INDEX_REG_CLASS
5610 : MODE_BASE_REG_CLASS (mode
));
5611 if (CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x
)))
5612 > reg_class_size
[class])
5614 x
= find_reloads_subreg_address (x
, 0, opnum
, type
,
5616 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0, class,
5617 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5629 const char *fmt
= GET_RTX_FORMAT (code
);
5632 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5635 find_reloads_address_1 (mode
, XEXP (x
, i
), context
, &XEXP (x
, i
),
5636 opnum
, type
, ind_levels
, insn
);
5643 /* X, which is found at *LOC, is a part of an address that needs to be
5644 reloaded into a register of class CLASS. If X is a constant, or if
5645 X is a PLUS that contains a constant, check that the constant is a
5646 legitimate operand and that we are supposed to be able to load
5647 it into the register.
5649 If not, force the constant into memory and reload the MEM instead.
5651 MODE is the mode to use, in case X is an integer constant.
5653 OPNUM and TYPE describe the purpose of any reloads made.
5655 IND_LEVELS says how many levels of indirect addressing this machine
5659 find_reloads_address_part (x
, loc
, class, mode
, opnum
, type
, ind_levels
)
5662 enum reg_class
class;
5663 enum machine_mode mode
;
5665 enum reload_type type
;
5669 && (! LEGITIMATE_CONSTANT_P (x
)
5670 || PREFERRED_RELOAD_CLASS (x
, class) == NO_REGS
))
5674 tem
= x
= force_const_mem (mode
, x
);
5675 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5676 opnum
, type
, ind_levels
, 0);
5679 else if (GET_CODE (x
) == PLUS
5680 && CONSTANT_P (XEXP (x
, 1))
5681 && (! LEGITIMATE_CONSTANT_P (XEXP (x
, 1))
5682 || PREFERRED_RELOAD_CLASS (XEXP (x
, 1), class) == NO_REGS
))
5686 tem
= force_const_mem (GET_MODE (x
), XEXP (x
, 1));
5687 x
= gen_rtx_PLUS (GET_MODE (x
), XEXP (x
, 0), tem
);
5688 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5689 opnum
, type
, ind_levels
, 0);
5692 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0, class,
5693 mode
, VOIDmode
, 0, 0, opnum
, type
);
5696 /* X, a subreg of a pseudo, is a part of an address that needs to be
5699 If the pseudo is equivalent to a memory location that cannot be directly
5700 addressed, make the necessary address reloads.
5702 If address reloads have been necessary, or if the address is changed
5703 by register elimination, return the rtx of the memory location;
5704 otherwise, return X.
5706 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
5709 OPNUM and TYPE identify the purpose of the reload.
5711 IND_LEVELS says how many levels of indirect addressing are
5712 supported at this point in the address.
5714 INSN, if nonzero, is the insn in which we do the reload. It is used
5715 to determine where to put USEs for pseudos that we have to replace with
5719 find_reloads_subreg_address (x
, force_replace
, opnum
, type
,
5724 enum reload_type type
;
5728 int regno
= REGNO (SUBREG_REG (x
));
5730 if (reg_equiv_memory_loc
[regno
])
5732 /* If the address is not directly addressable, or if the address is not
5733 offsettable, then it must be replaced. */
5735 && (reg_equiv_address
[regno
]
5736 || ! offsettable_memref_p (reg_equiv_mem
[regno
])))
5739 if (force_replace
|| num_not_at_initial_offset
)
5741 rtx tem
= make_memloc (SUBREG_REG (x
), regno
);
5743 /* If the address changes because of register elimination, then
5744 it must be replaced. */
5746 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5748 int offset
= SUBREG_BYTE (x
);
5749 unsigned outer_size
= GET_MODE_SIZE (GET_MODE (x
));
5750 unsigned inner_size
= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)));
5752 XEXP (tem
, 0) = plus_constant (XEXP (tem
, 0), offset
);
5753 PUT_MODE (tem
, GET_MODE (x
));
5755 /* If this was a paradoxical subreg that we replaced, the
5756 resulting memory must be sufficiently aligned to allow
5757 us to widen the mode of the memory. */
5758 if (outer_size
> inner_size
&& STRICT_ALIGNMENT
)
5762 base
= XEXP (tem
, 0);
5763 if (GET_CODE (base
) == PLUS
)
5765 if (GET_CODE (XEXP (base
, 1)) == CONST_INT
5766 && INTVAL (XEXP (base
, 1)) % outer_size
!= 0)
5768 base
= XEXP (base
, 0);
5770 if (GET_CODE (base
) != REG
5771 || (REGNO_POINTER_ALIGN (REGNO (base
))
5772 < outer_size
* BITS_PER_UNIT
))
5776 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5777 &XEXP (tem
, 0), opnum
, ADDR_TYPE (type
),
5780 /* If this is not a toplevel operand, find_reloads doesn't see
5781 this substitution. We have to emit a USE of the pseudo so
5782 that delete_output_reload can see it. */
5783 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
5784 /* We mark the USE with QImode so that we recognize it
5785 as one that can be safely deleted at the end of
5787 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
,
5797 /* Substitute into the current INSN the registers into which we have reloaded
5798 the things that need reloading. The array `replacements'
5799 contains the locations of all pointers that must be changed
5800 and says what to replace them with.
5802 Return the rtx that X translates into; usually X, but modified. */
5805 subst_reloads (insn
)
5810 for (i
= 0; i
< n_replacements
; i
++)
5812 struct replacement
*r
= &replacements
[i
];
5813 rtx reloadreg
= rld
[r
->what
].reg_rtx
;
5816 #ifdef ENABLE_CHECKING
5817 /* Internal consistency test. Check that we don't modify
5818 anything in the equivalence arrays. Whenever something from
5819 those arrays needs to be reloaded, it must be unshared before
5820 being substituted into; the equivalence must not be modified.
5821 Otherwise, if the equivalence is used after that, it will
5822 have been modified, and the thing substituted (probably a
5823 register) is likely overwritten and not a usable equivalence. */
5826 for (check_regno
= 0; check_regno
< max_regno
; check_regno
++)
5828 #define CHECK_MODF(ARRAY) \
5829 if (ARRAY[check_regno] \
5830 && loc_mentioned_in_p (r->where, \
5831 ARRAY[check_regno])) \
5834 CHECK_MODF (reg_equiv_constant
);
5835 CHECK_MODF (reg_equiv_memory_loc
);
5836 CHECK_MODF (reg_equiv_address
);
5837 CHECK_MODF (reg_equiv_mem
);
5840 #endif /* ENABLE_CHECKING */
5842 /* If we're replacing a LABEL_REF with a register, add a
5843 REG_LABEL note to indicate to flow which label this
5844 register refers to. */
5845 if (GET_CODE (*r
->where
) == LABEL_REF
5846 && GET_CODE (insn
) == JUMP_INSN
)
5847 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_LABEL
,
5848 XEXP (*r
->where
, 0),
5851 /* Encapsulate RELOADREG so its machine mode matches what
5852 used to be there. Note that gen_lowpart_common will
5853 do the wrong thing if RELOADREG is multi-word. RELOADREG
5854 will always be a REG here. */
5855 if (GET_MODE (reloadreg
) != r
->mode
&& r
->mode
!= VOIDmode
)
5856 reloadreg
= gen_rtx_REG (r
->mode
, REGNO (reloadreg
));
5858 /* If we are putting this into a SUBREG and RELOADREG is a
5859 SUBREG, we would be making nested SUBREGs, so we have to fix
5860 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5862 if (r
->subreg_loc
!= 0 && GET_CODE (reloadreg
) == SUBREG
)
5864 if (GET_MODE (*r
->subreg_loc
)
5865 == GET_MODE (SUBREG_REG (reloadreg
)))
5866 *r
->subreg_loc
= SUBREG_REG (reloadreg
);
5870 SUBREG_BYTE (*r
->subreg_loc
) + SUBREG_BYTE (reloadreg
);
5872 /* When working with SUBREGs the rule is that the byte
5873 offset must be a multiple of the SUBREG's mode. */
5874 final_offset
= (final_offset
/
5875 GET_MODE_SIZE (GET_MODE (*r
->subreg_loc
)));
5876 final_offset
= (final_offset
*
5877 GET_MODE_SIZE (GET_MODE (*r
->subreg_loc
)));
5879 *r
->where
= SUBREG_REG (reloadreg
);
5880 SUBREG_BYTE (*r
->subreg_loc
) = final_offset
;
5884 *r
->where
= reloadreg
;
5886 /* If reload got no reg and isn't optional, something's wrong. */
5887 else if (! rld
[r
->what
].optional
)
5892 /* Make a copy of any replacements being done into X and move those
5893 copies to locations in Y, a copy of X. */
5896 copy_replacements (x
, y
)
5899 /* We can't support X being a SUBREG because we might then need to know its
5900 location if something inside it was replaced. */
5901 if (GET_CODE (x
) == SUBREG
)
5904 copy_replacements_1 (&x
, &y
, n_replacements
);
5908 copy_replacements_1 (px
, py
, orig_replacements
)
5911 int orig_replacements
;
5915 struct replacement
*r
;
5919 for (j
= 0; j
< orig_replacements
; j
++)
5921 if (replacements
[j
].subreg_loc
== px
)
5923 r
= &replacements
[n_replacements
++];
5924 r
->where
= replacements
[j
].where
;
5926 r
->what
= replacements
[j
].what
;
5927 r
->mode
= replacements
[j
].mode
;
5929 else if (replacements
[j
].where
== px
)
5931 r
= &replacements
[n_replacements
++];
5934 r
->what
= replacements
[j
].what
;
5935 r
->mode
= replacements
[j
].mode
;
5941 code
= GET_CODE (x
);
5942 fmt
= GET_RTX_FORMAT (code
);
5944 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5947 copy_replacements_1 (&XEXP (x
, i
), &XEXP (y
, i
), orig_replacements
);
5948 else if (fmt
[i
] == 'E')
5949 for (j
= XVECLEN (x
, i
); --j
>= 0; )
5950 copy_replacements_1 (&XVECEXP (x
, i
, j
), &XVECEXP (y
, i
, j
),
5955 /* Change any replacements being done to *X to be done to *Y */
5958 move_replacements (x
, y
)
5964 for (i
= 0; i
< n_replacements
; i
++)
5965 if (replacements
[i
].subreg_loc
== x
)
5966 replacements
[i
].subreg_loc
= y
;
5967 else if (replacements
[i
].where
== x
)
5969 replacements
[i
].where
= y
;
5970 replacements
[i
].subreg_loc
= 0;
5974 /* If LOC was scheduled to be replaced by something, return the replacement.
5975 Otherwise, return *LOC. */
5978 find_replacement (loc
)
5981 struct replacement
*r
;
5983 for (r
= &replacements
[0]; r
< &replacements
[n_replacements
]; r
++)
5985 rtx reloadreg
= rld
[r
->what
].reg_rtx
;
5987 if (reloadreg
&& r
->where
== loc
)
5989 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
5990 reloadreg
= gen_rtx_REG (r
->mode
, REGNO (reloadreg
));
5994 else if (reloadreg
&& r
->subreg_loc
== loc
)
5996 /* RELOADREG must be either a REG or a SUBREG.
5998 ??? Is it actually still ever a SUBREG? If so, why? */
6000 if (GET_CODE (reloadreg
) == REG
)
6001 return gen_rtx_REG (GET_MODE (*loc
),
6002 (REGNO (reloadreg
) +
6003 subreg_regno_offset (REGNO (SUBREG_REG (*loc
)),
6004 GET_MODE (SUBREG_REG (*loc
)),
6007 else if (GET_MODE (reloadreg
) == GET_MODE (*loc
))
6011 int final_offset
= SUBREG_BYTE (reloadreg
) + SUBREG_BYTE (*loc
);
6013 /* When working with SUBREGs the rule is that the byte
6014 offset must be a multiple of the SUBREG's mode. */
6015 final_offset
= (final_offset
/ GET_MODE_SIZE (GET_MODE (*loc
)));
6016 final_offset
= (final_offset
* GET_MODE_SIZE (GET_MODE (*loc
)));
6017 return gen_rtx_SUBREG (GET_MODE (*loc
), SUBREG_REG (reloadreg
),
6023 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
6024 what's inside and make a new rtl if so. */
6025 if (GET_CODE (*loc
) == PLUS
|| GET_CODE (*loc
) == MINUS
6026 || GET_CODE (*loc
) == MULT
)
6028 rtx x
= find_replacement (&XEXP (*loc
, 0));
6029 rtx y
= find_replacement (&XEXP (*loc
, 1));
6031 if (x
!= XEXP (*loc
, 0) || y
!= XEXP (*loc
, 1))
6032 return gen_rtx_fmt_ee (GET_CODE (*loc
), GET_MODE (*loc
), x
, y
);
6038 /* Return nonzero if register in range [REGNO, ENDREGNO)
6039 appears either explicitly or implicitly in X
6040 other than being stored into (except for earlyclobber operands).
6042 References contained within the substructure at LOC do not count.
6043 LOC may be zero, meaning don't ignore anything.
6045 This is similar to refers_to_regno_p in rtlanal.c except that we
6046 look at equivalences for pseudos that didn't get hard registers. */
6049 refers_to_regno_for_reload_p (regno
, endregno
, x
, loc
)
6050 unsigned int regno
, endregno
;
6063 code
= GET_CODE (x
);
6070 /* If this is a pseudo, a hard register must not have been allocated.
6071 X must therefore either be a constant or be in memory. */
6072 if (r
>= FIRST_PSEUDO_REGISTER
)
6074 if (reg_equiv_memory_loc
[r
])
6075 return refers_to_regno_for_reload_p (regno
, endregno
,
6076 reg_equiv_memory_loc
[r
],
6079 if (reg_equiv_constant
[r
])
6085 return (endregno
> r
6086 && regno
< r
+ (r
< FIRST_PSEUDO_REGISTER
6087 ? HARD_REGNO_NREGS (r
, GET_MODE (x
))
6091 /* If this is a SUBREG of a hard reg, we can see exactly which
6092 registers are being modified. Otherwise, handle normally. */
6093 if (GET_CODE (SUBREG_REG (x
)) == REG
6094 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
6096 unsigned int inner_regno
= subreg_regno (x
);
6097 unsigned int inner_endregno
6098 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
6099 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
6101 return endregno
> inner_regno
&& regno
< inner_endregno
;
6107 if (&SET_DEST (x
) != loc
6108 /* Note setting a SUBREG counts as referring to the REG it is in for
6109 a pseudo but not for hard registers since we can
6110 treat each word individually. */
6111 && ((GET_CODE (SET_DEST (x
)) == SUBREG
6112 && loc
!= &SUBREG_REG (SET_DEST (x
))
6113 && GET_CODE (SUBREG_REG (SET_DEST (x
))) == REG
6114 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
6115 && refers_to_regno_for_reload_p (regno
, endregno
,
6116 SUBREG_REG (SET_DEST (x
)),
6118 /* If the output is an earlyclobber operand, this is
6120 || ((GET_CODE (SET_DEST (x
)) != REG
6121 || earlyclobber_operand_p (SET_DEST (x
)))
6122 && refers_to_regno_for_reload_p (regno
, endregno
,
6123 SET_DEST (x
), loc
))))
6126 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
6135 /* X does not match, so try its subexpressions. */
6137 fmt
= GET_RTX_FORMAT (code
);
6138 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6140 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
6148 if (refers_to_regno_for_reload_p (regno
, endregno
,
6152 else if (fmt
[i
] == 'E')
6155 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6156 if (loc
!= &XVECEXP (x
, i
, j
)
6157 && refers_to_regno_for_reload_p (regno
, endregno
,
6158 XVECEXP (x
, i
, j
), loc
))
6165 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6166 we check if any register number in X conflicts with the relevant register
6167 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6168 contains a MEM (we don't bother checking for memory addresses that can't
6169 conflict because we expect this to be a rare case.
6171 This function is similar to reg_overlap_mentioned_p in rtlanal.c except
6172 that we look at equivalences for pseudos that didn't get hard registers. */
6175 reg_overlap_mentioned_for_reload_p (x
, in
)
6178 int regno
, endregno
;
6180 /* Overly conservative. */
6181 if (GET_CODE (x
) == STRICT_LOW_PART
6182 || GET_RTX_CLASS (GET_CODE (x
)) == 'a')
6185 /* If either argument is a constant, then modifying X can not affect IN. */
6186 if (CONSTANT_P (x
) || CONSTANT_P (in
))
6188 else if (GET_CODE (x
) == SUBREG
)
6190 regno
= REGNO (SUBREG_REG (x
));
6191 if (regno
< FIRST_PSEUDO_REGISTER
)
6192 regno
+= subreg_regno_offset (REGNO (SUBREG_REG (x
)),
6193 GET_MODE (SUBREG_REG (x
)),
6197 else if (GET_CODE (x
) == REG
)
6201 /* If this is a pseudo, it must not have been assigned a hard register.
6202 Therefore, it must either be in memory or be a constant. */
6204 if (regno
>= FIRST_PSEUDO_REGISTER
)
6206 if (reg_equiv_memory_loc
[regno
])
6207 return refers_to_mem_for_reload_p (in
);
6208 else if (reg_equiv_constant
[regno
])
6213 else if (GET_CODE (x
) == MEM
)
6214 return refers_to_mem_for_reload_p (in
);
6215 else if (GET_CODE (x
) == SCRATCH
|| GET_CODE (x
) == PC
6216 || GET_CODE (x
) == CC0
)
6217 return reg_mentioned_p (x
, in
);
6218 else if (GET_CODE (x
) == PLUS
)
6219 return (reg_overlap_mentioned_for_reload_p (XEXP (x
, 0), in
)
6220 || reg_overlap_mentioned_for_reload_p (XEXP (x
, 1), in
));
6224 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
6225 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
6227 return refers_to_regno_for_reload_p (regno
, endregno
, in
, (rtx
*) 0);
6230 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6234 refers_to_mem_for_reload_p (x
)
6240 if (GET_CODE (x
) == MEM
)
6243 if (GET_CODE (x
) == REG
)
6244 return (REGNO (x
) >= FIRST_PSEUDO_REGISTER
6245 && reg_equiv_memory_loc
[REGNO (x
)]);
6247 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
6248 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
6250 && (GET_CODE (XEXP (x
, i
)) == MEM
6251 || refers_to_mem_for_reload_p (XEXP (x
, i
))))
6257 /* Check the insns before INSN to see if there is a suitable register
6258 containing the same value as GOAL.
6259 If OTHER is -1, look for a register in class CLASS.
6260 Otherwise, just see if register number OTHER shares GOAL's value.
6262 Return an rtx for the register found, or zero if none is found.
6264 If RELOAD_REG_P is (short *)1,
6265 we reject any hard reg that appears in reload_reg_rtx
6266 because such a hard reg is also needed coming into this insn.
6268 If RELOAD_REG_P is any other nonzero value,
6269 it is a vector indexed by hard reg number
6270 and we reject any hard reg whose element in the vector is nonnegative
6271 as well as any that appears in reload_reg_rtx.
6273 If GOAL is zero, then GOALREG is a register number; we look
6274 for an equivalent for that register.
6276 MODE is the machine mode of the value we want an equivalence for.
6277 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6279 This function is used by jump.c as well as in the reload pass.
6281 If GOAL is the sum of the stack pointer and a constant, we treat it
6282 as if it were a constant except that sp is required to be unchanging. */
6285 find_equiv_reg (goal
, insn
, class, other
, reload_reg_p
, goalreg
, mode
)
6288 enum reg_class
class;
6290 short *reload_reg_p
;
6292 enum machine_mode mode
;
6295 rtx goaltry
, valtry
, value
, where
;
6301 int goal_mem_addr_varies
= 0;
6302 int need_stable_sp
= 0;
6308 else if (GET_CODE (goal
) == REG
)
6309 regno
= REGNO (goal
);
6310 else if (GET_CODE (goal
) == MEM
)
6312 enum rtx_code code
= GET_CODE (XEXP (goal
, 0));
6313 if (MEM_VOLATILE_P (goal
))
6315 if (flag_float_store
&& GET_MODE_CLASS (GET_MODE (goal
)) == MODE_FLOAT
)
6317 /* An address with side effects must be reexecuted. */
6332 else if (CONSTANT_P (goal
))
6334 else if (GET_CODE (goal
) == PLUS
6335 && XEXP (goal
, 0) == stack_pointer_rtx
6336 && CONSTANT_P (XEXP (goal
, 1)))
6337 goal_const
= need_stable_sp
= 1;
6338 else if (GET_CODE (goal
) == PLUS
6339 && XEXP (goal
, 0) == frame_pointer_rtx
6340 && CONSTANT_P (XEXP (goal
, 1)))
6345 /* Scan insns back from INSN, looking for one that copies
6346 a value into or out of GOAL.
6347 Stop and give up if we reach a label. */
6352 if (p
== 0 || GET_CODE (p
) == CODE_LABEL
)
6355 if (GET_CODE (p
) == INSN
6356 /* If we don't want spill regs ... */
6357 && (! (reload_reg_p
!= 0
6358 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
6359 /* ... then ignore insns introduced by reload; they aren't
6360 useful and can cause results in reload_as_needed to be
6361 different from what they were when calculating the need for
6362 spills. If we notice an input-reload insn here, we will
6363 reject it below, but it might hide a usable equivalent.
6364 That makes bad code. It may even abort: perhaps no reg was
6365 spilled for this insn because it was assumed we would find
6367 || INSN_UID (p
) < reload_first_uid
))
6370 pat
= single_set (p
);
6372 /* First check for something that sets some reg equal to GOAL. */
6375 && true_regnum (SET_SRC (pat
)) == regno
6376 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6379 && true_regnum (SET_DEST (pat
)) == regno
6380 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0)
6382 (goal_const
&& rtx_equal_p (SET_SRC (pat
), goal
)
6383 /* When looking for stack pointer + const,
6384 make sure we don't use a stack adjust. */
6385 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat
), goal
)
6386 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6388 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0
6389 && rtx_renumbered_equal_p (goal
, SET_SRC (pat
)))
6391 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0
6392 && rtx_renumbered_equal_p (goal
, SET_DEST (pat
)))
6393 /* If we are looking for a constant,
6394 and something equivalent to that constant was copied
6395 into a reg, we can use that reg. */
6396 || (goal_const
&& REG_NOTES (p
) != 0
6397 && (tem
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
))
6398 && ((rtx_equal_p (XEXP (tem
, 0), goal
)
6400 = true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6401 || (GET_CODE (SET_DEST (pat
)) == REG
6402 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
6403 && (GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0)))
6405 && GET_CODE (goal
) == CONST_INT
6407 = operand_subword (XEXP (tem
, 0), 0, 0,
6409 && rtx_equal_p (goal
, goaltry
)
6411 = operand_subword (SET_DEST (pat
), 0, 0,
6413 && (valueno
= true_regnum (valtry
)) >= 0)))
6414 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
6416 && GET_CODE (SET_DEST (pat
)) == REG
6417 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
6418 && (GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0)))
6420 && GET_CODE (goal
) == CONST_INT
6421 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 1, 0,
6423 && rtx_equal_p (goal
, goaltry
)
6425 = operand_subword (SET_DEST (pat
), 1, 0, VOIDmode
))
6426 && (valueno
= true_regnum (valtry
)) >= 0)))
6430 if (valueno
!= other
)
6433 else if ((unsigned) valueno
>= FIRST_PSEUDO_REGISTER
)
6439 for (i
= HARD_REGNO_NREGS (valueno
, mode
) - 1; i
>= 0; i
--)
6440 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
6453 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6454 (or copying VALUE into GOAL, if GOAL is also a register).
6455 Now verify that VALUE is really valid. */
6457 /* VALUENO is the register number of VALUE; a hard register. */
6459 /* Don't try to re-use something that is killed in this insn. We want
6460 to be able to trust REG_UNUSED notes. */
6461 if (REG_NOTES (where
) != 0 && find_reg_note (where
, REG_UNUSED
, value
))
6464 /* If we propose to get the value from the stack pointer or if GOAL is
6465 a MEM based on the stack pointer, we need a stable SP. */
6466 if (valueno
== STACK_POINTER_REGNUM
|| regno
== STACK_POINTER_REGNUM
6467 || (goal_mem
&& reg_overlap_mentioned_for_reload_p (stack_pointer_rtx
,
6471 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6472 if (GET_MODE (value
) != mode
)
6475 /* Reject VALUE if it was loaded from GOAL
6476 and is also a register that appears in the address of GOAL. */
6478 if (goal_mem
&& value
== SET_DEST (single_set (where
))
6479 && refers_to_regno_for_reload_p (valueno
,
6481 + HARD_REGNO_NREGS (valueno
, mode
)),
6485 /* Reject registers that overlap GOAL. */
6487 if (!goal_mem
&& !goal_const
6488 && regno
+ (int) HARD_REGNO_NREGS (regno
, mode
) > valueno
6489 && regno
< valueno
+ (int) HARD_REGNO_NREGS (valueno
, mode
))
6492 nregs
= HARD_REGNO_NREGS (regno
, mode
);
6493 valuenregs
= HARD_REGNO_NREGS (valueno
, mode
);
6495 /* Reject VALUE if it is one of the regs reserved for reloads.
6496 Reload1 knows how to reuse them anyway, and it would get
6497 confused if we allocated one without its knowledge.
6498 (Now that insns introduced by reload are ignored above,
6499 this case shouldn't happen, but I'm not positive.) */
6501 if (reload_reg_p
!= 0 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
6504 for (i
= 0; i
< valuenregs
; ++i
)
6505 if (reload_reg_p
[valueno
+ i
] >= 0)
6509 /* Reject VALUE if it is a register being used for an input reload
6510 even if it is not one of those reserved. */
6512 if (reload_reg_p
!= 0)
6515 for (i
= 0; i
< n_reloads
; i
++)
6516 if (rld
[i
].reg_rtx
!= 0 && rld
[i
].in
)
6518 int regno1
= REGNO (rld
[i
].reg_rtx
);
6519 int nregs1
= HARD_REGNO_NREGS (regno1
,
6520 GET_MODE (rld
[i
].reg_rtx
));
6521 if (regno1
< valueno
+ valuenregs
6522 && regno1
+ nregs1
> valueno
)
6528 /* We must treat frame pointer as varying here,
6529 since it can vary--in a nonlocal goto as generated by expand_goto. */
6530 goal_mem_addr_varies
= !CONSTANT_ADDRESS_P (XEXP (goal
, 0));
6532 /* Now verify that the values of GOAL and VALUE remain unaltered
6533 until INSN is reached. */
6542 /* Don't trust the conversion past a function call
6543 if either of the two is in a call-clobbered register, or memory. */
6544 if (GET_CODE (p
) == CALL_INSN
)
6548 if (goal_mem
|| need_stable_sp
)
6551 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
)
6552 for (i
= 0; i
< nregs
; ++i
)
6553 if (call_used_regs
[regno
+ i
])
6556 if (valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
)
6557 for (i
= 0; i
< valuenregs
; ++i
)
6558 if (call_used_regs
[valueno
+ i
])
6560 #ifdef NON_SAVING_SETJMP
6561 if (NON_SAVING_SETJMP
&& find_reg_note (p
, REG_SETJMP
, NULL
))
6570 /* Watch out for unspec_volatile, and volatile asms. */
6571 if (volatile_insn_p (pat
))
6574 /* If this insn P stores in either GOAL or VALUE, return 0.
6575 If GOAL is a memory ref and this insn writes memory, return 0.
6576 If GOAL is a memory ref and its address is not constant,
6577 and this insn P changes a register used in GOAL, return 0. */
6579 if (GET_CODE (pat
) == COND_EXEC
)
6580 pat
= COND_EXEC_CODE (pat
);
6581 if (GET_CODE (pat
) == SET
|| GET_CODE (pat
) == CLOBBER
)
6583 rtx dest
= SET_DEST (pat
);
6584 while (GET_CODE (dest
) == SUBREG
6585 || GET_CODE (dest
) == ZERO_EXTRACT
6586 || GET_CODE (dest
) == SIGN_EXTRACT
6587 || GET_CODE (dest
) == STRICT_LOW_PART
)
6588 dest
= XEXP (dest
, 0);
6589 if (GET_CODE (dest
) == REG
)
6591 int xregno
= REGNO (dest
);
6593 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6594 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6597 if (xregno
< regno
+ nregs
&& xregno
+ xnregs
> regno
)
6599 if (xregno
< valueno
+ valuenregs
6600 && xregno
+ xnregs
> valueno
)
6602 if (goal_mem_addr_varies
6603 && reg_overlap_mentioned_for_reload_p (dest
, goal
))
6605 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6608 else if (goal_mem
&& GET_CODE (dest
) == MEM
6609 && ! push_operand (dest
, GET_MODE (dest
)))
6611 else if (GET_CODE (dest
) == MEM
&& regno
>= FIRST_PSEUDO_REGISTER
6612 && reg_equiv_memory_loc
[regno
] != 0)
6614 else if (need_stable_sp
&& push_operand (dest
, GET_MODE (dest
)))
6617 else if (GET_CODE (pat
) == PARALLEL
)
6620 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; i
--)
6622 rtx v1
= XVECEXP (pat
, 0, i
);
6623 if (GET_CODE (v1
) == COND_EXEC
)
6624 v1
= COND_EXEC_CODE (v1
);
6625 if (GET_CODE (v1
) == SET
|| GET_CODE (v1
) == CLOBBER
)
6627 rtx dest
= SET_DEST (v1
);
6628 while (GET_CODE (dest
) == SUBREG
6629 || GET_CODE (dest
) == ZERO_EXTRACT
6630 || GET_CODE (dest
) == SIGN_EXTRACT
6631 || GET_CODE (dest
) == STRICT_LOW_PART
)
6632 dest
= XEXP (dest
, 0);
6633 if (GET_CODE (dest
) == REG
)
6635 int xregno
= REGNO (dest
);
6637 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6638 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6641 if (xregno
< regno
+ nregs
6642 && xregno
+ xnregs
> regno
)
6644 if (xregno
< valueno
+ valuenregs
6645 && xregno
+ xnregs
> valueno
)
6647 if (goal_mem_addr_varies
6648 && reg_overlap_mentioned_for_reload_p (dest
,
6651 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6654 else if (goal_mem
&& GET_CODE (dest
) == MEM
6655 && ! push_operand (dest
, GET_MODE (dest
)))
6657 else if (GET_CODE (dest
) == MEM
&& regno
>= FIRST_PSEUDO_REGISTER
6658 && reg_equiv_memory_loc
[regno
] != 0)
6660 else if (need_stable_sp
6661 && push_operand (dest
, GET_MODE (dest
)))
6667 if (GET_CODE (p
) == CALL_INSN
&& CALL_INSN_FUNCTION_USAGE (p
))
6671 for (link
= CALL_INSN_FUNCTION_USAGE (p
); XEXP (link
, 1) != 0;
6672 link
= XEXP (link
, 1))
6674 pat
= XEXP (link
, 0);
6675 if (GET_CODE (pat
) == CLOBBER
)
6677 rtx dest
= SET_DEST (pat
);
6679 if (GET_CODE (dest
) == REG
)
6681 int xregno
= REGNO (dest
);
6683 = HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6685 if (xregno
< regno
+ nregs
6686 && xregno
+ xnregs
> regno
)
6688 else if (xregno
< valueno
+ valuenregs
6689 && xregno
+ xnregs
> valueno
)
6691 else if (goal_mem_addr_varies
6692 && reg_overlap_mentioned_for_reload_p (dest
,
6697 else if (goal_mem
&& GET_CODE (dest
) == MEM
6698 && ! push_operand (dest
, GET_MODE (dest
)))
6700 else if (need_stable_sp
6701 && push_operand (dest
, GET_MODE (dest
)))
6708 /* If this insn auto-increments or auto-decrements
6709 either regno or valueno, return 0 now.
6710 If GOAL is a memory ref and its address is not constant,
6711 and this insn P increments a register used in GOAL, return 0. */
6715 for (link
= REG_NOTES (p
); link
; link
= XEXP (link
, 1))
6716 if (REG_NOTE_KIND (link
) == REG_INC
6717 && GET_CODE (XEXP (link
, 0)) == REG
)
6719 int incno
= REGNO (XEXP (link
, 0));
6720 if (incno
< regno
+ nregs
&& incno
>= regno
)
6722 if (incno
< valueno
+ valuenregs
&& incno
>= valueno
)
6724 if (goal_mem_addr_varies
6725 && reg_overlap_mentioned_for_reload_p (XEXP (link
, 0),
6735 /* Find a place where INCED appears in an increment or decrement operator
6736 within X, and return the amount INCED is incremented or decremented by.
6737 The value is always positive. */
6740 find_inc_amount (x
, inced
)
6743 enum rtx_code code
= GET_CODE (x
);
6749 rtx addr
= XEXP (x
, 0);
6750 if ((GET_CODE (addr
) == PRE_DEC
6751 || GET_CODE (addr
) == POST_DEC
6752 || GET_CODE (addr
) == PRE_INC
6753 || GET_CODE (addr
) == POST_INC
)
6754 && XEXP (addr
, 0) == inced
)
6755 return GET_MODE_SIZE (GET_MODE (x
));
6756 else if ((GET_CODE (addr
) == PRE_MODIFY
6757 || GET_CODE (addr
) == POST_MODIFY
)
6758 && GET_CODE (XEXP (addr
, 1)) == PLUS
6759 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
6760 && XEXP (addr
, 0) == inced
6761 && GET_CODE (XEXP (XEXP (addr
, 1), 1)) == CONST_INT
)
6763 i
= INTVAL (XEXP (XEXP (addr
, 1), 1));
6764 return i
< 0 ? -i
: i
;
6768 fmt
= GET_RTX_FORMAT (code
);
6769 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6773 int tem
= find_inc_amount (XEXP (x
, i
), inced
);
6780 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6782 int tem
= find_inc_amount (XVECEXP (x
, i
, j
), inced
);
6792 /* Return 1 if register REGNO is the subject of a clobber in insn INSN.
6793 If SETS is nonzero, also consider SETs. */
6796 regno_clobbered_p (regno
, insn
, mode
, sets
)
6799 enum machine_mode mode
;
6802 unsigned int nregs
= HARD_REGNO_NREGS (regno
, mode
);
6803 unsigned int endregno
= regno
+ nregs
;
6805 if ((GET_CODE (PATTERN (insn
)) == CLOBBER
6806 || (sets
&& GET_CODE (PATTERN (insn
)) == SET
))
6807 && GET_CODE (XEXP (PATTERN (insn
), 0)) == REG
)
6809 unsigned int test
= REGNO (XEXP (PATTERN (insn
), 0));
6811 return test
>= regno
&& test
< endregno
;
6814 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
6816 int i
= XVECLEN (PATTERN (insn
), 0) - 1;
6820 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
6821 if ((GET_CODE (elt
) == CLOBBER
6822 || (sets
&& GET_CODE (PATTERN (insn
)) == SET
))
6823 && GET_CODE (XEXP (elt
, 0)) == REG
)
6825 unsigned int test
= REGNO (XEXP (elt
, 0));
6827 if (test
>= regno
&& test
< endregno
)
6836 static const char *const reload_when_needed_name
[] =
6839 "RELOAD_FOR_OUTPUT",
6841 "RELOAD_FOR_INPUT_ADDRESS",
6842 "RELOAD_FOR_INPADDR_ADDRESS",
6843 "RELOAD_FOR_OUTPUT_ADDRESS",
6844 "RELOAD_FOR_OUTADDR_ADDRESS",
6845 "RELOAD_FOR_OPERAND_ADDRESS",
6846 "RELOAD_FOR_OPADDR_ADDR",
6848 "RELOAD_FOR_OTHER_ADDRESS"
6851 static const char * const reg_class_names
[] = REG_CLASS_NAMES
;
6853 /* These functions are used to print the variables set by 'find_reloads' */
6856 debug_reload_to_stream (f
)
6864 for (r
= 0; r
< n_reloads
; r
++)
6866 fprintf (f
, "Reload %d: ", r
);
6870 fprintf (f
, "reload_in (%s) = ",
6871 GET_MODE_NAME (rld
[r
].inmode
));
6872 print_inline_rtx (f
, rld
[r
].in
, 24);
6873 fprintf (f
, "\n\t");
6876 if (rld
[r
].out
!= 0)
6878 fprintf (f
, "reload_out (%s) = ",
6879 GET_MODE_NAME (rld
[r
].outmode
));
6880 print_inline_rtx (f
, rld
[r
].out
, 24);
6881 fprintf (f
, "\n\t");
6884 fprintf (f
, "%s, ", reg_class_names
[(int) rld
[r
].class]);
6886 fprintf (f
, "%s (opnum = %d)",
6887 reload_when_needed_name
[(int) rld
[r
].when_needed
],
6890 if (rld
[r
].optional
)
6891 fprintf (f
, ", optional");
6893 if (rld
[r
].nongroup
)
6894 fprintf (f
, ", nongroup");
6896 if (rld
[r
].inc
!= 0)
6897 fprintf (f
, ", inc by %d", rld
[r
].inc
);
6899 if (rld
[r
].nocombine
)
6900 fprintf (f
, ", can't combine");
6902 if (rld
[r
].secondary_p
)
6903 fprintf (f
, ", secondary_reload_p");
6905 if (rld
[r
].in_reg
!= 0)
6907 fprintf (f
, "\n\treload_in_reg: ");
6908 print_inline_rtx (f
, rld
[r
].in_reg
, 24);
6911 if (rld
[r
].out_reg
!= 0)
6913 fprintf (f
, "\n\treload_out_reg: ");
6914 print_inline_rtx (f
, rld
[r
].out_reg
, 24);
6917 if (rld
[r
].reg_rtx
!= 0)
6919 fprintf (f
, "\n\treload_reg_rtx: ");
6920 print_inline_rtx (f
, rld
[r
].reg_rtx
, 24);
6924 if (rld
[r
].secondary_in_reload
!= -1)
6926 fprintf (f
, "%ssecondary_in_reload = %d",
6927 prefix
, rld
[r
].secondary_in_reload
);
6931 if (rld
[r
].secondary_out_reload
!= -1)
6932 fprintf (f
, "%ssecondary_out_reload = %d\n",
6933 prefix
, rld
[r
].secondary_out_reload
);
6936 if (rld
[r
].secondary_in_icode
!= CODE_FOR_nothing
)
6938 fprintf (f
, "%ssecondary_in_icode = %s", prefix
,
6939 insn_data
[rld
[r
].secondary_in_icode
].name
);
6943 if (rld
[r
].secondary_out_icode
!= CODE_FOR_nothing
)
6944 fprintf (f
, "%ssecondary_out_icode = %s", prefix
,
6945 insn_data
[rld
[r
].secondary_out_icode
].name
);
6954 debug_reload_to_stream (stderr
);