gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulh_lane_f16_1.c

   1 /* { dg-do run } */
   2 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
   3 /* { dg-add-options arm_v8_2a_fp16_neon } */
   4 /* { dg-skip-if "" { arm*-*-* } } */
   5
   6 #include <arm_neon.h>
   7 #include "arm-neon-ref.h"
   8 #include "compute-ref-data.h"
   9
  10 #define FP16_C(a) ((__fp16) a)
  11 #define A FP16_C (13.4)
  12 #define B FP16_C (-56.8)
  13 #define C FP16_C (-34.8)
  14 #define D FP16_C (12)
  15 #define E FP16_C (63.1)
  16 #define F FP16_C (19.1)
  17 #define G FP16_C (-4.8)
  18 #define H FP16_C (77)
  19
  20 #define I FP16_C (0.7)
  21 #define J FP16_C (-78)
  22 #define K FP16_C (11.23)
  23 #define L FP16_C (98)
  24 #define M FP16_C (87.1)
  25 #define N FP16_C (-8)
  26 #define O FP16_C (-1.1)
  27 #define P FP16_C (-9.7)
  28
  29 extern void abort ();
  30
  31 float16_t src1[8] = { A, B, C, D, I, J, K, L };
  32 VECT_VAR_DECL (src2, float, 16, 4) [] = { E, F, G, H };
  33 VECT_VAR_DECL (src2, float, 16, 8) [] = { E, F, G, H, M, N, O, P };
  34
  35 /* Expected results for vmulh_lane.  */
  36 uint16_t expected[4] = { 0x629B /* A * E.  */, 0xE43D /* B * F.  */,
  37                          0x5939 /* C * G.  */, 0x6338 /* D * H.  */ };
  38
  39
  40 /* Expected results for vmulh_lane.  */
  41 uint16_t expected_laneq[8] = { 0x629B /* A * E.  */,
  42                                0xE43D /* B * F.  */,
  43                                0x5939 /* C * G.  */,
  44                                0x6338 /* D * H.  */,
  45                                0x53A0 /* I * M.  */,
  46                                0x60E0 /* J * N.  */,
  47                                0xCA2C /* K * O.  */,
  48                                0xE36E /* L * P.  */ };
  49
  50 void exec_vmulh_lane_f16 (void)
  51 {
  52 #define CHECK_LANE(N)\
  53   ret = vmulh_lane_f16 (src1[N], VECT_VAR (vsrc2, float, 16, 4), N);\
  54   if (*(uint16_t *) &ret != expected[N])\
  55     abort ();
  56
  57   DECL_VARIABLE(vsrc2, float, 16, 4);
  58   VLOAD (vsrc2, src2, , float, f, 16, 4);
  59   float16_t ret;
  60
  61   CHECK_LANE(0)
  62   CHECK_LANE(1)
  63   CHECK_LANE(2)
  64   CHECK_LANE(3)
  65
  66 #undef CHECK_LANE
  67 #define CHECK_LANE(N)\
  68   ret = vmulh_laneq_f16 (src1[N], VECT_VAR (vsrc2, float, 16, 8), N);\
  69   if (*(uint16_t *) &ret != expected_laneq[N])\
  70     abort ();
  71
  72   DECL_VARIABLE(vsrc2, float, 16, 8);
  73   VLOAD (vsrc2, src2, q, float, f, 16, 8);
  74
  75   CHECK_LANE(0)
  76   CHECK_LANE(1)
  77   CHECK_LANE(2)
  78   CHECK_LANE(3)
  79   CHECK_LANE(4)
  80   CHECK_LANE(5)
  81   CHECK_LANE(6)
  82   CHECK_LANE(7)
  83 }
  84
  85 int
  86 main (void)
  87 {
  88   exec_vmulh_lane_f16 ();
  89   return 0;
  90 }