1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 /* This file contains subroutines used only from the file reload1.c.
24 It knows how to scan one insn for operands and values
25 that need to be copied into registers to make valid code.
26 It also finds other operands and values which are valid
27 but for which equivalent values in registers exist and
28 ought to be used instead.
30 Before processing the first insn of the function, call `init_reload'.
32 To scan an insn, call `find_reloads'. This does two things:
33 1. sets up tables describing which values must be reloaded
34 for this insn, and what kind of hard regs they must be reloaded into;
35 2. optionally record the locations where those values appear in
36 the data, so they can be replaced properly later.
37 This is done only if the second arg to `find_reloads' is nonzero.
39 The third arg to `find_reloads' specifies the number of levels
40 of indirect addressing supported by the machine. If it is zero,
41 indirect addressing is not valid. If it is one, (MEM (REG n))
42 is valid even if (REG n) did not get a hard register; if it is two,
43 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
44 hard register, and similarly for higher values.
46 Then you must choose the hard regs to reload those pseudo regs into,
47 and generate appropriate load insns before this insn and perhaps
48 also store insns after this insn. Set up the array `reload_reg_rtx'
49 to contain the REG rtx's for the registers you used. In some
50 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
51 for certain reloads. Then that tells you which register to use,
52 so you do not need to allocate one. But you still do need to add extra
53 instructions to copy the value into and out of that register.
55 Finally you must call `subst_reloads' to substitute the reload reg rtx's
56 into the locations already recorded.
60 find_reloads can alter the operands of the instruction it is called on.
62 1. Two operands of any sort may be interchanged, if they are in a
63 commutative instruction.
64 This happens only if find_reloads thinks the instruction will compile
67 2. Pseudo-registers that are equivalent to constants are replaced
68 with those constants if they are not in hard registers.
70 1 happens every time find_reloads is called.
71 2 happens only when REPLACE is 1, which is only when
72 actually doing the reloads, not when just counting them.
75 Using a reload register for several reloads in one insn:
77 When an insn has reloads, it is considered as having three parts:
78 the input reloads, the insn itself after reloading, and the output reloads.
79 Reloads of values used in memory addresses are often needed for only one part.
81 When this is so, reload_when_needed records which part needs the reload.
82 Two reloads for different parts of the insn can share the same reload
85 When a reload is used for addresses in multiple parts, or when it is
86 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
87 a register with any other reload. */
95 #include "insn-config.h"
96 #include "insn-codes.h"
100 #include "hard-reg-set.h"
104 #include "function.h"
108 #ifndef REGISTER_MOVE_COST
109 #define REGISTER_MOVE_COST(x, y) 2
112 #ifndef REGNO_MODE_OK_FOR_BASE_P
113 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
116 #ifndef REG_MODE_OK_FOR_BASE_P
117 #define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
120 /* All reloads of the current insn are recorded here. See reload.h for
123 struct reload rld
[MAX_RELOADS
];
125 /* All the "earlyclobber" operands of the current insn
126 are recorded here. */
128 rtx reload_earlyclobbers
[MAX_RECOG_OPERANDS
];
130 int reload_n_operands
;
132 /* Replacing reloads.
134 If `replace_reloads' is nonzero, then as each reload is recorded
135 an entry is made for it in the table `replacements'.
136 Then later `subst_reloads' can look through that table and
137 perform all the replacements needed. */
139 /* Nonzero means record the places to replace. */
140 static int replace_reloads
;
142 /* Each replacement is recorded with a structure like this. */
145 rtx
*where
; /* Location to store in */
146 rtx
*subreg_loc
; /* Location of SUBREG if WHERE is inside
147 a SUBREG; 0 otherwise. */
148 int what
; /* which reload this is for */
149 enum machine_mode mode
; /* mode it must have */
152 static struct replacement replacements
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
154 /* Number of replacements currently recorded. */
155 static int n_replacements
;
157 /* Used to track what is modified by an operand. */
160 int reg_flag
; /* Nonzero if referencing a register. */
161 int safe
; /* Nonzero if this can't conflict with anything. */
162 rtx base
; /* Base address for MEM. */
163 HOST_WIDE_INT start
; /* Starting offset or register number. */
164 HOST_WIDE_INT end
; /* Ending offset or register number. */
167 #ifdef SECONDARY_MEMORY_NEEDED
169 /* Save MEMs needed to copy from one class of registers to another. One MEM
170 is used per mode, but normally only one or two modes are ever used.
172 We keep two versions, before and after register elimination. The one
173 after register elimination is record separately for each operand. This
174 is done in case the address is not valid to be sure that we separately
177 static rtx secondary_memlocs
[NUM_MACHINE_MODES
];
178 static rtx secondary_memlocs_elim
[NUM_MACHINE_MODES
][MAX_RECOG_OPERANDS
];
181 /* The instruction we are doing reloads for;
182 so we can test whether a register dies in it. */
183 static rtx this_insn
;
185 /* Nonzero if this instruction is a user-specified asm with operands. */
186 static int this_insn_is_asm
;
188 /* If hard_regs_live_known is nonzero,
189 we can tell which hard regs are currently live,
190 at least enough to succeed in choosing dummy reloads. */
191 static int hard_regs_live_known
;
193 /* Indexed by hard reg number,
194 element is nonnegative if hard reg has been spilled.
195 This vector is passed to `find_reloads' as an argument
196 and is not changed here. */
197 static short *static_reload_reg_p
;
199 /* Set to 1 in subst_reg_equivs if it changes anything. */
200 static int subst_reg_equivs_changed
;
202 /* On return from push_reload, holds the reload-number for the OUT
203 operand, which can be different for that from the input operand. */
204 static int output_reloadnum
;
206 /* Compare two RTX's. */
207 #define MATCHES(x, y) \
208 (x == y || (x != 0 && (GET_CODE (x) == REG \
209 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
210 : rtx_equal_p (x, y) && ! side_effects_p (x))))
212 /* Indicates if two reloads purposes are for similar enough things that we
213 can merge their reloads. */
214 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
215 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
216 || ((when1) == (when2) && (op1) == (op2)) \
217 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
218 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
219 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
220 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
221 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
223 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
224 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
225 ((when1) != (when2) \
226 || ! ((op1) == (op2) \
227 || (when1) == RELOAD_FOR_INPUT \
228 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
229 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
231 /* If we are going to reload an address, compute the reload type to
233 #define ADDR_TYPE(type) \
234 ((type) == RELOAD_FOR_INPUT_ADDRESS \
235 ? RELOAD_FOR_INPADDR_ADDRESS \
236 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
237 ? RELOAD_FOR_OUTADDR_ADDRESS \
240 #ifdef HAVE_SECONDARY_RELOADS
241 static int push_secondary_reload
PARAMS ((int, rtx
, int, int, enum reg_class
,
242 enum machine_mode
, enum reload_type
,
245 static enum reg_class find_valid_class
PARAMS ((enum machine_mode
, int));
246 static int push_reload
PARAMS ((rtx
, rtx
, rtx
*, rtx
*, enum reg_class
,
247 enum machine_mode
, enum machine_mode
,
248 int, int, int, enum reload_type
));
249 static void push_replacement
PARAMS ((rtx
*, int, enum machine_mode
));
250 static void combine_reloads
PARAMS ((void));
251 static int find_reusable_reload
PARAMS ((rtx
*, rtx
, enum reg_class
,
252 enum reload_type
, int, int));
253 static rtx find_dummy_reload
PARAMS ((rtx
, rtx
, rtx
*, rtx
*,
254 enum machine_mode
, enum machine_mode
,
255 enum reg_class
, int, int));
256 static int hard_reg_set_here_p
PARAMS ((unsigned int, unsigned int, rtx
));
257 static struct decomposition decompose
PARAMS ((rtx
));
258 static int immune_p
PARAMS ((rtx
, rtx
, struct decomposition
));
259 static int alternative_allows_memconst
PARAMS ((const char *, int));
260 static rtx find_reloads_toplev
PARAMS ((rtx
, int, enum reload_type
, int,
262 static rtx make_memloc
PARAMS ((rtx
, int));
263 static int find_reloads_address
PARAMS ((enum machine_mode
, rtx
*, rtx
, rtx
*,
264 int, enum reload_type
, int, rtx
));
265 static rtx subst_reg_equivs
PARAMS ((rtx
, rtx
));
266 static rtx subst_indexed_address
PARAMS ((rtx
));
267 static int find_reloads_address_1
PARAMS ((enum machine_mode
, rtx
, int, rtx
*,
268 int, enum reload_type
,int, rtx
));
269 static void find_reloads_address_part
PARAMS ((rtx
, rtx
*, enum reg_class
,
270 enum machine_mode
, int,
271 enum reload_type
, int));
272 static rtx find_reloads_subreg_address
PARAMS ((rtx
, int, int, enum reload_type
,
274 static int find_inc_amount
PARAMS ((rtx
, rtx
));
275 extern void debug_reload_to_stream
PARAMS ((FILE *));
276 extern void debug_reload
PARAMS ((void));
278 #ifdef HAVE_SECONDARY_RELOADS
280 /* Determine if any secondary reloads are needed for loading (if IN_P is
281 non-zero) or storing (if IN_P is zero) X to or from a reload register of
282 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
283 are needed, push them.
285 Return the reload number of the secondary reload we made, or -1 if
286 we didn't need one. *PICODE is set to the insn_code to use if we do
287 need a secondary reload. */
290 push_secondary_reload (in_p
, x
, opnum
, optional
, reload_class
, reload_mode
,
296 enum reg_class reload_class
;
297 enum machine_mode reload_mode
;
298 enum reload_type type
;
299 enum insn_code
*picode
;
301 enum reg_class
class = NO_REGS
;
302 enum machine_mode mode
= reload_mode
;
303 enum insn_code icode
= CODE_FOR_nothing
;
304 enum reg_class t_class
= NO_REGS
;
305 enum machine_mode t_mode
= VOIDmode
;
306 enum insn_code t_icode
= CODE_FOR_nothing
;
307 enum reload_type secondary_type
;
308 int s_reload
, t_reload
= -1;
310 if (type
== RELOAD_FOR_INPUT_ADDRESS
311 || type
== RELOAD_FOR_OUTPUT_ADDRESS
312 || type
== RELOAD_FOR_INPADDR_ADDRESS
313 || type
== RELOAD_FOR_OUTADDR_ADDRESS
)
314 secondary_type
= type
;
316 secondary_type
= in_p
? RELOAD_FOR_INPUT_ADDRESS
: RELOAD_FOR_OUTPUT_ADDRESS
;
318 *picode
= CODE_FOR_nothing
;
320 /* If X is a paradoxical SUBREG, use the inner value to determine both the
321 mode and object being reloaded. */
322 if (GET_CODE (x
) == SUBREG
323 && (GET_MODE_SIZE (GET_MODE (x
))
324 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))))
327 reload_mode
= GET_MODE (x
);
330 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
331 is still a pseudo-register by now, it *must* have an equivalent MEM
332 but we don't want to assume that), use that equivalent when seeing if
333 a secondary reload is needed since whether or not a reload is needed
334 might be sensitive to the form of the MEM. */
336 if (GET_CODE (x
) == REG
&& REGNO (x
) >= FIRST_PSEUDO_REGISTER
337 && reg_equiv_mem
[REGNO (x
)] != 0)
338 x
= reg_equiv_mem
[REGNO (x
)];
340 #ifdef SECONDARY_INPUT_RELOAD_CLASS
342 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
345 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
347 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
350 /* If we don't need any secondary registers, done. */
351 if (class == NO_REGS
)
354 /* Get a possible insn to use. If the predicate doesn't accept X, don't
357 icode
= (in_p
? reload_in_optab
[(int) reload_mode
]
358 : reload_out_optab
[(int) reload_mode
]);
360 if (icode
!= CODE_FOR_nothing
361 && insn_data
[(int) icode
].operand
[in_p
].predicate
362 && (! (insn_data
[(int) icode
].operand
[in_p
].predicate
) (x
, reload_mode
)))
363 icode
= CODE_FOR_nothing
;
365 /* If we will be using an insn, see if it can directly handle the reload
366 register we will be using. If it can, the secondary reload is for a
367 scratch register. If it can't, we will use the secondary reload for
368 an intermediate register and require a tertiary reload for the scratch
371 if (icode
!= CODE_FOR_nothing
)
373 /* If IN_P is non-zero, the reload register will be the output in
374 operand 0. If IN_P is zero, the reload register will be the input
375 in operand 1. Outputs should have an initial "=", which we must
379 = insn_data
[(int) icode
].operand
[!in_p
].constraint
[in_p
];
380 enum reg_class insn_class
381 = (insn_letter
== 'r' ? GENERAL_REGS
382 : REG_CLASS_FROM_LETTER ((unsigned char) insn_letter
));
384 if (insn_class
== NO_REGS
386 && insn_data
[(int) icode
].operand
[!in_p
].constraint
[0] != '=')
387 /* The scratch register's constraint must start with "=&". */
388 || insn_data
[(int) icode
].operand
[2].constraint
[0] != '='
389 || insn_data
[(int) icode
].operand
[2].constraint
[1] != '&')
392 if (reg_class_subset_p (reload_class
, insn_class
))
393 mode
= insn_data
[(int) icode
].operand
[2].mode
;
396 char t_letter
= insn_data
[(int) icode
].operand
[2].constraint
[2];
398 t_mode
= insn_data
[(int) icode
].operand
[2].mode
;
399 t_class
= (t_letter
== 'r' ? GENERAL_REGS
400 : REG_CLASS_FROM_LETTER ((unsigned char) t_letter
));
402 icode
= CODE_FOR_nothing
;
406 /* This case isn't valid, so fail. Reload is allowed to use the same
407 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
408 in the case of a secondary register, we actually need two different
409 registers for correct code. We fail here to prevent the possibility of
410 silently generating incorrect code later.
412 The convention is that secondary input reloads are valid only if the
413 secondary_class is different from class. If you have such a case, you
414 can not use secondary reloads, you must work around the problem some
417 Allow this when MODE is not reload_mode and assume that the generated
418 code handles this case (it does on the Alpha, which is the only place
419 this currently happens). */
421 if (in_p
&& class == reload_class
&& mode
== reload_mode
)
424 /* If we need a tertiary reload, see if we have one we can reuse or else
427 if (t_class
!= NO_REGS
)
429 for (t_reload
= 0; t_reload
< n_reloads
; t_reload
++)
430 if (rld
[t_reload
].secondary_p
431 && (reg_class_subset_p (t_class
, rld
[t_reload
].class)
432 || reg_class_subset_p (rld
[t_reload
].class, t_class
))
433 && ((in_p
&& rld
[t_reload
].inmode
== t_mode
)
434 || (! in_p
&& rld
[t_reload
].outmode
== t_mode
))
435 && ((in_p
&& (rld
[t_reload
].secondary_in_icode
436 == CODE_FOR_nothing
))
437 || (! in_p
&&(rld
[t_reload
].secondary_out_icode
438 == CODE_FOR_nothing
)))
439 && (reg_class_size
[(int) t_class
] == 1 || SMALL_REGISTER_CLASSES
)
440 && MERGABLE_RELOADS (secondary_type
,
441 rld
[t_reload
].when_needed
,
442 opnum
, rld
[t_reload
].opnum
))
445 rld
[t_reload
].inmode
= t_mode
;
447 rld
[t_reload
].outmode
= t_mode
;
449 if (reg_class_subset_p (t_class
, rld
[t_reload
].class))
450 rld
[t_reload
].class = t_class
;
452 rld
[t_reload
].opnum
= MIN (rld
[t_reload
].opnum
, opnum
);
453 rld
[t_reload
].optional
&= optional
;
454 rld
[t_reload
].secondary_p
= 1;
455 if (MERGE_TO_OTHER (secondary_type
, rld
[t_reload
].when_needed
,
456 opnum
, rld
[t_reload
].opnum
))
457 rld
[t_reload
].when_needed
= RELOAD_OTHER
;
460 if (t_reload
== n_reloads
)
462 /* We need to make a new tertiary reload for this register class. */
463 rld
[t_reload
].in
= rld
[t_reload
].out
= 0;
464 rld
[t_reload
].class = t_class
;
465 rld
[t_reload
].inmode
= in_p
? t_mode
: VOIDmode
;
466 rld
[t_reload
].outmode
= ! in_p
? t_mode
: VOIDmode
;
467 rld
[t_reload
].reg_rtx
= 0;
468 rld
[t_reload
].optional
= optional
;
469 rld
[t_reload
].inc
= 0;
470 /* Maybe we could combine these, but it seems too tricky. */
471 rld
[t_reload
].nocombine
= 1;
472 rld
[t_reload
].in_reg
= 0;
473 rld
[t_reload
].out_reg
= 0;
474 rld
[t_reload
].opnum
= opnum
;
475 rld
[t_reload
].when_needed
= secondary_type
;
476 rld
[t_reload
].secondary_in_reload
= -1;
477 rld
[t_reload
].secondary_out_reload
= -1;
478 rld
[t_reload
].secondary_in_icode
= CODE_FOR_nothing
;
479 rld
[t_reload
].secondary_out_icode
= CODE_FOR_nothing
;
480 rld
[t_reload
].secondary_p
= 1;
486 /* See if we can reuse an existing secondary reload. */
487 for (s_reload
= 0; s_reload
< n_reloads
; s_reload
++)
488 if (rld
[s_reload
].secondary_p
489 && (reg_class_subset_p (class, rld
[s_reload
].class)
490 || reg_class_subset_p (rld
[s_reload
].class, class))
491 && ((in_p
&& rld
[s_reload
].inmode
== mode
)
492 || (! in_p
&& rld
[s_reload
].outmode
== mode
))
493 && ((in_p
&& rld
[s_reload
].secondary_in_reload
== t_reload
)
494 || (! in_p
&& rld
[s_reload
].secondary_out_reload
== t_reload
))
495 && ((in_p
&& rld
[s_reload
].secondary_in_icode
== t_icode
)
496 || (! in_p
&& rld
[s_reload
].secondary_out_icode
== t_icode
))
497 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
498 && MERGABLE_RELOADS (secondary_type
, rld
[s_reload
].when_needed
,
499 opnum
, rld
[s_reload
].opnum
))
502 rld
[s_reload
].inmode
= mode
;
504 rld
[s_reload
].outmode
= mode
;
506 if (reg_class_subset_p (class, rld
[s_reload
].class))
507 rld
[s_reload
].class = class;
509 rld
[s_reload
].opnum
= MIN (rld
[s_reload
].opnum
, opnum
);
510 rld
[s_reload
].optional
&= optional
;
511 rld
[s_reload
].secondary_p
= 1;
512 if (MERGE_TO_OTHER (secondary_type
, rld
[s_reload
].when_needed
,
513 opnum
, rld
[s_reload
].opnum
))
514 rld
[s_reload
].when_needed
= RELOAD_OTHER
;
517 if (s_reload
== n_reloads
)
519 #ifdef SECONDARY_MEMORY_NEEDED
520 /* If we need a memory location to copy between the two reload regs,
521 set it up now. Note that we do the input case before making
522 the reload and the output case after. This is due to the
523 way reloads are output. */
525 if (in_p
&& icode
== CODE_FOR_nothing
526 && SECONDARY_MEMORY_NEEDED (class, reload_class
, mode
))
527 get_secondary_mem (x
, reload_mode
, opnum
, type
);
530 /* We need to make a new secondary reload for this register class. */
531 rld
[s_reload
].in
= rld
[s_reload
].out
= 0;
532 rld
[s_reload
].class = class;
534 rld
[s_reload
].inmode
= in_p
? mode
: VOIDmode
;
535 rld
[s_reload
].outmode
= ! in_p
? mode
: VOIDmode
;
536 rld
[s_reload
].reg_rtx
= 0;
537 rld
[s_reload
].optional
= optional
;
538 rld
[s_reload
].inc
= 0;
539 /* Maybe we could combine these, but it seems too tricky. */
540 rld
[s_reload
].nocombine
= 1;
541 rld
[s_reload
].in_reg
= 0;
542 rld
[s_reload
].out_reg
= 0;
543 rld
[s_reload
].opnum
= opnum
;
544 rld
[s_reload
].when_needed
= secondary_type
;
545 rld
[s_reload
].secondary_in_reload
= in_p
? t_reload
: -1;
546 rld
[s_reload
].secondary_out_reload
= ! in_p
? t_reload
: -1;
547 rld
[s_reload
].secondary_in_icode
= in_p
? t_icode
: CODE_FOR_nothing
;
548 rld
[s_reload
].secondary_out_icode
549 = ! in_p
? t_icode
: CODE_FOR_nothing
;
550 rld
[s_reload
].secondary_p
= 1;
554 #ifdef SECONDARY_MEMORY_NEEDED
555 if (! in_p
&& icode
== CODE_FOR_nothing
556 && SECONDARY_MEMORY_NEEDED (reload_class
, class, mode
))
557 get_secondary_mem (x
, mode
, opnum
, type
);
564 #endif /* HAVE_SECONDARY_RELOADS */
566 #ifdef SECONDARY_MEMORY_NEEDED
568 /* Return a memory location that will be used to copy X in mode MODE.
569 If we haven't already made a location for this mode in this insn,
570 call find_reloads_address on the location being returned. */
573 get_secondary_mem (x
, mode
, opnum
, type
)
574 rtx x ATTRIBUTE_UNUSED
;
575 enum machine_mode mode
;
577 enum reload_type type
;
582 /* By default, if MODE is narrower than a word, widen it to a word.
583 This is required because most machines that require these memory
584 locations do not support short load and stores from all registers
585 (e.g., FP registers). */
587 #ifdef SECONDARY_MEMORY_NEEDED_MODE
588 mode
= SECONDARY_MEMORY_NEEDED_MODE (mode
);
590 if (GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
&& INTEGRAL_MODE_P (mode
))
591 mode
= mode_for_size (BITS_PER_WORD
, GET_MODE_CLASS (mode
), 0);
594 /* If we already have made a MEM for this operand in MODE, return it. */
595 if (secondary_memlocs_elim
[(int) mode
][opnum
] != 0)
596 return secondary_memlocs_elim
[(int) mode
][opnum
];
598 /* If this is the first time we've tried to get a MEM for this mode,
599 allocate a new one. `something_changed' in reload will get set
600 by noticing that the frame size has changed. */
602 if (secondary_memlocs
[(int) mode
] == 0)
604 #ifdef SECONDARY_MEMORY_NEEDED_RTX
605 secondary_memlocs
[(int) mode
] = SECONDARY_MEMORY_NEEDED_RTX (mode
);
607 secondary_memlocs
[(int) mode
]
608 = assign_stack_local (mode
, GET_MODE_SIZE (mode
), 0);
612 /* Get a version of the address doing any eliminations needed. If that
613 didn't give us a new MEM, make a new one if it isn't valid. */
615 loc
= eliminate_regs (secondary_memlocs
[(int) mode
], VOIDmode
, NULL_RTX
);
616 mem_valid
= strict_memory_address_p (mode
, XEXP (loc
, 0));
618 if (! mem_valid
&& loc
== secondary_memlocs
[(int) mode
])
619 loc
= copy_rtx (loc
);
621 /* The only time the call below will do anything is if the stack
622 offset is too large. In that case IND_LEVELS doesn't matter, so we
623 can just pass a zero. Adjust the type to be the address of the
624 corresponding object. If the address was valid, save the eliminated
625 address. If it wasn't valid, we need to make a reload each time, so
630 type
= (type
== RELOAD_FOR_INPUT
? RELOAD_FOR_INPUT_ADDRESS
631 : type
== RELOAD_FOR_OUTPUT
? RELOAD_FOR_OUTPUT_ADDRESS
634 find_reloads_address (mode
, NULL_PTR
, XEXP (loc
, 0), &XEXP (loc
, 0),
638 secondary_memlocs_elim
[(int) mode
][opnum
] = loc
;
642 /* Clear any secondary memory locations we've made. */
645 clear_secondary_mem ()
647 bzero ((char *) secondary_memlocs
, sizeof secondary_memlocs
);
649 #endif /* SECONDARY_MEMORY_NEEDED */
651 /* Find the largest class for which every register number plus N is valid in
652 M1 (if in range). Abort if no such class exists. */
654 static enum reg_class
655 find_valid_class (m1
, n
)
656 enum machine_mode m1 ATTRIBUTE_UNUSED
;
661 enum reg_class best_class
= NO_REGS
;
662 unsigned int best_size
= 0;
664 for (class = 1; class < N_REG_CLASSES
; class++)
667 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
&& ! bad
; regno
++)
668 if (TEST_HARD_REG_BIT (reg_class_contents
[class], regno
)
669 && TEST_HARD_REG_BIT (reg_class_contents
[class], regno
+ n
)
670 && ! HARD_REGNO_MODE_OK (regno
+ n
, m1
))
673 if (! bad
&& reg_class_size
[class] > best_size
)
674 best_class
= class, best_size
= reg_class_size
[class];
683 /* Return the number of a previously made reload that can be combined with
684 a new one, or n_reloads if none of the existing reloads can be used.
685 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
686 push_reload, they determine the kind of the new reload that we try to
687 combine. P_IN points to the corresponding value of IN, which can be
688 modified by this function.
689 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
691 find_reusable_reload (p_in
, out
, class, type
, opnum
, dont_share
)
693 enum reg_class
class;
694 enum reload_type type
;
695 int opnum
, dont_share
;
699 /* We can't merge two reloads if the output of either one is
702 if (earlyclobber_operand_p (out
))
705 /* We can use an existing reload if the class is right
706 and at least one of IN and OUT is a match
707 and the other is at worst neutral.
708 (A zero compared against anything is neutral.)
710 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
711 for the same thing since that can cause us to need more reload registers
712 than we otherwise would. */
714 for (i
= 0; i
< n_reloads
; i
++)
715 if ((reg_class_subset_p (class, rld
[i
].class)
716 || reg_class_subset_p (rld
[i
].class, class))
717 /* If the existing reload has a register, it must fit our class. */
718 && (rld
[i
].reg_rtx
== 0
719 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
720 true_regnum (rld
[i
].reg_rtx
)))
721 && ((in
!= 0 && MATCHES (rld
[i
].in
, in
) && ! dont_share
722 && (out
== 0 || rld
[i
].out
== 0 || MATCHES (rld
[i
].out
, out
)))
723 || (out
!= 0 && MATCHES (rld
[i
].out
, out
)
724 && (in
== 0 || rld
[i
].in
== 0 || MATCHES (rld
[i
].in
, in
))))
725 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
726 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
727 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
, opnum
, rld
[i
].opnum
))
730 /* Reloading a plain reg for input can match a reload to postincrement
731 that reg, since the postincrement's value is the right value.
732 Likewise, it can match a preincrement reload, since we regard
733 the preincrementation as happening before any ref in this insn
735 for (i
= 0; i
< n_reloads
; i
++)
736 if ((reg_class_subset_p (class, rld
[i
].class)
737 || reg_class_subset_p (rld
[i
].class, class))
738 /* If the existing reload has a register, it must fit our
740 && (rld
[i
].reg_rtx
== 0
741 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
742 true_regnum (rld
[i
].reg_rtx
)))
743 && out
== 0 && rld
[i
].out
== 0 && rld
[i
].in
!= 0
744 && ((GET_CODE (in
) == REG
745 && (GET_CODE (rld
[i
].in
) == POST_INC
746 || GET_CODE (rld
[i
].in
) == POST_DEC
747 || GET_CODE (rld
[i
].in
) == PRE_INC
748 || GET_CODE (rld
[i
].in
) == PRE_DEC
)
749 && MATCHES (XEXP (rld
[i
].in
, 0), in
))
751 (GET_CODE (rld
[i
].in
) == REG
752 && (GET_CODE (in
) == POST_INC
753 || GET_CODE (in
) == POST_DEC
754 || GET_CODE (in
) == PRE_INC
755 || GET_CODE (in
) == PRE_DEC
)
756 && MATCHES (XEXP (in
, 0), rld
[i
].in
)))
757 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
758 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
759 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
,
760 opnum
, rld
[i
].opnum
))
762 /* Make sure reload_in ultimately has the increment,
763 not the plain register. */
764 if (GET_CODE (in
) == REG
)
771 /* Record one reload that needs to be performed.
772 IN is an rtx saying where the data are to be found before this instruction.
773 OUT says where they must be stored after the instruction.
774 (IN is zero for data not read, and OUT is zero for data not written.)
775 INLOC and OUTLOC point to the places in the instructions where
776 IN and OUT were found.
777 If IN and OUT are both non-zero, it means the same register must be used
778 to reload both IN and OUT.
780 CLASS is a register class required for the reloaded data.
781 INMODE is the machine mode that the instruction requires
782 for the reg that replaces IN and OUTMODE is likewise for OUT.
784 If IN is zero, then OUT's location and mode should be passed as
787 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
789 OPTIONAL nonzero means this reload does not need to be performed:
790 it can be discarded if that is more convenient.
792 OPNUM and TYPE say what the purpose of this reload is.
794 The return value is the reload-number for this reload.
796 If both IN and OUT are nonzero, in some rare cases we might
797 want to make two separate reloads. (Actually we never do this now.)
798 Therefore, the reload-number for OUT is stored in
799 output_reloadnum when we return; the return value applies to IN.
800 Usually (presently always), when IN and OUT are nonzero,
801 the two reload-numbers are equal, but the caller should be careful to
805 push_reload (in
, out
, inloc
, outloc
, class,
806 inmode
, outmode
, strict_low
, optional
, opnum
, type
)
809 enum reg_class
class;
810 enum machine_mode inmode
, outmode
;
814 enum reload_type type
;
818 int dont_remove_subreg
= 0;
819 rtx
*in_subreg_loc
= 0, *out_subreg_loc
= 0;
820 int secondary_in_reload
= -1, secondary_out_reload
= -1;
821 enum insn_code secondary_in_icode
= CODE_FOR_nothing
;
822 enum insn_code secondary_out_icode
= CODE_FOR_nothing
;
824 /* INMODE and/or OUTMODE could be VOIDmode if no mode
825 has been specified for the operand. In that case,
826 use the operand's mode as the mode to reload. */
827 if (inmode
== VOIDmode
&& in
!= 0)
828 inmode
= GET_MODE (in
);
829 if (outmode
== VOIDmode
&& out
!= 0)
830 outmode
= GET_MODE (out
);
832 /* If IN is a pseudo register everywhere-equivalent to a constant, and
833 it is not in a hard register, reload straight from the constant,
834 since we want to get rid of such pseudo registers.
835 Often this is done earlier, but not always in find_reloads_address. */
836 if (in
!= 0 && GET_CODE (in
) == REG
)
838 register int regno
= REGNO (in
);
840 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
841 && reg_equiv_constant
[regno
] != 0)
842 in
= reg_equiv_constant
[regno
];
845 /* Likewise for OUT. Of course, OUT will never be equivalent to
846 an actual constant, but it might be equivalent to a memory location
847 (in the case of a parameter). */
848 if (out
!= 0 && GET_CODE (out
) == REG
)
850 register int regno
= REGNO (out
);
852 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
853 && reg_equiv_constant
[regno
] != 0)
854 out
= reg_equiv_constant
[regno
];
857 /* If we have a read-write operand with an address side-effect,
858 change either IN or OUT so the side-effect happens only once. */
859 if (in
!= 0 && out
!= 0 && GET_CODE (in
) == MEM
&& rtx_equal_p (in
, out
))
861 if (GET_CODE (XEXP (in
, 0)) == POST_INC
862 || GET_CODE (XEXP (in
, 0)) == POST_DEC
)
864 rtx
new = gen_rtx_MEM (GET_MODE (in
), XEXP (XEXP (in
, 0), 0));
866 MEM_COPY_ATTRIBUTES (new, in
);
869 if (GET_CODE (XEXP (in
, 0)) == PRE_INC
870 || GET_CODE (XEXP (in
, 0)) == PRE_DEC
)
872 rtx
new = gen_rtx_MEM (GET_MODE (out
), XEXP (XEXP (out
, 0), 0));
874 MEM_COPY_ATTRIBUTES (new, out
);
879 /* If we are reloading a (SUBREG constant ...), really reload just the
880 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
881 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
882 a pseudo and hence will become a MEM) with M1 wider than M2 and the
883 register is a pseudo, also reload the inside expression.
884 For machines that extend byte loads, do this for any SUBREG of a pseudo
885 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
886 M2 is an integral mode that gets extended when loaded.
887 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
888 either M1 is not valid for R or M2 is wider than a word but we only
889 need one word to store an M2-sized quantity in R.
890 (However, if OUT is nonzero, we need to reload the reg *and*
891 the subreg, so do nothing here, and let following statement handle it.)
893 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
894 we can't handle it here because CONST_INT does not indicate a mode.
896 Similarly, we must reload the inside expression if we have a
897 STRICT_LOW_PART (presumably, in == out in the cas).
899 Also reload the inner expression if it does not require a secondary
900 reload but the SUBREG does.
902 Finally, reload the inner expression if it is a register that is in
903 the class whose registers cannot be referenced in a different size
904 and M1 is not the same size as M2. If SUBREG_WORD is nonzero, we
905 cannot reload just the inside since we might end up with the wrong
906 register class. But if it is inside a STRICT_LOW_PART, we have
907 no choice, so we hope we do get the right register class there. */
909 if (in
!= 0 && GET_CODE (in
) == SUBREG
910 && (SUBREG_WORD (in
) == 0 || strict_low
)
911 #ifdef CLASS_CANNOT_CHANGE_MODE
912 && class != CLASS_CANNOT_CHANGE_MODE
914 && (CONSTANT_P (SUBREG_REG (in
))
915 || GET_CODE (SUBREG_REG (in
)) == PLUS
917 || (((GET_CODE (SUBREG_REG (in
)) == REG
918 && REGNO (SUBREG_REG (in
)) >= FIRST_PSEUDO_REGISTER
)
919 || GET_CODE (SUBREG_REG (in
)) == MEM
)
920 && ((GET_MODE_SIZE (inmode
)
921 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
922 #ifdef LOAD_EXTEND_OP
923 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
924 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
926 && (GET_MODE_SIZE (inmode
)
927 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
928 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in
)))
929 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in
))) != NIL
)
931 #ifdef WORD_REGISTER_OPERATIONS
932 || ((GET_MODE_SIZE (inmode
)
933 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
934 && ((GET_MODE_SIZE (inmode
) - 1) / UNITS_PER_WORD
==
935 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))) - 1)
939 || (GET_CODE (SUBREG_REG (in
)) == REG
940 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
941 /* The case where out is nonzero
942 is handled differently in the following statement. */
943 && (out
== 0 || SUBREG_WORD (in
) == 0)
944 && ((GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
945 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
947 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
949 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in
)),
950 GET_MODE (SUBREG_REG (in
)))))
951 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in
))
954 #ifdef SECONDARY_INPUT_RELOAD_CLASS
955 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode
, in
) != NO_REGS
956 && (SECONDARY_INPUT_RELOAD_CLASS (class,
957 GET_MODE (SUBREG_REG (in
)),
961 #ifdef CLASS_CANNOT_CHANGE_MODE
962 || (GET_CODE (SUBREG_REG (in
)) == REG
963 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
964 && (TEST_HARD_REG_BIT
965 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_MODE
],
966 REGNO (SUBREG_REG (in
))))
967 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (in
)),
972 in_subreg_loc
= inloc
;
973 inloc
= &SUBREG_REG (in
);
975 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
976 if (GET_CODE (in
) == MEM
)
977 /* This is supposed to happen only for paradoxical subregs made by
978 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
979 if (GET_MODE_SIZE (GET_MODE (in
)) > GET_MODE_SIZE (inmode
))
982 inmode
= GET_MODE (in
);
985 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
986 either M1 is not valid for R or M2 is wider than a word but we only
987 need one word to store an M2-sized quantity in R.
989 However, we must reload the inner reg *as well as* the subreg in
992 /* Similar issue for (SUBREG constant ...) if it was not handled by the
993 code above. This can happen if SUBREG_WORD != 0. */
995 if (in
!= 0 && GET_CODE (in
) == SUBREG
996 && (CONSTANT_P (SUBREG_REG (in
))
997 || (GET_CODE (SUBREG_REG (in
)) == REG
998 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
999 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in
))
1002 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
1003 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1005 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1007 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in
)),
1008 GET_MODE (SUBREG_REG (in
)))))))))
1010 /* This relies on the fact that emit_reload_insns outputs the
1011 instructions for input reloads of type RELOAD_OTHER in the same
1012 order as the reloads. Thus if the outer reload is also of type
1013 RELOAD_OTHER, we are guaranteed that this inner reload will be
1014 output before the outer reload. */
1015 push_reload (SUBREG_REG (in
), NULL_RTX
, &SUBREG_REG (in
), NULL_PTR
,
1016 find_valid_class (inmode
, SUBREG_WORD (in
)),
1017 VOIDmode
, VOIDmode
, 0, 0, opnum
, type
);
1018 dont_remove_subreg
= 1;
1021 /* Similarly for paradoxical and problematical SUBREGs on the output.
1022 Note that there is no reason we need worry about the previous value
1023 of SUBREG_REG (out); even if wider than out,
1024 storing in a subreg is entitled to clobber it all
1025 (except in the case of STRICT_LOW_PART,
1026 and in that case the constraint should label it input-output.) */
1027 if (out
!= 0 && GET_CODE (out
) == SUBREG
1028 && (SUBREG_WORD (out
) == 0 || strict_low
)
1029 #ifdef CLASS_CANNOT_CHANGE_MODE
1030 && class != CLASS_CANNOT_CHANGE_MODE
1032 && (CONSTANT_P (SUBREG_REG (out
))
1034 || (((GET_CODE (SUBREG_REG (out
)) == REG
1035 && REGNO (SUBREG_REG (out
)) >= FIRST_PSEUDO_REGISTER
)
1036 || GET_CODE (SUBREG_REG (out
)) == MEM
)
1037 && ((GET_MODE_SIZE (outmode
)
1038 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
1039 #ifdef WORD_REGISTER_OPERATIONS
1040 || ((GET_MODE_SIZE (outmode
)
1041 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
1042 && ((GET_MODE_SIZE (outmode
) - 1) / UNITS_PER_WORD
==
1043 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))) - 1)
1047 || (GET_CODE (SUBREG_REG (out
)) == REG
1048 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1049 && ((GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
1050 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1052 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1054 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out
)),
1055 GET_MODE (SUBREG_REG (out
)))))
1056 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out
))
1057 + SUBREG_WORD (out
)),
1059 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1060 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode
, out
) != NO_REGS
1061 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1062 GET_MODE (SUBREG_REG (out
)),
1066 #ifdef CLASS_CANNOT_CHANGE_MODE
1067 || (GET_CODE (SUBREG_REG (out
)) == REG
1068 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1069 && (TEST_HARD_REG_BIT
1070 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_MODE
],
1071 REGNO (SUBREG_REG (out
))))
1072 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (out
)),
1077 out_subreg_loc
= outloc
;
1078 outloc
= &SUBREG_REG (out
);
1080 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1081 if (GET_CODE (out
) == MEM
1082 && GET_MODE_SIZE (GET_MODE (out
)) > GET_MODE_SIZE (outmode
))
1085 outmode
= GET_MODE (out
);
1088 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1089 either M1 is not valid for R or M2 is wider than a word but we only
1090 need one word to store an M2-sized quantity in R.
1092 However, we must reload the inner reg *as well as* the subreg in
1093 that case. In this case, the inner reg is an in-out reload. */
1095 if (out
!= 0 && GET_CODE (out
) == SUBREG
1096 && GET_CODE (SUBREG_REG (out
)) == REG
1097 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1098 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (out
)) + SUBREG_WORD (out
),
1100 || (GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
1101 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1103 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1105 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out
)),
1106 GET_MODE (SUBREG_REG (out
)))))))
1108 /* This relies on the fact that emit_reload_insns outputs the
1109 instructions for output reloads of type RELOAD_OTHER in reverse
1110 order of the reloads. Thus if the outer reload is also of type
1111 RELOAD_OTHER, we are guaranteed that this inner reload will be
1112 output after the outer reload. */
1113 dont_remove_subreg
= 1;
1114 push_reload (SUBREG_REG (out
), SUBREG_REG (out
), &SUBREG_REG (out
),
1116 find_valid_class (outmode
, SUBREG_WORD (out
)),
1117 VOIDmode
, VOIDmode
, 0, 0,
1118 opnum
, RELOAD_OTHER
);
1121 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1122 if (in
!= 0 && out
!= 0 && GET_CODE (out
) == MEM
1123 && (GET_CODE (in
) == REG
|| GET_CODE (in
) == MEM
)
1124 && reg_overlap_mentioned_for_reload_p (in
, XEXP (out
, 0)))
1127 /* If IN is a SUBREG of a hard register, make a new REG. This
1128 simplifies some of the cases below. */
1130 if (in
!= 0 && GET_CODE (in
) == SUBREG
&& GET_CODE (SUBREG_REG (in
)) == REG
1131 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1132 && ! dont_remove_subreg
)
1133 in
= gen_rtx_REG (GET_MODE (in
),
1134 REGNO (SUBREG_REG (in
)) + SUBREG_WORD (in
));
1136 /* Similarly for OUT. */
1137 if (out
!= 0 && GET_CODE (out
) == SUBREG
1138 && GET_CODE (SUBREG_REG (out
)) == REG
1139 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1140 && ! dont_remove_subreg
)
1141 out
= gen_rtx_REG (GET_MODE (out
),
1142 REGNO (SUBREG_REG (out
)) + SUBREG_WORD (out
));
1144 /* Narrow down the class of register wanted if that is
1145 desirable on this machine for efficiency. */
1147 class = PREFERRED_RELOAD_CLASS (in
, class);
1149 /* Output reloads may need analogous treatment, different in detail. */
1150 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1152 class = PREFERRED_OUTPUT_RELOAD_CLASS (out
, class);
1155 /* Make sure we use a class that can handle the actual pseudo
1156 inside any subreg. For example, on the 386, QImode regs
1157 can appear within SImode subregs. Although GENERAL_REGS
1158 can handle SImode, QImode needs a smaller class. */
1159 #ifdef LIMIT_RELOAD_CLASS
1161 class = LIMIT_RELOAD_CLASS (inmode
, class);
1162 else if (in
!= 0 && GET_CODE (in
) == SUBREG
)
1163 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in
)), class);
1166 class = LIMIT_RELOAD_CLASS (outmode
, class);
1167 if (out
!= 0 && GET_CODE (out
) == SUBREG
)
1168 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out
)), class);
1171 /* Verify that this class is at least possible for the mode that
1173 if (this_insn_is_asm
)
1175 enum machine_mode mode
;
1176 if (GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (outmode
))
1180 if (mode
== VOIDmode
)
1182 error_for_asm (this_insn
, "cannot reload integer constant operand in `asm'");
1187 outmode
= word_mode
;
1189 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1190 if (HARD_REGNO_MODE_OK (i
, mode
)
1191 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
))
1193 int nregs
= HARD_REGNO_NREGS (i
, mode
);
1196 for (j
= 1; j
< nregs
; j
++)
1197 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
+ j
))
1202 if (i
== FIRST_PSEUDO_REGISTER
)
1204 error_for_asm (this_insn
, "impossible register constraint in `asm'");
1209 /* Optional output reloads are always OK even if we have no register class,
1210 since the function of these reloads is only to have spill_reg_store etc.
1211 set, so that the storing insn can be deleted later. */
1212 if (class == NO_REGS
1213 && (optional
== 0 || type
!= RELOAD_FOR_OUTPUT
))
1216 i
= find_reusable_reload (&in
, out
, class, type
, opnum
, dont_share
);
1220 /* See if we need a secondary reload register to move between CLASS
1221 and IN or CLASS and OUT. Get the icode and push any required reloads
1222 needed for each of them if so. */
1224 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1227 = push_secondary_reload (1, in
, opnum
, optional
, class, inmode
, type
,
1228 &secondary_in_icode
);
1231 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1232 if (out
!= 0 && GET_CODE (out
) != SCRATCH
)
1233 secondary_out_reload
1234 = push_secondary_reload (0, out
, opnum
, optional
, class, outmode
,
1235 type
, &secondary_out_icode
);
1238 /* We found no existing reload suitable for re-use.
1239 So add an additional reload. */
1241 #ifdef SECONDARY_MEMORY_NEEDED
1242 /* If a memory location is needed for the copy, make one. */
1243 if (in
!= 0 && GET_CODE (in
) == REG
1244 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1245 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in
)),
1247 get_secondary_mem (in
, inmode
, opnum
, type
);
1253 rld
[i
].class = class;
1254 rld
[i
].inmode
= inmode
;
1255 rld
[i
].outmode
= outmode
;
1257 rld
[i
].optional
= optional
;
1259 rld
[i
].nocombine
= 0;
1260 rld
[i
].in_reg
= inloc
? *inloc
: 0;
1261 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1262 rld
[i
].opnum
= opnum
;
1263 rld
[i
].when_needed
= type
;
1264 rld
[i
].secondary_in_reload
= secondary_in_reload
;
1265 rld
[i
].secondary_out_reload
= secondary_out_reload
;
1266 rld
[i
].secondary_in_icode
= secondary_in_icode
;
1267 rld
[i
].secondary_out_icode
= secondary_out_icode
;
1268 rld
[i
].secondary_p
= 0;
1272 #ifdef SECONDARY_MEMORY_NEEDED
1273 if (out
!= 0 && GET_CODE (out
) == REG
1274 && REGNO (out
) < FIRST_PSEUDO_REGISTER
1275 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out
)),
1277 get_secondary_mem (out
, outmode
, opnum
, type
);
1282 /* We are reusing an existing reload,
1283 but we may have additional information for it.
1284 For example, we may now have both IN and OUT
1285 while the old one may have just one of them. */
1287 /* The modes can be different. If they are, we want to reload in
1288 the larger mode, so that the value is valid for both modes. */
1289 if (inmode
!= VOIDmode
1290 && GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (rld
[i
].inmode
))
1291 rld
[i
].inmode
= inmode
;
1292 if (outmode
!= VOIDmode
1293 && GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (rld
[i
].outmode
))
1294 rld
[i
].outmode
= outmode
;
1297 rtx in_reg
= inloc
? *inloc
: 0;
1298 /* If we merge reloads for two distinct rtl expressions that
1299 are identical in content, there might be duplicate address
1300 reloads. Remove the extra set now, so that if we later find
1301 that we can inherit this reload, we can get rid of the
1302 address reloads altogether.
1304 Do not do this if both reloads are optional since the result
1305 would be an optional reload which could potentially leave
1306 unresolved address replacements.
1308 It is not sufficient to call transfer_replacements since
1309 choose_reload_regs will remove the replacements for address
1310 reloads of inherited reloads which results in the same
1312 if (rld
[i
].in
!= in
&& rtx_equal_p (in
, rld
[i
].in
)
1313 && ! (rld
[i
].optional
&& optional
))
1315 /* We must keep the address reload with the lower operand
1317 if (opnum
> rld
[i
].opnum
)
1319 remove_address_replacements (in
);
1321 in_reg
= rld
[i
].in_reg
;
1324 remove_address_replacements (rld
[i
].in
);
1327 rld
[i
].in_reg
= in_reg
;
1332 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1334 if (reg_class_subset_p (class, rld
[i
].class))
1335 rld
[i
].class = class;
1336 rld
[i
].optional
&= optional
;
1337 if (MERGE_TO_OTHER (type
, rld
[i
].when_needed
,
1338 opnum
, rld
[i
].opnum
))
1339 rld
[i
].when_needed
= RELOAD_OTHER
;
1340 rld
[i
].opnum
= MIN (rld
[i
].opnum
, opnum
);
1343 /* If the ostensible rtx being reload differs from the rtx found
1344 in the location to substitute, this reload is not safe to combine
1345 because we cannot reliably tell whether it appears in the insn. */
1347 if (in
!= 0 && in
!= *inloc
)
1348 rld
[i
].nocombine
= 1;
1351 /* This was replaced by changes in find_reloads_address_1 and the new
1352 function inc_for_reload, which go with a new meaning of reload_inc. */
1354 /* If this is an IN/OUT reload in an insn that sets the CC,
1355 it must be for an autoincrement. It doesn't work to store
1356 the incremented value after the insn because that would clobber the CC.
1357 So we must do the increment of the value reloaded from,
1358 increment it, store it back, then decrement again. */
1359 if (out
!= 0 && sets_cc0_p (PATTERN (this_insn
)))
1363 rld
[i
].inc
= find_inc_amount (PATTERN (this_insn
), in
);
1364 /* If we did not find a nonzero amount-to-increment-by,
1365 that contradicts the belief that IN is being incremented
1366 in an address in this insn. */
1367 if (rld
[i
].inc
== 0)
1372 /* If we will replace IN and OUT with the reload-reg,
1373 record where they are located so that substitution need
1374 not do a tree walk. */
1376 if (replace_reloads
)
1380 register struct replacement
*r
= &replacements
[n_replacements
++];
1382 r
->subreg_loc
= in_subreg_loc
;
1386 if (outloc
!= 0 && outloc
!= inloc
)
1388 register struct replacement
*r
= &replacements
[n_replacements
++];
1391 r
->subreg_loc
= out_subreg_loc
;
1396 /* If this reload is just being introduced and it has both
1397 an incoming quantity and an outgoing quantity that are
1398 supposed to be made to match, see if either one of the two
1399 can serve as the place to reload into.
1401 If one of them is acceptable, set rld[i].reg_rtx
1404 if (in
!= 0 && out
!= 0 && in
!= out
&& rld
[i
].reg_rtx
== 0)
1406 rld
[i
].reg_rtx
= find_dummy_reload (in
, out
, inloc
, outloc
,
1409 earlyclobber_operand_p (out
));
1411 /* If the outgoing register already contains the same value
1412 as the incoming one, we can dispense with loading it.
1413 The easiest way to tell the caller that is to give a phony
1414 value for the incoming operand (same as outgoing one). */
1415 if (rld
[i
].reg_rtx
== out
1416 && (GET_CODE (in
) == REG
|| CONSTANT_P (in
))
1417 && 0 != find_equiv_reg (in
, this_insn
, 0, REGNO (out
),
1418 static_reload_reg_p
, i
, inmode
))
1422 /* If this is an input reload and the operand contains a register that
1423 dies in this insn and is used nowhere else, see if it is the right class
1424 to be used for this reload. Use it if so. (This occurs most commonly
1425 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1426 this if it is also an output reload that mentions the register unless
1427 the output is a SUBREG that clobbers an entire register.
1429 Note that the operand might be one of the spill regs, if it is a
1430 pseudo reg and we are in a block where spilling has not taken place.
1431 But if there is no spilling in this block, that is OK.
1432 An explicitly used hard reg cannot be a spill reg. */
1434 if (rld
[i
].reg_rtx
== 0 && in
!= 0)
1439 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1440 if (REG_NOTE_KIND (note
) == REG_DEAD
1441 && GET_CODE (XEXP (note
, 0)) == REG
1442 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1443 && reg_mentioned_p (XEXP (note
, 0), in
)
1444 && ! refers_to_regno_for_reload_p (regno
,
1446 + HARD_REGNO_NREGS (regno
,
1448 PATTERN (this_insn
), inloc
)
1449 /* If this is also an output reload, IN cannot be used as
1450 the reload register if it is set in this insn unless IN
1452 && (out
== 0 || in
== out
1453 || ! hard_reg_set_here_p (regno
,
1455 + HARD_REGNO_NREGS (regno
,
1457 PATTERN (this_insn
)))
1458 /* ??? Why is this code so different from the previous?
1459 Is there any simple coherent way to describe the two together?
1460 What's going on here. */
1462 || (GET_CODE (in
) == SUBREG
1463 && (((GET_MODE_SIZE (GET_MODE (in
)) + (UNITS_PER_WORD
- 1))
1465 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1466 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))))
1467 /* Make sure the operand fits in the reg that dies. */
1468 && GET_MODE_SIZE (inmode
) <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0)))
1469 && HARD_REGNO_MODE_OK (regno
, inmode
)
1470 && GET_MODE_SIZE (outmode
) <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0)))
1471 && HARD_REGNO_MODE_OK (regno
, outmode
))
1474 int nregs
= HARD_REGNO_NREGS (regno
, inmode
);
1475 for (offs
= 0; offs
< nregs
; offs
++)
1476 if (fixed_regs
[regno
+ offs
]
1477 || ! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1483 rld
[i
].reg_rtx
= gen_rtx_REG (inmode
, regno
);
1490 output_reloadnum
= i
;
1495 /* Record an additional place we must replace a value
1496 for which we have already recorded a reload.
1497 RELOADNUM is the value returned by push_reload
1498 when the reload was recorded.
1499 This is used in insn patterns that use match_dup. */
1502 push_replacement (loc
, reloadnum
, mode
)
1505 enum machine_mode mode
;
1507 if (replace_reloads
)
1509 register struct replacement
*r
= &replacements
[n_replacements
++];
1510 r
->what
= reloadnum
;
1517 /* Transfer all replacements that used to be in reload FROM to be in
1521 transfer_replacements (to
, from
)
1526 for (i
= 0; i
< n_replacements
; i
++)
1527 if (replacements
[i
].what
== from
)
1528 replacements
[i
].what
= to
;
1531 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1532 or a subpart of it. If we have any replacements registered for IN_RTX,
1533 cancel the reloads that were supposed to load them.
1534 Return non-zero if we canceled any reloads. */
1536 remove_address_replacements (in_rtx
)
1540 char reload_flags
[MAX_RELOADS
];
1541 int something_changed
= 0;
1543 bzero (reload_flags
, sizeof reload_flags
);
1544 for (i
= 0, j
= 0; i
< n_replacements
; i
++)
1546 if (loc_mentioned_in_p (replacements
[i
].where
, in_rtx
))
1547 reload_flags
[replacements
[i
].what
] |= 1;
1550 replacements
[j
++] = replacements
[i
];
1551 reload_flags
[replacements
[i
].what
] |= 2;
1554 /* Note that the following store must be done before the recursive calls. */
1557 for (i
= n_reloads
- 1; i
>= 0; i
--)
1559 if (reload_flags
[i
] == 1)
1561 deallocate_reload_reg (i
);
1562 remove_address_replacements (rld
[i
].in
);
1564 something_changed
= 1;
1567 return something_changed
;
1570 /* If there is only one output reload, and it is not for an earlyclobber
1571 operand, try to combine it with a (logically unrelated) input reload
1572 to reduce the number of reload registers needed.
1574 This is safe if the input reload does not appear in
1575 the value being output-reloaded, because this implies
1576 it is not needed any more once the original insn completes.
1578 If that doesn't work, see we can use any of the registers that
1579 die in this insn as a reload register. We can if it is of the right
1580 class and does not appear in the value being output-reloaded. */
1586 int output_reload
= -1;
1587 int secondary_out
= -1;
1590 /* Find the output reload; return unless there is exactly one
1591 and that one is mandatory. */
1593 for (i
= 0; i
< n_reloads
; i
++)
1594 if (rld
[i
].out
!= 0)
1596 if (output_reload
>= 0)
1601 if (output_reload
< 0 || rld
[output_reload
].optional
)
1604 /* An input-output reload isn't combinable. */
1606 if (rld
[output_reload
].in
!= 0)
1609 /* If this reload is for an earlyclobber operand, we can't do anything. */
1610 if (earlyclobber_operand_p (rld
[output_reload
].out
))
1613 /* Check each input reload; can we combine it? */
1615 for (i
= 0; i
< n_reloads
; i
++)
1616 if (rld
[i
].in
&& ! rld
[i
].optional
&& ! rld
[i
].nocombine
1617 /* Life span of this reload must not extend past main insn. */
1618 && rld
[i
].when_needed
!= RELOAD_FOR_OUTPUT_ADDRESS
1619 && rld
[i
].when_needed
!= RELOAD_FOR_OUTADDR_ADDRESS
1620 && rld
[i
].when_needed
!= RELOAD_OTHER
1621 && (CLASS_MAX_NREGS (rld
[i
].class, rld
[i
].inmode
)
1622 == CLASS_MAX_NREGS (rld
[output_reload
].class,
1623 rld
[output_reload
].outmode
))
1625 && rld
[i
].reg_rtx
== 0
1626 #ifdef SECONDARY_MEMORY_NEEDED
1627 /* Don't combine two reloads with different secondary
1628 memory locations. */
1629 && (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
] == 0
1630 || secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] == 0
1631 || rtx_equal_p (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
],
1632 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
]))
1634 && (SMALL_REGISTER_CLASSES
1635 ? (rld
[i
].class == rld
[output_reload
].class)
1636 : (reg_class_subset_p (rld
[i
].class,
1637 rld
[output_reload
].class)
1638 || reg_class_subset_p (rld
[output_reload
].class,
1640 && (MATCHES (rld
[i
].in
, rld
[output_reload
].out
)
1641 /* Args reversed because the first arg seems to be
1642 the one that we imagine being modified
1643 while the second is the one that might be affected. */
1644 || (! reg_overlap_mentioned_for_reload_p (rld
[output_reload
].out
,
1646 /* However, if the input is a register that appears inside
1647 the output, then we also can't share.
1648 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1649 If the same reload reg is used for both reg 69 and the
1650 result to be stored in memory, then that result
1651 will clobber the address of the memory ref. */
1652 && ! (GET_CODE (rld
[i
].in
) == REG
1653 && reg_overlap_mentioned_for_reload_p (rld
[i
].in
,
1654 rld
[output_reload
].out
))))
1655 && (reg_class_size
[(int) rld
[i
].class]
1656 || SMALL_REGISTER_CLASSES
)
1657 /* We will allow making things slightly worse by combining an
1658 input and an output, but no worse than that. */
1659 && (rld
[i
].when_needed
== RELOAD_FOR_INPUT
1660 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT
))
1664 /* We have found a reload to combine with! */
1665 rld
[i
].out
= rld
[output_reload
].out
;
1666 rld
[i
].out_reg
= rld
[output_reload
].out_reg
;
1667 rld
[i
].outmode
= rld
[output_reload
].outmode
;
1668 /* Mark the old output reload as inoperative. */
1669 rld
[output_reload
].out
= 0;
1670 /* The combined reload is needed for the entire insn. */
1671 rld
[i
].when_needed
= RELOAD_OTHER
;
1672 /* If the output reload had a secondary reload, copy it. */
1673 if (rld
[output_reload
].secondary_out_reload
!= -1)
1675 rld
[i
].secondary_out_reload
1676 = rld
[output_reload
].secondary_out_reload
;
1677 rld
[i
].secondary_out_icode
1678 = rld
[output_reload
].secondary_out_icode
;
1681 #ifdef SECONDARY_MEMORY_NEEDED
1682 /* Copy any secondary MEM. */
1683 if (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] != 0)
1684 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
]
1685 = secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
];
1687 /* If required, minimize the register class. */
1688 if (reg_class_subset_p (rld
[output_reload
].class,
1690 rld
[i
].class = rld
[output_reload
].class;
1692 /* Transfer all replacements from the old reload to the combined. */
1693 for (j
= 0; j
< n_replacements
; j
++)
1694 if (replacements
[j
].what
== output_reload
)
1695 replacements
[j
].what
= i
;
1700 /* If this insn has only one operand that is modified or written (assumed
1701 to be the first), it must be the one corresponding to this reload. It
1702 is safe to use anything that dies in this insn for that output provided
1703 that it does not occur in the output (we already know it isn't an
1704 earlyclobber. If this is an asm insn, give up. */
1706 if (INSN_CODE (this_insn
) == -1)
1709 for (i
= 1; i
< insn_data
[INSN_CODE (this_insn
)].n_operands
; i
++)
1710 if (insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '='
1711 || insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '+')
1714 /* See if some hard register that dies in this insn and is not used in
1715 the output is the right class. Only works if the register we pick
1716 up can fully hold our output reload. */
1717 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1718 if (REG_NOTE_KIND (note
) == REG_DEAD
1719 && GET_CODE (XEXP (note
, 0)) == REG
1720 && ! reg_overlap_mentioned_for_reload_p (XEXP (note
, 0),
1721 rld
[output_reload
].out
)
1722 && REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1723 && HARD_REGNO_MODE_OK (REGNO (XEXP (note
, 0)), rld
[output_reload
].outmode
)
1724 && TEST_HARD_REG_BIT (reg_class_contents
[(int) rld
[output_reload
].class],
1725 REGNO (XEXP (note
, 0)))
1726 && (HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), rld
[output_reload
].outmode
)
1727 <= HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), GET_MODE (XEXP (note
, 0))))
1728 /* Ensure that a secondary or tertiary reload for this output
1729 won't want this register. */
1730 && ((secondary_out
= rld
[output_reload
].secondary_out_reload
) == -1
1731 || (! (TEST_HARD_REG_BIT
1732 (reg_class_contents
[(int) rld
[secondary_out
].class],
1733 REGNO (XEXP (note
, 0))))
1734 && ((secondary_out
= rld
[secondary_out
].secondary_out_reload
) == -1
1735 || ! (TEST_HARD_REG_BIT
1736 (reg_class_contents
[(int) rld
[secondary_out
].class],
1737 REGNO (XEXP (note
, 0)))))))
1738 && ! fixed_regs
[REGNO (XEXP (note
, 0))])
1740 rld
[output_reload
].reg_rtx
1741 = gen_rtx_REG (rld
[output_reload
].outmode
,
1742 REGNO (XEXP (note
, 0)));
1747 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1748 See if one of IN and OUT is a register that may be used;
1749 this is desirable since a spill-register won't be needed.
1750 If so, return the register rtx that proves acceptable.
1752 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1753 CLASS is the register class required for the reload.
1755 If FOR_REAL is >= 0, it is the number of the reload,
1756 and in some cases when it can be discovered that OUT doesn't need
1757 to be computed, clear out rld[FOR_REAL].out.
1759 If FOR_REAL is -1, this should not be done, because this call
1760 is just to see if a register can be found, not to find and install it.
1762 EARLYCLOBBER is non-zero if OUT is an earlyclobber operand. This
1763 puts an additional constraint on being able to use IN for OUT since
1764 IN must not appear elsewhere in the insn (it is assumed that IN itself
1765 is safe from the earlyclobber). */
1768 find_dummy_reload (real_in
, real_out
, inloc
, outloc
,
1769 inmode
, outmode
, class, for_real
, earlyclobber
)
1770 rtx real_in
, real_out
;
1771 rtx
*inloc
, *outloc
;
1772 enum machine_mode inmode
, outmode
;
1773 enum reg_class
class;
1783 /* If operands exceed a word, we can't use either of them
1784 unless they have the same size. */
1785 if (GET_MODE_SIZE (outmode
) != GET_MODE_SIZE (inmode
)
1786 && (GET_MODE_SIZE (outmode
) > UNITS_PER_WORD
1787 || GET_MODE_SIZE (inmode
) > UNITS_PER_WORD
))
1790 /* Find the inside of any subregs. */
1791 while (GET_CODE (out
) == SUBREG
)
1793 out_offset
= SUBREG_WORD (out
);
1794 out
= SUBREG_REG (out
);
1796 while (GET_CODE (in
) == SUBREG
)
1798 in_offset
= SUBREG_WORD (in
);
1799 in
= SUBREG_REG (in
);
1802 /* Narrow down the reg class, the same way push_reload will;
1803 otherwise we might find a dummy now, but push_reload won't. */
1804 class = PREFERRED_RELOAD_CLASS (in
, class);
1806 /* See if OUT will do. */
1807 if (GET_CODE (out
) == REG
1808 && REGNO (out
) < FIRST_PSEUDO_REGISTER
)
1810 unsigned int regno
= REGNO (out
) + out_offset
;
1811 unsigned int nwords
= HARD_REGNO_NREGS (regno
, outmode
);
1814 /* When we consider whether the insn uses OUT,
1815 ignore references within IN. They don't prevent us
1816 from copying IN into OUT, because those refs would
1817 move into the insn that reloads IN.
1819 However, we only ignore IN in its role as this reload.
1820 If the insn uses IN elsewhere and it contains OUT,
1821 that counts. We can't be sure it's the "same" operand
1822 so it might not go through this reload. */
1824 *inloc
= const0_rtx
;
1826 if (regno
< FIRST_PSEUDO_REGISTER
1827 && ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1828 PATTERN (this_insn
), outloc
))
1832 for (i
= 0; i
< nwords
; i
++)
1833 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1839 if (GET_CODE (real_out
) == REG
)
1842 value
= gen_rtx_REG (outmode
, regno
);
1849 /* Consider using IN if OUT was not acceptable
1850 or if OUT dies in this insn (like the quotient in a divmod insn).
1851 We can't use IN unless it is dies in this insn,
1852 which means we must know accurately which hard regs are live.
1853 Also, the result can't go in IN if IN is used within OUT,
1854 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1855 if (hard_regs_live_known
1856 && GET_CODE (in
) == REG
1857 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1859 || find_reg_note (this_insn
, REG_UNUSED
, real_out
))
1860 && find_reg_note (this_insn
, REG_DEAD
, real_in
)
1861 && !fixed_regs
[REGNO (in
)]
1862 && HARD_REGNO_MODE_OK (REGNO (in
),
1863 /* The only case where out and real_out might
1864 have different modes is where real_out
1865 is a subreg, and in that case, out
1867 (GET_MODE (out
) != VOIDmode
1868 ? GET_MODE (out
) : outmode
)))
1870 unsigned int regno
= REGNO (in
) + in_offset
;
1871 unsigned int nwords
= HARD_REGNO_NREGS (regno
, inmode
);
1873 if (! refers_to_regno_for_reload_p (regno
, regno
+ nwords
, out
, NULL_PTR
)
1874 && ! hard_reg_set_here_p (regno
, regno
+ nwords
,
1875 PATTERN (this_insn
))
1877 || ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1878 PATTERN (this_insn
), inloc
)))
1882 for (i
= 0; i
< nwords
; i
++)
1883 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1889 /* If we were going to use OUT as the reload reg
1890 and changed our mind, it means OUT is a dummy that
1891 dies here. So don't bother copying value to it. */
1892 if (for_real
>= 0 && value
== real_out
)
1893 rld
[for_real
].out
= 0;
1894 if (GET_CODE (real_in
) == REG
)
1897 value
= gen_rtx_REG (inmode
, regno
);
1905 /* This page contains subroutines used mainly for determining
1906 whether the IN or an OUT of a reload can serve as the
1909 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
1912 earlyclobber_operand_p (x
)
1917 for (i
= 0; i
< n_earlyclobbers
; i
++)
1918 if (reload_earlyclobbers
[i
] == x
)
1924 /* Return 1 if expression X alters a hard reg in the range
1925 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1926 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1927 X should be the body of an instruction. */
1930 hard_reg_set_here_p (beg_regno
, end_regno
, x
)
1931 unsigned int beg_regno
, end_regno
;
1934 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
1936 register rtx op0
= SET_DEST (x
);
1938 while (GET_CODE (op0
) == SUBREG
)
1939 op0
= SUBREG_REG (op0
);
1940 if (GET_CODE (op0
) == REG
)
1942 unsigned int r
= REGNO (op0
);
1944 /* See if this reg overlaps range under consideration. */
1946 && r
+ HARD_REGNO_NREGS (r
, GET_MODE (op0
)) > beg_regno
)
1950 else if (GET_CODE (x
) == PARALLEL
)
1952 register int i
= XVECLEN (x
, 0) - 1;
1955 if (hard_reg_set_here_p (beg_regno
, end_regno
, XVECEXP (x
, 0, i
)))
1962 /* Return 1 if ADDR is a valid memory address for mode MODE,
1963 and check that each pseudo reg has the proper kind of
1967 strict_memory_address_p (mode
, addr
)
1968 enum machine_mode mode ATTRIBUTE_UNUSED
;
1971 GO_IF_LEGITIMATE_ADDRESS (mode
, addr
, win
);
1978 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
1979 if they are the same hard reg, and has special hacks for
1980 autoincrement and autodecrement.
1981 This is specifically intended for find_reloads to use
1982 in determining whether two operands match.
1983 X is the operand whose number is the lower of the two.
1985 The value is 2 if Y contains a pre-increment that matches
1986 a non-incrementing address in X. */
1988 /* ??? To be completely correct, we should arrange to pass
1989 for X the output operand and for Y the input operand.
1990 For now, we assume that the output operand has the lower number
1991 because that is natural in (SET output (... input ...)). */
1994 operands_match_p (x
, y
)
1998 register RTX_CODE code
= GET_CODE (x
);
1999 register const char *fmt
;
2004 if ((code
== REG
|| (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
))
2005 && (GET_CODE (y
) == REG
|| (GET_CODE (y
) == SUBREG
2006 && GET_CODE (SUBREG_REG (y
)) == REG
)))
2012 i
= REGNO (SUBREG_REG (x
));
2013 if (i
>= FIRST_PSEUDO_REGISTER
)
2015 i
+= SUBREG_WORD (x
);
2020 if (GET_CODE (y
) == SUBREG
)
2022 j
= REGNO (SUBREG_REG (y
));
2023 if (j
>= FIRST_PSEUDO_REGISTER
)
2025 j
+= SUBREG_WORD (y
);
2030 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2031 multiple hard register group, so that for example (reg:DI 0) and
2032 (reg:SI 1) will be considered the same register. */
2033 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
2034 && i
< FIRST_PSEUDO_REGISTER
)
2035 i
+= (GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
) - 1;
2036 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (y
)) > UNITS_PER_WORD
2037 && j
< FIRST_PSEUDO_REGISTER
)
2038 j
+= (GET_MODE_SIZE (GET_MODE (y
)) / UNITS_PER_WORD
) - 1;
2042 /* If two operands must match, because they are really a single
2043 operand of an assembler insn, then two postincrements are invalid
2044 because the assembler insn would increment only once.
2045 On the other hand, an postincrement matches ordinary indexing
2046 if the postincrement is the output operand. */
2047 if (code
== POST_DEC
|| code
== POST_INC
)
2048 return operands_match_p (XEXP (x
, 0), y
);
2049 /* Two preincrements are invalid
2050 because the assembler insn would increment only once.
2051 On the other hand, an preincrement matches ordinary indexing
2052 if the preincrement is the input operand.
2053 In this case, return 2, since some callers need to do special
2054 things when this happens. */
2055 if (GET_CODE (y
) == PRE_DEC
|| GET_CODE (y
) == PRE_INC
)
2056 return operands_match_p (x
, XEXP (y
, 0)) ? 2 : 0;
2060 /* Now we have disposed of all the cases
2061 in which different rtx codes can match. */
2062 if (code
!= GET_CODE (y
))
2064 if (code
== LABEL_REF
)
2065 return XEXP (x
, 0) == XEXP (y
, 0);
2066 if (code
== SYMBOL_REF
)
2067 return XSTR (x
, 0) == XSTR (y
, 0);
2069 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2071 if (GET_MODE (x
) != GET_MODE (y
))
2074 /* Compare the elements. If any pair of corresponding elements
2075 fail to match, return 0 for the whole things. */
2078 fmt
= GET_RTX_FORMAT (code
);
2079 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2085 if (XWINT (x
, i
) != XWINT (y
, i
))
2090 if (XINT (x
, i
) != XINT (y
, i
))
2095 val
= operands_match_p (XEXP (x
, i
), XEXP (y
, i
));
2098 /* If any subexpression returns 2,
2099 we should return 2 if we are successful. */
2108 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2110 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; --j
)
2112 val
= operands_match_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
));
2120 /* It is believed that rtx's at this level will never
2121 contain anything but integers and other rtx's,
2122 except for within LABEL_REFs and SYMBOL_REFs. */
2127 return 1 + success_2
;
2130 /* Describe the range of registers or memory referenced by X.
2131 If X is a register, set REG_FLAG and put the first register
2132 number into START and the last plus one into END.
2133 If X is a memory reference, put a base address into BASE
2134 and a range of integer offsets into START and END.
2135 If X is pushing on the stack, we can assume it causes no trouble,
2136 so we set the SAFE field. */
2138 static struct decomposition
2142 struct decomposition val
;
2148 if (GET_CODE (x
) == MEM
)
2150 rtx base
= NULL_RTX
, offset
= 0;
2151 rtx addr
= XEXP (x
, 0);
2153 if (GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
2154 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
2156 val
.base
= XEXP (addr
, 0);
2157 val
.start
= - GET_MODE_SIZE (GET_MODE (x
));
2158 val
.end
= GET_MODE_SIZE (GET_MODE (x
));
2159 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2163 if (GET_CODE (addr
) == CONST
)
2165 addr
= XEXP (addr
, 0);
2168 if (GET_CODE (addr
) == PLUS
)
2170 if (CONSTANT_P (XEXP (addr
, 0)))
2172 base
= XEXP (addr
, 1);
2173 offset
= XEXP (addr
, 0);
2175 else if (CONSTANT_P (XEXP (addr
, 1)))
2177 base
= XEXP (addr
, 0);
2178 offset
= XEXP (addr
, 1);
2185 offset
= const0_rtx
;
2187 if (GET_CODE (offset
) == CONST
)
2188 offset
= XEXP (offset
, 0);
2189 if (GET_CODE (offset
) == PLUS
)
2191 if (GET_CODE (XEXP (offset
, 0)) == CONST_INT
)
2193 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 1));
2194 offset
= XEXP (offset
, 0);
2196 else if (GET_CODE (XEXP (offset
, 1)) == CONST_INT
)
2198 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 0));
2199 offset
= XEXP (offset
, 1);
2203 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2204 offset
= const0_rtx
;
2207 else if (GET_CODE (offset
) != CONST_INT
)
2209 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2210 offset
= const0_rtx
;
2213 if (all_const
&& GET_CODE (base
) == PLUS
)
2214 base
= gen_rtx_CONST (GET_MODE (base
), base
);
2216 if (GET_CODE (offset
) != CONST_INT
)
2219 val
.start
= INTVAL (offset
);
2220 val
.end
= val
.start
+ GET_MODE_SIZE (GET_MODE (x
));
2224 else if (GET_CODE (x
) == REG
)
2227 val
.start
= true_regnum (x
);
2230 /* A pseudo with no hard reg. */
2231 val
.start
= REGNO (x
);
2232 val
.end
= val
.start
+ 1;
2236 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2238 else if (GET_CODE (x
) == SUBREG
)
2240 if (GET_CODE (SUBREG_REG (x
)) != REG
)
2241 /* This could be more precise, but it's good enough. */
2242 return decompose (SUBREG_REG (x
));
2244 val
.start
= true_regnum (x
);
2246 return decompose (SUBREG_REG (x
));
2249 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2251 else if (CONSTANT_P (x
)
2252 /* This hasn't been assigned yet, so it can't conflict yet. */
2253 || GET_CODE (x
) == SCRATCH
)
2260 /* Return 1 if altering Y will not modify the value of X.
2261 Y is also described by YDATA, which should be decompose (Y). */
2264 immune_p (x
, y
, ydata
)
2266 struct decomposition ydata
;
2268 struct decomposition xdata
;
2271 return !refers_to_regno_for_reload_p (ydata
.start
, ydata
.end
, x
, NULL_PTR
);
2275 if (GET_CODE (y
) != MEM
)
2277 /* If Y is memory and X is not, Y can't affect X. */
2278 if (GET_CODE (x
) != MEM
)
2281 xdata
= decompose (x
);
2283 if (! rtx_equal_p (xdata
.base
, ydata
.base
))
2285 /* If bases are distinct symbolic constants, there is no overlap. */
2286 if (CONSTANT_P (xdata
.base
) && CONSTANT_P (ydata
.base
))
2288 /* Constants and stack slots never overlap. */
2289 if (CONSTANT_P (xdata
.base
)
2290 && (ydata
.base
== frame_pointer_rtx
2291 || ydata
.base
== hard_frame_pointer_rtx
2292 || ydata
.base
== stack_pointer_rtx
))
2294 if (CONSTANT_P (ydata
.base
)
2295 && (xdata
.base
== frame_pointer_rtx
2296 || xdata
.base
== hard_frame_pointer_rtx
2297 || xdata
.base
== stack_pointer_rtx
))
2299 /* If either base is variable, we don't know anything. */
2304 return (xdata
.start
>= ydata
.end
|| ydata
.start
>= xdata
.end
);
2307 /* Similar, but calls decompose. */
2310 safe_from_earlyclobber (op
, clobber
)
2313 struct decomposition early_data
;
2315 early_data
= decompose (clobber
);
2316 return immune_p (op
, clobber
, early_data
);
2319 /* Main entry point of this file: search the body of INSN
2320 for values that need reloading and record them with push_reload.
2321 REPLACE nonzero means record also where the values occur
2322 so that subst_reloads can be used.
2324 IND_LEVELS says how many levels of indirection are supported by this
2325 machine; a value of zero means that a memory reference is not a valid
2328 LIVE_KNOWN says we have valid information about which hard
2329 regs are live at each point in the program; this is true when
2330 we are called from global_alloc but false when stupid register
2331 allocation has been done.
2333 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2334 which is nonnegative if the reg has been commandeered for reloading into.
2335 It is copied into STATIC_RELOAD_REG_P and referenced from there
2336 by various subroutines.
2338 Return TRUE if some operands need to be changed, because of swapping
2339 commutative operands, reg_equiv_address substitution, or whatever. */
2342 find_reloads (insn
, replace
, ind_levels
, live_known
, reload_reg_p
)
2344 int replace
, ind_levels
;
2346 short *reload_reg_p
;
2348 register int insn_code_number
;
2351 /* These start out as the constraints for the insn
2352 and they are chewed up as we consider alternatives. */
2353 char *constraints
[MAX_RECOG_OPERANDS
];
2354 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2356 enum reg_class preferred_class
[MAX_RECOG_OPERANDS
];
2357 char pref_or_nothing
[MAX_RECOG_OPERANDS
];
2358 /* Nonzero for a MEM operand whose entire address needs a reload. */
2359 int address_reloaded
[MAX_RECOG_OPERANDS
];
2360 /* Value of enum reload_type to use for operand. */
2361 enum reload_type operand_type
[MAX_RECOG_OPERANDS
];
2362 /* Value of enum reload_type to use within address of operand. */
2363 enum reload_type address_type
[MAX_RECOG_OPERANDS
];
2364 /* Save the usage of each operand. */
2365 enum reload_usage
{ RELOAD_READ
, RELOAD_READ_WRITE
, RELOAD_WRITE
} modified
[MAX_RECOG_OPERANDS
];
2366 int no_input_reloads
= 0, no_output_reloads
= 0;
2368 int this_alternative
[MAX_RECOG_OPERANDS
];
2369 char this_alternative_win
[MAX_RECOG_OPERANDS
];
2370 char this_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2371 char this_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2372 int this_alternative_matches
[MAX_RECOG_OPERANDS
];
2374 int goal_alternative
[MAX_RECOG_OPERANDS
];
2375 int this_alternative_number
;
2376 int goal_alternative_number
= 0;
2377 int operand_reloadnum
[MAX_RECOG_OPERANDS
];
2378 int goal_alternative_matches
[MAX_RECOG_OPERANDS
];
2379 int goal_alternative_matched
[MAX_RECOG_OPERANDS
];
2380 char goal_alternative_win
[MAX_RECOG_OPERANDS
];
2381 char goal_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2382 char goal_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2383 int goal_alternative_swapped
;
2386 char operands_match
[MAX_RECOG_OPERANDS
][MAX_RECOG_OPERANDS
];
2387 rtx substed_operand
[MAX_RECOG_OPERANDS
];
2388 rtx body
= PATTERN (insn
);
2389 rtx set
= single_set (insn
);
2390 int goal_earlyclobber
= 0, this_earlyclobber
;
2391 enum machine_mode operand_mode
[MAX_RECOG_OPERANDS
];
2397 n_earlyclobbers
= 0;
2398 replace_reloads
= replace
;
2399 hard_regs_live_known
= live_known
;
2400 static_reload_reg_p
= reload_reg_p
;
2402 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2403 neither are insns that SET cc0. Insns that use CC0 are not allowed
2404 to have any input reloads. */
2405 if (GET_CODE (insn
) == JUMP_INSN
|| GET_CODE (insn
) == CALL_INSN
)
2406 no_output_reloads
= 1;
2409 if (reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
2410 no_input_reloads
= 1;
2411 if (reg_set_p (cc0_rtx
, PATTERN (insn
)))
2412 no_output_reloads
= 1;
2415 #ifdef SECONDARY_MEMORY_NEEDED
2416 /* The eliminated forms of any secondary memory locations are per-insn, so
2417 clear them out here. */
2419 bzero ((char *) secondary_memlocs_elim
, sizeof secondary_memlocs_elim
);
2422 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2423 is cheap to move between them. If it is not, there may not be an insn
2424 to do the copy, so we may need a reload. */
2425 if (GET_CODE (body
) == SET
2426 && GET_CODE (SET_DEST (body
)) == REG
2427 && REGNO (SET_DEST (body
)) < FIRST_PSEUDO_REGISTER
2428 && GET_CODE (SET_SRC (body
)) == REG
2429 && REGNO (SET_SRC (body
)) < FIRST_PSEUDO_REGISTER
2430 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body
))),
2431 REGNO_REG_CLASS (REGNO (SET_DEST (body
)))) == 2)
2434 extract_insn (insn
);
2436 noperands
= reload_n_operands
= recog_data
.n_operands
;
2437 n_alternatives
= recog_data
.n_alternatives
;
2439 /* Just return "no reloads" if insn has no operands with constraints. */
2440 if (noperands
== 0 || n_alternatives
== 0)
2443 insn_code_number
= INSN_CODE (insn
);
2444 this_insn_is_asm
= insn_code_number
< 0;
2446 memcpy (operand_mode
, recog_data
.operand_mode
,
2447 noperands
* sizeof (enum machine_mode
));
2448 memcpy (constraints
, recog_data
.constraints
, noperands
* sizeof (char *));
2452 /* If we will need to know, later, whether some pair of operands
2453 are the same, we must compare them now and save the result.
2454 Reloading the base and index registers will clobber them
2455 and afterward they will fail to match. */
2457 for (i
= 0; i
< noperands
; i
++)
2462 substed_operand
[i
] = recog_data
.operand
[i
];
2465 modified
[i
] = RELOAD_READ
;
2467 /* Scan this operand's constraint to see if it is an output operand,
2468 an in-out operand, is commutative, or should match another. */
2473 modified
[i
] = RELOAD_WRITE
;
2475 modified
[i
] = RELOAD_READ_WRITE
;
2478 /* The last operand should not be marked commutative. */
2479 if (i
== noperands
- 1)
2484 else if (c
>= '0' && c
<= '9')
2487 operands_match
[c
][i
]
2488 = operands_match_p (recog_data
.operand
[c
],
2489 recog_data
.operand
[i
]);
2491 /* An operand may not match itself. */
2495 /* If C can be commuted with C+1, and C might need to match I,
2496 then C+1 might also need to match I. */
2497 if (commutative
>= 0)
2499 if (c
== commutative
|| c
== commutative
+ 1)
2501 int other
= c
+ (c
== commutative
? 1 : -1);
2502 operands_match
[other
][i
]
2503 = operands_match_p (recog_data
.operand
[other
],
2504 recog_data
.operand
[i
]);
2506 if (i
== commutative
|| i
== commutative
+ 1)
2508 int other
= i
+ (i
== commutative
? 1 : -1);
2509 operands_match
[c
][other
]
2510 = operands_match_p (recog_data
.operand
[c
],
2511 recog_data
.operand
[other
]);
2513 /* Note that C is supposed to be less than I.
2514 No need to consider altering both C and I because in
2515 that case we would alter one into the other. */
2521 /* Examine each operand that is a memory reference or memory address
2522 and reload parts of the addresses into index registers.
2523 Also here any references to pseudo regs that didn't get hard regs
2524 but are equivalent to constants get replaced in the insn itself
2525 with those constants. Nobody will ever see them again.
2527 Finally, set up the preferred classes of each operand. */
2529 for (i
= 0; i
< noperands
; i
++)
2531 register RTX_CODE code
= GET_CODE (recog_data
.operand
[i
]);
2533 address_reloaded
[i
] = 0;
2534 operand_type
[i
] = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT
2535 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT
2538 = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT_ADDRESS
2539 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT_ADDRESS
2542 if (*constraints
[i
] == 0)
2543 /* Ignore things like match_operator operands. */
2545 else if (constraints
[i
][0] == 'p')
2547 find_reloads_address (VOIDmode
, NULL_PTR
,
2548 recog_data
.operand
[i
],
2549 recog_data
.operand_loc
[i
],
2550 i
, operand_type
[i
], ind_levels
, insn
);
2552 /* If we now have a simple operand where we used to have a
2553 PLUS or MULT, re-recognize and try again. */
2554 if ((GET_RTX_CLASS (GET_CODE (*recog_data
.operand_loc
[i
])) == 'o'
2555 || GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2556 && (GET_CODE (recog_data
.operand
[i
]) == MULT
2557 || GET_CODE (recog_data
.operand
[i
]) == PLUS
))
2559 INSN_CODE (insn
) = -1;
2560 retval
= find_reloads (insn
, replace
, ind_levels
, live_known
,
2565 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2566 substed_operand
[i
] = recog_data
.operand
[i
];
2568 else if (code
== MEM
)
2571 = find_reloads_address (GET_MODE (recog_data
.operand
[i
]),
2572 recog_data
.operand_loc
[i
],
2573 XEXP (recog_data
.operand
[i
], 0),
2574 &XEXP (recog_data
.operand
[i
], 0),
2575 i
, address_type
[i
], ind_levels
, insn
);
2576 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2577 substed_operand
[i
] = recog_data
.operand
[i
];
2579 else if (code
== SUBREG
)
2581 rtx reg
= SUBREG_REG (recog_data
.operand
[i
]);
2583 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2586 && &SET_DEST (set
) == recog_data
.operand_loc
[i
],
2589 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2590 that didn't get a hard register, emit a USE with a REG_EQUAL
2591 note in front so that we might inherit a previous, possibly
2595 && GET_CODE (op
) == MEM
2596 && GET_CODE (reg
) == REG
2597 && (GET_MODE_SIZE (GET_MODE (reg
))
2598 >= GET_MODE_SIZE (GET_MODE (op
))))
2599 REG_NOTES (emit_insn_before (gen_rtx_USE (VOIDmode
, reg
), insn
))
2600 = gen_rtx_EXPR_LIST (REG_EQUAL
,
2601 reg_equiv_memory_loc
[REGNO (reg
)], NULL_RTX
);
2603 substed_operand
[i
] = recog_data
.operand
[i
] = op
;
2605 else if (code
== PLUS
|| GET_RTX_CLASS (code
) == '1')
2606 /* We can get a PLUS as an "operand" as a result of register
2607 elimination. See eliminate_regs and gen_reload. We handle
2608 a unary operator by reloading the operand. */
2609 substed_operand
[i
] = recog_data
.operand
[i
]
2610 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2611 ind_levels
, 0, insn
);
2612 else if (code
== REG
)
2614 /* This is equivalent to calling find_reloads_toplev.
2615 The code is duplicated for speed.
2616 When we find a pseudo always equivalent to a constant,
2617 we replace it by the constant. We must be sure, however,
2618 that we don't try to replace it in the insn in which it
2620 register int regno
= REGNO (recog_data
.operand
[i
]);
2621 if (reg_equiv_constant
[regno
] != 0
2622 && (set
== 0 || &SET_DEST (set
) != recog_data
.operand_loc
[i
]))
2624 /* Record the existing mode so that the check if constants are
2625 allowed will work when operand_mode isn't specified. */
2627 if (operand_mode
[i
] == VOIDmode
)
2628 operand_mode
[i
] = GET_MODE (recog_data
.operand
[i
]);
2630 substed_operand
[i
] = recog_data
.operand
[i
]
2631 = reg_equiv_constant
[regno
];
2633 if (reg_equiv_memory_loc
[regno
] != 0
2634 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
2635 /* We need not give a valid is_set_dest argument since the case
2636 of a constant equivalence was checked above. */
2637 substed_operand
[i
] = recog_data
.operand
[i
]
2638 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2639 ind_levels
, 0, insn
);
2641 /* If the operand is still a register (we didn't replace it with an
2642 equivalent), get the preferred class to reload it into. */
2643 code
= GET_CODE (recog_data
.operand
[i
]);
2645 = ((code
== REG
&& REGNO (recog_data
.operand
[i
])
2646 >= FIRST_PSEUDO_REGISTER
)
2647 ? reg_preferred_class (REGNO (recog_data
.operand
[i
]))
2651 && REGNO (recog_data
.operand
[i
]) >= FIRST_PSEUDO_REGISTER
2652 && reg_alternate_class (REGNO (recog_data
.operand
[i
])) == NO_REGS
);
2655 /* If this is simply a copy from operand 1 to operand 0, merge the
2656 preferred classes for the operands. */
2657 if (set
!= 0 && noperands
>= 2 && recog_data
.operand
[0] == SET_DEST (set
)
2658 && recog_data
.operand
[1] == SET_SRC (set
))
2660 preferred_class
[0] = preferred_class
[1]
2661 = reg_class_subunion
[(int) preferred_class
[0]][(int) preferred_class
[1]];
2662 pref_or_nothing
[0] |= pref_or_nothing
[1];
2663 pref_or_nothing
[1] |= pref_or_nothing
[0];
2666 /* Now see what we need for pseudo-regs that didn't get hard regs
2667 or got the wrong kind of hard reg. For this, we must consider
2668 all the operands together against the register constraints. */
2670 best
= MAX_RECOG_OPERANDS
* 2 + 600;
2673 goal_alternative_swapped
= 0;
2676 /* The constraints are made of several alternatives.
2677 Each operand's constraint looks like foo,bar,... with commas
2678 separating the alternatives. The first alternatives for all
2679 operands go together, the second alternatives go together, etc.
2681 First loop over alternatives. */
2683 for (this_alternative_number
= 0;
2684 this_alternative_number
< n_alternatives
;
2685 this_alternative_number
++)
2687 /* Loop over operands for one constraint alternative. */
2688 /* LOSERS counts those that don't fit this alternative
2689 and would require loading. */
2691 /* BAD is set to 1 if it some operand can't fit this alternative
2692 even after reloading. */
2694 /* REJECT is a count of how undesirable this alternative says it is
2695 if any reloading is required. If the alternative matches exactly
2696 then REJECT is ignored, but otherwise it gets this much
2697 counted against it in addition to the reloading needed. Each
2698 ? counts three times here since we want the disparaging caused by
2699 a bad register class to only count 1/3 as much. */
2702 this_earlyclobber
= 0;
2704 for (i
= 0; i
< noperands
; i
++)
2706 register char *p
= constraints
[i
];
2707 register int win
= 0;
2708 /* 0 => this operand can be reloaded somehow for this alternative */
2710 /* 0 => this operand can be reloaded if the alternative allows regs. */
2713 register rtx operand
= recog_data
.operand
[i
];
2715 /* Nonzero means this is a MEM that must be reloaded into a reg
2716 regardless of what the constraint says. */
2717 int force_reload
= 0;
2719 /* Nonzero if a constant forced into memory would be OK for this
2722 int earlyclobber
= 0;
2724 /* If the predicate accepts a unary operator, it means that
2725 we need to reload the operand, but do not do this for
2726 match_operator and friends. */
2727 if (GET_RTX_CLASS (GET_CODE (operand
)) == '1' && *p
!= 0)
2728 operand
= XEXP (operand
, 0);
2730 /* If the operand is a SUBREG, extract
2731 the REG or MEM (or maybe even a constant) within.
2732 (Constants can occur as a result of reg_equiv_constant.) */
2734 while (GET_CODE (operand
) == SUBREG
)
2736 offset
+= SUBREG_WORD (operand
);
2737 operand
= SUBREG_REG (operand
);
2738 /* Force reload if this is a constant or PLUS or if there may
2739 be a problem accessing OPERAND in the outer mode. */
2740 if (CONSTANT_P (operand
)
2741 || GET_CODE (operand
) == PLUS
2742 /* We must force a reload of paradoxical SUBREGs
2743 of a MEM because the alignment of the inner value
2744 may not be enough to do the outer reference. On
2745 big-endian machines, it may also reference outside
2748 On machines that extend byte operations and we have a
2749 SUBREG where both the inner and outer modes are no wider
2750 than a word and the inner mode is narrower, is integral,
2751 and gets extended when loaded from memory, combine.c has
2752 made assumptions about the behavior of the machine in such
2753 register access. If the data is, in fact, in memory we
2754 must always load using the size assumed to be in the
2755 register and let the insn do the different-sized
2758 This is doubly true if WORD_REGISTER_OPERATIONS. In
2759 this case eliminate_regs has left non-paradoxical
2760 subregs for push_reloads to see. Make sure it does
2761 by forcing the reload.
2763 ??? When is it right at this stage to have a subreg
2764 of a mem that is _not_ to be handled specialy? IMO
2765 those should have been reduced to just a mem. */
2766 || ((GET_CODE (operand
) == MEM
2767 || (GET_CODE (operand
)== REG
2768 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
2769 #ifndef WORD_REGISTER_OPERATIONS
2770 && (((GET_MODE_BITSIZE (GET_MODE (operand
))
2771 < BIGGEST_ALIGNMENT
)
2772 && (GET_MODE_SIZE (operand_mode
[i
])
2773 > GET_MODE_SIZE (GET_MODE (operand
))))
2774 || (GET_CODE (operand
) == MEM
&& BYTES_BIG_ENDIAN
)
2775 #ifdef LOAD_EXTEND_OP
2776 || (GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2777 && (GET_MODE_SIZE (GET_MODE (operand
))
2779 && (GET_MODE_SIZE (operand_mode
[i
])
2780 > GET_MODE_SIZE (GET_MODE (operand
)))
2781 && INTEGRAL_MODE_P (GET_MODE (operand
))
2782 && LOAD_EXTEND_OP (GET_MODE (operand
)) != NIL
)
2787 /* Subreg of a hard reg which can't handle the subreg's mode
2788 or which would handle that mode in the wrong number of
2789 registers for subregging to work. */
2790 || (GET_CODE (operand
) == REG
2791 && REGNO (operand
) < FIRST_PSEUDO_REGISTER
2792 && ((GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2793 && (GET_MODE_SIZE (GET_MODE (operand
))
2795 && ((GET_MODE_SIZE (GET_MODE (operand
))
2797 != HARD_REGNO_NREGS (REGNO (operand
),
2798 GET_MODE (operand
))))
2799 || ! HARD_REGNO_MODE_OK (REGNO (operand
) + offset
,
2804 this_alternative
[i
] = (int) NO_REGS
;
2805 this_alternative_win
[i
] = 0;
2806 this_alternative_offmemok
[i
] = 0;
2807 this_alternative_earlyclobber
[i
] = 0;
2808 this_alternative_matches
[i
] = -1;
2810 /* An empty constraint or empty alternative
2811 allows anything which matched the pattern. */
2812 if (*p
== 0 || *p
== ',')
2815 /* Scan this alternative's specs for this operand;
2816 set WIN if the operand fits any letter in this alternative.
2817 Otherwise, clear BADOP if this operand could
2818 fit some letter after reloads,
2819 or set WINREG if this operand could fit after reloads
2820 provided the constraint allows some registers. */
2822 while (*p
&& (c
= *p
++) != ',')
2825 case '=': case '+': case '*':
2829 /* The last operand should not be marked commutative. */
2830 if (i
!= noperands
- 1)
2843 /* Ignore rest of this alternative as far as
2844 reloading is concerned. */
2845 while (*p
&& *p
!= ',') p
++;
2848 case '0': case '1': case '2': case '3': case '4':
2849 case '5': case '6': case '7': case '8': case '9':
2852 this_alternative_matches
[i
] = c
;
2853 /* We are supposed to match a previous operand.
2854 If we do, we win if that one did.
2855 If we do not, count both of the operands as losers.
2856 (This is too conservative, since most of the time
2857 only a single reload insn will be needed to make
2858 the two operands win. As a result, this alternative
2859 may be rejected when it is actually desirable.) */
2860 if ((swapped
&& (c
!= commutative
|| i
!= commutative
+ 1))
2861 /* If we are matching as if two operands were swapped,
2862 also pretend that operands_match had been computed
2864 But if I is the second of those and C is the first,
2865 don't exchange them, because operands_match is valid
2866 only on one side of its diagonal. */
2868 [(c
== commutative
|| c
== commutative
+ 1)
2869 ? 2*commutative
+ 1 - c
: c
]
2870 [(i
== commutative
|| i
== commutative
+ 1)
2871 ? 2*commutative
+ 1 - i
: i
])
2872 : operands_match
[c
][i
])
2874 /* If we are matching a non-offsettable address where an
2875 offsettable address was expected, then we must reject
2876 this combination, because we can't reload it. */
2877 if (this_alternative_offmemok
[c
]
2878 && GET_CODE (recog_data
.operand
[c
]) == MEM
2879 && this_alternative
[c
] == (int) NO_REGS
2880 && ! this_alternative_win
[c
])
2883 win
= this_alternative_win
[c
];
2887 /* Operands don't match. */
2889 /* Retroactively mark the operand we had to match
2890 as a loser, if it wasn't already. */
2891 if (this_alternative_win
[c
])
2893 this_alternative_win
[c
] = 0;
2894 if (this_alternative
[c
] == (int) NO_REGS
)
2896 /* But count the pair only once in the total badness of
2897 this alternative, if the pair can be a dummy reload. */
2899 = find_dummy_reload (recog_data
.operand
[i
],
2900 recog_data
.operand
[c
],
2901 recog_data
.operand_loc
[i
],
2902 recog_data
.operand_loc
[c
],
2903 operand_mode
[i
], operand_mode
[c
],
2904 this_alternative
[c
], -1,
2905 this_alternative_earlyclobber
[c
]);
2910 /* This can be fixed with reloads if the operand
2911 we are supposed to match can be fixed with reloads. */
2913 this_alternative
[i
] = this_alternative
[c
];
2915 /* If we have to reload this operand and some previous
2916 operand also had to match the same thing as this
2917 operand, we don't know how to do that. So reject this
2919 if (! win
|| force_reload
)
2920 for (j
= 0; j
< i
; j
++)
2921 if (this_alternative_matches
[j
]
2922 == this_alternative_matches
[i
])
2928 /* All necessary reloads for an address_operand
2929 were handled in find_reloads_address. */
2930 this_alternative
[i
] = (int) BASE_REG_CLASS
;
2937 if (GET_CODE (operand
) == MEM
2938 || (GET_CODE (operand
) == REG
2939 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
2940 && reg_renumber
[REGNO (operand
)] < 0))
2942 if (CONSTANT_P (operand
)
2943 /* force_const_mem does not accept HIGH. */
2944 && GET_CODE (operand
) != HIGH
)
2950 if (GET_CODE (operand
) == MEM
2951 && ! address_reloaded
[i
]
2952 && (GET_CODE (XEXP (operand
, 0)) == PRE_DEC
2953 || GET_CODE (XEXP (operand
, 0)) == POST_DEC
))
2958 if (GET_CODE (operand
) == MEM
2959 && ! address_reloaded
[i
]
2960 && (GET_CODE (XEXP (operand
, 0)) == PRE_INC
2961 || GET_CODE (XEXP (operand
, 0)) == POST_INC
))
2965 /* Memory operand whose address is not offsettable. */
2969 if (GET_CODE (operand
) == MEM
2970 && ! (ind_levels
? offsettable_memref_p (operand
)
2971 : offsettable_nonstrict_memref_p (operand
))
2972 /* Certain mem addresses will become offsettable
2973 after they themselves are reloaded. This is important;
2974 we don't want our own handling of unoffsettables
2975 to override the handling of reg_equiv_address. */
2976 && !(GET_CODE (XEXP (operand
, 0)) == REG
2978 || reg_equiv_address
[REGNO (XEXP (operand
, 0))] != 0)))
2982 /* Memory operand whose address is offsettable. */
2986 if ((GET_CODE (operand
) == MEM
2987 /* If IND_LEVELS, find_reloads_address won't reload a
2988 pseudo that didn't get a hard reg, so we have to
2989 reject that case. */
2990 && ((ind_levels
? offsettable_memref_p (operand
)
2991 : offsettable_nonstrict_memref_p (operand
))
2992 /* A reloaded address is offsettable because it is now
2993 just a simple register indirect. */
2994 || address_reloaded
[i
]))
2995 || (GET_CODE (operand
) == REG
2996 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
2997 && reg_renumber
[REGNO (operand
)] < 0
2998 /* If reg_equiv_address is nonzero, we will be
2999 loading it into a register; hence it will be
3000 offsettable, but we cannot say that reg_equiv_mem
3001 is offsettable without checking. */
3002 && ((reg_equiv_mem
[REGNO (operand
)] != 0
3003 && offsettable_memref_p (reg_equiv_mem
[REGNO (operand
)]))
3004 || (reg_equiv_address
[REGNO (operand
)] != 0))))
3006 /* force_const_mem does not accept HIGH. */
3007 if ((CONSTANT_P (operand
) && GET_CODE (operand
) != HIGH
)
3008 || GET_CODE (operand
) == MEM
)
3015 /* Output operand that is stored before the need for the
3016 input operands (and their index registers) is over. */
3017 earlyclobber
= 1, this_earlyclobber
= 1;
3021 #ifndef REAL_ARITHMETIC
3022 /* Match any floating double constant, but only if
3023 we can examine the bits of it reliably. */
3024 if ((HOST_FLOAT_FORMAT
!= TARGET_FLOAT_FORMAT
3025 || HOST_BITS_PER_WIDE_INT
!= BITS_PER_WORD
)
3026 && GET_MODE (operand
) != VOIDmode
&& ! flag_pretend_float
)
3029 if (GET_CODE (operand
) == CONST_DOUBLE
)
3034 if (GET_CODE (operand
) == CONST_DOUBLE
)
3040 if (GET_CODE (operand
) == CONST_DOUBLE
3041 && CONST_DOUBLE_OK_FOR_LETTER_P (operand
, c
))
3046 if (GET_CODE (operand
) == CONST_INT
3047 || (GET_CODE (operand
) == CONST_DOUBLE
3048 && GET_MODE (operand
) == VOIDmode
))
3051 if (CONSTANT_P (operand
)
3052 #ifdef LEGITIMATE_PIC_OPERAND_P
3053 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (operand
))
3060 if (GET_CODE (operand
) == CONST_INT
3061 || (GET_CODE (operand
) == CONST_DOUBLE
3062 && GET_MODE (operand
) == VOIDmode
))
3074 if (GET_CODE (operand
) == CONST_INT
3075 && CONST_OK_FOR_LETTER_P (INTVAL (operand
), c
))
3085 /* A PLUS is never a valid operand, but reload can make
3086 it from a register when eliminating registers. */
3087 && GET_CODE (operand
) != PLUS
3088 /* A SCRATCH is not a valid operand. */
3089 && GET_CODE (operand
) != SCRATCH
3090 #ifdef LEGITIMATE_PIC_OPERAND_P
3091 && (! CONSTANT_P (operand
)
3093 || LEGITIMATE_PIC_OPERAND_P (operand
))
3095 && (GENERAL_REGS
== ALL_REGS
3096 || GET_CODE (operand
) != REG
3097 || (REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3098 && reg_renumber
[REGNO (operand
)] < 0)))
3100 /* Drop through into 'r' case */
3104 = (int) reg_class_subunion
[this_alternative
[i
]][(int) GENERAL_REGS
];
3107 #ifdef EXTRA_CONSTRAINT
3113 if (EXTRA_CONSTRAINT (operand
, c
))
3120 = (int) reg_class_subunion
[this_alternative
[i
]][(int) REG_CLASS_FROM_LETTER (c
)];
3123 if (GET_MODE (operand
) == BLKmode
)
3126 if (GET_CODE (operand
) == REG
3127 && reg_fits_class_p (operand
, this_alternative
[i
],
3128 offset
, GET_MODE (recog_data
.operand
[i
])))
3135 /* If this operand could be handled with a reg,
3136 and some reg is allowed, then this operand can be handled. */
3137 if (winreg
&& this_alternative
[i
] != (int) NO_REGS
)
3140 /* Record which operands fit this alternative. */
3141 this_alternative_earlyclobber
[i
] = earlyclobber
;
3142 if (win
&& ! force_reload
)
3143 this_alternative_win
[i
] = 1;
3146 int const_to_mem
= 0;
3148 this_alternative_offmemok
[i
] = offmemok
;
3152 /* Alternative loses if it has no regs for a reg operand. */
3153 if (GET_CODE (operand
) == REG
3154 && this_alternative
[i
] == (int) NO_REGS
3155 && this_alternative_matches
[i
] < 0)
3158 /* If this is a constant that is reloaded into the desired
3159 class by copying it to memory first, count that as another
3160 reload. This is consistent with other code and is
3161 required to avoid choosing another alternative when
3162 the constant is moved into memory by this function on
3163 an early reload pass. Note that the test here is
3164 precisely the same as in the code below that calls
3166 if (CONSTANT_P (operand
)
3167 /* force_const_mem does not accept HIGH. */
3168 && GET_CODE (operand
) != HIGH
3169 && ((PREFERRED_RELOAD_CLASS (operand
,
3170 (enum reg_class
) this_alternative
[i
])
3172 || no_input_reloads
)
3173 && operand_mode
[i
] != VOIDmode
)
3176 if (this_alternative
[i
] != (int) NO_REGS
)
3180 /* If we can't reload this value at all, reject this
3181 alternative. Note that we could also lose due to
3182 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3185 if (! CONSTANT_P (operand
)
3186 && (enum reg_class
) this_alternative
[i
] != NO_REGS
3187 && (PREFERRED_RELOAD_CLASS (operand
,
3188 (enum reg_class
) this_alternative
[i
])
3192 /* Alternative loses if it requires a type of reload not
3193 permitted for this insn. We can always reload SCRATCH
3194 and objects with a REG_UNUSED note. */
3195 else if (GET_CODE (operand
) != SCRATCH
3196 && modified
[i
] != RELOAD_READ
&& no_output_reloads
3197 && ! find_reg_note (insn
, REG_UNUSED
, operand
))
3199 else if (modified
[i
] != RELOAD_WRITE
&& no_input_reloads
3204 /* We prefer to reload pseudos over reloading other things,
3205 since such reloads may be able to be eliminated later.
3206 If we are reloading a SCRATCH, we won't be generating any
3207 insns, just using a register, so it is also preferred.
3208 So bump REJECT in other cases. Don't do this in the
3209 case where we are forcing a constant into memory and
3210 it will then win since we don't want to have a different
3211 alternative match then. */
3212 if (! (GET_CODE (operand
) == REG
3213 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
3214 && GET_CODE (operand
) != SCRATCH
3215 && ! (const_to_mem
&& constmemok
))
3218 /* Input reloads can be inherited more often than output
3219 reloads can be removed, so penalize output reloads. */
3220 if (operand_type
[i
] != RELOAD_FOR_INPUT
3221 && GET_CODE (operand
) != SCRATCH
)
3225 /* If this operand is a pseudo register that didn't get a hard
3226 reg and this alternative accepts some register, see if the
3227 class that we want is a subset of the preferred class for this
3228 register. If not, but it intersects that class, use the
3229 preferred class instead. If it does not intersect the preferred
3230 class, show that usage of this alternative should be discouraged;
3231 it will be discouraged more still if the register is `preferred
3232 or nothing'. We do this because it increases the chance of
3233 reusing our spill register in a later insn and avoiding a pair
3234 of memory stores and loads.
3236 Don't bother with this if this alternative will accept this
3239 Don't do this for a multiword operand, since it is only a
3240 small win and has the risk of requiring more spill registers,
3241 which could cause a large loss.
3243 Don't do this if the preferred class has only one register
3244 because we might otherwise exhaust the class. */
3247 if (! win
&& this_alternative
[i
] != (int) NO_REGS
3248 && GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
3249 && reg_class_size
[(int) preferred_class
[i
]] > 1)
3251 if (! reg_class_subset_p (this_alternative
[i
],
3252 preferred_class
[i
]))
3254 /* Since we don't have a way of forming the intersection,
3255 we just do something special if the preferred class
3256 is a subset of the class we have; that's the most
3257 common case anyway. */
3258 if (reg_class_subset_p (preferred_class
[i
],
3259 this_alternative
[i
]))
3260 this_alternative
[i
] = (int) preferred_class
[i
];
3262 reject
+= (2 + 2 * pref_or_nothing
[i
]);
3267 /* Now see if any output operands that are marked "earlyclobber"
3268 in this alternative conflict with any input operands
3269 or any memory addresses. */
3271 for (i
= 0; i
< noperands
; i
++)
3272 if (this_alternative_earlyclobber
[i
]
3273 && this_alternative_win
[i
])
3275 struct decomposition early_data
;
3277 early_data
= decompose (recog_data
.operand
[i
]);
3279 if (modified
[i
] == RELOAD_READ
)
3282 if (this_alternative
[i
] == NO_REGS
)
3284 this_alternative_earlyclobber
[i
] = 0;
3285 if (this_insn_is_asm
)
3286 error_for_asm (this_insn
,
3287 "`&' constraint used with no register class");
3292 for (j
= 0; j
< noperands
; j
++)
3293 /* Is this an input operand or a memory ref? */
3294 if ((GET_CODE (recog_data
.operand
[j
]) == MEM
3295 || modified
[j
] != RELOAD_WRITE
)
3297 /* Ignore things like match_operator operands. */
3298 && *recog_data
.constraints
[j
] != 0
3299 /* Don't count an input operand that is constrained to match
3300 the early clobber operand. */
3301 && ! (this_alternative_matches
[j
] == i
3302 && rtx_equal_p (recog_data
.operand
[i
],
3303 recog_data
.operand
[j
]))
3304 /* Is it altered by storing the earlyclobber operand? */
3305 && !immune_p (recog_data
.operand
[j
], recog_data
.operand
[i
],
3308 /* If the output is in a single-reg class,
3309 it's costly to reload it, so reload the input instead. */
3310 if (reg_class_size
[this_alternative
[i
]] == 1
3311 && (GET_CODE (recog_data
.operand
[j
]) == REG
3312 || GET_CODE (recog_data
.operand
[j
]) == SUBREG
))
3315 this_alternative_win
[j
] = 0;
3320 /* If an earlyclobber operand conflicts with something,
3321 it must be reloaded, so request this and count the cost. */
3325 this_alternative_win
[i
] = 0;
3326 for (j
= 0; j
< noperands
; j
++)
3327 if (this_alternative_matches
[j
] == i
3328 && this_alternative_win
[j
])
3330 this_alternative_win
[j
] = 0;
3336 /* If one alternative accepts all the operands, no reload required,
3337 choose that alternative; don't consider the remaining ones. */
3340 /* Unswap these so that they are never swapped at `finish'. */
3341 if (commutative
>= 0)
3343 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3344 recog_data
.operand
[commutative
+ 1]
3345 = substed_operand
[commutative
+ 1];
3347 for (i
= 0; i
< noperands
; i
++)
3349 goal_alternative_win
[i
] = 1;
3350 goal_alternative
[i
] = this_alternative
[i
];
3351 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3352 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3353 goal_alternative_earlyclobber
[i
]
3354 = this_alternative_earlyclobber
[i
];
3356 goal_alternative_number
= this_alternative_number
;
3357 goal_alternative_swapped
= swapped
;
3358 goal_earlyclobber
= this_earlyclobber
;
3362 /* REJECT, set by the ! and ? constraint characters and when a register
3363 would be reloaded into a non-preferred class, discourages the use of
3364 this alternative for a reload goal. REJECT is incremented by six
3365 for each ? and two for each non-preferred class. */
3366 losers
= losers
* 6 + reject
;
3368 /* If this alternative can be made to work by reloading,
3369 and it needs less reloading than the others checked so far,
3370 record it as the chosen goal for reloading. */
3371 if (! bad
&& best
> losers
)
3373 for (i
= 0; i
< noperands
; i
++)
3375 goal_alternative
[i
] = this_alternative
[i
];
3376 goal_alternative_win
[i
] = this_alternative_win
[i
];
3377 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3378 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3379 goal_alternative_earlyclobber
[i
]
3380 = this_alternative_earlyclobber
[i
];
3382 goal_alternative_swapped
= swapped
;
3384 goal_alternative_number
= this_alternative_number
;
3385 goal_earlyclobber
= this_earlyclobber
;
3389 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3390 then we need to try each alternative twice,
3391 the second time matching those two operands
3392 as if we had exchanged them.
3393 To do this, really exchange them in operands.
3395 If we have just tried the alternatives the second time,
3396 return operands to normal and drop through. */
3398 if (commutative
>= 0)
3403 register enum reg_class tclass
;
3406 recog_data
.operand
[commutative
] = substed_operand
[commutative
+ 1];
3407 recog_data
.operand
[commutative
+ 1] = substed_operand
[commutative
];
3409 tclass
= preferred_class
[commutative
];
3410 preferred_class
[commutative
] = preferred_class
[commutative
+ 1];
3411 preferred_class
[commutative
+ 1] = tclass
;
3413 t
= pref_or_nothing
[commutative
];
3414 pref_or_nothing
[commutative
] = pref_or_nothing
[commutative
+ 1];
3415 pref_or_nothing
[commutative
+ 1] = t
;
3417 memcpy (constraints
, recog_data
.constraints
,
3418 noperands
* sizeof (char *));
3423 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3424 recog_data
.operand
[commutative
+ 1]
3425 = substed_operand
[commutative
+ 1];
3429 /* The operands don't meet the constraints.
3430 goal_alternative describes the alternative
3431 that we could reach by reloading the fewest operands.
3432 Reload so as to fit it. */
3434 if (best
== MAX_RECOG_OPERANDS
* 2 + 600)
3436 /* No alternative works with reloads?? */
3437 if (insn_code_number
>= 0)
3438 fatal_insn ("Unable to generate reloads for:", insn
);
3439 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3440 /* Avoid further trouble with this insn. */
3441 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3446 /* Jump to `finish' from above if all operands are valid already.
3447 In that case, goal_alternative_win is all 1. */
3450 /* Right now, for any pair of operands I and J that are required to match,
3452 goal_alternative_matches[J] is I.
3453 Set up goal_alternative_matched as the inverse function:
3454 goal_alternative_matched[I] = J. */
3456 for (i
= 0; i
< noperands
; i
++)
3457 goal_alternative_matched
[i
] = -1;
3459 for (i
= 0; i
< noperands
; i
++)
3460 if (! goal_alternative_win
[i
]
3461 && goal_alternative_matches
[i
] >= 0)
3462 goal_alternative_matched
[goal_alternative_matches
[i
]] = i
;
3464 /* If the best alternative is with operands 1 and 2 swapped,
3465 consider them swapped before reporting the reloads. Update the
3466 operand numbers of any reloads already pushed. */
3468 if (goal_alternative_swapped
)
3472 tem
= substed_operand
[commutative
];
3473 substed_operand
[commutative
] = substed_operand
[commutative
+ 1];
3474 substed_operand
[commutative
+ 1] = tem
;
3475 tem
= recog_data
.operand
[commutative
];
3476 recog_data
.operand
[commutative
] = recog_data
.operand
[commutative
+ 1];
3477 recog_data
.operand
[commutative
+ 1] = tem
;
3478 tem
= *recog_data
.operand_loc
[commutative
];
3479 *recog_data
.operand_loc
[commutative
]
3480 = *recog_data
.operand_loc
[commutative
+ 1];
3481 *recog_data
.operand_loc
[commutative
+1] = tem
;
3483 for (i
= 0; i
< n_reloads
; i
++)
3485 if (rld
[i
].opnum
== commutative
)
3486 rld
[i
].opnum
= commutative
+ 1;
3487 else if (rld
[i
].opnum
== commutative
+ 1)
3488 rld
[i
].opnum
= commutative
;
3492 for (i
= 0; i
< noperands
; i
++)
3494 operand_reloadnum
[i
] = -1;
3496 /* If this is an earlyclobber operand, we need to widen the scope.
3497 The reload must remain valid from the start of the insn being
3498 reloaded until after the operand is stored into its destination.
3499 We approximate this with RELOAD_OTHER even though we know that we
3500 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3502 One special case that is worth checking is when we have an
3503 output that is earlyclobber but isn't used past the insn (typically
3504 a SCRATCH). In this case, we only need have the reload live
3505 through the insn itself, but not for any of our input or output
3507 But we must not accidentally narrow the scope of an existing
3508 RELOAD_OTHER reload - leave these alone.
3510 In any case, anything needed to address this operand can remain
3511 however they were previously categorized. */
3513 if (goal_alternative_earlyclobber
[i
] && operand_type
[i
] != RELOAD_OTHER
)
3515 = (find_reg_note (insn
, REG_UNUSED
, recog_data
.operand
[i
])
3516 ? RELOAD_FOR_INSN
: RELOAD_OTHER
);
3519 /* Any constants that aren't allowed and can't be reloaded
3520 into registers are here changed into memory references. */
3521 for (i
= 0; i
< noperands
; i
++)
3522 if (! goal_alternative_win
[i
]
3523 && CONSTANT_P (recog_data
.operand
[i
])
3524 /* force_const_mem does not accept HIGH. */
3525 && GET_CODE (recog_data
.operand
[i
]) != HIGH
3526 && ((PREFERRED_RELOAD_CLASS (recog_data
.operand
[i
],
3527 (enum reg_class
) goal_alternative
[i
])
3529 || no_input_reloads
)
3530 && operand_mode
[i
] != VOIDmode
)
3532 substed_operand
[i
] = recog_data
.operand
[i
]
3533 = find_reloads_toplev (force_const_mem (operand_mode
[i
],
3534 recog_data
.operand
[i
]),
3535 i
, address_type
[i
], ind_levels
, 0, insn
);
3536 if (alternative_allows_memconst (recog_data
.constraints
[i
],
3537 goal_alternative_number
))
3538 goal_alternative_win
[i
] = 1;
3541 /* Record the values of the earlyclobber operands for the caller. */
3542 if (goal_earlyclobber
)
3543 for (i
= 0; i
< noperands
; i
++)
3544 if (goal_alternative_earlyclobber
[i
])
3545 reload_earlyclobbers
[n_earlyclobbers
++] = recog_data
.operand
[i
];
3547 /* Now record reloads for all the operands that need them. */
3548 for (i
= 0; i
< noperands
; i
++)
3549 if (! goal_alternative_win
[i
])
3551 /* Operands that match previous ones have already been handled. */
3552 if (goal_alternative_matches
[i
] >= 0)
3554 /* Handle an operand with a nonoffsettable address
3555 appearing where an offsettable address will do
3556 by reloading the address into a base register.
3558 ??? We can also do this when the operand is a register and
3559 reg_equiv_mem is not offsettable, but this is a bit tricky,
3560 so we don't bother with it. It may not be worth doing. */
3561 else if (goal_alternative_matched
[i
] == -1
3562 && goal_alternative_offmemok
[i
]
3563 && GET_CODE (recog_data
.operand
[i
]) == MEM
)
3565 operand_reloadnum
[i
]
3566 = push_reload (XEXP (recog_data
.operand
[i
], 0), NULL_RTX
,
3567 &XEXP (recog_data
.operand
[i
], 0), NULL_PTR
,
3569 GET_MODE (XEXP (recog_data
.operand
[i
], 0)),
3570 VOIDmode
, 0, 0, i
, RELOAD_FOR_INPUT
);
3571 rld
[operand_reloadnum
[i
]].inc
3572 = GET_MODE_SIZE (GET_MODE (recog_data
.operand
[i
]));
3574 /* If this operand is an output, we will have made any
3575 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3576 now we are treating part of the operand as an input, so
3577 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3579 if (modified
[i
] == RELOAD_WRITE
)
3581 for (j
= 0; j
< n_reloads
; j
++)
3583 if (rld
[j
].opnum
== i
)
3585 if (rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
)
3586 rld
[j
].when_needed
= RELOAD_FOR_INPUT_ADDRESS
;
3587 else if (rld
[j
].when_needed
3588 == RELOAD_FOR_OUTADDR_ADDRESS
)
3589 rld
[j
].when_needed
= RELOAD_FOR_INPADDR_ADDRESS
;
3594 else if (goal_alternative_matched
[i
] == -1)
3596 operand_reloadnum
[i
]
3597 = push_reload ((modified
[i
] != RELOAD_WRITE
3598 ? recog_data
.operand
[i
] : 0),
3599 (modified
[i
] != RELOAD_READ
3600 ? recog_data
.operand
[i
] : 0),
3601 (modified
[i
] != RELOAD_WRITE
3602 ? recog_data
.operand_loc
[i
] : 0),
3603 (modified
[i
] != RELOAD_READ
3604 ? recog_data
.operand_loc
[i
] : 0),
3605 (enum reg_class
) goal_alternative
[i
],
3606 (modified
[i
] == RELOAD_WRITE
3607 ? VOIDmode
: operand_mode
[i
]),
3608 (modified
[i
] == RELOAD_READ
3609 ? VOIDmode
: operand_mode
[i
]),
3610 (insn_code_number
< 0 ? 0
3611 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
3612 0, i
, operand_type
[i
]);
3614 /* In a matching pair of operands, one must be input only
3615 and the other must be output only.
3616 Pass the input operand as IN and the other as OUT. */
3617 else if (modified
[i
] == RELOAD_READ
3618 && modified
[goal_alternative_matched
[i
]] == RELOAD_WRITE
)
3620 operand_reloadnum
[i
]
3621 = push_reload (recog_data
.operand
[i
],
3622 recog_data
.operand
[goal_alternative_matched
[i
]],
3623 recog_data
.operand_loc
[i
],
3624 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
3625 (enum reg_class
) goal_alternative
[i
],
3627 operand_mode
[goal_alternative_matched
[i
]],
3628 0, 0, i
, RELOAD_OTHER
);
3629 operand_reloadnum
[goal_alternative_matched
[i
]] = output_reloadnum
;
3631 else if (modified
[i
] == RELOAD_WRITE
3632 && modified
[goal_alternative_matched
[i
]] == RELOAD_READ
)
3634 operand_reloadnum
[goal_alternative_matched
[i
]]
3635 = push_reload (recog_data
.operand
[goal_alternative_matched
[i
]],
3636 recog_data
.operand
[i
],
3637 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
3638 recog_data
.operand_loc
[i
],
3639 (enum reg_class
) goal_alternative
[i
],
3640 operand_mode
[goal_alternative_matched
[i
]],
3642 0, 0, i
, RELOAD_OTHER
);
3643 operand_reloadnum
[i
] = output_reloadnum
;
3645 else if (insn_code_number
>= 0)
3649 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3650 /* Avoid further trouble with this insn. */
3651 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3656 else if (goal_alternative_matched
[i
] < 0
3657 && goal_alternative_matches
[i
] < 0
3660 /* For each non-matching operand that's a MEM or a pseudo-register
3661 that didn't get a hard register, make an optional reload.
3662 This may get done even if the insn needs no reloads otherwise. */
3664 rtx operand
= recog_data
.operand
[i
];
3666 while (GET_CODE (operand
) == SUBREG
)
3667 operand
= XEXP (operand
, 0);
3668 if ((GET_CODE (operand
) == MEM
3669 || (GET_CODE (operand
) == REG
3670 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3671 /* If this is only for an output, the optional reload would not
3672 actually cause us to use a register now, just note that
3673 something is stored here. */
3674 && ((enum reg_class
) goal_alternative
[i
] != NO_REGS
3675 || modified
[i
] == RELOAD_WRITE
)
3676 && ! no_input_reloads
3677 /* An optional output reload might allow to delete INSN later.
3678 We mustn't make in-out reloads on insns that are not permitted
3680 If this is an asm, we can't delete it; we must not even call
3681 push_reload for an optional output reload in this case,
3682 because we can't be sure that the constraint allows a register,
3683 and push_reload verifies the constraints for asms. */
3684 && (modified
[i
] == RELOAD_READ
3685 || (! no_output_reloads
&& ! this_insn_is_asm
)))
3686 operand_reloadnum
[i
]
3687 = push_reload ((modified
[i
] != RELOAD_WRITE
3688 ? recog_data
.operand
[i
] : 0),
3689 (modified
[i
] != RELOAD_READ
3690 ? recog_data
.operand
[i
] : 0),
3691 (modified
[i
] != RELOAD_WRITE
3692 ? recog_data
.operand_loc
[i
] : 0),
3693 (modified
[i
] != RELOAD_READ
3694 ? recog_data
.operand_loc
[i
] : 0),
3695 (enum reg_class
) goal_alternative
[i
],
3696 (modified
[i
] == RELOAD_WRITE
3697 ? VOIDmode
: operand_mode
[i
]),
3698 (modified
[i
] == RELOAD_READ
3699 ? VOIDmode
: operand_mode
[i
]),
3700 (insn_code_number
< 0 ? 0
3701 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
3702 1, i
, operand_type
[i
]);
3703 /* If a memory reference remains (either as a MEM or a pseudo that
3704 did not get a hard register), yet we can't make an optional
3705 reload, check if this is actually a pseudo register reference;
3706 we then need to emit a USE and/or a CLOBBER so that reload
3707 inheritance will do the right thing. */
3709 && (GET_CODE (operand
) == MEM
3710 || (GET_CODE (operand
) == REG
3711 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3712 && reg_renumber
[REGNO (operand
)] < 0)))
3714 operand
= *recog_data
.operand_loc
[i
];
3716 while (GET_CODE (operand
) == SUBREG
)
3717 operand
= XEXP (operand
, 0);
3718 if (GET_CODE (operand
) == REG
)
3720 if (modified
[i
] != RELOAD_WRITE
)
3721 emit_insn_before (gen_rtx_USE (VOIDmode
, operand
), insn
);
3722 if (modified
[i
] != RELOAD_READ
)
3723 emit_insn_after (gen_rtx_CLOBBER (VOIDmode
, operand
), insn
);
3727 else if (goal_alternative_matches
[i
] >= 0
3728 && goal_alternative_win
[goal_alternative_matches
[i
]]
3729 && modified
[i
] == RELOAD_READ
3730 && modified
[goal_alternative_matches
[i
]] == RELOAD_WRITE
3731 && ! no_input_reloads
&& ! no_output_reloads
3734 /* Similarly, make an optional reload for a pair of matching
3735 objects that are in MEM or a pseudo that didn't get a hard reg. */
3737 rtx operand
= recog_data
.operand
[i
];
3739 while (GET_CODE (operand
) == SUBREG
)
3740 operand
= XEXP (operand
, 0);
3741 if ((GET_CODE (operand
) == MEM
3742 || (GET_CODE (operand
) == REG
3743 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3744 && ((enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]]
3746 operand_reloadnum
[i
] = operand_reloadnum
[goal_alternative_matches
[i
]]
3747 = push_reload (recog_data
.operand
[goal_alternative_matches
[i
]],
3748 recog_data
.operand
[i
],
3749 recog_data
.operand_loc
[goal_alternative_matches
[i
]],
3750 recog_data
.operand_loc
[i
],
3751 (enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]],
3752 operand_mode
[goal_alternative_matches
[i
]],
3754 0, 1, goal_alternative_matches
[i
], RELOAD_OTHER
);
3757 /* Perform whatever substitutions on the operands we are supposed
3758 to make due to commutativity or replacement of registers
3759 with equivalent constants or memory slots. */
3761 for (i
= 0; i
< noperands
; i
++)
3763 /* We only do this on the last pass through reload, because it is
3764 possible for some data (like reg_equiv_address) to be changed during
3765 later passes. Moreover, we loose the opportunity to get a useful
3766 reload_{in,out}_reg when we do these replacements. */
3770 rtx substitution
= substed_operand
[i
];
3772 *recog_data
.operand_loc
[i
] = substitution
;
3774 /* If we're replacing an operand with a LABEL_REF, we need
3775 to make sure that there's a REG_LABEL note attached to
3776 this instruction. */
3777 if (GET_CODE (insn
) != JUMP_INSN
3778 && GET_CODE (substitution
) == LABEL_REF
3779 && !find_reg_note (insn
, REG_LABEL
, XEXP (substitution
, 0)))
3780 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_LABEL
,
3781 XEXP (substitution
, 0),
3785 retval
|= (substed_operand
[i
] != *recog_data
.operand_loc
[i
]);
3788 /* If this insn pattern contains any MATCH_DUP's, make sure that
3789 they will be substituted if the operands they match are substituted.
3790 Also do now any substitutions we already did on the operands.
3792 Don't do this if we aren't making replacements because we might be
3793 propagating things allocated by frame pointer elimination into places
3794 it doesn't expect. */
3796 if (insn_code_number
>= 0 && replace
)
3797 for (i
= insn_data
[insn_code_number
].n_dups
- 1; i
>= 0; i
--)
3799 int opno
= recog_data
.dup_num
[i
];
3800 *recog_data
.dup_loc
[i
] = *recog_data
.operand_loc
[opno
];
3801 if (operand_reloadnum
[opno
] >= 0)
3802 push_replacement (recog_data
.dup_loc
[i
], operand_reloadnum
[opno
],
3803 insn_data
[insn_code_number
].operand
[opno
].mode
);
3807 /* This loses because reloading of prior insns can invalidate the equivalence
3808 (or at least find_equiv_reg isn't smart enough to find it any more),
3809 causing this insn to need more reload regs than it needed before.
3810 It may be too late to make the reload regs available.
3811 Now this optimization is done safely in choose_reload_regs. */
3813 /* For each reload of a reg into some other class of reg,
3814 search for an existing equivalent reg (same value now) in the right class.
3815 We can use it as long as we don't need to change its contents. */
3816 for (i
= 0; i
< n_reloads
; i
++)
3817 if (rld
[i
].reg_rtx
== 0
3819 && GET_CODE (rld
[i
].in
) == REG
3823 = find_equiv_reg (rld
[i
].in
, insn
, rld
[i
].class, -1,
3824 static_reload_reg_p
, 0, rld
[i
].inmode
);
3825 /* Prevent generation of insn to load the value
3826 because the one we found already has the value. */
3828 rld
[i
].in
= rld
[i
].reg_rtx
;
3832 /* Perhaps an output reload can be combined with another
3833 to reduce needs by one. */
3834 if (!goal_earlyclobber
)
3837 /* If we have a pair of reloads for parts of an address, they are reloading
3838 the same object, the operands themselves were not reloaded, and they
3839 are for two operands that are supposed to match, merge the reloads and
3840 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3842 for (i
= 0; i
< n_reloads
; i
++)
3846 for (j
= i
+ 1; j
< n_reloads
; j
++)
3847 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3848 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3849 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3850 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3851 && (rld
[j
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3852 || rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3853 || rld
[j
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3854 || rld
[j
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3855 && rtx_equal_p (rld
[i
].in
, rld
[j
].in
)
3856 && (operand_reloadnum
[rld
[i
].opnum
] < 0
3857 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
)
3858 && (operand_reloadnum
[rld
[j
].opnum
] < 0
3859 || rld
[operand_reloadnum
[rld
[j
].opnum
]].optional
)
3860 && (goal_alternative_matches
[rld
[i
].opnum
] == rld
[j
].opnum
3861 || (goal_alternative_matches
[rld
[j
].opnum
]
3864 for (k
= 0; k
< n_replacements
; k
++)
3865 if (replacements
[k
].what
== j
)
3866 replacements
[k
].what
= i
;
3868 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3869 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3870 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
3872 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
3877 /* Scan all the reloads and update their type.
3878 If a reload is for the address of an operand and we didn't reload
3879 that operand, change the type. Similarly, change the operand number
3880 of a reload when two operands match. If a reload is optional, treat it
3881 as though the operand isn't reloaded.
3883 ??? This latter case is somewhat odd because if we do the optional
3884 reload, it means the object is hanging around. Thus we need only
3885 do the address reload if the optional reload was NOT done.
3887 Change secondary reloads to be the address type of their operand, not
3890 If an operand's reload is now RELOAD_OTHER, change any
3891 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
3892 RELOAD_FOR_OTHER_ADDRESS. */
3894 for (i
= 0; i
< n_reloads
; i
++)
3896 if (rld
[i
].secondary_p
3897 && rld
[i
].when_needed
== operand_type
[rld
[i
].opnum
])
3898 rld
[i
].when_needed
= address_type
[rld
[i
].opnum
];
3900 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3901 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3902 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3903 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3904 && (operand_reloadnum
[rld
[i
].opnum
] < 0
3905 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
))
3907 /* If we have a secondary reload to go along with this reload,
3908 change its type to RELOAD_FOR_OPADDR_ADDR. */
3910 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3911 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
3912 && rld
[i
].secondary_in_reload
!= -1)
3914 int secondary_in_reload
= rld
[i
].secondary_in_reload
;
3916 rld
[secondary_in_reload
].when_needed
3917 = RELOAD_FOR_OPADDR_ADDR
;
3919 /* If there's a tertiary reload we have to change it also. */
3920 if (secondary_in_reload
> 0
3921 && rld
[secondary_in_reload
].secondary_in_reload
!= -1)
3922 rld
[rld
[secondary_in_reload
].secondary_in_reload
].when_needed
3923 = RELOAD_FOR_OPADDR_ADDR
;
3926 if ((rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3927 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3928 && rld
[i
].secondary_out_reload
!= -1)
3930 int secondary_out_reload
= rld
[i
].secondary_out_reload
;
3932 rld
[secondary_out_reload
].when_needed
3933 = RELOAD_FOR_OPADDR_ADDR
;
3935 /* If there's a tertiary reload we have to change it also. */
3936 if (secondary_out_reload
3937 && rld
[secondary_out_reload
].secondary_out_reload
!= -1)
3938 rld
[rld
[secondary_out_reload
].secondary_out_reload
].when_needed
3939 = RELOAD_FOR_OPADDR_ADDR
;
3942 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3943 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3944 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
3946 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
3949 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3950 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
3951 && operand_reloadnum
[rld
[i
].opnum
] >= 0
3952 && (rld
[operand_reloadnum
[rld
[i
].opnum
]].when_needed
3954 rld
[i
].when_needed
= RELOAD_FOR_OTHER_ADDRESS
;
3956 if (goal_alternative_matches
[rld
[i
].opnum
] >= 0)
3957 rld
[i
].opnum
= goal_alternative_matches
[rld
[i
].opnum
];
3960 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
3961 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
3962 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
3964 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
3965 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
3966 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
3967 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
3968 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
3969 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
3970 This is complicated by the fact that a single operand can have more
3971 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
3972 choose_reload_regs without affecting code quality, and cases that
3973 actually fail are extremely rare, so it turns out to be better to fix
3974 the problem here by not generating cases that choose_reload_regs will
3976 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
3977 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
3979 We can reduce the register pressure by exploiting that a
3980 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
3981 does not conflict with any of them, if it is only used for the first of
3982 the RELOAD_FOR_X_ADDRESS reloads. */
3984 int first_op_addr_num
= -2;
3985 int first_inpaddr_num
[MAX_RECOG_OPERANDS
];
3986 int first_outpaddr_num
[MAX_RECOG_OPERANDS
];
3988 /* We use last_op_addr_reload and the contents of the above arrays
3989 first as flags - -2 means no instance encountered, -1 means exactly
3990 one instance encountered.
3991 If more than one instance has been encountered, we store the reload
3992 number of the first reload of the kind in question; reload numbers
3993 are known to be non-negative. */
3994 for (i
= 0; i
< noperands
; i
++)
3995 first_inpaddr_num
[i
] = first_outpaddr_num
[i
] = -2;
3996 for (i
= n_reloads
- 1; i
>= 0; i
--)
3998 switch (rld
[i
].when_needed
)
4000 case RELOAD_FOR_OPERAND_ADDRESS
:
4001 if (++first_op_addr_num
>= 0)
4003 first_op_addr_num
= i
;
4007 case RELOAD_FOR_INPUT_ADDRESS
:
4008 if (++first_inpaddr_num
[rld
[i
].opnum
] >= 0)
4010 first_inpaddr_num
[rld
[i
].opnum
] = i
;
4014 case RELOAD_FOR_OUTPUT_ADDRESS
:
4015 if (++first_outpaddr_num
[rld
[i
].opnum
] >= 0)
4017 first_outpaddr_num
[rld
[i
].opnum
] = i
;
4028 for (i
= 0; i
< n_reloads
; i
++)
4031 enum reload_type type
;
4033 switch (rld
[i
].when_needed
)
4035 case RELOAD_FOR_OPADDR_ADDR
:
4036 first_num
= first_op_addr_num
;
4037 type
= RELOAD_FOR_OPERAND_ADDRESS
;
4039 case RELOAD_FOR_INPADDR_ADDRESS
:
4040 first_num
= first_inpaddr_num
[rld
[i
].opnum
];
4041 type
= RELOAD_FOR_INPUT_ADDRESS
;
4043 case RELOAD_FOR_OUTADDR_ADDRESS
:
4044 first_num
= first_outpaddr_num
[rld
[i
].opnum
];
4045 type
= RELOAD_FOR_OUTPUT_ADDRESS
;
4052 else if (i
> first_num
)
4053 rld
[i
].when_needed
= type
;
4056 /* Check if the only TYPE reload that uses reload I is
4057 reload FIRST_NUM. */
4058 for (j
= n_reloads
- 1; j
> first_num
; j
--)
4060 if (rld
[j
].when_needed
== type
4061 && (rld
[i
].secondary_p
4062 ? rld
[j
].secondary_in_reload
== i
4063 : reg_mentioned_p (rld
[i
].in
, rld
[j
].in
)))
4065 rld
[i
].when_needed
= type
;
4074 /* See if we have any reloads that are now allowed to be merged
4075 because we've changed when the reload is needed to
4076 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4077 check for the most common cases. */
4079 for (i
= 0; i
< n_reloads
; i
++)
4080 if (rld
[i
].in
!= 0 && rld
[i
].out
== 0
4081 && (rld
[i
].when_needed
== RELOAD_FOR_OPERAND_ADDRESS
4082 || rld
[i
].when_needed
== RELOAD_FOR_OPADDR_ADDR
4083 || rld
[i
].when_needed
== RELOAD_FOR_OTHER_ADDRESS
))
4084 for (j
= 0; j
< n_reloads
; j
++)
4085 if (i
!= j
&& rld
[j
].in
!= 0 && rld
[j
].out
== 0
4086 && rld
[j
].when_needed
== rld
[i
].when_needed
4087 && MATCHES (rld
[i
].in
, rld
[j
].in
)
4088 && rld
[i
].class == rld
[j
].class
4089 && !rld
[i
].nocombine
&& !rld
[j
].nocombine
4090 && rld
[i
].reg_rtx
== rld
[j
].reg_rtx
)
4092 rld
[i
].opnum
= MIN (rld
[i
].opnum
, rld
[j
].opnum
);
4093 transfer_replacements (i
, j
);
4098 /* If we made any reloads for addresses, see if they violate a
4099 "no input reloads" requirement for this insn. But loads that we
4100 do after the insn (such as for output addresses) are fine. */
4101 if (no_input_reloads
)
4102 for (i
= 0; i
< n_reloads
; i
++)
4104 && rld
[i
].when_needed
!= RELOAD_FOR_OUTADDR_ADDRESS
4105 && rld
[i
].when_needed
!= RELOAD_FOR_OUTPUT_ADDRESS
)
4109 /* Compute reload_mode and reload_nregs. */
4110 for (i
= 0; i
< n_reloads
; i
++)
4113 = (rld
[i
].inmode
== VOIDmode
4114 || (GET_MODE_SIZE (rld
[i
].outmode
)
4115 > GET_MODE_SIZE (rld
[i
].inmode
)))
4116 ? rld
[i
].outmode
: rld
[i
].inmode
;
4118 rld
[i
].nregs
= CLASS_MAX_NREGS (rld
[i
].class, rld
[i
].mode
);
4124 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4125 accepts a memory operand with constant address. */
4128 alternative_allows_memconst (constraint
, altnum
)
4129 const char *constraint
;
4133 /* Skip alternatives before the one requested. */
4136 while (*constraint
++ != ',');
4139 /* Scan the requested alternative for 'm' or 'o'.
4140 If one of them is present, this alternative accepts memory constants. */
4141 while ((c
= *constraint
++) && c
!= ',' && c
!= '#')
4142 if (c
== 'm' || c
== 'o')
4147 /* Scan X for memory references and scan the addresses for reloading.
4148 Also checks for references to "constant" regs that we want to eliminate
4149 and replaces them with the values they stand for.
4150 We may alter X destructively if it contains a reference to such.
4151 If X is just a constant reg, we return the equivalent value
4154 IND_LEVELS says how many levels of indirect addressing this machine
4157 OPNUM and TYPE identify the purpose of the reload.
4159 IS_SET_DEST is true if X is the destination of a SET, which is not
4160 appropriate to be replaced by a constant.
4162 INSN, if nonzero, is the insn in which we do the reload. It is used
4163 to determine if we may generate output reloads, and where to put USEs
4164 for pseudos that we have to replace with stack slots. */
4167 find_reloads_toplev (x
, opnum
, type
, ind_levels
, is_set_dest
, insn
)
4170 enum reload_type type
;
4175 register RTX_CODE code
= GET_CODE (x
);
4177 register const char *fmt
= GET_RTX_FORMAT (code
);
4183 /* This code is duplicated for speed in find_reloads. */
4184 register int regno
= REGNO (x
);
4185 if (reg_equiv_constant
[regno
] != 0 && !is_set_dest
)
4186 x
= reg_equiv_constant
[regno
];
4188 /* This creates (subreg (mem...)) which would cause an unnecessary
4189 reload of the mem. */
4190 else if (reg_equiv_mem
[regno
] != 0)
4191 x
= reg_equiv_mem
[regno
];
4193 else if (reg_equiv_memory_loc
[regno
]
4194 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
4196 rtx mem
= make_memloc (x
, regno
);
4197 if (reg_equiv_address
[regno
]
4198 || ! rtx_equal_p (mem
, reg_equiv_mem
[regno
]))
4200 /* If this is not a toplevel operand, find_reloads doesn't see
4201 this substitution. We have to emit a USE of the pseudo so
4202 that delete_output_reload can see it. */
4203 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
4204 emit_insn_before (gen_rtx_USE (VOIDmode
, x
), insn
);
4206 find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0), &XEXP (x
, 0),
4207 opnum
, type
, ind_levels
, insn
);
4215 find_reloads_address (GET_MODE (x
), &tem
, XEXP (x
, 0), &XEXP (x
, 0),
4216 opnum
, type
, ind_levels
, insn
);
4220 if (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
)
4222 /* Check for SUBREG containing a REG that's equivalent to a constant.
4223 If the constant has a known value, truncate it right now.
4224 Similarly if we are extracting a single-word of a multi-word
4225 constant. If the constant is symbolic, allow it to be substituted
4226 normally. push_reload will strip the subreg later. If the
4227 constant is VOIDmode, abort because we will lose the mode of
4228 the register (this should never happen because one of the cases
4229 above should handle it). */
4231 register int regno
= REGNO (SUBREG_REG (x
));
4234 if (subreg_lowpart_p (x
)
4235 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4236 && reg_equiv_constant
[regno
] != 0
4237 && (tem
= gen_lowpart_common (GET_MODE (x
),
4238 reg_equiv_constant
[regno
])) != 0)
4241 if (GET_MODE_BITSIZE (GET_MODE (x
)) == BITS_PER_WORD
4242 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4243 && reg_equiv_constant
[regno
] != 0
4244 && (tem
= operand_subword (reg_equiv_constant
[regno
],
4246 GET_MODE (SUBREG_REG (x
)))) != 0)
4248 /* TEM is now a word sized constant for the bits from X that
4249 we wanted. However, TEM may be the wrong representation.
4251 Use gen_lowpart_common to convert a CONST_INT into a
4252 CONST_DOUBLE and vice versa as needed according to by the mode
4254 tem
= gen_lowpart_common (GET_MODE (x
), tem
);
4260 /* If the SUBREG is wider than a word, the above test will fail.
4261 For example, we might have a SImode SUBREG of a DImode SUBREG_REG
4262 for a 16 bit target, or a DImode SUBREG of a TImode SUBREG_REG for
4263 a 32 bit target. We still can - and have to - handle this
4264 for non-paradoxical subregs of CONST_INTs. */
4265 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4266 && reg_equiv_constant
[regno
] != 0
4267 && GET_CODE (reg_equiv_constant
[regno
]) == CONST_INT
4268 && (GET_MODE_SIZE (GET_MODE (x
))
4269 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))))
4271 int shift
= SUBREG_WORD (x
) * BITS_PER_WORD
;
4272 if (WORDS_BIG_ENDIAN
)
4273 shift
= (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
)))
4274 - GET_MODE_BITSIZE (GET_MODE (x
))
4276 /* Here we use the knowledge that CONST_INTs have a
4277 HOST_WIDE_INT field. */
4278 if (shift
>= HOST_BITS_PER_WIDE_INT
)
4279 shift
= HOST_BITS_PER_WIDE_INT
- 1;
4280 return GEN_INT (INTVAL (reg_equiv_constant
[regno
]) >> shift
);
4283 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4284 && reg_equiv_constant
[regno
] != 0
4285 && GET_MODE (reg_equiv_constant
[regno
]) == VOIDmode
)
4288 /* If the subreg contains a reg that will be converted to a mem,
4289 convert the subreg to a narrower memref now.
4290 Otherwise, we would get (subreg (mem ...) ...),
4291 which would force reload of the mem.
4293 We also need to do this if there is an equivalent MEM that is
4294 not offsettable. In that case, alter_subreg would produce an
4295 invalid address on big-endian machines.
4297 For machines that extend byte loads, we must not reload using
4298 a wider mode if we have a paradoxical SUBREG. find_reloads will
4299 force a reload in that case. So we should not do anything here. */
4301 else if (regno
>= FIRST_PSEUDO_REGISTER
4302 #ifdef LOAD_EXTEND_OP
4303 && (GET_MODE_SIZE (GET_MODE (x
))
4304 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4306 && (reg_equiv_address
[regno
] != 0
4307 || (reg_equiv_mem
[regno
] != 0
4308 && (! strict_memory_address_p (GET_MODE (x
),
4309 XEXP (reg_equiv_mem
[regno
], 0))
4310 || ! offsettable_memref_p (reg_equiv_mem
[regno
])
4311 || num_not_at_initial_offset
))))
4312 x
= find_reloads_subreg_address (x
, 1, opnum
, type
, ind_levels
,
4316 for (copied
= 0, i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4320 rtx new_part
= find_reloads_toplev (XEXP (x
, i
), opnum
, type
,
4321 ind_levels
, is_set_dest
, insn
);
4322 /* If we have replaced a reg with it's equivalent memory loc -
4323 that can still be handled here e.g. if it's in a paradoxical
4324 subreg - we must make the change in a copy, rather than using
4325 a destructive change. This way, find_reloads can still elect
4326 not to do the change. */
4327 if (new_part
!= XEXP (x
, i
) && ! CONSTANT_P (new_part
) && ! copied
)
4329 x
= shallow_copy_rtx (x
);
4332 XEXP (x
, i
) = new_part
;
4338 /* Return a mem ref for the memory equivalent of reg REGNO.
4339 This mem ref is not shared with anything. */
4342 make_memloc (ad
, regno
)
4346 /* We must rerun eliminate_regs, in case the elimination
4347 offsets have changed. */
4349 = XEXP (eliminate_regs (reg_equiv_memory_loc
[regno
], 0, NULL_RTX
), 0);
4351 /* If TEM might contain a pseudo, we must copy it to avoid
4352 modifying it when we do the substitution for the reload. */
4353 if (rtx_varies_p (tem
))
4354 tem
= copy_rtx (tem
);
4356 tem
= gen_rtx_MEM (GET_MODE (ad
), tem
);
4357 MEM_COPY_ATTRIBUTES (tem
, reg_equiv_memory_loc
[regno
]);
4361 /* Record all reloads needed for handling memory address AD
4362 which appears in *LOC in a memory reference to mode MODE
4363 which itself is found in location *MEMREFLOC.
4364 Note that we take shortcuts assuming that no multi-reg machine mode
4365 occurs as part of an address.
4367 OPNUM and TYPE specify the purpose of this reload.
4369 IND_LEVELS says how many levels of indirect addressing this machine
4372 INSN, if nonzero, is the insn in which we do the reload. It is used
4373 to determine if we may generate output reloads, and where to put USEs
4374 for pseudos that we have to replace with stack slots.
4376 Value is nonzero if this address is reloaded or replaced as a whole.
4377 This is interesting to the caller if the address is an autoincrement.
4379 Note that there is no verification that the address will be valid after
4380 this routine does its work. Instead, we rely on the fact that the address
4381 was valid when reload started. So we need only undo things that reload
4382 could have broken. These are wrong register types, pseudos not allocated
4383 to a hard register, and frame pointer elimination. */
4386 find_reloads_address (mode
, memrefloc
, ad
, loc
, opnum
, type
, ind_levels
, insn
)
4387 enum machine_mode mode
;
4392 enum reload_type type
;
4397 int removed_and
= 0;
4400 /* If the address is a register, see if it is a legitimate address and
4401 reload if not. We first handle the cases where we need not reload
4402 or where we must reload in a non-standard way. */
4404 if (GET_CODE (ad
) == REG
)
4408 if (reg_equiv_constant
[regno
] != 0
4409 && strict_memory_address_p (mode
, reg_equiv_constant
[regno
]))
4411 *loc
= ad
= reg_equiv_constant
[regno
];
4415 tem
= reg_equiv_memory_loc
[regno
];
4418 if (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
)
4420 tem
= make_memloc (ad
, regno
);
4421 if (! strict_memory_address_p (GET_MODE (tem
), XEXP (tem
, 0)))
4423 find_reloads_address (GET_MODE (tem
), NULL_PTR
, XEXP (tem
, 0),
4424 &XEXP (tem
, 0), opnum
, ADDR_TYPE (type
),
4427 /* We can avoid a reload if the register's equivalent memory
4428 expression is valid as an indirect memory address.
4429 But not all addresses are valid in a mem used as an indirect
4430 address: only reg or reg+constant. */
4433 && strict_memory_address_p (mode
, tem
)
4434 && (GET_CODE (XEXP (tem
, 0)) == REG
4435 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4436 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4437 && CONSTANT_P (XEXP (XEXP (tem
, 0), 1)))))
4439 /* TEM is not the same as what we'll be replacing the
4440 pseudo with after reload, put a USE in front of INSN
4441 in the final reload pass. */
4443 && num_not_at_initial_offset
4444 && ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
4447 emit_insn_before (gen_rtx_USE (VOIDmode
, ad
), insn
);
4448 /* This doesn't really count as replacing the address
4449 as a whole, since it is still a memory access. */
4457 /* The only remaining case where we can avoid a reload is if this is a
4458 hard register that is valid as a base register and which is not the
4459 subject of a CLOBBER in this insn. */
4461 else if (regno
< FIRST_PSEUDO_REGISTER
4462 && REGNO_MODE_OK_FOR_BASE_P (regno
, mode
)
4463 && ! regno_clobbered_p (regno
, this_insn
))
4466 /* If we do not have one of the cases above, we must do the reload. */
4467 push_reload (ad
, NULL_RTX
, loc
, NULL_PTR
, BASE_REG_CLASS
,
4468 GET_MODE (ad
), VOIDmode
, 0, 0, opnum
, type
);
4472 if (strict_memory_address_p (mode
, ad
))
4474 /* The address appears valid, so reloads are not needed.
4475 But the address may contain an eliminable register.
4476 This can happen because a machine with indirect addressing
4477 may consider a pseudo register by itself a valid address even when
4478 it has failed to get a hard reg.
4479 So do a tree-walk to find and eliminate all such regs. */
4481 /* But first quickly dispose of a common case. */
4482 if (GET_CODE (ad
) == PLUS
4483 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
4484 && GET_CODE (XEXP (ad
, 0)) == REG
4485 && reg_equiv_constant
[REGNO (XEXP (ad
, 0))] == 0)
4488 subst_reg_equivs_changed
= 0;
4489 *loc
= subst_reg_equivs (ad
, insn
);
4491 if (! subst_reg_equivs_changed
)
4494 /* Check result for validity after substitution. */
4495 if (strict_memory_address_p (mode
, ad
))
4499 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4504 LEGITIMIZE_RELOAD_ADDRESS (ad
, GET_MODE (*memrefloc
), opnum
, type
,
4509 *memrefloc
= copy_rtx (*memrefloc
);
4510 XEXP (*memrefloc
, 0) = ad
;
4511 move_replacements (&ad
, &XEXP (*memrefloc
, 0));
4517 /* The address is not valid. We have to figure out why. First see if
4518 we have an outer AND and remove it if so. Then analyze what's inside. */
4520 if (GET_CODE (ad
) == AND
)
4523 loc
= &XEXP (ad
, 0);
4527 /* One possibility for why the address is invalid is that it is itself
4528 a MEM. This can happen when the frame pointer is being eliminated, a
4529 pseudo is not allocated to a hard register, and the offset between the
4530 frame and stack pointers is not its initial value. In that case the
4531 pseudo will have been replaced by a MEM referring to the
4533 if (GET_CODE (ad
) == MEM
)
4535 /* First ensure that the address in this MEM is valid. Then, unless
4536 indirect addresses are valid, reload the MEM into a register. */
4538 find_reloads_address (GET_MODE (ad
), &tem
, XEXP (ad
, 0), &XEXP (ad
, 0),
4539 opnum
, ADDR_TYPE (type
),
4540 ind_levels
== 0 ? 0 : ind_levels
- 1, insn
);
4542 /* If tem was changed, then we must create a new memory reference to
4543 hold it and store it back into memrefloc. */
4544 if (tem
!= ad
&& memrefloc
)
4546 *memrefloc
= copy_rtx (*memrefloc
);
4547 copy_replacements (tem
, XEXP (*memrefloc
, 0));
4548 loc
= &XEXP (*memrefloc
, 0);
4550 loc
= &XEXP (*loc
, 0);
4553 /* Check similar cases as for indirect addresses as above except
4554 that we can allow pseudos and a MEM since they should have been
4555 taken care of above. */
4558 || (GET_CODE (XEXP (tem
, 0)) == SYMBOL_REF
&& ! indirect_symref_ok
)
4559 || GET_CODE (XEXP (tem
, 0)) == MEM
4560 || ! (GET_CODE (XEXP (tem
, 0)) == REG
4561 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4562 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4563 && GET_CODE (XEXP (XEXP (tem
, 0), 1)) == CONST_INT
)))
4565 /* Must use TEM here, not AD, since it is the one that will
4566 have any subexpressions reloaded, if needed. */
4567 push_reload (tem
, NULL_RTX
, loc
, NULL_PTR
,
4568 BASE_REG_CLASS
, GET_MODE (tem
),
4571 return ! removed_and
;
4577 /* If we have address of a stack slot but it's not valid because the
4578 displacement is too large, compute the sum in a register.
4579 Handle all base registers here, not just fp/ap/sp, because on some
4580 targets (namely SH) we can also get too large displacements from
4581 big-endian corrections. */
4582 else if (GET_CODE (ad
) == PLUS
4583 && GET_CODE (XEXP (ad
, 0)) == REG
4584 && REGNO (XEXP (ad
, 0)) < FIRST_PSEUDO_REGISTER
4585 && REG_MODE_OK_FOR_BASE_P (XEXP (ad
, 0), mode
)
4586 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4588 /* Unshare the MEM rtx so we can safely alter it. */
4591 *memrefloc
= copy_rtx (*memrefloc
);
4592 loc
= &XEXP (*memrefloc
, 0);
4594 loc
= &XEXP (*loc
, 0);
4597 if (double_reg_address_ok
)
4599 /* Unshare the sum as well. */
4600 *loc
= ad
= copy_rtx (ad
);
4602 /* Reload the displacement into an index reg.
4603 We assume the frame pointer or arg pointer is a base reg. */
4604 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
4605 INDEX_REG_CLASS
, GET_MODE (ad
), opnum
,
4611 /* If the sum of two regs is not necessarily valid,
4612 reload the sum into a base reg.
4613 That will at least work. */
4614 find_reloads_address_part (ad
, loc
, BASE_REG_CLASS
,
4615 Pmode
, opnum
, type
, ind_levels
);
4617 return ! removed_and
;
4620 /* If we have an indexed stack slot, there are three possible reasons why
4621 it might be invalid: The index might need to be reloaded, the address
4622 might have been made by frame pointer elimination and hence have a
4623 constant out of range, or both reasons might apply.
4625 We can easily check for an index needing reload, but even if that is the
4626 case, we might also have an invalid constant. To avoid making the
4627 conservative assumption and requiring two reloads, we see if this address
4628 is valid when not interpreted strictly. If it is, the only problem is
4629 that the index needs a reload and find_reloads_address_1 will take care
4632 If we decide to do something here, it must be that
4633 `double_reg_address_ok' is true and that this address rtl was made by
4634 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4635 rework the sum so that the reload register will be added to the index.
4636 This is safe because we know the address isn't shared.
4638 We check for fp/ap/sp as both the first and second operand of the
4641 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4642 && GET_CODE (XEXP (ad
, 0)) == PLUS
4643 && (XEXP (XEXP (ad
, 0), 0) == frame_pointer_rtx
4644 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4645 || XEXP (XEXP (ad
, 0), 0) == hard_frame_pointer_rtx
4647 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4648 || XEXP (XEXP (ad
, 0), 0) == arg_pointer_rtx
4650 || XEXP (XEXP (ad
, 0), 0) == stack_pointer_rtx
)
4651 && ! memory_address_p (mode
, ad
))
4653 *loc
= ad
= gen_rtx_PLUS (GET_MODE (ad
),
4654 plus_constant (XEXP (XEXP (ad
, 0), 0),
4655 INTVAL (XEXP (ad
, 1))),
4656 XEXP (XEXP (ad
, 0), 1));
4657 find_reloads_address_part (XEXP (ad
, 0), &XEXP (ad
, 0), BASE_REG_CLASS
,
4658 GET_MODE (ad
), opnum
, type
, ind_levels
);
4659 find_reloads_address_1 (mode
, XEXP (ad
, 1), 1, &XEXP (ad
, 1), opnum
,
4665 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4666 && GET_CODE (XEXP (ad
, 0)) == PLUS
4667 && (XEXP (XEXP (ad
, 0), 1) == frame_pointer_rtx
4668 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4669 || XEXP (XEXP (ad
, 0), 1) == hard_frame_pointer_rtx
4671 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4672 || XEXP (XEXP (ad
, 0), 1) == arg_pointer_rtx
4674 || XEXP (XEXP (ad
, 0), 1) == stack_pointer_rtx
)
4675 && ! memory_address_p (mode
, ad
))
4677 *loc
= ad
= gen_rtx_PLUS (GET_MODE (ad
),
4678 XEXP (XEXP (ad
, 0), 0),
4679 plus_constant (XEXP (XEXP (ad
, 0), 1),
4680 INTVAL (XEXP (ad
, 1))));
4681 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1), BASE_REG_CLASS
,
4682 GET_MODE (ad
), opnum
, type
, ind_levels
);
4683 find_reloads_address_1 (mode
, XEXP (ad
, 0), 1, &XEXP (ad
, 0), opnum
,
4689 /* See if address becomes valid when an eliminable register
4690 in a sum is replaced. */
4693 if (GET_CODE (ad
) == PLUS
)
4694 tem
= subst_indexed_address (ad
);
4695 if (tem
!= ad
&& strict_memory_address_p (mode
, tem
))
4697 /* Ok, we win that way. Replace any additional eliminable
4700 subst_reg_equivs_changed
= 0;
4701 tem
= subst_reg_equivs (tem
, insn
);
4703 /* Make sure that didn't make the address invalid again. */
4705 if (! subst_reg_equivs_changed
|| strict_memory_address_p (mode
, tem
))
4712 /* If constants aren't valid addresses, reload the constant address
4714 if (CONSTANT_P (ad
) && ! strict_memory_address_p (mode
, ad
))
4716 /* If AD is in address in the constant pool, the MEM rtx may be shared.
4717 Unshare it so we can safely alter it. */
4718 if (memrefloc
&& GET_CODE (ad
) == SYMBOL_REF
4719 && CONSTANT_POOL_ADDRESS_P (ad
))
4721 *memrefloc
= copy_rtx (*memrefloc
);
4722 loc
= &XEXP (*memrefloc
, 0);
4724 loc
= &XEXP (*loc
, 0);
4727 find_reloads_address_part (ad
, loc
, BASE_REG_CLASS
, Pmode
, opnum
, type
,
4729 return ! removed_and
;
4732 return find_reloads_address_1 (mode
, ad
, 0, loc
, opnum
, type
, ind_levels
,
4736 /* Find all pseudo regs appearing in AD
4737 that are eliminable in favor of equivalent values
4738 and do not have hard regs; replace them by their equivalents.
4739 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
4740 front of it for pseudos that we have to replace with stack slots. */
4743 subst_reg_equivs (ad
, insn
)
4747 register RTX_CODE code
= GET_CODE (ad
);
4749 register const char *fmt
;
4765 register int regno
= REGNO (ad
);
4767 if (reg_equiv_constant
[regno
] != 0)
4769 subst_reg_equivs_changed
= 1;
4770 return reg_equiv_constant
[regno
];
4772 if (reg_equiv_memory_loc
[regno
] && num_not_at_initial_offset
)
4774 rtx mem
= make_memloc (ad
, regno
);
4775 if (! rtx_equal_p (mem
, reg_equiv_mem
[regno
]))
4777 subst_reg_equivs_changed
= 1;
4778 emit_insn_before (gen_rtx_USE (VOIDmode
, ad
), insn
);
4786 /* Quickly dispose of a common case. */
4787 if (XEXP (ad
, 0) == frame_pointer_rtx
4788 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4796 fmt
= GET_RTX_FORMAT (code
);
4797 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4799 XEXP (ad
, i
) = subst_reg_equivs (XEXP (ad
, i
), insn
);
4803 /* Compute the sum of X and Y, making canonicalizations assumed in an
4804 address, namely: sum constant integers, surround the sum of two
4805 constants with a CONST, put the constant as the second operand, and
4806 group the constant on the outermost sum.
4808 This routine assumes both inputs are already in canonical form. */
4815 enum machine_mode mode
= GET_MODE (x
);
4817 if (mode
== VOIDmode
)
4818 mode
= GET_MODE (y
);
4820 if (mode
== VOIDmode
)
4823 if (GET_CODE (x
) == CONST_INT
)
4824 return plus_constant (y
, INTVAL (x
));
4825 else if (GET_CODE (y
) == CONST_INT
)
4826 return plus_constant (x
, INTVAL (y
));
4827 else if (CONSTANT_P (x
))
4828 tem
= x
, x
= y
, y
= tem
;
4830 if (GET_CODE (x
) == PLUS
&& CONSTANT_P (XEXP (x
, 1)))
4831 return form_sum (XEXP (x
, 0), form_sum (XEXP (x
, 1), y
));
4833 /* Note that if the operands of Y are specified in the opposite
4834 order in the recursive calls below, infinite recursion will occur. */
4835 if (GET_CODE (y
) == PLUS
&& CONSTANT_P (XEXP (y
, 1)))
4836 return form_sum (form_sum (x
, XEXP (y
, 0)), XEXP (y
, 1));
4838 /* If both constant, encapsulate sum. Otherwise, just form sum. A
4839 constant will have been placed second. */
4840 if (CONSTANT_P (x
) && CONSTANT_P (y
))
4842 if (GET_CODE (x
) == CONST
)
4844 if (GET_CODE (y
) == CONST
)
4847 return gen_rtx_CONST (VOIDmode
, gen_rtx_PLUS (mode
, x
, y
));
4850 return gen_rtx_PLUS (mode
, x
, y
);
4853 /* If ADDR is a sum containing a pseudo register that should be
4854 replaced with a constant (from reg_equiv_constant),
4855 return the result of doing so, and also apply the associative
4856 law so that the result is more likely to be a valid address.
4857 (But it is not guaranteed to be one.)
4859 Note that at most one register is replaced, even if more are
4860 replaceable. Also, we try to put the result into a canonical form
4861 so it is more likely to be a valid address.
4863 In all other cases, return ADDR. */
4866 subst_indexed_address (addr
)
4869 rtx op0
= 0, op1
= 0, op2
= 0;
4873 if (GET_CODE (addr
) == PLUS
)
4875 /* Try to find a register to replace. */
4876 op0
= XEXP (addr
, 0), op1
= XEXP (addr
, 1), op2
= 0;
4877 if (GET_CODE (op0
) == REG
4878 && (regno
= REGNO (op0
)) >= FIRST_PSEUDO_REGISTER
4879 && reg_renumber
[regno
] < 0
4880 && reg_equiv_constant
[regno
] != 0)
4881 op0
= reg_equiv_constant
[regno
];
4882 else if (GET_CODE (op1
) == REG
4883 && (regno
= REGNO (op1
)) >= FIRST_PSEUDO_REGISTER
4884 && reg_renumber
[regno
] < 0
4885 && reg_equiv_constant
[regno
] != 0)
4886 op1
= reg_equiv_constant
[regno
];
4887 else if (GET_CODE (op0
) == PLUS
4888 && (tem
= subst_indexed_address (op0
)) != op0
)
4890 else if (GET_CODE (op1
) == PLUS
4891 && (tem
= subst_indexed_address (op1
)) != op1
)
4896 /* Pick out up to three things to add. */
4897 if (GET_CODE (op1
) == PLUS
)
4898 op2
= XEXP (op1
, 1), op1
= XEXP (op1
, 0);
4899 else if (GET_CODE (op0
) == PLUS
)
4900 op2
= op1
, op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
4902 /* Compute the sum. */
4904 op1
= form_sum (op1
, op2
);
4906 op0
= form_sum (op0
, op1
);
4913 /* Record the pseudo registers we must reload into hard registers in a
4914 subexpression of a would-be memory address, X referring to a value
4915 in mode MODE. (This function is not called if the address we find
4918 CONTEXT = 1 means we are considering regs as index regs,
4919 = 0 means we are considering them as base regs.
4921 OPNUM and TYPE specify the purpose of any reloads made.
4923 IND_LEVELS says how many levels of indirect addressing are
4924 supported at this point in the address.
4926 INSN, if nonzero, is the insn in which we do the reload. It is used
4927 to determine if we may generate output reloads.
4929 We return nonzero if X, as a whole, is reloaded or replaced. */
4931 /* Note that we take shortcuts assuming that no multi-reg machine mode
4932 occurs as part of an address.
4933 Also, this is not fully machine-customizable; it works for machines
4934 such as vaxes and 68000's and 32000's, but other possible machines
4935 could have addressing modes that this does not handle right. */
4938 find_reloads_address_1 (mode
, x
, context
, loc
, opnum
, type
, ind_levels
, insn
)
4939 enum machine_mode mode
;
4944 enum reload_type type
;
4948 register RTX_CODE code
= GET_CODE (x
);
4954 register rtx orig_op0
= XEXP (x
, 0);
4955 register rtx orig_op1
= XEXP (x
, 1);
4956 register RTX_CODE code0
= GET_CODE (orig_op0
);
4957 register RTX_CODE code1
= GET_CODE (orig_op1
);
4958 register rtx op0
= orig_op0
;
4959 register rtx op1
= orig_op1
;
4961 if (GET_CODE (op0
) == SUBREG
)
4963 op0
= SUBREG_REG (op0
);
4964 code0
= GET_CODE (op0
);
4965 if (code0
== REG
&& REGNO (op0
) < FIRST_PSEUDO_REGISTER
)
4966 op0
= gen_rtx_REG (word_mode
,
4967 REGNO (op0
) + SUBREG_WORD (orig_op0
));
4970 if (GET_CODE (op1
) == SUBREG
)
4972 op1
= SUBREG_REG (op1
);
4973 code1
= GET_CODE (op1
);
4974 if (code1
== REG
&& REGNO (op1
) < FIRST_PSEUDO_REGISTER
)
4975 op1
= gen_rtx_REG (GET_MODE (op1
),
4976 REGNO (op1
) + SUBREG_WORD (orig_op1
));
4979 if (code0
== MULT
|| code0
== SIGN_EXTEND
|| code0
== TRUNCATE
4980 || code0
== ZERO_EXTEND
|| code1
== MEM
)
4982 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
4983 type
, ind_levels
, insn
);
4984 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
4985 type
, ind_levels
, insn
);
4988 else if (code1
== MULT
|| code1
== SIGN_EXTEND
|| code1
== TRUNCATE
4989 || code1
== ZERO_EXTEND
|| code0
== MEM
)
4991 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
4992 type
, ind_levels
, insn
);
4993 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
4994 type
, ind_levels
, insn
);
4997 else if (code0
== CONST_INT
|| code0
== CONST
4998 || code0
== SYMBOL_REF
|| code0
== LABEL_REF
)
4999 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5000 type
, ind_levels
, insn
);
5002 else if (code1
== CONST_INT
|| code1
== CONST
5003 || code1
== SYMBOL_REF
|| code1
== LABEL_REF
)
5004 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5005 type
, ind_levels
, insn
);
5007 else if (code0
== REG
&& code1
== REG
)
5009 if (REG_OK_FOR_INDEX_P (op0
)
5010 && REG_MODE_OK_FOR_BASE_P (op1
, mode
))
5012 else if (REG_OK_FOR_INDEX_P (op1
)
5013 && REG_MODE_OK_FOR_BASE_P (op0
, mode
))
5015 else if (REG_MODE_OK_FOR_BASE_P (op1
, mode
))
5016 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5017 type
, ind_levels
, insn
);
5018 else if (REG_MODE_OK_FOR_BASE_P (op0
, mode
))
5019 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5020 type
, ind_levels
, insn
);
5021 else if (REG_OK_FOR_INDEX_P (op1
))
5022 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5023 type
, ind_levels
, insn
);
5024 else if (REG_OK_FOR_INDEX_P (op0
))
5025 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5026 type
, ind_levels
, insn
);
5029 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5030 type
, ind_levels
, insn
);
5031 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5032 type
, ind_levels
, insn
);
5036 else if (code0
== REG
)
5038 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5039 type
, ind_levels
, insn
);
5040 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5041 type
, ind_levels
, insn
);
5044 else if (code1
== REG
)
5046 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5047 type
, ind_levels
, insn
);
5048 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5049 type
, ind_levels
, insn
);
5059 if (GET_CODE (XEXP (x
, 0)) == REG
)
5061 register int regno
= REGNO (XEXP (x
, 0));
5065 /* A register that is incremented cannot be constant! */
5066 if (regno
>= FIRST_PSEUDO_REGISTER
5067 && reg_equiv_constant
[regno
] != 0)
5070 /* Handle a register that is equivalent to a memory location
5071 which cannot be addressed directly. */
5072 if (reg_equiv_memory_loc
[regno
] != 0
5073 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
5075 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5076 if (reg_equiv_address
[regno
]
5077 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5079 /* First reload the memory location's address.
5080 We can't use ADDR_TYPE (type) here, because we need to
5081 write back the value after reading it, hence we actually
5082 need two registers. */
5083 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5084 &XEXP (tem
, 0), opnum
, type
,
5086 /* Put this inside a new increment-expression. */
5087 x
= gen_rtx_fmt_e (GET_CODE (x
), GET_MODE (x
), tem
);
5088 /* Proceed to reload that, as if it contained a register. */
5092 /* If we have a hard register that is ok as an index,
5093 don't make a reload. If an autoincrement of a nice register
5094 isn't "valid", it must be that no autoincrement is "valid".
5095 If that is true and something made an autoincrement anyway,
5096 this must be a special context where one is allowed.
5097 (For example, a "push" instruction.)
5098 We can't improve this address, so leave it alone. */
5100 /* Otherwise, reload the autoincrement into a suitable hard reg
5101 and record how much to increment by. */
5103 if (reg_renumber
[regno
] >= 0)
5104 regno
= reg_renumber
[regno
];
5105 if ((regno
>= FIRST_PSEUDO_REGISTER
5106 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
5107 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
))))
5114 /* If we can output the register afterwards, do so, this
5115 saves the extra update.
5116 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5117 CALL_INSN - and it does not set CC0.
5118 But don't do this if we cannot directly address the
5119 memory location, since this will make it harder to
5120 reuse address reloads, and increases register pressure.
5121 Also don't do this if we can probably update x directly. */
5122 rtx equiv
= (GET_CODE (XEXP (x
, 0)) == MEM
5124 : reg_equiv_mem
[regno
]);
5125 int icode
= (int) add_optab
->handlers
[(int) Pmode
].insn_code
;
5126 if (insn
&& GET_CODE (insn
) == INSN
&& equiv
5127 && memory_operand (equiv
, GET_MODE (equiv
))
5129 && ! sets_cc0_p (PATTERN (insn
))
5131 && ! (icode
!= CODE_FOR_nothing
5132 && ((*insn_data
[icode
].operand
[0].predicate
)
5134 && ((*insn_data
[icode
].operand
[1].predicate
)
5140 = push_reload (x
, x
, loc
, loc
,
5141 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5142 GET_MODE (x
), GET_MODE (x
), 0, 0,
5143 opnum
, RELOAD_OTHER
);
5145 /* If we created a new MEM based on reg_equiv_mem[REGNO], then
5146 LOC above is part of the new MEM, not the MEM in INSN.
5148 We must also replace the address of the MEM in INSN. */
5149 if (&XEXP (x_orig
, 0) != loc
)
5150 push_replacement (&XEXP (x_orig
, 0), reloadnum
, VOIDmode
);
5156 = push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5157 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5158 GET_MODE (x
), GET_MODE (x
), 0, 0,
5161 = find_inc_amount (PATTERN (this_insn
), XEXP (x_orig
, 0));
5167 /* Update the REG_INC notes. */
5169 for (link
= REG_NOTES (this_insn
);
5170 link
; link
= XEXP (link
, 1))
5171 if (REG_NOTE_KIND (link
) == REG_INC
5172 && REGNO (XEXP (link
, 0)) == REGNO (XEXP (x_orig
, 0)))
5173 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5179 else if (GET_CODE (XEXP (x
, 0)) == MEM
)
5181 /* This is probably the result of a substitution, by eliminate_regs,
5182 of an equivalent address for a pseudo that was not allocated to a
5183 hard register. Verify that the specified address is valid and
5184 reload it into a register. */
5185 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
5186 rtx tem ATTRIBUTE_UNUSED
= XEXP (x
, 0);
5190 /* Since we know we are going to reload this item, don't decrement
5191 for the indirection level.
5193 Note that this is actually conservative: it would be slightly
5194 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5196 /* We can't use ADDR_TYPE (type) here, because we need to
5197 write back the value after reading it, hence we actually
5198 need two registers. */
5199 find_reloads_address (GET_MODE (x
), &XEXP (x
, 0),
5200 XEXP (XEXP (x
, 0), 0), &XEXP (XEXP (x
, 0), 0),
5201 opnum
, type
, ind_levels
, insn
);
5203 reloadnum
= push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5204 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5205 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5207 = find_inc_amount (PATTERN (this_insn
), XEXP (x
, 0));
5209 link
= FIND_REG_INC_NOTE (this_insn
, tem
);
5211 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5218 /* This is probably the result of a substitution, by eliminate_regs, of
5219 an equivalent address for a pseudo that was not allocated to a hard
5220 register. Verify that the specified address is valid and reload it
5223 Since we know we are going to reload this item, don't decrement for
5224 the indirection level.
5226 Note that this is actually conservative: it would be slightly more
5227 efficient to use the value of SPILL_INDIRECT_LEVELS from
5230 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
5231 opnum
, ADDR_TYPE (type
), ind_levels
, insn
);
5232 push_reload (*loc
, NULL_RTX
, loc
, NULL_PTR
,
5233 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5234 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5239 register int regno
= REGNO (x
);
5241 if (reg_equiv_constant
[regno
] != 0)
5243 find_reloads_address_part (reg_equiv_constant
[regno
], loc
,
5244 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5245 GET_MODE (x
), opnum
, type
, ind_levels
);
5249 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5250 that feeds this insn. */
5251 if (reg_equiv_mem
[regno
] != 0)
5253 push_reload (reg_equiv_mem
[regno
], NULL_RTX
, loc
, NULL_PTR
,
5254 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5255 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5260 if (reg_equiv_memory_loc
[regno
]
5261 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
5263 rtx tem
= make_memloc (x
, regno
);
5264 if (reg_equiv_address
[regno
] != 0
5265 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5268 find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0),
5269 &XEXP (x
, 0), opnum
, ADDR_TYPE (type
),
5274 if (reg_renumber
[regno
] >= 0)
5275 regno
= reg_renumber
[regno
];
5277 if ((regno
>= FIRST_PSEUDO_REGISTER
5278 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
5279 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
))))
5281 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5282 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5283 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5287 /* If a register appearing in an address is the subject of a CLOBBER
5288 in this insn, reload it into some other register to be safe.
5289 The CLOBBER is supposed to make the register unavailable
5290 from before this insn to after it. */
5291 if (regno_clobbered_p (regno
, this_insn
))
5293 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5294 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5295 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5302 if (GET_CODE (SUBREG_REG (x
)) == REG
)
5304 /* If this is a SUBREG of a hard register and the resulting register
5305 is of the wrong class, reload the whole SUBREG. This avoids
5306 needless copies if SUBREG_REG is multi-word. */
5307 if (REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
5309 int regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
5311 if (! (context
? REGNO_OK_FOR_INDEX_P (regno
)
5312 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
)))
5314 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5315 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5316 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5320 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5321 is larger than the class size, then reload the whole SUBREG. */
5324 enum reg_class
class = (context
? INDEX_REG_CLASS
5326 if (CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x
)))
5327 > reg_class_size
[class])
5329 x
= find_reloads_subreg_address (x
, 0, opnum
, type
,
5331 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
, class,
5332 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5344 register const char *fmt
= GET_RTX_FORMAT (code
);
5347 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5350 find_reloads_address_1 (mode
, XEXP (x
, i
), context
, &XEXP (x
, i
),
5351 opnum
, type
, ind_levels
, insn
);
5358 /* X, which is found at *LOC, is a part of an address that needs to be
5359 reloaded into a register of class CLASS. If X is a constant, or if
5360 X is a PLUS that contains a constant, check that the constant is a
5361 legitimate operand and that we are supposed to be able to load
5362 it into the register.
5364 If not, force the constant into memory and reload the MEM instead.
5366 MODE is the mode to use, in case X is an integer constant.
5368 OPNUM and TYPE describe the purpose of any reloads made.
5370 IND_LEVELS says how many levels of indirect addressing this machine
5374 find_reloads_address_part (x
, loc
, class, mode
, opnum
, type
, ind_levels
)
5377 enum reg_class
class;
5378 enum machine_mode mode
;
5380 enum reload_type type
;
5384 && (! LEGITIMATE_CONSTANT_P (x
)
5385 || PREFERRED_RELOAD_CLASS (x
, class) == NO_REGS
))
5389 /* If this is a CONST_INT, it could have been created by a
5390 plus_constant call in eliminate_regs, which means it may be
5391 on the reload_obstack. reload_obstack will be freed later, so
5392 we can't allow such RTL to be put in the constant pool. There
5393 is code in force_const_mem to check for this case, but it doesn't
5394 work because we have already popped off the reload_obstack, so
5395 rtl_obstack == saveable_obstack is true at this point. */
5396 if (GET_CODE (x
) == CONST_INT
)
5397 tem
= x
= force_const_mem (mode
, GEN_INT (INTVAL (x
)));
5399 tem
= x
= force_const_mem (mode
, x
);
5401 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5402 opnum
, type
, ind_levels
, 0);
5405 else if (GET_CODE (x
) == PLUS
5406 && CONSTANT_P (XEXP (x
, 1))
5407 && (! LEGITIMATE_CONSTANT_P (XEXP (x
, 1))
5408 || PREFERRED_RELOAD_CLASS (XEXP (x
, 1), class) == NO_REGS
))
5412 /* See comment above. */
5413 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
)
5414 tem
= force_const_mem (GET_MODE (x
), GEN_INT (INTVAL (XEXP (x
, 1))));
5416 tem
= force_const_mem (GET_MODE (x
), XEXP (x
, 1));
5418 x
= gen_rtx_PLUS (GET_MODE (x
), XEXP (x
, 0), tem
);
5419 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5420 opnum
, type
, ind_levels
, 0);
5423 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
, class,
5424 mode
, VOIDmode
, 0, 0, opnum
, type
);
5427 /* X, a subreg of a pseudo, is a part of an address that needs to be
5430 If the pseudo is equivalent to a memory location that cannot be directly
5431 addressed, make the necessary address reloads.
5433 If address reloads have been necessary, or if the address is changed
5434 by register elimination, return the rtx of the memory location;
5435 otherwise, return X.
5437 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
5440 OPNUM and TYPE identify the purpose of the reload.
5442 IND_LEVELS says how many levels of indirect addressing are
5443 supported at this point in the address.
5445 INSN, if nonzero, is the insn in which we do the reload. It is used
5446 to determine where to put USEs for pseudos that we have to replace with
5450 find_reloads_subreg_address (x
, force_replace
, opnum
, type
,
5455 enum reload_type type
;
5459 int regno
= REGNO (SUBREG_REG (x
));
5461 if (reg_equiv_memory_loc
[regno
])
5463 /* If the address is not directly addressable, or if the address is not
5464 offsettable, then it must be replaced. */
5466 && (reg_equiv_address
[regno
]
5467 || ! offsettable_memref_p (reg_equiv_mem
[regno
])))
5470 if (force_replace
|| num_not_at_initial_offset
)
5472 rtx tem
= make_memloc (SUBREG_REG (x
), regno
);
5474 /* If the address changes because of register elimination, then
5475 it must be replaced. */
5477 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5479 int offset
= SUBREG_WORD (x
) * UNITS_PER_WORD
;
5481 if (BYTES_BIG_ENDIAN
)
5485 size
= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)));
5486 offset
+= MIN (size
, UNITS_PER_WORD
);
5487 size
= GET_MODE_SIZE (GET_MODE (x
));
5488 offset
-= MIN (size
, UNITS_PER_WORD
);
5490 XEXP (tem
, 0) = plus_constant (XEXP (tem
, 0), offset
);
5491 PUT_MODE (tem
, GET_MODE (x
));
5492 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5493 &XEXP (tem
, 0), opnum
, ADDR_TYPE (type
),
5495 /* If this is not a toplevel operand, find_reloads doesn't see
5496 this substitution. We have to emit a USE of the pseudo so
5497 that delete_output_reload can see it. */
5498 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
5499 emit_insn_before (gen_rtx_USE (VOIDmode
, SUBREG_REG (x
)), insn
);
5507 /* Substitute into the current INSN the registers into which we have reloaded
5508 the things that need reloading. The array `replacements'
5509 says contains the locations of all pointers that must be changed
5510 and says what to replace them with.
5512 Return the rtx that X translates into; usually X, but modified. */
5519 for (i
= 0; i
< n_replacements
; i
++)
5521 register struct replacement
*r
= &replacements
[i
];
5522 register rtx reloadreg
= rld
[r
->what
].reg_rtx
;
5525 /* Encapsulate RELOADREG so its machine mode matches what
5526 used to be there. Note that gen_lowpart_common will
5527 do the wrong thing if RELOADREG is multi-word. RELOADREG
5528 will always be a REG here. */
5529 if (GET_MODE (reloadreg
) != r
->mode
&& r
->mode
!= VOIDmode
)
5530 reloadreg
= gen_rtx_REG (r
->mode
, REGNO (reloadreg
));
5532 /* If we are putting this into a SUBREG and RELOADREG is a
5533 SUBREG, we would be making nested SUBREGs, so we have to fix
5534 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5536 if (r
->subreg_loc
!= 0 && GET_CODE (reloadreg
) == SUBREG
)
5538 if (GET_MODE (*r
->subreg_loc
)
5539 == GET_MODE (SUBREG_REG (reloadreg
)))
5540 *r
->subreg_loc
= SUBREG_REG (reloadreg
);
5543 *r
->where
= SUBREG_REG (reloadreg
);
5544 SUBREG_WORD (*r
->subreg_loc
) += SUBREG_WORD (reloadreg
);
5548 *r
->where
= reloadreg
;
5550 /* If reload got no reg and isn't optional, something's wrong. */
5551 else if (! rld
[r
->what
].optional
)
5556 /* Make a copy of any replacements being done into X and move those copies
5557 to locations in Y, a copy of X. We only look at the highest level of
5561 copy_replacements (x
, y
)
5566 enum rtx_code code
= GET_CODE (x
);
5567 const char *fmt
= GET_RTX_FORMAT (code
);
5568 struct replacement
*r
;
5570 /* We can't support X being a SUBREG because we might then need to know its
5571 location if something inside it was replaced. */
5575 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5577 for (j
= 0; j
< n_replacements
; j
++)
5579 if (replacements
[j
].subreg_loc
== &XEXP (x
, i
))
5581 r
= &replacements
[n_replacements
++];
5582 r
->where
= replacements
[j
].where
;
5583 r
->subreg_loc
= &XEXP (y
, i
);
5584 r
->what
= replacements
[j
].what
;
5585 r
->mode
= replacements
[j
].mode
;
5587 else if (replacements
[j
].where
== &XEXP (x
, i
))
5589 r
= &replacements
[n_replacements
++];
5590 r
->where
= &XEXP (y
, i
);
5592 r
->what
= replacements
[j
].what
;
5593 r
->mode
= replacements
[j
].mode
;
5598 /* Change any replacements being done to *X to be done to *Y */
5601 move_replacements (x
, y
)
5607 for (i
= 0; i
< n_replacements
; i
++)
5608 if (replacements
[i
].subreg_loc
== x
)
5609 replacements
[i
].subreg_loc
= y
;
5610 else if (replacements
[i
].where
== x
)
5612 replacements
[i
].where
= y
;
5613 replacements
[i
].subreg_loc
= 0;
5617 /* If LOC was scheduled to be replaced by something, return the replacement.
5618 Otherwise, return *LOC. */
5621 find_replacement (loc
)
5624 struct replacement
*r
;
5626 for (r
= &replacements
[0]; r
< &replacements
[n_replacements
]; r
++)
5628 rtx reloadreg
= rld
[r
->what
].reg_rtx
;
5630 if (reloadreg
&& r
->where
== loc
)
5632 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
5633 reloadreg
= gen_rtx_REG (r
->mode
, REGNO (reloadreg
));
5637 else if (reloadreg
&& r
->subreg_loc
== loc
)
5639 /* RELOADREG must be either a REG or a SUBREG.
5641 ??? Is it actually still ever a SUBREG? If so, why? */
5643 if (GET_CODE (reloadreg
) == REG
)
5644 return gen_rtx_REG (GET_MODE (*loc
),
5645 REGNO (reloadreg
) + SUBREG_WORD (*loc
));
5646 else if (GET_MODE (reloadreg
) == GET_MODE (*loc
))
5649 return gen_rtx_SUBREG (GET_MODE (*loc
), SUBREG_REG (reloadreg
),
5650 SUBREG_WORD (reloadreg
) + SUBREG_WORD (*loc
));
5654 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
5655 what's inside and make a new rtl if so. */
5656 if (GET_CODE (*loc
) == PLUS
|| GET_CODE (*loc
) == MINUS
5657 || GET_CODE (*loc
) == MULT
)
5659 rtx x
= find_replacement (&XEXP (*loc
, 0));
5660 rtx y
= find_replacement (&XEXP (*loc
, 1));
5662 if (x
!= XEXP (*loc
, 0) || y
!= XEXP (*loc
, 1))
5663 return gen_rtx_fmt_ee (GET_CODE (*loc
), GET_MODE (*loc
), x
, y
);
5669 /* Return nonzero if register in range [REGNO, ENDREGNO)
5670 appears either explicitly or implicitly in X
5671 other than being stored into (except for earlyclobber operands).
5673 References contained within the substructure at LOC do not count.
5674 LOC may be zero, meaning don't ignore anything.
5676 This is similar to refers_to_regno_p in rtlanal.c except that we
5677 look at equivalences for pseudos that didn't get hard registers. */
5680 refers_to_regno_for_reload_p (regno
, endregno
, x
, loc
)
5681 unsigned int regno
, endregno
;
5694 code
= GET_CODE (x
);
5701 /* If this is a pseudo, a hard register must not have been allocated.
5702 X must therefore either be a constant or be in memory. */
5703 if (r
>= FIRST_PSEUDO_REGISTER
)
5705 if (reg_equiv_memory_loc
[r
])
5706 return refers_to_regno_for_reload_p (regno
, endregno
,
5707 reg_equiv_memory_loc
[r
],
5710 if (reg_equiv_constant
[r
])
5716 return (endregno
> r
5717 && regno
< r
+ (r
< FIRST_PSEUDO_REGISTER
5718 ? HARD_REGNO_NREGS (r
, GET_MODE (x
))
5722 /* If this is a SUBREG of a hard reg, we can see exactly which
5723 registers are being modified. Otherwise, handle normally. */
5724 if (GET_CODE (SUBREG_REG (x
)) == REG
5725 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
5727 unsigned int inner_regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
5728 unsigned int inner_endregno
5729 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
5730 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
5732 return endregno
> inner_regno
&& regno
< inner_endregno
;
5738 if (&SET_DEST (x
) != loc
5739 /* Note setting a SUBREG counts as referring to the REG it is in for
5740 a pseudo but not for hard registers since we can
5741 treat each word individually. */
5742 && ((GET_CODE (SET_DEST (x
)) == SUBREG
5743 && loc
!= &SUBREG_REG (SET_DEST (x
))
5744 && GET_CODE (SUBREG_REG (SET_DEST (x
))) == REG
5745 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
5746 && refers_to_regno_for_reload_p (regno
, endregno
,
5747 SUBREG_REG (SET_DEST (x
)),
5749 /* If the output is an earlyclobber operand, this is
5751 || ((GET_CODE (SET_DEST (x
)) != REG
5752 || earlyclobber_operand_p (SET_DEST (x
)))
5753 && refers_to_regno_for_reload_p (regno
, endregno
,
5754 SET_DEST (x
), loc
))))
5757 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
5766 /* X does not match, so try its subexpressions. */
5768 fmt
= GET_RTX_FORMAT (code
);
5769 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5771 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
5779 if (refers_to_regno_for_reload_p (regno
, endregno
,
5783 else if (fmt
[i
] == 'E')
5786 for (j
= XVECLEN (x
, i
) - 1; j
>=0; j
--)
5787 if (loc
!= &XVECEXP (x
, i
, j
)
5788 && refers_to_regno_for_reload_p (regno
, endregno
,
5789 XVECEXP (x
, i
, j
), loc
))
5796 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
5797 we check if any register number in X conflicts with the relevant register
5798 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
5799 contains a MEM (we don't bother checking for memory addresses that can't
5800 conflict because we expect this to be a rare case.
5802 This function is similar to reg_overlap_mention_p in rtlanal.c except
5803 that we look at equivalences for pseudos that didn't get hard registers. */
5806 reg_overlap_mentioned_for_reload_p (x
, in
)
5809 int regno
, endregno
;
5811 /* Overly conservative. */
5812 if (GET_CODE (x
) == STRICT_LOW_PART
)
5815 /* If either argument is a constant, then modifying X can not affect IN. */
5816 if (CONSTANT_P (x
) || CONSTANT_P (in
))
5818 else if (GET_CODE (x
) == SUBREG
)
5820 regno
= REGNO (SUBREG_REG (x
));
5821 if (regno
< FIRST_PSEUDO_REGISTER
)
5822 regno
+= SUBREG_WORD (x
);
5824 else if (GET_CODE (x
) == REG
)
5828 /* If this is a pseudo, it must not have been assigned a hard register.
5829 Therefore, it must either be in memory or be a constant. */
5831 if (regno
>= FIRST_PSEUDO_REGISTER
)
5833 if (reg_equiv_memory_loc
[regno
])
5834 return refers_to_mem_for_reload_p (in
);
5835 else if (reg_equiv_constant
[regno
])
5840 else if (GET_CODE (x
) == MEM
)
5841 return refers_to_mem_for_reload_p (in
);
5842 else if (GET_CODE (x
) == SCRATCH
|| GET_CODE (x
) == PC
5843 || GET_CODE (x
) == CC0
)
5844 return reg_mentioned_p (x
, in
);
5848 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
5849 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
5851 return refers_to_regno_for_reload_p (regno
, endregno
, in
, NULL_PTR
);
5854 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
5858 refers_to_mem_for_reload_p (x
)
5864 if (GET_CODE (x
) == MEM
)
5867 if (GET_CODE (x
) == REG
)
5868 return (REGNO (x
) >= FIRST_PSEUDO_REGISTER
5869 && reg_equiv_memory_loc
[REGNO (x
)]);
5871 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
5872 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
5874 && (GET_CODE (XEXP (x
, i
)) == MEM
5875 || refers_to_mem_for_reload_p (XEXP (x
, i
))))
5881 /* Check the insns before INSN to see if there is a suitable register
5882 containing the same value as GOAL.
5883 If OTHER is -1, look for a register in class CLASS.
5884 Otherwise, just see if register number OTHER shares GOAL's value.
5886 Return an rtx for the register found, or zero if none is found.
5888 If RELOAD_REG_P is (short *)1,
5889 we reject any hard reg that appears in reload_reg_rtx
5890 because such a hard reg is also needed coming into this insn.
5892 If RELOAD_REG_P is any other nonzero value,
5893 it is a vector indexed by hard reg number
5894 and we reject any hard reg whose element in the vector is nonnegative
5895 as well as any that appears in reload_reg_rtx.
5897 If GOAL is zero, then GOALREG is a register number; we look
5898 for an equivalent for that register.
5900 MODE is the machine mode of the value we want an equivalence for.
5901 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
5903 This function is used by jump.c as well as in the reload pass.
5905 If GOAL is the sum of the stack pointer and a constant, we treat it
5906 as if it were a constant except that sp is required to be unchanging. */
5909 find_equiv_reg (goal
, insn
, class, other
, reload_reg_p
, goalreg
, mode
)
5912 enum reg_class
class;
5914 short *reload_reg_p
;
5916 enum machine_mode mode
;
5918 register rtx p
= insn
;
5919 rtx goaltry
, valtry
, value
, where
;
5921 register int regno
= -1;
5925 int goal_mem_addr_varies
= 0;
5926 int need_stable_sp
= 0;
5932 else if (GET_CODE (goal
) == REG
)
5933 regno
= REGNO (goal
);
5934 else if (GET_CODE (goal
) == MEM
)
5936 enum rtx_code code
= GET_CODE (XEXP (goal
, 0));
5937 if (MEM_VOLATILE_P (goal
))
5939 if (flag_float_store
&& GET_MODE_CLASS (GET_MODE (goal
)) == MODE_FLOAT
)
5941 /* An address with side effects must be reexecuted. */
5954 else if (CONSTANT_P (goal
))
5956 else if (GET_CODE (goal
) == PLUS
5957 && XEXP (goal
, 0) == stack_pointer_rtx
5958 && CONSTANT_P (XEXP (goal
, 1)))
5959 goal_const
= need_stable_sp
= 1;
5960 else if (GET_CODE (goal
) == PLUS
5961 && XEXP (goal
, 0) == frame_pointer_rtx
5962 && CONSTANT_P (XEXP (goal
, 1)))
5967 /* Scan insns back from INSN, looking for one that copies
5968 a value into or out of GOAL.
5969 Stop and give up if we reach a label. */
5974 if (p
== 0 || GET_CODE (p
) == CODE_LABEL
)
5977 if (GET_CODE (p
) == INSN
5978 /* If we don't want spill regs ... */
5979 && (! (reload_reg_p
!= 0
5980 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
5981 /* ... then ignore insns introduced by reload; they aren't
5982 useful and can cause results in reload_as_needed to be
5983 different from what they were when calculating the need for
5984 spills. If we notice an input-reload insn here, we will
5985 reject it below, but it might hide a usable equivalent.
5986 That makes bad code. It may even abort: perhaps no reg was
5987 spilled for this insn because it was assumed we would find
5989 || INSN_UID (p
) < reload_first_uid
))
5992 pat
= single_set (p
);
5994 /* First check for something that sets some reg equal to GOAL. */
5997 && true_regnum (SET_SRC (pat
)) == regno
5998 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6001 && true_regnum (SET_DEST (pat
)) == regno
6002 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0)
6004 (goal_const
&& rtx_equal_p (SET_SRC (pat
), goal
)
6005 /* When looking for stack pointer + const,
6006 make sure we don't use a stack adjust. */
6007 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat
), goal
)
6008 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6010 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0
6011 && rtx_renumbered_equal_p (goal
, SET_SRC (pat
)))
6013 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0
6014 && rtx_renumbered_equal_p (goal
, SET_DEST (pat
)))
6015 /* If we are looking for a constant,
6016 and something equivalent to that constant was copied
6017 into a reg, we can use that reg. */
6018 || (goal_const
&& REG_NOTES (p
) != 0
6019 && (tem
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
))
6020 && ((rtx_equal_p (XEXP (tem
, 0), goal
)
6022 = true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6023 || (GET_CODE (SET_DEST (pat
)) == REG
6024 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
6025 && (GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0)))
6027 && GET_CODE (goal
) == CONST_INT
6029 = operand_subword (XEXP (tem
, 0), 0, 0,
6031 && rtx_equal_p (goal
, goaltry
)
6033 = operand_subword (SET_DEST (pat
), 0, 0,
6035 && (valueno
= true_regnum (valtry
)) >= 0)))
6036 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
6038 && GET_CODE (SET_DEST (pat
)) == REG
6039 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
6040 && (GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0)))
6042 && GET_CODE (goal
) == CONST_INT
6043 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 1, 0,
6045 && rtx_equal_p (goal
, goaltry
)
6047 = operand_subword (SET_DEST (pat
), 1, 0, VOIDmode
))
6048 && (valueno
= true_regnum (valtry
)) >= 0)))
6051 : ((unsigned) valueno
< FIRST_PSEUDO_REGISTER
6052 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
6062 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6063 (or copying VALUE into GOAL, if GOAL is also a register).
6064 Now verify that VALUE is really valid. */
6066 /* VALUENO is the register number of VALUE; a hard register. */
6068 /* Don't try to re-use something that is killed in this insn. We want
6069 to be able to trust REG_UNUSED notes. */
6070 if (REG_NOTES (where
) != 0 && find_reg_note (where
, REG_UNUSED
, value
))
6073 /* If we propose to get the value from the stack pointer or if GOAL is
6074 a MEM based on the stack pointer, we need a stable SP. */
6075 if (valueno
== STACK_POINTER_REGNUM
|| regno
== STACK_POINTER_REGNUM
6076 || (goal_mem
&& reg_overlap_mentioned_for_reload_p (stack_pointer_rtx
,
6080 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6081 if (GET_MODE (value
) != mode
)
6084 /* Reject VALUE if it was loaded from GOAL
6085 and is also a register that appears in the address of GOAL. */
6087 if (goal_mem
&& value
== SET_DEST (single_set (where
))
6088 && refers_to_regno_for_reload_p (valueno
,
6090 + HARD_REGNO_NREGS (valueno
, mode
)),
6094 /* Reject registers that overlap GOAL. */
6096 if (!goal_mem
&& !goal_const
6097 && regno
+ (int) HARD_REGNO_NREGS (regno
, mode
) > valueno
6098 && regno
< valueno
+ (int) HARD_REGNO_NREGS (valueno
, mode
))
6101 nregs
= HARD_REGNO_NREGS (regno
, mode
);
6102 valuenregs
= HARD_REGNO_NREGS (valueno
, mode
);
6104 /* Reject VALUE if it is one of the regs reserved for reloads.
6105 Reload1 knows how to reuse them anyway, and it would get
6106 confused if we allocated one without its knowledge.
6107 (Now that insns introduced by reload are ignored above,
6108 this case shouldn't happen, but I'm not positive.) */
6110 if (reload_reg_p
!= 0 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
6113 for (i
= 0; i
< valuenregs
; ++i
)
6114 if (reload_reg_p
[valueno
+ i
] >= 0)
6118 /* Reject VALUE if it is a register being used for an input reload
6119 even if it is not one of those reserved. */
6121 if (reload_reg_p
!= 0)
6124 for (i
= 0; i
< n_reloads
; i
++)
6125 if (rld
[i
].reg_rtx
!= 0 && rld
[i
].in
)
6127 int regno1
= REGNO (rld
[i
].reg_rtx
);
6128 int nregs1
= HARD_REGNO_NREGS (regno1
,
6129 GET_MODE (rld
[i
].reg_rtx
));
6130 if (regno1
< valueno
+ valuenregs
6131 && regno1
+ nregs1
> valueno
)
6137 /* We must treat frame pointer as varying here,
6138 since it can vary--in a nonlocal goto as generated by expand_goto. */
6139 goal_mem_addr_varies
= !CONSTANT_ADDRESS_P (XEXP (goal
, 0));
6141 /* Now verify that the values of GOAL and VALUE remain unaltered
6142 until INSN is reached. */
6151 /* Don't trust the conversion past a function call
6152 if either of the two is in a call-clobbered register, or memory. */
6153 if (GET_CODE (p
) == CALL_INSN
)
6157 if (goal_mem
|| need_stable_sp
)
6160 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
)
6161 for (i
= 0; i
< nregs
; ++i
)
6162 if (call_used_regs
[regno
+ i
])
6165 if (valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
)
6166 for (i
= 0; i
< valuenregs
; ++i
)
6167 if (call_used_regs
[valueno
+ i
])
6171 #ifdef NON_SAVING_SETJMP
6172 if (NON_SAVING_SETJMP
&& GET_CODE (p
) == NOTE
6173 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_SETJMP
)
6177 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
6181 /* Watch out for unspec_volatile, and volatile asms. */
6182 if (volatile_insn_p (pat
))
6185 /* If this insn P stores in either GOAL or VALUE, return 0.
6186 If GOAL is a memory ref and this insn writes memory, return 0.
6187 If GOAL is a memory ref and its address is not constant,
6188 and this insn P changes a register used in GOAL, return 0. */
6190 if (GET_CODE (pat
) == COND_EXEC
)
6191 pat
= COND_EXEC_CODE (pat
);
6192 if (GET_CODE (pat
) == SET
|| GET_CODE (pat
) == CLOBBER
)
6194 register rtx dest
= SET_DEST (pat
);
6195 while (GET_CODE (dest
) == SUBREG
6196 || GET_CODE (dest
) == ZERO_EXTRACT
6197 || GET_CODE (dest
) == SIGN_EXTRACT
6198 || GET_CODE (dest
) == STRICT_LOW_PART
)
6199 dest
= XEXP (dest
, 0);
6200 if (GET_CODE (dest
) == REG
)
6202 register int xregno
= REGNO (dest
);
6204 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6205 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6208 if (xregno
< regno
+ nregs
&& xregno
+ xnregs
> regno
)
6210 if (xregno
< valueno
+ valuenregs
6211 && xregno
+ xnregs
> valueno
)
6213 if (goal_mem_addr_varies
6214 && reg_overlap_mentioned_for_reload_p (dest
, goal
))
6216 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6219 else if (goal_mem
&& GET_CODE (dest
) == MEM
6220 && ! push_operand (dest
, GET_MODE (dest
)))
6222 else if (GET_CODE (dest
) == MEM
&& regno
>= FIRST_PSEUDO_REGISTER
6223 && reg_equiv_memory_loc
[regno
] != 0)
6225 else if (need_stable_sp
&& push_operand (dest
, GET_MODE (dest
)))
6228 else if (GET_CODE (pat
) == PARALLEL
)
6231 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; i
--)
6233 register rtx v1
= XVECEXP (pat
, 0, i
);
6234 if (GET_CODE (v1
) == COND_EXEC
)
6235 v1
= COND_EXEC_CODE (v1
);
6236 if (GET_CODE (v1
) == SET
|| GET_CODE (v1
) == CLOBBER
)
6238 register rtx dest
= SET_DEST (v1
);
6239 while (GET_CODE (dest
) == SUBREG
6240 || GET_CODE (dest
) == ZERO_EXTRACT
6241 || GET_CODE (dest
) == SIGN_EXTRACT
6242 || GET_CODE (dest
) == STRICT_LOW_PART
)
6243 dest
= XEXP (dest
, 0);
6244 if (GET_CODE (dest
) == REG
)
6246 register int xregno
= REGNO (dest
);
6248 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6249 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6252 if (xregno
< regno
+ nregs
6253 && xregno
+ xnregs
> regno
)
6255 if (xregno
< valueno
+ valuenregs
6256 && xregno
+ xnregs
> valueno
)
6258 if (goal_mem_addr_varies
6259 && reg_overlap_mentioned_for_reload_p (dest
,
6262 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6265 else if (goal_mem
&& GET_CODE (dest
) == MEM
6266 && ! push_operand (dest
, GET_MODE (dest
)))
6268 else if (GET_CODE (dest
) == MEM
&& regno
>= FIRST_PSEUDO_REGISTER
6269 && reg_equiv_memory_loc
[regno
] != 0)
6271 else if (need_stable_sp
6272 && push_operand (dest
, GET_MODE (dest
)))
6278 if (GET_CODE (p
) == CALL_INSN
&& CALL_INSN_FUNCTION_USAGE (p
))
6282 for (link
= CALL_INSN_FUNCTION_USAGE (p
); XEXP (link
, 1) != 0;
6283 link
= XEXP (link
, 1))
6285 pat
= XEXP (link
, 0);
6286 if (GET_CODE (pat
) == CLOBBER
)
6288 register rtx dest
= SET_DEST (pat
);
6290 if (GET_CODE (dest
) == REG
)
6292 register int xregno
= REGNO (dest
);
6294 = HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6296 if (xregno
< regno
+ nregs
6297 && xregno
+ xnregs
> regno
)
6299 else if (xregno
< valueno
+ valuenregs
6300 && xregno
+ xnregs
> valueno
)
6302 else if (goal_mem_addr_varies
6303 && reg_overlap_mentioned_for_reload_p (dest
,
6308 else if (goal_mem
&& GET_CODE (dest
) == MEM
6309 && ! push_operand (dest
, GET_MODE (dest
)))
6311 else if (need_stable_sp
6312 && push_operand (dest
, GET_MODE (dest
)))
6319 /* If this insn auto-increments or auto-decrements
6320 either regno or valueno, return 0 now.
6321 If GOAL is a memory ref and its address is not constant,
6322 and this insn P increments a register used in GOAL, return 0. */
6326 for (link
= REG_NOTES (p
); link
; link
= XEXP (link
, 1))
6327 if (REG_NOTE_KIND (link
) == REG_INC
6328 && GET_CODE (XEXP (link
, 0)) == REG
)
6330 register int incno
= REGNO (XEXP (link
, 0));
6331 if (incno
< regno
+ nregs
&& incno
>= regno
)
6333 if (incno
< valueno
+ valuenregs
&& incno
>= valueno
)
6335 if (goal_mem_addr_varies
6336 && reg_overlap_mentioned_for_reload_p (XEXP (link
, 0),
6346 /* Find a place where INCED appears in an increment or decrement operator
6347 within X, and return the amount INCED is incremented or decremented by.
6348 The value is always positive. */
6351 find_inc_amount (x
, inced
)
6354 register enum rtx_code code
= GET_CODE (x
);
6355 register const char *fmt
;
6360 register rtx addr
= XEXP (x
, 0);
6361 if ((GET_CODE (addr
) == PRE_DEC
6362 || GET_CODE (addr
) == POST_DEC
6363 || GET_CODE (addr
) == PRE_INC
6364 || GET_CODE (addr
) == POST_INC
)
6365 && XEXP (addr
, 0) == inced
)
6366 return GET_MODE_SIZE (GET_MODE (x
));
6369 fmt
= GET_RTX_FORMAT (code
);
6370 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6374 register int tem
= find_inc_amount (XEXP (x
, i
), inced
);
6381 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6383 register int tem
= find_inc_amount (XVECEXP (x
, i
, j
), inced
);
6393 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
6396 regno_clobbered_p (regno
, insn
)
6400 if (GET_CODE (PATTERN (insn
)) == CLOBBER
6401 && GET_CODE (XEXP (PATTERN (insn
), 0)) == REG
)
6402 return REGNO (XEXP (PATTERN (insn
), 0)) == regno
;
6404 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
6406 int i
= XVECLEN (PATTERN (insn
), 0) - 1;
6410 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
6411 if (GET_CODE (elt
) == CLOBBER
&& GET_CODE (XEXP (elt
, 0)) == REG
6412 && REGNO (XEXP (elt
, 0)) == regno
)
6420 static const char *reload_when_needed_name
[] =
6423 "RELOAD_FOR_OUTPUT",
6425 "RELOAD_FOR_INPUT_ADDRESS",
6426 "RELOAD_FOR_INPADDR_ADDRESS",
6427 "RELOAD_FOR_OUTPUT_ADDRESS",
6428 "RELOAD_FOR_OUTADDR_ADDRESS",
6429 "RELOAD_FOR_OPERAND_ADDRESS",
6430 "RELOAD_FOR_OPADDR_ADDR",
6432 "RELOAD_FOR_OTHER_ADDRESS"
6435 static const char * const reg_class_names
[] = REG_CLASS_NAMES
;
6437 /* These functions are used to print the variables set by 'find_reloads' */
6440 debug_reload_to_stream (f
)
6448 for (r
= 0; r
< n_reloads
; r
++)
6450 fprintf (f
, "Reload %d: ", r
);
6454 fprintf (f
, "reload_in (%s) = ",
6455 GET_MODE_NAME (rld
[r
].inmode
));
6456 print_inline_rtx (f
, rld
[r
].in
, 24);
6457 fprintf (f
, "\n\t");
6460 if (rld
[r
].out
!= 0)
6462 fprintf (f
, "reload_out (%s) = ",
6463 GET_MODE_NAME (rld
[r
].outmode
));
6464 print_inline_rtx (f
, rld
[r
].out
, 24);
6465 fprintf (f
, "\n\t");
6468 fprintf (f
, "%s, ", reg_class_names
[(int) rld
[r
].class]);
6470 fprintf (f
, "%s (opnum = %d)",
6471 reload_when_needed_name
[(int) rld
[r
].when_needed
],
6474 if (rld
[r
].optional
)
6475 fprintf (f
, ", optional");
6477 if (rld
[r
].nongroup
)
6478 fprintf (stderr
, ", nongroup");
6480 if (rld
[r
].inc
!= 0)
6481 fprintf (f
, ", inc by %d", rld
[r
].inc
);
6483 if (rld
[r
].nocombine
)
6484 fprintf (f
, ", can't combine");
6486 if (rld
[r
].secondary_p
)
6487 fprintf (f
, ", secondary_reload_p");
6489 if (rld
[r
].in_reg
!= 0)
6491 fprintf (f
, "\n\treload_in_reg: ");
6492 print_inline_rtx (f
, rld
[r
].in_reg
, 24);
6495 if (rld
[r
].out_reg
!= 0)
6497 fprintf (f
, "\n\treload_out_reg: ");
6498 print_inline_rtx (f
, rld
[r
].out_reg
, 24);
6501 if (rld
[r
].reg_rtx
!= 0)
6503 fprintf (f
, "\n\treload_reg_rtx: ");
6504 print_inline_rtx (f
, rld
[r
].reg_rtx
, 24);
6508 if (rld
[r
].secondary_in_reload
!= -1)
6510 fprintf (f
, "%ssecondary_in_reload = %d",
6511 prefix
, rld
[r
].secondary_in_reload
);
6515 if (rld
[r
].secondary_out_reload
!= -1)
6516 fprintf (f
, "%ssecondary_out_reload = %d\n",
6517 prefix
, rld
[r
].secondary_out_reload
);
6520 if (rld
[r
].secondary_in_icode
!= CODE_FOR_nothing
)
6522 fprintf (stderr
, "%ssecondary_in_icode = %s", prefix
,
6523 insn_data
[rld
[r
].secondary_in_icode
].name
);
6527 if (rld
[r
].secondary_out_icode
!= CODE_FOR_nothing
)
6528 fprintf (stderr
, "%ssecondary_out_icode = %s", prefix
,
6529 insn_data
[rld
[r
].secondary_out_icode
].name
);
6538 debug_reload_to_stream (stderr
);