1 /* { dg-do compile } */
2 /* { dg-options "-fstack-usage" } */
4 /* This is aimed at testing basic support for -fstack-usage in the back-ends.
5 See the SPARC back-end for example (grep flag_stack_usage_info in sparc.c).
6 Once it is implemented, adjust SIZE below so that the stack usage for the
7 function FOO is reported as 256 or 264 in the stack usage (.su) file.
8 Then check that this is the actual stack usage in the assembly file. */
10 #if defined(__aarch64__)
11 # define SIZE 256 /* No frame pointer for leaf functions (default) */
12 #elif defined(__arc__)
14 #elif defined(__i386__)
16 #elif defined(__x86_64__)
20 # define SIZE (256 - 24)
22 #elif defined (__sparc__)
23 # if defined (__arch64__)
28 #elif defined(__hppa__)
30 #elif defined (__alpha__)
32 #elif defined (__ia64__)
34 #elif defined(__mips__)
35 # if defined (__mips_abicalls) \
36 || (defined _MIPS_SIM && (_MIPS_SIM ==_ABIN32 || _MIPS_SIM==_ABI64))
41 #elif defined (__nds32__)
42 # define SIZE 248 /* 256 - 8 bytes, only $fp and padding bytes are saved in
43 the register save area under O0 optimization level. */
44 #elif defined (__powerpc64__) || defined (__ppc64__) || defined (__POWERPC64__) \
45 || defined (__PPC64__)
51 #elif defined (__powerpc__) || defined (__PPC__) || defined (__ppc__) \
52 || defined (__POWERPC__) || defined (PPC) || defined (_IBMR2)
53 # if defined (__ALTIVEC__)
54 # if defined (__APPLE__)
64 #elif defined (__AVR__)
66 #elif defined (__s390x__)
67 # define SIZE 96 /* 256 - 160 bytes for register save area */
68 #elif defined (__s390__)
69 # define SIZE 160 /* 256 - 96 bytes for register save area */
70 #elif defined (__SPU__)
72 #elif defined (__epiphany__)
73 # define SIZE (256 - __EPIPHANY_STACK_OFFSET__)
74 #elif defined (__RL78__)
76 #elif defined (__sh__)
78 #elif defined (__frv__)
80 #elif defined (xstormy16)
82 #elif defined (__nios2__)
95 /* { dg-final { scan-stack-usage "foo\t\(256|264\)\tstatic" } } */
96 /* { dg-final { cleanup-stack-usage } } */