1 /* If-conversion support.
2 Copyright (C) 2000-2015 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GCC is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
31 #include "insn-config.h"
36 #include "cfgcleanup.h"
47 #include "insn-codes.h"
49 #include "diagnostic-core.h"
53 #include "tree-pass.h"
55 #include "shrink-wrap.h"
59 #ifndef MAX_CONDITIONAL_EXECUTE
60 #define MAX_CONDITIONAL_EXECUTE \
61 (BRANCH_COST (optimize_function_for_speed_p (cfun), false) \
65 #define IFCVT_MULTIPLE_DUMPS 1
67 #define NULL_BLOCK ((basic_block) NULL)
69 /* True if after combine pass. */
70 static bool ifcvt_after_combine
;
72 /* True if the target has the cbranchcc4 optab. */
73 static bool have_cbranchcc4
;
75 /* # of IF-THEN or IF-THEN-ELSE blocks we looked at */
76 static int num_possible_if_blocks
;
78 /* # of IF-THEN or IF-THEN-ELSE blocks were converted to conditional
80 static int num_updated_if_blocks
;
82 /* # of changes made. */
83 static int num_true_changes
;
85 /* Whether conditional execution changes were made. */
86 static int cond_exec_changed_p
;
88 /* Forward references. */
89 static int count_bb_insns (const_basic_block
);
90 static bool cheap_bb_rtx_cost_p (const_basic_block
, int, int);
91 static rtx_insn
*first_active_insn (basic_block
);
92 static rtx_insn
*last_active_insn (basic_block
, int);
93 static rtx_insn
*find_active_insn_before (basic_block
, rtx_insn
*);
94 static rtx_insn
*find_active_insn_after (basic_block
, rtx_insn
*);
95 static basic_block
block_fallthru (basic_block
);
96 static int cond_exec_process_insns (ce_if_block
*, rtx_insn
*, rtx
, rtx
, int,
98 static rtx
cond_exec_get_condition (rtx_insn
*);
99 static rtx
noce_get_condition (rtx_insn
*, rtx_insn
**, bool);
100 static int noce_operand_ok (const_rtx
);
101 static void merge_if_block (ce_if_block
*);
102 static int find_cond_trap (basic_block
, edge
, edge
);
103 static basic_block
find_if_header (basic_block
, int);
104 static int block_jumps_and_fallthru_p (basic_block
, basic_block
);
105 static int noce_find_if_block (basic_block
, edge
, edge
, int);
106 static int cond_exec_find_if_block (ce_if_block
*);
107 static int find_if_case_1 (basic_block
, edge
, edge
);
108 static int find_if_case_2 (basic_block
, edge
, edge
);
109 static int dead_or_predicable (basic_block
, basic_block
, basic_block
,
111 static void noce_emit_move_insn (rtx
, rtx
);
112 static rtx_insn
*block_has_only_trap (basic_block
);
114 /* Count the number of non-jump active insns in BB. */
117 count_bb_insns (const_basic_block bb
)
120 rtx_insn
*insn
= BB_HEAD (bb
);
124 if (active_insn_p (insn
) && !JUMP_P (insn
))
127 if (insn
== BB_END (bb
))
129 insn
= NEXT_INSN (insn
);
135 /* Determine whether the total insn_rtx_cost on non-jump insns in
136 basic block BB is less than MAX_COST. This function returns
137 false if the cost of any instruction could not be estimated.
139 The cost of the non-jump insns in BB is scaled by REG_BR_PROB_BASE
140 as those insns are being speculated. MAX_COST is scaled with SCALE
141 plus a small fudge factor. */
144 cheap_bb_rtx_cost_p (const_basic_block bb
, int scale
, int max_cost
)
147 rtx_insn
*insn
= BB_HEAD (bb
);
148 bool speed
= optimize_bb_for_speed_p (bb
);
150 /* Set scale to REG_BR_PROB_BASE to void the identical scaling
151 applied to insn_rtx_cost when optimizing for size. Only do
152 this after combine because if-conversion might interfere with
153 passes before combine.
155 Use optimize_function_for_speed_p instead of the pre-defined
156 variable speed to make sure it is set to same value for all
157 basic blocks in one if-conversion transformation. */
158 if (!optimize_function_for_speed_p (cfun
) && ifcvt_after_combine
)
159 scale
= REG_BR_PROB_BASE
;
160 /* Our branch probability/scaling factors are just estimates and don't
161 account for cases where we can get speculation for free and other
162 secondary benefits. So we fudge the scale factor to make speculating
163 appear a little more profitable when optimizing for performance. */
165 scale
+= REG_BR_PROB_BASE
/ 8;
172 if (NONJUMP_INSN_P (insn
))
174 int cost
= insn_rtx_cost (PATTERN (insn
), speed
) * REG_BR_PROB_BASE
;
178 /* If this instruction is the load or set of a "stack" register,
179 such as a floating point register on x87, then the cost of
180 speculatively executing this insn may need to include
181 the additional cost of popping its result off of the
182 register stack. Unfortunately, correctly recognizing and
183 accounting for this additional overhead is tricky, so for
184 now we simply prohibit such speculative execution. */
187 rtx set
= single_set (insn
);
188 if (set
&& STACK_REG_P (SET_DEST (set
)))
194 if (count
>= max_cost
)
197 else if (CALL_P (insn
))
200 if (insn
== BB_END (bb
))
202 insn
= NEXT_INSN (insn
);
208 /* Return the first non-jump active insn in the basic block. */
211 first_active_insn (basic_block bb
)
213 rtx_insn
*insn
= BB_HEAD (bb
);
217 if (insn
== BB_END (bb
))
219 insn
= NEXT_INSN (insn
);
222 while (NOTE_P (insn
) || DEBUG_INSN_P (insn
))
224 if (insn
== BB_END (bb
))
226 insn
= NEXT_INSN (insn
);
235 /* Return the last non-jump active (non-jump) insn in the basic block. */
238 last_active_insn (basic_block bb
, int skip_use_p
)
240 rtx_insn
*insn
= BB_END (bb
);
241 rtx_insn
*head
= BB_HEAD (bb
);
245 || DEBUG_INSN_P (insn
)
247 && NONJUMP_INSN_P (insn
)
248 && GET_CODE (PATTERN (insn
)) == USE
))
252 insn
= PREV_INSN (insn
);
261 /* Return the active insn before INSN inside basic block CURR_BB. */
264 find_active_insn_before (basic_block curr_bb
, rtx_insn
*insn
)
266 if (!insn
|| insn
== BB_HEAD (curr_bb
))
269 while ((insn
= PREV_INSN (insn
)) != NULL_RTX
)
271 if (NONJUMP_INSN_P (insn
) || JUMP_P (insn
) || CALL_P (insn
))
274 /* No other active insn all the way to the start of the basic block. */
275 if (insn
== BB_HEAD (curr_bb
))
282 /* Return the active insn after INSN inside basic block CURR_BB. */
285 find_active_insn_after (basic_block curr_bb
, rtx_insn
*insn
)
287 if (!insn
|| insn
== BB_END (curr_bb
))
290 while ((insn
= NEXT_INSN (insn
)) != NULL_RTX
)
292 if (NONJUMP_INSN_P (insn
) || JUMP_P (insn
) || CALL_P (insn
))
295 /* No other active insn all the way to the end of the basic block. */
296 if (insn
== BB_END (curr_bb
))
303 /* Return the basic block reached by falling though the basic block BB. */
306 block_fallthru (basic_block bb
)
308 edge e
= find_fallthru_edge (bb
->succs
);
310 return (e
) ? e
->dest
: NULL_BLOCK
;
313 /* Return true if RTXs A and B can be safely interchanged. */
316 rtx_interchangeable_p (const_rtx a
, const_rtx b
)
318 if (!rtx_equal_p (a
, b
))
321 if (GET_CODE (a
) != MEM
)
324 /* A dead type-unsafe memory reference is legal, but a live type-unsafe memory
325 reference is not. Interchanging a dead type-unsafe memory reference with
326 a live type-safe one creates a live type-unsafe memory reference, in other
327 words, it makes the program illegal.
328 We check here conservatively whether the two memory references have equal
329 memory attributes. */
331 return mem_attrs_eq_p (get_mem_attrs (a
), get_mem_attrs (b
));
335 /* Go through a bunch of insns, converting them to conditional
336 execution format if possible. Return TRUE if all of the non-note
337 insns were processed. */
340 cond_exec_process_insns (ce_if_block
*ce_info ATTRIBUTE_UNUSED
,
341 /* if block information */rtx_insn
*start
,
342 /* first insn to look at */rtx end
,
343 /* last insn to look at */rtx test
,
344 /* conditional execution test */int prob_val
,
345 /* probability of branch taken. */int mod_ok
)
347 int must_be_last
= FALSE
;
355 for (insn
= start
; ; insn
= NEXT_INSN (insn
))
357 /* dwarf2out can't cope with conditional prologues. */
358 if (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_PROLOGUE_END
)
361 if (NOTE_P (insn
) || DEBUG_INSN_P (insn
))
364 gcc_assert (NONJUMP_INSN_P (insn
) || CALL_P (insn
));
366 /* dwarf2out can't cope with conditional unwind info. */
367 if (RTX_FRAME_RELATED_P (insn
))
370 /* Remove USE insns that get in the way. */
371 if (reload_completed
&& GET_CODE (PATTERN (insn
)) == USE
)
373 /* ??? Ug. Actually unlinking the thing is problematic,
374 given what we'd have to coordinate with our callers. */
375 SET_INSN_DELETED (insn
);
379 /* Last insn wasn't last? */
383 if (modified_in_p (test
, insn
))
390 /* Now build the conditional form of the instruction. */
391 pattern
= PATTERN (insn
);
392 xtest
= copy_rtx (test
);
394 /* If this is already a COND_EXEC, rewrite the test to be an AND of the
396 if (GET_CODE (pattern
) == COND_EXEC
)
398 if (GET_MODE (xtest
) != GET_MODE (COND_EXEC_TEST (pattern
)))
401 xtest
= gen_rtx_AND (GET_MODE (xtest
), xtest
,
402 COND_EXEC_TEST (pattern
));
403 pattern
= COND_EXEC_CODE (pattern
);
406 pattern
= gen_rtx_COND_EXEC (VOIDmode
, xtest
, pattern
);
408 /* If the machine needs to modify the insn being conditionally executed,
409 say for example to force a constant integer operand into a temp
410 register, do so here. */
411 #ifdef IFCVT_MODIFY_INSN
412 IFCVT_MODIFY_INSN (ce_info
, pattern
, insn
);
417 validate_change (insn
, &PATTERN (insn
), pattern
, 1);
419 if (CALL_P (insn
) && prob_val
>= 0)
420 validate_change (insn
, ®_NOTES (insn
),
421 gen_rtx_INT_LIST ((machine_mode
) REG_BR_PROB
,
422 prob_val
, REG_NOTES (insn
)), 1);
432 /* Return the condition for a jump. Do not do any special processing. */
435 cond_exec_get_condition (rtx_insn
*jump
)
439 if (any_condjump_p (jump
))
440 test_if
= SET_SRC (pc_set (jump
));
443 cond
= XEXP (test_if
, 0);
445 /* If this branches to JUMP_LABEL when the condition is false,
446 reverse the condition. */
447 if (GET_CODE (XEXP (test_if
, 2)) == LABEL_REF
448 && LABEL_REF_LABEL (XEXP (test_if
, 2)) == JUMP_LABEL (jump
))
450 enum rtx_code rev
= reversed_comparison_code (cond
, jump
);
454 cond
= gen_rtx_fmt_ee (rev
, GET_MODE (cond
), XEXP (cond
, 0),
461 /* Given a simple IF-THEN or IF-THEN-ELSE block, attempt to convert it
462 to conditional execution. Return TRUE if we were successful at
463 converting the block. */
466 cond_exec_process_if_block (ce_if_block
* ce_info
,
467 /* if block information */int do_multiple_p
)
469 basic_block test_bb
= ce_info
->test_bb
; /* last test block */
470 basic_block then_bb
= ce_info
->then_bb
; /* THEN */
471 basic_block else_bb
= ce_info
->else_bb
; /* ELSE or NULL */
472 rtx test_expr
; /* expression in IF_THEN_ELSE that is tested */
473 rtx_insn
*then_start
; /* first insn in THEN block */
474 rtx_insn
*then_end
; /* last insn + 1 in THEN block */
475 rtx_insn
*else_start
= NULL
; /* first insn in ELSE block or NULL */
476 rtx_insn
*else_end
= NULL
; /* last insn + 1 in ELSE block */
477 int max
; /* max # of insns to convert. */
478 int then_mod_ok
; /* whether conditional mods are ok in THEN */
479 rtx true_expr
; /* test for else block insns */
480 rtx false_expr
; /* test for then block insns */
481 int true_prob_val
; /* probability of else block */
482 int false_prob_val
; /* probability of then block */
483 rtx_insn
*then_last_head
= NULL
; /* Last match at the head of THEN */
484 rtx_insn
*else_last_head
= NULL
; /* Last match at the head of ELSE */
485 rtx_insn
*then_first_tail
= NULL
; /* First match at the tail of THEN */
486 rtx_insn
*else_first_tail
= NULL
; /* First match at the tail of ELSE */
487 int then_n_insns
, else_n_insns
, n_insns
;
488 enum rtx_code false_code
;
491 /* If test is comprised of && or || elements, and we've failed at handling
492 all of them together, just use the last test if it is the special case of
493 && elements without an ELSE block. */
494 if (!do_multiple_p
&& ce_info
->num_multiple_test_blocks
)
496 if (else_bb
|| ! ce_info
->and_and_p
)
499 ce_info
->test_bb
= test_bb
= ce_info
->last_test_bb
;
500 ce_info
->num_multiple_test_blocks
= 0;
501 ce_info
->num_and_and_blocks
= 0;
502 ce_info
->num_or_or_blocks
= 0;
505 /* Find the conditional jump to the ELSE or JOIN part, and isolate
507 test_expr
= cond_exec_get_condition (BB_END (test_bb
));
511 /* If the conditional jump is more than just a conditional jump,
512 then we can not do conditional execution conversion on this block. */
513 if (! onlyjump_p (BB_END (test_bb
)))
516 /* Collect the bounds of where we're to search, skipping any labels, jumps
517 and notes at the beginning and end of the block. Then count the total
518 number of insns and see if it is small enough to convert. */
519 then_start
= first_active_insn (then_bb
);
520 then_end
= last_active_insn (then_bb
, TRUE
);
521 then_n_insns
= ce_info
->num_then_insns
= count_bb_insns (then_bb
);
522 n_insns
= then_n_insns
;
523 max
= MAX_CONDITIONAL_EXECUTE
;
530 else_start
= first_active_insn (else_bb
);
531 else_end
= last_active_insn (else_bb
, TRUE
);
532 else_n_insns
= ce_info
->num_else_insns
= count_bb_insns (else_bb
);
533 n_insns
+= else_n_insns
;
535 /* Look for matching sequences at the head and tail of the two blocks,
536 and limit the range of insns to be converted if possible. */
537 n_matching
= flow_find_cross_jump (then_bb
, else_bb
,
538 &then_first_tail
, &else_first_tail
,
540 if (then_first_tail
== BB_HEAD (then_bb
))
541 then_start
= then_end
= NULL
;
542 if (else_first_tail
== BB_HEAD (else_bb
))
543 else_start
= else_end
= NULL
;
548 then_end
= find_active_insn_before (then_bb
, then_first_tail
);
550 else_end
= find_active_insn_before (else_bb
, else_first_tail
);
551 n_insns
-= 2 * n_matching
;
556 && then_n_insns
> n_matching
557 && else_n_insns
> n_matching
)
559 int longest_match
= MIN (then_n_insns
- n_matching
,
560 else_n_insns
- n_matching
);
562 = flow_find_head_matching_sequence (then_bb
, else_bb
,
571 /* We won't pass the insns in the head sequence to
572 cond_exec_process_insns, so we need to test them here
573 to make sure that they don't clobber the condition. */
574 for (insn
= BB_HEAD (then_bb
);
575 insn
!= NEXT_INSN (then_last_head
);
576 insn
= NEXT_INSN (insn
))
577 if (!LABEL_P (insn
) && !NOTE_P (insn
)
578 && !DEBUG_INSN_P (insn
)
579 && modified_in_p (test_expr
, insn
))
583 if (then_last_head
== then_end
)
584 then_start
= then_end
= NULL
;
585 if (else_last_head
== else_end
)
586 else_start
= else_end
= NULL
;
591 then_start
= find_active_insn_after (then_bb
, then_last_head
);
593 else_start
= find_active_insn_after (else_bb
, else_last_head
);
594 n_insns
-= 2 * n_matching
;
602 /* Map test_expr/test_jump into the appropriate MD tests to use on
603 the conditionally executed code. */
605 true_expr
= test_expr
;
607 false_code
= reversed_comparison_code (true_expr
, BB_END (test_bb
));
608 if (false_code
!= UNKNOWN
)
609 false_expr
= gen_rtx_fmt_ee (false_code
, GET_MODE (true_expr
),
610 XEXP (true_expr
, 0), XEXP (true_expr
, 1));
612 false_expr
= NULL_RTX
;
614 #ifdef IFCVT_MODIFY_TESTS
615 /* If the machine description needs to modify the tests, such as setting a
616 conditional execution register from a comparison, it can do so here. */
617 IFCVT_MODIFY_TESTS (ce_info
, true_expr
, false_expr
);
619 /* See if the conversion failed. */
620 if (!true_expr
|| !false_expr
)
624 note
= find_reg_note (BB_END (test_bb
), REG_BR_PROB
, NULL_RTX
);
627 true_prob_val
= XINT (note
, 0);
628 false_prob_val
= REG_BR_PROB_BASE
- true_prob_val
;
636 /* If we have && or || tests, do them here. These tests are in the adjacent
637 blocks after the first block containing the test. */
638 if (ce_info
->num_multiple_test_blocks
> 0)
640 basic_block bb
= test_bb
;
641 basic_block last_test_bb
= ce_info
->last_test_bb
;
648 rtx_insn
*start
, *end
;
650 enum rtx_code f_code
;
652 bb
= block_fallthru (bb
);
653 start
= first_active_insn (bb
);
654 end
= last_active_insn (bb
, TRUE
);
656 && ! cond_exec_process_insns (ce_info
, start
, end
, false_expr
,
657 false_prob_val
, FALSE
))
660 /* If the conditional jump is more than just a conditional jump, then
661 we can not do conditional execution conversion on this block. */
662 if (! onlyjump_p (BB_END (bb
)))
665 /* Find the conditional jump and isolate the test. */
666 t
= cond_exec_get_condition (BB_END (bb
));
670 f_code
= reversed_comparison_code (t
, BB_END (bb
));
671 if (f_code
== UNKNOWN
)
674 f
= gen_rtx_fmt_ee (f_code
, GET_MODE (t
), XEXP (t
, 0), XEXP (t
, 1));
675 if (ce_info
->and_and_p
)
677 t
= gen_rtx_AND (GET_MODE (t
), true_expr
, t
);
678 f
= gen_rtx_IOR (GET_MODE (t
), false_expr
, f
);
682 t
= gen_rtx_IOR (GET_MODE (t
), true_expr
, t
);
683 f
= gen_rtx_AND (GET_MODE (t
), false_expr
, f
);
686 /* If the machine description needs to modify the tests, such as
687 setting a conditional execution register from a comparison, it can
689 #ifdef IFCVT_MODIFY_MULTIPLE_TESTS
690 IFCVT_MODIFY_MULTIPLE_TESTS (ce_info
, bb
, t
, f
);
692 /* See if the conversion failed. */
700 while (bb
!= last_test_bb
);
703 /* For IF-THEN-ELSE blocks, we don't allow modifications of the test
704 on then THEN block. */
705 then_mod_ok
= (else_bb
== NULL_BLOCK
);
707 /* Go through the THEN and ELSE blocks converting the insns if possible
708 to conditional execution. */
712 || ! cond_exec_process_insns (ce_info
, then_start
, then_end
,
713 false_expr
, false_prob_val
,
717 if (else_bb
&& else_end
718 && ! cond_exec_process_insns (ce_info
, else_start
, else_end
,
719 true_expr
, true_prob_val
, TRUE
))
722 /* If we cannot apply the changes, fail. Do not go through the normal fail
723 processing, since apply_change_group will call cancel_changes. */
724 if (! apply_change_group ())
726 #ifdef IFCVT_MODIFY_CANCEL
727 /* Cancel any machine dependent changes. */
728 IFCVT_MODIFY_CANCEL (ce_info
);
733 #ifdef IFCVT_MODIFY_FINAL
734 /* Do any machine dependent final modifications. */
735 IFCVT_MODIFY_FINAL (ce_info
);
738 /* Conversion succeeded. */
740 fprintf (dump_file
, "%d insn%s converted to conditional execution.\n",
741 n_insns
, (n_insns
== 1) ? " was" : "s were");
743 /* Merge the blocks! If we had matching sequences, make sure to delete one
744 copy at the appropriate location first: delete the copy in the THEN branch
745 for a tail sequence so that the remaining one is executed last for both
746 branches, and delete the copy in the ELSE branch for a head sequence so
747 that the remaining one is executed first for both branches. */
750 rtx_insn
*from
= then_first_tail
;
752 from
= find_active_insn_after (then_bb
, from
);
753 delete_insn_chain (from
, BB_END (then_bb
), false);
756 delete_insn_chain (first_active_insn (else_bb
), else_last_head
, false);
758 merge_if_block (ce_info
);
759 cond_exec_changed_p
= TRUE
;
763 #ifdef IFCVT_MODIFY_CANCEL
764 /* Cancel any machine dependent changes. */
765 IFCVT_MODIFY_CANCEL (ce_info
);
772 /* Used by noce_process_if_block to communicate with its subroutines.
774 The subroutines know that A and B may be evaluated freely. They
775 know that X is a register. They should insert new instructions
776 before cond_earliest. */
780 /* The basic blocks that make up the IF-THEN-{ELSE-,}JOIN block. */
781 basic_block test_bb
, then_bb
, else_bb
, join_bb
;
783 /* The jump that ends TEST_BB. */
786 /* The jump condition. */
789 /* New insns should be inserted before this one. */
790 rtx_insn
*cond_earliest
;
792 /* Insns in the THEN and ELSE block. There is always just this
793 one insns in those blocks. The insns are single_set insns.
794 If there was no ELSE block, INSN_B is the last insn before
795 COND_EARLIEST, or NULL_RTX. In the former case, the insn
796 operands are still valid, as if INSN_B was moved down below
798 rtx_insn
*insn_a
, *insn_b
;
800 /* The SET_SRC of INSN_A and INSN_B. */
803 /* The SET_DEST of INSN_A. */
806 /* True if this if block is not canonical. In the canonical form of
807 if blocks, the THEN_BB is the block reached via the fallthru edge
808 from TEST_BB. For the noce transformations, we allow the symmetric
810 bool then_else_reversed
;
812 /* True if the contents of then_bb and else_bb are a
813 simple single set instruction. */
817 /* The total rtx cost of the instructions in then_bb and else_bb. */
818 unsigned int then_cost
;
819 unsigned int else_cost
;
821 /* Estimated cost of the particular branch instruction. */
822 unsigned int branch_cost
;
825 static rtx
noce_emit_store_flag (struct noce_if_info
*, rtx
, int, int);
826 static int noce_try_move (struct noce_if_info
*);
827 static int noce_try_store_flag (struct noce_if_info
*);
828 static int noce_try_addcc (struct noce_if_info
*);
829 static int noce_try_store_flag_constants (struct noce_if_info
*);
830 static int noce_try_store_flag_mask (struct noce_if_info
*);
831 static rtx
noce_emit_cmove (struct noce_if_info
*, rtx
, enum rtx_code
, rtx
,
833 static int noce_try_cmove (struct noce_if_info
*);
834 static int noce_try_cmove_arith (struct noce_if_info
*);
835 static rtx
noce_get_alt_condition (struct noce_if_info
*, rtx
, rtx_insn
**);
836 static int noce_try_minmax (struct noce_if_info
*);
837 static int noce_try_abs (struct noce_if_info
*);
838 static int noce_try_sign_mask (struct noce_if_info
*);
840 /* Helper function for noce_try_store_flag*. */
843 noce_emit_store_flag (struct noce_if_info
*if_info
, rtx x
, int reversep
,
846 rtx cond
= if_info
->cond
;
850 cond_complex
= (! general_operand (XEXP (cond
, 0), VOIDmode
)
851 || ! general_operand (XEXP (cond
, 1), VOIDmode
));
853 /* If earliest == jump, or when the condition is complex, try to
854 build the store_flag insn directly. */
858 rtx set
= pc_set (if_info
->jump
);
859 cond
= XEXP (SET_SRC (set
), 0);
860 if (GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
861 && LABEL_REF_LABEL (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (if_info
->jump
))
862 reversep
= !reversep
;
863 if (if_info
->then_else_reversed
)
864 reversep
= !reversep
;
868 code
= reversed_comparison_code (cond
, if_info
->jump
);
870 code
= GET_CODE (cond
);
872 if ((if_info
->cond_earliest
== if_info
->jump
|| cond_complex
)
873 && (normalize
== 0 || STORE_FLAG_VALUE
== normalize
))
875 rtx src
= gen_rtx_fmt_ee (code
, GET_MODE (x
), XEXP (cond
, 0),
877 rtx set
= gen_rtx_SET (x
, src
);
880 rtx_insn
*insn
= emit_insn (set
);
882 if (recog_memoized (insn
) >= 0)
884 rtx_insn
*seq
= get_insns ();
888 if_info
->cond_earliest
= if_info
->jump
;
896 /* Don't even try if the comparison operands or the mode of X are weird. */
897 if (cond_complex
|| !SCALAR_INT_MODE_P (GET_MODE (x
)))
900 return emit_store_flag (x
, code
, XEXP (cond
, 0),
901 XEXP (cond
, 1), VOIDmode
,
902 (code
== LTU
|| code
== LEU
903 || code
== GEU
|| code
== GTU
), normalize
);
906 /* Emit instruction to move an rtx, possibly into STRICT_LOW_PART.
907 X is the destination/target and Y is the value to copy. */
910 noce_emit_move_insn (rtx x
, rtx y
)
912 machine_mode outmode
;
916 if (GET_CODE (x
) != STRICT_LOW_PART
)
918 rtx_insn
*seq
, *insn
;
923 /* Check that the SET_SRC is reasonable before calling emit_move_insn,
924 otherwise construct a suitable SET pattern ourselves. */
925 insn
= (OBJECT_P (y
) || CONSTANT_P (y
) || GET_CODE (y
) == SUBREG
)
926 ? emit_move_insn (x
, y
)
927 : emit_insn (gen_rtx_SET (x
, y
));
931 if (recog_memoized (insn
) <= 0)
933 if (GET_CODE (x
) == ZERO_EXTRACT
)
935 rtx op
= XEXP (x
, 0);
936 unsigned HOST_WIDE_INT size
= INTVAL (XEXP (x
, 1));
937 unsigned HOST_WIDE_INT start
= INTVAL (XEXP (x
, 2));
939 /* store_bit_field expects START to be relative to
940 BYTES_BIG_ENDIAN and adjusts this value for machines with
941 BITS_BIG_ENDIAN != BYTES_BIG_ENDIAN. In order to be able to
942 invoke store_bit_field again it is necessary to have the START
943 value from the first call. */
944 if (BITS_BIG_ENDIAN
!= BYTES_BIG_ENDIAN
)
947 start
= BITS_PER_UNIT
- start
- size
;
950 gcc_assert (REG_P (op
));
951 start
= BITS_PER_WORD
- start
- size
;
955 gcc_assert (start
< (MEM_P (op
) ? BITS_PER_UNIT
: BITS_PER_WORD
));
956 store_bit_field (op
, size
, start
, 0, 0, GET_MODE (x
), y
);
960 switch (GET_RTX_CLASS (GET_CODE (y
)))
963 ot
= code_to_optab (GET_CODE (y
));
967 target
= expand_unop (GET_MODE (y
), ot
, XEXP (y
, 0), x
, 0);
968 if (target
!= NULL_RTX
)
971 emit_move_insn (x
, target
);
980 ot
= code_to_optab (GET_CODE (y
));
984 target
= expand_binop (GET_MODE (y
), ot
,
985 XEXP (y
, 0), XEXP (y
, 1),
987 if (target
!= NULL_RTX
)
990 emit_move_insn (x
, target
);
1006 outer
= XEXP (x
, 0);
1007 inner
= XEXP (outer
, 0);
1008 outmode
= GET_MODE (outer
);
1009 bitpos
= SUBREG_BYTE (outer
) * BITS_PER_UNIT
;
1010 store_bit_field (inner
, GET_MODE_BITSIZE (outmode
), bitpos
,
1014 /* Return the CC reg if it is used in COND. */
1017 cc_in_cond (rtx cond
)
1019 if (have_cbranchcc4
&& cond
1020 && GET_MODE_CLASS (GET_MODE (XEXP (cond
, 0))) == MODE_CC
)
1021 return XEXP (cond
, 0);
1026 /* Return sequence of instructions generated by if conversion. This
1027 function calls end_sequence() to end the current stream, ensures
1028 that the instructions are unshared, recognizable non-jump insns.
1029 On failure, this function returns a NULL_RTX. */
1032 end_ifcvt_sequence (struct noce_if_info
*if_info
)
1035 rtx_insn
*seq
= get_insns ();
1036 rtx cc
= cc_in_cond (if_info
->cond
);
1038 set_used_flags (if_info
->x
);
1039 set_used_flags (if_info
->cond
);
1040 set_used_flags (if_info
->a
);
1041 set_used_flags (if_info
->b
);
1043 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
1044 set_used_flags (insn
);
1046 unshare_all_rtl_in_chain (seq
);
1049 /* Make sure that all of the instructions emitted are recognizable,
1050 and that we haven't introduced a new jump instruction.
1051 As an exercise for the reader, build a general mechanism that
1052 allows proper placement of required clobbers. */
1053 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
1055 || recog_memoized (insn
) == -1
1056 /* Make sure new generated code does not clobber CC. */
1057 || (cc
&& set_of (cc
, insn
)))
1063 /* Return true iff the then and else basic block (if it exists)
1064 consist of a single simple set instruction. */
1067 noce_simple_bbs (struct noce_if_info
*if_info
)
1069 if (!if_info
->then_simple
)
1072 if (if_info
->else_bb
)
1073 return if_info
->else_simple
;
1078 /* Convert "if (a != b) x = a; else x = b" into "x = a" and
1079 "if (a == b) x = a; else x = b" into "x = b". */
1082 noce_try_move (struct noce_if_info
*if_info
)
1084 rtx cond
= if_info
->cond
;
1085 enum rtx_code code
= GET_CODE (cond
);
1089 if (code
!= NE
&& code
!= EQ
)
1092 if (!noce_simple_bbs (if_info
))
1095 /* This optimization isn't valid if either A or B could be a NaN
1096 or a signed zero. */
1097 if (HONOR_NANS (if_info
->x
)
1098 || HONOR_SIGNED_ZEROS (if_info
->x
))
1101 /* Check whether the operands of the comparison are A and in
1103 if ((rtx_equal_p (if_info
->a
, XEXP (cond
, 0))
1104 && rtx_equal_p (if_info
->b
, XEXP (cond
, 1)))
1105 || (rtx_equal_p (if_info
->a
, XEXP (cond
, 1))
1106 && rtx_equal_p (if_info
->b
, XEXP (cond
, 0))))
1108 if (!rtx_interchangeable_p (if_info
->a
, if_info
->b
))
1111 y
= (code
== EQ
) ? if_info
->a
: if_info
->b
;
1113 /* Avoid generating the move if the source is the destination. */
1114 if (! rtx_equal_p (if_info
->x
, y
))
1117 noce_emit_move_insn (if_info
->x
, y
);
1118 seq
= end_ifcvt_sequence (if_info
);
1122 emit_insn_before_setloc (seq
, if_info
->jump
,
1123 INSN_LOCATION (if_info
->insn_a
));
1130 /* Convert "if (test) x = 1; else x = 0".
1132 Only try 0 and STORE_FLAG_VALUE here. Other combinations will be
1133 tried in noce_try_store_flag_constants after noce_try_cmove has had
1134 a go at the conversion. */
1137 noce_try_store_flag (struct noce_if_info
*if_info
)
1143 if (!noce_simple_bbs (if_info
))
1146 if (CONST_INT_P (if_info
->b
)
1147 && INTVAL (if_info
->b
) == STORE_FLAG_VALUE
1148 && if_info
->a
== const0_rtx
)
1150 else if (if_info
->b
== const0_rtx
1151 && CONST_INT_P (if_info
->a
)
1152 && INTVAL (if_info
->a
) == STORE_FLAG_VALUE
1153 && (reversed_comparison_code (if_info
->cond
, if_info
->jump
)
1161 target
= noce_emit_store_flag (if_info
, if_info
->x
, reversep
, 0);
1164 if (target
!= if_info
->x
)
1165 noce_emit_move_insn (if_info
->x
, target
);
1167 seq
= end_ifcvt_sequence (if_info
);
1171 emit_insn_before_setloc (seq
, if_info
->jump
,
1172 INSN_LOCATION (if_info
->insn_a
));
1182 /* Convert "if (test) x = a; else x = b", for A and B constant.
1183 Also allow A = y + c1, B = y + c2, with a common y between A
1187 noce_try_store_flag_constants (struct noce_if_info
*if_info
)
1192 HOST_WIDE_INT itrue
, ifalse
, diff
, tmp
;
1195 machine_mode mode
= GET_MODE (if_info
->x
);;
1196 rtx common
= NULL_RTX
;
1201 /* Handle cases like x := test ? y + 3 : y + 4. */
1202 if (GET_CODE (a
) == PLUS
1203 && GET_CODE (b
) == PLUS
1204 && CONST_INT_P (XEXP (a
, 1))
1205 && CONST_INT_P (XEXP (b
, 1))
1206 && rtx_equal_p (XEXP (a
, 0), XEXP (b
, 0))
1207 && noce_operand_ok (XEXP (a
, 0))
1208 && if_info
->branch_cost
>= 2)
1210 common
= XEXP (a
, 0);
1215 if (!noce_simple_bbs (if_info
))
1221 ifalse
= INTVAL (a
);
1223 bool subtract_flag_p
= false;
1225 diff
= (unsigned HOST_WIDE_INT
) itrue
- ifalse
;
1226 /* Make sure we can represent the difference between the two values. */
1228 != ((ifalse
< 0) != (itrue
< 0) ? ifalse
< 0 : ifalse
< itrue
))
1231 diff
= trunc_int_for_mode (diff
, mode
);
1233 can_reverse
= (reversed_comparison_code (if_info
->cond
, if_info
->jump
)
1237 if (diff
== STORE_FLAG_VALUE
|| diff
== -STORE_FLAG_VALUE
)
1240 /* We could collapse these cases but it is easier to follow the
1241 diff/STORE_FLAG_VALUE combinations when they are listed
1245 => 4 + (test != 0). */
1246 if (diff
< 0 && STORE_FLAG_VALUE
< 0)
1249 => can_reverse | 4 + (test == 0)
1250 !can_reverse | 3 - (test != 0). */
1251 else if (diff
> 0 && STORE_FLAG_VALUE
< 0)
1253 reversep
= can_reverse
;
1254 subtract_flag_p
= !can_reverse
;
1255 /* If we need to subtract the flag and we have PLUS-immediate
1256 A and B then it is unlikely to be beneficial to play tricks
1258 if (subtract_flag_p
&& common
)
1262 => can_reverse | 3 + (test == 0)
1263 !can_reverse | 4 - (test != 0). */
1264 else if (diff
< 0 && STORE_FLAG_VALUE
> 0)
1266 reversep
= can_reverse
;
1267 subtract_flag_p
= !can_reverse
;
1268 /* If we need to subtract the flag and we have PLUS-immediate
1269 A and B then it is unlikely to be beneficial to play tricks
1271 if (subtract_flag_p
&& common
)
1275 => 4 + (test != 0). */
1276 else if (diff
> 0 && STORE_FLAG_VALUE
> 0)
1281 else if (ifalse
== 0 && exact_log2 (itrue
) >= 0
1282 && (STORE_FLAG_VALUE
== 1
1283 || if_info
->branch_cost
>= 2))
1285 else if (itrue
== 0 && exact_log2 (ifalse
) >= 0 && can_reverse
1286 && (STORE_FLAG_VALUE
== 1 || if_info
->branch_cost
>= 2))
1291 else if (itrue
== -1
1292 && (STORE_FLAG_VALUE
== -1
1293 || if_info
->branch_cost
>= 2))
1295 else if (ifalse
== -1 && can_reverse
1296 && (STORE_FLAG_VALUE
== -1 || if_info
->branch_cost
>= 2))
1306 std::swap (itrue
, ifalse
);
1307 diff
= trunc_int_for_mode (-(unsigned HOST_WIDE_INT
) diff
, mode
);
1312 /* If we have x := test ? x + 3 : x + 4 then move the original
1313 x out of the way while we store flags. */
1314 if (common
&& rtx_equal_p (common
, if_info
->x
))
1316 common
= gen_reg_rtx (mode
);
1317 noce_emit_move_insn (common
, if_info
->x
);
1320 target
= noce_emit_store_flag (if_info
, if_info
->x
, reversep
, normalize
);
1327 /* if (test) x = 3; else x = 4;
1328 => x = 3 + (test == 0); */
1329 if (diff
== STORE_FLAG_VALUE
|| diff
== -STORE_FLAG_VALUE
)
1331 /* Add the common part now. This may allow combine to merge this
1332 with the store flag operation earlier into some sort of conditional
1333 increment/decrement if the target allows it. */
1335 target
= expand_simple_binop (mode
, PLUS
,
1337 target
, 0, OPTAB_WIDEN
);
1339 /* Always use ifalse here. It should have been swapped with itrue
1340 when appropriate when reversep is true. */
1341 target
= expand_simple_binop (mode
, subtract_flag_p
? MINUS
: PLUS
,
1342 gen_int_mode (ifalse
, mode
), target
,
1343 if_info
->x
, 0, OPTAB_WIDEN
);
1345 /* Other cases are not beneficial when the original A and B are PLUS
1352 /* if (test) x = 8; else x = 0;
1353 => x = (test != 0) << 3; */
1354 else if (ifalse
== 0 && (tmp
= exact_log2 (itrue
)) >= 0)
1356 target
= expand_simple_binop (mode
, ASHIFT
,
1357 target
, GEN_INT (tmp
), if_info
->x
, 0,
1361 /* if (test) x = -1; else x = b;
1362 => x = -(test != 0) | b; */
1363 else if (itrue
== -1)
1365 target
= expand_simple_binop (mode
, IOR
,
1366 target
, gen_int_mode (ifalse
, mode
),
1367 if_info
->x
, 0, OPTAB_WIDEN
);
1381 if (target
!= if_info
->x
)
1382 noce_emit_move_insn (if_info
->x
, target
);
1384 seq
= end_ifcvt_sequence (if_info
);
1388 emit_insn_before_setloc (seq
, if_info
->jump
,
1389 INSN_LOCATION (if_info
->insn_a
));
1396 /* Convert "if (test) foo++" into "foo += (test != 0)", and
1397 similarly for "foo--". */
1400 noce_try_addcc (struct noce_if_info
*if_info
)
1404 int subtract
, normalize
;
1406 if (!noce_simple_bbs (if_info
))
1409 if (GET_CODE (if_info
->a
) == PLUS
1410 && rtx_equal_p (XEXP (if_info
->a
, 0), if_info
->b
)
1411 && (reversed_comparison_code (if_info
->cond
, if_info
->jump
)
1414 rtx cond
= if_info
->cond
;
1415 enum rtx_code code
= reversed_comparison_code (cond
, if_info
->jump
);
1417 /* First try to use addcc pattern. */
1418 if (general_operand (XEXP (cond
, 0), VOIDmode
)
1419 && general_operand (XEXP (cond
, 1), VOIDmode
))
1422 target
= emit_conditional_add (if_info
->x
, code
,
1427 XEXP (if_info
->a
, 1),
1428 GET_MODE (if_info
->x
),
1429 (code
== LTU
|| code
== GEU
1430 || code
== LEU
|| code
== GTU
));
1433 if (target
!= if_info
->x
)
1434 noce_emit_move_insn (if_info
->x
, target
);
1436 seq
= end_ifcvt_sequence (if_info
);
1440 emit_insn_before_setloc (seq
, if_info
->jump
,
1441 INSN_LOCATION (if_info
->insn_a
));
1447 /* If that fails, construct conditional increment or decrement using
1449 if (if_info
->branch_cost
>= 2
1450 && (XEXP (if_info
->a
, 1) == const1_rtx
1451 || XEXP (if_info
->a
, 1) == constm1_rtx
))
1454 if (STORE_FLAG_VALUE
== INTVAL (XEXP (if_info
->a
, 1)))
1455 subtract
= 0, normalize
= 0;
1456 else if (-STORE_FLAG_VALUE
== INTVAL (XEXP (if_info
->a
, 1)))
1457 subtract
= 1, normalize
= 0;
1459 subtract
= 0, normalize
= INTVAL (XEXP (if_info
->a
, 1));
1462 target
= noce_emit_store_flag (if_info
,
1463 gen_reg_rtx (GET_MODE (if_info
->x
)),
1467 target
= expand_simple_binop (GET_MODE (if_info
->x
),
1468 subtract
? MINUS
: PLUS
,
1469 if_info
->b
, target
, if_info
->x
,
1473 if (target
!= if_info
->x
)
1474 noce_emit_move_insn (if_info
->x
, target
);
1476 seq
= end_ifcvt_sequence (if_info
);
1480 emit_insn_before_setloc (seq
, if_info
->jump
,
1481 INSN_LOCATION (if_info
->insn_a
));
1491 /* Convert "if (test) x = 0;" to "x &= -(test == 0);" */
1494 noce_try_store_flag_mask (struct noce_if_info
*if_info
)
1500 if (!noce_simple_bbs (if_info
))
1504 if ((if_info
->branch_cost
>= 2
1505 || STORE_FLAG_VALUE
== -1)
1506 && ((if_info
->a
== const0_rtx
1507 && rtx_equal_p (if_info
->b
, if_info
->x
))
1508 || ((reversep
= (reversed_comparison_code (if_info
->cond
,
1511 && if_info
->b
== const0_rtx
1512 && rtx_equal_p (if_info
->a
, if_info
->x
))))
1515 target
= noce_emit_store_flag (if_info
,
1516 gen_reg_rtx (GET_MODE (if_info
->x
)),
1519 target
= expand_simple_binop (GET_MODE (if_info
->x
), AND
,
1521 target
, if_info
->x
, 0,
1526 int old_cost
, new_cost
, insn_cost
;
1529 if (target
!= if_info
->x
)
1530 noce_emit_move_insn (if_info
->x
, target
);
1532 seq
= end_ifcvt_sequence (if_info
);
1536 speed_p
= optimize_bb_for_speed_p (BLOCK_FOR_INSN (if_info
->insn_a
));
1537 insn_cost
= insn_rtx_cost (PATTERN (if_info
->insn_a
), speed_p
);
1538 old_cost
= COSTS_N_INSNS (if_info
->branch_cost
) + insn_cost
;
1539 new_cost
= seq_cost (seq
, speed_p
);
1541 if (new_cost
> old_cost
)
1544 emit_insn_before_setloc (seq
, if_info
->jump
,
1545 INSN_LOCATION (if_info
->insn_a
));
1555 /* Helper function for noce_try_cmove and noce_try_cmove_arith. */
1558 noce_emit_cmove (struct noce_if_info
*if_info
, rtx x
, enum rtx_code code
,
1559 rtx cmp_a
, rtx cmp_b
, rtx vfalse
, rtx vtrue
)
1561 rtx target ATTRIBUTE_UNUSED
;
1562 int unsignedp ATTRIBUTE_UNUSED
;
1564 /* If earliest == jump, try to build the cmove insn directly.
1565 This is helpful when combine has created some complex condition
1566 (like for alpha's cmovlbs) that we can't hope to regenerate
1567 through the normal interface. */
1569 if (if_info
->cond_earliest
== if_info
->jump
)
1571 rtx cond
= gen_rtx_fmt_ee (code
, GET_MODE (if_info
->cond
), cmp_a
, cmp_b
);
1572 rtx if_then_else
= gen_rtx_IF_THEN_ELSE (GET_MODE (x
),
1573 cond
, vtrue
, vfalse
);
1574 rtx set
= gen_rtx_SET (x
, if_then_else
);
1577 rtx_insn
*insn
= emit_insn (set
);
1579 if (recog_memoized (insn
) >= 0)
1581 rtx_insn
*seq
= get_insns ();
1591 /* Don't even try if the comparison operands are weird
1592 except that the target supports cbranchcc4. */
1593 if (! general_operand (cmp_a
, GET_MODE (cmp_a
))
1594 || ! general_operand (cmp_b
, GET_MODE (cmp_b
)))
1596 if (!have_cbranchcc4
1597 || GET_MODE_CLASS (GET_MODE (cmp_a
)) != MODE_CC
1598 || cmp_b
!= const0_rtx
)
1602 unsignedp
= (code
== LTU
|| code
== GEU
1603 || code
== LEU
|| code
== GTU
);
1605 target
= emit_conditional_move (x
, code
, cmp_a
, cmp_b
, VOIDmode
,
1606 vtrue
, vfalse
, GET_MODE (x
),
1611 /* We might be faced with a situation like:
1614 vtrue = (subreg:M (reg:N VTRUE) BYTE)
1615 vfalse = (subreg:M (reg:N VFALSE) BYTE)
1617 We can't do a conditional move in mode M, but it's possible that we
1618 could do a conditional move in mode N instead and take a subreg of
1621 If we can't create new pseudos, though, don't bother. */
1622 if (reload_completed
)
1625 if (GET_CODE (vtrue
) == SUBREG
&& GET_CODE (vfalse
) == SUBREG
)
1627 rtx reg_vtrue
= SUBREG_REG (vtrue
);
1628 rtx reg_vfalse
= SUBREG_REG (vfalse
);
1629 unsigned int byte_vtrue
= SUBREG_BYTE (vtrue
);
1630 unsigned int byte_vfalse
= SUBREG_BYTE (vfalse
);
1631 rtx promoted_target
;
1633 if (GET_MODE (reg_vtrue
) != GET_MODE (reg_vfalse
)
1634 || byte_vtrue
!= byte_vfalse
1635 || (SUBREG_PROMOTED_VAR_P (vtrue
)
1636 != SUBREG_PROMOTED_VAR_P (vfalse
))
1637 || (SUBREG_PROMOTED_GET (vtrue
)
1638 != SUBREG_PROMOTED_GET (vfalse
)))
1641 promoted_target
= gen_reg_rtx (GET_MODE (reg_vtrue
));
1643 target
= emit_conditional_move (promoted_target
, code
, cmp_a
, cmp_b
,
1644 VOIDmode
, reg_vtrue
, reg_vfalse
,
1645 GET_MODE (reg_vtrue
), unsignedp
);
1646 /* Nope, couldn't do it in that mode either. */
1650 target
= gen_rtx_SUBREG (GET_MODE (vtrue
), promoted_target
, byte_vtrue
);
1651 SUBREG_PROMOTED_VAR_P (target
) = SUBREG_PROMOTED_VAR_P (vtrue
);
1652 SUBREG_PROMOTED_SET (target
, SUBREG_PROMOTED_GET (vtrue
));
1653 emit_move_insn (x
, target
);
1660 /* Try only simple constants and registers here. More complex cases
1661 are handled in noce_try_cmove_arith after noce_try_store_flag_arith
1662 has had a go at it. */
1665 noce_try_cmove (struct noce_if_info
*if_info
)
1671 if (!noce_simple_bbs (if_info
))
1674 if ((CONSTANT_P (if_info
->a
) || register_operand (if_info
->a
, VOIDmode
))
1675 && (CONSTANT_P (if_info
->b
) || register_operand (if_info
->b
, VOIDmode
)))
1679 code
= GET_CODE (if_info
->cond
);
1680 target
= noce_emit_cmove (if_info
, if_info
->x
, code
,
1681 XEXP (if_info
->cond
, 0),
1682 XEXP (if_info
->cond
, 1),
1683 if_info
->a
, if_info
->b
);
1687 if (target
!= if_info
->x
)
1688 noce_emit_move_insn (if_info
->x
, target
);
1690 seq
= end_ifcvt_sequence (if_info
);
1694 emit_insn_before_setloc (seq
, if_info
->jump
,
1695 INSN_LOCATION (if_info
->insn_a
));
1698 /* If both a and b are constants try a last-ditch transformation:
1699 if (test) x = a; else x = b;
1700 => x = (-(test != 0) & (b - a)) + a;
1701 Try this only if the target-specific expansion above has failed.
1702 The target-specific expander may want to generate sequences that
1703 we don't know about, so give them a chance before trying this
1705 else if (!targetm
.have_conditional_execution ()
1706 && CONST_INT_P (if_info
->a
) && CONST_INT_P (if_info
->b
)
1707 && ((if_info
->branch_cost
>= 2 && STORE_FLAG_VALUE
== -1)
1708 || if_info
->branch_cost
>= 3))
1710 machine_mode mode
= GET_MODE (if_info
->x
);
1711 HOST_WIDE_INT ifalse
= INTVAL (if_info
->a
);
1712 HOST_WIDE_INT itrue
= INTVAL (if_info
->b
);
1713 rtx target
= noce_emit_store_flag (if_info
, if_info
->x
, false, -1);
1720 HOST_WIDE_INT diff
= (unsigned HOST_WIDE_INT
) itrue
- ifalse
;
1721 /* Make sure we can represent the difference
1722 between the two values. */
1724 != ((ifalse
< 0) != (itrue
< 0) ? ifalse
< 0 : ifalse
< itrue
))
1730 diff
= trunc_int_for_mode (diff
, mode
);
1731 target
= expand_simple_binop (mode
, AND
,
1732 target
, gen_int_mode (diff
, mode
),
1733 if_info
->x
, 0, OPTAB_WIDEN
);
1735 target
= expand_simple_binop (mode
, PLUS
,
1736 target
, gen_int_mode (ifalse
, mode
),
1737 if_info
->x
, 0, OPTAB_WIDEN
);
1740 if (target
!= if_info
->x
)
1741 noce_emit_move_insn (if_info
->x
, target
);
1743 seq
= end_ifcvt_sequence (if_info
);
1747 emit_insn_before_setloc (seq
, if_info
->jump
,
1748 INSN_LOCATION (if_info
->insn_a
));
1764 /* Return true if X contains a conditional code mode rtx. */
1767 contains_ccmode_rtx_p (rtx x
)
1769 subrtx_iterator::array_type array
;
1770 FOR_EACH_SUBRTX (iter
, array
, x
, ALL
)
1771 if (GET_MODE_CLASS (GET_MODE (*iter
)) == MODE_CC
)
1777 /* Helper for bb_valid_for_noce_process_p. Validate that
1778 the rtx insn INSN is a single set that does not set
1779 the conditional register CC and is in general valid for
1783 insn_valid_noce_process_p (rtx_insn
*insn
, rtx cc
)
1786 || !NONJUMP_INSN_P (insn
)
1787 || (cc
&& set_of (cc
, insn
)))
1790 rtx sset
= single_set (insn
);
1792 /* Currently support only simple single sets in test_bb. */
1794 || !noce_operand_ok (SET_DEST (sset
))
1795 || contains_ccmode_rtx_p (SET_DEST (sset
))
1796 || !noce_operand_ok (SET_SRC (sset
)))
1803 /* Return true iff the registers that the insns in BB_A set do not
1804 get used in BB_B. */
1807 bbs_ok_for_cmove_arith (basic_block bb_a
, basic_block bb_b
)
1810 bitmap bba_sets
= BITMAP_ALLOC (®_obstack
);
1815 FOR_BB_INSNS (bb_a
, a_insn
)
1817 if (!active_insn_p (a_insn
))
1820 rtx sset_a
= single_set (a_insn
);
1824 BITMAP_FREE (bba_sets
);
1828 /* Record all registers that BB_A sets. */
1829 FOR_EACH_INSN_DEF (def
, a_insn
)
1830 bitmap_set_bit (bba_sets
, DF_REF_REGNO (def
));
1835 FOR_BB_INSNS (bb_b
, b_insn
)
1837 if (!active_insn_p (b_insn
))
1840 rtx sset_b
= single_set (b_insn
);
1844 BITMAP_FREE (bba_sets
);
1848 /* Make sure this is a REG and not some instance
1849 of ZERO_EXTRACT or SUBREG or other dangerous stuff. */
1850 if (!REG_P (SET_DEST (sset_b
)))
1852 BITMAP_FREE (bba_sets
);
1856 /* If the insn uses a reg set in BB_A return false. */
1857 FOR_EACH_INSN_USE (use
, b_insn
)
1859 if (bitmap_bit_p (bba_sets
, DF_REF_REGNO (use
)))
1861 BITMAP_FREE (bba_sets
);
1868 BITMAP_FREE (bba_sets
);
1872 /* Emit copies of all the active instructions in BB except the last.
1873 This is a helper for noce_try_cmove_arith. */
1876 noce_emit_all_but_last (basic_block bb
)
1878 rtx_insn
*last
= last_active_insn (bb
, FALSE
);
1880 FOR_BB_INSNS (bb
, insn
)
1882 if (insn
!= last
&& active_insn_p (insn
))
1884 rtx_insn
*to_emit
= as_a
<rtx_insn
*> (copy_rtx (insn
));
1886 emit_insn (PATTERN (to_emit
));
1891 /* Helper for noce_try_cmove_arith. Emit the pattern TO_EMIT and return
1892 the resulting insn or NULL if it's not a valid insn. */
1895 noce_emit_insn (rtx to_emit
)
1897 gcc_assert (to_emit
);
1898 rtx_insn
*insn
= emit_insn (to_emit
);
1900 if (recog_memoized (insn
) < 0)
1906 /* Helper for noce_try_cmove_arith. Emit a copy of the insns up to
1907 and including the penultimate one in BB if it is not simple
1908 (as indicated by SIMPLE). Then emit LAST_INSN as the last
1909 insn in the block. The reason for that is that LAST_INSN may
1910 have been modified by the preparation in noce_try_cmove_arith. */
1913 noce_emit_bb (rtx last_insn
, basic_block bb
, bool simple
)
1916 noce_emit_all_but_last (bb
);
1918 if (last_insn
&& !noce_emit_insn (last_insn
))
1924 /* Try more complex cases involving conditional_move. */
1927 noce_try_cmove_arith (struct noce_if_info
*if_info
)
1933 rtx_insn
*insn_a
, *insn_b
;
1934 bool a_simple
= if_info
->then_simple
;
1935 bool b_simple
= if_info
->else_simple
;
1936 basic_block then_bb
= if_info
->then_bb
;
1937 basic_block else_bb
= if_info
->else_bb
;
1941 rtx_insn
*ifcvt_seq
;
1943 /* A conditional move from two memory sources is equivalent to a
1944 conditional on their addresses followed by a load. Don't do this
1945 early because it'll screw alias analysis. Note that we've
1946 already checked for no side effects. */
1947 /* ??? FIXME: Magic number 5. */
1948 if (cse_not_expected
1949 && MEM_P (a
) && MEM_P (b
)
1950 && MEM_ADDR_SPACE (a
) == MEM_ADDR_SPACE (b
)
1951 && if_info
->branch_cost
>= 5)
1953 machine_mode address_mode
= get_address_mode (a
);
1957 x
= gen_reg_rtx (address_mode
);
1961 /* ??? We could handle this if we knew that a load from A or B could
1962 not trap or fault. This is also true if we've already loaded
1963 from the address along the path from ENTRY. */
1964 else if (may_trap_or_fault_p (a
) || may_trap_or_fault_p (b
))
1967 /* if (test) x = a + b; else x = c - d;
1974 code
= GET_CODE (if_info
->cond
);
1975 insn_a
= if_info
->insn_a
;
1976 insn_b
= if_info
->insn_b
;
1978 machine_mode x_mode
= GET_MODE (x
);
1980 if (!can_conditionally_move_p (x_mode
))
1983 unsigned int then_cost
;
1984 unsigned int else_cost
;
1986 then_cost
= if_info
->then_cost
;
1991 else_cost
= if_info
->else_cost
;
1995 /* We're going to execute one of the basic blocks anyway, so
1996 bail out if the most expensive of the two blocks is unacceptable. */
1997 if (MAX (then_cost
, else_cost
) > COSTS_N_INSNS (if_info
->branch_cost
))
2000 /* Possibly rearrange operands to make things come out more natural. */
2001 if (reversed_comparison_code (if_info
->cond
, if_info
->jump
) != UNKNOWN
)
2004 if (rtx_equal_p (b
, x
))
2006 else if (general_operand (b
, GET_MODE (b
)))
2011 code
= reversed_comparison_code (if_info
->cond
, if_info
->jump
);
2013 std::swap (insn_a
, insn_b
);
2014 std::swap (a_simple
, b_simple
);
2015 std::swap (then_bb
, else_bb
);
2019 if (then_bb
&& else_bb
&& !a_simple
&& !b_simple
2020 && (!bbs_ok_for_cmove_arith (then_bb
, else_bb
)
2021 || !bbs_ok_for_cmove_arith (else_bb
, then_bb
)))
2026 /* If one of the blocks is empty then the corresponding B or A value
2027 came from the test block. The non-empty complex block that we will
2028 emit might clobber the register used by B or A, so move it to a pseudo
2031 if (b_simple
|| !else_bb
)
2033 rtx tmp_b
= gen_reg_rtx (x_mode
);
2034 /* Perform the simplest kind of set. The register allocator
2035 should remove it if it's not actually needed. If this set is not
2036 a valid insn (can happen on the is_mem path) then end_ifcvt_sequence
2037 will cancel the whole sequence. Don't try any of the fallback paths
2038 from noce_emit_move_insn since we want this to be the simplest kind
2040 emit_insn (gen_rtx_SET (tmp_b
, b
));
2044 if (a_simple
|| !then_bb
)
2046 rtx tmp_a
= gen_reg_rtx (x_mode
);
2047 emit_insn (gen_rtx_SET (tmp_a
, a
));
2054 rtx emit_a
= NULL_RTX
;
2055 rtx emit_b
= NULL_RTX
;
2057 /* If either operand is complex, load it into a register first.
2058 The best way to do this is to copy the original insn. In this
2059 way we preserve any clobbers etc that the insn may have had.
2060 This is of course not possible in the IS_MEM case. */
2062 if (! general_operand (a
, GET_MODE (a
)))
2067 rtx reg
= gen_reg_rtx (GET_MODE (a
));
2068 emit_a
= gen_rtx_SET (reg
, a
);
2071 goto end_seq_and_fail
;
2074 a
= gen_reg_rtx (GET_MODE (a
));
2075 rtx_insn
*copy_of_a
= as_a
<rtx_insn
*> (copy_rtx (insn_a
));
2076 rtx set
= single_set (copy_of_a
);
2079 emit_a
= PATTERN (copy_of_a
);
2083 if (! general_operand (b
, GET_MODE (b
)))
2087 rtx reg
= gen_reg_rtx (GET_MODE (b
));
2088 emit_b
= gen_rtx_SET (reg
, b
);
2091 goto end_seq_and_fail
;
2094 b
= gen_reg_rtx (GET_MODE (b
));
2095 rtx_insn
*copy_of_b
= as_a
<rtx_insn
*> (copy_rtx (insn_b
));
2096 rtx set
= single_set (copy_of_b
);
2099 emit_b
= PATTERN (copy_of_b
);
2103 /* If insn to set up A clobbers any registers B depends on, try to
2104 swap insn that sets up A with the one that sets up B. If even
2105 that doesn't help, punt. */
2107 if (emit_a
&& modified_in_p (orig_b
, emit_a
))
2109 if (modified_in_p (orig_a
, emit_b
))
2110 goto end_seq_and_fail
;
2112 if (else_bb
&& !b_simple
)
2114 if (!noce_emit_bb (emit_b
, else_bb
, b_simple
))
2115 goto end_seq_and_fail
;
2118 if (!noce_emit_bb (emit_a
, then_bb
, a_simple
))
2119 goto end_seq_and_fail
;
2123 if (!noce_emit_bb (emit_a
, then_bb
, a_simple
))
2124 goto end_seq_and_fail
;
2126 if (!noce_emit_bb (emit_b
, else_bb
, b_simple
))
2127 goto end_seq_and_fail
;
2131 target
= noce_emit_cmove (if_info
, x
, code
, XEXP (if_info
->cond
, 0),
2132 XEXP (if_info
->cond
, 1), a
, b
);
2135 goto end_seq_and_fail
;
2137 /* If we're handling a memory for above, emit the load now. */
2140 rtx mem
= gen_rtx_MEM (GET_MODE (if_info
->x
), target
);
2142 /* Copy over flags as appropriate. */
2143 if (MEM_VOLATILE_P (if_info
->a
) || MEM_VOLATILE_P (if_info
->b
))
2144 MEM_VOLATILE_P (mem
) = 1;
2145 if (MEM_ALIAS_SET (if_info
->a
) == MEM_ALIAS_SET (if_info
->b
))
2146 set_mem_alias_set (mem
, MEM_ALIAS_SET (if_info
->a
));
2148 MIN (MEM_ALIGN (if_info
->a
), MEM_ALIGN (if_info
->b
)));
2150 gcc_assert (MEM_ADDR_SPACE (if_info
->a
) == MEM_ADDR_SPACE (if_info
->b
));
2151 set_mem_addr_space (mem
, MEM_ADDR_SPACE (if_info
->a
));
2153 noce_emit_move_insn (if_info
->x
, mem
);
2155 else if (target
!= x
)
2156 noce_emit_move_insn (x
, target
);
2158 ifcvt_seq
= end_ifcvt_sequence (if_info
);
2162 emit_insn_before_setloc (ifcvt_seq
, if_info
->jump
,
2163 INSN_LOCATION (if_info
->insn_a
));
2171 /* For most cases, the simplified condition we found is the best
2172 choice, but this is not the case for the min/max/abs transforms.
2173 For these we wish to know that it is A or B in the condition. */
2176 noce_get_alt_condition (struct noce_if_info
*if_info
, rtx target
,
2177 rtx_insn
**earliest
)
2183 /* If target is already mentioned in the known condition, return it. */
2184 if (reg_mentioned_p (target
, if_info
->cond
))
2186 *earliest
= if_info
->cond_earliest
;
2187 return if_info
->cond
;
2190 set
= pc_set (if_info
->jump
);
2191 cond
= XEXP (SET_SRC (set
), 0);
2193 = GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
2194 && LABEL_REF_LABEL (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (if_info
->jump
);
2195 if (if_info
->then_else_reversed
)
2198 /* If we're looking for a constant, try to make the conditional
2199 have that constant in it. There are two reasons why it may
2200 not have the constant we want:
2202 1. GCC may have needed to put the constant in a register, because
2203 the target can't compare directly against that constant. For
2204 this case, we look for a SET immediately before the comparison
2205 that puts a constant in that register.
2207 2. GCC may have canonicalized the conditional, for example
2208 replacing "if x < 4" with "if x <= 3". We can undo that (or
2209 make equivalent types of changes) to get the constants we need
2210 if they're off by one in the right direction. */
2212 if (CONST_INT_P (target
))
2214 enum rtx_code code
= GET_CODE (if_info
->cond
);
2215 rtx op_a
= XEXP (if_info
->cond
, 0);
2216 rtx op_b
= XEXP (if_info
->cond
, 1);
2217 rtx_insn
*prev_insn
;
2219 /* First, look to see if we put a constant in a register. */
2220 prev_insn
= prev_nonnote_insn (if_info
->cond_earliest
);
2222 && BLOCK_FOR_INSN (prev_insn
)
2223 == BLOCK_FOR_INSN (if_info
->cond_earliest
)
2224 && INSN_P (prev_insn
)
2225 && GET_CODE (PATTERN (prev_insn
)) == SET
)
2227 rtx src
= find_reg_equal_equiv_note (prev_insn
);
2229 src
= SET_SRC (PATTERN (prev_insn
));
2230 if (CONST_INT_P (src
))
2232 if (rtx_equal_p (op_a
, SET_DEST (PATTERN (prev_insn
))))
2234 else if (rtx_equal_p (op_b
, SET_DEST (PATTERN (prev_insn
))))
2237 if (CONST_INT_P (op_a
))
2239 std::swap (op_a
, op_b
);
2240 code
= swap_condition (code
);
2245 /* Now, look to see if we can get the right constant by
2246 adjusting the conditional. */
2247 if (CONST_INT_P (op_b
))
2249 HOST_WIDE_INT desired_val
= INTVAL (target
);
2250 HOST_WIDE_INT actual_val
= INTVAL (op_b
);
2255 if (actual_val
== desired_val
+ 1)
2258 op_b
= GEN_INT (desired_val
);
2262 if (actual_val
== desired_val
- 1)
2265 op_b
= GEN_INT (desired_val
);
2269 if (actual_val
== desired_val
- 1)
2272 op_b
= GEN_INT (desired_val
);
2276 if (actual_val
== desired_val
+ 1)
2279 op_b
= GEN_INT (desired_val
);
2287 /* If we made any changes, generate a new conditional that is
2288 equivalent to what we started with, but has the right
2290 if (code
!= GET_CODE (if_info
->cond
)
2291 || op_a
!= XEXP (if_info
->cond
, 0)
2292 || op_b
!= XEXP (if_info
->cond
, 1))
2294 cond
= gen_rtx_fmt_ee (code
, GET_MODE (cond
), op_a
, op_b
);
2295 *earliest
= if_info
->cond_earliest
;
2300 cond
= canonicalize_condition (if_info
->jump
, cond
, reverse
,
2301 earliest
, target
, have_cbranchcc4
, true);
2302 if (! cond
|| ! reg_mentioned_p (target
, cond
))
2305 /* We almost certainly searched back to a different place.
2306 Need to re-verify correct lifetimes. */
2308 /* X may not be mentioned in the range (cond_earliest, jump]. */
2309 for (insn
= if_info
->jump
; insn
!= *earliest
; insn
= PREV_INSN (insn
))
2310 if (INSN_P (insn
) && reg_overlap_mentioned_p (if_info
->x
, PATTERN (insn
)))
2313 /* A and B may not be modified in the range [cond_earliest, jump). */
2314 for (insn
= *earliest
; insn
!= if_info
->jump
; insn
= NEXT_INSN (insn
))
2316 && (modified_in_p (if_info
->a
, insn
)
2317 || modified_in_p (if_info
->b
, insn
)))
2323 /* Convert "if (a < b) x = a; else x = b;" to "x = min(a, b);", etc. */
2326 noce_try_minmax (struct noce_if_info
*if_info
)
2329 rtx_insn
*earliest
, *seq
;
2330 enum rtx_code code
, op
;
2333 if (!noce_simple_bbs (if_info
))
2336 /* ??? Reject modes with NaNs or signed zeros since we don't know how
2337 they will be resolved with an SMIN/SMAX. It wouldn't be too hard
2338 to get the target to tell us... */
2339 if (HONOR_SIGNED_ZEROS (if_info
->x
)
2340 || HONOR_NANS (if_info
->x
))
2343 cond
= noce_get_alt_condition (if_info
, if_info
->a
, &earliest
);
2347 /* Verify the condition is of the form we expect, and canonicalize
2348 the comparison code. */
2349 code
= GET_CODE (cond
);
2350 if (rtx_equal_p (XEXP (cond
, 0), if_info
->a
))
2352 if (! rtx_equal_p (XEXP (cond
, 1), if_info
->b
))
2355 else if (rtx_equal_p (XEXP (cond
, 1), if_info
->a
))
2357 if (! rtx_equal_p (XEXP (cond
, 0), if_info
->b
))
2359 code
= swap_condition (code
);
2364 /* Determine what sort of operation this is. Note that the code is for
2365 a taken branch, so the code->operation mapping appears backwards. */
2398 target
= expand_simple_binop (GET_MODE (if_info
->x
), op
,
2399 if_info
->a
, if_info
->b
,
2400 if_info
->x
, unsignedp
, OPTAB_WIDEN
);
2406 if (target
!= if_info
->x
)
2407 noce_emit_move_insn (if_info
->x
, target
);
2409 seq
= end_ifcvt_sequence (if_info
);
2413 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2414 if_info
->cond
= cond
;
2415 if_info
->cond_earliest
= earliest
;
2420 /* Convert "if (a < 0) x = -a; else x = a;" to "x = abs(a);",
2421 "if (a < 0) x = ~a; else x = a;" to "x = one_cmpl_abs(a);",
2425 noce_try_abs (struct noce_if_info
*if_info
)
2427 rtx cond
, target
, a
, b
, c
;
2428 rtx_insn
*earliest
, *seq
;
2430 bool one_cmpl
= false;
2432 if (!noce_simple_bbs (if_info
))
2435 /* Reject modes with signed zeros. */
2436 if (HONOR_SIGNED_ZEROS (if_info
->x
))
2439 /* Recognize A and B as constituting an ABS or NABS. The canonical
2440 form is a branch around the negation, taken when the object is the
2441 first operand of a comparison against 0 that evaluates to true. */
2444 if (GET_CODE (a
) == NEG
&& rtx_equal_p (XEXP (a
, 0), b
))
2446 else if (GET_CODE (b
) == NEG
&& rtx_equal_p (XEXP (b
, 0), a
))
2451 else if (GET_CODE (a
) == NOT
&& rtx_equal_p (XEXP (a
, 0), b
))
2456 else if (GET_CODE (b
) == NOT
&& rtx_equal_p (XEXP (b
, 0), a
))
2465 cond
= noce_get_alt_condition (if_info
, b
, &earliest
);
2469 /* Verify the condition is of the form we expect. */
2470 if (rtx_equal_p (XEXP (cond
, 0), b
))
2472 else if (rtx_equal_p (XEXP (cond
, 1), b
))
2480 /* Verify that C is zero. Search one step backward for a
2481 REG_EQUAL note or a simple source if necessary. */
2485 rtx_insn
*insn
= prev_nonnote_insn (earliest
);
2487 && BLOCK_FOR_INSN (insn
) == BLOCK_FOR_INSN (earliest
)
2488 && (set
= single_set (insn
))
2489 && rtx_equal_p (SET_DEST (set
), c
))
2491 rtx note
= find_reg_equal_equiv_note (insn
);
2501 && GET_CODE (XEXP (c
, 0)) == SYMBOL_REF
2502 && CONSTANT_POOL_ADDRESS_P (XEXP (c
, 0)))
2503 c
= get_pool_constant (XEXP (c
, 0));
2505 /* Work around funny ideas get_condition has wrt canonicalization.
2506 Note that these rtx constants are known to be CONST_INT, and
2507 therefore imply integer comparisons. */
2508 if (c
== constm1_rtx
&& GET_CODE (cond
) == GT
)
2510 else if (c
== const1_rtx
&& GET_CODE (cond
) == LT
)
2512 else if (c
!= CONST0_RTX (GET_MODE (b
)))
2515 /* Determine what sort of operation this is. */
2516 switch (GET_CODE (cond
))
2535 target
= expand_one_cmpl_abs_nojump (GET_MODE (if_info
->x
), b
,
2538 target
= expand_abs_nojump (GET_MODE (if_info
->x
), b
, if_info
->x
, 1);
2540 /* ??? It's a quandary whether cmove would be better here, especially
2541 for integers. Perhaps combine will clean things up. */
2542 if (target
&& negate
)
2545 target
= expand_simple_unop (GET_MODE (target
), NOT
, target
,
2548 target
= expand_simple_unop (GET_MODE (target
), NEG
, target
,
2558 if (target
!= if_info
->x
)
2559 noce_emit_move_insn (if_info
->x
, target
);
2561 seq
= end_ifcvt_sequence (if_info
);
2565 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2566 if_info
->cond
= cond
;
2567 if_info
->cond_earliest
= earliest
;
2572 /* Convert "if (m < 0) x = b; else x = 0;" to "x = (m >> C) & b;". */
2575 noce_try_sign_mask (struct noce_if_info
*if_info
)
2581 bool t_unconditional
;
2583 if (!noce_simple_bbs (if_info
))
2586 cond
= if_info
->cond
;
2587 code
= GET_CODE (cond
);
2592 if (if_info
->a
== const0_rtx
)
2594 if ((code
== LT
&& c
== const0_rtx
)
2595 || (code
== LE
&& c
== constm1_rtx
))
2598 else if (if_info
->b
== const0_rtx
)
2600 if ((code
== GE
&& c
== const0_rtx
)
2601 || (code
== GT
&& c
== constm1_rtx
))
2605 if (! t
|| side_effects_p (t
))
2608 /* We currently don't handle different modes. */
2609 mode
= GET_MODE (t
);
2610 if (GET_MODE (m
) != mode
)
2613 /* This is only profitable if T is unconditionally executed/evaluated in the
2614 original insn sequence or T is cheap. The former happens if B is the
2615 non-zero (T) value and if INSN_B was taken from TEST_BB, or there was no
2616 INSN_B which can happen for e.g. conditional stores to memory. For the
2617 cost computation use the block TEST_BB where the evaluation will end up
2618 after the transformation. */
2621 && (if_info
->insn_b
== NULL_RTX
2622 || BLOCK_FOR_INSN (if_info
->insn_b
) == if_info
->test_bb
));
2623 if (!(t_unconditional
2624 || (set_src_cost (t
, mode
, optimize_bb_for_speed_p (if_info
->test_bb
))
2625 < COSTS_N_INSNS (2))))
2629 /* Use emit_store_flag to generate "m < 0 ? -1 : 0" instead of expanding
2630 "(signed) m >> 31" directly. This benefits targets with specialized
2631 insns to obtain the signmask, but still uses ashr_optab otherwise. */
2632 m
= emit_store_flag (gen_reg_rtx (mode
), LT
, m
, const0_rtx
, mode
, 0, -1);
2633 t
= m
? expand_binop (mode
, and_optab
, m
, t
, NULL_RTX
, 0, OPTAB_DIRECT
)
2642 noce_emit_move_insn (if_info
->x
, t
);
2644 seq
= end_ifcvt_sequence (if_info
);
2648 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2653 /* Optimize away "if (x & C) x |= C" and similar bit manipulation
2657 noce_try_bitop (struct noce_if_info
*if_info
)
2659 rtx cond
, x
, a
, result
;
2666 cond
= if_info
->cond
;
2667 code
= GET_CODE (cond
);
2669 if (!noce_simple_bbs (if_info
))
2672 /* Check for no else condition. */
2673 if (! rtx_equal_p (x
, if_info
->b
))
2676 /* Check for a suitable condition. */
2677 if (code
!= NE
&& code
!= EQ
)
2679 if (XEXP (cond
, 1) != const0_rtx
)
2681 cond
= XEXP (cond
, 0);
2683 /* ??? We could also handle AND here. */
2684 if (GET_CODE (cond
) == ZERO_EXTRACT
)
2686 if (XEXP (cond
, 1) != const1_rtx
2687 || !CONST_INT_P (XEXP (cond
, 2))
2688 || ! rtx_equal_p (x
, XEXP (cond
, 0)))
2690 bitnum
= INTVAL (XEXP (cond
, 2));
2691 mode
= GET_MODE (x
);
2692 if (BITS_BIG_ENDIAN
)
2693 bitnum
= GET_MODE_BITSIZE (mode
) - 1 - bitnum
;
2694 if (bitnum
< 0 || bitnum
>= HOST_BITS_PER_WIDE_INT
)
2701 if (GET_CODE (a
) == IOR
|| GET_CODE (a
) == XOR
)
2703 /* Check for "if (X & C) x = x op C". */
2704 if (! rtx_equal_p (x
, XEXP (a
, 0))
2705 || !CONST_INT_P (XEXP (a
, 1))
2706 || (INTVAL (XEXP (a
, 1)) & GET_MODE_MASK (mode
))
2707 != (unsigned HOST_WIDE_INT
) 1 << bitnum
)
2710 /* if ((x & C) == 0) x |= C; is transformed to x |= C. */
2711 /* if ((x & C) != 0) x |= C; is transformed to nothing. */
2712 if (GET_CODE (a
) == IOR
)
2713 result
= (code
== NE
) ? a
: NULL_RTX
;
2714 else if (code
== NE
)
2716 /* if ((x & C) == 0) x ^= C; is transformed to x |= C. */
2717 result
= gen_int_mode ((HOST_WIDE_INT
) 1 << bitnum
, mode
);
2718 result
= simplify_gen_binary (IOR
, mode
, x
, result
);
2722 /* if ((x & C) != 0) x ^= C; is transformed to x &= ~C. */
2723 result
= gen_int_mode (~((HOST_WIDE_INT
) 1 << bitnum
), mode
);
2724 result
= simplify_gen_binary (AND
, mode
, x
, result
);
2727 else if (GET_CODE (a
) == AND
)
2729 /* Check for "if (X & C) x &= ~C". */
2730 if (! rtx_equal_p (x
, XEXP (a
, 0))
2731 || !CONST_INT_P (XEXP (a
, 1))
2732 || (INTVAL (XEXP (a
, 1)) & GET_MODE_MASK (mode
))
2733 != (~((HOST_WIDE_INT
) 1 << bitnum
) & GET_MODE_MASK (mode
)))
2736 /* if ((x & C) == 0) x &= ~C; is transformed to nothing. */
2737 /* if ((x & C) != 0) x &= ~C; is transformed to x &= ~C. */
2738 result
= (code
== EQ
) ? a
: NULL_RTX
;
2746 noce_emit_move_insn (x
, result
);
2747 seq
= end_ifcvt_sequence (if_info
);
2751 emit_insn_before_setloc (seq
, if_info
->jump
,
2752 INSN_LOCATION (if_info
->insn_a
));
2758 /* Similar to get_condition, only the resulting condition must be
2759 valid at JUMP, instead of at EARLIEST.
2761 If THEN_ELSE_REVERSED is true, the fallthrough does not go to the
2762 THEN block of the caller, and we have to reverse the condition. */
2765 noce_get_condition (rtx_insn
*jump
, rtx_insn
**earliest
, bool then_else_reversed
)
2770 if (! any_condjump_p (jump
))
2773 set
= pc_set (jump
);
2775 /* If this branches to JUMP_LABEL when the condition is false,
2776 reverse the condition. */
2777 reverse
= (GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
2778 && LABEL_REF_LABEL (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (jump
));
2780 /* We may have to reverse because the caller's if block is not canonical,
2781 i.e. the THEN block isn't the fallthrough block for the TEST block
2782 (see find_if_header). */
2783 if (then_else_reversed
)
2786 /* If the condition variable is a register and is MODE_INT, accept it. */
2788 cond
= XEXP (SET_SRC (set
), 0);
2789 tmp
= XEXP (cond
, 0);
2790 if (REG_P (tmp
) && GET_MODE_CLASS (GET_MODE (tmp
)) == MODE_INT
2791 && (GET_MODE (tmp
) != BImode
2792 || !targetm
.small_register_classes_for_mode_p (BImode
)))
2797 cond
= gen_rtx_fmt_ee (reverse_condition (GET_CODE (cond
)),
2798 GET_MODE (cond
), tmp
, XEXP (cond
, 1));
2802 /* Otherwise, fall back on canonicalize_condition to do the dirty
2803 work of manipulating MODE_CC values and COMPARE rtx codes. */
2804 tmp
= canonicalize_condition (jump
, cond
, reverse
, earliest
,
2805 NULL_RTX
, have_cbranchcc4
, true);
2807 /* We don't handle side-effects in the condition, like handling
2808 REG_INC notes and making sure no duplicate conditions are emitted. */
2809 if (tmp
!= NULL_RTX
&& side_effects_p (tmp
))
2815 /* Return true if OP is ok for if-then-else processing. */
2818 noce_operand_ok (const_rtx op
)
2820 if (side_effects_p (op
))
2823 /* We special-case memories, so handle any of them with
2824 no address side effects. */
2826 return ! side_effects_p (XEXP (op
, 0));
2828 return ! may_trap_p (op
);
2831 /* Return true if a write into MEM may trap or fault. */
2834 noce_mem_write_may_trap_or_fault_p (const_rtx mem
)
2838 if (MEM_READONLY_P (mem
))
2841 if (may_trap_or_fault_p (mem
))
2844 addr
= XEXP (mem
, 0);
2846 /* Call target hook to avoid the effects of -fpic etc.... */
2847 addr
= targetm
.delegitimize_address (addr
);
2850 switch (GET_CODE (addr
))
2858 addr
= XEXP (addr
, 0);
2862 addr
= XEXP (addr
, 1);
2865 if (CONST_INT_P (XEXP (addr
, 1)))
2866 addr
= XEXP (addr
, 0);
2873 if (SYMBOL_REF_DECL (addr
)
2874 && decl_readonly_section (SYMBOL_REF_DECL (addr
), 0))
2884 /* Return whether we can use store speculation for MEM. TOP_BB is the
2885 basic block above the conditional block where we are considering
2886 doing the speculative store. We look for whether MEM is set
2887 unconditionally later in the function. */
2890 noce_can_store_speculate_p (basic_block top_bb
, const_rtx mem
)
2892 basic_block dominator
;
2894 for (dominator
= get_immediate_dominator (CDI_POST_DOMINATORS
, top_bb
);
2896 dominator
= get_immediate_dominator (CDI_POST_DOMINATORS
, dominator
))
2900 FOR_BB_INSNS (dominator
, insn
)
2902 /* If we see something that might be a memory barrier, we
2903 have to stop looking. Even if the MEM is set later in
2904 the function, we still don't want to set it
2905 unconditionally before the barrier. */
2907 && (volatile_insn_p (PATTERN (insn
))
2908 || (CALL_P (insn
) && (!RTL_CONST_CALL_P (insn
)))))
2911 if (memory_must_be_modified_in_insn_p (mem
, insn
))
2913 if (modified_in_p (XEXP (mem
, 0), insn
))
2922 /* Return true if X contains a MEM subrtx. */
2925 contains_mem_rtx_p (rtx x
)
2927 subrtx_iterator::array_type array
;
2928 FOR_EACH_SUBRTX (iter
, array
, x
, ALL
)
2935 /* Return true iff basic block TEST_BB is valid for noce if-conversion.
2936 The condition used in this if-conversion is in COND.
2937 In practice, check that TEST_BB ends with a single set
2938 x := a and all previous computations
2939 in TEST_BB don't produce any values that are live after TEST_BB.
2940 In other words, all the insns in TEST_BB are there only
2941 to compute a value for x. Put the rtx cost of the insns
2942 in TEST_BB into COST. Record whether TEST_BB is a single simple
2943 set instruction in SIMPLE_P. */
2946 bb_valid_for_noce_process_p (basic_block test_bb
, rtx cond
,
2947 unsigned int *cost
, bool *simple_p
)
2952 rtx_insn
*last_insn
= last_active_insn (test_bb
, FALSE
);
2953 rtx last_set
= NULL_RTX
;
2955 rtx cc
= cc_in_cond (cond
);
2957 if (!insn_valid_noce_process_p (last_insn
, cc
))
2959 last_set
= single_set (last_insn
);
2961 rtx x
= SET_DEST (last_set
);
2962 rtx_insn
*first_insn
= first_active_insn (test_bb
);
2963 rtx first_set
= single_set (first_insn
);
2968 /* We have a single simple set, that's okay. */
2969 bool speed_p
= optimize_bb_for_speed_p (test_bb
);
2971 if (first_insn
== last_insn
)
2973 *simple_p
= noce_operand_ok (SET_DEST (first_set
));
2974 *cost
= insn_rtx_cost (first_set
, speed_p
);
2978 rtx_insn
*prev_last_insn
= PREV_INSN (last_insn
);
2979 gcc_assert (prev_last_insn
);
2981 /* For now, disallow setting x multiple times in test_bb. */
2982 if (REG_P (x
) && reg_set_between_p (x
, first_insn
, prev_last_insn
))
2985 bitmap test_bb_temps
= BITMAP_ALLOC (®_obstack
);
2987 /* The regs that are live out of test_bb. */
2988 bitmap test_bb_live_out
= df_get_live_out (test_bb
);
2990 int potential_cost
= insn_rtx_cost (last_set
, speed_p
);
2992 FOR_BB_INSNS (test_bb
, insn
)
2994 if (insn
!= last_insn
)
2996 if (!active_insn_p (insn
))
2999 if (!insn_valid_noce_process_p (insn
, cc
))
3000 goto free_bitmap_and_fail
;
3002 rtx sset
= single_set (insn
);
3005 if (contains_mem_rtx_p (SET_SRC (sset
))
3006 || !REG_P (SET_DEST (sset
)))
3007 goto free_bitmap_and_fail
;
3009 potential_cost
+= insn_rtx_cost (sset
, speed_p
);
3010 bitmap_set_bit (test_bb_temps
, REGNO (SET_DEST (sset
)));
3014 /* If any of the intermediate results in test_bb are live after test_bb
3016 if (bitmap_intersect_p (test_bb_live_out
, test_bb_temps
))
3017 goto free_bitmap_and_fail
;
3019 BITMAP_FREE (test_bb_temps
);
3020 *cost
= potential_cost
;
3024 free_bitmap_and_fail
:
3025 BITMAP_FREE (test_bb_temps
);
3029 /* Given a simple IF-THEN-JOIN or IF-THEN-ELSE-JOIN block, attempt to convert
3030 it without using conditional execution. Return TRUE if we were successful
3031 at converting the block. */
3034 noce_process_if_block (struct noce_if_info
*if_info
)
3036 basic_block test_bb
= if_info
->test_bb
; /* test block */
3037 basic_block then_bb
= if_info
->then_bb
; /* THEN */
3038 basic_block else_bb
= if_info
->else_bb
; /* ELSE or NULL */
3039 basic_block join_bb
= if_info
->join_bb
; /* JOIN */
3040 rtx_insn
*jump
= if_info
->jump
;
3041 rtx cond
= if_info
->cond
;
3042 rtx_insn
*insn_a
, *insn_b
;
3044 rtx orig_x
, x
, a
, b
;
3046 /* We're looking for patterns of the form
3048 (1) if (...) x = a; else x = b;
3049 (2) x = b; if (...) x = a;
3050 (3) if (...) x = a; // as if with an initial x = x.
3052 The later patterns require jumps to be more expensive.
3053 For the if (...) x = a; else x = b; case we allow multiple insns
3054 inside the then and else blocks as long as their only effect is
3055 to calculate a value for x.
3056 ??? For future expansion, look for multiple X in such patterns. */
3058 if (! bb_valid_for_noce_process_p (then_bb
, cond
, &if_info
->then_cost
,
3059 &if_info
->then_simple
))
3063 && ! bb_valid_for_noce_process_p (else_bb
, cond
, &if_info
->else_cost
,
3064 &if_info
->else_simple
))
3067 insn_a
= last_active_insn (then_bb
, FALSE
);
3068 set_a
= single_set (insn_a
);
3071 x
= SET_DEST (set_a
);
3072 a
= SET_SRC (set_a
);
3074 /* Look for the other potential set. Make sure we've got equivalent
3076 /* ??? This is overconservative. Storing to two different mems is
3077 as easy as conditionally computing the address. Storing to a
3078 single mem merely requires a scratch memory to use as one of the
3079 destination addresses; often the memory immediately below the
3080 stack pointer is available for this. */
3084 insn_b
= last_active_insn (else_bb
, FALSE
);
3085 set_b
= single_set (insn_b
);
3088 if (!rtx_interchangeable_p (x
, SET_DEST (set_b
)))
3093 insn_b
= prev_nonnote_nondebug_insn (if_info
->cond_earliest
);
3094 /* We're going to be moving the evaluation of B down from above
3095 COND_EARLIEST to JUMP. Make sure the relevant data is still
3098 || BLOCK_FOR_INSN (insn_b
) != BLOCK_FOR_INSN (if_info
->cond_earliest
)
3099 || !NONJUMP_INSN_P (insn_b
)
3100 || (set_b
= single_set (insn_b
)) == NULL_RTX
3101 || ! rtx_interchangeable_p (x
, SET_DEST (set_b
))
3102 || ! noce_operand_ok (SET_SRC (set_b
))
3103 || reg_overlap_mentioned_p (x
, SET_SRC (set_b
))
3104 || modified_between_p (SET_SRC (set_b
), insn_b
, jump
)
3105 /* Avoid extending the lifetime of hard registers on small
3106 register class machines. */
3107 || (REG_P (SET_SRC (set_b
))
3108 && HARD_REGISTER_P (SET_SRC (set_b
))
3109 && targetm
.small_register_classes_for_mode_p
3110 (GET_MODE (SET_SRC (set_b
))))
3111 /* Likewise with X. In particular this can happen when
3112 noce_get_condition looks farther back in the instruction
3113 stream than one might expect. */
3114 || reg_overlap_mentioned_p (x
, cond
)
3115 || reg_overlap_mentioned_p (x
, a
)
3116 || modified_between_p (x
, insn_b
, jump
))
3123 /* If x has side effects then only the if-then-else form is safe to
3124 convert. But even in that case we would need to restore any notes
3125 (such as REG_INC) at then end. That can be tricky if
3126 noce_emit_move_insn expands to more than one insn, so disable the
3127 optimization entirely for now if there are side effects. */
3128 if (side_effects_p (x
))
3131 b
= (set_b
? SET_SRC (set_b
) : x
);
3133 /* Only operate on register destinations, and even then avoid extending
3134 the lifetime of hard registers on small register class machines. */
3137 || (HARD_REGISTER_P (x
)
3138 && targetm
.small_register_classes_for_mode_p (GET_MODE (x
))))
3140 if (GET_MODE (x
) == BLKmode
)
3143 if (GET_CODE (x
) == ZERO_EXTRACT
3144 && (!CONST_INT_P (XEXP (x
, 1))
3145 || !CONST_INT_P (XEXP (x
, 2))))
3148 x
= gen_reg_rtx (GET_MODE (GET_CODE (x
) == STRICT_LOW_PART
3149 ? XEXP (x
, 0) : x
));
3152 /* Don't operate on sources that may trap or are volatile. */
3153 if (! noce_operand_ok (a
) || ! noce_operand_ok (b
))
3157 /* Set up the info block for our subroutines. */
3158 if_info
->insn_a
= insn_a
;
3159 if_info
->insn_b
= insn_b
;
3164 /* Try optimizations in some approximation of a useful order. */
3165 /* ??? Should first look to see if X is live incoming at all. If it
3166 isn't, we don't need anything but an unconditional set. */
3168 /* Look and see if A and B are really the same. Avoid creating silly
3169 cmove constructs that no one will fix up later. */
3170 if (noce_simple_bbs (if_info
)
3171 && rtx_interchangeable_p (a
, b
))
3173 /* If we have an INSN_B, we don't have to create any new rtl. Just
3174 move the instruction that we already have. If we don't have an
3175 INSN_B, that means that A == X, and we've got a noop move. In
3176 that case don't do anything and let the code below delete INSN_A. */
3177 if (insn_b
&& else_bb
)
3181 if (else_bb
&& insn_b
== BB_END (else_bb
))
3182 BB_END (else_bb
) = PREV_INSN (insn_b
);
3183 reorder_insns (insn_b
, insn_b
, PREV_INSN (jump
));
3185 /* If there was a REG_EQUAL note, delete it since it may have been
3186 true due to this insn being after a jump. */
3187 if ((note
= find_reg_note (insn_b
, REG_EQUAL
, NULL_RTX
)) != 0)
3188 remove_note (insn_b
, note
);
3192 /* If we have "x = b; if (...) x = a;", and x has side-effects, then
3193 x must be executed twice. */
3194 else if (insn_b
&& side_effects_p (orig_x
))
3201 if (!set_b
&& MEM_P (orig_x
))
3203 /* Disallow the "if (...) x = a;" form (implicit "else x = x;")
3204 for optimizations if writing to x may trap or fault,
3205 i.e. it's a memory other than a static var or a stack slot,
3206 is misaligned on strict aligned machines or is read-only. If
3207 x is a read-only memory, then the program is valid only if we
3208 avoid the store into it. If there are stores on both the
3209 THEN and ELSE arms, then we can go ahead with the conversion;
3210 either the program is broken, or the condition is always
3211 false such that the other memory is selected. */
3212 if (noce_mem_write_may_trap_or_fault_p (orig_x
))
3215 /* Avoid store speculation: given "if (...) x = a" where x is a
3216 MEM, we only want to do the store if x is always set
3217 somewhere in the function. This avoids cases like
3218 if (pthread_mutex_trylock(mutex))
3220 where we only want global_variable to be changed if the mutex
3221 is held. FIXME: This should ideally be expressed directly in
3223 if (!noce_can_store_speculate_p (test_bb
, orig_x
))
3227 if (noce_try_move (if_info
))
3229 if (noce_try_store_flag (if_info
))
3231 if (noce_try_bitop (if_info
))
3233 if (noce_try_minmax (if_info
))
3235 if (noce_try_abs (if_info
))
3237 if (!targetm
.have_conditional_execution ()
3238 && noce_try_store_flag_constants (if_info
))
3240 if (HAVE_conditional_move
3241 && noce_try_cmove (if_info
))
3243 if (! targetm
.have_conditional_execution ())
3245 if (noce_try_addcc (if_info
))
3247 if (noce_try_store_flag_mask (if_info
))
3249 if (HAVE_conditional_move
3250 && noce_try_cmove_arith (if_info
))
3252 if (noce_try_sign_mask (if_info
))
3256 if (!else_bb
&& set_b
)
3268 /* If we used a temporary, fix it up now. */
3274 noce_emit_move_insn (orig_x
, x
);
3276 set_used_flags (orig_x
);
3277 unshare_all_rtl_in_chain (seq
);
3280 emit_insn_before_setloc (seq
, BB_END (test_bb
), INSN_LOCATION (insn_a
));
3283 /* The original THEN and ELSE blocks may now be removed. The test block
3284 must now jump to the join block. If the test block and the join block
3285 can be merged, do so. */
3288 delete_basic_block (else_bb
);
3292 remove_edge (find_edge (test_bb
, join_bb
));
3294 remove_edge (find_edge (then_bb
, join_bb
));
3295 redirect_edge_and_branch_force (single_succ_edge (test_bb
), join_bb
);
3296 delete_basic_block (then_bb
);
3299 if (can_merge_blocks_p (test_bb
, join_bb
))
3301 merge_blocks (test_bb
, join_bb
);
3305 num_updated_if_blocks
++;
3309 /* Check whether a block is suitable for conditional move conversion.
3310 Every insn must be a simple set of a register to a constant or a
3311 register. For each assignment, store the value in the pointer map
3312 VALS, keyed indexed by register pointer, then store the register
3313 pointer in REGS. COND is the condition we will test. */
3316 check_cond_move_block (basic_block bb
,
3317 hash_map
<rtx
, rtx
> *vals
,
3322 rtx cc
= cc_in_cond (cond
);
3324 /* We can only handle simple jumps at the end of the basic block.
3325 It is almost impossible to update the CFG otherwise. */
3327 if (JUMP_P (insn
) && !onlyjump_p (insn
))
3330 FOR_BB_INSNS (bb
, insn
)
3334 if (!NONDEBUG_INSN_P (insn
) || JUMP_P (insn
))
3336 set
= single_set (insn
);
3340 dest
= SET_DEST (set
);
3341 src
= SET_SRC (set
);
3343 || (HARD_REGISTER_P (dest
)
3344 && targetm
.small_register_classes_for_mode_p (GET_MODE (dest
))))
3347 if (!CONSTANT_P (src
) && !register_operand (src
, VOIDmode
))
3350 if (side_effects_p (src
) || side_effects_p (dest
))
3353 if (may_trap_p (src
) || may_trap_p (dest
))
3356 /* Don't try to handle this if the source register was
3357 modified earlier in the block. */
3360 || (GET_CODE (src
) == SUBREG
&& REG_P (SUBREG_REG (src
))
3361 && vals
->get (SUBREG_REG (src
))))
3364 /* Don't try to handle this if the destination register was
3365 modified earlier in the block. */
3366 if (vals
->get (dest
))
3369 /* Don't try to handle this if the condition uses the
3370 destination register. */
3371 if (reg_overlap_mentioned_p (dest
, cond
))
3374 /* Don't try to handle this if the source register is modified
3375 later in the block. */
3376 if (!CONSTANT_P (src
)
3377 && modified_between_p (src
, insn
, NEXT_INSN (BB_END (bb
))))
3380 /* Skip it if the instruction to be moved might clobber CC. */
3381 if (cc
&& set_of (cc
, insn
))
3384 vals
->put (dest
, src
);
3386 regs
->safe_push (dest
);
3392 /* Given a basic block BB suitable for conditional move conversion,
3393 a condition COND, and pointer maps THEN_VALS and ELSE_VALS containing
3394 the register values depending on COND, emit the insns in the block as
3395 conditional moves. If ELSE_BLOCK is true, THEN_BB was already
3396 processed. The caller has started a sequence for the conversion.
3397 Return true if successful, false if something goes wrong. */
3400 cond_move_convert_if_block (struct noce_if_info
*if_infop
,
3401 basic_block bb
, rtx cond
,
3402 hash_map
<rtx
, rtx
> *then_vals
,
3403 hash_map
<rtx
, rtx
> *else_vals
,
3408 rtx cond_arg0
, cond_arg1
;
3410 code
= GET_CODE (cond
);
3411 cond_arg0
= XEXP (cond
, 0);
3412 cond_arg1
= XEXP (cond
, 1);
3414 FOR_BB_INSNS (bb
, insn
)
3416 rtx set
, target
, dest
, t
, e
;
3418 /* ??? Maybe emit conditional debug insn? */
3419 if (!NONDEBUG_INSN_P (insn
) || JUMP_P (insn
))
3421 set
= single_set (insn
);
3422 gcc_assert (set
&& REG_P (SET_DEST (set
)));
3424 dest
= SET_DEST (set
);
3426 rtx
*then_slot
= then_vals
->get (dest
);
3427 rtx
*else_slot
= else_vals
->get (dest
);
3428 t
= then_slot
? *then_slot
: NULL_RTX
;
3429 e
= else_slot
? *else_slot
: NULL_RTX
;
3433 /* If this register was set in the then block, we already
3434 handled this case there. */
3447 target
= noce_emit_cmove (if_infop
, dest
, code
, cond_arg0
, cond_arg1
,
3453 noce_emit_move_insn (dest
, target
);
3459 /* Given a simple IF-THEN-JOIN or IF-THEN-ELSE-JOIN block, attempt to convert
3460 it using only conditional moves. Return TRUE if we were successful at
3461 converting the block. */
3464 cond_move_process_if_block (struct noce_if_info
*if_info
)
3466 basic_block test_bb
= if_info
->test_bb
;
3467 basic_block then_bb
= if_info
->then_bb
;
3468 basic_block else_bb
= if_info
->else_bb
;
3469 basic_block join_bb
= if_info
->join_bb
;
3470 rtx_insn
*jump
= if_info
->jump
;
3471 rtx cond
= if_info
->cond
;
3472 rtx_insn
*seq
, *loc_insn
;
3475 vec
<rtx
> then_regs
= vNULL
;
3476 vec
<rtx
> else_regs
= vNULL
;
3478 int success_p
= FALSE
;
3480 /* Build a mapping for each block to the value used for each
3482 hash_map
<rtx
, rtx
> then_vals
;
3483 hash_map
<rtx
, rtx
> else_vals
;
3485 /* Make sure the blocks are suitable. */
3486 if (!check_cond_move_block (then_bb
, &then_vals
, &then_regs
, cond
)
3488 && !check_cond_move_block (else_bb
, &else_vals
, &else_regs
, cond
)))
3491 /* Make sure the blocks can be used together. If the same register
3492 is set in both blocks, and is not set to a constant in both
3493 cases, then both blocks must set it to the same register. We
3494 have already verified that if it is set to a register, that the
3495 source register does not change after the assignment. Also count
3496 the number of registers set in only one of the blocks. */
3498 FOR_EACH_VEC_ELT (then_regs
, i
, reg
)
3500 rtx
*then_slot
= then_vals
.get (reg
);
3501 rtx
*else_slot
= else_vals
.get (reg
);
3503 gcc_checking_assert (then_slot
);
3508 rtx then_val
= *then_slot
;
3509 rtx else_val
= *else_slot
;
3510 if (!CONSTANT_P (then_val
) && !CONSTANT_P (else_val
)
3511 && !rtx_equal_p (then_val
, else_val
))
3516 /* Finish off c for MAX_CONDITIONAL_EXECUTE. */
3517 FOR_EACH_VEC_ELT (else_regs
, i
, reg
)
3519 gcc_checking_assert (else_vals
.get (reg
));
3520 if (!then_vals
.get (reg
))
3524 /* Make sure it is reasonable to convert this block. What matters
3525 is the number of assignments currently made in only one of the
3526 branches, since if we convert we are going to always execute
3528 if (c
> MAX_CONDITIONAL_EXECUTE
)
3531 /* Try to emit the conditional moves. First do the then block,
3532 then do anything left in the else blocks. */
3534 if (!cond_move_convert_if_block (if_info
, then_bb
, cond
,
3535 &then_vals
, &else_vals
, false)
3537 && !cond_move_convert_if_block (if_info
, else_bb
, cond
,
3538 &then_vals
, &else_vals
, true)))
3543 seq
= end_ifcvt_sequence (if_info
);
3547 loc_insn
= first_active_insn (then_bb
);
3550 loc_insn
= first_active_insn (else_bb
);
3551 gcc_assert (loc_insn
);
3553 emit_insn_before_setloc (seq
, jump
, INSN_LOCATION (loc_insn
));
3557 delete_basic_block (else_bb
);
3561 remove_edge (find_edge (test_bb
, join_bb
));
3563 remove_edge (find_edge (then_bb
, join_bb
));
3564 redirect_edge_and_branch_force (single_succ_edge (test_bb
), join_bb
);
3565 delete_basic_block (then_bb
);
3568 if (can_merge_blocks_p (test_bb
, join_bb
))
3570 merge_blocks (test_bb
, join_bb
);
3574 num_updated_if_blocks
++;
3579 then_regs
.release ();
3580 else_regs
.release ();
3585 /* Determine if a given basic block heads a simple IF-THEN-JOIN or an
3586 IF-THEN-ELSE-JOIN block.
3588 If so, we'll try to convert the insns to not require the branch,
3589 using only transformations that do not require conditional execution.
3591 Return TRUE if we were successful at converting the block. */
3594 noce_find_if_block (basic_block test_bb
, edge then_edge
, edge else_edge
,
3597 basic_block then_bb
, else_bb
, join_bb
;
3598 bool then_else_reversed
= false;
3601 rtx_insn
*cond_earliest
;
3602 struct noce_if_info if_info
;
3604 /* We only ever should get here before reload. */
3605 gcc_assert (!reload_completed
);
3607 /* Recognize an IF-THEN-ELSE-JOIN block. */
3608 if (single_pred_p (then_edge
->dest
)
3609 && single_succ_p (then_edge
->dest
)
3610 && single_pred_p (else_edge
->dest
)
3611 && single_succ_p (else_edge
->dest
)
3612 && single_succ (then_edge
->dest
) == single_succ (else_edge
->dest
))
3614 then_bb
= then_edge
->dest
;
3615 else_bb
= else_edge
->dest
;
3616 join_bb
= single_succ (then_bb
);
3618 /* Recognize an IF-THEN-JOIN block. */
3619 else if (single_pred_p (then_edge
->dest
)
3620 && single_succ_p (then_edge
->dest
)
3621 && single_succ (then_edge
->dest
) == else_edge
->dest
)
3623 then_bb
= then_edge
->dest
;
3624 else_bb
= NULL_BLOCK
;
3625 join_bb
= else_edge
->dest
;
3627 /* Recognize an IF-ELSE-JOIN block. We can have those because the order
3628 of basic blocks in cfglayout mode does not matter, so the fallthrough
3629 edge can go to any basic block (and not just to bb->next_bb, like in
3631 else if (single_pred_p (else_edge
->dest
)
3632 && single_succ_p (else_edge
->dest
)
3633 && single_succ (else_edge
->dest
) == then_edge
->dest
)
3635 /* The noce transformations do not apply to IF-ELSE-JOIN blocks.
3636 To make this work, we have to invert the THEN and ELSE blocks
3637 and reverse the jump condition. */
3638 then_bb
= else_edge
->dest
;
3639 else_bb
= NULL_BLOCK
;
3640 join_bb
= single_succ (then_bb
);
3641 then_else_reversed
= true;
3644 /* Not a form we can handle. */
3647 /* The edges of the THEN and ELSE blocks cannot have complex edges. */
3648 if (single_succ_edge (then_bb
)->flags
& EDGE_COMPLEX
)
3651 && single_succ_edge (else_bb
)->flags
& EDGE_COMPLEX
)
3654 num_possible_if_blocks
++;
3659 "\nIF-THEN%s-JOIN block found, pass %d, test %d, then %d",
3660 (else_bb
) ? "-ELSE" : "",
3661 pass
, test_bb
->index
, then_bb
->index
);
3664 fprintf (dump_file
, ", else %d", else_bb
->index
);
3666 fprintf (dump_file
, ", join %d\n", join_bb
->index
);
3669 /* If the conditional jump is more than just a conditional
3670 jump, then we can not do if-conversion on this block. */
3671 jump
= BB_END (test_bb
);
3672 if (! onlyjump_p (jump
))
3675 /* If this is not a standard conditional jump, we can't parse it. */
3676 cond
= noce_get_condition (jump
, &cond_earliest
, then_else_reversed
);
3680 /* We must be comparing objects whose modes imply the size. */
3681 if (GET_MODE (XEXP (cond
, 0)) == BLKmode
)
3684 /* Initialize an IF_INFO struct to pass around. */
3685 memset (&if_info
, 0, sizeof if_info
);
3686 if_info
.test_bb
= test_bb
;
3687 if_info
.then_bb
= then_bb
;
3688 if_info
.else_bb
= else_bb
;
3689 if_info
.join_bb
= join_bb
;
3690 if_info
.cond
= cond
;
3691 if_info
.cond_earliest
= cond_earliest
;
3692 if_info
.jump
= jump
;
3693 if_info
.then_else_reversed
= then_else_reversed
;
3694 if_info
.branch_cost
= BRANCH_COST (optimize_bb_for_speed_p (test_bb
),
3695 predictable_edge_p (then_edge
));
3697 /* Do the real work. */
3699 if (noce_process_if_block (&if_info
))
3702 if (HAVE_conditional_move
3703 && cond_move_process_if_block (&if_info
))
3710 /* Merge the blocks and mark for local life update. */
3713 merge_if_block (struct ce_if_block
* ce_info
)
3715 basic_block test_bb
= ce_info
->test_bb
; /* last test block */
3716 basic_block then_bb
= ce_info
->then_bb
; /* THEN */
3717 basic_block else_bb
= ce_info
->else_bb
; /* ELSE or NULL */
3718 basic_block join_bb
= ce_info
->join_bb
; /* join block */
3719 basic_block combo_bb
;
3721 /* All block merging is done into the lower block numbers. */
3724 df_set_bb_dirty (test_bb
);
3726 /* Merge any basic blocks to handle && and || subtests. Each of
3727 the blocks are on the fallthru path from the predecessor block. */
3728 if (ce_info
->num_multiple_test_blocks
> 0)
3730 basic_block bb
= test_bb
;
3731 basic_block last_test_bb
= ce_info
->last_test_bb
;
3732 basic_block fallthru
= block_fallthru (bb
);
3737 fallthru
= block_fallthru (bb
);
3738 merge_blocks (combo_bb
, bb
);
3741 while (bb
!= last_test_bb
);
3744 /* Merge TEST block into THEN block. Normally the THEN block won't have a
3745 label, but it might if there were || tests. That label's count should be
3746 zero, and it normally should be removed. */
3750 /* If THEN_BB has no successors, then there's a BARRIER after it.
3751 If COMBO_BB has more than one successor (THEN_BB), then that BARRIER
3752 is no longer needed, and in fact it is incorrect to leave it in
3754 if (EDGE_COUNT (then_bb
->succs
) == 0
3755 && EDGE_COUNT (combo_bb
->succs
) > 1)
3757 rtx_insn
*end
= NEXT_INSN (BB_END (then_bb
));
3758 while (end
&& NOTE_P (end
) && !NOTE_INSN_BASIC_BLOCK_P (end
))
3759 end
= NEXT_INSN (end
);
3761 if (end
&& BARRIER_P (end
))
3764 merge_blocks (combo_bb
, then_bb
);
3768 /* The ELSE block, if it existed, had a label. That label count
3769 will almost always be zero, but odd things can happen when labels
3770 get their addresses taken. */
3773 /* If ELSE_BB has no successors, then there's a BARRIER after it.
3774 If COMBO_BB has more than one successor (ELSE_BB), then that BARRIER
3775 is no longer needed, and in fact it is incorrect to leave it in
3777 if (EDGE_COUNT (else_bb
->succs
) == 0
3778 && EDGE_COUNT (combo_bb
->succs
) > 1)
3780 rtx_insn
*end
= NEXT_INSN (BB_END (else_bb
));
3781 while (end
&& NOTE_P (end
) && !NOTE_INSN_BASIC_BLOCK_P (end
))
3782 end
= NEXT_INSN (end
);
3784 if (end
&& BARRIER_P (end
))
3787 merge_blocks (combo_bb
, else_bb
);
3791 /* If there was no join block reported, that means it was not adjacent
3792 to the others, and so we cannot merge them. */
3796 rtx_insn
*last
= BB_END (combo_bb
);
3798 /* The outgoing edge for the current COMBO block should already
3799 be correct. Verify this. */
3800 if (EDGE_COUNT (combo_bb
->succs
) == 0)
3801 gcc_assert (find_reg_note (last
, REG_NORETURN
, NULL
)
3802 || (NONJUMP_INSN_P (last
)
3803 && GET_CODE (PATTERN (last
)) == TRAP_IF
3804 && (TRAP_CONDITION (PATTERN (last
))
3805 == const_true_rtx
)));
3808 /* There should still be something at the end of the THEN or ELSE
3809 blocks taking us to our final destination. */
3810 gcc_assert (JUMP_P (last
)
3811 || (EDGE_SUCC (combo_bb
, 0)->dest
3812 == EXIT_BLOCK_PTR_FOR_FN (cfun
)
3814 && SIBLING_CALL_P (last
))
3815 || ((EDGE_SUCC (combo_bb
, 0)->flags
& EDGE_EH
)
3816 && can_throw_internal (last
)));
3819 /* The JOIN block may have had quite a number of other predecessors too.
3820 Since we've already merged the TEST, THEN and ELSE blocks, we should
3821 have only one remaining edge from our if-then-else diamond. If there
3822 is more than one remaining edge, it must come from elsewhere. There
3823 may be zero incoming edges if the THEN block didn't actually join
3824 back up (as with a call to a non-return function). */
3825 else if (EDGE_COUNT (join_bb
->preds
) < 2
3826 && join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
3828 /* We can merge the JOIN cleanly and update the dataflow try
3829 again on this pass.*/
3830 merge_blocks (combo_bb
, join_bb
);
3835 /* We cannot merge the JOIN. */
3837 /* The outgoing edge for the current COMBO block should already
3838 be correct. Verify this. */
3839 gcc_assert (single_succ_p (combo_bb
)
3840 && single_succ (combo_bb
) == join_bb
);
3842 /* Remove the jump and cruft from the end of the COMBO block. */
3843 if (join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
3844 tidy_fallthru_edge (single_succ_edge (combo_bb
));
3847 num_updated_if_blocks
++;
3850 /* Find a block ending in a simple IF condition and try to transform it
3851 in some way. When converting a multi-block condition, put the new code
3852 in the first such block and delete the rest. Return a pointer to this
3853 first block if some transformation was done. Return NULL otherwise. */
3856 find_if_header (basic_block test_bb
, int pass
)
3858 ce_if_block ce_info
;
3862 /* The kind of block we're looking for has exactly two successors. */
3863 if (EDGE_COUNT (test_bb
->succs
) != 2)
3866 then_edge
= EDGE_SUCC (test_bb
, 0);
3867 else_edge
= EDGE_SUCC (test_bb
, 1);
3869 if (df_get_bb_dirty (then_edge
->dest
))
3871 if (df_get_bb_dirty (else_edge
->dest
))
3874 /* Neither edge should be abnormal. */
3875 if ((then_edge
->flags
& EDGE_COMPLEX
)
3876 || (else_edge
->flags
& EDGE_COMPLEX
))
3879 /* Nor exit the loop. */
3880 if ((then_edge
->flags
& EDGE_LOOP_EXIT
)
3881 || (else_edge
->flags
& EDGE_LOOP_EXIT
))
3884 /* The THEN edge is canonically the one that falls through. */
3885 if (then_edge
->flags
& EDGE_FALLTHRU
)
3887 else if (else_edge
->flags
& EDGE_FALLTHRU
)
3888 std::swap (then_edge
, else_edge
);
3890 /* Otherwise this must be a multiway branch of some sort. */
3893 memset (&ce_info
, 0, sizeof (ce_info
));
3894 ce_info
.test_bb
= test_bb
;
3895 ce_info
.then_bb
= then_edge
->dest
;
3896 ce_info
.else_bb
= else_edge
->dest
;
3897 ce_info
.pass
= pass
;
3899 #ifdef IFCVT_MACHDEP_INIT
3900 IFCVT_MACHDEP_INIT (&ce_info
);
3903 if (!reload_completed
3904 && noce_find_if_block (test_bb
, then_edge
, else_edge
, pass
))
3907 if (reload_completed
3908 && targetm
.have_conditional_execution ()
3909 && cond_exec_find_if_block (&ce_info
))
3912 if (targetm
.have_trap ()
3913 && optab_handler (ctrap_optab
, word_mode
) != CODE_FOR_nothing
3914 && find_cond_trap (test_bb
, then_edge
, else_edge
))
3917 if (dom_info_state (CDI_POST_DOMINATORS
) >= DOM_NO_FAST_QUERY
3918 && (reload_completed
|| !targetm
.have_conditional_execution ()))
3920 if (find_if_case_1 (test_bb
, then_edge
, else_edge
))
3922 if (find_if_case_2 (test_bb
, then_edge
, else_edge
))
3930 fprintf (dump_file
, "Conversion succeeded on pass %d.\n", pass
);
3931 /* Set this so we continue looking. */
3932 cond_exec_changed_p
= TRUE
;
3933 return ce_info
.test_bb
;
3936 /* Return true if a block has two edges, one of which falls through to the next
3937 block, and the other jumps to a specific block, so that we can tell if the
3938 block is part of an && test or an || test. Returns either -1 or the number
3939 of non-note, non-jump, non-USE/CLOBBER insns in the block. */
3942 block_jumps_and_fallthru_p (basic_block cur_bb
, basic_block target_bb
)
3945 int fallthru_p
= FALSE
;
3952 if (!cur_bb
|| !target_bb
)
3955 /* If no edges, obviously it doesn't jump or fallthru. */
3956 if (EDGE_COUNT (cur_bb
->succs
) == 0)
3959 FOR_EACH_EDGE (cur_edge
, ei
, cur_bb
->succs
)
3961 if (cur_edge
->flags
& EDGE_COMPLEX
)
3962 /* Anything complex isn't what we want. */
3965 else if (cur_edge
->flags
& EDGE_FALLTHRU
)
3968 else if (cur_edge
->dest
== target_bb
)
3975 if ((jump_p
& fallthru_p
) == 0)
3978 /* Don't allow calls in the block, since this is used to group && and ||
3979 together for conditional execution support. ??? we should support
3980 conditional execution support across calls for IA-64 some day, but
3981 for now it makes the code simpler. */
3982 end
= BB_END (cur_bb
);
3983 insn
= BB_HEAD (cur_bb
);
3985 while (insn
!= NULL_RTX
)
3992 && !DEBUG_INSN_P (insn
)
3993 && GET_CODE (PATTERN (insn
)) != USE
3994 && GET_CODE (PATTERN (insn
)) != CLOBBER
)
4000 insn
= NEXT_INSN (insn
);
4006 /* Determine if a given basic block heads a simple IF-THEN or IF-THEN-ELSE
4007 block. If so, we'll try to convert the insns to not require the branch.
4008 Return TRUE if we were successful at converting the block. */
4011 cond_exec_find_if_block (struct ce_if_block
* ce_info
)
4013 basic_block test_bb
= ce_info
->test_bb
;
4014 basic_block then_bb
= ce_info
->then_bb
;
4015 basic_block else_bb
= ce_info
->else_bb
;
4016 basic_block join_bb
= NULL_BLOCK
;
4021 ce_info
->last_test_bb
= test_bb
;
4023 /* We only ever should get here after reload,
4024 and if we have conditional execution. */
4025 gcc_assert (reload_completed
&& targetm
.have_conditional_execution ());
4027 /* Discover if any fall through predecessors of the current test basic block
4028 were && tests (which jump to the else block) or || tests (which jump to
4030 if (single_pred_p (test_bb
)
4031 && single_pred_edge (test_bb
)->flags
== EDGE_FALLTHRU
)
4033 basic_block bb
= single_pred (test_bb
);
4034 basic_block target_bb
;
4035 int max_insns
= MAX_CONDITIONAL_EXECUTE
;
4038 /* Determine if the preceding block is an && or || block. */
4039 if ((n_insns
= block_jumps_and_fallthru_p (bb
, else_bb
)) >= 0)
4041 ce_info
->and_and_p
= TRUE
;
4042 target_bb
= else_bb
;
4044 else if ((n_insns
= block_jumps_and_fallthru_p (bb
, then_bb
)) >= 0)
4046 ce_info
->and_and_p
= FALSE
;
4047 target_bb
= then_bb
;
4050 target_bb
= NULL_BLOCK
;
4052 if (target_bb
&& n_insns
<= max_insns
)
4054 int total_insns
= 0;
4057 ce_info
->last_test_bb
= test_bb
;
4059 /* Found at least one && or || block, look for more. */
4062 ce_info
->test_bb
= test_bb
= bb
;
4063 total_insns
+= n_insns
;
4066 if (!single_pred_p (bb
))
4069 bb
= single_pred (bb
);
4070 n_insns
= block_jumps_and_fallthru_p (bb
, target_bb
);
4072 while (n_insns
>= 0 && (total_insns
+ n_insns
) <= max_insns
);
4074 ce_info
->num_multiple_test_blocks
= blocks
;
4075 ce_info
->num_multiple_test_insns
= total_insns
;
4077 if (ce_info
->and_and_p
)
4078 ce_info
->num_and_and_blocks
= blocks
;
4080 ce_info
->num_or_or_blocks
= blocks
;
4084 /* The THEN block of an IF-THEN combo must have exactly one predecessor,
4085 other than any || blocks which jump to the THEN block. */
4086 if ((EDGE_COUNT (then_bb
->preds
) - ce_info
->num_or_or_blocks
) != 1)
4089 /* The edges of the THEN and ELSE blocks cannot have complex edges. */
4090 FOR_EACH_EDGE (cur_edge
, ei
, then_bb
->preds
)
4092 if (cur_edge
->flags
& EDGE_COMPLEX
)
4096 FOR_EACH_EDGE (cur_edge
, ei
, else_bb
->preds
)
4098 if (cur_edge
->flags
& EDGE_COMPLEX
)
4102 /* The THEN block of an IF-THEN combo must have zero or one successors. */
4103 if (EDGE_COUNT (then_bb
->succs
) > 0
4104 && (!single_succ_p (then_bb
)
4105 || (single_succ_edge (then_bb
)->flags
& EDGE_COMPLEX
)
4106 || (epilogue_completed
4107 && tablejump_p (BB_END (then_bb
), NULL
, NULL
))))
4110 /* If the THEN block has no successors, conditional execution can still
4111 make a conditional call. Don't do this unless the ELSE block has
4112 only one incoming edge -- the CFG manipulation is too ugly otherwise.
4113 Check for the last insn of the THEN block being an indirect jump, which
4114 is listed as not having any successors, but confuses the rest of the CE
4115 code processing. ??? we should fix this in the future. */
4116 if (EDGE_COUNT (then_bb
->succs
) == 0)
4118 if (single_pred_p (else_bb
) && else_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4120 rtx_insn
*last_insn
= BB_END (then_bb
);
4123 && NOTE_P (last_insn
)
4124 && last_insn
!= BB_HEAD (then_bb
))
4125 last_insn
= PREV_INSN (last_insn
);
4128 && JUMP_P (last_insn
)
4129 && ! simplejump_p (last_insn
))
4133 else_bb
= NULL_BLOCK
;
4139 /* If the THEN block's successor is the other edge out of the TEST block,
4140 then we have an IF-THEN combo without an ELSE. */
4141 else if (single_succ (then_bb
) == else_bb
)
4144 else_bb
= NULL_BLOCK
;
4147 /* If the THEN and ELSE block meet in a subsequent block, and the ELSE
4148 has exactly one predecessor and one successor, and the outgoing edge
4149 is not complex, then we have an IF-THEN-ELSE combo. */
4150 else if (single_succ_p (else_bb
)
4151 && single_succ (then_bb
) == single_succ (else_bb
)
4152 && single_pred_p (else_bb
)
4153 && !(single_succ_edge (else_bb
)->flags
& EDGE_COMPLEX
)
4154 && !(epilogue_completed
4155 && tablejump_p (BB_END (else_bb
), NULL
, NULL
)))
4156 join_bb
= single_succ (else_bb
);
4158 /* Otherwise it is not an IF-THEN or IF-THEN-ELSE combination. */
4162 num_possible_if_blocks
++;
4167 "\nIF-THEN%s block found, pass %d, start block %d "
4168 "[insn %d], then %d [%d]",
4169 (else_bb
) ? "-ELSE" : "",
4172 BB_HEAD (test_bb
) ? (int)INSN_UID (BB_HEAD (test_bb
)) : -1,
4174 BB_HEAD (then_bb
) ? (int)INSN_UID (BB_HEAD (then_bb
)) : -1);
4177 fprintf (dump_file
, ", else %d [%d]",
4179 BB_HEAD (else_bb
) ? (int)INSN_UID (BB_HEAD (else_bb
)) : -1);
4181 fprintf (dump_file
, ", join %d [%d]",
4183 BB_HEAD (join_bb
) ? (int)INSN_UID (BB_HEAD (join_bb
)) : -1);
4185 if (ce_info
->num_multiple_test_blocks
> 0)
4186 fprintf (dump_file
, ", %d %s block%s last test %d [%d]",
4187 ce_info
->num_multiple_test_blocks
,
4188 (ce_info
->and_and_p
) ? "&&" : "||",
4189 (ce_info
->num_multiple_test_blocks
== 1) ? "" : "s",
4190 ce_info
->last_test_bb
->index
,
4191 ((BB_HEAD (ce_info
->last_test_bb
))
4192 ? (int)INSN_UID (BB_HEAD (ce_info
->last_test_bb
))
4195 fputc ('\n', dump_file
);
4198 /* Make sure IF, THEN, and ELSE, blocks are adjacent. Actually, we get the
4199 first condition for free, since we've already asserted that there's a
4200 fallthru edge from IF to THEN. Likewise for the && and || blocks, since
4201 we checked the FALLTHRU flag, those are already adjacent to the last IF
4203 /* ??? As an enhancement, move the ELSE block. Have to deal with
4204 BLOCK notes, if by no other means than backing out the merge if they
4205 exist. Sticky enough I don't want to think about it now. */
4207 if (else_bb
&& (next
= next
->next_bb
) != else_bb
)
4209 if ((next
= next
->next_bb
) != join_bb
4210 && join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4218 /* Do the real work. */
4220 ce_info
->else_bb
= else_bb
;
4221 ce_info
->join_bb
= join_bb
;
4223 /* If we have && and || tests, try to first handle combining the && and ||
4224 tests into the conditional code, and if that fails, go back and handle
4225 it without the && and ||, which at present handles the && case if there
4226 was no ELSE block. */
4227 if (cond_exec_process_if_block (ce_info
, TRUE
))
4230 if (ce_info
->num_multiple_test_blocks
)
4234 if (cond_exec_process_if_block (ce_info
, FALSE
))
4241 /* Convert a branch over a trap, or a branch
4242 to a trap, into a conditional trap. */
4245 find_cond_trap (basic_block test_bb
, edge then_edge
, edge else_edge
)
4247 basic_block then_bb
= then_edge
->dest
;
4248 basic_block else_bb
= else_edge
->dest
;
4249 basic_block other_bb
, trap_bb
;
4250 rtx_insn
*trap
, *jump
;
4252 rtx_insn
*cond_earliest
;
4255 /* Locate the block with the trap instruction. */
4256 /* ??? While we look for no successors, we really ought to allow
4257 EH successors. Need to fix merge_if_block for that to work. */
4258 if ((trap
= block_has_only_trap (then_bb
)) != NULL
)
4259 trap_bb
= then_bb
, other_bb
= else_bb
;
4260 else if ((trap
= block_has_only_trap (else_bb
)) != NULL
)
4261 trap_bb
= else_bb
, other_bb
= then_bb
;
4267 fprintf (dump_file
, "\nTRAP-IF block found, start %d, trap %d\n",
4268 test_bb
->index
, trap_bb
->index
);
4271 /* If this is not a standard conditional jump, we can't parse it. */
4272 jump
= BB_END (test_bb
);
4273 cond
= noce_get_condition (jump
, &cond_earliest
, false);
4277 /* If the conditional jump is more than just a conditional jump, then
4278 we can not do if-conversion on this block. */
4279 if (! onlyjump_p (jump
))
4282 /* We must be comparing objects whose modes imply the size. */
4283 if (GET_MODE (XEXP (cond
, 0)) == BLKmode
)
4286 /* Reverse the comparison code, if necessary. */
4287 code
= GET_CODE (cond
);
4288 if (then_bb
== trap_bb
)
4290 code
= reversed_comparison_code (cond
, jump
);
4291 if (code
== UNKNOWN
)
4295 /* Attempt to generate the conditional trap. */
4296 rtx_insn
*seq
= gen_cond_trap (code
, copy_rtx (XEXP (cond
, 0)),
4297 copy_rtx (XEXP (cond
, 1)),
4298 TRAP_CODE (PATTERN (trap
)));
4302 /* Emit the new insns before cond_earliest. */
4303 emit_insn_before_setloc (seq
, cond_earliest
, INSN_LOCATION (trap
));
4305 /* Delete the trap block if possible. */
4306 remove_edge (trap_bb
== then_bb
? then_edge
: else_edge
);
4307 df_set_bb_dirty (test_bb
);
4308 df_set_bb_dirty (then_bb
);
4309 df_set_bb_dirty (else_bb
);
4311 if (EDGE_COUNT (trap_bb
->preds
) == 0)
4313 delete_basic_block (trap_bb
);
4317 /* Wire together the blocks again. */
4318 if (current_ir_type () == IR_RTL_CFGLAYOUT
)
4319 single_succ_edge (test_bb
)->flags
|= EDGE_FALLTHRU
;
4320 else if (trap_bb
== then_bb
)
4322 rtx lab
= JUMP_LABEL (jump
);
4323 rtx_insn
*seq
= targetm
.gen_jump (lab
);
4324 rtx_jump_insn
*newjump
= emit_jump_insn_after (seq
, jump
);
4325 LABEL_NUSES (lab
) += 1;
4326 JUMP_LABEL (newjump
) = lab
;
4327 emit_barrier_after (newjump
);
4331 if (can_merge_blocks_p (test_bb
, other_bb
))
4333 merge_blocks (test_bb
, other_bb
);
4337 num_updated_if_blocks
++;
4341 /* Subroutine of find_cond_trap: if BB contains only a trap insn,
4345 block_has_only_trap (basic_block bb
)
4349 /* We're not the exit block. */
4350 if (bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
4353 /* The block must have no successors. */
4354 if (EDGE_COUNT (bb
->succs
) > 0)
4357 /* The only instruction in the THEN block must be the trap. */
4358 trap
= first_active_insn (bb
);
4359 if (! (trap
== BB_END (bb
)
4360 && GET_CODE (PATTERN (trap
)) == TRAP_IF
4361 && TRAP_CONDITION (PATTERN (trap
)) == const_true_rtx
))
4367 /* Look for IF-THEN-ELSE cases in which one of THEN or ELSE is
4368 transformable, but not necessarily the other. There need be no
4371 Return TRUE if we were successful at converting the block.
4373 Cases we'd like to look at:
4376 if (test) goto over; // x not live
4384 if (! test) goto label;
4387 if (test) goto E; // x not live
4401 (3) // This one's really only interesting for targets that can do
4402 // multiway branching, e.g. IA-64 BBB bundles. For other targets
4403 // it results in multiple branches on a cache line, which often
4404 // does not sit well with predictors.
4406 if (test1) goto E; // predicted not taken
4422 (A) Don't do (2) if the branch is predicted against the block we're
4423 eliminating. Do it anyway if we can eliminate a branch; this requires
4424 that the sole successor of the eliminated block postdominate the other
4427 (B) With CE, on (3) we can steal from both sides of the if, creating
4436 Again, this is most useful if J postdominates.
4438 (C) CE substitutes for helpful life information.
4440 (D) These heuristics need a lot of work. */
4442 /* Tests for case 1 above. */
4445 find_if_case_1 (basic_block test_bb
, edge then_edge
, edge else_edge
)
4447 basic_block then_bb
= then_edge
->dest
;
4448 basic_block else_bb
= else_edge
->dest
;
4450 int then_bb_index
, then_prob
;
4451 rtx else_target
= NULL_RTX
;
4453 /* If we are partitioning hot/cold basic blocks, we don't want to
4454 mess up unconditional or indirect jumps that cross between hot
4457 Basic block partitioning may result in some jumps that appear to
4458 be optimizable (or blocks that appear to be mergeable), but which really
4459 must be left untouched (they are required to make it safely across
4460 partition boundaries). See the comments at the top of
4461 bb-reorder.c:partition_hot_cold_basic_blocks for complete details. */
4463 if ((BB_END (then_bb
)
4464 && JUMP_P (BB_END (then_bb
))
4465 && CROSSING_JUMP_P (BB_END (then_bb
)))
4466 || (BB_END (test_bb
)
4467 && JUMP_P (BB_END (test_bb
))
4468 && CROSSING_JUMP_P (BB_END (test_bb
)))
4469 || (BB_END (else_bb
)
4470 && JUMP_P (BB_END (else_bb
))
4471 && CROSSING_JUMP_P (BB_END (else_bb
))))
4474 /* THEN has one successor. */
4475 if (!single_succ_p (then_bb
))
4478 /* THEN does not fall through, but is not strange either. */
4479 if (single_succ_edge (then_bb
)->flags
& (EDGE_COMPLEX
| EDGE_FALLTHRU
))
4482 /* THEN has one predecessor. */
4483 if (!single_pred_p (then_bb
))
4486 /* THEN must do something. */
4487 if (forwarder_block_p (then_bb
))
4490 num_possible_if_blocks
++;
4493 "\nIF-CASE-1 found, start %d, then %d\n",
4494 test_bb
->index
, then_bb
->index
);
4496 if (then_edge
->probability
)
4497 then_prob
= REG_BR_PROB_BASE
- then_edge
->probability
;
4499 then_prob
= REG_BR_PROB_BASE
/ 2;
4501 /* We're speculating from the THEN path, we want to make sure the cost
4502 of speculation is within reason. */
4503 if (! cheap_bb_rtx_cost_p (then_bb
, then_prob
,
4504 COSTS_N_INSNS (BRANCH_COST (optimize_bb_for_speed_p (then_edge
->src
),
4505 predictable_edge_p (then_edge
)))))
4508 if (else_bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
4510 rtx_insn
*jump
= BB_END (else_edge
->src
);
4511 gcc_assert (JUMP_P (jump
));
4512 else_target
= JUMP_LABEL (jump
);
4515 /* Registers set are dead, or are predicable. */
4516 if (! dead_or_predicable (test_bb
, then_bb
, else_bb
,
4517 single_succ_edge (then_bb
), 1))
4520 /* Conversion went ok, including moving the insns and fixing up the
4521 jump. Adjust the CFG to match. */
4523 /* We can avoid creating a new basic block if then_bb is immediately
4524 followed by else_bb, i.e. deleting then_bb allows test_bb to fall
4525 through to else_bb. */
4527 if (then_bb
->next_bb
== else_bb
4528 && then_bb
->prev_bb
== test_bb
4529 && else_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4531 redirect_edge_succ (FALLTHRU_EDGE (test_bb
), else_bb
);
4534 else if (else_bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
4535 new_bb
= force_nonfallthru_and_redirect (FALLTHRU_EDGE (test_bb
),
4536 else_bb
, else_target
);
4538 new_bb
= redirect_edge_and_branch_force (FALLTHRU_EDGE (test_bb
),
4541 df_set_bb_dirty (test_bb
);
4542 df_set_bb_dirty (else_bb
);
4544 then_bb_index
= then_bb
->index
;
4545 delete_basic_block (then_bb
);
4547 /* Make rest of code believe that the newly created block is the THEN_BB
4548 block we removed. */
4551 df_bb_replace (then_bb_index
, new_bb
);
4552 /* This should have been done above via force_nonfallthru_and_redirect
4553 (possibly called from redirect_edge_and_branch_force). */
4554 gcc_checking_assert (BB_PARTITION (new_bb
) == BB_PARTITION (test_bb
));
4558 num_updated_if_blocks
++;
4563 /* Test for case 2 above. */
4566 find_if_case_2 (basic_block test_bb
, edge then_edge
, edge else_edge
)
4568 basic_block then_bb
= then_edge
->dest
;
4569 basic_block else_bb
= else_edge
->dest
;
4571 int then_prob
, else_prob
;
4573 /* We do not want to speculate (empty) loop latches. */
4575 && else_bb
->loop_father
->latch
== else_bb
)
4578 /* If we are partitioning hot/cold basic blocks, we don't want to
4579 mess up unconditional or indirect jumps that cross between hot
4582 Basic block partitioning may result in some jumps that appear to
4583 be optimizable (or blocks that appear to be mergeable), but which really
4584 must be left untouched (they are required to make it safely across
4585 partition boundaries). See the comments at the top of
4586 bb-reorder.c:partition_hot_cold_basic_blocks for complete details. */
4588 if ((BB_END (then_bb
)
4589 && JUMP_P (BB_END (then_bb
))
4590 && CROSSING_JUMP_P (BB_END (then_bb
)))
4591 || (BB_END (test_bb
)
4592 && JUMP_P (BB_END (test_bb
))
4593 && CROSSING_JUMP_P (BB_END (test_bb
)))
4594 || (BB_END (else_bb
)
4595 && JUMP_P (BB_END (else_bb
))
4596 && CROSSING_JUMP_P (BB_END (else_bb
))))
4599 /* ELSE has one successor. */
4600 if (!single_succ_p (else_bb
))
4603 else_succ
= single_succ_edge (else_bb
);
4605 /* ELSE outgoing edge is not complex. */
4606 if (else_succ
->flags
& EDGE_COMPLEX
)
4609 /* ELSE has one predecessor. */
4610 if (!single_pred_p (else_bb
))
4613 /* THEN is not EXIT. */
4614 if (then_bb
->index
< NUM_FIXED_BLOCKS
)
4617 if (else_edge
->probability
)
4619 else_prob
= else_edge
->probability
;
4620 then_prob
= REG_BR_PROB_BASE
- else_prob
;
4624 else_prob
= REG_BR_PROB_BASE
/ 2;
4625 then_prob
= REG_BR_PROB_BASE
/ 2;
4628 /* ELSE is predicted or SUCC(ELSE) postdominates THEN. */
4629 if (else_prob
> then_prob
)
4631 else if (else_succ
->dest
->index
< NUM_FIXED_BLOCKS
4632 || dominated_by_p (CDI_POST_DOMINATORS
, then_bb
,
4638 num_possible_if_blocks
++;
4641 "\nIF-CASE-2 found, start %d, else %d\n",
4642 test_bb
->index
, else_bb
->index
);
4644 /* We're speculating from the ELSE path, we want to make sure the cost
4645 of speculation is within reason. */
4646 if (! cheap_bb_rtx_cost_p (else_bb
, else_prob
,
4647 COSTS_N_INSNS (BRANCH_COST (optimize_bb_for_speed_p (else_edge
->src
),
4648 predictable_edge_p (else_edge
)))))
4651 /* Registers set are dead, or are predicable. */
4652 if (! dead_or_predicable (test_bb
, else_bb
, then_bb
, else_succ
, 0))
4655 /* Conversion went ok, including moving the insns and fixing up the
4656 jump. Adjust the CFG to match. */
4658 df_set_bb_dirty (test_bb
);
4659 df_set_bb_dirty (then_bb
);
4660 delete_basic_block (else_bb
);
4663 num_updated_if_blocks
++;
4665 /* ??? We may now fallthru from one of THEN's successors into a join
4666 block. Rerun cleanup_cfg? Examine things manually? Wait? */
4671 /* Used by the code above to perform the actual rtl transformations.
4672 Return TRUE if successful.
4674 TEST_BB is the block containing the conditional branch. MERGE_BB
4675 is the block containing the code to manipulate. DEST_EDGE is an
4676 edge representing a jump to the join block; after the conversion,
4677 TEST_BB should be branching to its destination.
4678 REVERSEP is true if the sense of the branch should be reversed. */
4681 dead_or_predicable (basic_block test_bb
, basic_block merge_bb
,
4682 basic_block other_bb
, edge dest_edge
, int reversep
)
4684 basic_block new_dest
= dest_edge
->dest
;
4685 rtx_insn
*head
, *end
, *jump
;
4686 rtx_insn
*earliest
= NULL
;
4688 bitmap merge_set
= NULL
;
4689 /* Number of pending changes. */
4690 int n_validated_changes
= 0;
4691 rtx new_dest_label
= NULL_RTX
;
4693 jump
= BB_END (test_bb
);
4695 /* Find the extent of the real code in the merge block. */
4696 head
= BB_HEAD (merge_bb
);
4697 end
= BB_END (merge_bb
);
4699 while (DEBUG_INSN_P (end
) && end
!= head
)
4700 end
= PREV_INSN (end
);
4702 /* If merge_bb ends with a tablejump, predicating/moving insn's
4703 into test_bb and then deleting merge_bb will result in the jumptable
4704 that follows merge_bb being removed along with merge_bb and then we
4705 get an unresolved reference to the jumptable. */
4706 if (tablejump_p (end
, NULL
, NULL
))
4710 head
= NEXT_INSN (head
);
4711 while (DEBUG_INSN_P (head
) && head
!= end
)
4712 head
= NEXT_INSN (head
);
4720 head
= NEXT_INSN (head
);
4721 while (DEBUG_INSN_P (head
) && head
!= end
)
4722 head
= NEXT_INSN (head
);
4727 if (!onlyjump_p (end
))
4734 end
= PREV_INSN (end
);
4735 while (DEBUG_INSN_P (end
) && end
!= head
)
4736 end
= PREV_INSN (end
);
4739 /* Don't move frame-related insn across the conditional branch. This
4740 can lead to one of the paths of the branch having wrong unwind info. */
4741 if (epilogue_completed
)
4743 rtx_insn
*insn
= head
;
4746 if (INSN_P (insn
) && RTX_FRAME_RELATED_P (insn
))
4750 insn
= NEXT_INSN (insn
);
4754 /* Disable handling dead code by conditional execution if the machine needs
4755 to do anything funny with the tests, etc. */
4756 #ifndef IFCVT_MODIFY_TESTS
4757 if (targetm
.have_conditional_execution ())
4759 /* In the conditional execution case, we have things easy. We know
4760 the condition is reversible. We don't have to check life info
4761 because we're going to conditionally execute the code anyway.
4762 All that's left is making sure the insns involved can actually
4767 cond
= cond_exec_get_condition (jump
);
4771 rtx note
= find_reg_note (jump
, REG_BR_PROB
, NULL_RTX
);
4772 int prob_val
= (note
? XINT (note
, 0) : -1);
4776 enum rtx_code rev
= reversed_comparison_code (cond
, jump
);
4779 cond
= gen_rtx_fmt_ee (rev
, GET_MODE (cond
), XEXP (cond
, 0),
4782 prob_val
= REG_BR_PROB_BASE
- prob_val
;
4785 if (cond_exec_process_insns (NULL
, head
, end
, cond
, prob_val
, 0)
4786 && verify_changes (0))
4787 n_validated_changes
= num_validated_changes ();
4795 /* If we allocated new pseudos (e.g. in the conditional move
4796 expander called from noce_emit_cmove), we must resize the
4798 if (max_regno
< max_reg_num ())
4799 max_regno
= max_reg_num ();
4801 /* Try the NCE path if the CE path did not result in any changes. */
4802 if (n_validated_changes
== 0)
4809 /* In the non-conditional execution case, we have to verify that there
4810 are no trapping operations, no calls, no references to memory, and
4811 that any registers modified are dead at the branch site. */
4813 if (!any_condjump_p (jump
))
4816 /* Find the extent of the conditional. */
4817 cond
= noce_get_condition (jump
, &earliest
, false);
4821 live
= BITMAP_ALLOC (®_obstack
);
4822 simulate_backwards_to_point (merge_bb
, live
, end
);
4823 success
= can_move_insns_across (head
, end
, earliest
, jump
,
4825 df_get_live_in (other_bb
), NULL
);
4830 /* Collect the set of registers set in MERGE_BB. */
4831 merge_set
= BITMAP_ALLOC (®_obstack
);
4833 FOR_BB_INSNS (merge_bb
, insn
)
4834 if (NONDEBUG_INSN_P (insn
))
4835 df_simulate_find_defs (insn
, merge_set
);
4837 /* If shrink-wrapping, disable this optimization when test_bb is
4838 the first basic block and merge_bb exits. The idea is to not
4839 move code setting up a return register as that may clobber a
4840 register used to pass function parameters, which then must be
4841 saved in caller-saved regs. A caller-saved reg requires the
4842 prologue, killing a shrink-wrap opportunity. */
4843 if ((SHRINK_WRAPPING_ENABLED
&& !epilogue_completed
)
4844 && ENTRY_BLOCK_PTR_FOR_FN (cfun
)->next_bb
== test_bb
4845 && single_succ_p (new_dest
)
4846 && single_succ (new_dest
) == EXIT_BLOCK_PTR_FOR_FN (cfun
)
4847 && bitmap_intersect_p (df_get_live_in (new_dest
), merge_set
))
4852 return_regs
= BITMAP_ALLOC (®_obstack
);
4854 /* Start off with the intersection of regs used to pass
4855 params and regs used to return values. */
4856 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
4857 if (FUNCTION_ARG_REGNO_P (i
)
4858 && targetm
.calls
.function_value_regno_p (i
))
4859 bitmap_set_bit (return_regs
, INCOMING_REGNO (i
));
4861 bitmap_and_into (return_regs
,
4862 df_get_live_out (ENTRY_BLOCK_PTR_FOR_FN (cfun
)));
4863 bitmap_and_into (return_regs
,
4864 df_get_live_in (EXIT_BLOCK_PTR_FOR_FN (cfun
)));
4865 if (!bitmap_empty_p (return_regs
))
4867 FOR_BB_INSNS_REVERSE (new_dest
, insn
)
4868 if (NONDEBUG_INSN_P (insn
))
4872 /* If this insn sets any reg in return_regs, add all
4873 reg uses to the set of regs we're interested in. */
4874 FOR_EACH_INSN_DEF (def
, insn
)
4875 if (bitmap_bit_p (return_regs
, DF_REF_REGNO (def
)))
4877 df_simulate_uses (insn
, return_regs
);
4881 if (bitmap_intersect_p (merge_set
, return_regs
))
4883 BITMAP_FREE (return_regs
);
4884 BITMAP_FREE (merge_set
);
4888 BITMAP_FREE (return_regs
);
4893 /* We don't want to use normal invert_jump or redirect_jump because
4894 we don't want to delete_insn called. Also, we want to do our own
4895 change group management. */
4897 old_dest
= JUMP_LABEL (jump
);
4898 if (other_bb
!= new_dest
)
4900 if (!any_condjump_p (jump
))
4903 if (JUMP_P (BB_END (dest_edge
->src
)))
4904 new_dest_label
= JUMP_LABEL (BB_END (dest_edge
->src
));
4905 else if (new_dest
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
4906 new_dest_label
= ret_rtx
;
4908 new_dest_label
= block_label (new_dest
);
4910 rtx_jump_insn
*jump_insn
= as_a
<rtx_jump_insn
*> (jump
);
4912 ? ! invert_jump_1 (jump_insn
, new_dest_label
)
4913 : ! redirect_jump_1 (jump_insn
, new_dest_label
))
4917 if (verify_changes (n_validated_changes
))
4918 confirm_change_group ();
4922 if (other_bb
!= new_dest
)
4924 redirect_jump_2 (as_a
<rtx_jump_insn
*> (jump
), old_dest
, new_dest_label
,
4927 redirect_edge_succ (BRANCH_EDGE (test_bb
), new_dest
);
4930 std::swap (BRANCH_EDGE (test_bb
)->count
,
4931 FALLTHRU_EDGE (test_bb
)->count
);
4932 std::swap (BRANCH_EDGE (test_bb
)->probability
,
4933 FALLTHRU_EDGE (test_bb
)->probability
);
4934 update_br_prob_note (test_bb
);
4938 /* Move the insns out of MERGE_BB to before the branch. */
4943 if (end
== BB_END (merge_bb
))
4944 BB_END (merge_bb
) = PREV_INSN (head
);
4946 /* PR 21767: when moving insns above a conditional branch, the REG_EQUAL
4947 notes being moved might become invalid. */
4953 if (! INSN_P (insn
))
4955 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
4958 remove_note (insn
, note
);
4959 } while (insn
!= end
&& (insn
= NEXT_INSN (insn
)));
4961 /* PR46315: when moving insns above a conditional branch, the REG_EQUAL
4962 notes referring to the registers being set might become invalid. */
4968 EXECUTE_IF_SET_IN_BITMAP (merge_set
, 0, i
, bi
)
4969 remove_reg_equal_equiv_notes_for_regno (i
);
4971 BITMAP_FREE (merge_set
);
4974 reorder_insns (head
, end
, PREV_INSN (earliest
));
4977 /* Remove the jump and edge if we can. */
4978 if (other_bb
== new_dest
)
4981 remove_edge (BRANCH_EDGE (test_bb
));
4982 /* ??? Can't merge blocks here, as then_bb is still in use.
4983 At minimum, the merge will get done just before bb-reorder. */
4992 BITMAP_FREE (merge_set
);
4997 /* Main entry point for all if-conversion. AFTER_COMBINE is true if
4998 we are after combine pass. */
5001 if_convert (bool after_combine
)
5008 df_live_add_problem ();
5009 df_live_set_all_dirty ();
5012 /* Record whether we are after combine pass. */
5013 ifcvt_after_combine
= after_combine
;
5014 have_cbranchcc4
= (direct_optab_handler (cbranch_optab
, CCmode
)
5015 != CODE_FOR_nothing
);
5016 num_possible_if_blocks
= 0;
5017 num_updated_if_blocks
= 0;
5018 num_true_changes
= 0;
5020 loop_optimizer_init (AVOID_CFG_MODIFICATIONS
);
5021 mark_loop_exit_edges ();
5022 loop_optimizer_finalize ();
5023 free_dominance_info (CDI_DOMINATORS
);
5025 /* Compute postdominators. */
5026 calculate_dominance_info (CDI_POST_DOMINATORS
);
5028 df_set_flags (DF_LR_RUN_DCE
);
5030 /* Go through each of the basic blocks looking for things to convert. If we
5031 have conditional execution, we make multiple passes to allow us to handle
5032 IF-THEN{-ELSE} blocks within other IF-THEN{-ELSE} blocks. */
5037 /* Only need to do dce on the first pass. */
5038 df_clear_flags (DF_LR_RUN_DCE
);
5039 cond_exec_changed_p
= FALSE
;
5042 #ifdef IFCVT_MULTIPLE_DUMPS
5043 if (dump_file
&& pass
> 1)
5044 fprintf (dump_file
, "\n\n========== Pass %d ==========\n", pass
);
5047 FOR_EACH_BB_FN (bb
, cfun
)
5050 while (!df_get_bb_dirty (bb
)
5051 && (new_bb
= find_if_header (bb
, pass
)) != NULL
)
5055 #ifdef IFCVT_MULTIPLE_DUMPS
5056 if (dump_file
&& cond_exec_changed_p
)
5057 print_rtl_with_bb (dump_file
, get_insns (), dump_flags
);
5060 while (cond_exec_changed_p
);
5062 #ifdef IFCVT_MULTIPLE_DUMPS
5064 fprintf (dump_file
, "\n\n========== no more changes\n");
5067 free_dominance_info (CDI_POST_DOMINATORS
);
5072 clear_aux_for_blocks ();
5074 /* If we allocated new pseudos, we must resize the array for sched1. */
5075 if (max_regno
< max_reg_num ())
5076 max_regno
= max_reg_num ();
5078 /* Write the final stats. */
5079 if (dump_file
&& num_possible_if_blocks
> 0)
5082 "\n%d possible IF blocks searched.\n",
5083 num_possible_if_blocks
);
5085 "%d IF blocks converted.\n",
5086 num_updated_if_blocks
);
5088 "%d true changes made.\n\n\n",
5093 df_remove_problem (df_live
);
5095 #ifdef ENABLE_CHECKING
5096 verify_flow_info ();
5100 /* If-conversion and CFG cleanup. */
5102 rest_of_handle_if_conversion (void)
5104 if (flag_if_conversion
)
5108 dump_reg_info (dump_file
);
5109 dump_flow_info (dump_file
, dump_flags
);
5111 cleanup_cfg (CLEANUP_EXPENSIVE
);
5121 const pass_data pass_data_rtl_ifcvt
=
5123 RTL_PASS
, /* type */
5125 OPTGROUP_NONE
, /* optinfo_flags */
5126 TV_IFCVT
, /* tv_id */
5127 0, /* properties_required */
5128 0, /* properties_provided */
5129 0, /* properties_destroyed */
5130 0, /* todo_flags_start */
5131 TODO_df_finish
, /* todo_flags_finish */
5134 class pass_rtl_ifcvt
: public rtl_opt_pass
5137 pass_rtl_ifcvt (gcc::context
*ctxt
)
5138 : rtl_opt_pass (pass_data_rtl_ifcvt
, ctxt
)
5141 /* opt_pass methods: */
5142 virtual bool gate (function
*)
5144 return (optimize
> 0) && dbg_cnt (if_conversion
);
5147 virtual unsigned int execute (function
*)
5149 return rest_of_handle_if_conversion ();
5152 }; // class pass_rtl_ifcvt
5157 make_pass_rtl_ifcvt (gcc::context
*ctxt
)
5159 return new pass_rtl_ifcvt (ctxt
);
5163 /* Rerun if-conversion, as combine may have simplified things enough
5164 to now meet sequence length restrictions. */
5168 const pass_data pass_data_if_after_combine
=
5170 RTL_PASS
, /* type */
5172 OPTGROUP_NONE
, /* optinfo_flags */
5173 TV_IFCVT
, /* tv_id */
5174 0, /* properties_required */
5175 0, /* properties_provided */
5176 0, /* properties_destroyed */
5177 0, /* todo_flags_start */
5178 TODO_df_finish
, /* todo_flags_finish */
5181 class pass_if_after_combine
: public rtl_opt_pass
5184 pass_if_after_combine (gcc::context
*ctxt
)
5185 : rtl_opt_pass (pass_data_if_after_combine
, ctxt
)
5188 /* opt_pass methods: */
5189 virtual bool gate (function
*)
5191 return optimize
> 0 && flag_if_conversion
5192 && dbg_cnt (if_after_combine
);
5195 virtual unsigned int execute (function
*)
5201 }; // class pass_if_after_combine
5206 make_pass_if_after_combine (gcc::context
*ctxt
)
5208 return new pass_if_after_combine (ctxt
);
5214 const pass_data pass_data_if_after_reload
=
5216 RTL_PASS
, /* type */
5218 OPTGROUP_NONE
, /* optinfo_flags */
5219 TV_IFCVT2
, /* tv_id */
5220 0, /* properties_required */
5221 0, /* properties_provided */
5222 0, /* properties_destroyed */
5223 0, /* todo_flags_start */
5224 TODO_df_finish
, /* todo_flags_finish */
5227 class pass_if_after_reload
: public rtl_opt_pass
5230 pass_if_after_reload (gcc::context
*ctxt
)
5231 : rtl_opt_pass (pass_data_if_after_reload
, ctxt
)
5234 /* opt_pass methods: */
5235 virtual bool gate (function
*)
5237 return optimize
> 0 && flag_if_conversion2
5238 && dbg_cnt (if_after_reload
);
5241 virtual unsigned int execute (function
*)
5247 }; // class pass_if_after_reload
5252 make_pass_if_after_reload (gcc::context
*ctxt
)
5254 return new pass_if_after_reload (ctxt
);