1 /* Expand the basic unary and binary arithmetic operations, for GNU compiler.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
25 #include "coretypes.h"
27 #include "diagnostic-core.h"
30 /* Include insn-config.h before expr.h so that HAVE_conditional_move
31 is properly defined. */
32 #include "insn-config.h"
45 #include "basic-block.h"
48 struct target_optabs default_target_optabs
;
49 struct target_libfuncs default_target_libfuncs
;
51 struct target_optabs
*this_target_optabs
= &default_target_optabs
;
52 struct target_libfuncs
*this_target_libfuncs
= &default_target_libfuncs
;
55 #define libfunc_hash \
56 (this_target_libfuncs->x_libfunc_hash)
58 /* Contains the optab used for each rtx code. */
59 optab code_to_optab
[NUM_RTX_CODE
+ 1];
61 static void prepare_float_lib_cmp (rtx
, rtx
, enum rtx_code
, rtx
*,
63 static rtx
expand_unop_direct (enum machine_mode
, optab
, rtx
, rtx
, int);
65 /* Debug facility for use in GDB. */
66 void debug_optab_libfuncs (void);
68 /* Prefixes for the current version of decimal floating point (BID vs. DPD) */
69 #if ENABLE_DECIMAL_BID_FORMAT
70 #define DECIMAL_PREFIX "bid_"
72 #define DECIMAL_PREFIX "dpd_"
75 /* Used for libfunc_hash. */
78 hash_libfunc (const void *p
)
80 const struct libfunc_entry
*const e
= (const struct libfunc_entry
*) p
;
82 return (((int) e
->mode1
+ (int) e
->mode2
* NUM_MACHINE_MODES
)
86 /* Used for libfunc_hash. */
89 eq_libfunc (const void *p
, const void *q
)
91 const struct libfunc_entry
*const e1
= (const struct libfunc_entry
*) p
;
92 const struct libfunc_entry
*const e2
= (const struct libfunc_entry
*) q
;
94 return (e1
->optab
== e2
->optab
95 && e1
->mode1
== e2
->mode1
96 && e1
->mode2
== e2
->mode2
);
99 /* Return libfunc corresponding operation defined by OPTAB converting
100 from MODE2 to MODE1. Trigger lazy initialization if needed, return NULL
101 if no libfunc is available. */
103 convert_optab_libfunc (convert_optab optab
, enum machine_mode mode1
,
104 enum machine_mode mode2
)
106 struct libfunc_entry e
;
107 struct libfunc_entry
**slot
;
109 e
.optab
= (size_t) (optab
- &convert_optab_table
[0]);
112 slot
= (struct libfunc_entry
**) htab_find_slot (libfunc_hash
, &e
, NO_INSERT
);
115 if (optab
->libcall_gen
)
117 optab
->libcall_gen (optab
, optab
->libcall_basename
, mode1
, mode2
);
118 slot
= (struct libfunc_entry
**) htab_find_slot (libfunc_hash
, &e
, NO_INSERT
);
120 return (*slot
)->libfunc
;
126 return (*slot
)->libfunc
;
129 /* Return libfunc corresponding operation defined by OPTAB in MODE.
130 Trigger lazy initialization if needed, return NULL if no libfunc is
133 optab_libfunc (optab optab
, enum machine_mode mode
)
135 struct libfunc_entry e
;
136 struct libfunc_entry
**slot
;
138 e
.optab
= (size_t) (optab
- &optab_table
[0]);
141 slot
= (struct libfunc_entry
**) htab_find_slot (libfunc_hash
, &e
, NO_INSERT
);
144 if (optab
->libcall_gen
)
146 optab
->libcall_gen (optab
, optab
->libcall_basename
,
147 optab
->libcall_suffix
, mode
);
148 slot
= (struct libfunc_entry
**) htab_find_slot (libfunc_hash
,
151 return (*slot
)->libfunc
;
157 return (*slot
)->libfunc
;
161 /* Add a REG_EQUAL note to the last insn in INSNS. TARGET is being set to
162 the result of operation CODE applied to OP0 (and OP1 if it is a binary
165 If the last insn does not set TARGET, don't do anything, but return 1.
167 If a previous insn sets TARGET and TARGET is one of OP0 or OP1,
168 don't add the REG_EQUAL note but return 0. Our caller can then try
169 again, ensuring that TARGET is not one of the operands. */
172 add_equal_note (rtx insns
, rtx target
, enum rtx_code code
, rtx op0
, rtx op1
)
174 rtx last_insn
, insn
, set
;
177 gcc_assert (insns
&& INSN_P (insns
) && NEXT_INSN (insns
));
179 if (GET_RTX_CLASS (code
) != RTX_COMM_ARITH
180 && GET_RTX_CLASS (code
) != RTX_BIN_ARITH
181 && GET_RTX_CLASS (code
) != RTX_COMM_COMPARE
182 && GET_RTX_CLASS (code
) != RTX_COMPARE
183 && GET_RTX_CLASS (code
) != RTX_UNARY
)
186 if (GET_CODE (target
) == ZERO_EXTRACT
)
189 for (last_insn
= insns
;
190 NEXT_INSN (last_insn
) != NULL_RTX
;
191 last_insn
= NEXT_INSN (last_insn
))
194 set
= single_set (last_insn
);
198 if (! rtx_equal_p (SET_DEST (set
), target
)
199 /* For a STRICT_LOW_PART, the REG_NOTE applies to what is inside it. */
200 && (GET_CODE (SET_DEST (set
)) != STRICT_LOW_PART
201 || ! rtx_equal_p (XEXP (SET_DEST (set
), 0), target
)))
204 /* If TARGET is in OP0 or OP1, check if anything in SEQ sets TARGET
205 besides the last insn. */
206 if (reg_overlap_mentioned_p (target
, op0
)
207 || (op1
&& reg_overlap_mentioned_p (target
, op1
)))
209 insn
= PREV_INSN (last_insn
);
210 while (insn
!= NULL_RTX
)
212 if (reg_set_p (target
, insn
))
215 insn
= PREV_INSN (insn
);
219 if (GET_RTX_CLASS (code
) == RTX_UNARY
)
220 note
= gen_rtx_fmt_e (code
, GET_MODE (target
), copy_rtx (op0
));
222 note
= gen_rtx_fmt_ee (code
, GET_MODE (target
), copy_rtx (op0
), copy_rtx (op1
));
224 set_unique_reg_note (last_insn
, REG_EQUAL
, note
);
229 /* Widen OP to MODE and return the rtx for the widened operand. UNSIGNEDP
230 says whether OP is signed or unsigned. NO_EXTEND is nonzero if we need
231 not actually do a sign-extend or zero-extend, but can leave the
232 higher-order bits of the result rtx undefined, for example, in the case
233 of logical operations, but not right shifts. */
236 widen_operand (rtx op
, enum machine_mode mode
, enum machine_mode oldmode
,
237 int unsignedp
, int no_extend
)
241 /* If we don't have to extend and this is a constant, return it. */
242 if (no_extend
&& GET_MODE (op
) == VOIDmode
)
245 /* If we must extend do so. If OP is a SUBREG for a promoted object, also
246 extend since it will be more efficient to do so unless the signedness of
247 a promoted object differs from our extension. */
249 || (GET_CODE (op
) == SUBREG
&& SUBREG_PROMOTED_VAR_P (op
)
250 && SUBREG_PROMOTED_UNSIGNED_P (op
) == unsignedp
))
251 return convert_modes (mode
, oldmode
, op
, unsignedp
);
253 /* If MODE is no wider than a single word, we return a paradoxical
255 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
256 return gen_rtx_SUBREG (mode
, force_reg (GET_MODE (op
), op
), 0);
258 /* Otherwise, get an object of MODE, clobber it, and set the low-order
261 result
= gen_reg_rtx (mode
);
262 emit_clobber (result
);
263 emit_move_insn (gen_lowpart (GET_MODE (op
), result
), op
);
267 /* Return the optab used for computing the operation given by the tree code,
268 CODE and the tree EXP. This function is not always usable (for example, it
269 cannot give complete results for multiplication or division) but probably
270 ought to be relied on more widely throughout the expander. */
272 optab_for_tree_code (enum tree_code code
, const_tree type
,
273 enum optab_subtype subtype
)
285 return one_cmpl_optab
;
294 return TYPE_UNSIGNED (type
) ? umod_optab
: smod_optab
;
302 if (TYPE_SATURATING(type
))
303 return TYPE_UNSIGNED(type
) ? usdiv_optab
: ssdiv_optab
;
304 return TYPE_UNSIGNED (type
) ? udiv_optab
: sdiv_optab
;
307 if (VECTOR_MODE_P (TYPE_MODE (type
)))
309 if (subtype
== optab_vector
)
310 return TYPE_SATURATING (type
) ? NULL
: vashl_optab
;
312 gcc_assert (subtype
== optab_scalar
);
314 if (TYPE_SATURATING(type
))
315 return TYPE_UNSIGNED(type
) ? usashl_optab
: ssashl_optab
;
319 if (VECTOR_MODE_P (TYPE_MODE (type
)))
321 if (subtype
== optab_vector
)
322 return TYPE_UNSIGNED (type
) ? vlshr_optab
: vashr_optab
;
324 gcc_assert (subtype
== optab_scalar
);
326 return TYPE_UNSIGNED (type
) ? lshr_optab
: ashr_optab
;
329 if (VECTOR_MODE_P (TYPE_MODE (type
)))
331 if (subtype
== optab_vector
)
334 gcc_assert (subtype
== optab_scalar
);
339 if (VECTOR_MODE_P (TYPE_MODE (type
)))
341 if (subtype
== optab_vector
)
344 gcc_assert (subtype
== optab_scalar
);
349 return TYPE_UNSIGNED (type
) ? umax_optab
: smax_optab
;
352 return TYPE_UNSIGNED (type
) ? umin_optab
: smin_optab
;
354 case REALIGN_LOAD_EXPR
:
355 return vec_realign_load_optab
;
358 return TYPE_UNSIGNED (type
) ? usum_widen_optab
: ssum_widen_optab
;
361 return TYPE_UNSIGNED (type
) ? udot_prod_optab
: sdot_prod_optab
;
363 case WIDEN_MULT_PLUS_EXPR
:
364 return (TYPE_UNSIGNED (type
)
365 ? (TYPE_SATURATING (type
)
366 ? usmadd_widen_optab
: umadd_widen_optab
)
367 : (TYPE_SATURATING (type
)
368 ? ssmadd_widen_optab
: smadd_widen_optab
));
370 case WIDEN_MULT_MINUS_EXPR
:
371 return (TYPE_UNSIGNED (type
)
372 ? (TYPE_SATURATING (type
)
373 ? usmsub_widen_optab
: umsub_widen_optab
)
374 : (TYPE_SATURATING (type
)
375 ? ssmsub_widen_optab
: smsub_widen_optab
));
381 return TYPE_UNSIGNED (type
) ? reduc_umax_optab
: reduc_smax_optab
;
384 return TYPE_UNSIGNED (type
) ? reduc_umin_optab
: reduc_smin_optab
;
386 case REDUC_PLUS_EXPR
:
387 return TYPE_UNSIGNED (type
) ? reduc_uplus_optab
: reduc_splus_optab
;
389 case VEC_LSHIFT_EXPR
:
390 return vec_shl_optab
;
392 case VEC_RSHIFT_EXPR
:
393 return vec_shr_optab
;
395 case VEC_WIDEN_MULT_HI_EXPR
:
396 return TYPE_UNSIGNED (type
) ?
397 vec_widen_umult_hi_optab
: vec_widen_smult_hi_optab
;
399 case VEC_WIDEN_MULT_LO_EXPR
:
400 return TYPE_UNSIGNED (type
) ?
401 vec_widen_umult_lo_optab
: vec_widen_smult_lo_optab
;
403 case VEC_UNPACK_HI_EXPR
:
404 return TYPE_UNSIGNED (type
) ?
405 vec_unpacku_hi_optab
: vec_unpacks_hi_optab
;
407 case VEC_UNPACK_LO_EXPR
:
408 return TYPE_UNSIGNED (type
) ?
409 vec_unpacku_lo_optab
: vec_unpacks_lo_optab
;
411 case VEC_UNPACK_FLOAT_HI_EXPR
:
412 /* The signedness is determined from input operand. */
413 return TYPE_UNSIGNED (type
) ?
414 vec_unpacku_float_hi_optab
: vec_unpacks_float_hi_optab
;
416 case VEC_UNPACK_FLOAT_LO_EXPR
:
417 /* The signedness is determined from input operand. */
418 return TYPE_UNSIGNED (type
) ?
419 vec_unpacku_float_lo_optab
: vec_unpacks_float_lo_optab
;
421 case VEC_PACK_TRUNC_EXPR
:
422 return vec_pack_trunc_optab
;
424 case VEC_PACK_SAT_EXPR
:
425 return TYPE_UNSIGNED (type
) ? vec_pack_usat_optab
: vec_pack_ssat_optab
;
427 case VEC_PACK_FIX_TRUNC_EXPR
:
428 /* The signedness is determined from output operand. */
429 return TYPE_UNSIGNED (type
) ?
430 vec_pack_ufix_trunc_optab
: vec_pack_sfix_trunc_optab
;
436 trapv
= INTEGRAL_TYPE_P (type
) && TYPE_OVERFLOW_TRAPS (type
);
439 case POINTER_PLUS_EXPR
:
441 if (TYPE_SATURATING(type
))
442 return TYPE_UNSIGNED(type
) ? usadd_optab
: ssadd_optab
;
443 return trapv
? addv_optab
: add_optab
;
446 if (TYPE_SATURATING(type
))
447 return TYPE_UNSIGNED(type
) ? ussub_optab
: sssub_optab
;
448 return trapv
? subv_optab
: sub_optab
;
451 if (TYPE_SATURATING(type
))
452 return TYPE_UNSIGNED(type
) ? usmul_optab
: ssmul_optab
;
453 return trapv
? smulv_optab
: smul_optab
;
456 if (TYPE_SATURATING(type
))
457 return TYPE_UNSIGNED(type
) ? usneg_optab
: ssneg_optab
;
458 return trapv
? negv_optab
: neg_optab
;
461 return trapv
? absv_optab
: abs_optab
;
463 case VEC_EXTRACT_EVEN_EXPR
:
464 return vec_extract_even_optab
;
466 case VEC_EXTRACT_ODD_EXPR
:
467 return vec_extract_odd_optab
;
469 case VEC_INTERLEAVE_HIGH_EXPR
:
470 return vec_interleave_high_optab
;
472 case VEC_INTERLEAVE_LOW_EXPR
:
473 return vec_interleave_low_optab
;
481 /* Expand vector widening operations.
483 There are two different classes of operations handled here:
484 1) Operations whose result is wider than all the arguments to the operation.
485 Examples: VEC_UNPACK_HI/LO_EXPR, VEC_WIDEN_MULT_HI/LO_EXPR
486 In this case OP0 and optionally OP1 would be initialized,
487 but WIDE_OP wouldn't (not relevant for this case).
488 2) Operations whose result is of the same size as the last argument to the
489 operation, but wider than all the other arguments to the operation.
490 Examples: WIDEN_SUM_EXPR, VEC_DOT_PROD_EXPR.
491 In the case WIDE_OP, OP0 and optionally OP1 would be initialized.
493 E.g, when called to expand the following operations, this is how
494 the arguments will be initialized:
496 widening-sum 2 oprnd0 - oprnd1
497 widening-dot-product 3 oprnd0 oprnd1 oprnd2
498 widening-mult 2 oprnd0 oprnd1 -
499 type-promotion (vec-unpack) 1 oprnd0 - - */
502 expand_widen_pattern_expr (sepops ops
, rtx op0
, rtx op1
, rtx wide_op
,
503 rtx target
, int unsignedp
)
505 tree oprnd0
, oprnd1
, oprnd2
;
506 enum machine_mode wmode
= VOIDmode
, tmode0
, tmode1
= VOIDmode
;
507 optab widen_pattern_optab
;
509 enum machine_mode xmode0
, xmode1
= VOIDmode
, wxmode
= VOIDmode
;
512 rtx xop0
, xop1
, wxop
;
513 int nops
= TREE_CODE_LENGTH (ops
->code
);
516 tmode0
= TYPE_MODE (TREE_TYPE (oprnd0
));
517 widen_pattern_optab
=
518 optab_for_tree_code (ops
->code
, TREE_TYPE (oprnd0
), optab_default
);
519 if (ops
->code
== WIDEN_MULT_PLUS_EXPR
520 || ops
->code
== WIDEN_MULT_MINUS_EXPR
)
521 icode
= (int) optab_handler (widen_pattern_optab
,
522 TYPE_MODE (TREE_TYPE (ops
->op2
)));
524 icode
= (int) optab_handler (widen_pattern_optab
, tmode0
);
525 gcc_assert (icode
!= CODE_FOR_nothing
);
526 xmode0
= insn_data
[icode
].operand
[1].mode
;
531 tmode1
= TYPE_MODE (TREE_TYPE (oprnd1
));
532 xmode1
= insn_data
[icode
].operand
[2].mode
;
535 /* The last operand is of a wider mode than the rest of the operands. */
543 gcc_assert (tmode1
== tmode0
);
546 wmode
= TYPE_MODE (TREE_TYPE (oprnd2
));
547 wxmode
= insn_data
[icode
].operand
[3].mode
;
551 wmode
= wxmode
= insn_data
[icode
].operand
[0].mode
;
554 || ! (*insn_data
[icode
].operand
[0].predicate
) (target
, wmode
))
555 temp
= gen_reg_rtx (wmode
);
563 /* In case the insn wants input operands in modes different from
564 those of the actual operands, convert the operands. It would
565 seem that we don't need to convert CONST_INTs, but we do, so
566 that they're properly zero-extended, sign-extended or truncated
569 if (GET_MODE (op0
) != xmode0
&& xmode0
!= VOIDmode
)
570 xop0
= convert_modes (xmode0
,
571 GET_MODE (op0
) != VOIDmode
577 if (GET_MODE (op1
) != xmode1
&& xmode1
!= VOIDmode
)
578 xop1
= convert_modes (xmode1
,
579 GET_MODE (op1
) != VOIDmode
585 if (GET_MODE (wide_op
) != wxmode
&& wxmode
!= VOIDmode
)
586 wxop
= convert_modes (wxmode
,
587 GET_MODE (wide_op
) != VOIDmode
592 /* Now, if insn's predicates don't allow our operands, put them into
595 if (! (*insn_data
[icode
].operand
[1].predicate
) (xop0
, xmode0
)
596 && xmode0
!= VOIDmode
)
597 xop0
= copy_to_mode_reg (xmode0
, xop0
);
601 if (! (*insn_data
[icode
].operand
[2].predicate
) (xop1
, xmode1
)
602 && xmode1
!= VOIDmode
)
603 xop1
= copy_to_mode_reg (xmode1
, xop1
);
607 if (! (*insn_data
[icode
].operand
[3].predicate
) (wxop
, wxmode
)
608 && wxmode
!= VOIDmode
)
609 wxop
= copy_to_mode_reg (wxmode
, wxop
);
611 pat
= GEN_FCN (icode
) (temp
, xop0
, xop1
, wxop
);
614 pat
= GEN_FCN (icode
) (temp
, xop0
, xop1
);
620 if (! (*insn_data
[icode
].operand
[2].predicate
) (wxop
, wxmode
)
621 && wxmode
!= VOIDmode
)
622 wxop
= copy_to_mode_reg (wxmode
, wxop
);
624 pat
= GEN_FCN (icode
) (temp
, xop0
, wxop
);
627 pat
= GEN_FCN (icode
) (temp
, xop0
);
634 /* Generate code to perform an operation specified by TERNARY_OPTAB
635 on operands OP0, OP1 and OP2, with result having machine-mode MODE.
637 UNSIGNEDP is for the case where we have to widen the operands
638 to perform the operation. It says to use zero-extension.
640 If TARGET is nonzero, the value
641 is generated there, if it is convenient to do so.
642 In all cases an rtx is returned for the locus of the value;
643 this may or may not be TARGET. */
646 expand_ternary_op (enum machine_mode mode
, optab ternary_optab
, rtx op0
,
647 rtx op1
, rtx op2
, rtx target
, int unsignedp
)
649 int icode
= (int) optab_handler (ternary_optab
, mode
);
650 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
651 enum machine_mode mode1
= insn_data
[icode
].operand
[2].mode
;
652 enum machine_mode mode2
= insn_data
[icode
].operand
[3].mode
;
655 rtx xop0
= op0
, xop1
= op1
, xop2
= op2
;
657 gcc_assert (optab_handler (ternary_optab
, mode
) != CODE_FOR_nothing
);
659 if (!target
|| !insn_data
[icode
].operand
[0].predicate (target
, mode
))
660 temp
= gen_reg_rtx (mode
);
664 /* In case the insn wants input operands in modes different from
665 those of the actual operands, convert the operands. It would
666 seem that we don't need to convert CONST_INTs, but we do, so
667 that they're properly zero-extended, sign-extended or truncated
670 if (GET_MODE (op0
) != mode0
&& mode0
!= VOIDmode
)
671 xop0
= convert_modes (mode0
,
672 GET_MODE (op0
) != VOIDmode
677 if (GET_MODE (op1
) != mode1
&& mode1
!= VOIDmode
)
678 xop1
= convert_modes (mode1
,
679 GET_MODE (op1
) != VOIDmode
684 if (GET_MODE (op2
) != mode2
&& mode2
!= VOIDmode
)
685 xop2
= convert_modes (mode2
,
686 GET_MODE (op2
) != VOIDmode
691 /* Now, if insn's predicates don't allow our operands, put them into
694 if (!insn_data
[icode
].operand
[1].predicate (xop0
, mode0
)
695 && mode0
!= VOIDmode
)
696 xop0
= copy_to_mode_reg (mode0
, xop0
);
698 if (!insn_data
[icode
].operand
[2].predicate (xop1
, mode1
)
699 && mode1
!= VOIDmode
)
700 xop1
= copy_to_mode_reg (mode1
, xop1
);
702 if (!insn_data
[icode
].operand
[3].predicate (xop2
, mode2
)
703 && mode2
!= VOIDmode
)
704 xop2
= copy_to_mode_reg (mode2
, xop2
);
706 pat
= GEN_FCN (icode
) (temp
, xop0
, xop1
, xop2
);
713 /* Like expand_binop, but return a constant rtx if the result can be
714 calculated at compile time. The arguments and return value are
715 otherwise the same as for expand_binop. */
718 simplify_expand_binop (enum machine_mode mode
, optab binoptab
,
719 rtx op0
, rtx op1
, rtx target
, int unsignedp
,
720 enum optab_methods methods
)
722 if (CONSTANT_P (op0
) && CONSTANT_P (op1
))
724 rtx x
= simplify_binary_operation (binoptab
->code
, mode
, op0
, op1
);
730 return expand_binop (mode
, binoptab
, op0
, op1
, target
, unsignedp
, methods
);
733 /* Like simplify_expand_binop, but always put the result in TARGET.
734 Return true if the expansion succeeded. */
737 force_expand_binop (enum machine_mode mode
, optab binoptab
,
738 rtx op0
, rtx op1
, rtx target
, int unsignedp
,
739 enum optab_methods methods
)
741 rtx x
= simplify_expand_binop (mode
, binoptab
, op0
, op1
,
742 target
, unsignedp
, methods
);
746 emit_move_insn (target
, x
);
750 /* Generate insns for VEC_LSHIFT_EXPR, VEC_RSHIFT_EXPR. */
753 expand_vec_shift_expr (sepops ops
, rtx target
)
755 enum insn_code icode
;
756 rtx rtx_op1
, rtx_op2
;
757 enum machine_mode mode1
;
758 enum machine_mode mode2
;
759 enum machine_mode mode
= TYPE_MODE (ops
->type
);
760 tree vec_oprnd
= ops
->op0
;
761 tree shift_oprnd
= ops
->op1
;
767 case VEC_RSHIFT_EXPR
:
768 shift_optab
= vec_shr_optab
;
770 case VEC_LSHIFT_EXPR
:
771 shift_optab
= vec_shl_optab
;
777 icode
= optab_handler (shift_optab
, mode
);
778 gcc_assert (icode
!= CODE_FOR_nothing
);
780 mode1
= insn_data
[icode
].operand
[1].mode
;
781 mode2
= insn_data
[icode
].operand
[2].mode
;
783 rtx_op1
= expand_normal (vec_oprnd
);
784 if (!(*insn_data
[icode
].operand
[1].predicate
) (rtx_op1
, mode1
)
785 && mode1
!= VOIDmode
)
786 rtx_op1
= force_reg (mode1
, rtx_op1
);
788 rtx_op2
= expand_normal (shift_oprnd
);
789 if (!(*insn_data
[icode
].operand
[2].predicate
) (rtx_op2
, mode2
)
790 && mode2
!= VOIDmode
)
791 rtx_op2
= force_reg (mode2
, rtx_op2
);
794 || ! (*insn_data
[icode
].operand
[0].predicate
) (target
, mode
))
795 target
= gen_reg_rtx (mode
);
797 /* Emit instruction */
798 pat
= GEN_FCN (icode
) (target
, rtx_op1
, rtx_op2
);
805 /* This subroutine of expand_doubleword_shift handles the cases in which
806 the effective shift value is >= BITS_PER_WORD. The arguments and return
807 value are the same as for the parent routine, except that SUPERWORD_OP1
808 is the shift count to use when shifting OUTOF_INPUT into INTO_TARGET.
809 INTO_TARGET may be null if the caller has decided to calculate it. */
812 expand_superword_shift (optab binoptab
, rtx outof_input
, rtx superword_op1
,
813 rtx outof_target
, rtx into_target
,
814 int unsignedp
, enum optab_methods methods
)
816 if (into_target
!= 0)
817 if (!force_expand_binop (word_mode
, binoptab
, outof_input
, superword_op1
,
818 into_target
, unsignedp
, methods
))
821 if (outof_target
!= 0)
823 /* For a signed right shift, we must fill OUTOF_TARGET with copies
824 of the sign bit, otherwise we must fill it with zeros. */
825 if (binoptab
!= ashr_optab
)
826 emit_move_insn (outof_target
, CONST0_RTX (word_mode
));
828 if (!force_expand_binop (word_mode
, binoptab
,
829 outof_input
, GEN_INT (BITS_PER_WORD
- 1),
830 outof_target
, unsignedp
, methods
))
836 /* This subroutine of expand_doubleword_shift handles the cases in which
837 the effective shift value is < BITS_PER_WORD. The arguments and return
838 value are the same as for the parent routine. */
841 expand_subword_shift (enum machine_mode op1_mode
, optab binoptab
,
842 rtx outof_input
, rtx into_input
, rtx op1
,
843 rtx outof_target
, rtx into_target
,
844 int unsignedp
, enum optab_methods methods
,
845 unsigned HOST_WIDE_INT shift_mask
)
847 optab reverse_unsigned_shift
, unsigned_shift
;
850 reverse_unsigned_shift
= (binoptab
== ashl_optab
? lshr_optab
: ashl_optab
);
851 unsigned_shift
= (binoptab
== ashl_optab
? ashl_optab
: lshr_optab
);
853 /* The low OP1 bits of INTO_TARGET come from the high bits of OUTOF_INPUT.
854 We therefore need to shift OUTOF_INPUT by (BITS_PER_WORD - OP1) bits in
855 the opposite direction to BINOPTAB. */
856 if (CONSTANT_P (op1
) || shift_mask
>= BITS_PER_WORD
)
858 carries
= outof_input
;
859 tmp
= immed_double_const (BITS_PER_WORD
, 0, op1_mode
);
860 tmp
= simplify_expand_binop (op1_mode
, sub_optab
, tmp
, op1
,
865 /* We must avoid shifting by BITS_PER_WORD bits since that is either
866 the same as a zero shift (if shift_mask == BITS_PER_WORD - 1) or
867 has unknown behavior. Do a single shift first, then shift by the
868 remainder. It's OK to use ~OP1 as the remainder if shift counts
869 are truncated to the mode size. */
870 carries
= expand_binop (word_mode
, reverse_unsigned_shift
,
871 outof_input
, const1_rtx
, 0, unsignedp
, methods
);
872 if (shift_mask
== BITS_PER_WORD
- 1)
874 tmp
= immed_double_const (-1, -1, op1_mode
);
875 tmp
= simplify_expand_binop (op1_mode
, xor_optab
, op1
, tmp
,
880 tmp
= immed_double_const (BITS_PER_WORD
- 1, 0, op1_mode
);
881 tmp
= simplify_expand_binop (op1_mode
, sub_optab
, tmp
, op1
,
885 if (tmp
== 0 || carries
== 0)
887 carries
= expand_binop (word_mode
, reverse_unsigned_shift
,
888 carries
, tmp
, 0, unsignedp
, methods
);
892 /* Shift INTO_INPUT logically by OP1. This is the last use of INTO_INPUT
893 so the result can go directly into INTO_TARGET if convenient. */
894 tmp
= expand_binop (word_mode
, unsigned_shift
, into_input
, op1
,
895 into_target
, unsignedp
, methods
);
899 /* Now OR in the bits carried over from OUTOF_INPUT. */
900 if (!force_expand_binop (word_mode
, ior_optab
, tmp
, carries
,
901 into_target
, unsignedp
, methods
))
904 /* Use a standard word_mode shift for the out-of half. */
905 if (outof_target
!= 0)
906 if (!force_expand_binop (word_mode
, binoptab
, outof_input
, op1
,
907 outof_target
, unsignedp
, methods
))
914 #ifdef HAVE_conditional_move
915 /* Try implementing expand_doubleword_shift using conditional moves.
916 The shift is by < BITS_PER_WORD if (CMP_CODE CMP1 CMP2) is true,
917 otherwise it is by >= BITS_PER_WORD. SUBWORD_OP1 and SUPERWORD_OP1
918 are the shift counts to use in the former and latter case. All other
919 arguments are the same as the parent routine. */
922 expand_doubleword_shift_condmove (enum machine_mode op1_mode
, optab binoptab
,
923 enum rtx_code cmp_code
, rtx cmp1
, rtx cmp2
,
924 rtx outof_input
, rtx into_input
,
925 rtx subword_op1
, rtx superword_op1
,
926 rtx outof_target
, rtx into_target
,
927 int unsignedp
, enum optab_methods methods
,
928 unsigned HOST_WIDE_INT shift_mask
)
930 rtx outof_superword
, into_superword
;
932 /* Put the superword version of the output into OUTOF_SUPERWORD and
934 outof_superword
= outof_target
!= 0 ? gen_reg_rtx (word_mode
) : 0;
935 if (outof_target
!= 0 && subword_op1
== superword_op1
)
937 /* The value INTO_TARGET >> SUBWORD_OP1, which we later store in
938 OUTOF_TARGET, is the same as the value of INTO_SUPERWORD. */
939 into_superword
= outof_target
;
940 if (!expand_superword_shift (binoptab
, outof_input
, superword_op1
,
941 outof_superword
, 0, unsignedp
, methods
))
946 into_superword
= gen_reg_rtx (word_mode
);
947 if (!expand_superword_shift (binoptab
, outof_input
, superword_op1
,
948 outof_superword
, into_superword
,
953 /* Put the subword version directly in OUTOF_TARGET and INTO_TARGET. */
954 if (!expand_subword_shift (op1_mode
, binoptab
,
955 outof_input
, into_input
, subword_op1
,
956 outof_target
, into_target
,
957 unsignedp
, methods
, shift_mask
))
960 /* Select between them. Do the INTO half first because INTO_SUPERWORD
961 might be the current value of OUTOF_TARGET. */
962 if (!emit_conditional_move (into_target
, cmp_code
, cmp1
, cmp2
, op1_mode
,
963 into_target
, into_superword
, word_mode
, false))
966 if (outof_target
!= 0)
967 if (!emit_conditional_move (outof_target
, cmp_code
, cmp1
, cmp2
, op1_mode
,
968 outof_target
, outof_superword
,
976 /* Expand a doubleword shift (ashl, ashr or lshr) using word-mode shifts.
977 OUTOF_INPUT and INTO_INPUT are the two word-sized halves of the first
978 input operand; the shift moves bits in the direction OUTOF_INPUT->
979 INTO_TARGET. OUTOF_TARGET and INTO_TARGET are the equivalent words
980 of the target. OP1 is the shift count and OP1_MODE is its mode.
981 If OP1 is constant, it will have been truncated as appropriate
982 and is known to be nonzero.
984 If SHIFT_MASK is zero, the result of word shifts is undefined when the
985 shift count is outside the range [0, BITS_PER_WORD). This routine must
986 avoid generating such shifts for OP1s in the range [0, BITS_PER_WORD * 2).
988 If SHIFT_MASK is nonzero, all word-mode shift counts are effectively
989 masked by it and shifts in the range [BITS_PER_WORD, SHIFT_MASK) will
990 fill with zeros or sign bits as appropriate.
992 If SHIFT_MASK is BITS_PER_WORD - 1, this routine will synthesize
993 a doubleword shift whose equivalent mask is BITS_PER_WORD * 2 - 1.
994 Doing this preserves semantics required by SHIFT_COUNT_TRUNCATED.
995 In all other cases, shifts by values outside [0, BITS_PER_UNIT * 2)
998 BINOPTAB, UNSIGNEDP and METHODS are as for expand_binop. This function
999 may not use INTO_INPUT after modifying INTO_TARGET, and similarly for
1000 OUTOF_INPUT and OUTOF_TARGET. OUTOF_TARGET can be null if the parent
1001 function wants to calculate it itself.
1003 Return true if the shift could be successfully synthesized. */
1006 expand_doubleword_shift (enum machine_mode op1_mode
, optab binoptab
,
1007 rtx outof_input
, rtx into_input
, rtx op1
,
1008 rtx outof_target
, rtx into_target
,
1009 int unsignedp
, enum optab_methods methods
,
1010 unsigned HOST_WIDE_INT shift_mask
)
1012 rtx superword_op1
, tmp
, cmp1
, cmp2
;
1013 rtx subword_label
, done_label
;
1014 enum rtx_code cmp_code
;
1016 /* See if word-mode shifts by BITS_PER_WORD...BITS_PER_WORD * 2 - 1 will
1017 fill the result with sign or zero bits as appropriate. If so, the value
1018 of OUTOF_TARGET will always be (SHIFT OUTOF_INPUT OP1). Recursively call
1019 this routine to calculate INTO_TARGET (which depends on both OUTOF_INPUT
1020 and INTO_INPUT), then emit code to set up OUTOF_TARGET.
1022 This isn't worthwhile for constant shifts since the optimizers will
1023 cope better with in-range shift counts. */
1024 if (shift_mask
>= BITS_PER_WORD
1025 && outof_target
!= 0
1026 && !CONSTANT_P (op1
))
1028 if (!expand_doubleword_shift (op1_mode
, binoptab
,
1029 outof_input
, into_input
, op1
,
1031 unsignedp
, methods
, shift_mask
))
1033 if (!force_expand_binop (word_mode
, binoptab
, outof_input
, op1
,
1034 outof_target
, unsignedp
, methods
))
1039 /* Set CMP_CODE, CMP1 and CMP2 so that the rtx (CMP_CODE CMP1 CMP2)
1040 is true when the effective shift value is less than BITS_PER_WORD.
1041 Set SUPERWORD_OP1 to the shift count that should be used to shift
1042 OUTOF_INPUT into INTO_TARGET when the condition is false. */
1043 tmp
= immed_double_const (BITS_PER_WORD
, 0, op1_mode
);
1044 if (!CONSTANT_P (op1
) && shift_mask
== BITS_PER_WORD
- 1)
1046 /* Set CMP1 to OP1 & BITS_PER_WORD. The result is zero iff OP1
1047 is a subword shift count. */
1048 cmp1
= simplify_expand_binop (op1_mode
, and_optab
, op1
, tmp
,
1050 cmp2
= CONST0_RTX (op1_mode
);
1052 superword_op1
= op1
;
1056 /* Set CMP1 to OP1 - BITS_PER_WORD. */
1057 cmp1
= simplify_expand_binop (op1_mode
, sub_optab
, op1
, tmp
,
1059 cmp2
= CONST0_RTX (op1_mode
);
1061 superword_op1
= cmp1
;
1066 /* If we can compute the condition at compile time, pick the
1067 appropriate subroutine. */
1068 tmp
= simplify_relational_operation (cmp_code
, SImode
, op1_mode
, cmp1
, cmp2
);
1069 if (tmp
!= 0 && CONST_INT_P (tmp
))
1071 if (tmp
== const0_rtx
)
1072 return expand_superword_shift (binoptab
, outof_input
, superword_op1
,
1073 outof_target
, into_target
,
1074 unsignedp
, methods
);
1076 return expand_subword_shift (op1_mode
, binoptab
,
1077 outof_input
, into_input
, op1
,
1078 outof_target
, into_target
,
1079 unsignedp
, methods
, shift_mask
);
1082 #ifdef HAVE_conditional_move
1083 /* Try using conditional moves to generate straight-line code. */
1085 rtx start
= get_last_insn ();
1086 if (expand_doubleword_shift_condmove (op1_mode
, binoptab
,
1087 cmp_code
, cmp1
, cmp2
,
1088 outof_input
, into_input
,
1090 outof_target
, into_target
,
1091 unsignedp
, methods
, shift_mask
))
1093 delete_insns_since (start
);
1097 /* As a last resort, use branches to select the correct alternative. */
1098 subword_label
= gen_label_rtx ();
1099 done_label
= gen_label_rtx ();
1102 do_compare_rtx_and_jump (cmp1
, cmp2
, cmp_code
, false, op1_mode
,
1103 0, 0, subword_label
, -1);
1106 if (!expand_superword_shift (binoptab
, outof_input
, superword_op1
,
1107 outof_target
, into_target
,
1108 unsignedp
, methods
))
1111 emit_jump_insn (gen_jump (done_label
));
1113 emit_label (subword_label
);
1115 if (!expand_subword_shift (op1_mode
, binoptab
,
1116 outof_input
, into_input
, op1
,
1117 outof_target
, into_target
,
1118 unsignedp
, methods
, shift_mask
))
1121 emit_label (done_label
);
1125 /* Subroutine of expand_binop. Perform a double word multiplication of
1126 operands OP0 and OP1 both of mode MODE, which is exactly twice as wide
1127 as the target's word_mode. This function return NULL_RTX if anything
1128 goes wrong, in which case it may have already emitted instructions
1129 which need to be deleted.
1131 If we want to multiply two two-word values and have normal and widening
1132 multiplies of single-word values, we can do this with three smaller
1135 The multiplication proceeds as follows:
1136 _______________________
1137 [__op0_high_|__op0_low__]
1138 _______________________
1139 * [__op1_high_|__op1_low__]
1140 _______________________________________________
1141 _______________________
1142 (1) [__op0_low__*__op1_low__]
1143 _______________________
1144 (2a) [__op0_low__*__op1_high_]
1145 _______________________
1146 (2b) [__op0_high_*__op1_low__]
1147 _______________________
1148 (3) [__op0_high_*__op1_high_]
1151 This gives a 4-word result. Since we are only interested in the
1152 lower 2 words, partial result (3) and the upper words of (2a) and
1153 (2b) don't need to be calculated. Hence (2a) and (2b) can be
1154 calculated using non-widening multiplication.
1156 (1), however, needs to be calculated with an unsigned widening
1157 multiplication. If this operation is not directly supported we
1158 try using a signed widening multiplication and adjust the result.
1159 This adjustment works as follows:
1161 If both operands are positive then no adjustment is needed.
1163 If the operands have different signs, for example op0_low < 0 and
1164 op1_low >= 0, the instruction treats the most significant bit of
1165 op0_low as a sign bit instead of a bit with significance
1166 2**(BITS_PER_WORD-1), i.e. the instruction multiplies op1_low
1167 with 2**BITS_PER_WORD - op0_low, and two's complements the
1168 result. Conclusion: We need to add op1_low * 2**BITS_PER_WORD to
1171 Similarly, if both operands are negative, we need to add
1172 (op0_low + op1_low) * 2**BITS_PER_WORD.
1174 We use a trick to adjust quickly. We logically shift op0_low right
1175 (op1_low) BITS_PER_WORD-1 steps to get 0 or 1, and add this to
1176 op0_high (op1_high) before it is used to calculate 2b (2a). If no
1177 logical shift exists, we do an arithmetic right shift and subtract
1181 expand_doubleword_mult (enum machine_mode mode
, rtx op0
, rtx op1
, rtx target
,
1182 bool umulp
, enum optab_methods methods
)
1184 int low
= (WORDS_BIG_ENDIAN
? 1 : 0);
1185 int high
= (WORDS_BIG_ENDIAN
? 0 : 1);
1186 rtx wordm1
= umulp
? NULL_RTX
: GEN_INT (BITS_PER_WORD
- 1);
1187 rtx product
, adjust
, product_high
, temp
;
1189 rtx op0_high
= operand_subword_force (op0
, high
, mode
);
1190 rtx op0_low
= operand_subword_force (op0
, low
, mode
);
1191 rtx op1_high
= operand_subword_force (op1
, high
, mode
);
1192 rtx op1_low
= operand_subword_force (op1
, low
, mode
);
1194 /* If we're using an unsigned multiply to directly compute the product
1195 of the low-order words of the operands and perform any required
1196 adjustments of the operands, we begin by trying two more multiplications
1197 and then computing the appropriate sum.
1199 We have checked above that the required addition is provided.
1200 Full-word addition will normally always succeed, especially if
1201 it is provided at all, so we don't worry about its failure. The
1202 multiplication may well fail, however, so we do handle that. */
1206 /* ??? This could be done with emit_store_flag where available. */
1207 temp
= expand_binop (word_mode
, lshr_optab
, op0_low
, wordm1
,
1208 NULL_RTX
, 1, methods
);
1210 op0_high
= expand_binop (word_mode
, add_optab
, op0_high
, temp
,
1211 NULL_RTX
, 0, OPTAB_DIRECT
);
1214 temp
= expand_binop (word_mode
, ashr_optab
, op0_low
, wordm1
,
1215 NULL_RTX
, 0, methods
);
1218 op0_high
= expand_binop (word_mode
, sub_optab
, op0_high
, temp
,
1219 NULL_RTX
, 0, OPTAB_DIRECT
);
1226 adjust
= expand_binop (word_mode
, smul_optab
, op0_high
, op1_low
,
1227 NULL_RTX
, 0, OPTAB_DIRECT
);
1231 /* OP0_HIGH should now be dead. */
1235 /* ??? This could be done with emit_store_flag where available. */
1236 temp
= expand_binop (word_mode
, lshr_optab
, op1_low
, wordm1
,
1237 NULL_RTX
, 1, methods
);
1239 op1_high
= expand_binop (word_mode
, add_optab
, op1_high
, temp
,
1240 NULL_RTX
, 0, OPTAB_DIRECT
);
1243 temp
= expand_binop (word_mode
, ashr_optab
, op1_low
, wordm1
,
1244 NULL_RTX
, 0, methods
);
1247 op1_high
= expand_binop (word_mode
, sub_optab
, op1_high
, temp
,
1248 NULL_RTX
, 0, OPTAB_DIRECT
);
1255 temp
= expand_binop (word_mode
, smul_optab
, op1_high
, op0_low
,
1256 NULL_RTX
, 0, OPTAB_DIRECT
);
1260 /* OP1_HIGH should now be dead. */
1262 adjust
= expand_binop (word_mode
, add_optab
, adjust
, temp
,
1263 NULL_RTX
, 0, OPTAB_DIRECT
);
1265 if (target
&& !REG_P (target
))
1269 product
= expand_binop (mode
, umul_widen_optab
, op0_low
, op1_low
,
1270 target
, 1, OPTAB_DIRECT
);
1272 product
= expand_binop (mode
, smul_widen_optab
, op0_low
, op1_low
,
1273 target
, 1, OPTAB_DIRECT
);
1278 product_high
= operand_subword (product
, high
, 1, mode
);
1279 adjust
= expand_binop (word_mode
, add_optab
, product_high
, adjust
,
1280 NULL_RTX
, 0, OPTAB_DIRECT
);
1281 emit_move_insn (product_high
, adjust
);
1285 /* Wrapper around expand_binop which takes an rtx code to specify
1286 the operation to perform, not an optab pointer. All other
1287 arguments are the same. */
1289 expand_simple_binop (enum machine_mode mode
, enum rtx_code code
, rtx op0
,
1290 rtx op1
, rtx target
, int unsignedp
,
1291 enum optab_methods methods
)
1293 optab binop
= code_to_optab
[(int) code
];
1296 return expand_binop (mode
, binop
, op0
, op1
, target
, unsignedp
, methods
);
1299 /* Return whether OP0 and OP1 should be swapped when expanding a commutative
1300 binop. Order them according to commutative_operand_precedence and, if
1301 possible, try to put TARGET or a pseudo first. */
1303 swap_commutative_operands_with_target (rtx target
, rtx op0
, rtx op1
)
1305 int op0_prec
= commutative_operand_precedence (op0
);
1306 int op1_prec
= commutative_operand_precedence (op1
);
1308 if (op0_prec
< op1_prec
)
1311 if (op0_prec
> op1_prec
)
1314 /* With equal precedence, both orders are ok, but it is better if the
1315 first operand is TARGET, or if both TARGET and OP0 are pseudos. */
1316 if (target
== 0 || REG_P (target
))
1317 return (REG_P (op1
) && !REG_P (op0
)) || target
== op1
;
1319 return rtx_equal_p (op1
, target
);
1322 /* Return true if BINOPTAB implements a shift operation. */
1325 shift_optab_p (optab binoptab
)
1327 switch (binoptab
->code
)
1343 /* Return true if BINOPTAB implements a commutative binary operation. */
1346 commutative_optab_p (optab binoptab
)
1348 return (GET_RTX_CLASS (binoptab
->code
) == RTX_COMM_ARITH
1349 || binoptab
== smul_widen_optab
1350 || binoptab
== umul_widen_optab
1351 || binoptab
== smul_highpart_optab
1352 || binoptab
== umul_highpart_optab
);
1355 /* X is to be used in mode MODE as an operand to BINOPTAB. If we're
1356 optimizing, and if the operand is a constant that costs more than
1357 1 instruction, force the constant into a register and return that
1358 register. Return X otherwise. UNSIGNEDP says whether X is unsigned. */
1361 avoid_expensive_constant (enum machine_mode mode
, optab binoptab
,
1362 rtx x
, bool unsignedp
)
1364 bool speed
= optimize_insn_for_speed_p ();
1366 if (mode
!= VOIDmode
1369 && rtx_cost (x
, binoptab
->code
, speed
) > rtx_cost (x
, SET
, speed
))
1371 if (CONST_INT_P (x
))
1373 HOST_WIDE_INT intval
= trunc_int_for_mode (INTVAL (x
), mode
);
1374 if (intval
!= INTVAL (x
))
1375 x
= GEN_INT (intval
);
1378 x
= convert_modes (mode
, VOIDmode
, x
, unsignedp
);
1379 x
= force_reg (mode
, x
);
1384 /* Helper function for expand_binop: handle the case where there
1385 is an insn that directly implements the indicated operation.
1386 Returns null if this is not possible. */
1388 expand_binop_directly (enum machine_mode mode
, optab binoptab
,
1390 rtx target
, int unsignedp
, enum optab_methods methods
,
1393 int icode
= (int) optab_handler (binoptab
, mode
);
1394 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
1395 enum machine_mode mode1
= insn_data
[icode
].operand
[2].mode
;
1396 enum machine_mode tmp_mode
;
1399 rtx xop0
= op0
, xop1
= op1
;
1406 temp
= gen_reg_rtx (mode
);
1408 /* If it is a commutative operator and the modes would match
1409 if we would swap the operands, we can save the conversions. */
1410 commutative_p
= commutative_optab_p (binoptab
);
1412 && GET_MODE (xop0
) != mode0
&& GET_MODE (xop1
) != mode1
1413 && GET_MODE (xop0
) == mode1
&& GET_MODE (xop1
) == mode1
)
1420 /* If we are optimizing, force expensive constants into a register. */
1421 xop0
= avoid_expensive_constant (mode0
, binoptab
, xop0
, unsignedp
);
1422 if (!shift_optab_p (binoptab
))
1423 xop1
= avoid_expensive_constant (mode1
, binoptab
, xop1
, unsignedp
);
1425 /* In case the insn wants input operands in modes different from
1426 those of the actual operands, convert the operands. It would
1427 seem that we don't need to convert CONST_INTs, but we do, so
1428 that they're properly zero-extended, sign-extended or truncated
1431 if (GET_MODE (xop0
) != mode0
&& mode0
!= VOIDmode
)
1432 xop0
= convert_modes (mode0
,
1433 GET_MODE (xop0
) != VOIDmode
1438 if (GET_MODE (xop1
) != mode1
&& mode1
!= VOIDmode
)
1439 xop1
= convert_modes (mode1
,
1440 GET_MODE (xop1
) != VOIDmode
1445 /* If operation is commutative,
1446 try to make the first operand a register.
1447 Even better, try to make it the same as the target.
1448 Also try to make the last operand a constant. */
1450 && swap_commutative_operands_with_target (target
, xop0
, xop1
))
1457 /* Now, if insn's predicates don't allow our operands, put them into
1460 if (!insn_data
[icode
].operand
[1].predicate (xop0
, mode0
)
1461 && mode0
!= VOIDmode
)
1462 xop0
= copy_to_mode_reg (mode0
, xop0
);
1464 if (!insn_data
[icode
].operand
[2].predicate (xop1
, mode1
)
1465 && mode1
!= VOIDmode
)
1466 xop1
= copy_to_mode_reg (mode1
, xop1
);
1468 if (binoptab
== vec_pack_trunc_optab
1469 || binoptab
== vec_pack_usat_optab
1470 || binoptab
== vec_pack_ssat_optab
1471 || binoptab
== vec_pack_ufix_trunc_optab
1472 || binoptab
== vec_pack_sfix_trunc_optab
)
1474 /* The mode of the result is different then the mode of the
1476 tmp_mode
= insn_data
[icode
].operand
[0].mode
;
1477 if (GET_MODE_NUNITS (tmp_mode
) != 2 * GET_MODE_NUNITS (mode
))
1483 if (!insn_data
[icode
].operand
[0].predicate (temp
, tmp_mode
))
1484 temp
= gen_reg_rtx (tmp_mode
);
1486 pat
= GEN_FCN (icode
) (temp
, xop0
, xop1
);
1489 /* If PAT is composed of more than one insn, try to add an appropriate
1490 REG_EQUAL note to it. If we can't because TEMP conflicts with an
1491 operand, call expand_binop again, this time without a target. */
1492 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
1493 && ! add_equal_note (pat
, temp
, binoptab
->code
, xop0
, xop1
))
1495 delete_insns_since (last
);
1496 return expand_binop (mode
, binoptab
, op0
, op1
, NULL_RTX
,
1497 unsignedp
, methods
);
1504 delete_insns_since (last
);
1508 /* Generate code to perform an operation specified by BINOPTAB
1509 on operands OP0 and OP1, with result having machine-mode MODE.
1511 UNSIGNEDP is for the case where we have to widen the operands
1512 to perform the operation. It says to use zero-extension.
1514 If TARGET is nonzero, the value
1515 is generated there, if it is convenient to do so.
1516 In all cases an rtx is returned for the locus of the value;
1517 this may or may not be TARGET. */
1520 expand_binop (enum machine_mode mode
, optab binoptab
, rtx op0
, rtx op1
,
1521 rtx target
, int unsignedp
, enum optab_methods methods
)
1523 enum optab_methods next_methods
1524 = (methods
== OPTAB_LIB
|| methods
== OPTAB_LIB_WIDEN
1525 ? OPTAB_WIDEN
: methods
);
1526 enum mode_class mclass
;
1527 enum machine_mode wider_mode
;
1530 rtx entry_last
= get_last_insn ();
1533 mclass
= GET_MODE_CLASS (mode
);
1535 /* If subtracting an integer constant, convert this into an addition of
1536 the negated constant. */
1538 if (binoptab
== sub_optab
&& CONST_INT_P (op1
))
1540 op1
= negate_rtx (mode
, op1
);
1541 binoptab
= add_optab
;
1544 /* Record where to delete back to if we backtrack. */
1545 last
= get_last_insn ();
1547 /* If we can do it with a three-operand insn, do so. */
1549 if (methods
!= OPTAB_MUST_WIDEN
1550 && optab_handler (binoptab
, mode
) != CODE_FOR_nothing
)
1552 temp
= expand_binop_directly (mode
, binoptab
, op0
, op1
, target
,
1553 unsignedp
, methods
, last
);
1558 /* If we were trying to rotate, and that didn't work, try rotating
1559 the other direction before falling back to shifts and bitwise-or. */
1560 if (((binoptab
== rotl_optab
1561 && optab_handler (rotr_optab
, mode
) != CODE_FOR_nothing
)
1562 || (binoptab
== rotr_optab
1563 && optab_handler (rotl_optab
, mode
) != CODE_FOR_nothing
))
1564 && mclass
== MODE_INT
)
1566 optab otheroptab
= (binoptab
== rotl_optab
? rotr_optab
: rotl_optab
);
1568 unsigned int bits
= GET_MODE_BITSIZE (mode
);
1570 if (CONST_INT_P (op1
))
1571 newop1
= GEN_INT (bits
- INTVAL (op1
));
1572 else if (targetm
.shift_truncation_mask (mode
) == bits
- 1)
1573 newop1
= negate_rtx (GET_MODE (op1
), op1
);
1575 newop1
= expand_binop (GET_MODE (op1
), sub_optab
,
1576 GEN_INT (bits
), op1
,
1577 NULL_RTX
, unsignedp
, OPTAB_DIRECT
);
1579 temp
= expand_binop_directly (mode
, otheroptab
, op0
, newop1
,
1580 target
, unsignedp
, methods
, last
);
1585 /* If this is a multiply, see if we can do a widening operation that
1586 takes operands of this mode and makes a wider mode. */
1588 if (binoptab
== smul_optab
1589 && GET_MODE_WIDER_MODE (mode
) != VOIDmode
1590 && (optab_handler ((unsignedp
? umul_widen_optab
: smul_widen_optab
),
1591 GET_MODE_WIDER_MODE (mode
))
1592 != CODE_FOR_nothing
))
1594 temp
= expand_binop (GET_MODE_WIDER_MODE (mode
),
1595 unsignedp
? umul_widen_optab
: smul_widen_optab
,
1596 op0
, op1
, NULL_RTX
, unsignedp
, OPTAB_DIRECT
);
1600 if (GET_MODE_CLASS (mode
) == MODE_INT
1601 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode
),
1602 GET_MODE_BITSIZE (GET_MODE (temp
))))
1603 return gen_lowpart (mode
, temp
);
1605 return convert_to_mode (mode
, temp
, unsignedp
);
1609 /* Look for a wider mode of the same class for which we think we
1610 can open-code the operation. Check for a widening multiply at the
1611 wider mode as well. */
1613 if (CLASS_HAS_WIDER_MODES_P (mclass
)
1614 && methods
!= OPTAB_DIRECT
&& methods
!= OPTAB_LIB
)
1615 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
1616 wider_mode
!= VOIDmode
;
1617 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
1619 if (optab_handler (binoptab
, wider_mode
) != CODE_FOR_nothing
1620 || (binoptab
== smul_optab
1621 && GET_MODE_WIDER_MODE (wider_mode
) != VOIDmode
1622 && (optab_handler ((unsignedp
? umul_widen_optab
1623 : smul_widen_optab
),
1624 GET_MODE_WIDER_MODE (wider_mode
))
1625 != CODE_FOR_nothing
)))
1627 rtx xop0
= op0
, xop1
= op1
;
1630 /* For certain integer operations, we need not actually extend
1631 the narrow operands, as long as we will truncate
1632 the results to the same narrowness. */
1634 if ((binoptab
== ior_optab
|| binoptab
== and_optab
1635 || binoptab
== xor_optab
1636 || binoptab
== add_optab
|| binoptab
== sub_optab
1637 || binoptab
== smul_optab
|| binoptab
== ashl_optab
)
1638 && mclass
== MODE_INT
)
1641 xop0
= avoid_expensive_constant (mode
, binoptab
,
1643 if (binoptab
!= ashl_optab
)
1644 xop1
= avoid_expensive_constant (mode
, binoptab
,
1648 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
, no_extend
);
1650 /* The second operand of a shift must always be extended. */
1651 xop1
= widen_operand (xop1
, wider_mode
, mode
, unsignedp
,
1652 no_extend
&& binoptab
!= ashl_optab
);
1654 temp
= expand_binop (wider_mode
, binoptab
, xop0
, xop1
, NULL_RTX
,
1655 unsignedp
, OPTAB_DIRECT
);
1658 if (mclass
!= MODE_INT
1659 || !TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode
),
1660 GET_MODE_BITSIZE (wider_mode
)))
1663 target
= gen_reg_rtx (mode
);
1664 convert_move (target
, temp
, 0);
1668 return gen_lowpart (mode
, temp
);
1671 delete_insns_since (last
);
1675 /* If operation is commutative,
1676 try to make the first operand a register.
1677 Even better, try to make it the same as the target.
1678 Also try to make the last operand a constant. */
1679 if (commutative_optab_p (binoptab
)
1680 && swap_commutative_operands_with_target (target
, op0
, op1
))
1687 /* These can be done a word at a time. */
1688 if ((binoptab
== and_optab
|| binoptab
== ior_optab
|| binoptab
== xor_optab
)
1689 && mclass
== MODE_INT
1690 && GET_MODE_SIZE (mode
) > UNITS_PER_WORD
1691 && optab_handler (binoptab
, word_mode
) != CODE_FOR_nothing
)
1696 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1697 won't be accurate, so use a new target. */
1698 if (target
== 0 || target
== op0
|| target
== op1
)
1699 target
= gen_reg_rtx (mode
);
1703 /* Do the actual arithmetic. */
1704 for (i
= 0; i
< GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
; i
++)
1706 rtx target_piece
= operand_subword (target
, i
, 1, mode
);
1707 rtx x
= expand_binop (word_mode
, binoptab
,
1708 operand_subword_force (op0
, i
, mode
),
1709 operand_subword_force (op1
, i
, mode
),
1710 target_piece
, unsignedp
, next_methods
);
1715 if (target_piece
!= x
)
1716 emit_move_insn (target_piece
, x
);
1719 insns
= get_insns ();
1722 if (i
== GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
)
1729 /* Synthesize double word shifts from single word shifts. */
1730 if ((binoptab
== lshr_optab
|| binoptab
== ashl_optab
1731 || binoptab
== ashr_optab
)
1732 && mclass
== MODE_INT
1733 && (CONST_INT_P (op1
) || optimize_insn_for_speed_p ())
1734 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
1735 && optab_handler (binoptab
, word_mode
) != CODE_FOR_nothing
1736 && optab_handler (ashl_optab
, word_mode
) != CODE_FOR_nothing
1737 && optab_handler (lshr_optab
, word_mode
) != CODE_FOR_nothing
)
1739 unsigned HOST_WIDE_INT shift_mask
, double_shift_mask
;
1740 enum machine_mode op1_mode
;
1742 double_shift_mask
= targetm
.shift_truncation_mask (mode
);
1743 shift_mask
= targetm
.shift_truncation_mask (word_mode
);
1744 op1_mode
= GET_MODE (op1
) != VOIDmode
? GET_MODE (op1
) : word_mode
;
1746 /* Apply the truncation to constant shifts. */
1747 if (double_shift_mask
> 0 && CONST_INT_P (op1
))
1748 op1
= GEN_INT (INTVAL (op1
) & double_shift_mask
);
1750 if (op1
== CONST0_RTX (op1_mode
))
1753 /* Make sure that this is a combination that expand_doubleword_shift
1754 can handle. See the comments there for details. */
1755 if (double_shift_mask
== 0
1756 || (shift_mask
== BITS_PER_WORD
- 1
1757 && double_shift_mask
== BITS_PER_WORD
* 2 - 1))
1760 rtx into_target
, outof_target
;
1761 rtx into_input
, outof_input
;
1762 int left_shift
, outof_word
;
1764 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1765 won't be accurate, so use a new target. */
1766 if (target
== 0 || target
== op0
|| target
== op1
)
1767 target
= gen_reg_rtx (mode
);
1771 /* OUTOF_* is the word we are shifting bits away from, and
1772 INTO_* is the word that we are shifting bits towards, thus
1773 they differ depending on the direction of the shift and
1774 WORDS_BIG_ENDIAN. */
1776 left_shift
= binoptab
== ashl_optab
;
1777 outof_word
= left_shift
^ ! WORDS_BIG_ENDIAN
;
1779 outof_target
= operand_subword (target
, outof_word
, 1, mode
);
1780 into_target
= operand_subword (target
, 1 - outof_word
, 1, mode
);
1782 outof_input
= operand_subword_force (op0
, outof_word
, mode
);
1783 into_input
= operand_subword_force (op0
, 1 - outof_word
, mode
);
1785 if (expand_doubleword_shift (op1_mode
, binoptab
,
1786 outof_input
, into_input
, op1
,
1787 outof_target
, into_target
,
1788 unsignedp
, next_methods
, shift_mask
))
1790 insns
= get_insns ();
1800 /* Synthesize double word rotates from single word shifts. */
1801 if ((binoptab
== rotl_optab
|| binoptab
== rotr_optab
)
1802 && mclass
== MODE_INT
1803 && CONST_INT_P (op1
)
1804 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
1805 && optab_handler (ashl_optab
, word_mode
) != CODE_FOR_nothing
1806 && optab_handler (lshr_optab
, word_mode
) != CODE_FOR_nothing
)
1809 rtx into_target
, outof_target
;
1810 rtx into_input
, outof_input
;
1812 int shift_count
, left_shift
, outof_word
;
1814 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1815 won't be accurate, so use a new target. Do this also if target is not
1816 a REG, first because having a register instead may open optimization
1817 opportunities, and second because if target and op0 happen to be MEMs
1818 designating the same location, we would risk clobbering it too early
1819 in the code sequence we generate below. */
1820 if (target
== 0 || target
== op0
|| target
== op1
|| ! REG_P (target
))
1821 target
= gen_reg_rtx (mode
);
1825 shift_count
= INTVAL (op1
);
1827 /* OUTOF_* is the word we are shifting bits away from, and
1828 INTO_* is the word that we are shifting bits towards, thus
1829 they differ depending on the direction of the shift and
1830 WORDS_BIG_ENDIAN. */
1832 left_shift
= (binoptab
== rotl_optab
);
1833 outof_word
= left_shift
^ ! WORDS_BIG_ENDIAN
;
1835 outof_target
= operand_subword (target
, outof_word
, 1, mode
);
1836 into_target
= operand_subword (target
, 1 - outof_word
, 1, mode
);
1838 outof_input
= operand_subword_force (op0
, outof_word
, mode
);
1839 into_input
= operand_subword_force (op0
, 1 - outof_word
, mode
);
1841 if (shift_count
== BITS_PER_WORD
)
1843 /* This is just a word swap. */
1844 emit_move_insn (outof_target
, into_input
);
1845 emit_move_insn (into_target
, outof_input
);
1850 rtx into_temp1
, into_temp2
, outof_temp1
, outof_temp2
;
1851 rtx first_shift_count
, second_shift_count
;
1852 optab reverse_unsigned_shift
, unsigned_shift
;
1854 reverse_unsigned_shift
= (left_shift
^ (shift_count
< BITS_PER_WORD
)
1855 ? lshr_optab
: ashl_optab
);
1857 unsigned_shift
= (left_shift
^ (shift_count
< BITS_PER_WORD
)
1858 ? ashl_optab
: lshr_optab
);
1860 if (shift_count
> BITS_PER_WORD
)
1862 first_shift_count
= GEN_INT (shift_count
- BITS_PER_WORD
);
1863 second_shift_count
= GEN_INT (2 * BITS_PER_WORD
- shift_count
);
1867 first_shift_count
= GEN_INT (BITS_PER_WORD
- shift_count
);
1868 second_shift_count
= GEN_INT (shift_count
);
1871 into_temp1
= expand_binop (word_mode
, unsigned_shift
,
1872 outof_input
, first_shift_count
,
1873 NULL_RTX
, unsignedp
, next_methods
);
1874 into_temp2
= expand_binop (word_mode
, reverse_unsigned_shift
,
1875 into_input
, second_shift_count
,
1876 NULL_RTX
, unsignedp
, next_methods
);
1878 if (into_temp1
!= 0 && into_temp2
!= 0)
1879 inter
= expand_binop (word_mode
, ior_optab
, into_temp1
, into_temp2
,
1880 into_target
, unsignedp
, next_methods
);
1884 if (inter
!= 0 && inter
!= into_target
)
1885 emit_move_insn (into_target
, inter
);
1887 outof_temp1
= expand_binop (word_mode
, unsigned_shift
,
1888 into_input
, first_shift_count
,
1889 NULL_RTX
, unsignedp
, next_methods
);
1890 outof_temp2
= expand_binop (word_mode
, reverse_unsigned_shift
,
1891 outof_input
, second_shift_count
,
1892 NULL_RTX
, unsignedp
, next_methods
);
1894 if (inter
!= 0 && outof_temp1
!= 0 && outof_temp2
!= 0)
1895 inter
= expand_binop (word_mode
, ior_optab
,
1896 outof_temp1
, outof_temp2
,
1897 outof_target
, unsignedp
, next_methods
);
1899 if (inter
!= 0 && inter
!= outof_target
)
1900 emit_move_insn (outof_target
, inter
);
1903 insns
= get_insns ();
1913 /* These can be done a word at a time by propagating carries. */
1914 if ((binoptab
== add_optab
|| binoptab
== sub_optab
)
1915 && mclass
== MODE_INT
1916 && GET_MODE_SIZE (mode
) >= 2 * UNITS_PER_WORD
1917 && optab_handler (binoptab
, word_mode
) != CODE_FOR_nothing
)
1920 optab otheroptab
= binoptab
== add_optab
? sub_optab
: add_optab
;
1921 const unsigned int nwords
= GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
;
1922 rtx carry_in
= NULL_RTX
, carry_out
= NULL_RTX
;
1923 rtx xop0
, xop1
, xtarget
;
1925 /* We can handle either a 1 or -1 value for the carry. If STORE_FLAG
1926 value is one of those, use it. Otherwise, use 1 since it is the
1927 one easiest to get. */
1928 #if STORE_FLAG_VALUE == 1 || STORE_FLAG_VALUE == -1
1929 int normalizep
= STORE_FLAG_VALUE
;
1934 /* Prepare the operands. */
1935 xop0
= force_reg (mode
, op0
);
1936 xop1
= force_reg (mode
, op1
);
1938 xtarget
= gen_reg_rtx (mode
);
1940 if (target
== 0 || !REG_P (target
))
1943 /* Indicate for flow that the entire target reg is being set. */
1945 emit_clobber (xtarget
);
1947 /* Do the actual arithmetic. */
1948 for (i
= 0; i
< nwords
; i
++)
1950 int index
= (WORDS_BIG_ENDIAN
? nwords
- i
- 1 : i
);
1951 rtx target_piece
= operand_subword (xtarget
, index
, 1, mode
);
1952 rtx op0_piece
= operand_subword_force (xop0
, index
, mode
);
1953 rtx op1_piece
= operand_subword_force (xop1
, index
, mode
);
1956 /* Main add/subtract of the input operands. */
1957 x
= expand_binop (word_mode
, binoptab
,
1958 op0_piece
, op1_piece
,
1959 target_piece
, unsignedp
, next_methods
);
1965 /* Store carry from main add/subtract. */
1966 carry_out
= gen_reg_rtx (word_mode
);
1967 carry_out
= emit_store_flag_force (carry_out
,
1968 (binoptab
== add_optab
1971 word_mode
, 1, normalizep
);
1978 /* Add/subtract previous carry to main result. */
1979 newx
= expand_binop (word_mode
,
1980 normalizep
== 1 ? binoptab
: otheroptab
,
1982 NULL_RTX
, 1, next_methods
);
1986 /* Get out carry from adding/subtracting carry in. */
1987 rtx carry_tmp
= gen_reg_rtx (word_mode
);
1988 carry_tmp
= emit_store_flag_force (carry_tmp
,
1989 (binoptab
== add_optab
1992 word_mode
, 1, normalizep
);
1994 /* Logical-ior the two poss. carry together. */
1995 carry_out
= expand_binop (word_mode
, ior_optab
,
1996 carry_out
, carry_tmp
,
1997 carry_out
, 0, next_methods
);
2001 emit_move_insn (target_piece
, newx
);
2005 if (x
!= target_piece
)
2006 emit_move_insn (target_piece
, x
);
2009 carry_in
= carry_out
;
2012 if (i
== GET_MODE_BITSIZE (mode
) / (unsigned) BITS_PER_WORD
)
2014 if (optab_handler (mov_optab
, mode
) != CODE_FOR_nothing
2015 || ! rtx_equal_p (target
, xtarget
))
2017 rtx temp
= emit_move_insn (target
, xtarget
);
2019 set_unique_reg_note (temp
,
2021 gen_rtx_fmt_ee (binoptab
->code
, mode
,
2032 delete_insns_since (last
);
2035 /* Attempt to synthesize double word multiplies using a sequence of word
2036 mode multiplications. We first attempt to generate a sequence using a
2037 more efficient unsigned widening multiply, and if that fails we then
2038 try using a signed widening multiply. */
2040 if (binoptab
== smul_optab
2041 && mclass
== MODE_INT
2042 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
2043 && optab_handler (smul_optab
, word_mode
) != CODE_FOR_nothing
2044 && optab_handler (add_optab
, word_mode
) != CODE_FOR_nothing
)
2046 rtx product
= NULL_RTX
;
2048 if (optab_handler (umul_widen_optab
, mode
) != CODE_FOR_nothing
)
2050 product
= expand_doubleword_mult (mode
, op0
, op1
, target
,
2053 delete_insns_since (last
);
2056 if (product
== NULL_RTX
2057 && optab_handler (smul_widen_optab
, mode
) != CODE_FOR_nothing
)
2059 product
= expand_doubleword_mult (mode
, op0
, op1
, target
,
2062 delete_insns_since (last
);
2065 if (product
!= NULL_RTX
)
2067 if (optab_handler (mov_optab
, mode
) != CODE_FOR_nothing
)
2069 temp
= emit_move_insn (target
? target
: product
, product
);
2070 set_unique_reg_note (temp
,
2072 gen_rtx_fmt_ee (MULT
, mode
,
2080 /* It can't be open-coded in this mode.
2081 Use a library call if one is available and caller says that's ok. */
2083 libfunc
= optab_libfunc (binoptab
, mode
);
2085 && (methods
== OPTAB_LIB
|| methods
== OPTAB_LIB_WIDEN
))
2089 enum machine_mode op1_mode
= mode
;
2094 if (shift_optab_p (binoptab
))
2096 op1_mode
= targetm
.libgcc_shift_count_mode ();
2097 /* Specify unsigned here,
2098 since negative shift counts are meaningless. */
2099 op1x
= convert_to_mode (op1_mode
, op1
, 1);
2102 if (GET_MODE (op0
) != VOIDmode
2103 && GET_MODE (op0
) != mode
)
2104 op0
= convert_to_mode (mode
, op0
, unsignedp
);
2106 /* Pass 1 for NO_QUEUE so we don't lose any increments
2107 if the libcall is cse'd or moved. */
2108 value
= emit_library_call_value (libfunc
,
2109 NULL_RTX
, LCT_CONST
, mode
, 2,
2110 op0
, mode
, op1x
, op1_mode
);
2112 insns
= get_insns ();
2115 target
= gen_reg_rtx (mode
);
2116 emit_libcall_block (insns
, target
, value
,
2117 gen_rtx_fmt_ee (binoptab
->code
, mode
, op0
, op1
));
2122 delete_insns_since (last
);
2124 /* It can't be done in this mode. Can we do it in a wider mode? */
2126 if (! (methods
== OPTAB_WIDEN
|| methods
== OPTAB_LIB_WIDEN
2127 || methods
== OPTAB_MUST_WIDEN
))
2129 /* Caller says, don't even try. */
2130 delete_insns_since (entry_last
);
2134 /* Compute the value of METHODS to pass to recursive calls.
2135 Don't allow widening to be tried recursively. */
2137 methods
= (methods
== OPTAB_LIB_WIDEN
? OPTAB_LIB
: OPTAB_DIRECT
);
2139 /* Look for a wider mode of the same class for which it appears we can do
2142 if (CLASS_HAS_WIDER_MODES_P (mclass
))
2144 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
2145 wider_mode
!= VOIDmode
;
2146 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2148 if (optab_handler (binoptab
, wider_mode
) != CODE_FOR_nothing
2149 || (methods
== OPTAB_LIB
2150 && optab_libfunc (binoptab
, wider_mode
)))
2152 rtx xop0
= op0
, xop1
= op1
;
2155 /* For certain integer operations, we need not actually extend
2156 the narrow operands, as long as we will truncate
2157 the results to the same narrowness. */
2159 if ((binoptab
== ior_optab
|| binoptab
== and_optab
2160 || binoptab
== xor_optab
2161 || binoptab
== add_optab
|| binoptab
== sub_optab
2162 || binoptab
== smul_optab
|| binoptab
== ashl_optab
)
2163 && mclass
== MODE_INT
)
2166 xop0
= widen_operand (xop0
, wider_mode
, mode
,
2167 unsignedp
, no_extend
);
2169 /* The second operand of a shift must always be extended. */
2170 xop1
= widen_operand (xop1
, wider_mode
, mode
, unsignedp
,
2171 no_extend
&& binoptab
!= ashl_optab
);
2173 temp
= expand_binop (wider_mode
, binoptab
, xop0
, xop1
, NULL_RTX
,
2174 unsignedp
, methods
);
2177 if (mclass
!= MODE_INT
2178 || !TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode
),
2179 GET_MODE_BITSIZE (wider_mode
)))
2182 target
= gen_reg_rtx (mode
);
2183 convert_move (target
, temp
, 0);
2187 return gen_lowpart (mode
, temp
);
2190 delete_insns_since (last
);
2195 delete_insns_since (entry_last
);
2199 /* Expand a binary operator which has both signed and unsigned forms.
2200 UOPTAB is the optab for unsigned operations, and SOPTAB is for
2203 If we widen unsigned operands, we may use a signed wider operation instead
2204 of an unsigned wider operation, since the result would be the same. */
2207 sign_expand_binop (enum machine_mode mode
, optab uoptab
, optab soptab
,
2208 rtx op0
, rtx op1
, rtx target
, int unsignedp
,
2209 enum optab_methods methods
)
2212 optab direct_optab
= unsignedp
? uoptab
: soptab
;
2213 struct optab_d wide_soptab
;
2215 /* Do it without widening, if possible. */
2216 temp
= expand_binop (mode
, direct_optab
, op0
, op1
, target
,
2217 unsignedp
, OPTAB_DIRECT
);
2218 if (temp
|| methods
== OPTAB_DIRECT
)
2221 /* Try widening to a signed int. Make a fake signed optab that
2222 hides any signed insn for direct use. */
2223 wide_soptab
= *soptab
;
2224 set_optab_handler (&wide_soptab
, mode
, CODE_FOR_nothing
);
2225 /* We don't want to generate new hash table entries from this fake
2227 wide_soptab
.libcall_gen
= NULL
;
2229 temp
= expand_binop (mode
, &wide_soptab
, op0
, op1
, target
,
2230 unsignedp
, OPTAB_WIDEN
);
2232 /* For unsigned operands, try widening to an unsigned int. */
2233 if (temp
== 0 && unsignedp
)
2234 temp
= expand_binop (mode
, uoptab
, op0
, op1
, target
,
2235 unsignedp
, OPTAB_WIDEN
);
2236 if (temp
|| methods
== OPTAB_WIDEN
)
2239 /* Use the right width libcall if that exists. */
2240 temp
= expand_binop (mode
, direct_optab
, op0
, op1
, target
, unsignedp
, OPTAB_LIB
);
2241 if (temp
|| methods
== OPTAB_LIB
)
2244 /* Must widen and use a libcall, use either signed or unsigned. */
2245 temp
= expand_binop (mode
, &wide_soptab
, op0
, op1
, target
,
2246 unsignedp
, methods
);
2250 return expand_binop (mode
, uoptab
, op0
, op1
, target
,
2251 unsignedp
, methods
);
2255 /* Generate code to perform an operation specified by UNOPPTAB
2256 on operand OP0, with two results to TARG0 and TARG1.
2257 We assume that the order of the operands for the instruction
2258 is TARG0, TARG1, OP0.
2260 Either TARG0 or TARG1 may be zero, but what that means is that
2261 the result is not actually wanted. We will generate it into
2262 a dummy pseudo-reg and discard it. They may not both be zero.
2264 Returns 1 if this operation can be performed; 0 if not. */
2267 expand_twoval_unop (optab unoptab
, rtx op0
, rtx targ0
, rtx targ1
,
2270 enum machine_mode mode
= GET_MODE (targ0
? targ0
: targ1
);
2271 enum mode_class mclass
;
2272 enum machine_mode wider_mode
;
2273 rtx entry_last
= get_last_insn ();
2276 mclass
= GET_MODE_CLASS (mode
);
2279 targ0
= gen_reg_rtx (mode
);
2281 targ1
= gen_reg_rtx (mode
);
2283 /* Record where to go back to if we fail. */
2284 last
= get_last_insn ();
2286 if (optab_handler (unoptab
, mode
) != CODE_FOR_nothing
)
2288 int icode
= (int) optab_handler (unoptab
, mode
);
2289 enum machine_mode mode0
= insn_data
[icode
].operand
[2].mode
;
2293 if (GET_MODE (xop0
) != VOIDmode
2294 && GET_MODE (xop0
) != mode0
)
2295 xop0
= convert_to_mode (mode0
, xop0
, unsignedp
);
2297 /* Now, if insn doesn't accept these operands, put them into pseudos. */
2298 if (!insn_data
[icode
].operand
[2].predicate (xop0
, mode0
))
2299 xop0
= copy_to_mode_reg (mode0
, xop0
);
2301 /* We could handle this, but we should always be called with a pseudo
2302 for our targets and all insns should take them as outputs. */
2303 gcc_assert (insn_data
[icode
].operand
[0].predicate (targ0
, mode
));
2304 gcc_assert (insn_data
[icode
].operand
[1].predicate (targ1
, mode
));
2306 pat
= GEN_FCN (icode
) (targ0
, targ1
, xop0
);
2313 delete_insns_since (last
);
2316 /* It can't be done in this mode. Can we do it in a wider mode? */
2318 if (CLASS_HAS_WIDER_MODES_P (mclass
))
2320 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
2321 wider_mode
!= VOIDmode
;
2322 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2324 if (optab_handler (unoptab
, wider_mode
) != CODE_FOR_nothing
)
2326 rtx t0
= gen_reg_rtx (wider_mode
);
2327 rtx t1
= gen_reg_rtx (wider_mode
);
2328 rtx cop0
= convert_modes (wider_mode
, mode
, op0
, unsignedp
);
2330 if (expand_twoval_unop (unoptab
, cop0
, t0
, t1
, unsignedp
))
2332 convert_move (targ0
, t0
, unsignedp
);
2333 convert_move (targ1
, t1
, unsignedp
);
2337 delete_insns_since (last
);
2342 delete_insns_since (entry_last
);
2346 /* Generate code to perform an operation specified by BINOPTAB
2347 on operands OP0 and OP1, with two results to TARG1 and TARG2.
2348 We assume that the order of the operands for the instruction
2349 is TARG0, OP0, OP1, TARG1, which would fit a pattern like
2350 [(set TARG0 (operate OP0 OP1)) (set TARG1 (operate ...))].
2352 Either TARG0 or TARG1 may be zero, but what that means is that
2353 the result is not actually wanted. We will generate it into
2354 a dummy pseudo-reg and discard it. They may not both be zero.
2356 Returns 1 if this operation can be performed; 0 if not. */
2359 expand_twoval_binop (optab binoptab
, rtx op0
, rtx op1
, rtx targ0
, rtx targ1
,
2362 enum machine_mode mode
= GET_MODE (targ0
? targ0
: targ1
);
2363 enum mode_class mclass
;
2364 enum machine_mode wider_mode
;
2365 rtx entry_last
= get_last_insn ();
2368 mclass
= GET_MODE_CLASS (mode
);
2371 targ0
= gen_reg_rtx (mode
);
2373 targ1
= gen_reg_rtx (mode
);
2375 /* Record where to go back to if we fail. */
2376 last
= get_last_insn ();
2378 if (optab_handler (binoptab
, mode
) != CODE_FOR_nothing
)
2380 int icode
= (int) optab_handler (binoptab
, mode
);
2381 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
2382 enum machine_mode mode1
= insn_data
[icode
].operand
[2].mode
;
2384 rtx xop0
= op0
, xop1
= op1
;
2386 /* If we are optimizing, force expensive constants into a register. */
2387 xop0
= avoid_expensive_constant (mode0
, binoptab
, xop0
, unsignedp
);
2388 xop1
= avoid_expensive_constant (mode1
, binoptab
, xop1
, unsignedp
);
2390 /* In case the insn wants input operands in modes different from
2391 those of the actual operands, convert the operands. It would
2392 seem that we don't need to convert CONST_INTs, but we do, so
2393 that they're properly zero-extended, sign-extended or truncated
2396 if (GET_MODE (op0
) != mode0
&& mode0
!= VOIDmode
)
2397 xop0
= convert_modes (mode0
,
2398 GET_MODE (op0
) != VOIDmode
2403 if (GET_MODE (op1
) != mode1
&& mode1
!= VOIDmode
)
2404 xop1
= convert_modes (mode1
,
2405 GET_MODE (op1
) != VOIDmode
2410 /* Now, if insn doesn't accept these operands, put them into pseudos. */
2411 if (!insn_data
[icode
].operand
[1].predicate (xop0
, mode0
))
2412 xop0
= copy_to_mode_reg (mode0
, xop0
);
2414 if (!insn_data
[icode
].operand
[2].predicate (xop1
, mode1
))
2415 xop1
= copy_to_mode_reg (mode1
, xop1
);
2417 /* We could handle this, but we should always be called with a pseudo
2418 for our targets and all insns should take them as outputs. */
2419 gcc_assert (insn_data
[icode
].operand
[0].predicate (targ0
, mode
));
2420 gcc_assert (insn_data
[icode
].operand
[3].predicate (targ1
, mode
));
2422 pat
= GEN_FCN (icode
) (targ0
, xop0
, xop1
, targ1
);
2429 delete_insns_since (last
);
2432 /* It can't be done in this mode. Can we do it in a wider mode? */
2434 if (CLASS_HAS_WIDER_MODES_P (mclass
))
2436 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
2437 wider_mode
!= VOIDmode
;
2438 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2440 if (optab_handler (binoptab
, wider_mode
) != CODE_FOR_nothing
)
2442 rtx t0
= gen_reg_rtx (wider_mode
);
2443 rtx t1
= gen_reg_rtx (wider_mode
);
2444 rtx cop0
= convert_modes (wider_mode
, mode
, op0
, unsignedp
);
2445 rtx cop1
= convert_modes (wider_mode
, mode
, op1
, unsignedp
);
2447 if (expand_twoval_binop (binoptab
, cop0
, cop1
,
2450 convert_move (targ0
, t0
, unsignedp
);
2451 convert_move (targ1
, t1
, unsignedp
);
2455 delete_insns_since (last
);
2460 delete_insns_since (entry_last
);
2464 /* Expand the two-valued library call indicated by BINOPTAB, but
2465 preserve only one of the values. If TARG0 is non-NULL, the first
2466 value is placed into TARG0; otherwise the second value is placed
2467 into TARG1. Exactly one of TARG0 and TARG1 must be non-NULL. The
2468 value stored into TARG0 or TARG1 is equivalent to (CODE OP0 OP1).
2469 This routine assumes that the value returned by the library call is
2470 as if the return value was of an integral mode twice as wide as the
2471 mode of OP0. Returns 1 if the call was successful. */
2474 expand_twoval_binop_libfunc (optab binoptab
, rtx op0
, rtx op1
,
2475 rtx targ0
, rtx targ1
, enum rtx_code code
)
2477 enum machine_mode mode
;
2478 enum machine_mode libval_mode
;
2483 /* Exactly one of TARG0 or TARG1 should be non-NULL. */
2484 gcc_assert (!targ0
!= !targ1
);
2486 mode
= GET_MODE (op0
);
2487 libfunc
= optab_libfunc (binoptab
, mode
);
2491 /* The value returned by the library function will have twice as
2492 many bits as the nominal MODE. */
2493 libval_mode
= smallest_mode_for_size (2 * GET_MODE_BITSIZE (mode
),
2496 libval
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
2500 /* Get the part of VAL containing the value that we want. */
2501 libval
= simplify_gen_subreg (mode
, libval
, libval_mode
,
2502 targ0
? 0 : GET_MODE_SIZE (mode
));
2503 insns
= get_insns ();
2505 /* Move the into the desired location. */
2506 emit_libcall_block (insns
, targ0
? targ0
: targ1
, libval
,
2507 gen_rtx_fmt_ee (code
, mode
, op0
, op1
));
2513 /* Wrapper around expand_unop which takes an rtx code to specify
2514 the operation to perform, not an optab pointer. All other
2515 arguments are the same. */
2517 expand_simple_unop (enum machine_mode mode
, enum rtx_code code
, rtx op0
,
2518 rtx target
, int unsignedp
)
2520 optab unop
= code_to_optab
[(int) code
];
2523 return expand_unop (mode
, unop
, op0
, target
, unsignedp
);
2529 (clz:wide (zero_extend:wide x)) - ((width wide) - (width narrow)). */
2531 widen_clz (enum machine_mode mode
, rtx op0
, rtx target
)
2533 enum mode_class mclass
= GET_MODE_CLASS (mode
);
2534 if (CLASS_HAS_WIDER_MODES_P (mclass
))
2536 enum machine_mode wider_mode
;
2537 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
2538 wider_mode
!= VOIDmode
;
2539 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2541 if (optab_handler (clz_optab
, wider_mode
) != CODE_FOR_nothing
)
2543 rtx xop0
, temp
, last
;
2545 last
= get_last_insn ();
2548 target
= gen_reg_rtx (mode
);
2549 xop0
= widen_operand (op0
, wider_mode
, mode
, true, false);
2550 temp
= expand_unop (wider_mode
, clz_optab
, xop0
, NULL_RTX
, true);
2552 temp
= expand_binop (wider_mode
, sub_optab
, temp
,
2553 GEN_INT (GET_MODE_BITSIZE (wider_mode
)
2554 - GET_MODE_BITSIZE (mode
)),
2555 target
, true, OPTAB_DIRECT
);
2557 delete_insns_since (last
);
2566 /* Try calculating clz of a double-word quantity as two clz's of word-sized
2567 quantities, choosing which based on whether the high word is nonzero. */
2569 expand_doubleword_clz (enum machine_mode mode
, rtx op0
, rtx target
)
2571 rtx xop0
= force_reg (mode
, op0
);
2572 rtx subhi
= gen_highpart (word_mode
, xop0
);
2573 rtx sublo
= gen_lowpart (word_mode
, xop0
);
2574 rtx hi0_label
= gen_label_rtx ();
2575 rtx after_label
= gen_label_rtx ();
2576 rtx seq
, temp
, result
;
2578 /* If we were not given a target, use a word_mode register, not a
2579 'mode' register. The result will fit, and nobody is expecting
2580 anything bigger (the return type of __builtin_clz* is int). */
2582 target
= gen_reg_rtx (word_mode
);
2584 /* In any case, write to a word_mode scratch in both branches of the
2585 conditional, so we can ensure there is a single move insn setting
2586 'target' to tag a REG_EQUAL note on. */
2587 result
= gen_reg_rtx (word_mode
);
2591 /* If the high word is not equal to zero,
2592 then clz of the full value is clz of the high word. */
2593 emit_cmp_and_jump_insns (subhi
, CONST0_RTX (word_mode
), EQ
, 0,
2594 word_mode
, true, hi0_label
);
2596 temp
= expand_unop_direct (word_mode
, clz_optab
, subhi
, result
, true);
2601 convert_move (result
, temp
, true);
2603 emit_jump_insn (gen_jump (after_label
));
2606 /* Else clz of the full value is clz of the low word plus the number
2607 of bits in the high word. */
2608 emit_label (hi0_label
);
2610 temp
= expand_unop_direct (word_mode
, clz_optab
, sublo
, 0, true);
2613 temp
= expand_binop (word_mode
, add_optab
, temp
,
2614 GEN_INT (GET_MODE_BITSIZE (word_mode
)),
2615 result
, true, OPTAB_DIRECT
);
2619 convert_move (result
, temp
, true);
2621 emit_label (after_label
);
2622 convert_move (target
, result
, true);
2627 add_equal_note (seq
, target
, CLZ
, xop0
, 0);
2639 (lshiftrt:wide (bswap:wide x) ((width wide) - (width narrow))). */
2641 widen_bswap (enum machine_mode mode
, rtx op0
, rtx target
)
2643 enum mode_class mclass
= GET_MODE_CLASS (mode
);
2644 enum machine_mode wider_mode
;
2647 if (!CLASS_HAS_WIDER_MODES_P (mclass
))
2650 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
2651 wider_mode
!= VOIDmode
;
2652 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2653 if (optab_handler (bswap_optab
, wider_mode
) != CODE_FOR_nothing
)
2658 last
= get_last_insn ();
2660 x
= widen_operand (op0
, wider_mode
, mode
, true, true);
2661 x
= expand_unop (wider_mode
, bswap_optab
, x
, NULL_RTX
, true);
2664 x
= expand_shift (RSHIFT_EXPR
, wider_mode
, x
,
2665 size_int (GET_MODE_BITSIZE (wider_mode
)
2666 - GET_MODE_BITSIZE (mode
)),
2672 target
= gen_reg_rtx (mode
);
2673 emit_move_insn (target
, gen_lowpart (mode
, x
));
2676 delete_insns_since (last
);
2681 /* Try calculating bswap as two bswaps of two word-sized operands. */
2684 expand_doubleword_bswap (enum machine_mode mode
, rtx op
, rtx target
)
2688 t1
= expand_unop (word_mode
, bswap_optab
,
2689 operand_subword_force (op
, 0, mode
), NULL_RTX
, true);
2690 t0
= expand_unop (word_mode
, bswap_optab
,
2691 operand_subword_force (op
, 1, mode
), NULL_RTX
, true);
2694 target
= gen_reg_rtx (mode
);
2696 emit_clobber (target
);
2697 emit_move_insn (operand_subword (target
, 0, 1, mode
), t0
);
2698 emit_move_insn (operand_subword (target
, 1, 1, mode
), t1
);
2703 /* Try calculating (parity x) as (and (popcount x) 1), where
2704 popcount can also be done in a wider mode. */
2706 expand_parity (enum machine_mode mode
, rtx op0
, rtx target
)
2708 enum mode_class mclass
= GET_MODE_CLASS (mode
);
2709 if (CLASS_HAS_WIDER_MODES_P (mclass
))
2711 enum machine_mode wider_mode
;
2712 for (wider_mode
= mode
; wider_mode
!= VOIDmode
;
2713 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2715 if (optab_handler (popcount_optab
, wider_mode
) != CODE_FOR_nothing
)
2717 rtx xop0
, temp
, last
;
2719 last
= get_last_insn ();
2722 target
= gen_reg_rtx (mode
);
2723 xop0
= widen_operand (op0
, wider_mode
, mode
, true, false);
2724 temp
= expand_unop (wider_mode
, popcount_optab
, xop0
, NULL_RTX
,
2727 temp
= expand_binop (wider_mode
, and_optab
, temp
, const1_rtx
,
2728 target
, true, OPTAB_DIRECT
);
2730 delete_insns_since (last
);
2739 /* Try calculating ctz(x) as K - clz(x & -x) ,
2740 where K is GET_MODE_BITSIZE(mode) - 1.
2742 Both __builtin_ctz and __builtin_clz are undefined at zero, so we
2743 don't have to worry about what the hardware does in that case. (If
2744 the clz instruction produces the usual value at 0, which is K, the
2745 result of this code sequence will be -1; expand_ffs, below, relies
2746 on this. It might be nice to have it be K instead, for consistency
2747 with the (very few) processors that provide a ctz with a defined
2748 value, but that would take one more instruction, and it would be
2749 less convenient for expand_ffs anyway. */
2752 expand_ctz (enum machine_mode mode
, rtx op0
, rtx target
)
2756 if (optab_handler (clz_optab
, mode
) == CODE_FOR_nothing
)
2761 temp
= expand_unop_direct (mode
, neg_optab
, op0
, NULL_RTX
, true);
2763 temp
= expand_binop (mode
, and_optab
, op0
, temp
, NULL_RTX
,
2764 true, OPTAB_DIRECT
);
2766 temp
= expand_unop_direct (mode
, clz_optab
, temp
, NULL_RTX
, true);
2768 temp
= expand_binop (mode
, sub_optab
, GEN_INT (GET_MODE_BITSIZE (mode
) - 1),
2770 true, OPTAB_DIRECT
);
2780 add_equal_note (seq
, temp
, CTZ
, op0
, 0);
2786 /* Try calculating ffs(x) using ctz(x) if we have that instruction, or
2787 else with the sequence used by expand_clz.
2789 The ffs builtin promises to return zero for a zero value and ctz/clz
2790 may have an undefined value in that case. If they do not give us a
2791 convenient value, we have to generate a test and branch. */
2793 expand_ffs (enum machine_mode mode
, rtx op0
, rtx target
)
2795 HOST_WIDE_INT val
= 0;
2796 bool defined_at_zero
= false;
2799 if (optab_handler (ctz_optab
, mode
) != CODE_FOR_nothing
)
2803 temp
= expand_unop_direct (mode
, ctz_optab
, op0
, 0, true);
2807 defined_at_zero
= (CTZ_DEFINED_VALUE_AT_ZERO (mode
, val
) == 2);
2809 else if (optab_handler (clz_optab
, mode
) != CODE_FOR_nothing
)
2812 temp
= expand_ctz (mode
, op0
, 0);
2816 if (CLZ_DEFINED_VALUE_AT_ZERO (mode
, val
) == 2)
2818 defined_at_zero
= true;
2819 val
= (GET_MODE_BITSIZE (mode
) - 1) - val
;
2825 if (defined_at_zero
&& val
== -1)
2826 /* No correction needed at zero. */;
2829 /* We don't try to do anything clever with the situation found
2830 on some processors (eg Alpha) where ctz(0:mode) ==
2831 bitsize(mode). If someone can think of a way to send N to -1
2832 and leave alone all values in the range 0..N-1 (where N is a
2833 power of two), cheaper than this test-and-branch, please add it.
2835 The test-and-branch is done after the operation itself, in case
2836 the operation sets condition codes that can be recycled for this.
2837 (This is true on i386, for instance.) */
2839 rtx nonzero_label
= gen_label_rtx ();
2840 emit_cmp_and_jump_insns (op0
, CONST0_RTX (mode
), NE
, 0,
2841 mode
, true, nonzero_label
);
2843 convert_move (temp
, GEN_INT (-1), false);
2844 emit_label (nonzero_label
);
2847 /* temp now has a value in the range -1..bitsize-1. ffs is supposed
2848 to produce a value in the range 0..bitsize. */
2849 temp
= expand_binop (mode
, add_optab
, temp
, GEN_INT (1),
2850 target
, false, OPTAB_DIRECT
);
2857 add_equal_note (seq
, temp
, FFS
, op0
, 0);
2866 /* Extract the OMODE lowpart from VAL, which has IMODE. Under certain
2867 conditions, VAL may already be a SUBREG against which we cannot generate
2868 a further SUBREG. In this case, we expect forcing the value into a
2869 register will work around the situation. */
2872 lowpart_subreg_maybe_copy (enum machine_mode omode
, rtx val
,
2873 enum machine_mode imode
)
2876 ret
= lowpart_subreg (omode
, val
, imode
);
2879 val
= force_reg (imode
, val
);
2880 ret
= lowpart_subreg (omode
, val
, imode
);
2881 gcc_assert (ret
!= NULL
);
2886 /* Expand a floating point absolute value or negation operation via a
2887 logical operation on the sign bit. */
2890 expand_absneg_bit (enum rtx_code code
, enum machine_mode mode
,
2891 rtx op0
, rtx target
)
2893 const struct real_format
*fmt
;
2894 int bitpos
, word
, nwords
, i
;
2895 enum machine_mode imode
;
2899 /* The format has to have a simple sign bit. */
2900 fmt
= REAL_MODE_FORMAT (mode
);
2904 bitpos
= fmt
->signbit_rw
;
2908 /* Don't create negative zeros if the format doesn't support them. */
2909 if (code
== NEG
&& !fmt
->has_signed_zero
)
2912 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
2914 imode
= int_mode_for_mode (mode
);
2915 if (imode
== BLKmode
)
2924 if (FLOAT_WORDS_BIG_ENDIAN
)
2925 word
= (GET_MODE_BITSIZE (mode
) - bitpos
) / BITS_PER_WORD
;
2927 word
= bitpos
/ BITS_PER_WORD
;
2928 bitpos
= bitpos
% BITS_PER_WORD
;
2929 nwords
= (GET_MODE_BITSIZE (mode
) + BITS_PER_WORD
- 1) / BITS_PER_WORD
;
2932 mask
= double_int_setbit (double_int_zero
, bitpos
);
2934 mask
= double_int_not (mask
);
2936 if (target
== 0 || target
== op0
)
2937 target
= gen_reg_rtx (mode
);
2943 for (i
= 0; i
< nwords
; ++i
)
2945 rtx targ_piece
= operand_subword (target
, i
, 1, mode
);
2946 rtx op0_piece
= operand_subword_force (op0
, i
, mode
);
2950 temp
= expand_binop (imode
, code
== ABS
? and_optab
: xor_optab
,
2952 immed_double_int_const (mask
, imode
),
2953 targ_piece
, 1, OPTAB_LIB_WIDEN
);
2954 if (temp
!= targ_piece
)
2955 emit_move_insn (targ_piece
, temp
);
2958 emit_move_insn (targ_piece
, op0_piece
);
2961 insns
= get_insns ();
2968 temp
= expand_binop (imode
, code
== ABS
? and_optab
: xor_optab
,
2969 gen_lowpart (imode
, op0
),
2970 immed_double_int_const (mask
, imode
),
2971 gen_lowpart (imode
, target
), 1, OPTAB_LIB_WIDEN
);
2972 target
= lowpart_subreg_maybe_copy (mode
, temp
, imode
);
2974 set_unique_reg_note (get_last_insn (), REG_EQUAL
,
2975 gen_rtx_fmt_e (code
, mode
, copy_rtx (op0
)));
2981 /* As expand_unop, but will fail rather than attempt the operation in a
2982 different mode or with a libcall. */
2984 expand_unop_direct (enum machine_mode mode
, optab unoptab
, rtx op0
, rtx target
,
2987 if (optab_handler (unoptab
, mode
) != CODE_FOR_nothing
)
2989 int icode
= (int) optab_handler (unoptab
, mode
);
2990 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
2992 rtx last
= get_last_insn ();
2998 temp
= gen_reg_rtx (mode
);
3000 if (GET_MODE (xop0
) != VOIDmode
3001 && GET_MODE (xop0
) != mode0
)
3002 xop0
= convert_to_mode (mode0
, xop0
, unsignedp
);
3004 /* Now, if insn doesn't accept our operand, put it into a pseudo. */
3006 if (!insn_data
[icode
].operand
[1].predicate (xop0
, mode0
))
3007 xop0
= copy_to_mode_reg (mode0
, xop0
);
3009 if (!insn_data
[icode
].operand
[0].predicate (temp
, mode
))
3010 temp
= gen_reg_rtx (mode
);
3012 pat
= GEN_FCN (icode
) (temp
, xop0
);
3015 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
3016 && ! add_equal_note (pat
, temp
, unoptab
->code
, xop0
, NULL_RTX
))
3018 delete_insns_since (last
);
3019 return expand_unop (mode
, unoptab
, op0
, NULL_RTX
, unsignedp
);
3027 delete_insns_since (last
);
3032 /* Generate code to perform an operation specified by UNOPTAB
3033 on operand OP0, with result having machine-mode MODE.
3035 UNSIGNEDP is for the case where we have to widen the operands
3036 to perform the operation. It says to use zero-extension.
3038 If TARGET is nonzero, the value
3039 is generated there, if it is convenient to do so.
3040 In all cases an rtx is returned for the locus of the value;
3041 this may or may not be TARGET. */
3044 expand_unop (enum machine_mode mode
, optab unoptab
, rtx op0
, rtx target
,
3047 enum mode_class mclass
= GET_MODE_CLASS (mode
);
3048 enum machine_mode wider_mode
;
3052 temp
= expand_unop_direct (mode
, unoptab
, op0
, target
, unsignedp
);
3056 /* It can't be done in this mode. Can we open-code it in a wider mode? */
3058 /* Widening (or narrowing) clz needs special treatment. */
3059 if (unoptab
== clz_optab
)
3061 temp
= widen_clz (mode
, op0
, target
);
3065 if (GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
3066 && optab_handler (unoptab
, word_mode
) != CODE_FOR_nothing
)
3068 temp
= expand_doubleword_clz (mode
, op0
, target
);
3076 /* Widening (or narrowing) bswap needs special treatment. */
3077 if (unoptab
== bswap_optab
)
3079 temp
= widen_bswap (mode
, op0
, target
);
3083 if (GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
3084 && optab_handler (unoptab
, word_mode
) != CODE_FOR_nothing
)
3086 temp
= expand_doubleword_bswap (mode
, op0
, target
);
3094 if (CLASS_HAS_WIDER_MODES_P (mclass
))
3095 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
3096 wider_mode
!= VOIDmode
;
3097 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
3099 if (optab_handler (unoptab
, wider_mode
) != CODE_FOR_nothing
)
3102 rtx last
= get_last_insn ();
3104 /* For certain operations, we need not actually extend
3105 the narrow operand, as long as we will truncate the
3106 results to the same narrowness. */
3108 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
,
3109 (unoptab
== neg_optab
3110 || unoptab
== one_cmpl_optab
)
3111 && mclass
== MODE_INT
);
3113 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
3118 if (mclass
!= MODE_INT
3119 || !TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode
),
3120 GET_MODE_BITSIZE (wider_mode
)))
3123 target
= gen_reg_rtx (mode
);
3124 convert_move (target
, temp
, 0);
3128 return gen_lowpart (mode
, temp
);
3131 delete_insns_since (last
);
3135 /* These can be done a word at a time. */
3136 if (unoptab
== one_cmpl_optab
3137 && mclass
== MODE_INT
3138 && GET_MODE_SIZE (mode
) > UNITS_PER_WORD
3139 && optab_handler (unoptab
, word_mode
) != CODE_FOR_nothing
)
3144 if (target
== 0 || target
== op0
)
3145 target
= gen_reg_rtx (mode
);
3149 /* Do the actual arithmetic. */
3150 for (i
= 0; i
< GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
; i
++)
3152 rtx target_piece
= operand_subword (target
, i
, 1, mode
);
3153 rtx x
= expand_unop (word_mode
, unoptab
,
3154 operand_subword_force (op0
, i
, mode
),
3155 target_piece
, unsignedp
);
3157 if (target_piece
!= x
)
3158 emit_move_insn (target_piece
, x
);
3161 insns
= get_insns ();
3168 if (unoptab
->code
== NEG
)
3170 /* Try negating floating point values by flipping the sign bit. */
3171 if (SCALAR_FLOAT_MODE_P (mode
))
3173 temp
= expand_absneg_bit (NEG
, mode
, op0
, target
);
3178 /* If there is no negation pattern, and we have no negative zero,
3179 try subtracting from zero. */
3180 if (!HONOR_SIGNED_ZEROS (mode
))
3182 temp
= expand_binop (mode
, (unoptab
== negv_optab
3183 ? subv_optab
: sub_optab
),
3184 CONST0_RTX (mode
), op0
, target
,
3185 unsignedp
, OPTAB_DIRECT
);
3191 /* Try calculating parity (x) as popcount (x) % 2. */
3192 if (unoptab
== parity_optab
)
3194 temp
= expand_parity (mode
, op0
, target
);
3199 /* Try implementing ffs (x) in terms of clz (x). */
3200 if (unoptab
== ffs_optab
)
3202 temp
= expand_ffs (mode
, op0
, target
);
3207 /* Try implementing ctz (x) in terms of clz (x). */
3208 if (unoptab
== ctz_optab
)
3210 temp
= expand_ctz (mode
, op0
, target
);
3216 /* Now try a library call in this mode. */
3217 libfunc
= optab_libfunc (unoptab
, mode
);
3223 enum machine_mode outmode
= mode
;
3225 /* All of these functions return small values. Thus we choose to
3226 have them return something that isn't a double-word. */
3227 if (unoptab
== ffs_optab
|| unoptab
== clz_optab
|| unoptab
== ctz_optab
3228 || unoptab
== popcount_optab
|| unoptab
== parity_optab
)
3230 = GET_MODE (hard_libcall_value (TYPE_MODE (integer_type_node
),
3231 optab_libfunc (unoptab
, mode
)));
3235 /* Pass 1 for NO_QUEUE so we don't lose any increments
3236 if the libcall is cse'd or moved. */
3237 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
, outmode
,
3239 insns
= get_insns ();
3242 target
= gen_reg_rtx (outmode
);
3243 eq_value
= gen_rtx_fmt_e (unoptab
->code
, mode
, op0
);
3244 if (GET_MODE_SIZE (outmode
) < GET_MODE_SIZE (mode
))
3245 eq_value
= simplify_gen_unary (TRUNCATE
, outmode
, eq_value
, mode
);
3246 else if (GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (mode
))
3247 eq_value
= simplify_gen_unary (ZERO_EXTEND
, outmode
, eq_value
, mode
);
3248 emit_libcall_block (insns
, target
, value
, eq_value
);
3253 /* It can't be done in this mode. Can we do it in a wider mode? */
3255 if (CLASS_HAS_WIDER_MODES_P (mclass
))
3257 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
3258 wider_mode
!= VOIDmode
;
3259 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
3261 if (optab_handler (unoptab
, wider_mode
) != CODE_FOR_nothing
3262 || optab_libfunc (unoptab
, wider_mode
))
3265 rtx last
= get_last_insn ();
3267 /* For certain operations, we need not actually extend
3268 the narrow operand, as long as we will truncate the
3269 results to the same narrowness. */
3271 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
,
3272 (unoptab
== neg_optab
3273 || unoptab
== one_cmpl_optab
)
3274 && mclass
== MODE_INT
);
3276 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
3279 /* If we are generating clz using wider mode, adjust the
3281 if (unoptab
== clz_optab
&& temp
!= 0)
3282 temp
= expand_binop (wider_mode
, sub_optab
, temp
,
3283 GEN_INT (GET_MODE_BITSIZE (wider_mode
)
3284 - GET_MODE_BITSIZE (mode
)),
3285 target
, true, OPTAB_DIRECT
);
3289 if (mclass
!= MODE_INT
)
3292 target
= gen_reg_rtx (mode
);
3293 convert_move (target
, temp
, 0);
3297 return gen_lowpart (mode
, temp
);
3300 delete_insns_since (last
);
3305 /* One final attempt at implementing negation via subtraction,
3306 this time allowing widening of the operand. */
3307 if (unoptab
->code
== NEG
&& !HONOR_SIGNED_ZEROS (mode
))
3310 temp
= expand_binop (mode
,
3311 unoptab
== negv_optab
? subv_optab
: sub_optab
,
3312 CONST0_RTX (mode
), op0
,
3313 target
, unsignedp
, OPTAB_LIB_WIDEN
);
3321 /* Emit code to compute the absolute value of OP0, with result to
3322 TARGET if convenient. (TARGET may be 0.) The return value says
3323 where the result actually is to be found.
3325 MODE is the mode of the operand; the mode of the result is
3326 different but can be deduced from MODE.
3331 expand_abs_nojump (enum machine_mode mode
, rtx op0
, rtx target
,
3332 int result_unsignedp
)
3337 result_unsignedp
= 1;
3339 /* First try to do it with a special abs instruction. */
3340 temp
= expand_unop (mode
, result_unsignedp
? abs_optab
: absv_optab
,
3345 /* For floating point modes, try clearing the sign bit. */
3346 if (SCALAR_FLOAT_MODE_P (mode
))
3348 temp
= expand_absneg_bit (ABS
, mode
, op0
, target
);
3353 /* If we have a MAX insn, we can do this as MAX (x, -x). */
3354 if (optab_handler (smax_optab
, mode
) != CODE_FOR_nothing
3355 && !HONOR_SIGNED_ZEROS (mode
))
3357 rtx last
= get_last_insn ();
3359 temp
= expand_unop (mode
, neg_optab
, op0
, NULL_RTX
, 0);
3361 temp
= expand_binop (mode
, smax_optab
, op0
, temp
, target
, 0,
3367 delete_insns_since (last
);
3370 /* If this machine has expensive jumps, we can do integer absolute
3371 value of X as (((signed) x >> (W-1)) ^ x) - ((signed) x >> (W-1)),
3372 where W is the width of MODE. */
3374 if (GET_MODE_CLASS (mode
) == MODE_INT
3375 && BRANCH_COST (optimize_insn_for_speed_p (),
3378 rtx extended
= expand_shift (RSHIFT_EXPR
, mode
, op0
,
3379 size_int (GET_MODE_BITSIZE (mode
) - 1),
3382 temp
= expand_binop (mode
, xor_optab
, extended
, op0
, target
, 0,
3385 temp
= expand_binop (mode
, result_unsignedp
? sub_optab
: subv_optab
,
3386 temp
, extended
, target
, 0, OPTAB_LIB_WIDEN
);
3396 expand_abs (enum machine_mode mode
, rtx op0
, rtx target
,
3397 int result_unsignedp
, int safe
)
3402 result_unsignedp
= 1;
3404 temp
= expand_abs_nojump (mode
, op0
, target
, result_unsignedp
);
3408 /* If that does not win, use conditional jump and negate. */
3410 /* It is safe to use the target if it is the same
3411 as the source if this is also a pseudo register */
3412 if (op0
== target
&& REG_P (op0
)
3413 && REGNO (op0
) >= FIRST_PSEUDO_REGISTER
)
3416 op1
= gen_label_rtx ();
3417 if (target
== 0 || ! safe
3418 || GET_MODE (target
) != mode
3419 || (MEM_P (target
) && MEM_VOLATILE_P (target
))
3421 && REGNO (target
) < FIRST_PSEUDO_REGISTER
))
3422 target
= gen_reg_rtx (mode
);
3424 emit_move_insn (target
, op0
);
3427 do_compare_rtx_and_jump (target
, CONST0_RTX (mode
), GE
, 0, mode
,
3428 NULL_RTX
, NULL_RTX
, op1
, -1);
3430 op0
= expand_unop (mode
, result_unsignedp
? neg_optab
: negv_optab
,
3433 emit_move_insn (target
, op0
);
3439 /* Emit code to compute the one's complement absolute value of OP0
3440 (if (OP0 < 0) OP0 = ~OP0), with result to TARGET if convenient.
3441 (TARGET may be NULL_RTX.) The return value says where the result
3442 actually is to be found.
3444 MODE is the mode of the operand; the mode of the result is
3445 different but can be deduced from MODE. */
3448 expand_one_cmpl_abs_nojump (enum machine_mode mode
, rtx op0
, rtx target
)
3452 /* Not applicable for floating point modes. */
3453 if (FLOAT_MODE_P (mode
))
3456 /* If we have a MAX insn, we can do this as MAX (x, ~x). */
3457 if (optab_handler (smax_optab
, mode
) != CODE_FOR_nothing
)
3459 rtx last
= get_last_insn ();
3461 temp
= expand_unop (mode
, one_cmpl_optab
, op0
, NULL_RTX
, 0);
3463 temp
= expand_binop (mode
, smax_optab
, op0
, temp
, target
, 0,
3469 delete_insns_since (last
);
3472 /* If this machine has expensive jumps, we can do one's complement
3473 absolute value of X as (((signed) x >> (W-1)) ^ x). */
3475 if (GET_MODE_CLASS (mode
) == MODE_INT
3476 && BRANCH_COST (optimize_insn_for_speed_p (),
3479 rtx extended
= expand_shift (RSHIFT_EXPR
, mode
, op0
,
3480 size_int (GET_MODE_BITSIZE (mode
) - 1),
3483 temp
= expand_binop (mode
, xor_optab
, extended
, op0
, target
, 0,
3493 /* A subroutine of expand_copysign, perform the copysign operation using the
3494 abs and neg primitives advertised to exist on the target. The assumption
3495 is that we have a split register file, and leaving op0 in fp registers,
3496 and not playing with subregs so much, will help the register allocator. */
3499 expand_copysign_absneg (enum machine_mode mode
, rtx op0
, rtx op1
, rtx target
,
3500 int bitpos
, bool op0_is_abs
)
3502 enum machine_mode imode
;
3509 /* Check if the back end provides an insn that handles signbit for the
3511 icode
= (int) optab_handler (signbit_optab
, mode
);
3512 if (icode
!= CODE_FOR_nothing
)
3514 imode
= insn_data
[icode
].operand
[0].mode
;
3515 sign
= gen_reg_rtx (imode
);
3516 emit_unop_insn (icode
, sign
, op1
, UNKNOWN
);
3522 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
3524 imode
= int_mode_for_mode (mode
);
3525 if (imode
== BLKmode
)
3527 op1
= gen_lowpart (imode
, op1
);
3534 if (FLOAT_WORDS_BIG_ENDIAN
)
3535 word
= (GET_MODE_BITSIZE (mode
) - bitpos
) / BITS_PER_WORD
;
3537 word
= bitpos
/ BITS_PER_WORD
;
3538 bitpos
= bitpos
% BITS_PER_WORD
;
3539 op1
= operand_subword_force (op1
, word
, mode
);
3542 mask
= double_int_setbit (double_int_zero
, bitpos
);
3544 sign
= expand_binop (imode
, and_optab
, op1
,
3545 immed_double_int_const (mask
, imode
),
3546 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3551 op0
= expand_unop (mode
, abs_optab
, op0
, target
, 0);
3558 if (target
== NULL_RTX
)
3559 target
= copy_to_reg (op0
);
3561 emit_move_insn (target
, op0
);
3564 label
= gen_label_rtx ();
3565 emit_cmp_and_jump_insns (sign
, const0_rtx
, EQ
, NULL_RTX
, imode
, 1, label
);
3567 if (GET_CODE (op0
) == CONST_DOUBLE
)
3568 op0
= simplify_unary_operation (NEG
, mode
, op0
, mode
);
3570 op0
= expand_unop (mode
, neg_optab
, op0
, target
, 0);
3572 emit_move_insn (target
, op0
);
3580 /* A subroutine of expand_copysign, perform the entire copysign operation
3581 with integer bitmasks. BITPOS is the position of the sign bit; OP0_IS_ABS
3582 is true if op0 is known to have its sign bit clear. */
3585 expand_copysign_bit (enum machine_mode mode
, rtx op0
, rtx op1
, rtx target
,
3586 int bitpos
, bool op0_is_abs
)
3588 enum machine_mode imode
;
3590 int word
, nwords
, i
;
3593 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
3595 imode
= int_mode_for_mode (mode
);
3596 if (imode
== BLKmode
)
3605 if (FLOAT_WORDS_BIG_ENDIAN
)
3606 word
= (GET_MODE_BITSIZE (mode
) - bitpos
) / BITS_PER_WORD
;
3608 word
= bitpos
/ BITS_PER_WORD
;
3609 bitpos
= bitpos
% BITS_PER_WORD
;
3610 nwords
= (GET_MODE_BITSIZE (mode
) + BITS_PER_WORD
- 1) / BITS_PER_WORD
;
3613 mask
= double_int_setbit (double_int_zero
, bitpos
);
3615 if (target
== 0 || target
== op0
|| target
== op1
)
3616 target
= gen_reg_rtx (mode
);
3622 for (i
= 0; i
< nwords
; ++i
)
3624 rtx targ_piece
= operand_subword (target
, i
, 1, mode
);
3625 rtx op0_piece
= operand_subword_force (op0
, i
, mode
);
3631 = expand_binop (imode
, and_optab
, op0_piece
,
3632 immed_double_int_const (double_int_not (mask
),
3634 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3636 op1
= expand_binop (imode
, and_optab
,
3637 operand_subword_force (op1
, i
, mode
),
3638 immed_double_int_const (mask
, imode
),
3639 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3641 temp
= expand_binop (imode
, ior_optab
, op0_piece
, op1
,
3642 targ_piece
, 1, OPTAB_LIB_WIDEN
);
3643 if (temp
!= targ_piece
)
3644 emit_move_insn (targ_piece
, temp
);
3647 emit_move_insn (targ_piece
, op0_piece
);
3650 insns
= get_insns ();
3657 op1
= expand_binop (imode
, and_optab
, gen_lowpart (imode
, op1
),
3658 immed_double_int_const (mask
, imode
),
3659 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3661 op0
= gen_lowpart (imode
, op0
);
3663 op0
= expand_binop (imode
, and_optab
, op0
,
3664 immed_double_int_const (double_int_not (mask
),
3666 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3668 temp
= expand_binop (imode
, ior_optab
, op0
, op1
,
3669 gen_lowpart (imode
, target
), 1, OPTAB_LIB_WIDEN
);
3670 target
= lowpart_subreg_maybe_copy (mode
, temp
, imode
);
3676 /* Expand the C99 copysign operation. OP0 and OP1 must be the same
3677 scalar floating point mode. Return NULL if we do not know how to
3678 expand the operation inline. */
3681 expand_copysign (rtx op0
, rtx op1
, rtx target
)
3683 enum machine_mode mode
= GET_MODE (op0
);
3684 const struct real_format
*fmt
;
3688 gcc_assert (SCALAR_FLOAT_MODE_P (mode
));
3689 gcc_assert (GET_MODE (op1
) == mode
);
3691 /* First try to do it with a special instruction. */
3692 temp
= expand_binop (mode
, copysign_optab
, op0
, op1
,
3693 target
, 0, OPTAB_DIRECT
);
3697 fmt
= REAL_MODE_FORMAT (mode
);
3698 if (fmt
== NULL
|| !fmt
->has_signed_zero
)
3702 if (GET_CODE (op0
) == CONST_DOUBLE
)
3704 if (real_isneg (CONST_DOUBLE_REAL_VALUE (op0
)))
3705 op0
= simplify_unary_operation (ABS
, mode
, op0
, mode
);
3709 if (fmt
->signbit_ro
>= 0
3710 && (GET_CODE (op0
) == CONST_DOUBLE
3711 || (optab_handler (neg_optab
, mode
) != CODE_FOR_nothing
3712 && optab_handler (abs_optab
, mode
) != CODE_FOR_nothing
)))
3714 temp
= expand_copysign_absneg (mode
, op0
, op1
, target
,
3715 fmt
->signbit_ro
, op0_is_abs
);
3720 if (fmt
->signbit_rw
< 0)
3722 return expand_copysign_bit (mode
, op0
, op1
, target
,
3723 fmt
->signbit_rw
, op0_is_abs
);
3726 /* Generate an instruction whose insn-code is INSN_CODE,
3727 with two operands: an output TARGET and an input OP0.
3728 TARGET *must* be nonzero, and the output is always stored there.
3729 CODE is an rtx code such that (CODE OP0) is an rtx that describes
3730 the value that is stored into TARGET.
3732 Return false if expansion failed. */
3735 maybe_emit_unop_insn (int icode
, rtx target
, rtx op0
, enum rtx_code code
)
3738 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
3740 rtx last
= get_last_insn ();
3744 /* Now, if insn does not accept our operands, put them into pseudos. */
3746 if (!insn_data
[icode
].operand
[1].predicate (op0
, mode0
))
3747 op0
= copy_to_mode_reg (mode0
, op0
);
3749 if (!insn_data
[icode
].operand
[0].predicate (temp
, GET_MODE (temp
)))
3750 temp
= gen_reg_rtx (GET_MODE (temp
));
3752 pat
= GEN_FCN (icode
) (temp
, op0
);
3755 delete_insns_since (last
);
3759 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
&& code
!= UNKNOWN
)
3760 add_equal_note (pat
, temp
, code
, op0
, NULL_RTX
);
3765 emit_move_insn (target
, temp
);
3768 /* Generate an instruction whose insn-code is INSN_CODE,
3769 with two operands: an output TARGET and an input OP0.
3770 TARGET *must* be nonzero, and the output is always stored there.
3771 CODE is an rtx code such that (CODE OP0) is an rtx that describes
3772 the value that is stored into TARGET. */
3775 emit_unop_insn (int icode
, rtx target
, rtx op0
, enum rtx_code code
)
3777 bool ok
= maybe_emit_unop_insn (icode
, target
, op0
, code
);
3781 struct no_conflict_data
3783 rtx target
, first
, insn
;
3787 /* Called via note_stores by emit_libcall_block. Set P->must_stay if
3788 the currently examined clobber / store has to stay in the list of
3789 insns that constitute the actual libcall block. */
3791 no_conflict_move_test (rtx dest
, const_rtx set
, void *p0
)
3793 struct no_conflict_data
*p
= (struct no_conflict_data
*) p0
;
3795 /* If this inns directly contributes to setting the target, it must stay. */
3796 if (reg_overlap_mentioned_p (p
->target
, dest
))
3797 p
->must_stay
= true;
3798 /* If we haven't committed to keeping any other insns in the list yet,
3799 there is nothing more to check. */
3800 else if (p
->insn
== p
->first
)
3802 /* If this insn sets / clobbers a register that feeds one of the insns
3803 already in the list, this insn has to stay too. */
3804 else if (reg_overlap_mentioned_p (dest
, PATTERN (p
->first
))
3805 || (CALL_P (p
->first
) && (find_reg_fusage (p
->first
, USE
, dest
)))
3806 || reg_used_between_p (dest
, p
->first
, p
->insn
)
3807 /* Likewise if this insn depends on a register set by a previous
3808 insn in the list, or if it sets a result (presumably a hard
3809 register) that is set or clobbered by a previous insn.
3810 N.B. the modified_*_p (SET_DEST...) tests applied to a MEM
3811 SET_DEST perform the former check on the address, and the latter
3812 check on the MEM. */
3813 || (GET_CODE (set
) == SET
3814 && (modified_in_p (SET_SRC (set
), p
->first
)
3815 || modified_in_p (SET_DEST (set
), p
->first
)
3816 || modified_between_p (SET_SRC (set
), p
->first
, p
->insn
)
3817 || modified_between_p (SET_DEST (set
), p
->first
, p
->insn
))))
3818 p
->must_stay
= true;
3822 /* Emit code to make a call to a constant function or a library call.
3824 INSNS is a list containing all insns emitted in the call.
3825 These insns leave the result in RESULT. Our block is to copy RESULT
3826 to TARGET, which is logically equivalent to EQUIV.
3828 We first emit any insns that set a pseudo on the assumption that these are
3829 loading constants into registers; doing so allows them to be safely cse'ed
3830 between blocks. Then we emit all the other insns in the block, followed by
3831 an insn to move RESULT to TARGET. This last insn will have a REQ_EQUAL
3832 note with an operand of EQUIV. */
3835 emit_libcall_block (rtx insns
, rtx target
, rtx result
, rtx equiv
)
3837 rtx final_dest
= target
;
3838 rtx next
, last
, insn
;
3840 /* If this is a reg with REG_USERVAR_P set, then it could possibly turn
3841 into a MEM later. Protect the libcall block from this change. */
3842 if (! REG_P (target
) || REG_USERVAR_P (target
))
3843 target
= gen_reg_rtx (GET_MODE (target
));
3845 /* If we're using non-call exceptions, a libcall corresponding to an
3846 operation that may trap may also trap. */
3847 /* ??? See the comment in front of make_reg_eh_region_note. */
3848 if (cfun
->can_throw_non_call_exceptions
&& may_trap_p (equiv
))
3850 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
3853 rtx note
= find_reg_note (insn
, REG_EH_REGION
, NULL_RTX
);
3856 int lp_nr
= INTVAL (XEXP (note
, 0));
3857 if (lp_nr
== 0 || lp_nr
== INT_MIN
)
3858 remove_note (insn
, note
);
3864 /* Look for any CALL_INSNs in this sequence, and attach a REG_EH_REGION
3865 reg note to indicate that this call cannot throw or execute a nonlocal
3866 goto (unless there is already a REG_EH_REGION note, in which case
3868 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
3870 make_reg_eh_region_note_nothrow_nononlocal (insn
);
3873 /* First emit all insns that set pseudos. Remove them from the list as
3874 we go. Avoid insns that set pseudos which were referenced in previous
3875 insns. These can be generated by move_by_pieces, for example,
3876 to update an address. Similarly, avoid insns that reference things
3877 set in previous insns. */
3879 for (insn
= insns
; insn
; insn
= next
)
3881 rtx set
= single_set (insn
);
3883 next
= NEXT_INSN (insn
);
3885 if (set
!= 0 && REG_P (SET_DEST (set
))
3886 && REGNO (SET_DEST (set
)) >= FIRST_PSEUDO_REGISTER
)
3888 struct no_conflict_data data
;
3890 data
.target
= const0_rtx
;
3894 note_stores (PATTERN (insn
), no_conflict_move_test
, &data
);
3895 if (! data
.must_stay
)
3897 if (PREV_INSN (insn
))
3898 NEXT_INSN (PREV_INSN (insn
)) = next
;
3903 PREV_INSN (next
) = PREV_INSN (insn
);
3909 /* Some ports use a loop to copy large arguments onto the stack.
3910 Don't move anything outside such a loop. */
3915 /* Write the remaining insns followed by the final copy. */
3916 for (insn
= insns
; insn
; insn
= next
)
3918 next
= NEXT_INSN (insn
);
3923 last
= emit_move_insn (target
, result
);
3924 if (optab_handler (mov_optab
, GET_MODE (target
)) != CODE_FOR_nothing
)
3925 set_unique_reg_note (last
, REG_EQUAL
, copy_rtx (equiv
));
3927 if (final_dest
!= target
)
3928 emit_move_insn (final_dest
, target
);
3931 /* Nonzero if we can perform a comparison of mode MODE straightforwardly.
3932 PURPOSE describes how this comparison will be used. CODE is the rtx
3933 comparison code we will be using.
3935 ??? Actually, CODE is slightly weaker than that. A target is still
3936 required to implement all of the normal bcc operations, but not
3937 required to implement all (or any) of the unordered bcc operations. */
3940 can_compare_p (enum rtx_code code
, enum machine_mode mode
,
3941 enum can_compare_purpose purpose
)
3944 test
= gen_rtx_fmt_ee (code
, mode
, const0_rtx
, const0_rtx
);
3949 if (purpose
== ccp_jump
3950 && (icode
= optab_handler (cbranch_optab
, mode
)) != CODE_FOR_nothing
3951 && insn_data
[icode
].operand
[0].predicate (test
, mode
))
3953 if (purpose
== ccp_store_flag
3954 && (icode
= optab_handler (cstore_optab
, mode
)) != CODE_FOR_nothing
3955 && insn_data
[icode
].operand
[1].predicate (test
, mode
))
3957 if (purpose
== ccp_cmov
3958 && optab_handler (cmov_optab
, mode
) != CODE_FOR_nothing
)
3961 mode
= GET_MODE_WIDER_MODE (mode
);
3962 PUT_MODE (test
, mode
);
3964 while (mode
!= VOIDmode
);
3969 /* This function is called when we are going to emit a compare instruction that
3970 compares the values found in *PX and *PY, using the rtl operator COMPARISON.
3972 *PMODE is the mode of the inputs (in case they are const_int).
3973 *PUNSIGNEDP nonzero says that the operands are unsigned;
3974 this matters if they need to be widened (as given by METHODS).
3976 If they have mode BLKmode, then SIZE specifies the size of both operands.
3978 This function performs all the setup necessary so that the caller only has
3979 to emit a single comparison insn. This setup can involve doing a BLKmode
3980 comparison or emitting a library call to perform the comparison if no insn
3981 is available to handle it.
3982 The values which are passed in through pointers can be modified; the caller
3983 should perform the comparison on the modified values. Constant
3984 comparisons must have already been folded. */
3987 prepare_cmp_insn (rtx x
, rtx y
, enum rtx_code comparison
, rtx size
,
3988 int unsignedp
, enum optab_methods methods
,
3989 rtx
*ptest
, enum machine_mode
*pmode
)
3991 enum machine_mode mode
= *pmode
;
3993 enum machine_mode cmp_mode
;
3994 enum mode_class mclass
;
3996 /* The other methods are not needed. */
3997 gcc_assert (methods
== OPTAB_DIRECT
|| methods
== OPTAB_WIDEN
3998 || methods
== OPTAB_LIB_WIDEN
);
4000 /* If we are optimizing, force expensive constants into a register. */
4001 if (CONSTANT_P (x
) && optimize
4002 && (rtx_cost (x
, COMPARE
, optimize_insn_for_speed_p ())
4003 > COSTS_N_INSNS (1)))
4004 x
= force_reg (mode
, x
);
4006 if (CONSTANT_P (y
) && optimize
4007 && (rtx_cost (y
, COMPARE
, optimize_insn_for_speed_p ())
4008 > COSTS_N_INSNS (1)))
4009 y
= force_reg (mode
, y
);
4012 /* Make sure if we have a canonical comparison. The RTL
4013 documentation states that canonical comparisons are required only
4014 for targets which have cc0. */
4015 gcc_assert (!CONSTANT_P (x
) || CONSTANT_P (y
));
4018 /* Don't let both operands fail to indicate the mode. */
4019 if (GET_MODE (x
) == VOIDmode
&& GET_MODE (y
) == VOIDmode
)
4020 x
= force_reg (mode
, x
);
4021 if (mode
== VOIDmode
)
4022 mode
= GET_MODE (x
) != VOIDmode
? GET_MODE (x
) : GET_MODE (y
);
4024 /* Handle all BLKmode compares. */
4026 if (mode
== BLKmode
)
4028 enum machine_mode result_mode
;
4029 enum insn_code cmp_code
;
4034 = GEN_INT (MIN (MEM_ALIGN (x
), MEM_ALIGN (y
)) / BITS_PER_UNIT
);
4038 /* Try to use a memory block compare insn - either cmpstr
4039 or cmpmem will do. */
4040 for (cmp_mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
4041 cmp_mode
!= VOIDmode
;
4042 cmp_mode
= GET_MODE_WIDER_MODE (cmp_mode
))
4044 cmp_code
= direct_optab_handler (cmpmem_optab
, cmp_mode
);
4045 if (cmp_code
== CODE_FOR_nothing
)
4046 cmp_code
= direct_optab_handler (cmpstr_optab
, cmp_mode
);
4047 if (cmp_code
== CODE_FOR_nothing
)
4048 cmp_code
= direct_optab_handler (cmpstrn_optab
, cmp_mode
);
4049 if (cmp_code
== CODE_FOR_nothing
)
4052 /* Must make sure the size fits the insn's mode. */
4053 if ((CONST_INT_P (size
)
4054 && INTVAL (size
) >= (1 << GET_MODE_BITSIZE (cmp_mode
)))
4055 || (GET_MODE_BITSIZE (GET_MODE (size
))
4056 > GET_MODE_BITSIZE (cmp_mode
)))
4059 result_mode
= insn_data
[cmp_code
].operand
[0].mode
;
4060 result
= gen_reg_rtx (result_mode
);
4061 size
= convert_to_mode (cmp_mode
, size
, 1);
4062 emit_insn (GEN_FCN (cmp_code
) (result
, x
, y
, size
, opalign
));
4064 *ptest
= gen_rtx_fmt_ee (comparison
, VOIDmode
, result
, const0_rtx
);
4065 *pmode
= result_mode
;
4069 if (methods
!= OPTAB_LIB
&& methods
!= OPTAB_LIB_WIDEN
)
4072 /* Otherwise call a library function, memcmp. */
4073 libfunc
= memcmp_libfunc
;
4074 length_type
= sizetype
;
4075 result_mode
= TYPE_MODE (integer_type_node
);
4076 cmp_mode
= TYPE_MODE (length_type
);
4077 size
= convert_to_mode (TYPE_MODE (length_type
), size
,
4078 TYPE_UNSIGNED (length_type
));
4080 result
= emit_library_call_value (libfunc
, 0, LCT_PURE
,
4086 *ptest
= gen_rtx_fmt_ee (comparison
, VOIDmode
, result
, const0_rtx
);
4087 *pmode
= result_mode
;
4091 /* Don't allow operands to the compare to trap, as that can put the
4092 compare and branch in different basic blocks. */
4093 if (cfun
->can_throw_non_call_exceptions
)
4096 x
= force_reg (mode
, x
);
4098 y
= force_reg (mode
, y
);
4101 if (GET_MODE_CLASS (mode
) == MODE_CC
)
4103 gcc_assert (can_compare_p (comparison
, CCmode
, ccp_jump
));
4104 *ptest
= gen_rtx_fmt_ee (comparison
, VOIDmode
, x
, y
);
4108 mclass
= GET_MODE_CLASS (mode
);
4109 test
= gen_rtx_fmt_ee (comparison
, VOIDmode
, x
, y
);
4113 enum insn_code icode
;
4114 icode
= optab_handler (cbranch_optab
, cmp_mode
);
4115 if (icode
!= CODE_FOR_nothing
4116 && insn_data
[icode
].operand
[0].predicate (test
, VOIDmode
))
4118 rtx last
= get_last_insn ();
4119 rtx op0
= prepare_operand (icode
, x
, 1, mode
, cmp_mode
, unsignedp
);
4120 rtx op1
= prepare_operand (icode
, y
, 2, mode
, cmp_mode
, unsignedp
);
4122 && insn_data
[icode
].operand
[1].predicate
4123 (op0
, insn_data
[icode
].operand
[1].mode
)
4124 && insn_data
[icode
].operand
[2].predicate
4125 (op1
, insn_data
[icode
].operand
[2].mode
))
4127 XEXP (test
, 0) = op0
;
4128 XEXP (test
, 1) = op1
;
4133 delete_insns_since (last
);
4136 if (methods
== OPTAB_DIRECT
|| !CLASS_HAS_WIDER_MODES_P (mclass
))
4138 cmp_mode
= GET_MODE_WIDER_MODE (cmp_mode
);
4140 while (cmp_mode
!= VOIDmode
);
4142 if (methods
!= OPTAB_LIB_WIDEN
)
4145 if (!SCALAR_FLOAT_MODE_P (mode
))
4149 /* Handle a libcall just for the mode we are using. */
4150 libfunc
= optab_libfunc (cmp_optab
, mode
);
4151 gcc_assert (libfunc
);
4153 /* If we want unsigned, and this mode has a distinct unsigned
4154 comparison routine, use that. */
4157 rtx ulibfunc
= optab_libfunc (ucmp_optab
, mode
);
4162 result
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
4163 targetm
.libgcc_cmp_return_mode (),
4164 2, x
, mode
, y
, mode
);
4166 /* There are two kinds of comparison routines. Biased routines
4167 return 0/1/2, and unbiased routines return -1/0/1. Other parts
4168 of gcc expect that the comparison operation is equivalent
4169 to the modified comparison. For signed comparisons compare the
4170 result against 1 in the biased case, and zero in the unbiased
4171 case. For unsigned comparisons always compare against 1 after
4172 biasing the unbiased result by adding 1. This gives us a way to
4177 if (!TARGET_LIB_INT_CMP_BIASED
)
4180 x
= plus_constant (result
, 1);
4186 prepare_cmp_insn (x
, y
, comparison
, NULL_RTX
, unsignedp
, methods
,
4190 prepare_float_lib_cmp (x
, y
, comparison
, ptest
, pmode
);
4198 /* Before emitting an insn with code ICODE, make sure that X, which is going
4199 to be used for operand OPNUM of the insn, is converted from mode MODE to
4200 WIDER_MODE (UNSIGNEDP determines whether it is an unsigned conversion), and
4201 that it is accepted by the operand predicate. Return the new value. */
4204 prepare_operand (int icode
, rtx x
, int opnum
, enum machine_mode mode
,
4205 enum machine_mode wider_mode
, int unsignedp
)
4207 if (mode
!= wider_mode
)
4208 x
= convert_modes (wider_mode
, mode
, x
, unsignedp
);
4210 if (!insn_data
[icode
].operand
[opnum
].predicate
4211 (x
, insn_data
[icode
].operand
[opnum
].mode
))
4213 if (reload_completed
)
4215 x
= copy_to_mode_reg (insn_data
[icode
].operand
[opnum
].mode
, x
);
4221 /* Subroutine of emit_cmp_and_jump_insns; this function is called when we know
4222 we can do the branch. */
4225 emit_cmp_and_jump_insn_1 (rtx test
, enum machine_mode mode
, rtx label
)
4227 enum machine_mode optab_mode
;
4228 enum mode_class mclass
;
4229 enum insn_code icode
;
4231 mclass
= GET_MODE_CLASS (mode
);
4232 optab_mode
= (mclass
== MODE_CC
) ? CCmode
: mode
;
4233 icode
= optab_handler (cbranch_optab
, optab_mode
);
4235 gcc_assert (icode
!= CODE_FOR_nothing
);
4236 gcc_assert (insn_data
[icode
].operand
[0].predicate (test
, VOIDmode
));
4237 emit_jump_insn (GEN_FCN (icode
) (test
, XEXP (test
, 0), XEXP (test
, 1), label
));
4240 /* Generate code to compare X with Y so that the condition codes are
4241 set and to jump to LABEL if the condition is true. If X is a
4242 constant and Y is not a constant, then the comparison is swapped to
4243 ensure that the comparison RTL has the canonical form.
4245 UNSIGNEDP nonzero says that X and Y are unsigned; this matters if they
4246 need to be widened. UNSIGNEDP is also used to select the proper
4247 branch condition code.
4249 If X and Y have mode BLKmode, then SIZE specifies the size of both X and Y.
4251 MODE is the mode of the inputs (in case they are const_int).
4253 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.).
4254 It will be potentially converted into an unsigned variant based on
4255 UNSIGNEDP to select a proper jump instruction. */
4258 emit_cmp_and_jump_insns (rtx x
, rtx y
, enum rtx_code comparison
, rtx size
,
4259 enum machine_mode mode
, int unsignedp
, rtx label
)
4261 rtx op0
= x
, op1
= y
;
4264 /* Swap operands and condition to ensure canonical RTL. */
4265 if (swap_commutative_operands_p (x
, y
)
4266 && can_compare_p (swap_condition (comparison
), mode
, ccp_jump
))
4269 comparison
= swap_condition (comparison
);
4272 /* If OP0 is still a constant, then both X and Y must be constants
4273 or the opposite comparison is not supported. Force X into a register
4274 to create canonical RTL. */
4275 if (CONSTANT_P (op0
))
4276 op0
= force_reg (mode
, op0
);
4279 comparison
= unsigned_condition (comparison
);
4281 prepare_cmp_insn (op0
, op1
, comparison
, size
, unsignedp
, OPTAB_LIB_WIDEN
,
4283 emit_cmp_and_jump_insn_1 (test
, mode
, label
);
4287 /* Emit a library call comparison between floating point X and Y.
4288 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). */
4291 prepare_float_lib_cmp (rtx x
, rtx y
, enum rtx_code comparison
,
4292 rtx
*ptest
, enum machine_mode
*pmode
)
4294 enum rtx_code swapped
= swap_condition (comparison
);
4295 enum rtx_code reversed
= reverse_condition_maybe_unordered (comparison
);
4296 enum machine_mode orig_mode
= GET_MODE (x
);
4297 enum machine_mode mode
, cmp_mode
;
4298 rtx true_rtx
, false_rtx
;
4299 rtx value
, target
, insns
, equiv
;
4301 bool reversed_p
= false;
4302 cmp_mode
= targetm
.libgcc_cmp_return_mode ();
4304 for (mode
= orig_mode
;
4306 mode
= GET_MODE_WIDER_MODE (mode
))
4308 if (code_to_optab
[comparison
]
4309 && (libfunc
= optab_libfunc (code_to_optab
[comparison
], mode
)))
4312 if (code_to_optab
[swapped
]
4313 && (libfunc
= optab_libfunc (code_to_optab
[swapped
], mode
)))
4316 tmp
= x
; x
= y
; y
= tmp
;
4317 comparison
= swapped
;
4321 if (code_to_optab
[reversed
]
4322 && (libfunc
= optab_libfunc (code_to_optab
[reversed
], mode
)))
4324 comparison
= reversed
;
4330 gcc_assert (mode
!= VOIDmode
);
4332 if (mode
!= orig_mode
)
4334 x
= convert_to_mode (mode
, x
, 0);
4335 y
= convert_to_mode (mode
, y
, 0);
4338 /* Attach a REG_EQUAL note describing the semantics of the libcall to
4339 the RTL. The allows the RTL optimizers to delete the libcall if the
4340 condition can be determined at compile-time. */
4341 if (comparison
== UNORDERED
4342 || FLOAT_LIB_COMPARE_RETURNS_BOOL (mode
, comparison
))
4344 true_rtx
= const_true_rtx
;
4345 false_rtx
= const0_rtx
;
4352 true_rtx
= const0_rtx
;
4353 false_rtx
= const_true_rtx
;
4357 true_rtx
= const_true_rtx
;
4358 false_rtx
= const0_rtx
;
4362 true_rtx
= const1_rtx
;
4363 false_rtx
= const0_rtx
;
4367 true_rtx
= const0_rtx
;
4368 false_rtx
= constm1_rtx
;
4372 true_rtx
= constm1_rtx
;
4373 false_rtx
= const0_rtx
;
4377 true_rtx
= const0_rtx
;
4378 false_rtx
= const1_rtx
;
4386 if (comparison
== UNORDERED
)
4388 rtx temp
= simplify_gen_relational (NE
, cmp_mode
, mode
, x
, x
);
4389 equiv
= simplify_gen_relational (NE
, cmp_mode
, mode
, y
, y
);
4390 equiv
= simplify_gen_ternary (IF_THEN_ELSE
, cmp_mode
, cmp_mode
,
4391 temp
, const_true_rtx
, equiv
);
4395 equiv
= simplify_gen_relational (comparison
, cmp_mode
, mode
, x
, y
);
4396 if (! FLOAT_LIB_COMPARE_RETURNS_BOOL (mode
, comparison
))
4397 equiv
= simplify_gen_ternary (IF_THEN_ELSE
, cmp_mode
, cmp_mode
,
4398 equiv
, true_rtx
, false_rtx
);
4402 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
4403 cmp_mode
, 2, x
, mode
, y
, mode
);
4404 insns
= get_insns ();
4407 target
= gen_reg_rtx (cmp_mode
);
4408 emit_libcall_block (insns
, target
, value
, equiv
);
4410 if (comparison
== UNORDERED
4411 || FLOAT_LIB_COMPARE_RETURNS_BOOL (mode
, comparison
)
4413 *ptest
= gen_rtx_fmt_ee (reversed_p
? EQ
: NE
, VOIDmode
, target
, false_rtx
);
4415 *ptest
= gen_rtx_fmt_ee (comparison
, VOIDmode
, target
, const0_rtx
);
4420 /* Generate code to indirectly jump to a location given in the rtx LOC. */
4423 emit_indirect_jump (rtx loc
)
4425 if (!insn_data
[(int) CODE_FOR_indirect_jump
].operand
[0].predicate
4427 loc
= copy_to_mode_reg (Pmode
, loc
);
4429 emit_jump_insn (gen_indirect_jump (loc
));
4433 #ifdef HAVE_conditional_move
4435 /* Emit a conditional move instruction if the machine supports one for that
4436 condition and machine mode.
4438 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
4439 the mode to use should they be constants. If it is VOIDmode, they cannot
4442 OP2 should be stored in TARGET if the comparison is true, otherwise OP3
4443 should be stored there. MODE is the mode to use should they be constants.
4444 If it is VOIDmode, they cannot both be constants.
4446 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
4447 is not supported. */
4450 emit_conditional_move (rtx target
, enum rtx_code code
, rtx op0
, rtx op1
,
4451 enum machine_mode cmode
, rtx op2
, rtx op3
,
4452 enum machine_mode mode
, int unsignedp
)
4454 rtx tem
, subtarget
, comparison
, insn
;
4455 enum insn_code icode
;
4456 enum rtx_code reversed
;
4458 /* If one operand is constant, make it the second one. Only do this
4459 if the other operand is not constant as well. */
4461 if (swap_commutative_operands_p (op0
, op1
))
4466 code
= swap_condition (code
);
4469 /* get_condition will prefer to generate LT and GT even if the old
4470 comparison was against zero, so undo that canonicalization here since
4471 comparisons against zero are cheaper. */
4472 if (code
== LT
&& op1
== const1_rtx
)
4473 code
= LE
, op1
= const0_rtx
;
4474 else if (code
== GT
&& op1
== constm1_rtx
)
4475 code
= GE
, op1
= const0_rtx
;
4477 if (cmode
== VOIDmode
)
4478 cmode
= GET_MODE (op0
);
4480 if (swap_commutative_operands_p (op2
, op3
)
4481 && ((reversed
= reversed_comparison_code_parts (code
, op0
, op1
, NULL
))
4490 if (mode
== VOIDmode
)
4491 mode
= GET_MODE (op2
);
4493 icode
= direct_optab_handler (movcc_optab
, mode
);
4495 if (icode
== CODE_FOR_nothing
)
4499 target
= gen_reg_rtx (mode
);
4503 /* If the insn doesn't accept these operands, put them in pseudos. */
4505 if (!insn_data
[icode
].operand
[0].predicate
4506 (subtarget
, insn_data
[icode
].operand
[0].mode
))
4507 subtarget
= gen_reg_rtx (insn_data
[icode
].operand
[0].mode
);
4509 if (!insn_data
[icode
].operand
[2].predicate
4510 (op2
, insn_data
[icode
].operand
[2].mode
))
4511 op2
= copy_to_mode_reg (insn_data
[icode
].operand
[2].mode
, op2
);
4513 if (!insn_data
[icode
].operand
[3].predicate
4514 (op3
, insn_data
[icode
].operand
[3].mode
))
4515 op3
= copy_to_mode_reg (insn_data
[icode
].operand
[3].mode
, op3
);
4517 /* Everything should now be in the suitable form. */
4519 code
= unsignedp
? unsigned_condition (code
) : code
;
4520 comparison
= simplify_gen_relational (code
, VOIDmode
, cmode
, op0
, op1
);
4522 /* We can get const0_rtx or const_true_rtx in some circumstances. Just
4523 return NULL and let the caller figure out how best to deal with this
4525 if (!COMPARISON_P (comparison
))
4528 do_pending_stack_adjust ();
4530 prepare_cmp_insn (XEXP (comparison
, 0), XEXP (comparison
, 1),
4531 GET_CODE (comparison
), NULL_RTX
, unsignedp
, OPTAB_WIDEN
,
4532 &comparison
, &cmode
);
4536 insn
= GEN_FCN (icode
) (subtarget
, comparison
, op2
, op3
);
4538 /* If that failed, then give up. */
4546 insn
= get_insns ();
4549 if (subtarget
!= target
)
4550 convert_move (target
, subtarget
, 0);
4555 /* Return nonzero if a conditional move of mode MODE is supported.
4557 This function is for combine so it can tell whether an insn that looks
4558 like a conditional move is actually supported by the hardware. If we
4559 guess wrong we lose a bit on optimization, but that's it. */
4560 /* ??? sparc64 supports conditionally moving integers values based on fp
4561 comparisons, and vice versa. How do we handle them? */
4564 can_conditionally_move_p (enum machine_mode mode
)
4566 if (direct_optab_handler (movcc_optab
, mode
) != CODE_FOR_nothing
)
4572 #endif /* HAVE_conditional_move */
4574 /* Emit a conditional addition instruction if the machine supports one for that
4575 condition and machine mode.
4577 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
4578 the mode to use should they be constants. If it is VOIDmode, they cannot
4581 OP2 should be stored in TARGET if the comparison is true, otherwise OP2+OP3
4582 should be stored there. MODE is the mode to use should they be constants.
4583 If it is VOIDmode, they cannot both be constants.
4585 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
4586 is not supported. */
4589 emit_conditional_add (rtx target
, enum rtx_code code
, rtx op0
, rtx op1
,
4590 enum machine_mode cmode
, rtx op2
, rtx op3
,
4591 enum machine_mode mode
, int unsignedp
)
4593 rtx tem
, subtarget
, comparison
, insn
;
4594 enum insn_code icode
;
4595 enum rtx_code reversed
;
4597 /* If one operand is constant, make it the second one. Only do this
4598 if the other operand is not constant as well. */
4600 if (swap_commutative_operands_p (op0
, op1
))
4605 code
= swap_condition (code
);
4608 /* get_condition will prefer to generate LT and GT even if the old
4609 comparison was against zero, so undo that canonicalization here since
4610 comparisons against zero are cheaper. */
4611 if (code
== LT
&& op1
== const1_rtx
)
4612 code
= LE
, op1
= const0_rtx
;
4613 else if (code
== GT
&& op1
== constm1_rtx
)
4614 code
= GE
, op1
= const0_rtx
;
4616 if (cmode
== VOIDmode
)
4617 cmode
= GET_MODE (op0
);
4619 if (swap_commutative_operands_p (op2
, op3
)
4620 && ((reversed
= reversed_comparison_code_parts (code
, op0
, op1
, NULL
))
4629 if (mode
== VOIDmode
)
4630 mode
= GET_MODE (op2
);
4632 icode
= optab_handler (addcc_optab
, mode
);
4634 if (icode
== CODE_FOR_nothing
)
4638 target
= gen_reg_rtx (mode
);
4640 /* If the insn doesn't accept these operands, put them in pseudos. */
4642 if (!insn_data
[icode
].operand
[0].predicate
4643 (target
, insn_data
[icode
].operand
[0].mode
))
4644 subtarget
= gen_reg_rtx (insn_data
[icode
].operand
[0].mode
);
4648 if (!insn_data
[icode
].operand
[2].predicate
4649 (op2
, insn_data
[icode
].operand
[2].mode
))
4650 op2
= copy_to_mode_reg (insn_data
[icode
].operand
[2].mode
, op2
);
4652 if (!insn_data
[icode
].operand
[3].predicate
4653 (op3
, insn_data
[icode
].operand
[3].mode
))
4654 op3
= copy_to_mode_reg (insn_data
[icode
].operand
[3].mode
, op3
);
4656 /* Everything should now be in the suitable form. */
4658 code
= unsignedp
? unsigned_condition (code
) : code
;
4659 comparison
= simplify_gen_relational (code
, VOIDmode
, cmode
, op0
, op1
);
4661 /* We can get const0_rtx or const_true_rtx in some circumstances. Just
4662 return NULL and let the caller figure out how best to deal with this
4664 if (!COMPARISON_P (comparison
))
4667 do_pending_stack_adjust ();
4669 prepare_cmp_insn (XEXP (comparison
, 0), XEXP (comparison
, 1),
4670 GET_CODE (comparison
), NULL_RTX
, unsignedp
, OPTAB_WIDEN
,
4671 &comparison
, &cmode
);
4675 insn
= GEN_FCN (icode
) (subtarget
, comparison
, op2
, op3
);
4677 /* If that failed, then give up. */
4685 insn
= get_insns ();
4688 if (subtarget
!= target
)
4689 convert_move (target
, subtarget
, 0);
4694 /* These functions attempt to generate an insn body, rather than
4695 emitting the insn, but if the gen function already emits them, we
4696 make no attempt to turn them back into naked patterns. */
4698 /* Generate and return an insn body to add Y to X. */
4701 gen_add2_insn (rtx x
, rtx y
)
4703 int icode
= (int) optab_handler (add_optab
, GET_MODE (x
));
4705 gcc_assert (insn_data
[icode
].operand
[0].predicate
4706 (x
, insn_data
[icode
].operand
[0].mode
));
4707 gcc_assert (insn_data
[icode
].operand
[1].predicate
4708 (x
, insn_data
[icode
].operand
[1].mode
));
4709 gcc_assert (insn_data
[icode
].operand
[2].predicate
4710 (y
, insn_data
[icode
].operand
[2].mode
));
4712 return GEN_FCN (icode
) (x
, x
, y
);
4715 /* Generate and return an insn body to add r1 and c,
4716 storing the result in r0. */
4719 gen_add3_insn (rtx r0
, rtx r1
, rtx c
)
4721 int icode
= (int) optab_handler (add_optab
, GET_MODE (r0
));
4723 if (icode
== CODE_FOR_nothing
4724 || !(insn_data
[icode
].operand
[0].predicate
4725 (r0
, insn_data
[icode
].operand
[0].mode
))
4726 || !(insn_data
[icode
].operand
[1].predicate
4727 (r1
, insn_data
[icode
].operand
[1].mode
))
4728 || !(insn_data
[icode
].operand
[2].predicate
4729 (c
, insn_data
[icode
].operand
[2].mode
)))
4732 return GEN_FCN (icode
) (r0
, r1
, c
);
4736 have_add2_insn (rtx x
, rtx y
)
4740 gcc_assert (GET_MODE (x
) != VOIDmode
);
4742 icode
= (int) optab_handler (add_optab
, GET_MODE (x
));
4744 if (icode
== CODE_FOR_nothing
)
4747 if (!(insn_data
[icode
].operand
[0].predicate
4748 (x
, insn_data
[icode
].operand
[0].mode
))
4749 || !(insn_data
[icode
].operand
[1].predicate
4750 (x
, insn_data
[icode
].operand
[1].mode
))
4751 || !(insn_data
[icode
].operand
[2].predicate
4752 (y
, insn_data
[icode
].operand
[2].mode
)))
4758 /* Generate and return an insn body to subtract Y from X. */
4761 gen_sub2_insn (rtx x
, rtx y
)
4763 int icode
= (int) optab_handler (sub_optab
, GET_MODE (x
));
4765 gcc_assert (insn_data
[icode
].operand
[0].predicate
4766 (x
, insn_data
[icode
].operand
[0].mode
));
4767 gcc_assert (insn_data
[icode
].operand
[1].predicate
4768 (x
, insn_data
[icode
].operand
[1].mode
));
4769 gcc_assert (insn_data
[icode
].operand
[2].predicate
4770 (y
, insn_data
[icode
].operand
[2].mode
));
4772 return GEN_FCN (icode
) (x
, x
, y
);
4775 /* Generate and return an insn body to subtract r1 and c,
4776 storing the result in r0. */
4779 gen_sub3_insn (rtx r0
, rtx r1
, rtx c
)
4781 int icode
= (int) optab_handler (sub_optab
, GET_MODE (r0
));
4783 if (icode
== CODE_FOR_nothing
4784 || !(insn_data
[icode
].operand
[0].predicate
4785 (r0
, insn_data
[icode
].operand
[0].mode
))
4786 || !(insn_data
[icode
].operand
[1].predicate
4787 (r1
, insn_data
[icode
].operand
[1].mode
))
4788 || !(insn_data
[icode
].operand
[2].predicate
4789 (c
, insn_data
[icode
].operand
[2].mode
)))
4792 return GEN_FCN (icode
) (r0
, r1
, c
);
4796 have_sub2_insn (rtx x
, rtx y
)
4800 gcc_assert (GET_MODE (x
) != VOIDmode
);
4802 icode
= (int) optab_handler (sub_optab
, GET_MODE (x
));
4804 if (icode
== CODE_FOR_nothing
)
4807 if (!(insn_data
[icode
].operand
[0].predicate
4808 (x
, insn_data
[icode
].operand
[0].mode
))
4809 || !(insn_data
[icode
].operand
[1].predicate
4810 (x
, insn_data
[icode
].operand
[1].mode
))
4811 || !(insn_data
[icode
].operand
[2].predicate
4812 (y
, insn_data
[icode
].operand
[2].mode
)))
4818 /* Generate the body of an instruction to copy Y into X.
4819 It may be a list of insns, if one insn isn't enough. */
4822 gen_move_insn (rtx x
, rtx y
)
4827 emit_move_insn_1 (x
, y
);
4833 /* Return the insn code used to extend FROM_MODE to TO_MODE.
4834 UNSIGNEDP specifies zero-extension instead of sign-extension. If
4835 no such operation exists, CODE_FOR_nothing will be returned. */
4838 can_extend_p (enum machine_mode to_mode
, enum machine_mode from_mode
,
4842 #ifdef HAVE_ptr_extend
4844 return CODE_FOR_ptr_extend
;
4847 tab
= unsignedp
? zext_optab
: sext_optab
;
4848 return convert_optab_handler (tab
, to_mode
, from_mode
);
4851 /* Generate the body of an insn to extend Y (with mode MFROM)
4852 into X (with mode MTO). Do zero-extension if UNSIGNEDP is nonzero. */
4855 gen_extend_insn (rtx x
, rtx y
, enum machine_mode mto
,
4856 enum machine_mode mfrom
, int unsignedp
)
4858 enum insn_code icode
= can_extend_p (mto
, mfrom
, unsignedp
);
4859 return GEN_FCN (icode
) (x
, y
);
4862 /* can_fix_p and can_float_p say whether the target machine
4863 can directly convert a given fixed point type to
4864 a given floating point type, or vice versa.
4865 The returned value is the CODE_FOR_... value to use,
4866 or CODE_FOR_nothing if these modes cannot be directly converted.
4868 *TRUNCP_PTR is set to 1 if it is necessary to output
4869 an explicit FTRUNC insn before the fix insn; otherwise 0. */
4871 static enum insn_code
4872 can_fix_p (enum machine_mode fixmode
, enum machine_mode fltmode
,
4873 int unsignedp
, int *truncp_ptr
)
4876 enum insn_code icode
;
4878 tab
= unsignedp
? ufixtrunc_optab
: sfixtrunc_optab
;
4879 icode
= convert_optab_handler (tab
, fixmode
, fltmode
);
4880 if (icode
!= CODE_FOR_nothing
)
4886 /* FIXME: This requires a port to define both FIX and FTRUNC pattern
4887 for this to work. We need to rework the fix* and ftrunc* patterns
4888 and documentation. */
4889 tab
= unsignedp
? ufix_optab
: sfix_optab
;
4890 icode
= convert_optab_handler (tab
, fixmode
, fltmode
);
4891 if (icode
!= CODE_FOR_nothing
4892 && optab_handler (ftrunc_optab
, fltmode
) != CODE_FOR_nothing
)
4899 return CODE_FOR_nothing
;
4902 static enum insn_code
4903 can_float_p (enum machine_mode fltmode
, enum machine_mode fixmode
,
4908 tab
= unsignedp
? ufloat_optab
: sfloat_optab
;
4909 return convert_optab_handler (tab
, fltmode
, fixmode
);
4912 /* Generate code to convert FROM to floating point
4913 and store in TO. FROM must be fixed point and not VOIDmode.
4914 UNSIGNEDP nonzero means regard FROM as unsigned.
4915 Normally this is done by correcting the final value
4916 if it is negative. */
4919 expand_float (rtx to
, rtx from
, int unsignedp
)
4921 enum insn_code icode
;
4923 enum machine_mode fmode
, imode
;
4924 bool can_do_signed
= false;
4926 /* Crash now, because we won't be able to decide which mode to use. */
4927 gcc_assert (GET_MODE (from
) != VOIDmode
);
4929 /* Look for an insn to do the conversion. Do it in the specified
4930 modes if possible; otherwise convert either input, output or both to
4931 wider mode. If the integer mode is wider than the mode of FROM,
4932 we can do the conversion signed even if the input is unsigned. */
4934 for (fmode
= GET_MODE (to
); fmode
!= VOIDmode
;
4935 fmode
= GET_MODE_WIDER_MODE (fmode
))
4936 for (imode
= GET_MODE (from
); imode
!= VOIDmode
;
4937 imode
= GET_MODE_WIDER_MODE (imode
))
4939 int doing_unsigned
= unsignedp
;
4941 if (fmode
!= GET_MODE (to
)
4942 && significand_size (fmode
) < GET_MODE_BITSIZE (GET_MODE (from
)))
4945 icode
= can_float_p (fmode
, imode
, unsignedp
);
4946 if (icode
== CODE_FOR_nothing
&& unsignedp
)
4948 enum insn_code scode
= can_float_p (fmode
, imode
, 0);
4949 if (scode
!= CODE_FOR_nothing
)
4950 can_do_signed
= true;
4951 if (imode
!= GET_MODE (from
))
4952 icode
= scode
, doing_unsigned
= 0;
4955 if (icode
!= CODE_FOR_nothing
)
4957 if (imode
!= GET_MODE (from
))
4958 from
= convert_to_mode (imode
, from
, unsignedp
);
4960 if (fmode
!= GET_MODE (to
))
4961 target
= gen_reg_rtx (fmode
);
4963 emit_unop_insn (icode
, target
, from
,
4964 doing_unsigned
? UNSIGNED_FLOAT
: FLOAT
);
4967 convert_move (to
, target
, 0);
4972 /* Unsigned integer, and no way to convert directly. Convert as signed,
4973 then unconditionally adjust the result. */
4974 if (unsignedp
&& can_do_signed
)
4976 rtx label
= gen_label_rtx ();
4978 REAL_VALUE_TYPE offset
;
4980 /* Look for a usable floating mode FMODE wider than the source and at
4981 least as wide as the target. Using FMODE will avoid rounding woes
4982 with unsigned values greater than the signed maximum value. */
4984 for (fmode
= GET_MODE (to
); fmode
!= VOIDmode
;
4985 fmode
= GET_MODE_WIDER_MODE (fmode
))
4986 if (GET_MODE_BITSIZE (GET_MODE (from
)) < GET_MODE_BITSIZE (fmode
)
4987 && can_float_p (fmode
, GET_MODE (from
), 0) != CODE_FOR_nothing
)
4990 if (fmode
== VOIDmode
)
4992 /* There is no such mode. Pretend the target is wide enough. */
4993 fmode
= GET_MODE (to
);
4995 /* Avoid double-rounding when TO is narrower than FROM. */
4996 if ((significand_size (fmode
) + 1)
4997 < GET_MODE_BITSIZE (GET_MODE (from
)))
5000 rtx neglabel
= gen_label_rtx ();
5002 /* Don't use TARGET if it isn't a register, is a hard register,
5003 or is the wrong mode. */
5005 || REGNO (target
) < FIRST_PSEUDO_REGISTER
5006 || GET_MODE (target
) != fmode
)
5007 target
= gen_reg_rtx (fmode
);
5009 imode
= GET_MODE (from
);
5010 do_pending_stack_adjust ();
5012 /* Test whether the sign bit is set. */
5013 emit_cmp_and_jump_insns (from
, const0_rtx
, LT
, NULL_RTX
, imode
,
5016 /* The sign bit is not set. Convert as signed. */
5017 expand_float (target
, from
, 0);
5018 emit_jump_insn (gen_jump (label
));
5021 /* The sign bit is set.
5022 Convert to a usable (positive signed) value by shifting right
5023 one bit, while remembering if a nonzero bit was shifted
5024 out; i.e., compute (from & 1) | (from >> 1). */
5026 emit_label (neglabel
);
5027 temp
= expand_binop (imode
, and_optab
, from
, const1_rtx
,
5028 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
5029 temp1
= expand_shift (RSHIFT_EXPR
, imode
, from
, integer_one_node
,
5031 temp
= expand_binop (imode
, ior_optab
, temp
, temp1
, temp
, 1,
5033 expand_float (target
, temp
, 0);
5035 /* Multiply by 2 to undo the shift above. */
5036 temp
= expand_binop (fmode
, add_optab
, target
, target
,
5037 target
, 0, OPTAB_LIB_WIDEN
);
5039 emit_move_insn (target
, temp
);
5041 do_pending_stack_adjust ();
5047 /* If we are about to do some arithmetic to correct for an
5048 unsigned operand, do it in a pseudo-register. */
5050 if (GET_MODE (to
) != fmode
5051 || !REG_P (to
) || REGNO (to
) < FIRST_PSEUDO_REGISTER
)
5052 target
= gen_reg_rtx (fmode
);
5054 /* Convert as signed integer to floating. */
5055 expand_float (target
, from
, 0);
5057 /* If FROM is negative (and therefore TO is negative),
5058 correct its value by 2**bitwidth. */
5060 do_pending_stack_adjust ();
5061 emit_cmp_and_jump_insns (from
, const0_rtx
, GE
, NULL_RTX
, GET_MODE (from
),
5065 real_2expN (&offset
, GET_MODE_BITSIZE (GET_MODE (from
)), fmode
);
5066 temp
= expand_binop (fmode
, add_optab
, target
,
5067 CONST_DOUBLE_FROM_REAL_VALUE (offset
, fmode
),
5068 target
, 0, OPTAB_LIB_WIDEN
);
5070 emit_move_insn (target
, temp
);
5072 do_pending_stack_adjust ();
5077 /* No hardware instruction available; call a library routine. */
5082 convert_optab tab
= unsignedp
? ufloat_optab
: sfloat_optab
;
5084 if (GET_MODE_SIZE (GET_MODE (from
)) < GET_MODE_SIZE (SImode
))
5085 from
= convert_to_mode (SImode
, from
, unsignedp
);
5087 libfunc
= convert_optab_libfunc (tab
, GET_MODE (to
), GET_MODE (from
));
5088 gcc_assert (libfunc
);
5092 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
5093 GET_MODE (to
), 1, from
,
5095 insns
= get_insns ();
5098 emit_libcall_block (insns
, target
, value
,
5099 gen_rtx_fmt_e (unsignedp
? UNSIGNED_FLOAT
: FLOAT
,
5100 GET_MODE (to
), from
));
5105 /* Copy result to requested destination
5106 if we have been computing in a temp location. */
5110 if (GET_MODE (target
) == GET_MODE (to
))
5111 emit_move_insn (to
, target
);
5113 convert_move (to
, target
, 0);
5117 /* Generate code to convert FROM to fixed point and store in TO. FROM
5118 must be floating point. */
5121 expand_fix (rtx to
, rtx from
, int unsignedp
)
5123 enum insn_code icode
;
5125 enum machine_mode fmode
, imode
;
5128 /* We first try to find a pair of modes, one real and one integer, at
5129 least as wide as FROM and TO, respectively, in which we can open-code
5130 this conversion. If the integer mode is wider than the mode of TO,
5131 we can do the conversion either signed or unsigned. */
5133 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
5134 fmode
= GET_MODE_WIDER_MODE (fmode
))
5135 for (imode
= GET_MODE (to
); imode
!= VOIDmode
;
5136 imode
= GET_MODE_WIDER_MODE (imode
))
5138 int doing_unsigned
= unsignedp
;
5140 icode
= can_fix_p (imode
, fmode
, unsignedp
, &must_trunc
);
5141 if (icode
== CODE_FOR_nothing
&& imode
!= GET_MODE (to
) && unsignedp
)
5142 icode
= can_fix_p (imode
, fmode
, 0, &must_trunc
), doing_unsigned
= 0;
5144 if (icode
!= CODE_FOR_nothing
)
5146 rtx last
= get_last_insn ();
5147 if (fmode
!= GET_MODE (from
))
5148 from
= convert_to_mode (fmode
, from
, 0);
5152 rtx temp
= gen_reg_rtx (GET_MODE (from
));
5153 from
= expand_unop (GET_MODE (from
), ftrunc_optab
, from
,
5157 if (imode
!= GET_MODE (to
))
5158 target
= gen_reg_rtx (imode
);
5160 if (maybe_emit_unop_insn (icode
, target
, from
,
5161 doing_unsigned
? UNSIGNED_FIX
: FIX
))
5164 convert_move (to
, target
, unsignedp
);
5167 delete_insns_since (last
);
5171 /* For an unsigned conversion, there is one more way to do it.
5172 If we have a signed conversion, we generate code that compares
5173 the real value to the largest representable positive number. If if
5174 is smaller, the conversion is done normally. Otherwise, subtract
5175 one plus the highest signed number, convert, and add it back.
5177 We only need to check all real modes, since we know we didn't find
5178 anything with a wider integer mode.
5180 This code used to extend FP value into mode wider than the destination.
5181 This is needed for decimal float modes which cannot accurately
5182 represent one plus the highest signed number of the same size, but
5183 not for binary modes. Consider, for instance conversion from SFmode
5186 The hot path through the code is dealing with inputs smaller than 2^63
5187 and doing just the conversion, so there is no bits to lose.
5189 In the other path we know the value is positive in the range 2^63..2^64-1
5190 inclusive. (as for other input overflow happens and result is undefined)
5191 So we know that the most important bit set in mantissa corresponds to
5192 2^63. The subtraction of 2^63 should not generate any rounding as it
5193 simply clears out that bit. The rest is trivial. */
5195 if (unsignedp
&& GET_MODE_BITSIZE (GET_MODE (to
)) <= HOST_BITS_PER_WIDE_INT
)
5196 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
5197 fmode
= GET_MODE_WIDER_MODE (fmode
))
5198 if (CODE_FOR_nothing
!= can_fix_p (GET_MODE (to
), fmode
, 0, &must_trunc
)
5199 && (!DECIMAL_FLOAT_MODE_P (fmode
)
5200 || GET_MODE_BITSIZE (fmode
) > GET_MODE_BITSIZE (GET_MODE (to
))))
5203 REAL_VALUE_TYPE offset
;
5204 rtx limit
, lab1
, lab2
, insn
;
5206 bitsize
= GET_MODE_BITSIZE (GET_MODE (to
));
5207 real_2expN (&offset
, bitsize
- 1, fmode
);
5208 limit
= CONST_DOUBLE_FROM_REAL_VALUE (offset
, fmode
);
5209 lab1
= gen_label_rtx ();
5210 lab2
= gen_label_rtx ();
5212 if (fmode
!= GET_MODE (from
))
5213 from
= convert_to_mode (fmode
, from
, 0);
5215 /* See if we need to do the subtraction. */
5216 do_pending_stack_adjust ();
5217 emit_cmp_and_jump_insns (from
, limit
, GE
, NULL_RTX
, GET_MODE (from
),
5220 /* If not, do the signed "fix" and branch around fixup code. */
5221 expand_fix (to
, from
, 0);
5222 emit_jump_insn (gen_jump (lab2
));
5225 /* Otherwise, subtract 2**(N-1), convert to signed number,
5226 then add 2**(N-1). Do the addition using XOR since this
5227 will often generate better code. */
5229 target
= expand_binop (GET_MODE (from
), sub_optab
, from
, limit
,
5230 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
5231 expand_fix (to
, target
, 0);
5232 target
= expand_binop (GET_MODE (to
), xor_optab
, to
,
5234 ((HOST_WIDE_INT
) 1 << (bitsize
- 1),
5236 to
, 1, OPTAB_LIB_WIDEN
);
5239 emit_move_insn (to
, target
);
5243 if (optab_handler (mov_optab
, GET_MODE (to
)) != CODE_FOR_nothing
)
5245 /* Make a place for a REG_NOTE and add it. */
5246 insn
= emit_move_insn (to
, to
);
5247 set_unique_reg_note (insn
,
5249 gen_rtx_fmt_e (UNSIGNED_FIX
,
5257 /* We can't do it with an insn, so use a library call. But first ensure
5258 that the mode of TO is at least as wide as SImode, since those are the
5259 only library calls we know about. */
5261 if (GET_MODE_SIZE (GET_MODE (to
)) < GET_MODE_SIZE (SImode
))
5263 target
= gen_reg_rtx (SImode
);
5265 expand_fix (target
, from
, unsignedp
);
5273 convert_optab tab
= unsignedp
? ufix_optab
: sfix_optab
;
5274 libfunc
= convert_optab_libfunc (tab
, GET_MODE (to
), GET_MODE (from
));
5275 gcc_assert (libfunc
);
5279 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
5280 GET_MODE (to
), 1, from
,
5282 insns
= get_insns ();
5285 emit_libcall_block (insns
, target
, value
,
5286 gen_rtx_fmt_e (unsignedp
? UNSIGNED_FIX
: FIX
,
5287 GET_MODE (to
), from
));
5292 if (GET_MODE (to
) == GET_MODE (target
))
5293 emit_move_insn (to
, target
);
5295 convert_move (to
, target
, 0);
5299 /* Generate code to convert FROM or TO a fixed-point.
5300 If UINTP is true, either TO or FROM is an unsigned integer.
5301 If SATP is true, we need to saturate the result. */
5304 expand_fixed_convert (rtx to
, rtx from
, int uintp
, int satp
)
5306 enum machine_mode to_mode
= GET_MODE (to
);
5307 enum machine_mode from_mode
= GET_MODE (from
);
5309 enum rtx_code this_code
;
5310 enum insn_code code
;
5314 if (to_mode
== from_mode
)
5316 emit_move_insn (to
, from
);
5322 tab
= satp
? satfractuns_optab
: fractuns_optab
;
5323 this_code
= satp
? UNSIGNED_SAT_FRACT
: UNSIGNED_FRACT_CONVERT
;
5327 tab
= satp
? satfract_optab
: fract_optab
;
5328 this_code
= satp
? SAT_FRACT
: FRACT_CONVERT
;
5330 code
= convert_optab_handler (tab
, to_mode
, from_mode
);
5331 if (code
!= CODE_FOR_nothing
)
5333 emit_unop_insn (code
, to
, from
, this_code
);
5337 libfunc
= convert_optab_libfunc (tab
, to_mode
, from_mode
);
5338 gcc_assert (libfunc
);
5341 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
, to_mode
,
5342 1, from
, from_mode
);
5343 insns
= get_insns ();
5346 emit_libcall_block (insns
, to
, value
,
5347 gen_rtx_fmt_e (tab
->code
, to_mode
, from
));
5350 /* Generate code to convert FROM to fixed point and store in TO. FROM
5351 must be floating point, TO must be signed. Use the conversion optab
5352 TAB to do the conversion. */
5355 expand_sfix_optab (rtx to
, rtx from
, convert_optab tab
)
5357 enum insn_code icode
;
5359 enum machine_mode fmode
, imode
;
5361 /* We first try to find a pair of modes, one real and one integer, at
5362 least as wide as FROM and TO, respectively, in which we can open-code
5363 this conversion. If the integer mode is wider than the mode of TO,
5364 we can do the conversion either signed or unsigned. */
5366 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
5367 fmode
= GET_MODE_WIDER_MODE (fmode
))
5368 for (imode
= GET_MODE (to
); imode
!= VOIDmode
;
5369 imode
= GET_MODE_WIDER_MODE (imode
))
5371 icode
= convert_optab_handler (tab
, imode
, fmode
);
5372 if (icode
!= CODE_FOR_nothing
)
5374 rtx last
= get_last_insn ();
5375 if (fmode
!= GET_MODE (from
))
5376 from
= convert_to_mode (fmode
, from
, 0);
5378 if (imode
!= GET_MODE (to
))
5379 target
= gen_reg_rtx (imode
);
5381 if (!maybe_emit_unop_insn (icode
, target
, from
, UNKNOWN
))
5383 delete_insns_since (last
);
5387 convert_move (to
, target
, 0);
5395 /* Report whether we have an instruction to perform the operation
5396 specified by CODE on operands of mode MODE. */
5398 have_insn_for (enum rtx_code code
, enum machine_mode mode
)
5400 return (code_to_optab
[(int) code
] != 0
5401 && (optab_handler (code_to_optab
[(int) code
], mode
)
5402 != CODE_FOR_nothing
));
5405 /* Set all insn_code fields to CODE_FOR_nothing. */
5408 init_insn_codes (void)
5410 memset (optab_table
, 0, sizeof (optab_table
));
5411 memset (convert_optab_table
, 0, sizeof (convert_optab_table
));
5412 memset (direct_optab_table
, 0, sizeof (direct_optab_table
));
5415 /* Initialize OP's code to CODE, and write it into the code_to_optab table. */
5417 init_optab (optab op
, enum rtx_code code
)
5420 code_to_optab
[(int) code
] = op
;
5423 /* Same, but fill in its code as CODE, and do _not_ write it into
5424 the code_to_optab table. */
5426 init_optabv (optab op
, enum rtx_code code
)
5431 /* Conversion optabs never go in the code_to_optab table. */
5433 init_convert_optab (convert_optab op
, enum rtx_code code
)
5438 /* Initialize the libfunc fields of an entire group of entries in some
5439 optab. Each entry is set equal to a string consisting of a leading
5440 pair of underscores followed by a generic operation name followed by
5441 a mode name (downshifted to lowercase) followed by a single character
5442 representing the number of operands for the given operation (which is
5443 usually one of the characters '2', '3', or '4').
5445 OPTABLE is the table in which libfunc fields are to be initialized.
5446 OPNAME is the generic (string) name of the operation.
5447 SUFFIX is the character which specifies the number of operands for
5448 the given generic operation.
5449 MODE is the mode to generate for.
5453 gen_libfunc (optab optable
, const char *opname
, int suffix
, enum machine_mode mode
)
5455 unsigned opname_len
= strlen (opname
);
5456 const char *mname
= GET_MODE_NAME (mode
);
5457 unsigned mname_len
= strlen (mname
);
5458 char *libfunc_name
= XALLOCAVEC (char, 2 + opname_len
+ mname_len
+ 1 + 1);
5465 for (q
= opname
; *q
; )
5467 for (q
= mname
; *q
; q
++)
5468 *p
++ = TOLOWER (*q
);
5472 set_optab_libfunc (optable
, mode
,
5473 ggc_alloc_string (libfunc_name
, p
- libfunc_name
));
5476 /* Like gen_libfunc, but verify that integer operation is involved. */
5479 gen_int_libfunc (optab optable
, const char *opname
, char suffix
,
5480 enum machine_mode mode
)
5482 int maxsize
= 2 * BITS_PER_WORD
;
5484 if (GET_MODE_CLASS (mode
) != MODE_INT
)
5486 if (maxsize
< LONG_LONG_TYPE_SIZE
)
5487 maxsize
= LONG_LONG_TYPE_SIZE
;
5488 if (GET_MODE_CLASS (mode
) != MODE_INT
5489 || mode
< word_mode
|| GET_MODE_BITSIZE (mode
) > maxsize
)
5491 gen_libfunc (optable
, opname
, suffix
, mode
);
5494 /* Like gen_libfunc, but verify that FP and set decimal prefix if needed. */
5497 gen_fp_libfunc (optab optable
, const char *opname
, char suffix
,
5498 enum machine_mode mode
)
5502 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5503 gen_libfunc (optable
, opname
, suffix
, mode
);
5504 if (DECIMAL_FLOAT_MODE_P (mode
))
5506 dec_opname
= XALLOCAVEC (char, sizeof (DECIMAL_PREFIX
) + strlen (opname
));
5507 /* For BID support, change the name to have either a bid_ or dpd_ prefix
5508 depending on the low level floating format used. */
5509 memcpy (dec_opname
, DECIMAL_PREFIX
, sizeof (DECIMAL_PREFIX
) - 1);
5510 strcpy (dec_opname
+ sizeof (DECIMAL_PREFIX
) - 1, opname
);
5511 gen_libfunc (optable
, dec_opname
, suffix
, mode
);
5515 /* Like gen_libfunc, but verify that fixed-point operation is involved. */
5518 gen_fixed_libfunc (optab optable
, const char *opname
, char suffix
,
5519 enum machine_mode mode
)
5521 if (!ALL_FIXED_POINT_MODE_P (mode
))
5523 gen_libfunc (optable
, opname
, suffix
, mode
);
5526 /* Like gen_libfunc, but verify that signed fixed-point operation is
5530 gen_signed_fixed_libfunc (optab optable
, const char *opname
, char suffix
,
5531 enum machine_mode mode
)
5533 if (!SIGNED_FIXED_POINT_MODE_P (mode
))
5535 gen_libfunc (optable
, opname
, suffix
, mode
);
5538 /* Like gen_libfunc, but verify that unsigned fixed-point operation is
5542 gen_unsigned_fixed_libfunc (optab optable
, const char *opname
, char suffix
,
5543 enum machine_mode mode
)
5545 if (!UNSIGNED_FIXED_POINT_MODE_P (mode
))
5547 gen_libfunc (optable
, opname
, suffix
, mode
);
5550 /* Like gen_libfunc, but verify that FP or INT operation is involved. */
5553 gen_int_fp_libfunc (optab optable
, const char *name
, char suffix
,
5554 enum machine_mode mode
)
5556 if (DECIMAL_FLOAT_MODE_P (mode
) || GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5557 gen_fp_libfunc (optable
, name
, suffix
, mode
);
5558 if (INTEGRAL_MODE_P (mode
))
5559 gen_int_libfunc (optable
, name
, suffix
, mode
);
5562 /* Like gen_libfunc, but verify that FP or INT operation is involved
5563 and add 'v' suffix for integer operation. */
5566 gen_intv_fp_libfunc (optab optable
, const char *name
, char suffix
,
5567 enum machine_mode mode
)
5569 if (DECIMAL_FLOAT_MODE_P (mode
) || GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5570 gen_fp_libfunc (optable
, name
, suffix
, mode
);
5571 if (GET_MODE_CLASS (mode
) == MODE_INT
)
5573 int len
= strlen (name
);
5574 char *v_name
= XALLOCAVEC (char, len
+ 2);
5575 strcpy (v_name
, name
);
5577 v_name
[len
+ 1] = 0;
5578 gen_int_libfunc (optable
, v_name
, suffix
, mode
);
5582 /* Like gen_libfunc, but verify that FP or INT or FIXED operation is
5586 gen_int_fp_fixed_libfunc (optab optable
, const char *name
, char suffix
,
5587 enum machine_mode mode
)
5589 if (DECIMAL_FLOAT_MODE_P (mode
) || GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5590 gen_fp_libfunc (optable
, name
, suffix
, mode
);
5591 if (INTEGRAL_MODE_P (mode
))
5592 gen_int_libfunc (optable
, name
, suffix
, mode
);
5593 if (ALL_FIXED_POINT_MODE_P (mode
))
5594 gen_fixed_libfunc (optable
, name
, suffix
, mode
);
5597 /* Like gen_libfunc, but verify that FP or INT or signed FIXED operation is
5601 gen_int_fp_signed_fixed_libfunc (optab optable
, const char *name
, char suffix
,
5602 enum machine_mode mode
)
5604 if (DECIMAL_FLOAT_MODE_P (mode
) || GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5605 gen_fp_libfunc (optable
, name
, suffix
, mode
);
5606 if (INTEGRAL_MODE_P (mode
))
5607 gen_int_libfunc (optable
, name
, suffix
, mode
);
5608 if (SIGNED_FIXED_POINT_MODE_P (mode
))
5609 gen_signed_fixed_libfunc (optable
, name
, suffix
, mode
);
5612 /* Like gen_libfunc, but verify that INT or FIXED operation is
5616 gen_int_fixed_libfunc (optab optable
, const char *name
, char suffix
,
5617 enum machine_mode mode
)
5619 if (INTEGRAL_MODE_P (mode
))
5620 gen_int_libfunc (optable
, name
, suffix
, mode
);
5621 if (ALL_FIXED_POINT_MODE_P (mode
))
5622 gen_fixed_libfunc (optable
, name
, suffix
, mode
);
5625 /* Like gen_libfunc, but verify that INT or signed FIXED operation is
5629 gen_int_signed_fixed_libfunc (optab optable
, const char *name
, char suffix
,
5630 enum machine_mode mode
)
5632 if (INTEGRAL_MODE_P (mode
))
5633 gen_int_libfunc (optable
, name
, suffix
, mode
);
5634 if (SIGNED_FIXED_POINT_MODE_P (mode
))
5635 gen_signed_fixed_libfunc (optable
, name
, suffix
, mode
);
5638 /* Like gen_libfunc, but verify that INT or unsigned FIXED operation is
5642 gen_int_unsigned_fixed_libfunc (optab optable
, const char *name
, char suffix
,
5643 enum machine_mode mode
)
5645 if (INTEGRAL_MODE_P (mode
))
5646 gen_int_libfunc (optable
, name
, suffix
, mode
);
5647 if (UNSIGNED_FIXED_POINT_MODE_P (mode
))
5648 gen_unsigned_fixed_libfunc (optable
, name
, suffix
, mode
);
5651 /* Initialize the libfunc fields of an entire group of entries of an
5652 inter-mode-class conversion optab. The string formation rules are
5653 similar to the ones for init_libfuncs, above, but instead of having
5654 a mode name and an operand count these functions have two mode names
5655 and no operand count. */
5658 gen_interclass_conv_libfunc (convert_optab tab
,
5660 enum machine_mode tmode
,
5661 enum machine_mode fmode
)
5663 size_t opname_len
= strlen (opname
);
5664 size_t mname_len
= 0;
5666 const char *fname
, *tname
;
5668 char *libfunc_name
, *suffix
;
5669 char *nondec_name
, *dec_name
, *nondec_suffix
, *dec_suffix
;
5672 /* If this is a decimal conversion, add the current BID vs. DPD prefix that
5673 depends on which underlying decimal floating point format is used. */
5674 const size_t dec_len
= sizeof (DECIMAL_PREFIX
) - 1;
5676 mname_len
= strlen (GET_MODE_NAME (tmode
)) + strlen (GET_MODE_NAME (fmode
));
5678 nondec_name
= XALLOCAVEC (char, 2 + opname_len
+ mname_len
+ 1 + 1);
5679 nondec_name
[0] = '_';
5680 nondec_name
[1] = '_';
5681 memcpy (&nondec_name
[2], opname
, opname_len
);
5682 nondec_suffix
= nondec_name
+ opname_len
+ 2;
5684 dec_name
= XALLOCAVEC (char, 2 + dec_len
+ opname_len
+ mname_len
+ 1 + 1);
5687 memcpy (&dec_name
[2], DECIMAL_PREFIX
, dec_len
);
5688 memcpy (&dec_name
[2+dec_len
], opname
, opname_len
);
5689 dec_suffix
= dec_name
+ dec_len
+ opname_len
+ 2;
5691 fname
= GET_MODE_NAME (fmode
);
5692 tname
= GET_MODE_NAME (tmode
);
5694 if (DECIMAL_FLOAT_MODE_P(fmode
) || DECIMAL_FLOAT_MODE_P(tmode
))
5696 libfunc_name
= dec_name
;
5697 suffix
= dec_suffix
;
5701 libfunc_name
= nondec_name
;
5702 suffix
= nondec_suffix
;
5706 for (q
= fname
; *q
; p
++, q
++)
5708 for (q
= tname
; *q
; p
++, q
++)
5713 set_conv_libfunc (tab
, tmode
, fmode
,
5714 ggc_alloc_string (libfunc_name
, p
- libfunc_name
));
5717 /* Same as gen_interclass_conv_libfunc but verify that we are producing
5718 int->fp conversion. */
5721 gen_int_to_fp_conv_libfunc (convert_optab tab
,
5723 enum machine_mode tmode
,
5724 enum machine_mode fmode
)
5726 if (GET_MODE_CLASS (fmode
) != MODE_INT
)
5728 if (GET_MODE_CLASS (tmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (tmode
))
5730 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5733 /* ufloat_optab is special by using floatun for FP and floatuns decimal fp
5737 gen_ufloat_conv_libfunc (convert_optab tab
,
5738 const char *opname ATTRIBUTE_UNUSED
,
5739 enum machine_mode tmode
,
5740 enum machine_mode fmode
)
5742 if (DECIMAL_FLOAT_MODE_P (tmode
))
5743 gen_int_to_fp_conv_libfunc (tab
, "floatuns", tmode
, fmode
);
5745 gen_int_to_fp_conv_libfunc (tab
, "floatun", tmode
, fmode
);
5748 /* Same as gen_interclass_conv_libfunc but verify that we are producing
5749 fp->int conversion. */
5752 gen_int_to_fp_nondecimal_conv_libfunc (convert_optab tab
,
5754 enum machine_mode tmode
,
5755 enum machine_mode fmode
)
5757 if (GET_MODE_CLASS (fmode
) != MODE_INT
)
5759 if (GET_MODE_CLASS (tmode
) != MODE_FLOAT
)
5761 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5764 /* Same as gen_interclass_conv_libfunc but verify that we are producing
5765 fp->int conversion with no decimal floating point involved. */
5768 gen_fp_to_int_conv_libfunc (convert_optab tab
,
5770 enum machine_mode tmode
,
5771 enum machine_mode fmode
)
5773 if (GET_MODE_CLASS (fmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (fmode
))
5775 if (GET_MODE_CLASS (tmode
) != MODE_INT
)
5777 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5780 /* Initialize the libfunc fields of an of an intra-mode-class conversion optab.
5781 The string formation rules are
5782 similar to the ones for init_libfunc, above. */
5785 gen_intraclass_conv_libfunc (convert_optab tab
, const char *opname
,
5786 enum machine_mode tmode
, enum machine_mode fmode
)
5788 size_t opname_len
= strlen (opname
);
5789 size_t mname_len
= 0;
5791 const char *fname
, *tname
;
5793 char *nondec_name
, *dec_name
, *nondec_suffix
, *dec_suffix
;
5794 char *libfunc_name
, *suffix
;
5797 /* If this is a decimal conversion, add the current BID vs. DPD prefix that
5798 depends on which underlying decimal floating point format is used. */
5799 const size_t dec_len
= sizeof (DECIMAL_PREFIX
) - 1;
5801 mname_len
= strlen (GET_MODE_NAME (tmode
)) + strlen (GET_MODE_NAME (fmode
));
5803 nondec_name
= XALLOCAVEC (char, 2 + opname_len
+ mname_len
+ 1 + 1);
5804 nondec_name
[0] = '_';
5805 nondec_name
[1] = '_';
5806 memcpy (&nondec_name
[2], opname
, opname_len
);
5807 nondec_suffix
= nondec_name
+ opname_len
+ 2;
5809 dec_name
= XALLOCAVEC (char, 2 + dec_len
+ opname_len
+ mname_len
+ 1 + 1);
5812 memcpy (&dec_name
[2], DECIMAL_PREFIX
, dec_len
);
5813 memcpy (&dec_name
[2 + dec_len
], opname
, opname_len
);
5814 dec_suffix
= dec_name
+ dec_len
+ opname_len
+ 2;
5816 fname
= GET_MODE_NAME (fmode
);
5817 tname
= GET_MODE_NAME (tmode
);
5819 if (DECIMAL_FLOAT_MODE_P(fmode
) || DECIMAL_FLOAT_MODE_P(tmode
))
5821 libfunc_name
= dec_name
;
5822 suffix
= dec_suffix
;
5826 libfunc_name
= nondec_name
;
5827 suffix
= nondec_suffix
;
5831 for (q
= fname
; *q
; p
++, q
++)
5833 for (q
= tname
; *q
; p
++, q
++)
5839 set_conv_libfunc (tab
, tmode
, fmode
,
5840 ggc_alloc_string (libfunc_name
, p
- libfunc_name
));
5843 /* Pick proper libcall for trunc_optab. We need to chose if we do
5844 truncation or extension and interclass or intraclass. */
5847 gen_trunc_conv_libfunc (convert_optab tab
,
5849 enum machine_mode tmode
,
5850 enum machine_mode fmode
)
5852 if (GET_MODE_CLASS (tmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (tmode
))
5854 if (GET_MODE_CLASS (fmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (fmode
))
5859 if ((GET_MODE_CLASS (tmode
) == MODE_FLOAT
&& DECIMAL_FLOAT_MODE_P (fmode
))
5860 || (GET_MODE_CLASS (fmode
) == MODE_FLOAT
&& DECIMAL_FLOAT_MODE_P (tmode
)))
5861 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5863 if (GET_MODE_PRECISION (fmode
) <= GET_MODE_PRECISION (tmode
))
5866 if ((GET_MODE_CLASS (tmode
) == MODE_FLOAT
5867 && GET_MODE_CLASS (fmode
) == MODE_FLOAT
)
5868 || (DECIMAL_FLOAT_MODE_P (fmode
) && DECIMAL_FLOAT_MODE_P (tmode
)))
5869 gen_intraclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5872 /* Pick proper libcall for extend_optab. We need to chose if we do
5873 truncation or extension and interclass or intraclass. */
5876 gen_extend_conv_libfunc (convert_optab tab
,
5877 const char *opname ATTRIBUTE_UNUSED
,
5878 enum machine_mode tmode
,
5879 enum machine_mode fmode
)
5881 if (GET_MODE_CLASS (tmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (tmode
))
5883 if (GET_MODE_CLASS (fmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (fmode
))
5888 if ((GET_MODE_CLASS (tmode
) == MODE_FLOAT
&& DECIMAL_FLOAT_MODE_P (fmode
))
5889 || (GET_MODE_CLASS (fmode
) == MODE_FLOAT
&& DECIMAL_FLOAT_MODE_P (tmode
)))
5890 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5892 if (GET_MODE_PRECISION (fmode
) > GET_MODE_PRECISION (tmode
))
5895 if ((GET_MODE_CLASS (tmode
) == MODE_FLOAT
5896 && GET_MODE_CLASS (fmode
) == MODE_FLOAT
)
5897 || (DECIMAL_FLOAT_MODE_P (fmode
) && DECIMAL_FLOAT_MODE_P (tmode
)))
5898 gen_intraclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5901 /* Pick proper libcall for fract_optab. We need to chose if we do
5902 interclass or intraclass. */
5905 gen_fract_conv_libfunc (convert_optab tab
,
5907 enum machine_mode tmode
,
5908 enum machine_mode fmode
)
5912 if (!(ALL_FIXED_POINT_MODE_P (tmode
) || ALL_FIXED_POINT_MODE_P (fmode
)))
5915 if (GET_MODE_CLASS (tmode
) == GET_MODE_CLASS (fmode
))
5916 gen_intraclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5918 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5921 /* Pick proper libcall for fractuns_optab. */
5924 gen_fractuns_conv_libfunc (convert_optab tab
,
5926 enum machine_mode tmode
,
5927 enum machine_mode fmode
)
5931 /* One mode must be a fixed-point mode, and the other must be an integer
5933 if (!((ALL_FIXED_POINT_MODE_P (tmode
) && GET_MODE_CLASS (fmode
) == MODE_INT
)
5934 || (ALL_FIXED_POINT_MODE_P (fmode
)
5935 && GET_MODE_CLASS (tmode
) == MODE_INT
)))
5938 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5941 /* Pick proper libcall for satfract_optab. We need to chose if we do
5942 interclass or intraclass. */
5945 gen_satfract_conv_libfunc (convert_optab tab
,
5947 enum machine_mode tmode
,
5948 enum machine_mode fmode
)
5952 /* TMODE must be a fixed-point mode. */
5953 if (!ALL_FIXED_POINT_MODE_P (tmode
))
5956 if (GET_MODE_CLASS (tmode
) == GET_MODE_CLASS (fmode
))
5957 gen_intraclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5959 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5962 /* Pick proper libcall for satfractuns_optab. */
5965 gen_satfractuns_conv_libfunc (convert_optab tab
,
5967 enum machine_mode tmode
,
5968 enum machine_mode fmode
)
5972 /* TMODE must be a fixed-point mode, and FMODE must be an integer mode. */
5973 if (!(ALL_FIXED_POINT_MODE_P (tmode
) && GET_MODE_CLASS (fmode
) == MODE_INT
))
5976 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5979 /* A table of previously-created libfuncs, hashed by name. */
5980 static GTY ((param_is (union tree_node
))) htab_t libfunc_decls
;
5982 /* Hashtable callbacks for libfunc_decls. */
5985 libfunc_decl_hash (const void *entry
)
5987 return IDENTIFIER_HASH_VALUE (DECL_NAME ((const_tree
) entry
));
5991 libfunc_decl_eq (const void *entry1
, const void *entry2
)
5993 return DECL_NAME ((const_tree
) entry1
) == (const_tree
) entry2
;
5996 /* Build a decl for a libfunc named NAME. */
5999 build_libfunc_function (const char *name
)
6001 tree decl
= build_decl (UNKNOWN_LOCATION
, FUNCTION_DECL
,
6002 get_identifier (name
),
6003 build_function_type (integer_type_node
, NULL_TREE
));
6004 /* ??? We don't have any type information except for this is
6005 a function. Pretend this is "int foo()". */
6006 DECL_ARTIFICIAL (decl
) = 1;
6007 DECL_EXTERNAL (decl
) = 1;
6008 TREE_PUBLIC (decl
) = 1;
6009 gcc_assert (DECL_ASSEMBLER_NAME (decl
));
6011 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
6012 are the flags assigned by targetm.encode_section_info. */
6013 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl
), 0), NULL
);
6019 init_one_libfunc (const char *name
)
6025 if (libfunc_decls
== NULL
)
6026 libfunc_decls
= htab_create_ggc (37, libfunc_decl_hash
,
6027 libfunc_decl_eq
, NULL
);
6029 /* See if we have already created a libfunc decl for this function. */
6030 id
= get_identifier (name
);
6031 hash
= IDENTIFIER_HASH_VALUE (id
);
6032 slot
= htab_find_slot_with_hash (libfunc_decls
, id
, hash
, INSERT
);
6033 decl
= (tree
) *slot
;
6036 /* Create a new decl, so that it can be passed to
6037 targetm.encode_section_info. */
6038 decl
= build_libfunc_function (name
);
6041 return XEXP (DECL_RTL (decl
), 0);
6044 /* Adjust the assembler name of libfunc NAME to ASMSPEC. */
6047 set_user_assembler_libfunc (const char *name
, const char *asmspec
)
6053 id
= get_identifier (name
);
6054 hash
= IDENTIFIER_HASH_VALUE (id
);
6055 slot
= htab_find_slot_with_hash (libfunc_decls
, id
, hash
, NO_INSERT
);
6057 decl
= (tree
) *slot
;
6058 set_user_assembler_name (decl
, asmspec
);
6059 return XEXP (DECL_RTL (decl
), 0);
6062 /* Call this to reset the function entry for one optab (OPTABLE) in mode
6063 MODE to NAME, which should be either 0 or a string constant. */
6065 set_optab_libfunc (optab optable
, enum machine_mode mode
, const char *name
)
6068 struct libfunc_entry e
;
6069 struct libfunc_entry
**slot
;
6070 e
.optab
= (size_t) (optable
- &optab_table
[0]);
6075 val
= init_one_libfunc (name
);
6078 slot
= (struct libfunc_entry
**) htab_find_slot (libfunc_hash
, &e
, INSERT
);
6080 *slot
= ggc_alloc_libfunc_entry ();
6081 (*slot
)->optab
= (size_t) (optable
- &optab_table
[0]);
6082 (*slot
)->mode1
= mode
;
6083 (*slot
)->mode2
= VOIDmode
;
6084 (*slot
)->libfunc
= val
;
6087 /* Call this to reset the function entry for one conversion optab
6088 (OPTABLE) from mode FMODE to mode TMODE to NAME, which should be
6089 either 0 or a string constant. */
6091 set_conv_libfunc (convert_optab optable
, enum machine_mode tmode
,
6092 enum machine_mode fmode
, const char *name
)
6095 struct libfunc_entry e
;
6096 struct libfunc_entry
**slot
;
6097 e
.optab
= (size_t) (optable
- &convert_optab_table
[0]);
6102 val
= init_one_libfunc (name
);
6105 slot
= (struct libfunc_entry
**) htab_find_slot (libfunc_hash
, &e
, INSERT
);
6107 *slot
= ggc_alloc_libfunc_entry ();
6108 (*slot
)->optab
= (size_t) (optable
- &convert_optab_table
[0]);
6109 (*slot
)->mode1
= tmode
;
6110 (*slot
)->mode2
= fmode
;
6111 (*slot
)->libfunc
= val
;
6114 /* Call this to initialize the contents of the optabs
6115 appropriately for the current target machine. */
6122 htab_empty (libfunc_hash
);
6123 /* We statically initialize the insn_codes with the equivalent of
6124 CODE_FOR_nothing. Repeat the process if reinitialising. */
6128 libfunc_hash
= htab_create_ggc (10, hash_libfunc
, eq_libfunc
, NULL
);
6130 init_optab (add_optab
, PLUS
);
6131 init_optabv (addv_optab
, PLUS
);
6132 init_optab (sub_optab
, MINUS
);
6133 init_optabv (subv_optab
, MINUS
);
6134 init_optab (ssadd_optab
, SS_PLUS
);
6135 init_optab (usadd_optab
, US_PLUS
);
6136 init_optab (sssub_optab
, SS_MINUS
);
6137 init_optab (ussub_optab
, US_MINUS
);
6138 init_optab (smul_optab
, MULT
);
6139 init_optab (ssmul_optab
, SS_MULT
);
6140 init_optab (usmul_optab
, US_MULT
);
6141 init_optabv (smulv_optab
, MULT
);
6142 init_optab (smul_highpart_optab
, UNKNOWN
);
6143 init_optab (umul_highpart_optab
, UNKNOWN
);
6144 init_optab (smul_widen_optab
, UNKNOWN
);
6145 init_optab (umul_widen_optab
, UNKNOWN
);
6146 init_optab (usmul_widen_optab
, UNKNOWN
);
6147 init_optab (smadd_widen_optab
, UNKNOWN
);
6148 init_optab (umadd_widen_optab
, UNKNOWN
);
6149 init_optab (ssmadd_widen_optab
, UNKNOWN
);
6150 init_optab (usmadd_widen_optab
, UNKNOWN
);
6151 init_optab (smsub_widen_optab
, UNKNOWN
);
6152 init_optab (umsub_widen_optab
, UNKNOWN
);
6153 init_optab (ssmsub_widen_optab
, UNKNOWN
);
6154 init_optab (usmsub_widen_optab
, UNKNOWN
);
6155 init_optab (sdiv_optab
, DIV
);
6156 init_optab (ssdiv_optab
, SS_DIV
);
6157 init_optab (usdiv_optab
, US_DIV
);
6158 init_optabv (sdivv_optab
, DIV
);
6159 init_optab (sdivmod_optab
, UNKNOWN
);
6160 init_optab (udiv_optab
, UDIV
);
6161 init_optab (udivmod_optab
, UNKNOWN
);
6162 init_optab (smod_optab
, MOD
);
6163 init_optab (umod_optab
, UMOD
);
6164 init_optab (fmod_optab
, UNKNOWN
);
6165 init_optab (remainder_optab
, UNKNOWN
);
6166 init_optab (ftrunc_optab
, UNKNOWN
);
6167 init_optab (and_optab
, AND
);
6168 init_optab (ior_optab
, IOR
);
6169 init_optab (xor_optab
, XOR
);
6170 init_optab (ashl_optab
, ASHIFT
);
6171 init_optab (ssashl_optab
, SS_ASHIFT
);
6172 init_optab (usashl_optab
, US_ASHIFT
);
6173 init_optab (ashr_optab
, ASHIFTRT
);
6174 init_optab (lshr_optab
, LSHIFTRT
);
6175 init_optab (rotl_optab
, ROTATE
);
6176 init_optab (rotr_optab
, ROTATERT
);
6177 init_optab (smin_optab
, SMIN
);
6178 init_optab (smax_optab
, SMAX
);
6179 init_optab (umin_optab
, UMIN
);
6180 init_optab (umax_optab
, UMAX
);
6181 init_optab (pow_optab
, UNKNOWN
);
6182 init_optab (atan2_optab
, UNKNOWN
);
6184 /* These three have codes assigned exclusively for the sake of
6186 init_optab (mov_optab
, SET
);
6187 init_optab (movstrict_optab
, STRICT_LOW_PART
);
6188 init_optab (cbranch_optab
, COMPARE
);
6190 init_optab (cmov_optab
, UNKNOWN
);
6191 init_optab (cstore_optab
, UNKNOWN
);
6192 init_optab (ctrap_optab
, UNKNOWN
);
6194 init_optab (storent_optab
, UNKNOWN
);
6196 init_optab (cmp_optab
, UNKNOWN
);
6197 init_optab (ucmp_optab
, UNKNOWN
);
6199 init_optab (eq_optab
, EQ
);
6200 init_optab (ne_optab
, NE
);
6201 init_optab (gt_optab
, GT
);
6202 init_optab (ge_optab
, GE
);
6203 init_optab (lt_optab
, LT
);
6204 init_optab (le_optab
, LE
);
6205 init_optab (unord_optab
, UNORDERED
);
6207 init_optab (neg_optab
, NEG
);
6208 init_optab (ssneg_optab
, SS_NEG
);
6209 init_optab (usneg_optab
, US_NEG
);
6210 init_optabv (negv_optab
, NEG
);
6211 init_optab (abs_optab
, ABS
);
6212 init_optabv (absv_optab
, ABS
);
6213 init_optab (addcc_optab
, UNKNOWN
);
6214 init_optab (one_cmpl_optab
, NOT
);
6215 init_optab (bswap_optab
, BSWAP
);
6216 init_optab (ffs_optab
, FFS
);
6217 init_optab (clz_optab
, CLZ
);
6218 init_optab (ctz_optab
, CTZ
);
6219 init_optab (popcount_optab
, POPCOUNT
);
6220 init_optab (parity_optab
, PARITY
);
6221 init_optab (sqrt_optab
, SQRT
);
6222 init_optab (floor_optab
, UNKNOWN
);
6223 init_optab (ceil_optab
, UNKNOWN
);
6224 init_optab (round_optab
, UNKNOWN
);
6225 init_optab (btrunc_optab
, UNKNOWN
);
6226 init_optab (nearbyint_optab
, UNKNOWN
);
6227 init_optab (rint_optab
, UNKNOWN
);
6228 init_optab (sincos_optab
, UNKNOWN
);
6229 init_optab (sin_optab
, UNKNOWN
);
6230 init_optab (asin_optab
, UNKNOWN
);
6231 init_optab (cos_optab
, UNKNOWN
);
6232 init_optab (acos_optab
, UNKNOWN
);
6233 init_optab (exp_optab
, UNKNOWN
);
6234 init_optab (exp10_optab
, UNKNOWN
);
6235 init_optab (exp2_optab
, UNKNOWN
);
6236 init_optab (expm1_optab
, UNKNOWN
);
6237 init_optab (ldexp_optab
, UNKNOWN
);
6238 init_optab (scalb_optab
, UNKNOWN
);
6239 init_optab (significand_optab
, UNKNOWN
);
6240 init_optab (logb_optab
, UNKNOWN
);
6241 init_optab (ilogb_optab
, UNKNOWN
);
6242 init_optab (log_optab
, UNKNOWN
);
6243 init_optab (log10_optab
, UNKNOWN
);
6244 init_optab (log2_optab
, UNKNOWN
);
6245 init_optab (log1p_optab
, UNKNOWN
);
6246 init_optab (tan_optab
, UNKNOWN
);
6247 init_optab (atan_optab
, UNKNOWN
);
6248 init_optab (copysign_optab
, UNKNOWN
);
6249 init_optab (signbit_optab
, UNKNOWN
);
6251 init_optab (isinf_optab
, UNKNOWN
);
6253 init_optab (strlen_optab
, UNKNOWN
);
6254 init_optab (push_optab
, UNKNOWN
);
6256 init_optab (reduc_smax_optab
, UNKNOWN
);
6257 init_optab (reduc_umax_optab
, UNKNOWN
);
6258 init_optab (reduc_smin_optab
, UNKNOWN
);
6259 init_optab (reduc_umin_optab
, UNKNOWN
);
6260 init_optab (reduc_splus_optab
, UNKNOWN
);
6261 init_optab (reduc_uplus_optab
, UNKNOWN
);
6263 init_optab (ssum_widen_optab
, UNKNOWN
);
6264 init_optab (usum_widen_optab
, UNKNOWN
);
6265 init_optab (sdot_prod_optab
, UNKNOWN
);
6266 init_optab (udot_prod_optab
, UNKNOWN
);
6268 init_optab (vec_extract_optab
, UNKNOWN
);
6269 init_optab (vec_extract_even_optab
, UNKNOWN
);
6270 init_optab (vec_extract_odd_optab
, UNKNOWN
);
6271 init_optab (vec_interleave_high_optab
, UNKNOWN
);
6272 init_optab (vec_interleave_low_optab
, UNKNOWN
);
6273 init_optab (vec_set_optab
, UNKNOWN
);
6274 init_optab (vec_init_optab
, UNKNOWN
);
6275 init_optab (vec_shl_optab
, UNKNOWN
);
6276 init_optab (vec_shr_optab
, UNKNOWN
);
6277 init_optab (vec_realign_load_optab
, UNKNOWN
);
6278 init_optab (movmisalign_optab
, UNKNOWN
);
6279 init_optab (vec_widen_umult_hi_optab
, UNKNOWN
);
6280 init_optab (vec_widen_umult_lo_optab
, UNKNOWN
);
6281 init_optab (vec_widen_smult_hi_optab
, UNKNOWN
);
6282 init_optab (vec_widen_smult_lo_optab
, UNKNOWN
);
6283 init_optab (vec_unpacks_hi_optab
, UNKNOWN
);
6284 init_optab (vec_unpacks_lo_optab
, UNKNOWN
);
6285 init_optab (vec_unpacku_hi_optab
, UNKNOWN
);
6286 init_optab (vec_unpacku_lo_optab
, UNKNOWN
);
6287 init_optab (vec_unpacks_float_hi_optab
, UNKNOWN
);
6288 init_optab (vec_unpacks_float_lo_optab
, UNKNOWN
);
6289 init_optab (vec_unpacku_float_hi_optab
, UNKNOWN
);
6290 init_optab (vec_unpacku_float_lo_optab
, UNKNOWN
);
6291 init_optab (vec_pack_trunc_optab
, UNKNOWN
);
6292 init_optab (vec_pack_usat_optab
, UNKNOWN
);
6293 init_optab (vec_pack_ssat_optab
, UNKNOWN
);
6294 init_optab (vec_pack_ufix_trunc_optab
, UNKNOWN
);
6295 init_optab (vec_pack_sfix_trunc_optab
, UNKNOWN
);
6297 init_optab (powi_optab
, UNKNOWN
);
6300 init_convert_optab (sext_optab
, SIGN_EXTEND
);
6301 init_convert_optab (zext_optab
, ZERO_EXTEND
);
6302 init_convert_optab (trunc_optab
, TRUNCATE
);
6303 init_convert_optab (sfix_optab
, FIX
);
6304 init_convert_optab (ufix_optab
, UNSIGNED_FIX
);
6305 init_convert_optab (sfixtrunc_optab
, UNKNOWN
);
6306 init_convert_optab (ufixtrunc_optab
, UNKNOWN
);
6307 init_convert_optab (sfloat_optab
, FLOAT
);
6308 init_convert_optab (ufloat_optab
, UNSIGNED_FLOAT
);
6309 init_convert_optab (lrint_optab
, UNKNOWN
);
6310 init_convert_optab (lround_optab
, UNKNOWN
);
6311 init_convert_optab (lfloor_optab
, UNKNOWN
);
6312 init_convert_optab (lceil_optab
, UNKNOWN
);
6314 init_convert_optab (fract_optab
, FRACT_CONVERT
);
6315 init_convert_optab (fractuns_optab
, UNSIGNED_FRACT_CONVERT
);
6316 init_convert_optab (satfract_optab
, SAT_FRACT
);
6317 init_convert_optab (satfractuns_optab
, UNSIGNED_SAT_FRACT
);
6319 /* Fill in the optabs with the insns we support. */
6322 /* Initialize the optabs with the names of the library functions. */
6323 add_optab
->libcall_basename
= "add";
6324 add_optab
->libcall_suffix
= '3';
6325 add_optab
->libcall_gen
= gen_int_fp_fixed_libfunc
;
6326 addv_optab
->libcall_basename
= "add";
6327 addv_optab
->libcall_suffix
= '3';
6328 addv_optab
->libcall_gen
= gen_intv_fp_libfunc
;
6329 ssadd_optab
->libcall_basename
= "ssadd";
6330 ssadd_optab
->libcall_suffix
= '3';
6331 ssadd_optab
->libcall_gen
= gen_signed_fixed_libfunc
;
6332 usadd_optab
->libcall_basename
= "usadd";
6333 usadd_optab
->libcall_suffix
= '3';
6334 usadd_optab
->libcall_gen
= gen_unsigned_fixed_libfunc
;
6335 sub_optab
->libcall_basename
= "sub";
6336 sub_optab
->libcall_suffix
= '3';
6337 sub_optab
->libcall_gen
= gen_int_fp_fixed_libfunc
;
6338 subv_optab
->libcall_basename
= "sub";
6339 subv_optab
->libcall_suffix
= '3';
6340 subv_optab
->libcall_gen
= gen_intv_fp_libfunc
;
6341 sssub_optab
->libcall_basename
= "sssub";
6342 sssub_optab
->libcall_suffix
= '3';
6343 sssub_optab
->libcall_gen
= gen_signed_fixed_libfunc
;
6344 ussub_optab
->libcall_basename
= "ussub";
6345 ussub_optab
->libcall_suffix
= '3';
6346 ussub_optab
->libcall_gen
= gen_unsigned_fixed_libfunc
;
6347 smul_optab
->libcall_basename
= "mul";
6348 smul_optab
->libcall_suffix
= '3';
6349 smul_optab
->libcall_gen
= gen_int_fp_fixed_libfunc
;
6350 smulv_optab
->libcall_basename
= "mul";
6351 smulv_optab
->libcall_suffix
= '3';
6352 smulv_optab
->libcall_gen
= gen_intv_fp_libfunc
;
6353 ssmul_optab
->libcall_basename
= "ssmul";
6354 ssmul_optab
->libcall_suffix
= '3';
6355 ssmul_optab
->libcall_gen
= gen_signed_fixed_libfunc
;
6356 usmul_optab
->libcall_basename
= "usmul";
6357 usmul_optab
->libcall_suffix
= '3';
6358 usmul_optab
->libcall_gen
= gen_unsigned_fixed_libfunc
;
6359 sdiv_optab
->libcall_basename
= "div";
6360 sdiv_optab
->libcall_suffix
= '3';
6361 sdiv_optab
->libcall_gen
= gen_int_fp_signed_fixed_libfunc
;
6362 sdivv_optab
->libcall_basename
= "divv";
6363 sdivv_optab
->libcall_suffix
= '3';
6364 sdivv_optab
->libcall_gen
= gen_int_libfunc
;
6365 ssdiv_optab
->libcall_basename
= "ssdiv";
6366 ssdiv_optab
->libcall_suffix
= '3';
6367 ssdiv_optab
->libcall_gen
= gen_signed_fixed_libfunc
;
6368 udiv_optab
->libcall_basename
= "udiv";
6369 udiv_optab
->libcall_suffix
= '3';
6370 udiv_optab
->libcall_gen
= gen_int_unsigned_fixed_libfunc
;
6371 usdiv_optab
->libcall_basename
= "usdiv";
6372 usdiv_optab
->libcall_suffix
= '3';
6373 usdiv_optab
->libcall_gen
= gen_unsigned_fixed_libfunc
;
6374 sdivmod_optab
->libcall_basename
= "divmod";
6375 sdivmod_optab
->libcall_suffix
= '4';
6376 sdivmod_optab
->libcall_gen
= gen_int_libfunc
;
6377 udivmod_optab
->libcall_basename
= "udivmod";
6378 udivmod_optab
->libcall_suffix
= '4';
6379 udivmod_optab
->libcall_gen
= gen_int_libfunc
;
6380 smod_optab
->libcall_basename
= "mod";
6381 smod_optab
->libcall_suffix
= '3';
6382 smod_optab
->libcall_gen
= gen_int_libfunc
;
6383 umod_optab
->libcall_basename
= "umod";
6384 umod_optab
->libcall_suffix
= '3';
6385 umod_optab
->libcall_gen
= gen_int_libfunc
;
6386 ftrunc_optab
->libcall_basename
= "ftrunc";
6387 ftrunc_optab
->libcall_suffix
= '2';
6388 ftrunc_optab
->libcall_gen
= gen_fp_libfunc
;
6389 and_optab
->libcall_basename
= "and";
6390 and_optab
->libcall_suffix
= '3';
6391 and_optab
->libcall_gen
= gen_int_libfunc
;
6392 ior_optab
->libcall_basename
= "ior";
6393 ior_optab
->libcall_suffix
= '3';
6394 ior_optab
->libcall_gen
= gen_int_libfunc
;
6395 xor_optab
->libcall_basename
= "xor";
6396 xor_optab
->libcall_suffix
= '3';
6397 xor_optab
->libcall_gen
= gen_int_libfunc
;
6398 ashl_optab
->libcall_basename
= "ashl";
6399 ashl_optab
->libcall_suffix
= '3';
6400 ashl_optab
->libcall_gen
= gen_int_fixed_libfunc
;
6401 ssashl_optab
->libcall_basename
= "ssashl";
6402 ssashl_optab
->libcall_suffix
= '3';
6403 ssashl_optab
->libcall_gen
= gen_signed_fixed_libfunc
;
6404 usashl_optab
->libcall_basename
= "usashl";
6405 usashl_optab
->libcall_suffix
= '3';
6406 usashl_optab
->libcall_gen
= gen_unsigned_fixed_libfunc
;
6407 ashr_optab
->libcall_basename
= "ashr";
6408 ashr_optab
->libcall_suffix
= '3';
6409 ashr_optab
->libcall_gen
= gen_int_signed_fixed_libfunc
;
6410 lshr_optab
->libcall_basename
= "lshr";
6411 lshr_optab
->libcall_suffix
= '3';
6412 lshr_optab
->libcall_gen
= gen_int_unsigned_fixed_libfunc
;
6413 smin_optab
->libcall_basename
= "min";
6414 smin_optab
->libcall_suffix
= '3';
6415 smin_optab
->libcall_gen
= gen_int_fp_libfunc
;
6416 smax_optab
->libcall_basename
= "max";
6417 smax_optab
->libcall_suffix
= '3';
6418 smax_optab
->libcall_gen
= gen_int_fp_libfunc
;
6419 umin_optab
->libcall_basename
= "umin";
6420 umin_optab
->libcall_suffix
= '3';
6421 umin_optab
->libcall_gen
= gen_int_libfunc
;
6422 umax_optab
->libcall_basename
= "umax";
6423 umax_optab
->libcall_suffix
= '3';
6424 umax_optab
->libcall_gen
= gen_int_libfunc
;
6425 neg_optab
->libcall_basename
= "neg";
6426 neg_optab
->libcall_suffix
= '2';
6427 neg_optab
->libcall_gen
= gen_int_fp_fixed_libfunc
;
6428 ssneg_optab
->libcall_basename
= "ssneg";
6429 ssneg_optab
->libcall_suffix
= '2';
6430 ssneg_optab
->libcall_gen
= gen_signed_fixed_libfunc
;
6431 usneg_optab
->libcall_basename
= "usneg";
6432 usneg_optab
->libcall_suffix
= '2';
6433 usneg_optab
->libcall_gen
= gen_unsigned_fixed_libfunc
;
6434 negv_optab
->libcall_basename
= "neg";
6435 negv_optab
->libcall_suffix
= '2';
6436 negv_optab
->libcall_gen
= gen_intv_fp_libfunc
;
6437 one_cmpl_optab
->libcall_basename
= "one_cmpl";
6438 one_cmpl_optab
->libcall_suffix
= '2';
6439 one_cmpl_optab
->libcall_gen
= gen_int_libfunc
;
6440 ffs_optab
->libcall_basename
= "ffs";
6441 ffs_optab
->libcall_suffix
= '2';
6442 ffs_optab
->libcall_gen
= gen_int_libfunc
;
6443 clz_optab
->libcall_basename
= "clz";
6444 clz_optab
->libcall_suffix
= '2';
6445 clz_optab
->libcall_gen
= gen_int_libfunc
;
6446 ctz_optab
->libcall_basename
= "ctz";
6447 ctz_optab
->libcall_suffix
= '2';
6448 ctz_optab
->libcall_gen
= gen_int_libfunc
;
6449 popcount_optab
->libcall_basename
= "popcount";
6450 popcount_optab
->libcall_suffix
= '2';
6451 popcount_optab
->libcall_gen
= gen_int_libfunc
;
6452 parity_optab
->libcall_basename
= "parity";
6453 parity_optab
->libcall_suffix
= '2';
6454 parity_optab
->libcall_gen
= gen_int_libfunc
;
6456 /* Comparison libcalls for integers MUST come in pairs,
6458 cmp_optab
->libcall_basename
= "cmp";
6459 cmp_optab
->libcall_suffix
= '2';
6460 cmp_optab
->libcall_gen
= gen_int_fp_fixed_libfunc
;
6461 ucmp_optab
->libcall_basename
= "ucmp";
6462 ucmp_optab
->libcall_suffix
= '2';
6463 ucmp_optab
->libcall_gen
= gen_int_libfunc
;
6465 /* EQ etc are floating point only. */
6466 eq_optab
->libcall_basename
= "eq";
6467 eq_optab
->libcall_suffix
= '2';
6468 eq_optab
->libcall_gen
= gen_fp_libfunc
;
6469 ne_optab
->libcall_basename
= "ne";
6470 ne_optab
->libcall_suffix
= '2';
6471 ne_optab
->libcall_gen
= gen_fp_libfunc
;
6472 gt_optab
->libcall_basename
= "gt";
6473 gt_optab
->libcall_suffix
= '2';
6474 gt_optab
->libcall_gen
= gen_fp_libfunc
;
6475 ge_optab
->libcall_basename
= "ge";
6476 ge_optab
->libcall_suffix
= '2';
6477 ge_optab
->libcall_gen
= gen_fp_libfunc
;
6478 lt_optab
->libcall_basename
= "lt";
6479 lt_optab
->libcall_suffix
= '2';
6480 lt_optab
->libcall_gen
= gen_fp_libfunc
;
6481 le_optab
->libcall_basename
= "le";
6482 le_optab
->libcall_suffix
= '2';
6483 le_optab
->libcall_gen
= gen_fp_libfunc
;
6484 unord_optab
->libcall_basename
= "unord";
6485 unord_optab
->libcall_suffix
= '2';
6486 unord_optab
->libcall_gen
= gen_fp_libfunc
;
6488 powi_optab
->libcall_basename
= "powi";
6489 powi_optab
->libcall_suffix
= '2';
6490 powi_optab
->libcall_gen
= gen_fp_libfunc
;
6493 sfloat_optab
->libcall_basename
= "float";
6494 sfloat_optab
->libcall_gen
= gen_int_to_fp_conv_libfunc
;
6495 ufloat_optab
->libcall_gen
= gen_ufloat_conv_libfunc
;
6496 sfix_optab
->libcall_basename
= "fix";
6497 sfix_optab
->libcall_gen
= gen_fp_to_int_conv_libfunc
;
6498 ufix_optab
->libcall_basename
= "fixuns";
6499 ufix_optab
->libcall_gen
= gen_fp_to_int_conv_libfunc
;
6500 lrint_optab
->libcall_basename
= "lrint";
6501 lrint_optab
->libcall_gen
= gen_int_to_fp_nondecimal_conv_libfunc
;
6502 lround_optab
->libcall_basename
= "lround";
6503 lround_optab
->libcall_gen
= gen_int_to_fp_nondecimal_conv_libfunc
;
6504 lfloor_optab
->libcall_basename
= "lfloor";
6505 lfloor_optab
->libcall_gen
= gen_int_to_fp_nondecimal_conv_libfunc
;
6506 lceil_optab
->libcall_basename
= "lceil";
6507 lceil_optab
->libcall_gen
= gen_int_to_fp_nondecimal_conv_libfunc
;
6509 /* trunc_optab is also used for FLOAT_EXTEND. */
6510 sext_optab
->libcall_basename
= "extend";
6511 sext_optab
->libcall_gen
= gen_extend_conv_libfunc
;
6512 trunc_optab
->libcall_basename
= "trunc";
6513 trunc_optab
->libcall_gen
= gen_trunc_conv_libfunc
;
6515 /* Conversions for fixed-point modes and other modes. */
6516 fract_optab
->libcall_basename
= "fract";
6517 fract_optab
->libcall_gen
= gen_fract_conv_libfunc
;
6518 satfract_optab
->libcall_basename
= "satfract";
6519 satfract_optab
->libcall_gen
= gen_satfract_conv_libfunc
;
6520 fractuns_optab
->libcall_basename
= "fractuns";
6521 fractuns_optab
->libcall_gen
= gen_fractuns_conv_libfunc
;
6522 satfractuns_optab
->libcall_basename
= "satfractuns";
6523 satfractuns_optab
->libcall_gen
= gen_satfractuns_conv_libfunc
;
6525 /* The ffs function operates on `int'. Fall back on it if we do not
6526 have a libgcc2 function for that width. */
6527 if (INT_TYPE_SIZE
< BITS_PER_WORD
)
6528 set_optab_libfunc (ffs_optab
, mode_for_size (INT_TYPE_SIZE
, MODE_INT
, 0),
6531 /* Explicitly initialize the bswap libfuncs since we need them to be
6532 valid for things other than word_mode. */
6533 set_optab_libfunc (bswap_optab
, SImode
, "__bswapsi2");
6534 set_optab_libfunc (bswap_optab
, DImode
, "__bswapdi2");
6536 /* Use cabs for double complex abs, since systems generally have cabs.
6537 Don't define any libcall for float complex, so that cabs will be used. */
6538 if (complex_double_type_node
)
6539 set_optab_libfunc (abs_optab
, TYPE_MODE (complex_double_type_node
), "cabs");
6541 abort_libfunc
= init_one_libfunc ("abort");
6542 memcpy_libfunc
= init_one_libfunc ("memcpy");
6543 memmove_libfunc
= init_one_libfunc ("memmove");
6544 memcmp_libfunc
= init_one_libfunc ("memcmp");
6545 memset_libfunc
= init_one_libfunc ("memset");
6546 setbits_libfunc
= init_one_libfunc ("__setbits");
6548 #ifndef DONT_USE_BUILTIN_SETJMP
6549 setjmp_libfunc
= init_one_libfunc ("__builtin_setjmp");
6550 longjmp_libfunc
= init_one_libfunc ("__builtin_longjmp");
6552 setjmp_libfunc
= init_one_libfunc ("setjmp");
6553 longjmp_libfunc
= init_one_libfunc ("longjmp");
6555 unwind_sjlj_register_libfunc
= init_one_libfunc ("_Unwind_SjLj_Register");
6556 unwind_sjlj_unregister_libfunc
6557 = init_one_libfunc ("_Unwind_SjLj_Unregister");
6559 /* For function entry/exit instrumentation. */
6560 profile_function_entry_libfunc
6561 = init_one_libfunc ("__cyg_profile_func_enter");
6562 profile_function_exit_libfunc
6563 = init_one_libfunc ("__cyg_profile_func_exit");
6565 gcov_flush_libfunc
= init_one_libfunc ("__gcov_flush");
6567 /* Allow the target to add more libcalls or rename some, etc. */
6568 targetm
.init_libfuncs ();
6571 /* Print information about the current contents of the optabs on
6575 debug_optab_libfuncs (void)
6581 /* Dump the arithmetic optabs. */
6582 for (i
= 0; i
!= (int) OTI_MAX
; i
++)
6583 for (j
= 0; j
< NUM_MACHINE_MODES
; ++j
)
6588 o
= &optab_table
[i
];
6589 l
= optab_libfunc (o
, (enum machine_mode
) j
);
6592 gcc_assert (GET_CODE (l
) == SYMBOL_REF
);
6593 fprintf (stderr
, "%s\t%s:\t%s\n",
6594 GET_RTX_NAME (o
->code
),
6600 /* Dump the conversion optabs. */
6601 for (i
= 0; i
< (int) COI_MAX
; ++i
)
6602 for (j
= 0; j
< NUM_MACHINE_MODES
; ++j
)
6603 for (k
= 0; k
< NUM_MACHINE_MODES
; ++k
)
6608 o
= &convert_optab_table
[i
];
6609 l
= convert_optab_libfunc (o
, (enum machine_mode
) j
,
6610 (enum machine_mode
) k
);
6613 gcc_assert (GET_CODE (l
) == SYMBOL_REF
);
6614 fprintf (stderr
, "%s\t%s\t%s:\t%s\n",
6615 GET_RTX_NAME (o
->code
),
6624 /* Generate insns to trap with code TCODE if OP1 and OP2 satisfy condition
6625 CODE. Return 0 on failure. */
6628 gen_cond_trap (enum rtx_code code
, rtx op1
, rtx op2
, rtx tcode
)
6630 enum machine_mode mode
= GET_MODE (op1
);
6631 enum insn_code icode
;
6635 if (mode
== VOIDmode
)
6638 icode
= optab_handler (ctrap_optab
, mode
);
6639 if (icode
== CODE_FOR_nothing
)
6642 /* Some targets only accept a zero trap code. */
6643 if (insn_data
[icode
].operand
[3].predicate
6644 && !insn_data
[icode
].operand
[3].predicate (tcode
, VOIDmode
))
6647 do_pending_stack_adjust ();
6649 prepare_cmp_insn (op1
, op2
, code
, NULL_RTX
, false, OPTAB_DIRECT
,
6654 insn
= GEN_FCN (icode
) (trap_rtx
, XEXP (trap_rtx
, 0), XEXP (trap_rtx
, 1),
6657 /* If that failed, then give up. */
6665 insn
= get_insns ();
6670 /* Return rtx code for TCODE. Use UNSIGNEDP to select signed
6671 or unsigned operation code. */
6673 static enum rtx_code
6674 get_rtx_code (enum tree_code tcode
, bool unsignedp
)
6686 code
= unsignedp
? LTU
: LT
;
6689 code
= unsignedp
? LEU
: LE
;
6692 code
= unsignedp
? GTU
: GT
;
6695 code
= unsignedp
? GEU
: GE
;
6698 case UNORDERED_EXPR
:
6729 /* Return comparison rtx for COND. Use UNSIGNEDP to select signed or
6730 unsigned operators. Do not generate compare instruction. */
6733 vector_compare_rtx (tree cond
, bool unsignedp
, enum insn_code icode
)
6735 enum rtx_code rcode
;
6737 rtx rtx_op0
, rtx_op1
;
6739 /* This is unlikely. While generating VEC_COND_EXPR, auto vectorizer
6740 ensures that condition is a relational operation. */
6741 gcc_assert (COMPARISON_CLASS_P (cond
));
6743 rcode
= get_rtx_code (TREE_CODE (cond
), unsignedp
);
6744 t_op0
= TREE_OPERAND (cond
, 0);
6745 t_op1
= TREE_OPERAND (cond
, 1);
6747 /* Expand operands. */
6748 rtx_op0
= expand_expr (t_op0
, NULL_RTX
, TYPE_MODE (TREE_TYPE (t_op0
)),
6750 rtx_op1
= expand_expr (t_op1
, NULL_RTX
, TYPE_MODE (TREE_TYPE (t_op1
)),
6753 if (!insn_data
[icode
].operand
[4].predicate (rtx_op0
, GET_MODE (rtx_op0
))
6754 && GET_MODE (rtx_op0
) != VOIDmode
)
6755 rtx_op0
= force_reg (GET_MODE (rtx_op0
), rtx_op0
);
6757 if (!insn_data
[icode
].operand
[5].predicate (rtx_op1
, GET_MODE (rtx_op1
))
6758 && GET_MODE (rtx_op1
) != VOIDmode
)
6759 rtx_op1
= force_reg (GET_MODE (rtx_op1
), rtx_op1
);
6761 return gen_rtx_fmt_ee (rcode
, VOIDmode
, rtx_op0
, rtx_op1
);
6764 /* Return insn code for TYPE, the type of a VEC_COND_EXPR. */
6766 static inline enum insn_code
6767 get_vcond_icode (tree type
, enum machine_mode mode
)
6769 enum insn_code icode
= CODE_FOR_nothing
;
6771 if (TYPE_UNSIGNED (type
))
6772 icode
= direct_optab_handler (vcondu_optab
, mode
);
6774 icode
= direct_optab_handler (vcond_optab
, mode
);
6778 /* Return TRUE iff, appropriate vector insns are available
6779 for vector cond expr with type TYPE in VMODE mode. */
6782 expand_vec_cond_expr_p (tree type
, enum machine_mode vmode
)
6784 if (get_vcond_icode (type
, vmode
) == CODE_FOR_nothing
)
6789 /* Generate insns for a VEC_COND_EXPR, given its TYPE and its
6793 expand_vec_cond_expr (tree vec_cond_type
, tree op0
, tree op1
, tree op2
,
6796 enum insn_code icode
;
6797 rtx comparison
, rtx_op1
, rtx_op2
, cc_op0
, cc_op1
;
6798 enum machine_mode mode
= TYPE_MODE (vec_cond_type
);
6799 bool unsignedp
= TYPE_UNSIGNED (vec_cond_type
);
6801 icode
= get_vcond_icode (vec_cond_type
, mode
);
6802 if (icode
== CODE_FOR_nothing
)
6805 if (!target
|| !insn_data
[icode
].operand
[0].predicate (target
, mode
))
6806 target
= gen_reg_rtx (mode
);
6808 /* Get comparison rtx. First expand both cond expr operands. */
6809 comparison
= vector_compare_rtx (op0
,
6811 cc_op0
= XEXP (comparison
, 0);
6812 cc_op1
= XEXP (comparison
, 1);
6813 /* Expand both operands and force them in reg, if required. */
6814 rtx_op1
= expand_normal (op1
);
6815 if (!insn_data
[icode
].operand
[1].predicate (rtx_op1
, mode
)
6816 && mode
!= VOIDmode
)
6817 rtx_op1
= force_reg (mode
, rtx_op1
);
6819 rtx_op2
= expand_normal (op2
);
6820 if (!insn_data
[icode
].operand
[2].predicate (rtx_op2
, mode
)
6821 && mode
!= VOIDmode
)
6822 rtx_op2
= force_reg (mode
, rtx_op2
);
6824 /* Emit instruction! */
6825 emit_insn (GEN_FCN (icode
) (target
, rtx_op1
, rtx_op2
,
6826 comparison
, cc_op0
, cc_op1
));
6832 /* This is an internal subroutine of the other compare_and_swap expanders.
6833 MEM, OLD_VAL and NEW_VAL are as you'd expect for a compare-and-swap
6834 operation. TARGET is an optional place to store the value result of
6835 the operation. ICODE is the particular instruction to expand. Return
6836 the result of the operation. */
6839 expand_val_compare_and_swap_1 (rtx mem
, rtx old_val
, rtx new_val
,
6840 rtx target
, enum insn_code icode
)
6842 enum machine_mode mode
= GET_MODE (mem
);
6845 if (!target
|| !insn_data
[icode
].operand
[0].predicate (target
, mode
))
6846 target
= gen_reg_rtx (mode
);
6848 if (GET_MODE (old_val
) != VOIDmode
&& GET_MODE (old_val
) != mode
)
6849 old_val
= convert_modes (mode
, GET_MODE (old_val
), old_val
, 1);
6850 if (!insn_data
[icode
].operand
[2].predicate (old_val
, mode
))
6851 old_val
= force_reg (mode
, old_val
);
6853 if (GET_MODE (new_val
) != VOIDmode
&& GET_MODE (new_val
) != mode
)
6854 new_val
= convert_modes (mode
, GET_MODE (new_val
), new_val
, 1);
6855 if (!insn_data
[icode
].operand
[3].predicate (new_val
, mode
))
6856 new_val
= force_reg (mode
, new_val
);
6858 insn
= GEN_FCN (icode
) (target
, mem
, old_val
, new_val
);
6859 if (insn
== NULL_RTX
)
6866 /* Expand a compare-and-swap operation and return its value. */
6869 expand_val_compare_and_swap (rtx mem
, rtx old_val
, rtx new_val
, rtx target
)
6871 enum machine_mode mode
= GET_MODE (mem
);
6872 enum insn_code icode
6873 = direct_optab_handler (sync_compare_and_swap_optab
, mode
);
6875 if (icode
== CODE_FOR_nothing
)
6878 return expand_val_compare_and_swap_1 (mem
, old_val
, new_val
, target
, icode
);
6881 /* Helper function to find the MODE_CC set in a sync_compare_and_swap
6885 find_cc_set (rtx x
, const_rtx pat
, void *data
)
6887 if (REG_P (x
) && GET_MODE_CLASS (GET_MODE (x
)) == MODE_CC
6888 && GET_CODE (pat
) == SET
)
6890 rtx
*p_cc_reg
= (rtx
*) data
;
6891 gcc_assert (!*p_cc_reg
);
6896 /* Expand a compare-and-swap operation and store true into the result if
6897 the operation was successful and false otherwise. Return the result.
6898 Unlike other routines, TARGET is not optional. */
6901 expand_bool_compare_and_swap (rtx mem
, rtx old_val
, rtx new_val
, rtx target
)
6903 enum machine_mode mode
= GET_MODE (mem
);
6904 enum insn_code icode
;
6905 rtx subtarget
, seq
, cc_reg
;
6907 /* If the target supports a compare-and-swap pattern that simultaneously
6908 sets some flag for success, then use it. Otherwise use the regular
6909 compare-and-swap and follow that immediately with a compare insn. */
6910 icode
= direct_optab_handler (sync_compare_and_swap_optab
, mode
);
6911 if (icode
== CODE_FOR_nothing
)
6914 do_pending_stack_adjust ();
6918 subtarget
= expand_val_compare_and_swap_1 (mem
, old_val
, new_val
,
6921 if (subtarget
== NULL_RTX
)
6927 if (have_insn_for (COMPARE
, CCmode
))
6928 note_stores (PATTERN (get_last_insn ()), find_cc_set
, &cc_reg
);
6932 /* We might be comparing against an old value. Try again. :-( */
6933 if (!cc_reg
&& MEM_P (old_val
))
6936 old_val
= force_reg (mode
, old_val
);
6943 return emit_store_flag_force (target
, EQ
, cc_reg
, const0_rtx
, VOIDmode
, 0, 1);
6945 return emit_store_flag_force (target
, EQ
, subtarget
, old_val
, VOIDmode
, 1, 1);
6948 /* This is a helper function for the other atomic operations. This function
6949 emits a loop that contains SEQ that iterates until a compare-and-swap
6950 operation at the end succeeds. MEM is the memory to be modified. SEQ is
6951 a set of instructions that takes a value from OLD_REG as an input and
6952 produces a value in NEW_REG as an output. Before SEQ, OLD_REG will be
6953 set to the current contents of MEM. After SEQ, a compare-and-swap will
6954 attempt to update MEM with NEW_REG. The function returns true when the
6955 loop was generated successfully. */
6958 expand_compare_and_swap_loop (rtx mem
, rtx old_reg
, rtx new_reg
, rtx seq
)
6960 enum machine_mode mode
= GET_MODE (mem
);
6961 enum insn_code icode
;
6962 rtx label
, cmp_reg
, subtarget
, cc_reg
;
6964 /* The loop we want to generate looks like
6970 cmp_reg = compare-and-swap(mem, old_reg, new_reg)
6971 if (cmp_reg != old_reg)
6974 Note that we only do the plain load from memory once. Subsequent
6975 iterations use the value loaded by the compare-and-swap pattern. */
6977 label
= gen_label_rtx ();
6978 cmp_reg
= gen_reg_rtx (mode
);
6980 emit_move_insn (cmp_reg
, mem
);
6982 emit_move_insn (old_reg
, cmp_reg
);
6986 /* If the target supports a compare-and-swap pattern that simultaneously
6987 sets some flag for success, then use it. Otherwise use the regular
6988 compare-and-swap and follow that immediately with a compare insn. */
6989 icode
= direct_optab_handler (sync_compare_and_swap_optab
, mode
);
6990 if (icode
== CODE_FOR_nothing
)
6993 subtarget
= expand_val_compare_and_swap_1 (mem
, old_reg
, new_reg
,
6995 if (subtarget
== NULL_RTX
)
6999 if (have_insn_for (COMPARE
, CCmode
))
7000 note_stores (PATTERN (get_last_insn ()), find_cc_set
, &cc_reg
);
7004 old_reg
= const0_rtx
;
7008 if (subtarget
!= cmp_reg
)
7009 emit_move_insn (cmp_reg
, subtarget
);
7012 /* ??? Mark this jump predicted not taken? */
7013 emit_cmp_and_jump_insns (cmp_reg
, old_reg
, NE
, const0_rtx
, GET_MODE (cmp_reg
), 1,
7018 /* This function generates the atomic operation MEM CODE= VAL. In this
7019 case, we do not care about any resulting value. Returns NULL if we
7020 cannot generate the operation. */
7023 expand_sync_operation (rtx mem
, rtx val
, enum rtx_code code
)
7025 enum machine_mode mode
= GET_MODE (mem
);
7026 enum insn_code icode
;
7029 /* Look to see if the target supports the operation directly. */
7033 icode
= direct_optab_handler (sync_add_optab
, mode
);
7036 icode
= direct_optab_handler (sync_ior_optab
, mode
);
7039 icode
= direct_optab_handler (sync_xor_optab
, mode
);
7042 icode
= direct_optab_handler (sync_and_optab
, mode
);
7045 icode
= direct_optab_handler (sync_nand_optab
, mode
);
7049 icode
= direct_optab_handler (sync_sub_optab
, mode
);
7050 if (icode
== CODE_FOR_nothing
|| CONST_INT_P (val
))
7052 icode
= direct_optab_handler (sync_add_optab
, mode
);
7053 if (icode
!= CODE_FOR_nothing
)
7055 val
= expand_simple_unop (mode
, NEG
, val
, NULL_RTX
, 1);
7065 /* Generate the direct operation, if present. */
7066 if (icode
!= CODE_FOR_nothing
)
7068 if (GET_MODE (val
) != VOIDmode
&& GET_MODE (val
) != mode
)
7069 val
= convert_modes (mode
, GET_MODE (val
), val
, 1);
7070 if (!insn_data
[icode
].operand
[1].predicate (val
, mode
))
7071 val
= force_reg (mode
, val
);
7073 insn
= GEN_FCN (icode
) (mem
, val
);
7081 /* Failing that, generate a compare-and-swap loop in which we perform the
7082 operation with normal arithmetic instructions. */
7083 if (direct_optab_handler (sync_compare_and_swap_optab
, mode
)
7084 != CODE_FOR_nothing
)
7086 rtx t0
= gen_reg_rtx (mode
), t1
;
7093 t1
= expand_simple_binop (mode
, AND
, t1
, val
, NULL_RTX
,
7094 true, OPTAB_LIB_WIDEN
);
7095 t1
= expand_simple_unop (mode
, code
, t1
, NULL_RTX
, true);
7098 t1
= expand_simple_binop (mode
, code
, t1
, val
, NULL_RTX
,
7099 true, OPTAB_LIB_WIDEN
);
7100 insn
= get_insns ();
7103 if (t1
!= NULL
&& expand_compare_and_swap_loop (mem
, t0
, t1
, insn
))
7110 /* This function generates the atomic operation MEM CODE= VAL. In this
7111 case, we do care about the resulting value: if AFTER is true then
7112 return the value MEM holds after the operation, if AFTER is false
7113 then return the value MEM holds before the operation. TARGET is an
7114 optional place for the result value to be stored. */
7117 expand_sync_fetch_operation (rtx mem
, rtx val
, enum rtx_code code
,
7118 bool after
, rtx target
)
7120 enum machine_mode mode
= GET_MODE (mem
);
7121 enum insn_code old_code
, new_code
, icode
;
7125 /* Look to see if the target supports the operation directly. */
7129 old_code
= direct_optab_handler (sync_old_add_optab
, mode
);
7130 new_code
= direct_optab_handler (sync_new_add_optab
, mode
);
7133 old_code
= direct_optab_handler (sync_old_ior_optab
, mode
);
7134 new_code
= direct_optab_handler (sync_new_ior_optab
, mode
);
7137 old_code
= direct_optab_handler (sync_old_xor_optab
, mode
);
7138 new_code
= direct_optab_handler (sync_new_xor_optab
, mode
);
7141 old_code
= direct_optab_handler (sync_old_and_optab
, mode
);
7142 new_code
= direct_optab_handler (sync_new_and_optab
, mode
);
7145 old_code
= direct_optab_handler (sync_old_nand_optab
, mode
);
7146 new_code
= direct_optab_handler (sync_new_nand_optab
, mode
);
7150 old_code
= direct_optab_handler (sync_old_sub_optab
, mode
);
7151 new_code
= direct_optab_handler (sync_new_sub_optab
, mode
);
7152 if ((old_code
== CODE_FOR_nothing
&& new_code
== CODE_FOR_nothing
)
7153 || CONST_INT_P (val
))
7155 old_code
= direct_optab_handler (sync_old_add_optab
, mode
);
7156 new_code
= direct_optab_handler (sync_new_add_optab
, mode
);
7157 if (old_code
!= CODE_FOR_nothing
|| new_code
!= CODE_FOR_nothing
)
7159 val
= expand_simple_unop (mode
, NEG
, val
, NULL_RTX
, 1);
7169 /* If the target does supports the proper new/old operation, great. But
7170 if we only support the opposite old/new operation, check to see if we
7171 can compensate. In the case in which the old value is supported, then
7172 we can always perform the operation again with normal arithmetic. In
7173 the case in which the new value is supported, then we can only handle
7174 this in the case the operation is reversible. */
7179 if (icode
== CODE_FOR_nothing
)
7182 if (icode
!= CODE_FOR_nothing
)
7189 if (icode
== CODE_FOR_nothing
7190 && (code
== PLUS
|| code
== MINUS
|| code
== XOR
))
7193 if (icode
!= CODE_FOR_nothing
)
7198 /* If we found something supported, great. */
7199 if (icode
!= CODE_FOR_nothing
)
7201 if (!target
|| !insn_data
[icode
].operand
[0].predicate (target
, mode
))
7202 target
= gen_reg_rtx (mode
);
7204 if (GET_MODE (val
) != VOIDmode
&& GET_MODE (val
) != mode
)
7205 val
= convert_modes (mode
, GET_MODE (val
), val
, 1);
7206 if (!insn_data
[icode
].operand
[2].predicate (val
, mode
))
7207 val
= force_reg (mode
, val
);
7209 insn
= GEN_FCN (icode
) (target
, mem
, val
);
7214 /* If we need to compensate for using an operation with the
7215 wrong return value, do so now. */
7222 else if (code
== MINUS
)
7228 target
= expand_simple_binop (mode
, AND
, target
, val
,
7231 target
= expand_simple_unop (mode
, code
, target
,
7235 target
= expand_simple_binop (mode
, code
, target
, val
,
7244 /* Failing that, generate a compare-and-swap loop in which we perform the
7245 operation with normal arithmetic instructions. */
7246 if (direct_optab_handler (sync_compare_and_swap_optab
, mode
)
7247 != CODE_FOR_nothing
)
7249 rtx t0
= gen_reg_rtx (mode
), t1
;
7251 if (!target
|| !register_operand (target
, mode
))
7252 target
= gen_reg_rtx (mode
);
7257 emit_move_insn (target
, t0
);
7261 t1
= expand_simple_binop (mode
, AND
, t1
, val
, NULL_RTX
,
7262 true, OPTAB_LIB_WIDEN
);
7263 t1
= expand_simple_unop (mode
, code
, t1
, NULL_RTX
, true);
7266 t1
= expand_simple_binop (mode
, code
, t1
, val
, NULL_RTX
,
7267 true, OPTAB_LIB_WIDEN
);
7269 emit_move_insn (target
, t1
);
7271 insn
= get_insns ();
7274 if (t1
!= NULL
&& expand_compare_and_swap_loop (mem
, t0
, t1
, insn
))
7281 /* This function expands a test-and-set operation. Ideally we atomically
7282 store VAL in MEM and return the previous value in MEM. Some targets
7283 may not support this operation and only support VAL with the constant 1;
7284 in this case while the return value will be 0/1, but the exact value
7285 stored in MEM is target defined. TARGET is an option place to stick
7286 the return value. */
7289 expand_sync_lock_test_and_set (rtx mem
, rtx val
, rtx target
)
7291 enum machine_mode mode
= GET_MODE (mem
);
7292 enum insn_code icode
;
7295 /* If the target supports the test-and-set directly, great. */
7296 icode
= direct_optab_handler (sync_lock_test_and_set_optab
, mode
);
7297 if (icode
!= CODE_FOR_nothing
)
7299 if (!target
|| !insn_data
[icode
].operand
[0].predicate (target
, mode
))
7300 target
= gen_reg_rtx (mode
);
7302 if (GET_MODE (val
) != VOIDmode
&& GET_MODE (val
) != mode
)
7303 val
= convert_modes (mode
, GET_MODE (val
), val
, 1);
7304 if (!insn_data
[icode
].operand
[2].predicate (val
, mode
))
7305 val
= force_reg (mode
, val
);
7307 insn
= GEN_FCN (icode
) (target
, mem
, val
);
7315 /* Otherwise, use a compare-and-swap loop for the exchange. */
7316 if (direct_optab_handler (sync_compare_and_swap_optab
, mode
)
7317 != CODE_FOR_nothing
)
7319 if (!target
|| !register_operand (target
, mode
))
7320 target
= gen_reg_rtx (mode
);
7321 if (GET_MODE (val
) != VOIDmode
&& GET_MODE (val
) != mode
)
7322 val
= convert_modes (mode
, GET_MODE (val
), val
, 1);
7323 if (expand_compare_and_swap_loop (mem
, target
, val
, NULL_RTX
))
7330 #include "gt-optabs.h"