1 /* Expand the basic unary and binary arithmetic operations, for GNU compiler.
2 Copyright (C) 1987, 88, 92-98, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
26 /* Include insn-config.h before expr.h so that HAVE_conditional_move
27 is properly defined. */
28 #include "insn-config.h"
32 #include "insn-flags.h"
33 #include "insn-codes.h"
40 /* Each optab contains info on how this target machine
41 can perform a particular operation
42 for all sizes and kinds of operands.
44 The operation to be performed is often specified
45 by passing one of these optabs as an argument.
47 See expr.h for documentation of these optabs. */
49 optab optab_table
[OTI_MAX
];
51 rtx libfunc_table
[LTI_MAX
];
53 /* Tables of patterns for extending one integer mode to another. */
54 enum insn_code extendtab
[MAX_MACHINE_MODE
][MAX_MACHINE_MODE
][2];
56 /* Tables of patterns for converting between fixed and floating point. */
57 enum insn_code fixtab
[NUM_MACHINE_MODES
][NUM_MACHINE_MODES
][2];
58 enum insn_code fixtrunctab
[NUM_MACHINE_MODES
][NUM_MACHINE_MODES
][2];
59 enum insn_code floattab
[NUM_MACHINE_MODES
][NUM_MACHINE_MODES
][2];
61 /* Contains the optab used for each rtx code. */
62 optab code_to_optab
[NUM_RTX_CODE
+ 1];
64 /* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
65 gives the gen_function to make a branch to test that condition. */
67 rtxfun bcc_gen_fctn
[NUM_RTX_CODE
];
69 /* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
70 gives the insn code to make a store-condition insn
71 to test that condition. */
73 enum insn_code setcc_gen_code
[NUM_RTX_CODE
];
75 #ifdef HAVE_conditional_move
76 /* Indexed by the machine mode, gives the insn code to make a conditional
77 move insn. This is not indexed by the rtx-code like bcc_gen_fctn and
78 setcc_gen_code to cut down on the number of named patterns. Consider a day
79 when a lot more rtx codes are conditional (eg: for the ARM). */
81 enum insn_code movcc_gen_code
[NUM_MACHINE_MODES
];
84 static int add_equal_note
PROTO((rtx
, rtx
, enum rtx_code
, rtx
, rtx
));
85 static rtx widen_operand
PROTO((rtx
, enum machine_mode
,
86 enum machine_mode
, int, int));
87 static int expand_cmplxdiv_straight
PROTO((rtx
, rtx
, rtx
, rtx
,
88 rtx
, rtx
, enum machine_mode
,
89 int, enum optab_methods
,
90 enum mode_class
, optab
));
91 static int expand_cmplxdiv_wide
PROTO((rtx
, rtx
, rtx
, rtx
,
92 rtx
, rtx
, enum machine_mode
,
93 int, enum optab_methods
,
94 enum mode_class
, optab
));
95 static enum insn_code can_fix_p
PROTO((enum machine_mode
, enum machine_mode
,
97 static enum insn_code can_float_p
PROTO((enum machine_mode
, enum machine_mode
,
99 static rtx ftruncify
PROTO((rtx
));
100 static optab init_optab
PROTO((enum rtx_code
));
101 static void init_libfuncs
PROTO((optab
, int, int, const char *, int));
102 static void init_integral_libfuncs
PROTO((optab
, const char *, int));
103 static void init_floating_libfuncs
PROTO((optab
, const char *, int));
104 #ifdef HAVE_conditional_trap
105 static void init_traps
PROTO((void));
107 static int cmp_available_p
PROTO((enum machine_mode
, int));
108 static void emit_cmp_and_jump_insn_1
PROTO((rtx
, rtx
, enum machine_mode
,
109 enum rtx_code
, int, rtx
));
110 static void prepare_cmp_insn
PROTO((rtx
*, rtx
*, enum rtx_code
*, rtx
,
111 enum machine_mode
*, int *, int));
112 static rtx prepare_operand
PROTO((int, rtx
, int, enum machine_mode
,
113 enum machine_mode
, int));
114 static void prepare_float_lib_cmp
PROTO((rtx
*, rtx
*, enum rtx_code
*,
115 enum machine_mode
*, int *));
117 /* Add a REG_EQUAL note to the last insn in SEQ. TARGET is being set to
118 the result of operation CODE applied to OP0 (and OP1 if it is a binary
121 If the last insn does not set TARGET, don't do anything, but return 1.
123 If a previous insn sets TARGET and TARGET is one of OP0 or OP1,
124 don't add the REG_EQUAL note but return 0. Our caller can then try
125 again, ensuring that TARGET is not one of the operands. */
128 add_equal_note (seq
, target
, code
, op0
, op1
)
138 if ((GET_RTX_CLASS (code
) != '1' && GET_RTX_CLASS (code
) != '2'
139 && GET_RTX_CLASS (code
) != 'c' && GET_RTX_CLASS (code
) != '<')
140 || GET_CODE (seq
) != SEQUENCE
141 || (set
= single_set (XVECEXP (seq
, 0, XVECLEN (seq
, 0) - 1))) == 0
142 || GET_CODE (target
) == ZERO_EXTRACT
143 || (! rtx_equal_p (SET_DEST (set
), target
)
144 /* For a STRICT_LOW_PART, the REG_NOTE applies to what is inside the
146 && (GET_CODE (SET_DEST (set
)) != STRICT_LOW_PART
147 || ! rtx_equal_p (SUBREG_REG (XEXP (SET_DEST (set
), 0)),
151 /* If TARGET is in OP0 or OP1, check if anything in SEQ sets TARGET
152 besides the last insn. */
153 if (reg_overlap_mentioned_p (target
, op0
)
154 || (op1
&& reg_overlap_mentioned_p (target
, op1
)))
155 for (i
= XVECLEN (seq
, 0) - 2; i
>= 0; i
--)
156 if (reg_set_p (target
, XVECEXP (seq
, 0, i
)))
159 if (GET_RTX_CLASS (code
) == '1')
160 note
= gen_rtx_fmt_e (code
, GET_MODE (target
), copy_rtx (op0
));
162 note
= gen_rtx_fmt_ee (code
, GET_MODE (target
), copy_rtx (op0
), copy_rtx (op1
));
164 set_unique_reg_note (XVECEXP (seq
, 0, XVECLEN (seq
, 0) - 1), REG_EQUAL
, note
);
169 /* Widen OP to MODE and return the rtx for the widened operand. UNSIGNEDP
170 says whether OP is signed or unsigned. NO_EXTEND is nonzero if we need
171 not actually do a sign-extend or zero-extend, but can leave the
172 higher-order bits of the result rtx undefined, for example, in the case
173 of logical operations, but not right shifts. */
176 widen_operand (op
, mode
, oldmode
, unsignedp
, no_extend
)
178 enum machine_mode mode
, oldmode
;
184 /* If we must extend do so. If OP is either a constant or a SUBREG
185 for a promoted object, also extend since it will be more efficient to
188 || GET_MODE (op
) == VOIDmode
189 || (GET_CODE (op
) == SUBREG
&& SUBREG_PROMOTED_VAR_P (op
)))
190 return convert_modes (mode
, oldmode
, op
, unsignedp
);
192 /* If MODE is no wider than a single word, we return a paradoxical
194 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
195 return gen_rtx_SUBREG (mode
, force_reg (GET_MODE (op
), op
), 0);
197 /* Otherwise, get an object of MODE, clobber it, and set the low-order
200 result
= gen_reg_rtx (mode
);
201 emit_insn (gen_rtx_CLOBBER (VOIDmode
, result
));
202 emit_move_insn (gen_lowpart (GET_MODE (op
), result
), op
);
206 /* Generate code to perform a straightforward complex divide. */
209 expand_cmplxdiv_straight (real0
, real1
, imag0
, imag1
, realr
, imagr
, submode
,
210 unsignedp
, methods
, class, binoptab
)
211 rtx real0
, real1
, imag0
, imag1
, realr
, imagr
;
212 enum machine_mode submode
;
214 enum optab_methods methods
;
215 enum mode_class
class;
223 /* Don't fetch these from memory more than once. */
224 real0
= force_reg (submode
, real0
);
225 real1
= force_reg (submode
, real1
);
228 imag0
= force_reg (submode
, imag0
);
230 imag1
= force_reg (submode
, imag1
);
232 /* Divisor: c*c + d*d. */
233 temp1
= expand_binop (submode
, smul_optab
, real1
, real1
,
234 NULL_RTX
, unsignedp
, methods
);
236 temp2
= expand_binop (submode
, smul_optab
, imag1
, imag1
,
237 NULL_RTX
, unsignedp
, methods
);
239 if (temp1
== 0 || temp2
== 0)
242 divisor
= expand_binop (submode
, add_optab
, temp1
, temp2
,
243 NULL_RTX
, unsignedp
, methods
);
249 /* Mathematically, ((a)(c-id))/divisor. */
250 /* Computationally, (a+i0) / (c+id) = (ac/(cc+dd)) + i(-ad/(cc+dd)). */
252 /* Calculate the dividend. */
253 real_t
= expand_binop (submode
, smul_optab
, real0
, real1
,
254 NULL_RTX
, unsignedp
, methods
);
256 imag_t
= expand_binop (submode
, smul_optab
, real0
, imag1
,
257 NULL_RTX
, unsignedp
, methods
);
259 if (real_t
== 0 || imag_t
== 0)
262 imag_t
= expand_unop (submode
, neg_optab
, imag_t
,
263 NULL_RTX
, unsignedp
);
267 /* Mathematically, ((a+ib)(c-id))/divider. */
268 /* Calculate the dividend. */
269 temp1
= expand_binop (submode
, smul_optab
, real0
, real1
,
270 NULL_RTX
, unsignedp
, methods
);
272 temp2
= expand_binop (submode
, smul_optab
, imag0
, imag1
,
273 NULL_RTX
, unsignedp
, methods
);
275 if (temp1
== 0 || temp2
== 0)
278 real_t
= expand_binop (submode
, add_optab
, temp1
, temp2
,
279 NULL_RTX
, unsignedp
, methods
);
281 temp1
= expand_binop (submode
, smul_optab
, imag0
, real1
,
282 NULL_RTX
, unsignedp
, methods
);
284 temp2
= expand_binop (submode
, smul_optab
, real0
, imag1
,
285 NULL_RTX
, unsignedp
, methods
);
287 if (temp1
== 0 || temp2
== 0)
290 imag_t
= expand_binop (submode
, sub_optab
, temp1
, temp2
,
291 NULL_RTX
, unsignedp
, methods
);
293 if (real_t
== 0 || imag_t
== 0)
297 if (class == MODE_COMPLEX_FLOAT
)
298 res
= expand_binop (submode
, binoptab
, real_t
, divisor
,
299 realr
, unsignedp
, methods
);
301 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
302 real_t
, divisor
, realr
, unsignedp
);
308 emit_move_insn (realr
, res
);
310 if (class == MODE_COMPLEX_FLOAT
)
311 res
= expand_binop (submode
, binoptab
, imag_t
, divisor
,
312 imagr
, unsignedp
, methods
);
314 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
315 imag_t
, divisor
, imagr
, unsignedp
);
321 emit_move_insn (imagr
, res
);
326 /* Generate code to perform a wide-input-range-acceptable complex divide. */
329 expand_cmplxdiv_wide (real0
, real1
, imag0
, imag1
, realr
, imagr
, submode
,
330 unsignedp
, methods
, class, binoptab
)
331 rtx real0
, real1
, imag0
, imag1
, realr
, imagr
;
332 enum machine_mode submode
;
334 enum optab_methods methods
;
335 enum mode_class
class;
340 rtx temp1
, temp2
, lab1
, lab2
;
341 enum machine_mode mode
;
345 /* Don't fetch these from memory more than once. */
346 real0
= force_reg (submode
, real0
);
347 real1
= force_reg (submode
, real1
);
350 imag0
= force_reg (submode
, imag0
);
352 imag1
= force_reg (submode
, imag1
);
354 /* XXX What's an "unsigned" complex number? */
362 temp1
= expand_abs (submode
, real1
, NULL_RTX
, 1);
363 temp2
= expand_abs (submode
, imag1
, NULL_RTX
, 1);
366 if (temp1
== 0 || temp2
== 0)
369 mode
= GET_MODE (temp1
);
370 align
= GET_MODE_ALIGNMENT (mode
);
371 lab1
= gen_label_rtx ();
372 emit_cmp_and_jump_insns (temp1
, temp2
, LT
, NULL_RTX
,
373 mode
, unsignedp
, align
, lab1
);
375 /* |c| >= |d|; use ratio d/c to scale dividend and divisor. */
377 if (class == MODE_COMPLEX_FLOAT
)
378 ratio
= expand_binop (submode
, binoptab
, imag1
, real1
,
379 NULL_RTX
, unsignedp
, methods
);
381 ratio
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
382 imag1
, real1
, NULL_RTX
, unsignedp
);
387 /* Calculate divisor. */
389 temp1
= expand_binop (submode
, smul_optab
, imag1
, ratio
,
390 NULL_RTX
, unsignedp
, methods
);
395 divisor
= expand_binop (submode
, add_optab
, temp1
, real1
,
396 NULL_RTX
, unsignedp
, methods
);
401 /* Calculate dividend. */
407 /* Compute a / (c+id) as a / (c+d(d/c)) + i (-a(d/c)) / (c+d(d/c)). */
409 imag_t
= expand_binop (submode
, smul_optab
, real0
, ratio
,
410 NULL_RTX
, unsignedp
, methods
);
415 imag_t
= expand_unop (submode
, neg_optab
, imag_t
,
416 NULL_RTX
, unsignedp
);
418 if (real_t
== 0 || imag_t
== 0)
423 /* Compute (a+ib)/(c+id) as
424 (a+b(d/c))/(c+d(d/c) + i(b-a(d/c))/(c+d(d/c)). */
426 temp1
= expand_binop (submode
, smul_optab
, imag0
, ratio
,
427 NULL_RTX
, unsignedp
, methods
);
432 real_t
= expand_binop (submode
, add_optab
, temp1
, real0
,
433 NULL_RTX
, unsignedp
, methods
);
435 temp1
= expand_binop (submode
, smul_optab
, real0
, ratio
,
436 NULL_RTX
, unsignedp
, methods
);
441 imag_t
= expand_binop (submode
, sub_optab
, imag0
, temp1
,
442 NULL_RTX
, unsignedp
, methods
);
444 if (real_t
== 0 || imag_t
== 0)
448 if (class == MODE_COMPLEX_FLOAT
)
449 res
= expand_binop (submode
, binoptab
, real_t
, divisor
,
450 realr
, unsignedp
, methods
);
452 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
453 real_t
, divisor
, realr
, unsignedp
);
459 emit_move_insn (realr
, res
);
461 if (class == MODE_COMPLEX_FLOAT
)
462 res
= expand_binop (submode
, binoptab
, imag_t
, divisor
,
463 imagr
, unsignedp
, methods
);
465 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
466 imag_t
, divisor
, imagr
, unsignedp
);
472 emit_move_insn (imagr
, res
);
474 lab2
= gen_label_rtx ();
475 emit_jump_insn (gen_jump (lab2
));
480 /* |d| > |c|; use ratio c/d to scale dividend and divisor. */
482 if (class == MODE_COMPLEX_FLOAT
)
483 ratio
= expand_binop (submode
, binoptab
, real1
, imag1
,
484 NULL_RTX
, unsignedp
, methods
);
486 ratio
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
487 real1
, imag1
, NULL_RTX
, unsignedp
);
492 /* Calculate divisor. */
494 temp1
= expand_binop (submode
, smul_optab
, real1
, ratio
,
495 NULL_RTX
, unsignedp
, methods
);
500 divisor
= expand_binop (submode
, add_optab
, temp1
, imag1
,
501 NULL_RTX
, unsignedp
, methods
);
506 /* Calculate dividend. */
510 /* Compute a / (c+id) as a(c/d) / (c(c/d)+d) + i (-a) / (c(c/d)+d). */
512 real_t
= expand_binop (submode
, smul_optab
, real0
, ratio
,
513 NULL_RTX
, unsignedp
, methods
);
515 imag_t
= expand_unop (submode
, neg_optab
, real0
,
516 NULL_RTX
, unsignedp
);
518 if (real_t
== 0 || imag_t
== 0)
523 /* Compute (a+ib)/(c+id) as
524 (a(c/d)+b)/(c(c/d)+d) + i (b(c/d)-a)/(c(c/d)+d). */
526 temp1
= expand_binop (submode
, smul_optab
, real0
, ratio
,
527 NULL_RTX
, unsignedp
, methods
);
532 real_t
= expand_binop (submode
, add_optab
, temp1
, imag0
,
533 NULL_RTX
, unsignedp
, methods
);
535 temp1
= expand_binop (submode
, smul_optab
, imag0
, ratio
,
536 NULL_RTX
, unsignedp
, methods
);
541 imag_t
= expand_binop (submode
, sub_optab
, temp1
, real0
,
542 NULL_RTX
, unsignedp
, methods
);
544 if (real_t
== 0 || imag_t
== 0)
548 if (class == MODE_COMPLEX_FLOAT
)
549 res
= expand_binop (submode
, binoptab
, real_t
, divisor
,
550 realr
, unsignedp
, methods
);
552 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
553 real_t
, divisor
, realr
, unsignedp
);
559 emit_move_insn (realr
, res
);
561 if (class == MODE_COMPLEX_FLOAT
)
562 res
= expand_binop (submode
, binoptab
, imag_t
, divisor
,
563 imagr
, unsignedp
, methods
);
565 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
566 imag_t
, divisor
, imagr
, unsignedp
);
572 emit_move_insn (imagr
, res
);
579 /* Generate code to perform an operation specified by BINOPTAB
580 on operands OP0 and OP1, with result having machine-mode MODE.
582 UNSIGNEDP is for the case where we have to widen the operands
583 to perform the operation. It says to use zero-extension.
585 If TARGET is nonzero, the value
586 is generated there, if it is convenient to do so.
587 In all cases an rtx is returned for the locus of the value;
588 this may or may not be TARGET. */
591 expand_binop (mode
, binoptab
, op0
, op1
, target
, unsignedp
, methods
)
592 enum machine_mode mode
;
597 enum optab_methods methods
;
599 enum optab_methods next_methods
600 = (methods
== OPTAB_LIB
|| methods
== OPTAB_LIB_WIDEN
601 ? OPTAB_WIDEN
: methods
);
602 enum mode_class
class;
603 enum machine_mode wider_mode
;
605 int commutative_op
= 0;
606 int shift_op
= (binoptab
->code
== ASHIFT
607 || binoptab
->code
== ASHIFTRT
608 || binoptab
->code
== LSHIFTRT
609 || binoptab
->code
== ROTATE
610 || binoptab
->code
== ROTATERT
);
611 rtx entry_last
= get_last_insn ();
614 class = GET_MODE_CLASS (mode
);
616 op0
= protect_from_queue (op0
, 0);
617 op1
= protect_from_queue (op1
, 0);
619 target
= protect_from_queue (target
, 1);
623 op0
= force_not_mem (op0
);
624 op1
= force_not_mem (op1
);
627 /* If subtracting an integer constant, convert this into an addition of
628 the negated constant. */
630 if (binoptab
== sub_optab
&& GET_CODE (op1
) == CONST_INT
)
632 op1
= negate_rtx (mode
, op1
);
633 binoptab
= add_optab
;
636 /* If we are inside an appropriately-short loop and one operand is an
637 expensive constant, force it into a register. */
638 if (CONSTANT_P (op0
) && preserve_subexpressions_p ()
639 && rtx_cost (op0
, binoptab
->code
) > 2)
640 op0
= force_reg (mode
, op0
);
642 if (CONSTANT_P (op1
) && preserve_subexpressions_p ()
643 && ! shift_op
&& rtx_cost (op1
, binoptab
->code
) > 2)
644 op1
= force_reg (mode
, op1
);
646 /* Record where to delete back to if we backtrack. */
647 last
= get_last_insn ();
649 /* If operation is commutative,
650 try to make the first operand a register.
651 Even better, try to make it the same as the target.
652 Also try to make the last operand a constant. */
653 if (GET_RTX_CLASS (binoptab
->code
) == 'c'
654 || binoptab
== smul_widen_optab
655 || binoptab
== umul_widen_optab
656 || binoptab
== smul_highpart_optab
657 || binoptab
== umul_highpart_optab
)
661 if (((target
== 0 || GET_CODE (target
) == REG
)
662 ? ((GET_CODE (op1
) == REG
663 && GET_CODE (op0
) != REG
)
665 : rtx_equal_p (op1
, target
))
666 || GET_CODE (op0
) == CONST_INT
)
674 /* If we can do it with a three-operand insn, do so. */
676 if (methods
!= OPTAB_MUST_WIDEN
677 && binoptab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
679 int icode
= (int) binoptab
->handlers
[(int) mode
].insn_code
;
680 enum machine_mode mode0
= insn_operand_mode
[icode
][1];
681 enum machine_mode mode1
= insn_operand_mode
[icode
][2];
683 rtx xop0
= op0
, xop1
= op1
;
688 temp
= gen_reg_rtx (mode
);
690 /* If it is a commutative operator and the modes would match
691 if we would swap the operands, we can save the conversions. */
694 if (GET_MODE (op0
) != mode0
&& GET_MODE (op1
) != mode1
695 && GET_MODE (op0
) == mode1
&& GET_MODE (op1
) == mode0
)
699 tmp
= op0
; op0
= op1
; op1
= tmp
;
700 tmp
= xop0
; xop0
= xop1
; xop1
= tmp
;
704 /* In case the insn wants input operands in modes different from
705 the result, convert the operands. */
707 if (GET_MODE (op0
) != VOIDmode
708 && GET_MODE (op0
) != mode0
709 && mode0
!= VOIDmode
)
710 xop0
= convert_to_mode (mode0
, xop0
, unsignedp
);
712 if (GET_MODE (xop1
) != VOIDmode
713 && GET_MODE (xop1
) != mode1
714 && mode1
!= VOIDmode
)
715 xop1
= convert_to_mode (mode1
, xop1
, unsignedp
);
717 /* Now, if insn's predicates don't allow our operands, put them into
720 if (! (*insn_operand_predicate
[icode
][1]) (xop0
, mode0
)
721 && mode0
!= VOIDmode
)
722 xop0
= copy_to_mode_reg (mode0
, xop0
);
724 if (! (*insn_operand_predicate
[icode
][2]) (xop1
, mode1
)
725 && mode1
!= VOIDmode
)
726 xop1
= copy_to_mode_reg (mode1
, xop1
);
728 if (! (*insn_operand_predicate
[icode
][0]) (temp
, mode
))
729 temp
= gen_reg_rtx (mode
);
731 pat
= GEN_FCN (icode
) (temp
, xop0
, xop1
);
734 /* If PAT is a multi-insn sequence, try to add an appropriate
735 REG_EQUAL note to it. If we can't because TEMP conflicts with an
736 operand, call ourselves again, this time without a target. */
737 if (GET_CODE (pat
) == SEQUENCE
738 && ! add_equal_note (pat
, temp
, binoptab
->code
, xop0
, xop1
))
740 delete_insns_since (last
);
741 return expand_binop (mode
, binoptab
, op0
, op1
, NULL_RTX
,
749 delete_insns_since (last
);
752 /* If this is a multiply, see if we can do a widening operation that
753 takes operands of this mode and makes a wider mode. */
755 if (binoptab
== smul_optab
&& GET_MODE_WIDER_MODE (mode
) != VOIDmode
756 && (((unsignedp
? umul_widen_optab
: smul_widen_optab
)
757 ->handlers
[(int) GET_MODE_WIDER_MODE (mode
)].insn_code
)
758 != CODE_FOR_nothing
))
760 temp
= expand_binop (GET_MODE_WIDER_MODE (mode
),
761 unsignedp
? umul_widen_optab
: smul_widen_optab
,
762 op0
, op1
, NULL_RTX
, unsignedp
, OPTAB_DIRECT
);
766 if (GET_MODE_CLASS (mode
) == MODE_INT
)
767 return gen_lowpart (mode
, temp
);
769 return convert_to_mode (mode
, temp
, unsignedp
);
773 /* Look for a wider mode of the same class for which we think we
774 can open-code the operation. Check for a widening multiply at the
775 wider mode as well. */
777 if ((class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
778 && methods
!= OPTAB_DIRECT
&& methods
!= OPTAB_LIB
)
779 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
780 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
782 if (binoptab
->handlers
[(int) wider_mode
].insn_code
!= CODE_FOR_nothing
783 || (binoptab
== smul_optab
784 && GET_MODE_WIDER_MODE (wider_mode
) != VOIDmode
785 && (((unsignedp
? umul_widen_optab
: smul_widen_optab
)
786 ->handlers
[(int) GET_MODE_WIDER_MODE (wider_mode
)].insn_code
)
787 != CODE_FOR_nothing
)))
789 rtx xop0
= op0
, xop1
= op1
;
792 /* For certain integer operations, we need not actually extend
793 the narrow operands, as long as we will truncate
794 the results to the same narrowness. */
796 if ((binoptab
== ior_optab
|| binoptab
== and_optab
797 || binoptab
== xor_optab
798 || binoptab
== add_optab
|| binoptab
== sub_optab
799 || binoptab
== smul_optab
|| binoptab
== ashl_optab
)
800 && class == MODE_INT
)
803 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
, no_extend
);
805 /* The second operand of a shift must always be extended. */
806 xop1
= widen_operand (xop1
, wider_mode
, mode
, unsignedp
,
807 no_extend
&& binoptab
!= ashl_optab
);
809 temp
= expand_binop (wider_mode
, binoptab
, xop0
, xop1
, NULL_RTX
,
810 unsignedp
, OPTAB_DIRECT
);
813 if (class != MODE_INT
)
816 target
= gen_reg_rtx (mode
);
817 convert_move (target
, temp
, 0);
821 return gen_lowpart (mode
, temp
);
824 delete_insns_since (last
);
828 /* These can be done a word at a time. */
829 if ((binoptab
== and_optab
|| binoptab
== ior_optab
|| binoptab
== xor_optab
)
831 && GET_MODE_SIZE (mode
) > UNITS_PER_WORD
832 && binoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
838 /* If TARGET is the same as one of the operands, the REG_EQUAL note
839 won't be accurate, so use a new target. */
840 if (target
== 0 || target
== op0
|| target
== op1
)
841 target
= gen_reg_rtx (mode
);
845 /* Do the actual arithmetic. */
846 for (i
= 0; i
< GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
; i
++)
848 rtx target_piece
= operand_subword (target
, i
, 1, mode
);
849 rtx x
= expand_binop (word_mode
, binoptab
,
850 operand_subword_force (op0
, i
, mode
),
851 operand_subword_force (op1
, i
, mode
),
852 target_piece
, unsignedp
, next_methods
);
857 if (target_piece
!= x
)
858 emit_move_insn (target_piece
, x
);
861 insns
= get_insns ();
864 if (i
== GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
)
866 if (binoptab
->code
!= UNKNOWN
)
868 = gen_rtx_fmt_ee (binoptab
->code
, mode
,
869 copy_rtx (op0
), copy_rtx (op1
));
873 emit_no_conflict_block (insns
, target
, op0
, op1
, equiv_value
);
878 /* Synthesize double word shifts from single word shifts. */
879 if ((binoptab
== lshr_optab
|| binoptab
== ashl_optab
880 || binoptab
== ashr_optab
)
882 && GET_CODE (op1
) == CONST_INT
883 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
884 && binoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
885 && ashl_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
886 && lshr_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
888 rtx insns
, inter
, equiv_value
;
889 rtx into_target
, outof_target
;
890 rtx into_input
, outof_input
;
891 int shift_count
, left_shift
, outof_word
;
893 /* If TARGET is the same as one of the operands, the REG_EQUAL note
894 won't be accurate, so use a new target. */
895 if (target
== 0 || target
== op0
|| target
== op1
)
896 target
= gen_reg_rtx (mode
);
900 shift_count
= INTVAL (op1
);
902 /* OUTOF_* is the word we are shifting bits away from, and
903 INTO_* is the word that we are shifting bits towards, thus
904 they differ depending on the direction of the shift and
907 left_shift
= binoptab
== ashl_optab
;
908 outof_word
= left_shift
^ ! WORDS_BIG_ENDIAN
;
910 outof_target
= operand_subword (target
, outof_word
, 1, mode
);
911 into_target
= operand_subword (target
, 1 - outof_word
, 1, mode
);
913 outof_input
= operand_subword_force (op0
, outof_word
, mode
);
914 into_input
= operand_subword_force (op0
, 1 - outof_word
, mode
);
916 if (shift_count
>= BITS_PER_WORD
)
918 inter
= expand_binop (word_mode
, binoptab
,
920 GEN_INT (shift_count
- BITS_PER_WORD
),
921 into_target
, unsignedp
, next_methods
);
923 if (inter
!= 0 && inter
!= into_target
)
924 emit_move_insn (into_target
, inter
);
926 /* For a signed right shift, we must fill the word we are shifting
927 out of with copies of the sign bit. Otherwise it is zeroed. */
928 if (inter
!= 0 && binoptab
!= ashr_optab
)
929 inter
= CONST0_RTX (word_mode
);
931 inter
= expand_binop (word_mode
, binoptab
,
933 GEN_INT (BITS_PER_WORD
- 1),
934 outof_target
, unsignedp
, next_methods
);
936 if (inter
!= 0 && inter
!= outof_target
)
937 emit_move_insn (outof_target
, inter
);
942 optab reverse_unsigned_shift
, unsigned_shift
;
944 /* For a shift of less then BITS_PER_WORD, to compute the carry,
945 we must do a logical shift in the opposite direction of the
948 reverse_unsigned_shift
= (left_shift
? lshr_optab
: ashl_optab
);
950 /* For a shift of less than BITS_PER_WORD, to compute the word
951 shifted towards, we need to unsigned shift the orig value of
954 unsigned_shift
= (left_shift
? ashl_optab
: lshr_optab
);
956 carries
= expand_binop (word_mode
, reverse_unsigned_shift
,
958 GEN_INT (BITS_PER_WORD
- shift_count
),
959 0, unsignedp
, next_methods
);
964 inter
= expand_binop (word_mode
, unsigned_shift
, into_input
,
965 op1
, 0, unsignedp
, next_methods
);
968 inter
= expand_binop (word_mode
, ior_optab
, carries
, inter
,
969 into_target
, unsignedp
, next_methods
);
971 if (inter
!= 0 && inter
!= into_target
)
972 emit_move_insn (into_target
, inter
);
975 inter
= expand_binop (word_mode
, binoptab
, outof_input
,
976 op1
, outof_target
, unsignedp
, next_methods
);
978 if (inter
!= 0 && inter
!= outof_target
)
979 emit_move_insn (outof_target
, inter
);
982 insns
= get_insns ();
987 if (binoptab
->code
!= UNKNOWN
)
988 equiv_value
= gen_rtx_fmt_ee (binoptab
->code
, mode
, op0
, op1
);
992 emit_no_conflict_block (insns
, target
, op0
, op1
, equiv_value
);
997 /* Synthesize double word rotates from single word shifts. */
998 if ((binoptab
== rotl_optab
|| binoptab
== rotr_optab
)
1000 && GET_CODE (op1
) == CONST_INT
1001 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
1002 && ashl_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
1003 && lshr_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
1005 rtx insns
, equiv_value
;
1006 rtx into_target
, outof_target
;
1007 rtx into_input
, outof_input
;
1009 int shift_count
, left_shift
, outof_word
;
1011 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1012 won't be accurate, so use a new target. */
1013 if (target
== 0 || target
== op0
|| target
== op1
)
1014 target
= gen_reg_rtx (mode
);
1018 shift_count
= INTVAL (op1
);
1020 /* OUTOF_* is the word we are shifting bits away from, and
1021 INTO_* is the word that we are shifting bits towards, thus
1022 they differ depending on the direction of the shift and
1023 WORDS_BIG_ENDIAN. */
1025 left_shift
= (binoptab
== rotl_optab
);
1026 outof_word
= left_shift
^ ! WORDS_BIG_ENDIAN
;
1028 outof_target
= operand_subword (target
, outof_word
, 1, mode
);
1029 into_target
= operand_subword (target
, 1 - outof_word
, 1, mode
);
1031 outof_input
= operand_subword_force (op0
, outof_word
, mode
);
1032 into_input
= operand_subword_force (op0
, 1 - outof_word
, mode
);
1034 if (shift_count
== BITS_PER_WORD
)
1036 /* This is just a word swap. */
1037 emit_move_insn (outof_target
, into_input
);
1038 emit_move_insn (into_target
, outof_input
);
1043 rtx into_temp1
, into_temp2
, outof_temp1
, outof_temp2
;
1044 rtx first_shift_count
, second_shift_count
;
1045 optab reverse_unsigned_shift
, unsigned_shift
;
1047 reverse_unsigned_shift
= (left_shift
^ (shift_count
< BITS_PER_WORD
)
1048 ? lshr_optab
: ashl_optab
);
1050 unsigned_shift
= (left_shift
^ (shift_count
< BITS_PER_WORD
)
1051 ? ashl_optab
: lshr_optab
);
1053 if (shift_count
> BITS_PER_WORD
)
1055 first_shift_count
= GEN_INT (shift_count
- BITS_PER_WORD
);
1056 second_shift_count
= GEN_INT (2*BITS_PER_WORD
- shift_count
);
1060 first_shift_count
= GEN_INT (BITS_PER_WORD
- shift_count
);
1061 second_shift_count
= GEN_INT (shift_count
);
1064 into_temp1
= expand_binop (word_mode
, unsigned_shift
,
1065 outof_input
, first_shift_count
,
1066 NULL_RTX
, unsignedp
, next_methods
);
1067 into_temp2
= expand_binop (word_mode
, reverse_unsigned_shift
,
1068 into_input
, second_shift_count
,
1069 into_target
, unsignedp
, next_methods
);
1071 if (into_temp1
!= 0 && into_temp2
!= 0)
1072 inter
= expand_binop (word_mode
, ior_optab
, into_temp1
, into_temp2
,
1073 into_target
, unsignedp
, next_methods
);
1077 if (inter
!= 0 && inter
!= into_target
)
1078 emit_move_insn (into_target
, inter
);
1080 outof_temp1
= expand_binop (word_mode
, unsigned_shift
,
1081 into_input
, first_shift_count
,
1082 NULL_RTX
, unsignedp
, next_methods
);
1083 outof_temp2
= expand_binop (word_mode
, reverse_unsigned_shift
,
1084 outof_input
, second_shift_count
,
1085 outof_target
, unsignedp
, next_methods
);
1087 if (inter
!= 0 && outof_temp1
!= 0 && outof_temp2
!= 0)
1088 inter
= expand_binop (word_mode
, ior_optab
,
1089 outof_temp1
, outof_temp2
,
1090 outof_target
, unsignedp
, next_methods
);
1092 if (inter
!= 0 && inter
!= outof_target
)
1093 emit_move_insn (outof_target
, inter
);
1096 insns
= get_insns ();
1101 if (binoptab
->code
!= UNKNOWN
)
1102 equiv_value
= gen_rtx_fmt_ee (binoptab
->code
, mode
, op0
, op1
);
1106 /* We can't make this a no conflict block if this is a word swap,
1107 because the word swap case fails if the input and output values
1108 are in the same register. */
1109 if (shift_count
!= BITS_PER_WORD
)
1110 emit_no_conflict_block (insns
, target
, op0
, op1
, equiv_value
);
1119 /* These can be done a word at a time by propagating carries. */
1120 if ((binoptab
== add_optab
|| binoptab
== sub_optab
)
1121 && class == MODE_INT
1122 && GET_MODE_SIZE (mode
) >= 2 * UNITS_PER_WORD
1123 && binoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
1126 rtx carry_tmp
= gen_reg_rtx (word_mode
);
1127 optab otheroptab
= binoptab
== add_optab
? sub_optab
: add_optab
;
1128 int nwords
= GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
;
1129 rtx carry_in
= NULL_RTX
, carry_out
= NULL_RTX
;
1132 /* We can handle either a 1 or -1 value for the carry. If STORE_FLAG
1133 value is one of those, use it. Otherwise, use 1 since it is the
1134 one easiest to get. */
1135 #if STORE_FLAG_VALUE == 1 || STORE_FLAG_VALUE == -1
1136 int normalizep
= STORE_FLAG_VALUE
;
1141 /* Prepare the operands. */
1142 xop0
= force_reg (mode
, op0
);
1143 xop1
= force_reg (mode
, op1
);
1145 if (target
== 0 || GET_CODE (target
) != REG
1146 || target
== xop0
|| target
== xop1
)
1147 target
= gen_reg_rtx (mode
);
1149 /* Indicate for flow that the entire target reg is being set. */
1150 if (GET_CODE (target
) == REG
)
1151 emit_insn (gen_rtx_CLOBBER (VOIDmode
, target
));
1153 /* Do the actual arithmetic. */
1154 for (i
= 0; i
< nwords
; i
++)
1156 int index
= (WORDS_BIG_ENDIAN
? nwords
- i
- 1 : i
);
1157 rtx target_piece
= operand_subword (target
, index
, 1, mode
);
1158 rtx op0_piece
= operand_subword_force (xop0
, index
, mode
);
1159 rtx op1_piece
= operand_subword_force (xop1
, index
, mode
);
1162 /* Main add/subtract of the input operands. */
1163 x
= expand_binop (word_mode
, binoptab
,
1164 op0_piece
, op1_piece
,
1165 target_piece
, unsignedp
, next_methods
);
1171 /* Store carry from main add/subtract. */
1172 carry_out
= gen_reg_rtx (word_mode
);
1173 carry_out
= emit_store_flag_force (carry_out
,
1174 (binoptab
== add_optab
1177 word_mode
, 1, normalizep
);
1182 /* Add/subtract previous carry to main result. */
1183 x
= expand_binop (word_mode
,
1184 normalizep
== 1 ? binoptab
: otheroptab
,
1186 target_piece
, 1, next_methods
);
1189 else if (target_piece
!= x
)
1190 emit_move_insn (target_piece
, x
);
1194 /* THIS CODE HAS NOT BEEN TESTED. */
1195 /* Get out carry from adding/subtracting carry in. */
1196 carry_tmp
= emit_store_flag_force (carry_tmp
,
1197 binoptab
== add_optab
1200 word_mode
, 1, normalizep
);
1202 /* Logical-ior the two poss. carry together. */
1203 carry_out
= expand_binop (word_mode
, ior_optab
,
1204 carry_out
, carry_tmp
,
1205 carry_out
, 0, next_methods
);
1211 carry_in
= carry_out
;
1214 if (i
== GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
)
1216 if (mov_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
1218 rtx temp
= emit_move_insn (target
, target
);
1220 set_unique_reg_note (temp
,
1222 gen_rtx_fmt_ee (binoptab
->code
, mode
,
1231 delete_insns_since (last
);
1234 /* If we want to multiply two two-word values and have normal and widening
1235 multiplies of single-word values, we can do this with three smaller
1236 multiplications. Note that we do not make a REG_NO_CONFLICT block here
1237 because we are not operating on one word at a time.
1239 The multiplication proceeds as follows:
1240 _______________________
1241 [__op0_high_|__op0_low__]
1242 _______________________
1243 * [__op1_high_|__op1_low__]
1244 _______________________________________________
1245 _______________________
1246 (1) [__op0_low__*__op1_low__]
1247 _______________________
1248 (2a) [__op0_low__*__op1_high_]
1249 _______________________
1250 (2b) [__op0_high_*__op1_low__]
1251 _______________________
1252 (3) [__op0_high_*__op1_high_]
1255 This gives a 4-word result. Since we are only interested in the
1256 lower 2 words, partial result (3) and the upper words of (2a) and
1257 (2b) don't need to be calculated. Hence (2a) and (2b) can be
1258 calculated using non-widening multiplication.
1260 (1), however, needs to be calculated with an unsigned widening
1261 multiplication. If this operation is not directly supported we
1262 try using a signed widening multiplication and adjust the result.
1263 This adjustment works as follows:
1265 If both operands are positive then no adjustment is needed.
1267 If the operands have different signs, for example op0_low < 0 and
1268 op1_low >= 0, the instruction treats the most significant bit of
1269 op0_low as a sign bit instead of a bit with significance
1270 2**(BITS_PER_WORD-1), i.e. the instruction multiplies op1_low
1271 with 2**BITS_PER_WORD - op0_low, and two's complements the
1272 result. Conclusion: We need to add op1_low * 2**BITS_PER_WORD to
1275 Similarly, if both operands are negative, we need to add
1276 (op0_low + op1_low) * 2**BITS_PER_WORD.
1278 We use a trick to adjust quickly. We logically shift op0_low right
1279 (op1_low) BITS_PER_WORD-1 steps to get 0 or 1, and add this to
1280 op0_high (op1_high) before it is used to calculate 2b (2a). If no
1281 logical shift exists, we do an arithmetic right shift and subtract
1284 if (binoptab
== smul_optab
1285 && class == MODE_INT
1286 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
1287 && smul_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
1288 && add_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
1289 && ((umul_widen_optab
->handlers
[(int) mode
].insn_code
1290 != CODE_FOR_nothing
)
1291 || (smul_widen_optab
->handlers
[(int) mode
].insn_code
1292 != CODE_FOR_nothing
)))
1294 int low
= (WORDS_BIG_ENDIAN
? 1 : 0);
1295 int high
= (WORDS_BIG_ENDIAN
? 0 : 1);
1296 rtx op0_high
= operand_subword_force (op0
, high
, mode
);
1297 rtx op0_low
= operand_subword_force (op0
, low
, mode
);
1298 rtx op1_high
= operand_subword_force (op1
, high
, mode
);
1299 rtx op1_low
= operand_subword_force (op1
, low
, mode
);
1301 rtx op0_xhigh
= NULL_RTX
;
1302 rtx op1_xhigh
= NULL_RTX
;
1304 /* If the target is the same as one of the inputs, don't use it. This
1305 prevents problems with the REG_EQUAL note. */
1306 if (target
== op0
|| target
== op1
1307 || (target
!= 0 && GET_CODE (target
) != REG
))
1310 /* Multiply the two lower words to get a double-word product.
1311 If unsigned widening multiplication is available, use that;
1312 otherwise use the signed form and compensate. */
1314 if (umul_widen_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
1316 product
= expand_binop (mode
, umul_widen_optab
, op0_low
, op1_low
,
1317 target
, 1, OPTAB_DIRECT
);
1319 /* If we didn't succeed, delete everything we did so far. */
1321 delete_insns_since (last
);
1323 op0_xhigh
= op0_high
, op1_xhigh
= op1_high
;
1327 && smul_widen_optab
->handlers
[(int) mode
].insn_code
1328 != CODE_FOR_nothing
)
1330 rtx wordm1
= GEN_INT (BITS_PER_WORD
- 1);
1331 product
= expand_binop (mode
, smul_widen_optab
, op0_low
, op1_low
,
1332 target
, 1, OPTAB_DIRECT
);
1333 op0_xhigh
= expand_binop (word_mode
, lshr_optab
, op0_low
, wordm1
,
1334 NULL_RTX
, 1, next_methods
);
1336 op0_xhigh
= expand_binop (word_mode
, add_optab
, op0_high
,
1337 op0_xhigh
, op0_xhigh
, 0, next_methods
);
1340 op0_xhigh
= expand_binop (word_mode
, ashr_optab
, op0_low
, wordm1
,
1341 NULL_RTX
, 0, next_methods
);
1343 op0_xhigh
= expand_binop (word_mode
, sub_optab
, op0_high
,
1344 op0_xhigh
, op0_xhigh
, 0,
1348 op1_xhigh
= expand_binop (word_mode
, lshr_optab
, op1_low
, wordm1
,
1349 NULL_RTX
, 1, next_methods
);
1351 op1_xhigh
= expand_binop (word_mode
, add_optab
, op1_high
,
1352 op1_xhigh
, op1_xhigh
, 0, next_methods
);
1355 op1_xhigh
= expand_binop (word_mode
, ashr_optab
, op1_low
, wordm1
,
1356 NULL_RTX
, 0, next_methods
);
1358 op1_xhigh
= expand_binop (word_mode
, sub_optab
, op1_high
,
1359 op1_xhigh
, op1_xhigh
, 0,
1364 /* If we have been able to directly compute the product of the
1365 low-order words of the operands and perform any required adjustments
1366 of the operands, we proceed by trying two more multiplications
1367 and then computing the appropriate sum.
1369 We have checked above that the required addition is provided.
1370 Full-word addition will normally always succeed, especially if
1371 it is provided at all, so we don't worry about its failure. The
1372 multiplication may well fail, however, so we do handle that. */
1374 if (product
&& op0_xhigh
&& op1_xhigh
)
1376 rtx product_high
= operand_subword (product
, high
, 1, mode
);
1377 rtx temp
= expand_binop (word_mode
, binoptab
, op0_low
, op1_xhigh
,
1378 NULL_RTX
, 0, OPTAB_DIRECT
);
1381 temp
= expand_binop (word_mode
, add_optab
, temp
, product_high
,
1382 product_high
, 0, next_methods
);
1384 if (temp
!= 0 && temp
!= product_high
)
1385 emit_move_insn (product_high
, temp
);
1388 temp
= expand_binop (word_mode
, binoptab
, op1_low
, op0_xhigh
,
1389 NULL_RTX
, 0, OPTAB_DIRECT
);
1392 temp
= expand_binop (word_mode
, add_optab
, temp
,
1393 product_high
, product_high
,
1396 if (temp
!= 0 && temp
!= product_high
)
1397 emit_move_insn (product_high
, temp
);
1401 if (mov_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
1403 temp
= emit_move_insn (product
, product
);
1404 set_unique_reg_note (temp
,
1406 gen_rtx_fmt_ee (MULT
, mode
,
1415 /* If we get here, we couldn't do it for some reason even though we
1416 originally thought we could. Delete anything we've emitted in
1419 delete_insns_since (last
);
1422 /* We need to open-code the complex type operations: '+, -, * and /' */
1424 /* At this point we allow operations between two similar complex
1425 numbers, and also if one of the operands is not a complex number
1426 but rather of MODE_FLOAT or MODE_INT. However, the caller
1427 must make sure that the MODE of the non-complex operand matches
1428 the SUBMODE of the complex operand. */
1430 if (class == MODE_COMPLEX_FLOAT
|| class == MODE_COMPLEX_INT
)
1432 rtx real0
= 0, imag0
= 0;
1433 rtx real1
= 0, imag1
= 0;
1434 rtx realr
, imagr
, res
;
1439 /* Find the correct mode for the real and imaginary parts */
1440 enum machine_mode submode
1441 = mode_for_size (GET_MODE_UNIT_SIZE (mode
) * BITS_PER_UNIT
,
1442 class == MODE_COMPLEX_INT
? MODE_INT
: MODE_FLOAT
,
1445 if (submode
== BLKmode
)
1449 target
= gen_reg_rtx (mode
);
1453 realr
= gen_realpart (submode
, target
);
1454 imagr
= gen_imagpart (submode
, target
);
1456 if (GET_MODE (op0
) == mode
)
1458 real0
= gen_realpart (submode
, op0
);
1459 imag0
= gen_imagpart (submode
, op0
);
1464 if (GET_MODE (op1
) == mode
)
1466 real1
= gen_realpart (submode
, op1
);
1467 imag1
= gen_imagpart (submode
, op1
);
1472 if (real0
== 0 || real1
== 0 || ! (imag0
!= 0|| imag1
!= 0))
1475 switch (binoptab
->code
)
1478 /* (a+ib) + (c+id) = (a+c) + i(b+d) */
1480 /* (a+ib) - (c+id) = (a-c) + i(b-d) */
1481 res
= expand_binop (submode
, binoptab
, real0
, real1
,
1482 realr
, unsignedp
, methods
);
1486 else if (res
!= realr
)
1487 emit_move_insn (realr
, res
);
1490 res
= expand_binop (submode
, binoptab
, imag0
, imag1
,
1491 imagr
, unsignedp
, methods
);
1494 else if (binoptab
->code
== MINUS
)
1495 res
= expand_unop (submode
, neg_optab
, imag1
, imagr
, unsignedp
);
1501 else if (res
!= imagr
)
1502 emit_move_insn (imagr
, res
);
1508 /* (a+ib) * (c+id) = (ac-bd) + i(ad+cb) */
1514 /* Don't fetch these from memory more than once. */
1515 real0
= force_reg (submode
, real0
);
1516 real1
= force_reg (submode
, real1
);
1517 imag0
= force_reg (submode
, imag0
);
1518 imag1
= force_reg (submode
, imag1
);
1520 temp1
= expand_binop (submode
, binoptab
, real0
, real1
, NULL_RTX
,
1521 unsignedp
, methods
);
1523 temp2
= expand_binop (submode
, binoptab
, imag0
, imag1
, NULL_RTX
,
1524 unsignedp
, methods
);
1526 if (temp1
== 0 || temp2
== 0)
1529 res
= expand_binop (submode
, sub_optab
, temp1
, temp2
,
1530 realr
, unsignedp
, methods
);
1534 else if (res
!= realr
)
1535 emit_move_insn (realr
, res
);
1537 temp1
= expand_binop (submode
, binoptab
, real0
, imag1
,
1538 NULL_RTX
, unsignedp
, methods
);
1540 temp2
= expand_binop (submode
, binoptab
, real1
, imag0
,
1541 NULL_RTX
, unsignedp
, methods
);
1543 if (temp1
== 0 || temp2
== 0)
1546 res
= expand_binop (submode
, add_optab
, temp1
, temp2
,
1547 imagr
, unsignedp
, methods
);
1551 else if (res
!= imagr
)
1552 emit_move_insn (imagr
, res
);
1558 /* Don't fetch these from memory more than once. */
1559 real0
= force_reg (submode
, real0
);
1560 real1
= force_reg (submode
, real1
);
1562 res
= expand_binop (submode
, binoptab
, real0
, real1
,
1563 realr
, unsignedp
, methods
);
1566 else if (res
!= realr
)
1567 emit_move_insn (realr
, res
);
1570 res
= expand_binop (submode
, binoptab
,
1571 real1
, imag0
, imagr
, unsignedp
, methods
);
1573 res
= expand_binop (submode
, binoptab
,
1574 real0
, imag1
, imagr
, unsignedp
, methods
);
1578 else if (res
!= imagr
)
1579 emit_move_insn (imagr
, res
);
1586 /* (a+ib) / (c+id) = ((ac+bd)/(cc+dd)) + i((bc-ad)/(cc+dd)) */
1590 /* (a+ib) / (c+i0) = (a/c) + i(b/c) */
1592 /* Don't fetch these from memory more than once. */
1593 real1
= force_reg (submode
, real1
);
1595 /* Simply divide the real and imaginary parts by `c' */
1596 if (class == MODE_COMPLEX_FLOAT
)
1597 res
= expand_binop (submode
, binoptab
, real0
, real1
,
1598 realr
, unsignedp
, methods
);
1600 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
1601 real0
, real1
, realr
, unsignedp
);
1605 else if (res
!= realr
)
1606 emit_move_insn (realr
, res
);
1608 if (class == MODE_COMPLEX_FLOAT
)
1609 res
= expand_binop (submode
, binoptab
, imag0
, real1
,
1610 imagr
, unsignedp
, methods
);
1612 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
1613 imag0
, real1
, imagr
, unsignedp
);
1617 else if (res
!= imagr
)
1618 emit_move_insn (imagr
, res
);
1624 switch (flag_complex_divide_method
)
1627 ok
= expand_cmplxdiv_straight (real0
, real1
, imag0
, imag1
,
1628 realr
, imagr
, submode
,
1634 ok
= expand_cmplxdiv_wide (real0
, real1
, imag0
, imag1
,
1635 realr
, imagr
, submode
,
1655 if (binoptab
->code
!= UNKNOWN
)
1657 = gen_rtx_fmt_ee (binoptab
->code
, mode
,
1658 copy_rtx (op0
), copy_rtx (op1
));
1662 emit_no_conflict_block (seq
, target
, op0
, op1
, equiv_value
);
1668 /* It can't be open-coded in this mode.
1669 Use a library call if one is available and caller says that's ok. */
1671 if (binoptab
->handlers
[(int) mode
].libfunc
1672 && (methods
== OPTAB_LIB
|| methods
== OPTAB_LIB_WIDEN
))
1676 enum machine_mode op1_mode
= mode
;
1683 op1_mode
= word_mode
;
1684 /* Specify unsigned here,
1685 since negative shift counts are meaningless. */
1686 op1x
= convert_to_mode (word_mode
, op1
, 1);
1689 if (GET_MODE (op0
) != VOIDmode
1690 && GET_MODE (op0
) != mode
)
1691 op0
= convert_to_mode (mode
, op0
, unsignedp
);
1693 /* Pass 1 for NO_QUEUE so we don't lose any increments
1694 if the libcall is cse'd or moved. */
1695 value
= emit_library_call_value (binoptab
->handlers
[(int) mode
].libfunc
,
1696 NULL_RTX
, 1, mode
, 2,
1697 op0
, mode
, op1x
, op1_mode
);
1699 insns
= get_insns ();
1702 target
= gen_reg_rtx (mode
);
1703 emit_libcall_block (insns
, target
, value
,
1704 gen_rtx_fmt_ee (binoptab
->code
, mode
, op0
, op1
));
1709 delete_insns_since (last
);
1711 /* It can't be done in this mode. Can we do it in a wider mode? */
1713 if (! (methods
== OPTAB_WIDEN
|| methods
== OPTAB_LIB_WIDEN
1714 || methods
== OPTAB_MUST_WIDEN
))
1716 /* Caller says, don't even try. */
1717 delete_insns_since (entry_last
);
1721 /* Compute the value of METHODS to pass to recursive calls.
1722 Don't allow widening to be tried recursively. */
1724 methods
= (methods
== OPTAB_LIB_WIDEN
? OPTAB_LIB
: OPTAB_DIRECT
);
1726 /* Look for a wider mode of the same class for which it appears we can do
1729 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
1731 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
1732 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
1734 if ((binoptab
->handlers
[(int) wider_mode
].insn_code
1735 != CODE_FOR_nothing
)
1736 || (methods
== OPTAB_LIB
1737 && binoptab
->handlers
[(int) wider_mode
].libfunc
))
1739 rtx xop0
= op0
, xop1
= op1
;
1742 /* For certain integer operations, we need not actually extend
1743 the narrow operands, as long as we will truncate
1744 the results to the same narrowness. */
1746 if ((binoptab
== ior_optab
|| binoptab
== and_optab
1747 || binoptab
== xor_optab
1748 || binoptab
== add_optab
|| binoptab
== sub_optab
1749 || binoptab
== smul_optab
|| binoptab
== ashl_optab
)
1750 && class == MODE_INT
)
1753 xop0
= widen_operand (xop0
, wider_mode
, mode
,
1754 unsignedp
, no_extend
);
1756 /* The second operand of a shift must always be extended. */
1757 xop1
= widen_operand (xop1
, wider_mode
, mode
, unsignedp
,
1758 no_extend
&& binoptab
!= ashl_optab
);
1760 temp
= expand_binop (wider_mode
, binoptab
, xop0
, xop1
, NULL_RTX
,
1761 unsignedp
, methods
);
1764 if (class != MODE_INT
)
1767 target
= gen_reg_rtx (mode
);
1768 convert_move (target
, temp
, 0);
1772 return gen_lowpart (mode
, temp
);
1775 delete_insns_since (last
);
1780 delete_insns_since (entry_last
);
1784 /* Expand a binary operator which has both signed and unsigned forms.
1785 UOPTAB is the optab for unsigned operations, and SOPTAB is for
1788 If we widen unsigned operands, we may use a signed wider operation instead
1789 of an unsigned wider operation, since the result would be the same. */
1792 sign_expand_binop (mode
, uoptab
, soptab
, op0
, op1
, target
, unsignedp
, methods
)
1793 enum machine_mode mode
;
1794 optab uoptab
, soptab
;
1795 rtx op0
, op1
, target
;
1797 enum optab_methods methods
;
1800 optab direct_optab
= unsignedp
? uoptab
: soptab
;
1801 struct optab wide_soptab
;
1803 /* Do it without widening, if possible. */
1804 temp
= expand_binop (mode
, direct_optab
, op0
, op1
, target
,
1805 unsignedp
, OPTAB_DIRECT
);
1806 if (temp
|| methods
== OPTAB_DIRECT
)
1809 /* Try widening to a signed int. Make a fake signed optab that
1810 hides any signed insn for direct use. */
1811 wide_soptab
= *soptab
;
1812 wide_soptab
.handlers
[(int) mode
].insn_code
= CODE_FOR_nothing
;
1813 wide_soptab
.handlers
[(int) mode
].libfunc
= 0;
1815 temp
= expand_binop (mode
, &wide_soptab
, op0
, op1
, target
,
1816 unsignedp
, OPTAB_WIDEN
);
1818 /* For unsigned operands, try widening to an unsigned int. */
1819 if (temp
== 0 && unsignedp
)
1820 temp
= expand_binop (mode
, uoptab
, op0
, op1
, target
,
1821 unsignedp
, OPTAB_WIDEN
);
1822 if (temp
|| methods
== OPTAB_WIDEN
)
1825 /* Use the right width lib call if that exists. */
1826 temp
= expand_binop (mode
, direct_optab
, op0
, op1
, target
, unsignedp
, OPTAB_LIB
);
1827 if (temp
|| methods
== OPTAB_LIB
)
1830 /* Must widen and use a lib call, use either signed or unsigned. */
1831 temp
= expand_binop (mode
, &wide_soptab
, op0
, op1
, target
,
1832 unsignedp
, methods
);
1836 return expand_binop (mode
, uoptab
, op0
, op1
, target
,
1837 unsignedp
, methods
);
1841 /* Generate code to perform an operation specified by BINOPTAB
1842 on operands OP0 and OP1, with two results to TARG1 and TARG2.
1843 We assume that the order of the operands for the instruction
1844 is TARG0, OP0, OP1, TARG1, which would fit a pattern like
1845 [(set TARG0 (operate OP0 OP1)) (set TARG1 (operate ...))].
1847 Either TARG0 or TARG1 may be zero, but what that means is that
1848 the result is not actually wanted. We will generate it into
1849 a dummy pseudo-reg and discard it. They may not both be zero.
1851 Returns 1 if this operation can be performed; 0 if not. */
1854 expand_twoval_binop (binoptab
, op0
, op1
, targ0
, targ1
, unsignedp
)
1860 enum machine_mode mode
= GET_MODE (targ0
? targ0
: targ1
);
1861 enum mode_class
class;
1862 enum machine_mode wider_mode
;
1863 rtx entry_last
= get_last_insn ();
1866 class = GET_MODE_CLASS (mode
);
1868 op0
= protect_from_queue (op0
, 0);
1869 op1
= protect_from_queue (op1
, 0);
1873 op0
= force_not_mem (op0
);
1874 op1
= force_not_mem (op1
);
1877 /* If we are inside an appropriately-short loop and one operand is an
1878 expensive constant, force it into a register. */
1879 if (CONSTANT_P (op0
) && preserve_subexpressions_p ()
1880 && rtx_cost (op0
, binoptab
->code
) > 2)
1881 op0
= force_reg (mode
, op0
);
1883 if (CONSTANT_P (op1
) && preserve_subexpressions_p ()
1884 && rtx_cost (op1
, binoptab
->code
) > 2)
1885 op1
= force_reg (mode
, op1
);
1888 targ0
= protect_from_queue (targ0
, 1);
1890 targ0
= gen_reg_rtx (mode
);
1892 targ1
= protect_from_queue (targ1
, 1);
1894 targ1
= gen_reg_rtx (mode
);
1896 /* Record where to go back to if we fail. */
1897 last
= get_last_insn ();
1899 if (binoptab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
1901 int icode
= (int) binoptab
->handlers
[(int) mode
].insn_code
;
1902 enum machine_mode mode0
= insn_operand_mode
[icode
][1];
1903 enum machine_mode mode1
= insn_operand_mode
[icode
][2];
1905 rtx xop0
= op0
, xop1
= op1
;
1907 /* In case this insn wants input operands in modes different from the
1908 result, convert the operands. */
1909 if (GET_MODE (op0
) != VOIDmode
&& GET_MODE (op0
) != mode0
)
1910 xop0
= convert_to_mode (mode0
, xop0
, unsignedp
);
1912 if (GET_MODE (op1
) != VOIDmode
&& GET_MODE (op1
) != mode1
)
1913 xop1
= convert_to_mode (mode1
, xop1
, unsignedp
);
1915 /* Now, if insn doesn't accept these operands, put them into pseudos. */
1916 if (! (*insn_operand_predicate
[icode
][1]) (xop0
, mode0
))
1917 xop0
= copy_to_mode_reg (mode0
, xop0
);
1919 if (! (*insn_operand_predicate
[icode
][2]) (xop1
, mode1
))
1920 xop1
= copy_to_mode_reg (mode1
, xop1
);
1922 /* We could handle this, but we should always be called with a pseudo
1923 for our targets and all insns should take them as outputs. */
1924 if (! (*insn_operand_predicate
[icode
][0]) (targ0
, mode
)
1925 || ! (*insn_operand_predicate
[icode
][3]) (targ1
, mode
))
1928 pat
= GEN_FCN (icode
) (targ0
, xop0
, xop1
, targ1
);
1935 delete_insns_since (last
);
1938 /* It can't be done in this mode. Can we do it in a wider mode? */
1940 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
1942 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
1943 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
1945 if (binoptab
->handlers
[(int) wider_mode
].insn_code
1946 != CODE_FOR_nothing
)
1948 register rtx t0
= gen_reg_rtx (wider_mode
);
1949 register rtx t1
= gen_reg_rtx (wider_mode
);
1951 if (expand_twoval_binop (binoptab
,
1952 convert_modes (wider_mode
, mode
, op0
,
1954 convert_modes (wider_mode
, mode
, op1
,
1958 convert_move (targ0
, t0
, unsignedp
);
1959 convert_move (targ1
, t1
, unsignedp
);
1963 delete_insns_since (last
);
1968 delete_insns_since (entry_last
);
1972 /* Generate code to perform an operation specified by UNOPTAB
1973 on operand OP0, with result having machine-mode MODE.
1975 UNSIGNEDP is for the case where we have to widen the operands
1976 to perform the operation. It says to use zero-extension.
1978 If TARGET is nonzero, the value
1979 is generated there, if it is convenient to do so.
1980 In all cases an rtx is returned for the locus of the value;
1981 this may or may not be TARGET. */
1984 expand_unop (mode
, unoptab
, op0
, target
, unsignedp
)
1985 enum machine_mode mode
;
1991 enum mode_class
class;
1992 enum machine_mode wider_mode
;
1994 rtx last
= get_last_insn ();
1997 class = GET_MODE_CLASS (mode
);
1999 op0
= protect_from_queue (op0
, 0);
2003 op0
= force_not_mem (op0
);
2007 target
= protect_from_queue (target
, 1);
2009 if (unoptab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
2011 int icode
= (int) unoptab
->handlers
[(int) mode
].insn_code
;
2012 enum machine_mode mode0
= insn_operand_mode
[icode
][1];
2018 temp
= gen_reg_rtx (mode
);
2020 if (GET_MODE (xop0
) != VOIDmode
2021 && GET_MODE (xop0
) != mode0
)
2022 xop0
= convert_to_mode (mode0
, xop0
, unsignedp
);
2024 /* Now, if insn doesn't accept our operand, put it into a pseudo. */
2026 if (! (*insn_operand_predicate
[icode
][1]) (xop0
, mode0
))
2027 xop0
= copy_to_mode_reg (mode0
, xop0
);
2029 if (! (*insn_operand_predicate
[icode
][0]) (temp
, mode
))
2030 temp
= gen_reg_rtx (mode
);
2032 pat
= GEN_FCN (icode
) (temp
, xop0
);
2035 if (GET_CODE (pat
) == SEQUENCE
2036 && ! add_equal_note (pat
, temp
, unoptab
->code
, xop0
, NULL_RTX
))
2038 delete_insns_since (last
);
2039 return expand_unop (mode
, unoptab
, op0
, NULL_RTX
, unsignedp
);
2047 delete_insns_since (last
);
2050 /* It can't be done in this mode. Can we open-code it in a wider mode? */
2052 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
2053 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2054 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2056 if (unoptab
->handlers
[(int) wider_mode
].insn_code
!= CODE_FOR_nothing
)
2060 /* For certain operations, we need not actually extend
2061 the narrow operand, as long as we will truncate the
2062 results to the same narrowness. */
2064 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
,
2065 (unoptab
== neg_optab
2066 || unoptab
== one_cmpl_optab
)
2067 && class == MODE_INT
);
2069 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
2074 if (class != MODE_INT
)
2077 target
= gen_reg_rtx (mode
);
2078 convert_move (target
, temp
, 0);
2082 return gen_lowpart (mode
, temp
);
2085 delete_insns_since (last
);
2089 /* These can be done a word at a time. */
2090 if (unoptab
== one_cmpl_optab
2091 && class == MODE_INT
2092 && GET_MODE_SIZE (mode
) > UNITS_PER_WORD
2093 && unoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
2098 if (target
== 0 || target
== op0
)
2099 target
= gen_reg_rtx (mode
);
2103 /* Do the actual arithmetic. */
2104 for (i
= 0; i
< GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
; i
++)
2106 rtx target_piece
= operand_subword (target
, i
, 1, mode
);
2107 rtx x
= expand_unop (word_mode
, unoptab
,
2108 operand_subword_force (op0
, i
, mode
),
2109 target_piece
, unsignedp
);
2110 if (target_piece
!= x
)
2111 emit_move_insn (target_piece
, x
);
2114 insns
= get_insns ();
2117 emit_no_conflict_block (insns
, target
, op0
, NULL_RTX
,
2118 gen_rtx_fmt_e (unoptab
->code
, mode
,
2123 /* Open-code the complex negation operation. */
2124 else if (unoptab
== neg_optab
2125 && (class == MODE_COMPLEX_FLOAT
|| class == MODE_COMPLEX_INT
))
2131 /* Find the correct mode for the real and imaginary parts */
2132 enum machine_mode submode
2133 = mode_for_size (GET_MODE_UNIT_SIZE (mode
) * BITS_PER_UNIT
,
2134 class == MODE_COMPLEX_INT
? MODE_INT
: MODE_FLOAT
,
2137 if (submode
== BLKmode
)
2141 target
= gen_reg_rtx (mode
);
2145 target_piece
= gen_imagpart (submode
, target
);
2146 x
= expand_unop (submode
, unoptab
,
2147 gen_imagpart (submode
, op0
),
2148 target_piece
, unsignedp
);
2149 if (target_piece
!= x
)
2150 emit_move_insn (target_piece
, x
);
2152 target_piece
= gen_realpart (submode
, target
);
2153 x
= expand_unop (submode
, unoptab
,
2154 gen_realpart (submode
, op0
),
2155 target_piece
, unsignedp
);
2156 if (target_piece
!= x
)
2157 emit_move_insn (target_piece
, x
);
2162 emit_no_conflict_block (seq
, target
, op0
, 0,
2163 gen_rtx_fmt_e (unoptab
->code
, mode
,
2168 /* Now try a library call in this mode. */
2169 if (unoptab
->handlers
[(int) mode
].libfunc
)
2176 /* Pass 1 for NO_QUEUE so we don't lose any increments
2177 if the libcall is cse'd or moved. */
2178 value
= emit_library_call_value (unoptab
->handlers
[(int) mode
].libfunc
,
2179 NULL_RTX
, 1, mode
, 1, op0
, mode
);
2180 insns
= get_insns ();
2183 target
= gen_reg_rtx (mode
);
2184 emit_libcall_block (insns
, target
, value
,
2185 gen_rtx_fmt_e (unoptab
->code
, mode
, op0
));
2190 /* It can't be done in this mode. Can we do it in a wider mode? */
2192 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
2194 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2195 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2197 if ((unoptab
->handlers
[(int) wider_mode
].insn_code
2198 != CODE_FOR_nothing
)
2199 || unoptab
->handlers
[(int) wider_mode
].libfunc
)
2203 /* For certain operations, we need not actually extend
2204 the narrow operand, as long as we will truncate the
2205 results to the same narrowness. */
2207 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
,
2208 (unoptab
== neg_optab
2209 || unoptab
== one_cmpl_optab
)
2210 && class == MODE_INT
);
2212 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
2217 if (class != MODE_INT
)
2220 target
= gen_reg_rtx (mode
);
2221 convert_move (target
, temp
, 0);
2225 return gen_lowpart (mode
, temp
);
2228 delete_insns_since (last
);
2233 /* If there is no negate operation, try doing a subtract from zero.
2234 The US Software GOFAST library needs this. */
2235 if (unoptab
== neg_optab
)
2238 temp
= expand_binop (mode
, sub_optab
, CONST0_RTX (mode
), op0
,
2239 target
, unsignedp
, OPTAB_LIB_WIDEN
);
2247 /* Emit code to compute the absolute value of OP0, with result to
2248 TARGET if convenient. (TARGET may be 0.) The return value says
2249 where the result actually is to be found.
2251 MODE is the mode of the operand; the mode of the result is
2252 different but can be deduced from MODE.
2257 expand_abs (mode
, op0
, target
, safe
)
2258 enum machine_mode mode
;
2265 /* First try to do it with a special abs instruction. */
2266 temp
= expand_unop (mode
, abs_optab
, op0
, target
, 0);
2270 /* If this machine has expensive jumps, we can do integer absolute
2271 value of X as (((signed) x >> (W-1)) ^ x) - ((signed) x >> (W-1)),
2272 where W is the width of MODE. */
2274 if (GET_MODE_CLASS (mode
) == MODE_INT
&& BRANCH_COST
>= 2)
2276 rtx extended
= expand_shift (RSHIFT_EXPR
, mode
, op0
,
2277 size_int (GET_MODE_BITSIZE (mode
) - 1),
2280 temp
= expand_binop (mode
, xor_optab
, extended
, op0
, target
, 0,
2283 temp
= expand_binop (mode
, sub_optab
, temp
, extended
, target
, 0,
2290 /* If that does not win, use conditional jump and negate. */
2292 /* It is safe to use the target if it is the same
2293 as the source if this is also a pseudo register */
2294 if (op0
== target
&& GET_CODE (op0
) == REG
2295 && REGNO (op0
) >= FIRST_PSEUDO_REGISTER
)
2298 op1
= gen_label_rtx ();
2299 if (target
== 0 || ! safe
2300 || GET_MODE (target
) != mode
2301 || (GET_CODE (target
) == MEM
&& MEM_VOLATILE_P (target
))
2302 || (GET_CODE (target
) == REG
2303 && REGNO (target
) < FIRST_PSEUDO_REGISTER
))
2304 target
= gen_reg_rtx (mode
);
2306 emit_move_insn (target
, op0
);
2309 /* If this mode is an integer too wide to compare properly,
2310 compare word by word. Rely on CSE to optimize constant cases. */
2311 if (GET_MODE_CLASS (mode
) == MODE_INT
&& ! can_compare_p (mode
))
2312 do_jump_by_parts_greater_rtx (mode
, 0, target
, const0_rtx
,
2315 do_compare_rtx_and_jump (target
, CONST0_RTX (mode
), GE
, 0, mode
,
2316 NULL_RTX
, 0, NULL_RTX
, op1
);
2318 op0
= expand_unop (mode
, neg_optab
, target
, target
, 0);
2320 emit_move_insn (target
, op0
);
2326 /* Emit code to compute the absolute value of OP0, with result to
2327 TARGET if convenient. (TARGET may be 0.) The return value says
2328 where the result actually is to be found.
2330 MODE is the mode of the operand; the mode of the result is
2331 different but can be deduced from MODE.
2333 UNSIGNEDP is relevant for complex integer modes. */
2336 expand_complex_abs (mode
, op0
, target
, unsignedp
)
2337 enum machine_mode mode
;
2342 enum mode_class
class = GET_MODE_CLASS (mode
);
2343 enum machine_mode wider_mode
;
2345 rtx entry_last
= get_last_insn ();
2349 /* Find the correct mode for the real and imaginary parts. */
2350 enum machine_mode submode
2351 = mode_for_size (GET_MODE_UNIT_SIZE (mode
) * BITS_PER_UNIT
,
2352 class == MODE_COMPLEX_INT
? MODE_INT
: MODE_FLOAT
,
2355 if (submode
== BLKmode
)
2358 op0
= protect_from_queue (op0
, 0);
2362 op0
= force_not_mem (op0
);
2365 last
= get_last_insn ();
2368 target
= protect_from_queue (target
, 1);
2370 if (abs_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
2372 int icode
= (int) abs_optab
->handlers
[(int) mode
].insn_code
;
2373 enum machine_mode mode0
= insn_operand_mode
[icode
][1];
2379 temp
= gen_reg_rtx (submode
);
2381 if (GET_MODE (xop0
) != VOIDmode
2382 && GET_MODE (xop0
) != mode0
)
2383 xop0
= convert_to_mode (mode0
, xop0
, unsignedp
);
2385 /* Now, if insn doesn't accept our operand, put it into a pseudo. */
2387 if (! (*insn_operand_predicate
[icode
][1]) (xop0
, mode0
))
2388 xop0
= copy_to_mode_reg (mode0
, xop0
);
2390 if (! (*insn_operand_predicate
[icode
][0]) (temp
, submode
))
2391 temp
= gen_reg_rtx (submode
);
2393 pat
= GEN_FCN (icode
) (temp
, xop0
);
2396 if (GET_CODE (pat
) == SEQUENCE
2397 && ! add_equal_note (pat
, temp
, abs_optab
->code
, xop0
, NULL_RTX
))
2399 delete_insns_since (last
);
2400 return expand_unop (mode
, abs_optab
, op0
, NULL_RTX
, unsignedp
);
2408 delete_insns_since (last
);
2411 /* It can't be done in this mode. Can we open-code it in a wider mode? */
2413 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2414 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2416 if (abs_optab
->handlers
[(int) wider_mode
].insn_code
!= CODE_FOR_nothing
)
2420 xop0
= convert_modes (wider_mode
, mode
, xop0
, unsignedp
);
2421 temp
= expand_complex_abs (wider_mode
, xop0
, NULL_RTX
, unsignedp
);
2425 if (class != MODE_COMPLEX_INT
)
2428 target
= gen_reg_rtx (submode
);
2429 convert_move (target
, temp
, 0);
2433 return gen_lowpart (submode
, temp
);
2436 delete_insns_since (last
);
2440 /* Open-code the complex absolute-value operation
2441 if we can open-code sqrt. Otherwise it's not worth while. */
2442 if (sqrt_optab
->handlers
[(int) submode
].insn_code
!= CODE_FOR_nothing
)
2444 rtx real
, imag
, total
;
2446 real
= gen_realpart (submode
, op0
);
2447 imag
= gen_imagpart (submode
, op0
);
2449 /* Square both parts. */
2450 real
= expand_mult (submode
, real
, real
, NULL_RTX
, 0);
2451 imag
= expand_mult (submode
, imag
, imag
, NULL_RTX
, 0);
2453 /* Sum the parts. */
2454 total
= expand_binop (submode
, add_optab
, real
, imag
, NULL_RTX
,
2455 0, OPTAB_LIB_WIDEN
);
2457 /* Get sqrt in TARGET. Set TARGET to where the result is. */
2458 target
= expand_unop (submode
, sqrt_optab
, total
, target
, 0);
2460 delete_insns_since (last
);
2465 /* Now try a library call in this mode. */
2466 if (abs_optab
->handlers
[(int) mode
].libfunc
)
2473 /* Pass 1 for NO_QUEUE so we don't lose any increments
2474 if the libcall is cse'd or moved. */
2475 value
= emit_library_call_value (abs_optab
->handlers
[(int) mode
].libfunc
,
2476 NULL_RTX
, 1, submode
, 1, op0
, mode
);
2477 insns
= get_insns ();
2480 target
= gen_reg_rtx (submode
);
2481 emit_libcall_block (insns
, target
, value
,
2482 gen_rtx_fmt_e (abs_optab
->code
, mode
, op0
));
2487 /* It can't be done in this mode. Can we do it in a wider mode? */
2489 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2490 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2492 if ((abs_optab
->handlers
[(int) wider_mode
].insn_code
2493 != CODE_FOR_nothing
)
2494 || abs_optab
->handlers
[(int) wider_mode
].libfunc
)
2498 xop0
= convert_modes (wider_mode
, mode
, xop0
, unsignedp
);
2500 temp
= expand_complex_abs (wider_mode
, xop0
, NULL_RTX
, unsignedp
);
2504 if (class != MODE_COMPLEX_INT
)
2507 target
= gen_reg_rtx (submode
);
2508 convert_move (target
, temp
, 0);
2512 return gen_lowpart (submode
, temp
);
2515 delete_insns_since (last
);
2519 delete_insns_since (entry_last
);
2523 /* Generate an instruction whose insn-code is INSN_CODE,
2524 with two operands: an output TARGET and an input OP0.
2525 TARGET *must* be nonzero, and the output is always stored there.
2526 CODE is an rtx code such that (CODE OP0) is an rtx that describes
2527 the value that is stored into TARGET. */
2530 emit_unop_insn (icode
, target
, op0
, code
)
2537 enum machine_mode mode0
= insn_operand_mode
[icode
][1];
2540 temp
= target
= protect_from_queue (target
, 1);
2542 op0
= protect_from_queue (op0
, 0);
2544 /* Sign and zero extension from memory is often done specially on
2545 RISC machines, so forcing into a register here can pessimize
2547 if (flag_force_mem
&& code
!= SIGN_EXTEND
&& code
!= ZERO_EXTEND
)
2548 op0
= force_not_mem (op0
);
2550 /* Now, if insn does not accept our operands, put them into pseudos. */
2552 if (! (*insn_operand_predicate
[icode
][1]) (op0
, mode0
))
2553 op0
= copy_to_mode_reg (mode0
, op0
);
2555 if (! (*insn_operand_predicate
[icode
][0]) (temp
, GET_MODE (temp
))
2556 || (flag_force_mem
&& GET_CODE (temp
) == MEM
))
2557 temp
= gen_reg_rtx (GET_MODE (temp
));
2559 pat
= GEN_FCN (icode
) (temp
, op0
);
2561 if (GET_CODE (pat
) == SEQUENCE
&& code
!= UNKNOWN
)
2562 add_equal_note (pat
, temp
, code
, op0
, NULL_RTX
);
2567 emit_move_insn (target
, temp
);
2570 /* Emit code to perform a series of operations on a multi-word quantity, one
2573 Such a block is preceded by a CLOBBER of the output, consists of multiple
2574 insns, each setting one word of the output, and followed by a SET copying
2575 the output to itself.
2577 Each of the insns setting words of the output receives a REG_NO_CONFLICT
2578 note indicating that it doesn't conflict with the (also multi-word)
2579 inputs. The entire block is surrounded by REG_LIBCALL and REG_RETVAL
2582 INSNS is a block of code generated to perform the operation, not including
2583 the CLOBBER and final copy. All insns that compute intermediate values
2584 are first emitted, followed by the block as described above.
2586 TARGET, OP0, and OP1 are the output and inputs of the operations,
2587 respectively. OP1 may be zero for a unary operation.
2589 EQUIV, if non-zero, is an expression to be placed into a REG_EQUAL note
2592 If TARGET is not a register, INSNS is simply emitted with no special
2593 processing. Likewise if anything in INSNS is not an INSN or if
2594 there is a libcall block inside INSNS.
2596 The final insn emitted is returned. */
2599 emit_no_conflict_block (insns
, target
, op0
, op1
, equiv
)
2605 rtx prev
, next
, first
, last
, insn
;
2607 if (GET_CODE (target
) != REG
|| reload_in_progress
)
2608 return emit_insns (insns
);
2610 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
2611 if (GET_CODE (insn
) != INSN
2612 || find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
))
2613 return emit_insns (insns
);
2615 /* First emit all insns that do not store into words of the output and remove
2616 these from the list. */
2617 for (insn
= insns
; insn
; insn
= next
)
2622 next
= NEXT_INSN (insn
);
2624 if (GET_CODE (PATTERN (insn
)) == SET
|| GET_CODE (PATTERN (insn
)) == USE
2625 || GET_CODE (PATTERN (insn
)) == CLOBBER
)
2626 set
= PATTERN (insn
);
2627 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
2629 for (i
= 0; i
< XVECLEN (PATTERN (insn
), 0); i
++)
2630 if (GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == SET
)
2632 set
= XVECEXP (PATTERN (insn
), 0, i
);
2640 if (! reg_overlap_mentioned_p (target
, SET_DEST (set
)))
2642 if (PREV_INSN (insn
))
2643 NEXT_INSN (PREV_INSN (insn
)) = next
;
2648 PREV_INSN (next
) = PREV_INSN (insn
);
2654 prev
= get_last_insn ();
2656 /* Now write the CLOBBER of the output, followed by the setting of each
2657 of the words, followed by the final copy. */
2658 if (target
!= op0
&& target
!= op1
)
2659 emit_insn (gen_rtx_CLOBBER (VOIDmode
, target
));
2661 for (insn
= insns
; insn
; insn
= next
)
2663 next
= NEXT_INSN (insn
);
2666 if (op1
&& GET_CODE (op1
) == REG
)
2667 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_NO_CONFLICT
, op1
,
2670 if (op0
&& GET_CODE (op0
) == REG
)
2671 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_NO_CONFLICT
, op0
,
2675 if (mov_optab
->handlers
[(int) GET_MODE (target
)].insn_code
2676 != CODE_FOR_nothing
)
2678 last
= emit_move_insn (target
, target
);
2680 set_unique_reg_note (last
, REG_EQUAL
, equiv
);
2683 last
= get_last_insn ();
2686 first
= get_insns ();
2688 first
= NEXT_INSN (prev
);
2690 /* Encapsulate the block so it gets manipulated as a unit. */
2691 REG_NOTES (first
) = gen_rtx_INSN_LIST (REG_LIBCALL
, last
,
2693 REG_NOTES (last
) = gen_rtx_INSN_LIST (REG_RETVAL
, first
, REG_NOTES (last
));
2698 /* Emit code to make a call to a constant function or a library call.
2700 INSNS is a list containing all insns emitted in the call.
2701 These insns leave the result in RESULT. Our block is to copy RESULT
2702 to TARGET, which is logically equivalent to EQUIV.
2704 We first emit any insns that set a pseudo on the assumption that these are
2705 loading constants into registers; doing so allows them to be safely cse'ed
2706 between blocks. Then we emit all the other insns in the block, followed by
2707 an insn to move RESULT to TARGET. This last insn will have a REQ_EQUAL
2708 note with an operand of EQUIV.
2710 Moving assignments to pseudos outside of the block is done to improve
2711 the generated code, but is not required to generate correct code,
2712 hence being unable to move an assignment is not grounds for not making
2713 a libcall block. There are two reasons why it is safe to leave these
2714 insns inside the block: First, we know that these pseudos cannot be
2715 used in generated RTL outside the block since they are created for
2716 temporary purposes within the block. Second, CSE will not record the
2717 values of anything set inside a libcall block, so we know they must
2718 be dead at the end of the block.
2720 Except for the first group of insns (the ones setting pseudos), the
2721 block is delimited by REG_RETVAL and REG_LIBCALL notes. */
2724 emit_libcall_block (insns
, target
, result
, equiv
)
2730 rtx prev
, next
, first
, last
, insn
;
2732 /* look for any CALL_INSNs in this sequence, and attach a REG_EH_REGION
2733 reg note to indicate that this call cannot throw. (Unless there is
2734 already a REG_EH_REGION note.) */
2736 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
2738 if (GET_CODE (insn
) == CALL_INSN
)
2740 rtx note
= find_reg_note (insn
, REG_EH_REGION
, NULL_RTX
);
2741 if (note
== NULL_RTX
)
2742 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_EH_REGION
, GEN_INT (-1),
2747 /* First emit all insns that set pseudos. Remove them from the list as
2748 we go. Avoid insns that set pseudos which were referenced in previous
2749 insns. These can be generated by move_by_pieces, for example,
2750 to update an address. Similarly, avoid insns that reference things
2751 set in previous insns. */
2753 for (insn
= insns
; insn
; insn
= next
)
2755 rtx set
= single_set (insn
);
2757 next
= NEXT_INSN (insn
);
2759 if (set
!= 0 && GET_CODE (SET_DEST (set
)) == REG
2760 && REGNO (SET_DEST (set
)) >= FIRST_PSEUDO_REGISTER
2762 || (! reg_mentioned_p (SET_DEST (set
), PATTERN (insns
))
2763 && ! reg_used_between_p (SET_DEST (set
), insns
, insn
)
2764 && ! modified_in_p (SET_SRC (set
), insns
)
2765 && ! modified_between_p (SET_SRC (set
), insns
, insn
))))
2767 if (PREV_INSN (insn
))
2768 NEXT_INSN (PREV_INSN (insn
)) = next
;
2773 PREV_INSN (next
) = PREV_INSN (insn
);
2779 prev
= get_last_insn ();
2781 /* Write the remaining insns followed by the final copy. */
2783 for (insn
= insns
; insn
; insn
= next
)
2785 next
= NEXT_INSN (insn
);
2790 last
= emit_move_insn (target
, result
);
2791 if (mov_optab
->handlers
[(int) GET_MODE (target
)].insn_code
2792 != CODE_FOR_nothing
)
2793 set_unique_reg_note (last
, REG_EQUAL
, copy_rtx (equiv
));
2796 first
= get_insns ();
2798 first
= NEXT_INSN (prev
);
2800 /* Encapsulate the block so it gets manipulated as a unit. */
2801 REG_NOTES (first
) = gen_rtx_INSN_LIST (REG_LIBCALL
, last
,
2803 REG_NOTES (last
) = gen_rtx_INSN_LIST (REG_RETVAL
, first
, REG_NOTES (last
));
2806 /* Generate code to store zero in X. */
2812 emit_move_insn (x
, const0_rtx
);
2815 /* Generate code to store 1 in X
2816 assuming it contains zero beforehand. */
2819 emit_0_to_1_insn (x
)
2822 emit_move_insn (x
, const1_rtx
);
2825 /* Nonzero if we can perform a comparison of mode MODE for a conditional jump
2826 straightforwardly. */
2829 cmp_available_p (mode
, can_use_tst_p
)
2830 enum machine_mode mode
;
2835 if (cmp_optab
->handlers
[(int)mode
].insn_code
!= CODE_FOR_nothing
2837 && tst_optab
->handlers
[(int)mode
].insn_code
!= CODE_FOR_nothing
))
2839 mode
= GET_MODE_WIDER_MODE (mode
);
2840 } while (mode
!= VOIDmode
);
2845 /* This function is called when we are going to emit a compare instruction that
2846 compares the values found in *PX and *PY, using the rtl operator COMPARISON.
2848 *PMODE is the mode of the inputs (in case they are const_int).
2849 *PUNSIGNEDP nonzero says that the operands are unsigned;
2850 this matters if they need to be widened.
2852 If they have mode BLKmode, then SIZE specifies the size of both operands,
2853 and ALIGN specifies the known shared alignment of the operands.
2855 This function performs all the setup necessary so that the caller only has
2856 to emit a single comparison insn. This setup can involve doing a BLKmode
2857 comparison or emitting a library call to perform the comparison if no insn
2858 is available to handle it.
2859 The values which are passed in through pointers can be modified; the caller
2860 should perform the comparison on the modified values. */
2863 prepare_cmp_insn (px
, py
, pcomparison
, size
, pmode
, punsignedp
, align
)
2865 enum rtx_code
*pcomparison
;
2867 enum machine_mode
*pmode
;
2871 enum machine_mode mode
= *pmode
;
2872 rtx x
= *px
, y
= *py
;
2873 int unsignedp
= *punsignedp
;
2874 enum mode_class
class;
2876 class = GET_MODE_CLASS (mode
);
2878 /* They could both be VOIDmode if both args are immediate constants,
2879 but we should fold that at an earlier stage.
2880 With no special code here, this will call abort,
2881 reminding the programmer to implement such folding. */
2883 if (mode
!= BLKmode
&& flag_force_mem
)
2885 x
= force_not_mem (x
);
2886 y
= force_not_mem (y
);
2889 /* If we are inside an appropriately-short loop and one operand is an
2890 expensive constant, force it into a register. */
2891 if (CONSTANT_P (x
) && preserve_subexpressions_p () && rtx_cost (x
, COMPARE
) > 2)
2892 x
= force_reg (mode
, x
);
2894 if (CONSTANT_P (y
) && preserve_subexpressions_p () && rtx_cost (y
, COMPARE
) > 2)
2895 y
= force_reg (mode
, y
);
2898 /* Abort if we have a non-canonical comparison. The RTL documentation
2899 states that canonical comparisons are required only for targets which
2901 if (CONSTANT_P (x
) && ! CONSTANT_P (y
))
2905 /* Don't let both operands fail to indicate the mode. */
2906 if (GET_MODE (x
) == VOIDmode
&& GET_MODE (y
) == VOIDmode
)
2907 x
= force_reg (mode
, x
);
2909 /* Handle all BLKmode compares. */
2911 if (mode
== BLKmode
)
2914 enum machine_mode result_mode
;
2917 x
= protect_from_queue (x
, 0);
2918 y
= protect_from_queue (y
, 0);
2922 #ifdef HAVE_cmpstrqi
2924 && GET_CODE (size
) == CONST_INT
2925 && INTVAL (size
) < (1 << GET_MODE_BITSIZE (QImode
)))
2927 result_mode
= insn_operand_mode
[(int) CODE_FOR_cmpstrqi
][0];
2928 result
= gen_reg_rtx (result_mode
);
2929 emit_insn (gen_cmpstrqi (result
, x
, y
, size
, GEN_INT (align
)));
2933 #ifdef HAVE_cmpstrhi
2935 && GET_CODE (size
) == CONST_INT
2936 && INTVAL (size
) < (1 << GET_MODE_BITSIZE (HImode
)))
2938 result_mode
= insn_operand_mode
[(int) CODE_FOR_cmpstrhi
][0];
2939 result
= gen_reg_rtx (result_mode
);
2940 emit_insn (gen_cmpstrhi (result
, x
, y
, size
, GEN_INT (align
)));
2944 #ifdef HAVE_cmpstrsi
2947 result_mode
= insn_operand_mode
[(int) CODE_FOR_cmpstrsi
][0];
2948 result
= gen_reg_rtx (result_mode
);
2949 size
= protect_from_queue (size
, 0);
2950 emit_insn (gen_cmpstrsi (result
, x
, y
,
2951 convert_to_mode (SImode
, size
, 1),
2957 #ifdef TARGET_MEM_FUNCTIONS
2958 emit_library_call (memcmp_libfunc
, 0,
2959 TYPE_MODE (integer_type_node
), 3,
2960 XEXP (x
, 0), Pmode
, XEXP (y
, 0), Pmode
,
2961 convert_to_mode (TYPE_MODE (sizetype
), size
,
2962 TREE_UNSIGNED (sizetype
)),
2963 TYPE_MODE (sizetype
));
2965 emit_library_call (bcmp_libfunc
, 0,
2966 TYPE_MODE (integer_type_node
), 3,
2967 XEXP (x
, 0), Pmode
, XEXP (y
, 0), Pmode
,
2968 convert_to_mode (TYPE_MODE (integer_type_node
),
2970 TREE_UNSIGNED (integer_type_node
)),
2971 TYPE_MODE (integer_type_node
));
2974 /* Immediately move the result of the libcall into a pseudo
2975 register so reload doesn't clobber the value if it needs
2976 the return register for a spill reg. */
2977 result
= gen_reg_rtx (TYPE_MODE (integer_type_node
));
2978 result_mode
= TYPE_MODE (integer_type_node
);
2979 emit_move_insn (result
,
2980 hard_libcall_value (result_mode
));
2984 *pmode
= result_mode
;
2990 if (cmp_available_p (mode
, y
== CONST0_RTX (mode
)))
2993 /* Handle a lib call just for the mode we are using. */
2995 if (cmp_optab
->handlers
[(int) mode
].libfunc
&& class != MODE_FLOAT
)
2997 rtx libfunc
= cmp_optab
->handlers
[(int) mode
].libfunc
;
3000 /* If we want unsigned, and this mode has a distinct unsigned
3001 comparison routine, use that. */
3002 if (unsignedp
&& ucmp_optab
->handlers
[(int) mode
].libfunc
)
3003 libfunc
= ucmp_optab
->handlers
[(int) mode
].libfunc
;
3005 emit_library_call (libfunc
, 1,
3006 word_mode
, 2, x
, mode
, y
, mode
);
3008 /* Immediately move the result of the libcall into a pseudo
3009 register so reload doesn't clobber the value if it needs
3010 the return register for a spill reg. */
3011 result
= gen_reg_rtx (word_mode
);
3012 emit_move_insn (result
, hard_libcall_value (word_mode
));
3014 /* Integer comparison returns a result that must be compared against 1,
3015 so that even if we do an unsigned compare afterward,
3016 there is still a value that can represent the result "less than". */
3023 if (class == MODE_FLOAT
)
3024 prepare_float_lib_cmp (px
, py
, pcomparison
, pmode
, punsignedp
);
3030 /* Before emitting an insn with code ICODE, make sure that X, which is going
3031 to be used for operand OPNUM of the insn, is converted from mode MODE to
3032 WIDER_MODE (UNSIGNEDP determines whether it is a unsigned conversion), and
3033 that it is accepted by the operand predicate. Return the new value. */
3035 prepare_operand (icode
, x
, opnum
, mode
, wider_mode
, unsignedp
)
3039 enum machine_mode mode
, wider_mode
;
3042 x
= protect_from_queue (x
, 0);
3044 if (mode
!= wider_mode
)
3045 x
= convert_modes (wider_mode
, mode
, x
, unsignedp
);
3047 if (! (*insn_operand_predicate
[icode
][opnum
])
3048 (x
, insn_operand_mode
[icode
][opnum
]))
3049 x
= copy_to_mode_reg (insn_operand_mode
[icode
][opnum
], x
);
3053 /* Subroutine of emit_cmp_and_jump_insns; this function is called when we know
3054 we can do the comparison.
3055 The arguments are the same as for emit_cmp_and_jump_insns; but LABEL may
3056 be NULL_RTX which indicates that only a comparison is to be generated. */
3059 emit_cmp_and_jump_insn_1 (x
, y
, mode
, comparison
, unsignedp
, label
)
3061 enum machine_mode mode
;
3062 enum rtx_code comparison
;
3066 rtx test
= gen_rtx_fmt_ee (comparison
, mode
, x
, y
);
3067 enum mode_class
class = GET_MODE_CLASS (mode
);
3068 enum machine_mode wider_mode
= mode
;
3070 /* Try combined insns first. */
3073 enum insn_code icode
;
3074 PUT_MODE (test
, wider_mode
);
3076 /* Handle some compares against zero. */
3077 icode
= (int) tst_optab
->handlers
[(int) wider_mode
].insn_code
;
3078 if (y
== CONST0_RTX (mode
) && icode
!= CODE_FOR_nothing
)
3080 x
= prepare_operand (icode
, x
, 0, mode
, wider_mode
, unsignedp
);
3081 emit_insn (GEN_FCN (icode
) (x
));
3083 emit_jump_insn ((*bcc_gen_fctn
[(int) comparison
]) (label
));
3087 /* Handle compares for which there is a directly suitable insn. */
3089 icode
= (int) cmp_optab
->handlers
[(int) wider_mode
].insn_code
;
3090 if (icode
!= CODE_FOR_nothing
)
3092 x
= prepare_operand (icode
, x
, 0, mode
, wider_mode
, unsignedp
);
3093 y
= prepare_operand (icode
, y
, 1, mode
, wider_mode
, unsignedp
);
3094 emit_insn (GEN_FCN (icode
) (x
, y
));
3096 emit_jump_insn ((*bcc_gen_fctn
[(int) comparison
]) (label
));
3100 if (class != MODE_INT
&& class != MODE_FLOAT
3101 && class != MODE_COMPLEX_FLOAT
)
3104 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
);
3105 } while (wider_mode
!= VOIDmode
);
3110 /* Generate code to compare X with Y so that the condition codes are
3111 set and to jump to LABEL if the condition is true. If X is a
3112 constant and Y is not a constant, then the comparison is swapped to
3113 ensure that the comparison RTL has the canonical form.
3115 UNSIGNEDP nonzero says that X and Y are unsigned; this matters if they
3116 need to be widened by emit_cmp_insn. UNSIGNEDP is also used to select
3117 the proper branch condition code.
3119 If X and Y have mode BLKmode, then SIZE specifies the size of both X and Y,
3120 and ALIGN specifies the known shared alignment of X and Y.
3122 MODE is the mode of the inputs (in case they are const_int).
3124 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). It will
3125 be passed unchanged to emit_cmp_insn, then potentially converted into an
3126 unsigned variant based on UNSIGNEDP to select a proper jump instruction. */
3129 emit_cmp_and_jump_insns (x
, y
, comparison
, size
, mode
, unsignedp
, align
, label
)
3131 enum rtx_code comparison
;
3133 enum machine_mode mode
;
3141 if ((CONSTANT_P (x
) && ! CONSTANT_P (y
))
3142 || (GET_CODE (x
) == CONST_INT
&& GET_CODE (y
) != CONST_INT
))
3144 /* Swap operands and condition to ensure canonical RTL. */
3147 comparison
= swap_condition (comparison
);
3156 /* If OP0 is still a constant, then both X and Y must be constants. Force
3157 X into a register to avoid aborting in emit_cmp_insn due to non-canonical
3159 if (CONSTANT_P (op0
))
3160 op0
= force_reg (mode
, op0
);
3165 comparison
= unsigned_condition (comparison
);
3166 prepare_cmp_insn (&op0
, &op1
, &comparison
, size
, &mode
, &unsignedp
, align
);
3167 emit_cmp_and_jump_insn_1 (op0
, op1
, mode
, comparison
, unsignedp
, label
);
3170 /* Like emit_cmp_and_jump_insns, but generate only the comparison. */
3172 emit_cmp_insn (x
, y
, comparison
, size
, mode
, unsignedp
, align
)
3174 enum rtx_code comparison
;
3176 enum machine_mode mode
;
3180 emit_cmp_and_jump_insns (x
, y
, comparison
, size
, mode
, unsignedp
, align
, 0);
3184 /* Nonzero if a compare of mode MODE can be done straightforwardly
3185 (without splitting it into pieces). */
3188 can_compare_p (mode
)
3189 enum machine_mode mode
;
3193 if (cmp_optab
->handlers
[(int)mode
].insn_code
!= CODE_FOR_nothing
)
3195 mode
= GET_MODE_WIDER_MODE (mode
);
3196 } while (mode
!= VOIDmode
);
3201 /* Emit a library call comparison between floating point X and Y.
3202 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). */
3205 prepare_float_lib_cmp (px
, py
, pcomparison
, pmode
, punsignedp
)
3207 enum rtx_code
*pcomparison
;
3208 enum machine_mode
*pmode
;
3211 enum rtx_code comparison
= *pcomparison
;
3212 rtx x
= *px
, y
= *py
;
3213 enum machine_mode mode
= GET_MODE (x
);
3221 libfunc
= eqhf2_libfunc
;
3225 libfunc
= nehf2_libfunc
;
3229 libfunc
= gthf2_libfunc
;
3233 libfunc
= gehf2_libfunc
;
3237 libfunc
= lthf2_libfunc
;
3241 libfunc
= lehf2_libfunc
;
3247 else if (mode
== SFmode
)
3251 libfunc
= eqsf2_libfunc
;
3255 libfunc
= nesf2_libfunc
;
3259 libfunc
= gtsf2_libfunc
;
3263 libfunc
= gesf2_libfunc
;
3267 libfunc
= ltsf2_libfunc
;
3271 libfunc
= lesf2_libfunc
;
3277 else if (mode
== DFmode
)
3281 libfunc
= eqdf2_libfunc
;
3285 libfunc
= nedf2_libfunc
;
3289 libfunc
= gtdf2_libfunc
;
3293 libfunc
= gedf2_libfunc
;
3297 libfunc
= ltdf2_libfunc
;
3301 libfunc
= ledf2_libfunc
;
3307 else if (mode
== XFmode
)
3311 libfunc
= eqxf2_libfunc
;
3315 libfunc
= nexf2_libfunc
;
3319 libfunc
= gtxf2_libfunc
;
3323 libfunc
= gexf2_libfunc
;
3327 libfunc
= ltxf2_libfunc
;
3331 libfunc
= lexf2_libfunc
;
3337 else if (mode
== TFmode
)
3341 libfunc
= eqtf2_libfunc
;
3345 libfunc
= netf2_libfunc
;
3349 libfunc
= gttf2_libfunc
;
3353 libfunc
= getf2_libfunc
;
3357 libfunc
= lttf2_libfunc
;
3361 libfunc
= letf2_libfunc
;
3369 enum machine_mode wider_mode
;
3371 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
3372 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
3374 if ((cmp_optab
->handlers
[(int) wider_mode
].insn_code
3375 != CODE_FOR_nothing
)
3376 || (cmp_optab
->handlers
[(int) wider_mode
].libfunc
!= 0))
3378 x
= protect_from_queue (x
, 0);
3379 y
= protect_from_queue (y
, 0);
3380 *px
= convert_to_mode (wider_mode
, x
, 0);
3381 *py
= convert_to_mode (wider_mode
, y
, 0);
3382 prepare_float_lib_cmp (px
, py
, pcomparison
, pmode
, punsignedp
);
3392 emit_library_call (libfunc
, 1,
3393 word_mode
, 2, x
, mode
, y
, mode
);
3395 /* Immediately move the result of the libcall into a pseudo
3396 register so reload doesn't clobber the value if it needs
3397 the return register for a spill reg. */
3398 result
= gen_reg_rtx (word_mode
);
3399 emit_move_insn (result
, hard_libcall_value (word_mode
));
3403 #ifdef FLOAT_LIB_COMPARE_RETURNS_BOOL
3404 if (FLOAT_LIB_COMPARE_RETURNS_BOOL (mode
, comparison
))
3410 /* Generate code to indirectly jump to a location given in the rtx LOC. */
3413 emit_indirect_jump (loc
)
3416 if (! ((*insn_operand_predicate
[(int)CODE_FOR_indirect_jump
][0])
3418 loc
= copy_to_mode_reg (Pmode
, loc
);
3420 emit_jump_insn (gen_indirect_jump (loc
));
3424 #ifdef HAVE_conditional_move
3426 /* Emit a conditional move instruction if the machine supports one for that
3427 condition and machine mode.
3429 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
3430 the mode to use should they be constants. If it is VOIDmode, they cannot
3433 OP2 should be stored in TARGET if the comparison is true, otherwise OP3
3434 should be stored there. MODE is the mode to use should they be constants.
3435 If it is VOIDmode, they cannot both be constants.
3437 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
3438 is not supported. */
3441 emit_conditional_move (target
, code
, op0
, op1
, cmode
, op2
, op3
, mode
,
3446 enum machine_mode cmode
;
3448 enum machine_mode mode
;
3451 rtx tem
, subtarget
, comparison
, insn
;
3452 enum insn_code icode
;
3454 /* If one operand is constant, make it the second one. Only do this
3455 if the other operand is not constant as well. */
3457 if ((CONSTANT_P (op0
) && ! CONSTANT_P (op1
))
3458 || (GET_CODE (op0
) == CONST_INT
&& GET_CODE (op1
) != CONST_INT
))
3463 code
= swap_condition (code
);
3466 /* get_condition will prefer to generate LT and GT even if the old
3467 comparison was against zero, so undo that canonicalization here since
3468 comparisons against zero are cheaper. */
3469 if (code
== LT
&& GET_CODE (op1
) == CONST_INT
&& INTVAL (op1
) == 1)
3470 code
= LE
, op1
= const0_rtx
;
3471 else if (code
== GT
&& GET_CODE (op1
) == CONST_INT
&& INTVAL (op1
) == -1)
3472 code
= GE
, op1
= const0_rtx
;
3474 if (cmode
== VOIDmode
)
3475 cmode
= GET_MODE (op0
);
3477 if (((CONSTANT_P (op2
) && ! CONSTANT_P (op3
))
3478 || (GET_CODE (op2
) == CONST_INT
&& GET_CODE (op3
) != CONST_INT
))
3479 && (GET_MODE_CLASS (GET_MODE (op1
)) != MODE_FLOAT
3480 || TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
|| flag_fast_math
))
3485 code
= reverse_condition (code
);
3488 if (mode
== VOIDmode
)
3489 mode
= GET_MODE (op2
);
3491 icode
= movcc_gen_code
[mode
];
3493 if (icode
== CODE_FOR_nothing
)
3498 op2
= force_not_mem (op2
);
3499 op3
= force_not_mem (op3
);
3503 target
= protect_from_queue (target
, 1);
3505 target
= gen_reg_rtx (mode
);
3511 op2
= protect_from_queue (op2
, 0);
3512 op3
= protect_from_queue (op3
, 0);
3514 /* If the insn doesn't accept these operands, put them in pseudos. */
3516 if (! (*insn_operand_predicate
[icode
][0])
3517 (subtarget
, insn_operand_mode
[icode
][0]))
3518 subtarget
= gen_reg_rtx (insn_operand_mode
[icode
][0]);
3520 if (! (*insn_operand_predicate
[icode
][2])
3521 (op2
, insn_operand_mode
[icode
][2]))
3522 op2
= copy_to_mode_reg (insn_operand_mode
[icode
][2], op2
);
3524 if (! (*insn_operand_predicate
[icode
][3])
3525 (op3
, insn_operand_mode
[icode
][3]))
3526 op3
= copy_to_mode_reg (insn_operand_mode
[icode
][3], op3
);
3528 /* Everything should now be in the suitable form, so emit the compare insn
3529 and then the conditional move. */
3532 = compare_from_rtx (op0
, op1
, code
, unsignedp
, cmode
, NULL_RTX
, 0);
3534 /* ??? Watch for const0_rtx (nop) and const_true_rtx (unconditional)? */
3535 if (GET_CODE (comparison
) != code
)
3536 /* This shouldn't happen. */
3539 insn
= GEN_FCN (icode
) (subtarget
, comparison
, op2
, op3
);
3541 /* If that failed, then give up. */
3547 if (subtarget
!= target
)
3548 convert_move (target
, subtarget
, 0);
3553 /* Return non-zero if a conditional move of mode MODE is supported.
3555 This function is for combine so it can tell whether an insn that looks
3556 like a conditional move is actually supported by the hardware. If we
3557 guess wrong we lose a bit on optimization, but that's it. */
3558 /* ??? sparc64 supports conditionally moving integers values based on fp
3559 comparisons, and vice versa. How do we handle them? */
3562 can_conditionally_move_p (mode
)
3563 enum machine_mode mode
;
3565 if (movcc_gen_code
[mode
] != CODE_FOR_nothing
)
3571 #endif /* HAVE_conditional_move */
3573 /* These three functions generate an insn body and return it
3574 rather than emitting the insn.
3576 They do not protect from queued increments,
3577 because they may be used 1) in protect_from_queue itself
3578 and 2) in other passes where there is no queue. */
3580 /* Generate and return an insn body to add Y to X. */
3583 gen_add2_insn (x
, y
)
3586 int icode
= (int) add_optab
->handlers
[(int) GET_MODE (x
)].insn_code
;
3588 if (! (*insn_operand_predicate
[icode
][0]) (x
, insn_operand_mode
[icode
][0])
3589 || ! (*insn_operand_predicate
[icode
][1]) (x
, insn_operand_mode
[icode
][1])
3590 || ! (*insn_operand_predicate
[icode
][2]) (y
, insn_operand_mode
[icode
][2]))
3593 return (GEN_FCN (icode
) (x
, x
, y
));
3597 have_add2_insn (mode
)
3598 enum machine_mode mode
;
3600 return add_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
;
3603 /* Generate and return an insn body to subtract Y from X. */
3606 gen_sub2_insn (x
, y
)
3609 int icode
= (int) sub_optab
->handlers
[(int) GET_MODE (x
)].insn_code
;
3611 if (! (*insn_operand_predicate
[icode
][0]) (x
, insn_operand_mode
[icode
][0])
3612 || ! (*insn_operand_predicate
[icode
][1]) (x
, insn_operand_mode
[icode
][1])
3613 || ! (*insn_operand_predicate
[icode
][2]) (y
, insn_operand_mode
[icode
][2]))
3616 return (GEN_FCN (icode
) (x
, x
, y
));
3620 have_sub2_insn (mode
)
3621 enum machine_mode mode
;
3623 return sub_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
;
3626 /* Generate the body of an instruction to copy Y into X.
3627 It may be a SEQUENCE, if one insn isn't enough. */
3630 gen_move_insn (x
, y
)
3633 register enum machine_mode mode
= GET_MODE (x
);
3634 enum insn_code insn_code
;
3637 if (mode
== VOIDmode
)
3638 mode
= GET_MODE (y
);
3640 insn_code
= mov_optab
->handlers
[(int) mode
].insn_code
;
3642 /* Handle MODE_CC modes: If we don't have a special move insn for this mode,
3643 find a mode to do it in. If we have a movcc, use it. Otherwise,
3644 find the MODE_INT mode of the same width. */
3646 if (GET_MODE_CLASS (mode
) == MODE_CC
&& insn_code
== CODE_FOR_nothing
)
3648 enum machine_mode tmode
= VOIDmode
;
3652 && mov_optab
->handlers
[(int) CCmode
].insn_code
!= CODE_FOR_nothing
)
3655 for (tmode
= QImode
; tmode
!= VOIDmode
;
3656 tmode
= GET_MODE_WIDER_MODE (tmode
))
3657 if (GET_MODE_SIZE (tmode
) == GET_MODE_SIZE (mode
))
3660 if (tmode
== VOIDmode
)
3663 /* Get X and Y in TMODE. We can't use gen_lowpart here because it
3664 may call change_address which is not appropriate if we were
3665 called when a reload was in progress. We don't have to worry
3666 about changing the address since the size in bytes is supposed to
3667 be the same. Copy the MEM to change the mode and move any
3668 substitutions from the old MEM to the new one. */
3670 if (reload_in_progress
)
3672 x
= gen_lowpart_common (tmode
, x1
);
3673 if (x
== 0 && GET_CODE (x1
) == MEM
)
3675 x
= gen_rtx_MEM (tmode
, XEXP (x1
, 0));
3676 RTX_UNCHANGING_P (x
) = RTX_UNCHANGING_P (x1
);
3677 MEM_COPY_ATTRIBUTES (x
, x1
);
3678 copy_replacements (x1
, x
);
3681 y
= gen_lowpart_common (tmode
, y1
);
3682 if (y
== 0 && GET_CODE (y1
) == MEM
)
3684 y
= gen_rtx_MEM (tmode
, XEXP (y1
, 0));
3685 RTX_UNCHANGING_P (y
) = RTX_UNCHANGING_P (y1
);
3686 MEM_COPY_ATTRIBUTES (y
, y1
);
3687 copy_replacements (y1
, y
);
3692 x
= gen_lowpart (tmode
, x
);
3693 y
= gen_lowpart (tmode
, y
);
3696 insn_code
= mov_optab
->handlers
[(int) tmode
].insn_code
;
3697 return (GEN_FCN (insn_code
) (x
, y
));
3701 emit_move_insn_1 (x
, y
);
3702 seq
= gen_sequence ();
3707 /* Return the insn code used to extend FROM_MODE to TO_MODE.
3708 UNSIGNEDP specifies zero-extension instead of sign-extension. If
3709 no such operation exists, CODE_FOR_nothing will be returned. */
3712 can_extend_p (to_mode
, from_mode
, unsignedp
)
3713 enum machine_mode to_mode
, from_mode
;
3716 return extendtab
[(int) to_mode
][(int) from_mode
][unsignedp
];
3719 /* Generate the body of an insn to extend Y (with mode MFROM)
3720 into X (with mode MTO). Do zero-extension if UNSIGNEDP is nonzero. */
3723 gen_extend_insn (x
, y
, mto
, mfrom
, unsignedp
)
3725 enum machine_mode mto
, mfrom
;
3728 return (GEN_FCN (extendtab
[(int) mto
][(int) mfrom
][unsignedp
]) (x
, y
));
3731 /* can_fix_p and can_float_p say whether the target machine
3732 can directly convert a given fixed point type to
3733 a given floating point type, or vice versa.
3734 The returned value is the CODE_FOR_... value to use,
3735 or CODE_FOR_nothing if these modes cannot be directly converted.
3737 *TRUNCP_PTR is set to 1 if it is necessary to output
3738 an explicit FTRUNC insn before the fix insn; otherwise 0. */
3740 static enum insn_code
3741 can_fix_p (fixmode
, fltmode
, unsignedp
, truncp_ptr
)
3742 enum machine_mode fltmode
, fixmode
;
3747 if (fixtrunctab
[(int) fltmode
][(int) fixmode
][unsignedp
] != CODE_FOR_nothing
)
3748 return fixtrunctab
[(int) fltmode
][(int) fixmode
][unsignedp
];
3750 if (ftrunc_optab
->handlers
[(int) fltmode
].insn_code
!= CODE_FOR_nothing
)
3753 return fixtab
[(int) fltmode
][(int) fixmode
][unsignedp
];
3755 return CODE_FOR_nothing
;
3758 static enum insn_code
3759 can_float_p (fltmode
, fixmode
, unsignedp
)
3760 enum machine_mode fixmode
, fltmode
;
3763 return floattab
[(int) fltmode
][(int) fixmode
][unsignedp
];
3766 /* Generate code to convert FROM to floating point
3767 and store in TO. FROM must be fixed point and not VOIDmode.
3768 UNSIGNEDP nonzero means regard FROM as unsigned.
3769 Normally this is done by correcting the final value
3770 if it is negative. */
3773 expand_float (to
, from
, unsignedp
)
3777 enum insn_code icode
;
3778 register rtx target
= to
;
3779 enum machine_mode fmode
, imode
;
3781 /* Crash now, because we won't be able to decide which mode to use. */
3782 if (GET_MODE (from
) == VOIDmode
)
3785 /* Look for an insn to do the conversion. Do it in the specified
3786 modes if possible; otherwise convert either input, output or both to
3787 wider mode. If the integer mode is wider than the mode of FROM,
3788 we can do the conversion signed even if the input is unsigned. */
3790 for (imode
= GET_MODE (from
); imode
!= VOIDmode
;
3791 imode
= GET_MODE_WIDER_MODE (imode
))
3792 for (fmode
= GET_MODE (to
); fmode
!= VOIDmode
;
3793 fmode
= GET_MODE_WIDER_MODE (fmode
))
3795 int doing_unsigned
= unsignedp
;
3797 icode
= can_float_p (fmode
, imode
, unsignedp
);
3798 if (icode
== CODE_FOR_nothing
&& imode
!= GET_MODE (from
) && unsignedp
)
3799 icode
= can_float_p (fmode
, imode
, 0), doing_unsigned
= 0;
3801 if (icode
!= CODE_FOR_nothing
)
3803 to
= protect_from_queue (to
, 1);
3804 from
= protect_from_queue (from
, 0);
3806 if (imode
!= GET_MODE (from
))
3807 from
= convert_to_mode (imode
, from
, unsignedp
);
3809 if (fmode
!= GET_MODE (to
))
3810 target
= gen_reg_rtx (fmode
);
3812 emit_unop_insn (icode
, target
, from
,
3813 doing_unsigned
? UNSIGNED_FLOAT
: FLOAT
);
3816 convert_move (to
, target
, 0);
3821 #if !defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3823 /* Unsigned integer, and no way to convert directly.
3824 Convert as signed, then conditionally adjust the result. */
3827 rtx label
= gen_label_rtx ();
3829 REAL_VALUE_TYPE offset
;
3833 to
= protect_from_queue (to
, 1);
3834 from
= protect_from_queue (from
, 0);
3837 from
= force_not_mem (from
);
3839 /* Look for a usable floating mode FMODE wider than the source and at
3840 least as wide as the target. Using FMODE will avoid rounding woes
3841 with unsigned values greater than the signed maximum value. */
3843 for (fmode
= GET_MODE (to
); fmode
!= VOIDmode
;
3844 fmode
= GET_MODE_WIDER_MODE (fmode
))
3845 if (GET_MODE_BITSIZE (GET_MODE (from
)) < GET_MODE_BITSIZE (fmode
)
3846 && can_float_p (fmode
, GET_MODE (from
), 0) != CODE_FOR_nothing
)
3849 if (fmode
== VOIDmode
)
3851 /* There is no such mode. Pretend the target is wide enough. */
3852 fmode
= GET_MODE (to
);
3854 /* Avoid double-rounding when TO is narrower than FROM. */
3855 if ((significand_size (fmode
) + 1)
3856 < GET_MODE_BITSIZE (GET_MODE (from
)))
3859 rtx neglabel
= gen_label_rtx ();
3861 /* Don't use TARGET if it isn't a register, is a hard register,
3862 or is the wrong mode. */
3863 if (GET_CODE (target
) != REG
3864 || REGNO (target
) < FIRST_PSEUDO_REGISTER
3865 || GET_MODE (target
) != fmode
)
3866 target
= gen_reg_rtx (fmode
);
3868 imode
= GET_MODE (from
);
3869 do_pending_stack_adjust ();
3871 /* Test whether the sign bit is set. */
3872 emit_cmp_insn (from
, const0_rtx
, GE
, NULL_RTX
, imode
, 0, 0);
3873 emit_jump_insn (gen_blt (neglabel
));
3875 /* The sign bit is not set. Convert as signed. */
3876 expand_float (target
, from
, 0);
3877 emit_jump_insn (gen_jump (label
));
3880 /* The sign bit is set.
3881 Convert to a usable (positive signed) value by shifting right
3882 one bit, while remembering if a nonzero bit was shifted
3883 out; i.e., compute (from & 1) | (from >> 1). */
3885 emit_label (neglabel
);
3886 temp
= expand_binop (imode
, and_optab
, from
, const1_rtx
,
3887 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3888 temp1
= expand_shift (RSHIFT_EXPR
, imode
, from
, integer_one_node
,
3890 temp
= expand_binop (imode
, ior_optab
, temp
, temp1
, temp
, 1,
3892 expand_float (target
, temp
, 0);
3894 /* Multiply by 2 to undo the shift above. */
3895 temp
= expand_binop (fmode
, add_optab
, target
, target
,
3896 target
, 0, OPTAB_LIB_WIDEN
);
3898 emit_move_insn (target
, temp
);
3900 do_pending_stack_adjust ();
3906 /* If we are about to do some arithmetic to correct for an
3907 unsigned operand, do it in a pseudo-register. */
3909 if (GET_MODE (to
) != fmode
3910 || GET_CODE (to
) != REG
|| REGNO (to
) < FIRST_PSEUDO_REGISTER
)
3911 target
= gen_reg_rtx (fmode
);
3913 /* Convert as signed integer to floating. */
3914 expand_float (target
, from
, 0);
3916 /* If FROM is negative (and therefore TO is negative),
3917 correct its value by 2**bitwidth. */
3919 do_pending_stack_adjust ();
3920 emit_cmp_and_jump_insns (from
, const0_rtx
, GE
, NULL_RTX
, GET_MODE (from
),
3923 /* On SCO 3.2.1, ldexp rejects values outside [0.5, 1).
3924 Rather than setting up a dconst_dot_5, let's hope SCO
3926 offset
= REAL_VALUE_LDEXP (dconst1
, GET_MODE_BITSIZE (GET_MODE (from
)));
3927 temp
= expand_binop (fmode
, add_optab
, target
,
3928 CONST_DOUBLE_FROM_REAL_VALUE (offset
, fmode
),
3929 target
, 0, OPTAB_LIB_WIDEN
);
3931 emit_move_insn (target
, temp
);
3933 do_pending_stack_adjust ();
3939 /* No hardware instruction available; call a library routine to convert from
3940 SImode, DImode, or TImode into SFmode, DFmode, XFmode, or TFmode. */
3946 to
= protect_from_queue (to
, 1);
3947 from
= protect_from_queue (from
, 0);
3949 if (GET_MODE_SIZE (GET_MODE (from
)) < GET_MODE_SIZE (SImode
))
3950 from
= convert_to_mode (SImode
, from
, unsignedp
);
3953 from
= force_not_mem (from
);
3955 if (GET_MODE (to
) == SFmode
)
3957 if (GET_MODE (from
) == SImode
)
3958 libfcn
= floatsisf_libfunc
;
3959 else if (GET_MODE (from
) == DImode
)
3960 libfcn
= floatdisf_libfunc
;
3961 else if (GET_MODE (from
) == TImode
)
3962 libfcn
= floattisf_libfunc
;
3966 else if (GET_MODE (to
) == DFmode
)
3968 if (GET_MODE (from
) == SImode
)
3969 libfcn
= floatsidf_libfunc
;
3970 else if (GET_MODE (from
) == DImode
)
3971 libfcn
= floatdidf_libfunc
;
3972 else if (GET_MODE (from
) == TImode
)
3973 libfcn
= floattidf_libfunc
;
3977 else if (GET_MODE (to
) == XFmode
)
3979 if (GET_MODE (from
) == SImode
)
3980 libfcn
= floatsixf_libfunc
;
3981 else if (GET_MODE (from
) == DImode
)
3982 libfcn
= floatdixf_libfunc
;
3983 else if (GET_MODE (from
) == TImode
)
3984 libfcn
= floattixf_libfunc
;
3988 else if (GET_MODE (to
) == TFmode
)
3990 if (GET_MODE (from
) == SImode
)
3991 libfcn
= floatsitf_libfunc
;
3992 else if (GET_MODE (from
) == DImode
)
3993 libfcn
= floatditf_libfunc
;
3994 else if (GET_MODE (from
) == TImode
)
3995 libfcn
= floattitf_libfunc
;
4004 value
= emit_library_call_value (libfcn
, NULL_RTX
, 1,
4006 1, from
, GET_MODE (from
));
4007 insns
= get_insns ();
4010 emit_libcall_block (insns
, target
, value
,
4011 gen_rtx_FLOAT (GET_MODE (to
), from
));
4016 /* Copy result to requested destination
4017 if we have been computing in a temp location. */
4021 if (GET_MODE (target
) == GET_MODE (to
))
4022 emit_move_insn (to
, target
);
4024 convert_move (to
, target
, 0);
4028 /* expand_fix: generate code to convert FROM to fixed point
4029 and store in TO. FROM must be floating point. */
4035 rtx temp
= gen_reg_rtx (GET_MODE (x
));
4036 return expand_unop (GET_MODE (x
), ftrunc_optab
, x
, temp
, 0);
4040 expand_fix (to
, from
, unsignedp
)
4041 register rtx to
, from
;
4044 enum insn_code icode
;
4045 register rtx target
= to
;
4046 enum machine_mode fmode
, imode
;
4050 /* We first try to find a pair of modes, one real and one integer, at
4051 least as wide as FROM and TO, respectively, in which we can open-code
4052 this conversion. If the integer mode is wider than the mode of TO,
4053 we can do the conversion either signed or unsigned. */
4055 for (imode
= GET_MODE (to
); imode
!= VOIDmode
;
4056 imode
= GET_MODE_WIDER_MODE (imode
))
4057 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
4058 fmode
= GET_MODE_WIDER_MODE (fmode
))
4060 int doing_unsigned
= unsignedp
;
4062 icode
= can_fix_p (imode
, fmode
, unsignedp
, &must_trunc
);
4063 if (icode
== CODE_FOR_nothing
&& imode
!= GET_MODE (to
) && unsignedp
)
4064 icode
= can_fix_p (imode
, fmode
, 0, &must_trunc
), doing_unsigned
= 0;
4066 if (icode
!= CODE_FOR_nothing
)
4068 to
= protect_from_queue (to
, 1);
4069 from
= protect_from_queue (from
, 0);
4071 if (fmode
!= GET_MODE (from
))
4072 from
= convert_to_mode (fmode
, from
, 0);
4075 from
= ftruncify (from
);
4077 if (imode
!= GET_MODE (to
))
4078 target
= gen_reg_rtx (imode
);
4080 emit_unop_insn (icode
, target
, from
,
4081 doing_unsigned
? UNSIGNED_FIX
: FIX
);
4083 convert_move (to
, target
, unsignedp
);
4088 #if !defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
4089 /* For an unsigned conversion, there is one more way to do it.
4090 If we have a signed conversion, we generate code that compares
4091 the real value to the largest representable positive number. If if
4092 is smaller, the conversion is done normally. Otherwise, subtract
4093 one plus the highest signed number, convert, and add it back.
4095 We only need to check all real modes, since we know we didn't find
4096 anything with a wider integer mode. */
4098 if (unsignedp
&& GET_MODE_BITSIZE (GET_MODE (to
)) <= HOST_BITS_PER_WIDE_INT
)
4099 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
4100 fmode
= GET_MODE_WIDER_MODE (fmode
))
4101 /* Make sure we won't lose significant bits doing this. */
4102 if (GET_MODE_BITSIZE (fmode
) > GET_MODE_BITSIZE (GET_MODE (to
))
4103 && CODE_FOR_nothing
!= can_fix_p (GET_MODE (to
), fmode
, 0,
4107 REAL_VALUE_TYPE offset
;
4108 rtx limit
, lab1
, lab2
, insn
;
4110 bitsize
= GET_MODE_BITSIZE (GET_MODE (to
));
4111 offset
= REAL_VALUE_LDEXP (dconst1
, bitsize
- 1);
4112 limit
= CONST_DOUBLE_FROM_REAL_VALUE (offset
, fmode
);
4113 lab1
= gen_label_rtx ();
4114 lab2
= gen_label_rtx ();
4117 to
= protect_from_queue (to
, 1);
4118 from
= protect_from_queue (from
, 0);
4121 from
= force_not_mem (from
);
4123 if (fmode
!= GET_MODE (from
))
4124 from
= convert_to_mode (fmode
, from
, 0);
4126 /* See if we need to do the subtraction. */
4127 do_pending_stack_adjust ();
4128 emit_cmp_and_jump_insns (from
, limit
, GE
, NULL_RTX
, GET_MODE (from
),
4131 /* If not, do the signed "fix" and branch around fixup code. */
4132 expand_fix (to
, from
, 0);
4133 emit_jump_insn (gen_jump (lab2
));
4136 /* Otherwise, subtract 2**(N-1), convert to signed number,
4137 then add 2**(N-1). Do the addition using XOR since this
4138 will often generate better code. */
4140 target
= expand_binop (GET_MODE (from
), sub_optab
, from
, limit
,
4141 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
4142 expand_fix (to
, target
, 0);
4143 target
= expand_binop (GET_MODE (to
), xor_optab
, to
,
4144 GEN_INT ((HOST_WIDE_INT
) 1 << (bitsize
- 1)),
4145 to
, 1, OPTAB_LIB_WIDEN
);
4148 emit_move_insn (to
, target
);
4152 if (mov_optab
->handlers
[(int) GET_MODE (to
)].insn_code
4153 != CODE_FOR_nothing
)
4155 /* Make a place for a REG_NOTE and add it. */
4156 insn
= emit_move_insn (to
, to
);
4157 set_unique_reg_note (insn
,
4159 gen_rtx_fmt_e (UNSIGNED_FIX
,
4168 /* We can't do it with an insn, so use a library call. But first ensure
4169 that the mode of TO is at least as wide as SImode, since those are the
4170 only library calls we know about. */
4172 if (GET_MODE_SIZE (GET_MODE (to
)) < GET_MODE_SIZE (SImode
))
4174 target
= gen_reg_rtx (SImode
);
4176 expand_fix (target
, from
, unsignedp
);
4178 else if (GET_MODE (from
) == SFmode
)
4180 if (GET_MODE (to
) == SImode
)
4181 libfcn
= unsignedp
? fixunssfsi_libfunc
: fixsfsi_libfunc
;
4182 else if (GET_MODE (to
) == DImode
)
4183 libfcn
= unsignedp
? fixunssfdi_libfunc
: fixsfdi_libfunc
;
4184 else if (GET_MODE (to
) == TImode
)
4185 libfcn
= unsignedp
? fixunssfti_libfunc
: fixsfti_libfunc
;
4189 else if (GET_MODE (from
) == DFmode
)
4191 if (GET_MODE (to
) == SImode
)
4192 libfcn
= unsignedp
? fixunsdfsi_libfunc
: fixdfsi_libfunc
;
4193 else if (GET_MODE (to
) == DImode
)
4194 libfcn
= unsignedp
? fixunsdfdi_libfunc
: fixdfdi_libfunc
;
4195 else if (GET_MODE (to
) == TImode
)
4196 libfcn
= unsignedp
? fixunsdfti_libfunc
: fixdfti_libfunc
;
4200 else if (GET_MODE (from
) == XFmode
)
4202 if (GET_MODE (to
) == SImode
)
4203 libfcn
= unsignedp
? fixunsxfsi_libfunc
: fixxfsi_libfunc
;
4204 else if (GET_MODE (to
) == DImode
)
4205 libfcn
= unsignedp
? fixunsxfdi_libfunc
: fixxfdi_libfunc
;
4206 else if (GET_MODE (to
) == TImode
)
4207 libfcn
= unsignedp
? fixunsxfti_libfunc
: fixxfti_libfunc
;
4211 else if (GET_MODE (from
) == TFmode
)
4213 if (GET_MODE (to
) == SImode
)
4214 libfcn
= unsignedp
? fixunstfsi_libfunc
: fixtfsi_libfunc
;
4215 else if (GET_MODE (to
) == DImode
)
4216 libfcn
= unsignedp
? fixunstfdi_libfunc
: fixtfdi_libfunc
;
4217 else if (GET_MODE (to
) == TImode
)
4218 libfcn
= unsignedp
? fixunstfti_libfunc
: fixtfti_libfunc
;
4230 to
= protect_from_queue (to
, 1);
4231 from
= protect_from_queue (from
, 0);
4234 from
= force_not_mem (from
);
4238 value
= emit_library_call_value (libfcn
, NULL_RTX
, 1, GET_MODE (to
),
4240 1, from
, GET_MODE (from
));
4241 insns
= get_insns ();
4244 emit_libcall_block (insns
, target
, value
,
4245 gen_rtx_fmt_e (unsignedp
? UNSIGNED_FIX
: FIX
,
4246 GET_MODE (to
), from
));
4251 if (GET_MODE (to
) == GET_MODE (target
))
4252 emit_move_insn (to
, target
);
4254 convert_move (to
, target
, 0);
4263 optab op
= (optab
) xmalloc (sizeof (struct optab
));
4265 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
4267 op
->handlers
[i
].insn_code
= CODE_FOR_nothing
;
4268 op
->handlers
[i
].libfunc
= 0;
4271 if (code
!= UNKNOWN
)
4272 code_to_optab
[(int) code
] = op
;
4277 /* Initialize the libfunc fields of an entire group of entries in some
4278 optab. Each entry is set equal to a string consisting of a leading
4279 pair of underscores followed by a generic operation name followed by
4280 a mode name (downshifted to lower case) followed by a single character
4281 representing the number of operands for the given operation (which is
4282 usually one of the characters '2', '3', or '4').
4284 OPTABLE is the table in which libfunc fields are to be initialized.
4285 FIRST_MODE is the first machine mode index in the given optab to
4287 LAST_MODE is the last machine mode index in the given optab to
4289 OPNAME is the generic (string) name of the operation.
4290 SUFFIX is the character which specifies the number of operands for
4291 the given generic operation.
4295 init_libfuncs (optable
, first_mode
, last_mode
, opname
, suffix
)
4296 register optab optable
;
4297 register int first_mode
;
4298 register int last_mode
;
4299 register const char *opname
;
4300 register int suffix
;
4303 register unsigned opname_len
= strlen (opname
);
4305 for (mode
= first_mode
; (int) mode
<= (int) last_mode
;
4306 mode
= (enum machine_mode
) ((int) mode
+ 1))
4308 register const char *mname
= GET_MODE_NAME(mode
);
4309 register unsigned mname_len
= strlen (mname
);
4310 register char *libfunc_name
4311 = (char *) xmalloc (2 + opname_len
+ mname_len
+ 1 + 1);
4313 register const char *q
;
4318 for (q
= opname
; *q
; )
4320 for (q
= mname
; *q
; q
++)
4321 *p
++ = tolower ((unsigned char)*q
);
4324 optable
->handlers
[(int) mode
].libfunc
4325 = gen_rtx_SYMBOL_REF (Pmode
, libfunc_name
);
4329 /* Initialize the libfunc fields of an entire group of entries in some
4330 optab which correspond to all integer mode operations. The parameters
4331 have the same meaning as similarly named ones for the `init_libfuncs'
4332 routine. (See above). */
4335 init_integral_libfuncs (optable
, opname
, suffix
)
4336 register optab optable
;
4337 register const char *opname
;
4338 register int suffix
;
4340 init_libfuncs (optable
, SImode
, TImode
, opname
, suffix
);
4343 /* Initialize the libfunc fields of an entire group of entries in some
4344 optab which correspond to all real mode operations. The parameters
4345 have the same meaning as similarly named ones for the `init_libfuncs'
4346 routine. (See above). */
4349 init_floating_libfuncs (optable
, opname
, suffix
)
4350 register optab optable
;
4351 register const char *opname
;
4352 register int suffix
;
4354 init_libfuncs (optable
, SFmode
, TFmode
, opname
, suffix
);
4357 /* Mark ARG (which is really an OPTAB *) for GC. */
4363 optab o
= *(optab
*) arg
;
4366 for (i
= 0; i
< NUM_MACHINE_MODES
; ++i
)
4367 ggc_mark_rtx (o
->handlers
[i
].libfunc
);
4370 /* Call this once to initialize the contents of the optabs
4371 appropriately for the current target machine. */
4377 #ifdef FIXUNS_TRUNC_LIKE_FIX_TRUNC
4383 /* Start by initializing all tables to contain CODE_FOR_nothing. */
4385 for (p
= fixtab
[0][0];
4386 p
< fixtab
[0][0] + sizeof fixtab
/ sizeof (fixtab
[0][0][0]);
4388 *p
= CODE_FOR_nothing
;
4390 for (p
= fixtrunctab
[0][0];
4391 p
< fixtrunctab
[0][0] + sizeof fixtrunctab
/ sizeof (fixtrunctab
[0][0][0]);
4393 *p
= CODE_FOR_nothing
;
4395 for (p
= floattab
[0][0];
4396 p
< floattab
[0][0] + sizeof floattab
/ sizeof (floattab
[0][0][0]);
4398 *p
= CODE_FOR_nothing
;
4400 for (p
= extendtab
[0][0];
4401 p
< extendtab
[0][0] + sizeof extendtab
/ sizeof extendtab
[0][0][0];
4403 *p
= CODE_FOR_nothing
;
4405 for (i
= 0; i
< NUM_RTX_CODE
; i
++)
4406 setcc_gen_code
[i
] = CODE_FOR_nothing
;
4408 #ifdef HAVE_conditional_move
4409 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
4410 movcc_gen_code
[i
] = CODE_FOR_nothing
;
4413 add_optab
= init_optab (PLUS
);
4414 sub_optab
= init_optab (MINUS
);
4415 smul_optab
= init_optab (MULT
);
4416 smul_highpart_optab
= init_optab (UNKNOWN
);
4417 umul_highpart_optab
= init_optab (UNKNOWN
);
4418 smul_widen_optab
= init_optab (UNKNOWN
);
4419 umul_widen_optab
= init_optab (UNKNOWN
);
4420 sdiv_optab
= init_optab (DIV
);
4421 sdivmod_optab
= init_optab (UNKNOWN
);
4422 udiv_optab
= init_optab (UDIV
);
4423 udivmod_optab
= init_optab (UNKNOWN
);
4424 smod_optab
= init_optab (MOD
);
4425 umod_optab
= init_optab (UMOD
);
4426 flodiv_optab
= init_optab (DIV
);
4427 ftrunc_optab
= init_optab (UNKNOWN
);
4428 and_optab
= init_optab (AND
);
4429 ior_optab
= init_optab (IOR
);
4430 xor_optab
= init_optab (XOR
);
4431 ashl_optab
= init_optab (ASHIFT
);
4432 ashr_optab
= init_optab (ASHIFTRT
);
4433 lshr_optab
= init_optab (LSHIFTRT
);
4434 rotl_optab
= init_optab (ROTATE
);
4435 rotr_optab
= init_optab (ROTATERT
);
4436 smin_optab
= init_optab (SMIN
);
4437 smax_optab
= init_optab (SMAX
);
4438 umin_optab
= init_optab (UMIN
);
4439 umax_optab
= init_optab (UMAX
);
4440 mov_optab
= init_optab (UNKNOWN
);
4441 movstrict_optab
= init_optab (UNKNOWN
);
4442 cmp_optab
= init_optab (UNKNOWN
);
4443 ucmp_optab
= init_optab (UNKNOWN
);
4444 tst_optab
= init_optab (UNKNOWN
);
4445 neg_optab
= init_optab (NEG
);
4446 abs_optab
= init_optab (ABS
);
4447 one_cmpl_optab
= init_optab (NOT
);
4448 ffs_optab
= init_optab (FFS
);
4449 sqrt_optab
= init_optab (SQRT
);
4450 sin_optab
= init_optab (UNKNOWN
);
4451 cos_optab
= init_optab (UNKNOWN
);
4452 strlen_optab
= init_optab (UNKNOWN
);
4454 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
4456 movstr_optab
[i
] = CODE_FOR_nothing
;
4457 clrstr_optab
[i
] = CODE_FOR_nothing
;
4459 #ifdef HAVE_SECONDARY_RELOADS
4460 reload_in_optab
[i
] = reload_out_optab
[i
] = CODE_FOR_nothing
;
4464 /* Fill in the optabs with the insns we support. */
4467 #ifdef FIXUNS_TRUNC_LIKE_FIX_TRUNC
4468 /* This flag says the same insns that convert to a signed fixnum
4469 also convert validly to an unsigned one. */
4470 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
4471 for (j
= 0; j
< NUM_MACHINE_MODES
; j
++)
4472 fixtrunctab
[i
][j
][1] = fixtrunctab
[i
][j
][0];
4475 /* Initialize the optabs with the names of the library functions. */
4476 init_integral_libfuncs (add_optab
, "add", '3');
4477 init_floating_libfuncs (add_optab
, "add", '3');
4478 init_integral_libfuncs (sub_optab
, "sub", '3');
4479 init_floating_libfuncs (sub_optab
, "sub", '3');
4480 init_integral_libfuncs (smul_optab
, "mul", '3');
4481 init_floating_libfuncs (smul_optab
, "mul", '3');
4482 init_integral_libfuncs (sdiv_optab
, "div", '3');
4483 init_integral_libfuncs (udiv_optab
, "udiv", '3');
4484 init_integral_libfuncs (sdivmod_optab
, "divmod", '4');
4485 init_integral_libfuncs (udivmod_optab
, "udivmod", '4');
4486 init_integral_libfuncs (smod_optab
, "mod", '3');
4487 init_integral_libfuncs (umod_optab
, "umod", '3');
4488 init_floating_libfuncs (flodiv_optab
, "div", '3');
4489 init_floating_libfuncs (ftrunc_optab
, "ftrunc", '2');
4490 init_integral_libfuncs (and_optab
, "and", '3');
4491 init_integral_libfuncs (ior_optab
, "ior", '3');
4492 init_integral_libfuncs (xor_optab
, "xor", '3');
4493 init_integral_libfuncs (ashl_optab
, "ashl", '3');
4494 init_integral_libfuncs (ashr_optab
, "ashr", '3');
4495 init_integral_libfuncs (lshr_optab
, "lshr", '3');
4496 init_integral_libfuncs (smin_optab
, "min", '3');
4497 init_floating_libfuncs (smin_optab
, "min", '3');
4498 init_integral_libfuncs (smax_optab
, "max", '3');
4499 init_floating_libfuncs (smax_optab
, "max", '3');
4500 init_integral_libfuncs (umin_optab
, "umin", '3');
4501 init_integral_libfuncs (umax_optab
, "umax", '3');
4502 init_integral_libfuncs (neg_optab
, "neg", '2');
4503 init_floating_libfuncs (neg_optab
, "neg", '2');
4504 init_integral_libfuncs (one_cmpl_optab
, "one_cmpl", '2');
4505 init_integral_libfuncs (ffs_optab
, "ffs", '2');
4507 /* Comparison libcalls for integers MUST come in pairs, signed/unsigned. */
4508 init_integral_libfuncs (cmp_optab
, "cmp", '2');
4509 init_integral_libfuncs (ucmp_optab
, "ucmp", '2');
4510 init_floating_libfuncs (cmp_optab
, "cmp", '2');
4512 #ifdef MULSI3_LIBCALL
4513 smul_optab
->handlers
[(int) SImode
].libfunc
4514 = gen_rtx_SYMBOL_REF (Pmode
, MULSI3_LIBCALL
);
4516 #ifdef MULDI3_LIBCALL
4517 smul_optab
->handlers
[(int) DImode
].libfunc
4518 = gen_rtx_SYMBOL_REF (Pmode
, MULDI3_LIBCALL
);
4521 #ifdef DIVSI3_LIBCALL
4522 sdiv_optab
->handlers
[(int) SImode
].libfunc
4523 = gen_rtx_SYMBOL_REF (Pmode
, DIVSI3_LIBCALL
);
4525 #ifdef DIVDI3_LIBCALL
4526 sdiv_optab
->handlers
[(int) DImode
].libfunc
4527 = gen_rtx_SYMBOL_REF (Pmode
, DIVDI3_LIBCALL
);
4530 #ifdef UDIVSI3_LIBCALL
4531 udiv_optab
->handlers
[(int) SImode
].libfunc
4532 = gen_rtx_SYMBOL_REF (Pmode
, UDIVSI3_LIBCALL
);
4534 #ifdef UDIVDI3_LIBCALL
4535 udiv_optab
->handlers
[(int) DImode
].libfunc
4536 = gen_rtx_SYMBOL_REF (Pmode
, UDIVDI3_LIBCALL
);
4539 #ifdef MODSI3_LIBCALL
4540 smod_optab
->handlers
[(int) SImode
].libfunc
4541 = gen_rtx_SYMBOL_REF (Pmode
, MODSI3_LIBCALL
);
4543 #ifdef MODDI3_LIBCALL
4544 smod_optab
->handlers
[(int) DImode
].libfunc
4545 = gen_rtx_SYMBOL_REF (Pmode
, MODDI3_LIBCALL
);
4548 #ifdef UMODSI3_LIBCALL
4549 umod_optab
->handlers
[(int) SImode
].libfunc
4550 = gen_rtx_SYMBOL_REF (Pmode
, UMODSI3_LIBCALL
);
4552 #ifdef UMODDI3_LIBCALL
4553 umod_optab
->handlers
[(int) DImode
].libfunc
4554 = gen_rtx_SYMBOL_REF (Pmode
, UMODDI3_LIBCALL
);
4557 /* Use cabs for DC complex abs, since systems generally have cabs.
4558 Don't define any libcall for SCmode, so that cabs will be used. */
4559 abs_optab
->handlers
[(int) DCmode
].libfunc
4560 = gen_rtx_SYMBOL_REF (Pmode
, "cabs");
4562 /* The ffs function operates on `int'. */
4563 #ifndef INT_TYPE_SIZE
4564 #define INT_TYPE_SIZE BITS_PER_WORD
4566 ffs_optab
->handlers
[(int) mode_for_size (INT_TYPE_SIZE
, MODE_INT
, 0)].libfunc
4567 = gen_rtx_SYMBOL_REF (Pmode
, "ffs");
4569 extendsfdf2_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__extendsfdf2");
4570 extendsfxf2_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__extendsfxf2");
4571 extendsftf2_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__extendsftf2");
4572 extenddfxf2_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__extenddfxf2");
4573 extenddftf2_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__extenddftf2");
4575 truncdfsf2_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__truncdfsf2");
4576 truncxfsf2_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__truncxfsf2");
4577 trunctfsf2_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__trunctfsf2");
4578 truncxfdf2_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__truncxfdf2");
4579 trunctfdf2_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__trunctfdf2");
4581 memcpy_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "memcpy");
4582 bcopy_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "bcopy");
4583 memcmp_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "memcmp");
4584 bcmp_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__gcc_bcmp");
4585 memset_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "memset");
4586 bzero_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "bzero");
4588 throw_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__throw");
4589 rethrow_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__rethrow");
4590 sjthrow_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__sjthrow");
4591 sjpopnthrow_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__sjpopnthrow");
4592 terminate_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__terminate");
4593 eh_rtime_match_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__eh_rtime_match");
4594 #ifndef DONT_USE_BUILTIN_SETJMP
4595 setjmp_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__builtin_setjmp");
4596 longjmp_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__builtin_longjmp");
4598 setjmp_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "setjmp");
4599 longjmp_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "longjmp");
4602 eqhf2_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__eqhf2");
4603 nehf2_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__nehf2");
4604 gthf2_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__gthf2");
4605 gehf2_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__gehf2");
4606 lthf2_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__lthf2");
4607 lehf2_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__lehf2");
4609 eqsf2_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__eqsf2");
4610 nesf2_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__nesf2");
4611 gtsf2_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__gtsf2");
4612 gesf2_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__gesf2");
4613 ltsf2_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__ltsf2");
4614 lesf2_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__lesf2");
4616 eqdf2_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__eqdf2");
4617 nedf2_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__nedf2");
4618 gtdf2_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__gtdf2");
4619 gedf2_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__gedf2");
4620 ltdf2_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__ltdf2");
4621 ledf2_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__ledf2");
4623 eqxf2_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__eqxf2");
4624 nexf2_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__nexf2");
4625 gtxf2_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__gtxf2");
4626 gexf2_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__gexf2");
4627 ltxf2_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__ltxf2");
4628 lexf2_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__lexf2");
4630 eqtf2_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__eqtf2");
4631 netf2_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__netf2");
4632 gttf2_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__gttf2");
4633 getf2_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__getf2");
4634 lttf2_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__lttf2");
4635 letf2_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__letf2");
4637 floatsisf_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__floatsisf");
4638 floatdisf_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__floatdisf");
4639 floattisf_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__floattisf");
4641 floatsidf_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__floatsidf");
4642 floatdidf_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__floatdidf");
4643 floattidf_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__floattidf");
4645 floatsixf_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__floatsixf");
4646 floatdixf_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__floatdixf");
4647 floattixf_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__floattixf");
4649 floatsitf_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__floatsitf");
4650 floatditf_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__floatditf");
4651 floattitf_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__floattitf");
4653 fixsfsi_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__fixsfsi");
4654 fixsfdi_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__fixsfdi");
4655 fixsfti_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__fixsfti");
4657 fixdfsi_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__fixdfsi");
4658 fixdfdi_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__fixdfdi");
4659 fixdfti_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__fixdfti");
4661 fixxfsi_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__fixxfsi");
4662 fixxfdi_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__fixxfdi");
4663 fixxfti_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__fixxfti");
4665 fixtfsi_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__fixtfsi");
4666 fixtfdi_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__fixtfdi");
4667 fixtfti_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__fixtfti");
4669 fixunssfsi_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__fixunssfsi");
4670 fixunssfdi_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__fixunssfdi");
4671 fixunssfti_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__fixunssfti");
4673 fixunsdfsi_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__fixunsdfsi");
4674 fixunsdfdi_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__fixunsdfdi");
4675 fixunsdfti_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__fixunsdfti");
4677 fixunsxfsi_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__fixunsxfsi");
4678 fixunsxfdi_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__fixunsxfdi");
4679 fixunsxfti_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__fixunsxfti");
4681 fixunstfsi_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__fixunstfsi");
4682 fixunstfdi_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__fixunstfdi");
4683 fixunstfti_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "__fixunstfti");
4685 /* For check-memory-usage. */
4686 chkr_check_addr_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "chkr_check_addr");
4687 chkr_set_right_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "chkr_set_right");
4688 chkr_copy_bitmap_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "chkr_copy_bitmap");
4689 chkr_check_exec_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "chkr_check_exec");
4690 chkr_check_str_libfunc
= gen_rtx_SYMBOL_REF (Pmode
, "chkr_check_str");
4692 /* For function entry/exit instrumentation. */
4693 profile_function_entry_libfunc
4694 = gen_rtx_SYMBOL_REF (Pmode
, "__cyg_profile_func_enter");
4695 profile_function_exit_libfunc
4696 = gen_rtx_SYMBOL_REF (Pmode
, "__cyg_profile_func_exit");
4698 #ifdef HAVE_conditional_trap
4702 #ifdef INIT_TARGET_OPTABS
4703 /* Allow the target to add more libcalls or rename some, etc. */
4707 /* Add these GC roots. */
4708 ggc_add_root (optab_table
, OTI_MAX
, sizeof(optab
), mark_optab
);
4709 ggc_add_rtx_root (libfunc_table
, LTI_MAX
);
4714 /* SCO 3.2 apparently has a broken ldexp. */
4727 #endif /* BROKEN_LDEXP */
4729 #ifdef HAVE_conditional_trap
4730 /* The insn generating function can not take an rtx_code argument.
4731 TRAP_RTX is used as an rtx argument. Its code is replaced with
4732 the code to be used in the trap insn and all other fields are
4735 ??? Will need to change to support garbage collection. */
4736 static rtx trap_rtx
;
4741 if (HAVE_conditional_trap
)
4742 trap_rtx
= gen_rtx_fmt_ee (EQ
, VOIDmode
, NULL_RTX
, NULL_RTX
);
4746 /* Generate insns to trap with code TCODE if OP1 and OP2 satisfy condition
4747 CODE. Return 0 on failure. */
4750 gen_cond_trap (code
, op1
, op2
, tcode
)
4751 enum rtx_code code ATTRIBUTE_UNUSED
;
4752 rtx op1
, op2 ATTRIBUTE_UNUSED
, tcode ATTRIBUTE_UNUSED
;
4754 enum machine_mode mode
= GET_MODE (op1
);
4756 if (mode
== VOIDmode
)
4759 #ifdef HAVE_conditional_trap
4760 if (HAVE_conditional_trap
4761 && cmp_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
4764 emit_insn (GEN_FCN (cmp_optab
->handlers
[(int) mode
].insn_code
) (op1
, op2
));
4765 PUT_CODE (trap_rtx
, code
);
4766 insn
= gen_conditional_trap (trap_rtx
, tcode
);