1 2023-10-13 Pan Li <pan2.li@intel.com>
3 * config/riscv/autovec.md (lceil<mode><v_i_l_ll_convert>2): New
4 pattern] for lceil/lceilf.
5 * config/riscv/riscv-protos.h (enum insn_type): New enum value.
6 (expand_vec_lceil): New func decl for expanding lceil.
7 * config/riscv/riscv-v.cc (expand_vec_lceil): New func impl
10 2023-10-12 Michael Meissner <meissner@linux.ibm.com>
13 * config/rs6000/rs6000.cc (can_be_built_by_li_lis_and_rldicl): Protect
14 code from shifts that are undefined.
15 (can_be_built_by_li_lis_and_rldicr): Likewise.
16 (can_be_built_by_li_and_rldic): Protect code from shifts that
17 undefined. Also replace uses of 1ULL with HOST_WIDE_INT_1U.
19 2023-10-12 Alex Coplan <alex.coplan@arm.com>
21 * reg-notes.def (NOALIAS): Correct comment.
23 2023-10-12 Jakub Jelinek <jakub@redhat.com>
26 * tree.h (wi::int_traits <unextended_tree>::needs_write_val_arg): New
28 (int_traits <extended_tree <N>>::needs_write_val_arg): Likewise.
29 (wi::ints_for): Provide separate partial specializations for
30 generic_wide_int <extended_tree <N>> and INL_CONST_PRECISION or that
31 and CONST_PRECISION, rather than using
32 int_traits <extended_tree <N> >::precision_type as the second template
34 * rtl.h (wi::int_traits <rtx_mode_t>::needs_write_val_arg): New
36 * double-int.h (wi::int_traits <double_int>::needs_write_val_arg):
39 2023-10-12 Mary Bennett <mary.bennett@embecosm.com>
42 * doc/extend.texi: Change subsubsection to subsection for
45 2023-10-12 Tamar Christina <tamar.christina@arm.com>
47 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Add undef.
49 2023-10-12 Jakub Jelinek <jakub@redhat.com>
51 * wide-int.h (widest_int_storage <N>::write_val): If l is small
52 and there is space in u.val array, store a canary value at the
54 (widest_int_storage <N>::set_len): Check the canary hasn't been
57 2023-10-12 Jakub Jelinek <jakub@redhat.com>
60 * wide-int.h: Adjust file comment.
61 (WIDE_INT_MAX_INL_ELTS): Define to former value of WIDE_INT_MAX_ELTS.
62 (WIDE_INT_MAX_INL_PRECISION): Define.
63 (WIDE_INT_MAX_ELTS): Change to 255. Assert that WIDE_INT_MAX_INL_ELTS
64 is smaller than WIDE_INT_MAX_ELTS.
65 (RWIDE_INT_MAX_ELTS, RWIDE_INT_MAX_PRECISION, WIDEST_INT_MAX_ELTS,
66 WIDEST_INT_MAX_PRECISION): Define.
67 (WI_BINARY_RESULT_VAR, WI_UNARY_RESULT_VAR): Change write_val callers
68 to pass 0 as a new argument.
69 (class widest_int_storage): Likewise.
70 (widest_int, widest2_int): Change typedefs to use widest_int_storage
71 rather than fixed_wide_int_storage.
72 (enum wi::precision_type): Add INL_CONST_PRECISION enumerator.
73 (struct binary_traits): Add partial specializations for
75 (generic_wide_int): Add needs_write_val_arg static data member.
76 (int_traits): Likewise.
77 (wide_int_storage): Replace val non-static data member with a union
78 u of it and HOST_WIDE_INT *valp. Declare copy constructor, copy
79 assignment operator and destructor. Add unsigned int argument to
81 (wide_int_storage::wide_int_storage): Initialize precision to 0
82 in the default ctor. Remove unnecessary {}s around STATIC_ASSERTs.
83 Assert in non-default ctor T's precision_type is not
84 INL_CONST_PRECISION and allocate u.valp for large precision. Add
86 (wide_int_storage::~wide_int_storage): New.
87 (wide_int_storage::operator=): Add copy assignment operator. In
88 assignment operator remove unnecessary {}s around STATIC_ASSERTs,
89 assert ctor T's precision_type is not INL_CONST_PRECISION and
90 if precision changes, deallocate and/or allocate u.valp.
91 (wide_int_storage::get_val): Return u.valp rather than u.val for
93 (wide_int_storage::write_val): Likewise. Add an unused unsigned int
95 (wide_int_storage::set_len): Use write_val instead of writing val
97 (wide_int_storage::from, wide_int_storage::from_array): Adjust
99 (wide_int_storage::create): Allocate u.valp for large precisions.
100 (wi::int_traits <wide_int_storage>::get_binary_precision): New.
101 (fixed_wide_int_storage::fixed_wide_int_storage): Make default
103 (fixed_wide_int_storage::write_val): Add unused unsigned int argument.
104 (fixed_wide_int_storage::from, fixed_wide_int_storage::from_array):
105 Adjust write_val callers.
106 (wi::int_traits <fixed_wide_int_storage>::get_binary_precision): New.
107 (WIDEST_INT): Define.
108 (widest_int_storage): New template class.
109 (wi::int_traits <widest_int_storage>): New.
110 (trailing_wide_int_storage::write_val): Add unused unsigned int
112 (wi::get_binary_precision): Use
113 wi::int_traits <WI_BINARY_RESULT (T1, T2)>::get_binary_precision
114 rather than get_precision on get_binary_result.
115 (wi::copy): Adjust write_val callers. Don't call set_len if
117 (wi::bit_not): If result.needs_write_val_arg, call write_val
118 again with upper bound estimate of len.
119 (wi::sext, wi::zext, wi::set_bit): Likewise.
120 (wi::bit_and, wi::bit_and_not, wi::bit_or, wi::bit_or_not,
121 wi::bit_xor, wi::add, wi::sub, wi::mul, wi::mul_high, wi::div_trunc,
122 wi::div_floor, wi::div_ceil, wi::div_round, wi::divmod_trunc,
123 wi::mod_trunc, wi::mod_floor, wi::mod_ceil, wi::mod_round,
124 wi::lshift, wi::lrshift, wi::arshift): Likewise.
125 (wi::bswap, wi::bitreverse): Assert result.needs_write_val_arg
127 (gt_ggc_mx, gt_pch_nx): Remove generic template for all
128 generic_wide_int, instead add functions and templates for each
129 storage of generic_wide_int. Make functions for
130 generic_wide_int <wide_int_storage> and templates for
131 generic_wide_int <widest_int_storage <N>> deleted.
132 (wi::mask, wi::shifted_mask): Adjust write_val calls.
133 * wide-int.cc (zeros): Decrease array size to 1.
134 (BLOCKS_NEEDED): Use CEIL.
135 (canonize): Use HOST_WIDE_INT_M1.
136 (wi::from_buffer): Pass 0 to write_val.
137 (wi::to_mpz): Use CEIL.
138 (wi::from_mpz): Likewise. Pass 0 to write_val. Use
139 WIDE_INT_MAX_INL_ELTS instead of WIDE_INT_MAX_ELTS.
140 (wi::mul_internal): Use WIDE_INT_MAX_INL_PRECISION instead of
141 MAX_BITSIZE_MODE_ANY_INT in automatic array sizes, for prec
142 above WIDE_INT_MAX_INL_PRECISION estimate precision from
143 lengths of operands. Use XALLOCAVEC allocated buffers for
144 prec above WIDE_INT_MAX_INL_PRECISION.
145 (wi::divmod_internal): Likewise.
146 (wi::lshift_large): For len > WIDE_INT_MAX_INL_ELTS estimate
147 it from xlen and skip.
148 (rshift_large_common): Remove xprecision argument, add len
149 argument with len computed in caller. Don't return anything.
150 (wi::lrshift_large, wi::arshift_large): Compute len here
151 and pass it to rshift_large_common, for lengths above
152 WIDE_INT_MAX_INL_ELTS using estimations from xlen if possible.
153 (assert_deceq, assert_hexeq): For lengths above
154 WIDE_INT_MAX_INL_ELTS use XALLOCAVEC allocated buffer.
155 (test_printing): Use WIDE_INT_MAX_INL_PRECISION instead of
156 WIDE_INT_MAX_PRECISION.
157 * wide-int-print.h (WIDE_INT_PRINT_BUFFER_SIZE): Use
158 WIDE_INT_MAX_INL_PRECISION instead of WIDE_INT_MAX_PRECISION.
159 * wide-int-print.cc (print_decs, print_decu, print_hex): For
160 lengths above WIDE_INT_MAX_INL_ELTS use XALLOCAVEC allocated buffer.
161 * tree.h (wi::int_traits<extended_tree <N>>): Change precision_type
162 to INL_CONST_PRECISION for N == ADDR_MAX_PRECISION.
163 (widest_extended_tree): Use WIDEST_INT_MAX_PRECISION instead of
164 WIDE_INT_MAX_PRECISION.
165 (wi::ints_for): Use int_traits <extended_tree <N> >::precision_type
166 instead of hard coded CONST_PRECISION.
167 (widest2_int_cst): Use WIDEST_INT_MAX_PRECISION instead of
168 WIDE_INT_MAX_PRECISION.
169 (wi::extended_tree <N>::get_len): Use WIDEST_INT_MAX_PRECISION rather
170 than WIDE_INT_MAX_PRECISION.
171 (wi::ints_for::zero): Use
172 wi::int_traits <wi::extended_tree <N> >::precision_type instead of
174 * tree.cc (build_replicated_int_cst): Formatting fix. Use
175 WIDE_INT_MAX_INL_ELTS rather than WIDE_INT_MAX_ELTS.
176 * print-tree.cc (print_node): Don't print TREE_UNAVAILABLE on
177 INTEGER_CSTs, TREE_VECs or SSA_NAMEs.
178 * double-int.h (wi::int_traits <double_int>::precision_type): Change
179 to INL_CONST_PRECISION from CONST_PRECISION.
180 * poly-int.h (struct poly_coeff_traits): Add partial specialization
181 for wi::INL_CONST_PRECISION.
182 * cfgloop.h (bound_wide_int): New typedef.
183 (struct nb_iter_bound): Change bound type from widest_int to
185 (struct loop): Change nb_iterations_upper_bound,
186 nb_iterations_likely_upper_bound and nb_iterations_estimate type from
187 widest_int to bound_wide_int.
188 * cfgloop.cc (record_niter_bound): Return early if wi::min_precision
189 of i_bound is too large for bound_wide_int. Adjustments for the
190 widest_int to bound_wide_int type change in non-static data members.
191 (get_estimated_loop_iterations, get_max_loop_iterations,
192 get_likely_max_loop_iterations): Adjustments for the widest_int to
193 bound_wide_int type change in non-static data members.
194 * tree-vect-loop.cc (vect_transform_loop): Likewise.
195 * tree-ssa-loop-niter.cc (do_warn_aggressive_loop_optimizations): Use
196 XALLOCAVEC allocated buffer for i_bound len above
197 WIDE_INT_MAX_INL_ELTS.
198 (record_estimate): Return early if wi::min_precision of i_bound is too
199 large for bound_wide_int. Adjustments for the widest_int to
200 bound_wide_int type change in non-static data members.
201 (wide_int_cmp): Use bound_wide_int instead of widest_int.
202 (bound_index): Use bound_wide_int instead of widest_int.
203 (discover_iteration_bound_by_body_walk): Likewise. Use
204 widest_int::from to convert it to widest_int when passed to
206 (maybe_lower_iteration_bound): Use widest_int::from to convert it to
207 widest_int when passed to record_niter_bound.
208 (estimate_numbers_of_iteration): Don't record upper bound if
209 loop->nb_iterations has too large precision for bound_wide_int.
210 (n_of_executions_at_most): Use widest_int::from.
211 * tree-ssa-loop-ivcanon.cc (remove_redundant_iv_tests): Adjust for
212 the widest_int to bound_wide_int changes.
213 * match.pd (fold_sign_changed_comparison simplification): Use
214 wide_int::from on wi::to_wide instead of wi::to_widest.
215 * value-range.h (irange::maybe_resize): Avoid using memcpy on
216 non-trivially copyable elements.
217 * value-range.cc (irange_bitmask::dump): Use XALLOCAVEC allocated
218 buffer for mask or value len above WIDE_INT_PRINT_BUFFER_SIZE.
219 * fold-const.cc (fold_convert_const_int_from_int, fold_unary_loc):
220 Use wide_int::from on wi::to_wide instead of wi::to_widest.
221 * tree-ssa-ccp.cc (bit_value_binop): Zero extend r1max from width
222 before calling wi::udiv_trunc.
223 * lto-streamer-out.cc (output_cfg): Adjustments for the widest_int to
224 bound_wide_int type change in non-static data members.
225 * lto-streamer-in.cc (input_cfg): Likewise.
226 (lto_input_tree_1): Use WIDE_INT_MAX_INL_ELTS rather than
227 WIDE_INT_MAX_ELTS. For length above WIDE_INT_MAX_INL_ELTS use
228 XALLOCAVEC allocated buffer. Formatting fix.
229 * data-streamer-in.cc (streamer_read_wide_int,
230 streamer_read_widest_int): Likewise.
231 * tree-affine.cc (aff_combination_expand): Use placement new to
232 construct name_expansion.
233 (free_name_expansion): Destruct name_expansion.
234 * gimple-ssa-strength-reduction.cc (struct slsr_cand_d): Change
235 index type from widest_int to offset_int.
236 (class incr_info_d): Change incr type from widest_int to offset_int.
237 (alloc_cand_and_find_basis, backtrace_base_for_ref,
238 restructure_reference, slsr_process_ref, create_mul_ssa_cand,
239 create_mul_imm_cand, create_add_ssa_cand, create_add_imm_cand,
240 slsr_process_add, cand_abs_increment, replace_mult_candidate,
241 replace_unconditional_candidate, incr_vec_index,
242 create_add_on_incoming_edge, create_phi_basis_1,
243 replace_conditional_candidate, record_increment,
244 record_phi_increments_1, phi_incr_cost_1, phi_incr_cost,
245 lowest_cost_path, total_savings, ncd_with_phi, ncd_of_cand_and_phis,
246 nearest_common_dominator_for_cands, insert_initializers,
247 all_phi_incrs_profitable_1, replace_one_candidate,
248 replace_profitable_candidates): Use offset_int rather than widest_int
249 and wi::to_offset rather than wi::to_widest.
250 * real.cc (real_to_integer): Use WIDE_INT_MAX_INL_ELTS rather than
251 2 * WIDE_INT_MAX_ELTS and for words above that use XALLOCAVEC
253 * tree-ssa-loop-ivopts.cc (niter_for_exit): Use placement new
254 to construct tree_niter_desc and destruct it on failure.
255 (free_tree_niter_desc): Destruct tree_niter_desc if value is non-NULL.
256 * gengtype.cc (main): Remove widest_int handling.
257 * graphite-isl-ast-to-gimple.cc (widest_int_from_isl_expr_int): Use
258 WIDEST_INT_MAX_ELTS instead of WIDE_INT_MAX_ELTS.
259 * gimple-ssa-warn-alloca.cc (pass_walloca::execute): Use
260 WIDE_INT_MAX_INL_PRECISION instead of WIDE_INT_MAX_PRECISION and
261 assert get_len () fits into it.
262 * value-range-pretty-print.cc (vrange_printer::print_irange_bitmasks):
263 For mask or value lengths above WIDE_INT_MAX_INL_ELTS use XALLOCAVEC
265 * gimple-ssa-sprintf.cc (adjust_range_for_overflow): Use
266 wide_int::from on wi::to_wide instead of wi::to_widest.
267 * omp-general.cc (score_wide_int): New typedef.
268 (omp_context_compute_score): Use score_wide_int instead of widest_int
269 and adjust for those changes.
270 (struct omp_declare_variant_entry): Change score and
271 score_in_declare_simd_clone non-static data member type from widest_int
273 (omp_resolve_late_declare_variant, omp_resolve_declare_variant): Use
274 score_wide_int instead of widest_int and adjust for those changes.
275 (omp_lto_output_declare_variant_alt): Likewise.
276 (omp_lto_input_declare_variant_alt): Likewise.
277 * godump.cc (go_output_typedef): Assert get_len () is smaller than
278 WIDE_INT_MAX_INL_ELTS.
280 2023-10-12 Pan Li <pan2.li@intel.com>
282 * config/riscv/autovec.md (lround<mode><v_i_l_ll_convert>2): New
283 pattern for lround/lroundf.
284 * config/riscv/riscv-protos.h (enum insn_type): New enum value.
285 (expand_vec_lround): New func decl for expanding lround.
286 * config/riscv/riscv-v.cc (expand_vec_lround): New func impl
287 for expanding lround.
289 2023-10-12 Jakub Jelinek <jakub@redhat.com>
291 * dwarf2out.h (wide_int_ptr): Remove.
292 (dw_wide_int_ptr): New typedef.
293 (struct dw_val_node): Change type of val_wide from wide_int_ptr
295 (struct dw_wide_int): New type.
296 (dw_wide_int::elt): New method.
297 (dw_wide_int::operator ==): Likewise.
298 * dwarf2out.cc (get_full_len): Change argument type to
299 const dw_wide_int & from const wide_int &. Use CEIL. Call
300 get_precision method instead of calling wi::get_precision.
301 (alloc_dw_wide_int): New function.
302 (add_AT_wide): Change w argument type to const wide_int_ref &
303 from const wide_int &. Use alloc_dw_wide_int.
304 (mem_loc_descriptor, loc_descriptor): Use alloc_dw_wide_int.
305 (insert_wide_int): Change val argument type to const wide_int_ref &
306 from const wide_int &.
307 (add_const_value_attribute): Pass rtx_mode_t temporary directly to
308 add_AT_wide instead of using a temporary variable.
310 2023-10-12 Richard Biener <rguenther@suse.de>
312 PR tree-optimization/111764
313 * tree-vect-loop.cc (check_reduction_path): Remove the attempt
314 to allow x + x via special-casing of assigns.
316 2023-10-12 Hu, Lin1 <lin1.hu@intel.com>
318 * common/config/i386/cpuinfo.h (get_available_features):
320 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_USER_MSR_SET): New.
321 (OPTION_MASK_ISA2_USER_MSR_UNSET): Ditto.
322 (ix86_handle_option): Handle -musermsr.
323 * common/config/i386/i386-cpuinfo.h (enum processor_features):
324 Add FEATURE_USER_MSR.
325 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for usermsr.
326 * config.gcc: Add usermsrintrin.h
327 * config/i386/cpuid.h (bit_USER_MSR): New.
328 * config/i386/i386-builtin-types.def:
329 Add DEF_FUNCTION_TYPE (VOID, UINT64, UINT64).
330 * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
331 Add __builtin_urdmsr and __builtin_uwrmsr.
332 * config/i386/i386-builtins.h (ix86_builtins):
333 Add IX86_BUILTIN_URDMSR and IX86_BUILTIN_UWRMSR.
334 * config/i386/i386-c.cc (ix86_target_macros_internal):
336 * config/i386/i386-expand.cc (ix86_expand_builtin):
338 * config/i386/i386-isa.def (USER_MSR): Add DEF_PTA(USER_MSR).
339 * config/i386/i386-options.cc (ix86_valid_target_attribute_inner_p):
341 * config/i386/i386.md (urdmsr): New define_insn.
343 * config/i386/i386.opt: Add option -musermsr.
344 * config/i386/x86gprintrin.h: Include usermsrintrin.h
345 * doc/extend.texi: Document usermsr.
346 * doc/invoke.texi: Document -musermsr.
347 * doc/sourcebuild.texi: Document target usermsr.
348 * config/i386/usermsrintrin.h: New file.
350 2023-10-12 Yang Yujie <yangyujie@loongson.cn>
352 * config.gcc: Add loongarch-driver.h to tm_files.
353 * config/loongarch/loongarch.h: Do not include loongarch-driver.h.
354 * config/loongarch/t-loongarch: Append loongarch-multilib.h to $(GTM_H)
355 instead of $(TM_H) for building generator programs.
357 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
360 * config/rs6000/rs6000.md (stack_protect_setsi): Support prefixed
361 instruction emission and incorporate to stack_protect_set<mode>.
362 (stack_protect_setdi): Rename to ...
363 (stack_protect_set<mode>): ... this, adjust constraint.
364 (stack_protect_testsi): Support prefixed instruction emission and
365 incorporate to stack_protect_test<mode>.
366 (stack_protect_testdi): Rename to ...
367 (stack_protect_test<mode>): ... this, adjust constraint.
369 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
371 * tree-vect-stmts.cc (vectorizable_store): Consider generated
372 VEC_PERM_EXPR stmt for VMAT_CONTIGUOUS_REVERSE in costing as
375 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
377 * tree-vect-stmts.cc (vect_model_store_cost): Remove.
378 (vectorizable_store): Adjust the costing for the remaining memory
379 access types VMAT_CONTIGUOUS{, _DOWN, _REVERSE}.
381 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
383 * tree-vect-stmts.cc (vect_model_store_cost): Assert it will never
384 get VMAT_CONTIGUOUS_PERMUTE and remove VMAT_CONTIGUOUS_PERMUTE related
386 (vectorizable_store): Adjust the cost handling on
387 VMAT_CONTIGUOUS_PERMUTE without calling vect_model_store_cost.
389 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
391 * tree-vect-stmts.cc (vect_model_store_cost): Assert it will never
392 get VMAT_LOAD_STORE_LANES.
393 (vectorizable_store): Adjust the cost handling on VMAT_LOAD_STORE_LANES
394 without calling vect_model_store_cost. Factor out new lambda function
395 update_prologue_cost.
397 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
399 * tree-vect-stmts.cc (vect_model_store_cost): Assert it won't get
400 VMAT_ELEMENTWISE and VMAT_STRIDED_SLP any more, and remove their
402 (vectorizable_store): Adjust the cost handling on VMAT_ELEMENTWISE
403 and VMAT_STRIDED_SLP without calling vect_model_store_cost.
405 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
407 * tree-vect-stmts.cc (vectorizable_store): Adjust costing on
408 vectorizable_scan_store without calling vect_model_store_cost
411 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
413 * tree-vect-stmts.cc (vect_model_store_cost): Assert it won't get
414 VMAT_GATHER_SCATTER any more, remove VMAT_GATHER_SCATTER related
415 handlings and the related parameter gs_info.
416 (vect_build_scatter_store_calls): Add the handlings on costing with
417 one more argument cost_vec.
418 (vectorizable_store): Adjust the cost handling on VMAT_GATHER_SCATTER
419 without calling vect_model_store_cost any more.
421 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
423 * tree-vect-stmts.cc (vectorizable_store): Move and duplicate the call
424 to vect_model_store_cost down to some different transform paths
425 according to the handlings of different vect_memory_access_types
426 or some special handling need.
428 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
430 * tree-vect-stmts.cc (vectorizable_store): Ensure the generated
431 vector store for some case of VMAT_ELEMENTWISE is supported.
433 2023-10-12 Mo, Zewei <zewei.mo@intel.com>
434 Hu Lin1 <lin1.hu@intel.com>
435 Hongyu Wang <hongyu.wang@intel.com>
437 * config/i386/i386.cc (gen_push2): New function to emit push2
438 and adjust cfa offset.
439 (ix86_pro_and_epilogue_can_use_push2_pop2): New function to
440 determine whether push2/pop2 can be used.
441 (ix86_compute_frame_layout): Adjust preferred stack boundary
442 and stack alignment needed for push2/pop2.
443 (ix86_emit_save_regs): Emit push2 when available.
444 (ix86_emit_restore_reg_using_pop2): New function to emit pop2
446 (ix86_emit_restore_regs_using_pop2): New function to loop
447 through the saved regs and call above.
448 (ix86_expand_epilogue): Call ix86_emit_restore_regs_using_pop2
449 when push2pop2 available.
450 * config/i386/i386.md (push2_di): New pattern for push2.
451 (pop2_di): Likewise for pop2.
453 2023-10-12 Pan Li <pan2.li@intel.com>
455 * config/riscv/autovec.md (lrint<mode><vlconvert>2): Rename from.
456 (lrint<mode><v_i_l_ll_convert>2): Rename to.
457 * config/riscv/vector-iterators.md: Rename and remove TARGET_64BIT.
459 2023-10-11 Kito Cheng <kito.cheng@sifive.com>
461 * config/riscv/riscv-opts.h (TARGET_MIN_VLEN_OPTS): New.
463 2023-10-11 Jeff Law <jlaw@ventanamicro.com>
465 * config/riscv/riscv.md (jump): Adjust sequence to use a "jump"
466 pseudo op instead of a "call" pseudo op.
468 2023-10-11 Kito Cheng <kito.cheng@sifive.com>
470 * config/riscv/riscv-subset.h (riscv_subset_list::parse_single_std_ext):
472 (riscv_subset_list::parse_single_multiletter_ext): Ditto.
473 (riscv_subset_list::clone): Ditto.
474 (riscv_subset_list::parse_single_ext): Ditto.
475 (riscv_subset_list::set_loc): Ditto.
476 (riscv_set_arch_by_subset_list): Ditto.
477 * common/config/riscv/riscv-common.cc
478 (riscv_subset_list::parse_single_std_ext): New.
479 (riscv_subset_list::parse_single_multiletter_ext): Ditto.
480 (riscv_subset_list::clone): Ditto.
481 (riscv_subset_list::parse_single_ext): Ditto.
482 (riscv_subset_list::set_loc): Ditto.
483 (riscv_set_arch_by_subset_list): Ditto.
485 2023-10-11 Kito Cheng <kito.cheng@sifive.com>
487 * config/riscv/riscv.cc (riscv_convert_vector_bits): Get setting
488 from argument rather than get setting from global setting.
489 (riscv_override_options_internal): New, splited from
490 riscv_override_options, also take a gcc_options argument.
491 (riscv_option_override): Splited most part to
492 riscv_override_options_internal.
494 2023-10-11 Kito Cheng <kito.cheng@sifive.com>
496 * doc/options.texi (Mask): Document TARGET_<NAME>_P and
497 TARGET_<NAME>_OPTS_P.
498 (InverseMask): Ditto.
499 * opth-gen.awk (Mask): Generate TARGET_<NAME>_P and
500 TARGET_<NAME>_OPTS_P macro.
501 (InverseMask): Ditto.
503 2023-10-11 Andrew Pinski <pinskia@gmail.com>
505 PR tree-optimization/111282
506 * match.pd (`a & ~(a ^ b)`, `a & (a == b)`,
507 `a & ((~a) ^ b)`): New patterns.
509 2023-10-11 Mary Bennett <mary.bennett@embecosm.com>
511 * common/config/riscv/riscv-common.cc: Add the XCValu
513 * config/riscv/constraints.md: Add builtins for the XCValu
515 * config/riscv/predicates.md (immediate_register_operand):
517 * config/riscv/corev.def: Likewise.
518 * config/riscv/corev.md: Likewise.
519 * config/riscv/riscv-builtins.cc (AVAIL): Likewise.
520 (RISCV_ATYPE_UHI): Likewise.
521 * config/riscv/riscv-ftypes.def: Likewise.
522 * config/riscv/riscv.opt: Likewise.
523 * config/riscv/riscv.cc (riscv_print_operand): Likewise.
524 * doc/extend.texi: Add XCValu documentation.
525 * doc/sourcebuild.texi: Likewise.
527 2023-10-11 Mary Bennett <mary.bennett@embecosm.com>
529 * common/config/riscv/riscv-common.cc: Add XCVmac.
530 * config/riscv/riscv-ftypes.def: Add XCVmac builtins.
531 * config/riscv/riscv-builtins.cc: Likewise.
532 * config/riscv/riscv.md: Likewise.
533 * config/riscv/riscv.opt: Likewise.
534 * doc/extend.texi: Add XCVmac builtin documentation.
535 * doc/sourcebuild.texi: Likewise.
536 * config/riscv/corev.def: New file.
537 * config/riscv/corev.md: New file.
539 2023-10-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
541 * config/riscv/autovec.md: Fix index bug.
542 * config/riscv/riscv-protos.h (gather_scatter_valid_offset_mode_p): New function.
543 * config/riscv/riscv-v.cc (expand_gather_scatter): Fix index bug.
544 (gather_scatter_valid_offset_mode_p): New function.
546 2023-10-11 Pan Li <pan2.li@intel.com>
548 * config/riscv/autovec.md (lrint<mode><vlconvert>2): New pattern
550 * config/riscv/riscv-protos.h (expand_vec_lrint): New func decl
552 * config/riscv/riscv-v.cc (emit_vec_cvt_x_f): New helper func impl
554 (expand_vec_lrint): New function impl for expanding lint.
555 * config/riscv/vector-iterators.md: New mode attr and iterator.
557 2023-10-11 Richard Biener <rguenther@suse.de>
558 Jakub Jelinek <jakub@redhat.com>
560 PR tree-optimization/111519
561 * tree-ssa-strlen.cc (strlen_pass::count_nonzero_bytes): Add vuse
562 argument and pass it through to recursive calls and
563 count_nonzero_bytes_addr calls. Don't shadow the stmt argument, but
564 change stmt for gimple_assign_single_p statements for which we don't
566 (strlen_pass::count_nonzero_bytes_addr): Add vuse argument and pass
567 it through to recursive calls and count_nonzero_bytes calls. Don't
568 use get_strinfo if gimple_vuse (stmt) is different from vuse. Don't
569 shadow the stmt argument.
571 2023-10-11 Roger Sayle <roger@nextmovesoftware.com>
574 PR tree-optimization/106245
575 * simplify-rtx.cc (simplify_relational_operation_1): Simplify
576 the RTL (ne:SI (subreg:QI (ashift:SI x 7) 0) 0) to (and:SI x 1).
578 2023-10-11 liuhongt <hongtao.liu@intel.com>
581 * config/i386/mmx.md (divv4hf3): Refine predicate of
582 operands[2] with register_operand.
584 2023-10-10 Andrew Waterman <andrew@sifive.com>
585 Philipp Tomsich <philipp.tomsich@vrull.eu>
586 Jeff Law <jlaw@ventanamicro.com>
588 * config/riscv/riscv.cc (struct machine_function): Track if a
589 far-branch/jump is used within a function (and $ra needs to be
591 (riscv_print_operand): Implement 'N' (inverse integer branch).
592 (riscv_far_jump_used_p): Implement.
593 (riscv_save_return_addr_reg_p): New function.
594 (riscv_save_reg_p): Use riscv_save_return_addr_reg_p.
595 * config/riscv/riscv.h (FIXED_REGISTERS): Update $ra.
596 (CALL_USED_REGISTERS): Update $ra.
597 * config/riscv/riscv.md: Add new types "ret" and "jalr".
598 (length attribute): Handle long conditional and unconditional
600 (conditional branch pattern): Handle case where jump can not
601 reach the intended target.
602 (indirect_jump, tablejump): Use new "jalr" type.
603 (simple_return): Use new "ret" type.
604 (simple_return_internal, eh_return_internal): Likewise.
605 (gpr_restore_return, riscv_mret): Likewise.
606 (riscv_uret, riscv_sret): Likewise.
607 * config/riscv/generic.md (generic_branch): Also recognize jalr & ret
609 * config/riscv/sifive-7.md (sifive_7_jump): Likewise.
611 2023-10-10 Andrew Pinski <pinskia@gmail.com>
613 PR tree-optimization/111679
614 * match.pd (`a | ((~a) ^ b)`): New pattern.
616 2023-10-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
619 * config/riscv/autovec.md: Add VLS BOOL modes.
621 2023-10-10 Richard Biener <rguenther@suse.de>
623 PR tree-optimization/111751
624 * fold-const.cc (fold_view_convert_expr): Up the buffer size
626 * tree-ssa-sccvn.cc (visit_reference_op_load): Special case
627 constants, giving up when re-interpretation to the target type
630 2023-10-10 Richard Biener <rguenther@suse.de>
632 PR tree-optimization/111751
633 * tree-ssa-sccvn.cc (visit_reference_op_load): Exempt
634 BLKmode result from the padding bits check.
636 2023-10-10 Claudiu Zissulescu <claziss@gmail.com>
638 * config/arc/arc.cc (arc_select_cc_mode): Match NEG code with
640 * config/arc/arc.md (addsi_compare): Make pattern canonical.
641 (addsi_compare_2): Fix identation, constraint letters.
642 (addsi_compare_3): Likewise.
644 2023-10-09 Eugene Rozenfeld <erozen@microsoft.com>
646 * auto-profile.cc (afdo_calculate_branch_prob): Fix count comparisons
647 * tree-vect-loop-manip.cc (vect_do_peeling): Guard against zero count
648 when scaling loop profile
650 2023-10-09 Andrew MacLeod <amacleod@redhat.com>
652 PR tree-optimization/111694
653 * gimple-range-cache.cc (ranger_cache::fill_block_cache): Adjust
655 * value-relation.cc (adjust_equivalence_range): New.
656 * value-relation.h (adjust_equivalence_range): New prototype.
658 2023-10-09 Andrew MacLeod <amacleod@redhat.com>
660 * gimple-range-gori.cc (gori_compute::compute_operand1_range): Do
661 not call get_identity_relation.
662 (gori_compute::compute_operand2_range): Ditto.
663 * value-relation.cc (get_identity_relation): Remove.
664 * value-relation.h (get_identity_relation): Remove protyotype.
666 2023-10-09 Robin Dapp <rdapp@ventanamicro.com>
668 * config/riscv/riscv-cores.def (RISCV_TUNE): Add parameter.
669 * config/riscv/riscv-opts.h (enum riscv_microarchitecture_type):
671 * config/riscv/riscv.cc (riscv_sched_adjust_cost): Implement
673 (TARGET_SCHED_ADJUST_COST): Define.
674 * config/riscv/riscv.md (no,yes"): Include generic-ooo.md
675 * config/riscv/riscv.opt: Add -madjust-lmul-cost.
676 * config/riscv/generic-ooo.md: New file.
677 * config/riscv/vector.md: Add vsetvl_pre.
679 2023-10-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
681 * config/riscv/riscv-opts.h (TARGET_VECTOR_MISALIGN_SUPPORTED): New macro.
682 * config/riscv/riscv.cc (riscv_support_vector_misalignment): Depend on movmisalign pattern.
683 * config/riscv/vector.md (movmisalign<mode>): New pattern.
685 2023-10-09 Xianmiao Qu <cooper.qu@linux.alibaba.com>
687 * config/riscv/thead.cc (th_mempair_save_regs): Fix missing CFI
688 directives for store-pair instruction.
690 2023-10-09 Richard Biener <rguenther@suse.de>
692 PR tree-optimization/111715
693 * alias.cc (reference_alias_ptr_type_1): When we have
694 a type-punning ref at the base search for the access
695 path part that's still semantically valid.
697 2023-10-09 Pan Li <pan2.li@intel.com>
699 * config/riscv/riscv-v.cc (shuffle_bswap_pattern): New func impl
701 (expand_vec_perm_const_1): Add handling for shuffle bswap pattern.
703 2023-10-09 Roger Sayle <roger@nextmovesoftware.com>
705 * config/i386/i386-expand.cc (ix86_split_ashr): Split shifts by
706 one into ashr[sd]i3_carry followed by rcr[sd]i2, if TARGET_USE_RCR
708 (ix86_split_lshr): Likewise, split shifts by one bit into
709 lshr[sd]i3_carry followed by rcr[sd]i2, if TARGET_USE_RCR or -Oz.
710 * config/i386/i386.h (TARGET_USE_RCR): New backend macro.
711 * config/i386/i386.md (rcrsi2): New define_insn for rcrl.
712 (rcrdi2): New define_insn for rcrq.
713 (<anyshiftrt><mode>3_carry): New define_insn for right shifts that
714 set the carry flag from the least significant bit, modelled using
716 * config/i386/x86-tune.def (X86_TUNE_USE_RCR): New tuning parameter
717 controlling use of rcr 1 vs. shrd, which is significantly faster on
720 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
722 * config/i386/i386.opt: Allow -mno-evex512.
724 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
725 Hu, Lin1 <lin1.hu@intel.com>
727 * config/i386/sse.md (V48H_AVX512VL): Add TARGET_EVEX512.
730 (VFH_AVX512VL): Ditto.
732 (VHF_AVX512VL): Ditto.
733 (VI2H_AVX512VL): Ditto.
734 (VI2F_256_512): Ditto.
735 (VF48_I1248): Remove unused iterator.
736 (VF48H_AVX512VL): Add TARGET_EVEX512.
737 (VF_AVX512): Remove unused iterator.
738 (REDUC_PLUS_MODE): Add TARGET_EVEX512.
739 (REDUC_SMINMAX_MODE): Ditto.
741 (VFH_SF_AVX512VL): Ditto.
742 (VEC_PERM_AVX2): Ditto.
744 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
745 Hu, Lin1 <lin1.hu@intel.com>
747 * config/i386/sse.md (VI1_AVX512VL): Add TARGET_EVEX512.
749 (VI1_AVX512F): Ditto.
750 (VI1_AVX512VNNI): Ditto.
751 (VI1_AVX512VL_F): Ditto.
752 (VI12_VI48F_AVX512VL): Ditto.
753 (*avx512f_permvar_truncv32hiv32qi_1): Ditto.
754 (sdot_prod<mode>): Ditto.
755 (VEC_PERM_AVX2): Ditto.
758 (vpmadd52<vpmadd52type>v8di): Ditto.
759 (usdot_prod<mode>): Ditto.
760 (vpdpbusd_v16si): Ditto.
761 (vpdpbusds_v16si): Ditto.
762 (vpdpwssd_v16si): Ditto.
763 (vpdpwssds_v16si): Ditto.
764 (VI48_AVX512VP2VL): Ditto.
765 (avx512vp2intersect_2intersectv16si): Ditto.
766 (VF_AVX512BF16VL): Ditto.
767 (VF1_AVX512_256): Ditto.
769 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
771 * config/i386/i386-expand.cc (ix86_expand_vector_init_duplicate):
772 Make sure there is EVEX512 enabled.
773 (ix86_expand_vecop_qihi2): Refuse V32QI->V32HI when no EVEX512.
774 * config/i386/i386.cc (ix86_hard_regno_mode_ok): Disable 64 bit mask
775 when !TARGET_EVEX512.
776 * config/i386/i386.md (avx512bw_512): New.
777 (SWI1248_AVX512BWDQ_64): Add TARGET_EVEX512.
778 (*zero_extendsidi2): Change isa to avx512bw_512.
781 (*andn<mode>_1): Change isa to kmov_isa.
782 (*<code><mode>_1): Ditto.
783 (*notxor<mode>_1): Ditto.
784 (*one_cmpl<mode>2_1): Ditto.
785 (*one_cmplsi2_1_zext): Change isa to avx512bw_512.
786 (*ashl<mode>3_1): Change isa to kmov_isa.
787 (*lshr<mode>3_1): Ditto.
788 * config/i386/sse.md (VI12HFBF_AVX512VL): Add TARGET_EVEX512.
789 (VI1248_AVX512VLBW): Ditto.
790 (VHFBF_AVX512VL): Ditto.
795 (VI12_256_512_AVX512VL): Ditto.
796 (VI2_AVX2_AVX512BW): Ditto.
797 (VI2_AVX512VNNIBW): Ditto.
798 (VI2_AVX512VL): Ditto.
799 (VI2HFBF_AVX512VL): Ditto.
800 (VI8_AVX2_AVX512BW): Ditto.
801 (VIMAX_AVX2_AVX512BW): Ditto.
802 (VIMAX_AVX512VL): Ditto.
803 (VI12_AVX2_AVX512BW): Ditto.
804 (VI124_AVX2_24_AVX512F_1_AVX512BW): Ditto.
805 (VI248_AVX512VL): Ditto.
806 (VI248_AVX512VLBW): Ditto.
807 (VI248_AVX2_8_AVX512F_24_AVX512BW): Ditto.
808 (VI248_AVX512BW): Ditto.
809 (VI248_AVX512BW_AVX512VL): Ditto.
811 (VI124_256_AVX512F_AVX512BW): Ditto.
812 (VI_AVX512BW): Ditto.
813 (VIHFBF_AVX512BW): Ditto.
814 (SWI1248_AVX512BWDQ): Ditto.
815 (SWI1248_AVX512BW): Ditto.
816 (SWI1248_AVX512BWDQ2): Ditto.
817 (*knotsi_1_zext): Ditto.
818 (define_split for zero_extend + not): Ditto.
820 (REDUC_SMINMAX_MODE): Ditto.
821 (VEC_EXTRACT_MODE): Ditto.
822 (*avx512bw_permvar_truncv16siv16hi_1): Ditto.
823 (*avx512bw_permvar_truncv16siv16hi_1_hf): Ditto.
824 (truncv32hiv32qi2): Ditto.
825 (avx512bw_<code>v32hiv32qi2): Ditto.
826 (avx512bw_<code>v32hiv32qi2_mask): Ditto.
827 (avx512bw_<code>v32hiv32qi2_mask_store): Ditto.
829 (VEC_PERM_AVX2): Ditto.
830 (AVX512ZEXTMASK): Ditto.
832 (vec_pack_trunc_<mode>): Change iterator to SWI24_MASK.
833 (avx512bw_packsswb<mask_name>): Add TARGET_EVEX512.
834 (avx512bw_packssdw<mask_name>): Ditto.
835 (avx512bw_interleave_highv64qi<mask_name>): Ditto.
836 (avx512bw_interleave_lowv64qi<mask_name>): Ditto.
837 (<mask_codefor>avx512bw_pshuflwv32hi<mask_name>): Ditto.
838 (<mask_codefor>avx512bw_pshufhwv32hi<mask_name>): Ditto.
839 (vec_unpacks_lo_di): Ditto.
841 (vec_unpacks_hi_<mode>): Change iterator to SWI48x_MASK.
842 (avx512bw_umulhrswv32hi3<mask_name>): Add TARGET_EVEX512.
843 (VI1248_AVX512VL_AVX512BW): Ditto.
844 (avx512bw_<code>v32qiv32hi2<mask_name>): Ditto.
845 (*avx512bw_zero_extendv32qiv32hi2_1): Ditto.
846 (*avx512bw_zero_extendv32qiv32hi2_2): Ditto.
847 (<insn>v32qiv32hi2): Ditto.
848 (pbroadcast_evex_isa): Change isa attribute to avx512bw_512.
849 (VPERMI2): Add TARGET_EVEX512.
852 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
854 * config/i386/i386-expand.cc (ix86_expand_sse2_mulvxdi3):
855 Add TARGET_EVEX512 for 512 bit usage.
856 * config/i386/i386.cc (standard_sse_constant_opcode): Ditto.
857 * config/i386/sse.md (VF1_VF2_AVX512DQ): Ditto.
858 (VF1_128_256VL): Ditto.
859 (VF2_AVX512VL): Ditto.
860 (VI8_256_512): Ditto.
861 (<mask_codefor>fixuns_trunc<mode><sseintvecmodelower>2<mask_name>):
864 (AVX512_VEC_2): Ditto.
865 (VI4F_BRCST32x2): Ditto.
866 (VI8F_BRCST64x2): Ditto.
868 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
870 * config/i386/i386-builtins.cc
871 (ix86_vectorize_builtin_gather): Disable 512 bit gather
872 when !TARGET_EVEX512.
873 * config/i386/i386-expand.cc (ix86_valid_mask_cmp_mode):
875 (ix86_expand_int_sse_cmp): Ditto.
876 (ix86_expand_vector_init_one_nonzero): Disable subroutine
877 when !TARGET_EVEX512.
878 (ix86_emit_swsqrtsf): Add TARGET_EVEX512.
879 (ix86_vectorize_vec_perm_const): Disable subroutine when
881 * config/i386/i386.cc
882 (standard_sse_constant_p): Add TARGET_EVEX512.
883 (standard_sse_constant_opcode): Ditto.
884 (ix86_get_ssemov): Ditto.
885 (ix86_legitimate_constant_p): Ditto.
886 (ix86_vectorize_builtin_scatter): Diable 512 bit scatter
887 when !TARGET_EVEX512.
888 * config/i386/i386.md (avx512f_512): New.
889 (movxi): Add TARGET_EVEX512.
890 (*movxi_internal_avx512f): Ditto.
891 (*movdi_internal): Change alternative 12 to ?Yv. Adjust mode
893 (*movsi_internal): Change alternative 8 to ?Yv. Adjust mode for
895 (*movhi_internal): Change alternative 11 to *Yv.
896 (*movdf_internal): Change alternative 12 to Yv.
897 (*movsf_internal): Change alternative 5 to Yv. Adjust mode for
899 (*mov<mode>_internal): Change alternative 4 to Yv.
900 (define_split for convert SF to DF): Add TARGET_EVEX512.
901 (extendbfsf2_1): Ditto.
902 * config/i386/predicates.md (bcst_mem_operand): Disable predicate
903 for 512 bit when !TARGET_EVEX512.
904 * config/i386/sse.md (VMOVE): Add TARGET_EVEX512.
905 (V48_AVX512VL): Ditto.
906 (V48_256_512_AVX512VL): Ditto.
907 (V48H_AVX512VL): Ditto.
908 (VI12_AVX512VL): Ditto.
913 (VF1_VF2_AVX512DQ): Ditto.
920 (VF2_512_256): Ditto.
921 (VF2_512_256VL): Ditto.
924 (VI48_AVX512VL): Ditto.
925 (VI1248_AVX512VLBW): Ditto.
926 (VF_AVX512VL): Ditto.
927 (VFH_AVX512VL): Ditto.
928 (VF1_AVX512VL): Ditto.
933 (VI8_AVX512VL): Ditto.
934 (VI2_AVX512F): Ditto.
935 (VI4_AVX512F): Ditto.
936 (VI4_AVX512VL): Ditto.
937 (VI48_AVX512F_AVX512VL): Ditto.
938 (VI8_AVX2_AVX512F): Ditto.
939 (VI8_AVX_AVX512F): Ditto.
942 (VI124_AVX2_24_AVX512F_1_AVX512BW): Ditto.
943 (VI248_AVX512VLBW): Ditto.
944 (VI248_AVX2_8_AVX512F_24_AVX512BW): Ditto.
945 (VI248_AVX512BW): Ditto.
946 (VI248_AVX512BW_AVX512VL): Ditto.
947 (VI48_AVX512F): Ditto.
948 (VI48_AVX_AVX512F): Ditto.
949 (VI12_AVX_AVX512F): Ditto.
951 (VI124_256_AVX512F_AVX512BW): Ditto.
953 (VI_AVX512BW): Ditto.
954 (VIHFBF_AVX512BW): Ditto.
955 (VI4F_256_512): Ditto.
956 (VI48F_256_512): Ditto.
958 (VI12_VI48F_AVX512VL): Ditto.
960 (AVX512MODE2P): Ditto.
961 (STORENT_MODE): Ditto.
962 (REDUC_PLUS_MODE): Ditto.
963 (REDUC_SMINMAX_MODE): Ditto.
964 (*andnot<mode>3): Change isa attribute to avx512f_512.
965 (*andnot<mode>3): Ditto.
966 (<code><mode>3): Ditto.
968 (FMAMODEM): Add TARGET_EVEX512.
969 (FMAMODE_AVX512): Ditto.
970 (VFH_SF_AVX512VL): Ditto.
971 (avx512f_fix_notruncv16sfv16si<mask_name><round_name>): Ditto.
972 (fix<fixunssuffix>_truncv16sfv16si2<mask_name><round_saeonly_name>):
974 (avx512f_cvtdq2pd512_2): Ditto.
975 (avx512f_cvtpd2dq512<mask_name><round_name>): Ditto.
976 (fix<fixunssuffix>_truncv8dfv8si2<mask_name><round_saeonly_name>):
978 (<mask_codefor>avx512f_cvtpd2ps512<mask_name><round_name>): Ditto.
979 (vec_unpacks_lo_v16sf): Ditto.
980 (vec_unpacks_hi_v16sf): Ditto.
981 (vec_unpacks_float_hi_v16si): Ditto.
982 (vec_unpacks_float_lo_v16si): Ditto.
983 (vec_unpacku_float_hi_v16si): Ditto.
984 (vec_unpacku_float_lo_v16si): Ditto.
985 (vec_pack_sfix_trunc_v8df): Ditto.
986 (avx512f_vec_pack_sfix_v8df): Ditto.
987 (<mask_codefor>avx512f_unpckhps512<mask_name>): Ditto.
988 (<mask_codefor>avx512f_unpcklps512<mask_name>): Ditto.
989 (<mask_codefor>avx512f_movshdup512<mask_name>): Ditto.
990 (<mask_codefor>avx512f_movsldup512<mask_name>): Ditto.
992 (AVX512_VEC_2): Ditto.
993 (vec_extract_lo_v64qi): Ditto.
994 (vec_extract_hi_v64qi): Ditto.
995 (VEC_EXTRACT_MODE): Ditto.
996 (<mask_codefor>avx512f_unpckhpd512<mask_name>): Ditto.
997 (avx512f_movddup512<mask_name>): Ditto.
998 (avx512f_unpcklpd512<mask_name>): Ditto.
999 (*<avx512>_vternlog<mode>_all): Ditto.
1000 (*<avx512>_vpternlog<mode>_1): Ditto.
1001 (*<avx512>_vpternlog<mode>_2): Ditto.
1002 (*<avx512>_vpternlog<mode>_3): Ditto.
1003 (avx512f_shufps512_mask): Ditto.
1004 (avx512f_shufps512_1<mask_name>): Ditto.
1005 (avx512f_shufpd512_mask): Ditto.
1006 (avx512f_shufpd512_1<mask_name>): Ditto.
1007 (<mask_codefor>avx512f_interleave_highv8di<mask_name>): Ditto.
1008 (<mask_codefor>avx512f_interleave_lowv8di<mask_name>): Ditto.
1009 (vec_dupv2df<mask_name>): Ditto.
1010 (trunc<pmov_src_lower><mode>2): Ditto.
1011 (*avx512f_<code><pmov_src_lower><mode>2): Ditto.
1012 (*avx512f_vpermvar_truncv8div8si_1): Ditto.
1013 (avx512f_<code><pmov_src_lower><mode>2_mask): Ditto.
1014 (avx512f_<code><pmov_src_lower><mode>2_mask_store): Ditto.
1015 (truncv8div8qi2): Ditto.
1016 (avx512f_<code>v8div16qi2): Ditto.
1017 (*avx512f_<code>v8div16qi2_store_1): Ditto.
1018 (*avx512f_<code>v8div16qi2_store_2): Ditto.
1019 (avx512f_<code>v8div16qi2_mask): Ditto.
1020 (*avx512f_<code>v8div16qi2_mask_1): Ditto.
1021 (*avx512f_<code>v8div16qi2_mask_store_1): Ditto.
1022 (avx512f_<code>v8div16qi2_mask_store_2): Ditto.
1023 (vec_widen_umult_even_v16si<mask_name>): Ditto.
1024 (*vec_widen_umult_even_v16si<mask_name>): Ditto.
1025 (vec_widen_smult_even_v16si<mask_name>): Ditto.
1026 (*vec_widen_smult_even_v16si<mask_name>): Ditto.
1027 (VEC_PERM_AVX2): Ditto.
1028 (one_cmpl<mode>2): Ditto.
1029 (<mask_codefor>one_cmpl<mode>2<mask_name>): Ditto.
1030 (*one_cmpl<mode>2_pternlog_false_dep): Ditto.
1031 (define_split to xor): Ditto.
1032 (*andnot<mode>3): Ditto.
1033 (define_split for ior): Ditto.
1034 (*iornot<mode>3): Ditto.
1035 (*xnor<mode>3): Ditto.
1036 (*<nlogic><mode>3): Ditto.
1037 (<mask_codefor>avx512f_interleave_highv16si<mask_name>): Ditto.
1038 (<mask_codefor>avx512f_interleave_lowv16si<mask_name>): Ditto.
1039 (avx512f_pshufdv3_mask): Ditto.
1040 (avx512f_pshufd_1<mask_name>): Ditto.
1041 (*vec_extractv4ti): Ditto.
1042 (VEXTRACTI128_MODE): Ditto.
1043 (define_split to vec_extract): Ditto.
1044 (VI1248_AVX512VL_AVX512BW): Ditto.
1045 (<mask_codefor>avx512f_<code>v16qiv16si2<mask_name>): Ditto.
1046 (<insn>v16qiv16si2): Ditto.
1047 (avx512f_<code>v16hiv16si2<mask_name>): Ditto.
1048 (<insn>v16hiv16si2): Ditto.
1049 (avx512f_zero_extendv16hiv16si2_1): Ditto.
1050 (avx512f_<code>v8qiv8di2<mask_name>): Ditto.
1051 (*avx512f_<code>v8qiv8di2<mask_name>_1): Ditto.
1052 (*avx512f_<code>v8qiv8di2<mask_name>_2): Ditto.
1053 (<insn>v8qiv8di2): Ditto.
1054 (avx512f_<code>v8hiv8di2<mask_name>): Ditto.
1055 (<insn>v8hiv8di2): Ditto.
1056 (avx512f_<code>v8siv8di2<mask_name>): Ditto.
1057 (*avx512f_zero_extendv8siv8di2_1): Ditto.
1058 (*avx512f_zero_extendv8siv8di2_2): Ditto.
1059 (<insn>v8siv8di2): Ditto.
1060 (avx512f_roundps512_sfix): Ditto.
1061 (vashrv8di3): Ditto.
1062 (vashrv16si3): Ditto.
1063 (pbroadcast_evex_isa): Change isa attribute to avx512f_512.
1064 (vec_dupv4sf): Add TARGET_EVEX512.
1065 (*vec_dupv4si): Ditto.
1066 (*vec_dupv2di): Ditto.
1067 (vec_dup<mode>): Change isa attribute to avx512f_512.
1068 (VPERMI2): Add TARGET_EVEX512.
1070 (VEC_INIT_MODE): Ditto.
1071 (VEC_INIT_HALF_MODE): Ditto.
1072 (<mask_codefor>avx512f_vcvtph2ps512<mask_name><round_saeonly_name>):
1074 (avx512f_vcvtps2ph512_mask_sae): Ditto.
1075 (<mask_codefor>avx512f_vcvtps2ph512<mask_name><round_saeonly_name>):
1077 (*avx512f_vcvtps2ph512<merge_mask_name>): Ditto.
1078 (INT_BROADCAST_MODE): Ditto.
1080 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
1082 * config/i386/i386-expand.cc (ix86_broadcast_from_constant):
1083 Disable zmm broadcast for !TARGET_EVEX512.
1084 * config/i386/i386-options.cc (ix86_option_override_internal):
1085 Do not use PVW_512 when no-evex512.
1086 (ix86_simd_clone_adjust): Add evex512 target into string.
1087 * config/i386/i386.cc (type_natural_mode): Report ABI warning
1088 when using zmm register w/o evex512.
1089 (ix86_return_in_memory): Do not allow zmm when !TARGET_EVEX512.
1090 (ix86_hard_regno_mode_ok): Ditto.
1091 (ix86_set_reg_reg_cost): Ditto.
1092 (ix86_rtx_costs): Ditto.
1093 (ix86_vector_mode_supported_p): Ditto.
1094 (ix86_preferred_simd_mode): Ditto.
1095 (ix86_get_mask_mode): Ditto.
1096 (ix86_simd_clone_compute_vecsize_and_simdlen): Disable 512 bit
1097 libmvec call when !TARGET_EVEX512.
1098 (ix86_simd_clone_usable): Ditto.
1099 * config/i386/i386.h (BIGGEST_ALIGNMENT): Disable 512 alignment
1100 when !TARGET_EVEX512
1101 (MOVE_MAX): Do not use PVW_512 when !TARGET_EVEX512.
1102 (STORE_MAX_PIECES): Ditto.
1104 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
1106 * config/i386/i386-builtin.def (BDESC): Add
1107 OPTION_MASK_ISA2_EVEX512.
1109 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
1111 * config/i386/i386-builtin.def (BDESC): Add
1112 OPTION_MASK_ISA2_EVEX512.
1114 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
1116 * config/i386/i386-builtin.def (BDESC): Add
1117 OPTION_MASK_ISA2_EVEX512.
1119 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
1121 * config/i386/i386-builtin.def (BDESC): Add
1122 OPTION_MASK_ISA2_EVEX512.
1124 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
1126 * config/i386/i386-builtin.def (BDESC): Add
1127 OPTION_MASK_ISA2_EVEX512.
1128 * config/i386/i386-builtins.cc
1129 (ix86_init_mmx_sse_builtins): Ditto.
1131 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
1132 Hu, Lin1 <lin1.hu@intel.com>
1134 * config/i386/avx512fp16intrin.h: Add evex512 target for 512 bit
1137 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
1139 * config.gcc: Add avx512bitalgvlintrin.h.
1140 * config/i386/avx5124fmapsintrin.h: Add evex512 target for 512 bit
1142 * config/i386/avx5124vnniwintrin.h: Ditto.
1143 * config/i386/avx512bf16intrin.h: Ditto.
1144 * config/i386/avx512bitalgintrin.h: Add evex512 target for 512 bit
1145 intrins. Split 128/256 bit intrins to avx512bitalgvlintrin.h.
1146 * config/i386/avx512erintrin.h: Add evex512 target for 512 bit
1148 * config/i386/avx512ifmaintrin.h: Ditto
1149 * config/i386/avx512pfintrin.h: Ditto
1150 * config/i386/avx512vbmi2intrin.h: Ditto.
1151 * config/i386/avx512vbmiintrin.h: Ditto.
1152 * config/i386/avx512vnniintrin.h: Ditto.
1153 * config/i386/avx512vp2intersectintrin.h: Ditto.
1154 * config/i386/avx512vpopcntdqintrin.h: Ditto.
1155 * config/i386/gfniintrin.h: Ditto.
1156 * config/i386/immintrin.h: Add avx512bitalgvlintrin.h.
1157 * config/i386/vaesintrin.h: Add evex512 target for 512 bit intrins.
1158 * config/i386/vpclmulqdqintrin.h: Ditto.
1159 * config/i386/avx512bitalgvlintrin.h: New.
1161 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
1163 * config/i386/avx512bwintrin.h: Add evex512 target for 512 bit
1166 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
1168 * config/i386/avx512dqintrin.h: Add evex512 target for 512 bit
1171 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
1173 * config/i386/avx512fintrin.h: Add evex512 target for 512 bit intrins.
1175 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
1177 * common/config/i386/i386-common.cc
1178 (OPTION_MASK_ISA2_EVEX512_SET): New.
1179 (OPTION_MASK_ISA2_EVEX512_UNSET): Ditto.
1180 (ix86_handle_option): Handle EVEX512.
1181 * config/i386/i386-c.cc
1182 (ix86_target_macros_internal): Handle EVEX512. Add __EVEX256__
1183 when AVX512VL is set.
1184 * config/i386/i386-options.cc: (isa2_opts): Handle EVEX512.
1185 (ix86_valid_target_attribute_inner_p): Ditto.
1186 (ix86_option_override_internal): Set EVEX512 target if it is not
1187 explicitly set when AVX512 is enabled. Disable
1188 AVX512{PF,ER,4VNNIW,4FAMPS} for -mno-evex512.
1189 * config/i386/i386.opt: Add mevex512. Temporaily RejectNegative.
1191 2023-10-09 Haochen Gui <guihaoc@gcc.gnu.org>
1194 * config/rs6000/rs6000.md (lrint<mode>di2): Remove TARGET_FPRND
1195 from insn condition.
1196 (lrint<mode>si2): New insn pattern for 32bit lrint.
1198 2023-10-09 Haochen Gui <guihaoc@gcc.gnu.org>
1201 * config/rs6000/rs6000.cc (rs6000_hard_regno_mode_ok_uncached):
1202 Enable SImode on FP registers for P7.
1203 * config/rs6000/rs6000.md (*movsi_internal1): Add fmr for SImode
1204 move between FP registers. Set attribute isa of stfiwx to "*"
1205 and attribute of stxsiwx to "p7".
1207 2023-10-09 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
1209 * config/s390/s390.md: Make use of new copysign RTL.
1211 2023-10-09 Hongyu Wang <hongyu.wang@intel.com>
1213 * config/i386/sse.md (vec_concatv2di): Replace constraint "m"
1214 with "jm" for alternative 0 and 1 of operand 2.
1215 (sse4_1_<code><mode>3<mask_name>): Replace constraint "Bm" with
1216 "ja" for alternative 0 and 1 of operand2.
1218 2023-10-08 David Malcolm <dmalcolm@redhat.com>
1221 * text-art/table.cc (table::maybe_set_cell_span): New.
1222 (table::add_other_table): New.
1223 * text-art/table.h (class table::cell_placement): Add class table
1225 (table::add_rows): New.
1226 (table::add_row): Reimplement in terms of add_rows.
1227 (table::maybe_set_cell_span): New decl.
1228 (table::add_other_table): New decl.
1229 * text-art/types.h (operator+): New operator for rect + coord.
1231 2023-10-08 David Malcolm <dmalcolm@redhat.com>
1233 * genmatch.cc (main): Update for "m_" prefix of some fields of
1235 * input.cc (make_location): Update for removal of
1236 COMBINE_LOCATION_DATA.
1237 (dump_line_table_statistics): Update for "m_" prefix of some
1238 fields of line_maps.
1239 (location_with_discriminator): Update for removal of
1240 COMBINE_LOCATION_DATA.
1241 (line_table_test::line_table_test): Update for "m_" prefix of some
1242 fields of line_maps.
1243 * toplev.cc (general_init): Likewise.
1244 * tree.cc (set_block): Update for removal of
1245 COMBINE_LOCATION_DATA.
1246 (set_source_range): Likewise.
1248 2023-10-08 David Malcolm <dmalcolm@redhat.com>
1250 * input.cc (make_location): Move implementation to
1251 line_maps::make_location.
1253 2023-10-08 David Malcolm <dmalcolm@redhat.com>
1256 * input.cc (file_cache::add_file): Update leading comment to
1257 clarify that it can fail.
1258 (file_cache::lookup_or_add_file): Likewise.
1259 (file_cache::get_source_file_content): Gracefully handle
1260 lookup_or_add_file failing.
1262 2023-10-08 liuhongt <hongtao.liu@intel.com>
1264 * config/i386/i386.cc (ix86_build_const_vector): Handle V2HF
1266 (ix86_build_signbit_mask): Ditto.
1267 * config/i386/mmx.md (mmxintvecmode): Ditto.
1268 (<code><mode>2): New define_expand.
1269 (*mmx_<code><mode>): New define_insn_and_split.
1270 (*mmx_nabs<mode>2): Ditto.
1271 (*mmx_andnot<mode>3): New define_insn.
1272 (<code><mode>3): Ditto.
1273 (copysign<mode>3): New define_expand.
1274 (xorsign<mode>3): Ditto.
1275 (signbit<mode>2): Ditto.
1277 2023-10-08 liuhongt <hongtao.liu@intel.com>
1279 * config/i386/mmx.md (VHF_32_64): New mode iterator.
1280 (<insn><mode>3): New define_expand, merged from ..
1281 (<insn>v4hf3): .. this and
1282 (<insn>v2hf3): .. this.
1283 (movd_v2hf_to_sse_reg): New define_expand, splitted from ..
1284 (movd_v2hf_to_sse): .. this.
1285 (<code><mode>3): New define_expand.
1287 2023-10-08 Jiufu Guo <guojiufu@linux.ibm.com>
1289 * config/rs6000/rs6000.cc (can_be_built_by_li_and_rldic): New function.
1290 (rs6000_emit_set_long_const): Call can_be_built_by_li_and_rldic.
1292 2023-10-08 Jiufu Guo <guojiufu@linux.ibm.com>
1294 * config/rs6000/rs6000.cc (can_be_built_by_li_lis_and_rldicl): New
1296 (can_be_built_by_li_lis_and_rldicr): New function.
1297 (rs6000_emit_set_long_const): Call can_be_built_by_li_lis_and_rldicr and
1298 can_be_built_by_li_lis_and_rldicl.
1300 2023-10-08 Jiufu Guo <guojiufu@linux.ibm.com>
1302 * config/rs6000/rs6000.cc (can_be_rotated_to_negative_lis): New
1304 (can_be_built_by_li_and_rotldi): Rename to ...
1305 (can_be_built_by_li_lis_and_rotldi): ... this function.
1306 (rs6000_emit_set_long_const): Call can_be_built_by_li_lis_and_rotldi.
1308 2023-10-08 Jiufu Guo <guojiufu@linux.ibm.com>
1310 * config/rs6000/rs6000.cc (can_be_built_by_li_and_rotldi): New function.
1311 (rs6000_emit_set_long_const): Call can_be_built_by_li_and_rotldi.
1313 2023-10-08 Yanzhang Wang <yanzhang.wang@intel.com>
1315 * config/riscv/linux.h: Pass the static-pie specific options to
1318 2023-10-07 Saurabh Jha <saurabh.jha@arm.com>
1320 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add support for
1322 * config/aarch64/aarch64-tune.md: Regenerated.
1323 * doc/invoke.texi: Add command-line option for cortex-x4 core.
1325 2023-10-07 Kong Lingling <lingling.kong@intel.com>
1326 Hongyu Wang <hongyu.wang@intel.com>
1327 Hongtao Liu <hongtao.liu@intel.com>
1329 * config/i386/constraints.md (jb): New constraint for vsib memory
1330 that does not allow gpr32.
1331 * config/i386/i386.md: (setcc_<mode>_sse): Replace m to jm for avx
1332 alternative and set attr_gpr32 to 0.
1333 (movmsk_df): Split avx/noavx alternatives and replace "r" to "jr" for
1335 (<sse>_rcp<mode>2): Split avx/noavx alternatives and replace
1336 "m/Bm" to "jm/ja" for avx alternative, set its gpr32 attr to 0.
1337 (*rsqrtsf2_sse): Likewise.
1338 * config/i386/mmx.md (mmx_pmovmskb): Split alternative 1 to
1339 avx/noavx and assign jr/r constraint to dest.
1340 * config/i386/sse.md (<sse>_movmsk<ssemodesuffix><avxsizesuffix>):
1341 Split avx/noavx alternatives and replace "r" to "jr" for avx alternative.
1342 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext): Likewise.
1343 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_lt): Likewise.
1344 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_lt): Likewise.
1345 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_shift): Likewise.
1346 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_shift): Likewise.
1347 (<sse2_avx2>_pmovmskb): Likewise.
1348 (*<sse2_avx2>_pmovmskb_zext): Likewise.
1349 (*sse2_pmovmskb_ext): Likewise.
1350 (*<sse2_avx2>_pmovmskb_lt): Likewise.
1351 (*<sse2_avx2>_pmovmskb_zext_lt): Likewise.
1352 (*sse2_pmovmskb_ext_lt): Likewise.
1353 (<sse>_rcp<mode>2): Split avx/noavx alternatives and replace
1354 "m/Bm" to "jm/ja" for avx alternative, set its attr_gpr32 to 0.
1355 (sse_vmrcpv4sf2): Likewise.
1356 (*sse_vmrcpv4sf2): Likewise.
1357 (rsqrt<mode>2): Likewise.
1358 (sse_vmrsqrtv4sf2): Likewise.
1359 (*sse_vmrsqrtv4sf2): Likewise.
1360 (avx_h<insn>v4df3): Likewise.
1361 (sse3_hsubv2df3): Likewise.
1362 (avx_h<insn>v8sf3): Likewise.
1363 (sse3_h<insn>v4sf3): Likewise.
1364 (<sse3>_lddqu<avxsizesuffix>): Likewise.
1365 (avx_cmp<mode>3): Likewise.
1366 (avx_vmcmp<mode>3): Likewise.
1367 (*sse2_gt<mode>3): Likewise.
1368 (sse_ldmxcsr): Likewise.
1369 (sse_stmxcsr): Likewise.
1370 (avx_vtest<ssemodesuffix><avxsizesuffix>): Replace m to jm for
1371 avx alternative and set attr_gpr32 to 0.
1372 (avx2_permv2ti): Likewise.
1373 (*avx_vperm2f128<mode>_full): Likewise.
1374 (*avx_vperm2f128<mode>_nozero): Likewise.
1375 (vec_set_lo_v32qi): Likewise.
1376 (<avx_avx2>_maskload<ssemodesuffix><avxsizesuffix>): Likewise.
1377 (<avx_avx2>_maskstore<ssemodesuffix><avxsi)zesuffix>: Likewise.
1378 (avx_cmp<mode>3): Likewise.
1379 (avx_vmcmp<mode>3): Likewise.
1380 (*<sse>_maskcmp<mode>3_comm): Likewise.
1381 (*avx2_gathersi<VEC_GATHER_MODE:mode>): Replace Tv to jb and set
1383 (*avx2_gathersi<VEC_GATHER_MODE:mode>_2): Likewise.
1384 (*avx2_gatherdi<VEC_GATHER_MODE:mode>): Likewise.
1385 (*avx2_gatherdi<VEC_GATHER_MODE:mode>_2): Likewise.
1386 (*avx2_gatherdi<VI4F_256:mode>_3): Likewise.
1387 (*avx2_gatherdi<VI4F_256:mode>_4): Likewise.
1388 (avx_vbroadcastf128_<mode>): Restrict non-egpr alternative to
1389 noavx512vl, set its constraint to jm and set attr_gpr32 to 0.
1390 (vec_set_lo_<mode><mask_name>): Likewise.
1391 (vec_set_lo_<mode><mask_name>): Likewise for SF/SI modes.
1392 (vec_set_hi_<mode><mask_name>): Likewise.
1393 (vec_set_hi_<mode><mask_name>): Likewise for SF/SI modes.
1394 (vec_set_hi_<mode>): Likewise.
1395 (vec_set_lo_<mode>): Likewise.
1396 (avx2_set_hi_v32qi): Likewise.
1398 2023-10-07 Kong Lingling <lingling.kong@intel.com>
1399 Hongyu Wang <hongyu.wang@intel.com>
1400 Hongtao Liu <hongtao.liu@intel.com>
1402 * config/i386/i386.md (*movhi_internal): Split out non-gpr
1403 supported pextrw with mem constraint to avx/noavx alternatives,
1404 set jm and attr gpr32 0 to the noavx alternative.
1405 (*mov<mode>_internal): Likewise.
1406 * config/i386/mmx.md (mmx_pshufbv8qi3): Change "r/m/Bm" to
1407 "jr/jm/ja" and set_attr gpr32 0 for noavx alternative.
1408 (mmx_pshufbv4qi3): Likewise.
1409 (*mmx_pinsrd): Likewise.
1410 (*mmx_pinsrb): Likewise.
1411 (*pinsrb): Likewise.
1412 (mmx_pshufbv8qi3): Likewise.
1413 (mmx_pshufbv4qi3): Likewise.
1414 (@sse4_1_insertps_<mode>): Likewise.
1415 (*mmx_pextrw): Split altrenatives and map non-EGPR
1416 constraints, attr_gpr32 and attr_isa to noavx mnemonics.
1417 (*movv2qi_internal): Likewise.
1418 (*pextrw): Likewise.
1419 (*mmx_pextrb): Likewise.
1420 (*mmx_pextrb_zext): Likewise.
1421 (*pextrb): Likewise.
1422 (*pextrb_zext): Likewise.
1423 (vec_extractv2si_1): Likewise.
1424 (vec_extractv2si_1_zext): Likewise.
1425 * config/i386/sse.md: (vi128_h_r): New mode attr for
1426 pinsr{bw}/pextr{bw} with reg operand.
1427 (*abs<mode>2): Split altrenatives and %v in mnemonics, map
1428 non-EGPR constraints, gpr32 and isa attrs to noavx mnemonics.
1429 (*vec_extract<mode>): Likewise.
1430 (*vec_extract<mode>): Likewise for HFBF pattern.
1431 (*vec_extract<PEXTR_MODE12:mode>_zext): Likewise.
1432 (*vec_extractv4si_1): Likewise.
1433 (*vec_extractv4si_zext): Likewise.
1434 (*vec_extractv2di_1): Likewise.
1435 (*vec_concatv2si_sse4_1): Likewise.
1436 (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
1437 (vec_concatv2di): Likewise.
1438 (*sse4_1_<code>v2qiv2di2<mask_name>_1): Likewise.
1439 (ssse3_avx2>_pshufb<mode>3<mask_name>): Change "r/m/Bm" to
1440 "jr/jm/ja" and set_attr gpr32 0 for noavx alternative, split
1441 %v for avx/noavx alternatives if necessary.
1442 (*vec_concatv2sf_sse4_1): Likewise.
1443 (*sse4_1_extractps): Likewise.
1444 (vec_set<mode>_0): Likewise for VI4F_128.
1445 (*vec_setv4sf_sse4_1): Likewise.
1446 (@sse4_1_insertps<mode>): Likewise.
1447 (ssse3_pmaddubsw128): Likewise.
1448 (*<ssse3_avx2>_pmulhrsw<mode>3<mask_name>): Likewise.
1449 (<sse4_1_avx2>_packusdw<mask_name>): Likewise.
1450 (<ssse3_avx2>_palignr<mode>): Likewise.
1451 (<vi8_sse4_1_avx2_avx512>_movntdqa): Likewise.
1452 (<sse4_1_avx2>_mpsadbw): Likewise.
1453 (*sse4_1_mulv2siv2di3<mask_name>): Likewise.
1454 (*<sse4_1_avx2>_mul<mode>3<mask_name>): Likewise.
1455 (*sse4_1_<code><mode>3<mask_name>): Likewise.
1456 (*<code>v8hi3): Likewise.
1457 (*<code>v16qi3): Likewise.
1458 (*sse4_1_<code>v8qiv8hi2<mask_name>_1): Likewise.
1459 (*sse4_1_zero_extendv8qiv8hi2_3): Likewise.
1460 (*sse4_1_zero_extendv8qiv8hi2_4): Likewise.
1461 (*sse4_1_<code>v4qiv4si2<mask_name>_1): Likewise.
1462 (*sse4_1_<code>v4hiv4si2<mask_name>_1): Likewise.
1463 (*sse4_1_zero_extendv4hiv4si2_3): Likewise.
1464 (*sse4_1_zero_extendv4hiv4si2_4): Likewise.
1465 (*sse4_1_<code>v2hiv2di2<mask_name>_1): Likewise.
1466 (*sse4_1_<code>v2siv2di2<mask_name>_1): Likewise.
1467 (*sse4_1_zero_extendv2siv2di2_3): Likewise.
1468 (*sse4_1_zero_extendv2siv2di2_4): Likewise.
1470 (aesdeclast): Likewise.
1472 (aesenclast): Likewise.
1473 (pclmulqdq): Likewise.
1474 (vgf2p8affineinvqb_<mode><mask_name>): Likewise.
1475 (vgf2p8affineqb_<mode><mask_name>): Likewise.
1476 (vgf2p8mulb_<mode><mask_name>): Likewise.
1478 2023-10-07 Kong Lingling <lingling.kong@intel.com>
1479 Hongyu Wang <hongyu.wang@intel.com>
1480 Hongtao Liu <hongtao.liu@intel.com>
1482 * config/i386/i386-protos.h (x86_evex_reg_mentioned_p): New
1484 * config/i386/i386.cc (x86_evex_reg_mentioned_p): New
1486 * config/i386/i386.md (sse4_1_round<mode>2): Set attr gpr32 0
1487 and constraint jm to all non-evex alternatives, adjust
1488 alternative outputs if evex reg is mentioned.
1489 * config/i386/sse.md (<sse4_1>_ptest<mode>): Set attr gpr32 0
1490 and constraint jm/ja to all non-evex alternatives.
1491 (ptesttf2): Likewise.
1492 (<sse4_1>_round<ssemodesuffix><avxsizesuffix): Likewise.
1493 (sse4_1_round<ssescalarmodesuffix>): Likewise.
1494 (sse4_2_pcmpestri): Likewise.
1495 (sse4_2_pcmpestrm): Likewise.
1496 (sse4_2_pcmpestr_cconly): Likewise.
1497 (sse4_2_pcmpistr): Likewise.
1498 (sse4_2_pcmpistri): Likewise.
1499 (sse4_2_pcmpistrm): Likewise.
1500 (sse4_2_pcmpistr_cconly): Likewise.
1502 (aeskeygenassist): Likewise.
1504 2023-10-07 Kong Lingling <lingling.kong@intel.com>
1505 Hongyu Wang <hongyu.wang@intel.com>
1506 Hongtao Liu <hongtao.liu@intel.com>
1508 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3): Set
1509 attr gpr32 0 and constraint jm/ja to all mem alternatives.
1510 (ssse3_ph<plusminus_mnemonic>wv8hi3): Likewise.
1511 (ssse3_ph<plusminus_mnemonic>wv4hi3): Likewise.
1512 (avx2_ph<plusminus_mnemonic>dv8si3): Likewise.
1513 (ssse3_ph<plusminus_mnemonic>dv4si3): Likewise.
1514 (ssse3_ph<plusminus_mnemonic>dv2si3): Likewise.
1515 (<ssse3_avx2>_psign<mode>3): Likewise.
1516 (ssse3_psign<mode>3): Likewise.
1517 (<sse4_1>_blend<ssemodesuffix><avxsizesuffix): Likewise.
1518 (<sse4_1>_blendv<ssemodesuffix><avxsizesuffix): Likewise.
1519 (*<sse4_1>_blendv<ssemodesuffix><avxsizesuffix>_lt): Likewise.
1520 (*<sse4_1>_blendv<ssefltmodesuff)ix><avxsizesuffix>_not_ltint: Likewise.
1521 (<sse4_1>_dp<ssemodesuffix><avxsizesuffix>): Likewise.
1522 (<sse4_1_avx2>_mpsadbw): Likewise.
1523 (<sse4_1_avx2>_pblendvb): Likewise.
1524 (*<sse4_1_avx2>_pblendvb_lt): Likewise.
1525 (sse4_1_pblend<ssemodesuffix>): Likewise.
1526 (*avx2_pblend<ssemodesuffix>): Likewise.
1527 (avx2_permv2ti): Likewise.
1528 (*avx_vperm2f128<mode>_nozero): Likewise.
1529 (*avx2_eq<mode>3): Likewise.
1530 (*sse4_1_eqv2di3): Likewise.
1531 (sse4_2_gtv2di3): Likewise.
1532 (avx2_gt<mode>3): Likewise.
1534 2023-10-07 Kong Lingling <lingling.kong@intel.com>
1535 Hongyu Wang <hongyu.wang@intel.com>
1536 Hongtao Liu <hongtao.liu@intel.com>
1538 * config/i386/i386.md (<xsave>): Set attr gpr32 0 and constraint
1540 (<xsave>_rex64): Likewise.
1541 (<xrstor>_rex64): Likewise.
1542 (<xrstor>64): Likewise.
1543 (fxsave64): Likewise.
1544 (fxstore64): Likewise.
1546 2023-10-07 Hongyu Wang <hongyu.wang@intel.com>
1547 Kong Lingling <lingling.kong@intel.com>
1548 Hongtao Liu <hongtao.liu@intel.com>
1550 * config/i386/i386.cc (ix86_get_ssemov): Check if egpr is used,
1551 adjust mnemonic for vmovduq/vmovdqa.
1552 * config/i386/sse.md (*<extract_type>_vinsert<shuffletype><extract_suf>_0):
1553 Check if egpr is used, adjust mnemonic for vmovdqu/vmovdqa.
1554 (avx_vec_concat<mode>): Likewise, and separate alternative 0 to
1557 2023-10-07 Kong Lingling <lingling.kong@intel.com>
1558 Hongyu Wang <hongyu.wang@intel.com>
1559 Hongtao Liu <hongtao.liu@intel.com>
1561 * config/i386/i386.cc (map_egpr_constraints): New funciton to
1562 map common constraints to EGPR prohibited constraints.
1563 (ix86_md_asm_adjust): Calls map_egpr_constraints.
1564 * config/i386/i386.opt: Add option mapx-inline-asm-use-gpr32.
1566 2023-10-07 Kong Lingling <lingling.kong@intel.com>
1567 Hongyu Wang <hongyu.wang@intel.com>
1568 Hongtao Liu <hongtao.liu@intel.com>
1570 * config/i386/i386-protos.h (ix86_insn_base_reg_class): New
1572 (ix86_regno_ok_for_insn_base_p): Likewise.
1573 (ix86_insn_index_reg_class): Likewise.
1574 * config/i386/i386.cc (ix86_memory_address_use_extended_reg_class_p):
1575 New helper function to scan the insn.
1576 (ix86_insn_base_reg_class): New function to choose BASE_REG_CLASS.
1577 (ix86_regno_ok_for_insn_base_p): Likewise for base regno.
1578 (ix86_insn_index_reg_class): Likewise for INDEX_REG_CLASS.
1579 * config/i386/i386.h (INSN_BASE_REG_CLASS): Define.
1580 (REGNO_OK_FOR_INSN_BASE_P): Likewise.
1581 (INSN_INDEX_REG_CLASS): Likewise.
1582 (enum reg_class): Add INDEX_GPR16.
1583 (GENERAL_GPR16_REGNO_P): Define.
1584 * config/i386/i386.md (gpr32): New attribute.
1586 2023-10-07 Kong Lingling <lingling.kong@intel.com>
1587 Hongyu Wang <hongyu.wang@intel.com>
1588 Hongtao Liu <hongtao.liu@intel.com>
1590 * config/i386/constraints.md (jr): New register constraint
1591 that prohibits EGPR.
1592 (jR): Constraint that force usage of EGPR.
1593 (jm): New memory constraint that prohibits EGPR.
1594 (ja): Likewise for Bm constraint.
1595 (jb): Likewise for Tv constraint.
1596 (j<): New auto-dec memory constraint that prohibits EGPR.
1597 (j>): Likewise for ">" constraint.
1598 (jo): Likewise for "o" constraint.
1599 (jv): Likewise for "V" constraint.
1600 (jp): Likewise for "p" constraint.
1601 * config/i386/i386.h (enum reg_class): Add new reg class
1604 2023-10-07 Kong Lingling <lingling.kong@intel.com>
1605 Hongyu Wang <hongyu.wang@intel.com>
1606 Hongtao Liu <hongtao.liu@intel.com>
1608 * config/i386/i386-protos.h (x86_extended_rex2reg_mentioned_p):
1609 New function prototype.
1610 * config/i386/i386.cc (regclass_map): Add mapping for 16 new
1612 (debugger64_register_map): Likewise.
1613 (ix86_conditional_register_usage): Clear REX2 register when APX
1615 (ix86_code_end): Add handling for REX2 reg.
1616 (print_reg): Likewise.
1617 (ix86_output_jmp_thunk_or_indirect): Likewise.
1618 (ix86_output_indirect_branch_via_reg): Likewise.
1619 (ix86_attr_length_vex_default): Likewise.
1620 (ix86_emit_save_regs): Adjust to allow saving r31.
1621 (ix86_register_priority): Set REX2 reg priority same as REX.
1622 (x86_extended_reg_mentioned_p): Add check for REX2 regs.
1623 (x86_extended_rex2reg_mentioned_p): New function.
1624 * config/i386/i386.h (CALL_USED_REGISTERS): Add new extended
1626 (REG_ALLOC_ORDER): Likewise.
1627 (FIRST_REX2_INT_REG): Define.
1628 (LAST_REX2_INT_REG): Ditto.
1629 (GENERAL_REGS): Add 16 new registers.
1630 (INT_SSE_REGS): Likewise.
1631 (FLOAT_INT_REGS): Likewise.
1632 (FLOAT_INT_SSE_REGS): Likewise.
1633 (INT_MASK_REGS): Likewise.
1634 (ALL_REGS):Likewise.
1635 (REX2_INT_REG_P): Define.
1636 (REX2_INT_REGNO_P): Ditto.
1637 (GENERAL_REGNO_P): Add REX2_INT_REGNO_P.
1638 (REGNO_OK_FOR_INDEX_P): Ditto.
1639 (REG_OK_FOR_INDEX_NONSTRICT_P): Add new extended registers.
1640 * config/i386/i386.md: Add 16 new integer general
1643 2023-10-07 Kong Lingling <lingling.kong@intel.com>
1644 Hongyu Wang <hongyu.wang@intel.com>
1645 Hongtao Liu <hongtao.liu@intel.com>
1647 * common/config/i386/cpuinfo.h (XSTATE_APX_F): New macro.
1648 (XCR_APX_F_ENABLED_MASK): Likewise.
1649 (get_available_features): Detect APX_F under
1650 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_APX_F_SET): New.
1651 (OPTION_MASK_ISA2_APX_F_UNSET): Likewise.
1652 (ix86_handle_option): Handle -mapxf.
1653 * common/config/i386/i386-cpuinfo.h (FEATURE_APX_F): New.
1654 * common/config/i386/i386-isas.h: Add entry for APX_F.
1655 * config/i386/cpuid.h (bit_APX_F): New.
1656 * config/i386/i386.h (bit_APX_F): (TARGET_APX_EGPR,
1657 TARGET_APX_PUSH2POP2, TARGET_APX_NDD): New define.
1658 * config/i386/i386-opts.h (enum apx_features): New enum.
1659 * config/i386/i386-isa.def (APX_F): New DEF_PTA.
1660 * config/i386/i386-options.cc (ix86_function_specific_save):
1661 Save ix86_apx_features.
1662 (ix86_function_specific_restore): Restore it.
1663 (ix86_valid_target_attribute_inner_p): Add mapxf.
1664 (ix86_option_override_internal): Set ix86_apx_features for PTA
1665 and TARGET_APX_F. Also reports error when APX_F is set but not
1666 having TARGET_64BIT.
1667 * config/i386/i386.opt: (-mapxf): New ISA flag option.
1668 (-mapx=): New enumeration option.
1669 (apx_features): New enum type.
1670 (apx_none): New enum value.
1671 (apx_egpr): Likewise.
1672 (apx_push2pop2): Likewise.
1673 (apx_ndd): Likewise.
1674 (apx_all): Likewise.
1675 * doc/invoke.texi: Document mapxf.
1677 2023-10-07 Hongyu Wang <hongyu.wang@intel.com>
1678 Kong Lingling <lingling.kong@intel.com>
1679 Hongtao Liu <hongtao.liu@intel.com>
1681 * addresses.h (index_reg_class): New wrapper function like
1683 * doc/tm.texi: Document INSN_INDEX_REG_CLASS.
1684 * doc/tm.texi.in: Ditto.
1685 * lra-constraints.cc (index_part_to_reg): Pass index_class.
1686 (process_address_1): Calls index_reg_class with curr_insn and
1687 replace INDEX_REG_CLASS with its return value index_cl.
1688 * reload.cc (find_reloads_address): Likewise.
1689 (find_reloads_address_1): Likewise.
1691 2023-10-07 Kong Lingling <lingling.kong@intel.com>
1692 Hongyu Wang <hongyu.wang@intel.com>
1693 Hongtao Liu <hongtao.liu@intel.com>
1695 * addresses.h (base_reg_class): Add insn argument and new macro
1696 INSN_BASE_REG_CLASS.
1697 (regno_ok_for_base_p_1): Add insn argument and new macro
1698 REGNO_OK_FOR_INSN_BASE_P.
1699 (regno_ok_for_base_p): Add insn argument and parse to ok_for_base_p_1.
1700 * doc/tm.texi: Document INSN_BASE_REG_CLASS and
1701 REGNO_OK_FOR_INSN_BASE_P.
1702 * doc/tm.texi.in: Ditto.
1703 * lra-constraints.cc (process_address_1): Pass insn to
1705 (curr_insn_transform): Ditto.
1706 * reload.cc (find_reloads): Ditto.
1707 (find_reloads_address): Ditto.
1708 (find_reloads_address_1): Ditto.
1709 (find_reloads_subreg_address): Ditto.
1710 * reload1.cc (maybe_fix_stack_asms): Ditto.
1712 2023-10-07 Jiufu Guo <guojiufu@linux.ibm.com>
1715 * config/rs6000/rs6000.md (movsf_from_si): Update to generate mtvsrws
1718 2023-10-07 Jiufu Guo <guojiufu@linux.ibm.com>
1721 * config/rs6000/predicates.md (lowpart_subreg_operator): New
1723 * config/rs6000/rs6000.md (any_rshift): New code_iterator.
1724 (movsf_from_si2): Rename to ...
1725 (movsf_from_si2_<code>): ... this.
1727 2023-10-07 Pan Li <pan2.li@intel.com>
1730 * config/riscv/riscv.cc (riscv_legitimize_address): Ensure
1731 object is a REG before extracting its' REGNO.
1733 2023-10-06 Roger Sayle <roger@nextmovesoftware.com>
1735 * config/i386/i386-expand.cc (ix86_split_ashl): Split shifts by
1736 one into add3_cc_overflow_1 followed by add3_carry.
1737 * config/i386/i386.md (@add<mode>3_cc_overflow_1): Renamed from
1738 "*add<mode>3_cc_overflow_1" to provide generator function.
1740 2023-10-06 Roger Sayle <roger@nextmovesoftware.com>
1741 Uros Bizjak <ubizjak@gmail.com>
1743 * config/i386/i386.cc (ix86_avoid_lea_for_addr): Split LEAs used
1744 to perform left shifts into shorter instructions with -Oz.
1746 2023-10-06 Vineet Gupta <vineetg@rivosinc.com>
1748 * config/riscv/riscv.md (mvconst_internal): Add !ira_in_progress.
1750 2023-10-06 Sandra Loosemore <sandra@codesourcery.com>
1752 * doc/extend.texi (Function Attributes): Mention standard attribute
1754 (Variable Attributes): Likewise.
1755 (Type Attributes): Likewise.
1756 (Attribute Syntax): Likewise.
1758 2023-10-06 Andrew Stubbs <ams@codesourcery.com>
1760 * config/gcn/gcn-valu.md (*mov<mode>): Convert to compact syntax.
1761 (mov<mode>_exec): Likewise.
1762 (mov<mode>_sgprbase): Likewise.
1763 * config/gcn/gcn.md (*mov<mode>_insn): Likewise.
1764 (*movti_insn): Likewise.
1766 2023-10-06 Andrew Stubbs <ams@codesourcery.com>
1768 * config/gcn/gcn.cc (print_operand): Adjust xcode type to fix warning.
1770 2023-10-06 Andrew Pinski <pinskia@gmail.com>
1772 PR middle-end/111699
1773 * match.pd ((c ? a : b) op d, (c ? a : b) op (c ? d : e),
1774 (v ? w : 0) ? a : b, c1 ? c2 ? a : b : b): Enable only for GIMPLE.
1776 2023-10-06 Jakub Jelinek <jakub@redhat.com>
1778 * ipa-prop.h (ipa_bits): Remove.
1779 (struct ipa_jump_func): Remove bits member.
1780 (struct ipcp_transformation): Remove bits member, adjust
1782 (ipa_get_ipa_bits_for_value): Remove.
1783 * ipa-prop.cc (struct ipa_bit_ggc_hash_traits): Remove.
1784 (ipa_bits_hash_table): Remove.
1785 (ipa_print_node_jump_functions_for_edge): Don't print bits.
1786 (ipa_get_ipa_bits_for_value): Remove.
1787 (ipa_set_jfunc_bits): Remove.
1788 (ipa_compute_jump_functions_for_edge): For pointers query
1789 pointer alignment before ipa_set_jfunc_vr and update_bitmask
1790 in there. For integral types, just rely on bitmask already
1791 being handled in value ranges.
1792 (ipa_check_create_edge_args): Don't create ipa_bits_hash_table.
1793 (ipcp_transformation_initialize): Neither here.
1794 (ipcp_transformation_t::duplicate): Don't copy bits vector.
1795 (ipa_write_jump_function): Don't stream bits here.
1796 (ipa_read_jump_function): Neither here.
1797 (useful_ipcp_transformation_info_p): Don't test bits vec.
1798 (write_ipcp_transformation_info): Don't stream bits here.
1799 (read_ipcp_transformation_info): Neither here.
1800 (ipcp_get_parm_bits): Get mask and value from m_vr rather
1802 (ipcp_update_bits): Remove.
1803 (ipcp_update_vr): For pointers, set_ptr_info_alignment from
1804 bitmask stored in value range.
1805 (ipcp_transform_function): Don't test bits vector, don't call
1807 * ipa-cp.cc (propagate_bits_across_jump_function): Don't use
1808 jfunc->bits, instead get mask and value from jfunc->m_vr.
1809 (ipcp_store_bits_results): Remove.
1810 (ipcp_store_vr_results): Incorporate parts of
1811 ipcp_store_bits_results here, merge the bitmasks with value
1812 range if both are supplied.
1813 (ipcp_driver): Don't call ipcp_store_bits_results.
1814 * ipa-sra.cc (zap_useless_ipcp_results): Remove *ts->bits
1817 2023-10-06 Pan Li <pan2.li@intel.com>
1819 * config/riscv/autovec.md: Update comments.
1821 2023-10-05 John David Anglin <danglin@gcc.gnu.org>
1823 * config/pa/pa32-linux.h (MALLOC_ABI_ALIGNMENT): Delete.
1825 2023-10-05 Andrew MacLeod <amacleod@redhat.com>
1827 * timevar.def (TV_TREE_FAST_VRP): New.
1828 * tree-pass.h (make_pass_fast_vrp): New prototype.
1829 * tree-vrp.cc (class fvrp_folder): New.
1830 (fvrp_folder::fvrp_folder): New.
1831 (fvrp_folder::~fvrp_folder): New.
1832 (fvrp_folder::value_of_expr): New.
1833 (fvrp_folder::value_on_edge): New.
1834 (fvrp_folder::value_of_stmt): New.
1835 (fvrp_folder::pre_fold_bb): New.
1836 (fvrp_folder::post_fold_bb): New.
1837 (fvrp_folder::pre_fold_stmt): New.
1838 (fvrp_folder::fold_stmt): New.
1839 (execute_fast_vrp): New.
1840 (pass_data_fast_vrp): New.
1841 (pass_vrp:execute): Check for fast VRP pass.
1842 (make_pass_fast_vrp): New.
1844 2023-10-05 Andrew MacLeod <amacleod@redhat.com>
1846 * gimple-range.cc (dom_ranger::dom_ranger): New.
1847 (dom_ranger::~dom_ranger): New.
1848 (dom_ranger::range_of_expr): New.
1849 (dom_ranger::edge_range): New.
1850 (dom_ranger::range_on_edge): New.
1851 (dom_ranger::range_in_bb): New.
1852 (dom_ranger::range_of_stmt): New.
1853 (dom_ranger::maybe_push_edge): New.
1854 (dom_ranger::pre_bb): New.
1855 (dom_ranger::post_bb): New.
1856 * gimple-range.h (class dom_ranger): New.
1858 2023-10-05 Andrew MacLeod <amacleod@redhat.com>
1860 * gimple-range-gori.cc (gori_stmt_info::gori_stmt_info): New.
1861 (gori_calc_operands): New.
1862 (gori_on_edge): New.
1863 (gori_name_helper): New.
1864 (gori_name_on_edge): New.
1865 * gimple-range-gori.h (gori_on_edge): New prototype.
1866 (gori_name_on_edge): New prototype.
1868 2023-10-05 Sergei Trofimovich <siarheit@google.com>
1871 PR gcov-profile/111559
1872 * ipa-utils.cc (ipa_merge_profiles): Avoid producing
1873 uninitialized probabilities when merging counters with zero
1876 2023-10-05 Uros Bizjak <ubizjak@gmail.com>
1879 * config/i386/i386-expand.cc (alg_usable_p): Reject libcall
1880 strategy for non-default address spaces.
1881 (decide_alg): Use loop strategy as a fallback strategy for
1882 non-default address spaces.
1884 2023-10-05 Jakub Jelinek <jakub@redhat.com>
1886 * sreal.cc (verify_aritmetics): Rename to ...
1887 (verify_arithmetics): ... this.
1888 (sreal_verify_arithmetics): Adjust caller.
1890 2023-10-05 Martin Jambor <mjambor@suse.cz>
1893 2023-10-03 Martin Jambor <mjambor@suse.cz>
1896 * cgraph.h (cgraph_edge): Add a parameter to
1897 redirect_call_stmt_to_callee.
1898 * ipa-param-manipulation.h (ipa_param_adjustments): Add a
1899 parameter to modify_call.
1900 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee): New
1901 parameter killed_ssas, pass it to padjs->modify_call.
1902 * ipa-param-manipulation.cc (purge_transitive_uses): New function.
1903 (ipa_param_adjustments::modify_call): New parameter killed_ssas.
1904 Instead of substituting uses, invoke purge_transitive_uses. If
1905 hash of killed SSAs has not been provided, create a temporary one
1906 and release SSAs that have been added to it.
1907 * tree-inline.cc (redirect_all_calls): Create
1908 id->killed_new_ssa_names earlier, pass it to edge redirection,
1910 (copy_body): Release SSAs in id->killed_new_ssa_names.
1912 2023-10-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1914 * config/riscv/autovec.md (@vec_series<mode>): Remove @.
1915 (vec_series<mode>): Ditto.
1916 * config/riscv/riscv-v.cc (expand_const_vector): Ditto.
1917 (shuffle_decompress_patterns): Ditto.
1919 2023-10-05 Claudiu Zissulescu <claziss@gmail.com>
1921 * config/arc/arc-passes.def: Remove arc_ifcvt pass.
1922 * config/arc/arc-protos.h (arc_ccfsm_branch_deleted_p): Remove.
1923 (arc_ccfsm_record_branch_deleted): Likewise.
1924 (arc_ccfsm_cond_exec_p): Likewise.
1925 (arc_ccfsm): Likewise.
1926 (arc_ccfsm_record_condition): Likewise.
1927 (make_pass_arc_ifcvt): Likewise.
1928 * config/arc/arc.cc (arc_ccfsm): Remove.
1929 (arc_ccfsm_current): Likewise.
1930 (ARC_CCFSM_BRANCH_DELETED_P): Likewise.
1931 (ARC_CCFSM_RECORD_BRANCH_DELETED): Likewise.
1932 (ARC_CCFSM_COND_EXEC_P): Likewise.
1933 (CCFSM_ISCOMPACT): Likewise.
1934 (CCFSM_DBR_ISCOMPACT): Likewise.
1935 (machine_function): Remove ccfsm related fields.
1936 (arc_ifcvt): Remove pass.
1937 (arc_print_operand): Remove `#` punct operand and other ccfsm
1939 (arc_ccfsm_advance): Remove.
1940 (arc_ccfsm_at_label): Likewise.
1941 (arc_ccfsm_record_condition): Likewise.
1942 (arc_ccfsm_post_advance): Likewise.
1943 (arc_ccfsm_branch_deleted_p): Likewise.
1944 (arc_ccfsm_record_branch_deleted): Likewise.
1945 (arc_ccfsm_cond_exec_p): Likewise.
1946 (arc_get_ccfsm_cond): Likewise.
1947 (arc_final_prescan_insn): Remove ccfsm references.
1948 (arc_internal_label): Likewise.
1949 (arc_reorg): Likewise.
1950 (arc_output_libcall): Likewise.
1951 * config/arc/arc.md: Remove ccfsm references and update related
1952 instruction patterns.
1954 2023-10-05 Claudiu Zissulescu <claziss@gmail.com>
1956 * config/arc/arc.cc (arc_init): Remove '^' punct char.
1957 (arc_print_operand): Remove related code.
1958 * config/arc/arc.md: Update patterns which uses '%&'.
1960 2023-10-05 Claudiu Zissulescu <claziss@gmail.com>
1962 * config/arc/arc-protos.h (arc_clear_unalign): Remove.
1963 (arc_toggle_unalign): Likewise.
1964 * config/arc/arc.cc (machine_function) Remove unalign.
1965 (arc_init): Remove `&` punct character.
1966 (arc_print_operand): Remove `&` related functions.
1967 (arc_verify_short): Update function's number of parameters.
1968 (output_short_suffix): Update function.
1969 (arc_short_long): Likewise.
1970 (arc_clear_unalign): Remove.
1971 (arc_toggle_unalign): Likewise.
1972 * config/arc/arc.h (ASM_OUTPUT_CASE_END): Remove.
1973 (ASM_OUTPUT_ALIGN): Update.
1974 * config/arc/arc.md: Remove all `%&` references.
1975 * config/arc/arc.opt (mannotate-align): Ignore option.
1976 * doc/invoke.texi (mannotate-align): Update description.
1978 2023-10-05 Richard Biener <rguenther@suse.de>
1980 * tree-vect-slp.cc (vect_build_slp_tree_1): Do not
1981 ask for internal_fn_p (CFN_LAST).
1983 2023-10-05 Richard Biener <rguenther@suse.de>
1985 * tree-ssa-sccvn.cc (rpo_elim::eliminate_avail): Not
1986 visited value numbers are available itself.
1988 2023-10-05 Richard Biener <rguenther@suse.de>
1991 * doc/extend.texi (attribute flatten): Clarify.
1993 2023-10-04 Roger Sayle <roger@nextmovesoftware.com>
1995 * config/arc/arc-protos.h (emit_shift): Delete prototype.
1996 (arc_pre_reload_split): New function prototype.
1997 * config/arc/arc.cc (emit_shift): Delete function.
1998 (arc_pre_reload_split): New predicate function, copied from i386,
1999 to schedule define_insn_and_split splitters to the split1 pass.
2000 * config/arc/arc.md (ashlsi3): Expand RTL template unconditionally.
2001 (ashrsi3): Likewise.
2002 (lshrsi3): Likewise.
2003 (shift_si3): Move after other shift patterns, and disable when
2004 operands[2] is one (which is handled by its own define_insn).
2005 Use shiftr4_operator, instead of shift4_operator, as this is no
2006 longer used for left shifts.
2007 (shift_si3_loop): Likewise. Additionally remove match_scratch.
2008 (*ashlsi3_nobs): New pre-reload define_insn_and_split.
2009 (*ashrsi3_nobs): Likewise.
2010 (*lshrsi3_nobs): Likewise.
2011 (rotrsi3_cnt1): Rename define_insn from *rotrsi3_cnt1.
2012 (add_shift): Rename define_insn from *add_shift.
2013 * config/arc/predicates.md (shiftl4_operator): Delete.
2014 (shift4_operator): Delete.
2016 2023-10-04 Roger Sayle <roger@nextmovesoftware.com>
2018 * config/arc/arc.md (ashlsi3_cnt1): Rename define_insn *ashlsi2_cnt1.
2019 Change type attribute to "unary", as this doesn't have operands[2].
2020 Change length attribute to "*,4" to allow compact representation.
2021 (lshrsi3_cnt1): Rename define_insn from *lshrsi3_cnt1. Change
2022 insn type attribute to "unary", as this doesn't have operands[2].
2023 (ashrsi3_cnt1): Rename define_insn from *ashrsi3_cnt1. Change
2024 insn type attribute to "unary", as this doesn't have operands[2].
2026 2023-10-04 Roger Sayle <roger@nextmovesoftware.com>
2028 PR rtl-optimization/110701
2029 * combine.cc (record_dead_and_set_regs_1): Split comment into
2030 pieces placed before the relevant clauses. When the SET_DEST
2031 is a partial_subreg_p, mark the bits outside of the updated
2032 portion of the destination as undefined.
2034 2023-10-04 Kito Cheng <kito.cheng@sifive.com>
2037 * opt-read.awk: Drop multidimensional arrays.
2038 * opth-gen.awk: Ditto.
2040 2023-10-04 Xi Ruoyao <xry111@xry111.site>
2042 * config/loongarch/loongarch.md (UNSPEC_FCOPYSIGN): Delete.
2043 (copysign<mode>3): Use copysign RTL instead of UNSPEC.
2045 2023-10-04 Jakub Jelinek <jakub@redhat.com>
2047 PR middle-end/111369
2048 * match.pd (x == cstN ? cst4 : cst3): Use
2049 build_nonstandard_integer_type only if type1 is BOOLEAN_TYPE.
2050 Fix comment typo. Formatting fix.
2051 (a?~t:t -> (-(a))^t): Always convert to type rather
2052 than using build_nonstandard_integer_type. Perform negation
2053 only if type has precision > 1 and is not signed BOOLEAN_TYPE.
2055 2023-10-04 Jakub Jelinek <jakub@redhat.com>
2057 PR tree-optimization/111668
2058 * match.pd (a ? CST1 : CST2): Handle the a ? -1 : 0 and
2059 a ? 0 : -1 cases before the powerof2cst cases and differentiate
2060 between 1-bit precision types, larger precision boolean types
2061 and other integral types. Fix comment pastos and formatting.
2063 2023-10-03 Andrew MacLeod <amacleod@redhat.com>
2065 * tree-ssanames.cc (set_range_info): Use get_ptr_info for
2066 pointers rather than range_info_get_range.
2068 2023-10-03 Martin Jambor <mjambor@suse.cz>
2070 * ipa-modref.h (modref_summary::dump): Make const.
2071 * ipa-modref.cc (modref_summary::dump): Likewise.
2072 (dump_lto_records): Dump to out instead of dump_file.
2074 2023-10-03 Martin Jambor <mjambor@suse.cz>
2077 * ipa-param-manipulation.cc
2078 (ipa_param_body_adjustments::mark_dead_statements): Verify that any
2079 return uses of PARAM will be removed.
2080 (ipa_param_body_adjustments::mark_clobbers_dead): Likewise.
2081 * ipa-sra.cc (isra_param_desc): New fields
2082 remove_only_when_retval_removed and split_only_when_retval_removed.
2083 (struct gensum_param_desc): Likewise. Fix comment long line.
2084 (ipa_sra_function_summaries::duplicate): Copy the new flags.
2085 (dump_gensum_param_descriptor): Dump the new flags.
2086 (dump_isra_param_descriptor): Likewise.
2087 (isra_track_scalar_value_uses): New parameter desc. Set its flag
2088 remove_only_when_retval_removed when encountering a simple return.
2089 (isra_track_scalar_param_local_uses): Replace parameter call_uses_p
2090 with desc. Pass it to isra_track_scalar_value_uses and set its
2092 (ptr_parm_has_nonarg_uses): Accept parameter descriptor as a
2093 parameter. If there is a direct return use, mark any..
2094 (create_parameter_descriptors): Pass the whole parameter descriptor to
2095 isra_track_scalar_param_local_uses and ptr_parm_has_nonarg_uses.
2096 (process_scan_results): Copy the new flags.
2097 (isra_write_node_summary): Stream the new flags.
2098 (isra_read_node_info): Likewise.
2099 (adjust_parameter_descriptions): Check that transformations
2100 requring return removal only happen when return value is removed.
2101 Restructure main loop. Adjust dump message.
2103 2023-10-03 Martin Jambor <mjambor@suse.cz>
2106 * cgraph.h (cgraph_edge): Add a parameter to
2107 redirect_call_stmt_to_callee.
2108 * ipa-param-manipulation.h (ipa_param_adjustments): Add a
2109 parameter to modify_call.
2110 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee): New
2111 parameter killed_ssas, pass it to padjs->modify_call.
2112 * ipa-param-manipulation.cc (purge_transitive_uses): New function.
2113 (ipa_param_adjustments::modify_call): New parameter killed_ssas.
2114 Instead of substituting uses, invoke purge_transitive_uses. If
2115 hash of killed SSAs has not been provided, create a temporary one
2116 and release SSAs that have been added to it.
2117 * tree-inline.cc (redirect_all_calls): Create
2118 id->killed_new_ssa_names earlier, pass it to edge redirection,
2120 (copy_body): Release SSAs in id->killed_new_ssa_names.
2122 2023-10-03 Andrew MacLeod <amacleod@redhat.com>
2124 * passes.def (pass_vrp): Pass "final pass" flag as parameter.
2125 * tree-vrp.cc (vrp_pass_num): Remove.
2126 (pass_vrp::my_pass): Remove.
2127 (pass_vrp::pass_vrp): Add warn_p as a parameter.
2128 (pass_vrp::final_p): New.
2129 (pass_vrp::set_pass_param): Set final_p param.
2130 (pass_vrp::execute): Call execute_range_vrp with no conditions.
2131 (make_pass_vrp): Pass additional parameter.
2132 (make_pass_early_vrp): Ditto.
2134 2023-10-03 Andrew MacLeod <amacleod@redhat.com>
2136 * tree-ssanames.cc (set_range_info): Return true only if the
2137 current value changes.
2139 2023-10-03 David Malcolm <dmalcolm@redhat.com>
2141 * diagnostic.cc (diagnostic_set_info_translated): Update for "m_"
2142 prefixes to text_info fields.
2143 (diagnostic_report_diagnostic): Likewise.
2144 (verbatim): Use text_info ctor.
2145 (simple_diagnostic_path::add_event): Likewise.
2146 (simple_diagnostic_path::add_thread_event): Likewise.
2147 * dumpfile.cc (dump_pretty_printer::decode_format): Update for
2148 "m_" prefixes to text_info fields.
2149 (dump_context::dump_printf_va): Use text_info ctor.
2150 * graphviz.cc (graphviz_out::graphviz_out): Use text_info ctor.
2151 (graphviz_out::print): Likewise.
2152 * opt-problem.cc (opt_problem::opt_problem): Likewise.
2153 * pretty-print.cc (pp_format): Update for "m_" prefixes to
2155 (pp_printf): Use text_info ctor.
2156 (pp_verbatim): Likewise.
2157 (assert_pp_format_va): Likewise.
2158 * pretty-print.h (struct text_info): Add ctors. Add "m_" prefix
2160 * text-art/styled-string.cc (styled_string::from_fmt_va): Use
2162 * tree-diagnostic.cc (default_tree_printer): Update for "m_"
2163 prefixes to text_info fields.
2164 * tree-pretty-print.h (pp_ti_abstract_origin): Likewise.
2166 2023-10-03 Roger Sayle <roger@nextmovesoftware.com>
2168 * config/arc/arc.md (CC_ltu): New mode iterator for CC and CC_C.
2169 (scc_ltu_<mode>): New define_insn to handle LTU form of scc_insn.
2170 (*scc_insn): Don't split to a conditional move sequence for LTU.
2172 2023-10-03 Andrea Corallo <andrea.corallo@arm.com>
2174 * config/aarch64/aarch64.md (@ccmp<CC_ONLY:mode><GPI:mode>)
2175 (@ccmp<CC_ONLY:mode><GPI:mode>_rev, *call_insn, *call_value_insn)
2176 (*mov<mode>_aarch64, load_pair_sw_<SX:mode><SX2:mode>)
2177 (load_pair_dw_<DX:mode><DX2:mode>)
2178 (store_pair_sw_<SX:mode><SX2:mode>)
2179 (store_pair_dw_<DX:mode><DX2:mode>, *extendsidi2_aarch64)
2180 (*zero_extendsidi2_aarch64, *load_pair_zero_extendsidi2_aarch64)
2181 (*extend<SHORT:mode><GPI:mode>2_aarch64)
2182 (*zero_extend<SHORT:mode><GPI:mode>2_aarch64)
2183 (*extendqihi2_aarch64, *zero_extendqihi2_aarch64)
2184 (*add<mode>3_aarch64, *addsi3_aarch64_uxtw, *add<mode>3_poly_1)
2185 (add<mode>3_compare0, *addsi3_compare0_uxtw)
2186 (*add<mode>3_compareC_cconly, add<mode>3_compareC)
2187 (*add<mode>3_compareV_cconly_imm, add<mode>3_compareV_imm)
2188 (*add<mode>3nr_compare0, subdi3, subv<GPI:mode>_imm)
2189 (*cmpv<GPI:mode>_insn, sub<mode>3_compare1_imm, neg<mode>2)
2190 (cmp<mode>, fcmp<mode>, fcmpe<mode>, *cmov<mode>_insn)
2191 (*cmovsi_insn_uxtw, <optab><mode>3, *<optab>si3_uxtw)
2192 (*and<mode>3_compare0, *andsi3_compare0_uxtw, one_cmpl<mode>2)
2193 (*<NLOGICAL:optab>_one_cmpl<mode>3, *and<mode>3nr_compare0)
2194 (*aarch64_ashl_sisd_or_int_<mode>3)
2195 (*aarch64_lshr_sisd_or_int_<mode>3)
2196 (*aarch64_ashr_sisd_or_int_<mode>3, *ror<mode>3_insn)
2197 (*<optab>si3_insn_uxtw, <optab>_trunc<fcvt_target><GPI:mode>2)
2198 (<optab><fcvt_target><GPF:mode>2)
2199 (<FCVT_F2FIXED:fcvt_fixed_insn><GPF:mode>3)
2200 (<FCVT_FIXED2F:fcvt_fixed_insn><GPI:mode>3)
2201 (*aarch64_<optab><mode>3_cssc, copysign<GPF:mode>3_insn): Update
2203 * config/aarch64/aarch64-sve2.md (@aarch64_scatter_stnt<mode>)
2204 (@aarch64_scatter_stnt_<SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
2205 (*aarch64_mul_unpredicated_<mode>)
2206 (@aarch64_pred_<sve_int_op><mode>, *cond_<sve_int_op><mode>_2)
2207 (*cond_<sve_int_op><mode>_3, *cond_<sve_int_op><mode>_any)
2208 (*cond_<sve_int_op><mode>_z, @aarch64_pred_<sve_int_op><mode>)
2209 (*cond_<sve_int_op><mode>_2, *cond_<sve_int_op><mode>_3)
2210 (*cond_<sve_int_op><mode>_any, @aarch64_sve_<sve_int_op><mode>)
2211 (@aarch64_sve_<sve_int_op>_lane_<mode>)
2212 (@aarch64_sve_add_mul_lane_<mode>)
2213 (@aarch64_sve_sub_mul_lane_<mode>, @aarch64_sve2_xar<mode>)
2214 (*aarch64_sve2_bcax<mode>, @aarch64_sve2_eor3<mode>)
2215 (*aarch64_sve2_nor<mode>, *aarch64_sve2_nand<mode>)
2216 (*aarch64_sve2_bsl<mode>, *aarch64_sve2_nbsl<mode>)
2217 (*aarch64_sve2_bsl1n<mode>, *aarch64_sve2_bsl2n<mode>)
2218 (*aarch64_sve2_sra<mode>, @aarch64_sve_add_<sve_int_op><mode>)
2219 (*aarch64_sve2_<su>aba<mode>, @aarch64_sve_add_<sve_int_op><mode>)
2220 (@aarch64_sve_add_<sve_int_op>_lane_<mode>)
2221 (@aarch64_sve_qadd_<sve_int_op><mode>)
2222 (@aarch64_sve_qadd_<sve_int_op>_lane_<mode>)
2223 (@aarch64_sve_sub_<sve_int_op><mode>)
2224 (@aarch64_sve_sub_<sve_int_op>_lane_<mode>)
2225 (@aarch64_sve_qsub_<sve_int_op><mode>)
2226 (@aarch64_sve_qsub_<sve_int_op>_lane_<mode>)
2227 (@aarch64_sve_<sve_fp_op><mode>, @aarch64_<sve_fp_op>_lane_<mode>)
2228 (@aarch64_pred_<sve_int_op><mode>)
2229 (@aarch64_pred_<sve_fp_op><mode>, *cond_<sve_int_op><mode>_2)
2230 (*cond_<sve_int_op><mode>_z, @aarch64_sve_<optab><mode>)
2231 (@aarch64_<optab>_lane_<mode>, @aarch64_sve_<optab><mode>)
2232 (@aarch64_<optab>_lane_<mode>, @aarch64_pred_<sve_fp_op><mode>)
2233 (*cond_<sve_fp_op><mode>_any_relaxed)
2234 (*cond_<sve_fp_op><mode>_any_strict)
2235 (@aarch64_pred_<sve_int_op><mode>, *cond_<sve_int_op><mode>)
2236 (@aarch64_pred_<sve_fp_op><mode>, *cond_<sve_fp_op><mode>)
2237 (*cond_<sve_fp_op><mode>_strict): Update to new syntax.
2238 * config/aarch64/aarch64-sve.md (*aarch64_sve_mov<mode>_ldr_str)
2239 (*aarch64_sve_mov<mode>_no_ldr_str, @aarch64_pred_mov<mode>)
2240 (*aarch64_sve_mov<mode>, aarch64_wrffr)
2241 (mask_scatter_store<mode><v_int_container>)
2242 (*mask_scatter_store<mode><v_int_container>_<su>xtw_unpacked)
2243 (*mask_scatter_store<mode><v_int_container>_sxtw)
2244 (*mask_scatter_store<mode><v_int_container>_uxtw)
2245 (@aarch64_scatter_store_trunc<VNx4_NARROW:mode><VNx4_WIDE:mode>)
2246 (@aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>)
2247 (*aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>_sxtw)
2248 (*aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>_uxtw)
2249 (*vec_duplicate<mode>_reg, vec_shl_insert_<mode>)
2250 (vec_series<mode>, @extract_<last_op>_<mode>)
2251 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2)
2252 (*cond_<optab><mode>_any, @aarch64_pred_<optab><mode>)
2253 (@aarch64_sve_revbhw_<SVE_ALL:mode><PRED_HSD:mode>)
2254 (@cond_<optab><mode>)
2255 (*<optab><SVE_PARTIAL_I:mode><SVE_HSDI:mode>2)
2256 (@aarch64_pred_sxt<SVE_FULL_HSDI:mode><SVE_PARTIAL_I:mode>)
2257 (@aarch64_cond_sxt<SVE_FULL_HSDI:mode><SVE_PARTIAL_I:mode>)
2258 (*cond_uxt<mode>_2, *cond_uxt<mode>_any, *cnot<mode>)
2259 (*cond_cnot<mode>_2, *cond_cnot<mode>_any)
2260 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2_relaxed)
2261 (*cond_<optab><mode>_2_strict, *cond_<optab><mode>_any_relaxed)
2262 (*cond_<optab><mode>_any_strict, @aarch64_pred_<optab><mode>)
2263 (*cond_<optab><mode>_2, *cond_<optab><mode>_3)
2264 (*cond_<optab><mode>_any, add<mode>3, sub<mode>3)
2265 (@aarch64_pred_<su>abd<mode>, *aarch64_cond_<su>abd<mode>_2)
2266 (*aarch64_cond_<su>abd<mode>_3, *aarch64_cond_<su>abd<mode>_any)
2267 (@aarch64_sve_<optab><mode>, @aarch64_pred_<optab><mode>)
2268 (*cond_<optab><mode>_2, *cond_<optab><mode>_z)
2269 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2)
2270 (*cond_<optab><mode>_3, *cond_<optab><mode>_any, <optab><mode>3)
2271 (*cond_bic<mode>_2, *cond_bic<mode>_any)
2272 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2_const)
2273 (*cond_<optab><mode>_any_const, *cond_<sve_int_op><mode>_m)
2274 (*cond_<sve_int_op><mode>_z, *sdiv_pow2<mode>3)
2275 (*cond_<sve_int_op><mode>_2, *cond_<sve_int_op><mode>_any)
2276 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2_relaxed)
2277 (*cond_<optab><mode>_2_strict, *cond_<optab><mode>_any_relaxed)
2278 (*cond_<optab><mode>_any_strict, @aarch64_pred_<optab><mode>)
2279 (*cond_<optab><mode>_2_relaxed, *cond_<optab><mode>_2_strict)
2280 (*cond_<optab><mode>_2_const_relaxed)
2281 (*cond_<optab><mode>_2_const_strict)
2282 (*cond_<optab><mode>_3_relaxed, *cond_<optab><mode>_3_strict)
2283 (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
2284 (*cond_<optab><mode>_any_const_relaxed)
2285 (*cond_<optab><mode>_any_const_strict)
2286 (@aarch64_pred_<optab><mode>, *cond_add<mode>_2_const_relaxed)
2287 (*cond_add<mode>_2_const_strict)
2288 (*cond_add<mode>_any_const_relaxed)
2289 (*cond_add<mode>_any_const_strict, @aarch64_pred_<optab><mode>)
2290 (*cond_<optab><mode>_2_relaxed, *cond_<optab><mode>_2_strict)
2291 (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
2292 (@aarch64_pred_<optab><mode>, *cond_sub<mode>_3_const_relaxed)
2293 (*cond_sub<mode>_3_const_strict, *cond_sub<mode>_const_relaxed)
2294 (*cond_sub<mode>_const_strict, *aarch64_pred_abd<mode>_relaxed)
2295 (*aarch64_pred_abd<mode>_strict)
2296 (*aarch64_cond_abd<mode>_2_relaxed)
2297 (*aarch64_cond_abd<mode>_2_strict)
2298 (*aarch64_cond_abd<mode>_3_relaxed)
2299 (*aarch64_cond_abd<mode>_3_strict)
2300 (*aarch64_cond_abd<mode>_any_relaxed)
2301 (*aarch64_cond_abd<mode>_any_strict, @aarch64_pred_<optab><mode>)
2302 (@aarch64_pred_fma<mode>, *cond_fma<mode>_2, *cond_fma<mode>_4)
2303 (*cond_fma<mode>_any, @aarch64_pred_fnma<mode>)
2304 (*cond_fnma<mode>_2, *cond_fnma<mode>_4, *cond_fnma<mode>_any)
2305 (<sur>dot_prod<vsi2qi>, @aarch64_<sur>dot_prod_lane<vsi2qi>)
2306 (@<sur>dot_prod<vsi2qi>, @aarch64_<sur>dot_prod_lane<vsi2qi>)
2307 (@aarch64_sve_add_<optab><vsi2qi>, @aarch64_pred_<optab><mode>)
2308 (*cond_<optab><mode>_2_relaxed, *cond_<optab><mode>_2_strict)
2309 (*cond_<optab><mode>_4_relaxed, *cond_<optab><mode>_4_strict)
2310 (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
2311 (@aarch64_<optab>_lane_<mode>, @aarch64_pred_<optab><mode>)
2312 (*cond_<optab><mode>_4_relaxed, *cond_<optab><mode>_4_strict)
2313 (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
2314 (@aarch64_<optab>_lane_<mode>, @aarch64_sve_tmad<mode>)
2315 (@aarch64_sve_<sve_fp_op>vnx4sf)
2316 (@aarch64_sve_<sve_fp_op>_lanevnx4sf)
2317 (@aarch64_sve_<sve_fp_op><mode>, *vcond_mask_<mode><vpred>)
2318 (@aarch64_sel_dup<mode>, @aarch64_pred_cmp<cmp_op><mode>)
2319 (*cmp<cmp_op><mode>_cc, *cmp<cmp_op><mode>_ptest)
2320 (@aarch64_pred_fcm<cmp_op><mode>, @fold_extract_<last_op>_<mode>)
2321 (@aarch64_fold_extract_vector_<last_op>_<mode>)
2322 (@aarch64_sve_splice<mode>)
2323 (@aarch64_sve_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>)
2324 (@aarch64_sve_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>)
2325 (*cond_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>_relaxed)
2326 (*cond_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>_strict)
2327 (*cond_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>)
2328 (@aarch64_sve_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>)
2329 (@aarch64_sve_<optab>_extend<VNx4SI_ONLY:mode><VNx2DF_ONLY:mode>)
2330 (*cond_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>_relaxed)
2331 (*cond_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>_strict)
2332 (*cond_<optab>_extend<VNx4SI_ONLY:mode><VNx2DF_ONLY:mode>)
2333 (@aarch64_sve_<optab>_trunc<SVE_FULL_SDF:mode><SVE_FULL_HSF:mode>)
2334 (*cond_<optab>_trunc<SVE_FULL_SDF:mode><SVE_FULL_HSF:mode>)
2335 (@aarch64_sve_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
2336 (*cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
2337 (@aarch64_sve_<optab>_nontrunc<SVE_FULL_HSF:mode><SVE_FULL_SDF:mode>)
2338 (*cond_<optab>_nontrunc<SVE_FULL_HSF:mode><SVE_FULL_SDF:mode>)
2339 (@aarch64_brk<brk_op>, *aarch64_sve_<inc_dec><mode>_cntp): Update
2341 * config/aarch64/aarch64-simd.md (aarch64_simd_dup<mode>)
2342 (load_pair<DREG:mode><DREG2:mode>)
2343 (vec_store_pair<DREG:mode><DREG2:mode>, aarch64_simd_stp<mode>)
2344 (aarch64_simd_mov_from_<mode>low)
2345 (aarch64_simd_mov_from_<mode>high, and<mode>3<vczle><vczbe>)
2346 (ior<mode>3<vczle><vczbe>, aarch64_simd_ashr<mode><vczle><vczbe>)
2347 (aarch64_simd_bsl<mode>_internal<vczle><vczbe>)
2348 (*aarch64_simd_bsl<mode>_alt<vczle><vczbe>)
2349 (aarch64_simd_bsldi_internal, aarch64_simd_bsldi_alt)
2350 (store_pair_lanes<mode>, *aarch64_combine_internal<mode>)
2351 (*aarch64_combine_internal_be<mode>, *aarch64_combinez<mode>)
2352 (*aarch64_combinez_be<mode>)
2353 (aarch64_cm<optab><mode><vczle><vczbe>, *aarch64_cm<optab>di)
2354 (aarch64_cm<optab><mode><vczle><vczbe>, *aarch64_mov<mode>)
2355 (*aarch64_be_mov<mode>, *aarch64_be_movoi): Update to new syntax.
2357 2023-10-03 Andrea Corallo <andrea.corallo@arm.com>
2359 * gensupport.cc (convert_syntax): Skip spaces before "cons:"
2360 in new compact pattern syntax.
2362 2023-10-03 Richard Sandiford <richard.sandiford@arm.com>
2364 * gensupport.cc (convert_syntax): Updated to support unordered
2365 constraints in compact syntax.
2367 2023-10-02 Michael Meissner <meissner@linux.ibm.com>
2369 * config/rs6000/rs6000.md (UNSPEC_COPYSIGN): Delete.
2370 (copysign<mode>3_fcpsg): Use copysign RTL instead of UNSPEC.
2371 (copysign<mode>3_hard): Likewise.
2372 (copysign<mode>3_soft): Likewise.
2373 * config/rs6000/vector.md (vector_copysign<mode>3): Use copysign RTL
2375 * config/rs6000/vsx.md (vsx_copysign<mode>3): Use copysign RTL instead
2378 2023-10-02 David Malcolm <dmalcolm@redhat.com>
2380 * diagnostic-format-json.cc (toplevel_array): Remove global in
2381 favor of json_output_format::m_top_level_array.
2382 (cur_group): Likewise, for json_output_format::m_cur_group.
2383 (cur_children_array): Likewise, for
2384 json_output_format::m_cur_children_array.
2385 (class json_output_format): New.
2386 (json_begin_diagnostic): Remove, in favor of
2387 json_output_format::on_begin_diagnostic.
2388 (json_end_diagnostic): Convert to...
2389 (json_output_format::on_end_diagnostic): ...this.
2390 (json_begin_group): Remove, in favor of
2391 json_output_format::on_begin_group.
2392 (json_end_group): Remove, in favor of
2393 json_output_format::on_end_group.
2394 (json_flush_to_file): Remove, in favor of
2395 json_output_format::flush_to_file.
2396 (json_stderr_final_cb): Remove, in favor of json_output_format
2398 (json_output_base_file_name): Remove global.
2399 (class json_stderr_output_format): New.
2400 (json_file_final_cb): Remove.
2401 (class json_file_output_format): New.
2402 (json_emit_diagram): Remove.
2403 (diagnostic_output_format_init_json): Update.
2404 (diagnostic_output_format_init_json_file): Update.
2405 * diagnostic-format-sarif.cc (the_builder): Remove this global,
2406 moving to a field of the sarif_output_format.
2407 (sarif_builder::maybe_make_artifact_content_object): Use the
2408 context's m_file_cache.
2409 (get_source_lines): Convert to...
2410 (sarif_builder::get_source_lines): ...this, using context's
2412 (sarif_begin_diagnostic): Remove, in favor of
2413 sarif_output_format::on_begin_diagnostic.
2414 (sarif_end_diagnostic): Remove, in favor of
2415 sarif_output_format::on_end_diagnostic.
2416 (sarif_begin_group): Remove, in favor of
2417 sarif_output_format::on_begin_group.
2418 (sarif_end_group): Remove, in favor of
2419 sarif_output_format::on_end_group.
2420 (sarif_flush_to_file): Delete.
2421 (sarif_stderr_final_cb): Delete.
2422 (sarif_output_base_file_name): Delete.
2423 (sarif_file_final_cb): Delete.
2424 (class sarif_output_format): New.
2425 (sarif_emit_diagram): Delete.
2426 (class sarif_stream_output_format): New.
2427 (class sarif_file_output_format): New.
2428 (diagnostic_output_format_init_sarif): Update.
2429 (diagnostic_output_format_init_sarif_stderr): Update.
2430 (diagnostic_output_format_init_sarif_file): Update.
2431 (diagnostic_output_format_init_sarif_stream): Update.
2432 * diagnostic-show-locus.cc (diagnostic_show_locus): Update.
2433 * diagnostic.cc (default_diagnostic_final_cb): Delete, moving to
2434 diagnostic_text_output_format's dtor.
2435 (diagnostic_initialize): Update, making a new instance of
2436 diagnostic_text_output_format.
2437 (diagnostic_finish): Delete m_output_format, rather than calling
2439 (diagnostic_report_diagnostic): Assert that m_output_format is
2440 non-NULL. Replace call to begin_group_cb with call to
2441 m_output_format->on_begin_group. Replace call to
2442 diagnostic_starter with call to
2443 m_output_format->on_begin_diagnostic. Replace call to
2444 diagnostic_finalizer with call to
2445 m_output_format->on_end_diagnostic.
2446 (diagnostic_emit_diagram): Replace both optional call to
2447 m_diagrams.m_emission_cb and default implementation with call to
2448 m_output_format->on_diagram. Move default implementation to
2449 diagnostic_text_output_format::on_diagram.
2450 (auto_diagnostic_group::~auto_diagnostic_group): Replace call to
2451 end_group_cb with call to m_output_format->on_end_group.
2452 (diagnostic_text_output_format::~diagnostic_text_output_format):
2453 New, based on default_diagnostic_final_cb.
2454 (diagnostic_text_output_format::on_begin_diagnostic): New, based
2455 on code from diagnostic_report_diagnostic.
2456 (diagnostic_text_output_format::on_end_diagnostic): Likewise.
2457 (diagnostic_text_output_format::on_diagram): New, based on code
2458 from diagnostic_emit_diagram.
2459 * diagnostic.h (class diagnostic_output_format): New.
2460 (class diagnostic_text_output_format): New.
2461 (diagnostic_context::begin_diagnostic): Move to...
2462 (diagnostic_context::m_text_callbacks::begin_diagnostic): ...here.
2463 (diagnostic_context::start_span): Move to...
2464 (diagnostic_context::m_text_callbacks::start_span): ...here.
2465 (diagnostic_context::end_diagnostic): Move to...
2466 (diagnostic_context::m_text_callbacks::end_diagnostic): ...here.
2467 (diagnostic_context::begin_group_cb): Remove, in favor of
2468 m_output_format->on_begin_group.
2469 (diagnostic_context::end_group_cb): Remove, in favor of
2470 m_output_format->on_end_group.
2471 (diagnostic_context::final_cb): Remove, in favor of
2472 m_output_format's dtor.
2473 (diagnostic_context::m_output_format): New field.
2474 (diagnostic_context::m_diagrams.m_emission_cb): Remove, in favor
2475 of m_output_format->on_diagram.
2476 (diagnostic_starter): Update.
2477 (diagnostic_finalizer): Update.
2478 (diagnostic_output_format_init_sarif_stream): New.
2479 * input.cc (location_get_source_line): Move implementation apart from
2480 call to diagnostic_file_cache_init to...
2481 (file_cache::get_source_line): ...this new function...
2482 (location_get_source_line): ...and reintroduce, rewritten in terms of
2483 file_cache::get_source_line.
2484 (get_source_file_content): Likewise, refactor into...
2485 (file_cache::get_source_file_content): ...this new function.
2486 * input.h (file_cache::get_source_line): New decl.
2487 (file_cache::get_source_file_content): New decl.
2488 * selftest-diagnostic.cc
2489 (test_diagnostic_context::test_diagnostic_context): Update.
2490 * tree-diagnostic-path.cc (event_range::print): Update for
2491 change to diagnostic_context's start_span callback.
2493 2023-10-02 David Malcolm <dmalcolm@redhat.com>
2495 * diagnostic-show-locus.cc: Update for reorganization of
2496 source-printing fields of diagnostic_context.
2497 * diagnostic.cc (diagnostic_set_caret_max_width): Likewise.
2498 (diagnostic_initialize): Likewise.
2499 * diagnostic.h (diagnostic_context::show_caret): Move to...
2500 (diagnostic_context::m_source_printing::enabled): ...here.
2501 (diagnostic_context::caret_max_width): Move to...
2502 (diagnostic_context::m_source_printing::max_width): ...here.
2503 (diagnostic_context::caret_chars): Move to...
2504 (diagnostic_context::m_source_printing::caret_chars): ...here.
2505 (diagnostic_context::colorize_source_p): Move to...
2506 (diagnostic_context::m_source_printing::colorize_source_p): ...here.
2507 (diagnostic_context::show_labels_p): Move to...
2508 (diagnostic_context::m_source_printing::show_labels_p): ...here.
2509 (diagnostic_context::show_line_numbers_p): Move to...
2510 (diagnostic_context::m_source_printing::show_line_numbers_p): ...here.
2511 (diagnostic_context::min_margin_width): Move to...
2512 (diagnostic_context::m_source_printing::min_margin_width): ...here.
2513 (diagnostic_context::show_ruler_p): Move to...
2514 (diagnostic_context::m_source_printing::show_ruler_p): ...here.
2515 (diagnostic_same_line): Update for above changes.
2516 * opts.cc (common_handle_option): Update for reorganization of
2517 source-printing fields of diagnostic_context.
2518 * selftest-diagnostic.cc
2519 (test_diagnostic_context::test_diagnostic_context): Likewise.
2520 * toplev.cc (general_init): Likewise.
2521 * tree-diagnostic-path.cc (struct event_range): Likewise.
2523 2023-10-02 David Malcolm <dmalcolm@redhat.com>
2525 * diagnostic.cc (diagnostic_initialize): Initialize
2526 set_locations_cb to nullptr.
2528 2023-10-02 Wilco Dijkstra <wilco.dijkstra@arm.com>
2531 * config/arm/constraints.md: Remove Pf constraint.
2532 * config/arm/sync.md (arm_atomic_load<mode>): Add new pattern.
2533 (arm_atomic_load_acquire<mode>): Likewise.
2534 (arm_atomic_store<mode>): Likewise.
2535 (arm_atomic_store_release<mode>): Likewise.
2536 (atomic_load<mode>): Switch patterns to define_expand.
2537 (atomic_store<mode>): Likewise.
2538 (arm_atomic_loaddi2_ldrd): Remove predication.
2539 (arm_load_exclusive<mode>): Likewise.
2540 (arm_load_acquire_exclusive<mode>): Likewise.
2541 (arm_load_exclusivesi): Likewise.
2542 (arm_load_acquire_exclusivesi): Likewise.
2543 (arm_load_exclusivedi): Likewise.
2544 (arm_load_acquire_exclusivedi): Likewise.
2545 (arm_store_exclusive<mode>): Likewise.
2546 (arm_store_release_exclusivedi): Likewise.
2547 (arm_store_release_exclusive<mode>): Likewise.
2548 * config/arm/unspecs.md: Add VUNSPEC_LDR and VUNSPEC_STR.
2550 2023-10-02 Tamar Christina <tamar.christina@arm.com>
2553 2023-10-02 Tamar Christina <tamar.christina@arm.com>
2555 PR tree-optimization/109154
2556 * tree-if-conv.cc (INCLUDE_ALGORITHM): Remove.
2557 (cmp_arg_entry): New.
2558 (predicate_scalar_phi): Use it.
2560 2023-10-02 Tamar Christina <tamar.christina@arm.com>
2562 * config/aarch64/aarch64-simd.md (xorsign<mode>3): Renamed to..
2563 (@xorsign<mode>3): ...This.
2564 * config/aarch64/aarch64.md (xorsign<mode>3): Renamed to...
2565 (@xorsign<mode>3): ..This and emit vectors directly
2566 * config/aarch64/iterators.md (VCONQ): Add SF and DF.
2568 2023-10-02 Tamar Christina <tamar.christina@arm.com>
2570 * emit-rtl.cc (validate_subreg): Relax subreg rule.
2572 2023-10-02 Tamar Christina <tamar.christina@arm.com>
2574 PR tree-optimization/109154
2575 * tree-if-conv.cc (INCLUDE_ALGORITHM): Remove.
2576 (cmp_arg_entry): New.
2577 (predicate_scalar_phi): Use it.
2579 2023-10-02 Richard Sandiford <richard.sandiford@arm.com>
2582 * rtl-tests.cc (const_poly_int_tests<N>::run): Use a local
2584 * simplify-rtx.cc (simplify_const_poly_int_tests<N>::run): Likewise.
2586 2023-10-02 Joern Rennecke <joern.rennecke@embecosm.com>
2587 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2589 * config/riscv/riscv-protos.h (riscv_vector::expand_block_move):
2591 * config/riscv/riscv-v.cc (riscv_vector::expand_block_move):
2593 * config/riscv/riscv.md (cpymemsi): Use riscv_vector::expand_block_move.
2595 (cpymem<P:mode>) .. this.
2597 2023-10-01 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
2599 * combine.cc (simplify_compare_const): Properly handle unsigned
2600 constants while narrowing comparison of memory and constants.
2602 2023-10-01 Feng Wang <wangfeng@eswincomputing.com>
2604 * config/riscv/riscv-opts.h (MASK_ZICSR): Delete.
2605 (MASK_ZIFENCEI): Delete;
2606 (MASK_ZIHINTNTL): Ditto.
2607 (MASK_ZIHINTPAUSE): Ditto.
2608 (TARGET_ZICSR): Ditto.
2609 (TARGET_ZIFENCEI): Ditto.
2610 (TARGET_ZIHINTNTL): Ditto.
2611 (TARGET_ZIHINTPAUSE): Ditto.
2612 (MASK_ZAWRS): Ditto.
2613 (TARGET_ZAWRS): Ditto.
2618 (TARGET_ZBA): Ditto.
2619 (TARGET_ZBB): Ditto.
2620 (TARGET_ZBC): Ditto.
2621 (TARGET_ZBS): Ditto.
2622 (MASK_ZFINX): Ditto.
2623 (MASK_ZDINX): Ditto.
2624 (MASK_ZHINX): Ditto.
2625 (MASK_ZHINXMIN): Ditto.
2626 (TARGET_ZFINX): Ditto.
2627 (TARGET_ZDINX): Ditto.
2628 (TARGET_ZHINX): Ditto.
2629 (TARGET_ZHINXMIN): Ditto.
2637 (MASK_ZKSED): Ditto.
2640 (TARGET_ZBKB): Ditto.
2641 (TARGET_ZBKC): Ditto.
2642 (TARGET_ZBKX): Ditto.
2643 (TARGET_ZKNE): Ditto.
2644 (TARGET_ZKND): Ditto.
2645 (TARGET_ZKNH): Ditto.
2646 (TARGET_ZKR): Ditto.
2647 (TARGET_ZKSED): Ditto.
2648 (TARGET_ZKSH): Ditto.
2649 (TARGET_ZKT): Ditto.
2651 (TARGET_ZTSO): Ditto.
2652 (MASK_VECTOR_ELEN_32): Ditto.
2653 (MASK_VECTOR_ELEN_64): Ditto.
2654 (MASK_VECTOR_ELEN_FP_32): Ditto.
2655 (MASK_VECTOR_ELEN_FP_64): Ditto.
2656 (MASK_VECTOR_ELEN_FP_16): Ditto.
2657 (TARGET_VECTOR_ELEN_32): Ditto.
2658 (TARGET_VECTOR_ELEN_64): Ditto.
2659 (TARGET_VECTOR_ELEN_FP_32): Ditto.
2660 (TARGET_VECTOR_ELEN_FP_64): Ditto.
2661 (TARGET_VECTOR_ELEN_FP_16): Ditto.
2664 (TARGET_ZVBB): Ditto.
2665 (TARGET_ZVBC): Ditto.
2667 (MASK_ZVKNED): Ditto.
2668 (MASK_ZVKNHA): Ditto.
2669 (MASK_ZVKNHB): Ditto.
2670 (MASK_ZVKSED): Ditto.
2671 (MASK_ZVKSH): Ditto.
2673 (MASK_ZVKNC): Ditto.
2674 (MASK_ZVKNG): Ditto.
2676 (MASK_ZVKSC): Ditto.
2677 (MASK_ZVKSG): Ditto.
2679 (TARGET_ZVKG): Ditto.
2680 (TARGET_ZVKNED): Ditto.
2681 (TARGET_ZVKNHA): Ditto.
2682 (TARGET_ZVKNHB): Ditto.
2683 (TARGET_ZVKSED): Ditto.
2684 (TARGET_ZVKSH): Ditto.
2685 (TARGET_ZVKN): Ditto.
2686 (TARGET_ZVKNC): Ditto.
2687 (TARGET_ZVKNG): Ditto.
2688 (TARGET_ZVKS): Ditto.
2689 (TARGET_ZVKSC): Ditto.
2690 (TARGET_ZVKSG): Ditto.
2691 (TARGET_ZVKT): Ditto.
2692 (MASK_ZVL32B): Ditto.
2693 (MASK_ZVL64B): Ditto.
2694 (MASK_ZVL128B): Ditto.
2695 (MASK_ZVL256B): Ditto.
2696 (MASK_ZVL512B): Ditto.
2697 (MASK_ZVL1024B): Ditto.
2698 (MASK_ZVL2048B): Ditto.
2699 (MASK_ZVL4096B): Ditto.
2700 (MASK_ZVL8192B): Ditto.
2701 (MASK_ZVL16384B): Ditto.
2702 (MASK_ZVL32768B): Ditto.
2703 (MASK_ZVL65536B): Ditto.
2704 (TARGET_ZVL32B): Ditto.
2705 (TARGET_ZVL64B): Ditto.
2706 (TARGET_ZVL128B): Ditto.
2707 (TARGET_ZVL256B): Ditto.
2708 (TARGET_ZVL512B): Ditto.
2709 (TARGET_ZVL1024B): Ditto.
2710 (TARGET_ZVL2048B): Ditto.
2711 (TARGET_ZVL4096B): Ditto.
2712 (TARGET_ZVL8192B): Ditto.
2713 (TARGET_ZVL16384B): Ditto.
2714 (TARGET_ZVL32768B): Ditto.
2715 (TARGET_ZVL65536B): Ditto.
2716 (MASK_ZICBOZ): Ditto.
2717 (MASK_ZICBOM): Ditto.
2718 (MASK_ZICBOP): Ditto.
2719 (TARGET_ZICBOZ): Ditto.
2720 (TARGET_ZICBOM): Ditto.
2721 (TARGET_ZICBOP): Ditto.
2722 (MASK_ZICOND): Ditto.
2723 (TARGET_ZICOND): Ditto.
2725 (TARGET_ZFA): Ditto.
2726 (MASK_ZFHMIN): Ditto.
2728 (MASK_ZVFHMIN): Ditto.
2730 (TARGET_ZFHMIN): Ditto.
2731 (TARGET_ZFH): Ditto.
2732 (TARGET_ZVFHMIN): Ditto.
2733 (TARGET_ZVFH): Ditto.
2734 (MASK_ZMMUL): Ditto.
2735 (TARGET_ZMMUL): Ditto.
2743 (TARGET_ZCA): Ditto.
2744 (TARGET_ZCB): Ditto.
2745 (TARGET_ZCE): Ditto.
2746 (TARGET_ZCF): Ditto.
2747 (TARGET_ZCD): Ditto.
2748 (TARGET_ZCMP): Ditto.
2749 (TARGET_ZCMT): Ditto.
2750 (MASK_SVINVAL): Ditto.
2751 (MASK_SVNAPOT): Ditto.
2752 (TARGET_SVINVAL): Ditto.
2753 (TARGET_SVNAPOT): Ditto.
2754 (MASK_XTHEADBA): Ditto.
2755 (MASK_XTHEADBB): Ditto.
2756 (MASK_XTHEADBS): Ditto.
2757 (MASK_XTHEADCMO): Ditto.
2758 (MASK_XTHEADCONDMOV): Ditto.
2759 (MASK_XTHEADFMEMIDX): Ditto.
2760 (MASK_XTHEADFMV): Ditto.
2761 (MASK_XTHEADINT): Ditto.
2762 (MASK_XTHEADMAC): Ditto.
2763 (MASK_XTHEADMEMIDX): Ditto.
2764 (MASK_XTHEADMEMPAIR): Ditto.
2765 (MASK_XTHEADSYNC): Ditto.
2766 (TARGET_XTHEADBA): Ditto.
2767 (TARGET_XTHEADBB): Ditto.
2768 (TARGET_XTHEADBS): Ditto.
2769 (TARGET_XTHEADCMO): Ditto.
2770 (TARGET_XTHEADCONDMOV): Ditto.
2771 (TARGET_XTHEADFMEMIDX): Ditto.
2772 (TARGET_XTHEADFMV): Ditto.
2773 (TARGET_XTHEADINT): Ditto.
2774 (TARGET_XTHEADMAC): Ditto.
2775 (TARGET_XTHEADMEMIDX): Ditto.
2776 (TARGET_XTHEADMEMPAIR): Ditto.
2777 (TARGET_XTHEADSYNC): Ditto.
2778 (MASK_XVENTANACONDOPS): Ditto.
2779 (TARGET_XVENTANACONDOPS): Ditto.
2780 * config/riscv/riscv.opt: Add new Mask defination.
2781 * doc/options.texi: Add explanation for this new usage.
2782 * opt-functions.awk: Add new function to find the index
2783 of target variable from extra_target_vars.
2784 * opt-read.awk: Add new function to store the Mask flags.
2785 * opth-gen.awk: Add new function to output the defination of
2786 Mask Macro and Target Macro.
2788 2023-10-01 Joern Rennecke <joern.rennecke@embecosm.com>
2789 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2790 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2793 * config/riscv/riscv-protos.h (riscv_vector::legitimize_move):
2794 Change second parameter to rtx *.
2795 * config/riscv/riscv-v.cc (risv_vector::legitimize_move): Likewise.
2796 * config/riscv/vector.md: Changed callers of
2797 riscv_vector::legitimize_move.
2798 (*mov<mode>_mem_to_mem): Remove.
2800 2023-09-30 Jakub Jelinek <jakub@redhat.com>
2803 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::vector_infos_manager):
2804 Replace safe_grow with safe_grow_cleared.
2806 2023-09-30 Jakub Jelinek <jakub@redhat.com>
2808 * gimple-match-head.cc (gimple_bitwise_inverted_equal_p): Fix a pasto
2809 in function comment.
2811 2023-09-30 Jakub Jelinek <jakub@redhat.com>
2813 PR middle-end/111625
2814 PR middle-end/111637
2815 * gimple-lower-bitint.cc (range_to_prec): Use prec or -prec if
2817 (bitint_large_huge::handle_operand_addr): For uninitialized operands
2818 use limb_prec or -limb_prec precision.
2820 2023-09-30 Jakub Jelinek <jakub@redhat.com>
2822 * vec.h (quick_grow): Uncomment static_assert.
2824 2023-09-30 Jivan Hakobyan <jivanhakobyan9@gmail.com>
2826 * config/riscv/bitmanip.md (*<optab>_not_const<mode>): Added type attribute
2828 2023-09-29 Xiao Zeng <zengxiao@eswincomputing.com>
2830 * config/riscv/riscv.cc (riscv_rtx_costs): Better handle costing
2831 SETs when the outer code is INSN.
2833 2023-09-29 Jivan Hakobyan <jivanhakobyan9@gmail.com>
2835 * config/riscv/bitmanip.md (*<optab>_not_const<mode>): New split
2838 2023-09-29 Richard Sandiford <richard.sandiford@arm.com>
2840 * poly-int.h (poly_int_pod): Delete.
2841 (poly_coeff_traits::init_cast): New type.
2842 (poly_int_full, poly_int_hungry, poly_int_fullness): New structures.
2843 (poly_int): Replace constructors that take 1 and 2 coefficients with
2844 a general one that takes an arbitrary number of coefficients.
2845 Delegate initialization to two new private constructors, one of
2846 which uses the coefficients as-is and one of which adds an extra
2847 zero of the appropriate type (and precision, where applicable).
2848 (gt_ggc_mx, gt_pch_nx): Operate on poly_ints rather than poly_int_pods.
2849 * poly-int-types.h (poly_uint16_pod, poly_int64_pod, poly_uint64_pod)
2850 (poly_offset_int_pod, poly_wide_int_pod, poly_widest_int_pod): Delete.
2851 * gengtype.cc (main): Don't register poly_int64_pod.
2852 * calls.cc (initialize_argument_information): Use poly_int rather
2854 (combine_pending_stack_adjustment_and_call): Likewise.
2855 * config/aarch64/aarch64.cc (pure_scalable_type_info): Likewise.
2856 * data-streamer.h (bp_unpack_poly_value): Likewise.
2857 * dwarf2cfi.cc (struct dw_trace_info): Likewise.
2858 (struct queued_reg_save): Likewise.
2859 * dwarf2out.h (struct dw_cfa_location): Likewise.
2860 * emit-rtl.h (struct incoming_args): Likewise.
2861 (struct rtl_data): Likewise.
2862 * expr.cc (get_bit_range): Likewise.
2863 (get_inner_reference): Likewise.
2864 * expr.h (get_bit_range): Likewise.
2865 * fold-const.cc (split_address_to_core_and_offset): Likewise.
2866 (ptr_difference_const): Likewise.
2867 * fold-const.h (ptr_difference_const): Likewise.
2868 * function.cc (try_fit_stack_local): Likewise.
2869 (instantiate_new_reg): Likewise.
2870 * function.h (struct expr_status): Likewise.
2871 (struct args_size): Likewise.
2872 * genmodes.cc (ZERO_COEFFS): Likewise.
2873 (mode_size_inline): Likewise.
2874 (mode_nunits_inline): Likewise.
2875 (emit_mode_precision): Likewise.
2876 (emit_mode_size): Likewise.
2877 (emit_mode_nunits): Likewise.
2878 * gimple-fold.cc (get_base_constructor): Likewise.
2879 * gimple-ssa-store-merging.cc (struct symbolic_number): Likewise.
2880 * inchash.h (class hash): Likewise.
2881 * ipa-modref-tree.cc (modref_access_node::dump): Likewise.
2882 * ipa-modref.cc (modref_access_analysis::merge_call_side_effects):
2884 * ira-int.h (ira_spilled_reg_stack_slot): Likewise.
2885 * lra-eliminations.cc (self_elim_offsets): Likewise.
2886 * machmode.h (mode_size, mode_precision, mode_nunits): Likewise.
2887 * omp-low.cc (omplow_simd_context): Likewise.
2888 * pretty-print.cc (pp_wide_integer): Likewise.
2889 * pretty-print.h (pp_wide_integer): Likewise.
2890 * reload.cc (struct decomposition): Likewise.
2891 * reload.h (struct reload): Likewise.
2892 * reload1.cc (spill_stack_slot_width): Likewise.
2893 (struct elim_table): Likewise.
2894 (offsets_at): Likewise.
2895 (init_eliminable_invariants): Likewise.
2896 * rtl.h (union rtunion): Likewise.
2897 (poly_int_rtx_p): Likewise.
2898 (strip_offset): Likewise.
2899 (strip_offset_and_add): Likewise.
2900 * rtlanal.cc (strip_offset): Likewise.
2901 * tree-dfa.cc (get_ref_base_and_extent): Likewise.
2902 (get_addr_base_and_unit_offset_1): Likewise.
2903 (get_addr_base_and_unit_offset): Likewise.
2904 * tree-dfa.h (get_ref_base_and_extent): Likewise.
2905 (get_addr_base_and_unit_offset_1): Likewise.
2906 (get_addr_base_and_unit_offset): Likewise.
2907 * tree-ssa-loop-ivopts.cc (struct iv_use): Likewise.
2908 (strip_offset): Likewise.
2909 * tree-ssa-sccvn.h (struct vn_reference_op_struct): Likewise.
2910 * tree.cc (ptrdiff_tree_p): Likewise.
2911 * tree.h (poly_int_tree_p): Likewise.
2912 (ptrdiff_tree_p): Likewise.
2913 (get_inner_reference): Likewise.
2915 2023-09-29 John David Anglin <danglin@gcc.gnu.org>
2917 * config/pa/pa.md (memory_barrier): Revise comment.
2918 (memory_barrier_64, memory_barrier_32): Use ldcw,co on PA 2.0.
2919 * config/pa/pa.opt (coherent-ldcw): Change default to disabled.
2921 2023-09-29 Jakub Jelinek <jakub@redhat.com>
2923 * vec.h (quick_insert, ordered_remove, unordered_remove,
2924 block_remove, qsort, sort, stablesort, quick_grow): Guard
2925 std::is_trivially_{copyable,default_constructible} and
2926 vec_detail::is_trivially_copyable_or_pair static assertions
2927 with GCC_VERSION >= 5000.
2928 (vec_detail::is_trivially_copyable_or_pair): Guard definition
2929 with GCC_VERSION >= 5000.
2931 2023-09-29 Manos Anagnostakis <manos.anagnostakis@vrull.eu>
2933 * config/aarch64/aarch64-opts.h (enum aarch64_ldp_policy): Removed.
2934 (enum aarch64_ldp_stp_policy): Merged enums aarch64_ldp_policy
2935 and aarch64_stp_policy to aarch64_ldp_stp_policy.
2936 (enum aarch64_stp_policy): Removed.
2937 * config/aarch64/aarch64-protos.h (struct tune_params): Removed
2938 aarch64_ldp_policy_model and aarch64_stp_policy_model enum types
2939 and left only the definitions to the aarch64-opts one.
2940 * config/aarch64/aarch64.cc (aarch64_parse_ldp_policy): Removed.
2941 (aarch64_parse_stp_policy): Removed.
2942 (aarch64_override_options_internal): Removed calls to parsing
2943 functions and added obvious direct assignments.
2944 (aarch64_mem_ok_with_ldpstp_policy_model): Improved
2945 code quality based on the new changes.
2946 * config/aarch64/aarch64.opt: Use single enum type
2947 aarch64_ldp_stp_policy for both ldp and stp options.
2949 2023-09-29 Richard Biener <rguenther@suse.de>
2951 PR tree-optimization/111583
2952 * tree-loop-distribution.cc (find_single_drs): Ensure the
2953 load/store are always executed.
2955 2023-09-29 Jakub Jelinek <jakub@redhat.com>
2957 * tree-vect-patterns.cc (vect_recog_over_widening_pattern): Use
2958 quick_grow_cleared method on unprom rather than quick_grow.
2960 2023-09-29 Sergei Trofimovich <siarheit@google.com>
2962 PR middle-end/111505
2963 * ggc-common.cc (ggc_zero_out_root_pointers, ggc_common_finalize):
2964 Add new helper. Use helper instead of memset() to wipe out pointers.
2966 2023-09-29 Richard Sandiford <richard.sandiford@arm.com>
2968 * builtins.h (c_readstr): Take a fixed_size_mode rather than a
2970 * builtins.cc (c_readstr): Likewise. Build a local array of
2971 bytes and use native_decode_rtx to get the rtx image.
2972 (builtin_memcpy_read_str): Simplify accordingly.
2973 (builtin_strncpy_read_str): Likewise.
2974 (builtin_memset_read_str): Likewise.
2975 (builtin_memset_gen_str): Likewise.
2976 * expr.cc (string_cst_read_str): Likewise.
2978 2023-09-29 Jakub Jelinek <jakub@redhat.com>
2980 * tree-ssa-loop-im.cc (tree_ssa_lim_initialize): Use quick_grow_cleared
2981 instead of quick_grow on vec<bitmap_head> members.
2982 * cfganal.cc (control_dependences::control_dependences): Likewise.
2983 * rtl-ssa/blocks.cc (function_info::build_info::build_info): Likewise.
2984 (function_info::place_phis): Use safe_grow_cleared instead of safe_grow
2985 on auto_vec<bitmap_head> vars.
2986 * tree-ssa-live.cc (compute_live_vars): Use quick_grow_cleared instead
2987 of quick_grow on vec<bitmap_head> var.
2989 2023-09-28 Vladimir N. Makarov <vmakarov@redhat.com>
2992 2023-09-14 Vladimir N. Makarov <vmakarov@redhat.com>
2994 * ira-costs.cc (find_costs_and_classes): Decrease memory cost
2997 2023-09-28 Wilco Dijkstra <wilco.dijkstra@arm.com>
3000 * config/aarch64/aarch64.md (aarch64_movmemdi): Add new expander.
3001 (movmemdi): Call aarch64_expand_cpymem_mops for correct expansion.
3002 * config/aarch64/aarch64.cc (aarch64_expand_cpymem_mops): Add support
3004 * config/aarch64/aarch64-protos.h (aarch64_expand_cpymem_mops): Add new
3007 2023-09-28 Pan Li <pan2.li@intel.com>
3010 * config/riscv/autovec.md (<float_cvt><mode><vnnconvert>2):
3012 * config/riscv/vector-iterators.md: New iterator.
3014 2023-09-28 Vladimir N. Makarov <vmakarov@redhat.com>
3016 * rtl.h (lra_in_progress): Change type to bool.
3017 (ira_in_progress): Add new extern.
3018 * ira.cc (ira_in_progress): New global.
3019 (pass_ira::execute): Set up ira_in_progress.
3020 * lra.cc: (lra_in_progress): Change type to bool and initialize.
3021 (lra): Use bool values for lra_in_progress.
3022 * lra-eliminations.cc (init_elim_table): Ditto.
3024 2023-09-28 Richard Biener <rguenther@suse.de>
3027 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores):
3028 Use a heap allocated worklist for CFG traversal instead of
3031 2023-09-28 Jakub Jelinek <jakub@redhat.com>
3032 Jonathan Wakely <jwakely@redhat.com>
3034 * vec.h: Mention in file comment limited support for non-POD types
3036 (vec_destruct): New function template.
3037 (release): Use it for non-trivially destructible T.
3038 (truncate): Likewise.
3039 (quick_push): Perform a placement new into slot
3040 instead of assignment.
3041 (pop): For non-trivially destructible T return void
3042 rather than T & and destruct the popped element.
3043 (quick_insert, ordered_remove): Note that they aren't suitable
3044 for non-trivially copyable types. Add static_asserts for that.
3045 (block_remove): Assert T is trivially copyable.
3046 (vec_detail::is_trivially_copyable_or_pair): New trait.
3047 (qsort, sort, stablesort): Assert T is trivially copyable or
3048 std::pair with both trivally copyable types.
3049 (quick_grow): Add assert T is trivially default constructible,
3050 for now commented out.
3051 (quick_grow_cleared): Don't call quick_grow, instead inline it
3052 by hand except for the new static_assert.
3053 (gt_ggc_mx): Assert T is trivially destructable.
3054 (auto_vec::operator=): Formatting fixes.
3055 (auto_vec::auto_vec): Likewise.
3056 (vec_safe_grow_cleared): Don't call vec_safe_grow, instead inline
3057 it manually and call quick_grow_cleared method rather than quick_grow.
3058 (safe_grow_cleared): Likewise.
3059 * edit-context.cc (class line_event): Move definition earlier.
3060 * tree-ssa-loop-im.cc (seq_entry::seq_entry): Make default ctor
3062 * ipa-fnsummary.cc (evaluate_properties_for_edge): Use
3063 safe_grow_cleared instead of safe_grow followed by placement new
3064 constructing the elements.
3066 2023-09-28 Richard Sandiford <richard.sandiford@arm.com>
3068 * dwarf2out.cc (mem_loc_descriptor): Remove unused variables.
3069 * tree-affine.cc (expr_to_aff_combination): Likewise.
3071 2023-09-28 Richard Biener <rguenther@suse.de>
3073 PR tree-optimization/111614
3074 * tree-ssa-reassoc.cc (undistribute_bitref_for_vector): Properly
3075 convert the first vector when required.
3077 2023-09-28 xuli <xuli1@eswincomputing.com>
3080 * config/riscv/riscv-v.cc (expand_const_vector): Fix bug.
3081 * config/riscv/riscv-vsetvl.cc (anticipatable_occurrence_p): Fix bug.
3083 2023-09-27 Sandra Loosemore <sandra@codesourcery.com>
3085 * gimple.cc (gimple_copy): Add case GIMPLE_OMP_STRUCTURED_BLOCK.
3087 2023-09-27 Iain Sandoe <iain@sandoe.co.uk>
3090 * configure: Regenerate.
3091 * configure.ac: Rename the missing dsymutil case to "DET_UNKNOWN".
3093 2023-09-27 Manos Anagnostakis <manos.anagnostakis@vrull.eu>
3094 Philipp Tomsich <philipp.tomsich@vrull.eu>
3095 Manolis Tsamis <manolis.tsamis@vrull.eu>
3097 * config/aarch64/aarch64-opts.h (enum aarch64_ldp_policy): New
3099 (enum aarch64_stp_policy): New enum type.
3100 * config/aarch64/aarch64-protos.h (struct tune_params): Add
3101 appropriate enums for the policies.
3102 (aarch64_mem_ok_with_ldpstp_policy_model): New declaration.
3103 * config/aarch64/aarch64-tuning-flags.def
3104 (AARCH64_EXTRA_TUNING_OPTION): Remove superseded tuning
3106 * config/aarch64/aarch64.cc (aarch64_parse_ldp_policy): New
3107 function to parse ldp-policy parameter.
3108 (aarch64_parse_stp_policy): New function to parse stp-policy parameter.
3109 (aarch64_override_options_internal): Call parsing functions.
3110 (aarch64_mem_ok_with_ldpstp_policy_model): New function.
3111 (aarch64_operands_ok_for_ldpstp): Add call to
3112 aarch64_mem_ok_with_ldpstp_policy_model for parameter-value
3113 check and alignment check and remove superseded ones.
3114 (aarch64_operands_adjust_ok_for_ldpstp): Add call to
3115 aarch64_mem_ok_with_ldpstp_policy_model for parameter-value
3116 check and alignment check and remove superseded ones.
3117 * config/aarch64/aarch64.opt (aarch64-ldp-policy): New param.
3118 (aarch64-stp-policy): New param.
3119 * doc/invoke.texi: Document the parameters accordingly.
3121 2023-09-27 Andre Vieira <andre.simoesdiasvieira@arm.com>
3123 * tree-data-ref.cc (include calls.h): Add new include.
3124 (get_references_in_stmt): Correctly handle IFN_MASK_CALL.
3126 2023-09-27 Richard Biener <rguenther@suse.de>
3128 * match.pd (abs (copysign (x, y)) -> abs (x)): New pattern.
3130 2023-09-27 Jakub Jelinek <jakub@redhat.com>
3133 * system.h (BROKEN_VALUE_INITIALIZATION): Don't define.
3134 * vec.h (vec_default_construct): Remove BROKEN_VALUE_INITIALIZATION
3136 * function.cc (assign_parm_find_data_types): Likewise.
3138 2023-09-27 Pan Li <pan2.li@intel.com>
3140 * config/riscv/autovec.md (roundeven<mode>2): New pattern.
3141 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
3142 (enum insn_type): Ditto.
3143 (expand_vec_roundeven): New func decl.
3144 * config/riscv/riscv-v.cc (expand_vec_roundeven): New func impl.
3146 2023-09-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3149 * dse.cc (find_shift_sequence): Check the mode with access_size exist on the target.
3151 2023-09-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3153 * tree-if-conv.cc (is_cond_scalar_reduction): Fix comments.
3155 2023-09-27 Pan Li <pan2.li@intel.com>
3157 * config/riscv/autovec.md (btrunc<mode>2): New pattern.
3158 * config/riscv/riscv-protos.h (expand_vec_trunc): New func decl.
3159 * config/riscv/riscv-v.cc (emit_vec_cvt_x_f_rtz): New func impl.
3160 (expand_vec_trunc): Ditto.
3162 2023-09-26 Hans-Peter Nilsson <hp@axis.com>
3166 * builtins.cc (expand_builtin) <case BUILT_IN_ATOMIC_TEST_AND_SET>:
3167 Handle failure from expand_builtin_atomic_test_and_set.
3168 * optabs.cc (expand_atomic_test_and_set): When all attempts fail to
3169 generate atomic code through target support, return NULL
3170 instead of emitting non-atomic code. Also, for code handling
3171 targetm.atomic_test_and_set_trueval != 1, gcc_assert result
3172 from calling emit_store_flag_force instead of returning NULL.
3174 2023-09-26 Andrew MacLeod <amacleod@redhat.com>
3176 PR tree-optimization/111599
3177 * value-relation.cc (relation_oracle::valid_equivs): Ensure
3180 2023-09-26 Andrew Pinski <apinski@marvell.com>
3182 PR tree-optimization/106164
3183 PR tree-optimization/111456
3184 * match.pd (`(A ==/!= B) & (A CMP C)`):
3185 Support an optional cast on the second A.
3186 (`(A ==/!= B) | (A CMP C)`): Likewise.
3188 2023-09-26 Andrew Pinski <apinski@marvell.com>
3190 PR tree-optimization/111469
3191 * tree-ssa-phiopt.cc (minmax_replacement): Fix
3192 the assumption for the `non-diamond` handling cases
3195 2023-09-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3197 * match.pd: Optimize COND_ADD reduction pattern.
3199 2023-09-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3201 PR tree-optimization/111594
3202 PR tree-optimization/110660
3203 * match.pd: Optimize COND_LEN_ADD reduction.
3205 2023-09-26 Pan Li <pan2.li@intel.com>
3207 * config/riscv/autovec.md (round<mode>2): New pattern.
3208 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
3209 (enum insn_type): Ditto.
3210 (expand_vec_round): New function decl.
3211 * config/riscv/riscv-v.cc (expand_vec_round): New function impl.
3213 2023-09-26 Iain Sandoe <iain@sandoe.co.uk>
3215 * config/darwin.h (DARWIN_CC1_SPEC): Remove -dynamiclib.
3217 2023-09-26 Tobias Burnus <tobias@codesourcery.com>
3219 PR middle-end/111547
3220 * doc/invoke.texi (-fopenmp): Mention C++11 [[omp::decl(...)]] syntax.
3221 (-fopenmp-simd): Likewise. Clarify 'loop' directive semantic.
3223 2023-09-26 Pan Li <pan2.li@intel.com>
3225 * config/riscv/autovec.md (rint<mode>2): New pattern.
3226 * config/riscv/riscv-protos.h (expand_vec_rint): New function decl.
3227 * config/riscv/riscv-v.cc (expand_vec_rint): New function impl.
3229 2023-09-26 Pan Li <pan2.li@intel.com>
3231 * config/riscv/autovec.md (nearbyint<mode>2): New pattern.
3232 * config/riscv/riscv-protos.h (enum insn_type): New enum.
3233 (expand_vec_nearbyint): New function decl.
3234 * config/riscv/riscv-v.cc (expand_vec_nearbyint): New func impl.
3236 2023-09-26 Pan Li <pan2.li@intel.com>
3238 * config/riscv/riscv-v.cc (gen_ceil_const_fp): Remove.
3239 (get_fp_rounding_coefficient): Rename.
3240 (gen_floor_const_fp): Remove.
3241 (expand_vec_ceil): Take renamed func.
3242 (expand_vec_floor): Ditto.
3244 2023-09-25 Vladimir N. Makarov <vmakarov@redhat.com>
3246 PR middle-end/111497
3247 * lra-constraints.cc (lra_constraints): Copy substituted
3249 * lra.cc (lra): Change comment for calling unshare_all_rtl_again.
3251 2023-09-25 Eric Botcazou <ebotcazou@adacore.com>
3253 * gimple-range-gori.cc (gori_compute::logical_combine): Add missing
3254 return statement in the varying case.
3256 2023-09-25 Xi Ruoyao <xry111@xry111.site>
3258 * doc/invoke.texi: Update -m[no-]explicit-relocs for r14-4160.
3260 2023-09-25 Andrew Pinski <apinski@marvell.com>
3262 PR tree-optimization/110386
3263 * gimple-ssa-backprop.cc (strip_sign_op_1): Remove ABSU_EXPR.
3265 2023-09-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3268 * config/riscv/riscv-vsetvl.cc (earliest_pred_can_be_fused_p): Bugfix
3270 2023-09-25 Kewen Lin <linkw@linux.ibm.com>
3273 * config/rs6000/rs6000.cc (rs6000_update_ipa_fn_target_info): Skip
3276 2023-09-25 Kewen Lin <linkw@linux.ibm.com>
3279 * config/rs6000/rs6000.cc (rs6000_can_inline_p): Adopt
3280 target_option_default_node when the callee has no option
3281 attributes, also simplify the existing code accordingly.
3283 2023-09-25 Guo Jie <guojie@loongson.cn>
3285 * config/loongarch/lasx.md (lasx_vecinit_merge_<LASX:mode>): New
3286 pattern for vector construction.
3287 (vec_set<mode>_internal): Ditto.
3288 (lasx_xvinsgr2vr_<mode256_i_half>_internal): Ditto.
3289 (lasx_xvilvl_<lasxfmt_f>_internal): Ditto.
3290 * config/loongarch/loongarch.cc (loongarch_expand_vector_init):
3291 Optimized the implementation of vector construction.
3292 (loongarch_expand_vector_init_same): New function.
3293 * config/loongarch/lsx.md (lsx_vilvl_<lsxfmt_f>_internal): New
3294 pattern for vector construction.
3295 (lsx_vreplvei_mirror_<lsxfmt_f>): New pattern for vector
3297 (vec_concatv2df): Ditto.
3298 (vec_concatv4sf): Ditto.
3300 2023-09-24 Pan Li <pan2.li@intel.com>
3303 * config/riscv/riscv-v.cc
3304 (expand_vector_init_merge_repeating_sequence): Bugfix
3306 2023-09-24 Andrew Pinski <apinski@marvell.com>
3308 PR tree-optimization/111543
3309 * match.pd (`(X & ~Y) & Y`, `(X | ~Y) | Y`): New patterns.
3311 2023-09-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3313 * config/riscv/autovec-opt.md: Extend VLS modes
3314 * config/riscv/vector-iterators.md: Ditto.
3316 2023-09-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3318 * config/riscv/autovec-opt.md: Add VLS modes for conditional ABS/SQRT.
3320 2023-09-23 Pan Li <pan2.li@intel.com>
3322 * config/riscv/autovec.md (floor<mode>2): New pattern.
3323 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
3324 (enum insn_type): Ditto.
3325 (expand_vec_floor): New function decl.
3326 * config/riscv/riscv-v.cc (gen_floor_const_fp): New function impl.
3327 (expand_vec_floor): Ditto.
3329 2023-09-22 Pan Li <pan2.li@intel.com>
3331 * config/riscv/riscv-v.cc (expand_vec_float_cmp_mask): Refactor.
3332 (emit_vec_float_cmp_mask): Rename.
3333 (expand_vec_copysign): Ditto.
3334 (emit_vec_copysign): Ditto.
3335 (emit_vec_abs): New function impl.
3336 (emit_vec_cvt_x_f): Ditto.
3337 (emit_vec_cvt_f_x): Ditto.
3338 (expand_vec_ceil): Ditto.
3340 2023-09-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3342 * config/riscv/vector-iterators.md: Extend VLS modes.
3344 2023-09-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3346 * config/riscv/riscv-v.cc (gen_const_vector_dup): Use global expand function.
3347 * config/riscv/vector.md (@vec_duplicate<mode>): Remove @.
3348 (vec_duplicate<mode>): Ditto.
3350 2023-09-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3352 * config/riscv/autovec.md: Add VLS conditional patterns.
3353 * config/riscv/riscv-protos.h (expand_cond_unop): Ditto.
3354 (expand_cond_binop): Ditto.
3355 (expand_cond_ternop): Ditto.
3356 * config/riscv/riscv-v.cc (expand_cond_unop): Ditto.
3357 (expand_cond_binop): Ditto.
3358 (expand_cond_ternop): Ditto.
3360 2023-09-22 xuli <xuli1@eswincomputing.com>
3363 * config/riscv/riscv-v.cc (emit_vlmax_gather_insn): Optimization of vrgather.vv
3364 into vrgatherei16.vv.
3366 2023-09-22 Lehua Ding <lehua.ding@rivai.ai>
3368 * config/riscv/autovec-opt.md (*cond_widen_reduc_plus_scal_<mode>):
3369 New combine patterns.
3370 * config/riscv/riscv-protos.h (enum insn_type): New insn_type.
3372 2023-09-22 Lehua Ding <lehua.ding@rivai.ai>
3374 * config/riscv/riscv-protos.h (enum avl_type): New VLS avl_type.
3375 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Move comments.
3377 2023-09-22 Pan Li <pan2.li@intel.com>
3379 * config/riscv/autovec.md (ceil<mode>2): New pattern.
3380 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
3381 (enum insn_type): Ditto.
3382 (expand_vec_ceil): New function decl.
3383 * config/riscv/riscv-v.cc (gen_ceil_const_fp): New function impl.
3384 (expand_vec_float_cmp_mask): Ditto.
3385 (expand_vec_copysign): Ditto.
3386 (expand_vec_ceil): Ditto.
3387 * config/riscv/vector.md: Add VLS mode support.
3389 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3391 * config/riscv/autovec.md: Extend VLS modes.
3393 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3395 * config/riscv/vector-iterators.md: Extend VLS modes.
3397 2023-09-21 Lehua Ding <lehua.ding@rivai.ai>
3398 Robin Dapp <rdapp.gcc@gmail.com>
3400 * config/riscv/riscv-v.cc (emit_vlmax_insn): Adjust comments.
3401 (emit_nonvlmax_insn): Adjust comments.
3402 (emit_vlmax_insn_lra): Adjust comments.
3404 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
3406 * config.gcc (*linux*): Set rust target_objs, and
3407 target_has_targetrustm,
3408 * config/t-linux (linux-rust.o): New rule.
3409 * config/linux-rust.cc: New file.
3411 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
3413 * config.gcc (i[34567]86-*-mingw* | x86_64-*-mingw*): Set
3414 rust_target_objs and target_has_targetrustm.
3415 * config/t-winnt (winnt-rust.o): New rule.
3416 * config/winnt-rust.cc: New file.
3418 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
3420 * config.gcc (*-*-fuchsia): Set tmake_rule, rust_target_objs,
3421 and target_has_targetrustm.
3422 * config/fuchsia-rust.cc: New file.
3423 * config/t-fuchsia: New file.
3425 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
3427 * config.gcc (*-*-vxworks*): Set rust_target_objs and
3428 target_has_targetrustm.
3429 * config/t-vxworks (vxworks-rust.o): New rule.
3430 * config/vxworks-rust.cc: New file.
3432 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
3434 * config.gcc (*-*-dragonfly*): Set rust_target_objs and
3435 target_has_targetrustm.
3436 * config/t-dragonfly (dragonfly-rust.o): New rule.
3437 * config/dragonfly-rust.cc: New file.
3439 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
3441 * config.gcc (*-*-solaris2*): Set rust_target_objs and
3442 target_has_targetrustm.
3443 * config/t-sol2 (sol2-rust.o): New rule.
3444 * config/sol2-rust.cc: New file.
3446 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
3448 * config.gcc (*-*-openbsd*): Set rust_target_objs and
3449 target_has_targetrustm.
3450 * config/t-openbsd (openbsd-rust.o): New rule.
3451 * config/openbsd-rust.cc: New file.
3453 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
3455 * config.gcc (*-*-netbsd*): Set rust_target_objs and
3456 target_has_targetrustm.
3457 * config/t-netbsd (netbsd-rust.o): New rule.
3458 * config/netbsd-rust.cc: New file.
3460 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
3462 * config.gcc (*-*-freebsd*): Set rust_target_objs and
3463 target_has_targetrustm.
3464 * config/t-freebsd (freebsd-rust.o): New rule.
3465 * config/freebsd-rust.cc: New file.
3467 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
3469 * config.gcc (*-*-darwin*): Set rust_target_objs and
3470 target_has_targetrustm.
3471 * config/t-darwin (darwin-rust.o): New rule.
3472 * config/darwin-rust.cc: New file.
3474 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
3476 * config/i386/t-i386 (i386-rust.o): New rule.
3477 * config/i386/i386-rust.cc: New file.
3478 * config/i386/i386-rust.h: New file.
3480 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
3482 * doc/tm.texi: Regenerate.
3483 * doc/tm.texi.in: Document TARGET_RUST_OS_INFO.
3485 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
3487 * doc/tm.texi: Regenerate.
3488 * doc/tm.texi.in: Add @node for Rust language and ABI, and document
3489 TARGET_RUST_CPU_INFO.
3491 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
3493 * Makefile.in (tm_rust_file_list, tm_rust_include_list, TM_RUST_H,
3494 RUST_TARGET_DEF, RUST_TARGET_H, RUST_TARGET_OBJS): New variables.
3495 (tm_rust.h, cs-tm_rust.h, default-rust.o,
3496 rust/rust-target-hooks-def.h, s-rust-target-hooks-def-h): New rules.
3497 (s-tm-texi): Also check timestamp on rust-target.def.
3498 (generated_files): Add TM_RUST_H and rust-target-hooks-def.h.
3499 (build/genhooks.o): Also depend on RUST_TARGET_DEF.
3500 * config.gcc (tm_rust_file, rust_target_objs, target_has_targetrustm):
3502 * configure: Regenerate.
3503 * configure.ac (tm_rust_file_list, tm_rust_include_list,
3504 rust_target_objs): Add substitutes.
3505 * doc/tm.texi: Regenerate.
3506 * doc/tm.texi.in (targetrustm): Document.
3507 (target_has_targetrustm): Document.
3508 * genhooks.cc: Include rust/rust-target.def.
3509 * config/default-rust.cc: New file.
3511 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3514 * config/riscv/autovec.md: Enable scratch rtx in ELSE operand.
3515 * config/riscv/predicates.md (autovec_else_operand): New predicate.
3516 * config/riscv/riscv-v.cc (get_else_operand): New function.
3517 (expand_cond_len_unop): Adapt ELSE value.
3518 (expand_cond_len_binop): Ditto.
3519 (expand_cond_len_ternop): Ditto.
3520 * config/riscv/riscv.cc (riscv_preferred_else_value): New function.
3521 (TARGET_PREFERRED_ELSE_VALUE): New targethook.
3523 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3526 * config/riscv/riscv.cc (riscv_legitimize_move): Fix bug.
3528 2023-09-21 Jiufu Guo <guojiufu@linux.ibm.com>
3530 PR tree-optimization/111355
3531 * match.pd ((X + C) / N): Update pattern.
3533 2023-09-21 Jiufu Guo <guojiufu@linux.ibm.com>
3535 * match.pd ((t * 2) / 2): Update to use overflow_free_p.
3537 2023-09-21 xuli <xuli1@eswincomputing.com>
3540 * config/riscv/constraints.md (c01): const_int 1.
3544 * config/riscv/predicates.md (vector_eew8_stride_operand): New predicate for stride operand.
3545 (vector_eew16_stride_operand): Ditto.
3546 (vector_eew32_stride_operand): Ditto.
3547 (vector_eew64_stride_operand): Ditto.
3548 * config/riscv/vector-iterators.md: New iterator for stride operand.
3549 * config/riscv/vector.md: Add stride = element width constraint.
3551 2023-09-21 Lehua Ding <lehua.ding@rivai.ai>
3553 * config/riscv/predicates.md (const_1_or_2_operand): Rename.
3554 (const_1_or_4_operand): Ditto.
3555 (vector_gs_scale_operand_16): Ditto.
3556 (vector_gs_scale_operand_32): Ditto.
3557 * config/riscv/vector-iterators.md: Adjust.
3559 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3561 * config/riscv/autovec.md: Extend VLS modes.
3562 * config/riscv/vector-iterators.md: Ditto.
3563 * config/riscv/vector.md: Ditto.
3565 2023-09-20 Andrew MacLeod <amacleod@redhat.com>
3567 * gimple-range-cache.cc (ssa_cache::merge_range): Change meaning
3568 of the return value.
3569 (ssa_cache::dump): Don't print GLOBAL RANGE header.
3570 (ssa_lazy_cache::merge_range): Adjust return value meaning.
3571 (ranger_cache::dump): Print GLOBAL RANGE header.
3573 2023-09-20 Aldy Hernandez <aldyh@redhat.com>
3575 * range-op-float.cc (foperator_unordered_ge::fold_range): Remove
3577 (foperator_unordered_gt::fold_range): Same.
3578 (foperator_unordered_lt::fold_range): Same.
3579 (foperator_unordered_le::fold_range): Same.
3581 2023-09-20 Jakub Jelinek <jakub@redhat.com>
3583 * builtins.h (type_to_class): Declare.
3584 * builtins.cc (type_to_class): No longer static. Return
3585 int rather than enum.
3586 * doc/extend.texi (__builtin_classify_type): Document.
3588 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3591 * internal-fn.cc (expand_fn_using_insn): Support undefined rtx value.
3592 * optabs.cc (maybe_legitimize_operand): Ditto.
3593 (can_reuse_operands_p): Ditto.
3594 * optabs.h (enum expand_operand_type): Ditto.
3595 (create_undefined_input_operand): Ditto.
3597 2023-09-20 Tobias Burnus <tobias@codesourcery.com>
3599 * gimplify.cc (gimplify_bind_expr): Call GOMP_alloc/free for
3600 'omp allocate' variables; move stack cleanup after other
3602 (omp_notice_variable): Process original decl when decl
3603 of the value-expression for a 'omp allocate' variable is passed.
3604 * omp-low.cc (scan_omp_1_op): Handle 'omp allocate' variables
3606 2023-09-20 Yanzhang Wang <yanzhang.wang@intel.com>
3608 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
3609 support simplifying vector int not only scalar int.
3611 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3613 * config/riscv/vector-iterators.md: Extend VLS floating-point.
3615 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3617 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator==): Fix bug.
3619 2023-09-20 Iain Sandoe <iain@sandoe.co.uk>
3622 (SUBTARGET_DRIVER_SELF_SPECS): Move handling of 'shared' into the same
3623 specs as 'dynamiclib'. (STARTFILE_SPEC): Handle 'shared'.
3625 2023-09-20 Richard Biener <rguenther@suse.de>
3627 PR tree-optimization/111489
3628 * params.opt (-param uninit-max-chain-len=): Raise default to 8.
3630 2023-09-20 Richard Biener <rguenther@suse.de>
3632 PR tree-optimization/111489
3633 * doc/invoke.texi (--param uninit-max-chain-len): Document.
3634 (--param uninit-max-num-chains): Likewise.
3635 * params.opt (-param=uninit-max-chain-len=): New.
3636 (-param=uninit-max-num-chains=): Likewise.
3637 * gimple-predicate-analysis.cc (MAX_NUM_CHAINS): Define to
3638 param_uninit_max_num_chains.
3639 (MAX_CHAIN_LEN): Define to param_uninit_max_chain_len.
3640 (uninit_analysis::init_use_preds): Avoid VLA.
3641 (uninit_analysis::init_from_phi_def): Likewise.
3642 (compute_control_dep_chain): Avoid using MAX_CHAIN_LEN in
3645 2023-09-20 Jakub Jelinek <jakub@redhat.com>
3647 * match.pd ((x << c) >> c): Use MAX_FIXED_MODE_SIZE instead of
3648 GET_MODE_PRECISION of TImode or DImode depending on whether
3649 TImode is supported scalar mode.
3650 * gimple-lower-bitint.cc (bitint_precision_kind): Likewise.
3651 * expr.cc (expand_expr_real_1): Likewise.
3652 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_stmt): Likewise.
3653 * ubsan.cc (ubsan_encode_value, ubsan_type_descriptor): Likewise.
3655 2023-09-20 Lehua Ding <lehua.ding@rivai.ai>
3657 * config/riscv/autovec-opt.md (*<optab>not<mode>): Move and rename.
3658 (*n<optab><mode>): Ditto.
3659 (*v<any_shiftrt:optab><any_extend:optab>trunc<mode>): Ditto.
3660 (*<any_shiftrt:optab>trunc<mode>): Ditto.
3661 (*narrow_<any_shiftrt:optab><any_extend:optab><mode>): Ditto.
3662 (*narrow_<any_shiftrt:optab><mode>_scalar): Ditto.
3663 (*single_widen_mult<any_extend:su><mode>): Ditto.
3664 (*single_widen_mul<any_extend:su><mode>): Ditto.
3665 (*single_widen_mult<mode>): Ditto.
3666 (*single_widen_mul<mode>): Ditto.
3667 (*dual_widen_fma<mode>): Ditto.
3668 (*dual_widen_fma<su><mode>): Ditto.
3669 (*single_widen_fma<mode>): Ditto.
3670 (*single_widen_fma<su><mode>): Ditto.
3671 (*dual_fma<mode>): Ditto.
3672 (*single_fma<mode>): Ditto.
3673 (*dual_fnma<mode>): Ditto.
3674 (*dual_widen_fnma<mode>): Ditto.
3675 (*single_fnma<mode>): Ditto.
3676 (*single_widen_fnma<mode>): Ditto.
3677 (*dual_fms<mode>): Ditto.
3678 (*dual_widen_fms<mode>): Ditto.
3679 (*single_fms<mode>): Ditto.
3680 (*single_widen_fms<mode>): Ditto.
3681 (*dual_fnms<mode>): Ditto.
3682 (*dual_widen_fnms<mode>): Ditto.
3683 (*single_fnms<mode>): Ditto.
3684 (*single_widen_fnms<mode>): Ditto.
3686 2023-09-20 Jakub Jelinek <jakub@redhat.com>
3689 * attribs.cc (decl_attributes): Don't warn on omp::directive attribute
3690 on vars or function decls if -fopenmp or -fopenmp-simd.
3692 2023-09-20 Lehua Ding <lehua.ding@rivai.ai>
3695 * config/riscv/autovec-opt.md: Add missed operand.
3697 2023-09-20 Omar Sandoval <osandov@osandov.com>
3700 * dwarf2out.cc (output_macinfo): Don't call optimize_macinfo_range if
3701 dwarf_split_debug_info.
3703 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3705 * config/riscv/riscv-v.cc (can_find_related_mode_p): New function.
3706 (vectorize_related_mode): Add VLS related modes.
3707 * config/riscv/vector-iterators.md: Extend VLS modes.
3709 2023-09-20 Surya Kumari Jangala <jskumari@linux.ibm.com>
3711 PR rtl-optimization/110071
3712 * ira-color.cc (improve_allocation): Consider cost of callee
3715 2023-09-20 mengqinggang <mengqinggang@loongson.cn>
3716 Xi Ruoyao <xry111@xry111.site>
3718 * configure: Regenerate.
3719 * configure.ac: Checking assembler for -mno-relax support.
3720 Disable relaxation when probing leb128 support.
3722 2023-09-20 Lulu Cheng <chenglulu@loongson.cn>
3724 * config.in: Regenerate.
3725 * config/loongarch/genopts/loongarch.opt.in: Add compilation option
3726 mrelax. And set the initial value of explicit-relocs according to the
3728 * config/loongarch/gnu-user.h: When compiling with -mno-relax, pass the
3729 --no-relax option to the linker.
3730 * config/loongarch/loongarch-driver.h (ASM_SPEC): When compiling with
3731 -mno-relax, pass the -mno-relax option to the assembler.
3732 * config/loongarch/loongarch-opts.h (HAVE_AS_MRELAX_OPTION): Define macro.
3733 * config/loongarch/loongarch.opt: Regenerate.
3734 * configure: Regenerate.
3735 * configure.ac: Add detection of support for binutils relax function.
3737 2023-09-19 Ben Boeckel <ben.boeckel@kitware.com>
3739 * doc/invoke.texi: Document -fdeps-format=, -fdeps-file=, and
3740 -fdeps-target= flags.
3741 * gcc.cc: add defaults for -fdeps-target= and -fdeps-file= when
3742 only -fdeps-format= is specified.
3743 * json.h: Add a TODO item to refactor out to share with
3746 2023-09-19 Ben Boeckel <ben.boeckel@kitware.com>
3747 Jason Merrill <jason@redhat.com>
3749 * gcc.cc (join_spec_func): Add a spec function to join all
3752 2023-09-19 Patrick O'Neill <patrick@rivosinc.com>
3754 * config/riscv/riscv.cc (riscv_legitimize_const_move): Eliminate
3755 src_op_0 var to avoid rtl check error.
3757 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
3759 * range-op-float.cc (frelop_early_resolve): Clean-up and remove
3761 (operator_not_equal::fold_range): Handle VREL_EQ.
3762 (operator_lt::fold_range): Remove special casing for VREL_EQ.
3763 (operator_gt::fold_range): Same.
3764 (foperator_unordered_equal::fold_range): Same.
3766 2023-09-19 Javier Martinez <javier.martinez.bugzilla@gmail.com>
3768 * doc/extend.texi: Document attributes hot, cold on C++ types.
3770 2023-09-19 Pat Haugen <pthaugen@linux.ibm.com>
3772 * config/rs6000/rs6000.cc (rs6000_rtx_costs): Check whether the
3773 modulo instruction is disabled.
3774 * config/rs6000/rs6000.h (RS6000_DISABLE_SCALAR_MODULO): New.
3775 * config/rs6000/rs6000.md (mod<mode>3, *mod<mode>3): Check it.
3776 (define_expand umod<mode>3): New.
3777 (define_insn umod<mode>3): Rename to *umod<mode>3 and check if the modulo
3778 instruction is disabled.
3779 (umodti3, modti3): Check if the modulo instruction is disabled.
3781 2023-09-19 Gaius Mulley <gaiusmod2@gmail.com>
3783 * doc/gm2.texi (fdebug-builtins): Correct description.
3785 2023-09-19 Jeff Law <jlaw@ventanamicro.com>
3787 * config/iq2000/predicates.md (uns_arith_constant): New predicate.
3788 * config/iq2000/iq2000.md (rotrsi3): Use it.
3790 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
3792 * range-op-float.cc (operator_lt::op1_range): Remove known_isnan check.
3793 (operator_lt::op2_range): Same.
3794 (operator_le::op1_range): Same.
3795 (operator_le::op2_range): Same.
3796 (operator_gt::op1_range): Same.
3797 (operator_gt::op2_range): Same.
3798 (operator_ge::op1_range): Same.
3799 (operator_ge::op2_range): Same.
3800 (foperator_unordered_lt::op1_range): Same.
3801 (foperator_unordered_lt::op2_range): Same.
3802 (foperator_unordered_le::op1_range): Same.
3803 (foperator_unordered_le::op2_range): Same.
3804 (foperator_unordered_gt::op1_range): Same.
3805 (foperator_unordered_gt::op2_range): Same.
3806 (foperator_unordered_ge::op1_range): Same.
3807 (foperator_unordered_ge::op2_range): Same.
3809 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
3811 * value-range.h (frange::update_nan): New.
3813 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
3815 * range-op-float.cc (operator_not_equal::op2_range): New.
3816 * range-op-mixed.h: Add operator_not_equal::op2_range.
3818 2023-09-19 Andrew MacLeod <amacleod@redhat.com>
3820 PR tree-optimization/110080
3821 PR tree-optimization/110249
3822 * tree-vrp.cc (remove_unreachable::final_p): New.
3823 (remove_unreachable::maybe_register): Rename from
3824 maybe_register_block and call early or final routine.
3825 (fully_replaceable): New.
3826 (remove_unreachable::handle_early): New.
3827 (remove_unreachable::remove_and_update_globals): Remove
3828 non-final processing.
3829 (rvrp_folder::rvrp_folder): Add final flag to constructor.
3830 (rvrp_folder::post_fold_bb): Remove unreachable registration.
3831 (rvrp_folder::pre_fold_stmt): Move unreachable processing to here.
3832 (execute_ranger_vrp): Adjust some call parameters.
3834 2023-09-19 Richard Biener <rguenther@suse.de>
3837 * tree-pretty-print.h (op_symbol_code): Add defaulted flags
3839 * tree-pretty-print.cc (op_symbol): Likewise.
3840 (op_symbol_code): Print TDF_GIMPLE variant if requested.
3841 * gimple-pretty-print.cc (dump_binary_rhs): Pass flags to
3843 (dump_gimple_cond): Likewise.
3845 2023-09-19 Thomas Schwinge <thomas@codesourcery.com>
3846 Pan Li <pan2.li@intel.com>
3848 * tree-streamer.h (bp_unpack_machine_mode): If
3849 'ib->file_data->mode_table' not available, apply 1-to-1 mapping.
3851 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3853 * config/riscv/riscv.cc (riscv_can_change_mode_class): Block unordered VLA and VLS modes.
3855 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3857 * config/riscv/autovec.md: Extend VLS modes.
3858 * config/riscv/vector.md: Ditto.
3860 2023-09-19 Richard Biener <rguenther@suse.de>
3862 PR tree-optimization/111465
3863 * tree-ssa-threadupdate.cc (fwd_jt_path_registry::thread_block_1):
3864 Cancel the path when a EDGE_NO_COPY_SRC_BLOCK became non-empty.
3866 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3868 * config/riscv/autovec.md: Extend VLS floating-point modes.
3869 * config/riscv/vector.md: Ditto.
3871 2023-09-19 Jakub Jelinek <jakub@redhat.com>
3873 * match.pd ((x << c) >> c): Don't call build_nonstandard_integer_type
3874 nor check type_has_mode_precision_p for width larger than [TD]Imode
3876 (a ? CST1 : CST2): Don't use build_nonstandard_type, just convert
3877 to type. Use boolean_true_node instead of
3878 constant_boolean_node (true, boolean_type_node). Formatting fixes.
3880 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3882 * config/riscv/autovec.md: Add VLS modes.
3883 * config/riscv/vector.md: Ditto.
3885 2023-09-19 Jakub Jelinek <jakub@redhat.com>
3887 * tree.cc (build_bitint_type): Assert precision is not 0, or
3889 (signed_or_unsigned_type_for): Return INTEGER_TYPE for signed variant
3890 of unsigned _BitInt(1).
3892 2023-09-19 Lehua Ding <lehua.ding@rivai.ai>
3894 * config/riscv/autovec-opt.md (*<optab>_fma<mode>):
3895 Removed old combine patterns.
3896 (*single_<optab>mult_plus<mode>): Ditto.
3897 (*double_<optab>mult_plus<mode>): Ditto.
3898 (*sign_zero_extend_fma): Ditto.
3899 (*zero_sign_extend_fma): Ditto.
3900 (*double_widen_fma<mode>): Ditto.
3901 (*single_widen_fma<mode>): Ditto.
3902 (*double_widen_fnma<mode>): Ditto.
3903 (*single_widen_fnma<mode>): Ditto.
3904 (*double_widen_fms<mode>): Ditto.
3905 (*single_widen_fms<mode>): Ditto.
3906 (*double_widen_fnms<mode>): Ditto.
3907 (*single_widen_fnms<mode>): Ditto.
3908 (*reduc_plus_scal_<mode>): Adjust name.
3909 (*widen_reduc_plus_scal_<mode>): Adjust name.
3910 (*dual_widen_fma<mode>): New combine pattern.
3911 (*dual_widen_fmasu<mode>): Ditto.
3912 (*dual_widen_fmaus<mode>): Ditto.
3913 (*dual_fma<mode>): Ditto.
3914 (*single_fma<mode>): Ditto.
3915 (*dual_fnma<mode>): Ditto.
3916 (*single_fnma<mode>): Ditto.
3917 (*dual_fms<mode>): Ditto.
3918 (*single_fms<mode>): Ditto.
3919 (*dual_fnms<mode>): Ditto.
3920 (*single_fnms<mode>): Ditto.
3921 * config/riscv/autovec.md (fma<mode>4):
3922 Reafctor fma pattern.
3923 (*fma<VI:mode><P:mode>): Removed.
3924 (fnma<mode>4): Reafctor.
3925 (*fnma<VI:mode><P:mode>): Removed.
3926 (*fma<VF:mode><P:mode>): Removed.
3927 (*fnma<VF:mode><P:mode>): Removed.
3928 (fms<mode>4): Reafctor.
3929 (*fms<VF:mode><P:mode>): Removed.
3930 (fnms<mode>4): Reafctor.
3931 (*fnms<VF:mode><P:mode>): Removed.
3932 * config/riscv/riscv-protos.h (prepare_ternary_operands):
3934 * config/riscv/riscv-v.cc (prepare_ternary_operands): Refactor.
3935 * config/riscv/vector.md (*pred_mul_plus<mode>_undef): New pattern.
3936 (*pred_mul_plus<mode>): Removed.
3937 (*pred_mul_plus<mode>_scalar): Removed.
3938 (*pred_mul_plus<mode>_extended_scalar): Removed.
3939 (*pred_minus_mul<mode>_undef): New pattern.
3940 (*pred_minus_mul<mode>): Removed.
3941 (*pred_minus_mul<mode>_scalar): Removed.
3942 (*pred_minus_mul<mode>_extended_scalar): Removed.
3943 (*pred_mul_<optab><mode>_undef): New pattern.
3944 (*pred_mul_<optab><mode>): Removed.
3945 (*pred_mul_<optab><mode>_scalar): Removed.
3946 (*pred_mul_neg_<optab><mode>_undef): New pattern.
3947 (*pred_mul_neg_<optab><mode>): Removed.
3948 (*pred_mul_neg_<optab><mode>_scalar): Removed.
3950 2023-09-19 Tsukasa OI <research_trasio@irq.a4lg.com>
3952 * config/riscv/riscv-vector-builtins.cc
3953 (builtin_decl, expand_builtin): Replace SVE with RVV.
3955 2023-09-19 Tsukasa OI <research_trasio@irq.a4lg.com>
3957 * config/riscv/t-riscv: Add dependencies for riscv-builtins.cc,
3958 riscv-cmo.def and riscv-scalar-crypto.def.
3960 2023-09-18 Pan Li <pan2.li@intel.com>
3962 * config/riscv/autovec.md: Extend to vls mode.
3964 2023-09-18 Pan Li <pan2.li@intel.com>
3966 * config/riscv/autovec.md: Bugfix.
3967 * config/riscv/riscv-protos.h (SCALAR_MOVE_MERGED_OP): New enum.
3969 2023-09-18 Andrew Pinski <apinski@marvell.com>
3971 PR tree-optimization/111442
3972 * match.pd (zero_one_valued_p): Have the bit_and match not be
3975 2023-09-18 Andrew Pinski <apinski@marvell.com>
3977 PR tree-optimization/111435
3978 * match.pd (zero_one_valued_p): Don't do recursion
3981 2023-09-18 Iain Sandoe <iain@sandoe.co.uk>
3983 * config/darwin-protos.h (enum darwin_external_toolchain): New.
3984 * config/darwin.cc (DSYMUTIL_VERSION): New.
3985 (darwin_override_options): Choose the default debug DWARF version
3986 depending on the configured dsymutil version.
3988 2023-09-18 Iain Sandoe <iain@sandoe.co.uk>
3990 * configure: Regenerate.
3991 * configure.ac: Handle explict disable of stdlib option, set
3992 defaults for Darwin.
3994 2023-09-18 Andrew Pinski <apinski@marvell.com>
3996 PR tree-optimization/111431
3997 * match.pd (`(a == CST) & a`): New pattern.
3999 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4001 * config/riscv/riscv-selftests.cc (run_broadcast_selftests): Adapt selftests.
4002 * config/riscv/vector.md (@vec_duplicate<mode>): Remove.
4004 2023-09-18 Wilco Dijkstra <wilco.dijkstra@arm.com>
4007 * config/aarch64/aarch64.cc (aarch64_internal_mov_immediate)
4008 Add support for immediates using shifted ORR/BIC.
4009 (aarch64_split_dimode_const_store): Apply if we save one instruction.
4010 * config/aarch64/aarch64.md (<LOGICAL:optab>_<SHIFT:optab><mode>3):
4011 Make pattern global.
4013 2023-09-18 Wilco Dijkstra <wilco.dijkstra@arm.com>
4015 * config/aarch64/aarch64-cores.def (neoverse-n1): Place before ares.
4016 (neoverse-v1): Place before zeus.
4017 (neoverse-v2): Place before demeter.
4018 * config/aarch64/aarch64-tune.md: Regenerate.
4020 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4022 * config/riscv/autovec.md: Add VLS modes.
4023 * config/riscv/vector-iterators.md: Ditto.
4024 * config/riscv/vector.md: Ditto.
4026 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4028 * config/riscv/riscv-vsetvl.cc (vlmul_for_greatest_sew_second_ratio): New function.
4029 * config/riscv/riscv-vsetvl.def (DEF_SEW_LMUL_FUSE_RULE): Fix bug.
4031 2023-09-18 Richard Biener <rguenther@suse.de>
4033 PR tree-optimization/111294
4034 * tree-ssa-threadbackward.cc (back_threader_profitability::m_name):
4036 (back_threader::find_paths_to_names): Adjust.
4037 (back_threader::maybe_thread_block): Likewise.
4038 (back_threader_profitability::possibly_profitable_path_p): Remove
4039 code applying extra costs to copies PHIs.
4041 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4043 * config/riscv/autovec.md: Extend VLS modes.
4044 * config/riscv/vector.md: Ditto.
4046 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4048 * config/riscv/vector.md (mov<mode>): New pattern.
4049 (*mov<mode>_mem_to_mem): Ditto.
4050 (*mov<mode>): Ditto.
4051 (@mov<VLS_AVL_REG:mode><P:mode>_lra): Ditto.
4052 (*mov<VLS_AVL_REG:mode><P:mode>_lra): Ditto.
4053 (*mov<mode>_vls): Ditto.
4054 (movmisalign<mode>): Ditto.
4055 (@vec_duplicate<mode>): Ditto.
4056 * config/riscv/autovec-vls.md: Removed.
4058 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4061 * config/riscv/autovec.md: Add VLS modes.
4063 2023-09-18 Jason Merrill <jason@redhat.com>
4065 * doc/gty.texi: Add discussion of cache vs. deletable.
4067 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4069 * config/riscv/autovec-vls.md (<optab><mode>3): Deleted.
4070 (copysign<mode>3): Ditto.
4071 (xorsign<mode>3): Ditto.
4072 (<optab><mode>2): Ditto.
4073 * config/riscv/autovec.md: Extend VLS modes.
4075 2023-09-18 Jiufu Guo <guojiufu@linux.ibm.com>
4077 PR middle-end/111303
4078 * match.pd ((t * 2) / 2): Update pattern.
4080 2023-09-17 Ajit Kumar Agarwal <aagarwa1@linux.ibm.com>
4082 * config/rs6000/vsx.md (*vctzlsbb_zext_<mode>): New define_insn.
4084 2023-09-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4087 * config/riscv/autovec.md (@vec_extract<mode><vel>): Remove @.
4088 (vec_extract<mode><vel>): Ditto.
4089 * config/riscv/riscv-vsetvl.cc (emit_vsetvl_insn): Fix bug.
4090 (pass_vsetvl::local_eliminate_vsetvl_insn): Fix bug.
4091 * config/riscv/riscv.cc (riscv_legitimize_move): Expand VLS mode to scalar mode move.
4093 2023-09-16 Tsukasa OI <research_trasio@irq.a4lg.com>
4095 * config/riscv/crypto.md (riscv_sha256sig0_<mode>,
4096 riscv_sha256sig1_<mode>, riscv_sha256sum0_<mode>,
4097 riscv_sha256sum1_<mode>, riscv_sm3p0_<mode>, riscv_sm3p1_<mode>,
4098 riscv_sm4ed_<mode>, riscv_sm4ks_<mode>): Remove and replace with
4099 new insn/expansions.
4100 (SHA256_OP, SM3_OP, SM4_OP): New iterators.
4101 (sha256_op, sm3_op, sm4_op): New attributes for iteration.
4102 (*riscv_<sha256_op>_si): New raw instruction for RV32.
4103 (*riscv_<sm3_op>_si): Ditto.
4104 (*riscv_<sm4_op>_si): Ditto.
4105 (riscv_<sha256_op>_di_extended): New base instruction for RV64.
4106 (riscv_<sm3_op>_di_extended): Ditto.
4107 (riscv_<sm4_op>_di_extended): Ditto.
4108 (riscv_<sha256_op>_si): New common instruction expansion.
4109 (riscv_<sm3_op>_si): Ditto.
4110 (riscv_<sm4_op>_si): Ditto.
4111 * config/riscv/riscv-builtins.cc: Add availability "crypto_zknh",
4112 "crypto_zksh" and "crypto_zksed". Remove availability
4113 "crypto_zksh{32,64}" and "crypto_zksed{32,64}".
4114 * config/riscv/riscv-ftypes.def: Remove unused function type.
4115 * config/riscv/riscv-scalar-crypto.def: Make SHA-256, SM3 and SM4
4116 intrinsics to operate on uint32_t.
4118 2023-09-16 Tsukasa OI <research_trasio@irq.a4lg.com>
4120 * config/riscv/riscv-builtins.cc (RISCV_ATYPE_UQI): New for
4121 uint8_t. (RISCV_ATYPE_UHI): New for uint16_t.
4122 (RISCV_ATYPE_QI, RISCV_ATYPE_HI, RISCV_ATYPE_SI, RISCV_ATYPE_DI):
4123 Removed as no longer used.
4124 (RISCV_ATYPE_UDI): New for uint64_t.
4125 * config/riscv/riscv-cmo.def: Make types unsigned for not working
4126 "zicbop_cbo_prefetchi" and working bit manipulation clmul builtin
4127 argument/return types.
4128 * config/riscv/riscv-ftypes.def: Make bit manipulation, round
4129 number and shift amount types unsigned.
4130 * config/riscv/riscv-scalar-crypto.def: Ditto.
4132 2023-09-16 Pan Li <pan2.li@intel.com>
4134 * config/riscv/autovec-vls.md (xorsign<mode>3): New pattern.
4136 2023-09-15 Fei Gao <gaofei@eswincomputing.com>
4138 * config/riscv/predicates.md: Restrict predicate
4139 to allow 'reg' only.
4141 2023-09-15 Andrew Pinski <apinski@marvell.com>
4143 * match.pd (zero_one_valued_p): Match a cast from a zero_one_valued_p.
4144 Also match `a & zero_one_valued_p` too.
4146 2023-09-15 Andrew Pinski <apinski@marvell.com>
4148 PR tree-optimization/111414
4149 * match.pd (`(1 >> X) != 0`): Check to see if
4150 the integer_onep was an integral type (not a vector type).
4152 2023-09-15 Andrew MacLeod <amacleod@redhat.com>
4154 * gimple-range-fold.cc (fold_using_range::range_of_phi): Always
4155 run phi analysis, and do it before loop analysis.
4157 2023-09-15 Andrew MacLeod <amacleod@redhat.com>
4159 * gimple-range-fold.cc (fold_using_range::range_of_phi): Fix
4162 2023-09-15 Qing Zhao <qing.zhao@oracle.com>
4164 PR tree-optimization/111407
4165 * tree-ssa-math-opts.cc (convert_mult_to_widen): Avoid the transform
4166 when one of the operands is subject to abnormal coalescing.
4168 2023-09-15 Lehua Ding <lehua.ding@rivai.ai>
4170 * config/riscv/riscv-protos.h (enum insn_flags): Change name.
4171 (enum insn_type): Ditto.
4172 * config/riscv/riscv-v.cc (get_mask_mode_from_insn_flags): Removed.
4173 (emit_vlmax_insn): Adjust.
4174 (emit_nonvlmax_insn): Adjust.
4175 (emit_vlmax_insn_lra): Adjust.
4177 2023-09-15 Lehua Ding <lehua.ding@rivai.ai>
4179 * config/riscv/autovec-opt.md: Adjust.
4180 * config/riscv/autovec.md: Ditto.
4181 * config/riscv/riscv-protos.h (enum class): Delete enum reduction_type.
4182 (expand_reduction): Adjust expand_reduction prototype.
4183 * config/riscv/riscv-v.cc (need_mask_operand_p): New helper function.
4184 (expand_reduction): Refactor expand_reduction.
4186 2023-09-15 Richard Sandiford <richard.sandiford@arm.com>
4189 * config/aarch64/aarch64.cc (aarch64_operands_ok_for_ldpstp): Require
4190 the lower memory access to a mem-pair operand.
4192 2023-09-15 Yang Yujie <yangyujie@loongson.cn>
4194 * config.gcc: Pass the default ABI via TM_MULTILIB_CONFIG.
4195 * config/loongarch/loongarch-driver.h: Invoke MLIB_SELF_SPECS
4196 before the driver canonicalization routines.
4197 * config/loongarch/loongarch.h: Move definitions of CC1_SPEC etc.
4198 to loongarch-driver.h
4199 * config/loongarch/t-linux: Move multilib-related definitions to
4201 * config/loongarch/t-multilib: New file. Inject library build
4202 options obtained from --with-multilib-list.
4203 * config/loongarch/t-loongarch: Same.
4205 2023-09-15 Lehua Ding <lehua.ding@rivai.ai>
4208 * config/riscv/autovec-opt.md (*reduc_plus_scal_<mode>):
4209 New combine pattern.
4210 (*fold_left_widen_plus_<mode>): Ditto.
4211 (*mask_len_fold_left_widen_plus_<mode>): Ditto.
4212 * config/riscv/autovec.md (reduc_plus_scal_<mode>):
4213 Change from define_expand to define_insn_and_split.
4214 (fold_left_plus_<mode>): Ditto.
4215 (mask_len_fold_left_plus_<mode>): Ditto.
4216 * config/riscv/riscv-v.cc (expand_reduction):
4217 Support widen reduction.
4218 * config/riscv/vector-iterators.md (UNSPEC_WREDUC_SUM):
4219 Add new iterators and attrs.
4221 2023-09-14 David Malcolm <dmalcolm@redhat.com>
4223 * diagnostic-event-id.h (diagnostic_thread_id_t): New typedef.
4224 * diagnostic-format-sarif.cc (class sarif_thread_flow): New.
4225 (sarif_thread_flow::sarif_thread_flow): New.
4226 (sarif_builder::make_code_flow_object): Reimplement, creating
4227 per-thread threadFlow objects, populating them with the relevant
4229 (sarif_builder::make_thread_flow_object): Delete, moving the
4230 code into sarif_builder::make_code_flow_object.
4231 (sarif_builder::make_thread_flow_location_object): Add
4232 "path_event_idx" param. Use it to set "executionOrder"
4234 * diagnostic-path.h (diagnostic_event::get_thread_id): New
4236 (class diagnostic_thread): New.
4237 (diagnostic_path::num_threads): New pure-virtual vfunc.
4238 (diagnostic_path::get_thread): New pure-virtual vfunc.
4239 (diagnostic_path::multithreaded_p): New decl.
4240 (simple_diagnostic_event::simple_diagnostic_event): Add optional
4242 (simple_diagnostic_event::get_thread_id): New accessor.
4243 (simple_diagnostic_event::m_thread_id): New.
4244 (class simple_diagnostic_thread): New.
4245 (simple_diagnostic_path::simple_diagnostic_path): Move definition
4247 (simple_diagnostic_path::num_threads): New.
4248 (simple_diagnostic_path::get_thread): New.
4249 (simple_diagnostic_path::add_thread): New.
4250 (simple_diagnostic_path::add_thread_event): New.
4251 (simple_diagnostic_path::m_threads): New.
4252 * diagnostic-show-locus.cc (layout::layout): Add pretty_printer
4253 param for overriding the context's printer.
4254 (diagnostic_show_locus): Likwise.
4255 * diagnostic.cc (simple_diagnostic_path::simple_diagnostic_path):
4256 Move here from diagnostic-path.h. Add main thread.
4257 (simple_diagnostic_path::num_threads): New.
4258 (simple_diagnostic_path::get_thread): New.
4259 (simple_diagnostic_path::add_thread): New.
4260 (simple_diagnostic_path::add_thread_event): New.
4261 (simple_diagnostic_event::simple_diagnostic_event): Add thread_id
4262 param and use it to initialize m_thread_id. Reformat.
4263 * diagnostic.h: Add pretty_printer param for overriding the
4265 * tree-diagnostic-path.cc: Add #define INCLUDE_VECTOR.
4266 (can_consolidate_events): Compare thread ids.
4267 (class per_thread_summary): New.
4268 (event_range::event_range): Add per_thread_summary arg.
4269 (event_range::print): Add "pp" param and use it rather than dc's
4271 (event_range::m_thread_id): New field.
4272 (event_range::m_per_thread_summary): New field.
4273 (path_summary::multithreaded_p): New.
4274 (path_summary::get_events_for_thread_id): New.
4275 (path_summary::m_per_thread_summary): New field.
4276 (path_summary::m_thread_id_to_events): New field.
4277 (path_summary::get_or_create_events_for_thread_id): New.
4278 (path_summary::path_summary): Create per_thread_summary instances
4279 as needed and associate the event_range instances with them.
4280 (base_indent): Move here from print_path_summary_as_text.
4281 (per_frame_indent): Likewise.
4282 (class thread_event_printer): New, adapted from parts of
4283 print_path_summary_as_text.
4284 (print_path_summary_as_text): Make static. Reimplement to
4285 moving most of existing code to class thread_event_printer,
4286 capturing state as per-thread as appropriate.
4287 (default_tree_diagnostic_path_printer): Add missing 'break' on
4290 2023-09-14 David Malcolm <dmalcolm@redhat.com>
4292 * dwarf2cfi.cc (dwarf2cfi_cc_finalize): New.
4293 * dwarf2out.h (dwarf2cfi_cc_finalize): New decl.
4294 * ggc-common.cc (ggc_mark_roots): Multiply by rti->nelt when
4295 clearing the deletable gcc_root_tab_t.
4296 (ggc_common_finalize): New.
4297 * ggc.h (ggc_common_finalize): New decl.
4298 * toplev.cc (toplev::finalize): Call dwarf2cfi_cc_finalize and
4299 ggc_common_finalize.
4301 2023-09-14 Max Filippov <jcmvbkbc@gmail.com>
4303 * config/xtensa/predicates.md (xtensa_cstoresi_operator): Add
4304 unsigned comparisons.
4305 * config/xtensa/xtensa.cc (xtensa_expand_scc): Add code
4306 generation of salt/saltu instructions.
4307 * config/xtensa/xtensa.h (TARGET_SALT): New macro.
4308 * config/xtensa/xtensa.md (salt, saltu): New instruction
4311 2023-09-14 Vladimir N. Makarov <vmakarov@redhat.com>
4313 * ira-costs.cc (find_costs_and_classes): Decrease memory cost
4316 2023-09-14 Lehua Ding <lehua.ding@rivai.ai>
4318 * config/riscv/autovec.md: Change rtx code to unspec.
4319 * config/riscv/riscv-protos.h (expand_reduction): Change prototype.
4320 * config/riscv/riscv-v.cc (expand_reduction): Change prototype.
4321 * config/riscv/riscv-vector-builtins-bases.cc (class widen_reducop):
4323 (class widen_freducop): Removed.
4324 * config/riscv/vector-iterators.md (minu): Add reduc unspec, iterators, attrs.
4325 * config/riscv/vector.md (@pred_reduc_<reduc><mode>): Change name.
4326 (@pred_<reduc_op><mode>): New name.
4327 (@pred_widen_reduc_plus<v_su><mode>): Change name.
4328 (@pred_reduc_plus<order><mode>): Change name.
4329 (@pred_widen_reduc_plus<order><mode>): Change name.
4331 2023-09-14 Lehua Ding <lehua.ding@rivai.ai>
4333 * config/riscv/riscv-v.cc (expand_reduction): Adjust call.
4334 * config/riscv/riscv-vector-builtins-bases.cc: Adjust call.
4335 * config/riscv/vector-iterators.md: New iterators and attrs.
4336 * config/riscv/vector.md (@pred_reduc_<reduc><VQI:mode><VQI_LMUL1:mode>):
4338 (@pred_reduc_<reduc><VHI:mode><VHI_LMUL1:mode>): Removed.
4339 (@pred_reduc_<reduc><VSI:mode><VSI_LMUL1:mode>): Removed.
4340 (@pred_reduc_<reduc><VDI:mode><VDI_LMUL1:mode>): Removed.
4341 (@pred_reduc_<reduc><mode>): Added.
4342 (@pred_widen_reduc_plus<v_su><VQI:mode><VHI_LMUL1:mode>): Removed.
4343 (@pred_widen_reduc_plus<v_su><VHI:mode><VSI_LMUL1:mode>): Removed.
4344 (@pred_widen_reduc_plus<v_su><mode>): Added.
4345 (@pred_widen_reduc_plus<v_su><VSI:mode><VDI_LMUL1:mode>): Removed.
4346 (@pred_reduc_<reduc><VHF:mode><VHF_LMUL1:mode>): Removed.
4347 (@pred_reduc_<reduc><VSF:mode><VSF_LMUL1:mode>): Removed.
4348 (@pred_reduc_<reduc><VDF:mode><VDF_LMUL1:mode>): Removed.
4349 (@pred_reduc_plus<order><VHF:mode><VHF_LMUL1:mode>): Removed.
4350 (@pred_reduc_plus<order><VSF:mode><VSF_LMUL1:mode>): Removed.
4351 (@pred_reduc_plus<order><mode>): Added.
4352 (@pred_reduc_plus<order><VDF:mode><VDF_LMUL1:mode>): Removed.
4353 (@pred_widen_reduc_plus<order><VHF:mode><VSF_LMUL1:mode>): Removed.
4354 (@pred_widen_reduc_plus<order><VSF:mode><VDF_LMUL1:mode>): Removed.
4355 (@pred_widen_reduc_plus<order><mode>): Added.
4357 2023-09-14 Richard Sandiford <richard.sandiford@arm.com>
4359 * config/aarch64/aarch64.cc (aarch64_vector_costs::analyze_loop_info):
4360 Move WHILELO handling to...
4361 (aarch64_vector_costs::finish_cost): ...here. Check whether the
4362 vectorizer has decided to use a predicated loop.
4364 2023-09-14 Andrew Pinski <apinski@marvell.com>
4366 PR tree-optimization/106164
4367 * match.pd (`(X CMP1 CST1) AND/IOR (X CMP2 CST2)`):
4368 Expand to support constants that are off by one.
4370 2023-09-14 Andrew Pinski <apinski@marvell.com>
4372 * genmatch.cc (parser::parse_result): For an else clause
4373 of an if statement inside a switch, error out explictly.
4375 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4377 * config/riscv/autovec-opt.md: Add VLS mask modes.
4378 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): Remove @.
4379 (vcond_mask_<mode><vm>): Add VLS mask modes.
4380 * config/riscv/vector.md: Ditto.
4382 2023-09-14 Richard Biener <rguenther@suse.de>
4384 PR tree-optimization/111294
4385 * tree-ssa-forwprop.cc (pass_forwprop::execute): Track
4386 operands that eventually become dead and use simple_dce_from_worklist
4387 to remove their definitions if they did so.
4389 2023-09-14 Richard Sandiford <richard.sandiford@arm.com>
4391 * config/aarch64/aarch64-sve.md (@aarch64_vec_duplicate_vq<mode>_le):
4392 Accept all nonimmediate_operands, but keep the existing constraints.
4393 If the instruction is split before RA, load invalid addresses into
4394 a temporary register.
4395 * config/aarch64/predicates.md (aarch64_sve_dup_ld1rq_operand): Delete.
4397 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4400 * config/riscv/riscv-vsetvl.cc (avl_info::operator==): Fix ICE.
4401 (vector_insn_info::global_merge): Ditto.
4402 (vector_insn_info::get_avl_or_vl_reg): Ditto.
4404 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4406 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::global_eliminate_vsetvl_insn): Format it.
4408 2023-09-14 Lulu Cheng <chenglulu@loongson.cn>
4410 * config/loongarch/loongarch-def.c: Modify the default value of
4413 2023-09-14 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
4415 * config/xtensa/xtensa.cc (xtensa_expand_scc):
4416 Revert the changes from the last patch, as the work in the RTL
4417 expansion pass is too far to determine the physical registers.
4418 * config/xtensa/xtensa.md (*eqne_INT_MIN): Ditto.
4419 (eq_zero_NSA, eqne_zero, *eqne_zero_masked_bits): New patterns.
4421 2023-09-14 Lulu Cheng <chenglulu@loongson.cn>
4424 * config/loongarch/loongarch.md: Fix bug of '<optab>di3_fake'.
4426 2023-09-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4428 * config/riscv/autovec.md (vec_extract<mode><vel>): Add VLS modes.
4429 (@vec_extract<mode><vel>): Ditto.
4430 * config/riscv/vector.md: Ditto
4432 2023-09-13 Andrew Pinski <apinski@marvell.com>
4434 * match.pd (`X <= MAX(X, Y)`):
4435 Move before `MIN (X, C1) < C2` pattern.
4437 2023-09-13 Andrew Pinski <apinski@marvell.com>
4439 PR tree-optimization/111364
4440 * match.pd (`MIN (X, Y) == X`): Extend
4441 to min/lt, min/ge, max/gt, max/le.
4443 2023-09-13 Andrew Pinski <apinski@marvell.com>
4445 PR tree-optimization/111345
4446 * match.pd (`Y > (X % Y)`): Merge
4448 (`(X % Y) < Y`): Pattern by adding `:c`
4451 2023-09-13 Richard Biener <rguenther@suse.de>
4453 PR tree-optimization/111387
4454 * tree-vect-slp.cc (vect_get_and_check_slp_defs): Check
4455 EDGE_DFS_BACK when doing BB vectorization.
4456 (vect_slp_function): Use rev_post_order_and_mark_dfs_back_seme
4457 to compute RPO and mark backedges.
4459 2023-09-13 Lehua Ding <lehua.ding@rivai.ai>
4461 * config/riscv/autovec-opt.md (*cond_<mulh_table><mode>3_highpart):
4462 New combine pattern.
4463 * config/riscv/autovec.md (smul<mode>3_highpart): Mrege smul and umul.
4464 (<mulh_table><mode>3_highpart): Merged pattern.
4465 (umul<mode>3_highpart): Mrege smul and umul.
4466 * config/riscv/vector-iterators.md (umul): New iterators.
4467 (UNSPEC_VMULHU): New iterators.
4469 2023-09-13 Lehua Ding <lehua.ding@rivai.ai>
4471 * config/riscv/autovec-opt.md (*cond_v<any_shiftrt:optab><any_extend:optab>trunc<mode>):
4472 New combine pattern.
4473 (*cond_<any_shiftrt:optab>trunc<mode>): Ditto.
4475 2023-09-13 Lehua Ding <lehua.ding@rivai.ai>
4477 * config/riscv/autovec-opt.md (*copysign<mode>_neg): Move.
4478 (*cond_copysign<mode>): New combine pattern.
4479 * config/riscv/riscv-v.cc (needs_fp_rounding): Extend.
4481 2023-09-13 Richard Biener <rguenther@suse.de>
4483 PR tree-optimization/111397
4484 * tree-ssa-propagate.cc (may_propagate_copy): Change optional
4485 argument to specify whether the PHI destination doesn't flow in
4486 from an abnormal PHI.
4487 (propagate_value): Adjust.
4488 * tree-ssa-forwprop.cc (pass_forwprop::execute): Indicate abnormal
4490 * tree-ssa-sccvn.cc (eliminate_dom_walker::before_dom_children):
4492 (process_bb): Likewise.
4494 2023-09-13 Pan Li <pan2.li@intel.com>
4497 * config/riscv/riscv.cc (riscv_emit_frm_mode_set): Bugfix.
4499 2023-09-13 Jiufu Guo <guojiufu@linux.ibm.com>
4501 PR tree-optimization/111303
4502 * match.pd ((X - N * M) / N): Add undefined_p checking.
4503 ((X + N * M) / N): Likewise.
4504 ((X + C) div_rshift N): Likewise.
4506 2023-09-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4509 * config/riscv/autovec.md (vcond_mask_<mode><mode>): New pattern.
4511 2023-09-12 Martin Jambor <mjambor@suse.cz>
4513 * dbgcnt.def (form_fma): New.
4514 * tree-ssa-math-opts.cc: Include dbgcnt.h.
4515 (convert_mult_to_fma): Bail out if the debug counter say so.
4517 2023-09-12 Edwin Lu <ewlu@rivosinc.com>
4519 * config/riscv/autovec-opt.md: Update type
4520 * config/riscv/riscv.cc (riscv_sched_variable_issue): Enable assert
4522 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
4524 * config/aarch64/aarch64.cc (aarch64_save_regs_above_locals_p):
4526 (aarch64_layout_frame): Use it to decide whether locals should
4527 go above or below the saved registers.
4528 (aarch64_expand_prologue): Update stack layout comment.
4529 Emit a stack tie after the final adjustment.
4531 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
4533 * config/aarch64/aarch64.h (aarch64_frame::saved_regs_size)
4534 (aarch64_frame::below_hard_fp_saved_regs_size): Delete.
4535 * config/aarch64/aarch64.cc (aarch64_layout_frame): Update accordingly.
4537 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
4539 * config/aarch64/aarch64.h (aarch64_frame::sve_save_and_probe)
4540 (aarch64_frame::hard_fp_save_and_probe): New fields.
4541 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize them.
4542 Rather than asserting that a leaf function saves LR, instead assert
4543 that a leaf function saves something.
4544 (aarch64_get_separate_components): Prevent the chosen probe
4545 registers from being individually shrink-wrapped.
4546 (aarch64_allocate_and_probe_stack_space): Remove workaround for
4547 probe registers that aren't at the bottom of the previous allocation.
4549 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
4551 * config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space):
4552 Always probe the residual allocation at offset 1024, asserting
4553 that that is in range.
4555 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
4557 * config/aarch64/aarch64.cc (aarch64_layout_frame): Ensure that
4558 the LR save slot is in the first 16 bytes of the register save area.
4559 Only form STP/LDP push/pop candidates if both registers are valid.
4560 (aarch64_allocate_and_probe_stack_space): Remove workaround for
4561 when LR was not in the first 16 bytes.
4563 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
4565 * config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space):
4566 Don't probe final allocations that are exactly 1KiB in size (after
4567 unprobed space above the final allocation has been deducted).
4569 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
4571 * config/aarch64/aarch64.cc (aarch64_layout_frame): Tweak
4572 calculation of initial_adjust for frames in which all saves
4575 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
4577 * config/aarch64/aarch64.cc (aarch64_layout_frame): Simplify
4578 the allocation of the top of the frame.
4580 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
4582 * config/aarch64/aarch64.h (aarch64_frame): Add comment above
4584 * config/aarch64/aarch64.cc (aarch64_layout_frame): Walk offsets
4585 from the bottom of the frame, rather than the bottom of the saved
4586 register area. Measure reg_offset from the bottom of the frame
4587 rather than the bottom of the saved register area.
4588 (aarch64_save_callee_saves): Update accordingly.
4589 (aarch64_restore_callee_saves): Likewise.
4590 (aarch64_get_separate_components): Likewise.
4591 (aarch64_process_components): Likewise.
4593 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
4595 * config/aarch64/aarch64.h (aarch64_frame::frame_size): Tweak comment.
4597 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
4599 * config/aarch64/aarch64.h (aarch64_frame::hard_fp_offset): Rename
4601 (aarch64_frame::bytes_above_hard_fp): ...this.
4602 * config/aarch64/aarch64.cc (aarch64_layout_frame)
4603 (aarch64_expand_prologue): Update accordingly.
4604 (aarch64_initial_elimination_offset): Likewise.
4606 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
4608 * config/aarch64/aarch64.h (aarch64_frame::locals_offset): Rename to...
4609 (aarch64_frame::bytes_above_locals): ...this.
4610 * config/aarch64/aarch64.cc (aarch64_layout_frame)
4611 (aarch64_initial_elimination_offset): Update accordingly.
4613 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
4615 * config/aarch64/aarch64.cc (aarch64_expand_prologue): Move the
4616 calculation of chain_offset into the emit_frame_chain block.
4618 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
4620 * config/aarch64/aarch64.h (aarch64_frame::callee_offset): Delete.
4621 * config/aarch64/aarch64.cc (aarch64_layout_frame): Remove
4622 callee_offset handling.
4623 (aarch64_save_callee_saves): Replace the start_offset parameter
4624 with a bytes_below_sp parameter.
4625 (aarch64_restore_callee_saves): Likewise.
4626 (aarch64_expand_prologue): Update accordingly.
4627 (aarch64_expand_epilogue): Likewise.
4629 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
4631 * config/aarch64/aarch64.h (aarch64_frame::bytes_below_hard_fp): New
4633 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it.
4634 (aarch64_expand_epilogue): Use it instead of
4635 below_hard_fp_saved_regs_size.
4637 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
4639 * config/aarch64/aarch64.h (aarch64_frame::bytes_below_saved_regs): New
4641 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it,
4642 and use it instead of crtl->outgoing_args_size.
4643 (aarch64_get_separate_components): Use bytes_below_saved_regs instead
4644 of outgoing_args_size.
4645 (aarch64_process_components): Likewise.
4647 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
4649 * config/aarch64/aarch64.cc (aarch64_layout_frame): Explicitly
4650 allocate the frame in one go if there are no saved registers.
4652 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
4654 * config/aarch64/aarch64.cc (aarch64_expand_prologue): Use
4655 chain_offset rather than callee_offset.
4657 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
4659 * config/aarch64/aarch64.cc (aarch64_save_callee_saves): Use
4660 a local shorthand for cfun->machine->frame.
4661 (aarch64_restore_callee_saves, aarch64_get_separate_components):
4662 (aarch64_process_components): Likewise.
4663 (aarch64_allocate_and_probe_stack_space): Likewise.
4664 (aarch64_expand_prologue, aarch64_expand_epilogue): Likewise.
4665 (aarch64_layout_frame): Use existing shorthand for one more case.
4667 2023-09-12 Andrew Pinski <apinski@marvell.com>
4669 PR tree-optimization/107881
4670 * match.pd (`(a CMP1 b) ^ (a CMP2 b)`): New pattern.
4671 (`(a CMP1 b) == (a CMP2 b)`): New pattern.
4673 2023-09-12 Pan Li <pan2.li@intel.com>
4675 * config/riscv/riscv-vector-costs.h (struct range): Removed.
4677 2023-09-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4679 * config/riscv/riscv-vector-costs.cc (get_last_live_range): New function.
4680 (compute_nregs_for_mode): Ditto.
4681 (live_range_conflict_p): Ditto.
4682 (max_number_of_live_regs): Ditto.
4683 (compute_lmul): Ditto.
4684 (costs::prefer_new_lmul_p): Ditto.
4685 (costs::better_main_loop_than_p): Ditto.
4686 * config/riscv/riscv-vector-costs.h (struct stmt_point): New struct.
4687 (struct var_live_range): Ditto.
4688 (struct autovec_info): Ditto.
4689 * config/riscv/t-riscv: Update makefile for COST model.
4691 2023-09-12 Jakub Jelinek <jakub@redhat.com>
4693 * fold-const.cc (range_check_type): Handle BITINT_TYPE like
4696 2023-09-12 Jakub Jelinek <jakub@redhat.com>
4698 PR middle-end/111338
4699 * tree-ssa-sccvn.cc (struct vn_walk_cb_data): Add bufsize non-static
4701 (vn_walk_cb_data::push_partial_def): Remove bufsize variable.
4702 (visit_nary_op): Avoid the BIT_AND_EXPR with constant rhs2
4703 optimization if type's precision is too large for
4704 vn_walk_cb_data::bufsize.
4706 2023-09-12 Gaius Mulley <gaiusmod2@gmail.com>
4708 * doc/gm2.texi (Compiler options): Document new option
4711 2023-09-12 Thomas Schwinge <thomas@codesourcery.com>
4713 * doc/sourcebuild.texi (stack_size): Update.
4715 2023-09-12 Christoph Müllner <christoph.muellner@vrull.eu>
4717 * config/riscv/bitmanip.md (*<optab>_not<mode>): Export INSN name.
4718 (<optab>_not<mode>3): Likewise.
4719 * config/riscv/riscv-protos.h (riscv_expand_strcmp): New
4721 * config/riscv/riscv-string.cc (GEN_EMIT_HELPER3): New helper
4723 (GEN_EMIT_HELPER2): Likewise.
4724 (emit_strcmp_scalar_compare_byte): New function.
4725 (emit_strcmp_scalar_compare_subword): Likewise.
4726 (emit_strcmp_scalar_compare_word): Likewise.
4727 (emit_strcmp_scalar_load_and_compare): Likewise.
4728 (emit_strcmp_scalar_call_to_libc): Likewise.
4729 (emit_strcmp_scalar_result_calculation_nonul): Likewise.
4730 (emit_strcmp_scalar_result_calculation): Likewise.
4731 (riscv_expand_strcmp_scalar): Likewise.
4732 (riscv_expand_strcmp): Likewise.
4733 * config/riscv/riscv.md (*slt<u>_<X:mode><GPR:mode>): Export
4735 (@slt<u>_<X:mode><GPR:mode>3): Likewise.
4736 (cmpstrnsi): Invoke expansion function for str(n)cmp.
4737 (cmpstrsi): Likewise.
4738 * config/riscv/riscv.opt: Add new parameter
4739 '-mstring-compare-inline-limit'.
4740 * doc/invoke.texi: Document new parameter
4741 '-mstring-compare-inline-limit'.
4743 2023-09-12 Christoph Müllner <christoph.muellner@vrull.eu>
4745 * config.gcc: Add new object riscv-string.o.
4747 * config/riscv/riscv-protos.h (riscv_expand_strlen):
4749 * config/riscv/riscv.md (strlen<mode>): New expand INSN.
4750 * config/riscv/riscv.opt: New flag 'minline-strlen'.
4751 * config/riscv/t-riscv: Add new object riscv-string.o.
4752 * config/riscv/thead.md (th_rev<mode>2): Export INSN name.
4753 (th_rev<mode>2): Likewise.
4754 (th_tstnbz<mode>2): New INSN.
4755 * doc/invoke.texi: Document '-minline-strlen'.
4756 * emit-rtl.cc (emit_likely_jump_insn): New helper function.
4757 (emit_unlikely_jump_insn): Likewise.
4758 * rtl.h (emit_likely_jump_insn): New prototype.
4759 (emit_unlikely_jump_insn): Likewise.
4760 * config/riscv/riscv-string.cc: New file.
4762 2023-09-12 Thomas Schwinge <thomas@codesourcery.com>
4764 * config/nvptx/nvptx.h (TARGET_USE_LOCAL_THUNK_ALIAS_P)
4765 (TARGET_SUPPORTS_ALIASES): Define.
4767 2023-09-12 Thomas Schwinge <thomas@codesourcery.com>
4769 * doc/sourcebuild.texi (check-function-bodies): Update.
4771 2023-09-12 Tobias Burnus <tobias@codesourcery.com>
4773 * gimplify.cc (gimplify_bind_expr): Check for
4774 insertion after variable cleanup. Convert 'omp allocate'
4775 var-decl attribute to GOMP_alloc/GOMP_free calls.
4777 2023-09-12 xuli <xuli1@eswincomputing.com>
4779 * config/riscv/riscv-vector-builtins-bases.cc: remove unused
4780 parameter e and replace NULL_RTX with gcc_unreachable.
4782 2023-09-12 xuli <xuli1@eswincomputing.com>
4784 * config/riscv/riscv-vector-builtins-bases.cc (class vcreate): New class.
4786 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
4787 * config/riscv/riscv-vector-builtins-functions.def (vcreate): Add vcreate support.
4788 * config/riscv/riscv-vector-builtins-shapes.cc (struct vcreate_def): Ditto.
4790 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
4791 * config/riscv/riscv-vector-builtins.cc: Add args type.
4793 2023-09-12 Fei Gao <gaofei@eswincomputing.com>
4795 * config/riscv/riscv.cc
4796 (riscv_avoid_shrink_wrapping_separate): wrap the condition check in
4797 riscv_avoid_shrink_wrapping_separate.
4798 (riscv_avoid_multi_push):avoid multi push if shrink_wrapping_separate
4800 (riscv_get_separate_components):call riscv_avoid_shrink_wrapping_separate
4802 2023-09-12 Fei Gao <gaofei@eswincomputing.com>
4804 * shrink-wrap.cc (try_shrink_wrapping_separate):call
4805 use_shrink_wrapping_separate.
4806 (use_shrink_wrapping_separate): wrap the condition
4807 check in use_shrink_wrapping_separate.
4808 * shrink-wrap.h (use_shrink_wrapping_separate): add to extern
4810 2023-09-11 Andrew Pinski <apinski@marvell.com>
4812 PR tree-optimization/111348
4813 * match.pd (`(a CMP b) ? minmax<a, c> : minmax<b, c>`): Add :c on
4814 the cmp part of the pattern.
4816 2023-09-11 Uros Bizjak <ubizjak@gmail.com>
4819 * config/i386/i386.cc (output_pic_addr_const): Handle CONST_WIDE_INT.
4820 Call output_addr_const for CASE_CONST_SCALAR_INT.
4822 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
4824 * config/riscv/thead.md: Update types
4826 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
4828 * config/riscv/riscv.md: Update types
4830 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
4832 * config/riscv/riscv.md: Add "zicond" type
4833 * config/riscv/zicond.md: Update types
4835 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
4837 * config/riscv/riscv.md: Add "pushpop" and "mvpair" types
4838 * config/riscv/zc.md: Update types
4840 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
4842 * config/riscv/autovec-opt.md: Update types
4843 * config/riscv/autovec.md: likewise
4845 2023-09-11 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
4847 * config/s390/s390-builtins.def (s390_vec_signed_flt): Fix
4849 (s390_vec_unsigned_flt): Ditto.
4850 (s390_vec_revb_flt): Ditto.
4851 (s390_vec_reve_flt): Ditto.
4852 (s390_vclfnhs): Fix operand flags.
4853 (s390_vclfnls): Ditto.
4854 (s390_vcrnfs): Ditto.
4858 2023-09-11 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
4860 * config/s390/s390-builtins.def (O_U64): New.
4865 (O_M12): Change bit position.
4876 (OB_DEF_VAR): Add operand constraints.
4878 * config/s390/s390.cc (s390_const_operand_ok): Honour 64 bit
4881 2023-09-11 Andrew Pinski <apinski@marvell.com>
4883 PR tree-optimization/111349
4884 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`): Add :c on
4885 the cmp part of the pattern.
4887 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4890 * config/riscv/riscv.opt: Set default as scalable vectorization.
4892 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4894 * config/riscv/riscv-protos.h (get_all_predecessors): Remove.
4895 (get_all_successors): Ditto.
4896 * config/riscv/riscv-v.cc (get_all_predecessors): Ditto.
4897 (get_all_successors): Ditto.
4899 2023-09-11 Jakub Jelinek <jakub@redhat.com>
4901 PR middle-end/111329
4902 * pretty-print.h (pp_wide_int): Rewrite from macro into inline
4903 function. For printing values which don't fit into digit_buffer
4904 use out-of-line function.
4905 * wide-int-print.h (pp_wide_int_large): Declare.
4906 * wide-int-print.cc: Include pretty-print.h.
4907 (pp_wide_int_large): Define.
4909 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4911 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::global_eliminate_vsetvl_insn):
4912 Use dominance analysis.
4913 (pass_vsetvl::init): Ditto.
4914 (pass_vsetvl::done): Ditto.
4916 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4919 * config/riscv/autovec.md: Add VLS modes.
4920 * config/riscv/riscv-protos.h (cmp_lmul_le_one): New function.
4921 (cmp_lmul_gt_one): Ditto.
4922 * config/riscv/riscv-v.cc (cmp_lmul_le_one): Ditto.
4923 (cmp_lmul_gt_one): Ditto.
4924 * config/riscv/riscv.cc (riscv_print_operand): Add VLS modes.
4925 (riscv_vectorize_vec_perm_const): Ditto.
4926 * config/riscv/vector-iterators.md: Ditto.
4927 * config/riscv/vector.md: Ditto.
4929 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4931 * config/riscv/autovec-vls.md (*mov<mode>_vls): New pattern.
4932 * config/riscv/vector-iterators.md: New iterator
4934 2023-09-11 Andrew Pinski <apinski@marvell.com>
4936 PR tree-optimization/111346
4937 * match.pd (`X CMP MINMAX`): Add `:c` on the cmp part
4940 2023-09-11 liuhongt <hongtao.liu@intel.com>
4944 * config/i386/sse.md (int_comm): New int_attr.
4945 (fma_<complexopname>_<mode><sdc_maskz_name><round_name>):
4946 Remove % for Complex conjugate operations since they're not
4948 (fma_<complexpairopname>_<mode>_pair): Ditto.
4949 (<avx512>_<complexopname>_<mode>_mask<round_name>): Ditto.
4950 (cmul<conj_op><mode>3): Ditto.
4952 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4954 * config/riscv/riscv-v.cc (shuffle_generic_patterns): Expand
4955 fixed-vlmax/vls vector permutation.
4957 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4959 * config/riscv/riscv-v.cc (shuffle_compress_patterns): Avoid unnecessary slideup.
4961 2023-09-10 Andrew Pinski <apinski@marvell.com>
4963 PR tree-optimization/111331
4964 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`):
4965 Fix the LE/GE comparison to the correct value.
4966 * tree-ssa-phiopt.cc (minmax_replacement):
4967 Fix the LE/GE comparison for the
4968 `(a CMP CST1) ? max<a,CST2> : a` optimization.
4970 2023-09-10 Iain Sandoe <iain@sandoe.co.uk>
4972 * config/darwin.cc (darwin_function_section): Place unlikely
4973 executed global init code into the standard cold section.
4975 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4978 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::vsetvl_fusion): Add TDF_DETAILS.
4979 (pass_vsetvl::pre_vsetvl): Ditto.
4980 (pass_vsetvl::init): Ditto.
4981 (pass_vsetvl::lazy_vsetvl): Ditto.
4983 2023-09-09 Lulu Cheng <chenglulu@loongson.cn>
4985 * config/loongarch/loongarch.md (mulsidi3_64bit):
4986 Field unsigned extension support.
4987 (<u>muldi3_highpart): Modify template name.
4988 (<u>mulsi3_highpart): Likewise.
4989 (<u>mulsidi3_64bit): Field unsigned extension support.
4990 (<su>muldi3_highpart): Modify muldi3_highpart to
4992 (<su>mulsi3_highpart): Modify mulsi3_highpart to
4995 2023-09-09 Xi Ruoyao <xry111@xry111.site>
4997 * config/loongarch/loongarch.cc (loongarch_block_move_straight):
4998 Check precondition (delta must be a power of 2) and use
4999 popcount_hwi instead of a homebrew loop.
5001 2023-09-09 Xi Ruoyao <xry111@xry111.site>
5003 * config/loongarch/loongarch.h (LARCH_MAX_MOVE_PER_INSN):
5004 Define to the maximum amount of bytes able to be loaded or
5005 stored with one machine instruction.
5006 * config/loongarch/loongarch.cc (loongarch_mode_for_move_size):
5007 New static function.
5008 (loongarch_block_move_straight): Call
5009 loongarch_mode_for_move_size for machine_mode to be moved.
5010 (loongarch_expand_block_move): Use LARCH_MAX_MOVE_PER_INSN
5011 instead of UNITS_PER_WORD.
5013 2023-09-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5015 * config/riscv/vector-iterators.md: Fix floating-point operations predicate.
5017 2023-09-09 Lehua Ding <lehua.ding@rivai.ai>
5019 * fold-const.cc (can_min_p): New function.
5020 (poly_int_binop): Try fold MIN_EXPR.
5022 2023-09-08 Aldy Hernandez <aldyh@redhat.com>
5024 * range-op-float.cc (foperator_ltgt::fold_range): Do not special
5025 case VREL_EQ nor call frelop_early_resolve.
5027 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
5029 * config/riscv/thead.md (*extend<SHORT:mode><SUPERQI:mode>2_th_ext):
5031 (*extendhi<SUPERQI:mode>2_th_ext): New INSN.
5032 (*extendqi<SUPERQI:mode>2_th_ext): New INSN.
5034 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
5036 * config/riscv/thead.md: Use more appropriate mode attributes
5039 2023-09-08 Guo Jie <guojie@loongson.cn>
5041 * common/config/loongarch/loongarch-common.cc:
5042 (default_options loongarch_option_optimization_table):
5043 Default to -fsched-pressure.
5045 2023-09-08 Yang Yujie <yangyujie@loongson.cn>
5047 * config.gcc: remove non-POSIX syntax "<<<".
5049 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
5051 * config/riscv/bitmanip.md (*extend<SHORT:mode><SUPERQI:mode>2_zbb):
5052 Rename postfix to _bitmanip.
5053 (*extend<SHORT:mode><SUPERQI:mode>2_bitmanip): Renamed pattern.
5054 (*zero_extendhi<GPR:mode>2_zbb): Remove duplicated pattern.
5056 2023-09-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5058 * config/riscv/riscv.cc (riscv_pass_in_vector_p): Only allow RVV type.
5060 2023-09-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5062 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Fix bug.
5064 2023-09-07 liuhongt <hongtao.liu@intel.com>
5066 * config/i386/sse.md
5067 (<avx512>_vpermt2var<mode>3<sd_maskz_name>): New define_insn.
5068 (VHFBF_AVX512VL): New mode iterator.
5069 (VI2HFBF_AVX512VL): New mode iterator.
5071 2023-09-07 Aldy Hernandez <aldyh@redhat.com>
5073 * value-range.h (contains_zero_p): Return false for undefined ranges.
5074 * range-op-float.cc (operator_gt::op1_op2_relation): Adjust for
5075 contains_zero_p change above.
5076 (operator_ge::op1_op2_relation): Same.
5077 (operator_equal::op1_op2_relation): Same.
5078 (operator_not_equal::op1_op2_relation): Same.
5079 (operator_lt::op1_op2_relation): Same.
5080 (operator_le::op1_op2_relation): Same.
5081 (operator_ge::op1_op2_relation): Same.
5082 * range-op.cc (operator_equal::op1_op2_relation): Same.
5083 (operator_not_equal::op1_op2_relation): Same.
5084 (operator_lt::op1_op2_relation): Same.
5085 (operator_le::op1_op2_relation): Same.
5086 (operator_cast::op1_range): Same.
5087 (set_nonzero_range_from_mask): Same.
5088 (operator_bitwise_xor::op1_range): Same.
5089 (operator_addr_expr::fold_range): Same.
5090 (operator_addr_expr::op1_range): Same.
5092 2023-09-07 Andrew MacLeod <amacleod@redhat.com>
5094 PR tree-optimization/110875
5095 * gimple-range.cc (gimple_ranger::prefill_name): Only invoke
5096 cache-prefilling routine when the ssa-name has no global value.
5098 2023-09-07 Vladimir N. Makarov <vmakarov@redhat.com>
5101 * lra-constraints.cc (goal_reuse_alt_p): New global flag.
5102 (process_alt_operands): Set up the flag. Clear flag for chosen
5103 alternative with special memory constraints.
5104 (process_alt_operands): Set up used insn alternative depending on the flag.
5106 2023-09-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5108 * config/riscv/autovec-vls.md: Add VLS mask modes mov patterns.
5109 * config/riscv/riscv.md: Ditto.
5110 * config/riscv/vector-iterators.md: Ditto.
5111 * config/riscv/vector.md: Ditto.
5113 2023-09-07 David Malcolm <dmalcolm@redhat.com>
5115 * diagnostic-core.h (error_meta): New decl.
5116 * diagnostic.cc (error_meta): New.
5118 2023-09-07 Jakub Jelinek <jakub@redhat.com>
5121 * expr.cc (expand_expr_real_1): Don't call targetm.c.bitint_type_info
5122 inside gcc_assert, as later code relies on it filling info variable.
5123 * gimple-fold.cc (clear_padding_bitint_needs_padding_p,
5124 clear_padding_type): Likewise.
5125 * varasm.cc (output_constant): Likewise.
5126 * fold-const.cc (native_encode_int, native_interpret_int): Likewise.
5127 * stor-layout.cc (finish_bitfield_representative, layout_type):
5129 * gimple-lower-bitint.cc (bitint_precision_kind): Likewise.
5131 2023-09-07 Xi Ruoyao <xry111@xry111.site>
5134 * config/loongarch/loongarch-protos.h
5135 (loongarch_pre_reload_split): Declare new function.
5136 (loongarch_use_bstrins_for_ior_with_mask): Likewise.
5137 * config/loongarch/loongarch.cc
5138 (loongarch_pre_reload_split): Implement.
5139 (loongarch_use_bstrins_for_ior_with_mask): Likewise.
5140 * config/loongarch/predicates.md (ins_zero_bitmask_operand):
5142 * config/loongarch/loongarch.md (bstrins_<mode>_for_mask):
5143 New define_insn_and_split.
5144 (bstrins_<mode>_for_ior_mask): Likewise.
5145 (define_peephole2): Further optimize code sequence produced by
5146 bstrins_<mode>_for_ior_mask if possible.
5148 2023-09-07 Richard Sandiford <richard.sandiford@arm.com>
5150 * lra-eliminations.cc (lra_eliminate_regs_1): Use simplify_gen_binary
5151 rather than gen_rtx_PLUS.
5153 2023-09-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5156 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_earliest_vsetvls): Remove.
5157 (pass_vsetvl::df_post_optimization): Remove incorrect function.
5159 2023-09-07 Tsukasa OI <research_trasio@irq.a4lg.com>
5161 * common/config/riscv/riscv-common.cc (riscv_ext_flag_table):
5162 Parse 'XVentanaCondOps' extension.
5163 * config/riscv/riscv-opts.h (MASK_XVENTANACONDOPS): New.
5164 (TARGET_XVENTANACONDOPS): Ditto.
5165 (TARGET_ZICOND_LIKE): New to represent targets with conditional
5166 moves like 'Zicond'. It includes RV64 + 'XVentanaCondOps'.
5167 * config/riscv/riscv.cc (riscv_rtx_costs): Replace TARGET_ZICOND
5168 with TARGET_ZICOND_LIKE.
5169 (riscv_expand_conditional_move): Ditto.
5170 * config/riscv/riscv.md (mov<mode>cc): Replace TARGET_ZICOND with
5172 * config/riscv/riscv.opt: Add new riscv_xventana_subext.
5173 * config/riscv/zicond.md: Modify description.
5174 (eqz_ventana): New to match corresponding czero instructions.
5175 (nez_ventana): Ditto.
5176 (*czero.<eqz>.<GPR><X>): Emit a 'XVentanaCondOps' instruction if
5177 'Zicond' is not available but 'XVentanaCondOps' + RV64 is.
5178 (*czero.<eqz>.<GPR><X>): Ditto.
5179 (*czero.eqz.<GPR><X>.opt1): Ditto.
5180 (*czero.nez.<GPR><X>.opt2): Ditto.
5182 2023-09-06 Ian Lance Taylor <iant@golang.org>
5185 * godump.cc (go_format_type): Handle BITINT_TYPE.
5187 2023-09-06 Jakub Jelinek <jakub@redhat.com>
5190 * tree.cc (build_one_cst, build_minus_one_cst): Handle BITINT_TYPE
5193 2023-09-06 Jakub Jelinek <jakub@redhat.com>
5196 * gimple-lower-bitint.cc (bitint_large_huge::if_then_else,
5197 bitint_large_huge::if_then_if_then_else): Use make_single_succ_edge
5198 rather than make_edge, initialize bb->count.
5200 2023-09-06 Jakub Jelinek <jakub@redhat.com>
5203 * doc/libgcc.texi (Bit-precise integer arithmetic functions):
5204 Document general rules for _BitInt support library functions
5205 and document __mulbitint3 and __divmodbitint4.
5206 (Conversion functions): Document __fix{s,d,x,t}fbitint,
5207 __floatbitint{s,d,x,t,h,b}f, __bid_fix{s,d,t}dbitint and
5208 __bid_floatbitint{s,d,t}d.
5210 2023-09-06 Jakub Jelinek <jakub@redhat.com>
5213 * glimits.h (BITINT_MAXWIDTH): Define if __BITINT_MAXWIDTH__ is
5216 2023-09-06 Jakub Jelinek <jakub@redhat.com>
5219 * internal-fn.cc (expand_ubsan_result_store): Add LHS, MODE and
5220 DO_ERROR arguments. For non-mode precision BITINT_TYPE results
5221 check if all padding bits up to mode precision are zeros or sign
5222 bit copies and if not, jump to DO_ERROR.
5223 (expand_addsub_overflow, expand_neg_overflow, expand_mul_overflow):
5224 Adjust expand_ubsan_result_store callers.
5225 * ubsan.cc: Include target.h and langhooks.h.
5226 (ubsan_encode_value): Pass BITINT_TYPE values which fit into pointer
5227 size converted to pointer sized integer, pass BITINT_TYPE values
5228 which fit into TImode (if supported) or DImode as those integer types
5229 or otherwise for now punt (pass 0).
5230 (ubsan_type_descriptor): Handle BITINT_TYPE. For pstyle of
5231 UBSAN_PRINT_FORCE_INT use TK_Integer (0x0000) mode with a
5232 TImode/DImode precision rather than TK_Unknown used otherwise for
5233 large/huge BITINT_TYPEs.
5234 (instrument_si_overflow): Instrument BITINT_TYPE operations even when
5235 they don't have mode precision.
5236 * ubsan.h (enum ubsan_print_style): New enumerator.
5238 2023-09-06 Jakub Jelinek <jakub@redhat.com>
5241 * config/i386/i386.cc (classify_argument): Handle BITINT_TYPE.
5242 (ix86_bitint_type_info): New function.
5243 (TARGET_C_BITINT_TYPE_INFO): Redefine.
5245 2023-09-06 Jakub Jelinek <jakub@redhat.com>
5248 * Makefile.in (OBJS): Add gimple-lower-bitint.o.
5249 * passes.def: Add pass_lower_bitint after pass_lower_complex and
5250 pass_lower_bitint_O0 after pass_lower_complex_O0.
5251 * tree-pass.h (PROP_gimple_lbitint): Define.
5252 (make_pass_lower_bitint_O0, make_pass_lower_bitint): Declare.
5253 * gimple-lower-bitint.h: New file.
5254 * tree-ssa-live.h (struct _var_map): Add bitint member.
5255 (init_var_map): Adjust declaration.
5256 (region_contains_p): Handle map->bitint like map->outofssa_p.
5257 * tree-ssa-live.cc (init_var_map): Add BITINT argument, initialize
5258 map->bitint and set map->outofssa_p to false if it is non-NULL.
5259 * tree-ssa-coalesce.cc: Include gimple-lower-bitint.h.
5260 (build_ssa_conflict_graph): Call build_bitint_stmt_ssa_conflicts if
5262 (create_coalesce_list_for_region): For map->bitint ignore SSA_NAMEs
5263 not in that bitmap, and allow res without default def.
5264 (compute_optimized_partition_bases): In map->bitint mode try hard to
5265 coalesce any SSA_NAMEs with the same size.
5266 (coalesce_bitint): New function.
5267 (coalesce_ssa_name): In map->bitint mode, or map->bitmap into
5268 used_in_copies and call coalesce_bitint.
5269 * gimple-lower-bitint.cc: New file.
5271 2023-09-06 Jakub Jelinek <jakub@redhat.com>
5274 * tree.def (BITINT_TYPE): New type.
5275 * tree.h (TREE_CHECK6, TREE_NOT_CHECK6): Define.
5276 (NUMERICAL_TYPE_CHECK, INTEGRAL_TYPE_P): Include
5278 (BITINT_TYPE_P): Define.
5279 (CONSTRUCTOR_BITFIELD_P): Return true even for BLKmode bit-fields if
5280 they have BITINT_TYPE type.
5281 (tree_check6, tree_not_check6): New inline functions.
5282 (any_integral_type_check): Include BITINT_TYPE.
5283 (build_bitint_type): Declare.
5284 * tree.cc (tree_code_size, wide_int_to_tree_1, cache_integer_cst,
5285 build_zero_cst, type_hash_canon_hash, type_cache_hasher::equal,
5286 type_hash_canon): Handle BITINT_TYPE.
5287 (bitint_type_cache): New variable.
5288 (build_bitint_type): New function.
5289 (signed_or_unsigned_type_for, verify_type_variant, verify_type):
5291 (tree_cc_finalize): Free bitint_type_cache.
5292 * builtins.cc (type_to_class): Handle BITINT_TYPE.
5293 (fold_builtin_unordered_cmp): Handle BITINT_TYPE like INTEGER_TYPE.
5294 * cfgexpand.cc (expand_debug_expr): Punt on BLKmode BITINT_TYPE
5296 * convert.cc (convert_to_pointer_1, convert_to_real_1,
5297 convert_to_complex_1): Handle BITINT_TYPE like INTEGER_TYPE.
5298 (convert_to_integer_1): Likewise. For BITINT_TYPE don't check
5299 GET_MODE_PRECISION (TYPE_MODE (type)).
5300 * doc/generic.texi (BITINT_TYPE): Document.
5301 * doc/tm.texi.in (TARGET_C_BITINT_TYPE_INFO): New.
5302 * doc/tm.texi: Regenerated.
5303 * dwarf2out.cc (base_type_die, is_base_type, modified_type_die,
5304 gen_type_die_with_usage): Handle BITINT_TYPE.
5305 (rtl_for_decl_init): Punt on BLKmode BITINT_TYPE INTEGER_CSTs or
5306 handle those which fit into shwi.
5307 * expr.cc (expand_expr_real_1): Define EXTEND_BITINT macro, reduce
5308 to bitfield precision reads from BITINT_TYPE vars, parameters or
5309 memory locations. Expand large/huge BITINT_TYPE INTEGER_CSTs into
5311 * fold-const.cc (fold_convert_loc, make_range_step): Handle
5313 (extract_muldiv_1): For BITINT_TYPE use TYPE_PRECISION rather than
5314 GET_MODE_SIZE (SCALAR_INT_TYPE_MODE).
5315 (native_encode_int, native_interpret_int, native_interpret_expr):
5317 * gimple-expr.cc (useless_type_conversion_p): Make BITINT_TYPE
5318 to some other integral type or vice versa conversions non-useless.
5319 * gimple-fold.cc (gimple_fold_builtin_memset): Punt for BITINT_TYPE.
5320 (clear_padding_unit): Mention in comment that _BitInt types don't need
5322 (clear_padding_bitint_needs_padding_p): New function.
5323 (clear_padding_type_may_have_padding_p): Handle BITINT_TYPE.
5324 (clear_padding_type): Likewise.
5325 * internal-fn.cc (expand_mul_overflow): For unsigned non-mode
5326 precision operands force pos_neg? to 1.
5327 (expand_MULBITINT, expand_DIVMODBITINT, expand_FLOATTOBITINT,
5328 expand_BITINTTOFLOAT): New functions.
5329 * internal-fn.def (MULBITINT, DIVMODBITINT, FLOATTOBITINT,
5330 BITINTTOFLOAT): New internal functions.
5331 * internal-fn.h (expand_MULBITINT, expand_DIVMODBITINT,
5332 expand_FLOATTOBITINT, expand_BITINTTOFLOAT): Declare.
5333 * match.pd (non-equality compare simplifications from fold_binary):
5334 Punt if TYPE_MODE (arg1_type) is BLKmode.
5335 * pretty-print.h (pp_wide_int): Handle printing of large precision
5336 wide_ints which would buffer overflow digit_buffer.
5337 * stor-layout.cc (finish_bitfield_representative): For bit-fields
5338 with BITINT_TYPE, prefer representatives with precisions in
5339 multiple of limb precision.
5340 (layout_type): Handle BITINT_TYPE. Handle COMPLEX_TYPE with BLKmode
5341 element type and assert it is BITINT_TYPE.
5342 * target.def (bitint_type_info): New C target hook.
5343 * target.h (struct bitint_info): New type.
5344 * targhooks.cc (default_bitint_type_info): New function.
5345 * targhooks.h (default_bitint_type_info): Declare.
5346 * tree-pretty-print.cc (dump_generic_node): Handle BITINT_TYPE.
5347 Handle printing large wide_ints which would buffer overflow
5349 * tree-ssa-sccvn.cc: Include target.h.
5350 (eliminate_dom_walker::eliminate_stmt): Punt for large/huge
5352 * tree-switch-conversion.cc (jump_table_cluster::emit): For more than
5353 64-bit BITINT_TYPE subtract low bound from expression and cast to
5354 64-bit integer type both the controlling expression and case labels.
5355 * typeclass.h (enum type_class): Add bitint_type_class enumerator.
5356 * varasm.cc (output_constant): Handle BITINT_TYPE INTEGER_CSTs.
5357 * vr-values.cc (check_for_binary_op_overflow): Use widest2_int rather
5359 (simplify_using_ranges::simplify_internal_call_using_ranges): Use
5360 unsigned_type_for rather than build_nonstandard_integer_type.
5362 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5365 * config/riscv/riscv.cc (riscv_modes_tieable_p): Fix incorrect mode
5366 tieable for RVV modes.
5368 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5371 * config/riscv/riscv-vsetvl.cc (insert_vsetvl): Bug fix.
5373 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5375 * config/riscv/riscv-vector-switch.def (VLS_ENTRY): Remove TARGET_64BIT
5377 2023-09-06 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
5379 * config/xtensa/xtensa.cc (xtensa_expand_scc):
5380 Add code for particular constants (only 0 and INT_MIN for now)
5381 for EQ/NE boolean evaluation in SImode.
5382 * config/xtensa/xtensa.md (*eqne_INT_MIN): Remove because its
5383 implementation has been integrated into the above.
5385 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
5388 * config/riscv/autovec-opt.md (@pred_single_widen_mul<any_extend:su><mode>):
5390 (*pred_widen_mulsu<mode>): Delete.
5391 (*pred_single_widen_mul<mode>): Delete.
5392 (*dual_widen_<any_widen_binop:optab><any_extend:su><mode>):
5393 Add new combine patterns.
5394 (*single_widen_sub<any_extend:su><mode>): Ditto.
5395 (*single_widen_add<any_extend:su><mode>): Ditto.
5396 (*single_widen_mult<any_extend:su><mode>): Ditto.
5397 (*dual_widen_mulsu<mode>): Ditto.
5398 (*dual_widen_mulus<mode>): Ditto.
5399 (*dual_widen_<optab><mode>): Ditto.
5400 (*single_widen_add<mode>): Ditto.
5401 (*single_widen_sub<mode>): Ditto.
5402 (*single_widen_mult<mode>): Ditto.
5403 * config/riscv/autovec.md (<optab><mode>3):
5404 Change define_expand to define_insn_and_split.
5405 (<optab><mode>2): Ditto.
5406 (abs<mode>2): Ditto.
5407 (smul<mode>3_highpart): Ditto.
5408 (umul<mode>3_highpart): Ditto.
5410 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
5412 * config/riscv/riscv-protos.h (riscv_declare_function_name): Add protos.
5413 (riscv_asm_output_alias): Ditto.
5414 (riscv_asm_output_external): Ditto.
5415 * config/riscv/riscv.cc (riscv_asm_output_variant_cc):
5416 Output .variant_cc directive for vector function.
5417 (riscv_declare_function_name): Ditto.
5418 (riscv_asm_output_alias): Ditto.
5419 (riscv_asm_output_external): Ditto.
5420 * config/riscv/riscv.h (ASM_DECLARE_FUNCTION_NAME):
5421 Implement ASM_DECLARE_FUNCTION_NAME.
5422 (ASM_OUTPUT_DEF_FROM_DECLS): Implement ASM_OUTPUT_DEF_FROM_DECLS.
5423 (ASM_OUTPUT_EXTERNAL): Implement ASM_OUTPUT_EXTERNAL.
5425 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
5427 * config/riscv/riscv-sr.cc (riscv_remove_unneeded_save_restore_calls): Pass riscv_cc.
5428 * config/riscv/riscv.cc (struct riscv_frame_info): Add new fileds.
5429 (riscv_frame_info::reset): Reset new fileds.
5430 (riscv_call_tls_get_addr): Pass riscv_cc.
5431 (riscv_function_arg): Return riscv_cc for call patterm.
5432 (get_riscv_cc): New function return riscv_cc from rtl call_insn.
5433 (riscv_insn_callee_abi): Implement TARGET_INSN_CALLEE_ABI.
5434 (riscv_save_reg_p): Add vector callee-saved check.
5435 (riscv_stack_align): Add vector save area comment.
5436 (riscv_compute_frame_info): Ditto.
5437 (riscv_restore_reg): Update for type change.
5438 (riscv_for_each_saved_v_reg): New function save vector registers.
5439 (riscv_first_stack_step): Handle funciton with vector callee-saved registers.
5440 (riscv_expand_prologue): Ditto.
5441 (riscv_expand_epilogue): Ditto.
5442 (riscv_output_mi_thunk): Pass riscv_cc.
5443 (TARGET_INSN_CALLEE_ABI): Implement TARGET_INSN_CALLEE_ABI.
5444 * config/riscv/riscv.h (get_riscv_cc): Export get_riscv_cc function.
5445 * config/riscv/riscv.md: Add CALLEE_CC operand for call pattern.
5447 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
5449 * config/riscv/riscv-protos.h (builtin_type_p): New function for checking vector type.
5450 * config/riscv/riscv-vector-builtins.cc (builtin_type_p): Ditto.
5451 * config/riscv/riscv.cc (struct riscv_arg_info): New fields.
5452 (riscv_init_cumulative_args): Setup variant_cc field.
5453 (riscv_vector_type_p): New function for checking vector type.
5454 (riscv_hard_regno_nregs): Hoist declare.
5455 (riscv_get_vector_arg): Subroutine of riscv_get_arg_info.
5456 (riscv_get_arg_info): Support vector cc.
5457 (riscv_function_arg_advance): Update cum.
5458 (riscv_pass_by_reference): Handle vector args.
5459 (riscv_v_abi): New function return vector abi.
5460 (riscv_return_value_is_vector_type_p): New function for check vector arguments.
5461 (riscv_arguments_is_vector_type_p): New function for check vector returns.
5462 (riscv_fntype_abi): Implement TARGET_FNTYPE_ABI.
5463 (TARGET_FNTYPE_ABI): Implement TARGET_FNTYPE_ABI.
5464 * config/riscv/riscv.h (GCC_RISCV_H): Define macros for vector abi.
5465 (MAX_ARGS_IN_VECTOR_REGISTERS): Ditto.
5466 (MAX_ARGS_IN_MASK_REGISTERS): Ditto.
5467 (V_ARG_FIRST): Ditto.
5468 (V_ARG_LAST): Ditto.
5469 (enum riscv_cc): Define all RISCV_CC variants.
5470 * config/riscv/riscv.opt: Add --param=riscv-vector-abi.
5472 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
5474 * config/riscv/autovec-opt.md (*cond_<optab><mode>):
5475 Add sqrt + vcond_mask combine pattern.
5476 * config/riscv/autovec.md (<optab><mode>2):
5477 Change define_expand to define_insn_and_split.
5479 2023-09-06 Jason Merrill <jason@redhat.com>
5481 * common.opt: Update -fabi-version=19.
5483 2023-09-06 Tsukasa OI <research_trasio@irq.a4lg.com>
5485 * config/riscv/zicond.md: Add closing parent to a comment.
5487 2023-09-06 Tsukasa OI <research_trasio@irq.a4lg.com>
5489 * config/riscv/riscv.cc (riscv_expand_conditional_move): Force
5490 large constant cons/alt into a register.
5492 2023-09-05 Christoph Müllner <christoph.muellner@vrull.eu>
5494 * config/riscv/riscv.cc (riscv_build_integer_1): Don't
5495 require one zero bit in the upper 32 bits for LI+RORI synthesis.
5497 2023-09-05 Jeff Law <jlaw@ventanamicro.com>
5499 * config/riscv/bitmanip.md (bswapsi2): Expose for TARGET_64BIT.
5501 2023-09-05 Andrew Pinski <apinski@marvell.com>
5503 PR tree-optimization/98710
5504 * match.pd (`(x | c) & ~(y | c)`, `(x & c) | ~(y & c)`): New pattern.
5505 (`x & ~(y | x)`, `x | ~(y & x)`): New patterns.
5507 2023-09-05 Andrew Pinski <apinski@marvell.com>
5509 PR tree-optimization/103536
5510 * match.pd (`(x | y) & (x & z)`,
5511 `(x & y) | (x | z)`): New patterns.
5513 2023-09-05 Andrew Pinski <apinski@marvell.com>
5515 PR tree-optimization/107137
5516 * match.pd (`(nop_convert)-(convert)a`): New pattern.
5518 2023-09-05 Andrew Pinski <apinski@marvell.com>
5520 PR tree-optimization/96694
5521 * match.pd (`~MAX(~X, Y)`, `~MIN(~X, Y)`): New patterns.
5523 2023-09-05 Andrew Pinski <apinski@marvell.com>
5525 PR tree-optimization/105832
5526 * match.pd (`(1 >> X) != 0`): New pattern
5528 2023-09-05 Edwin Lu <ewlu@rivosinc.com>
5530 * config/riscv/riscv.md: Update/Add types
5532 2023-09-05 Edwin Lu <ewlu@rivosinc.com>
5534 * config/riscv/pic.md: Update types
5536 2023-09-05 Christoph Müllner <christoph.muellner@vrull.eu>
5538 * config/riscv/riscv.cc (riscv_build_integer_1): Enable constant
5539 synthesis with rotate-right for XTheadBb.
5541 2023-09-05 Vineet Gupta <vineetg@rivosinc.com>
5543 * config/riscv/zicond.md: Fix op2 pattern.
5545 2023-09-05 Szabolcs Nagy <szabolcs.nagy@arm.com>
5547 * config/aarch64/aarch64.h (AARCH64_ISA_RCPC): Remove dup.
5549 2023-09-05 Xi Ruoyao <xry111@xry111.site>
5551 * config/loongarch/loongarch-opts.h (HAVE_AS_EXPLICIT_RELOCS):
5552 Define to 0 if not defined yet.
5554 2023-09-05 Kito Cheng <kito.cheng@sifive.com>
5556 * config/riscv/linux.h (TARGET_ASM_FILE_END): Move ...
5557 * config/riscv/riscv.cc (TARGET_ASM_FILE_END): to here.
5559 2023-09-05 Pan Li <pan2.li@intel.com>
5561 * config/riscv/autovec-vls.md (copysign<mode>3): New pattern.
5562 * config/riscv/vector.md: Extend iterator for VLS.
5564 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
5566 * config.gcc: Export the header file lasxintrin.h.
5567 * config/loongarch/loongarch-builtins.cc (enum loongarch_builtin_type):
5568 Add Loongson ASX builtin functions support.
5570 (LASX_BUILTIN): Ditto.
5571 (LASX_NO_TARGET_BUILTIN): Ditto.
5572 (LASX_BUILTIN_TEST_BRANCH): Ditto.
5573 (CODE_FOR_lasx_xvsadd_b): Ditto.
5574 (CODE_FOR_lasx_xvsadd_h): Ditto.
5575 (CODE_FOR_lasx_xvsadd_w): Ditto.
5576 (CODE_FOR_lasx_xvsadd_d): Ditto.
5577 (CODE_FOR_lasx_xvsadd_bu): Ditto.
5578 (CODE_FOR_lasx_xvsadd_hu): Ditto.
5579 (CODE_FOR_lasx_xvsadd_wu): Ditto.
5580 (CODE_FOR_lasx_xvsadd_du): Ditto.
5581 (CODE_FOR_lasx_xvadd_b): Ditto.
5582 (CODE_FOR_lasx_xvadd_h): Ditto.
5583 (CODE_FOR_lasx_xvadd_w): Ditto.
5584 (CODE_FOR_lasx_xvadd_d): Ditto.
5585 (CODE_FOR_lasx_xvaddi_bu): Ditto.
5586 (CODE_FOR_lasx_xvaddi_hu): Ditto.
5587 (CODE_FOR_lasx_xvaddi_wu): Ditto.
5588 (CODE_FOR_lasx_xvaddi_du): Ditto.
5589 (CODE_FOR_lasx_xvand_v): Ditto.
5590 (CODE_FOR_lasx_xvandi_b): Ditto.
5591 (CODE_FOR_lasx_xvbitsel_v): Ditto.
5592 (CODE_FOR_lasx_xvseqi_b): Ditto.
5593 (CODE_FOR_lasx_xvseqi_h): Ditto.
5594 (CODE_FOR_lasx_xvseqi_w): Ditto.
5595 (CODE_FOR_lasx_xvseqi_d): Ditto.
5596 (CODE_FOR_lasx_xvslti_b): Ditto.
5597 (CODE_FOR_lasx_xvslti_h): Ditto.
5598 (CODE_FOR_lasx_xvslti_w): Ditto.
5599 (CODE_FOR_lasx_xvslti_d): Ditto.
5600 (CODE_FOR_lasx_xvslti_bu): Ditto.
5601 (CODE_FOR_lasx_xvslti_hu): Ditto.
5602 (CODE_FOR_lasx_xvslti_wu): Ditto.
5603 (CODE_FOR_lasx_xvslti_du): Ditto.
5604 (CODE_FOR_lasx_xvslei_b): Ditto.
5605 (CODE_FOR_lasx_xvslei_h): Ditto.
5606 (CODE_FOR_lasx_xvslei_w): Ditto.
5607 (CODE_FOR_lasx_xvslei_d): Ditto.
5608 (CODE_FOR_lasx_xvslei_bu): Ditto.
5609 (CODE_FOR_lasx_xvslei_hu): Ditto.
5610 (CODE_FOR_lasx_xvslei_wu): Ditto.
5611 (CODE_FOR_lasx_xvslei_du): Ditto.
5612 (CODE_FOR_lasx_xvdiv_b): Ditto.
5613 (CODE_FOR_lasx_xvdiv_h): Ditto.
5614 (CODE_FOR_lasx_xvdiv_w): Ditto.
5615 (CODE_FOR_lasx_xvdiv_d): Ditto.
5616 (CODE_FOR_lasx_xvdiv_bu): Ditto.
5617 (CODE_FOR_lasx_xvdiv_hu): Ditto.
5618 (CODE_FOR_lasx_xvdiv_wu): Ditto.
5619 (CODE_FOR_lasx_xvdiv_du): Ditto.
5620 (CODE_FOR_lasx_xvfadd_s): Ditto.
5621 (CODE_FOR_lasx_xvfadd_d): Ditto.
5622 (CODE_FOR_lasx_xvftintrz_w_s): Ditto.
5623 (CODE_FOR_lasx_xvftintrz_l_d): Ditto.
5624 (CODE_FOR_lasx_xvftintrz_wu_s): Ditto.
5625 (CODE_FOR_lasx_xvftintrz_lu_d): Ditto.
5626 (CODE_FOR_lasx_xvffint_s_w): Ditto.
5627 (CODE_FOR_lasx_xvffint_d_l): Ditto.
5628 (CODE_FOR_lasx_xvffint_s_wu): Ditto.
5629 (CODE_FOR_lasx_xvffint_d_lu): Ditto.
5630 (CODE_FOR_lasx_xvfsub_s): Ditto.
5631 (CODE_FOR_lasx_xvfsub_d): Ditto.
5632 (CODE_FOR_lasx_xvfmul_s): Ditto.
5633 (CODE_FOR_lasx_xvfmul_d): Ditto.
5634 (CODE_FOR_lasx_xvfdiv_s): Ditto.
5635 (CODE_FOR_lasx_xvfdiv_d): Ditto.
5636 (CODE_FOR_lasx_xvfmax_s): Ditto.
5637 (CODE_FOR_lasx_xvfmax_d): Ditto.
5638 (CODE_FOR_lasx_xvfmin_s): Ditto.
5639 (CODE_FOR_lasx_xvfmin_d): Ditto.
5640 (CODE_FOR_lasx_xvfsqrt_s): Ditto.
5641 (CODE_FOR_lasx_xvfsqrt_d): Ditto.
5642 (CODE_FOR_lasx_xvflogb_s): Ditto.
5643 (CODE_FOR_lasx_xvflogb_d): Ditto.
5644 (CODE_FOR_lasx_xvmax_b): Ditto.
5645 (CODE_FOR_lasx_xvmax_h): Ditto.
5646 (CODE_FOR_lasx_xvmax_w): Ditto.
5647 (CODE_FOR_lasx_xvmax_d): Ditto.
5648 (CODE_FOR_lasx_xvmaxi_b): Ditto.
5649 (CODE_FOR_lasx_xvmaxi_h): Ditto.
5650 (CODE_FOR_lasx_xvmaxi_w): Ditto.
5651 (CODE_FOR_lasx_xvmaxi_d): Ditto.
5652 (CODE_FOR_lasx_xvmax_bu): Ditto.
5653 (CODE_FOR_lasx_xvmax_hu): Ditto.
5654 (CODE_FOR_lasx_xvmax_wu): Ditto.
5655 (CODE_FOR_lasx_xvmax_du): Ditto.
5656 (CODE_FOR_lasx_xvmaxi_bu): Ditto.
5657 (CODE_FOR_lasx_xvmaxi_hu): Ditto.
5658 (CODE_FOR_lasx_xvmaxi_wu): Ditto.
5659 (CODE_FOR_lasx_xvmaxi_du): Ditto.
5660 (CODE_FOR_lasx_xvmin_b): Ditto.
5661 (CODE_FOR_lasx_xvmin_h): Ditto.
5662 (CODE_FOR_lasx_xvmin_w): Ditto.
5663 (CODE_FOR_lasx_xvmin_d): Ditto.
5664 (CODE_FOR_lasx_xvmini_b): Ditto.
5665 (CODE_FOR_lasx_xvmini_h): Ditto.
5666 (CODE_FOR_lasx_xvmini_w): Ditto.
5667 (CODE_FOR_lasx_xvmini_d): Ditto.
5668 (CODE_FOR_lasx_xvmin_bu): Ditto.
5669 (CODE_FOR_lasx_xvmin_hu): Ditto.
5670 (CODE_FOR_lasx_xvmin_wu): Ditto.
5671 (CODE_FOR_lasx_xvmin_du): Ditto.
5672 (CODE_FOR_lasx_xvmini_bu): Ditto.
5673 (CODE_FOR_lasx_xvmini_hu): Ditto.
5674 (CODE_FOR_lasx_xvmini_wu): Ditto.
5675 (CODE_FOR_lasx_xvmini_du): Ditto.
5676 (CODE_FOR_lasx_xvmod_b): Ditto.
5677 (CODE_FOR_lasx_xvmod_h): Ditto.
5678 (CODE_FOR_lasx_xvmod_w): Ditto.
5679 (CODE_FOR_lasx_xvmod_d): Ditto.
5680 (CODE_FOR_lasx_xvmod_bu): Ditto.
5681 (CODE_FOR_lasx_xvmod_hu): Ditto.
5682 (CODE_FOR_lasx_xvmod_wu): Ditto.
5683 (CODE_FOR_lasx_xvmod_du): Ditto.
5684 (CODE_FOR_lasx_xvmul_b): Ditto.
5685 (CODE_FOR_lasx_xvmul_h): Ditto.
5686 (CODE_FOR_lasx_xvmul_w): Ditto.
5687 (CODE_FOR_lasx_xvmul_d): Ditto.
5688 (CODE_FOR_lasx_xvclz_b): Ditto.
5689 (CODE_FOR_lasx_xvclz_h): Ditto.
5690 (CODE_FOR_lasx_xvclz_w): Ditto.
5691 (CODE_FOR_lasx_xvclz_d): Ditto.
5692 (CODE_FOR_lasx_xvnor_v): Ditto.
5693 (CODE_FOR_lasx_xvor_v): Ditto.
5694 (CODE_FOR_lasx_xvori_b): Ditto.
5695 (CODE_FOR_lasx_xvnori_b): Ditto.
5696 (CODE_FOR_lasx_xvpcnt_b): Ditto.
5697 (CODE_FOR_lasx_xvpcnt_h): Ditto.
5698 (CODE_FOR_lasx_xvpcnt_w): Ditto.
5699 (CODE_FOR_lasx_xvpcnt_d): Ditto.
5700 (CODE_FOR_lasx_xvxor_v): Ditto.
5701 (CODE_FOR_lasx_xvxori_b): Ditto.
5702 (CODE_FOR_lasx_xvsll_b): Ditto.
5703 (CODE_FOR_lasx_xvsll_h): Ditto.
5704 (CODE_FOR_lasx_xvsll_w): Ditto.
5705 (CODE_FOR_lasx_xvsll_d): Ditto.
5706 (CODE_FOR_lasx_xvslli_b): Ditto.
5707 (CODE_FOR_lasx_xvslli_h): Ditto.
5708 (CODE_FOR_lasx_xvslli_w): Ditto.
5709 (CODE_FOR_lasx_xvslli_d): Ditto.
5710 (CODE_FOR_lasx_xvsra_b): Ditto.
5711 (CODE_FOR_lasx_xvsra_h): Ditto.
5712 (CODE_FOR_lasx_xvsra_w): Ditto.
5713 (CODE_FOR_lasx_xvsra_d): Ditto.
5714 (CODE_FOR_lasx_xvsrai_b): Ditto.
5715 (CODE_FOR_lasx_xvsrai_h): Ditto.
5716 (CODE_FOR_lasx_xvsrai_w): Ditto.
5717 (CODE_FOR_lasx_xvsrai_d): Ditto.
5718 (CODE_FOR_lasx_xvsrl_b): Ditto.
5719 (CODE_FOR_lasx_xvsrl_h): Ditto.
5720 (CODE_FOR_lasx_xvsrl_w): Ditto.
5721 (CODE_FOR_lasx_xvsrl_d): Ditto.
5722 (CODE_FOR_lasx_xvsrli_b): Ditto.
5723 (CODE_FOR_lasx_xvsrli_h): Ditto.
5724 (CODE_FOR_lasx_xvsrli_w): Ditto.
5725 (CODE_FOR_lasx_xvsrli_d): Ditto.
5726 (CODE_FOR_lasx_xvsub_b): Ditto.
5727 (CODE_FOR_lasx_xvsub_h): Ditto.
5728 (CODE_FOR_lasx_xvsub_w): Ditto.
5729 (CODE_FOR_lasx_xvsub_d): Ditto.
5730 (CODE_FOR_lasx_xvsubi_bu): Ditto.
5731 (CODE_FOR_lasx_xvsubi_hu): Ditto.
5732 (CODE_FOR_lasx_xvsubi_wu): Ditto.
5733 (CODE_FOR_lasx_xvsubi_du): Ditto.
5734 (CODE_FOR_lasx_xvpackod_d): Ditto.
5735 (CODE_FOR_lasx_xvpackev_d): Ditto.
5736 (CODE_FOR_lasx_xvpickod_d): Ditto.
5737 (CODE_FOR_lasx_xvpickev_d): Ditto.
5738 (CODE_FOR_lasx_xvrepli_b): Ditto.
5739 (CODE_FOR_lasx_xvrepli_h): Ditto.
5740 (CODE_FOR_lasx_xvrepli_w): Ditto.
5741 (CODE_FOR_lasx_xvrepli_d): Ditto.
5742 (CODE_FOR_lasx_xvandn_v): Ditto.
5743 (CODE_FOR_lasx_xvorn_v): Ditto.
5744 (CODE_FOR_lasx_xvneg_b): Ditto.
5745 (CODE_FOR_lasx_xvneg_h): Ditto.
5746 (CODE_FOR_lasx_xvneg_w): Ditto.
5747 (CODE_FOR_lasx_xvneg_d): Ditto.
5748 (CODE_FOR_lasx_xvbsrl_v): Ditto.
5749 (CODE_FOR_lasx_xvbsll_v): Ditto.
5750 (CODE_FOR_lasx_xvfmadd_s): Ditto.
5751 (CODE_FOR_lasx_xvfmadd_d): Ditto.
5752 (CODE_FOR_lasx_xvfmsub_s): Ditto.
5753 (CODE_FOR_lasx_xvfmsub_d): Ditto.
5754 (CODE_FOR_lasx_xvfnmadd_s): Ditto.
5755 (CODE_FOR_lasx_xvfnmadd_d): Ditto.
5756 (CODE_FOR_lasx_xvfnmsub_s): Ditto.
5757 (CODE_FOR_lasx_xvfnmsub_d): Ditto.
5758 (CODE_FOR_lasx_xvpermi_q): Ditto.
5759 (CODE_FOR_lasx_xvpermi_d): Ditto.
5760 (CODE_FOR_lasx_xbnz_v): Ditto.
5761 (CODE_FOR_lasx_xbz_v): Ditto.
5762 (CODE_FOR_lasx_xvssub_b): Ditto.
5763 (CODE_FOR_lasx_xvssub_h): Ditto.
5764 (CODE_FOR_lasx_xvssub_w): Ditto.
5765 (CODE_FOR_lasx_xvssub_d): Ditto.
5766 (CODE_FOR_lasx_xvssub_bu): Ditto.
5767 (CODE_FOR_lasx_xvssub_hu): Ditto.
5768 (CODE_FOR_lasx_xvssub_wu): Ditto.
5769 (CODE_FOR_lasx_xvssub_du): Ditto.
5770 (CODE_FOR_lasx_xvabsd_b): Ditto.
5771 (CODE_FOR_lasx_xvabsd_h): Ditto.
5772 (CODE_FOR_lasx_xvabsd_w): Ditto.
5773 (CODE_FOR_lasx_xvabsd_d): Ditto.
5774 (CODE_FOR_lasx_xvabsd_bu): Ditto.
5775 (CODE_FOR_lasx_xvabsd_hu): Ditto.
5776 (CODE_FOR_lasx_xvabsd_wu): Ditto.
5777 (CODE_FOR_lasx_xvabsd_du): Ditto.
5778 (CODE_FOR_lasx_xvavg_b): Ditto.
5779 (CODE_FOR_lasx_xvavg_h): Ditto.
5780 (CODE_FOR_lasx_xvavg_w): Ditto.
5781 (CODE_FOR_lasx_xvavg_d): Ditto.
5782 (CODE_FOR_lasx_xvavg_bu): Ditto.
5783 (CODE_FOR_lasx_xvavg_hu): Ditto.
5784 (CODE_FOR_lasx_xvavg_wu): Ditto.
5785 (CODE_FOR_lasx_xvavg_du): Ditto.
5786 (CODE_FOR_lasx_xvavgr_b): Ditto.
5787 (CODE_FOR_lasx_xvavgr_h): Ditto.
5788 (CODE_FOR_lasx_xvavgr_w): Ditto.
5789 (CODE_FOR_lasx_xvavgr_d): Ditto.
5790 (CODE_FOR_lasx_xvavgr_bu): Ditto.
5791 (CODE_FOR_lasx_xvavgr_hu): Ditto.
5792 (CODE_FOR_lasx_xvavgr_wu): Ditto.
5793 (CODE_FOR_lasx_xvavgr_du): Ditto.
5794 (CODE_FOR_lasx_xvmuh_b): Ditto.
5795 (CODE_FOR_lasx_xvmuh_h): Ditto.
5796 (CODE_FOR_lasx_xvmuh_w): Ditto.
5797 (CODE_FOR_lasx_xvmuh_d): Ditto.
5798 (CODE_FOR_lasx_xvmuh_bu): Ditto.
5799 (CODE_FOR_lasx_xvmuh_hu): Ditto.
5800 (CODE_FOR_lasx_xvmuh_wu): Ditto.
5801 (CODE_FOR_lasx_xvmuh_du): Ditto.
5802 (CODE_FOR_lasx_xvssran_b_h): Ditto.
5803 (CODE_FOR_lasx_xvssran_h_w): Ditto.
5804 (CODE_FOR_lasx_xvssran_w_d): Ditto.
5805 (CODE_FOR_lasx_xvssran_bu_h): Ditto.
5806 (CODE_FOR_lasx_xvssran_hu_w): Ditto.
5807 (CODE_FOR_lasx_xvssran_wu_d): Ditto.
5808 (CODE_FOR_lasx_xvssrarn_b_h): Ditto.
5809 (CODE_FOR_lasx_xvssrarn_h_w): Ditto.
5810 (CODE_FOR_lasx_xvssrarn_w_d): Ditto.
5811 (CODE_FOR_lasx_xvssrarn_bu_h): Ditto.
5812 (CODE_FOR_lasx_xvssrarn_hu_w): Ditto.
5813 (CODE_FOR_lasx_xvssrarn_wu_d): Ditto.
5814 (CODE_FOR_lasx_xvssrln_bu_h): Ditto.
5815 (CODE_FOR_lasx_xvssrln_hu_w): Ditto.
5816 (CODE_FOR_lasx_xvssrln_wu_d): Ditto.
5817 (CODE_FOR_lasx_xvssrlrn_bu_h): Ditto.
5818 (CODE_FOR_lasx_xvssrlrn_hu_w): Ditto.
5819 (CODE_FOR_lasx_xvssrlrn_wu_d): Ditto.
5820 (CODE_FOR_lasx_xvftint_w_s): Ditto.
5821 (CODE_FOR_lasx_xvftint_l_d): Ditto.
5822 (CODE_FOR_lasx_xvftint_wu_s): Ditto.
5823 (CODE_FOR_lasx_xvftint_lu_d): Ditto.
5824 (CODE_FOR_lasx_xvsllwil_h_b): Ditto.
5825 (CODE_FOR_lasx_xvsllwil_w_h): Ditto.
5826 (CODE_FOR_lasx_xvsllwil_d_w): Ditto.
5827 (CODE_FOR_lasx_xvsllwil_hu_bu): Ditto.
5828 (CODE_FOR_lasx_xvsllwil_wu_hu): Ditto.
5829 (CODE_FOR_lasx_xvsllwil_du_wu): Ditto.
5830 (CODE_FOR_lasx_xvsat_b): Ditto.
5831 (CODE_FOR_lasx_xvsat_h): Ditto.
5832 (CODE_FOR_lasx_xvsat_w): Ditto.
5833 (CODE_FOR_lasx_xvsat_d): Ditto.
5834 (CODE_FOR_lasx_xvsat_bu): Ditto.
5835 (CODE_FOR_lasx_xvsat_hu): Ditto.
5836 (CODE_FOR_lasx_xvsat_wu): Ditto.
5837 (CODE_FOR_lasx_xvsat_du): Ditto.
5838 (loongarch_builtin_vectorized_function): Ditto.
5839 (loongarch_expand_builtin_insn): Ditto.
5840 (loongarch_expand_builtin): Ditto.
5841 * config/loongarch/loongarch-ftypes.def (1): Ditto.
5845 * config/loongarch/lasxintrin.h: New file.
5847 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
5849 * config/loongarch/loongarch-modes.def
5850 (VECTOR_MODES): Add Loongson ASX instruction support.
5851 * config/loongarch/loongarch-protos.h (loongarch_split_256bit_move): Ditto.
5852 (loongarch_split_256bit_move_p): Ditto.
5853 (loongarch_expand_vector_group_init): Ditto.
5854 (loongarch_expand_vec_perm_1): Ditto.
5855 * config/loongarch/loongarch.cc (loongarch_symbol_insns): Ditto.
5856 (loongarch_valid_offset_p): Ditto.
5857 (loongarch_address_insns): Ditto.
5858 (loongarch_const_insns): Ditto.
5859 (loongarch_legitimize_move): Ditto.
5860 (loongarch_builtin_vectorization_cost): Ditto.
5861 (loongarch_split_move_p): Ditto.
5862 (loongarch_split_move): Ditto.
5863 (loongarch_output_move_index_float): Ditto.
5864 (loongarch_split_256bit_move_p): Ditto.
5865 (loongarch_split_256bit_move): Ditto.
5866 (loongarch_output_move): Ditto.
5867 (loongarch_print_operand_reloc): Ditto.
5868 (loongarch_print_operand): Ditto.
5869 (loongarch_hard_regno_mode_ok_uncached): Ditto.
5870 (loongarch_hard_regno_nregs): Ditto.
5871 (loongarch_class_max_nregs): Ditto.
5872 (loongarch_can_change_mode_class): Ditto.
5873 (loongarch_mode_ok_for_mov_fmt_p): Ditto.
5874 (loongarch_vector_mode_supported_p): Ditto.
5875 (loongarch_preferred_simd_mode): Ditto.
5876 (loongarch_autovectorize_vector_modes): Ditto.
5877 (loongarch_lsx_output_division): Ditto.
5878 (loongarch_expand_lsx_shuffle): Ditto.
5879 (loongarch_expand_vec_perm): Ditto.
5880 (loongarch_expand_vec_perm_interleave): Ditto.
5881 (loongarch_try_expand_lsx_vshuf_const): Ditto.
5882 (loongarch_expand_vec_perm_even_odd_1): Ditto.
5883 (loongarch_expand_vec_perm_even_odd): Ditto.
5884 (loongarch_expand_vec_perm_1): Ditto.
5885 (loongarch_expand_vec_perm_const_2): Ditto.
5886 (loongarch_is_quad_duplicate): Ditto.
5887 (loongarch_is_double_duplicate): Ditto.
5888 (loongarch_is_odd_extraction): Ditto.
5889 (loongarch_is_even_extraction): Ditto.
5890 (loongarch_is_extraction_permutation): Ditto.
5891 (loongarch_is_center_extraction): Ditto.
5892 (loongarch_is_reversing_permutation): Ditto.
5893 (loongarch_is_di_misalign_extract): Ditto.
5894 (loongarch_is_si_misalign_extract): Ditto.
5895 (loongarch_is_lasx_lowpart_interleave): Ditto.
5896 (loongarch_is_lasx_lowpart_interleave_2): Ditto.
5897 (COMPARE_SELECTOR): Ditto.
5898 (loongarch_is_lasx_lowpart_extract): Ditto.
5899 (loongarch_is_lasx_highpart_interleave): Ditto.
5900 (loongarch_is_lasx_highpart_interleave_2): Ditto.
5901 (loongarch_is_elem_duplicate): Ditto.
5902 (loongarch_is_op_reverse_perm): Ditto.
5903 (loongarch_is_single_op_perm): Ditto.
5904 (loongarch_is_divisible_perm): Ditto.
5905 (loongarch_is_triple_stride_extract): Ditto.
5906 (loongarch_vectorize_vec_perm_const): Ditto.
5907 (loongarch_cpu_sched_reassociation_width): Ditto.
5908 (loongarch_expand_vector_extract): Ditto.
5909 (emit_reduc_half): Ditto.
5910 (loongarch_expand_vec_unpack): Ditto.
5911 (loongarch_expand_vector_group_init): Ditto.
5912 (loongarch_expand_vector_init): Ditto.
5913 (loongarch_expand_lsx_cmp): Ditto.
5914 (loongarch_builtin_support_vector_misalignment): Ditto.
5915 * config/loongarch/loongarch.h (UNITS_PER_LASX_REG): Ditto.
5916 (BITS_PER_LASX_REG): Ditto.
5917 (STRUCTURE_SIZE_BOUNDARY): Ditto.
5918 (LASX_REG_FIRST): Ditto.
5919 (LASX_REG_LAST): Ditto.
5920 (LASX_REG_NUM): Ditto.
5921 (LASX_REG_P): Ditto.
5922 (LASX_REG_RTX_P): Ditto.
5923 (LASX_SUPPORTED_MODE_P): Ditto.
5924 * config/loongarch/loongarch.md: Ditto.
5925 * config/loongarch/lasx.md: New file.
5927 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
5929 * config.gcc: Export the header file lsxintrin.h.
5930 * config/loongarch/loongarch-builtins.cc (LARCH_FTYPE_NAME4): Add builtin function support.
5931 (enum loongarch_builtin_type): Ditto.
5933 (LARCH_BUILTIN): Ditto.
5934 (LSX_BUILTIN): Ditto.
5935 (LSX_BUILTIN_TEST_BRANCH): Ditto.
5936 (LSX_NO_TARGET_BUILTIN): Ditto.
5937 (CODE_FOR_lsx_vsadd_b): Ditto.
5938 (CODE_FOR_lsx_vsadd_h): Ditto.
5939 (CODE_FOR_lsx_vsadd_w): Ditto.
5940 (CODE_FOR_lsx_vsadd_d): Ditto.
5941 (CODE_FOR_lsx_vsadd_bu): Ditto.
5942 (CODE_FOR_lsx_vsadd_hu): Ditto.
5943 (CODE_FOR_lsx_vsadd_wu): Ditto.
5944 (CODE_FOR_lsx_vsadd_du): Ditto.
5945 (CODE_FOR_lsx_vadd_b): Ditto.
5946 (CODE_FOR_lsx_vadd_h): Ditto.
5947 (CODE_FOR_lsx_vadd_w): Ditto.
5948 (CODE_FOR_lsx_vadd_d): Ditto.
5949 (CODE_FOR_lsx_vaddi_bu): Ditto.
5950 (CODE_FOR_lsx_vaddi_hu): Ditto.
5951 (CODE_FOR_lsx_vaddi_wu): Ditto.
5952 (CODE_FOR_lsx_vaddi_du): Ditto.
5953 (CODE_FOR_lsx_vand_v): Ditto.
5954 (CODE_FOR_lsx_vandi_b): Ditto.
5955 (CODE_FOR_lsx_bnz_v): Ditto.
5956 (CODE_FOR_lsx_bz_v): Ditto.
5957 (CODE_FOR_lsx_vbitsel_v): Ditto.
5958 (CODE_FOR_lsx_vseqi_b): Ditto.
5959 (CODE_FOR_lsx_vseqi_h): Ditto.
5960 (CODE_FOR_lsx_vseqi_w): Ditto.
5961 (CODE_FOR_lsx_vseqi_d): Ditto.
5962 (CODE_FOR_lsx_vslti_b): Ditto.
5963 (CODE_FOR_lsx_vslti_h): Ditto.
5964 (CODE_FOR_lsx_vslti_w): Ditto.
5965 (CODE_FOR_lsx_vslti_d): Ditto.
5966 (CODE_FOR_lsx_vslti_bu): Ditto.
5967 (CODE_FOR_lsx_vslti_hu): Ditto.
5968 (CODE_FOR_lsx_vslti_wu): Ditto.
5969 (CODE_FOR_lsx_vslti_du): Ditto.
5970 (CODE_FOR_lsx_vslei_b): Ditto.
5971 (CODE_FOR_lsx_vslei_h): Ditto.
5972 (CODE_FOR_lsx_vslei_w): Ditto.
5973 (CODE_FOR_lsx_vslei_d): Ditto.
5974 (CODE_FOR_lsx_vslei_bu): Ditto.
5975 (CODE_FOR_lsx_vslei_hu): Ditto.
5976 (CODE_FOR_lsx_vslei_wu): Ditto.
5977 (CODE_FOR_lsx_vslei_du): Ditto.
5978 (CODE_FOR_lsx_vdiv_b): Ditto.
5979 (CODE_FOR_lsx_vdiv_h): Ditto.
5980 (CODE_FOR_lsx_vdiv_w): Ditto.
5981 (CODE_FOR_lsx_vdiv_d): Ditto.
5982 (CODE_FOR_lsx_vdiv_bu): Ditto.
5983 (CODE_FOR_lsx_vdiv_hu): Ditto.
5984 (CODE_FOR_lsx_vdiv_wu): Ditto.
5985 (CODE_FOR_lsx_vdiv_du): Ditto.
5986 (CODE_FOR_lsx_vfadd_s): Ditto.
5987 (CODE_FOR_lsx_vfadd_d): Ditto.
5988 (CODE_FOR_lsx_vftintrz_w_s): Ditto.
5989 (CODE_FOR_lsx_vftintrz_l_d): Ditto.
5990 (CODE_FOR_lsx_vftintrz_wu_s): Ditto.
5991 (CODE_FOR_lsx_vftintrz_lu_d): Ditto.
5992 (CODE_FOR_lsx_vffint_s_w): Ditto.
5993 (CODE_FOR_lsx_vffint_d_l): Ditto.
5994 (CODE_FOR_lsx_vffint_s_wu): Ditto.
5995 (CODE_FOR_lsx_vffint_d_lu): Ditto.
5996 (CODE_FOR_lsx_vfsub_s): Ditto.
5997 (CODE_FOR_lsx_vfsub_d): Ditto.
5998 (CODE_FOR_lsx_vfmul_s): Ditto.
5999 (CODE_FOR_lsx_vfmul_d): Ditto.
6000 (CODE_FOR_lsx_vfdiv_s): Ditto.
6001 (CODE_FOR_lsx_vfdiv_d): Ditto.
6002 (CODE_FOR_lsx_vfmax_s): Ditto.
6003 (CODE_FOR_lsx_vfmax_d): Ditto.
6004 (CODE_FOR_lsx_vfmin_s): Ditto.
6005 (CODE_FOR_lsx_vfmin_d): Ditto.
6006 (CODE_FOR_lsx_vfsqrt_s): Ditto.
6007 (CODE_FOR_lsx_vfsqrt_d): Ditto.
6008 (CODE_FOR_lsx_vflogb_s): Ditto.
6009 (CODE_FOR_lsx_vflogb_d): Ditto.
6010 (CODE_FOR_lsx_vmax_b): Ditto.
6011 (CODE_FOR_lsx_vmax_h): Ditto.
6012 (CODE_FOR_lsx_vmax_w): Ditto.
6013 (CODE_FOR_lsx_vmax_d): Ditto.
6014 (CODE_FOR_lsx_vmaxi_b): Ditto.
6015 (CODE_FOR_lsx_vmaxi_h): Ditto.
6016 (CODE_FOR_lsx_vmaxi_w): Ditto.
6017 (CODE_FOR_lsx_vmaxi_d): Ditto.
6018 (CODE_FOR_lsx_vmax_bu): Ditto.
6019 (CODE_FOR_lsx_vmax_hu): Ditto.
6020 (CODE_FOR_lsx_vmax_wu): Ditto.
6021 (CODE_FOR_lsx_vmax_du): Ditto.
6022 (CODE_FOR_lsx_vmaxi_bu): Ditto.
6023 (CODE_FOR_lsx_vmaxi_hu): Ditto.
6024 (CODE_FOR_lsx_vmaxi_wu): Ditto.
6025 (CODE_FOR_lsx_vmaxi_du): Ditto.
6026 (CODE_FOR_lsx_vmin_b): Ditto.
6027 (CODE_FOR_lsx_vmin_h): Ditto.
6028 (CODE_FOR_lsx_vmin_w): Ditto.
6029 (CODE_FOR_lsx_vmin_d): Ditto.
6030 (CODE_FOR_lsx_vmini_b): Ditto.
6031 (CODE_FOR_lsx_vmini_h): Ditto.
6032 (CODE_FOR_lsx_vmini_w): Ditto.
6033 (CODE_FOR_lsx_vmini_d): Ditto.
6034 (CODE_FOR_lsx_vmin_bu): Ditto.
6035 (CODE_FOR_lsx_vmin_hu): Ditto.
6036 (CODE_FOR_lsx_vmin_wu): Ditto.
6037 (CODE_FOR_lsx_vmin_du): Ditto.
6038 (CODE_FOR_lsx_vmini_bu): Ditto.
6039 (CODE_FOR_lsx_vmini_hu): Ditto.
6040 (CODE_FOR_lsx_vmini_wu): Ditto.
6041 (CODE_FOR_lsx_vmini_du): Ditto.
6042 (CODE_FOR_lsx_vmod_b): Ditto.
6043 (CODE_FOR_lsx_vmod_h): Ditto.
6044 (CODE_FOR_lsx_vmod_w): Ditto.
6045 (CODE_FOR_lsx_vmod_d): Ditto.
6046 (CODE_FOR_lsx_vmod_bu): Ditto.
6047 (CODE_FOR_lsx_vmod_hu): Ditto.
6048 (CODE_FOR_lsx_vmod_wu): Ditto.
6049 (CODE_FOR_lsx_vmod_du): Ditto.
6050 (CODE_FOR_lsx_vmul_b): Ditto.
6051 (CODE_FOR_lsx_vmul_h): Ditto.
6052 (CODE_FOR_lsx_vmul_w): Ditto.
6053 (CODE_FOR_lsx_vmul_d): Ditto.
6054 (CODE_FOR_lsx_vclz_b): Ditto.
6055 (CODE_FOR_lsx_vclz_h): Ditto.
6056 (CODE_FOR_lsx_vclz_w): Ditto.
6057 (CODE_FOR_lsx_vclz_d): Ditto.
6058 (CODE_FOR_lsx_vnor_v): Ditto.
6059 (CODE_FOR_lsx_vor_v): Ditto.
6060 (CODE_FOR_lsx_vori_b): Ditto.
6061 (CODE_FOR_lsx_vnori_b): Ditto.
6062 (CODE_FOR_lsx_vpcnt_b): Ditto.
6063 (CODE_FOR_lsx_vpcnt_h): Ditto.
6064 (CODE_FOR_lsx_vpcnt_w): Ditto.
6065 (CODE_FOR_lsx_vpcnt_d): Ditto.
6066 (CODE_FOR_lsx_vxor_v): Ditto.
6067 (CODE_FOR_lsx_vxori_b): Ditto.
6068 (CODE_FOR_lsx_vsll_b): Ditto.
6069 (CODE_FOR_lsx_vsll_h): Ditto.
6070 (CODE_FOR_lsx_vsll_w): Ditto.
6071 (CODE_FOR_lsx_vsll_d): Ditto.
6072 (CODE_FOR_lsx_vslli_b): Ditto.
6073 (CODE_FOR_lsx_vslli_h): Ditto.
6074 (CODE_FOR_lsx_vslli_w): Ditto.
6075 (CODE_FOR_lsx_vslli_d): Ditto.
6076 (CODE_FOR_lsx_vsra_b): Ditto.
6077 (CODE_FOR_lsx_vsra_h): Ditto.
6078 (CODE_FOR_lsx_vsra_w): Ditto.
6079 (CODE_FOR_lsx_vsra_d): Ditto.
6080 (CODE_FOR_lsx_vsrai_b): Ditto.
6081 (CODE_FOR_lsx_vsrai_h): Ditto.
6082 (CODE_FOR_lsx_vsrai_w): Ditto.
6083 (CODE_FOR_lsx_vsrai_d): Ditto.
6084 (CODE_FOR_lsx_vsrl_b): Ditto.
6085 (CODE_FOR_lsx_vsrl_h): Ditto.
6086 (CODE_FOR_lsx_vsrl_w): Ditto.
6087 (CODE_FOR_lsx_vsrl_d): Ditto.
6088 (CODE_FOR_lsx_vsrli_b): Ditto.
6089 (CODE_FOR_lsx_vsrli_h): Ditto.
6090 (CODE_FOR_lsx_vsrli_w): Ditto.
6091 (CODE_FOR_lsx_vsrli_d): Ditto.
6092 (CODE_FOR_lsx_vsub_b): Ditto.
6093 (CODE_FOR_lsx_vsub_h): Ditto.
6094 (CODE_FOR_lsx_vsub_w): Ditto.
6095 (CODE_FOR_lsx_vsub_d): Ditto.
6096 (CODE_FOR_lsx_vsubi_bu): Ditto.
6097 (CODE_FOR_lsx_vsubi_hu): Ditto.
6098 (CODE_FOR_lsx_vsubi_wu): Ditto.
6099 (CODE_FOR_lsx_vsubi_du): Ditto.
6100 (CODE_FOR_lsx_vpackod_d): Ditto.
6101 (CODE_FOR_lsx_vpackev_d): Ditto.
6102 (CODE_FOR_lsx_vpickod_d): Ditto.
6103 (CODE_FOR_lsx_vpickev_d): Ditto.
6104 (CODE_FOR_lsx_vrepli_b): Ditto.
6105 (CODE_FOR_lsx_vrepli_h): Ditto.
6106 (CODE_FOR_lsx_vrepli_w): Ditto.
6107 (CODE_FOR_lsx_vrepli_d): Ditto.
6108 (CODE_FOR_lsx_vsat_b): Ditto.
6109 (CODE_FOR_lsx_vsat_h): Ditto.
6110 (CODE_FOR_lsx_vsat_w): Ditto.
6111 (CODE_FOR_lsx_vsat_d): Ditto.
6112 (CODE_FOR_lsx_vsat_bu): Ditto.
6113 (CODE_FOR_lsx_vsat_hu): Ditto.
6114 (CODE_FOR_lsx_vsat_wu): Ditto.
6115 (CODE_FOR_lsx_vsat_du): Ditto.
6116 (CODE_FOR_lsx_vavg_b): Ditto.
6117 (CODE_FOR_lsx_vavg_h): Ditto.
6118 (CODE_FOR_lsx_vavg_w): Ditto.
6119 (CODE_FOR_lsx_vavg_d): Ditto.
6120 (CODE_FOR_lsx_vavg_bu): Ditto.
6121 (CODE_FOR_lsx_vavg_hu): Ditto.
6122 (CODE_FOR_lsx_vavg_wu): Ditto.
6123 (CODE_FOR_lsx_vavg_du): Ditto.
6124 (CODE_FOR_lsx_vavgr_b): Ditto.
6125 (CODE_FOR_lsx_vavgr_h): Ditto.
6126 (CODE_FOR_lsx_vavgr_w): Ditto.
6127 (CODE_FOR_lsx_vavgr_d): Ditto.
6128 (CODE_FOR_lsx_vavgr_bu): Ditto.
6129 (CODE_FOR_lsx_vavgr_hu): Ditto.
6130 (CODE_FOR_lsx_vavgr_wu): Ditto.
6131 (CODE_FOR_lsx_vavgr_du): Ditto.
6132 (CODE_FOR_lsx_vssub_b): Ditto.
6133 (CODE_FOR_lsx_vssub_h): Ditto.
6134 (CODE_FOR_lsx_vssub_w): Ditto.
6135 (CODE_FOR_lsx_vssub_d): Ditto.
6136 (CODE_FOR_lsx_vssub_bu): Ditto.
6137 (CODE_FOR_lsx_vssub_hu): Ditto.
6138 (CODE_FOR_lsx_vssub_wu): Ditto.
6139 (CODE_FOR_lsx_vssub_du): Ditto.
6140 (CODE_FOR_lsx_vabsd_b): Ditto.
6141 (CODE_FOR_lsx_vabsd_h): Ditto.
6142 (CODE_FOR_lsx_vabsd_w): Ditto.
6143 (CODE_FOR_lsx_vabsd_d): Ditto.
6144 (CODE_FOR_lsx_vabsd_bu): Ditto.
6145 (CODE_FOR_lsx_vabsd_hu): Ditto.
6146 (CODE_FOR_lsx_vabsd_wu): Ditto.
6147 (CODE_FOR_lsx_vabsd_du): Ditto.
6148 (CODE_FOR_lsx_vftint_w_s): Ditto.
6149 (CODE_FOR_lsx_vftint_l_d): Ditto.
6150 (CODE_FOR_lsx_vftint_wu_s): Ditto.
6151 (CODE_FOR_lsx_vftint_lu_d): Ditto.
6152 (CODE_FOR_lsx_vandn_v): Ditto.
6153 (CODE_FOR_lsx_vorn_v): Ditto.
6154 (CODE_FOR_lsx_vneg_b): Ditto.
6155 (CODE_FOR_lsx_vneg_h): Ditto.
6156 (CODE_FOR_lsx_vneg_w): Ditto.
6157 (CODE_FOR_lsx_vneg_d): Ditto.
6158 (CODE_FOR_lsx_vshuf4i_d): Ditto.
6159 (CODE_FOR_lsx_vbsrl_v): Ditto.
6160 (CODE_FOR_lsx_vbsll_v): Ditto.
6161 (CODE_FOR_lsx_vfmadd_s): Ditto.
6162 (CODE_FOR_lsx_vfmadd_d): Ditto.
6163 (CODE_FOR_lsx_vfmsub_s): Ditto.
6164 (CODE_FOR_lsx_vfmsub_d): Ditto.
6165 (CODE_FOR_lsx_vfnmadd_s): Ditto.
6166 (CODE_FOR_lsx_vfnmadd_d): Ditto.
6167 (CODE_FOR_lsx_vfnmsub_s): Ditto.
6168 (CODE_FOR_lsx_vfnmsub_d): Ditto.
6169 (CODE_FOR_lsx_vmuh_b): Ditto.
6170 (CODE_FOR_lsx_vmuh_h): Ditto.
6171 (CODE_FOR_lsx_vmuh_w): Ditto.
6172 (CODE_FOR_lsx_vmuh_d): Ditto.
6173 (CODE_FOR_lsx_vmuh_bu): Ditto.
6174 (CODE_FOR_lsx_vmuh_hu): Ditto.
6175 (CODE_FOR_lsx_vmuh_wu): Ditto.
6176 (CODE_FOR_lsx_vmuh_du): Ditto.
6177 (CODE_FOR_lsx_vsllwil_h_b): Ditto.
6178 (CODE_FOR_lsx_vsllwil_w_h): Ditto.
6179 (CODE_FOR_lsx_vsllwil_d_w): Ditto.
6180 (CODE_FOR_lsx_vsllwil_hu_bu): Ditto.
6181 (CODE_FOR_lsx_vsllwil_wu_hu): Ditto.
6182 (CODE_FOR_lsx_vsllwil_du_wu): Ditto.
6183 (CODE_FOR_lsx_vssran_b_h): Ditto.
6184 (CODE_FOR_lsx_vssran_h_w): Ditto.
6185 (CODE_FOR_lsx_vssran_w_d): Ditto.
6186 (CODE_FOR_lsx_vssran_bu_h): Ditto.
6187 (CODE_FOR_lsx_vssran_hu_w): Ditto.
6188 (CODE_FOR_lsx_vssran_wu_d): Ditto.
6189 (CODE_FOR_lsx_vssrarn_b_h): Ditto.
6190 (CODE_FOR_lsx_vssrarn_h_w): Ditto.
6191 (CODE_FOR_lsx_vssrarn_w_d): Ditto.
6192 (CODE_FOR_lsx_vssrarn_bu_h): Ditto.
6193 (CODE_FOR_lsx_vssrarn_hu_w): Ditto.
6194 (CODE_FOR_lsx_vssrarn_wu_d): Ditto.
6195 (CODE_FOR_lsx_vssrln_bu_h): Ditto.
6196 (CODE_FOR_lsx_vssrln_hu_w): Ditto.
6197 (CODE_FOR_lsx_vssrln_wu_d): Ditto.
6198 (CODE_FOR_lsx_vssrlrn_bu_h): Ditto.
6199 (CODE_FOR_lsx_vssrlrn_hu_w): Ditto.
6200 (CODE_FOR_lsx_vssrlrn_wu_d): Ditto.
6201 (loongarch_builtin_vector_type): Ditto.
6202 (loongarch_build_cvpointer_type): Ditto.
6203 (LARCH_ATYPE_CVPOINTER): Ditto.
6204 (LARCH_ATYPE_BOOLEAN): Ditto.
6205 (LARCH_ATYPE_V2SF): Ditto.
6206 (LARCH_ATYPE_V2HI): Ditto.
6207 (LARCH_ATYPE_V2SI): Ditto.
6208 (LARCH_ATYPE_V4QI): Ditto.
6209 (LARCH_ATYPE_V4HI): Ditto.
6210 (LARCH_ATYPE_V8QI): Ditto.
6211 (LARCH_ATYPE_V2DI): Ditto.
6212 (LARCH_ATYPE_V4SI): Ditto.
6213 (LARCH_ATYPE_V8HI): Ditto.
6214 (LARCH_ATYPE_V16QI): Ditto.
6215 (LARCH_ATYPE_V2DF): Ditto.
6216 (LARCH_ATYPE_V4SF): Ditto.
6217 (LARCH_ATYPE_V4DI): Ditto.
6218 (LARCH_ATYPE_V8SI): Ditto.
6219 (LARCH_ATYPE_V16HI): Ditto.
6220 (LARCH_ATYPE_V32QI): Ditto.
6221 (LARCH_ATYPE_V4DF): Ditto.
6222 (LARCH_ATYPE_V8SF): Ditto.
6223 (LARCH_ATYPE_UV2DI): Ditto.
6224 (LARCH_ATYPE_UV4SI): Ditto.
6225 (LARCH_ATYPE_UV8HI): Ditto.
6226 (LARCH_ATYPE_UV16QI): Ditto.
6227 (LARCH_ATYPE_UV4DI): Ditto.
6228 (LARCH_ATYPE_UV8SI): Ditto.
6229 (LARCH_ATYPE_UV16HI): Ditto.
6230 (LARCH_ATYPE_UV32QI): Ditto.
6231 (LARCH_ATYPE_UV2SI): Ditto.
6232 (LARCH_ATYPE_UV4HI): Ditto.
6233 (LARCH_ATYPE_UV8QI): Ditto.
6234 (loongarch_builtin_vectorized_function): Ditto.
6235 (LARCH_GET_BUILTIN): Ditto.
6236 (loongarch_expand_builtin_insn): Ditto.
6237 (loongarch_expand_builtin_lsx_test_branch): Ditto.
6238 (loongarch_expand_builtin): Ditto.
6239 * config/loongarch/loongarch-ftypes.def (1): Ditto.
6243 * config/loongarch/lsxintrin.h: New file.
6245 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
6247 * config/loongarch/constraints.md (M): Add Loongson LSX base instruction support.
6267 * config/loongarch/genopts/loongarch.opt.in: Ditto.
6268 * config/loongarch/loongarch-builtins.cc (loongarch_gen_const_int_vector): Ditto.
6269 * config/loongarch/loongarch-modes.def (VECTOR_MODES): Ditto.
6270 (VECTOR_MODE): Ditto.
6272 * config/loongarch/loongarch-protos.h (loongarch_split_move_insn_p): Ditto.
6273 (loongarch_split_move_insn): Ditto.
6274 (loongarch_split_128bit_move): Ditto.
6275 (loongarch_split_128bit_move_p): Ditto.
6276 (loongarch_split_lsx_copy_d): Ditto.
6277 (loongarch_split_lsx_insert_d): Ditto.
6278 (loongarch_split_lsx_fill_d): Ditto.
6279 (loongarch_expand_vec_cmp): Ditto.
6280 (loongarch_const_vector_same_val_p): Ditto.
6281 (loongarch_const_vector_same_bytes_p): Ditto.
6282 (loongarch_const_vector_same_int_p): Ditto.
6283 (loongarch_const_vector_shuffle_set_p): Ditto.
6284 (loongarch_const_vector_bitimm_set_p): Ditto.
6285 (loongarch_const_vector_bitimm_clr_p): Ditto.
6286 (loongarch_lsx_vec_parallel_const_half): Ditto.
6287 (loongarch_gen_const_int_vector): Ditto.
6288 (loongarch_lsx_output_division): Ditto.
6289 (loongarch_expand_vector_init): Ditto.
6290 (loongarch_expand_vec_unpack): Ditto.
6291 (loongarch_expand_vec_perm): Ditto.
6292 (loongarch_expand_vector_extract): Ditto.
6293 (loongarch_expand_vector_reduc): Ditto.
6294 (loongarch_ldst_scaled_shift): Ditto.
6295 (loongarch_expand_vec_cond_expr): Ditto.
6296 (loongarch_expand_vec_cond_mask_expr): Ditto.
6297 (loongarch_builtin_vectorized_function): Ditto.
6298 (loongarch_gen_const_int_vector_shuffle): Ditto.
6299 (loongarch_build_signbit_mask): Ditto.
6300 * config/loongarch/loongarch.cc (loongarch_pass_aggregate_num_fpr): Ditto.
6301 (loongarch_setup_incoming_varargs): Ditto.
6302 (loongarch_emit_move): Ditto.
6303 (loongarch_const_vector_bitimm_set_p): Ditto.
6304 (loongarch_const_vector_bitimm_clr_p): Ditto.
6305 (loongarch_const_vector_same_val_p): Ditto.
6306 (loongarch_const_vector_same_bytes_p): Ditto.
6307 (loongarch_const_vector_same_int_p): Ditto.
6308 (loongarch_const_vector_shuffle_set_p): Ditto.
6309 (loongarch_symbol_insns): Ditto.
6310 (loongarch_cannot_force_const_mem): Ditto.
6311 (loongarch_valid_offset_p): Ditto.
6312 (loongarch_valid_index_p): Ditto.
6313 (loongarch_classify_address): Ditto.
6314 (loongarch_address_insns): Ditto.
6315 (loongarch_ldst_scaled_shift): Ditto.
6316 (loongarch_const_insns): Ditto.
6317 (loongarch_split_move_insn_p): Ditto.
6318 (loongarch_subword_at_byte): Ditto.
6319 (loongarch_legitimize_move): Ditto.
6320 (loongarch_builtin_vectorization_cost): Ditto.
6321 (loongarch_split_move_p): Ditto.
6322 (loongarch_split_move): Ditto.
6323 (loongarch_split_move_insn): Ditto.
6324 (loongarch_output_move_index_float): Ditto.
6325 (loongarch_split_128bit_move_p): Ditto.
6326 (loongarch_split_128bit_move): Ditto.
6327 (loongarch_split_lsx_copy_d): Ditto.
6328 (loongarch_split_lsx_insert_d): Ditto.
6329 (loongarch_split_lsx_fill_d): Ditto.
6330 (loongarch_output_move): Ditto.
6331 (loongarch_extend_comparands): Ditto.
6332 (loongarch_print_operand_reloc): Ditto.
6333 (loongarch_print_operand): Ditto.
6334 (loongarch_hard_regno_mode_ok_uncached): Ditto.
6335 (loongarch_hard_regno_call_part_clobbered): Ditto.
6336 (loongarch_hard_regno_nregs): Ditto.
6337 (loongarch_class_max_nregs): Ditto.
6338 (loongarch_can_change_mode_class): Ditto.
6339 (loongarch_mode_ok_for_mov_fmt_p): Ditto.
6340 (loongarch_secondary_reload): Ditto.
6341 (loongarch_vector_mode_supported_p): Ditto.
6342 (loongarch_preferred_simd_mode): Ditto.
6343 (loongarch_autovectorize_vector_modes): Ditto.
6344 (loongarch_lsx_output_division): Ditto.
6345 (loongarch_option_override_internal): Ditto.
6346 (loongarch_hard_regno_caller_save_mode): Ditto.
6347 (MAX_VECT_LEN): Ditto.
6348 (loongarch_spill_class): Ditto.
6349 (struct expand_vec_perm_d): Ditto.
6350 (loongarch_promote_function_mode): Ditto.
6351 (loongarch_expand_vselect): Ditto.
6352 (loongarch_starting_frame_offset): Ditto.
6353 (loongarch_expand_vselect_vconcat): Ditto.
6354 (TARGET_ASM_ALIGNED_DI_OP): Ditto.
6355 (TARGET_OPTION_OVERRIDE): Ditto.
6356 (TARGET_LEGITIMIZE_ADDRESS): Ditto.
6357 (TARGET_ASM_SELECT_RTX_SECTION): Ditto.
6358 (TARGET_ASM_FUNCTION_RODATA_SECTION): Ditto.
6359 (loongarch_expand_lsx_shuffle): Ditto.
6360 (TARGET_SCHED_INIT): Ditto.
6361 (TARGET_SCHED_REORDER): Ditto.
6362 (TARGET_SCHED_REORDER2): Ditto.
6363 (TARGET_SCHED_VARIABLE_ISSUE): Ditto.
6364 (TARGET_SCHED_ADJUST_COST): Ditto.
6365 (TARGET_SCHED_ISSUE_RATE): Ditto.
6366 (TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD): Ditto.
6367 (TARGET_FUNCTION_OK_FOR_SIBCALL): Ditto.
6368 (TARGET_VALID_POINTER_MODE): Ditto.
6369 (TARGET_REGISTER_MOVE_COST): Ditto.
6370 (TARGET_MEMORY_MOVE_COST): Ditto.
6371 (TARGET_RTX_COSTS): Ditto.
6372 (TARGET_ADDRESS_COST): Ditto.
6373 (TARGET_IN_SMALL_DATA_P): Ditto.
6374 (TARGET_PREFERRED_RELOAD_CLASS): Ditto.
6375 (TARGET_ASM_FILE_START_FILE_DIRECTIVE): Ditto.
6376 (TARGET_EXPAND_BUILTIN_VA_START): Ditto.
6377 (loongarch_expand_vec_perm): Ditto.
6378 (TARGET_PROMOTE_FUNCTION_MODE): Ditto.
6379 (TARGET_RETURN_IN_MEMORY): Ditto.
6380 (TARGET_FUNCTION_VALUE): Ditto.
6381 (TARGET_LIBCALL_VALUE): Ditto.
6382 (loongarch_try_expand_lsx_vshuf_const): Ditto.
6383 (TARGET_ASM_OUTPUT_MI_THUNK): Ditto.
6384 (TARGET_ASM_CAN_OUTPUT_MI_THUNK): Ditto.
6385 (TARGET_PRINT_OPERAND): Ditto.
6386 (TARGET_PRINT_OPERAND_ADDRESS): Ditto.
6387 (TARGET_PRINT_OPERAND_PUNCT_VALID_P): Ditto.
6388 (TARGET_SETUP_INCOMING_VARARGS): Ditto.
6389 (TARGET_STRICT_ARGUMENT_NAMING): Ditto.
6390 (TARGET_MUST_PASS_IN_STACK): Ditto.
6391 (TARGET_PASS_BY_REFERENCE): Ditto.
6392 (TARGET_ARG_PARTIAL_BYTES): Ditto.
6393 (TARGET_FUNCTION_ARG): Ditto.
6394 (TARGET_FUNCTION_ARG_ADVANCE): Ditto.
6395 (TARGET_FUNCTION_ARG_BOUNDARY): Ditto.
6396 (TARGET_SCALAR_MODE_SUPPORTED_P): Ditto.
6397 (TARGET_INIT_BUILTINS): Ditto.
6398 (loongarch_expand_vec_perm_const_1): Ditto.
6399 (loongarch_expand_vec_perm_const_2): Ditto.
6400 (loongarch_vectorize_vec_perm_const): Ditto.
6401 (loongarch_cpu_sched_reassociation_width): Ditto.
6402 (loongarch_sched_reassociation_width): Ditto.
6403 (loongarch_expand_vector_extract): Ditto.
6404 (emit_reduc_half): Ditto.
6405 (loongarch_expand_vector_reduc): Ditto.
6406 (loongarch_expand_vec_unpack): Ditto.
6407 (loongarch_lsx_vec_parallel_const_half): Ditto.
6408 (loongarch_constant_elt_p): Ditto.
6409 (loongarch_gen_const_int_vector_shuffle): Ditto.
6410 (loongarch_expand_vector_init): Ditto.
6411 (loongarch_expand_lsx_cmp): Ditto.
6412 (loongarch_expand_vec_cond_expr): Ditto.
6413 (loongarch_expand_vec_cond_mask_expr): Ditto.
6414 (loongarch_expand_vec_cmp): Ditto.
6415 (loongarch_case_values_threshold): Ditto.
6416 (loongarch_build_const_vector): Ditto.
6417 (loongarch_build_signbit_mask): Ditto.
6418 (loongarch_builtin_support_vector_misalignment): Ditto.
6419 (TARGET_ASM_ALIGNED_HI_OP): Ditto.
6420 (TARGET_ASM_ALIGNED_SI_OP): Ditto.
6421 (TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST): Ditto.
6422 (TARGET_VECTOR_MODE_SUPPORTED_P): Ditto.
6423 (TARGET_VECTORIZE_PREFERRED_SIMD_MODE): Ditto.
6424 (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Ditto.
6425 (TARGET_VECTORIZE_VEC_PERM_CONST): Ditto.
6426 (TARGET_SCHED_REASSOCIATION_WIDTH): Ditto.
6427 (TARGET_CASE_VALUES_THRESHOLD): Ditto.
6428 (TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Ditto.
6429 (TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT): Ditto.
6430 * config/loongarch/loongarch.h (TARGET_SUPPORTS_WIDE_INT): Ditto.
6431 (UNITS_PER_LSX_REG): Ditto.
6432 (BITS_PER_LSX_REG): Ditto.
6433 (BIGGEST_ALIGNMENT): Ditto.
6434 (LSX_REG_FIRST): Ditto.
6435 (LSX_REG_LAST): Ditto.
6436 (LSX_REG_NUM): Ditto.
6438 (LSX_REG_RTX_P): Ditto.
6439 (IMM13_OPERAND): Ditto.
6440 (LSX_SUPPORTED_MODE_P): Ditto.
6441 * config/loongarch/loongarch.md (unknown,add,sub,not,nor,and,or,xor): Ditto.
6442 (unknown,add,sub,not,nor,and,or,xor,simd_add): Ditto.
6443 (unknown,none,QI,HI,SI,DI,TI,SF,DF,TF,FCC): Ditto.
6450 * config/loongarch/loongarch.opt: Ditto.
6451 * config/loongarch/predicates.md (const_lsx_branch_operand): Ditto.
6452 (const_uimm3_operand): Ditto.
6453 (const_8_to_11_operand): Ditto.
6454 (const_12_to_15_operand): Ditto.
6455 (const_uimm4_operand): Ditto.
6456 (const_uimm6_operand): Ditto.
6457 (const_uimm7_operand): Ditto.
6458 (const_uimm8_operand): Ditto.
6459 (const_imm5_operand): Ditto.
6460 (const_imm10_operand): Ditto.
6461 (const_imm13_operand): Ditto.
6462 (reg_imm10_operand): Ditto.
6463 (aq8b_operand): Ditto.
6464 (aq8h_operand): Ditto.
6465 (aq8w_operand): Ditto.
6466 (aq8d_operand): Ditto.
6467 (aq10b_operand): Ditto.
6468 (aq10h_operand): Ditto.
6469 (aq10w_operand): Ditto.
6470 (aq10d_operand): Ditto.
6471 (aq12b_operand): Ditto.
6472 (aq12h_operand): Ditto.
6473 (aq12w_operand): Ditto.
6474 (aq12d_operand): Ditto.
6475 (const_m1_operand): Ditto.
6476 (reg_or_m1_operand): Ditto.
6477 (const_exp_2_operand): Ditto.
6478 (const_exp_4_operand): Ditto.
6479 (const_exp_8_operand): Ditto.
6480 (const_exp_16_operand): Ditto.
6481 (const_exp_32_operand): Ditto.
6482 (const_0_or_1_operand): Ditto.
6483 (const_0_to_3_operand): Ditto.
6484 (const_0_to_7_operand): Ditto.
6485 (const_2_or_3_operand): Ditto.
6486 (const_4_to_7_operand): Ditto.
6487 (const_8_to_15_operand): Ditto.
6488 (const_16_to_31_operand): Ditto.
6489 (qi_mask_operand): Ditto.
6490 (hi_mask_operand): Ditto.
6491 (si_mask_operand): Ditto.
6493 (db4_operand): Ditto.
6494 (db7_operand): Ditto.
6495 (db8_operand): Ditto.
6496 (ib3_operand): Ditto.
6497 (sb4_operand): Ditto.
6498 (sb5_operand): Ditto.
6499 (sb8_operand): Ditto.
6500 (sd8_operand): Ditto.
6501 (ub4_operand): Ditto.
6502 (ub8_operand): Ditto.
6503 (uh4_operand): Ditto.
6504 (uw4_operand): Ditto.
6505 (uw5_operand): Ditto.
6506 (uw6_operand): Ditto.
6507 (uw8_operand): Ditto.
6508 (addiur2_operand): Ditto.
6509 (addiusp_operand): Ditto.
6510 (andi16_operand): Ditto.
6511 (movep_src_register): Ditto.
6512 (movep_src_operand): Ditto.
6513 (fcc_reload_operand): Ditto.
6514 (muldiv_target_operand): Ditto.
6515 (const_vector_same_val_operand): Ditto.
6516 (const_vector_same_simm5_operand): Ditto.
6517 (const_vector_same_uimm5_operand): Ditto.
6518 (const_vector_same_ximm5_operand): Ditto.
6519 (const_vector_same_uimm6_operand): Ditto.
6520 (par_const_vector_shf_set_operand): Ditto.
6521 (reg_or_vector_same_val_operand): Ditto.
6522 (reg_or_vector_same_simm5_operand): Ditto.
6523 (reg_or_vector_same_uimm5_operand): Ditto.
6524 (reg_or_vector_same_ximm5_operand): Ditto.
6525 (reg_or_vector_same_uimm6_operand): Ditto.
6526 * doc/md.texi: Ditto.
6527 * config/loongarch/lsx.md: New file.
6529 2023-09-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6531 * config/riscv/riscv-protos.h (lookup_vector_type_attribute): Export global.
6532 (get_all_predecessors): New function.
6533 (get_all_successors): Ditto.
6534 * config/riscv/riscv-v.cc (get_all_predecessors): Ditto.
6535 (get_all_successors): Ditto.
6536 * config/riscv/riscv-vector-builtins.cc (sizeless_type_p): Export global.
6537 * config/riscv/riscv-vsetvl.cc (get_all_predecessors): Remove it.
6539 2023-09-05 Claudiu Zissulescu <claziss@gmail.com>
6541 * config/arc/arc-protos.h (arc_output_addsi): Remove declaration.
6542 (split_addsi): Likewise.
6543 * config/arc/arc.cc (arc_print_operand): Add/repurpose 's', 'S',
6544 'N', 'x', and 'J' code letters.
6545 (arc_output_addsi): Make it static.
6546 (split_addsi): Remove it.
6547 * config/arc/arc.h (UNSIGNED_INT*): New defines.
6548 (SINNED_INT*): Likewise.
6549 * config/arc/arc.md (type): Add add, sub, bxor types.
6550 (tst_movb): Change code letter from 's' to 'x'.
6551 (andsi3_i): Likewise.
6552 (addsi3_mixed): Refurbish the pattern.
6553 (call_i): Change code letter from 'S' to 'J'.
6554 * config/arc/arc700.md: Add newly introduced types.
6555 * config/arc/arcHS.md: Likewsie.
6556 * config/arc/arcHS4x.md: Likewise.
6557 * config/arc/constraints.md (Cca, CL2, Csp, C2a): Remove it.
6558 (CM4): Update description.
6559 (CP4, C6u, C6n, CIs, C4p): New constraint.
6561 2023-09-05 Claudiu Zissulescu <claziss@gmail.com>
6563 * common/config/arc/arc-common.cc (arc_option_optimization_table):
6564 Remove mbbit_peephole.
6565 * config/arc/arc.md (UNSPEC_ARC_DIRECT): Remove.
6566 (store_direct): Likewise.
6567 (BBIT peephole2): Likewise.
6568 * config/arc/arc.opt (mbbit-peephole): Ignore option.
6569 * doc/invoke.texi (mbbit-peephole): Update document.
6571 2023-09-05 Jakub Jelinek <jakub@redhat.com>
6573 * tree-ssa-tail-merge.cc (replace_block_by): Fix a comment typo:
6576 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
6578 * config/loongarch/loongarch.h (CC1_SPEC): Mark normalized
6579 options passed from driver to gnat1 as explicit for multilib.
6581 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
6583 * config.gcc: add loongarch*-elf target.
6584 * config/loongarch/elf.h: New file.
6585 Link against newlib by default.
6587 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
6589 * config.gcc: use -mstrict-align for building libraries
6590 if --with-strict-align-lib is given.
6591 * doc/install.texi: likewise.
6593 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
6595 * config/loongarch/loongarch-c.cc: Export macros
6596 "__loongarch_{arch,tune}" in the preprocessor.
6598 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
6600 * config.gcc: Make --with-abi= obsolete, decide the default ABI
6601 with target triplet. Allow specifying multilib library build
6602 options with --with-multilib-list and --with-multilib-default.
6603 * config/loongarch/t-linux: Likewise.
6604 * config/loongarch/genopts/loongarch-strings: Likewise.
6605 * config/loongarch/loongarch-str.h: Likewise.
6606 * doc/install.texi: Likewise.
6607 * config/loongarch/genopts/loongarch.opt.in: Introduce
6608 -m[no-]l[a]sx options. Only process -m*-float and
6609 -m[no-]l[a]sx in the GCC driver.
6610 * config/loongarch/loongarch.opt: Likewise.
6611 * config/loongarch/la464.md: Likewise.
6612 * config/loongarch/loongarch-c.cc: Likewise.
6613 * config/loongarch/loongarch-cpu.cc: Likewise.
6614 * config/loongarch/loongarch-cpu.h: Likewise.
6615 * config/loongarch/loongarch-def.c: Likewise.
6616 * config/loongarch/loongarch-def.h: Likewise.
6617 * config/loongarch/loongarch-driver.cc: Likewise.
6618 * config/loongarch/loongarch-driver.h: Likewise.
6619 * config/loongarch/loongarch-opts.cc: Likewise.
6620 * config/loongarch/loongarch-opts.h: Likewise.
6621 * config/loongarch/loongarch.cc: Likewise.
6622 * doc/invoke.texi: Likewise.
6624 2023-09-05 liuhongt <hongtao.liu@intel.com>
6626 * config/i386/sse.md: (V8BFH_128): Renamed to ..
6627 (VHFBF_128): .. this.
6628 (V16BFH_256): Renamed to ..
6629 (VHFBF_256): .. this.
6630 (avx512f_mov<mode>): Extend to V_128.
6631 (vcvtnee<bf16_ph>2ps_<mode>): Changed to VHFBF_128.
6632 (vcvtneo<bf16_ph>2ps_<mode>): Ditto.
6633 (vcvtnee<bf16_ph>2ps_<mode>): Changed to VHFBF_256.
6634 (vcvtneo<bf16_ph>2ps_<mode>): Ditto.
6635 * config/i386/i386-expand.cc (expand_vec_perm_blend):
6636 Canonicalize vec_merge.
6638 2023-09-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6640 * config/riscv/riscv-opts.h (enum riscv_autovec_lmul_enum): Fix Dynamic status.
6641 * config/riscv/riscv-v.cc (preferred_simd_mode): Ditto.
6642 (autovectorize_vector_modes): Ditto.
6643 (vectorize_related_mode): Ditto.
6645 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
6647 * config/rs6000/darwin.h (LIB_SPEC): Include libSystemStubs for
6648 all 32b Darwin PowerPC cases.
6650 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
6652 * config/darwin-sections.def (static_init_section): Add the
6653 __TEXT,__StaticInit section.
6654 * config/darwin.cc (darwin_function_section): Use the static init
6655 section for global initializers, to match other platform toolchains.
6657 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
6659 * config/darwin-sections.def (darwin_exception_section): Move to
6661 * config/darwin.cc (darwin_emit_except_table_label): Align before
6662 the exception table label.
6663 * config/darwin.h (ASM_PREFERRED_EH_DATA_FORMAT): Use indirect PC-
6664 relative 4byte relocs.
6666 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
6668 * config/darwin.cc (dump_machopic_symref_flags): New.
6669 (debug_machopic_symref_flags): New.
6671 2023-09-04 Pan Li <pan2.li@intel.com>
6673 * config/riscv/riscv-vector-builtins-types.def
6674 (vfloat16mf4_t): Add FP16 intrinsic def.
6675 (vfloat16mf2_t): Ditto.
6676 (vfloat16m1_t): Ditto.
6677 (vfloat16m2_t): Ditto.
6678 (vfloat16m4_t): Ditto.
6679 (vfloat16m8_t): Ditto.
6681 2023-09-04 Jiufu Guo <guojiufu@linux.ibm.com>
6683 PR tree-optimization/108757
6684 * match.pd ((X - N * M) / N): New pattern.
6685 ((X + N * M) / N): New pattern.
6686 ((X + C) div_rshift N): New pattern.
6688 2023-09-04 Guo Jie <guojie@loongson.cn>
6690 * config/loongarch/loongarch.md: Support 'G' -> 'k' in
6691 movsf_hardfloat and movdf_hardfloat.
6693 2023-09-04 Lulu Cheng <chenglulu@loongson.cn>
6695 * config/loongarch/loongarch.cc (loongarch_extend_comparands):
6696 In unsigned QImode test, check for sign extended subreg and/or
6697 constant operands, and do a sign extension in that case.
6698 * config/loongarch/loongarch.md (TARGET_64BIT): Define
6699 template cbranchqi4.
6701 2023-09-04 Lulu Cheng <chenglulu@loongson.cn>
6703 * config/loongarch/loongarch.md: Allows fixed-point values to be loaded
6704 from memory into floating-point registers.
6706 2023-09-03 Pan Li <pan2.li@intel.com>
6708 * config/riscv/autovec-vls.md (<optab><mode>3): New pattern for
6710 * config/riscv/vector.md: Add VLS modes to vfmax/vfmin.
6712 2023-09-02 Mikael Morin <mikael@gcc.gnu.org>
6714 * tree-diagnostic.cc (tree_diagnostics_defaults): Delete allocated
6715 pointer before overwriting it.
6717 2023-09-02 chenxiaolong <chenxiaolong@loongson.cn>
6719 * config/loongarch/loongarch-builtins.cc (loongarch_init_builtins):
6720 Associate the __float128 type to float128_type_node so that it can
6721 be recognized by the compiler.
6722 * config/loongarch/loongarch-c.cc (loongarch_cpu_cpp_builtins):
6723 Add the flag "FLOAT128_TYPE" to gcc and associate a function
6724 with the suffix "q" to "f128".
6725 * doc/extend.texi:Added support for 128-bit floating-point functions on
6726 the LoongArch architecture.
6728 2023-09-01 Jakub Jelinek <jakub@redhat.com>
6731 * common.opt (fabi-version=): Document version 19.
6732 * doc/invoke.texi (-fabi-version=): Likewise.
6734 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
6736 * config/riscv/autovec-opt.md (*cond_<optab><mode><vconvert>):
6737 New combine pattern.
6738 (*cond_<float_cvt><vconvert><mode>): Ditto.
6739 (*cond_<optab><vnconvert><mode>): Ditto.
6740 (*cond_<float_cvt><vnconvert><mode>): Ditto.
6741 (*cond_<optab><mode><vnconvert>): Ditto.
6742 (*cond_<float_cvt><mode><vnconvert>2): Ditto.
6743 * config/riscv/autovec.md (<optab><mode><vconvert>2): Adjust.
6744 (<float_cvt><vconvert><mode>2): Adjust.
6745 (<optab><vnconvert><mode>2): Adjust.
6746 (<float_cvt><vnconvert><mode>2): Adjust.
6747 (<optab><mode><vnconvert>2): Adjust.
6748 (<float_cvt><mode><vnconvert>2): Adjust.
6749 * config/riscv/riscv-v.cc (needs_fp_rounding): Add INT->FP extend.
6751 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
6753 * config/riscv/autovec-opt.md (*cond_extend<v_double_trunc><mode>):
6754 New combine pattern.
6755 (*cond_trunc<mode><v_double_trunc>): Ditto.
6756 * config/riscv/autovec.md: Adjust.
6757 * config/riscv/riscv-v.cc (needs_fp_rounding): Add FP extend.
6759 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
6761 * config/riscv/autovec-opt.md (*cond_<optab><v_double_trunc><mode>):
6762 New combine pattern.
6763 (*cond_<optab><v_quad_trunc><mode>): Ditto.
6764 (*cond_<optab><v_oct_trunc><mode>): Ditto.
6765 (*cond_trunc<mode><v_double_trunc>): Ditto.
6766 * config/riscv/autovec.md (<optab><v_quad_trunc><mode>2): Adjust.
6767 (<optab><v_oct_trunc><mode>2): Ditto.
6769 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
6771 * config/riscv/autovec.md: Adjust.
6772 * config/riscv/riscv-protos.h (expand_cond_len_unop): Ditto.
6773 (expand_cond_len_binop): Ditto.
6774 * config/riscv/riscv-v.cc (needs_fp_rounding): Ditto.
6775 (expand_cond_len_op): Ditto.
6776 (expand_cond_len_unop): Ditto.
6777 (expand_cond_len_binop): Ditto.
6778 (expand_cond_len_ternop): Ditto.
6780 2023-09-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6782 * config/riscv/riscv-v.cc (autovectorize_vector_modes): Enable
6783 VECT_COMPARE_COSTS by default.
6785 2023-09-01 Robin Dapp <rdapp@ventanamicro.com>
6787 * config/riscv/autovec.md (vec_extract<mode>qi): New expander.
6789 2023-09-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6791 * config/riscv/riscv-opts.h (enum riscv_autovec_lmul_enum): Add
6793 * config/riscv/riscv.opt: Add dynamic compile option.
6795 2023-09-01 Pan Li <pan2.li@intel.com>
6797 * config/riscv/autovec-vls.md (<optab><mode>3): New pattern for
6798 vls floating-point autovec.
6799 * config/riscv/vector-iterators.md: New iterator for
6800 floating-point V and VLS.
6801 * config/riscv/vector.md: Add VLS to floating-point binop.
6803 2023-09-01 Andrew Pinski <apinski@marvell.com>
6805 PR tree-optimization/19832
6806 * match.pd: Add pattern to optimize
6807 `(a != b) ? a OP b : c`.
6809 2023-09-01 Lulu Cheng <chenglulu@loongson.cn>
6810 Guo Jie <guojie@loongson.cn>
6813 * config/loongarch/loongarch.cc (loongarch_emit_stack_tie): Use the
6814 frame_pointer_needed to determine whether to use the $fp register.
6816 2023-08-31 Andrew Pinski <apinski@marvell.com>
6818 PR tree-optimization/110915
6819 * match.pd (min_value, max_value): Extend to vector constants.
6821 2023-08-31 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
6823 * config.in: Regenerate.
6824 * config/darwin-c.cc: Change spelling to macOS.
6825 * config/darwin-driver.cc: Likewise.
6826 * config/darwin.h: Likewise.
6827 * configure.ac: Likewise.
6828 * doc/contrib.texi: Likewise.
6829 * doc/extend.texi: Likewise.
6830 * doc/invoke.texi: Likewise.
6831 * doc/plugins.texi: Likewise.
6832 * doc/tm.texi: Regenerate.
6833 * doc/tm.texi.in: Change spelling to macOS.
6834 * plugin.cc: Likewise.
6836 2023-08-31 Pan Li <pan2.li@intel.com>
6838 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfnmadd/vfnmacc.
6839 * config/riscv/autovec.md: Ditto.
6841 2023-08-31 Pan Li <pan2.li@intel.com>
6843 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfnmsac/vfnmsub
6844 * config/riscv/autovec.md: Ditto.
6846 2023-08-31 Richard Sandiford <richard.sandiford@arm.com>
6848 * config/aarch64/aarch64.md (untyped_call): Emit a call_value
6849 rather than a call. List each possible destination register
6850 in the call pattern.
6852 2023-08-31 Pan Li <pan2.li@intel.com>
6854 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfmsac/vfmsub
6855 * config/riscv/autovec.md: Ditto.
6857 2023-08-31 Pan Li <pan2.li@intel.com>
6858 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
6860 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfmadd/vfmacc.
6861 * config/riscv/autovec.md: Ditto.
6862 * config/riscv/vector-iterators.md: Add UNSPEC_VFFMA.
6864 2023-08-31 Palmer Dabbelt <palmer@rivosinc.com>
6866 * config/riscv/autovec.md (shifts): Use
6867 vector_scalar_shift_operand.
6868 * config/riscv/predicates.md (vector_scalar_shift_operand): New
6871 2023-08-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6873 * config.gcc: Add vector cost model framework for RVV.
6874 * config/riscv/riscv.cc (riscv_vectorize_create_costs): Ditto.
6875 (TARGET_VECTORIZE_CREATE_COSTS): Ditto.
6876 * config/riscv/t-riscv: Ditto.
6877 * config/riscv/riscv-vector-costs.cc: New file.
6878 * config/riscv/riscv-vector-costs.h: New file.
6880 2023-08-31 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
6883 * config/rs6000/mma.md (define_insn_and_split movoo): Disallow
6884 AltiVec address operands.
6885 (define_insn_and_split movxo): Likewise.
6886 * config/rs6000/predicates.md (vsx_quad_dform_memory_operand): Remove
6887 redundant mode size check.
6889 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
6891 * config/riscv/riscv-protos.h (IS_AGNOSTIC): Move to here.
6892 * config/riscv/riscv-v.cc (gen_no_side_effects_vsetvl_rtx):
6893 Change to default policy.
6894 * config/riscv/riscv-vector-builtins-bases.cc: Change to default policy.
6895 * config/riscv/riscv-vsetvl.h (IS_AGNOSTIC): Delete.
6896 * config/riscv/riscv.cc (riscv_print_operand): Use IS_AGNOSTIC to test.
6898 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
6900 * config/riscv/autovec-opt.md: Adjust.
6901 * config/riscv/autovec-vls.md: Ditto.
6902 * config/riscv/autovec.md: Ditto.
6903 * config/riscv/riscv-protos.h (enum insn_type): Add insn_type.
6904 (enum insn_flags): Add insn flags.
6905 (emit_vlmax_insn): Adjust.
6906 (emit_vlmax_fp_insn): Delete.
6907 (emit_vlmax_ternary_insn): Delete.
6908 (emit_vlmax_fp_ternary_insn): Delete.
6909 (emit_nonvlmax_insn): Adjust.
6910 (emit_vlmax_slide_insn): Delete.
6911 (emit_nonvlmax_slide_tu_insn): Delete.
6912 (emit_vlmax_merge_insn): Delete.
6913 (emit_vlmax_cmp_insn): Delete.
6914 (emit_vlmax_cmp_mu_insn): Delete.
6915 (emit_vlmax_masked_mu_insn): Delete.
6916 (emit_scalar_move_insn): Delete.
6917 (emit_nonvlmax_integer_move_insn): Delete.
6918 (emit_vlmax_insn_lra): Add.
6919 * config/riscv/riscv-v.cc (get_mask_mode_from_insn_flags): New.
6920 (emit_vlmax_insn): Adjust.
6921 (emit_nonvlmax_insn): Adjust.
6922 (emit_vlmax_insn_lra): Add.
6923 (emit_vlmax_fp_insn): Delete.
6924 (emit_vlmax_ternary_insn): Delete.
6925 (emit_vlmax_fp_ternary_insn): Delete.
6926 (emit_vlmax_slide_insn): Delete.
6927 (emit_nonvlmax_slide_tu_insn): Delete.
6928 (emit_nonvlmax_slide_insn): Delete.
6929 (emit_vlmax_merge_insn): Delete.
6930 (emit_vlmax_cmp_insn): Delete.
6931 (emit_vlmax_cmp_mu_insn): Delete.
6932 (emit_vlmax_masked_insn): Delete.
6933 (emit_nonvlmax_masked_insn): Delete.
6934 (emit_vlmax_masked_store_insn): Delete.
6935 (emit_nonvlmax_masked_store_insn): Delete.
6936 (emit_vlmax_masked_mu_insn): Delete.
6937 (emit_vlmax_masked_fp_mu_insn): Delete.
6938 (emit_nonvlmax_tu_insn): Delete.
6939 (emit_nonvlmax_fp_tu_insn): Delete.
6940 (emit_nonvlmax_tumu_insn): Delete.
6941 (emit_nonvlmax_fp_tumu_insn): Delete.
6942 (emit_scalar_move_insn): Delete.
6943 (emit_cpop_insn): Delete.
6944 (emit_vlmax_integer_move_insn): Delete.
6945 (emit_nonvlmax_integer_move_insn): Delete.
6946 (emit_vlmax_gather_insn): Delete.
6947 (emit_vlmax_masked_gather_mu_insn): Delete.
6948 (emit_vlmax_compress_insn): Delete.
6949 (emit_nonvlmax_compress_insn): Delete.
6950 (emit_vlmax_reduction_insn): Delete.
6951 (emit_vlmax_fp_reduction_insn): Delete.
6952 (emit_nonvlmax_fp_reduction_insn): Delete.
6953 (expand_vec_series): Adjust.
6954 (expand_const_vector): Adjust.
6955 (legitimize_move): Adjust.
6956 (sew64_scalar_helper): Adjust.
6957 (expand_tuple_move): Adjust.
6958 (expand_vector_init_insert_elems): Adjust.
6959 (expand_vector_init_merge_repeating_sequence): Adjust.
6960 (expand_vec_cmp): Adjust.
6961 (expand_vec_cmp_float): Adjust.
6962 (expand_vec_perm): Adjust.
6963 (shuffle_merge_patterns): Adjust.
6964 (shuffle_compress_patterns): Adjust.
6965 (shuffle_decompress_patterns): Adjust.
6966 (expand_load_store): Adjust.
6967 (expand_cond_len_op): Adjust.
6968 (expand_cond_len_unop): Adjust.
6969 (expand_cond_len_binop): Adjust.
6970 (expand_gather_scatter): Adjust.
6971 (expand_cond_len_ternop): Adjust.
6972 (expand_reduction): Adjust.
6973 (expand_lanes_load_store): Adjust.
6974 (expand_fold_extract_last): Adjust.
6975 * config/riscv/riscv.cc (vector_zero_call_used_regs): Adjust.
6976 * config/riscv/vector.md: Adjust.
6978 2023-08-31 Haochen Gui <guihaoc@gcc.gnu.org>
6981 * config/rs6000/rs6000-string.cc (expand_block_move): Call vector
6982 load/store with length only on 64-bit Power10.
6984 2023-08-31 Claudiu Zissulescu <claziss@gmail.com>
6986 * config/arc/arc.cc (arc_split_mov_const): Use LSL16 only when
6987 SWAP option is enabled.
6988 * config/arc/arc.md (ashlsi2_cnt16): Likewise.
6990 2023-08-31 Stamatis Markianos-Wright <stam.markianos-wright@arm.com>
6992 * config/arm/arm-mve-builtins-base.cc (vcaddq_rot90, vcaddq_rot270):
6993 Use common insn for signed and unsigned front-end definitions.
6994 * config/arm/arm_mve_builtins.def
6995 (vcaddq_rot90_m_u, vcaddq_rot270_m_u): Make common.
6996 (vcaddq_rot90_m_s, vcaddq_rot270_m_s): Remove.
6997 * config/arm/iterators.md (mve_insn): Merge signed and unsigned defs.
7000 (mve_rot): Likewise.
7002 (VxCADDQ_M): Likewise.
7003 * config/arm/unspecs.md (unspec): Likewise.
7004 * config/arm/mve.md: Fix minor typo.
7006 2023-08-31 liuhongt <hongtao.liu@intel.com>
7008 * config/i386/sse.md (<avx512>_blendm<mode>): Merge
7009 VF_AVX512HFBFVL into VI12HFBF_AVX512VL.
7010 (VF_AVX512HFBF16): Renamed to VHFBF.
7011 (VF_AVX512FP16VL): Renamed to VHF_AVX512VL.
7012 (VF_AVX512FP16): Removed.
7013 (div<mode>3): Adjust VF_AVX512FP16VL to VHF_AVX512VL.
7014 (avx512fp16_rcp<mode>2<mask_name>): Ditto.
7015 (rsqrt<mode>2): Ditto.
7016 (<sse>_rsqrt<mode>2<mask_name>): Ditto.
7017 (vcond<mode><code>): Ditto.
7018 (vcond<sseintvecmodelower><mode>): Ditto.
7019 (<avx512>_fmaddc_<mode>_mask1<round_expand_name>): Ditto.
7020 (<avx512>_fmaddc_<mode>_maskz<round_expand_name>): Ditto.
7021 (<avx512>_fcmaddc_<mode>_mask1<round_expand_name>): Ditto.
7022 (<avx512>_fcmaddc_<mode>_maskz<round_expand_name>): Ditto.
7023 (cmla<conj_op><mode>4): Ditto.
7024 (fma_<mode>_fadd_fmul): Ditto.
7025 (fma_<mode>_fadd_fcmul): Ditto.
7026 (fma_<complexopname>_<mode>_fma_zero): Ditto.
7027 (fma_<mode>_fmaddc_bcst): Ditto.
7028 (fma_<mode>_fcmaddc_bcst): Ditto.
7029 (<avx512>_<complexopname>_<mode>_mask<round_name>): Ditto.
7030 (cmul<conj_op><mode>3): Ditto.
7031 (<avx512>_<complexopname>_<mode><maskc_name><round_name>):
7033 (vec_unpacks_lo_<mode>): Ditto.
7034 (vec_unpacks_hi_<mode>): Ditto.
7035 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
7036 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
7037 (*vec_extract<mode>_0): Ditto.
7038 (*<avx512>_cmp<mode>3): Extend to V48H_AVX512VL.
7040 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
7043 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Remove condition.
7045 2023-08-31 Jiufu Guo <guojiufu@linux.ibm.com>
7047 * range-op-mixed.h (operator_plus::overflow_free_p): New declare.
7048 (operator_minus::overflow_free_p): New declare.
7049 (operator_mult::overflow_free_p): New declare.
7050 * range-op.cc (range_op_handler::overflow_free_p): New function.
7051 (range_operator::overflow_free_p): New default function.
7052 (operator_plus::overflow_free_p): New function.
7053 (operator_minus::overflow_free_p): New function.
7054 (operator_mult::overflow_free_p): New function.
7055 * range-op.h (range_op_handler::overflow_free_p): New declare.
7056 (range_operator::overflow_free_p): New declare.
7057 * value-range.cc (irange::nonnegative_p): New function.
7058 (irange::nonpositive_p): New function.
7059 * value-range.h (irange::nonnegative_p): New declare.
7060 (irange::nonpositive_p): New declare.
7062 2023-08-30 Dimitar Dimitrov <dimitar@dinux.eu>
7065 * config/pru/predicates.md (const_0_operand): New predicate.
7066 (pru_cstore_comparison_operator): Ditto.
7067 * config/pru/pru.md (cstore<mode>4): New pattern.
7070 2023-08-30 Richard Biener <rguenther@suse.de>
7072 PR tree-optimization/111228
7073 * match.pd ((vec_perm (vec_perm ..) @5 ..) -> (vec_perm @x @5 ..)):
7074 New simplifications.
7076 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7078 * config/riscv/autovec.md (movmisalign<mode>): Delete.
7080 2023-08-30 Die Li <lidie@eswincomputing.com>
7081 Fei Gao <gaofei@eswincomputing.com>
7083 * config/riscv/peephole.md: New pattern.
7084 * config/riscv/predicates.md (a0a1_reg_operand): New predicate.
7085 (zcmp_mv_sreg_operand): New predicate.
7086 * config/riscv/riscv.md: New predicate.
7087 * config/riscv/zc.md (*mva01s<X:mode>): New pattern.
7088 (*mvsa01<X:mode>): New pattern.
7090 2023-08-30 Fei Gao <gaofei@eswincomputing.com>
7092 * config/riscv/riscv.cc
7093 (riscv_zcmp_can_use_popretz): true if popretz can be used
7094 (riscv_gen_multi_pop_insn): interface to generate cm.pop[ret][z]
7095 (riscv_expand_epilogue): expand cm.pop[ret][z] in epilogue
7096 * config/riscv/riscv.md: define A0_REGNUM
7097 * config/riscv/zc.md
7098 (@gpr_multi_popretz_up_to_ra_<mode>): md for popretz ra
7099 (@gpr_multi_popretz_up_to_s0_<mode>): md for popretz ra, s0
7100 (@gpr_multi_popretz_up_to_s1_<mode>): likewise
7101 (@gpr_multi_popretz_up_to_s2_<mode>): likewise
7102 (@gpr_multi_popretz_up_to_s3_<mode>): likewise
7103 (@gpr_multi_popretz_up_to_s4_<mode>): likewise
7104 (@gpr_multi_popretz_up_to_s5_<mode>): likewise
7105 (@gpr_multi_popretz_up_to_s6_<mode>): likewise
7106 (@gpr_multi_popretz_up_to_s7_<mode>): likewise
7107 (@gpr_multi_popretz_up_to_s8_<mode>): likewise
7108 (@gpr_multi_popretz_up_to_s9_<mode>): likewise
7109 (@gpr_multi_popretz_up_to_s11_<mode>): likewise
7111 2023-08-30 Fei Gao <gaofei@eswincomputing.com>
7113 * config/riscv/iterators.md
7114 (slot0_offset): slot 0 offset in stack GPRs area in bytes
7115 (slot1_offset): slot 1 offset in stack GPRs area in bytes
7116 (slot2_offset): likewise
7117 (slot3_offset): likewise
7118 (slot4_offset): likewise
7119 (slot5_offset): likewise
7120 (slot6_offset): likewise
7121 (slot7_offset): likewise
7122 (slot8_offset): likewise
7123 (slot9_offset): likewise
7124 (slot10_offset): likewise
7125 (slot11_offset): likewise
7126 (slot12_offset): likewise
7127 * config/riscv/predicates.md
7128 (stack_push_up_to_ra_operand): predicates of stack adjust pushing ra
7129 (stack_push_up_to_s0_operand): predicates of stack adjust pushing ra, s0
7130 (stack_push_up_to_s1_operand): likewise
7131 (stack_push_up_to_s2_operand): likewise
7132 (stack_push_up_to_s3_operand): likewise
7133 (stack_push_up_to_s4_operand): likewise
7134 (stack_push_up_to_s5_operand): likewise
7135 (stack_push_up_to_s6_operand): likewise
7136 (stack_push_up_to_s7_operand): likewise
7137 (stack_push_up_to_s8_operand): likewise
7138 (stack_push_up_to_s9_operand): likewise
7139 (stack_push_up_to_s11_operand): likewise
7140 (stack_pop_up_to_ra_operand): predicates of stack adjust poping ra
7141 (stack_pop_up_to_s0_operand): predicates of stack adjust poping ra, s0
7142 (stack_pop_up_to_s1_operand): likewise
7143 (stack_pop_up_to_s2_operand): likewise
7144 (stack_pop_up_to_s3_operand): likewise
7145 (stack_pop_up_to_s4_operand): likewise
7146 (stack_pop_up_to_s5_operand): likewise
7147 (stack_pop_up_to_s6_operand): likewise
7148 (stack_pop_up_to_s7_operand): likewise
7149 (stack_pop_up_to_s8_operand): likewise
7150 (stack_pop_up_to_s9_operand): likewise
7151 (stack_pop_up_to_s11_operand): likewise
7152 * config/riscv/riscv-protos.h
7153 (riscv_zcmp_valid_stack_adj_bytes_p):declaration
7154 * config/riscv/riscv.cc (struct riscv_frame_info): comment change
7155 (riscv_avoid_multi_push): helper function of riscv_use_multi_push
7156 (riscv_use_multi_push): true if multi push is used
7157 (riscv_multi_push_sregs_count): num of sregs in multi-push
7158 (riscv_multi_push_regs_count): num of regs in multi-push
7159 (riscv_16bytes_align): align to 16 bytes
7160 (riscv_stack_align): moved to a better place
7161 (riscv_save_libcall_count): no functional change
7162 (riscv_compute_frame_info): add zcmp frame info
7163 (riscv_for_each_saved_reg): save or restore fprs in specified slot for zcmp
7164 (riscv_adjust_multi_push_cfi_prologue): adjust cfi for cm.push
7165 (riscv_gen_multi_push_pop_insn): gen function for multi push and pop
7166 (get_multi_push_fpr_mask): get mask for the fprs pushed by cm.push
7167 (riscv_expand_prologue): allocate stack by cm.push
7168 (riscv_adjust_multi_pop_cfi_epilogue): adjust cfi for cm.pop[ret]
7169 (riscv_expand_epilogue): allocate stack by cm.pop[ret]
7170 (zcmp_base_adj): calculate stack adjustment base size
7171 (zcmp_additional_adj): calculate stack adjustment additional size
7172 (riscv_zcmp_valid_stack_adj_bytes_p): check if stack adjustment valid
7173 * config/riscv/riscv.h (RETURN_ADDR_MASK): mask of ra
7184 (S10_MASK): likewise
7185 (S11_MASK): likewise
7186 (MULTI_PUSH_GPR_MASK): GPR_MASK that cm.push can cover at most
7187 (ZCMP_MAX_SPIMM): max spimm value
7188 (ZCMP_SP_INC_STEP): zcmp sp increment step
7189 (ZCMP_INVALID_S0S10_SREGS_COUNTS): num of s0-s10
7190 (ZCMP_S0S11_SREGS_COUNTS): num of s0-s11
7191 (ZCMP_MAX_GRP_SLOTS): max slots of pushing and poping in zcmp
7192 (CALLEE_SAVED_FREG_NUMBER): get x of fsx(fs0 ~ fs11)
7193 * config/riscv/riscv.md: include zc.md
7194 * config/riscv/zc.md: New file. machine description for zcmp
7196 2023-08-30 Jakub Jelinek <jakub@redhat.com>
7198 PR tree-optimization/110914
7199 * tree-ssa-strlen.cc (strlen_pass::handle_builtin_memcpy): Don't call
7200 adjust_last_stmt unless len is known constant.
7202 2023-08-30 Jakub Jelinek <jakub@redhat.com>
7204 PR tree-optimization/111015
7205 * gimple-ssa-store-merging.cc
7206 (imm_store_chain_info::output_merged_store): Use wi::mask and
7207 wide_int_to_tree instead of unsigned HOST_WIDE_INT shift and
7208 build_int_cst to build BIT_AND_EXPR mask.
7210 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7212 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Add MASK_LEN_ variant.
7213 (call_may_clobber_ref_p_1): Ditto.
7214 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn): Ditto.
7215 (get_alias_ptr_type_for_ptr_address): Ditto.
7217 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7219 * config/riscv/riscv-vsetvl.cc
7220 (vector_insn_info::get_avl_or_vl_reg): Fix bug.
7222 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7224 * config/riscv/autovec-vls.md (movmisalign<mode>): New pattern.
7225 * config/riscv/riscv.cc (riscv_support_vector_misalignment): Support
7228 2023-08-29 Philipp Tomsich <philipp.tomsich@vrull.eu>
7230 * config/riscv/zicond.md: New splitters to rewrite single bit
7231 sign extension as the condition to a czero in the desired form.
7233 2023-08-29 David Malcolm <dmalcolm@redhat.com>
7236 * doc/invoke.texi: Add -Wanalyzer-overlapping-buffers.
7238 2023-08-29 David Malcolm <dmalcolm@redhat.com>
7241 * Makefile.in (ANALYZER_OBJS): Add analyzer/ranges.o.
7243 2023-08-29 Jin Ma <jinma@linux.alibaba.com>
7245 * config/riscv/riscv.cc (riscv_float_const_rtx_index_for_fli):
7246 zvfh can generate zfa extended instruction fli.h, just like zfh.
7248 2023-08-29 Edwin Lu <ewlu@rivosinc.com>
7249 Vineet Gupta <vineetg@rivosinc.com>
7251 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): Generate
7252 __riscv_unaligned_avoid with value 1 or
7253 __riscv_unaligned_slow with value 1 or
7254 __riscv_unaligned_fast with value 1
7255 * config/riscv/riscv.cc (riscv_option_override): Define
7256 riscv_user_wants_strict_align. Set
7257 riscv_user_wants_strict_align to TARGET_STRICT_ALIGN
7258 * config/riscv/riscv.h: Declare riscv_user_wants_strict_align
7260 2023-08-29 Edwin Lu <ewlu@rivosinc.com>
7262 * config/riscv/autovec-vls.md: Update types
7263 * config/riscv/riscv.md: Add vector placeholder type
7264 * config/riscv/vector.md: Update types
7266 2023-08-29 Carl Love <cel@us.ibm.com>
7268 * config/rs6000/dfp.md (UNSPEC_DQUAN): New unspec.
7269 (dfp_dqua_<mode>, dfp_dquai_<mode>): New define_insn.
7270 * config/rs6000/rs6000-builtins.def (__builtin_dfp_dqua,
7271 __builtin_dfp_dquai, __builtin_dfp_dquaq, __builtin_dfp_dquaqi):
7272 New buit-in definitions.
7273 * config/rs6000/rs6000-overload.def (__builtin_dfp_quantize): New
7274 overloaded definition.
7275 * doc/extend.texi: Add documentation for __builtin_dfp_quantize.
7277 2023-08-29 Pan Li <pan2.li@intel.com>
7278 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
7280 * config/riscv/riscv.cc (riscv_legitimize_poly_move): New declaration.
7281 (riscv_legitimize_const_move): Handle ref plus const poly.
7283 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
7285 * common/config/riscv/riscv-common.cc
7286 (riscv_implied_info): Add implications from unprivileged extensions.
7287 (riscv_ext_version_table): Add stub support for all unprivileged
7288 extensions supported by Binutils as well as 'Zce', 'Zcmp', 'Zcmt'.
7290 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
7292 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
7293 Add stub support for all vendor extensions supported by Binutils.
7295 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
7297 * common/config/riscv/riscv-common.cc
7298 (riscv_implied_info): Add implications from privileged extensions.
7299 (riscv_ext_version_table): Add stub support for all privileged
7300 extensions supported by Binutils.
7302 2023-08-29 Lehua Ding <lehua.ding@rivai.ai>
7304 * config/riscv/autovec.md: Adjust
7305 * config/riscv/riscv-protos.h (RVV_VUNDEF): Clean.
7306 (get_vlmax_rtx): Exported.
7307 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_ternary_tu_insn): Deleted.
7308 (emit_vlmax_masked_gather_mu_insn): Adjust.
7309 (get_vlmax_rtx): New func.
7310 (expand_load_store): Adjust.
7311 (expand_cond_len_unop): Call expand_cond_len_op.
7312 (expand_cond_len_op): New subroutine.
7313 (expand_cond_len_binop): Call expand_cond_len_op.
7314 (expand_cond_len_ternop): Call expand_cond_len_op.
7315 (expand_lanes_load_store): Adjust.
7317 2023-08-29 Jakub Jelinek <jakub@redhat.com>
7320 PR middle-end/111209
7321 * tree-ssa-math-opts.cc (match_uaddc_usubc): Match also
7322 just 2 limb uaddc/usubc with 0 carry-in on lower limb and ignored
7323 carry-out on higher limb. Don't match it though if it could be
7324 matched later on 4 argument addition/subtraction.
7326 2023-08-29 Andrew Pinski <apinski@marvell.com>
7328 PR tree-optimization/111147
7329 * match.pd (`(x | y) & (~x ^ y)`) Use bitwise_inverted_equal_p
7330 instead of matching bit_not.
7332 2023-08-29 Christophe Lyon <christophe.lyon@linaro.org>
7334 * config/arm/arm-mve-builtins.cc (type_suffixes): Add missing
7337 2023-08-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7339 * config/riscv/riscv-vsetvl.cc (vector_insn_info::get_avl_or_vl_reg): New function.
7340 (pass_vsetvl::compute_local_properties): Fix bug.
7341 (pass_vsetvl::commit_vsetvls): Ditto.
7342 * config/riscv/riscv-vsetvl.h: New function.
7344 2023-08-29 Lehua Ding <lehua.ding@rivai.ai>
7347 * config/riscv/predicates.md (vector_const_int_or_double_0_operand):
7349 * config/riscv/riscv-vector-builtins.cc (function_expander::function_expander):
7350 force_reg mem target operand.
7351 * config/riscv/vector.md (@pred_mov<mode>): Wrapper.
7352 (*pred_mov<mode>): Remove imm -> reg pattern.
7353 (*pred_broadcast<mode>_imm): Add imm -> reg pattern.
7355 2023-08-29 Lulu Cheng <chenglulu@loongson.cn>
7357 * common/config/loongarch/loongarch-common.cc:
7358 Enable '-free' on O2 and above.
7359 * doc/invoke.texi: Modify the description information
7360 of the '-free' compilation option and add the LoongArch
7363 2023-08-28 Tsukasa OI <research_trasio@irq.a4lg.com>
7365 * doc/extend.texi: Fix the description of __builtin_riscv_pause.
7367 2023-08-28 Tsukasa OI <research_trasio@irq.a4lg.com>
7369 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
7370 Implement the 'Zihintpause' extension, version 2.0.
7371 (riscv_ext_flag_table) Add 'Zihintpause' handling.
7372 * config/riscv/riscv-builtins.cc: Remove availability predicate
7373 "always" and add "hint_pause".
7374 (riscv_builtins) : Add "pause" extension.
7375 * config/riscv/riscv-opts.h (MASK_ZIHINTPAUSE, TARGET_ZIHINTPAUSE): New.
7376 * config/riscv/riscv.md (riscv_pause): Adjust output based on
7379 2023-08-28 Andrew Pinski <apinski@marvell.com>
7381 * match.pd (`(X & ~Y) | (~X & Y)`): Use bitwise_inverted_equal_p
7382 instead of specifically checking for ~X.
7384 2023-08-28 Andrew Pinski <apinski@marvell.com>
7386 PR tree-optimization/111146
7387 * match.pd (`(x | y) & ~x`, `(x & y) | ~x`): Remove
7390 2023-08-28 Andrew Pinski <apinski@marvell.com>
7392 * tree-ssa-phiopt.cc (gimple_simplify_phiopt): Add dump information
7393 when resimplify returns true.
7394 (match_simplify_replacement): Print only if accepted the match-and-simplify
7395 result rather than the full sequence.
7397 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7399 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::earliest_fusion): Skip
7401 (pass_vsetvl::compute_probabilities): Fix unitialized probability.
7403 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7405 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::earliest_fusion): Fix bug.
7407 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
7409 * config/arm/arm-mve-builtins-base.cc (vmullbq_poly)
7410 (vmulltq_poly): New.
7411 * config/arm/arm-mve-builtins-base.def (vmullbq_poly)
7412 (vmulltq_poly): New.
7413 * config/arm/arm-mve-builtins-base.h (vmullbq_poly)
7414 (vmulltq_poly): New.
7415 * config/arm/arm_mve.h (vmulltq_poly): Remove.
7416 (vmullbq_poly): Remove.
7417 (vmullbq_poly_m): Remove.
7418 (vmulltq_poly_m): Remove.
7419 (vmullbq_poly_x): Remove.
7420 (vmulltq_poly_x): Remove.
7421 (vmulltq_poly_p8): Remove.
7422 (vmullbq_poly_p8): Remove.
7423 (vmulltq_poly_p16): Remove.
7424 (vmullbq_poly_p16): Remove.
7425 (vmullbq_poly_m_p8): Remove.
7426 (vmullbq_poly_m_p16): Remove.
7427 (vmulltq_poly_m_p8): Remove.
7428 (vmulltq_poly_m_p16): Remove.
7429 (vmullbq_poly_x_p8): Remove.
7430 (vmullbq_poly_x_p16): Remove.
7431 (vmulltq_poly_x_p8): Remove.
7432 (vmulltq_poly_x_p16): Remove.
7433 (__arm_vmulltq_poly_p8): Remove.
7434 (__arm_vmullbq_poly_p8): Remove.
7435 (__arm_vmulltq_poly_p16): Remove.
7436 (__arm_vmullbq_poly_p16): Remove.
7437 (__arm_vmullbq_poly_m_p8): Remove.
7438 (__arm_vmullbq_poly_m_p16): Remove.
7439 (__arm_vmulltq_poly_m_p8): Remove.
7440 (__arm_vmulltq_poly_m_p16): Remove.
7441 (__arm_vmullbq_poly_x_p8): Remove.
7442 (__arm_vmullbq_poly_x_p16): Remove.
7443 (__arm_vmulltq_poly_x_p8): Remove.
7444 (__arm_vmulltq_poly_x_p16): Remove.
7445 (__arm_vmulltq_poly): Remove.
7446 (__arm_vmullbq_poly): Remove.
7447 (__arm_vmullbq_poly_m): Remove.
7448 (__arm_vmulltq_poly_m): Remove.
7449 (__arm_vmullbq_poly_x): Remove.
7450 (__arm_vmulltq_poly_x): Remove.
7452 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
7454 * config/arm/arm-mve-builtins-functions.h (class
7455 unspec_mve_function_exact_insn_vmull_poly): New.
7457 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
7459 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_poly): New.
7460 * config/arm/arm-mve-builtins-shapes.h (binary_widen_poly): New.
7462 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
7464 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type): Add
7465 support for 'U' and 'p' format specifiers.
7467 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
7469 * config/arm/arm-mve-builtins.cc (type_suffixes): Handle poly_p
7471 (TYPES_poly_8_16): New.
7473 * config/arm/arm-mve-builtins.def (p8): New type suffix.
7475 * config/arm/arm-mve-builtins.h (enum type_class_index): Add
7477 (struct type_suffix_info): Add poly_p field.
7479 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
7481 * config/arm/arm-mve-builtins-base.cc (vmullbq_int, vmulltq_int):
7483 * config/arm/arm-mve-builtins-base.def (vmullbq_int, vmulltq_int):
7485 * config/arm/arm-mve-builtins-base.h (vmullbq_int, vmulltq_int):
7487 * config/arm/arm_mve.h (vmulltq_int): Remove.
7488 (vmullbq_int): Remove.
7489 (vmullbq_int_m): Remove.
7490 (vmulltq_int_m): Remove.
7491 (vmullbq_int_x): Remove.
7492 (vmulltq_int_x): Remove.
7493 (vmulltq_int_u8): Remove.
7494 (vmullbq_int_u8): Remove.
7495 (vmulltq_int_s8): Remove.
7496 (vmullbq_int_s8): Remove.
7497 (vmulltq_int_u16): Remove.
7498 (vmullbq_int_u16): Remove.
7499 (vmulltq_int_s16): Remove.
7500 (vmullbq_int_s16): Remove.
7501 (vmulltq_int_u32): Remove.
7502 (vmullbq_int_u32): Remove.
7503 (vmulltq_int_s32): Remove.
7504 (vmullbq_int_s32): Remove.
7505 (vmullbq_int_m_s8): Remove.
7506 (vmullbq_int_m_s32): Remove.
7507 (vmullbq_int_m_s16): Remove.
7508 (vmullbq_int_m_u8): Remove.
7509 (vmullbq_int_m_u32): Remove.
7510 (vmullbq_int_m_u16): Remove.
7511 (vmulltq_int_m_s8): Remove.
7512 (vmulltq_int_m_s32): Remove.
7513 (vmulltq_int_m_s16): Remove.
7514 (vmulltq_int_m_u8): Remove.
7515 (vmulltq_int_m_u32): Remove.
7516 (vmulltq_int_m_u16): Remove.
7517 (vmullbq_int_x_s8): Remove.
7518 (vmullbq_int_x_s16): Remove.
7519 (vmullbq_int_x_s32): Remove.
7520 (vmullbq_int_x_u8): Remove.
7521 (vmullbq_int_x_u16): Remove.
7522 (vmullbq_int_x_u32): Remove.
7523 (vmulltq_int_x_s8): Remove.
7524 (vmulltq_int_x_s16): Remove.
7525 (vmulltq_int_x_s32): Remove.
7526 (vmulltq_int_x_u8): Remove.
7527 (vmulltq_int_x_u16): Remove.
7528 (vmulltq_int_x_u32): Remove.
7529 (__arm_vmulltq_int_u8): Remove.
7530 (__arm_vmullbq_int_u8): Remove.
7531 (__arm_vmulltq_int_s8): Remove.
7532 (__arm_vmullbq_int_s8): Remove.
7533 (__arm_vmulltq_int_u16): Remove.
7534 (__arm_vmullbq_int_u16): Remove.
7535 (__arm_vmulltq_int_s16): Remove.
7536 (__arm_vmullbq_int_s16): Remove.
7537 (__arm_vmulltq_int_u32): Remove.
7538 (__arm_vmullbq_int_u32): Remove.
7539 (__arm_vmulltq_int_s32): Remove.
7540 (__arm_vmullbq_int_s32): Remove.
7541 (__arm_vmullbq_int_m_s8): Remove.
7542 (__arm_vmullbq_int_m_s32): Remove.
7543 (__arm_vmullbq_int_m_s16): Remove.
7544 (__arm_vmullbq_int_m_u8): Remove.
7545 (__arm_vmullbq_int_m_u32): Remove.
7546 (__arm_vmullbq_int_m_u16): Remove.
7547 (__arm_vmulltq_int_m_s8): Remove.
7548 (__arm_vmulltq_int_m_s32): Remove.
7549 (__arm_vmulltq_int_m_s16): Remove.
7550 (__arm_vmulltq_int_m_u8): Remove.
7551 (__arm_vmulltq_int_m_u32): Remove.
7552 (__arm_vmulltq_int_m_u16): Remove.
7553 (__arm_vmullbq_int_x_s8): Remove.
7554 (__arm_vmullbq_int_x_s16): Remove.
7555 (__arm_vmullbq_int_x_s32): Remove.
7556 (__arm_vmullbq_int_x_u8): Remove.
7557 (__arm_vmullbq_int_x_u16): Remove.
7558 (__arm_vmullbq_int_x_u32): Remove.
7559 (__arm_vmulltq_int_x_s8): Remove.
7560 (__arm_vmulltq_int_x_s16): Remove.
7561 (__arm_vmulltq_int_x_s32): Remove.
7562 (__arm_vmulltq_int_x_u8): Remove.
7563 (__arm_vmulltq_int_x_u16): Remove.
7564 (__arm_vmulltq_int_x_u32): Remove.
7565 (__arm_vmulltq_int): Remove.
7566 (__arm_vmullbq_int): Remove.
7567 (__arm_vmullbq_int_m): Remove.
7568 (__arm_vmulltq_int_m): Remove.
7569 (__arm_vmullbq_int_x): Remove.
7570 (__arm_vmulltq_int_x): Remove.
7572 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
7574 * config/arm/arm-mve-builtins-shapes.cc (binary_widen): New.
7575 * config/arm/arm-mve-builtins-shapes.h (binary_widen): New.
7577 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
7579 * config/arm/arm-mve-builtins-functions.h (class
7580 unspec_mve_function_exact_insn_vmull): New.
7582 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
7584 * config/arm/iterators.md (mve_insn): Add vmullb, vmullt.
7585 (isu): Add VMULLBQ_INT_S, VMULLBQ_INT_U, VMULLTQ_INT_S,
7587 (supf): Add VMULLBQ_POLY_P, VMULLTQ_POLY_P, VMULLBQ_POLY_M_P,
7589 (VMULLBQ_INT, VMULLTQ_INT, VMULLBQ_INT_M, VMULLTQ_INT_M): Delete.
7590 (VMULLxQ_INT, VMULLxQ_POLY, VMULLxQ_INT_M, VMULLxQ_POLY_M): New.
7591 * config/arm/mve.md (mve_vmullbq_int_<supf><mode>)
7592 (mve_vmulltq_int_<supf><mode>): Merge into ...
7593 (@mve_<mve_insn>q_int_<supf><mode>) ... this.
7594 (mve_vmulltq_poly_p<mode>, mve_vmullbq_poly_p<mode>): Merge into ...
7595 (@mve_<mve_insn>q_poly_<supf><mode>): ... this.
7596 (mve_vmullbq_int_m_<supf><mode>, mve_vmulltq_int_m_<supf><mode>): Merge into ...
7597 (@mve_<mve_insn>q_int_m_<supf><mode>): ... this.
7598 (mve_vmullbq_poly_m_p<mode>, mve_vmulltq_poly_m_p<mode>): Merge into ...
7599 (@mve_<mve_insn>q_poly_m_<supf><mode>): ... this.
7601 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
7603 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type):
7606 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
7608 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int32): Fix loop bound.
7609 (binary_acca_int64): Likewise.
7611 2023-08-28 Aldy Hernandez <aldyh@redhat.com>
7613 * range-op-float.cc (fold_range): Handle relations.
7615 2023-08-28 Lulu Cheng <chenglulu@loongson.cn>
7617 * config/loongarch/loongarch.cc (loongarch_expand_conditional_move):
7618 Optimize the function implementation.
7620 2023-08-28 liuhongt <hongtao.liu@intel.com>
7623 * config/i386/sse.md (V48_AVX2): Rename to ..
7624 (V48_128_256): .. this.
7625 (ssefltmodesuffix): Extend to V4SF/V8SF/V2DF/V4DF.
7626 (<avx_avx2>_maskload<ssemodesuffix><avxsizesuffix>): Change
7627 V48_AVX2 to V48_128_256, also generate vmaskmov{ps,pd} for
7628 integral modes when TARGET_AVX2 is not available.
7629 (<avx_avx2>_maskstore<ssemodesuffix><avxsizesuffix>): Ditto.
7630 (maskload<mode><sseintvecmodelower>): Change V48_AVX2 to
7632 (maskstore<mode><sseintvecmodelower>): Ditto.
7634 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7636 * config/riscv/riscv-vsetvl.cc (vsetvl_vtype_change_only_p):
7638 (after_or_same_p): Ditto.
7639 (find_reg_killed_by): Delete.
7640 (has_vsetvl_killed_avl_p): Ditto.
7641 (anticipatable_occurrence_p): Refactor.
7642 (any_set_in_bb_p): Delete.
7643 (count_regno_occurrences): Ditto.
7644 (backward_propagate_worthwhile_p): Ditto.
7645 (demands_can_be_fused_p): Ditto.
7646 (earliest_pred_can_be_fused_p): New function.
7647 (vsetvl_dominated_by_p): Ditto.
7648 (vector_insn_info::parse_insn): Refactor.
7649 (vector_insn_info::merge): Refactor.
7650 (vector_insn_info::dump): Refactor.
7651 (vector_infos_manager::vector_infos_manager): Refactor.
7652 (vector_infos_manager::all_empty_predecessor_p): Delete.
7653 (vector_infos_manager::all_same_avl_p): Ditto.
7654 (vector_infos_manager::create_bitmap_vectors): Refactor.
7655 (vector_infos_manager::free_bitmap_vectors): Refactor.
7656 (vector_infos_manager::dump): Refactor.
7657 (pass_vsetvl::update_block_info): New function.
7658 (enum fusion_type): Ditto.
7659 (pass_vsetvl::get_backward_fusion_type): Delete.
7660 (pass_vsetvl::hard_empty_block_p): Ditto.
7661 (pass_vsetvl::backward_demand_fusion): Ditto.
7662 (pass_vsetvl::forward_demand_fusion): Ditto.
7663 (pass_vsetvl::demand_fusion): Ditto.
7664 (pass_vsetvl::cleanup_illegal_dirty_blocks): Ditto.
7665 (pass_vsetvl::compute_local_properties): Ditto.
7666 (pass_vsetvl::earliest_fusion): New function.
7667 (pass_vsetvl::vsetvl_fusion): Ditto.
7668 (pass_vsetvl::commit_vsetvls): Refactor.
7669 (get_first_vsetvl_before_rvv_insns): Ditto.
7670 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
7671 (pass_vsetvl::cleanup_earliest_vsetvls): New function.
7672 (pass_vsetvl::df_post_optimization): Refactor.
7673 (pass_vsetvl::lazy_vsetvl): Ditto.
7674 * config/riscv/riscv-vsetvl.h: Ditto.
7676 2023-08-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7678 * config/riscv/autovec.md (len_fold_extract_last_<mode>): New pattern.
7679 * config/riscv/riscv-protos.h (enum insn_type): New enum.
7680 (expand_fold_extract_last): New function.
7681 * config/riscv/riscv-v.cc (emit_nonvlmax_slide_insn): Ditto.
7682 (emit_cpop_insn): Ditto.
7683 (emit_nonvlmax_compress_insn): Ditto.
7684 (expand_fold_extract_last): Ditto.
7685 * config/riscv/vector.md: Fix vcpop.m ratio demand.
7687 2023-08-25 Edwin Lu <ewlu@rivosinc.com>
7689 * config/riscv/sync-rvwmo.md: updated types to "multi" or
7690 "atomic" based on number of assembly lines generated
7691 * config/riscv/sync-ztso.md: likewise
7692 * config/riscv/sync.md: likewise
7694 2023-08-25 Jin Ma <jinma@linux.alibaba.com>
7696 * common/config/riscv/riscv-common.cc: Add zfa extension version, which depends on
7698 * config/riscv/constraints.md (zfli): Constrain the floating point number that the
7699 instructions FLI.H/S/D can load.
7700 * config/riscv/iterators.md (ceil): New.
7701 * config/riscv/riscv-opts.h (MASK_ZFA): New.
7703 * config/riscv/riscv-protos.h (riscv_float_const_rtx_index_for_fli): New.
7704 * config/riscv/riscv.cc (riscv_float_const_rtx_index_for_fli): New.
7705 (riscv_cannot_force_const_mem): If instruction FLI.H/S/D can be used, memory is
7707 (riscv_const_insns): Likewise.
7708 (riscv_legitimize_const_move): Likewise.
7709 (riscv_split_64bit_move_p): If instruction FLI.H/S/D can be used, no split is
7711 (riscv_split_doubleword_move): Likewise.
7712 (riscv_output_move): Output the mov instructions in zfa extension.
7713 (riscv_print_operand): Output the floating-point value of the FLI.H/S/D immediate
7715 (riscv_secondary_memory_needed): Likewise.
7716 * config/riscv/riscv.md (fminm<mode>3): New.
7717 (fmaxm<mode>3): New.
7718 (movsidf2_low_rv32): New.
7719 (movsidf2_high_rv32): New.
7720 (movdfsisi3_rv32): New.
7721 (f<quiet_pattern>_quiet<ANYF:mode><X:mode>4_zfa): New.
7722 * config/riscv/riscv.opt: New.
7724 2023-08-25 Sandra Loosemore <sandra@codesourcery.com>
7727 * omp-general.cc (omp_runtime_api_procname): New.
7728 (omp_runtime_api_call): Moved here from omp-low.cc, and make
7730 * omp-general.h: Include omp-api.h.
7731 * omp-low.cc (omp_runtime_api_call): Delete this copy.
7733 2023-08-25 Sandra Loosemore <sandra@codesourcery.com>
7735 * doc/generic.texi (OpenMP): Document OMP_STRUCTURED_BLOCK.
7736 * doc/gimple.texi (GIMPLE instruction set): Add
7737 GIMPLE_OMP_STRUCTURED_BLOCK.
7738 (GIMPLE_OMP_STRUCTURED_BLOCK): New subsection.
7739 * gimple-low.cc (lower_stmt): Error on GIMPLE_OMP_STRUCTURED_BLOCK.
7740 * gimple-pretty-print.cc (dump_gimple_omp_block): Handle
7741 GIMPLE_OMP_STRUCTURED_BLOCK.
7742 (pp_gimple_stmt_1): Likewise.
7743 * gimple-walk.cc (walk_gimple_stmt): Likewise.
7744 * gimple.cc (gimple_build_omp_structured_block): New.
7745 * gimple.def (GIMPLE_OMP_STRUCTURED_BLOCK): New.
7746 * gimple.h (gimple_build_omp_structured_block): Declare.
7747 (gimple_has_substatements): Handle GIMPLE_OMP_STRUCTURED_BLOCK.
7748 (CASE_GIMPLE_OMP): Likewise.
7749 * gimplify.cc (is_gimple_stmt): Handle OMP_STRUCTURED_BLOCK.
7750 (gimplify_expr): Likewise.
7751 * omp-expand.cc (GIMPLE_OMP_STRUCTURED_BLOCK): Error on
7752 GIMPLE_OMP_STRUCTURED_BLOCK.
7753 * omp-low.cc (scan_omp_1_stmt): Handle GIMPLE_OMP_STRUCTURED_BLOCK.
7754 (lower_omp_1): Likewise.
7755 (diagnose_sb_1): Likewise.
7756 (diagnose_sb_2): Likewise.
7757 * tree-inline.cc (remap_gimple_stmt): Handle
7758 GIMPLE_OMP_STRUCTURED_BLOCK.
7759 (estimate_num_insns): Likewise.
7760 * tree-nested.cc (convert_nonlocal_reference_stmt): Likewise.
7761 (convert_local_reference_stmt): Likewise.
7762 (convert_gimple_call): Likewise.
7763 * tree-pretty-print.cc (dump_generic_node): Handle
7764 OMP_STRUCTURED_BLOCK.
7765 * tree.def (OMP_STRUCTURED_BLOCK): New.
7766 * tree.h (OMP_STRUCTURED_BLOCK_BODY): New.
7768 2023-08-25 Vineet Gupta <vineetg@rivosinc.com>
7770 * config/riscv/riscv.cc (riscv_rtx_costs): Adjust const_int
7771 cost. Add some comments about different constants handling.
7773 2023-08-25 Andrew Pinski <apinski@marvell.com>
7775 * match.pd (`a ? one_zero : one_zero`): Move
7776 below detection of minmax.
7778 2023-08-25 Andrew Pinski <apinski@marvell.com>
7780 * match.pd (`a | C -> C`): New pattern.
7782 2023-08-25 Uros Bizjak <ubizjak@gmail.com>
7784 * caller-save.cc (new_saved_hard_reg):
7785 Rename TRUE/FALSE to true/false.
7786 (setup_save_areas): Ditto.
7787 * gcc.cc (set_collect_gcc_options): Ditto.
7788 (driver::build_multilib_strings): Ditto.
7789 (print_multilib_info): Ditto.
7790 * genautomata.cc (gen_cpu_unit): Ditto.
7791 (gen_query_cpu_unit): Ditto.
7792 (gen_bypass): Ditto.
7793 (gen_excl_set): Ditto.
7794 (gen_presence_absence_set): Ditto.
7795 (gen_presence_set): Ditto.
7796 (gen_final_presence_set): Ditto.
7797 (gen_absence_set): Ditto.
7798 (gen_final_absence_set): Ditto.
7799 (gen_automaton): Ditto.
7800 (gen_regexp_repeat): Ditto.
7801 (gen_regexp_allof): Ditto.
7802 (gen_regexp_oneof): Ditto.
7803 (gen_regexp_sequence): Ditto.
7804 (process_decls): Ditto.
7805 (reserv_sets_are_intersected): Ditto.
7806 (initiate_excl_sets): Ditto.
7807 (form_reserv_sets_list): Ditto.
7808 (check_presence_pattern_sets): Ditto.
7809 (check_absence_pattern_sets): Ditto.
7810 (check_regexp_units_distribution): Ditto.
7811 (check_unit_distributions_to_automata): Ditto.
7812 (create_ainsns): Ditto.
7813 (output_insn_code_cases): Ditto.
7814 (output_internal_dead_lock_func): Ditto.
7815 (form_important_insn_automata_lists): Ditto.
7816 * gengtype-state.cc (read_state_files_list): Ditto.
7817 * gengtype.cc (main): Ditto.
7818 * gimple-array-bounds.cc (array_bounds_checker::check_array_bounds):
7820 * gimple.cc (gimple_build_call_from_tree): Ditto.
7821 (preprocess_case_label_vec_for_gimple): Ditto.
7822 * gimplify.cc (gimplify_call_expr): Ditto.
7823 * ordered-hash-map-tests.cc (test_map_of_int_to_strings): Ditto.
7825 2023-08-25 Richard Biener <rguenther@suse.de>
7827 PR tree-optimization/111137
7828 * tree-vect-data-refs.cc (vect_slp_analyze_load_dependences):
7829 Properly handle grouped stores from other SLP instances.
7831 2023-08-25 Richard Biener <rguenther@suse.de>
7833 * tree-vect-data-refs.cc (vect_slp_analyze_store_dependences):
7834 Split out from vect_slp_analyze_node_dependences, remove
7836 (vect_slp_analyze_load_dependences): Split out from
7837 vect_slp_analyze_node_dependences, adjust comments. Process
7838 queued stores before any disambiguation.
7839 (vect_slp_analyze_node_dependences): Remove.
7840 (vect_slp_analyze_instance_dependence): Adjust.
7842 2023-08-25 Aldy Hernandez <aldyh@redhat.com>
7844 * range-op-float.cc (frelop_early_resolve): Rewrite for better NAN
7846 (operator_not_equal::fold_range): Adjust for relations.
7847 (operator_lt::fold_range): Same.
7848 (operator_gt::fold_range): Same.
7849 (foperator_unordered_equal::fold_range): Same.
7850 (foperator_unordered_lt::fold_range): Same.
7851 (foperator_unordered_le::fold_range): Same.
7852 (foperator_unordered_gt::fold_range): Same.
7853 (foperator_unordered_ge::fold_range): Same.
7855 2023-08-25 Richard Biener <rguenther@suse.de>
7857 PR tree-optimization/111136
7858 * tree-vect-loop.cc (vect_dissolve_slp_only_groups): For
7859 stores force STMT_VINFO_STRIDED_P and also duplicate that
7862 2023-08-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7864 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::compute_local_properties):
7867 2023-08-25 liuhongt <hongtao.liu@intel.com>
7869 * config/i386/sse.md (vec_set<mode>): Removed.
7870 (V_128H): Merge into ..
7872 (V_256H): Merge into ..
7874 (V_512): Add V32HF, V32BF.
7875 (*ssse3_palignr<mode>_perm): Adjust mode iterator from V_128H
7877 (vcond<mode><sseintvecmodelower>): Removed
7878 (vcondu<mode><sseintvecmodelower>): Removed.
7879 (avx_vbroadcastf128_<mode>): Refator from V_256H to V_256.
7881 2023-08-25 Hongyu Wang <hongyu.wang@intel.com>
7884 * config/i386/sse.md (avx512f_cvtne2ps2bf16_<mode>_maskz):
7885 Adjust paramter order.
7887 2023-08-24 Uros Bizjak <ubizjak@gmail.com>
7890 * config/i386/sse.md (*sse2_movq128_<mode>_1): New insn pattern.
7892 2023-08-24 David Malcolm <dmalcolm@redhat.com>
7895 * doc/invoke.texi (Static Analyzer Options): Add "strcat" to the
7896 list of functions known to the analyzer.
7898 2023-08-24 Richard Biener <rguenther@suse.de>
7900 PR tree-optimization/111123
7901 * tree-ssa-ccp.cc (pass_fold_builtins::execute): Do not
7902 remove indirect clobbers here ...
7903 * tree-outof-ssa.cc (rewrite_out_of_ssa): ... but here.
7904 (remove_indirect_clobbers): New function.
7906 2023-08-24 Jan Hubicka <jh@suse.cz>
7908 * cfg.h (struct control_flow_graph): New field full_profile.
7909 * auto-profile.cc (afdo_annotate_cfg): Set full_profile to true.
7910 * cfg.cc (init_flow): Set full_profile to false.
7911 * graphite.cc (graphite_transform_loops): Set full_profile to false.
7912 * lto-streamer-in.cc (input_cfg): Initialize full_profile flag.
7913 * predict.cc (pass_profile::execute): Set full_profile to true.
7914 * symtab-thunks.cc (expand_thunk): Set full_profile to true.
7915 * tree-cfg.cc (gimple_verify_flow_info): Verify that profile is full
7916 if full_profile is set.
7917 * tree-inline.cc (initialize_cfun): Initialize full_profile.
7918 (expand_call_inline): Combine full_profile.
7920 2023-08-24 Richard Biener <rguenther@suse.de>
7922 * tree-vect-slp.cc (vect_build_slp_tree_1): Rename
7923 load_p to ldst_p, fix mistakes and rely on
7924 STMT_VINFO_DATA_REF.
7926 2023-08-24 Jan Hubicka <jh@suse.cz>
7928 * gimple-harden-conditionals.cc (insert_check_and_trap): Set count
7929 of newly build trap bb.
7931 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7933 * config/riscv/riscv.cc (riscv_preferred_else_value): Remove it since
7934 it forbid COND_LEN_FMS/COND_LEN_FNMS STMT fold.
7935 (TARGET_PREFERRED_ELSE_VALUE): Ditto.
7937 2023-08-24 Robin Dapp <rdapp.gcc@gmail.com>
7939 * common/config/riscv/riscv-common.cc: Add -fsched-pressure.
7940 * config/riscv/riscv.cc (riscv_option_override): Set sched
7943 2023-08-24 Robin Dapp <rdapp@ventanamicro.com>
7945 * config/riscv/riscv.cc (riscv_print_operand): Allow vk operand.
7947 2023-08-24 Richard Biener <rguenther@suse.de>
7949 PR tree-optimization/111125
7950 * tree-vect-slp.cc (vect_slp_function): Split at novector
7951 loop entry, do not push blocks in novector loops.
7953 2023-08-24 Richard Sandiford <richard.sandiford@arm.com>
7955 * doc/extend.texi: Document the C [[__extension__ ...]] construct.
7957 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7959 * genmatch.cc (decision_tree::gen): Support
7960 COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS gimple fold.
7961 * gimple-match-exports.cc (gimple_simplify): Ditto.
7962 (gimple_resimplify6): New function.
7963 (gimple_resimplify7): New function.
7964 (gimple_match_op::resimplify): Support
7965 COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS gimple fold.
7966 (convert_conditional_op): Ditto.
7967 (build_call_internal): Ditto.
7968 (try_conditional_simplification): Ditto.
7969 (gimple_extract): Ditto.
7970 * gimple-match.h (gimple_match_cond::gimple_match_cond): Ditto.
7971 * internal-fn.cc (CASE): Ditto.
7973 2023-08-24 Richard Biener <rguenther@suse.de>
7975 PR tree-optimization/111115
7976 * tree-vectorizer.h (vect_slp_child_index_for_operand): New.
7977 * tree-vect-data-refs.cc (can_group_stmts_p): Also group
7979 * tree-vect-slp.cc (arg3_arg2_map): New.
7980 (vect_get_operand_map): Handle IFN_MASK_STORE.
7981 (vect_slp_child_index_for_operand): New function.
7982 (vect_build_slp_tree_1): Handle statements with no LHS,
7984 (vect_remove_slp_scalar_calls): Likewise.
7985 * tree-vect-stmts.cc (vect_check_store_rhs): Lookup the
7986 SLP child corresponding to the ifn value index.
7987 (vectorizable_store): Likewise for the mask index. Support
7989 (vectorizable_load): Lookup the SLP child corresponding to the
7992 2023-08-24 Richard Biener <rguenther@suse.de>
7994 PR tree-optimization/111125
7995 * tree-vect-slp.cc (vectorizable_bb_reduc_epilogue): Account
7996 for the remain_defs processing.
7998 2023-08-24 Richard Sandiford <richard.sandiford@arm.com>
8000 * config/aarch64/aarch64.cc: Include ssa.h.
8001 (aarch64_multiply_add_p): Require the second operand of an
8002 Advanced SIMD subtraction to be a multiplication. Assume that
8003 such an operation won't be fused if the second operand is used
8004 multiple times and if the first operand is also a multiplication.
8006 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8008 * tree-vect-loop.cc (vectorizable_reduction): Apply
8009 LEN_FOLD_EXTRACT_LAST.
8010 * tree-vect-stmts.cc (vectorizable_condition): Ditto.
8012 2023-08-24 Richard Biener <rguenther@suse.de>
8014 PR tree-optimization/111128
8015 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
8016 Emit external shift operand inline if we promoted it with
8017 another pattern stmt.
8019 2023-08-24 Pan Li <pan2.li@intel.com>
8021 * config/riscv/autovec.md: Fix typo.
8023 2023-08-24 Pan Li <pan2.li@intel.com>
8025 * config/riscv/riscv-vector-builtins-bases.cc
8026 (class binop_frm): Removed.
8027 (class reverse_binop_frm): Ditto.
8028 (class widen_binop_frm): Ditto.
8029 (class vfmacc_frm): Ditto.
8030 (class vfnmacc_frm): Ditto.
8031 (class vfmsac_frm): Ditto.
8032 (class vfnmsac_frm): Ditto.
8033 (class vfmadd_frm): Ditto.
8034 (class vfnmadd_frm): Ditto.
8035 (class vfmsub_frm): Ditto.
8036 (class vfnmsub_frm): Ditto.
8037 (class vfwmacc_frm): Ditto.
8038 (class vfwnmacc_frm): Ditto.
8039 (class vfwmsac_frm): Ditto.
8040 (class vfwnmsac_frm): Ditto.
8041 (class unop_frm): Ditto.
8042 (class vfrec7_frm): Ditto.
8043 (class binop): Add frm_op_type template arg.
8044 (class unop): Ditto.
8045 (class widen_binop): Ditto.
8046 (class widen_binop_fp): Ditto.
8047 (class reverse_binop): Ditto.
8048 (class vfmacc): Ditto.
8049 (class vfnmsac): Ditto.
8050 (class vfmadd): Ditto.
8051 (class vfnmsub): Ditto.
8052 (class vfnmacc): Ditto.
8053 (class vfmsac): Ditto.
8054 (class vfnmadd): Ditto.
8055 (class vfmsub): Ditto.
8056 (class vfwmacc): Ditto.
8057 (class vfwnmacc): Ditto.
8058 (class vfwmsac): Ditto.
8059 (class vfwnmsac): Ditto.
8060 (class float_misc): Ditto.
8062 2023-08-24 Andrew Pinski <apinski@marvell.com>
8064 PR tree-optimization/111109
8065 * match.pd (ior(cond,cond), ior(vec_cond,vec_cond)):
8066 Add check to make sure cmp and icmp are inverse.
8068 2023-08-24 Andrew Pinski <apinski@marvell.com>
8070 PR tree-optimization/95929
8071 * match.pd (convert?(-a)): New pattern
8072 for 1bit integer types.
8074 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
8077 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
8079 * common/config/i386/cpuinfo.h (get_available_features):
8080 Add avx10_set and version and detect avx10.1.
8081 (cpu_indicator_init): Handle avx10.1-512.
8082 * common/config/i386/i386-common.cc
8083 (OPTION_MASK_ISA2_AVX10_512BIT_SET): New.
8084 (OPTION_MASK_ISA2_AVX10_1_SET): Ditto.
8085 (OPTION_MASK_ISA2_AVX10_512BIT_UNSET): Ditto.
8086 (OPTION_MASK_ISA2_AVX10_1_UNSET): Ditto.
8087 (OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10_1.
8088 (ix86_handle_option): Handle -mavx10.1, -mavx10.1-256 and
8090 * common/config/i386/i386-cpuinfo.h (enum processor_features):
8091 Add FEATURE_AVX10_512BIT, FEATURE_AVX10_1 and
8092 FEATURE_AVX10_512BIT.
8093 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
8094 AVX10_512BIT, AVX10_1 and AVX10_1_512.
8095 * config/i386/constraints.md (Yk): Add AVX10_1.
8098 * config/i386/cpuid.h (bit_AVX10): New.
8099 (bit_AVX10_256): Ditto.
8100 (bit_AVX10_512): Ditto.
8101 * config/i386/i386-c.cc (ix86_target_macros_internal):
8102 Define AVX10_512BIT and AVX10_1.
8103 * config/i386/i386-isa.def
8104 (AVX10_512BIT): Add DEF_PTA(AVX10_512BIT).
8105 (AVX10_1): Add DEF_PTA(AVX10_1).
8106 * config/i386/i386-options.cc (isa2_opts): Add -mavx10.1.
8107 (ix86_valid_target_attribute_inner_p): Handle avx10-512bit, avx10.1
8109 (ix86_option_override_internal): Enable AVX512{F,VL,BW,DQ,CD,BF16,
8110 FP16,VBMI,VBMI2,VNNI,IFMA,BITALG,VPOPCNTDQ} features for avx10.1-512.
8111 (ix86_valid_target_attribute_inner_p): Handle AVX10_1.
8112 * config/i386/i386.cc (ix86_get_ssemov): Add AVX10_1.
8113 (ix86_conditional_register_usage): Ditto.
8114 (ix86_hard_regno_mode_ok): Ditto.
8115 (ix86_rtx_costs): Ditto.
8116 * config/i386/i386.h (VALID_MASK_AVX10_MODE): New macro.
8117 * config/i386/i386.opt: Add option -mavx10.1, -mavx10.1-256 and
8119 * doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512.
8120 * doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512.
8121 * doc/sourcebuild.texi: Document target avx10.1, avx10.1-256
8124 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
8127 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
8129 * common/config/i386/i386-common.cc
8130 (ix86_check_avx10): New function to check isa_flags and
8131 isa_flags_explicit to emit warning when AVX10 is enabled
8133 (ix86_check_avx512): New function to check isa_flags and
8134 isa_flags_explicit to emit warning when AVX512 is enabled
8136 (ix86_handle_option): Do not change the flags when warning
8138 * config/i386/driver-i386.cc (host_detect_local_cpu):
8139 Do not append -mno-avx10.1 for -march=native.
8141 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
8144 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
8146 * common/config/i386/i386-common.cc
8147 (ix86_check_avx10_vector_width): New function to check isa_flags
8148 to emit a warning when there is a conflict in AVX10 options for
8150 (ix86_handle_option): Add check for avx10.1-256 and avx10.1-512.
8151 * config/i386/driver-i386.cc (host_detect_local_cpu):
8152 Do not append -mno-avx10-max-512bit for -march=native.
8154 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
8157 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
8159 * config/i386/avx512vldqintrin.h: Remove target attribute.
8160 * config/i386/i386-builtin.def (BDESC):
8161 Add OPTION_MASK_ISA2_AVX10_1.
8162 * config/i386/i386-builtins.cc (def_builtin): Handle AVX10_1.
8163 * config/i386/i386-expand.cc
8164 (ix86_check_builtin_isa_match): Ditto.
8165 (ix86_expand_sse2_mulvxdi3): Add TARGET_AVX10_1.
8166 * config/i386/i386.md: Add new isa attribute avx10_1_or_avx512dq
8167 and avx10_1_or_avx512vl.
8168 * config/i386/sse.md: (VF2_AVX512VLDQ_AVX10_1): New.
8169 (VF1_128_256VLDQ_AVX10_1): Ditto.
8170 (VI8_AVX512VLDQ_AVX10_1): Ditto.
8171 (<sse>_andnot<mode>3<mask_name>):
8172 Add TARGET_AVX10_1 and change isa attr from avx512dq to
8173 avx10_1_or_avx512dq.
8174 (*andnot<mode>3): Add TARGET_AVX10_1 and change isa attr from
8175 avx512vl to avx10_1_or_avx512vl.
8176 (fix<fixunssuffix>_trunc<mode><sseintvecmodelower>2<mask_name><round_saeonly_name>):
8177 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
8178 (fix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
8180 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
8182 (fix<fixunssuffix>_trunc<mode><sselongvecmodelower>2<mask_name><round_saeonly_name>):
8183 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
8184 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
8186 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
8187 (cond_mul<mode>): Change iterator to VI8_AVX10_1_AVX512DQVL.
8188 Remove target check.
8189 (avx512dq_mul<mode>3<mask_name>): Ditto.
8190 (*avx512dq_mul<mode>3<mask_name>): Ditto.
8191 (VI4F_BRCST32x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
8192 (<mask_codefor>avx512dq_broadcast<mode><mask_name>):
8193 Remove target check.
8194 (VI8F_BRCST64x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
8195 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1):
8196 Remove target check.
8197 * config/i386/subst.md (mask_mode512bit_condition): Add TARGET_AVX10_1.
8198 (mask_avx512vl_condition): Ditto.
8201 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
8204 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
8206 * config/i386/avx512vldqintrin.h: Remove target attribute.
8207 * config/i386/i386-builtin.def (BDESC):
8208 Add OPTION_MASK_ISA2_AVX10_1.
8209 * config/i386/i386.cc (standard_sse_constant_opcode): Add TARGET_AVX10_1.
8210 * config/i386/sse.md: (VI48_AVX512VL_AVX10_1): New.
8211 (VI48_AVX512VLDQ_AVX10_1): Ditto.
8212 (VF2_AVX512VL): Remove.
8213 (VI8_256_512VLDQ_AVX10_1): Rename from VI8_256_512.
8215 (*<code><mode>3<mask_name>): Change isa attribute to
8216 avx10_1_or_avx512dq. Add TARGET_AVX10_1.
8217 (<code><mode>3): Add TARGET_AVX10_1. Change isa attr
8218 to avx10_1_or_avx512vl.
8219 (<mask_codefor>avx512dq_cvtps2qq<mode><mask_name><round_name>):
8220 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
8221 (<mask_codefor>avx512dq_cvtps2qqv2di<mask_name>):
8223 (<mask_codefor>avx512dq_cvtps2uqq<mode><mask_name><round_name>):
8224 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
8225 (<mask_codefor>avx512dq_cvtps2uqqv2di<mask_name>):
8227 (float<floatunssuffix><sseintvecmodelower><mode>2<mask_name><round_name>):
8228 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
8229 (float<floatunssuffix><sselongvecmodelower><mode>2<mask_name><round_name>):
8230 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
8231 (float<floatunssuffix>v4div4sf2<mask_name>):
8233 (avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
8234 (*avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
8235 (float<floatunssuffix>v2div2sf2): Ditto.
8236 (float<floatunssuffix>v2div2sf2_mask): Ditto.
8237 (*float<floatunssuffix>v2div2sf2_mask): Ditto.
8238 (*float<floatunssuffix>v2div2sf2_mask_1): Ditto.
8239 (<avx512>_cvt<ssemodesuffix>2mask<mode>):
8240 Change iterator to VI48_AVX512VLDQ_AVX10_1. Remove target check.
8241 (<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
8242 (*<avx512>_cvtmask2<ssemodesuffix><mode>):
8243 Change iterator to VI48_AVX512VL_AVX10_1. Remove target check.
8244 Change when constraint is enabled.
8246 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
8249 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
8251 * config/i386/avx512vldqintrin.h: Remove target attribute.
8252 * config/i386/i386-builtin.def (BDESC):
8253 Add OPTION_MASK_ISA2_AVX10_1.
8254 * config/i386/sse.md (VF_AVX512VLDQ_AVX10_1): New.
8255 (VFH_AVX512VLDQ_AVX10_1): Ditto.
8256 (VF1_AVX512VLDQ_AVX10_1): Ditto.
8257 (<mask_codefor>reducep<mode><mask_name><round_saeonly_name>):
8258 Change iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
8259 (vec_pack<floatprefix>_float_<mode>): Change iterator to
8260 VI8_AVX512VLDQ_AVX10_1. Remove target check.
8261 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Change iterator to
8262 VF1_AVX512VLDQ_AVX10_1. Remove target check.
8263 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
8264 (VI48F_256_DQVL_AVX10_1): Rename from VI48F_256_DQ.
8265 (avx512vl_vextractf128<mode>): Change iterator to
8266 VI48F_256_DQVL_AVX10_1. Remove target check.
8267 (vec_extract_hi_<mode>_mask): Add TARGET_AVX10_1.
8268 (vec_extract_hi_<mode>): Ditto.
8269 (avx512vl_vinsert<mode>): Ditto.
8270 (vec_set_lo_<mode><mask_name>): Ditto.
8271 (vec_set_hi_<mode><mask_name>): Ditto.
8272 (avx512dq_rangep<mode><mask_name><round_saeonly_name>): Change
8273 iterator to VF_AVX512VLDQ_AVX10_1. Remove target check.
8274 (avx512dq_fpclass<mode><mask_scalar_merge_name>): Change
8275 iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
8276 * config/i386/subst.md (mask_avx512dq_condition): Add
8278 (mask_scalar_merge): Ditto.
8280 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
8283 2023-08-18 Haochen Jiang <haochen.jiang@intel.com>
8286 * config/i386/avx512vldqintrin.h: Push AVX2 when AVX2 is
8289 2023-08-24 Richard Biener <rguenther@suse.de>
8292 * dwarf2out.cc (prune_unused_types_walk): Handle
8293 DW_TAG_restrict_type, DW_TAG_shared_type, DW_TAG_atomic_type,
8294 DW_TAG_immutable_type, DW_TAG_coarray_type, DW_TAG_unspecified_type
8295 and DW_TAG_dynamic_type as to only output them when referenced.
8297 2023-08-24 liuhongt <hongtao.liu@intel.com>
8299 * config/i386/i386.cc (ix86_invalid_conversion): Adjust GCC
8302 2023-08-24 liuhongt <hongtao.liu@intel.com>
8304 * common/config/i386/i386-common.cc (processor_names): Add new
8305 member graniterapids-s and arrowlake-s.
8306 * config/i386/i386-options.cc (processor_alias_table): Update
8307 table with PROCESSOR_ARROWLAKE_S and
8308 PROCESSOR_GRANITERAPIDS_D.
8309 (m_GRANITERAPID_D): New macro.
8310 (m_ARROWLAKE_S): Ditto.
8311 (m_CORE_AVX512): Add m_GRANITERAPIDS_D.
8312 (processor_cost_table): Add icelake_cost for
8313 PROCESSOR_GRANITERAPIDS_D and alderlake_cost for
8314 PROCESSOR_ARROWLAKE_S.
8315 * config/i386/x86-tune.def: Hanlde m_ARROWLAKE_S same as
8317 * config/i386/i386.h (enum processor_type): Add new member
8318 PROCESSOR_GRANITERAPIDS_D and PROCESSOR_ARROWLAKE_S.
8319 * config/i386/i386-c.cc (ix86_target_macros_internal): Handle
8320 PROCESSOR_GRANITERAPIDS_D and PROCESSOR_ARROWLAKE_S
8322 2023-08-23 Jivan Hakobyan <jivanhakobyan9@gmail.com>
8324 * lra-eliminations.cc (eliminate_regs_in_insn): Use equivalences to
8325 to help simplify code further.
8327 2023-08-23 Andrew MacLeod <amacleod@redhat.com>
8329 * gimple-range-fold.cc (fold_using_range::range_of_phi): Tweak output.
8330 * gimple-range-phi.cc (phi_group::phi_group): Remove unused members.
8331 Initialize using a range instead of value and edge.
8332 (phi_group::calculate_using_modifier): Use initializer value and
8333 process for relations after trying for iteration convergence.
8334 (phi_group::refine_using_relation): Use initializer range.
8335 (phi_group::dump): Rework the dump output.
8336 (phi_analyzer::process_phi): Allow multiple constant initilizers.
8337 Dump groups immediately as created.
8338 (phi_analyzer::dump): Tweak output.
8339 * gimple-range-phi.h (phi_group::phi_group): Adjust prototype.
8340 (phi_group::initial_value): Delete.
8341 (phi_group::refine_using_relation): Adjust prototype.
8342 (phi_group::m_initial_value): Delete.
8343 (phi_group::m_initial_edge): Delete.
8344 (phi_group::m_vr): Use int_range_max.
8345 * tree-vrp.cc (execute_ranger_vrp): Don't dump phi groups.
8347 2023-08-23 Andrew MacLeod <amacleod@redhat.com>
8349 * gimple-range-phi.cc (phi_analyzer::operator[]): Return NULL if
8350 no group was created.
8351 (phi_analyzer::process_phi): Do not create groups of one phi node.
8353 2023-08-23 Richard Earnshaw <rearnsha@arm.com>
8355 * target.def (gen_ccmp_first, gen_ccmp_next): Use rtx_code for
8356 CODE, CMP_CODE and BIT_CODE arguments.
8357 * config/aarch64/aarch64.cc (aarch64_gen_ccmp_first): Likewise.
8358 (aarch64_gen_ccmp_next): Likewise.
8359 * doc/tm.texi: Regenerated.
8361 2023-08-23 Richard Earnshaw <rearnsha@arm.com>
8363 * coretypes.h (rtx_code): Add forward declaration.
8364 * rtl.h (rtx_code): Make compatible with forward declaration.
8366 2023-08-23 Uros Bizjak <ubizjak@gmail.com>
8369 * config/i386/i386.md (*concat<any_or_plus:mode><dwi>3_3):
8370 Merge pattern from *concatditi3_3 and *concatsidi3_3 using
8371 DWIH mode iterator. Disable (=&r,m,m) alternative for
8373 (*concat<any_or_plus:mode><dwi>3_3): Disable (=&r,m,m)
8374 alternative for 32-bit targets.
8376 2023-08-23 Zhangjin Liao <liaozhangjin@eswincomputing.com>
8378 * config/riscv/bitmanip.md (*<bitmanip_optab>disi2_sext): Add a more
8379 appropriate type attribute.
8381 2023-08-23 Lehua Ding <lehua.ding@rivai.ai>
8383 * config/riscv/autovec-opt.md (*cond_abs<mode>): New combine pattern.
8384 (*copysign<mode>_neg): Ditto.
8385 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): Adjust.
8386 (<optab><mode>2): Ditto.
8387 (cond_<optab><mode>): New.
8388 (cond_len_<optab><mode>): Ditto.
8389 * config/riscv/riscv-protos.h (enum insn_type): New.
8390 (expand_cond_len_unop): New helper func.
8391 * config/riscv/riscv-v.cc (shuffle_merge_patterns): Adjust.
8392 (expand_cond_len_unop): New helper func.
8394 2023-08-23 Jan Hubicka <jh@suse.cz>
8396 * tree-ssa-loop-ch.cc (enum ch_decision): Fix comment.
8397 (should_duplicate_loop_header_p): Fix return value for static exits.
8398 (ch_base::copy_headers): Improve handling of ch_possible_zero_cost.
8400 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
8402 * tree-vect-stmts.cc (vectorizable_store): Move the handlings on
8403 VMAT_GATHER_SCATTER in the final loop nest to its own loop,
8404 and update the final nest accordingly.
8406 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
8408 * tree-vect-stmts.cc (vectorizable_store): Move the handlings on
8409 VMAT_LOAD_STORE_LANES in the final loop nest to its own loop,
8410 and update the final nest accordingly.
8412 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
8414 * tree-vect-stmts.cc (vectorizable_store): Remove vec oprnds,
8415 adjust vec result_chain, vec_oprnd with auto_vec, and adjust
8416 gvec_oprnds with auto_delete_vec.
8418 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8420 * config/riscv/riscv-vsetvl.cc
8421 (pass_vsetvl::global_eliminate_vsetvl_insn): Fix potential ICE.
8423 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8425 * config/riscv/riscv-vsetvl.cc (ge_sew_ratio_unavailable_p):
8427 * config/riscv/riscv-vsetvl.def (DEF_SEW_LMUL_FUSE_RULE): Ditto.
8429 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8431 * config/riscv/vector.md: Add attribute.
8433 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8435 * config/riscv/riscv-vsetvl.cc (change_insn): Clang format.
8436 (vector_infos_manager::all_same_ratio_p): Ditto.
8437 (vector_infos_manager::all_same_avl_p): Ditto.
8438 (pass_vsetvl::refine_vsetvls): Ditto.
8439 (pass_vsetvl::cleanup_vsetvls): Ditto.
8440 (pass_vsetvl::commit_vsetvls): Ditto.
8441 (pass_vsetvl::local_eliminate_vsetvl_insn): Ditto.
8442 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
8443 (pass_vsetvl::compute_probabilities): Ditto.
8445 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8447 * config/riscv/t-riscv: Add riscv-vsetvl.def
8449 2023-08-22 Vineet Gupta <vineetg@rivosinc.com>
8451 * config/riscv/riscv.opt: Add --param names
8452 riscv-autovec-preference and riscv-autovec-lmul
8454 2023-08-22 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
8456 * config/riscv/t-linux: Add MULTIARCH_DIRNAME.
8458 2023-08-22 Tobias Burnus <tobias@codesourcery.com>
8460 * tree-core.h (enum omp_clause_defaultmap_kind): Add
8461 OMP_CLAUSE_DEFAULTMAP_CATEGORY_ALL.
8462 * gimplify.cc (gimplify_scan_omp_clauses): Handle it.
8463 * tree-pretty-print.cc (dump_omp_clause): Likewise.
8465 2023-08-22 Jakub Jelinek <jakub@redhat.com>
8468 * doc/extend.texi (_Float<n>): Drop obsolete sentence that the
8469 types aren't supported in C++.
8471 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8473 * doc/md.texi: Add LEN_FOLD_EXTRACT_LAST pattern.
8474 * internal-fn.cc (fold_len_extract_direct): Ditto.
8475 (expand_fold_len_extract_optab_fn): Ditto.
8476 (direct_fold_len_extract_optab_supported_p): Ditto.
8477 * internal-fn.def (LEN_FOLD_EXTRACT_LAST): Ditto.
8478 * optabs.def (OPTAB_D): Ditto.
8480 2023-08-22 Richard Biener <rguenther@suse.de>
8482 * tree-vect-stmts.cc (vectorizable_store): Do not bump
8483 DR_GROUP_STORE_COUNT here. Remove early out.
8484 (vect_transform_stmt): Only call vectorizable_store on
8485 the last element of an interleaving chain.
8487 2023-08-22 Richard Biener <rguenther@suse.de>
8489 PR tree-optimization/94864
8490 PR tree-optimization/94865
8491 PR tree-optimization/93080
8492 * match.pd (bit_insert @0 (BIT_FIELD_REF @1 ..) ..): New pattern
8493 for vector insertion from vector extraction.
8495 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8496 Kewen.Lin <linkw@linux.ibm.com>
8498 * tree-vect-loop.cc (vect_verify_loop_lens): Add exists check.
8499 (vectorizable_live_operation): Add live vectorization for length loop
8502 2023-08-22 David Malcolm <dmalcolm@redhat.com>
8505 * doc/invoke.texi: Remove -Wanalyzer-unterminated-string.
8507 2023-08-22 Pan Li <pan2.li@intel.com>
8509 * config/riscv/riscv-vector-builtins-bases.cc
8510 (vfwredusum_frm_obj): New declaration.
8512 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
8513 * config/riscv/riscv-vector-builtins-functions.def
8514 (vfwredusum_frm): New intrinsic function def.
8516 2023-08-21 David Faust <david.faust@oracle.com>
8518 * config/bpf/bpf.md (neg): Second operand must be a register.
8520 2023-08-21 Edwin Lu <ewlu@rivosinc.com>
8522 * config/riscv/bitmanip.md: Added bitmanip type to insns
8523 that are missing types.
8525 2023-08-21 Jeff Law <jlaw@ventanamicro.com>
8527 * config/riscv/sync-ztso.md (atomic_load_ztso<mode>): Avoid extraenous
8530 2023-08-21 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
8532 * config/aarch64/falkor-tag-collision-avoidance.cc (dump_insn_list):
8533 Fix format specifier.
8535 2023-08-21 Aldy Hernandez <aldyh@redhat.com>
8537 * value-range.cc (frange::union_nans): Return false if nothing
8539 (range_tests_floats): New test.
8541 2023-08-21 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
8543 PR tree-optimization/111048
8544 * fold-const.cc (valid_mask_for_fold_vec_perm_cst_p): Set arg_npatterns
8546 (fold_vec_perm_cst): Remove workaround and again call
8547 valid_mask_fold_vec_perm_cst_p for both VLS and VLA vectors.
8548 (test_fold_vec_perm_cst::test_nunits_min_4): Add test-case.
8550 2023-08-21 Richard Biener <rguenther@suse.de>
8552 PR tree-optimization/111082
8553 * tree-vect-slp.cc (vectorize_slp_instance_root_stmt): Only
8554 pun operations that can overflow.
8556 2023-08-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8558 * lcm.cc (compute_antinout_edge): Export as global use.
8559 (compute_earliest): Ditto.
8560 (compute_rev_insert_delete): Ditto.
8561 * lcm.h (compute_antinout_edge): Ditto.
8562 (compute_earliest): Ditto.
8564 2023-08-21 Richard Biener <rguenther@suse.de>
8566 PR tree-optimization/111070
8567 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Check we have
8568 an SSA name before checking SSA_NAME_OCCURS_IN_ABNORMAL_PHI.
8570 2023-08-21 Andrew Pinski <apinski@marvell.com>
8572 PR tree-optimization/111002
8573 * match.pd (view_convert(vec_cond(a,b,c))): New pattern.
8575 2023-08-21 liuhongt <hongtao.liu@intel.com>
8577 * common/config/i386/cpuinfo.h (get_intel_cpu): Detect
8579 * common/config/i386/i386-common.cc (alias_table): Support
8580 -march=gracemont as an alias of -march=alderlake.
8582 2023-08-20 Uros Bizjak <ubizjak@gmail.com>
8584 * config/i386/i386-expand.cc (ix86_expand_sse_extend): Use ops[1]
8585 instead of src in the call to ix86_expand_sse_cmp.
8586 * config/i386/sse.md (<any_extend:insn>v8qiv8hi2): Do not
8587 force operands[1] to a register.
8588 (<any_extend:insn>v4hiv4si2): Ditto.
8589 (<any_extend:insn>v2siv2di2): Ditto.
8591 2023-08-20 Andrew Pinski <apinski@marvell.com>
8593 PR tree-optimization/111006
8594 PR tree-optimization/110986
8595 * match.pd: (op(vec_cond(a,b,c))): Handle convert for op.
8597 2023-08-20 Eric Gallager <egallager@gcc.gnu.org>
8600 * Makefile.in: improve error message when /usr/include is
8603 2023-08-19 Tobias Burnus <tobias@codesourcery.com>
8605 PR middle-end/111017
8606 * omp-expand.cc (expand_omp_for_init_vars): Pass after=true
8607 to expand_omp_build_cond for 'factor != 0' condition, resulting
8608 in pre-r12-5295-g47de0b56ee455e code for the gimple insert.
8610 2023-08-19 Guo Jie <guojie@loongson.cn>
8611 Lulu Cheng <chenglulu@loongson.cn>
8613 * config/loongarch/t-loongarch: Add loongarch-driver.h into
8614 TM_H. Add loongarch-def.h and loongarch-tune.h into
8617 2023-08-18 Uros Bizjak <ubizjak@gmail.com>
8620 * config/i386/i386-expand.cc (ix86_split_mmx_punpck):
8621 Also handle V2QImode.
8622 (ix86_expand_sse_extend): New function.
8623 * config/i386/i386-protos.h (ix86_expand_sse_extend): New prototype.
8624 * config/i386/mmx.md (<any_extend:insn>v4qiv4hi2): Enable for
8625 TARGET_SSE2. Expand through ix86_expand_sse_extend for !TARGET_SSE4_1.
8626 (<any_extend:insn>v2hiv2si2): Ditto.
8627 (<any_extend:insn>v2qiv2hi2): Ditto.
8628 * config/i386/sse.md (<any_extend:insn>v8qiv8hi2): Ditto.
8629 (<any_extend:insn>v4hiv4si2): Ditto.
8630 (<any_extend:insn>v2siv2di2): Ditto.
8632 2023-08-18 Aldy Hernandez <aldyh@redhat.com>
8635 * value-range.cc (irange::union_bitmask): Return FALSE if updated
8636 bitmask is semantically equivalent to the original mask.
8637 (irange::intersect_bitmask): Same.
8638 (irange::get_bitmask): Add comment.
8640 2023-08-18 Richard Biener <rguenther@suse.de>
8642 PR tree-optimization/111019
8643 * tree-ssa-loop-im.cc (gather_mem_refs_stmt): When canonicalizing
8644 also scrap base and offset in case the ref is indirect.
8646 2023-08-18 Jose E. Marchesi <jose.marchesi@oracle.com>
8648 * config/bpf/bpf.opt (mframe-limit): Set default to 32767.
8650 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
8653 * Makefile.in (TM_P_H): Add $(TREE_H) as dependence.
8655 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
8657 * tree-vect-stmts.cc (vect_build_scatter_store_calls): New, factor
8659 (vectorizable_store): ... here.
8661 2023-08-18 Richard Biener <rguenther@suse.de>
8663 PR tree-optimization/111048
8664 * fold-const.cc (fold_vec_perm_cst): Check for non-VLA
8667 2023-08-18 Haochen Jiang <haochen.jiang@intel.com>
8670 * config/i386/avx512vldqintrin.h: Push AVX2 when AVX2 is
8673 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
8675 * tree-vect-stmts.cc (vectorizable_load): Move the handlings on
8676 VMAT_GATHER_SCATTER in the final loop nest to its own loop,
8677 and update the final nest accordingly.
8679 2023-08-18 Andrew Pinski <apinski@marvell.com>
8681 * doc/md.texi (Standard patterns): Document cond_neg, cond_one_cmpl,
8682 cond_len_neg and cond_len_one_cmpl.
8684 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
8686 * config/riscv/iterators.md (TARGET_HARD_FLOAT || TARGET_ZFINX): New.
8687 * config/riscv/pic.md (*local_pic_load<ANYF:mode>): Change ANYF.
8688 (*local_pic_load<ANYLSF:mode>): To ANYLSF.
8689 (*local_pic_load_32d<ANYF:mode>): Ditto.
8690 (*local_pic_load_32d<ANYLSF:mode>): Ditto.
8691 (*local_pic_store<ANYF:mode>): Ditto.
8692 (*local_pic_store<ANYLSF:mode>): Ditto.
8693 (*local_pic_store_32d<ANYF:mode>): Ditto.
8694 (*local_pic_store_32d<ANYLSF:mode>): Ditto.
8696 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
8697 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
8699 * config/riscv/predicates.md (vector_const_0_operand): New.
8700 * config/riscv/vector.md (*pred_broadcast<mode>_zero): Ditto.
8702 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
8704 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::backward_demand_fusion):
8707 2023-08-17 Andrew MacLeod <amacleod@redhat.com>
8709 PR tree-optimization/111009
8710 * range-op.cc (operator_addr_expr::op1_range): Be more restrictive.
8712 2023-08-17 Vladimir N. Makarov <vmakarov@redhat.com>
8714 * lra-spills.cc (assign_stack_slot_num_and_sort_pseudos): Moving
8715 slots_num initialization from here ...
8716 (lra_spill): ... to here before the 1st call of
8717 assign_stack_slot_num_and_sort_pseudos. Add the 2nd call after
8720 2023-08-17 Jose E. Marchesi <jose.marchesi@oracle.com>
8723 * doc/invoke.texi (Option Summary): Mention
8724 -Wcompare-distinct-pointer-types under `Warning Options'.
8725 (Warning Options): Document -Wcompare-distinct-pointer-types.
8727 2023-08-17 Jan-Benedict Glaw <jbglaw@lug-owl.de>
8729 * recog.cc (memory_address_addr_space_p): Mark possibly unused
8732 2023-08-17 Richard Biener <rguenther@suse.de>
8734 PR tree-optimization/111039
8735 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Check for
8736 SSA_NAME_OCCURS_IN_ABNORMAL_PHI.
8738 2023-08-17 Alex Coplan <alex.coplan@arm.com>
8740 * doc/rtl.texi: Fix up sample code for RTL-SSA insn changes.
8742 2023-08-17 Jose E. Marchesi <jose.marchesi@oracle.com>
8745 * config/bpf/bpf.cc (bpf_attribute_table): Add entry for the
8746 `naked' function attribute.
8747 (bpf_warn_func_return): New function.
8748 (TARGET_WARN_FUNC_RETURN): Define.
8749 (bpf_expand_prologue): Add preventive comment.
8750 (bpf_expand_epilogue): Likewise.
8751 * doc/extend.texi (BPF Function Attributes): Document the `naked'
8754 2023-08-17 Richard Biener <rguenther@suse.de>
8756 * tree-vect-slp.cc (vect_slp_check_for_roots): Use
8757 !needs_fold_left_reduction_p to decide whether we can
8758 handle the reduction with association.
8759 (vectorize_slp_instance_root_stmt): For TYPE_OVERFLOW_UNDEFINED
8760 reductions perform all arithmetic in an unsigned type.
8762 2023-08-17 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
8764 * configure.ac (gcc_cv_ld64_version): Allow for dyld in ld -v
8766 * configure: Regenerate.
8768 2023-08-17 Pan Li <pan2.li@intel.com>
8770 * config/riscv/riscv-vector-builtins-bases.cc
8771 (widen_freducop): Add frm_opt_type template arg.
8772 (vfwredosum_frm_obj): New declaration.
8774 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
8775 * config/riscv/riscv-vector-builtins-functions.def
8776 (vfwredosum_frm): New intrinsic function def.
8778 2023-08-17 Pan Li <pan2.li@intel.com>
8780 * config/riscv/riscv-vector-builtins-bases.cc
8781 (vfredosum_frm_obj): New declaration.
8783 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
8784 * config/riscv/riscv-vector-builtins-functions.def
8785 (vfredosum_frm): New intrinsic function def.
8787 2023-08-17 Pan Li <pan2.li@intel.com>
8789 * config/riscv/riscv-vector-builtins-bases.cc
8790 (class freducop): Add frm_op_type template arg.
8791 (vfredusum_frm_obj): New declaration.
8793 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
8794 * config/riscv/riscv-vector-builtins-functions.def
8795 (vfredusum_frm): New intrinsic function def.
8796 * config/riscv/riscv-vector-builtins-shapes.cc
8797 (struct reduc_alu_frm_def): New class for frm shape.
8798 (SHAPE): New declaration.
8799 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
8801 2023-08-17 Pan Li <pan2.li@intel.com>
8803 * config/riscv/riscv-vector-builtins-bases.cc
8804 (class vfncvt_f): Add frm_op_type template arg.
8805 (vfncvt_f_frm_obj): New declaration.
8807 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
8808 * config/riscv/riscv-vector-builtins-functions.def
8809 (vfncvt_f_frm): New intrinsic function def.
8811 2023-08-17 Pan Li <pan2.li@intel.com>
8813 * config/riscv/riscv-vector-builtins-bases.cc
8814 (vfncvt_xu_frm_obj): New declaration.
8816 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
8817 * config/riscv/riscv-vector-builtins-functions.def
8818 (vfncvt_xu_frm): New intrinsic function def.
8820 2023-08-17 Pan Li <pan2.li@intel.com>
8822 * config/riscv/riscv-vector-builtins-bases.cc
8823 (class vfncvt_x): Add frm_op_type template arg.
8824 (BASE): New declaration.
8825 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
8826 * config/riscv/riscv-vector-builtins-functions.def
8827 (vfncvt_x_frm): New intrinsic function def.
8828 * config/riscv/riscv-vector-builtins-shapes.cc
8829 (struct narrow_alu_frm_def): New shape function for frm.
8830 (SHAPE): New declaration.
8831 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
8833 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
8835 * config/i386/avx512vldqintrin.h: Remove target attribute.
8836 * config/i386/i386-builtin.def (BDESC):
8837 Add OPTION_MASK_ISA2_AVX10_1.
8838 * config/i386/sse.md (VF_AVX512VLDQ_AVX10_1): New.
8839 (VFH_AVX512VLDQ_AVX10_1): Ditto.
8840 (VF1_AVX512VLDQ_AVX10_1): Ditto.
8841 (<mask_codefor>reducep<mode><mask_name><round_saeonly_name>):
8842 Change iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
8843 (vec_pack<floatprefix>_float_<mode>): Change iterator to
8844 VI8_AVX512VLDQ_AVX10_1. Remove target check.
8845 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Change iterator to
8846 VF1_AVX512VLDQ_AVX10_1. Remove target check.
8847 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
8848 (VI48F_256_DQVL_AVX10_1): Rename from VI48F_256_DQ.
8849 (avx512vl_vextractf128<mode>): Change iterator to
8850 VI48F_256_DQVL_AVX10_1. Remove target check.
8851 (vec_extract_hi_<mode>_mask): Add TARGET_AVX10_1.
8852 (vec_extract_hi_<mode>): Ditto.
8853 (avx512vl_vinsert<mode>): Ditto.
8854 (vec_set_lo_<mode><mask_name>): Ditto.
8855 (vec_set_hi_<mode><mask_name>): Ditto.
8856 (avx512dq_rangep<mode><mask_name><round_saeonly_name>): Change
8857 iterator to VF_AVX512VLDQ_AVX10_1. Remove target check.
8858 (avx512dq_fpclass<mode><mask_scalar_merge_name>): Change
8859 iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
8860 * config/i386/subst.md (mask_avx512dq_condition): Add
8862 (mask_scalar_merge): Ditto.
8864 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
8866 * config/i386/avx512vldqintrin.h: Remove target attribute.
8867 * config/i386/i386-builtin.def (BDESC):
8868 Add OPTION_MASK_ISA2_AVX10_1.
8869 * config/i386/i386.cc (standard_sse_constant_opcode): Add TARGET_AVX10_1.
8870 * config/i386/sse.md: (VI48_AVX512VL_AVX10_1): New.
8871 (VI48_AVX512VLDQ_AVX10_1): Ditto.
8872 (VF2_AVX512VL): Remove.
8873 (VI8_256_512VLDQ_AVX10_1): Rename from VI8_256_512.
8875 (*<code><mode>3<mask_name>): Change isa attribute to
8876 avx10_1_or_avx512dq. Add TARGET_AVX10_1.
8877 (<code><mode>3): Add TARGET_AVX10_1. Change isa attr
8878 to avx10_1_or_avx512vl.
8879 (<mask_codefor>avx512dq_cvtps2qq<mode><mask_name><round_name>):
8880 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
8881 (<mask_codefor>avx512dq_cvtps2qqv2di<mask_name>):
8883 (<mask_codefor>avx512dq_cvtps2uqq<mode><mask_name><round_name>):
8884 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
8885 (<mask_codefor>avx512dq_cvtps2uqqv2di<mask_name>):
8887 (float<floatunssuffix><sseintvecmodelower><mode>2<mask_name><round_name>):
8888 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
8889 (float<floatunssuffix><sselongvecmodelower><mode>2<mask_name><round_name>):
8890 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
8891 (float<floatunssuffix>v4div4sf2<mask_name>):
8893 (avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
8894 (*avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
8895 (float<floatunssuffix>v2div2sf2): Ditto.
8896 (float<floatunssuffix>v2div2sf2_mask): Ditto.
8897 (*float<floatunssuffix>v2div2sf2_mask): Ditto.
8898 (*float<floatunssuffix>v2div2sf2_mask_1): Ditto.
8899 (<avx512>_cvt<ssemodesuffix>2mask<mode>):
8900 Change iterator to VI48_AVX512VLDQ_AVX10_1. Remove target check.
8901 (<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
8902 (*<avx512>_cvtmask2<ssemodesuffix><mode>):
8903 Change iterator to VI48_AVX512VL_AVX10_1. Remove target check.
8904 Change when constraint is enabled.
8906 2023-08-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8909 * config/riscv/riscv-vsetvl.cc (float_insn_valid_sew_p): New function.
8910 (second_sew_less_than_first_sew_p): Fix bug.
8911 (first_sew_less_than_second_sew_p): Ditto.
8913 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
8915 * config/i386/avx512vldqintrin.h: Remove target attribute.
8916 * config/i386/i386-builtin.def (BDESC):
8917 Add OPTION_MASK_ISA2_AVX10_1.
8918 * config/i386/i386-builtins.cc (def_builtin): Handle AVX10_1.
8919 * config/i386/i386-expand.cc
8920 (ix86_check_builtin_isa_match): Ditto.
8921 (ix86_expand_sse2_mulvxdi3): Add TARGET_AVX10_1.
8922 * config/i386/i386.md: Add new isa attribute avx10_1_or_avx512dq
8923 and avx10_1_or_avx512vl.
8924 * config/i386/sse.md: (VF2_AVX512VLDQ_AVX10_1): New.
8925 (VF1_128_256VLDQ_AVX10_1): Ditto.
8926 (VI8_AVX512VLDQ_AVX10_1): Ditto.
8927 (<sse>_andnot<mode>3<mask_name>):
8928 Add TARGET_AVX10_1 and change isa attr from avx512dq to
8929 avx10_1_or_avx512dq.
8930 (*andnot<mode>3): Add TARGET_AVX10_1 and change isa attr from
8931 avx512vl to avx10_1_or_avx512vl.
8932 (fix<fixunssuffix>_trunc<mode><sseintvecmodelower>2<mask_name><round_saeonly_name>):
8933 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
8934 (fix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
8936 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
8938 (fix<fixunssuffix>_trunc<mode><sselongvecmodelower>2<mask_name><round_saeonly_name>):
8939 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
8940 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
8942 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
8943 (cond_mul<mode>): Change iterator to VI8_AVX10_1_AVX512DQVL.
8944 Remove target check.
8945 (avx512dq_mul<mode>3<mask_name>): Ditto.
8946 (*avx512dq_mul<mode>3<mask_name>): Ditto.
8947 (VI4F_BRCST32x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
8948 (<mask_codefor>avx512dq_broadcast<mode><mask_name>):
8949 Remove target check.
8950 (VI8F_BRCST64x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
8951 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1):
8952 Remove target check.
8953 * config/i386/subst.md (mask_mode512bit_condition): Add TARGET_AVX10_1.
8954 (mask_avx512vl_condition): Ditto.
8957 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
8959 * common/config/i386/i386-common.cc
8960 (ix86_check_avx10_vector_width): New function to check isa_flags
8961 to emit a warning when there is a conflict in AVX10 options for
8963 (ix86_handle_option): Add check for avx10.1-256 and avx10.1-512.
8964 * config/i386/driver-i386.cc (host_detect_local_cpu):
8965 Do not append -mno-avx10-max-512bit for -march=native.
8967 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
8969 * common/config/i386/i386-common.cc
8970 (ix86_check_avx10): New function to check isa_flags and
8971 isa_flags_explicit to emit warning when AVX10 is enabled
8973 (ix86_check_avx512): New function to check isa_flags and
8974 isa_flags_explicit to emit warning when AVX512 is enabled
8976 (ix86_handle_option): Do not change the flags when warning
8978 * config/i386/driver-i386.cc (host_detect_local_cpu):
8979 Do not append -mno-avx10.1 for -march=native.
8981 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
8983 * common/config/i386/cpuinfo.h (get_available_features):
8984 Add avx10_set and version and detect avx10.1.
8985 (cpu_indicator_init): Handle avx10.1-512.
8986 * common/config/i386/i386-common.cc
8987 (OPTION_MASK_ISA2_AVX10_512BIT_SET): New.
8988 (OPTION_MASK_ISA2_AVX10_1_SET): Ditto.
8989 (OPTION_MASK_ISA2_AVX10_512BIT_UNSET): Ditto.
8990 (OPTION_MASK_ISA2_AVX10_1_UNSET): Ditto.
8991 (OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10_1.
8992 (ix86_handle_option): Handle -mavx10.1, -mavx10.1-256 and
8994 * common/config/i386/i386-cpuinfo.h (enum processor_features):
8995 Add FEATURE_AVX10_512BIT, FEATURE_AVX10_1 and
8996 FEATURE_AVX10_512BIT.
8997 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
8998 AVX10_512BIT, AVX10_1 and AVX10_1_512.
8999 * config/i386/constraints.md (Yk): Add AVX10_1.
9002 * config/i386/cpuid.h (bit_AVX10): New.
9003 (bit_AVX10_256): Ditto.
9004 (bit_AVX10_512): Ditto.
9005 * config/i386/i386-c.cc (ix86_target_macros_internal):
9006 Define AVX10_512BIT and AVX10_1.
9007 * config/i386/i386-isa.def
9008 (AVX10_512BIT): Add DEF_PTA(AVX10_512BIT).
9009 (AVX10_1): Add DEF_PTA(AVX10_1).
9010 * config/i386/i386-options.cc (isa2_opts): Add -mavx10.1.
9011 (ix86_valid_target_attribute_inner_p): Handle avx10-512bit, avx10.1
9013 (ix86_option_override_internal): Enable AVX512{F,VL,BW,DQ,CD,BF16,
9014 FP16,VBMI,VBMI2,VNNI,IFMA,BITALG,VPOPCNTDQ} features for avx10.1-512.
9015 (ix86_valid_target_attribute_inner_p): Handle AVX10_1.
9016 * config/i386/i386.cc (ix86_get_ssemov): Add AVX10_1.
9017 (ix86_conditional_register_usage): Ditto.
9018 (ix86_hard_regno_mode_ok): Ditto.
9019 (ix86_rtx_costs): Ditto.
9020 * config/i386/i386.h (VALID_MASK_AVX10_MODE): New macro.
9021 * config/i386/i386.opt: Add option -mavx10.1, -mavx10.1-256 and
9023 * doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512.
9024 * doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512.
9025 * doc/sourcebuild.texi: Document target avx10.1, avx10.1-256
9028 2023-08-17 Sergei Trofimovich <siarheit@google.com>
9030 * flag-types.h (vrp_mode): Remove unused.
9032 2023-08-17 Yanzhang Wang <yanzhang.wang@intel.com>
9034 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1): Use
9037 2023-08-17 Andrew Pinski <apinski@marvell.com>
9039 * internal-fn.def (COND_NOT): New internal function.
9040 * match.pd (UNCOND_UNARY, COND_UNARY): Add bit_not/not
9042 (`vec (a ? -1 : 0) ^ b`): New pattern to convert
9043 into conditional not.
9044 * optabs.def (cond_one_cmpl): New optab.
9045 (cond_len_one_cmpl): Likewise.
9047 2023-08-16 Surya Kumari Jangala <jskumari@linux.ibm.com>
9049 PR rtl-optimization/110254
9050 * ira-color.cc (improve_allocation): Update array
9051 allocated_hard_reg_p.
9053 2023-08-16 Vladimir N. Makarov <vmakarov@redhat.com>
9055 * lra-int.h (lra_update_fp2sp_elimination): Change the prototype.
9056 * lra-eliminations.cc (spill_pseudos): Record spilled pseudos.
9057 (lra_update_fp2sp_elimination): Ditto.
9058 (update_reg_eliminate): Adjust spill_pseudos call.
9059 * lra-spills.cc (lra_spill): Assign stack slots to pseudos spilled
9060 in lra_update_fp2sp_elimination.
9062 2023-08-16 Richard Ball <richard.ball@arm.com>
9064 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex-A720 CPU.
9065 * config/aarch64/aarch64-tune.md: Regenerate.
9066 * doc/invoke.texi: Document Cortex-A720 CPU.
9068 2023-08-16 Robin Dapp <rdapp@ventanamicro.com>
9070 * config/riscv/autovec.md (<u>avg<v_double_trunc>3_floor):
9072 (<u>avg<v_double_trunc>3_ceil): Ditto.
9073 * config/riscv/vector-iterators.md (ashiftrt): New iterator.
9076 2023-08-16 Robin Dapp <rdapp@ventanamicro.com>
9078 * internal-fn.cc (vec_extract_direct): Change type argument
9080 (expand_vec_extract_optab_fn): Call convert_optab_fn.
9081 (direct_vec_extract_optab_supported_p): Use
9082 convert_optab_supported_p.
9084 2023-08-16 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
9085 Richard Sandiford <richard.sandiford@arm.com>
9087 * fold-const.cc (INCLUDE_ALGORITHM): Add Include.
9088 (valid_mask_for_fold_vec_perm_cst_p): New function.
9089 (fold_vec_perm_cst): Likewise.
9090 (fold_vec_perm): Adjust assert and call fold_vec_perm_cst.
9091 (test_fold_vec_perm_cst): New namespace.
9092 (test_fold_vec_perm_cst::build_vec_cst_rand): New function.
9093 (test_fold_vec_perm_cst::validate_res): Likewise.
9094 (test_fold_vec_perm_cst::validate_res_vls): Likewise.
9095 (test_fold_vec_perm_cst::builder_push_elems): Likewise.
9096 (test_fold_vec_perm_cst::test_vnx4si_v4si): Likewise.
9097 (test_fold_vec_perm_cst::test_v4si_vnx4si): Likewise.
9098 (test_fold_vec_perm_cst::test_all_nunits): Likewise.
9099 (test_fold_vec_perm_cst::test_nunits_min_2): Likewise.
9100 (test_fold_vec_perm_cst::test_nunits_min_4): Likewise.
9101 (test_fold_vec_perm_cst::test_nunits_min_8): Likewise.
9102 (test_fold_vec_perm_cst::test_nunits_max_4): Likewise.
9103 (test_fold_vec_perm_cst::is_simple_vla_size): Likewise.
9104 (test_fold_vec_perm_cst::test): Likewise.
9105 (fold_const_cc_tests): Call test_fold_vec_perm_cst::test.
9107 2023-08-16 Pan Li <pan2.li@intel.com>
9109 * config/riscv/riscv-vector-builtins-bases.cc
9110 (BASE): New declaration.
9111 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9112 * config/riscv/riscv-vector-builtins-functions.def
9113 (vfwcvt_xu_frm): New intrinsic function def.
9115 2023-08-16 Pan Li <pan2.li@intel.com>
9117 * config/riscv/riscv-vector-builtins-bases.cc: Use explicit argument.
9119 2023-08-16 Pan Li <pan2.li@intel.com>
9121 * config/riscv/riscv-vector-builtins-bases.cc
9122 (BASE): New declaration.
9123 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9124 * config/riscv/riscv-vector-builtins-functions.def
9125 (vfwcvt_x_frm): New intrinsic function def.
9127 2023-08-16 Pan Li <pan2.li@intel.com>
9129 * config/riscv/riscv-vector-builtins-bases.cc (BASE): New declaration.
9130 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9131 * config/riscv/riscv-vector-builtins-functions.def
9132 (vfcvt_f_frm): New intrinsic function def.
9134 2023-08-16 Pan Li <pan2.li@intel.com>
9136 * config/riscv/riscv-vector-builtins-bases.cc
9137 (BASE): New declaration.
9138 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9139 * config/riscv/riscv-vector-builtins-functions.def
9140 (vfcvt_xu_frm): New intrinsic function def..
9142 2023-08-16 Haochen Gui <guihaoc@gcc.gnu.org>
9145 * config/rs6000/vsx.md (*vsx_extract_<mode>_store_p9): Skip vector
9146 extract when the element is 7 on BE while 8 on LE for byte or 3 on
9147 BE while 4 on LE for halfword.
9149 2023-08-16 Haochen Gui <guihaoc@gcc.gnu.org>
9152 * config/rs6000/vsx.md (expand vsx_extract_<mode>): Set it only
9154 (vsx_extract_v4si): New expand for V4SI extraction.
9155 (vsx_extract_v4si_w1): New insn pattern for V4SI extraction on
9156 word 1 from BE order.
9157 (*mfvsrwz): New insn pattern for mfvsrwz.
9158 (*vsx_extract_<mode>_di_p9): Assert that it won't be generated on
9159 word 1 from BE order.
9160 (*vsx_extract_si): Remove.
9161 (*vsx_extract_v4si_w023): New insn and split pattern on word 0, 2,
9164 2023-08-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9166 * config/riscv/autovec.md (vec_mask_len_load_lanes<mode><vsingle>):
9168 (vec_mask_len_store_lanes<mode><vsingle>): Ditto.
9169 * config/riscv/riscv-protos.h (expand_lanes_load_store): New function.
9170 * config/riscv/riscv-v.cc (get_mask_mode): Add tuple mask mode.
9171 (expand_lanes_load_store): New function.
9172 * config/riscv/vector-iterators.md: New iterator.
9174 2023-08-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9176 * internal-fn.cc (internal_load_fn_p): Apply
9177 MASK_LEN_{LOAD_LANES,STORE_LANES} into vectorizer.
9178 (internal_store_fn_p): Ditto.
9179 (internal_fn_len_index): Ditto.
9180 (internal_fn_mask_index): Ditto.
9181 (internal_fn_stored_value_index): Ditto.
9182 * tree-vect-data-refs.cc (vect_store_lanes_supported): Ditto.
9183 (vect_load_lanes_supported): Ditto.
9184 * tree-vect-loop.cc: Ditto.
9185 * tree-vect-slp.cc (vect_slp_prefer_store_lanes_p): Ditto.
9186 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
9187 (get_group_load_store_type): Ditto.
9188 (vectorizable_store): Ditto.
9189 (vectorizable_load): Ditto.
9190 * tree-vectorizer.h (vect_store_lanes_supported): Ditto.
9191 (vect_load_lanes_supported): Ditto.
9193 2023-08-16 Pan Li <pan2.li@intel.com>
9195 * config/riscv/riscv-vector-builtins-bases.cc
9196 (enum frm_op_type): New type for frm.
9197 (BASE): New declaration.
9198 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9199 * config/riscv/riscv-vector-builtins-functions.def
9200 (vfcvt_x_frm): New intrinsic function def.
9202 2023-08-16 liuhongt <hongtao.liu@intel.com>
9204 * config/i386/i386-builtins.cc
9205 (ix86_vectorize_builtin_gather): Adjust for use_gather_8parts.
9206 * config/i386/i386-options.cc (parse_mtune_ctrl_str):
9207 Set/Clear tune features use_{gather,scatter}_{2parts, 4parts,
9208 8parts} for -mtune-crtl={,^}{use_gather,use_scatter}.
9209 * config/i386/i386.cc (ix86_vectorize_builtin_scatter): Adjust
9210 for use_scatter_8parts
9211 * config/i386/i386.h (TARGET_USE_GATHER): Rename to ..
9212 (TARGET_USE_GATHER_8PARTS): .. this.
9213 (TARGET_USE_SCATTER): Rename to ..
9214 (TARGET_USE_SCATTER_8PARTS): .. this.
9215 * config/i386/x86-tune.def (X86_TUNE_USE_GATHER): Rename to
9216 (X86_TUNE_USE_GATHER_8PARTS): .. this.
9217 (X86_TUNE_USE_SCATTER): Rename to
9218 (X86_TUNE_USE_SCATTER_8PARTS): .. this.
9219 * config/i386/i386.opt: Add new options mgather, mscatter.
9221 2023-08-16 liuhongt <hongtao.liu@intel.com>
9223 * config/i386/i386-options.cc (m_GDS): New macro.
9224 * config/i386/x86-tune.def (X86_TUNE_USE_GATHER_2PARTS): Don't
9226 (X86_TUNE_USE_GATHER_4PARTS): Ditto.
9227 (X86_TUNE_USE_GATHER): Ditto.
9229 2023-08-16 liuhongt <hongtao.liu@intel.com>
9231 * config/i386/i386.md (movdf_internal): Generate vmovapd instead of
9232 vmovsd when moving DFmode between SSE_REGS.
9233 (movhi_internal): Generate vmovdqa instead of vmovsh when
9234 moving HImode between SSE_REGS.
9235 (mov<mode>_internal): Use vmovaps instead of vmovsh when
9236 moving HF/BFmode between SSE_REGS.
9238 2023-08-15 David Faust <david.faust@oracle.com>
9240 * config/bpf/bpf.md (extendsisi2): Delete useless define_insn.
9242 2023-08-15 David Faust <david.faust@oracle.com>
9245 * config/bpf/bpf.cc (bpf_print_register): Print 'w' registers
9246 for any mode 32-bits or smaller, not just SImode.
9248 2023-08-15 Martin Jambor <mjambor@suse.cz>
9252 * ipa-prop.h (ipcp_get_aggregate_const): Declare.
9253 * ipa-prop.cc (ipcp_get_aggregate_const): New function.
9254 (ipcp_transform_function): Do not deallocate transformation info.
9255 * tree-ssa-sccvn.cc: Include alloc-pool.h, symbol-summary.h and
9257 (vn_reference_lookup_2): When hitting default-def vuse, query
9258 IPA-CP transformation info for any known constants.
9260 2023-08-15 Chung-Lin Tang <cltang@codesourcery.com>
9261 Thomas Schwinge <thomas@codesourcery.com>
9263 * gimplify.cc (oacc_region_type_name): New function.
9264 (oacc_default_clause): If no 'default' clause appears on this
9265 compute construct, see if one appears on a lexically containing
9267 (gimplify_scan_omp_clauses): Upon OMP_CLAUSE_DEFAULT case, set
9268 ctx->oacc_default_clause_ctx to current context.
9270 2023-08-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9273 * config/riscv/predicates.md: Fix predicate.
9275 2023-08-15 Richard Biener <rguenther@suse.de>
9277 * tree-vect-slp.cc (vect_analyze_slp_instance): Remove
9278 slp_inst_kind_ctor handling.
9279 (vect_analyze_slp): Simplify.
9280 (vect_build_slp_instance): Dump when we analyze a CTOR.
9281 (vect_slp_check_for_constructors): Rename to ...
9282 (vect_slp_check_for_roots): ... this. Register a
9283 slp_root for CONSTRUCTORs instead of shoving them to
9284 the set of grouped stores.
9285 (vect_slp_analyze_bb_1): Adjust.
9287 2023-08-15 Richard Biener <rguenther@suse.de>
9289 * tree-vectorizer.h (_slp_instance::remain_stmts): Change
9291 (_slp_instance::remain_defs): ... this.
9292 (SLP_INSTANCE_REMAIN_STMTS): Rename to ...
9293 (SLP_INSTANCE_REMAIN_DEFS): ... this.
9294 (slp_root::remain): New.
9295 (slp_root::slp_root): Adjust.
9296 * tree-vect-slp.cc (vect_free_slp_instance): Adjust.
9297 (vect_build_slp_instance): Get extra remain parameter,
9298 adjust former handling of a cut off stmt.
9299 (vect_analyze_slp_instance): Adjust.
9300 (vect_analyze_slp): Likewise.
9301 (_bb_vec_info::~_bb_vec_info): Likewise.
9302 (vectorizable_bb_reduc_epilogue): Dump something if we fail.
9303 (vect_slp_check_for_constructors): Handle non-internal
9304 defs as remain defs of a reduction.
9305 (vectorize_slp_instance_root_stmt): Adjust.
9307 2023-08-15 Richard Biener <rguenther@suse.de>
9309 * tree-ssa-loop-ivcanon.cc: Include tree-vectorizer.h
9310 (canonicalize_loop_induction_variables): Use find_loop_location.
9312 2023-08-15 Hans-Peter Nilsson <hp@axis.com>
9315 * config/cris/cris-protos.h: Revert recent change.
9316 * config/cris/cris.cc (cris_legitimate_address_p): Remove
9317 code_helper unused parameter.
9318 (cris_legitimate_address_p_hook): New wrapper function.
9319 (TARGET_LEGITIMATE_ADDRESS_P): Change to
9320 cris_legitimate_address_p_hook.
9322 2023-08-15 Richard Biener <rguenther@suse.de>
9324 PR tree-optimization/110963
9325 * tree-ssa-pre.cc (do_pre_regular_insertion): Also insert
9326 a PHI node when the expression is available on all edges
9327 and we insert at most one copy from a constant.
9329 2023-08-15 Richard Biener <rguenther@suse.de>
9331 PR tree-optimization/110991
9332 * tree-ssa-loop-ivcanon.cc (constant_after_peeling): Handle
9333 VIEW_CONVERT_EXPR <op>, handle more simple IV-like SSA cycles
9334 that will end up constant.
9336 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
9339 * Makefile.in (RECOG_H): Add $(TREE_H) as dependence.
9341 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
9343 * tree-vect-stmts.cc (vectorizable_load): Move the handlings on
9344 VMAT_LOAD_STORE_LANES in the final loop nest to its own loop,
9345 and update the final nest accordingly.
9347 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
9349 * tree-vect-stmts.cc (vectorizable_load): Remove some useless checks
9352 2023-08-15 Pan Li <pan2.li@intel.com>
9354 * mode-switching.cc (create_pre_exit): Add SET insn check.
9356 2023-08-15 Pan Li <pan2.li@intel.com>
9358 * config/riscv/riscv-vector-builtins-bases.cc
9359 (class vfrec7_frm): New class for frm.
9360 (vfrec7_frm_obj): New declaration.
9362 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9363 * config/riscv/riscv-vector-builtins-functions.def
9364 (vfrec7_frm): New intrinsic function definition.
9365 * config/riscv/vector-iterators.md
9366 (VFMISC): Remove VFREC7.
9368 (float_insn_type): Ditto.
9369 (VFMISC_FRM): New int iterator.
9370 (misc_frm_op): New op for frm.
9371 (float_frm_insn_type): New type for frm.
9372 * config/riscv/vector.md (@pred_<misc_frm_op><mode>):
9373 New pattern for misc frm.
9375 2023-08-14 Vladimir N. Makarov <vmakarov@redhat.com>
9377 * lra-constraints.cc (curr_insn_transform): Process output stack
9378 pointer reloads before emitting reload insns.
9380 2023-08-14 benjamin priour <vultkayn@gcc.gnu.org>
9383 * doc/invoke.texi: Add documentation of
9384 fanalyzer-show-events-in-system-headers
9386 2023-08-14 Jan Hubicka <jh@suse.cz>
9388 PR gcov-profile/110988
9389 * tree-cfg.cc (fold_loop_internal_call): Avoid division by zero.
9391 2023-08-14 Jiawei <jiawei@iscas.ac.cn>
9393 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins):
9394 Enable compressed builtins when ZC* extensions enabled.
9395 * config/riscv/riscv-shorten-memrefs.cc:
9396 Enable shorten_memrefs pass when ZC* extensions enabled.
9397 * config/riscv/riscv.cc (riscv_compressed_reg_p):
9398 Enable compressible registers when ZC* extensions enabled.
9399 (riscv_rtx_costs): Allow adjusting rtx costs when ZC* extensions enabled.
9400 (riscv_address_cost): Allow adjusting address cost when ZC* extensions enabled.
9401 (riscv_first_stack_step): Allow compression of the register saves
9402 without adding extra instructions.
9403 * config/riscv/riscv.h (FUNCTION_BOUNDARY): Adjusts function boundary
9404 to 16 bits when ZC* extensions enabled.
9406 2023-08-14 Jiawei <jiawei@iscas.ac.cn>
9408 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse): New extensions.
9409 * config/riscv/riscv-opts.h (MASK_ZCA): New mask.
9416 (TARGET_ZCA): New target.
9417 (TARGET_ZCB): Ditto.
9418 (TARGET_ZCE): Ditto.
9419 (TARGET_ZCF): Ditto.
9420 (TARGET_ZCD): Ditto.
9421 (TARGET_ZCMP): Ditto.
9422 (TARGET_ZCMT): Ditto.
9423 * config/riscv/riscv.opt: New target variable.
9425 2023-08-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9428 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
9430 * genrecog.cc (print_nonbool_test): Fix type error of
9431 switch (SUBREG_BYTE (op))'.
9433 2023-08-14 Richard Biener <rguenther@suse.de>
9435 * tree-cfg.cc (print_loop_info): Dump to 'file', not 'dump_file'.
9437 2023-08-14 Pan Li <pan2.li@intel.com>
9439 * config/riscv/riscv-vector-builtins-bases.cc
9440 (class unop_frm): New class for frm.
9441 (vfsqrt_frm_obj): New declaration.
9443 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9444 * config/riscv/riscv-vector-builtins-functions.def
9445 (vfsqrt_frm): New intrinsic function definition.
9447 2023-08-14 Pan Li <pan2.li@intel.com>
9449 * config/riscv/riscv-vector-builtins-bases.cc
9450 (class vfwnmsac_frm): New class for frm.
9451 (vfwnmsac_frm_obj): New declaration.
9453 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9454 * config/riscv/riscv-vector-builtins-functions.def
9455 (vfwnmsac_frm): New intrinsic function definition.
9457 2023-08-14 Pan Li <pan2.li@intel.com>
9459 * config/riscv/riscv-vector-builtins-bases.cc
9460 (class vfwmsac_frm): New class for frm.
9461 (vfwmsac_frm_obj): New declaration.
9463 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9464 * config/riscv/riscv-vector-builtins-functions.def
9465 (vfwmsac_frm): New intrinsic function definition.
9467 2023-08-14 Pan Li <pan2.li@intel.com>
9469 * config/riscv/riscv-vector-builtins-bases.cc
9470 (class vfwnmacc_frm): New class for frm.
9471 (vfwnmacc_frm_obj): New declaration.
9473 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9474 * config/riscv/riscv-vector-builtins-functions.def
9475 (vfwnmacc_frm): New intrinsic function definition.
9477 2023-08-14 Cui, Lili <lili.cui@intel.com>
9479 * common/config/i386/cpuinfo.h (get_intel_cpu): Add model value 0xba
9482 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
9484 * config/mmix/predicates.md (mmix_address_operand): Use
9485 lra_in_progress, not reload_in_progress.
9487 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
9489 * config/mmix/mmix.cc: Re-enable LRA.
9491 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
9493 * config/mmix/predicates.md (frame_pointer_operand): Handle FP+offset
9494 when lra_in_progress.
9496 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
9498 * config/mmix/mmix.cc: Disable LRA for MMIX.
9500 2023-08-14 Pan Li <pan2.li@intel.com>
9502 * config/riscv/riscv-vector-builtins-bases.cc
9503 (class vfwmacc_frm): New class for vfwmacc frm.
9504 (vfwmacc_frm_obj): New declaration.
9506 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9507 * config/riscv/riscv-vector-builtins-functions.def
9508 (vfwmacc_frm): Function definition for vfwmacc.
9509 * config/riscv/riscv-vector-builtins.cc
9510 (function_expander::use_widen_ternop_insn): Add frm support.
9512 2023-08-14 Pan Li <pan2.li@intel.com>
9514 * config/riscv/riscv-vector-builtins-bases.cc
9515 (class vfnmsub_frm): New class for vfnmsub frm.
9516 (vfnmsub_frm): New declaration.
9518 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9519 * config/riscv/riscv-vector-builtins-functions.def
9520 (vfnmsub_frm): New function declaration.
9522 2023-08-14 Vladimir N. Makarov <vmakarov@redhat.com>
9524 * lra-constraints.cc (curr_insn_transform): Set done_p up and
9525 check it on true after processing output stack pointer reload.
9527 2023-08-12 Jakub Jelinek <jakub@redhat.com>
9529 * Makefile.in (USER_H): Add stdckdint.h.
9530 * ginclude/stdckdint.h: New file.
9532 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9535 * config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): Add TARGET_VETOR.
9537 2023-08-12 Patrick Palka <ppalka@redhat.com>
9539 * tree-pretty-print.cc (dump_generic_node) <case TREE_VEC>:
9540 Delimit output with braces.
9542 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9545 * config/riscv/riscv-v.cc (expand_vec_series): Refactor the expander.
9547 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9549 * config/riscv/autovec.md: Add VLS CONST_VECTOR.
9550 * config/riscv/riscv.cc (riscv_const_insns): Ditto.
9551 * config/riscv/vector.md: Ditto.
9553 2023-08-11 David Malcolm <dmalcolm@redhat.com>
9556 * doc/analyzer.texi (__analyzer_get_strlen): New.
9557 * doc/invoke.texi: Add -Wanalyzer-unterminated-string.
9559 2023-08-11 Jeff Law <jlaw@ventanamicro.com>
9561 * config/rx/rx.md (subdi3): Fix test for borrow.
9563 2023-08-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9565 PR middle-end/110989
9566 * tree-vect-stmts.cc (vectorizable_store): Replace iv_type with sizetype.
9567 (vectorizable_load): Ditto.
9569 2023-08-11 Jose E. Marchesi <jose.marchesi@oracle.com>
9571 * config/bpf/bpf.md (allocate_stack): Define.
9572 * config/bpf/bpf.h (FIRST_PSEUDO_REGISTER): Make room for fake
9573 stack pointer register.
9574 (FIXED_REGISTERS): Adjust accordingly.
9575 (CALL_USED_REGISTERS): Likewise.
9576 (REG_CLASS_CONTENTS): Likewise.
9577 (REGISTER_NAMES): Likewise.
9578 * config/bpf/bpf.cc (bpf_compute_frame_layout): Do not reserve
9579 space for callee-saved registers.
9580 (bpf_expand_prologue): Do not save callee-saved registers in xbpf.
9581 (bpf_expand_epilogue): Do not restore callee-saved registers in
9584 2023-08-11 Jose E. Marchesi <jose.marchesi@oracle.com>
9586 * config/bpf/bpf.cc (bpf_function_arg_advance): Do not complain
9587 about too many arguments if function is always inlined.
9589 2023-08-11 Patrick Palka <ppalka@redhat.com>
9591 * tree-pretty-print.cc (dump_generic_node) <case COMPONENT_REF>:
9592 Don't call component_ref_field_offset if the RHS isn't a decl.
9594 2023-08-11 John David Anglin <danglin@gcc.gnu.org>
9597 * gensupport.cc(class conlist): Use strtol instead of std::stoi.
9599 2023-08-11 Vladimir N. Makarov <vmakarov@redhat.com>
9601 * lra-constraints.cc (goal_alt_out_sp_reload_p): New flag.
9602 (process_alt_operands): Set the flag.
9603 (curr_insn_transform): Modify stack pointer offsets if output
9604 stack pointer reload is generated.
9606 2023-08-11 Joseph Myers <joseph@codesourcery.com>
9608 * configure: Regenerate.
9610 2023-08-11 Richard Biener <rguenther@suse.de>
9612 PR tree-optimization/110979
9613 * tree-vect-loop.cc (vectorizable_reduction): For
9614 FOLD_LEFT_REDUCTION without target support make sure
9615 we don't need to honor signed zeros and sign dependent rounding.
9617 2023-08-11 Richard Biener <rguenther@suse.de>
9619 * tree-vect-slp.cc (vect_slp_region): Provide opt-info for all SLP
9620 subgraph entries. Dump the used vector size based on the
9621 SLP subgraph entry root vector type.
9623 2023-08-11 Pan Li <pan2.li@intel.com>
9625 * config/riscv/riscv-vector-builtins-bases.cc
9626 (class vfmsub_frm): New class for vfmsub frm.
9627 (vfmsub_frm): New declaration.
9629 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9630 * config/riscv/riscv-vector-builtins-functions.def
9631 (vfmsub_frm): New function declaration.
9633 2023-08-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9635 * doc/md.texi: Add vec_mask_len_{load_lanes,store_lanes} patterns.
9636 * internal-fn.cc (expand_partial_load_optab_fn): Ditto.
9637 (expand_partial_store_optab_fn): Ditto.
9638 * internal-fn.def (MASK_LEN_LOAD_LANES): Ditto.
9639 (MASK_LEN_STORE_LANES): Ditto.
9640 * optabs.def (OPTAB_CD): Ditto.
9642 2023-08-11 Pan Li <pan2.li@intel.com>
9644 * config/riscv/riscv-vector-builtins-bases.cc
9645 (class vfnmadd_frm): New class for vfnmadd frm.
9646 (vfnmadd_frm): New declaration.
9648 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9649 * config/riscv/riscv-vector-builtins-functions.def
9650 (vfnmadd_frm): New function declaration.
9652 2023-08-11 Drew Ross <drross@redhat.com>
9653 Jakub Jelinek <jakub@redhat.com>
9655 PR tree-optimization/109938
9656 * match.pd (((x ^ y) & z) | x -> (z & y) | x): New simplification.
9658 2023-08-11 Pan Li <pan2.li@intel.com>
9660 * config/riscv/riscv-vector-builtins-bases.cc
9661 (class vfmadd_frm): New class for vfmadd frm.
9662 (vfmadd_frm_obj): New declaration.
9664 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9665 * config/riscv/riscv-vector-builtins-functions.def
9666 (vfmadd_frm): New function definition.
9668 2023-08-11 Pan Li <pan2.li@intel.com>
9670 * config/riscv/riscv-vector-builtins-bases.cc
9671 (class vfnmsac_frm): New class for vfnmsac frm.
9672 (vfnmsac_frm_obj): New declaration.
9674 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9675 * config/riscv/riscv-vector-builtins-functions.def
9676 (vfnmsac_frm): New function definition.
9678 2023-08-11 Jakub Jelinek <jakub@redhat.com>
9680 * doc/extend.texi (Typeof): Document typeof_unqual
9681 and __typeof_unqual__.
9683 2023-08-11 Andrew Pinski <apinski@marvell.com>
9685 PR tree-optimization/110954
9686 * generic-match-head.cc (bitwise_inverted_equal_p): Add
9687 wascmp argument and set it accordingly.
9688 * gimple-match-head.cc (bitwise_inverted_equal_p): Add
9689 wascmp argument to the macro.
9690 (gimple_bitwise_inverted_equal_p): Add
9691 wascmp argument and set it accordingly.
9692 * match.pd (`a & ~a`, `a ^| ~a`): Update call
9693 to bitwise_inverted_equal_p and handle wascmp case.
9694 (`(~x | y) & x`, `(~x | y) & x`, `a?~t:t`): Update
9695 call to bitwise_inverted_equal_p and check to see
9696 if was !wascmp or if precision was 1.
9698 2023-08-11 Martin Uecker <uecker@tugraz.at>
9701 * doc/invoke.texi: Update.
9703 2023-08-11 Pan Li <pan2.li@intel.com>
9705 * config/riscv/riscv-vector-builtins-bases.cc
9706 (class vfmsac_frm): New class for vfmsac frm.
9707 (vfmsac_frm_obj): New declaration.
9709 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9710 * config/riscv/riscv-vector-builtins-functions.def
9711 (vfmsac_frm): New function definition
9713 2023-08-10 Jan Hubicka <jh@suse.cz>
9715 PR middle-end/110923
9716 * tree-ssa-loop-split.cc (split_loop): Watch for division by zero.
9718 2023-08-10 Patrick O'Neill <patrick@rivosinc.com>
9720 * common/config/riscv/riscv-common.cc: Add Ztso and mark Ztso as
9721 dependent on 'a' extension.
9722 * config/riscv/riscv-opts.h (MASK_ZTSO): New mask.
9723 (TARGET_ZTSO): New target.
9724 * config/riscv/riscv.cc (riscv_memmodel_needs_amo_acquire): Add
9726 (riscv_memmodel_needs_amo_release): Add Ztso case.
9727 (riscv_print_operand): Add Ztso case for LR/SC annotations.
9728 * config/riscv/riscv.md: Import sync-rvwmo.md and sync-ztso.md.
9729 * config/riscv/riscv.opt: Add Ztso target variable.
9730 * config/riscv/sync.md (mem_thread_fence_1): Expand to RVWMO or
9732 (atomic_load<mode>): Expand to RVWMO or Ztso specific insn.
9733 (atomic_store<mode>): Expand to RVWMO or Ztso specific insn.
9734 * config/riscv/sync-rvwmo.md: New file. Seperate out RVWMO
9735 specific load/store/fence mappings.
9736 * config/riscv/sync-ztso.md: New file. Seperate out Ztso
9737 specific load/store/fence mappings.
9739 2023-08-10 Jan Hubicka <jh@suse.cz>
9741 * cfgloopmanip.cc (duplicate_loop_body_to_header_edge): Special case loops with
9744 2023-08-10 Jan Hubicka <jh@suse.cz>
9746 * tree-ssa-threadupdate.cc (ssa_fix_duplicate_block_edges): Fix profile update.
9748 2023-08-10 Jan Hubicka <jh@suse.cz>
9750 * profile-count.cc (profile_count::differs_from_p): Fix overflow and
9751 handling of undefined values.
9753 2023-08-10 Jakub Jelinek <jakub@redhat.com>
9756 * tree-ssa-phiopt.cc (single_non_singleton_phi_for_edges): Never
9757 return virtual phis and return NULL if there is a virtual phi
9758 where the arguments from E0 and E1 edges aren't equal.
9760 2023-08-10 Richard Biener <rguenther@suse.de>
9762 * internal-fn.def (VCOND, VCONDU, VCONDEQ, VCOND_MASK,
9763 VEC_SET, VEC_EXTRACT): Make ECF_CONST | ECF_NOTHROW.
9765 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9768 * config/riscv/autovec.md (vec_duplicate<mode>): New pattern.
9770 2023-08-10 Pan Li <pan2.li@intel.com>
9772 * config/riscv/riscv-vector-builtins-bases.cc
9773 (class vfnmacc_frm): New class for vfnmacc.
9774 (vfnmacc_frm_obj): New declaration.
9776 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9777 * config/riscv/riscv-vector-builtins-functions.def
9778 (vfnmacc_frm): New function definition.
9780 2023-08-10 Pan Li <pan2.li@intel.com>
9782 * config/riscv/riscv-vector-builtins-bases.cc
9783 (class vfmacc_frm): New class for vfmacc frm.
9784 (vfmacc_frm_obj): New declaration.
9786 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9787 * config/riscv/riscv-vector-builtins-functions.def
9788 (vfmacc_frm): New function definition.
9790 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9793 * config/riscv/riscv-v.cc (expand_cond_len_ternop): Add integer ternary.
9795 2023-08-10 Richard Biener <rguenther@suse.de>
9797 * tree-vectorizer.h (vectorizable_live_operation): Remove
9798 gimple_stmt_iterator * argument.
9799 * tree-vect-loop.cc (vectorizable_live_operation): Likewise.
9800 Adjust plumbing around vect_get_loop_mask.
9801 (vect_analyze_loop_operations): Adjust.
9802 * tree-vect-slp.cc (vect_slp_analyze_node_operations_1): Likewise.
9803 (vect_bb_slp_mark_live_stmts): Likewise.
9804 (vect_schedule_slp_node): Likewise.
9805 * tree-vect-stmts.cc (can_vectorize_live_stmts): Likewise.
9806 Remove gimple_stmt_iterator * argument.
9807 (vect_transform_stmt): Adjust.
9809 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9811 * config/riscv/vector-iterators.md: Add missing modes.
9813 2023-08-10 Jakub Jelinek <jakub@redhat.com>
9816 * lto-streamer-in.cc (lto_input_tree_1): Assert TYPE_PRECISION
9817 is up to WIDE_INT_MAX_PRECISION rather than MAX_BITSIZE_MODE_ANY_INT.
9819 2023-08-10 Jakub Jelinek <jakub@redhat.com>
9822 * expr.cc (expand_expr_real_1) <case MEM_REF>: Add an early return for
9823 EXPAND_WRITE or EXPAND_MEMORY modifiers to avoid testing it multiple
9826 2023-08-10 liuhongt <hongtao.liu@intel.com>
9829 * config/i386/mmx.md: (movq_<mode>_to_sse): Also do not
9830 sanitize upper part of V4HFmode register with
9832 (<insn>v4hf3): Enable for ix86_partial_vec_fp_math.
9834 (<insn>v2hf3): Ditto.
9836 (movd_v2hf_to_sse): Do not sanitize upper part of V2HFmode
9837 register with -fno-trapping-math.
9839 2023-08-10 Pan Li <pan2.li@intel.com>
9840 Kito Cheng <kito.cheng@sifive.com>
9842 * config/riscv/riscv-protos.h
9843 (enum floating_point_rounding_mode): Add NONE, DYN_EXIT and DYN_CALL.
9844 (get_frm_mode): New declaration.
9845 * config/riscv/riscv-v.cc (get_frm_mode): New function to get frm mode.
9846 * config/riscv/riscv-vector-builtins.cc
9847 (function_expander::use_ternop_insn): Take care of frm reg.
9848 * config/riscv/riscv.cc (riscv_static_frm_mode_p): Migrate to FRM_XXX.
9849 (riscv_emit_frm_mode_set): Ditto.
9850 (riscv_emit_mode_set): Ditto.
9851 (riscv_frm_adjust_mode_after_call): Ditto.
9852 (riscv_frm_mode_needed): Ditto.
9853 (riscv_frm_mode_after): Ditto.
9854 (riscv_mode_entry): Ditto.
9855 (riscv_mode_exit): Ditto.
9856 * config/riscv/riscv.h (NUM_MODES_FOR_MODE_SWITCHING): Ditto.
9857 * config/riscv/vector.md
9858 (rne,rtz,rdn,rup,rmm,dyn,dyn_exit,dyn_call,none): Removed
9859 (symbol_ref): * config/riscv/vector.md: Set frm_mode attr explicitly.
9861 2023-08-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9863 * config/riscv/riscv-vsetvl.cc (anticipatable_occurrence_p): Fix
9864 incorrect anticipate info.
9866 2023-08-09 Tsukasa OI <research_trasio@irq.a4lg.com>
9868 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
9869 Remove 'Zve32d' from the version list.
9871 2023-08-09 Jin Ma <jinma@linux.alibaba.com>
9873 * config/riscv/riscv.cc (riscv_sched_variable_issue): New function.
9874 (TARGET_SCHED_VARIABLE_ISSUE): New macro.
9875 Co-authored-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
9876 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
9878 2023-08-09 Jivan Hakobyan <jivanhakobyan9@gmail.com>
9880 * config/riscv/riscv.cc (riscv_legitimize_address): Handle folding.
9881 (mem_shadd_or_shadd_rtx_p): New function.
9883 2023-08-09 Andrew Pinski <apinski@marvell.com>
9885 PR tree-optimization/110937
9886 PR tree-optimization/100798
9887 * match.pd (`a ? ~b : b`): Handle this
9890 2023-08-09 Uros Bizjak <ubizjak@gmail.com>
9892 * config/i386/i386.opt (mpartial-vector-fp-math): Add dot.
9894 2023-08-09 Richard Ball <richard.ball@arm.com>
9896 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex-A520 CPU.
9897 * config/aarch64/aarch64-tune.md: Regenerate.
9898 * doc/invoke.texi: Document Cortex-A520 CPU.
9900 2023-08-09 Carl Love <cel@us.ibm.com>
9902 * config/rs6000/rs6000-builtins.def (vcmpneb, vcmpneh, vcmpnew):
9903 Move definitions to Altivec stanza.
9904 * config/rs6000/altivec.md (vcmpneb, vcmpneh, vcmpnew): New
9907 2023-08-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9910 * config/riscv/riscv-v.cc (expand_const_vector): Add NPATTERNS = 1
9911 stepped vector support.
9913 2023-08-09 liuhongt <hongtao.liu@intel.com>
9915 * common/config/i386/cpuinfo.h (get_available_features):
9916 Rename local variable subleaf_level to max_subleaf_level.
9918 2023-08-09 Richard Biener <rguenther@suse.de>
9920 PR rtl-optimization/110587
9921 * lra-assigns.cc (find_hard_regno_for_1): Re-order checks.
9923 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
9925 PR tree-optimization/110248
9926 * config/rs6000/rs6000.cc (rs6000_legitimate_address_p): Check if
9927 the given code is for ifn LEN_{LOAD,STORE}, if yes then make it not
9928 legitimate when outer code is PLUS.
9930 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
9932 PR tree-optimization/110248
9933 * recog.cc (memory_address_addr_space_p): Add one more argument ch of
9934 type code_helper and pass it to targetm.addr_space.legitimate_address_p
9935 instead of ERROR_MARK.
9936 (offsettable_address_addr_space_p): Update one function pointer with
9937 one more argument of type code_helper as its assignees
9938 memory_address_addr_space_p and strict_memory_address_addr_space_p
9939 have been adjusted, and adjust some call sites with ERROR_MARK.
9940 * recog.h (tree.h): New include header file for tree_code ERROR_MARK.
9941 (memory_address_addr_space_p): Adjust with one more unnamed argument
9942 of type code_helper with default ERROR_MARK.
9943 (strict_memory_address_addr_space_p): Likewise.
9944 * reload.cc (strict_memory_address_addr_space_p): Add one unnamed
9945 argument of type code_helper.
9946 * tree-ssa-address.cc (valid_mem_ref_p): Add one more argument ch of
9947 type code_helper and pass it to memory_address_addr_space_p.
9948 * tree-ssa-address.h (valid_mem_ref_p): Adjust the declaration with
9949 one more unnamed argument of type code_helper with default value
9951 * tree-ssa-loop-ivopts.cc (get_address_cost): Use ERROR_MARK as code
9952 by default, change it with ifn code for USE_PTR_ADDRESS type use, and
9953 pass it to all valid_mem_ref_p calls.
9955 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
9957 PR tree-optimization/110248
9958 * coretypes.h (class code_helper): Add forward declaration.
9959 * doc/tm.texi: Regenerate.
9960 * lra-constraints.cc (valid_address_p): Call target hook
9961 targetm.addr_space.legitimate_address_p with an extra parameter
9962 ERROR_MARK as its prototype changes.
9963 * recog.cc (memory_address_addr_space_p): Likewise.
9964 * reload.cc (strict_memory_address_addr_space_p): Likewise.
9965 * target.def (legitimate_address_p, addr_space.legitimate_address_p):
9966 Extend with one more argument of type code_helper, update the
9967 documentation accordingly.
9968 * targhooks.cc (default_legitimate_address_p): Adjust for the
9969 new code_helper argument.
9970 (default_addr_space_legitimate_address_p): Likewise.
9971 * targhooks.h (default_legitimate_address_p): Likewise.
9972 (default_addr_space_legitimate_address_p): Likewise.
9973 * config/aarch64/aarch64.cc (aarch64_legitimate_address_hook_p): Adjust
9974 with extra unnamed code_helper argument with default ERROR_MARK.
9975 * config/alpha/alpha.cc (alpha_legitimate_address_p): Likewise.
9976 * config/arc/arc.cc (arc_legitimate_address_p): Likewise.
9977 * config/arm/arm-protos.h (arm_legitimate_address_p): Likewise.
9978 (tree.h): New include for tree_code ERROR_MARK.
9979 * config/arm/arm.cc (arm_legitimate_address_p): Adjust with extra
9980 unnamed code_helper argument with default ERROR_MARK.
9981 * config/avr/avr.cc (avr_addr_space_legitimate_address_p): Likewise.
9982 * config/bfin/bfin.cc (bfin_legitimate_address_p): Likewise.
9983 * config/bpf/bpf.cc (bpf_legitimate_address_p): Likewise.
9984 * config/c6x/c6x.cc (c6x_legitimate_address_p): Likewise.
9985 * config/cris/cris-protos.h (cris_legitimate_address_p): Likewise.
9986 (tree.h): New include for tree_code ERROR_MARK.
9987 * config/cris/cris.cc (cris_legitimate_address_p): Adjust with extra
9988 unnamed code_helper argument with default ERROR_MARK.
9989 * config/csky/csky.cc (csky_legitimate_address_p): Likewise.
9990 * config/epiphany/epiphany.cc (epiphany_legitimate_address_p):
9992 * config/frv/frv.cc (frv_legitimate_address_p): Likewise.
9993 * config/ft32/ft32.cc (ft32_addr_space_legitimate_address_p): Likewise.
9994 * config/gcn/gcn.cc (gcn_addr_space_legitimate_address_p): Likewise.
9995 * config/h8300/h8300.cc (h8300_legitimate_address_p): Likewise.
9996 * config/i386/i386.cc (ix86_legitimate_address_p): Likewise.
9997 * config/ia64/ia64.cc (ia64_legitimate_address_p): Likewise.
9998 * config/iq2000/iq2000.cc (iq2000_legitimate_address_p): Likewise.
9999 * config/lm32/lm32.cc (lm32_legitimate_address_p): Likewise.
10000 * config/loongarch/loongarch.cc (loongarch_legitimate_address_p):
10002 * config/m32c/m32c.cc (m32c_legitimate_address_p): Likewise.
10003 (m32c_addr_space_legitimate_address_p): Likewise.
10004 * config/m32r/m32r.cc (m32r_legitimate_address_p): Likewise.
10005 * config/m68k/m68k.cc (m68k_legitimate_address_p): Likewise.
10006 * config/mcore/mcore.cc (mcore_legitimate_address_p): Likewise.
10007 * config/microblaze/microblaze-protos.h (tree.h): New include for
10008 tree_code ERROR_MARK.
10009 (microblaze_legitimate_address_p): Adjust with extra unnamed
10010 code_helper argument with default ERROR_MARK.
10011 * config/microblaze/microblaze.cc (microblaze_legitimate_address_p):
10013 * config/mips/mips.cc (mips_legitimate_address_p): Likewise.
10014 * config/mmix/mmix.cc (mmix_legitimate_address_p): Likewise.
10015 * config/mn10300/mn10300.cc (mn10300_legitimate_address_p): Likewise.
10016 * config/moxie/moxie.cc (moxie_legitimate_address_p): Likewise.
10017 * config/msp430/msp430.cc (msp430_legitimate_address_p): Likewise.
10018 (msp430_addr_space_legitimate_address_p): Adjust with extra code_helper
10019 argument with default ERROR_MARK and adjust the call to function
10020 msp430_legitimate_address_p.
10021 * config/nds32/nds32.cc (nds32_legitimate_address_p): Adjust with extra
10022 unnamed code_helper argument with default ERROR_MARK.
10023 * config/nios2/nios2.cc (nios2_legitimate_address_p): Likewise.
10024 * config/nvptx/nvptx.cc (nvptx_legitimate_address_p): Likewise.
10025 * config/or1k/or1k.cc (or1k_legitimate_address_p): Likewise.
10026 * config/pa/pa.cc (pa_legitimate_address_p): Likewise.
10027 * config/pdp11/pdp11.cc (pdp11_legitimate_address_p): Likewise.
10028 * config/pru/pru.cc (pru_addr_space_legitimate_address_p): Likewise.
10029 * config/riscv/riscv.cc (riscv_legitimate_address_p): Likewise.
10030 * config/rl78/rl78-protos.h (rl78_as_legitimate_address): Likewise.
10031 (tree.h): New include for tree_code ERROR_MARK.
10032 * config/rl78/rl78.cc (rl78_as_legitimate_address): Adjust with
10033 extra unnamed code_helper argument with default ERROR_MARK.
10034 * config/rs6000/rs6000.cc (rs6000_legitimate_address_p): Likewise.
10035 (rs6000_debug_legitimate_address_p): Adjust with extra code_helper
10036 argument and adjust the call to function rs6000_legitimate_address_p.
10037 * config/rx/rx.cc (rx_is_legitimate_address): Adjust with extra
10038 unnamed code_helper argument with default ERROR_MARK.
10039 * config/s390/s390.cc (s390_legitimate_address_p): Likewise.
10040 * config/sh/sh.cc (sh_legitimate_address_p): Likewise.
10041 * config/sparc/sparc.cc (sparc_legitimate_address_p): Likewise.
10042 * config/v850/v850.cc (v850_legitimate_address_p): Likewise.
10043 * config/vax/vax.cc (vax_legitimate_address_p): Likewise.
10044 * config/visium/visium.cc (visium_legitimate_address_p): Likewise.
10045 * config/xtensa/xtensa.cc (xtensa_legitimate_address_p): Likewise.
10046 * config/stormy16/stormy16-protos.h (xstormy16_legitimate_address_p):
10048 (tree.h): New include for tree_code ERROR_MARK.
10049 * config/stormy16/stormy16.cc (xstormy16_legitimate_address_p):
10050 Adjust with extra unnamed code_helper argument with default
10053 2023-08-09 liuhongt <hongtao.liu@intel.com>
10055 * common/config/i386/cpuinfo.h (get_available_features): Check
10056 EAX for valid subleaf before use CPUID.
10058 2023-08-08 Jeff Law <jlaw@ventanamicro.com>
10060 * config/riscv/riscv.cc (riscv_expand_conditional_move): Use word_mode
10061 for the temporary when canonicalizing the condition.
10063 2023-08-08 Cupertino Miranda <cupertino.miranda@oracle.com>
10065 * config/bpf/core-builtins.cc: Cleaned include headers.
10066 (struct cr_builtins): Added GTY.
10067 (cr_builtins_ref): Created.
10068 (builtins_data) Changed to GC root.
10069 (allocate_builtin_data): Changed.
10070 Included gt-core-builtins.h.
10071 * config/bpf/coreout.cc: (bpf_core_extra) Added GTY.
10072 (bpf_core_extra_ref): Created.
10073 (bpf_comment_info): Changed to GC root.
10074 (bpf_core_reloc_add, output_btfext_header, btf_ext_init): Changed.
10076 2023-08-08 Uros Bizjak <ubizjak@gmail.com>
10079 * config/i386/i386.opt (mpartial-vector-fp-math): New option.
10080 * config/i386/mmx.md (movq_<mode>_to_sse): Do not sanitize
10081 upper part of V2SFmode register with -fno-trapping-math.
10082 (<plusminusmult:insn>v2sf3): Enable for ix86_partial_vec_fp_math.
10084 (<smaxmin:code>v2sf3): Ditto.
10085 (sqrtv2sf2): Ditto.
10086 (*mmx_haddv2sf3_low): Ditto.
10087 (*mmx_hsubv2sf3_low): Ditto.
10088 (vec_addsubv2sf3): Ditto.
10089 (vec_cmpv2sfv2si): Ditto.
10090 (vcond<V2FI:mode>v2sf): Ditto.
10093 (fnmav2sf4): Ditto.
10094 (fnmsv2sf4): Ditto.
10095 (fix_truncv2sfv2si2): Ditto.
10096 (fixuns_truncv2sfv2si2): Ditto.
10097 (floatv2siv2sf2): Ditto.
10098 (floatunsv2siv2sf2): Ditto.
10099 (nearbyintv2sf2): Ditto.
10100 (rintv2sf2): Ditto.
10101 (lrintv2sfv2si2): Ditto.
10102 (ceilv2sf2): Ditto.
10103 (lceilv2sfv2si2): Ditto.
10104 (floorv2sf2): Ditto.
10105 (lfloorv2sfv2si2): Ditto.
10106 (btruncv2sf2): Ditto.
10107 (roundv2sf2): Ditto.
10108 (lroundv2sfv2si2): Ditto.
10109 * doc/invoke.texi (x86 Options): Document
10110 -mpartial-vector-fp-math option.
10112 2023-08-08 Andrew Pinski <apinski@marvell.com>
10114 PR tree-optimization/103281
10115 PR tree-optimization/28794
10116 * vr-values.cc (simplify_using_ranges::simplify_cond_using_ranges_1): Split out
10118 (simplify_using_ranges::simplify_compare_using_ranges_1): Here.
10119 (simplify_using_ranges::simplify_casted_cond): Rename to ...
10120 (simplify_using_ranges::simplify_casted_compare): This
10121 and change arguments to take op0 and op1.
10122 (simplify_using_ranges::simplify_compare_assign_using_ranges_1): New method.
10123 (simplify_using_ranges::simplify): For tcc_comparison assignments call
10124 simplify_compare_assign_using_ranges_1.
10125 * vr-values.h (simplify_using_ranges): Add
10126 new methods, simplify_compare_using_ranges_1 and simplify_compare_assign_using_ranges_1.
10127 Rename simplify_casted_cond and simplify_casted_compare and
10128 update argument types.
10130 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
10132 * genmatch.cc: Log line numbers indirectly.
10134 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
10136 * genmatch.cc: Make sinfo map ordered.
10137 * Makefile.in: Require the ordered map header for genmatch.o.
10139 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
10141 * ordered-hash-map.h: Add get_or_insert.
10142 * ordered-hash-map-tests.cc: Use get_or_insert in tests.
10144 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10146 * config/riscv/autovec.md (cond_<optab><mode>): New pattern.
10147 (cond_len_<optab><mode>): Ditto.
10148 (cond_fma<mode>): Ditto.
10149 (cond_len_fma<mode>): Ditto.
10150 (cond_fnma<mode>): Ditto.
10151 (cond_len_fnma<mode>): Ditto.
10152 (cond_fms<mode>): Ditto.
10153 (cond_len_fms<mode>): Ditto.
10154 (cond_fnms<mode>): Ditto.
10155 (cond_len_fnms<mode>): Ditto.
10156 * config/riscv/riscv-protos.h (riscv_get_v_regno_alignment): Export
10158 (enum insn_type): Add new enum type.
10159 (prepare_ternary_operands): New function.
10160 * config/riscv/riscv-v.cc (emit_vlmax_masked_fp_mu_insn): Ditto.
10161 (emit_nonvlmax_tumu_insn): Ditto.
10162 (emit_nonvlmax_fp_tumu_insn): Ditto.
10163 (expand_cond_len_binop): Add condtional operations.
10164 (expand_cond_len_ternop): Ditto.
10165 (prepare_ternary_operands): New function.
10166 * config/riscv/riscv.cc (riscv_memmodel_needs_amo_release): Export
10167 riscv_get_v_regno_alignment as global scope.
10168 * config/riscv/vector.md: Fix ternary bugs.
10170 2023-08-08 Richard Biener <rguenther@suse.de>
10172 PR tree-optimization/49955
10173 * tree-vectorizer.h (_slp_instance::remain_stmts): New.
10174 (SLP_INSTANCE_REMAIN_STMTS): Likewise.
10175 * tree-vect-slp.cc (vect_free_slp_instance): Release
10176 SLP_INSTANCE_REMAIN_STMTS.
10177 (vect_build_slp_instance): Make the number of lanes of
10178 a BB reduction even.
10179 (vectorize_slp_instance_root_stmt): Handle unvectorized
10180 defs of a BB reduction.
10182 2023-08-08 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
10184 * internal-fn.cc (get_len_internal_fn): New function.
10185 (DEF_INTERNAL_COND_FN): Ditto.
10186 (DEF_INTERNAL_SIGNED_COND_FN): Ditto.
10187 * internal-fn.h (get_len_internal_fn): Ditto.
10188 * tree-vect-stmts.cc (vectorizable_call): Add CALL auto-vectorization.
10190 2023-08-08 Richard Biener <rguenther@suse.de>
10192 PR tree-optimization/110924
10193 * tree-ssa-live.h (virtual_operand_live): Update comment.
10194 * tree-ssa-live.cc (virtual_operand_live::get_live_in): Remove
10195 optimization, look at each predecessor.
10196 * tree-ssa-sink.cc (pass_sink_code::execute): Mark backedges.
10198 2023-08-08 yulong <shiyulong@iscas.ac.cn>
10200 * config/riscv/riscv-v.cc (slide1_sew64_helper): Modify.
10202 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10204 * config/riscv/autovec-vls.md (<optab><mode>2): Add VLS neg.
10205 * config/riscv/vector.md: Ditto.
10207 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10209 * config/riscv/autovec.md: Add VLS shift.
10211 2023-08-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10213 * config/riscv/autovec-vls.md (<optab><mode>3): Add VLS modes.
10214 * config/riscv/vector-iterators.md: Ditto.
10215 * config/riscv/vector.md: Ditto.
10217 2023-08-07 Jonathan Wakely <jwakely@redhat.com>
10219 * config/i386/i386.cc (ix86_invalid_conversion): Fix grammar.
10221 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
10223 * configure: Regenerate.
10225 2023-08-07 John Ericson <git@JohnEricson.me>
10227 * configure: Regenerate.
10229 2023-08-07 Alan Modra <amodra@gmail.com>
10231 * configure: Regenerate.
10233 2023-08-07 Alexander von Gluck IV <kallisti5@unixzen.com>
10235 * configure: Regenerate.
10237 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
10239 * configure: Regenerate.
10241 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
10243 * configure: Regenerate.
10245 2023-08-07 H.J. Lu <hjl.tools@gmail.com>
10247 * configure: Regenerate.
10249 2023-08-07 H.J. Lu <hjl.tools@gmail.com>
10251 * configure: Regenerate.
10253 2023-08-07 Jeff Law <jlaw@ventanamicro.com>
10255 * config/riscv/riscv.cc (riscv_expand_conditional_move): Allow
10256 VOIDmode operands to conditional before canonicalization.
10258 2023-08-07 Manolis Tsamis <manolis.tsamis@vrull.eu>
10260 * regcprop.cc (maybe_copy_reg_attrs): Remove unnecessary function.
10261 (find_oldest_value_reg): Inline stack_pointer_rtx check.
10262 (copyprop_hardreg_forward_1): Inline stack_pointer_rtx check.
10264 2023-08-07 Martin Jambor <mjambor@suse.cz>
10267 * ipa-param-manipulation.h (class ipa_param_body_adjustments): New
10268 members get_ddef_if_exists_and_is_used and mark_clobbers_dead.
10269 * ipa-sra.cc (isra_track_scalar_value_uses): Ignore clobbers.
10270 (ptr_parm_has_nonarg_uses): Likewise.
10271 * ipa-param-manipulation.cc
10272 (ipa_param_body_adjustments::get_ddef_if_exists_and_is_used): New.
10273 (ipa_param_body_adjustments::mark_dead_statements): Move initial
10274 checks to get_ddef_if_exists_and_is_used.
10275 (ipa_param_body_adjustments::mark_clobbers_dead): New.
10276 (ipa_param_body_adjustments::common_initialization): Call
10277 mark_clobbers_dead when splitting.
10279 2023-08-07 Raphael Zinsly <rzinsly@ventanamicro.com>
10281 * config/riscv/riscv.cc (riscv_expand_int_scc): Add invert_ptr
10282 as an argument and pass it to riscv_emit_int_order_test.
10283 (riscv_expand_conditional_move): Handle cases where the condition
10284 is not EQ/NE or the second argument to the conditional is not
10286 * config/riscv/riscv-protos.h (riscv_expand_int_scc): Update prototype.
10287 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
10289 2023-08-07 Andrew Pinski <apinski@marvell.com>
10291 PR tree-optimization/109959
10292 * match.pd (`(a > 1) ? 0 : (cast)a`, `(a <= 1) & (cast)a`):
10295 2023-08-07 Richard Biener <rguenther@suse.de>
10297 * tree-ssa-sink.cc (pass_sink_code::execute): Do not
10298 calculate post-dominators. Calculate RPO on the inverted
10299 graph and process blocks in that order.
10301 2023-08-07 liuhongt <hongtao.liu@intel.com>
10304 * config/i386/i386-protos.h
10305 (vpternlog_redundant_operand_mask): Adjust parameter type.
10306 * config/i386/i386.cc (vpternlog_redundant_operand_mask): Use
10307 INTVAL instead of XINT, also adjust parameter type from rtx*
10308 to rtx since the function only needs operands[4] in vpternlog
10310 (substitute_vpternlog_operands): Pass operands[4] instead of
10311 operands to vpternlog_redundant_operand_mask.
10312 * config/i386/sse.md: Ditto.
10314 2023-08-07 Richard Biener <rguenther@suse.de>
10316 * tree-vect-slp.cc (vect_slp_region): Save/restore vect_location
10317 around dumping code.
10319 2023-08-07 liuhongt <hongtao.liu@intel.com>
10322 * config/i386/mmx.md (<insn><mode>3): Changed from define_insn
10323 to define_expand and break into ..
10324 (<insn>v4hf3): .. this.
10325 (divv4hf3): .. this.
10326 (<insn>v2hf3): .. this.
10327 (divv2hf3): .. this.
10328 (movd_v2hf_to_sse): New define_expand.
10329 (movq_<mode>_to_sse): Extend to V4HFmode.
10330 (mmxdoublevecmode): Ditto.
10331 (V2FI_V4HF): New mode iterator.
10332 * config/i386/sse.md (*vec_concatv4sf): Extend to hanlde V8HF
10333 by using mode iterator V4SF_V8HF, renamed to ..
10334 (*vec_concat<mode>): .. this.
10335 (*vec_concatv4sf_0): Extend to handle V8HF by using mode
10336 iterator V4SF_V8HF, renamed to ..
10337 (*vec_concat<mode>_0): .. this.
10338 (*vec_concatv8hf_movss): New define_insn.
10339 (V4SF_V8HF): New mode iterator.
10341 2023-08-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10343 * tree-vect-patterns.cc (vect_recog_over_widening_pattern): Add op vectype.
10345 2023-08-07 Jan Beulich <jbeulich@suse.com>
10347 * config/i386/mmx.md (*mmx_pinsrd): Drop "prefix_data16".
10348 (*mmx_pinsrb): Likewise.
10349 (*mmx_pextrb): Likewise.
10350 (*mmx_pextrb_zext): Likewise.
10351 (mmx_pshufbv8qi3): Likewise.
10352 (mmx_pshufbv4qi3): Likewise.
10353 (mmx_pswapdv2si2): Likewise.
10354 (*pinsrb): Likewise.
10355 (*pextrb): Likewise.
10356 (*pextrb_zext): Likewise.
10357 * config/i386/sse.md (*sse4_1_mulv2siv2di3<mask_name>): Likewise.
10358 (*sse2_eq<mode>3): Likewise.
10359 (*sse2_gt<mode>3): Likewise.
10360 (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
10361 (*vec_extract<mode>): Likewise.
10362 (*vec_extract<PEXTR_MODE12:mode>_zext): Likewise.
10363 (*vec_extractv16qi_zext): Likewise.
10364 (ssse3_ph<plusminus_mnemonic>wv8hi3): Likewise.
10365 (ssse3_pmaddubsw128): Likewise.
10366 (*<ssse3_avx2>_pmulhrsw<mode>3<mask_name>): Likewise.
10367 (<ssse3_avx2>_pshufb<mode>3<mask_name>): Likewise.
10368 (<ssse3_avx2>_psign<mode>3): Likewise.
10369 (<ssse3_avx2>_palignr<mode>): Likewise.
10370 (*abs<mode>2): Likewise.
10371 (sse4_2_pcmpestr): Likewise.
10372 (sse4_2_pcmpestri): Likewise.
10373 (sse4_2_pcmpestrm): Likewise.
10374 (sse4_2_pcmpestr_cconly): Likewise.
10375 (sse4_2_pcmpistr): Likewise.
10376 (sse4_2_pcmpistri): Likewise.
10377 (sse4_2_pcmpistrm): Likewise.
10378 (sse4_2_pcmpistr_cconly): Likewise.
10379 (vgf2p8affineinvqb_<mode><mask_name>): Likewise.
10380 (vgf2p8affineqb_<mode><mask_name>): Likewise.
10381 (vgf2p8mulb_<mode><mask_name>): Likewise.
10382 (*<code>v8hi3 [smaxmin]): Drop "prefix_data16" and
10384 (*<code>v16qi3 [umaxmin]): Likewise.
10386 2023-08-07 Jan Beulich <jbeulich@suse.com>
10388 * config/i386/i386.md (sse4_1_round<mode>2): Make
10389 "length_immediate" uniformly 1.
10390 * config/i386/mmx.md (mmx_pblendvb_v8qi): Likewise.
10391 (mmx_pblendvb_<mode>): Likewise.
10393 2023-08-07 Jan Beulich <jbeulich@suse.com>
10395 * config/i386/sse.md
10396 (<avx512>_<complexopname>_<mode><maskc_name><round_name>): Add
10397 "prefix" attribute.
10398 (avx512fp16_<complexopname>sh_v8hf<mask_scalarc_name><round_scalarcz_name>):
10401 2023-08-07 Jan Beulich <jbeulich@suse.com>
10403 * config/i386/sse.md (xop_phadd<u>bw): Add "prefix",
10404 "prefix_extra", and "mode" attributes.
10405 (xop_phadd<u>bd): Likewise.
10406 (xop_phadd<u>bq): Likewise.
10407 (xop_phadd<u>wd): Likewise.
10408 (xop_phadd<u>wq): Likewise.
10409 (xop_phadd<u>dq): Likewise.
10410 (xop_phsubbw): Likewise.
10411 (xop_phsubwd): Likewise.
10412 (xop_phsubdq): Likewise.
10413 (xop_rotl<mode>3): Add "prefix" and "prefix_extra" attributes.
10414 (xop_rotr<mode>3): Likewise.
10415 (xop_frcz<mode>2): Likewise.
10416 (*xop_vmfrcz<mode>2): Likewise.
10417 (xop_vrotl<mode>3): Add "prefix" attribute. Change
10418 "prefix_extra" to 1.
10419 (xop_sha<mode>3): Likewise.
10420 (xop_shl<mode>3): Likewise.
10422 2023-08-07 Jan Beulich <jbeulich@suse.com>
10424 * config/i386/sse.md
10425 (*<avx512>_eq<mode>3<mask_scalar_merge_name>_1): Drop
10427 (avx512dq_vextract<shuffletype>64x2_1_mask): Likewise.
10428 (*avx512dq_vextract<shuffletype>64x2_1): Likewise.
10429 (avx512f_vextract<shuffletype>32x4_1_mask): Likewise.
10430 (*avx512f_vextract<shuffletype>32x4_1): Likewise.
10431 (vec_extract_lo_<mode>_mask [AVX512 forms]): Likewise.
10432 (vec_extract_lo_<mode> [AVX512 forms]): Likewise.
10433 (vec_extract_hi_<mode>_mask [AVX512 forms]): Likewise.
10434 (vec_extract_hi_<mode> [AVX512 forms]): Likewise.
10435 (@vec_extract_lo_<mode> [AVX512 forms]): Likewise.
10436 (@vec_extract_hi_<mode> [AVX512 forms]): Likewise.
10437 (vec_extract_lo_v64qi): Likewise.
10438 (vec_extract_hi_v64qi): Likewise.
10439 (*vec_widen_umult_even_v16si<mask_name>): Likewise.
10440 (*vec_widen_smult_even_v16si<mask_name>): Likewise.
10441 (*avx512f_<code><mode>3<mask_name>): Likewise.
10442 (*vec_extractv4ti): Likewise.
10443 (avx512bw_<code>v32qiv32hi2<mask_name>): Likewise.
10444 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1): Likewise.
10445 Add "length_immediate".
10447 2023-08-07 Jan Beulich <jbeulich@suse.com>
10449 * config/i386/i386.md (@rdrand<mode>): Add "prefix_0f". Drop
10451 (@rdseed<mode>): Likewise.
10452 * config/i386/mmx.md (<code><mode>3 [smaxmin and umaxmin cases]):
10453 Adjust "prefix_extra".
10454 * config/i386/sse.md (@vec_set<mode>_0): Likewise.
10455 (*sse4_1_<code><mode>3<mask_name>): Likewise.
10456 (*avx2_eq<mode>3): Likewise.
10457 (avx2_gt<mode>3): Likewise.
10458 (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
10459 (*vec_extract<mode>): Likewise.
10460 (<vi8_sse4_1_avx2_avx512>_movntdqa): Likewise.
10462 2023-08-07 Jan Beulich <jbeulich@suse.com>
10464 * config/i386/i386.md (rd<fsgs>base<mode>): Add "prefix_0f" and
10465 "prefix_rep". Drop "prefix_extra".
10466 (wr<fsgs>base<mode>): Likewise.
10467 (ptwrite<mode>): Likewise.
10469 2023-08-07 Jan Beulich <jbeulich@suse.com>
10471 * config/i386/i386.md (isa): Move up.
10472 (length_immediate): Handle "fma4".
10473 (prefix): Handle "ssemuladd".
10474 * config/i386/sse.md (*fma_fmadd_<mode>): Add "prefix" attribute.
10475 (<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name><round_name>):
10477 (<avx512>_fmadd_<mode>_mask<round_name>): Likewise.
10478 (<avx512>_fmadd_<mode>_mask3<round_name>): Likewise.
10479 (<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name><round_name>):
10481 (<avx512>_fmsub_<mode>_mask<round_name>): Likewise.
10482 (<avx512>_fmsub_<mode>_mask3<round_name>): Likewise.
10483 (*fma_fnmadd_<mode>): Likewise.
10484 (<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name><round_name>):
10486 (<avx512>_fnmadd_<mode>_mask<round_name>): Likewise.
10487 (<avx512>_fnmadd_<mode>_mask3<round_name>): Likewise.
10488 (<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name><round_name>):
10490 (<avx512>_fnmsub_<mode>_mask<round_name>): Likewise.
10491 (<avx512>_fnmsub_<mode>_mask3<round_name>): Likewise.
10492 (<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>):
10494 (<avx512>_fmaddsub_<mode>_mask<round_name>): Likewise.
10495 (<avx512>_fmaddsub_<mode>_mask3<round_name>): Likewise.
10496 (<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>):
10498 (<avx512>_fmsubadd_<mode>_mask<round_name>): Likewise.
10499 (<avx512>_fmsubadd_<mode>_mask3<round_name>): Likewise.
10500 (*fmai_fmadd_<mode>): Likewise.
10501 (*fmai_fmsub_<mode>): Likewise.
10502 (*fmai_fnmadd_<mode><round_name>): Likewise.
10503 (*fmai_fnmsub_<mode><round_name>): Likewise.
10504 (avx512f_vmfmadd_<mode>_mask<round_name>): Likewise.
10505 (avx512f_vmfmadd_<mode>_mask3<round_name>): Likewise.
10506 (avx512f_vmfmadd_<mode>_maskz_1<round_name>): Likewise.
10507 (*avx512f_vmfmsub_<mode>_mask<round_name>): Likewise.
10508 (avx512f_vmfmsub_<mode>_mask3<round_name>): Likewise.
10509 (*avx512f_vmfmsub_<mode>_maskz_1<round_name>): Likewise.
10510 (avx512f_vmfnmadd_<mode>_mask<round_name>): Likewise.
10511 (avx512f_vmfnmadd_<mode>_mask3<round_name>): Likewise.
10512 (avx512f_vmfnmadd_<mode>_maskz_1<round_name>): Likewise.
10513 (*avx512f_vmfnmsub_<mode>_mask<round_name>): Likewise.
10514 (*avx512f_vmfnmsub_<mode>_mask3<round_name>): Likewise.
10515 (*avx512f_vmfnmsub_<mode>_maskz_1<round_name>): Likewise.
10516 (*fma4i_vmfmadd_<mode>): Likewise.
10517 (*fma4i_vmfmsub_<mode>): Likewise.
10518 (*fma4i_vmfnmadd_<mode>): Likewise.
10519 (*fma4i_vmfnmsub_<mode>): Likewise.
10520 (fma_<complexopname>_<mode><sdc_maskz_name><round_name>): Likewise.
10521 (<avx512>_<complexopname>_<mode>_mask<round_name>): Likewise.
10522 (avx512fp16_fma_<complexopname>sh_v8hf<mask_scalarcz_name><round_scalarcz_name>):
10524 (avx512fp16_<complexopname>sh_v8hf_mask<round_name>): Likewise.
10525 (xop_p<macs><ssemodesuffix><ssemodesuffix>): Likewise.
10526 (xop_p<macs>dql): Likewise.
10527 (xop_p<macs>dqh): Likewise.
10528 (xop_p<macs>wd): Likewise.
10529 (xop_p<madcs>wd): Likewise.
10530 (fma_<complexpairopname>_<mode>_pair): Likewise. Add "mode" attribute.
10532 2023-08-07 Jan Beulich <jbeulich@suse.com>
10534 * config/i386/i386.md (length_immediate): Handle "sse4arg".
10535 (prefix): Likewise.
10536 (*xop_pcmov_<mode>): Add "mode" attribute.
10537 * config/i386/mmx.md (*xop_maskcmp<mode>3): Drop "prefix_data16",
10538 "prefix_rep", "prefix_extra", and "length_immediate" attributes.
10539 (*xop_maskcmp_uns<mode>3): Likewise. Switch "type" to "sse4arg".
10540 (*xop_pcmov_<mode>): Add "mode" attribute.
10541 * config/i386/sse.md (xop_pcmov_<mode><avxsizesuffix>): Add "mode"
10543 (xop_maskcmp<mode>3): Drop "prefix_data16", "prefix_rep",
10544 "prefix_extra", and "length_immediate" attributes.
10545 (xop_maskcmp_uns<mode>3): Likewise. Switch "type" to "sse4arg".
10546 (xop_maskcmp_uns2<mode>3): Drop "prefix_data16", "prefix_extra",
10547 and "length_immediate" attributes. Switch "type" to "sse4arg".
10548 (xop_pcom_tf<mode>3): Likewise.
10549 (xop_vpermil2<mode>3): Drop "length_immediate" attribute.
10551 2023-08-07 Jan Beulich <jbeulich@suse.com>
10553 * config/i386/i386.md (prefix_extra): Correct comment. Fold
10554 cases yielding 2 into ones yielding 1.
10556 2023-08-07 Jan Hubicka <jh@suse.cz>
10558 PR tree-optimization/106293
10559 * tree-vect-loop-manip.cc (vect_loop_versioning): Fix profile update.
10560 * tree-vect-loop.cc (vect_transform_loop): Likewise.
10562 2023-08-07 Andrew Pinski <apinski@marvell.com>
10564 PR tree-optimization/96695
10565 * match.pd (min_value, max_value): Extend to
10568 2023-08-06 Jan Hubicka <jh@suse.cz>
10570 * config/i386/cpuid.h (__get_cpuid_count, __get_cpuid_max): Add
10571 __builtin_expect that CPU likely supports cpuid.
10573 2023-08-06 Jan Hubicka <jh@suse.cz>
10575 * tree-loop-distribution.cc (loop_distribution::execute): Disable
10576 distribution for loops with estimated iterations 0.
10578 2023-08-06 Jan Hubicka <jh@suse.cz>
10580 * tree-vect-loop-manip.cc (vect_do_peeling): Fix profile update of peeled epilogues.
10582 2023-08-04 Xiao Zeng <zengxiao@eswincomputing.com>
10584 * config/riscv/riscv.cc (riscv_expand_conditional_move): Recognize
10585 more Zicond patterns. Fix whitespace typo.
10586 (riscv_rtx_costs): Remove accidental code duplication.
10587 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
10589 2023-08-04 Yan Simonaytes <simonaytes.yan@ispras.ru>
10592 * config/i386/i386-protos.h
10593 (vpternlog_redundant_operand_mask): Declare.
10594 (substitute_vpternlog_operands): Declare.
10595 * config/i386/i386.cc
10596 (vpternlog_redundant_operand_mask): New helper.
10597 (substitute_vpternlog_operands): New function. Use them...
10598 * config/i386/sse.md: ... here in new VPTERNLOG define_splits.
10600 2023-08-04 Roger Sayle <roger@nextmovesoftware.com>
10602 * expmed.cc (extract_bit_field_1): Document that an UNSIGNEDP
10603 value of -1 is equivalent to don't care.
10604 (extract_integral_bit_field): Indicate that we don't require
10605 the most significant word to be zero extended, if we're about
10607 (extract_fixed_bit_field_1): Document that an UNSIGNEDP value
10608 of -1 is equivalent to don't care. Don't clear the most
10609 significant bits with AND mask when UNSIGNEDP is -1.
10611 2023-08-04 Roger Sayle <roger@nextmovesoftware.com>
10613 * config/i386/sse.md (define_split): Convert highpart:DF extract
10614 from V2DFmode register into a sse2_storehpd instruction.
10615 (define_split): Likewise, convert lowpart:DF extract from V2DF
10616 register into a sse2_storelpd instruction.
10618 2023-08-04 Qing Zhao <qing.zhao@oracle.com>
10620 * doc/invoke.texi (-Wflex-array-member-not-at-end): Document
10623 2023-08-04 Vladimir N. Makarov <vmakarov@redhat.com>
10625 * lra-lives.cc (process_bb_lives): Check input insn pattern hard regs
10626 against early clobber hard regs.
10628 2023-08-04 Tamar Christina <tamar.christina@arm.com>
10630 * doc/extend.texi: Document it.
10632 2023-08-04 Tamar Christina <tamar.christina@arm.com>
10635 * config/aarch64/aarch64-simd.md (vec_widen_<sur>shiftl_lo_<mode>,
10636 vec_widen_<sur>shiftl_hi_<mode>): Remove.
10637 (aarch64_<sur>shll<mode>_internal): Renamed to...
10638 (aarch64_<su>shll<mode>): .. This.
10639 (aarch64_<sur>shll2<mode>_internal): Renamed to...
10640 (aarch64_<su>shll2<mode>): .. This.
10641 (aarch64_<sur>shll_n<mode>, aarch64_<sur>shll2_n<mode>): Re-use new
10643 * config/aarch64/constraints.md (D2, DL): New.
10644 * config/aarch64/predicates.md (aarch64_simd_shll_imm_vec): New.
10646 2023-08-04 Tamar Christina <tamar.christina@arm.com>
10648 * gensupport.cc (conlist): Support length 0 attribute.
10650 2023-08-04 Tamar Christina <tamar.christina@arm.com>
10652 * config/aarch64/aarch64.cc (aarch64_bool_compound_p): New.
10653 (aarch64_adjust_stmt_cost, aarch64_vector_costs::count_ops): Use it.
10655 2023-08-04 Tamar Christina <tamar.christina@arm.com>
10657 * config/aarch64/aarch64.cc (aarch64_multiply_add_p): Update handling
10659 (aarch64_adjust_stmt_cost): Use it.
10660 (aarch64_vector_costs::count_ops): Likewise.
10661 (aarch64_vector_costs::add_stmt_cost): Pass vinfo to
10662 aarch64_adjust_stmt_cost.
10664 2023-08-04 Richard Biener <rguenther@suse.de>
10666 PR tree-optimization/110838
10667 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
10668 Fix right-shift value sanitizing. Properly emit external
10669 def mangling in the preheader rather than in the pattern
10670 def sequence where it will fail vectorizing.
10672 2023-08-04 Matthew Malcomson <matthew.malcomson@arm.com>
10674 PR middle-end/110316
10676 * timevar.cc (NANOSEC_PER_SEC, TICKS_TO_NANOSEC,
10677 CLOCKS_TO_NANOSEC, nanosec_to_floating_sec, percent_of): New.
10678 (TICKS_TO_MSEC, CLOCKS_TO_MSEC): Remove these macros.
10679 (timer::validate_phases): Use integral arithmetic to check
10681 (timer::print_row, timer::print): Convert from integral
10682 nanoseconds to floating point seconds before printing.
10683 (timer::all_zero): Change limit to nanosec count instead of
10684 fractional count of seconds.
10685 (make_json_for_timevar_time_def): Convert from integral
10686 nanoseconds to floating point seconds before recording.
10687 * timevar.h (struct timevar_time_def): Update all measurements
10688 to use uint64_t nanoseconds rather than seconds stored in a
10691 2023-08-04 Richard Biener <rguenther@suse.de>
10693 PR tree-optimization/110838
10694 * match.pd (([rl]shift @0 out-of-bounds) -> zero): Restrict
10695 the arithmetic right-shift case to non-negative operands.
10697 2023-08-04 Pan Li <pan2.li@intel.com>
10700 2023-08-04 Pan Li <pan2.li@intel.com>
10702 * config/riscv/riscv-vector-builtins-bases.cc
10703 (class vfmacc_frm): New class for vfmacc frm.
10704 (vfmacc_frm_obj): New declaration.
10706 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
10707 * config/riscv/riscv-vector-builtins-functions.def
10708 (vfmacc_frm): New function definition.
10709 * config/riscv/riscv-vector-builtins.cc
10710 (function_expander::use_ternop_insn): Add frm operand support.
10711 * config/riscv/vector.md: Add vfmuladd to frm_mode.
10713 2023-08-04 Pan Li <pan2.li@intel.com>
10716 2023-08-04 Pan Li <pan2.li@intel.com>
10718 * config/riscv/riscv-vector-builtins-bases.cc
10719 (class vfnmacc_frm): New class for vfnmacc.
10720 (vfnmacc_frm_obj): New declaration.
10722 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
10723 * config/riscv/riscv-vector-builtins-functions.def
10724 (vfnmacc_frm): New function definition.
10726 2023-08-04 Pan Li <pan2.li@intel.com>
10729 2023-08-04 Pan Li <pan2.li@intel.com>
10731 * config/riscv/riscv-vector-builtins-bases.cc
10732 (class vfmsac_frm): New class for vfmsac frm.
10733 (vfmsac_frm_obj): New declaration.
10735 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
10736 * config/riscv/riscv-vector-builtins-functions.def
10737 (vfmsac_frm): New function definition.
10739 2023-08-04 Pan Li <pan2.li@intel.com>
10742 2023-08-04 Pan Li <pan2.li@intel.com>
10744 * config/riscv/riscv-vector-builtins-bases.cc
10745 (class vfnmsac_frm): New class for vfnmsac frm.
10746 (vfnmsac_frm_obj): New declaration.
10748 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
10749 * config/riscv/riscv-vector-builtins-functions.def
10750 (vfnmsac_frm): New function definition.
10752 2023-08-04 Georg-Johann Lay <avr@gjlay.de>
10754 * config/avr/avr-mcus.def (avr64dd14, avr64dd20, avr64dd28, avr64dd32)
10755 (avr64ea28, avr64ea32, avr64ea48, attiny424, attiny426, attiny427)
10756 (attiny824, attiny826, attiny827, attiny1624, attiny1626, attiny1627)
10757 (attiny3224, attiny3226, attiny3227, avr16dd14, avr16dd20, avr16dd28)
10758 (avr16dd32, avr32dd14, avr32dd20, avr32dd28, avr32dd32)
10759 (attiny102, attiny104): New devices.
10760 * doc/avr-mmcu.texi: Regenerate.
10762 2023-08-04 Georg-Johann Lay <avr@gjlay.de>
10764 * config/avr/avr-mcus.def (avr128d*, avr64d*): Fix their FLASH_SIZE
10765 and PM_OFFSET entries.
10767 2023-08-04 Andrew Pinski <apinski@marvell.com>
10769 PR tree-optimization/110874
10770 * gimple-match-head.cc (gimple_bit_not_with_nop): New declaration.
10771 (gimple_maybe_cmp): Likewise.
10772 (gimple_bitwise_inverted_equal_p): Rewrite to use gimple_bit_not_with_nop
10773 and gimple_maybe_cmp instead of being recursive.
10774 * match.pd (bit_not_with_nop): New match pattern.
10775 (maybe_cmp): Likewise.
10777 2023-08-04 Drew Ross <drross@redhat.com>
10779 PR middle-end/101955
10780 * match.pd ((signed x << c) >> c): New canonicalization.
10782 2023-08-04 Pan Li <pan2.li@intel.com>
10784 * config/riscv/riscv-vector-builtins-bases.cc
10785 (class vfnmsac_frm): New class for vfnmsac frm.
10786 (vfnmsac_frm_obj): New declaration.
10788 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
10789 * config/riscv/riscv-vector-builtins-functions.def
10790 (vfnmsac_frm): New function definition.
10792 2023-08-04 Pan Li <pan2.li@intel.com>
10794 * config/riscv/riscv-vector-builtins-bases.cc
10795 (class vfmsac_frm): New class for vfmsac frm.
10796 (vfmsac_frm_obj): New declaration.
10798 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
10799 * config/riscv/riscv-vector-builtins-functions.def
10800 (vfmsac_frm): New function definition.
10802 2023-08-04 Pan Li <pan2.li@intel.com>
10804 * config/riscv/riscv-vector-builtins-bases.cc
10805 (class vfnmacc_frm): New class for vfnmacc.
10806 (vfnmacc_frm_obj): New declaration.
10808 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
10809 * config/riscv/riscv-vector-builtins-functions.def
10810 (vfnmacc_frm): New function definition.
10812 2023-08-04 Hao Liu <hliu@os.amperecomputing.com>
10815 * config/aarch64/aarch64.cc (aarch64_force_single_cycle): check
10816 STMT_VINFO_REDUC_DEF to avoid failures in info_for_reduction.
10818 2023-08-04 Pan Li <pan2.li@intel.com>
10820 * config/riscv/riscv-vector-builtins-bases.cc
10821 (class vfmacc_frm): New class for vfmacc frm.
10822 (vfmacc_frm_obj): New declaration.
10824 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
10825 * config/riscv/riscv-vector-builtins-functions.def
10826 (vfmacc_frm): New function definition.
10827 * config/riscv/riscv-vector-builtins.cc
10828 (function_expander::use_ternop_insn): Add frm operand support.
10829 * config/riscv/vector.md: Add vfmuladd to frm_mode.
10831 2023-08-04 Pan Li <pan2.li@intel.com>
10833 * config/riscv/riscv-vector-builtins-bases.cc
10834 (vfwmul_frm_obj): New declaration.
10835 (vfwmul_frm): Ditto.
10836 * config/riscv/riscv-vector-builtins-bases.h:
10837 (vfwmul_frm): Ditto.
10838 * config/riscv/riscv-vector-builtins-functions.def
10839 (vfwmul_frm): New function definition.
10840 * config/riscv/vector.md: (frm_mode) Add vfwmul to frm_mode.
10842 2023-08-04 Pan Li <pan2.li@intel.com>
10844 * config/riscv/riscv-vector-builtins-bases.cc
10845 (binop_frm): New declaration.
10846 (reverse_binop_frm): Likewise.
10848 * config/riscv/riscv-vector-builtins-bases.h:
10849 (vfdiv_frm): New extern declaration.
10850 (vfrdiv_frm): Likewise.
10851 * config/riscv/riscv-vector-builtins-functions.def
10852 (vfdiv_frm): New function definition.
10853 (vfrdiv_frm): Likewise.
10854 * config/riscv/vector.md: Add vfdiv to frm_mode.
10856 2023-08-03 Jan Hubicka <jh@suse.cz>
10858 * tree-cfg.cc (print_loop_info): Print entry count.
10860 2023-08-03 Jan Hubicka <jh@suse.cz>
10862 * tree-ssa-loop-split.cc (split_loop): Update estimated iteration counts.
10864 2023-08-03 Jan Hubicka <jh@suse.cz>
10866 PR bootstrap/110857
10867 * cfgloopmanip.cc (scale_loop_profile): (Un)initialize
10868 unadjusted_exit_count.
10870 2023-08-03 Aldy Hernandez <aldyh@redhat.com>
10872 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Read global
10875 2023-08-03 Xiao Zeng <zengxiao@eswincomputing.com>
10877 * config/riscv/riscv.cc (riscv_expand_conditional_move): Recognize
10878 various Zicond patterns.
10879 * config/riscv/riscv.md (mov<mode>cc): Allow TARGET_ZICOND. Use
10880 sfb_alu_operand for both arms of the conditional move.
10881 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
10883 2023-08-03 Cupertino Miranda <cupertino.miranda@oracle.com>
10889 * config.gcc: Added core-builtins.cc and .o files.
10890 * config/bpf/bpf-passes.def: Removed file.
10891 * config/bpf/bpf-protos.h (bpf_add_core_reloc,
10892 bpf_replace_core_move_operands): New prototypes.
10893 * config/bpf/bpf.cc (enum bpf_builtins, is_attr_preserve_access,
10894 maybe_make_core_relo, bpf_core_field_info, bpf_core_compute,
10895 bpf_core_get_index, bpf_core_new_decl, bpf_core_walk,
10896 bpf_is_valid_preserve_field_info_arg, is_attr_preserve_access,
10897 handle_attr_preserve, pass_data_bpf_core_attr, pass_bpf_core_attr):
10899 (def_builtin, bpf_expand_builtin, bpf_resolve_overloaded_builtin): Changed.
10900 * config/bpf/bpf.md (define_expand mov<MM:mode>): Changed.
10901 (mov_reloc_core<mode>): Added.
10902 * config/bpf/core-builtins.cc (struct cr_builtin, enum
10903 cr_decision struct cr_local, struct cr_final, struct
10904 core_builtin_helpers, enum bpf_plugin_states): Added types.
10905 (builtins_data, core_builtin_helpers, core_builtin_type_defs):
10907 (allocate_builtin_data, get_builtin-data, search_builtin_data,
10908 remove_parser_plugin, compare_same_kind, compare_same_ptr_expr,
10909 compare_same_ptr_type, is_attr_preserve_access, core_field_info,
10910 bpf_core_get_index, compute_field_expr,
10911 pack_field_expr_for_access_index, pack_field_expr_for_preserve_field,
10912 process_field_expr, pack_enum_value, process_enum_value, pack_type,
10913 process_type, bpf_require_core_support, make_core_relo, read_kind,
10914 kind_access_index, kind_preserve_field_info, kind_enum_value,
10915 kind_type_id, kind_preserve_type_info, get_core_builtin_fndecl_for_type,
10916 bpf_handle_plugin_finish_type, bpf_init_core_builtins,
10917 construct_builtin_core_reloc, bpf_resolve_overloaded_core_builtin,
10918 bpf_expand_core_builtin, bpf_add_core_reloc,
10919 bpf_replace_core_move_operands): Added functions.
10920 * config/bpf/core-builtins.h (enum bpf_builtins): Added.
10921 (bpf_init_core_builtins, bpf_expand_core_builtin,
10922 bpf_resolve_overloaded_core_builtin): Added functions.
10923 * config/bpf/coreout.cc (struct bpf_core_extra): Added.
10924 (bpf_core_reloc_add, output_asm_btfext_core_reloc): Changed.
10925 * config/bpf/coreout.h (bpf_core_reloc_add) Changed prototype.
10926 * config/bpf/t-bpf: Added core-builtins.o.
10927 * doc/extend.texi: Added documentation for new BPF builtins.
10929 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
10931 * gimple-range-fold.cc (fold_using_range::range_of_range_op): Add
10932 ranges to the call to relation_fold_and_or.
10933 (fold_using_range::relation_fold_and_or): Add op1 and op2 ranges.
10934 (fur_source::register_outgoing_edges): Add op1 and op2 ranges.
10935 * gimple-range-fold.h (relation_fold_and_or): Adjust params.
10936 * gimple-range-gori.cc (gori_compute::compute_operand_range): Add
10937 a varying op1 and op2 to call.
10938 * range-op-float.cc (range_operator::op1_op2_relation): New dafaults.
10939 (operator_equal::op1_op2_relation): New float version.
10940 (operator_not_equal::op1_op2_relation): Ditto.
10941 (operator_lt::op1_op2_relation): Ditto.
10942 (operator_le::op1_op2_relation): Ditto.
10943 (operator_gt::op1_op2_relation): Ditto.
10944 (operator_ge::op1_op2_relation) Ditto.
10945 * range-op-mixed.h (operator_equal::op1_op2_relation): New float
10947 (operator_not_equal::op1_op2_relation): Ditto.
10948 (operator_lt::op1_op2_relation): Ditto.
10949 (operator_le::op1_op2_relation): Ditto.
10950 (operator_gt::op1_op2_relation): Ditto.
10951 (operator_ge::op1_op2_relation): Ditto.
10952 * range-op.cc (range_op_handler::op1_op2_relation): Dispatch new
10954 (range_operator::op1_op2_relation): Add extra params.
10955 (operator_equal::op1_op2_relation): Ditto.
10956 (operator_not_equal::op1_op2_relation): Ditto.
10957 (operator_lt::op1_op2_relation): Ditto.
10958 (operator_le::op1_op2_relation): Ditto.
10959 (operator_gt::op1_op2_relation): Ditto.
10960 (operator_ge::op1_op2_relation): Ditto.
10961 * range-op.h (range_operator): New prototypes.
10962 (range_op_handler): Ditto.
10964 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
10966 * gimple-range-gori.cc (gori_compute::compute_operand1_range):
10967 Use identity relation.
10968 (gori_compute::compute_operand2_range): Ditto.
10969 * value-relation.cc (get_identity_relation): New.
10970 * value-relation.h (get_identity_relation): New prototype.
10972 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
10974 * value-range.h (Value_Range::set_varying): Set the type.
10975 (Value_Range::set_zero): Ditto.
10976 (Value_Range::set_nonzero): Ditto.
10978 2023-08-03 Jeff Law <jeffreyalaw@gmail.com>
10980 * config/riscv/riscv.cc (riscv_rtx_costs): Remove errant hunk from
10983 2023-08-03 Pan Li <pan2.li@intel.com>
10985 * config/riscv/riscv-vector-builtins-bases.cc: Add vfsub.
10987 2023-08-03 Richard Sandiford <richard.sandiford@arm.com>
10989 * poly-int.h (can_div_trunc_p): Succeed for more boundary conditions.
10991 2023-08-03 Richard Biener <rguenther@suse.de>
10993 PR tree-optimization/110838
10994 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
10995 Adjust the shift operand of RSHIFT_EXPRs.
10997 2023-08-03 Richard Biener <rguenther@suse.de>
10999 PR tree-optimization/110702
11000 * tree-ssa-loop-ivopts.cc (rewrite_use_address): When
11001 we created a NULL pointer based access rewrite that to
11004 2023-08-03 Richard Biener <rguenther@suse.de>
11006 * tree-ssa-sink.cc: Include tree-ssa-live.h.
11007 (pass_sink_code::execute): Instantiate virtual_operand_live
11009 (sink_code_in_bb): Pass down virtual_operand_live.
11010 (statement_sink_location): Get virtual_operand_live and
11011 verify we are not sinking loads across stores by looking up
11012 the live virtual operand at the sink location.
11014 2023-08-03 Richard Biener <rguenther@suse.de>
11016 * tree-ssa-live.h (class virtual_operand_live): New.
11017 * tree-ssa-live.cc (virtual_operand_live::init): New.
11018 (virtual_operand_live::get_live_in): Likewise.
11019 (virtual_operand_live::get_live_out): Likewise.
11021 2023-08-03 Richard Biener <rguenther@suse.de>
11023 * passes.def: Exchange loop splitting and final value
11024 replacement passes.
11026 2023-08-03 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
11028 * config/s390/s390.cc (expand_perm_as_a_vlbr_vstbr_candidate):
11029 New function which handles bswap patterns for vec_perm_const.
11030 (vectorize_vec_perm_const_1): Call new function.
11031 * config/s390/vector.md (*bswap<mode>): Fix operands in output
11033 (*vstbr<mode>): New insn.
11035 2023-08-03 Alexandre Oliva <oliva@adacore.com>
11037 * config/vxworks-smp.opt: New. Introduce -msmp.
11038 * config.gcc: Enable it on powerpc* vxworks prior to 7r*.
11039 * config/rs6000/vxworks.h (STARTFILE_PREFIX_SPEC): Choose
11040 lib_smp when -msmp is present in the command line.
11041 * doc/invoke.texi: Document it.
11043 2023-08-03 Yanzhang Wang <yanzhang.wang@intel.com>
11045 * config/riscv/riscv.cc (riscv_save_reg_p): Save ra for leaf
11046 when enabling -mno-omit-leaf-frame-pointer
11047 (riscv_option_override): Override omit-frame-pointer.
11048 (riscv_frame_pointer_required): Save s0 for non-leaf function
11049 (TARGET_FRAME_POINTER_REQUIRED): Override defination
11050 * config/riscv/riscv.opt: Add option support.
11052 2023-08-03 Roger Sayle <roger@nextmovesoftware.com>
11055 * config/i386/i386.md (<any_rotate>ti3): For rotations by 64 bits
11056 place operand in a register before gen_<insn>64ti2_doubleword.
11057 (<any_rotate>di3): Likewise, for rotations by 32 bits, place
11058 operand in a register before gen_<insn>32di2_doubleword.
11059 (<any_rotate>32di2_doubleword): Constrain operand to be in register.
11060 (<any_rotate>64ti2_doubleword): Likewise.
11062 2023-08-03 Pan Li <pan2.li@intel.com>
11064 * config/riscv/riscv-vector-builtins-bases.cc
11065 (vfmul_frm_obj): New declaration.
11067 * config/riscv/riscv-vector-builtins-bases.h: Likewise.
11068 * config/riscv/riscv-vector-builtins-functions.def
11069 (vfmul_frm): New function definition.
11070 * config/riscv/vector.md: Add vfmul to frm_mode.
11072 2023-08-03 Andrew Pinski <apinski@marvell.com>
11074 * match.pd (`~X & X`): Check that the types match.
11075 (`~x | x`, `~x ^ x`): Likewise.
11077 2023-08-03 Pan Li <pan2.li@intel.com>
11079 * config/riscv/riscv-vector-builtins-bases.h: Remove
11080 redudant declaration.
11082 2023-08-03 Pan Li <pan2.li@intel.com>
11084 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Add
11086 * config/riscv/riscv-vector-builtins-bases.h: Add declaration.
11087 * config/riscv/riscv-vector-builtins-functions.def (vfwsub_frm):
11088 Add vfwsub function definitions.
11090 2023-08-02 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
11092 PR rtl-optimization/110867
11093 * combine.cc (simplify_compare_const): Try the optimization only
11094 in case the constant fits into the comparison mode.
11096 2023-08-02 Jeff Law <jlaw@ventanamicro.com>
11098 * config/riscv/zicond.md: Remove incorrect zicond patterns and
11099 renumber/rename them.
11100 (zero.nez.<GPR:MODE><X:mode>.opt2): Fix output string.
11102 2023-08-02 Richard Biener <rguenther@suse.de>
11104 * tree-phinodes.h (add_phi_node_to_bb): Remove.
11105 * tree-phinodes.cc (add_phi_node_to_bb): Make static.
11107 2023-08-02 Jan Beulich <jbeulich@suse.com>
11109 * config/i386/sse.md (vec_dupv2df<mask_name>): Fold the middle
11110 two of the alternatives.
11112 2023-08-02 Richard Biener <rguenther@suse.de>
11114 PR tree-optimization/92335
11115 * tree-ssa-sink.cc (select_best_block): Before loop
11116 optimizations avoid sinking unconditional loads/stores
11117 in innermost loops to conditional executed places.
11119 2023-08-02 Andrew Pinski <apinski@marvell.com>
11121 * gimple-match-head.cc (gimple_bitwise_inverted_equal_p): Valueize
11122 the comparison operands before comparing them.
11124 2023-08-02 Andrew Pinski <apinski@marvell.com>
11126 * match.pd (`~X & X`, `~X | X`): Move over to
11127 use bitwise_inverted_equal_p, removing :c as bitwise_inverted_equal_p
11128 handles that already.
11129 Remove range test simplifications to true/false as they
11130 are now handled by these patterns.
11132 2023-08-02 Andrew Pinski <apinski@marvell.com>
11134 * tree-ssa-phiopt.cc (match_simplify_replacement): Mark's cond
11135 statement's lhs and rhs to check if trivial dead.
11136 Rename inserted_exprs to exprs_maybe_dce; also move it so
11137 bitmap is not allocated if not needed.
11139 2023-08-02 Pan Li <pan2.li@intel.com>
11141 * config/riscv/riscv-vector-builtins-bases.cc
11142 (class widen_binop_frm): New class for binop frm.
11143 (BASE): Add vfwadd_frm.
11144 * config/riscv/riscv-vector-builtins-bases.h: New declaration.
11145 * config/riscv/riscv-vector-builtins-functions.def
11146 (vfwadd_frm): New function definition.
11147 * config/riscv/riscv-vector-builtins-shapes.cc
11148 (BASE_NAME_MAX_LEN): New macro.
11149 (struct alu_frm_def): Leverage new base class.
11150 (struct build_frm_base): New build base for frm.
11151 (struct widen_alu_frm_def): New struct for widen alu frm.
11152 (SHAPE): Add widen_alu_frm shape.
11153 * config/riscv/riscv-vector-builtins-shapes.h: New declaration.
11154 * config/riscv/vector.md (frm_mode): Add vfwalu type.
11156 2023-08-02 Jan Hubicka <jh@suse.cz>
11158 * cfgloop.h (loop_count_in): Declare.
11159 * cfgloopanal.cc (expected_loop_iterations_by_profile): Use count_in.
11160 (loop_count_in): Move here from ...
11161 * cfgloopmanip.cc (loop_count_in): ... here.
11162 (scale_loop_profile): Improve dumping; cast iteration bound to sreal.
11164 2023-08-02 Jan Hubicka <jh@suse.cz>
11166 * cfg.cc (scale_strictly_dominated_blocks): New function.
11167 * cfg.h (scale_strictly_dominated_blocks): Declare.
11168 * tree-cfg.cc (fold_loop_internal_call): Fixup CFG profile.
11170 2023-08-02 Richard Biener <rguenther@suse.de>
11172 PR rtl-optimization/110587
11173 * lra-spills.cc (return_regno_p): Remove.
11174 (regno_in_use_p): Likewise.
11175 (lra_final_code_change): Do not remove noop moves
11176 between hard registers.
11178 2023-08-02 liuhongt <hongtao.liu@intel.com>
11181 * config/i386/sse.md (vec_fmaddsub<mode>4): Extend to vector
11182 HFmode, use mode iterator VFH instead.
11183 (vec_fmsubadd<mode>4): Ditto.
11184 (<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>):
11185 Remove scalar mode from iterator, use VFH_AVX512VL instead.
11186 (<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>):
11189 2023-08-02 liuhongt <hongtao.liu@intel.com>
11191 * config/i386/sse.md (*avx2_lddqu_inserti_to_bcasti): New
11192 pre_reload define_insn_and_split.
11194 2023-08-02 Xiao Zeng <zengxiao@eswincomputing.com>
11196 * config/riscv/riscv.cc (riscv_rtx_costs): Add costing for
11197 using Zicond to implement some conditional moves.
11199 2023-08-02 Jeff Law <jlaw@ventanamicro.com>
11201 * config/riscv/zicond.md: Use the X iterator instead of ANYI
11202 on the comparison input operands.
11204 2023-08-02 Xiao Zeng <zengxiao@eswincomputing.com>
11206 * config/riscv/riscv.cc (riscv_rtx_costs, case IF_THEN_ELSE): Add
11208 (case SET): For INSNs that just set a REG, take the cost from the
11210 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
11212 2023-08-02 Hu, Lin1 <lin1.hu@intel.com>
11214 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_AMX_INT8_SET):
11215 Change OPTION_MASK_ISA2_AMX_TILE to OPTION_MASK_ISA2_AMX_TILE_SET.
11216 (OPTION_MASK_ISA2_AMX_BF16_SET): Ditto
11217 (OPTION_MASK_ISA2_AMX_FP16_SET): Ditto
11218 (OPTION_MASK_ISA2_AMX_COMPLEX_SET): Ditto
11219 (OPTION_MASK_ISA_ABM_SET):
11220 Change OPTION_MASK_ISA_POPCNT to OPTION_MASK_ISA_POPCNT_SET.
11222 2023-08-01 Andreas Krebbel <krebbel@linux.ibm.com>
11224 * config/s390/s390.cc (s390_encode_section_info): Assume external
11225 symbols without explicit alignment to be unaligned if
11226 -munaligned-symbols has been specified.
11227 * config/s390/s390.opt (-munaligned-symbols): New option.
11229 2023-08-01 Richard Ball <richard.ball@arm.com>
11231 * gimple-fold.cc (fold_ctor_reference):
11232 Add support for poly_int.
11234 2023-08-01 Georg-Johann Lay <avr@gjlay.de>
11237 * config/avr/avr.cc (avr_optimize_casesi): Set JUMP_LABEL and
11238 LABEL_NUSES of new conditional branch instruction.
11240 2023-08-01 Jan Hubicka <jh@suse.cz>
11242 * tree-vect-loop-manip.cc (vect_do_peeling): Fix profile update after
11243 constant prologue peeling.
11245 2023-08-01 Christophe Lyon <christophe.lyon@linaro.org>
11247 * doc/sourcebuild.texi (arm_v8_1m_main_cde_mve_fp): Fix spelling.
11249 2023-08-01 Pan Li <pan2.li@intel.com>
11250 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11252 * config/riscv/riscv.cc (DYNAMIC_FRM_RTL): New macro.
11253 (STATIC_FRM_P): Ditto.
11254 (struct mode_switching_info): New struct for mode switching.
11255 (struct machine_function): Add new field mode switching.
11256 (riscv_emit_frm_mode_set): Add DYN_CALL emit.
11257 (riscv_frm_adjust_mode_after_call): New function for call mode.
11258 (riscv_frm_emit_after_call_in_bb_end): New function for emit
11259 insn when call as the end of bb.
11260 (riscv_frm_mode_needed): New function for frm mode needed.
11261 (frm_unknown_dynamic_p): Remove call check.
11262 (riscv_mode_needed): Extrac function for frm.
11263 (riscv_frm_mode_after): Add DYN_CALL after.
11264 (riscv_mode_entry): Remove backup rtl initialization.
11265 * config/riscv/vector.md (frm_mode): Add dyn_call.
11266 (fsrmsi_restore_exit): Rename to _volatile.
11267 (fsrmsi_restore_volatile): Likewise.
11269 2023-08-01 Pan Li <pan2.li@intel.com>
11271 * config/riscv/riscv-vector-builtins-bases.cc
11272 (class reverse_binop_frm): Add new template for reversed frm.
11273 (vfsub_frm_obj): New obj.
11274 (vfrsub_frm_obj): Likewise.
11275 * config/riscv/riscv-vector-builtins-bases.h:
11276 (vfsub_frm): New declaration.
11277 (vfrsub_frm): Likewise.
11278 * config/riscv/riscv-vector-builtins-functions.def
11279 (vfsub_frm): New function define.
11280 (vfrsub_frm): Likewise.
11282 2023-08-01 Andrew Pinski <apinski@marvell.com>
11284 PR tree-optimization/93044
11285 * match.pd (nested int casts): A truncation (to the same size or smaller)
11286 can always remove the inner cast.
11288 2023-07-31 Hamza Mahfooz <someguy@effective-light.com>
11291 * doc/invoke.texi (-Wmissing-variable-declarations): Document
11294 2023-07-31 Andrew Pinski <apinski@marvell.com>
11296 PR tree-optimization/106164
11297 * match.pd (`a != b & a <= b`, `a != b & a >= b`,
11298 `a == b | a < b`, `a == b | a > b`): Handle these cases
11301 2023-07-31 Andrew Pinski <apinski@marvell.com>
11303 PR tree-optimization/106164
11304 * match.pd: Extend the `(X CMP1 CST1) AND/IOR (X CMP2 CST2)`
11305 patterns to support `(X CMP1 Y) AND/IOR (X CMP2 Y)`.
11307 2023-07-31 Andrew Pinski <apinski@marvell.com>
11309 PR tree-optimization/100864
11310 * generic-match-head.cc (bitwise_inverted_equal_p): New function.
11311 * gimple-match-head.cc (bitwise_inverted_equal_p): New macro.
11312 (gimple_bitwise_inverted_equal_p): New function.
11313 * match.pd ((~x | y) & x): Use bitwise_inverted_equal_p
11314 instead of direct matching bit_not.
11316 2023-07-31 Costas Argyris <costas.argyris@gmail.com>
11319 * gcc-ar.cc (main): Expand argv and use
11320 temporary response file to call ar if any
11321 expansions were made.
11323 2023-07-31 Andrew MacLeod <amacleod@redhat.com>
11325 PR tree-optimization/110582
11326 * gimple-range-fold.cc (fur_list::get_operand): Do not use the
11327 range vector for non-ssa names.
11329 2023-07-31 David Malcolm <dmalcolm@redhat.com>
11332 * diagnostic-client-data-hooks.h (class sarif_object): New forward
11334 (diagnostic_client_data_hooks::add_sarif_invocation_properties):
11336 * diagnostic-format-sarif.cc: Include "diagnostic-format-sarif.h".
11337 (class sarif_invocation): Inherit from sarif_object rather than
11339 (class sarif_result): Likewise.
11340 (class sarif_ice_notification): Likewise.
11341 (sarif_object::get_or_create_properties): New.
11342 (sarif_invocation::prepare_to_flush): Add "context" param. Use it
11343 to call the context's add_sarif_invocation_properties hook.
11344 (sarif_builder::flush_to_file): Pass m_context to
11345 sarif_invocation::prepare_to_flush.
11346 * diagnostic-format-sarif.h: New header.
11347 * doc/invoke.texi (Developer Options): Clarify that -ftime-report
11348 writes to stderr. Document that if SARIF diagnostic output is
11349 requested then any timing information is written in JSON form as
11350 part of the SARIF output, rather than to stderr.
11351 * timevar.cc: Include "json.h".
11352 (timer::named_items::m_hash_map): Split out type into...
11353 (timer::named_items::hash_map_t): ...this new typedef.
11354 (timer::named_items::make_json): New function.
11355 (timevar_diff): New function.
11356 (make_json_for_timevar_time_def): New function.
11357 (timer::timevar_def::make_json): New function.
11358 (timer::make_json): New function.
11359 * timevar.h (class json::value): New forward decl.
11360 (timer::make_json): New decl.
11361 (timer::timevar_def::make_json): New decl.
11362 * tree-diagnostic-client-data-hooks.cc: Include
11363 "diagnostic-format-sarif.h" and "timevar.h".
11364 (compiler_data_hooks::add_sarif_invocation_properties): New vfunc
11367 2023-07-31 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
11369 * combine.cc (simplify_compare_const): Narrow comparison of
11370 memory and constant.
11371 (try_combine): Adapt new function signature.
11372 (simplify_comparison): Adapt new function signature.
11374 2023-07-31 Kito Cheng <kito.cheng@sifive.com>
11376 * config/riscv/riscv-v.cc (expand_vec_series): Drop unused
11378 (expand_vector_init_insert_elems): Ditto.
11380 2023-07-31 Hao Liu <hliu@os.amperecomputing.com>
11383 * config/aarch64/aarch64.cc (count_ops): Only '* count' for
11384 single_defuse_cycle while counting reduction_latency.
11386 2023-07-31 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
11388 * internal-fn.def (DEF_INTERNAL_COND_FN): New macro.
11389 (DEF_INTERNAL_SIGNED_COND_FN): Ditto.
11390 (COND_ADD): Remove.
11395 (COND_RDIV): Ditto.
11398 (COND_FMIN): Ditto.
11399 (COND_FMAX): Ditto.
11407 (COND_FNMA): Ditto.
11408 (COND_FNMS): Ditto.
11410 (COND_LEN_ADD): Ditto.
11411 (COND_LEN_SUB): Ditto.
11412 (COND_LEN_MUL): Ditto.
11413 (COND_LEN_DIV): Ditto.
11414 (COND_LEN_MOD): Ditto.
11415 (COND_LEN_RDIV): Ditto.
11416 (COND_LEN_MIN): Ditto.
11417 (COND_LEN_MAX): Ditto.
11418 (COND_LEN_FMIN): Ditto.
11419 (COND_LEN_FMAX): Ditto.
11420 (COND_LEN_AND): Ditto.
11421 (COND_LEN_IOR): Ditto.
11422 (COND_LEN_XOR): Ditto.
11423 (COND_LEN_SHL): Ditto.
11424 (COND_LEN_SHR): Ditto.
11425 (COND_LEN_FMA): Ditto.
11426 (COND_LEN_FMS): Ditto.
11427 (COND_LEN_FNMA): Ditto.
11428 (COND_LEN_FNMS): Ditto.
11429 (COND_LEN_NEG): Ditto.
11430 (ADD): New macro define.
11451 2023-07-31 Roger Sayle <roger@nextmovesoftware.com>
11454 * config/i386/i386-features.cc (compute_convert_gain): Check
11455 TARGET_AVX512VL (not TARGET_AVX512F) when considering V2DImode
11456 and V4SImode rotates in STV.
11457 (general_scalar_chain::convert_rotate): Likewise.
11459 2023-07-31 Kito Cheng <kito.cheng@sifive.com>
11461 * config/riscv/autovec.md (abs<mode>2): Remove `.require ()`.
11462 * config/riscv/riscv-protos.h (get_mask_mode): Update return
11464 * config/riscv/riscv-v.cc (rvv_builder::rvv_builder): Remove
11466 (emit_vlmax_insn): Ditto.
11467 (emit_vlmax_fp_insn): Ditto.
11468 (emit_vlmax_ternary_insn): Ditto.
11469 (emit_vlmax_fp_ternary_insn): Ditto.
11470 (emit_nonvlmax_fp_ternary_tu_insn): Ditto.
11471 (emit_nonvlmax_insn): Ditto.
11472 (emit_vlmax_slide_insn): Ditto.
11473 (emit_nonvlmax_slide_tu_insn): Ditto.
11474 (emit_vlmax_merge_insn): Ditto.
11475 (emit_vlmax_masked_insn): Ditto.
11476 (emit_nonvlmax_masked_insn): Ditto.
11477 (emit_vlmax_masked_store_insn): Ditto.
11478 (emit_nonvlmax_masked_store_insn): Ditto.
11479 (emit_vlmax_masked_mu_insn): Ditto.
11480 (emit_nonvlmax_tu_insn): Ditto.
11481 (emit_nonvlmax_fp_tu_insn): Ditto.
11482 (emit_scalar_move_insn): Ditto.
11483 (emit_vlmax_compress_insn): Ditto.
11484 (emit_vlmax_reduction_insn): Ditto.
11485 (emit_vlmax_fp_reduction_insn): Ditto.
11486 (emit_nonvlmax_fp_reduction_insn): Ditto.
11487 (expand_vec_series): Ditto.
11488 (expand_vector_init_merge_repeating_sequence): Ditto.
11489 (expand_vec_perm): Ditto.
11490 (shuffle_merge_patterns): Ditto.
11491 (shuffle_compress_patterns): Ditto.
11492 (shuffle_decompress_patterns): Ditto.
11493 (expand_reduction): Ditto.
11494 (get_mask_mode): Update return type.
11495 * config/riscv/riscv.cc (riscv_get_mask_mode): Check vector type
11496 is valid, and use new get_mask_mode interface.
11498 2023-07-31 Pan Li <pan2.li@intel.com>
11500 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_frm_def):
11501 Move rm suffix before mask.
11503 2023-07-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11505 * config/riscv/autovec-vls.md (@vec_duplicate<mode>): New pattern.
11506 * config/riscv/riscv-v.cc (autovectorize_vector_modes): Add VLS autovec
11509 2023-07-29 Roger Sayle <roger@nextmovesoftware.com>
11512 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
11513 (extzv<mode>): Likewise.
11514 (insv<mode>): Likewise.
11515 (*testqi_ext_3): Likewise.
11516 (*btr<mode>_2): Likewise.
11517 (define_split): Likewise.
11518 (*btsq_imm): Likewise.
11519 (*btrq_imm): Likewise.
11520 (*btcq_imm): Likewise.
11521 (define_peephole2 x3): Likewise.
11522 (*bt<mode>): Likewise
11523 (*bt<mode>_mask): New define_insn_and_split.
11524 (*jcc_bt<mode>): Use QImode for offsets.
11525 (*jcc_bt<mode>_1): Delete obsolete pattern.
11526 (*jcc_bt<mode>_mask): Use QImode offsets.
11527 (*jcc_bt<mode>_mask_1): Likewise.
11528 (define_split): Likewise.
11529 (*bt<mode>_setcqi): Likewise.
11530 (*bt<mode>_setncqi): Likewise.
11531 (*bt<mode>_setnc<mode>): Likewise.
11532 (*bt<mode>_setncqi_2): Likewise.
11533 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
11534 (bmi2_bzhi_<mode>3): Use QImode offsets.
11535 (*bmi2_bzhi_<mode>3): Likewise.
11536 (*bmi2_bzhi_<mode>3_1): Likewise.
11537 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
11538 (@tbm_bextri_<mode>): Likewise.
11540 2023-07-29 Jan Hubicka <jh@suse.cz>
11542 * profile-count.cc (profile_probability::sqrt): New member function.
11543 (profile_probability::pow): Likewise.
11544 * profile-count.h: (profile_probability::sqrt): Declare
11545 (profile_probability::pow): Likewise.
11546 * tree-vect-loop-manip.cc (vect_loop_versioning): Fix profile update.
11548 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
11550 * gimple-range-cache.cc (ssa_cache::merge_range): New.
11551 (ssa_lazy_cache::merge_range): New.
11552 * gimple-range-cache.h (class ssa_cache): Adjust protoypes.
11553 (class ssa_lazy_cache): Ditto.
11554 * gimple-range.cc (assume_query::calculate_op): Use merge_range.
11556 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
11558 * tree-ssa-propagate.cc (substitute_and_fold_engine::value_on_edge):
11559 Move from value-query.cc.
11560 (substitute_and_fold_engine::value_of_stmt): Ditto.
11561 (substitute_and_fold_engine::range_of_expr): New.
11562 * tree-ssa-propagate.h (substitute_and_fold_engine): Inherit from
11563 range_query. New prototypes.
11564 * value-query.cc (value_query::value_on_edge): Relocate.
11565 (value_query::value_of_stmt): Ditto.
11566 * value-query.h (class value_query): Remove.
11567 (class range_query): Remove base class. Adjust prototypes.
11569 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
11571 PR tree-optimization/110205
11572 * gimple-range-cache.h (ranger_cache::m_estimate): Delete.
11573 * range-op-mixed.h (operator_bitwise_xor::op1_op2_relation_effect):
11574 Add final override.
11575 * range-op.cc (operator_lshift): Add missing final overrides.
11576 (operator_rshift): Ditto.
11578 2023-07-28 Jose E. Marchesi <jose.marchesi@oracle.com>
11580 * config/bpf/bpf.cc (bpf_option_override): Disable tail-call
11581 optimizations in BPF target.
11583 2023-07-28 Honza <jh@ryzen4.suse.cz>
11585 * cfgloopmanip.cc (loop_count_in): Break out from ...
11586 (loop_exit_for_scaling): Break out from ...
11587 (update_loop_exit_probability_scale_dom_bbs): Break out from ...;
11588 add more sanity check and debug info.
11589 (scale_loop_profile): ... here.
11590 (create_empty_loop_on_edge): Fix whitespac.
11591 * cfgloopmanip.h (update_loop_exit_probability_scale_dom_bbs): Declare.
11592 * loop-unroll.cc (unroll_loop_constant_iterations): Use
11593 update_loop_exit_probability_scale_dom_bbs.
11594 * tree-ssa-loop-manip.cc (update_exit_probability_after_unrolling): Remove.
11595 (tree_transform_and_unroll_loop): Use
11596 update_loop_exit_probability_scale_dom_bbs.
11597 * tree-ssa-loop-split.cc (split_loop): Use
11598 update_loop_exit_probability_scale_dom_bbs.
11600 2023-07-28 Jan Hubicka <jh@suse.cz>
11602 PR middle-end/77689
11603 * tree-ssa-loop-split.cc: Include value-query.h.
11604 (split_at_bb_p): Analyze cases where EQ/NE can be turned
11605 into LT/LE/GT/GE; return updated guard code.
11606 (split_loop): Use guard code.
11608 2023-07-28 Roger Sayle <roger@nextmovesoftware.com>
11609 Richard Biener <rguenther@suse.de>
11611 PR middle-end/28071
11612 PR rtl-optimization/110587
11613 * expr.cc (emit_group_load_1): Simplify logic for calling
11614 force_reg on ORIG_SRC, to avoid making a copy if the source
11615 is already in a pseudo register.
11617 2023-07-28 Jan Hubicka <jh@suse.cz>
11619 PR middle-end/106923
11620 * tree-ssa-loop-split.cc (connect_loops): Change probability
11621 of the test preconditioning second loop to very_likely.
11622 (fix_loop_bb_probability): Handle correctly case where
11623 on of the arms of the conditional is empty.
11624 (split_loop): Fold the test guarding first condition to
11625 see if it is constant true; Set correct entry block
11626 probabilities of the split loops; determine correct loop
11627 eixt probabilities.
11629 2023-07-28 xuli <xuli1@eswincomputing.com>
11631 * config/riscv/riscv-vector-builtins-bases.cc: remove rounding mode of
11632 vsadd[u] and vssub[u].
11633 * config/riscv/vector.md: Ditto.
11635 2023-07-28 Jan Hubicka <jh@suse.cz>
11637 * tree-ssa-loop-split.cc (split_loop): Also support NE driven
11638 loops when IV test is not overflowing.
11640 2023-07-28 liuhongt <hongtao.liu@intel.com>
11643 * config/i386/sse.md (avx512cd_maskb_vec_dup<mode>): Add
11645 (avx512cd_maskw_vec_dup<mode>): Ditto.
11647 2023-07-27 David Faust <david.faust@oracle.com>
11651 * config/bpf/bpf.opt (msmov): New option.
11652 * config/bpf/bpf.cc (bpf_option_override): Handle it here.
11653 * config/bpf/bpf.md (*extendsidi2): New.
11654 (extendhidi2): New.
11655 (extendqidi2): New.
11656 (extendsisi2): New.
11657 (extendhisi2): New.
11658 (extendqisi2): New.
11659 * doc/invoke.texi (Option Summary): Add -msmov eBPF option.
11660 (eBPF Options): Add -m[no-]smov. Document that -mcpu=v4
11661 also enables -msmov.
11663 2023-07-27 David Faust <david.faust@oracle.com>
11665 * doc/invoke.texi (Option Summary): Remove -mkernel eBPF option.
11666 Add -mbswap and -msdiv eBPF options.
11667 (eBPF Options): Remove -mkernel. Add -mno-{jmpext, jmp32,
11668 alu32, v3-atomics, bswap, sdiv}. Document that -mcpu=v4 also
11671 2023-07-27 David Faust <david.faust@oracle.com>
11673 * config/bpf/bpf.md (add<AM:mode>3): Use %w2 instead of %w1
11674 in pseudo-C dialect output template.
11675 (sub<AM:mode>3): Likewise.
11677 2023-07-27 Jan Hubicka <jh@suse.cz>
11679 * tree-vect-loop.cc (optimize_mask_stores): Make store
11682 2023-07-27 Jan Hubicka <jh@suse.cz>
11684 * cfgloop.h (single_dom_exit): Declare.
11685 * cfgloopmanip.h (update_exit_probability_after_unrolling): Declare.
11686 * cfgrtl.cc (struct cfg_hooks): Fix comment.
11687 * loop-unroll.cc (unroll_loop_constant_iterations): Update exit edge.
11688 * tree-ssa-loop-ivopts.h (single_dom_exit): Do not declare it here.
11689 * tree-ssa-loop-manip.cc (update_exit_probability_after_unrolling):
11691 (tree_transform_and_unroll_loop): ... here;
11693 2023-07-27 Jan Hubicka <jh@suse.cz>
11695 * cfgloopmanip.cc (scale_dominated_blocks_in_loop): Move here from
11696 tree-ssa-loop-manip.cc and avoid recursion.
11697 (scale_loop_profile): Use scale_dominated_blocks_in_loop.
11698 (duplicate_loop_body_to_header_edge): Add DLTHE_FLAG_FLAT_PROFILE
11700 * cfgloopmanip.h (DLTHE_FLAG_FLAT_PROFILE): Define.
11701 (scale_dominated_blocks_in_loop): Declare.
11702 * predict.cc (dump_prediction): Do not ICE on uninitialized probability.
11703 (change_edge_frequency): Remove.
11704 * predict.h (change_edge_frequency): Remove.
11705 * tree-ssa-loop-manip.cc (scale_dominated_blocks_in_loop): Move to
11707 (niter_for_unrolled_loop): Remove.
11708 (tree_transform_and_unroll_loop): Fix profile update.
11710 2023-07-27 Jan Hubicka <jh@suse.cz>
11712 * tree-ssa-loop-im.cc (execute_sm_if_changed): Turn cap probability
11713 to guessed; fix count of new_bb.
11715 2023-07-27 Jan Hubicka <jh@suse.cz>
11717 * profile-count.h (profile_count::apply_probability): Fix
11718 handling of uninitialized probabilities, optimize scaling
11721 2023-07-27 Richard Biener <rguenther@suse.de>
11723 PR tree-optimization/91838
11724 * gimple-match-head.cc: Include attribs.h and asan.h.
11725 * generic-match-head.cc: Likewise.
11726 * match.pd (([rl]shift @0 out-of-bounds) -> zero): New pattern.
11728 2023-07-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11730 * config/riscv/riscv-modes.def (VECTOR_BOOL_MODE): Add VLS modes.
11731 (ADJUST_ALIGNMENT): Ditto.
11732 (ADJUST_PRECISION): Ditto.
11733 (VLS_MODES): Ditto.
11734 (VECTOR_MODE_WITH_PREFIX): Ditto.
11735 * config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): New macro.
11736 * config/riscv/riscv-protos.h (riscv_v_ext_vls_mode_p): New function.
11737 * config/riscv/riscv-v.cc (INCLUDE_ALGORITHM): Add include.
11738 (legitimize_move): Enable basic VLS modes support.
11739 (get_vlmul): Ditto.
11740 (get_ratio): Ditto.
11741 (get_vector_mode): Ditto.
11742 * config/riscv/riscv-vector-switch.def (VLS_ENTRY): Add vls modes.
11743 * config/riscv/riscv.cc (riscv_v_ext_vls_mode_p): New function.
11744 (VLS_ENTRY): New macro.
11745 (riscv_v_ext_mode_p): Add vls modes.
11746 (riscv_get_v_regno_alignment): New function.
11747 (riscv_print_operand): Add vls modes.
11748 (riscv_hard_regno_nregs): Ditto.
11749 (riscv_hard_regno_mode_ok): Ditto.
11750 (riscv_regmode_natural_size): Ditto.
11751 (riscv_vectorize_preferred_vector_alignment): Ditto.
11752 * config/riscv/riscv.md: Ditto.
11753 * config/riscv/vector-iterators.md: Ditto.
11754 * config/riscv/vector.md: Ditto.
11755 * config/riscv/autovec-vls.md: New file.
11757 2023-07-27 Pan Li <pan2.li@intel.com>
11759 * config/riscv/riscv_vector.h (enum RVV_CSR): Removed.
11760 (vread_csr): Ditto.
11761 (vwrite_csr): Ditto.
11763 2023-07-27 demin.han <demin.han@starfivetech.com>
11765 * config/riscv/autovec.md: Delete which_alternative use in split
11767 2023-07-27 Richard Biener <rguenther@suse.de>
11769 * tree-ssa-sink.cc (sink_code_in_bb): Remove recursion, instead
11771 (pass_sink_code::execute): ... in the caller.
11773 2023-07-27 Kewen Lin <linkw@linux.ibm.com>
11774 Richard Biener <rguenther@suse.de>
11776 PR tree-optimization/110776
11777 * tree-vect-stmts.cc (vectorizable_load): Always cost VMAT_ELEMENTWISE
11780 2023-07-26 Xiao Zeng <zengxiao@eswincomputing.com>
11782 * config/riscv/riscv.md: Include zicond.md
11783 * config/riscv/zicond.md: New file.
11785 2023-07-26 Xiao Zeng <zengxiao@eswincomputing.com>
11787 * common/config/riscv/riscv-common.cc: New extension.
11788 * config/riscv/riscv-opts.h (MASK_ZICOND): New mask.
11789 (TARGET_ZICOND): New target.
11791 2023-07-26 Carl Love <cel@us.ibm.com>
11793 * config/rs6000/rs6000-c.cc (find_instance): Add new parameter that
11794 specifies the number of built-in arguments to check.
11795 (altivec_resolve_overloaded_builtin): Update calls to find_instance
11796 to pass the number of built-in arguments to be checked.
11798 2023-07-26 David Faust <david.faust@oracle.com>
11800 * config/bpf/bpf.opt (mv3-atomics): New option.
11801 * config/bpf/bpf.cc (bpf_option_override): Handle it here.
11802 * config/bpf/bpf.h (enum_reg_class): Add R0 class.
11803 (REG_CLASS_NAMES): Likewise.
11804 (REG_CLASS_CONTENTS): Likewise.
11805 (REGNO_REG_CLASS): Handle R0.
11806 * config/bpf/bpf.md (UNSPEC_XADD): Rename to UNSPEC_AADD.
11807 (UNSPEC_AAND): New unspec.
11808 (UNSPEC_AOR): Likewise.
11809 (UNSPEC_AXOR): Likewise.
11810 (UNSPEC_AFADD): Likewise.
11811 (UNSPEC_AFAND): Likewise.
11812 (UNSPEC_AFOR): Likewise.
11813 (UNSPEC_AFXOR): Likewise.
11814 (UNSPEC_AXCHG): Likewise.
11815 (UNSPEC_ACMPX): Likewise.
11816 (atomic_add<mode>): Use UNSPEC_AADD and atomic type attribute.
11818 * config/bpf/atomic.md: ...Here. New file.
11819 * config/bpf/constraints.md (t): New constraint for R0.
11820 * doc/invoke.texi (eBPF Options): Document -mv3-atomics.
11822 2023-07-26 Matthew Malcomson <matthew.malcomson@arm.com>
11824 * tree-vect-stmts.cc (get_group_load_store_type): Reformat
11827 2023-07-26 Carl Love <cel@us.ibm.com>
11829 * config/rs6000/rs6000-builtins.def: Rename
11830 __builtin_altivec_vreplace_un_uv2di as __builtin_altivec_vreplace_un_udi
11831 __builtin_altivec_vreplace_un_uv4si as __builtin_altivec_vreplace_un_usi
11832 __builtin_altivec_vreplace_un_v2df as __builtin_altivec_vreplace_un_df
11833 __builtin_altivec_vreplace_un_v2di as __builtin_altivec_vreplace_un_di
11834 __builtin_altivec_vreplace_un_v4sf as __builtin_altivec_vreplace_un_sf
11835 __builtin_altivec_vreplace_un_v4si as __builtin_altivec_vreplace_un_si.
11836 Rename VREPLACE_UN_UV2DI as VREPLACE_UN_UDI, VREPLACE_UN_UV4SI as
11837 VREPLACE_UN_USI, VREPLACE_UN_V2DF as VREPLACE_UN_DF,
11838 VREPLACE_UN_V2DI as VREPLACE_UN_DI, VREPLACE_UN_V4SF as
11839 VREPLACE_UN_SF, VREPLACE_UN_V4SI as VREPLACE_UN_SI.
11840 Rename vreplace_un_v2di as vreplace_un_di, vreplace_un_v4si as
11841 vreplace_un_si, vreplace_un_v2df as vreplace_un_df,
11842 vreplace_un_v2di as vreplace_un_di, vreplace_un_v4sf as
11843 vreplace_un_sf, vreplace_un_v4si as vreplace_un_si.
11844 * config/rs6000/rs6000-c.cc (find_instance): Add case
11845 RS6000_OVLD_VEC_REPLACE_UN.
11846 * config/rs6000/rs6000-overload.def (__builtin_vec_replace_un):
11847 Fix first argument type. Rename VREPLACE_UN_UV4SI as
11848 VREPLACE_UN_USI, VREPLACE_UN_V4SI as VREPLACE_UN_SI,
11849 VREPLACE_UN_UV2DI as VREPLACE_UN_UDI, VREPLACE_UN_V2DI as
11850 VREPLACE_UN_DI, VREPLACE_UN_V4SF as VREPLACE_UN_SF,
11851 VREPLACE_UN_V2DF as VREPLACE_UN_DF.
11852 * config/rs6000/vsx.md (REPLACE_ELT): Rename the mode_iterator
11853 REPLACE_ELT_V for vector modes.
11854 (REPLACE_ELT): New scalar mode iterator.
11855 (REPLACE_ELT_char): Add scalar attributes.
11856 (vreplace_un_<mode>): Change iterator and mode attribute.
11858 2023-07-26 David Malcolm <dmalcolm@redhat.com>
11861 * Makefile.in (ANALYZER_OBJS): Add analyzer/symbol.o.
11863 2023-07-26 Richard Biener <rguenther@suse.de>
11865 PR tree-optimization/106081
11866 * tree-vect-slp.cc (vect_optimize_slp_pass::start_choosing_layouts):
11867 Assign layout -1 to splats.
11869 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
11871 * range-op-mixed.h (class operator_cast): Add update_bitmask.
11872 * range-op.cc (operator_cast::update_bitmask): New.
11873 (operator_cast::fold_range): Call update_bitmask.
11875 2023-07-26 Li Xu <xuli1@eswincomputing.com>
11877 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): Change
11878 scalar type to float16, eliminate warning.
11879 (vfloat16mf4x3_t): Ditto.
11880 (vfloat16mf4x4_t): Ditto.
11881 (vfloat16mf4x5_t): Ditto.
11882 (vfloat16mf4x6_t): Ditto.
11883 (vfloat16mf4x7_t): Ditto.
11884 (vfloat16mf4x8_t): Ditto.
11885 (vfloat16mf2x2_t): Ditto.
11886 (vfloat16mf2x3_t): Ditto.
11887 (vfloat16mf2x4_t): Ditto.
11888 (vfloat16mf2x5_t): Ditto.
11889 (vfloat16mf2x6_t): Ditto.
11890 (vfloat16mf2x7_t): Ditto.
11891 (vfloat16mf2x8_t): Ditto.
11892 (vfloat16m1x2_t): Ditto.
11893 (vfloat16m1x3_t): Ditto.
11894 (vfloat16m1x4_t): Ditto.
11895 (vfloat16m1x5_t): Ditto.
11896 (vfloat16m1x6_t): Ditto.
11897 (vfloat16m1x7_t): Ditto.
11898 (vfloat16m1x8_t): Ditto.
11899 (vfloat16m2x2_t): Ditto.
11900 (vfloat16m2x3_t): Ditto.
11901 (vfloat16m2x4_t): Ditto.
11902 (vfloat16m4x2_t): Ditto.
11903 * config/riscv/vector-iterators.md: add RVVM4x2DF in iterator V4T.
11904 * config/riscv/vector.md: add tuple mode in attr sew.
11906 2023-07-26 Uros Bizjak <ubizjak@gmail.com>
11909 * config/i386/i386.md (plusminusmult): New code iterator.
11910 * config/i386/mmx.md (mmxdoublevecmode): New mode attribute.
11911 (movq_<mode>_to_sse): New expander.
11912 (<plusminusmult:insn>v2sf3): Macroize expander from addv2sf3,
11913 subv2sf3 and mulv2sf3 using plusminusmult code iterator. Rewrite
11914 as a wrapper around V4SFmode operation.
11915 (mmx_addv2sf3): Change operand 1 and operand 2 predicates to
11916 nonimmediate_operand.
11917 (*mmx_addv2sf3): Remove SSE alternatives. Change operand 1 and
11918 operand 2 predicates to nonimmediate_operand.
11919 (mmx_subv2sf3): Change operand 2 predicate to nonimmediate_operand.
11920 (mmx_subrv2sf3): Change operand 1 predicate to nonimmediate_operand.
11921 (*mmx_subv2sf3): Remove SSE alternatives. Change operand 1 and
11922 operand 2 predicates to nonimmediate_operand.
11923 (mmx_mulv2sf3): Change operand 1 and operand 2 predicates to
11924 nonimmediate_operand.
11925 (*mmx_mulv2sf3): Remove SSE alternatives. Change operand 1 and
11926 operand 2 predicates to nonimmediate_operand.
11927 (divv2sf3): Rewrite as a wrapper around V4SFmode operation.
11928 (<smaxmin:code>v2sf3): Ditto.
11929 (mmx_<smaxmin:code>v2sf3): Change operand 1 and operand 2
11930 predicates to nonimmediate_operand.
11931 (*mmx_<smaxmin:code>v2sf3): Remove SSE alternatives. Change
11932 operand 1 and operand 2 predicates to nonimmediate_operand.
11933 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
11934 (sqrtv2sf2): Rewrite as a wrapper around V4SFmode operation.
11935 (*mmx_haddv2sf3_low): Ditto.
11936 (*mmx_hsubv2sf3_low): Ditto.
11937 (vec_addsubv2sf3): Ditto.
11938 (*mmx_maskcmpv2sf3_comm): Remove.
11939 (*mmx_maskcmpv2sf3): Remove.
11940 (vec_cmpv2sfv2si): Rewrite as a wrapper around V4SFmode operation.
11941 (vcond<V2FI:mode>v2sf): Ditto.
11944 (fnmav2sf4): Ditto.
11945 (fnmsv2sf4): Ditto.
11946 (fix_truncv2sfv2si2): Ditto.
11947 (fixuns_truncv2sfv2si2): Ditto.
11948 (mmx_fix_truncv2sfv2si2): Remove SSE alternatives.
11949 Change operand 1 predicate to nonimmediate_operand.
11950 (floatv2siv2sf2): Rewrite as a wrapper around V4SFmode operation.
11951 (floatunsv2siv2sf2): Ditto.
11952 (mmx_floatv2siv2sf2): Remove SSE alternatives.
11953 Change operand 1 predicate to nonimmediate_operand.
11954 (nearbyintv2sf2): Rewrite as a wrapper around V4SFmode operation.
11955 (rintv2sf2): Ditto.
11956 (lrintv2sfv2si2): Ditto.
11957 (ceilv2sf2): Ditto.
11958 (lceilv2sfv2si2): Ditto.
11959 (floorv2sf2): Ditto.
11960 (lfloorv2sfv2si2): Ditto.
11961 (btruncv2sf2): Ditto.
11962 (roundv2sf2): Ditto.
11963 (lroundv2sfv2si2): Ditto.
11964 (*mmx_roundv2sf2): Remove.
11966 2023-07-26 Jose E. Marchesi <jose.marchesi@oracle.com>
11968 * config/bpf/bpf.md: Fix neg{SI,DI}2 insn.
11970 2023-07-26 Richard Biener <rguenther@suse.de>
11972 PR tree-optimization/110799
11973 * tree-ssa-pre.cc (compute_avail): More thoroughly match
11974 up TBAA behavior of redundant loads.
11976 2023-07-26 Jakub Jelinek <jakub@redhat.com>
11978 PR tree-optimization/110755
11979 * range-op-float.cc (frange_arithmetic): Change +0 result to -0
11980 for PLUS_EXPR or MINUS_EXPR if -frounding-math, inf is negative and
11981 it is exact op1 + (-op1) or op1 - op1.
11983 2023-07-26 Kewen Lin <linkw@linux.ibm.com>
11986 * config/rs6000/vsx.md (define_insn xxeval): Correct vsx
11987 operands output with "x".
11989 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
11991 * range-op.cc (class operator_absu): Add update_bitmask.
11992 (operator_absu::update_bitmask): New.
11994 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
11996 * range-op-mixed.h (class operator_abs): Add update_bitmask.
11997 * range-op.cc (operator_abs::update_bitmask): New.
11999 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
12001 * range-op-mixed.h (class operator_bitwise_not): Add update_bitmask.
12002 * range-op.cc (operator_bitwise_not::update_bitmask): New.
12004 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
12006 * range-op.cc (update_known_bitmask): Handle unary operators.
12008 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
12010 * tree-ssa-ccp.cc (bit_value_unop): Initialize val when appropriate.
12012 2023-07-26 Jin Ma <jinma@linux.alibaba.com>
12014 * config/riscv/riscv.md: Likewise.
12016 2023-07-26 Jan Hubicka <jh@suse.cz>
12018 * profile-count.cc (profile_count::to_sreal_scale): Value is not know
12019 if we divide by zero.
12021 2023-07-25 David Faust <david.faust@oracle.com>
12023 * config/bpf/bpf.cc (bpf_print_operand_address): Don't print
12024 enclosing parentheses for pseudo-C dialect.
12025 * config/bpf/bpf.md (zero_exdendhidi2): Add parentheses around
12026 operands of pseudo-C dialect output templates where needed.
12027 (zero_extendqidi2): Likewise.
12028 (zero_extendsidi2): Likewise.
12029 (*mov<MM:mode>): Likewise.
12031 2023-07-25 Aldy Hernandez <aldyh@redhat.com>
12033 * tree-ssa-ccp.cc (value_mask_to_min_max): Make static.
12034 (bit_value_mult_const): Same.
12035 (get_individual_bits): Same.
12037 2023-07-25 Haochen Gui <guihaoc@gcc.gnu.org>
12040 * config/rs6000/rs6000-builtin.cc (rs6000_gimple_fold_builtin): Gimple
12041 fold RS6000_BIF_XSMINDP and RS6000_BIF_XSMAXDP when fast-math is set.
12042 * config/rs6000/rs6000.md (FMINMAX): New int iterator.
12043 (minmax_op): New int attribute.
12044 (UNSPEC_FMAX, UNSPEC_FMIN): New unspecs.
12045 (f<minmax_op><mode>3): New pattern by UNSPEC_FMAX and UNSPEC_FMIN.
12046 * config/rs6000/rs6000-builtins.def (__builtin_vsx_xsmaxdp): Set
12047 pattern to fmaxdf3.
12048 (__builtin_vsx_xsmindp): Set pattern to fmindf3.
12050 2023-07-24 David Faust <david.faust@oracle.com>
12052 * config/bpf/bpf.md (nop): Add pseudo-c asm dialect template.
12054 2023-07-24 Drew Ross <drross@redhat.com>
12055 Jakub Jelinek <jakub@redhat.com>
12057 PR middle-end/109986
12058 * generic-match-head.cc (bitwise_equal_p): New macro.
12059 * gimple-match-head.cc (bitwise_equal_p): New macro.
12060 (gimple_nop_convert): Declare.
12061 (gimple_bitwise_equal_p): Helper for bitwise_equal_p.
12062 * match.pd ((~X | Y) ^ X -> ~(X & Y)): New simplification.
12064 2023-07-24 Jeff Law <jlaw@ventanamicro.com>
12066 * common/config/riscv/riscv-common.cc (riscv_subset_list::add): Use
12067 single quote rather than backquote in diagnostic.
12069 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
12072 * config/bpf/bpf.opt: New command-line option -msdiv.
12073 * config/bpf/bpf.md: Conditionalize sdiv/smod on bpf_has_sdiv.
12074 * config/bpf/bpf.cc (bpf_option_override): Initialize
12076 * doc/invoke.texi (eBPF Options): Document -msdiv.
12078 2023-07-24 Jeff Law <jlaw@ventanamicro.com>
12080 * config/riscv/riscv.cc (riscv_option_override): Spell out
12081 greater than and use cannot in diagnostic string.
12083 2023-07-24 Richard Biener <rguenther@suse.de>
12085 * tree-vectorizer.h (_slp_tree::push_vec_def): Add.
12086 (_slp_tree::vec_stmts): Remove.
12087 (SLP_TREE_VEC_STMTS): Remove.
12088 * tree-vect-slp.cc (_slp_tree::push_vec_def): Define.
12089 (_slp_tree::_slp_tree): Adjust.
12090 (_slp_tree::~_slp_tree): Likewise.
12091 (vect_get_slp_vect_def): Simplify.
12092 (vect_get_slp_defs): Likewise.
12093 (vect_transform_slp_perm_load_1): Adjust.
12094 (vect_add_slp_permutation): Likewise.
12095 (vect_schedule_slp_node): Likewise.
12096 (vectorize_slp_instance_root_stmt): Likewise.
12097 (vect_schedule_scc): Likewise.
12098 * tree-vect-stmts.cc (vectorizable_bswap): Use push_vec_def.
12099 (vectorizable_call): Likewise.
12100 (vectorizable_call): Likewise.
12101 (vect_create_vectorized_demotion_stmts): Likewise.
12102 (vectorizable_conversion): Likewise.
12103 (vectorizable_assignment): Likewise.
12104 (vectorizable_shift): Likewise.
12105 (vectorizable_operation): Likewise.
12106 (vectorizable_load): Likewise.
12107 (vectorizable_condition): Likewise.
12108 (vectorizable_comparison): Likewise.
12109 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Adjust.
12110 (vectorize_fold_left_reduction): Use push_vec_def.
12111 (vect_transform_reduction): Likewise.
12112 (vect_transform_cycle_phi): Likewise.
12113 (vectorizable_lc_phi): Likewise.
12114 (vectorizable_phi): Likewise.
12115 (vectorizable_recurr): Likewise.
12116 (vectorizable_induction): Likewise.
12117 (vectorizable_live_operation): Likewise.
12119 2023-07-24 Richard Biener <rguenther@suse.de>
12121 * tree-ssa-loop.cc: Remove unused tree-vectorizer.h include.
12123 2023-07-24 Richard Biener <rguenther@suse.de>
12125 * config/i386/i386-builtins.cc: Remove tree-vectorizer.h include.
12126 * config/i386/i386-expand.cc: Likewise.
12127 * config/i386/i386-features.cc: Likewise.
12128 * config/i386/i386-options.cc: Likewise.
12130 2023-07-24 Robin Dapp <rdapp@ventanamicro.com>
12132 * tree-vect-stmts.cc (vectorizable_conversion): Handle
12133 more demotion/promotion for modifier == NONE.
12135 2023-07-24 Roger Sayle <roger@nextmovesoftware.com>
12140 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
12141 (extzv<mode>): Likewise.
12142 (insv<mode>): Likewise.
12143 (*testqi_ext_3): Likewise.
12144 (*btr<mode>_2): Likewise.
12145 (define_split): Likewise.
12146 (*btsq_imm): Likewise.
12147 (*btrq_imm): Likewise.
12148 (*btcq_imm): Likewise.
12149 (define_peephole2 x3): Likewise.
12150 (*bt<mode>): Likewise
12151 (*bt<mode>_mask): New define_insn_and_split.
12152 (*jcc_bt<mode>): Use QImode for offsets.
12153 (*jcc_bt<mode>_1): Delete obsolete pattern.
12154 (*jcc_bt<mode>_mask): Use QImode offsets.
12155 (*jcc_bt<mode>_mask_1): Likewise.
12156 (define_split): Likewise.
12157 (*bt<mode>_setcqi): Likewise.
12158 (*bt<mode>_setncqi): Likewise.
12159 (*bt<mode>_setnc<mode>): Likewise.
12160 (*bt<mode>_setncqi_2): Likewise.
12161 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
12162 (bmi2_bzhi_<mode>3): Use QImode offsets.
12163 (*bmi2_bzhi_<mode>3): Likewise.
12164 (*bmi2_bzhi_<mode>3_1): Likewise.
12165 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
12166 (@tbm_bextri_<mode>): Likewise.
12168 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
12170 * config/bpf/bpf-opts.h (enum bpf_kernel_version): Remove enum.
12171 * config/bpf/bpf.opt (mkernel): Remove option.
12172 * config/bpf/bpf.cc (bpf_target_macros): Do not define
12173 BPF_KERNEL_VERSION_CODE.
12175 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
12178 * config/bpf/bpf.opt (mcpu): Add ISA_V4 and make it the default.
12179 (mbswap): New option.
12180 * config/bpf/bpf-opts.h (enum bpf_isa_version): New value ISA_V4.
12181 * config/bpf/bpf.cc (bpf_option_override): Set bpf_has_bswap.
12182 * config/bpf/bpf.md: Use bswap instructions if available for
12183 bswap* insn, and fix constraint.
12184 * doc/invoke.texi (eBPF Options): Document -mcpu=v4 and -mbswap.
12186 2023-07-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12188 * config/riscv/autovec.md (fold_left_plus_<mode>): New pattern.
12189 (mask_len_fold_left_plus_<mode>): Ditto.
12190 * config/riscv/riscv-protos.h (enum insn_type): New enum.
12191 (enum reduction_type): Ditto.
12192 (expand_reduction): Add in-order reduction.
12193 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_reduction_insn): New function.
12194 (expand_reduction): Add in-order reduction.
12196 2023-07-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
12198 * tree-vect-loop.cc (get_masked_reduction_fn): Add mask_len_fold_left_plus.
12199 (vectorize_fold_left_reduction): Ditto.
12200 (vectorizable_reduction): Ditto.
12201 (vect_transform_reduction): Ditto.
12203 2023-07-24 Richard Biener <rguenther@suse.de>
12205 PR tree-optimization/110777
12206 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_avail):
12207 Avoid propagating abnormals.
12209 2023-07-24 Richard Biener <rguenther@suse.de>
12211 PR tree-optimization/110766
12212 * tree-scalar-evolution.cc
12213 (analyze_and_compute_bitwise_induction_effect): Check the PHI
12214 is defined in the loop header.
12216 2023-07-24 Kewen Lin <linkw@linux.ibm.com>
12218 PR tree-optimization/110740
12219 * tree-vect-loop.cc (vect_analyze_loop_costing): Do not vectorize a
12220 loop with a single scalar iteration.
12222 2023-07-24 Pan Li <pan2.li@intel.com>
12224 * config/riscv/riscv-vector-builtins-shapes.cc
12225 (struct alu_frm_def): Take range check.
12227 2023-07-22 Vineet Gupta <vineetg@rivosinc.com>
12230 * config/riscv/predicates.md (const_0_operand): Add back
12233 2023-07-22 Roger Sayle <roger@nextmovesoftware.com>
12235 * config/i386/i386-expand.cc (ix86_expand_move): Disable the
12236 64-bit insertions into TImode optimizations with -O0, unless
12237 the function has the "naked" attribute (for PR target/110533).
12239 2023-07-22 Andrew Pinski <apinski@marvell.com>
12242 * rtl.h (extended_count): Change last argument type
12245 2023-07-22 Roger Sayle <roger@nextmovesoftware.com>
12247 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
12248 (extzv<mode>): Likewise.
12249 (insv<mode>): Likewise.
12250 (*testqi_ext_3): Likewise.
12251 (*btr<mode>_2): Likewise.
12252 (define_split): Likewise.
12253 (*btsq_imm): Likewise.
12254 (*btrq_imm): Likewise.
12255 (*btcq_imm): Likewise.
12256 (define_peephole2 x3): Likewise.
12257 (*bt<mode>): Likewise
12258 (*bt<mode>_mask): New define_insn_and_split.
12259 (*jcc_bt<mode>): Use QImode for offsets.
12260 (*jcc_bt<mode>_1): Delete obsolete pattern.
12261 (*jcc_bt<mode>_mask): Use QImode offsets.
12262 (*jcc_bt<mode>_mask_1): Likewise.
12263 (define_split): Likewise.
12264 (*bt<mode>_setcqi): Likewise.
12265 (*bt<mode>_setncqi): Likewise.
12266 (*bt<mode>_setnc<mode>): Likewise.
12267 (*bt<mode>_setncqi_2): Likewise.
12268 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
12269 (bmi2_bzhi_<mode>3): Use QImode offsets.
12270 (*bmi2_bzhi_<mode>3): Likewise.
12271 (*bmi2_bzhi_<mode>3_1): Likewise.
12272 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
12273 (@tbm_bextri_<mode>): Likewise.
12275 2023-07-22 Jeff Law <jlaw@ventanamicro.com>
12277 * config/bfin/bfin.md (ones): Fix length computation.
12279 2023-07-22 Vladimir N. Makarov <vmakarov@redhat.com>
12281 * lra-eliminations.cc (update_reg_eliminate): Fix the assert.
12282 (lra_update_fp2sp_elimination): Use HARD_FRAME_POINTER_REGNUM
12283 instead of FRAME_POINTER_REGNUM to spill pseudos.
12285 2023-07-21 Roger Sayle <roger@nextmovesoftware.com>
12286 Richard Biener <rguenther@suse.de>
12289 * gimplify.cc (gimplify_compound_lval): If the array's type
12290 is error_mark_node then return GS_ERROR.
12292 2023-07-21 Cupertino Miranda <cupertino.miranda@oracle.com>
12295 * config/bpf/bpf.opt: Added option -masm=<dialect>.
12296 * config/bpf/bpf-opts.h (enum bpf_asm_dialect): New type.
12297 * config/bpf/bpf.cc (bpf_print_register): New function.
12298 (bpf_print_register): Support pseudo-c syntax for registers.
12299 (bpf_print_operand_address): Likewise.
12300 * config/bpf/bpf.h (ASM_SPEC): handle -msasm.
12301 (ASSEMBLER_DIALECT): Define.
12302 * config/bpf/bpf.md: Added pseudo-c templates.
12303 * doc/invoke.texi (-masm=): New eBPF option item.
12305 2023-07-21 Cupertino Miranda <cupertino.miranda@oracle.com>
12307 * config/bpf/bpf.md: fixed template for neg instruction.
12309 2023-07-21 Jan Hubicka <jh@suse.cz>
12312 * tree-vect-loop.cc (scale_profile_for_vect_loop): Avoid scaling flat
12313 profiles by vectorization factor.
12314 (vect_transform_loop): Check for flat profiles.
12316 2023-07-21 Jan Hubicka <jh@suse.cz>
12318 * cfgloop.h (maybe_flat_loop_profile): Declare
12319 * cfgloopanal.cc (maybe_flat_loop_profile): New function.
12320 * tree-cfg.cc (print_loop_info): Print info about flat profiles.
12322 2023-07-21 Jan Hubicka <jh@suse.cz>
12324 * cfgloop.cc (get_estimated_loop_iterations): Use sreal::to_nearest_int
12325 * cfgloopanal.cc (expected_loop_iterations_unbounded): Likewise.
12326 * predict.cc (estimate_bb_frequencies): Likewise.
12327 * profile.cc (branch_prob): Likewise.
12328 * tree-ssa-loop-niter.cc (estimate_numbers_of_iterations): Likewise
12330 2023-07-21 Iain Sandoe <iain@sandoe.co.uk>
12332 * config.in: Regenerate.
12333 * config/darwin.h (DARWIN_LD_DEMANGLE): New.
12334 (LINK_COMMAND_SPEC_A): Add demangle handling.
12335 * configure: Regenerate.
12336 * configure.ac: Detect linker support for '-demangle'.
12338 2023-07-21 Jan Hubicka <jh@suse.cz>
12340 * sreal.cc (sreal::to_nearest_int): New.
12341 (sreal_verify_basics): Verify also to_nearest_int.
12342 (verify_aritmetics): Likewise.
12343 (sreal_verify_conversions): New.
12344 (sreal_cc_tests): Call sreal_verify_conversions.
12345 * sreal.h: (sreal::to_nearest_int): Declare
12347 2023-07-21 Jan Hubicka <jh@suse.cz>
12349 * tree-ssa-loop-ch.cc (enum ch_decision): New enum.
12350 (should_duplicate_loop_header_p): Return info on profitability.
12351 (do_while_loop_p): Watch for constant conditionals.
12352 (update_profile_after_ch): Do not sanity check that all
12353 static exits are taken.
12354 (ch_base::copy_headers): Run on all loops.
12355 (pass_ch::process_loop_p): Improve heuristics by handling also
12356 do_while loop and duplicating shortest sequence containing all
12359 2023-07-21 Jan Hubicka <jh@suse.cz>
12361 * tree-ssa-loop-niter.cc (finite_loop_p): Reorder to do cheap
12362 tests first; update finite_p flag.
12364 2023-07-21 Jan Hubicka <jh@suse.cz>
12366 * cfgloop.cc (flow_loop_dump): Use print_loop_info.
12367 * cfgloop.h (print_loop_info): Declare.
12368 * tree-cfg.cc (print_loop_info): Break out from ...; add
12369 printing of missing fields and profile
12370 (print_loop): ... here.
12372 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12374 * config/riscv/riscv-v.cc (expand_gather_scatter): Remove redundant variables.
12376 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12378 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Change condition order.
12379 (vectorizable_operation): Ditto.
12381 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12383 * config/riscv/autovec.md: Align order of mask and len.
12384 * config/riscv/riscv-v.cc (expand_load_store): Ditto.
12385 (expand_gather_scatter): Ditto.
12386 * doc/md.texi: Ditto.
12387 * internal-fn.cc (add_len_and_mask_args): Ditto.
12388 (add_mask_and_len_args): Ditto.
12389 (expand_partial_load_optab_fn): Ditto.
12390 (expand_partial_store_optab_fn): Ditto.
12391 (expand_scatter_store_optab_fn): Ditto.
12392 (expand_gather_load_optab_fn): Ditto.
12393 (internal_fn_len_index): Ditto.
12394 (internal_fn_mask_index): Ditto.
12395 (internal_len_load_store_bias): Ditto.
12396 * tree-vect-stmts.cc (vectorizable_store): Ditto.
12397 (vectorizable_load): Ditto.
12399 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12401 * config/riscv/autovec.md (len_maskload<mode><vm>): Change LEN_MASK into MASK_LEN.
12402 (mask_len_load<mode><vm>): Ditto.
12403 (len_maskstore<mode><vm>): Ditto.
12404 (mask_len_store<mode><vm>): Ditto.
12405 (len_mask_gather_load<RATIO64:mode><RATIO64I:mode>): Ditto.
12406 (mask_len_gather_load<RATIO64:mode><RATIO64I:mode>): Ditto.
12407 (len_mask_gather_load<RATIO32:mode><RATIO32I:mode>): Ditto.
12408 (mask_len_gather_load<RATIO32:mode><RATIO32I:mode>): Ditto.
12409 (len_mask_gather_load<RATIO16:mode><RATIO16I:mode>): Ditto.
12410 (mask_len_gather_load<RATIO16:mode><RATIO16I:mode>): Ditto.
12411 (len_mask_gather_load<RATIO8:mode><RATIO8I:mode>): Ditto.
12412 (mask_len_gather_load<RATIO8:mode><RATIO8I:mode>): Ditto.
12413 (len_mask_gather_load<RATIO4:mode><RATIO4I:mode>): Ditto.
12414 (mask_len_gather_load<RATIO4:mode><RATIO4I:mode>): Ditto.
12415 (len_mask_gather_load<RATIO2:mode><RATIO2I:mode>): Ditto.
12416 (mask_len_gather_load<RATIO2:mode><RATIO2I:mode>): Ditto.
12417 (len_mask_gather_load<RATIO1:mode><RATIO1:mode>): Ditto.
12418 (mask_len_gather_load<RATIO1:mode><RATIO1:mode>): Ditto.
12419 (len_mask_scatter_store<RATIO64:mode><RATIO64I:mode>): Ditto.
12420 (mask_len_scatter_store<RATIO64:mode><RATIO64I:mode>): Ditto.
12421 (len_mask_scatter_store<RATIO32:mode><RATIO32I:mode>): Ditto.
12422 (mask_len_scatter_store<RATIO32:mode><RATIO32I:mode>): Ditto.
12423 (len_mask_scatter_store<RATIO16:mode><RATIO16I:mode>): Ditto.
12424 (mask_len_scatter_store<RATIO16:mode><RATIO16I:mode>): Ditto.
12425 (len_mask_scatter_store<RATIO8:mode><RATIO8I:mode>): Ditto.
12426 (mask_len_scatter_store<RATIO8:mode><RATIO8I:mode>): Ditto.
12427 (len_mask_scatter_store<RATIO4:mode><RATIO4I:mode>): Ditto.
12428 (mask_len_scatter_store<RATIO4:mode><RATIO4I:mode>): Ditto.
12429 (len_mask_scatter_store<RATIO2:mode><RATIO2I:mode>): Ditto.
12430 (mask_len_scatter_store<RATIO2:mode><RATIO2I:mode>): Ditto.
12431 (len_mask_scatter_store<RATIO1:mode><RATIO1:mode>): Ditto.
12432 (mask_len_scatter_store<RATIO1:mode><RATIO1:mode>): Ditto.
12433 * doc/md.texi: Ditto.
12434 * genopinit.cc (main): Ditto.
12435 (CMP_NAME): Ditto. Ditto.
12436 * gimple-fold.cc (arith_overflowed_p): Ditto.
12437 (gimple_fold_partial_load_store_mem_ref): Ditto.
12438 (gimple_fold_call): Ditto.
12439 * internal-fn.cc (len_maskload_direct): Ditto.
12440 (mask_len_load_direct): Ditto.
12441 (len_maskstore_direct): Ditto.
12442 (mask_len_store_direct): Ditto.
12443 (expand_call_mem_ref): Ditto.
12444 (expand_len_maskload_optab_fn): Ditto.
12445 (expand_mask_len_load_optab_fn): Ditto.
12446 (expand_len_maskstore_optab_fn): Ditto.
12447 (expand_mask_len_store_optab_fn): Ditto.
12448 (direct_len_maskload_optab_supported_p): Ditto.
12449 (direct_mask_len_load_optab_supported_p): Ditto.
12450 (direct_len_maskstore_optab_supported_p): Ditto.
12451 (direct_mask_len_store_optab_supported_p): Ditto.
12452 (internal_load_fn_p): Ditto.
12453 (internal_store_fn_p): Ditto.
12454 (internal_gather_scatter_fn_p): Ditto.
12455 (internal_fn_len_index): Ditto.
12456 (internal_fn_mask_index): Ditto.
12457 (internal_fn_stored_value_index): Ditto.
12458 (internal_len_load_store_bias): Ditto.
12459 * internal-fn.def (LEN_MASK_GATHER_LOAD): Ditto.
12460 (MASK_LEN_GATHER_LOAD): Ditto.
12461 (LEN_MASK_LOAD): Ditto.
12462 (MASK_LEN_LOAD): Ditto.
12463 (LEN_MASK_SCATTER_STORE): Ditto.
12464 (MASK_LEN_SCATTER_STORE): Ditto.
12465 (LEN_MASK_STORE): Ditto.
12466 (MASK_LEN_STORE): Ditto.
12467 * optabs-query.cc (supports_vec_gather_load_p): Ditto.
12468 (supports_vec_scatter_store_p): Ditto.
12469 * optabs-tree.cc (target_supports_mask_load_store_p): Ditto.
12470 (target_supports_len_load_store_p): Ditto.
12471 * optabs.def (OPTAB_CD): Ditto.
12472 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Ditto.
12473 (call_may_clobber_ref_p_1): Ditto.
12474 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Ditto.
12475 (dse_optimize_stmt): Ditto.
12476 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn): Ditto.
12477 (get_alias_ptr_type_for_ptr_address): Ditto.
12478 * tree-vect-data-refs.cc (vect_gather_scatter_fn_p): Ditto.
12479 * tree-vect-patterns.cc (vect_recog_gather_scatter_pattern): Ditto.
12480 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
12481 (vect_get_strided_load_store_ops): Ditto.
12482 (vectorizable_store): Ditto.
12483 (vectorizable_load): Ditto.
12485 2023-07-21 Haochen Jiang <haochen.jiang@intel.com>
12487 * config/i386/i386.opt: Fix a typo.
12489 2023-07-21 Richard Biener <rguenther@suse.de>
12491 PR tree-optimization/88540
12492 * tree-ssa-phiopt.cc (minmax_replacement): Do not give up
12493 with NaNs but handle the simple case by if-converting to a
12496 2023-07-21 Andrew Pinski <apinski@marvell.com>
12498 * match.pd (minmax<minmax<a,b>,a>->minmax<a,b>): New
12501 2023-07-21 Richard Biener <rguenther@suse.de>
12503 PR tree-optimization/110742
12504 * tree-vect-slp.cc (vect_optimize_slp_pass::get_result_with_layout):
12505 Do not materialize an edge permutation in an external node with
12507 (vect_slp_analyze_node_operations_1): Guard purely internal
12510 2023-07-21 Jan Hubicka <jh@suse.cz>
12512 * cfgloop.cc: Include sreal.h.
12513 (flow_loop_dump): Dump sreal iteration exsitmate.
12514 (get_estimated_loop_iterations): Update.
12515 * cfgloop.h (expected_loop_iterations_by_profile): Declare.
12516 * cfgloopanal.cc (expected_loop_iterations_by_profile): New function.
12517 (expected_loop_iterations_unbounded): Use new API.
12518 * cfgloopmanip.cc (scale_loop_profile): Use
12519 expected_loop_iterations_by_profile
12520 * predict.cc (pass_profile::execute): Likewise.
12521 * profile.cc (branch_prob): Likewise.
12522 * tree-ssa-loop-niter.cc: Include sreal.h.
12523 (estimate_numbers_of_iterations): Likewise
12525 2023-07-21 Kewen Lin <linkw@linux.ibm.com>
12527 PR tree-optimization/110744
12528 * tree-ssa-sccvn.cc (vn_reference_lookup_3): Correct the index of bias
12529 operand for ifn IFN_LEN_STORE.
12531 2023-07-21 liuhongt <hongtao.liu@intel.com>
12534 * common.opt: (fcf-protection=): Add EnumSet attribute to
12535 support combination of params.
12537 2023-07-21 David Malcolm <dmalcolm@redhat.com>
12539 PR middle-end/110612
12540 * text-art/table.cc (table_geometry::table_geometry): Drop m_table
12542 (table_geometry::table_x_to_canvas_x): Add cast to comparison.
12543 (table_geometry::table_y_to_canvas_y): Likewise.
12544 * text-art/table.h (table_geometry::m_table): Drop unused field.
12545 * text-art/widget.h (wrapper_widget::update_child_alloc_rects):
12548 2023-07-20 Uros Bizjak <ubizjak@gmail.com>
12551 * config/i386/i386-features.cc
12552 (general_scalar_chain::compute_convert_gain): Calculate gain
12553 for extend higpart case.
12554 (general_scalar_chain::convert_op): Handle
12555 ASHIFTRT/ASHIFT combined RTX.
12556 (general_scalar_to_vector_candidate_p): Enable ASHIFTRT for
12557 SImode for SSE2 targets. Handle ASHIFTRT/ASHIFT combined RTX.
12558 * config/i386/i386.md (*extend<dwi>2_doubleword_highpart):
12559 New define_insn_and_split pattern.
12560 (*extendv2di2_highpart_stv): Ditto.
12562 2023-07-20 Vladimir N. Makarov <vmakarov@redhat.com>
12564 * lra-constraints.cc (simplify_operand_subreg): Check frame pointer
12567 2023-07-20 Andrew Pinski <apinski@marvell.com>
12569 * combine.cc (dump_combine_stats): Remove.
12570 (dump_combine_total_stats): Remove.
12571 (total_attempts, total_merges, total_extras,
12572 total_successes): Remove.
12573 (combine_instructions): Don't increment total stats
12574 instead use statistics_counter_event.
12575 * dumpfile.cc (print_combine_total_stats): Remove.
12576 * dumpfile.h (print_combine_total_stats): Remove.
12577 (dump_combine_total_stats): Remove.
12578 * passes.cc (finish_optimization_passes):
12579 Don't call print_combine_total_stats.
12580 * rtl.h (dump_combine_total_stats): Remove.
12581 (dump_combine_stats): Remove.
12583 2023-07-20 Jan Hubicka <jh@suse.cz>
12585 * tree-ssa-loop-ch.cc (should_duplicate_loop_header_p): Use BIT instead of TRUTH
12588 2023-07-20 Martin Jambor <mjambor@suse.cz>
12590 * doc/invoke.texi (analyzer-text-art-string-ellipsis-threshold): New.
12591 (analyzer-text-art-ideal-canvas-width): Likewise.
12592 (analyzer-text-art-string-ellipsis-head-len): Likewise.
12593 (analyzer-text-art-string-ellipsis-tail-len): Likewise.
12595 2023-07-20 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
12597 * tree-vect-stmts.cc (check_load_store_for_partial_vectors):
12598 Refine code structure.
12600 2023-07-20 Jan Hubicka <jh@suse.cz>
12602 * tree-ssa-loop-ch.cc (edge_range_query): Rename to ...
12603 (get_range_query): ... this one; do
12604 (static_loop_exit): Add query parametr, turn ranger to reference.
12605 (loop_static_stmt_p): New function.
12606 (loop_static_op_p): New function.
12607 (loop_iv_derived_p): Remove.
12608 (loop_combined_static_and_iv_p): New function.
12609 (should_duplicate_loop_header_p): Discover combined onditionals;
12610 do not track iv derived; improve dumps.
12611 (pass_ch::execute): Fix whitespace.
12613 2023-07-20 Richard Biener <rguenther@suse.de>
12615 PR tree-optimization/110204
12616 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_avail):
12617 Look through copies generated by PRE.
12619 2023-07-20 Matthew Malcomson <matthew.malcomson@arm.com>
12621 * tree-vect-stmts.cc (get_group_load_store_type): Account for
12622 `gap` when checking if need to peel twice.
12624 2023-07-20 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
12626 PR middle-end/77928
12627 * doc/extend.texi: Document iseqsig builtin.
12628 * builtins.cc (fold_builtin_iseqsig): New function.
12629 (fold_builtin_2): Handle BUILT_IN_ISEQSIG.
12630 (is_inexpensive_builtin): Handle BUILT_IN_ISEQSIG.
12631 * builtins.def (BUILT_IN_ISEQSIG): New built-in.
12633 2023-07-20 Pan Li <pan2.li@intel.com>
12635 * config/riscv/vector.md: Fix incorrect match_operand.
12637 2023-07-20 Roger Sayle <roger@nextmovesoftware.com>
12639 * config/i386/i386-expand.cc (ix86_expand_move): Don't call
12640 force_reg, to use SUBREG rather than create a new pseudo when
12641 inserting DFmode fields into TImode with insvti_{high,low}part.
12642 * config/i386/i386.md (*concat<mode><dwi>3_3): Split into two
12643 define_insn_and_split...
12644 (*concatditi3_3): 64-bit implementation. Provide alternative
12645 that allows register allocation to use SSE registers that is
12646 split into vec_concatv2di after reload.
12647 (*concatsidi3_3): 32-bit implementation.
12649 2023-07-20 Richard Biener <rguenther@suse.de>
12651 PR middle-end/61747
12652 * internal-fn.cc (expand_vec_cond_optab_fn): When the
12653 value operands are equal to the original comparison operands
12654 preserve that equality by re-using the comparison expansion.
12655 * optabs.cc (emit_conditional_move): When the value operands
12656 are equal to the comparison operands and would be forced to
12657 a register by prepare_cmp_insn do so earlier, preserving the
12660 2023-07-20 Pan Li <pan2.li@intel.com>
12662 * config/riscv/vector.md: Align pattern format.
12664 2023-07-20 Haochen Jiang <haochen.jiang@intel.com>
12666 * doc/invoke.texi: Remove AVX512VP2INTERSECT in
12667 Granite Rapids{, D} from documentation.
12669 2023-07-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12671 * config/riscv/autovec.md
12672 (len_mask_gather_load<VNX16_QHSD:mode><VNX16_QHSDI:mode>):
12673 Refactor RVV machine modes.
12674 (len_mask_gather_load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
12675 (len_mask_gather_load<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
12676 (len_mask_gather_load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
12677 (len_mask_gather_load<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
12678 (len_mask_gather_load<mode><mode>): Ditto.
12679 (len_mask_gather_load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
12680 (len_mask_scatter_store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
12681 (len_mask_scatter_store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
12682 (len_mask_scatter_store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
12683 (len_mask_scatter_store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
12684 (len_mask_scatter_store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
12685 (len_mask_scatter_store<mode><mode>): Ditto.
12686 (len_mask_scatter_store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
12687 * config/riscv/riscv-modes.def (VECTOR_BOOL_MODE): Ditto.
12688 (ADJUST_NUNITS): Ditto.
12689 (ADJUST_ALIGNMENT): Ditto.
12690 (ADJUST_BYTESIZE): Ditto.
12691 (ADJUST_PRECISION): Ditto.
12692 (RVV_MODES): Ditto.
12693 (RVV_WHOLE_MODES): Ditto.
12694 (RVV_FRACT_MODE): Ditto.
12695 (RVV_NF8_MODES): Ditto.
12696 (RVV_NF4_MODES): Ditto.
12697 (VECTOR_MODES_WITH_PREFIX): Ditto.
12698 (VECTOR_MODE_WITH_PREFIX): Ditto.
12699 (RVV_TUPLE_MODES): Ditto.
12700 (RVV_NF2_MODES): Ditto.
12701 (RVV_TUPLE_PARTIAL_MODES): Ditto.
12702 * config/riscv/riscv-v.cc (struct mode_vtype_group): Ditto.
12704 (TUPLE_ENTRY): Ditto.
12705 (get_vlmul): Ditto.
12707 (get_ratio): Ditto.
12708 (preferred_simd_mode): Ditto.
12709 (autovectorize_vector_modes): Ditto.
12710 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
12711 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): Ditto.
12712 (vbool64_t): Ditto.
12713 (vbool32_t): Ditto.
12714 (vbool16_t): Ditto.
12719 (vint8mf8_t): Ditto.
12720 (vuint8mf8_t): Ditto.
12721 (vint8mf4_t): Ditto.
12722 (vuint8mf4_t): Ditto.
12723 (vint8mf2_t): Ditto.
12724 (vuint8mf2_t): Ditto.
12725 (vint8m1_t): Ditto.
12726 (vuint8m1_t): Ditto.
12727 (vint8m2_t): Ditto.
12728 (vuint8m2_t): Ditto.
12729 (vint8m4_t): Ditto.
12730 (vuint8m4_t): Ditto.
12731 (vint8m8_t): Ditto.
12732 (vuint8m8_t): Ditto.
12733 (vint16mf4_t): Ditto.
12734 (vuint16mf4_t): Ditto.
12735 (vint16mf2_t): Ditto.
12736 (vuint16mf2_t): Ditto.
12737 (vint16m1_t): Ditto.
12738 (vuint16m1_t): Ditto.
12739 (vint16m2_t): Ditto.
12740 (vuint16m2_t): Ditto.
12741 (vint16m4_t): Ditto.
12742 (vuint16m4_t): Ditto.
12743 (vint16m8_t): Ditto.
12744 (vuint16m8_t): Ditto.
12745 (vint32mf2_t): Ditto.
12746 (vuint32mf2_t): Ditto.
12747 (vint32m1_t): Ditto.
12748 (vuint32m1_t): Ditto.
12749 (vint32m2_t): Ditto.
12750 (vuint32m2_t): Ditto.
12751 (vint32m4_t): Ditto.
12752 (vuint32m4_t): Ditto.
12753 (vint32m8_t): Ditto.
12754 (vuint32m8_t): Ditto.
12755 (vint64m1_t): Ditto.
12756 (vuint64m1_t): Ditto.
12757 (vint64m2_t): Ditto.
12758 (vuint64m2_t): Ditto.
12759 (vint64m4_t): Ditto.
12760 (vuint64m4_t): Ditto.
12761 (vint64m8_t): Ditto.
12762 (vuint64m8_t): Ditto.
12763 (vfloat16mf4_t): Ditto.
12764 (vfloat16mf2_t): Ditto.
12765 (vfloat16m1_t): Ditto.
12766 (vfloat16m2_t): Ditto.
12767 (vfloat16m4_t): Ditto.
12768 (vfloat16m8_t): Ditto.
12769 (vfloat32mf2_t): Ditto.
12770 (vfloat32m1_t): Ditto.
12771 (vfloat32m2_t): Ditto.
12772 (vfloat32m4_t): Ditto.
12773 (vfloat32m8_t): Ditto.
12774 (vfloat64m1_t): Ditto.
12775 (vfloat64m2_t): Ditto.
12776 (vfloat64m4_t): Ditto.
12777 (vfloat64m8_t): Ditto.
12778 * config/riscv/riscv-vector-switch.def (ENTRY): Ditto.
12779 (TUPLE_ENTRY): Ditto.
12780 * config/riscv/riscv-vsetvl.cc (change_insn): Ditto.
12781 * config/riscv/riscv.cc (riscv_valid_lo_sum_p): Ditto.
12782 (riscv_v_adjust_nunits): Ditto.
12783 (riscv_v_adjust_bytesize): Ditto.
12784 (riscv_v_adjust_precision): Ditto.
12785 (riscv_convert_vector_bits): Ditto.
12786 * config/riscv/riscv.h (riscv_v_adjust_nunits): Ditto.
12787 * config/riscv/riscv.md: Ditto.
12788 * config/riscv/vector-iterators.md: Ditto.
12789 * config/riscv/vector.md
12790 (@pred_indexed_<order>store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
12791 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
12792 (@pred_indexed_<order>store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
12793 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
12794 (@pred_indexed_<order>store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
12795 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
12796 (@pred_indexed_<order>store<VNX128_Q:mode><VNX128_Q:mode>): Ditto.
12797 (@pred_indexed_<order>load<V1T:mode><V1I:mode>): Ditto.
12798 (@pred_indexed_<order>load<V1T:mode><VNX1_QHSDI:mode>): Ditto.
12799 (@pred_indexed_<order>load<V2T:mode><V2I:mode>): Ditto.
12800 (@pred_indexed_<order>load<V2T:mode><VNX2_QHSDI:mode>): Ditto.
12801 (@pred_indexed_<order>load<V4T:mode><V4I:mode>): Ditto.
12802 (@pred_indexed_<order>load<V4T:mode><VNX4_QHSDI:mode>): Ditto.
12803 (@pred_indexed_<order>load<V8T:mode><V8I:mode>): Ditto.
12804 (@pred_indexed_<order>load<V8T:mode><VNX8_QHSDI:mode>): Ditto.
12805 (@pred_indexed_<order>load<V16T:mode><V16I:mode>): Ditto.
12806 (@pred_indexed_<order>load<V16T:mode><VNX16_QHSI:mode>): Ditto.
12807 (@pred_indexed_<order>load<V32T:mode><V32I:mode>): Ditto.
12808 (@pred_indexed_<order>load<V32T:mode><VNX32_QHI:mode>): Ditto.
12809 (@pred_indexed_<order>load<V64T:mode><V64I:mode>): Ditto.
12810 (@pred_indexed_<order>store<V1T:mode><V1I:mode>): Ditto.
12811 (@pred_indexed_<order>store<V1T:mode><VNX1_QHSDI:mode>): Ditto.
12812 (@pred_indexed_<order>store<V2T:mode><V2I:mode>): Ditto.
12813 (@pred_indexed_<order>store<V2T:mode><VNX2_QHSDI:mode>): Ditto.
12814 (@pred_indexed_<order>store<V4T:mode><V4I:mode>): Ditto.
12815 (@pred_indexed_<order>store<V4T:mode><VNX4_QHSDI:mode>): Ditto.
12816 (@pred_indexed_<order>store<V8T:mode><V8I:mode>): Ditto.
12817 (@pred_indexed_<order>store<V8T:mode><VNX8_QHSDI:mode>): Ditto.
12818 (@pred_indexed_<order>store<V16T:mode><V16I:mode>): Ditto.
12819 (@pred_indexed_<order>store<V16T:mode><VNX16_QHSI:mode>): Ditto.
12820 (@pred_indexed_<order>store<V32T:mode><V32I:mode>): Ditto.
12821 (@pred_indexed_<order>store<V32T:mode><VNX32_QHI:mode>): Ditto.
12822 (@pred_indexed_<order>store<V64T:mode><V64I:mode>): Ditto.
12824 2023-07-19 Vladimir N. Makarov <vmakarov@redhat.com>
12826 * lra-int.h (lra_update_fp2sp_elimination): New prototype.
12827 (lra_asm_insn_error): New prototype.
12828 * lra-spills.cc (remove_pseudos): Add check for pseudo slot memory
12830 (lra_spill): Call lra_update_fp2sp_elimination.
12831 * lra-eliminations.cc: Remove trailing spaces.
12832 (elimination_fp2sp_occured_p): New static flag.
12833 (lra_eliminate_regs_1): Set the flag up.
12834 (update_reg_eliminate): Modify the assert for stack to frame
12835 pointer elimination.
12836 (lra_update_fp2sp_elimination): New function.
12837 (lra_eliminate): Clear flag elimination_fp2sp_occured_p.
12839 2023-07-19 Andrew Carlotti <andrew.carlotti@arm.com>
12841 * config/aarch64/aarch64.h (TARGET_MEMTAG): Remove armv8.5
12843 * config/aarch64/arm_acle.h: Remove unnecessary armv8.x
12844 dependencies from target pragmas.
12845 * config/aarch64/arm_fp16.h (target): Likewise.
12846 * config/aarch64/arm_neon.h (target): Likewise.
12848 2023-07-19 Andrew Pinski <apinski@marvell.com>
12850 PR tree-optimization/110252
12851 * tree-ssa-phiopt.cc (class auto_flow_sensitive): New class.
12852 (auto_flow_sensitive::auto_flow_sensitive): New constructor.
12853 (auto_flow_sensitive::~auto_flow_sensitive): New deconstructor.
12854 (match_simplify_replacement): Temporarily
12855 remove the flow sensitive info on the two statements that might
12858 2023-07-19 Andrew Pinski <apinski@marvell.com>
12860 * gimple-fold.cc (fosa_unwind): Replace `vrange_storage *`
12861 with flow_sensitive_info_storage.
12862 (follow_outer_ssa_edges): Update how to save off the flow
12864 (maybe_fold_comparisons_from_match_pd): Update restoring
12865 of flow sensitive info.
12866 * tree-ssanames.cc (flow_sensitive_info_storage::save): New method.
12867 (flow_sensitive_info_storage::restore): New method.
12868 (flow_sensitive_info_storage::save_and_clear): New method.
12869 (flow_sensitive_info_storage::clear_storage): New method.
12870 * tree-ssanames.h (class flow_sensitive_info_storage): New class.
12872 2023-07-19 Andrew Pinski <apinski@marvell.com>
12874 PR tree-optimization/110726
12875 * match.pd ((a|b)&(a==b),a|(a==b),(a&b)|(a==b)):
12876 Add checks to make sure the type was one bit precision
12879 2023-07-19 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
12881 * doc/md.texi: Add mask_len_fold_left_plus.
12882 * internal-fn.cc (mask_len_fold_left_direct): Ditto.
12883 (expand_mask_len_fold_left_optab_fn): Ditto.
12884 (direct_mask_len_fold_left_optab_supported_p): Ditto.
12885 * internal-fn.def (MASK_LEN_FOLD_LEFT_PLUS): Ditto.
12886 * optabs.def (OPTAB_D): Ditto.
12888 2023-07-19 Jakub Jelinek <jakub@redhat.com>
12890 * tree-switch-conversion.h (class bit_test_cluster): Fix comment typo.
12892 2023-07-19 Jakub Jelinek <jakub@redhat.com>
12894 PR tree-optimization/110731
12895 * wide-int.cc (wi::divmod_internal): Always unpack dividend and
12896 divisor as UNSIGNED regardless of sgn.
12898 2023-07-19 Lehua Ding <lehua.ding@rivai.ai>
12900 * common/config/riscv/riscv-common.cc (riscv_supported_std_ext): Init.
12901 (standard_extensions_p): Add check.
12902 (riscv_subset_list::add): Just return NULL if it failed before.
12903 (riscv_subset_list::parse_std_ext): Continue parse when find a error
12904 (riscv_subset_list::parse): Just return NULL if it failed before.
12905 * config/riscv/riscv-subset.h (class riscv_subset_list): Add field.
12907 2023-07-19 Jan Beulich <jbeulich@suse.com>
12909 * config/i386/i386-expand.cc (ix86_expand_vector_init_duplicate):
12911 (ix86_expand_vector_extract): Use gen_vec_extract_lo /
12912 gen_vec_extract_hi.
12913 (expand_vec_perm_broadcast_1): Use gen_vec_interleave_high /
12914 gen_vec_interleave_low. Rename local variable.
12916 2023-07-19 Jan Beulich <jbeulich@suse.com>
12918 * config/i386/sse.md (vec_dupv2df<mask_name>): Add new AVX512F
12919 alternative. Move AVX512VL part of condition to new "enabled"
12922 2023-07-19 liuhongt <hongtao.liu@intel.com>
12925 * config/i386/i386-builtins.cc
12926 (ix86_register_float16_builtin_type): Remove TARGET_SSE2.
12927 (ix86_register_bf16_builtin_type): Ditto.
12928 * config/i386/i386-c.cc (ix86_target_macros): When TARGET_SSE2
12929 isn't available, undef the macros which are used to check the
12930 backend support of the _Float16/__bf16 types when building
12931 libstdc++ and libgcc.
12932 * config/i386/i386.cc (construct_container): Issue errors for
12933 HFmode/BFmode when TARGET_SSE2 is not available.
12934 (function_value_32): Ditto.
12935 (ix86_scalar_mode_supported_p): Remove TARGET_SSE2 for HFmode/BFmode.
12936 (ix86_libgcc_floating_mode_supported_p): Ditto.
12937 (ix86_emit_support_tinfos): Adjust codes.
12938 (ix86_invalid_conversion): Return diagnostic message string
12939 when there's conversion from/to BF/HFmode w/o TARGET_SSE2.
12940 (ix86_invalid_unary_op): New function.
12941 (ix86_invalid_binary_op): Ditto.
12942 (TARGET_INVALID_UNARY_OP): Define.
12943 (TARGET_INVALID_BINARY_OP): Define.
12944 * config/i386/immintrin.h [__SSE2__]: Remove for fp16/bf16
12945 related instrinsics header files.
12946 * config/i386/i386.h (VALID_SSE2_TYPE_MODE): New macro.
12948 2023-07-18 Uros Bizjak <ubizjak@gmail.com>
12950 * dwarf2asm.cc: Change FALSE to false.
12951 * dwarf2cfi.cc (execute_dwarf2_frame): Change return type to void.
12952 * dwarf2out.cc (matches_main_base): Change return type from
12953 int to bool. Change "last_match" variable to bool.
12954 (dump_struct_debug): Change return type from int to bool.
12955 Change "matches" and "result" function arguments to bool.
12956 (is_pseudo_reg): Change return type from int to bool.
12957 (is_tagged_type): Ditto.
12958 (same_loc_p): Ditto.
12959 (same_dw_val_p): Change return type from int to bool and adjust
12960 function body accordingly.
12961 (same_attr_p): Ditto.
12962 (same_die_p): Ditto.
12963 (is_type_die): Ditto.
12964 (is_declaration_die): Ditto.
12965 (should_move_die_to_comdat): Ditto.
12966 (is_base_type): Ditto.
12967 (is_based_loc): Ditto.
12968 (local_scope_p): Ditto.
12969 (class_scope_p): Ditto.
12970 (class_or_namespace_scope_p): Ditto.
12971 (is_tagged_type): Ditto.
12972 (is_rust): Use void argument.
12973 (is_nested_in_subprogram): Change return type from int to bool.
12974 (contains_subprogram_definition): Ditto.
12975 (gen_struct_or_union_type_die): Change "nested", "complete"
12976 and "ns_decl" variables to bool.
12977 (is_naming_typedef_decl): Change FALSE to false.
12979 2023-07-18 Jan Hubicka <jh@suse.cz>
12981 * tree-ssa-loop-ch.cc (edge_range_query): Take loop argument; be ready
12982 for queries not in headers.
12983 (static_loop_exit): Add basic blck parameter; update use of
12985 (should_duplicate_loop_header_p): Add ranger and static_exits
12986 parameter. Do not account statements that will be optimized
12987 out after duplicaiton in overall size. Add ranger query to
12989 (update_profile_after_ch): Take static_exits has set instead of
12990 single eliminated_edge.
12991 (ch_base::copy_headers): Do all analysis in the first pass;
12992 remember invariant_exits and static_exits.
12994 2023-07-18 Jason Merrill <jason@redhat.com>
12996 * fold-const.cc (native_interpret_aggregate): Skip empty fields.
12998 2023-07-18 Gaius Mulley <gaiusmod2@gmail.com>
13000 * doc/gm2.texi (Semantic checking): Change example testwithptr
13003 2023-07-18 Richard Biener <rguenther@suse.de>
13005 PR middle-end/105715
13006 * gimple-isel.cc (gimple_expand_vec_exprs): Merge into...
13007 (pass_gimple_isel::execute): ... this. Duplicate
13008 comparison defs of COND_EXPRs.
13010 2023-07-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13012 * config/riscv/riscv-selftests.cc (run_poly_int_selftests): Add more selftests.
13013 * config/riscv/riscv.cc (riscv_legitimize_poly_move): Dynamic adjust size of VLA vectors.
13014 (riscv_convert_vector_bits): Ditto.
13016 2023-07-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13018 * config/riscv/autovec.md (vec_shl_insert_<mode>): New patterns.
13019 * config/riscv/riscv-v.cc (shuffle_compress_patterns): Fix bugs.
13021 2023-07-18 Juergen Christ <jchrist@linux.ibm.com>
13023 * config/s390/vx-builtins.md: New vsel pattern.
13025 2023-07-18 liuhongt <hongtao.liu@intel.com>
13028 * config/i386/sse.md (<mask_codefor>one_cmpl<mode>2<mask_name>):
13029 Remove # from assemble output.
13031 2023-07-18 liuhongt <hongtao.liu@intel.com>
13034 * config/i386/sync.md (cmpccxadd_<mode>): Adjust the pattern
13035 to explicitly set FLAGS_REG like *cmp<mode>_1, also add extra
13036 3 define_peephole2 after the pattern.
13038 2023-07-18 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13040 * rtl-ssa/internals.inl: Fix when mode1 and mode2 are not ordred.
13042 2023-07-18 Pan Li <pan2.li@intel.com>
13043 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13045 * config/riscv/riscv.cc (struct machine_function): Add new field.
13046 (riscv_static_frm_mode_p): New function.
13047 (riscv_emit_frm_mode_set): New function for emit FRM.
13048 (riscv_emit_mode_set): Extract function for FRM.
13049 (riscv_mode_needed): Fix the TODO.
13050 (riscv_mode_entry): Initial dynamic frm RTL.
13051 (riscv_mode_exit): Return DYN_EXIT.
13052 * config/riscv/riscv.md: Add rdfrm.
13053 * config/riscv/vector-iterators.md (unspecv): Add DYN_EXIT unspecv.
13054 * config/riscv/vector.md (frm_modee): Add new mode dyn_exit.
13056 (fsrmsi_backup): New pattern for swap.
13057 (fsrmsi_restore): New pattern for restore.
13058 (fsrmsi_restore_exit): New pattern for restore exit.
13059 (frrmsi): New pattern for backup.
13061 2023-07-17 Arsen Arsenović <arsen@aarsen.me>
13063 * doc/extend.texi: Add @cindex on __auto_type.
13065 2023-07-17 Uros Bizjak <ubizjak@gmail.com>
13067 * combine-stack-adj.cc (stack_memref_p): Change return type from
13068 int to bool and adjust function body accordingly.
13069 (rest_of_handle_stack_adjustments): Change return type to void.
13071 2023-07-17 Uros Bizjak <ubizjak@gmail.com>
13073 * combine.cc (struct reg_stat_type): Change last_set_invalid to bool.
13074 (cant_combine_insn_p): Change return type from int to bool and adjust
13075 function body accordingly.
13076 (can_combine_p): Ditto.
13077 (combinable_i3pat): Ditto. Change "i1_not_in_src" and "i0_not_in_src"
13078 function arguments from int to bool.
13079 (contains_muldiv): Change return type from int to bool and adjust
13080 function body accordingly.
13081 (try_combine): Ditto. Change "new_direct_jump" pointer function
13082 argument from int to bool. Change "substed_i2", "substed_i1",
13083 "substed_i0", "added_sets_0", "added_sets_1", "added_sets_2",
13084 "i2dest_in_i2src", "i1dest_in_i1src", "i2dest_in_i1src",
13085 "i0dest_in_i0src", "i1dest_in_i0src", "i2dest_in_i0src",
13086 "i2dest_killed", "i1dest_killed", "i0dest_killed", "i1_feeds_i2_n",
13087 "i0_feeds_i2_n", "i0_feeds_i1_n", "i3_subst_into_i2", "have_mult",
13088 "swap_i2i3", "split_i2i3" and "changed_i3_dest" variables
13090 (subst): Change "in_dest", "in_cond" and "unique_copy" function
13091 arguments from int to bool.
13092 (combine_simplify_rtx): Change "in_dest" and "in_cond" function
13093 arguments from int to bool.
13094 (make_extraction): Change "unsignedp", "in_dest" and "in_compare"
13095 function argument from int to bool.
13096 (force_int_to_mode): Change "just_select" function argument
13097 from int to bool. Change "next_select" variable to bool.
13098 (rtx_equal_for_field_assignment_p): Change return type from
13099 int to bool and adjust function body accordingly.
13100 (merge_outer_ops): Ditto. Change "pcomp_p" pointer function
13101 argument from int to bool.
13102 (get_last_value_validate): Change return type from int to bool
13103 and adjust function body accordingly.
13104 (reg_dead_at_p): Ditto.
13105 (reg_bitfield_target_p): Ditto.
13106 (combine_instructions): Ditto. Change "new_direct_jump"
13108 (can_combine_p): Change return type from int to bool
13109 and adjust function body accordingly.
13110 (likely_spilled_retval_p): Ditto.
13111 (can_change_dest_mode): Change "added_sets" function argument
13113 (find_split_point): Change "unsignedp" variable to bool.
13114 (simplify_if_then_else): Change "comparison_p" and "swapped"
13116 (simplify_set): Change "other_changed" variable to bool.
13117 (expand_compound_operation): Change "unsignedp" variable to bool.
13118 (force_to_mode): Change "just_select" function argument
13119 from int to bool. Change "next_select" variable to bool.
13120 (extended_count): Change "unsignedp" function argument to bool.
13121 (simplify_shift_const_1): Change "complement_p" variable to bool.
13122 (simplify_comparison): Change "changed" variable to bool.
13123 (rest_of_handle_combine): Change return type to void.
13125 2023-07-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
13128 * Makefile.in (INTERNAL_FN_H): Add insn-opinit.h.
13130 2023-07-17 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
13132 * ira.cc (setup_reg_class_relations): Continue
13133 if regclass cl3 is hard_reg_set_empty_p.
13135 2023-07-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13137 * config/riscv/riscv.cc (riscv_option_override): Add sorry check.
13139 2023-07-17 Martin Jambor <mjambor@suse.cz>
13141 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Remove unused variable
13144 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
13146 * tree-ssa-ccp.cc (ccp_finalize): Export value/mask known bits.
13148 2023-07-17 Lehua Ding <lehua.ding@rivai.ai>
13151 * common/config/riscv/riscv-common.cc (riscv_subset_list::handle_implied_ext):
13152 recur add all implied extensions.
13153 (riscv_subset_list::check_implied_ext): Add new method.
13154 (riscv_subset_list::parse): Call checker check_implied_ext.
13155 * config/riscv/riscv-subset.h: Add new method.
13157 2023-07-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13159 * config/riscv/autovec.md (reduc_plus_scal_<mode>): New pattern.
13160 (reduc_smax_scal_<mode>): Ditto.
13161 (reduc_umax_scal_<mode>): Ditto.
13162 (reduc_smin_scal_<mode>): Ditto.
13163 (reduc_umin_scal_<mode>): Ditto.
13164 (reduc_and_scal_<mode>): Ditto.
13165 (reduc_ior_scal_<mode>): Ditto.
13166 (reduc_xor_scal_<mode>): Ditto.
13167 * config/riscv/riscv-protos.h (enum insn_type): Add reduction.
13168 (expand_reduction): New function.
13169 * config/riscv/riscv-v.cc (emit_vlmax_reduction_insn): Ditto.
13170 (emit_vlmax_fp_reduction_insn): Ditto.
13171 (get_m1_mode): Ditto.
13172 (expand_cond_len_binop): Fix name.
13173 (expand_reduction): New function
13174 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Fix VSETVL BUG.
13175 (validate_change_or_fail): New function.
13176 (change_insn): Fix VSETVL BUG.
13177 (change_vsetvl_insn): Ditto.
13178 (pass_vsetvl::backward_demand_fusion): Ditto.
13179 (pass_vsetvl::df_post_optimization): Ditto.
13181 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
13183 * ipa-prop.cc (ipcp_update_bits): Export value/mask known bits.
13185 2023-07-17 Christoph Müllner <christoph.muellner@vrull.eu>
13187 * config/riscv/riscv.cc (riscv_regno_ok_for_index_p):
13188 Remove parameter name from declaration of unused parameter.
13190 2023-07-17 Kewen Lin <linkw@linux.ibm.com>
13192 PR tree-optimization/110652
13193 * tree-vect-stmts.cc (vectorizable_load): Initialize new_temp as
13196 2023-07-17 Richard Biener <rguenther@suse.de>
13198 PR tree-optimization/110669
13199 * tree-scalar-evolution.cc (analyze_and_compute_bitop_with_inv_effect):
13200 Check we matched a header PHI.
13202 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
13204 * tree-ssanames.cc (set_bitmask): New.
13205 * tree-ssanames.h (set_bitmask): New.
13207 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
13209 * value-range.cc (irange_bitmask::verify_mask): Mask need not be
13211 * value-range.h (irange_bitmask::union_): Normalize beforehand.
13212 (irange_bitmask::intersect): Same.
13214 2023-07-17 Andrew Pinski <apinski@marvell.com>
13216 PR tree-optimization/95923
13217 * match.pd ((a|b)&(a==b),a|(a==b),(a&b)|(a==b)): New transformation.
13219 2023-07-17 Roger Sayle <roger@nextmovesoftware.com>
13221 * tree-if-conv.cc (predicate_scalar_phi): Make the arguments
13222 to the std::sort comparison lambda function const.
13224 2023-07-17 Andrew Pinski <apinski@marvell.com>
13226 PR tree-optimization/110666
13227 * match.pd (A NEEQ (A NEEQ CST)): Fix Outer EQ case.
13229 2023-07-17 Mo, Zewei <zewei.mo@intel.com>
13231 * common/config/i386/cpuinfo.h (get_intel_cpu): Handle Lunar Lake,
13232 Arrow Lake and Arrow Lake S.
13233 * common/config/i386/i386-common.cc:
13234 (processor_name): Add arrowlake.
13235 (processor_alias_table): Add arrow lake, arrow lake s and lunar
13237 * common/config/i386/i386-cpuinfo.h (enum processor_subtypes):
13238 Add INTEL_COREI7_ARROWLAKE and INTEL_COREI7_ARROWLAKE_S.
13239 * config.gcc: Add -march=arrowlake and -march=arrowlake-s.
13240 * config/i386/driver-i386.cc (host_detect_local_cpu): Handle
13242 * config/i386/i386-c.cc (ix86_target_macros_internal): Add
13244 * config/i386/i386-options.cc (m_ARROWLAKE): New.
13245 (processor_cost_table): Add arrowlake.
13246 * config/i386/i386.h (enum processor_type):
13247 Add PROCESSOR_ARROWLAKE.
13248 * config/i386/x86-tune.def: Add m_ARROWLAKE.
13249 * doc/extend.texi: Add arrowlake and arrowlake-s.
13250 * doc/invoke.texi: Ditto.
13252 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
13254 * config/i386/sse.md (VI2_AVX2): Delete V32HI since we actually
13255 have the same iterator. Also renaming all the occurence to
13257 (usdot_prod<mode>): New define_expand.
13258 (udot_prod<mode>): Ditto.
13260 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
13262 * common/config/i386/cpuinfo.h (get_available_features):
13264 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SM4_SET,
13265 OPTION_MASK_ISA2_SM4_UNSET): New.
13266 (OPTION_MASK_ISA2_AVX_UNSET): Add SM4.
13267 (ix86_handle_option): Handle -msm4.
13268 * common/config/i386/i386-cpuinfo.h (enum processor_features):
13270 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
13272 * config.gcc: Add sm4intrin.h.
13273 * config/i386/cpuid.h (bit_SM4): New.
13274 * config/i386/i386-builtin.def (BDESC): Add new builtins.
13275 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
13277 * config/i386/i386-isa.def (SM4): Add DEF_PTA(SM4).
13278 * config/i386/i386-options.cc (isa2_opts): Add -msm4.
13279 (ix86_valid_target_attribute_inner_p): Handle sm4.
13280 * config/i386/i386.opt: Add option -msm4.
13281 * config/i386/immintrin.h: Include sm4intrin.h
13282 * config/i386/sse.md (vsm4key4_<mode>): New define insn.
13283 (vsm4rnds4_<mode>): Ditto.
13284 * doc/extend.texi: Document sm4.
13285 * doc/invoke.texi: Document -msm4.
13286 * doc/sourcebuild.texi: Document target sm4.
13287 * config/i386/sm4intrin.h: New file.
13289 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
13291 * common/config/i386/cpuinfo.h (get_available_features):
13293 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SHA512_SET,
13294 OPTION_MASK_ISA2_SHA512_UNSET): New.
13295 (OPTION_MASK_ISA2_AVX_UNSET): Add SHA512.
13296 (ix86_handle_option): Handle -msha512.
13297 * common/config/i386/i386-cpuinfo.h (enum processor_features):
13298 Add FEATURE_SHA512.
13299 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
13301 * config.gcc: Add sha512intrin.h.
13302 * config/i386/cpuid.h (bit_SHA512): New.
13303 * config/i386/i386-builtin-types.def:
13304 Add DEF_FUNCTION_TYPE (V4DI, V4DI, V4DI, V2DI).
13305 * config/i386/i386-builtin.def (BDESC): Add new builtins.
13306 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
13308 * config/i386/i386-expand.cc (ix86_expand_args_builtin): Handle
13309 V4DI_FTYPE_V4DI_V4DI_V2DI and V4DI_FTYPE_V4DI_V2DI.
13310 * config/i386/i386-isa.def (SHA512): Add DEF_PTA(SHA512).
13311 * config/i386/i386-options.cc (isa2_opts): Add -msha512.
13312 (ix86_valid_target_attribute_inner_p): Handle sha512.
13313 * config/i386/i386.opt: Add option -msha512.
13314 * config/i386/immintrin.h: Include sha512intrin.h.
13315 * config/i386/sse.md (vsha512msg1): New define insn.
13316 (vsha512msg2): Ditto.
13317 (vsha512rnds2): Ditto.
13318 * doc/extend.texi: Document sha512.
13319 * doc/invoke.texi: Document -msha512.
13320 * doc/sourcebuild.texi: Document target sha512.
13321 * config/i386/sha512intrin.h: New file.
13323 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
13325 * common/config/i386/cpuinfo.h (get_available_features):
13327 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SM3_SET,
13328 OPTION_MASK_ISA2_SM3_UNSET): New.
13329 (OPTION_MASK_ISA2_AVX_UNSET): Add SM3.
13330 (ix86_handle_option): Handle -msm3.
13331 * common/config/i386/i386-cpuinfo.h (enum processor_features):
13333 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
13335 * config.gcc: Add sm3intrin.h
13336 * config/i386/cpuid.h (bit_SM3): New.
13337 * config/i386/i386-builtin-types.def:
13338 Add DEF_FUNCTION_TYPE (V4SI, V4SI, V4SI, V4SI, INT).
13339 * config/i386/i386-builtin.def (BDESC): Add new builtins.
13340 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
13342 * config/i386/i386-expand.cc (ix86_expand_args_builtin): Handle
13343 V4SI_FTYPE_V4SI_V4SI_V4SI_INT.
13344 * config/i386/i386-isa.def (SM3): Add DEF_PTA(SM3).
13345 * config/i386/i386-options.cc (isa2_opts): Add -msm3.
13346 (ix86_valid_target_attribute_inner_p): Handle sm3.
13347 * config/i386/i386.opt: Add option -msm3.
13348 * config/i386/immintrin.h: Include sm3intrin.h.
13349 * config/i386/sse.md (vsm3msg1): New define insn.
13351 (vsm3rnds2): Ditto.
13352 * doc/extend.texi: Document sm3.
13353 * doc/invoke.texi: Document -msm3.
13354 * doc/sourcebuild.texi: Document target sm3.
13355 * config/i386/sm3intrin.h: New file.
13357 2023-07-17 Kong Lingling <lingling.kong@intel.com>
13358 Haochen Jiang <haochen.jiang@intel.com>
13360 * common/config/i386/cpuinfo.h (get_available_features): Detect
13362 * common/config/i386/i386-common.cc
13363 (OPTION_MASK_ISA2_AVXVNNIINT16_SET): New.
13364 (OPTION_MASK_ISA2_AVXVNNIINT16_UNSET): Ditto.
13365 (ix86_handle_option): Handle -mavxvnniint16.
13366 * common/config/i386/i386-cpuinfo.h (enum processor_features):
13367 Add FEATURE_AVXVNNIINT16.
13368 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
13370 * config.gcc: Add avxvnniint16.h.
13371 * config/i386/avxvnniint16intrin.h: New file.
13372 * config/i386/cpuid.h (bit_AVXVNNIINT16): New.
13373 * config/i386/i386-builtin.def: Add new builtins.
13374 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
13376 * config/i386/i386-options.cc (isa2_opts): Add -mavxvnniint16.
13377 (ix86_valid_target_attribute_inner_p): Handle avxvnniint16intrin.h.
13378 * config/i386/i386-isa.def: Add DEF_PTA(AVXVNNIINT16).
13379 * config/i386/i386.opt: Add option -mavxvnniint16.
13380 * config/i386/immintrin.h: Include avxvnniint16.h.
13381 * config/i386/sse.md
13382 (vpdp<vpdpwprodtype>_<mode>): New define_insn.
13383 * doc/extend.texi: Document avxvnniint16.
13384 * doc/invoke.texi: Document -mavxvnniint16.
13385 * doc/sourcebuild.texi: Document target avxvnniint16.
13387 2023-07-16 Jan Hubicka <jh@suse.cz>
13389 PR middle-end/110649
13390 * tree-vect-loop.cc (scale_profile_for_vect_loop): Rewrite.
13391 (vect_transform_loop): Move scale_profile_for_vect_loop after
13392 upper bound updates.
13394 2023-07-16 Jan Hubicka <jh@suse.cz>
13396 PR tree-optimization/110649
13397 * tree-vect-loop.cc (optimize_mask_stores): Set correctly
13398 probability of the if-then-else construct.
13400 2023-07-16 Jan Hubicka <jh@suse.cz>
13402 PR middle-end/110649
13403 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Avoid double profile update.
13405 2023-07-15 Andrew Pinski <apinski@marvell.com>
13407 * doc/contrib.texi: Update my entry.
13409 2023-07-15 John David Anglin <danglin@gcc.gnu.org>
13411 * config/pa/pa.md: Define constants R1_REGNUM, R19_REGNUM and
13413 (tgd_load): Restrict to !TARGET_64BIT. Use register constants.
13414 (tld_load): Likewise.
13415 (tgd_load_pic): Change to expander.
13416 (tld_load_pic, tld_offset_load, tp_load): Likewise.
13417 (tie_load_pic, tle_load): Likewise.
13418 (tgd_load_picsi, tgd_load_picdi): New.
13419 (tld_load_picsi, tld_load_picdi): New.
13420 (tld_offset_load<P:mode>): New.
13421 (tp_load<P:mode>): New.
13422 (tie_load_picsi, tie_load_picdi): New.
13423 (tle_load<P:mode>): New.
13425 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
13427 * config/arm/arm-mve-builtins-base.cc (vcmlaq, vcmlaq_rot90)
13428 (vcmlaq_rot180, vcmlaq_rot270): New.
13429 * config/arm/arm-mve-builtins-base.def (vcmlaq, vcmlaq_rot90)
13430 (vcmlaq_rot180, vcmlaq_rot270): New.
13431 * config/arm/arm-mve-builtins-base.h: (vcmlaq, vcmlaq_rot90)
13432 (vcmlaq_rot180, vcmlaq_rot270): New.
13433 * config/arm/arm-mve-builtins.cc
13434 (function_instance::has_inactive_argument): Handle vcmlaq,
13435 vcmlaq_rot90, vcmlaq_rot180, vcmlaq_rot270.
13436 * config/arm/arm_mve.h (vcmlaq): Delete.
13437 (vcmlaq_rot180): Delete.
13438 (vcmlaq_rot270): Delete.
13439 (vcmlaq_rot90): Delete.
13440 (vcmlaq_m): Delete.
13441 (vcmlaq_rot180_m): Delete.
13442 (vcmlaq_rot270_m): Delete.
13443 (vcmlaq_rot90_m): Delete.
13444 (vcmlaq_f16): Delete.
13445 (vcmlaq_rot180_f16): Delete.
13446 (vcmlaq_rot270_f16): Delete.
13447 (vcmlaq_rot90_f16): Delete.
13448 (vcmlaq_f32): Delete.
13449 (vcmlaq_rot180_f32): Delete.
13450 (vcmlaq_rot270_f32): Delete.
13451 (vcmlaq_rot90_f32): Delete.
13452 (vcmlaq_m_f32): Delete.
13453 (vcmlaq_m_f16): Delete.
13454 (vcmlaq_rot180_m_f32): Delete.
13455 (vcmlaq_rot180_m_f16): Delete.
13456 (vcmlaq_rot270_m_f32): Delete.
13457 (vcmlaq_rot270_m_f16): Delete.
13458 (vcmlaq_rot90_m_f32): Delete.
13459 (vcmlaq_rot90_m_f16): Delete.
13460 (__arm_vcmlaq_f16): Delete.
13461 (__arm_vcmlaq_rot180_f16): Delete.
13462 (__arm_vcmlaq_rot270_f16): Delete.
13463 (__arm_vcmlaq_rot90_f16): Delete.
13464 (__arm_vcmlaq_f32): Delete.
13465 (__arm_vcmlaq_rot180_f32): Delete.
13466 (__arm_vcmlaq_rot270_f32): Delete.
13467 (__arm_vcmlaq_rot90_f32): Delete.
13468 (__arm_vcmlaq_m_f32): Delete.
13469 (__arm_vcmlaq_m_f16): Delete.
13470 (__arm_vcmlaq_rot180_m_f32): Delete.
13471 (__arm_vcmlaq_rot180_m_f16): Delete.
13472 (__arm_vcmlaq_rot270_m_f32): Delete.
13473 (__arm_vcmlaq_rot270_m_f16): Delete.
13474 (__arm_vcmlaq_rot90_m_f32): Delete.
13475 (__arm_vcmlaq_rot90_m_f16): Delete.
13476 (__arm_vcmlaq): Delete.
13477 (__arm_vcmlaq_rot180): Delete.
13478 (__arm_vcmlaq_rot270): Delete.
13479 (__arm_vcmlaq_rot90): Delete.
13480 (__arm_vcmlaq_m): Delete.
13481 (__arm_vcmlaq_rot180_m): Delete.
13482 (__arm_vcmlaq_rot270_m): Delete.
13483 (__arm_vcmlaq_rot90_m): Delete.
13485 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
13487 * config/arm/arm_mve_builtins.def (vcmlaq_rot90_f)
13488 (vcmlaq_rot270_f, vcmlaq_rot180_f, vcmlaq_f): Add "_f" suffix.
13489 * config/arm/iterators.md (MVE_VCMLAQ_M): New.
13490 (mve_insn): Add vcmla.
13491 (rot): Add VCMLAQ_M_F, VCMLAQ_ROT90_M_F, VCMLAQ_ROT180_M_F,
13493 (mve_rot): Add VCMLAQ_M_F, VCMLAQ_ROT90_M_F, VCMLAQ_ROT180_M_F,
13495 * config/arm/mve.md (mve_vcmlaq<mve_rot><mode>): Rename into ...
13496 (@mve_<mve_insn>q<mve_rot>_f<mode>): ... this.
13497 (mve_vcmlaq_m_f<mode>, mve_vcmlaq_rot180_m_f<mode>)
13498 (mve_vcmlaq_rot270_m_f<mode>, mve_vcmlaq_rot90_m_f<mode>): Merge
13500 (@mve_<mve_insn>q<mve_rot>_m_f<mode>): ... this.
13502 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
13504 * config/arm/arm-mve-builtins-base.cc (vcmulq, vcmulq_rot90)
13505 (vcmulq_rot180, vcmulq_rot270): New.
13506 * config/arm/arm-mve-builtins-base.def (vcmulq, vcmulq_rot90)
13507 (vcmulq_rot180, vcmulq_rot270): New.
13508 * config/arm/arm-mve-builtins-base.h: (vcmulq, vcmulq_rot90)
13509 (vcmulq_rot180, vcmulq_rot270): New.
13510 * config/arm/arm_mve.h (vcmulq_rot90): Delete.
13511 (vcmulq_rot270): Delete.
13512 (vcmulq_rot180): Delete.
13514 (vcmulq_m): Delete.
13515 (vcmulq_rot180_m): Delete.
13516 (vcmulq_rot270_m): Delete.
13517 (vcmulq_rot90_m): Delete.
13518 (vcmulq_x): Delete.
13519 (vcmulq_rot90_x): Delete.
13520 (vcmulq_rot180_x): Delete.
13521 (vcmulq_rot270_x): Delete.
13522 (vcmulq_rot90_f16): Delete.
13523 (vcmulq_rot270_f16): Delete.
13524 (vcmulq_rot180_f16): Delete.
13525 (vcmulq_f16): Delete.
13526 (vcmulq_rot90_f32): Delete.
13527 (vcmulq_rot270_f32): Delete.
13528 (vcmulq_rot180_f32): Delete.
13529 (vcmulq_f32): Delete.
13530 (vcmulq_m_f32): Delete.
13531 (vcmulq_m_f16): Delete.
13532 (vcmulq_rot180_m_f32): Delete.
13533 (vcmulq_rot180_m_f16): Delete.
13534 (vcmulq_rot270_m_f32): Delete.
13535 (vcmulq_rot270_m_f16): Delete.
13536 (vcmulq_rot90_m_f32): Delete.
13537 (vcmulq_rot90_m_f16): Delete.
13538 (vcmulq_x_f16): Delete.
13539 (vcmulq_x_f32): Delete.
13540 (vcmulq_rot90_x_f16): Delete.
13541 (vcmulq_rot90_x_f32): Delete.
13542 (vcmulq_rot180_x_f16): Delete.
13543 (vcmulq_rot180_x_f32): Delete.
13544 (vcmulq_rot270_x_f16): Delete.
13545 (vcmulq_rot270_x_f32): Delete.
13546 (__arm_vcmulq_rot90_f16): Delete.
13547 (__arm_vcmulq_rot270_f16): Delete.
13548 (__arm_vcmulq_rot180_f16): Delete.
13549 (__arm_vcmulq_f16): Delete.
13550 (__arm_vcmulq_rot90_f32): Delete.
13551 (__arm_vcmulq_rot270_f32): Delete.
13552 (__arm_vcmulq_rot180_f32): Delete.
13553 (__arm_vcmulq_f32): Delete.
13554 (__arm_vcmulq_m_f32): Delete.
13555 (__arm_vcmulq_m_f16): Delete.
13556 (__arm_vcmulq_rot180_m_f32): Delete.
13557 (__arm_vcmulq_rot180_m_f16): Delete.
13558 (__arm_vcmulq_rot270_m_f32): Delete.
13559 (__arm_vcmulq_rot270_m_f16): Delete.
13560 (__arm_vcmulq_rot90_m_f32): Delete.
13561 (__arm_vcmulq_rot90_m_f16): Delete.
13562 (__arm_vcmulq_x_f16): Delete.
13563 (__arm_vcmulq_x_f32): Delete.
13564 (__arm_vcmulq_rot90_x_f16): Delete.
13565 (__arm_vcmulq_rot90_x_f32): Delete.
13566 (__arm_vcmulq_rot180_x_f16): Delete.
13567 (__arm_vcmulq_rot180_x_f32): Delete.
13568 (__arm_vcmulq_rot270_x_f16): Delete.
13569 (__arm_vcmulq_rot270_x_f32): Delete.
13570 (__arm_vcmulq_rot90): Delete.
13571 (__arm_vcmulq_rot270): Delete.
13572 (__arm_vcmulq_rot180): Delete.
13573 (__arm_vcmulq): Delete.
13574 (__arm_vcmulq_m): Delete.
13575 (__arm_vcmulq_rot180_m): Delete.
13576 (__arm_vcmulq_rot270_m): Delete.
13577 (__arm_vcmulq_rot90_m): Delete.
13578 (__arm_vcmulq_x): Delete.
13579 (__arm_vcmulq_rot90_x): Delete.
13580 (__arm_vcmulq_rot180_x): Delete.
13581 (__arm_vcmulq_rot270_x): Delete.
13583 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
13585 * config/arm/arm_mve_builtins.def (vcmulq_rot90_f)
13586 (vcmulq_rot270_f, vcmulq_rot180_f, vcmulq_f): Add "_f" suffix.
13587 * config/arm/iterators.md (MVE_VCADDQ_VCMULQ)
13588 (MVE_VCADDQ_VCMULQ_M): New.
13589 (mve_insn): Add vcmul.
13590 (rot): Add VCMULQ_M_F, VCMULQ_ROT90_M_F, VCMULQ_ROT180_M_F,
13593 (mve_rot): Add VCMULQ_M_F, VCMULQ_ROT90_M_F, VCMULQ_ROT180_M_F,
13595 * config/arm/mve.md (mve_vcmulq<mve_rot><mode>): Merge into
13596 @mve_<mve_insn>q<mve_rot>_f<mode>.
13597 (mve_vcmulq_m_f<mode>, mve_vcmulq_rot180_m_f<mode>)
13598 (mve_vcmulq_rot270_m_f<mode>, mve_vcmulq_rot90_m_f<mode>): Merge
13599 into @mve_<mve_insn>q<mve_rot>_m_f<mode>.
13601 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
13603 * config/arm/arm-mve-builtins-base.cc (vcaddq_rot90)
13604 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
13605 * config/arm/arm-mve-builtins-base.def (vcaddq_rot90)
13606 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
13607 * config/arm/arm-mve-builtins-base.h: (vcaddq_rot90)
13608 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
13609 * config/arm/arm-mve-builtins-functions.h (class
13610 unspec_mve_function_exact_insn_rot): New.
13611 * config/arm/arm_mve.h (vcaddq_rot90): Delete.
13612 (vcaddq_rot270): Delete.
13613 (vhcaddq_rot90): Delete.
13614 (vhcaddq_rot270): Delete.
13615 (vcaddq_rot270_m): Delete.
13616 (vcaddq_rot90_m): Delete.
13617 (vhcaddq_rot270_m): Delete.
13618 (vhcaddq_rot90_m): Delete.
13619 (vcaddq_rot90_x): Delete.
13620 (vcaddq_rot270_x): Delete.
13621 (vhcaddq_rot90_x): Delete.
13622 (vhcaddq_rot270_x): Delete.
13623 (vcaddq_rot90_u8): Delete.
13624 (vcaddq_rot270_u8): Delete.
13625 (vhcaddq_rot90_s8): Delete.
13626 (vhcaddq_rot270_s8): Delete.
13627 (vcaddq_rot90_s8): Delete.
13628 (vcaddq_rot270_s8): Delete.
13629 (vcaddq_rot90_u16): Delete.
13630 (vcaddq_rot270_u16): Delete.
13631 (vhcaddq_rot90_s16): Delete.
13632 (vhcaddq_rot270_s16): Delete.
13633 (vcaddq_rot90_s16): Delete.
13634 (vcaddq_rot270_s16): Delete.
13635 (vcaddq_rot90_u32): Delete.
13636 (vcaddq_rot270_u32): Delete.
13637 (vhcaddq_rot90_s32): Delete.
13638 (vhcaddq_rot270_s32): Delete.
13639 (vcaddq_rot90_s32): Delete.
13640 (vcaddq_rot270_s32): Delete.
13641 (vcaddq_rot90_f16): Delete.
13642 (vcaddq_rot270_f16): Delete.
13643 (vcaddq_rot90_f32): Delete.
13644 (vcaddq_rot270_f32): Delete.
13645 (vcaddq_rot270_m_s8): Delete.
13646 (vcaddq_rot270_m_s32): Delete.
13647 (vcaddq_rot270_m_s16): Delete.
13648 (vcaddq_rot270_m_u8): Delete.
13649 (vcaddq_rot270_m_u32): Delete.
13650 (vcaddq_rot270_m_u16): Delete.
13651 (vcaddq_rot90_m_s8): Delete.
13652 (vcaddq_rot90_m_s32): Delete.
13653 (vcaddq_rot90_m_s16): Delete.
13654 (vcaddq_rot90_m_u8): Delete.
13655 (vcaddq_rot90_m_u32): Delete.
13656 (vcaddq_rot90_m_u16): Delete.
13657 (vhcaddq_rot270_m_s8): Delete.
13658 (vhcaddq_rot270_m_s32): Delete.
13659 (vhcaddq_rot270_m_s16): Delete.
13660 (vhcaddq_rot90_m_s8): Delete.
13661 (vhcaddq_rot90_m_s32): Delete.
13662 (vhcaddq_rot90_m_s16): Delete.
13663 (vcaddq_rot270_m_f32): Delete.
13664 (vcaddq_rot270_m_f16): Delete.
13665 (vcaddq_rot90_m_f32): Delete.
13666 (vcaddq_rot90_m_f16): Delete.
13667 (vcaddq_rot90_x_s8): Delete.
13668 (vcaddq_rot90_x_s16): Delete.
13669 (vcaddq_rot90_x_s32): Delete.
13670 (vcaddq_rot90_x_u8): Delete.
13671 (vcaddq_rot90_x_u16): Delete.
13672 (vcaddq_rot90_x_u32): Delete.
13673 (vcaddq_rot270_x_s8): Delete.
13674 (vcaddq_rot270_x_s16): Delete.
13675 (vcaddq_rot270_x_s32): Delete.
13676 (vcaddq_rot270_x_u8): Delete.
13677 (vcaddq_rot270_x_u16): Delete.
13678 (vcaddq_rot270_x_u32): Delete.
13679 (vhcaddq_rot90_x_s8): Delete.
13680 (vhcaddq_rot90_x_s16): Delete.
13681 (vhcaddq_rot90_x_s32): Delete.
13682 (vhcaddq_rot270_x_s8): Delete.
13683 (vhcaddq_rot270_x_s16): Delete.
13684 (vhcaddq_rot270_x_s32): Delete.
13685 (vcaddq_rot90_x_f16): Delete.
13686 (vcaddq_rot90_x_f32): Delete.
13687 (vcaddq_rot270_x_f16): Delete.
13688 (vcaddq_rot270_x_f32): Delete.
13689 (__arm_vcaddq_rot90_u8): Delete.
13690 (__arm_vcaddq_rot270_u8): Delete.
13691 (__arm_vhcaddq_rot90_s8): Delete.
13692 (__arm_vhcaddq_rot270_s8): Delete.
13693 (__arm_vcaddq_rot90_s8): Delete.
13694 (__arm_vcaddq_rot270_s8): Delete.
13695 (__arm_vcaddq_rot90_u16): Delete.
13696 (__arm_vcaddq_rot270_u16): Delete.
13697 (__arm_vhcaddq_rot90_s16): Delete.
13698 (__arm_vhcaddq_rot270_s16): Delete.
13699 (__arm_vcaddq_rot90_s16): Delete.
13700 (__arm_vcaddq_rot270_s16): Delete.
13701 (__arm_vcaddq_rot90_u32): Delete.
13702 (__arm_vcaddq_rot270_u32): Delete.
13703 (__arm_vhcaddq_rot90_s32): Delete.
13704 (__arm_vhcaddq_rot270_s32): Delete.
13705 (__arm_vcaddq_rot90_s32): Delete.
13706 (__arm_vcaddq_rot270_s32): Delete.
13707 (__arm_vcaddq_rot270_m_s8): Delete.
13708 (__arm_vcaddq_rot270_m_s32): Delete.
13709 (__arm_vcaddq_rot270_m_s16): Delete.
13710 (__arm_vcaddq_rot270_m_u8): Delete.
13711 (__arm_vcaddq_rot270_m_u32): Delete.
13712 (__arm_vcaddq_rot270_m_u16): Delete.
13713 (__arm_vcaddq_rot90_m_s8): Delete.
13714 (__arm_vcaddq_rot90_m_s32): Delete.
13715 (__arm_vcaddq_rot90_m_s16): Delete.
13716 (__arm_vcaddq_rot90_m_u8): Delete.
13717 (__arm_vcaddq_rot90_m_u32): Delete.
13718 (__arm_vcaddq_rot90_m_u16): Delete.
13719 (__arm_vhcaddq_rot270_m_s8): Delete.
13720 (__arm_vhcaddq_rot270_m_s32): Delete.
13721 (__arm_vhcaddq_rot270_m_s16): Delete.
13722 (__arm_vhcaddq_rot90_m_s8): Delete.
13723 (__arm_vhcaddq_rot90_m_s32): Delete.
13724 (__arm_vhcaddq_rot90_m_s16): Delete.
13725 (__arm_vcaddq_rot90_x_s8): Delete.
13726 (__arm_vcaddq_rot90_x_s16): Delete.
13727 (__arm_vcaddq_rot90_x_s32): Delete.
13728 (__arm_vcaddq_rot90_x_u8): Delete.
13729 (__arm_vcaddq_rot90_x_u16): Delete.
13730 (__arm_vcaddq_rot90_x_u32): Delete.
13731 (__arm_vcaddq_rot270_x_s8): Delete.
13732 (__arm_vcaddq_rot270_x_s16): Delete.
13733 (__arm_vcaddq_rot270_x_s32): Delete.
13734 (__arm_vcaddq_rot270_x_u8): Delete.
13735 (__arm_vcaddq_rot270_x_u16): Delete.
13736 (__arm_vcaddq_rot270_x_u32): Delete.
13737 (__arm_vhcaddq_rot90_x_s8): Delete.
13738 (__arm_vhcaddq_rot90_x_s16): Delete.
13739 (__arm_vhcaddq_rot90_x_s32): Delete.
13740 (__arm_vhcaddq_rot270_x_s8): Delete.
13741 (__arm_vhcaddq_rot270_x_s16): Delete.
13742 (__arm_vhcaddq_rot270_x_s32): Delete.
13743 (__arm_vcaddq_rot90_f16): Delete.
13744 (__arm_vcaddq_rot270_f16): Delete.
13745 (__arm_vcaddq_rot90_f32): Delete.
13746 (__arm_vcaddq_rot270_f32): Delete.
13747 (__arm_vcaddq_rot270_m_f32): Delete.
13748 (__arm_vcaddq_rot270_m_f16): Delete.
13749 (__arm_vcaddq_rot90_m_f32): Delete.
13750 (__arm_vcaddq_rot90_m_f16): Delete.
13751 (__arm_vcaddq_rot90_x_f16): Delete.
13752 (__arm_vcaddq_rot90_x_f32): Delete.
13753 (__arm_vcaddq_rot270_x_f16): Delete.
13754 (__arm_vcaddq_rot270_x_f32): Delete.
13755 (__arm_vcaddq_rot90): Delete.
13756 (__arm_vcaddq_rot270): Delete.
13757 (__arm_vhcaddq_rot90): Delete.
13758 (__arm_vhcaddq_rot270): Delete.
13759 (__arm_vcaddq_rot270_m): Delete.
13760 (__arm_vcaddq_rot90_m): Delete.
13761 (__arm_vhcaddq_rot270_m): Delete.
13762 (__arm_vhcaddq_rot90_m): Delete.
13763 (__arm_vcaddq_rot90_x): Delete.
13764 (__arm_vcaddq_rot270_x): Delete.
13765 (__arm_vhcaddq_rot90_x): Delete.
13766 (__arm_vhcaddq_rot270_x): Delete.
13768 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
13770 * config/arm/arm_mve_builtins.def (vcaddq_rot90_, vcaddq_rot270_)
13771 (vcaddq_rot90_f, vcaddq_rot90_f): Add "_" or "_f" suffix.
13772 * config/arm/iterators.md (mve_insn): Add vcadd, vhcadd.
13773 (isu): Add UNSPEC_VCADD90, UNSPEC_VCADD270, VCADDQ_ROT270_M_U,
13774 VCADDQ_ROT270_M_S, VCADDQ_ROT90_M_U, VCADDQ_ROT90_M_S,
13775 VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S, VHCADDQ_ROT90_S,
13777 (rot): Add VCADDQ_ROT90_M_F, VCADDQ_ROT90_M_S, VCADDQ_ROT90_M_U,
13778 VCADDQ_ROT270_M_F, VCADDQ_ROT270_M_S, VCADDQ_ROT270_M_U,
13779 VHCADDQ_ROT90_S, VHCADDQ_ROT270_S, VHCADDQ_ROT90_M_S,
13780 VHCADDQ_ROT270_M_S.
13781 (mve_rot): Add VCADDQ_ROT90_M_F, VCADDQ_ROT90_M_S,
13782 VCADDQ_ROT90_M_U, VCADDQ_ROT270_M_F, VCADDQ_ROT270_M_S,
13783 VCADDQ_ROT270_M_U, VHCADDQ_ROT90_S, VHCADDQ_ROT270_S,
13784 VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S.
13785 (supf): Add VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S,
13786 VHCADDQ_ROT90_S, VHCADDQ_ROT270_S, UNSPEC_VCADD90,
13788 (VCADDQ_ROT270_M): Delete.
13789 (VCADDQ_M_F VxCADDQ VxCADDQ_M): New.
13790 (VCADDQ_ROT90_M): Delete.
13791 * config/arm/mve.md (mve_vcaddq<mve_rot><mode>)
13792 (mve_vhcaddq_rot270_s<mode>, mve_vhcaddq_rot90_s<mode>): Merge
13794 (@mve_<mve_insn>q<mve_rot>_<supf><mode>): ... this.
13795 (mve_vcaddq<mve_rot><mode>): Rename into ...
13796 (@mve_<mve_insn>q<mve_rot>_f<mode>): ... this
13797 (mve_vcaddq_rot270_m_<supf><mode>)
13798 (mve_vcaddq_rot90_m_<supf><mode>, mve_vhcaddq_rot270_m_s<mode>)
13799 (mve_vhcaddq_rot90_m_s<mode>): Merge into ...
13800 (@mve_<mve_insn>q<mve_rot>_m_<supf><mode>): ... this.
13801 (mve_vcaddq_rot270_m_f<mode>, mve_vcaddq_rot90_m_f<mode>): Merge
13803 (@mve_<mve_insn>q<mve_rot>_m_f<mode>): ... this.
13805 2023-07-14 Roger Sayle <roger@nextmovesoftware.com>
13808 * config/i386/i386.md (*bt<mode>_setcqi): Prefer string form
13809 preparation statement over braces for a single statement.
13810 (*bt<mode>_setncqi): Likewise.
13811 (*bt<mode>_setncqi_2): New define_insn_and_split.
13813 2023-07-14 Roger Sayle <roger@nextmovesoftware.com>
13815 * config/i386/i386-expand.cc (ix86_expand_move): Generalize special
13816 case inserting of 64-bit values into a TImode register, to handle
13817 both DImode and DFmode using either *insvti_lowpart_1
13818 or *isnvti_highpart_1.
13820 2023-07-14 Uros Bizjak <ubizjak@gmail.com>
13823 * fwprop.cc (contains_paradoxical_subreg_p): Move to ...
13824 * rtlanal.cc (contains_paradoxical_subreg_p): ... here.
13825 * rtlanal.h (contains_paradoxical_subreg_p): Add prototype.
13826 * cprop.cc (try_replace_reg): Do not set REG_EQUAL note
13827 when the original source contains a paradoxical subreg.
13829 2023-07-14 Jan Hubicka <jh@suse.cz>
13831 * passes.cc (execute_function_todo): Remove
13832 TODO_rebuild_frequencies
13833 * passes.def: Add rebuild_frequencies pass.
13834 * predict.cc (estimate_bb_frequencies): Drop
13836 (tree_estimate_probability): Update call of
13837 estimate_bb_frequencies.
13838 (rebuild_frequencies): Turn into a pass; verify CFG profile consistency
13839 first and do not rebuild if not necessary.
13840 (class pass_rebuild_frequencies): New.
13841 (make_pass_rebuild_frequencies): New.
13842 * profile-count.h: Add profile_count::very_large_p.
13843 * tree-inline.cc (optimize_inline_calls): Do not return
13844 TODO_rebuild_frequencies
13845 * tree-pass.h (TODO_rebuild_frequencies): Remove.
13846 (make_pass_rebuild_frequencies): Declare.
13848 2023-07-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13850 * config/riscv/autovec.md (cond_len_fma<mode>): New pattern.
13851 * config/riscv/riscv-protos.h (enum insn_type): New enum.
13852 (expand_cond_len_ternop): New function.
13853 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_ternary_tu_insn): Ditto.
13854 (expand_cond_len_ternop): Ditto.
13856 2023-07-14 Jose E. Marchesi <jose.marchesi@oracle.com>
13859 * config/bpf/bpf.md: Enable instruction scheduling.
13861 2023-07-14 Tamar Christina <tamar.christina@arm.com>
13863 PR tree-optimization/109154
13864 * tree-if-conv.cc (INCLUDE_ALGORITHM): Include.
13865 (struct bb_predicate): Add no_predicate_stmts.
13866 (set_bb_predicate): Increase predicate count.
13867 (set_bb_predicate_gimplified_stmts): Conditionally initialize
13868 no_predicate_stmts.
13869 (get_bb_num_predicate_stmts): New.
13870 (init_bb_predicate): Initialzie no_predicate_stmts.
13871 (release_bb_predicate): Cleanup no_predicate_stmts.
13872 (insert_gimplified_predicates): Preserve no_predicate_stmts.
13874 2023-07-14 Tamar Christina <tamar.christina@arm.com>
13876 PR tree-optimization/109154
13877 * tree-if-conv.cc (gen_simplified_condition,
13878 gen_phi_nest_statement): New.
13879 (gen_phi_arg_condition, predicate_scalar_phi): Use it.
13881 2023-07-14 Richard Biener <rguenther@suse.de>
13883 * gimple.h (gimple_phi_arg): New const overload.
13884 (gimple_phi_arg_def): Make gimple arg const.
13885 (gimple_phi_arg_def_from_edge): New inline function.
13886 * tree-phinodes.h (gimple_phi_arg_imm_use_ptr_from_edge):
13888 * tree-ssa-operands.h (PHI_ARG_DEF_FROM_EDGE): Direct to
13889 new inline function.
13890 (PHI_ARG_DEF_PTR_FROM_EDGE): Likewise.
13892 2023-07-14 Monk Chiang <monk.chiang@sifive.com>
13894 * common/config/riscv/riscv-common.cc:
13895 (riscv_implied_info): Add zihintntl item.
13896 (riscv_ext_version_table): Ditto.
13897 (riscv_ext_flag_table): Ditto.
13898 * config/riscv/riscv-opts.h (MASK_ZIHINTNTL): New macro.
13899 (TARGET_ZIHINTNTL): Ditto.
13901 2023-07-14 Die Li <lidie@eswincomputing.com>
13903 * config/riscv/riscv.md: Remove redundant portion in and<mode>3.
13905 2023-07-14 Oleg Endo <olegendo@gcc.gnu.org>
13908 * config/sh/sh.md (peephole2): Handle case where eliminated reg is also
13909 used by the address of the following memory operand.
13911 2023-07-13 Mikael Pettersson <mikpelinux@gmail.com>
13914 * config/pdp11/pdp11.cc (pdp11_expand_epilogue): Also
13915 deallocate alloca-only frame.
13917 2023-07-13 Iain Sandoe <iain@sandoe.co.uk>
13920 * config/darwin.h (DARWIN_PLATFORM_ID): New.
13921 (LINK_COMMAND_A): Use DARWIN_PLATFORM_ID to pass OS, OS version
13922 and SDK data to the static linker.
13924 2023-07-13 Carl Love <cel@us.ibm.com>
13926 * config/rs6000/rs6000-builtins.def (__builtin_set_fpscr_rn): Update
13927 built-in definition return type.
13928 * config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Add check,
13929 define __SET_FPSCR_RN_RETURNS_FPSCR__ macro.
13930 * config/rs6000/rs6000.md (rs6000_set_fpscr_rn): Add return
13931 argument to return FPSCR fields.
13932 * doc/extend.texi (__builtin_set_fpscr_rn): Update description for
13933 the return value. Add description for
13934 __SET_FPSCR_RN_RETURNS_FPSCR__ macro.
13936 2023-07-13 Uros Bizjak <ubizjak@gmail.com>
13939 * config/alpha/alpha.cc (alpha_emit_set_long_const):
13940 Always use DImode when constructing long const.
13942 2023-07-13 Uros Bizjak <ubizjak@gmail.com>
13944 * haifa-sched.cc: Change TRUE/FALSE to true/false.
13946 * lra-assigns.cc: Ditto.
13947 * lra-constraints.cc: Ditto.
13948 * sel-sched.cc: Ditto.
13950 2023-07-13 Andrew Pinski <apinski@marvell.com>
13952 PR tree-optimization/110293
13953 PR tree-optimization/110539
13954 * match.pd: Expand the `x != (typeof x)(x == 0)`
13955 pattern to handle where the inner and outer comparsions
13956 are either `!=` or `==` and handle other constants
13959 2023-07-13 Vladimir N. Makarov <vmakarov@redhat.com>
13961 PR middle-end/109520
13962 * lra-int.h (lra_insn_recog_data): Add member asm_reloads_num.
13963 (lra_asm_insn_error): New prototype.
13964 * lra.cc: Include rtl_error.h.
13965 (lra_set_insn_recog_data): Initialize asm_reloads_num.
13966 (lra_asm_insn_error): New func whose code is taken from ...
13967 * lra-assigns.cc (lra_split_hard_reg_for): ... here. Use lra_asm_insn_error.
13968 * lra-constraints.cc (curr_insn_transform): Check reloads nummber for asm.
13970 2023-07-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13972 * genmatch.cc (commutative_op): Add COND_LEN_*
13973 * internal-fn.cc (first_commutative_argument): Ditto.
13975 (get_unconditional_internal_fn): Ditto.
13976 (can_interpret_as_conditional_op_p): Ditto.
13977 (internal_fn_len_index): Ditto.
13978 * internal-fn.h (can_interpret_as_conditional_op_p): Ditt.
13979 * tree-ssa-math-opts.cc (convert_mult_to_fma_1): Ditto.
13980 (convert_mult_to_fma): Ditto.
13981 (math_opts_dom_walker::after_dom_children): Ditto.
13983 2023-07-13 Pan Li <pan2.li@intel.com>
13985 * config/riscv/riscv.cc (vxrm_rtx): New static var.
13987 (global_state_unknown_p): Removed.
13988 (riscv_entity_mode_after): Removed.
13989 (asm_insn_p): New function.
13990 (vxrm_unknown_p): New function for fixed-point.
13991 (riscv_vxrm_mode_after): Ditto.
13992 (frm_unknown_dynamic_p): New function for floating-point.
13993 (riscv_frm_mode_after): Ditto.
13994 (riscv_mode_after): Leverage new functions.
13996 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
13998 * tree-vect-stmts.cc (vect_model_load_cost): Remove.
13999 (vectorizable_load): Adjust the cost handling on VMAT_CONTIGUOUS without
14000 calling vect_model_load_cost.
14002 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
14004 * tree-vect-stmts.cc (vect_model_load_cost): Assert this function only
14005 handle memory_access_type VMAT_CONTIGUOUS, remove some
14006 VMAT_CONTIGUOUS_PERMUTE related handlings.
14007 (vectorizable_load): Adjust the cost handling on VMAT_CONTIGUOUS_PERMUTE
14008 without calling vect_model_load_cost.
14010 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
14012 * tree-vect-stmts.cc (vect_model_load_cost): Assert it won't get
14013 VMAT_CONTIGUOUS_REVERSE any more.
14014 (vectorizable_load): Adjust the costing handling on
14015 VMAT_CONTIGUOUS_REVERSE without calling vect_model_load_cost.
14017 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
14019 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling on
14020 VMAT_LOAD_STORE_LANES without calling vect_model_load_cost.
14021 (vectorizable_load): Remove VMAT_LOAD_STORE_LANES related handling and
14022 assert it will never get VMAT_LOAD_STORE_LANES.
14024 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
14026 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling on
14027 VMAT_GATHER_SCATTER without calling vect_model_load_cost.
14028 (vect_model_load_cost): Adjut the assertion on VMAT_GATHER_SCATTER,
14029 remove VMAT_GATHER_SCATTER related handlings and the related parameter
14032 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
14034 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling
14035 on VMAT_ELEMENTWISE and VMAT_STRIDED_SLP without calling
14036 vect_model_load_cost.
14037 (vect_model_load_cost): Assert it won't get VMAT_ELEMENTWISE and
14038 VMAT_STRIDED_SLP any more, and remove their related handlings.
14040 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
14042 * tree-vect-stmts.cc (hoist_defs_of_uses): Add one argument HOIST_P.
14043 (vectorizable_load): Adjust the handling on VMAT_INVARIANT to respect
14044 hoisting decision and without calling vect_model_load_cost.
14045 (vect_model_load_cost): Assert it won't get VMAT_INVARIANT any more
14046 and remove VMAT_INVARIANT related handlings.
14048 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
14050 * tree-vect-stmts.cc (vect_build_gather_load_calls): Add the handlings
14051 on costing with one extra argument cost_vec.
14052 (vectorizable_load): Adjust the call to vect_build_gather_load_calls.
14053 (vect_model_load_cost): Assert it won't get VMAT_GATHER_SCATTER with
14054 gs_info.decl set any more.
14056 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
14058 * tree-vect-stmts.cc (vectorizable_load): Move and duplicate the call
14059 to vect_model_load_cost down to some different transform paths
14060 according to the handlings of different vect_memory_access_types.
14062 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
14064 * tree.h (wi::from_mpz): Hide from GENERATOR_FILE.
14066 2023-07-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
14068 * config/riscv/autovec.md
14069 (len_mask_gather_load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): New pattern.
14070 (len_mask_gather_load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
14071 (len_mask_gather_load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
14072 (len_mask_gather_load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
14073 (len_mask_gather_load<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
14074 (len_mask_gather_load<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
14075 (len_mask_gather_load<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
14076 (len_mask_gather_load<mode><mode>): Ditto.
14077 (len_mask_scatter_store<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Ditto.
14078 (len_mask_scatter_store<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
14079 (len_mask_scatter_store<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
14080 (len_mask_scatter_store<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
14081 (len_mask_scatter_store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
14082 (len_mask_scatter_store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
14083 (len_mask_scatter_store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
14084 (len_mask_scatter_store<mode><mode>): Ditto.
14085 * config/riscv/predicates.md (const_1_operand): New predicate.
14086 (vector_gs_scale_operand_16): Ditto.
14087 (vector_gs_scale_operand_32): Ditto.
14088 (vector_gs_scale_operand_64): Ditto.
14089 (vector_gs_extension_operand): Ditto.
14090 (vector_gs_scale_operand_16_rv32): Ditto.
14091 (vector_gs_scale_operand_32_rv32): Ditto.
14092 * config/riscv/riscv-protos.h (enum insn_type): Add gather/scatter.
14093 (expand_gather_scatter): New function.
14094 * config/riscv/riscv-v.cc (gen_const_vector_dup): Add gather/scatter.
14095 (emit_vlmax_masked_store_insn): New function.
14096 (emit_nonvlmax_masked_store_insn): Ditto.
14097 (modulo_sel_indices): Ditto.
14098 (expand_vec_perm): Fix SLP for gather/scatter.
14099 (prepare_gather_scatter): New function.
14100 (expand_gather_scatter): Ditto.
14101 * config/riscv/riscv.cc (riscv_legitimize_move): Fix bug of
14102 (subreg:SI (DI CONST_POLY_INT)).
14103 * config/riscv/vector-iterators.md: Add gather/scatter.
14104 * config/riscv/vector.md (vec_duplicate<mode>): Use "@" instead.
14105 (@vec_duplicate<mode>): Ditto.
14106 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSDI:mode>):
14108 (@pred_indexed_<order>store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
14110 2023-07-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14112 * config/riscv/autovec.md (cond_len_<optab><mode>): New pattern.
14113 * config/riscv/riscv-protos.h (enum insn_type): New enum.
14114 (expand_cond_len_binop): New function.
14115 * config/riscv/riscv-v.cc (emit_nonvlmax_tu_insn): Ditto.
14116 (emit_nonvlmax_fp_tu_insn): Ditto.
14117 (need_fp_rounding_p): Ditto.
14118 (expand_cond_len_binop): Ditto.
14119 * config/riscv/riscv.cc (riscv_preferred_else_value): Ditto.
14120 (TARGET_PREFERRED_ELSE_VALUE): New target hook.
14122 2023-07-12 Jan Hubicka <jh@suse.cz>
14124 * tree-cfg.cc (gimple_duplicate_sese_region): Rename to ...
14125 (gimple_duplicate_seme_region): ... this; break out profile updating
14127 * tree-ssa-loop-ch.cc (update_profile_after_ch): ... here.
14128 (ch_base::copy_headers): Update.
14129 * tree-cfg.h (gimple_duplicate_sese_region): Rename to ...
14130 (gimple_duplicate_seme_region): ... this.
14132 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
14134 PR tree-optimization/107043
14135 * range-op.cc (operator_bitwise_and::op1_range): Update bitmask.
14137 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
14139 PR tree-optimization/107053
14140 * gimple-range-op.cc (cfn_popcount): Use known set bits.
14142 2023-07-12 Uros Bizjak <ubizjak@gmail.com>
14144 * ira.cc (equiv_init_varies_p): Change return type from int to bool
14145 and adjust function body accordingly.
14146 (equiv_init_movable_p): Ditto.
14147 (memref_used_between_p): Ditto.
14148 * lra-constraints.cc (valid_address_p): Ditto.
14150 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
14152 * range-op.cc (irange_to_masked_value): Remove.
14153 (update_known_bitmask): Update irange value/mask pair instead of
14154 only updating nonzero bits.
14156 2023-07-12 Jan Hubicka <jh@suse.cz>
14158 * tree-cfg.cc (gimple_duplicate_sese_region): Add ORIG_ELIMINATED_EDGES
14159 parameter and rewrite profile updating code to handle edges elimination.
14160 * tree-cfg.h (gimple_duplicate_sese_region): Update prototpe.
14161 * tree-ssa-loop-ch.cc (loop_invariant_op_p): New function.
14162 (loop_iv_derived_p): New function.
14163 (should_duplicate_loop_header_p): Track invariant exit edges; fix handling
14164 of PHIs and propagation of IV derived variables.
14165 (ch_base::copy_headers): Pass around the invariant edges hash set.
14167 2023-07-12 Uros Bizjak <ubizjak@gmail.com>
14169 * ifcvt.cc (cond_exec_changed_p): Change variable to bool.
14170 (last_active_insn): Change "skip_use_p" function argument to bool.
14171 (noce_operand_ok): Change return type from int to bool.
14172 (find_cond_trap): Ditto.
14173 (block_jumps_and_fallthru_p): Change "fallthru_p" and
14174 "jump_p" variables to bool.
14175 (noce_find_if_block): Change return type from int to bool.
14176 (cond_exec_find_if_block): Ditto.
14177 (find_if_case_1): Ditto.
14178 (find_if_case_2): Ditto.
14179 (dead_or_predicable): Ditto. Change "reversep" function arg to bool.
14180 (block_jumps_and_fallthru): Rename from block_jumps_and_fallthru_p.
14181 (cond_exec_process_insns): Change return type from int to bool.
14182 Change "mod_ok" function arg to bool.
14183 (cond_exec_process_if_block): Change return type from int to bool.
14184 Change "do_multiple_p" function arg to bool. Change "then_mod_ok"
14186 (noce_emit_store_flag): Change return type from int to bool.
14187 Change "reversep" function arg to bool. Change "cond_complex"
14189 (noce_try_move): Change return type from int to bool.
14190 (noce_try_ifelse_collapse): Ditto.
14191 (noce_try_store_flag): Ditto. Change "reversep" variable to bool.
14192 (noce_try_addcc): Change return type from int to bool. Change
14193 "subtract" variable to bool.
14194 (noce_try_store_flag_constants): Change return type from int to bool.
14195 (noce_try_store_flag_mask): Ditto. Change "reversep" variable to bool.
14196 (noce_try_cmove): Change return type from int to bool.
14197 (noce_try_cmove_arith): Ditto. Change "is_mem" variable to bool.
14198 (noce_try_minmax): Change return type from int to bool. Change
14199 "unsignedp" variable to bool.
14200 (noce_try_abs): Change return type from int to bool. Change
14201 "negate" variable to bool.
14202 (noce_try_sign_mask): Change return type from int to bool.
14203 (noce_try_move): Ditto.
14204 (noce_try_store_flag_constants): Ditto.
14205 (noce_try_cmove): Ditto.
14206 (noce_try_cmove_arith): Ditto.
14207 (noce_try_minmax): Ditto. Change "unsignedp" variable to bool.
14208 (noce_try_bitop): Change return type from int to bool.
14209 (noce_operand_ok): Ditto.
14210 (noce_convert_multiple_sets): Ditto.
14211 (noce_convert_multiple_sets_1): Ditto.
14212 (noce_process_if_block): Ditto.
14213 (check_cond_move_block): Ditto.
14214 (cond_move_process_if_block): Ditto. Change "success_p"
14216 (rest_of_handle_if_conversion): Change return type to void.
14218 2023-07-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
14220 * internal-fn.cc (FOR_EACH_CODE_MAPPING): Adapt for COND_LEN_* support.
14222 (get_conditional_len_internal_fn): New function.
14223 * internal-fn.h (get_conditional_len_internal_fn): Ditto.
14224 * tree-vect-stmts.cc (vectorizable_operation): Adapt for COND_LEN_*
14227 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
14230 * config/i386/i386.md (*add<dwi>3_doubleword_concat_zext): Typo.
14232 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
14235 * config/i386/i386.md (*add<dwi>3_doubleword_concat_zext): New
14236 define_insn_and_split derived from *add<dwi>3_doubleword_concat
14237 and *add<dwi>3_doubleword_zext.
14239 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
14242 * config/i386/i386.md (peephole2): Check !reg_mentioned_p when
14243 optimizing rega = 0; rega op= regb for op in [XOR,IOR,PLUS].
14244 (peephole2): Simplify rega = 0; rega op= rega cases.
14246 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
14248 * config/i386/i386-expand.cc (ix86_expand_int_compare): If
14249 testing a TImode SUBREG of a 128-bit vector register against
14250 zero, use a PTEST instruction instead of first moving it to
14251 a pair of scalar registers.
14253 2023-07-12 Robin Dapp <rdapp@ventanamicro.com>
14255 * genopinit.cc (main): Adjust maximal number of optabs and
14257 * gensupport.cc (find_optab): Shift optab by 20 and mode by
14259 * optabs-query.h (optab_handler): Ditto.
14260 (convert_optab_handler): Ditto.
14262 2023-07-12 Richard Biener <rguenther@suse.de>
14264 PR tree-optimization/110630
14265 * tree-vect-slp.cc (vect_add_slp_permutation): New
14266 offset parameter, honor that for the extract code generation.
14267 (vectorizable_slp_permutation_1): Handle offsetted identities.
14269 2023-07-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
14271 * config/riscv/autovec.md (smul<mode>3_highpart): New pattern.
14272 (umul<mode>3_highpart): Ditto.
14274 2023-07-12 Jan Beulich <jbeulich@suse.com>
14276 * config/i386/i386.md (extendbfsf2_1): Add new AVX512F
14277 alternative. Adjust original last alternative's "prefix"
14278 attribute to maybe_evex.
14280 2023-07-12 Jan Beulich <jbeulich@suse.com>
14282 * config/i386/sse.md (vec_dupv4sf): Make first alternative use
14283 vbroadcastss for AVX2. New AVX512F alternative.
14284 (*vec_dupv4si): New AVX2 and AVX512F alternatives using
14285 vpbroadcastd. Replace sselog1 by sseshuf1 in "type" attribute.
14287 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
14289 * config/riscv/peephole.md: Remove XThead* peephole passes.
14290 * config/riscv/thead.md: Include thead-peephole.md.
14291 * config/riscv/thead-peephole.md: New file.
14293 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
14295 * config/riscv/riscv-protos.h (riscv_regno_ok_for_index_p):
14297 (riscv_index_reg_class): Likewise.
14298 * config/riscv/riscv.cc (riscv_regno_ok_for_index_p): New function.
14299 (riscv_index_reg_class): New function.
14300 * config/riscv/riscv.h (INDEX_REG_CLASS): Call new function
14301 riscv_index_reg_class().
14302 (REGNO_OK_FOR_INDEX_P): Call new function
14303 riscv_regno_ok_for_index_p().
14305 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
14307 * config/riscv/riscv-protos.h (enum riscv_address_type):
14308 New location of type definition.
14309 (struct riscv_address_info): Likewise.
14310 * config/riscv/riscv.cc (enum riscv_address_type):
14311 Old location of type definition.
14312 (struct riscv_address_info): Likewise.
14314 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
14316 * config/riscv/riscv.h (Xmode): New macro.
14318 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
14320 * config/riscv/riscv.cc (riscv_print_operand_address): Use
14321 output_addr_const rather than riscv_print_operand.
14323 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
14325 * config/riscv/thead.md: Adjust constraints of th_addsl.
14327 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
14329 * config/riscv/thead.cc (th_mempair_operands_p):
14330 Fix documentation of th_mempair_order_operands().
14332 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
14334 * config/riscv/thead.cc (th_mempair_save_regs):
14335 Emit REG_FRAME_RELATED_EXPR notes in prologue.
14337 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
14339 * config/riscv/riscv.md: No base-ISA extension splitter for XThead*.
14340 * config/riscv/thead.md (*extend<SHORT:mode><SUPERQI:mode>2_th_ext):
14341 New XThead extension INSN.
14342 (*zero_extendsidi2_th_extu): New XThead extension INSN.
14343 (*zero_extendhi<GPR:mode>2_th_extu): New XThead extension INSN.
14345 2023-07-12 liuhongt <hongtao.liu@intel.com>
14349 * config/i386/predicates.md
14350 (int_float_vector_all_ones_operand): New predicate.
14351 * config/i386/sse.md (*vmov<mode>_constm1_pternlog_false_dep): New
14353 (*<avx512>_cvtmask2<ssemodesuffix><mode>_pternlog_false_dep):
14355 (*<avx512>_cvtmask2<ssemodesuffix><mode>_pternlog_false_dep):
14357 (*<avx512>_cvtmask2<ssemodesuffix><mode>): Adjust to
14358 define_insn_and_split to avoid false dependence.
14359 (*<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
14360 (<mask_codefor>one_cmpl<mode>2<mask_name>): Adjust constraint
14361 of operands 1 to '0' to avoid false dependence.
14362 (*andnot<mode>3): Ditto.
14363 (iornot<mode>3): Ditto.
14364 (*<nlogic><mode>3): Ditto.
14366 2023-07-12 Mo, Zewei <zewei.mo@intel.com>
14368 * common/config/i386/cpuinfo.h
14369 (get_intel_cpu): Handle Granite Rapids D.
14370 * common/config/i386/i386-common.cc:
14371 (processor_alias_table): Add graniterapids-d.
14372 * common/config/i386/i386-cpuinfo.h
14373 (enum processor_subtypes): Add INTEL_COREI7_GRANITERAPIDS_D.
14374 * config.gcc: Add -march=graniterapids-d.
14375 * config/i386/driver-i386.cc (host_detect_local_cpu):
14376 Handle graniterapids-d.
14377 * config/i386/i386.h: (PTA_GRANITERAPIDS_D): New.
14378 * doc/extend.texi: Add graniterapids-d.
14379 * doc/invoke.texi: Ditto.
14381 2023-07-12 Haochen Jiang <haochen.jiang@intel.com>
14383 * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
14384 Add OPTION_MASK_ISA_AVX512VL.
14385 * config/i386/i386-expand.cc (ix86_check_builtin_isa_match):
14388 2023-07-11 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
14390 * config/riscv/riscv-protos.h (enum insn_type): Add vcompress optimization.
14391 * config/riscv/riscv-v.cc (emit_vlmax_compress_insn): Ditto.
14392 (shuffle_compress_patterns): Ditto.
14393 (expand_vec_perm_const_1): Ditto.
14395 2023-07-11 Uros Bizjak <ubizjak@gmail.com>
14397 * cfghooks.cc (verify_flow_info): Change "err" variable to bool.
14398 * cfghooks.h (struct cfg_hooks): Change return type of
14399 verify_flow_info from integer to bool.
14400 * cfgrtl.cc (can_delete_note_p): Change return type from int to bool.
14401 (can_delete_label_p): Ditto.
14402 (rtl_verify_flow_info): Change return type from int to bool
14403 and adjust function body accordingly. Change "err" variable to bool.
14404 (rtl_verify_flow_info_1): Ditto.
14405 (free_bb_for_insn): Change return type to void.
14406 (rtl_merge_blocks): Change "b_empty" variable to bool.
14407 (try_redirect_by_replacing_jump): Change "fallthru" variable to bool.
14408 (verify_hot_cold_block_grouping): Change return type from int to bool.
14409 Change "err" variable to bool.
14410 (rtl_verify_edges): Ditto.
14411 (rtl_verify_bb_insns): Ditto.
14412 (rtl_verify_bb_pointers): Ditto.
14413 (rtl_verify_bb_insn_chain): Ditto.
14414 (rtl_verify_fallthru): Ditto.
14415 (rtl_verify_bb_layout): Ditto.
14416 (purge_all_dead_edges): Change "purged" variable to bool.
14417 * cfgrtl.h (free_bb_for_insn): Change return type from int to void.
14418 * postreload-gcse.cc (expr_hasher::equal): Change "equiv_p" to bool.
14419 (load_killed_in_block_p): Change return type from int to bool
14420 and adjust function body accordingly.
14421 (oprs_unchanged_p): Return true/false.
14422 (rest_of_handle_gcse2): Change return type to void.
14423 * tree-cfg.cc (gimple_verify_flow_info): Change return type from
14424 int to bool. Change "err" variable to bool.
14426 2023-07-11 Gaius Mulley <gaiusmod2@gmail.com>
14428 * doc/gm2.texi (-Wuninit-variable-checking=) New item.
14430 2023-07-11 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
14432 * doc/md.texi: Add COND_LEN_* operations for loop control with length.
14433 * internal-fn.cc (cond_len_unary_direct): Ditto.
14434 (cond_len_binary_direct): Ditto.
14435 (cond_len_ternary_direct): Ditto.
14436 (expand_cond_len_unary_optab_fn): Ditto.
14437 (expand_cond_len_binary_optab_fn): Ditto.
14438 (expand_cond_len_ternary_optab_fn): Ditto.
14439 (direct_cond_len_unary_optab_supported_p): Ditto.
14440 (direct_cond_len_binary_optab_supported_p): Ditto.
14441 (direct_cond_len_ternary_optab_supported_p): Ditto.
14442 * internal-fn.def (COND_LEN_ADD): Ditto.
14443 (COND_LEN_SUB): Ditto.
14444 (COND_LEN_MUL): Ditto.
14445 (COND_LEN_DIV): Ditto.
14446 (COND_LEN_MOD): Ditto.
14447 (COND_LEN_RDIV): Ditto.
14448 (COND_LEN_MIN): Ditto.
14449 (COND_LEN_MAX): Ditto.
14450 (COND_LEN_FMIN): Ditto.
14451 (COND_LEN_FMAX): Ditto.
14452 (COND_LEN_AND): Ditto.
14453 (COND_LEN_IOR): Ditto.
14454 (COND_LEN_XOR): Ditto.
14455 (COND_LEN_SHL): Ditto.
14456 (COND_LEN_SHR): Ditto.
14457 (COND_LEN_FMA): Ditto.
14458 (COND_LEN_FMS): Ditto.
14459 (COND_LEN_FNMA): Ditto.
14460 (COND_LEN_FNMS): Ditto.
14461 (COND_LEN_NEG): Ditto.
14462 * optabs.def (OPTAB_D): Ditto.
14464 2023-07-11 Richard Biener <rguenther@suse.de>
14466 PR tree-optimization/110614
14467 * tree-vect-data-refs.cc (vect_supportable_dr_alignment):
14468 SLP splats are not suitable for re-align ops.
14470 2023-07-10 Peter Bergner <bergner@linux.ibm.com>
14472 * config/rs6000/predicates.md (quad_memory_operand): Remove redundant
14474 (vsx_quad_dform_memory_operand): Likewise.
14476 2023-07-10 Uros Bizjak <ubizjak@gmail.com>
14478 * reorg.cc (stop_search_p): Change return type from int to bool
14479 and adjust function body accordingly.
14480 (resource_conflicts_p): Ditto.
14481 (insn_references_resource_p): Change return type from int to bool.
14482 (insn_sets_resource_p): Ditto.
14483 (redirect_with_delay_slots_safe_p): Ditto.
14484 (condition_dominates_p): Change return type from int to bool
14485 and adjust function body accordingly.
14486 (redirect_with_delay_list_safe_p): Ditto.
14487 (check_annul_list_true_false): Ditto. Change "annul_true_p"
14488 function argument to bool.
14489 (steal_delay_list_from_target): Change "pannul_p" function
14490 argument to bool pointer. Change "must_annul" and "used_annul"
14491 variables from int to bool.
14492 (steal_delay_list_from_fallthrough): Ditto.
14493 (own_thread_p): Change return type from int to bool and adjust
14494 function body accordingly. Change "allow_fallthrough" function
14496 (reorg_redirect_jump): Change return type from int to bool.
14497 (fill_simple_delay_slots): Change "non_jumps_p" function
14498 argument from int to bool. Change "maybe_never" varible to bool.
14499 (fill_slots_from_thread): Change "likely", "thread_if_true" and
14500 "own_thread" function arguments to bool. Change "lose" and
14501 "must_annul" variables to bool.
14502 (delete_from_delay_slot): Change "had_barrier" variable to bool.
14503 (try_merge_delay_insns): Change "annul_p" variable to bool.
14504 (fill_eager_delay_slots): Change "own_target" and "own_fallthrouhg"
14506 (rest_of_handle_delay_slots): Change return type from int to void
14507 and adjust function body accordingly.
14509 2023-07-10 Kito Cheng <kito.cheng@sifive.com>
14511 * doc/extend.texi (RISC-V Operand Modifiers): New.
14513 2023-07-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
14515 * config/riscv/riscv-vsetvl.cc (add_label_notes): Remove it.
14516 (insert_insn_end_basic_block): Ditto.
14517 (pass_vsetvl::commit_vsetvls): Adapt for new helper function.
14518 * gcse.cc (insert_insn_end_basic_block): Export as global function.
14519 * gcse.h (insert_insn_end_basic_block): Ditto.
14521 2023-07-10 Christophe Lyon <christophe.lyon@linaro.org>
14524 * config/arm/arm-builtins.cc (arm_init_mve_builtins): Handle LTO.
14525 (arm_builtin_decl): Hahndle MVE builtins.
14526 * config/arm/arm-mve-builtins.cc (builtin_decl): New function.
14527 (add_unique_function): Fix handling of
14528 __ARM_MVE_PRESERVE_USER_NAMESPACE.
14529 (add_overloaded_function): Likewise.
14530 * config/arm/arm-protos.h (builtin_decl): New declaration.
14532 2023-07-10 Christophe Lyon <christophe.lyon@linaro.org>
14534 * doc/sourcebuild.texi (arm_v8_1m_main_cde_mve_fp): Document.
14536 2023-07-10 Xi Ruoyao <xry111@xry111.site>
14538 PR tree-optimization/110557
14539 * tree-vect-patterns.cc (vect_recog_bitfield_ref_pattern):
14540 Ensure the output sign-extended if necessary.
14542 2023-07-10 Roger Sayle <roger@nextmovesoftware.com>
14544 * config/i386/i386.md (peephole2): Transform xchg insn with a
14545 REG_UNUSED note to a (simple) move.
14546 (*insvti_lowpart_1): New define_insn_and_split.
14547 (*insvdi_lowpart_1): Likewise.
14549 2023-07-10 Roger Sayle <roger@nextmovesoftware.com>
14551 * config/i386/i386-features.cc (compute_convert_gain): Tweak
14552 gains/costs for ROTATE/ROTATERT by integer constant on AVX512VL.
14553 (general_scalar_chain::convert_rotate): On TARGET_AVX512F generate
14554 avx512vl_rolv2di or avx412vl_rolv4si when appropriate.
14556 2023-07-10 liuhongt <hongtao.liu@intel.com>
14559 * config/i386/i386.md (*ieee_max<mode>3_1): New pre_reload
14560 splitter to detect fp max pattern.
14561 (*ieee_min<mode>3_1): Ditto, but for fp min pattern.
14563 2023-07-09 Jan Hubicka <jh@suse.cz>
14565 * cfg.cc (check_bb_profile): Dump counts with relative frequency.
14566 (dump_edge_info): Likewise.
14567 (dump_bb_info): Likewise.
14568 * profile-count.cc (profile_count::dump): Add comma between quality and
14571 2023-07-08 Jan Hubicka <jh@suse.cz>
14573 PR tree-optimization/110600
14574 * cfgloopmanip.cc (scale_loop_profile): Add mising profile_dump check.
14576 2023-07-08 Jan Hubicka <jh@suse.cz>
14578 PR middle-end/110590
14579 * cfgloopmanip.cc (scale_loop_profile): Avoid scaling exits within
14580 inner loops and be more careful about inconsistent profiles.
14581 (duplicate_loop_body_to_header_edge): Fix profile update when eliminated
14582 exit is followed by other exit.
14584 2023-07-08 Uros Bizjak <ubizjak@gmail.com>
14586 * cprop.cc (reg_available_p): Change return type from int to bool.
14587 (reg_not_set_p): Ditto.
14588 (try_replace_reg): Ditto. Change "success" variable to bool.
14589 (cprop_jump): Change return type from int to void
14590 and adjust function body accordingly.
14591 (constprop_register): Ditto.
14592 (cprop_insn): Ditto. Change "changed" variable to bool.
14593 (local_cprop_pass): Change return type from int to void
14594 and adjust function body accordingly.
14595 (bypass_block): Ditto. Change "change", "may_be_loop_header"
14596 and "removed_p" variables to bool.
14597 (bypass_conditional_jumps): Change return type from int to void
14598 and adjust function body accordingly. Change "changed"
14600 (one_cprop_pass): Ditto.
14602 2023-07-08 Uros Bizjak <ubizjak@gmail.com>
14604 * gcse.cc (expr_equiv_p): Change return type from int to bool.
14605 (oprs_unchanged_p): Change return type from int to void
14606 and adjust function body accordingly.
14607 (oprs_anticipatable_p): Ditto.
14608 (oprs_available_p): Ditto.
14609 (insert_expr_in_table): Ditto. Change "antic_p" and "avail_p"
14610 arguments to bool. Change "found" variable to bool.
14611 (load_killed_in_block_p): Change return type from int to void and
14612 adjust function body accordingly. Change "avail_p" argument to bool.
14613 (pre_expr_reaches_here_p): Change return type from int to void
14614 and adjust function body accordingly.
14615 (pre_delete): Ditto. Change "changed" variable to bool.
14616 (pre_gcse): Change return type from int to void
14617 and adjust function body accordingly. Change "did_insert" and
14618 "changed" variables to bool.
14619 (one_pre_gcse_pass): Change return type from int to void
14620 and adjust function body accordingly. Change "changed" variable
14622 (should_hoist_expr_to_dom): Change return type from int to void
14623 and adjust function body accordingly. Change
14624 "visited_allocated_locally" variable to bool.
14625 (hoist_code): Change return type from int to void and adjust
14626 function body accordingly. Change "changed" variable to bool.
14627 (one_code_hoisting_pass): Ditto.
14628 (pre_edge_insert): Change return type from int to void and adjust
14629 function body accordingly. Change "did_insert" variable to bool.
14630 (pre_expr_reaches_here_p_work): Change return type from int to void
14631 and adjust function body accordingly.
14632 (simple_mem): Ditto.
14633 (want_to_gcse_p): Change return type from int to void
14634 and adjust function body accordingly.
14635 (can_assign_to_reg_without_clobbers_p): Update function body
14636 for bool return type.
14637 (hash_scan_set): Change "antic_p" and "avail_p" variables to bool.
14638 (pre_insert_copies): Change "added_copy" variable to bool.
14640 2023-07-08 Jonathan Wakely <jwakely@redhat.com>
14644 * doc/invoke.texi (Warning Options): Fix typos.
14646 2023-07-07 Jan Hubicka <jh@suse.cz>
14648 * profile-count.cc (profile_count::dump): Add FUN
14649 parameter; print relative frequency.
14650 (profile_count::debug): Update.
14651 * profile-count.h (profile_count::dump): Update
14654 2023-07-07 Roger Sayle <roger@nextmovesoftware.com>
14658 * config/i386/i386-expand.cc (ix86_expand_move): Convert SETs of
14659 TImode destinations from paradoxical SUBREGs (setting the lowpart)
14660 into explicit zero extensions. Use *insvti_highpart_1 instruction
14661 to set the highpart of a TImode destination.
14663 2023-07-07 Jan Hubicka <jh@suse.cz>
14665 * predict.cc (force_edge_cold): Use
14666 set_edge_probability_and_rescale_others; improve dumps.
14668 2023-07-07 Jan Hubicka <jh@suse.cz>
14670 * cfgloopmanip.cc (scale_loop_profile): Fix computation of count_in and scaling blocks
14672 * tree-vect-loop-manip.cc (vect_do_peeling): Scale loop profile of the epilogue if bound
14675 2023-07-07 Juergen Christ <jchrist@linux.ibm.com>
14677 * config/s390/s390.cc (vec_init): Fix default case
14679 2023-07-07 Vladimir N. Makarov <vmakarov@redhat.com>
14681 * lra-assigns.cc (assign_by_spills): Add reload insns involving
14682 reload pseudos with non-refined class to be processed on the next
14684 * lra-constraints.cc (enough_allocatable_hard_regs_p): New func.
14685 (in_class_p): Use it.
14686 (print_curr_insn_alt): New func.
14687 (process_alt_operands): Use it. Improve debug info.
14688 (curr_insn_transform): Use print_curr_insn_alt. Refine reload
14689 pseudo class if it is not refined yet.
14691 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
14693 * value-range.cc (irange::get_bitmask_from_range): Return all the
14694 known bits for a singleton.
14695 (irange::set_range_from_bitmask): Set a range of a singleton when
14696 all bits are known.
14698 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
14700 * value-range.cc (irange::intersect): Leave normalization to
14703 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
14705 * data-streamer-in.cc (streamer_read_value_range): Adjust for
14707 * data-streamer-out.cc (streamer_write_vrange): Same.
14708 * range-op.cc (operator_cast::fold_range): Same.
14709 * value-range-pretty-print.cc
14710 (vrange_printer::print_irange_bitmasks): Same.
14711 * value-range-storage.cc (irange_storage::write_lengths_address):
14713 (irange_storage::set_irange): Same.
14714 (irange_storage::get_irange): Same.
14715 (irange_storage::size): Same.
14716 (irange_storage::dump): Same.
14717 * value-range-storage.h: Same.
14718 * value-range.cc (debug): New.
14719 (irange_bitmask::dump): New.
14720 (add_vrange): Adjust for value/mask.
14721 (irange::operator=): Same.
14722 (irange::set): Same.
14723 (irange::verify_range): Same.
14724 (irange::operator==): Same.
14725 (irange::contains_p): Same.
14726 (irange::irange_single_pair_union): Same.
14727 (irange::union_): Same.
14728 (irange::intersect): Same.
14729 (irange::invert): Same.
14730 (irange::get_nonzero_bits_from_range): Rename to...
14731 (irange::get_bitmask_from_range): ...this.
14732 (irange::set_range_from_nonzero_bits): Rename to...
14733 (irange::set_range_from_bitmask): ...this.
14734 (irange::set_nonzero_bits): Rename to...
14735 (irange::update_bitmask): ...this.
14736 (irange::get_nonzero_bits): Rename to...
14737 (irange::get_bitmask): ...this.
14738 (irange::intersect_nonzero_bits): Rename to...
14739 (irange::intersect_bitmask): ...this.
14740 (irange::union_nonzero_bits): Rename to...
14741 (irange::union_bitmask): ...this.
14742 (irange_bitmask::verify_mask): New.
14743 * value-range.h (class irange_bitmask): New.
14744 (irange_bitmask::set_unknown): New.
14745 (irange_bitmask::unknown_p): New.
14746 (irange_bitmask::irange_bitmask): New.
14747 (irange_bitmask::get_precision): New.
14748 (irange_bitmask::get_nonzero_bits): New.
14749 (irange_bitmask::set_nonzero_bits): New.
14750 (irange_bitmask::operator==): New.
14751 (irange_bitmask::union_): New.
14752 (irange_bitmask::intersect): New.
14753 (class irange): Friend vrange_printer.
14754 (irange::varying_compatible_p): Adjust for bitmask.
14755 (irange::set_varying): Same.
14756 (irange::set_nonzero): Same.
14758 2023-07-07 Jan Beulich <jbeulich@suse.com>
14760 * config/i386/sse.md (*vec_extractv2ti): Drop g modifiers.
14762 2023-07-07 Jan Beulich <jbeulich@suse.com>
14764 * config/i386/sse.md (@vec_extract_hi_<mode>): Drop last
14765 alternative. Switch new last alternative's "isa" attribute to
14767 (vec_extract_hi_v32qi): Likewise.
14769 2023-07-07 Pan Li <pan2.li@intel.com>
14770 Robin Dapp <rdapp@ventanamicro.com>
14772 * config/riscv/riscv.cc (riscv_emit_mode_set): Avoid emit insn
14774 (riscv_mode_entry): Take FRM_MODE_DYN as entry mode.
14775 (riscv_mode_exit): Likewise for exit mode.
14776 (riscv_mode_needed): Likewise for needed mode.
14777 (riscv_mode_after): Likewise for after mode.
14779 2023-07-07 Pan Li <pan2.li@intel.com>
14781 * config/riscv/vector.md: Fix typo.
14783 2023-07-06 Jan Hubicka <jh@suse.cz>
14785 PR middle-end/25623
14786 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Scale loop frequency to maximal number
14787 of iterations determined.
14788 * tree-ssa-loop-ivcanon.cc (try_unroll_loop_completely): Likewise.
14790 2023-07-06 Jan Hubicka <jh@suse.cz>
14792 * cfgloopmanip.cc (scale_loop_profile): Rewrite exit edge
14793 probability update to be safe on loops with subloops.
14794 Make bound parameter to be iteration bound.
14795 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Update call
14796 of scale_loop_profile.
14797 * tree-vect-loop-manip.cc (vect_do_peeling): Likewise.
14799 2023-07-06 Hao Liu OS <hliu@os.amperecomputing.com>
14801 PR tree-optimization/110449
14802 * tree-vect-loop.cc (vectorizable_induction): use vec_n to replace
14803 vec_loop for the unrolled loop.
14805 2023-07-06 Jan Hubicka <jh@suse.cz>
14807 * cfg.cc (set_edge_probability_and_rescale_others): New function.
14808 (update_bb_profile_for_threading): Use it; simplify the rest.
14809 * cfg.h (set_edge_probability_and_rescale_others): Declare.
14810 * profile-count.h (profile_probability::apply_scale): New.
14812 2023-07-06 Claudiu Zissulescu <claziss@gmail.com>
14814 * doc/extend.texi (ARC Built-in Functions): Update documentation
14815 with missing builtins.
14817 2023-07-06 Richard Biener <rguenther@suse.de>
14819 PR tree-optimization/110556
14820 * tree-ssa-tail-merge.cc (gimple_equal_p): Check
14821 assign code and all operands of non-stores.
14823 2023-07-06 Richard Biener <rguenther@suse.de>
14825 PR tree-optimization/110563
14826 * tree-vectorizer.h (vect_determine_partial_vectors_and_peeling):
14827 Remove second argument.
14828 * tree-vect-loop.cc (vect_determine_partial_vectors_and_peeling):
14829 Remove for_epilogue_p argument. Merge assert ...
14830 (vect_analyze_loop_2): ... with check done before determining
14831 partial vectors by moving it after.
14832 * tree-vect-loop-manip.cc (vect_do_peeling): Adjust.
14834 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
14836 * ggc-common.cc (gt_pch_note_reorder, gt_pch_save): Tighten up a
14837 few things re 'reorder' option and strings.
14838 * stringpool.cc (gt_pch_p_S): This is now 'gcc_unreachable'.
14840 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
14842 * gengtype-parse.cc: Clean up obsolete parametrized structs
14844 * gengtype.cc: Likewise.
14845 * gengtype.h: Likewise.
14847 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
14849 * gengtype.cc (struct walk_type_data): Remove 'needs_cast_p'.
14852 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
14854 * gengtype-parse.cc (token_names): Add '"user"'.
14855 * gengtype.h (gty_token): Add 'UNUSED_PARAM_IS' for use with
14856 'FIRST_TOKEN_WITH_VALUE'.
14858 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
14860 * doc/gty.texi (GTY Options) <string_length>: Enhance.
14862 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
14864 * gengtype.cc (write_root, write_roots): Explicitly reject
14865 'string_length' option.
14866 * doc/gty.texi (GTY Options) <string_length>: Document.
14868 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
14870 * ggc-internal.h (ggc_pch_count_object, ggc_pch_alloc_object)
14871 (ggc_pch_write_object): Remove 'bool is_string' argument.
14872 * ggc-common.cc: Adjust.
14873 * ggc-page.cc: Likewise.
14875 2023-07-06 Roger Sayle <roger@nextmovesoftware.com>
14877 * dwarf2out.cc (mem_loc_descriptor): Handle COPYSIGN.
14879 2023-07-06 Hongyu Wang <hongyu.wang@intel.com>
14881 * doc/extend.texi: Move x86 inlining rule to a new subsubsection
14882 and add description for inling of function with arch and tune
14885 2023-07-06 Richard Biener <rguenther@suse.de>
14887 PR tree-optimization/110515
14888 * tree-ssa-pre.cc (compute_avail): Make code dealing
14889 with hoisting loads with different alias-sets more
14892 2023-07-06 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
14894 * tree-vect-stmts.cc (vect_get_strided_load_store_ops): Fix ICE.
14896 2023-07-06 Hongyu Wang <hongyu.wang@intel.com>
14898 * config/i386/i386.cc (ix86_can_inline_p): If callee has
14899 default arch=x86-64 and tune=generic, do not block the
14900 inlining to its caller. Also allow callee with different
14901 arch= to be inlined if it has always_inline attribute and
14902 it's ISA is subset of caller's.
14904 2023-07-06 liuhongt <hongtao.liu@intel.com>
14906 * config/i386/i386.cc (ix86_rtx_costs): Adjust rtx_cost for
14907 DF/SFmode AND/IOR/XOR/ANDN operations.
14909 2023-07-06 Andrew Pinski <apinski@marvell.com>
14911 PR middle-end/110554
14912 * tree-vect-generic.cc (expand_vector_condition): For comparisons,
14913 just build using boolean_type_node instead of the cond_type.
14914 For non-comparisons/non-scalar-bitmask, build a ` != 0` gimple
14915 that will feed into the COND_EXPR.
14917 2023-07-06 liuhongt <hongtao.liu@intel.com>
14920 * config/i386/i386.md (movdf_internal): Disparage slightly for
14921 2 alternatives (r,v) and (v,r) by adding constraint modifier
14924 2023-07-06 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
14927 * config/rs6000/rs6000.cc (rs6000_expand_vector_extract): Remove redundant
14928 initialization of new_addr.
14930 2023-07-06 Hao Liu <hliu@os.amperecomputing.com>
14932 PR tree-optimization/110474
14933 * tree-vect-loop.cc (vect_analyze_loop_2): unscale the VF by suggested
14934 unroll factor while selecting the epilog vect loop VF.
14936 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
14938 * gimple-range-gori.cc (compute_operand_range): Convert to a tail
14941 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
14943 * gimple-range-gori.cc (compute_operand_range): After calling
14944 compute_operand2_range, recursively call self if needed.
14945 (compute_operand2_range): Turn into a leaf function.
14946 (gori_compute::compute_operand1_and_operand2_range): Finish
14947 operand2 calculation.
14948 * gimple-range-gori.h (compute_operand2_range): Remove name param.
14950 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
14952 * gimple-range-gori.cc (compute_operand_range): After calling
14953 compute_operand1_range, recursively call self if needed.
14954 (compute_operand1_range): Turn into a leaf function.
14955 (gori_compute::compute_operand1_and_operand2_range): Finish
14956 operand1 calculation.
14957 * gimple-range-gori.h (compute_operand1_range): Remove name param.
14959 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
14961 * gimple-range-gori.cc (compute_operand_range): Check for
14962 operand interdependence when both op1 and op2 are computed.
14963 (compute_operand1_and_operand2_range): No checks required now.
14965 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
14967 * gimple-range-gori.cc (compute_operand_range): Check for
14968 a relation between op1 and op2 and use that instead.
14969 (compute_operand1_range): Don't look for a relation override.
14970 (compute_operand2_range): Ditto.
14972 2023-07-05 Jonathan Wakely <jwakely@redhat.com>
14974 * doc/contrib.texi (Contributors): Update my entry.
14976 2023-07-05 Filip Kastl <filip.kastl@gmail.com>
14978 * value-prof.cc (gimple_mod_subtract_transform): Correct edge
14981 2023-07-05 Uros Bizjak <ubizjak@gmail.com>
14983 * sched-int.h (struct haifa_sched_info): Change can_schedule_ready_p,
14984 scehdule_more_p and contributes_to_priority indirect frunction
14985 type from int to bool.
14986 (no_real_insns_p): Change return type from int to bool.
14987 (contributes_to_priority): Ditto.
14988 * haifa-sched.cc (no_real_insns_p): Change return type from
14989 int to bool and adjust function body accordingly.
14990 * modulo-sched.cc (try_scheduling_node_in_cycle): Change "success"
14991 variable type from int to bool.
14992 (ps_insn_advance_column): Change return type from int to bool.
14993 (ps_has_conflicts): Ditto. Change "has_conflicts"
14994 variable type from int to bool.
14995 * sched-deps.cc (deps_may_trap_p): Change return type from int to bool.
14996 (conditions_mutex_p): Ditto.
14997 * sched-ebb.cc (schedule_more_p): Ditto.
14998 (ebb_contributes_to_priority): Change return type from
14999 int to bool and adjust function body accordingly.
15000 * sched-rgn.cc (is_cfg_nonregular): Ditto.
15001 (check_live_1): Ditto.
15003 (find_conditional_protection): Ditto.
15004 (is_conditionally_protected): Ditto.
15005 (is_prisky): Ditto.
15006 (is_exception_free): Ditto.
15007 (haifa_find_rgns): Change "unreachable" and "too_large_failure"
15008 variables from int to bool.
15009 (extend_rgns): Change "rescan" variable from int to bool.
15010 (check_live): Change return type from
15011 int to bool and adjust function body accordingly.
15012 (can_schedule_ready_p): Ditto.
15013 (schedule_more_p): Ditto.
15014 (contributes_to_priority): Ditto.
15016 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
15018 * doc/md.texi: Document that vec_set and vec_extract must not
15020 * gimple-isel.cc (gimple_expand_vec_set_expr): Rename this...
15021 (gimple_expand_vec_set_extract_expr): ...to this.
15022 (gimple_expand_vec_exprs): Call renamed function.
15023 * internal-fn.cc (vec_extract_direct): Add.
15024 (expand_vec_extract_optab_fn): New function to expand
15026 (direct_vec_extract_optab_supported_p): Add.
15027 * internal-fn.def (VEC_EXTRACT): Add.
15028 * optabs.cc (can_vec_extract_var_idx_p): New function.
15029 * optabs.h (can_vec_extract_var_idx_p): Declare.
15031 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
15033 * config/riscv/autovec.md: Add gen_lowpart.
15035 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
15037 * config/riscv/autovec.md: Allow register index operand.
15039 2023-07-05 Pan Li <pan2.li@intel.com>
15041 * config/riscv/riscv-vector-builtins.cc
15042 (function_expander::use_exact_insn): Use FRM_DYN instead of const0.
15044 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
15046 * config/riscv/autovec.md: Use float_truncate.
15048 2023-07-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
15050 * internal-fn.cc (internal_fn_len_index): Apply
15051 LEN_MASK_GATHER_LOAD/SCATTER_STORE into vectorizer.
15052 (internal_fn_mask_index): Ditto.
15053 * optabs-query.cc (supports_vec_gather_load_p): Ditto.
15054 (supports_vec_scatter_store_p): Ditto.
15055 * tree-vect-data-refs.cc (vect_gather_scatter_fn_p): Ditto.
15056 * tree-vect-patterns.cc (vect_recog_gather_scatter_pattern): Ditto.
15057 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
15058 (vect_get_strided_load_store_ops): Ditto.
15059 (vectorizable_store): Ditto.
15060 (vectorizable_load): Ditto.
15062 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
15063 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15065 * simplify-rtx.cc (native_encode_rtx): Ditto.
15066 (native_decode_vector_rtx): Ditto.
15067 (simplify_const_vector_byte_offset): Ditto.
15068 (simplify_const_vector_subreg): Ditto.
15069 * tree.cc (build_truth_vector_type_for_mode): Ditto.
15070 * varasm.cc (output_constant_pool_2): Ditto.
15072 2023-07-05 YunQiang Su <yunqiang.su@cipunited.com>
15074 * config/mips/mips.cc (mips_expand_block_move): don't expand for
15075 r6 with -mno-unaligned-access option if one or both of src and
15076 dest are unaligned. restruct: return directly if length is not const.
15077 (mips_block_move_straight): emit_move if ISA_HAS_UNALIGNED_ACCESS.
15079 2023-07-05 Jan Beulich <jbeulich@suse.com>
15082 * config/i386/sse.md: New splitters to simplify
15083 not;vec_duplicate as a singular vpternlog.
15084 (one_cmpl<mode>2): Allow broadcast for operand 1.
15085 (<mask_codefor>one_cmpl<mode>2<mask_name>): Likewise.
15087 2023-07-05 Jan Beulich <jbeulich@suse.com>
15090 * config/i386/sse.md: New splitters to simplify
15091 not;vec_duplicate;{ior,xor} as vec_duplicate;{iornot,xnor}.
15093 2023-07-05 Jan Beulich <jbeulich@suse.com>
15096 * config/i386/sse.md: Permit non-immediate operand 1 in AVX2
15097 form of splitter for PR target/100711.
15099 2023-07-05 Richard Biener <rguenther@suse.de>
15101 PR middle-end/110541
15102 * tree.def (VEC_PERM_EXPR): Adjust documentation to reflect
15105 2023-07-05 Jan Beulich <jbeulich@suse.com>
15108 * config/i386/sse.md (*andnot<mode>3): Add new alternatives
15109 for memory form operand 1.
15111 2023-07-05 Jan Beulich <jbeulich@suse.com>
15114 * config/i386/i386.cc (ix86_rtx_costs): Further special-case
15115 bitwise vector operations.
15116 * config/i386/sse.md (*iornot<mode>3): New insn.
15117 (*xnor<mode>3): Likewise.
15118 (*<nlogic><mode>3): Likewise.
15119 (andor): New code iterator.
15120 (nlogic): New code attribute.
15121 (ternlog_nlogic): Likewise.
15123 2023-07-05 Richard Biener <rguenther@suse.de>
15125 * tree-vect-stmts.cc (vect_mark_relevant): Fix typo.
15127 2023-07-05 yulong <shiyulong@iscas.ac.cn>
15129 * config/riscv/vector.md: Add float16 attr at sew、vlmul and ratio.
15131 2023-07-05 yulong <shiyulong@iscas.ac.cn>
15133 * config/riscv/genrvv-type-indexer.cc (valid_type): Enable FP16 tuple.
15134 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
15135 (ADJUST_ALIGNMENT): Ditto.
15136 (RVV_TUPLE_PARTIAL_MODES): Ditto.
15137 (ADJUST_NUNITS): Ditto.
15138 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t):
15140 (vfloat16mf4x3_t): Ditto.
15141 (vfloat16mf4x4_t): Ditto.
15142 (vfloat16mf4x5_t): Ditto.
15143 (vfloat16mf4x6_t): Ditto.
15144 (vfloat16mf4x7_t): Ditto.
15145 (vfloat16mf4x8_t): Ditto.
15146 (vfloat16mf2x2_t): Ditto.
15147 (vfloat16mf2x3_t): Ditto.
15148 (vfloat16mf2x4_t): Ditto.
15149 (vfloat16mf2x5_t): Ditto.
15150 (vfloat16mf2x6_t): Ditto.
15151 (vfloat16mf2x7_t): Ditto.
15152 (vfloat16mf2x8_t): Ditto.
15153 (vfloat16m1x2_t): Ditto.
15154 (vfloat16m1x3_t): Ditto.
15155 (vfloat16m1x4_t): Ditto.
15156 (vfloat16m1x5_t): Ditto.
15157 (vfloat16m1x6_t): Ditto.
15158 (vfloat16m1x7_t): Ditto.
15159 (vfloat16m1x8_t): Ditto.
15160 (vfloat16m2x2_t): Ditto.
15161 (vfloat16m2x3_t): Ditto.
15162 (vfloat16m2x4_t): Ditto.
15163 (vfloat16m4x2_t): Ditto.
15164 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): New macro.
15165 (vfloat16mf4x3_t): Ditto.
15166 (vfloat16mf4x4_t): Ditto.
15167 (vfloat16mf4x5_t): Ditto.
15168 (vfloat16mf4x6_t): Ditto.
15169 (vfloat16mf4x7_t): Ditto.
15170 (vfloat16mf4x8_t): Ditto.
15171 (vfloat16mf2x2_t): Ditto.
15172 (vfloat16mf2x3_t): Ditto.
15173 (vfloat16mf2x4_t): Ditto.
15174 (vfloat16mf2x5_t): Ditto.
15175 (vfloat16mf2x6_t): Ditto.
15176 (vfloat16mf2x7_t): Ditto.
15177 (vfloat16mf2x8_t): Ditto.
15178 (vfloat16m1x2_t): Ditto.
15179 (vfloat16m1x3_t): Ditto.
15180 (vfloat16m1x4_t): Ditto.
15181 (vfloat16m1x5_t): Ditto.
15182 (vfloat16m1x6_t): Ditto.
15183 (vfloat16m1x7_t): Ditto.
15184 (vfloat16m1x8_t): Ditto.
15185 (vfloat16m2x2_t): Ditto.
15186 (vfloat16m2x3_t): Ditto.
15187 (vfloat16m2x4_t): Ditto.
15188 (vfloat16m4x2_t): Ditto.
15189 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): New.
15190 * config/riscv/riscv.md: New.
15191 * config/riscv/vector-iterators.md: New.
15193 2023-07-04 Andrew Pinski <apinski@marvell.com>
15195 PR tree-optimization/110487
15196 * match.pd (a !=/== CST1 ? CST2 : CST3): Always
15197 build a nonstandard integer and use that.
15199 2023-07-04 Andrew Pinski <apinski@marvell.com>
15201 * match.pd (a?-1:0): Cast type an integer type
15202 rather the type before the negative.
15203 (a?0:-1): Likewise.
15205 2023-07-04 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
15207 * config/xtensa/xtensa.cc (machine_function, xtensa_expand_prologue):
15208 Change to use HARD_REG_BIT and its macros.
15209 * config/xtensa/xtensa.md
15210 (peephole2: regmove elimination during DFmode input reload):
15213 2023-07-04 Richard Biener <rguenther@suse.de>
15215 PR tree-optimization/110491
15216 * tree-ssa-phiopt.cc (match_simplify_replacement): Check
15217 whether the PHI args are possibly undefined before folding
15220 2023-07-04 Pan Li <pan2.li@intel.com>
15221 Thomas Schwinge <thomas@codesourcery.com>
15223 * lto-streamer-in.cc (lto_input_mode_table): Stream in the mode
15224 bits for machine mode table.
15225 * lto-streamer-out.cc (lto_write_mode_table): Stream out the
15226 HOST machine mode bits.
15227 * lto-streamer.h (struct lto_file_decl_data): New fields mode_bits.
15228 * tree-streamer.cc (streamer_mode_table): Take MAX_MACHINE_MODE
15230 * tree-streamer.h (streamer_mode_table): Ditto.
15231 (bp_pack_machine_mode): Take 1 << ceil_log2 (MAX_MACHINE_MODE)
15232 as the packing limit.
15233 (bp_unpack_machine_mode): Ditto with 'file_data->mode_bits'.
15235 2023-07-04 Thomas Schwinge <thomas@codesourcery.com>
15237 * lto-streamer.h (class lto_input_block): Capture
15238 'lto_file_decl_data *file_data' instead of just
15239 'unsigned char *mode_table'.
15240 * ipa-devirt.cc (ipa_odr_read_section): Adjust.
15241 * ipa-fnsummary.cc (inline_read_section): Likewise.
15242 * ipa-icf.cc (sem_item_optimizer::read_section): Likewise.
15243 * ipa-modref.cc (read_section): Likewise.
15244 * ipa-prop.cc (ipa_prop_read_section, read_replacements_section):
15246 * ipa-sra.cc (isra_read_summary_section): Likewise.
15247 * lto-cgraph.cc (input_cgraph_opt_section): Likewise.
15248 * lto-section-in.cc (lto_create_simple_input_block): Likewise.
15249 * lto-streamer-in.cc (lto_read_body_or_constructor)
15250 (lto_input_toplevel_asms): Likewise.
15251 * tree-streamer.h (bp_unpack_machine_mode): Likewise.
15253 2023-07-04 Richard Biener <rguenther@suse.de>
15255 * tree-ssa-phiopt.cc (pass_phiopt::execute): Mark SSA undefs.
15256 (empty_bb_or_one_feeding_into_p): Check for them.
15257 * tree-ssa.h (gimple_uses_undefined_value_p): Remove.
15258 * tree-ssa.cc (gimple_uses_undefined_value_p): Likewise.
15260 2023-07-04 Richard Biener <rguenther@suse.de>
15262 * tree-vect-loop.cc (vect_analyze_loop_costing): Remove
15263 check guarding scalar_niter underflow.
15265 2023-07-04 Hao Liu <hliu@os.amperecomputing.com>
15267 PR tree-optimization/110531
15268 * tree-vect-loop.cc (vect_analyze_loop_1): initialize
15269 slp_done_for_suggested_uf to false.
15271 2023-07-04 Richard Biener <rguenther@suse.de>
15273 PR tree-optimization/110228
15274 * tree-ssa-ifcombine.cc (pass_tree_ifcombine::execute):
15275 Mark SSA may-undefs.
15276 (bb_no_side_effects_p): Check stmt uses for undefs.
15278 2023-07-04 Richard Biener <rguenther@suse.de>
15280 PR tree-optimization/110436
15281 * tree-vect-stmts.cc (vect_mark_relevant): Expand dumping,
15282 force live but not relevant pattern stmts relevant.
15284 2023-07-04 Lili Cui <lili.cui@intel.com>
15286 * config/i386/i386.h: Add PTA_ENQCMD and PTA_UINTR to PTA_SIERRAFOREST.
15287 * doc/invoke.texi: Update new isa to march=sierraforest and grandridge.
15289 2023-07-04 Richard Biener <rguenther@suse.de>
15291 PR middle-end/110495
15292 * tree.h (TREE_OVERFLOW): Do not mention VECTOR_CSTs
15293 since we do not set TREE_OVERFLOW on those since the
15294 introduction of VL vectors.
15295 * match.pd (x +- CST +- CST): For VECTOR_CST do not look
15296 at TREE_OVERFLOW to determine validity of association.
15298 2023-07-04 Richard Biener <rguenther@suse.de>
15300 PR tree-optimization/110310
15301 * tree-vect-loop.cc (vect_determine_partial_vectors_and_peeling):
15302 Move costing part ...
15303 (vect_analyze_loop_costing): ... here. Integrate better
15304 estimate for epilogues from ...
15305 (vect_analyze_loop_2): Call vect_determine_partial_vectors_and_peeling
15306 with actual epilogue status.
15307 * tree-vect-loop-manip.cc (vect_do_peeling): ... here and
15308 avoid cancelling epilogue vectorization.
15309 (vect_update_epilogue_niters): Remove. No longer update
15310 epilogue LOOP_VINFO_NITERS.
15312 2023-07-04 Pan Li <pan2.li@intel.com>
15315 2023-07-03 Pan Li <pan2.li@intel.com>
15317 * config/riscv/vector.md: Fix typo.
15319 2023-07-04 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
15321 * doc/md.texi: Add len_mask_gather_load/len_mask_scatter_store.
15322 * internal-fn.cc (expand_scatter_store_optab_fn): Ditto.
15323 (expand_gather_load_optab_fn): Ditto.
15324 (internal_load_fn_p): Ditto.
15325 (internal_store_fn_p): Ditto.
15326 (internal_gather_scatter_fn_p): Ditto.
15327 (internal_fn_len_index): Ditto.
15328 (internal_fn_mask_index): Ditto.
15329 (internal_fn_stored_value_index): Ditto.
15330 * internal-fn.def (LEN_MASK_GATHER_LOAD): Ditto.
15331 (LEN_MASK_SCATTER_STORE): Ditto.
15332 * optabs.def (OPTAB_CD): Ditto.
15334 2023-07-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15336 * config/riscv/riscv-vsetvl.cc
15337 (vector_insn_info::parse_insn): Add early break.
15339 2023-07-04 Hans-Peter Nilsson <hp@axis.com>
15341 * config/cris/cris.md (CRIS_UNSPEC_SWAP_BITS): Remove.
15342 ("cris_swap_bits", "ctzsi2"): Use bitreverse instead.
15344 2023-07-04 Hans-Peter Nilsson <hp@axis.com>
15346 * dwarf2out.cc (mem_loc_descriptor): Handle BITREVERSE.
15348 2023-07-03 Christoph Müllner <christoph.muellner@vrull.eu>
15350 * common/config/riscv/riscv-common.cc: Add support for zvbb,
15351 zvbc, zvkg, zvkned, zvknha, zvknhb, zvksed, zvksh, zvkn,
15352 zvknc, zvkng, zvks, zvksc, zvksg, zvkt and the implied subsets.
15353 * config/riscv/arch-canonicalize: Add canonicalization info for
15354 zvkn, zvknc, zvkng, zvks, zvksc, zvksg.
15355 * config/riscv/riscv-opts.h (MASK_ZVBB): New macro.
15356 (MASK_ZVBC): Likewise.
15357 (TARGET_ZVBB): Likewise.
15358 (TARGET_ZVBC): Likewise.
15359 (MASK_ZVKG): Likewise.
15360 (MASK_ZVKNED): Likewise.
15361 (MASK_ZVKNHA): Likewise.
15362 (MASK_ZVKNHB): Likewise.
15363 (MASK_ZVKSED): Likewise.
15364 (MASK_ZVKSH): Likewise.
15365 (MASK_ZVKN): Likewise.
15366 (MASK_ZVKNC): Likewise.
15367 (MASK_ZVKNG): Likewise.
15368 (MASK_ZVKS): Likewise.
15369 (MASK_ZVKSC): Likewise.
15370 (MASK_ZVKSG): Likewise.
15371 (MASK_ZVKT): Likewise.
15372 (TARGET_ZVKG): Likewise.
15373 (TARGET_ZVKNED): Likewise.
15374 (TARGET_ZVKNHA): Likewise.
15375 (TARGET_ZVKNHB): Likewise.
15376 (TARGET_ZVKSED): Likewise.
15377 (TARGET_ZVKSH): Likewise.
15378 (TARGET_ZVKN): Likewise.
15379 (TARGET_ZVKNC): Likewise.
15380 (TARGET_ZVKNG): Likewise.
15381 (TARGET_ZVKS): Likewise.
15382 (TARGET_ZVKSC): Likewise.
15383 (TARGET_ZVKSG): Likewise.
15384 (TARGET_ZVKT): Likewise.
15385 * config/riscv/riscv.opt: Introduction of riscv_zv{b,k}_subext.
15387 2023-07-03 Andrew Pinski <apinski@marvell.com>
15389 PR middle-end/110510
15390 * except.h (struct eh_landing_pad_d): Add chain_next GTY.
15392 2023-07-03 Iain Sandoe <iain@sandoe.co.uk>
15394 * config/darwin.h: Avoid duplicate multiply_defined specs on
15395 earlier Darwin versions with shared libgcc.
15397 2023-07-03 Uros Bizjak <ubizjak@gmail.com>
15399 * tree.h (tree_int_cst_equal): Change return type from int to bool.
15400 (operand_equal_for_phi_arg_p): Ditto.
15401 (tree_map_base_marked_p): Ditto.
15402 * tree.cc (contains_placeholder_p): Update function body
15403 for bool return type.
15404 (type_cache_hasher::equal): Ditto.
15405 (tree_map_base_hash): Change return type
15406 from int to void and adjust function body accordingly.
15407 (tree_int_cst_equal): Ditto.
15408 (operand_equal_for_phi_arg_p): Ditto.
15409 (get_narrower): Change "first" variable to bool.
15410 (cl_option_hasher::equal): Update function body for bool return type.
15411 * ggc.h (ggc_set_mark): Change return type from int to bool.
15412 (ggc_marked_p): Ditto.
15413 * ggc-page.cc (gt_ggc_mx): Change return type
15414 from int to void and adjust function body accordingly.
15415 (ggc_set_mark): Ditto.
15417 2023-07-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
15419 * config/riscv/autovec.md: Change order of
15420 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
15421 * config/riscv/riscv-v.cc (expand_load_store): Ditto.
15422 * doc/md.texi: Ditto.
15423 * gimple-fold.cc (gimple_fold_partial_load_store_mem_ref): Ditto.
15424 * internal-fn.cc (len_maskload_direct): Ditto.
15425 (len_maskstore_direct): Ditto.
15426 (add_len_and_mask_args): New function.
15427 (expand_partial_load_optab_fn): Change order of
15428 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
15429 (expand_partial_store_optab_fn): Ditto.
15430 (internal_fn_len_index): New function.
15431 (internal_fn_mask_index): Change order of
15432 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
15433 (internal_fn_stored_value_index): Ditto.
15434 (internal_len_load_store_bias): Ditto.
15435 * internal-fn.h (internal_fn_len_index): New function.
15436 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Change order of
15437 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
15438 * tree-vect-stmts.cc (vectorizable_store): Ditto.
15439 (vectorizable_load): Ditto.
15441 2023-07-03 Gaius Mulley <gaiusmod2@gmail.com>
15444 * doc/gm2.texi (Semantic checking): Include examples using
15445 -Wuninit-variable-checking.
15447 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15449 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
15450 (*single_widen_fnma<mode>): Ditto.
15451 (*double_widen_fms<mode>): Ditto.
15452 (*single_widen_fms<mode>): Ditto.
15453 (*double_widen_fnms<mode>): Ditto.
15454 (*single_widen_fnms<mode>): Ditto.
15456 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15458 * config/riscv/autovec-opt.md (@pred_single_widen_mul<any_extend:su><mode>): Change "@"
15459 into "*" in pattern name which simplifies build files.
15460 (*pred_single_widen_mul<any_extend:su><mode>): Ditto.
15461 (*pred_single_widen_mul<mode>): New pattern.
15463 2023-07-03 Richard Sandiford <richard.sandiford@arm.com>
15465 * config/aarch64/aarch64-simd.md (vec_extract<mode><Vhalf>): Expect
15466 the index to be 0 or 1.
15468 2023-07-03 Lehua Ding <lehua.ding@rivai.ai>
15471 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15473 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
15474 (*single_widen_fnma<mode>): Ditto.
15475 (*double_widen_fms<mode>): Ditto.
15476 (*single_widen_fms<mode>): Ditto.
15477 (*double_widen_fnms<mode>): Ditto.
15478 (*single_widen_fnms<mode>): Ditto.
15480 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15482 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
15483 (*single_widen_fnma<mode>): Ditto.
15484 (*double_widen_fms<mode>): Ditto.
15485 (*single_widen_fms<mode>): Ditto.
15486 (*double_widen_fnms<mode>): Ditto.
15487 (*single_widen_fnms<mode>): Ditto.
15489 2023-07-03 Pan Li <pan2.li@intel.com>
15491 * config/riscv/vector.md: Fix typo.
15493 2023-07-03 Richard Biener <rguenther@suse.de>
15495 PR tree-optimization/110506
15496 * tree-vect-patterns.cc (vect_recog_rotate_pattern): Re-order
15497 TYPE_PRECISION access with INTEGRAL_TYPE_P check.
15499 2023-07-03 Richard Biener <rguenther@suse.de>
15501 PR tree-optimization/110506
15502 * tree-ssa-ccp.cc (get_value_for_expr): Check for integral
15503 type before relying on TYPE_PRECISION to produce a nonzero mask.
15505 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
15507 * config/mips/mips.md(*and<mode>3_mips16): Generates
15508 ZEB/ZEH instructions.
15510 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
15512 * config/mips/mips.cc(mips_9bit_offset_address_p): Restrict the
15513 address register to M16_REGS for MIPS16.
15514 (BUILTIN_AVAIL_MIPS16E2): Defined a new macro.
15515 (AVAIL_MIPS16E2_OR_NON_MIPS16): Same as above.
15516 (AVAIL_NON_MIPS16 (cache..)): Update to
15517 AVAIL_MIPS16E2_OR_NON_MIPS16.
15518 * config/mips/mips.h (ISA_HAS_CACHE): Add clause for ISA_HAS_MIPS16E2.
15519 * config/mips/mips.md (mips_cache): Mark as extended MIPS16.
15521 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
15523 * config/mips/mips.h(ISA_HAS_9BIT_DISPLACEMENT): Add clause
15524 for ISA_HAS_MIPS16E2.
15525 (ISA_HAS_SYNC): Same as above.
15526 (ISA_HAS_LL_SC): Same as above.
15528 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
15530 * config/mips/mips.cc(mips_expand_ins_as_unaligned_store):
15531 Add logics for generating instruction.
15532 * config/mips/mips.h(ISA_HAS_LWL_LWR): Add clause for ISA_HAS_MIPS16E2.
15533 * config/mips/mips.md(mov_<load>l): Generates instructions.
15534 (mov_<load>r): Same as above.
15535 (mov_<store>l): Adjusted for the conditions above.
15536 (mov_<store>r): Same as above.
15537 (mov_<store>l_mips16e2): Add machine description for `define_insn mov_<store>l_mips16e2`.
15538 (mov_<store>r_mips16e2): Add machine description for `define_insn mov_<store>r_mips16e2`.
15540 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
15542 * config/mips/mips.cc(mips_symbol_insns_1): Generates LUI instruction.
15543 (mips_const_insns): Same as above.
15544 (mips_output_move): Same as above.
15545 (mips_output_function_prologue): Same as above.
15546 * config/mips/mips.md: Same as above
15548 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
15550 * config/mips/constraints.md(Yz): New constraints for mips16e2.
15551 * config/mips/mips-protos.h(mips_bit_clear_p): Declared new function.
15552 (mips_bit_clear_info): Same as above.
15553 * config/mips/mips.cc(mips_bit_clear_info): New function for
15554 generating instructions.
15555 (mips_bit_clear_p): Same as above.
15556 * config/mips/mips.h(ISA_HAS_EXT_INS): Add clause for ISA_HAS_MIPS16E2.
15557 * config/mips/mips.md(extended_mips16): Generates EXT and INS instructions.
15558 (*and<mode>3): Generates INS instruction.
15559 (*and<mode>3_mips16): Generates EXT, INS and ANDI instructions.
15560 (ior<mode>3): Add logics for ORI instruction.
15561 (*ior<mode>3_mips16_asmacro): Generates ORI instrucion.
15562 (*ior<mode>3_mips16): Add logics for XORI instruction.
15563 (*xor<mode>3_mips16): Generates XORI instrucion.
15564 (*extzv<mode>): Add logics for EXT instruction.
15565 (*insv<mode>): Add logics for INS instruction.
15566 * config/mips/predicates.md(bit_clear_operand): New predicate for
15567 generating bitwise instructions.
15568 (and_reg_operand): Add logics for generating bitwise instructions.
15570 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
15572 * config/mips/mips.cc(mips_regno_mode_ok_for_base_p): Generate instructions
15573 that uses global pointer register.
15574 (mips16_unextended_reference_p): Same as above.
15575 (mips_pic_base_register): Same as above.
15576 (mips_init_relocs): Same as above.
15577 * config/mips/mips.h(MIPS16_GP_LOADS): Defined a new macro.
15578 (GLOBAL_POINTER_REGNUM): Moved to machine description `mips.md`.
15579 * config/mips/mips.md(GLOBAL_POINTER_REGNUM): Moved to here from above.
15580 (*lowsi_mips16_gp):New `define_insn *low<mode>_mips16`.
15582 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
15584 * config/mips/mips.h(ISA_HAS_CONDMOVE): Add condition for ISA_HAS_MIPS16E2.
15585 * config/mips/mips.md(*mov<GPR:mode>_on_<MOVECC:mode>): Add logics for MOVx insts.
15586 (*mov<GPR:mode>_on_<MOVECC:mode>_mips16e2): Generate MOVx instruction.
15587 (*mov<GPR:mode>_on_<GPR2:mode>_ne): Add logics for MOVx insts.
15588 (*mov<GPR:mode>_on_<GPR2:mode>_ne_mips16e2): Generate MOVx instruction.
15589 * config/mips/predicates.md(reg_or_0_operand_mips16e2): New predicate for MOVx insts.
15591 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
15593 * config/mips/mips.cc(mips_file_start): Add mips16e2 info
15595 * config/mips/mips.h(__mips_mips16e2): Defined a new
15597 (ISA_HAS_MIPS16E2): Defined a new macro.
15598 (ASM_SPEC): Pass mmips16e2 to the assembler.
15599 * config/mips/mips.opt: Add -m(no-)mips16e2 option.
15600 * config/mips/predicates.md: Add clause for TARGET_MIPS16E2.
15601 * doc/invoke.texi: Add -m(no-)mips16e2 option..
15603 2023-07-02 Jakub Jelinek <jakub@redhat.com>
15605 PR tree-optimization/110508
15606 * tree-ssa-math-opts.cc (match_uaddc_usubc): Only replace re2 with
15607 REALPART_EXPR opf nlhs if re2 is non-NULL.
15609 2023-07-02 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
15611 * config/xtensa/xtensa.cc (xtensa_match_CLAMPS_imms_p):
15613 * config/xtensa/xtensa.md (*xtensa_clamps):
15614 Add TARGET_MINMAX to the condition.
15616 2023-07-02 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
15618 * config/xtensa/xtensa.md (*eqne_INT_MIN):
15619 Add missing ":SI" to the match_operator.
15621 2023-07-02 Iain Sandoe <iain@sandoe.co.uk>
15624 * config/darwin.opt: Add fconstant-cfstrings alias to
15625 mconstant-cfstrings.
15626 * doc/invoke.texi: Amend invocation descriptions to reflect
15627 that the fconstant-cfstrings is a target-option alias and to
15628 add the missing mconstant-cfstrings option description to the
15631 2023-07-01 Jan Hubicka <jh@suse.cz>
15633 * tree-cfg.cc (gimple_duplicate_sese_region): Add elliminated_edge
15634 parmaeter; update profile.
15635 * tree-cfg.h (gimple_duplicate_sese_region): Update prototype.
15636 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Rename to ...
15637 (static_loop_exit): ... this; return the edge to be elliminated.
15638 (ch_base::copy_headers): Handle profile updating for eliminated exits.
15640 2023-07-01 Roger Sayle <roger@nextmovesoftware.com>
15642 * config/i386/i386-features.cc (compute_convert_gain): Provide
15643 gains/costs for ROTATE and ROTATERT (by an integer constant).
15644 (general_scalar_chain::convert_rotate): New helper function to
15645 convert a DImode or SImode rotation by an integer constant into
15647 (general_scalar_chain::convert_insn): Call the new convert_rotate
15648 for ROTATE and ROTATERT.
15649 (general_scalar_to_vector_candidate_p): Consider ROTATE and
15650 ROTATERT to be candidates if the second operand is an integer
15651 constant, valid for a rotation (or shift) in the given mode.
15652 * config/i386/i386-features.h (general_scalar_chain): Add new
15653 helper method convert_rotate.
15655 2023-07-01 Jan Hubicka <jh@suse.cz>
15657 PR tree-optimization/103680
15658 * cfg.cc (update_bb_profile_for_threading): Fix profile update;
15659 make message clearer.
15661 2023-06-30 Qing Zhao <qing.zhao@oracle.com>
15663 PR tree-optimization/101832
15664 * tree-object-size.cc (addr_object_size): Handle structure/union type
15665 when it has flexible size.
15667 2023-06-30 Eric Botcazou <ebotcazou@adacore.com>
15669 * gimple-fold.cc (fold_array_ctor_reference): Fix head comment.
15670 (fold_nonarray_ctor_reference): Likewise. Specifically deal
15671 with integral bit-fields.
15672 (fold_ctor_reference): Make sure that the constructor uses the
15673 native storage order.
15675 2023-06-30 Jan Hubicka <jh@suse.cz>
15677 PR middle-end/109849
15678 * predict.cc (estimate_bb_frequencies): Turn to static function.
15679 (expr_expected_value_1): Fix handling of binary expressions with
15681 * predict.def (PRED_MALLOC_NONNULL): Move later in the priority queue.
15682 (PRED_BUILTIN_EXPECT_WITH_PROBABILITY): Move to almost top of the priority
15684 * predict.h (estimate_bb_frequencies): No longer declare it.
15686 2023-06-30 Uros Bizjak <ubizjak@gmail.com>
15688 * fold-const.h (multiple_of_p): Change return type from int to bool.
15689 * fold-const.cc (split_tree): Change negl_p, neg_litp_p,
15690 neg_conp_p and neg_var_p variables to bool.
15691 (const_binop): Change sat_p variable to bool.
15692 (merge_ranges): Change no_overlap variable to bool.
15693 (extract_muldiv_1): Change same_p variable to bool.
15694 (tree_swap_operands_p): Update function body for bool return type.
15695 (fold_truth_andor): Change commutative variable to bool.
15696 (multiple_of_p): Change return type
15697 from int to void and adjust function body accordingly.
15698 * optabs.h (expand_twoval_unop): Change return type from int to bool.
15699 (expand_twoval_binop): Ditto.
15700 (can_compare_p): Ditto.
15701 (have_add2_insn): Ditto.
15702 (have_addptr3_insn): Ditto.
15703 (have_sub2_insn): Ditto.
15704 (have_insn_for): Ditto.
15705 * optabs.cc (add_equal_note): Ditto.
15706 (widen_operand): Change no_extend argument from int to bool.
15707 (expand_binop): Ditto.
15708 (expand_twoval_unop): Change return type
15709 from int to void and adjust function body accordingly.
15710 (expand_twoval_binop): Ditto.
15711 (can_compare_p): Ditto.
15712 (have_add2_insn): Ditto.
15713 (have_addptr3_insn): Ditto.
15714 (have_sub2_insn): Ditto.
15715 (have_insn_for): Ditto.
15717 2023-06-30 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
15719 * config/aarch64/aarch64-simd.md
15720 (vec_widen_<su>abdl_lo_<mode>, vec_widen_<su>abdl_hi_<mode>):
15721 Expansions for abd vec widen optabs.
15722 (aarch64_<su>abdl<mode>_insn): VQW based abdl RTL.
15723 * config/aarch64/iterators.md (USMAX_EXT): Code attributes
15724 that give the appropriate extend RTL for the max RTL.
15726 2023-06-30 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
15728 * internal-fn.def (VEC_WIDEN_ABD): New internal hilo optab.
15729 * optabs.def (vec_widen_sabd_optab,
15730 vec_widen_sabd_hi_optab, vec_widen_sabd_lo_optab,
15731 vec_widen_sabd_odd_even, vec_widen_sabd_even_optab,
15732 vec_widen_uabd_optab,
15733 vec_widen_uabd_hi_optab, vec_widen_uabd_lo_optab,
15734 vec_widen_uabd_odd_even, vec_widen_uabd_even_optab):
15736 * doc/md.texi: Document them.
15737 * tree-vect-patterns.cc (vect_recog_abd_pattern): Update to
15738 to build a VEC_WIDEN_ABD call if the input precision is smaller
15739 than the precision of the output.
15740 (vect_recog_widen_abd_pattern): Should an ABD expression be
15741 found preceeding an extension, replace the two with a
15744 2023-06-30 Pan Li <pan2.li@intel.com>
15746 * config/riscv/vector.md: Refactor the common condition.
15748 2023-06-30 Richard Biener <rguenther@suse.de>
15750 PR tree-optimization/110496
15751 * gimple-ssa-store-merging.cc (find_bswap_or_nop_1): Re-order
15752 verifying and TYPE_PRECISION query for the BIT_FIELD_REF case.
15754 2023-06-30 Richard Biener <rguenther@suse.de>
15756 PR middle-end/110489
15757 * statistics.cc (curr_statistics_hash): Add argument
15758 indicating whether we should allocate the hash.
15759 (statistics_fini_pass): If the hash isn't allocated
15760 only print the summary header.
15762 2023-06-30 Segher Boessenkool <segher@kernel.crashing.org>
15763 Thomas Schwinge <thomas@codesourcery.com>
15765 * config/nvptx/nvptx.cc (TARGET_LRA_P): Remove.
15767 2023-06-30 Jovan Dmitrović <jovan.dmitrovic@syrmia.com>
15770 * config/mips/mips.cc (mips_function_arg_alignment): Returns
15771 the alignment of function argument. In case of typedef type,
15772 it returns the aligment of the aliased type.
15773 (mips_function_arg_boundary): Relocated calculation of the
15774 aligment of function arguments.
15776 2023-06-29 Jan Hubicka <jh@suse.cz>
15778 PR tree-optimization/109849
15779 * ipa-fnsummary.cc (decompose_param_expr): Skip
15780 functions returning its parameter.
15781 (set_cond_stmt_execution_predicate): Return early
15782 if predicate was constructed.
15784 2023-06-29 Qing Zhao <qing.zhao@oracle.com>
15787 * doc/extend.texi: Document GCC extension on a structure containing
15788 a flexible array member to be a member of another structure.
15790 2023-06-29 Qing Zhao <qing.zhao@oracle.com>
15792 * print-tree.cc (print_node): Print new bit type_include_flexarray.
15793 * tree-core.h (struct tree_type_common): Use bit no_named_args_stdarg_p
15794 as type_include_flexarray for RECORD_TYPE or UNION_TYPE.
15795 * tree-streamer-in.cc (unpack_ts_type_common_value_fields): Stream
15796 in bit no_named_args_stdarg_p properly for its corresponding type.
15797 * tree-streamer-out.cc (pack_ts_type_common_value_fields): Stream
15798 out bit no_named_args_stdarg_p properly for its corresponding type.
15799 * tree.h (TYPE_INCLUDES_FLEXARRAY): New macro TYPE_INCLUDES_FLEXARRAY.
15801 2023-06-29 Aldy Hernandez <aldyh@redhat.com>
15803 * tree-vrp.cc (maybe_set_nonzero_bits): Move from here...
15804 * tree-ssa-dom.cc (maybe_set_nonzero_bits): ...to here.
15805 * tree-vrp.h (maybe_set_nonzero_bits): Remove.
15807 2023-06-29 Aldy Hernandez <aldyh@redhat.com>
15809 * value-range.cc (frange::set): Do not call verify_range.
15810 (frange::normalize_kind): Verify range.
15811 (frange::union_nans): Do not call verify_range.
15812 (frange::union_): Same.
15813 (frange::intersect): Same.
15814 (irange::irange_single_pair_union): Call normalize_kind if
15816 (irange::union_): Same.
15817 (irange::intersect): Same.
15818 (irange::set_range_from_nonzero_bits): Verify range.
15819 (irange::set_nonzero_bits): Call normalize_kind if necessary.
15820 (irange::get_nonzero_bits): Tweak comment.
15821 (irange::intersect_nonzero_bits): Call normalize_kind if
15823 (irange::union_nonzero_bits): Same.
15824 * value-range.h (irange::normalize_kind): Verify range.
15826 2023-06-29 Uros Bizjak <ubizjak@gmail.com>
15828 * cselib.h (rtx_equal_for_cselib_1):
15829 Change return type from int to bool.
15830 (references_value_p): Ditto.
15831 (rtx_equal_for_cselib_p): Ditto.
15832 * expr.h (can_store_by_pieces): Ditto.
15833 (try_casesi): Ditto.
15834 (try_tablejump): Ditto.
15835 (safe_from_p): Ditto.
15836 * sbitmap.h (bitmap_equal_p): Ditto.
15837 * cselib.cc (references_value_p): Change return type
15838 from int to void and adjust function body accordingly.
15839 (rtx_equal_for_cselib_1): Ditto.
15840 * expr.cc (is_aligning_offset): Ditto.
15841 (can_store_by_pieces): Ditto.
15842 (mostly_zeros_p): Ditto.
15843 (all_zeros_p): Ditto.
15844 (safe_from_p): Ditto.
15845 (is_aligning_offset): Ditto.
15846 (try_casesi): Ditto.
15847 (try_tablejump): Ditto.
15848 (store_constructor): Change "need_to_clear" and
15849 "const_bounds_p" variables to bool.
15850 * sbitmap.cc (bitmap_equal_p): Change return type from int to bool.
15852 2023-06-29 Robin Dapp <rdapp@ventanamicro.com>
15854 * tree-ssa-math-opts.cc (divmod_candidate_p): Use
15857 2023-06-29 Richard Biener <rguenther@suse.de>
15859 PR tree-optimization/110460
15860 * tree-vect-stmts.cc (get_related_vectype_for_scalar_type):
15861 Only allow integral, pointer and scalar float type scalar_type.
15863 2023-06-29 Lili Cui <lili.cui@intel.com>
15865 PR tree-optimization/110148
15866 * tree-ssa-reassoc.cc (rewrite_expr_tree_parallel): Handle loop-carried
15867 ops in this function.
15869 2023-06-29 Richard Biener <rguenther@suse.de>
15871 PR middle-end/110452
15872 * expr.cc (store_constructor): Handle uniform boolean
15873 vectors with integer mode specially.
15875 2023-06-29 Richard Biener <rguenther@suse.de>
15877 PR middle-end/110461
15878 * match.pd (bitop (convert@2 @0) (convert?@3 @1)): Disable
15881 2023-06-29 Richard Sandiford <richard.sandiford@arm.com>
15883 * vec.h (gt_pch_nx): Add overloads for va_gc_atomic.
15884 (array_slice): Relax va_gc constructor to handle all vectors
15885 with a vl_embed layout.
15887 2023-06-29 Pan Li <pan2.li@intel.com>
15889 * config/riscv/riscv.cc (riscv_emit_mode_set): Add emit for FRM.
15890 (riscv_mode_needed): Likewise.
15891 (riscv_entity_mode_after): Likewise.
15892 (riscv_mode_after): Likewise.
15893 (riscv_mode_entry): Likewise.
15894 (riscv_mode_exit): Likewise.
15895 * config/riscv/riscv.h (NUM_MODES_FOR_MODE_SWITCHING): Add number
15897 * config/riscv/riscv.md: Add FRM register.
15898 * config/riscv/vector-iterators.md: Add FRM type.
15899 * config/riscv/vector.md (frm_mode): Define new attr for FRM mode.
15900 (fsrm): Define new insn for fsrm instruction.
15902 2023-06-29 Pan Li <pan2.li@intel.com>
15904 * config/riscv/riscv-protos.h (enum floating_point_rounding_mode):
15905 Add macro for static frm min and max.
15906 * config/riscv/riscv-vector-builtins-bases.cc
15907 (class binop_frm): New class for floating-point with frm.
15908 (BASE): Add vfadd for frm.
15909 * config/riscv/riscv-vector-builtins-bases.h: Likewise.
15910 * config/riscv/riscv-vector-builtins-functions.def
15911 (vfadd_frm): Likewise.
15912 * config/riscv/riscv-vector-builtins-shapes.cc
15913 (struct alu_frm_def): New struct for alu with frm.
15914 (SHAPE): Add alu with frm.
15915 * config/riscv/riscv-vector-builtins-shapes.h: Likewise.
15916 * config/riscv/riscv-vector-builtins.cc
15917 (function_checker::report_out_of_range_and_not): New function
15918 for report out of range and not val.
15919 (function_checker::require_immediate_range_or): New function
15920 for checking in range or one val.
15921 * config/riscv/riscv-vector-builtins.h: Add function decl.
15923 2023-06-29 Cui, Lili <lili.cui@intel.com>
15925 * common/config/i386/cpuinfo.h (get_intel_cpu): Remove model value 0xa8
15926 from Rocketlake, move model value 0xbf from Alderlake to Raptorlake.
15928 2023-06-28 Hans-Peter Nilsson <hp@axis.com>
15931 * config/cris/cris.cc (cris_postdbr_cmpelim): Don't apply PATTERN
15932 to insn before validating it.
15934 2023-06-28 Jan Hubicka <jh@suse.cz>
15936 PR middle-end/110334
15937 * ipa-fnsummary.h (ipa_fn_summary): Add
15938 safe_to_inline_to_always_inline.
15939 * ipa-inline.cc (can_early_inline_edge_p): ICE
15940 if SSA is not built; do cycle checking for
15941 always_inline functions.
15942 (inline_always_inline_functions): Be recrusive;
15943 watch for cycles; do not updat overall summary.
15944 (early_inliner): Do not give up on always_inlines.
15945 * ipa-utils.cc (ipa_reverse_postorder): Do not skip
15948 2023-06-28 Uros Bizjak <ubizjak@gmail.com>
15950 * output.h (leaf_function_p): Change return type from int to bool.
15951 (final_forward_branch_p): Ditto.
15952 (only_leaf_regs_used): Ditto.
15953 (maybe_assemble_visibility): Ditto.
15954 * varasm.h (supports_one_only): Ditto.
15955 * rtl.h (compute_alignments): Change return type from int to void.
15956 * final.cc (app_on): Change return type from int to bool.
15957 (compute_alignments): Change return type from int to void
15958 and adjust function body accordingly.
15959 (shorten_branches): Change "something_changed" variable
15960 type from int to bool.
15961 (leaf_function_p): Change return type from int to bool
15962 and adjust function body accordingly.
15963 (final_forward_branch_p): Ditto.
15964 (only_leaf_regs_used): Ditto.
15965 * varasm.cc (contains_pointers_p): Change return type from
15966 int to bool and adjust function body accordingly.
15967 (compare_constant): Ditto.
15968 (maybe_assemble_visibility): Ditto.
15969 (supports_one_only): Ditto.
15971 2023-06-28 Manolis Tsamis <manolis.tsamis@vrull.eu>
15974 * regcprop.cc (maybe_mode_change): Check stack_pointer_rtx mode.
15975 (maybe_copy_reg_attrs): New function.
15976 (find_oldest_value_reg): Use maybe_copy_reg_attrs.
15977 (copyprop_hardreg_forward_1): Ditto.
15979 2023-06-28 Richard Biener <rguenther@suse.de>
15981 PR tree-optimization/110434
15982 * tree-nrv.cc (pass_nrv::execute): Remove CLOBBERs of
15983 VAR we replace with <retval>.
15985 2023-06-28 Richard Biener <rguenther@suse.de>
15987 PR tree-optimization/110451
15988 * tree-ssa-loop-im.cc (stmt_cost): [VEC_]COND_EXPR and
15989 tcc_comparison are expensive.
15991 2023-06-28 Roger Sayle <roger@nextmovesoftware.com>
15993 * config/i386/i386-expand.cc (ix86_expand_branch): Also use ptest
15994 for TImode comparisons on 32-bit architectures.
15995 * config/i386/i386.md (cbranch<mode>4): Change from SDWIM to
15996 SWIM1248x to exclude/avoid TImode being conditional on -m64.
15997 (cbranchti4): New define_expand for TImode on both TARGET_64BIT
15998 and/or with TARGET_SSE4_1.
15999 * config/i386/predicates.md (ix86_timode_comparison_operator):
16000 New predicate that depends upon TARGET_64BIT.
16001 (ix86_timode_comparison_operand): Likewise.
16003 2023-06-28 Roger Sayle <roger@nextmovesoftware.com>
16006 * config/i386/i386-features.cc (compute_convert_gain): Provide
16007 more accurate gains for conversion of scalar comparisons to
16010 2023-06-28 Richard Biener <rguenther@suse.de>
16012 PR tree-optimization/110443
16013 * tree-vect-slp.cc (vect_build_slp_tree_1): Reject non-grouped
16016 2023-06-28 Haochen Gui <guihaoc@gcc.gnu.org>
16018 * config/rs6000/rs6000.md (peephole2 for compare_and_move): New.
16019 (peephole2 for move_and_compare): New.
16020 (mode_iterator WORD): New. Set the mode to SI/DImode by
16022 (*mov<mode>_internal2): Change the mode iterator from P to WORD.
16023 (split pattern for compare_and_move): Likewise.
16025 2023-06-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16027 * config/riscv/autovec-opt.md (*double_widen_fma<mode>): New pattern.
16028 (*single_widen_fma<mode>): Ditto.
16030 2023-06-28 Haochen Gui <guihaoc@gcc.gnu.org>
16033 * config/rs6000/altivec.md (*altivec_vupkhs<VU_char>_direct): Rename
16035 (altivec_vupkhs<VU_char>_direct): ...this.
16036 * config/rs6000/predicates.md (vspltisw_vupkhsw_constant_split): New
16037 predicate to test if a constant can be loaded with vspltisw and
16039 (easy_vector_constant): Call vspltisw_vupkhsw_constant_p to Check if
16040 a vector constant can be synthesized with a vspltisw and a vupkhsw.
16041 * config/rs6000/rs6000-protos.h (vspltisw_vupkhsw_constant_p):
16043 * config/rs6000/rs6000.cc (vspltisw_vupkhsw_constant_p): New
16044 function to return true if OP mode is V2DI and can be synthesized
16045 with vupkhsw and vspltisw.
16046 * config/rs6000/vsx.md (*vspltisw_v2di_split): New insn to load up
16047 constants with vspltisw and vupkhsw.
16049 2023-06-28 Jan Hubicka <jh@suse.cz>
16051 PR tree-optimization/110377
16052 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Pass statement to
16054 (ipa_analyze_node): Enable ranger.
16056 2023-06-28 Richard Biener <rguenther@suse.de>
16058 * tree.h (TYPE_PRECISION): Check for non-VECTOR_TYPE.
16059 (TYPE_PRECISION_RAW): Provide raw access to the precision
16061 * tree.cc (verify_type_variant): Compare TYPE_PRECISION_RAW.
16062 (gimple_canonical_types_compatible_p): Likewise.
16063 * tree-streamer-out.cc (pack_ts_type_common_value_fields):
16064 Stream TYPE_PRECISION_RAW.
16065 * tree-streamer-in.cc (unpack_ts_type_common_value_fields):
16067 * lto-streamer-out.cc (hash_tree): Hash TYPE_PRECISION_RAW.
16069 2023-06-28 Alexandre Oliva <oliva@adacore.com>
16071 * doc/extend.texi (zero-call-used-regs): Document leafy and
16073 * flag-types.h (zero_regs_flags): Add LEAFY_MODE, as well as
16074 LEAFY and variants.
16075 * function.cc (gen_call_ued_regs_seq): Set only_used for leaf
16076 functions in leafy mode.
16077 * opts.cc (zero_call_used_regs_opts): Add leafy and variants.
16079 2023-06-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16081 * config/riscv/riscv-vector-builtins-bases.cc: Adapt expand.
16082 * config/riscv/vector.md (@pred_single_widen_<plus_minus:optab><mode>):
16084 (@pred_single_widen_add<mode>): New pattern.
16085 (@pred_single_widen_sub<mode>): New pattern.
16087 2023-06-28 liuhongt <hongtao.liu@intel.com>
16089 * config/i386/i386.cc (ix86_invalid_conversion): New function.
16090 (TARGET_INVALID_CONVERSION): Define as
16091 ix86_invalid_conversion.
16093 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
16095 * config/riscv/autovec.md (<optab><vnconvert><mode>2): New
16097 (<float_cvt><vnconvert><mode>2): Ditto.
16098 (<optab><mode><vnconvert>2): Ditto.
16099 (<float_cvt><mode><vnconvert>2): Ditto.
16100 * config/riscv/vector-iterators.md: Add vnconvert.
16102 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
16104 * config/riscv/autovec.md (extend<v_double_trunc><mode>2): New
16106 (extend<v_quad_trunc><mode>2): Ditto.
16107 (trunc<mode><v_double_trunc>2): Ditto.
16108 (trunc<mode><v_quad_trunc>2): Ditto.
16109 * config/riscv/vector-iterators.md: Add VQEXTF and HF to
16110 V_QUAD_TRUNC and v_quad_trunc.
16112 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
16114 * config/riscv/autovec.md (<float_cvt><vconvert><mode>2): New
16117 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
16119 * config/riscv/autovec.md (copysign<mode>3): Add expander.
16120 (xorsign<mode>3): Ditto.
16121 * config/riscv/riscv-vector-builtins-bases.cc (class vfsgnjn):
16123 * config/riscv/vector-iterators.md (copysign): Remove ncopysign.
16127 * config/riscv/vector.md (@pred_ncopysign<mode>): Split off.
16128 (@pred_ncopysign<mode>_scalar): Ditto.
16130 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
16132 * config/riscv/autovec.md: VF_AUTO -> VF.
16133 * config/riscv/vector-iterators.md: Introduce VF_ZVFHMIN,
16134 VWEXTF_ZVFHMIN and use TARGET_ZVFH in VWCONVERTI, VHF and
16136 * config/riscv/vector.md: Use new iterators.
16138 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
16140 * match.pd: Use element_mode and check if target supports
16141 operation with new type.
16143 2023-06-27 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
16145 * config/aarch64/aarch64-sve-builtins-base.cc
16146 (svdupq_impl::fold_nonconst_dupq): New method.
16147 (svdupq_impl::fold): Call fold_nonconst_dupq.
16149 2023-06-27 Andrew Pinski <apinski@marvell.com>
16151 PR middle-end/110420
16152 PR middle-end/103979
16153 PR middle-end/98619
16154 * gimplify.cc (gimplify_asm_expr): Mark asm with labels as volatile.
16156 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
16158 * ipa-cp.cc (decide_whether_version_node): Adjust comment.
16159 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Adjust
16161 (set_switch_stmt_execution_predicate): Same.
16162 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Same.
16164 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
16166 * ipa-prop.cc (struct ipa_vr_ggc_hash_traits): Adjust for use with
16167 ipa_vr instead of value_range.
16170 (ipa_get_value_range): Same.
16171 * value-range.cc (gt_pch_nx): Move to ipa-prop.cc and adjust for
16175 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
16177 * ipa-cp.cc (ipa_vr_operation_and_type_effects): New.
16178 * ipa-prop.cc (ipa_get_value_range): Adjust for ipa_vr.
16179 (ipa_set_jfunc_vr): Take a range.
16180 (ipa_compute_jump_functions_for_edge): Pass range to
16182 (ipa_write_jump_function): Call streamer write helper.
16183 (ipa_read_jump_function): Call streamer read helper.
16184 * ipa-prop.h (class ipa_vr): Change m_vr to an ipa_vr.
16186 2023-06-27 Richard Sandiford <richard.sandiford@arm.com>
16188 * gengtype-parse.cc (consume_until_comma_or_eos): Parse "= { ... }"
16189 as a probable initializer rather than a probable complete statement.
16191 2023-06-27 Richard Biener <rguenther@suse.de>
16193 PR tree-optimization/96208
16194 * tree-vect-slp.cc (vect_build_slp_tree_1): Allow
16195 a non-grouped load if it is the same for all lanes.
16196 (vect_build_slp_tree_2): Handle not grouped loads.
16197 (vect_optimize_slp_pass::remove_redundant_permutations):
16199 (vect_transform_slp_perm_load_1): Likewise.
16200 * tree-vect-stmts.cc (vect_model_load_cost): Likewise.
16201 (get_group_load_store_type): Likewise. Handle
16202 invariant accesses.
16203 (vectorizable_load): Likewise.
16205 2023-06-27 liuhongt <hongtao.liu@intel.com>
16207 PR rtl-optimization/110237
16208 * config/i386/sse.md (<avx512>_store<mode>_mask): Refine with
16210 (maskstore<mode><avx512fmaskmodelower): Ditto.
16211 (*<avx512>_store<mode>_mask): New define_insn, it's renamed
16212 from original <avx512>_store<mode>_mask.
16214 2023-06-27 liuhongt <hongtao.liu@intel.com>
16216 * config/i386/i386-features.cc (pass_insert_vzeroupper:gate):
16217 Move flag_expensive_optimizations && !optimize_size to ..
16218 * config/i386/i386-options.cc (ix86_option_override_internal):
16219 .. this, it makes -mvzeroupper independent of optimization
16220 level, but still keeps the behavior of architecture
16221 tuning(emit_vzeroupper) unchanged.
16223 2023-06-27 liuhongt <hongtao.liu@intel.com>
16226 * config/i386/i386.cc (ix86_avx_u127_mode_needed): Don't emit
16227 vzeroupper for vzeroupper call_insn.
16229 2023-06-27 Andrew Pinski <apinski@marvell.com>
16231 * doc/extend.texi (__builtin_alloca_with_align_and_max): Fix
16234 2023-06-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16236 * config/riscv/riscv-v.cc (expand_const_vector): Fix stepped vector
16239 2023-06-26 Andrew Pinski <apinski@marvell.com>
16241 * doc/extend.texi (access attribute): Add
16243 (interrupt/interrupt_handler attribute):
16246 2023-06-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16248 * config/aarch64/aarch64-simd.md (aarch64_sqrshrun_n<mode>_insn):
16249 Use <DWI> instead of <V2XWIDE>.
16250 (aarch64_sqrshrun_n<mode>): Likewise.
16252 2023-06-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16254 * config/aarch64/aarch64-protos.h (aarch64_const_vec_rsra_rnd_imm_p):
16256 (aarch64_rnd_imm_p): ... This.
16257 * config/aarch64/predicates.md (aarch64_simd_rsra_rnd_imm_vec):
16259 (aarch64_int_rnd_operand): ... This.
16260 (aarch64_simd_rshrn_imm_vec): Delete.
16261 * config/aarch64/aarch64-simd.md (aarch64_<sra_op>rsra_n<mode>_insn):
16262 Adjust for the above.
16263 (aarch64_<sra_op>rshr_n<mode><vczle><vczbe>_insn): Likewise.
16264 (*aarch64_<shrn_op>rshrn_n<mode>_insn): Likewise.
16265 (*aarch64_sqrshrun_n<mode>_insn<vczle><vczbe>): Likewise.
16266 (aarch64_sqrshrun_n<mode>_insn): Likewise.
16267 (aarch64_<shrn_op>rshrn2_n<mode>_insn_le): Likewise.
16268 (aarch64_<shrn_op>rshrn2_n<mode>_insn_be): Likewise.
16269 (aarch64_sqrshrun2_n<mode>_insn_le): Likewise.
16270 (aarch64_sqrshrun2_n<mode>_insn_be): Likewise.
16271 * config/aarch64/aarch64.cc (aarch64_const_vec_rsra_rnd_imm_p):
16273 (aarch64_rnd_imm_p): ... This.
16275 2023-06-26 Andreas Krebbel <krebbel@linux.ibm.com>
16277 * config/s390/s390.cc (s390_encode_section_info): Set
16278 SYMBOL_FLAG_SET_NOTALIGN2 only if the symbol has explicitely been
16281 2023-06-26 Jan Hubicka <jh@suse.cz>
16283 PR tree-optimization/109849
16284 * tree-ssa-dce.cc (make_forwarders_with_degenerate_phis): Fix profile
16285 count of newly constructed forwarder block.
16287 2023-06-26 Andrew Carlotti <andrew.carlotti@arm.com>
16289 * doc/optinfo.texi: Fix "steam" -> "stream".
16291 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
16293 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Add LEN_MASK_STORE and
16295 (dse_optimize_stmt): Add LEN_MASK_STORE.
16297 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
16299 * gimple-fold.cc (gimple_fold_partial_load_store_mem_ref): Fix gimple
16300 fold of LOAD/STORE with length.
16302 2023-06-26 Andrew MacLeod <amacleod@redhat.com>
16304 * gimple-range-gori.cc (compute_operand1_and_operand2_range):
16305 Check for interdependence between operands 1 and 2.
16307 2023-06-26 Richard Sandiford <richard.sandiford@arm.com>
16309 * tree-vect-stmts.cc (vectorizable_conversion): Take multi_step_cvt
16310 into account when costing non-widening/truncating conversions.
16312 2023-06-26 Richard Biener <rguenther@suse.de>
16314 PR tree-optimization/110381
16315 * tree-vect-slp.cc (vect_optimize_slp_pass::start_choosing_layouts):
16316 Materialize permutes before fold-left reductions.
16318 2023-06-26 Pan Li <pan2.li@intel.com>
16320 * config/riscv/riscv-vector-builtins-bases.h: Remove duplicated decl.
16322 2023-06-26 Richard Biener <rguenther@suse.de>
16324 * varasm.cc (initializer_constant_valid_p_1): Also
16325 constrain the type of value to be scalar integral
16326 before dispatching to narrowing_initializer_constant_valid_p.
16328 2023-06-26 Richard Biener <rguenther@suse.de>
16330 * tree-ssa-scopedtables.cc (hashable_expr_equal_p):
16331 Use element_precision.
16333 2023-06-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16335 * config/riscv/autovec.md (vcond<V:mode><VI:mode>): Remove redundant
16337 (vcondu<V:mode><VI:mode>): Ditto.
16338 * config/riscv/riscv-protos.h (expand_vcond): Ditto.
16339 * config/riscv/riscv-v.cc (expand_vcond): Ditto.
16341 2023-06-26 Richard Biener <rguenther@suse.de>
16343 PR tree-optimization/110392
16344 * gimple-predicate-analysis.cc (uninit_analysis::is_use_guarded):
16345 Do early exits on true/false predicate only after normalization.
16347 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
16349 * tree-ssa-sccvn.cc (vn_reference_lookup_3): Change name "len" into
16352 2023-06-26 Roger Sayle <roger@nextmovesoftware.com>
16354 * config/i386/i386.md (peephole2): Simplify zeroing a register
16355 followed by an IOR, XOR or PLUS operation on it, into a move.
16356 (*ashl<dwi>3_doubleword_highpart): New define_insn_and_split to
16357 eliminate (and hide from reload) unnecessary word to doubleword
16358 extensions that are followed by left shifts by sufficiently large,
16359 but valid, bit counts.
16361 2023-06-26 liuhongt <hongtao.liu@intel.com>
16363 PR tree-optimization/110371
16364 PR tree-optimization/110018
16365 * tree-vect-stmts.cc (vectorizable_conversion): Use cvt_op to
16366 save intermediate type operand instead of "subtle" vec_dest
16369 2023-06-26 liuhongt <hongtao.liu@intel.com>
16371 PR tree-optimization/110371
16372 PR tree-optimization/110018
16373 * tree-vect-stmts.cc (vectorizable_conversion): Don't use
16374 intermiediate type for FIX_TRUNC_EXPR when ftrapping-math.
16376 2023-06-26 Hongyu Wang <hongyu.wang@intel.com>
16378 * config/i386/i386-options.cc (ix86_valid_target_attribute_tree):
16379 Override tune_string with arch_string if tune_string is not
16380 explicitly specified.
16382 2023-06-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16384 * config/riscv/riscv-vsetvl.cc (vector_insn_info::parse_insn): Ehance
16386 * config/riscv/riscv-vsetvl.h: New function.
16388 2023-06-25 Li Xu <xuli1@eswincomputing.com>
16390 * config/riscv/riscv-vector-builtins-bases.cc: change emit_insn to
16393 2023-06-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16395 * config/riscv/autovec.md (len_load_<mode>): Remove.
16396 (len_maskload<mode><vm>): Remove.
16397 (len_store_<mode>): New pattern.
16398 (len_maskstore<mode><vm>): New pattern.
16399 * config/riscv/predicates.md (autovec_length_operand): New predicate.
16400 * config/riscv/riscv-protos.h (enum insn_type): New enum.
16401 (expand_load_store): New function.
16402 * config/riscv/riscv-v.cc (emit_vlmax_masked_insn): Ditto.
16403 (emit_nonvlmax_masked_insn): Ditto.
16404 (expand_load_store): Ditto.
16405 * config/riscv/riscv-vector-builtins.cc
16406 (function_expander::use_contiguous_store_insn): Add avl_type operand
16408 * config/riscv/vector.md: Ditto.
16410 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
16412 * internal-fn.cc (expand_partial_store_optab_fn): Fix bug of BIAS
16415 2023-06-25 Pan Li <pan2.li@intel.com>
16417 * config/riscv/vector.md: Revert.
16419 2023-06-25 Pan Li <pan2.li@intel.com>
16421 * config/riscv/genrvv-type-indexer.cc (valid_type): Revert changes.
16422 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): Ditto.
16423 (ADJUST_ALIGNMENT): Ditto.
16424 (RVV_TUPLE_PARTIAL_MODES): Ditto.
16425 (ADJUST_NUNITS): Ditto.
16426 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t): Ditto.
16427 (vfloat16mf4x3_t): Ditto.
16428 (vfloat16mf4x4_t): Ditto.
16429 (vfloat16mf4x5_t): Ditto.
16430 (vfloat16mf4x6_t): Ditto.
16431 (vfloat16mf4x7_t): Ditto.
16432 (vfloat16mf4x8_t): Ditto.
16433 (vfloat16mf2x2_t): Ditto.
16434 (vfloat16mf2x3_t): Ditto.
16435 (vfloat16mf2x4_t): Ditto.
16436 (vfloat16mf2x5_t): Ditto.
16437 (vfloat16mf2x6_t): Ditto.
16438 (vfloat16mf2x7_t): Ditto.
16439 (vfloat16mf2x8_t): Ditto.
16440 (vfloat16m1x2_t): Ditto.
16441 (vfloat16m1x3_t): Ditto.
16442 (vfloat16m1x4_t): Ditto.
16443 (vfloat16m1x5_t): Ditto.
16444 (vfloat16m1x6_t): Ditto.
16445 (vfloat16m1x7_t): Ditto.
16446 (vfloat16m1x8_t): Ditto.
16447 (vfloat16m2x2_t): Ditto.
16448 (vfloat16m2x3_t): Diito.
16449 (vfloat16m2x4_t): Diito.
16450 (vfloat16m4x2_t): Diito.
16451 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): Ditto.
16452 (vfloat16mf4x3_t): Ditto.
16453 (vfloat16mf4x4_t): Ditto.
16454 (vfloat16mf4x5_t): Ditto.
16455 (vfloat16mf4x6_t): Ditto.
16456 (vfloat16mf4x7_t): Ditto.
16457 (vfloat16mf4x8_t): Ditto.
16458 (vfloat16mf2x2_t): Ditto.
16459 (vfloat16mf2x3_t): Ditto.
16460 (vfloat16mf2x4_t): Ditto.
16461 (vfloat16mf2x5_t): Ditto.
16462 (vfloat16mf2x6_t): Ditto.
16463 (vfloat16mf2x7_t): Ditto.
16464 (vfloat16mf2x8_t): Ditto.
16465 (vfloat16m1x2_t): Ditto.
16466 (vfloat16m1x3_t): Ditto.
16467 (vfloat16m1x4_t): Ditto.
16468 (vfloat16m1x5_t): Ditto.
16469 (vfloat16m1x6_t): Ditto.
16470 (vfloat16m1x7_t): Ditto.
16471 (vfloat16m1x8_t): Ditto.
16472 (vfloat16m2x2_t): Ditto.
16473 (vfloat16m2x3_t): Ditto.
16474 (vfloat16m2x4_t): Ditto.
16475 (vfloat16m4x2_t): Ditto.
16476 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): Ditto.
16477 * config/riscv/riscv.md: Ditto.
16478 * config/riscv/vector-iterators.md: Ditto.
16480 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
16482 * gimple-fold.cc (arith_overflowed_p): Apply LEN_MASK_{LOAD,STORE}.
16483 (gimple_fold_partial_load_store_mem_ref): Ditto.
16484 (gimple_fold_partial_store): Ditto.
16485 (gimple_fold_call): Ditto.
16487 2023-06-25 liuhongt <hongtao.liu@intel.com>
16490 * config/i386/sse.md (maskload<mode><avx512fmaskmodelower>):
16491 Refine pattern with UNSPEC_MASKLOAD.
16492 (maskload<mode><avx512fmaskmodelower>): Ditto.
16493 (*<avx512>_load<mode>_mask): Extend mode iterator to
16495 (*<avx512>_load<mode>): Ditto.
16497 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
16499 * tree-ssa-alias.cc (call_may_clobber_ref_p_1): Add LEN_MASK_STORE.
16501 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
16503 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Apply
16504 LEN_MASK_{LOAD,STORE}
16506 2023-06-25 yulong <shiyulong@iscas.ac.cn>
16508 * config/riscv/vector.md: Add float16 attr at sew、vlmul and ratio.
16510 2023-06-24 Roger Sayle <roger@nextmovesoftware.com>
16512 * config/i386/i386.md (*<code>qi_ext<mode>_3): New define_insn.
16514 2023-06-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16516 * config/riscv/autovec.md (*fma<mode>): set clobber to Pmode in expand stage.
16517 (*fma<VI:mode><P:mode>): Ditto.
16518 (*fnma<mode>): Ditto.
16519 (*fnma<VI:mode><P:mode>): Ditto.
16521 2023-06-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16523 * config/riscv/autovec.md (fma<mode>4): New pattern.
16524 (*fma<mode>): Ditto.
16525 (fnma<mode>4): Ditto.
16526 (*fnma<mode>): Ditto.
16527 (fms<mode>4): Ditto.
16528 (*fms<mode>): Ditto.
16529 (fnms<mode>4): Ditto.
16530 (*fnms<mode>): Ditto.
16531 * config/riscv/riscv-protos.h (emit_vlmax_fp_ternary_insn):
16533 * config/riscv/riscv-v.cc (emit_vlmax_fp_ternary_insn): Ditto.
16534 * config/riscv/vector.md: Fix attribute bug.
16536 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
16538 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn):
16539 Apply LEN_MASK_{LOAD,STORE}.
16541 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
16543 * tree-ssa-loop-ivopts.cc (get_alias_ptr_type_for_ptr_address):
16544 Add LEN_MASK_{LOAD,STORE}.
16546 2023-06-24 David Malcolm <dmalcolm@redhat.com>
16548 * diagnostic-format-sarif.cc: Add #define INCLUDE_VECTOR.
16549 * diagnostic.cc: Likewise.
16550 * text-art/box-drawing.cc: Likewise.
16551 * text-art/canvas.cc: Likewise.
16552 * text-art/ruler.cc: Likewise.
16553 * text-art/selftests.cc: Likewise.
16554 * text-art/selftests.h (text_art::canvas): New forward decl.
16555 * text-art/style.cc: Add #define INCLUDE_VECTOR.
16556 * text-art/styled-string.cc: Likewise.
16557 * text-art/table.cc: Likewise.
16558 * text-art/table.h: Remove #include <vector>.
16559 * text-art/theme.cc: Add #define INCLUDE_VECTOR.
16560 * text-art/types.h: Check that INCLUDE_VECTOR is defined.
16561 Remove #include of <vector> and <string>.
16562 * text-art/widget.cc: Add #define INCLUDE_VECTOR.
16563 * text-art/widget.h: Remove #include <vector>.
16565 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
16567 * internal-fn.cc (expand_partial_store_optab_fn): Adapt for LEN_MASK_STORE.
16568 (internal_load_fn_p): Add LEN_MASK_LOAD.
16569 (internal_store_fn_p): Add LEN_MASK_STORE.
16570 (internal_fn_mask_index): Add LEN_MASK_{LOAD,STORE}.
16571 (internal_fn_stored_value_index): Add LEN_MASK_STORE.
16572 (internal_len_load_store_bias): Add LEN_MASK_{LOAD,STORE}.
16573 * optabs-tree.cc (can_vec_mask_load_store_p): Adapt for LEN_MASK_{LOAD,STORE}.
16574 (get_len_load_store_mode): Ditto.
16575 * optabs-tree.h (can_vec_mask_load_store_p): Ditto.
16576 (get_len_load_store_mode): Ditto.
16577 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
16578 (get_all_ones_mask): New function.
16579 (vectorizable_store): Apply LEN_MASK_{LOAD,STORE} into vectorizer.
16580 (vectorizable_load): Ditto.
16582 2023-06-23 Marek Polacek <polacek@redhat.com>
16584 * doc/cpp.texi (__cplusplus): Document value for -std=c++26 and
16585 -std=gnu++26. Document that for C++23, its value is 202302L.
16586 * doc/invoke.texi: Document -std=c++26 and -std=gnu++26.
16587 * dwarf2out.cc (highest_c_language): Handle GNU C++26.
16588 (gen_compile_unit_die): Likewise.
16590 2023-06-23 Jan Hubicka <jh@suse.cz>
16592 * tree-ssa-phiprop.cc (propagate_with_phi): Compute post dominators on
16594 (pass_phiprop::execute): Do not compute it here; return
16595 update_ssa_only_virtuals if something changed.
16596 (pass_data_phiprop): Remove TODO_update_ssa from todos.
16598 2023-06-23 Michael Meissner <meissner@linux.ibm.com>
16599 Aaron Sawdey <acsawdey@linux.ibm.com>
16602 * config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): Fix problems that
16603 allowed prefixed lwa to be generated.
16604 * config/rs6000/fusion.md: Regenerate.
16605 * config/rs6000/predicates.md (ds_form_mem_operand): Delete.
16606 * config/rs6000/rs6000.md (prefixed attribute): Add support for load
16607 plus compare immediate fused insns.
16608 (maybe_prefixed): Likewise.
16610 2023-06-23 Roger Sayle <roger@nextmovesoftware.com>
16612 * simplify-rtx.cc (simplify_subreg): Optimize lowpart SUBREGs
16613 of ASHIFT to const0_rtx with sufficiently large shift count.
16614 Optimize highpart SUBREGs of ASHIFT as the shift operand when
16615 the shift count is the correct offset. Optimize SUBREGs of
16616 multi-word logic operations if the SUBREGs of both operands
16619 2023-06-23 Richard Biener <rguenther@suse.de>
16621 * varasm.cc (initializer_constant_valid_p_1): Only
16622 allow conversions between scalar floating point types.
16624 2023-06-23 Richard Biener <rguenther@suse.de>
16626 * tree-vect-stmts.cc (vectorizable_assignment):
16627 Properly handle non-integral operands when analyzing
16630 2023-06-23 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
16632 PR tree-optimization/110280
16633 * match.pd (vec_perm_expr(v, v, mask) -> v): Explicitly build vector
16634 using build_vector_from_val with the element of input operand, and
16635 mask's type if operand and mask's types don't match.
16637 2023-06-23 Richard Biener <rguenther@suse.de>
16639 * fold-const.cc (tree_simple_nonnegative_warnv_p): Guard
16640 the truth_value_p case with !VECTOR_TYPE_P.
16642 2023-06-23 Richard Biener <rguenther@suse.de>
16644 * tree-vect-patterns.cc (vect_look_through_possible_promotion):
16645 Exit early when the type isn't scalar integral.
16647 2023-06-23 Richard Biener <rguenther@suse.de>
16649 * match.pd ((outertype)((innertype0)a+(innertype1)b)
16650 -> ((newtype)a+(newtype)b)): Use element_precision
16653 2023-06-23 Richard Biener <rguenther@suse.de>
16655 * fold-const.cc (fold_binary_loc): Use element_precision
16656 when trying (double)float1 CMP (double)float2 to
16657 float1 CMP float2 simplification.
16658 * match.pd: Likewise.
16660 2023-06-23 Richard Biener <rguenther@suse.de>
16662 * tree-vect-stmts.cc (vectorizable_load): Avoid useless
16663 copies of VMAT_INVARIANT vectorized stmts, fix SLP support.
16665 2023-06-23 Richard Biener <rguenther@suse.de>
16667 * tree-vect-stmts.cc (vector_vector_composition_type):
16668 Handle composition of a vector from a number of elements that
16669 happens to match its number of lanes.
16671 2023-06-22 Marek Polacek <polacek@redhat.com>
16673 * configure.ac (--enable-host-bind-now): New check. Add
16674 -Wl,-z,now to LD_PICFLAG if --enable-host-bind-now.
16675 * configure: Regenerate.
16676 * doc/install.texi: Document --enable-host-bind-now.
16678 2023-06-22 Di Zhao OS <dizhao@os.amperecomputing.com>
16680 * config/aarch64/aarch64.cc: Change fma_reassoc_width for ampere1.
16682 2023-06-22 Richard Biener <rguenther@suse.de>
16684 PR tree-optimization/110332
16685 * tree-ssa-phiprop.cc (propagate_with_phi): Always
16686 check aliasing with edge inserted loads.
16688 2023-06-22 Roger Sayle <roger@nextmovesoftware.com>
16689 Uros Bizjak <ubizjak@gmail.com>
16691 * config/i386/i386-expand.cc (ix86_expand_sse_ptest): Recognize
16692 expansion of ptestc with equal operands as producing const1_rtx.
16693 * config/i386/i386.cc (ix86_rtx_costs): Provide accurate cost
16694 estimates of UNSPEC_PTEST, where the ptest performs the PAND
16695 or PAND of its operands.
16696 * config/i386/sse.md (define_split): Transform CCCmode UNSPEC_PTEST
16697 of reg_equal_p operands into an x86_stc instruction.
16698 (define_split): Split pandn/ptestz/set{n?}e into ptestc/set{n?}c.
16699 (define_split): Similar to above for strict_low_part destinations.
16700 (define_split): Split pandn/ptestz/j{n?}e into ptestc/j{n?}c.
16702 2023-06-22 David Malcolm <dmalcolm@redhat.com>
16705 * Makefile.in (ANALYZER_OBJS): Add analyzer/access-diagram.o.
16706 * doc/invoke.texi (Wanalyzer-out-of-bounds): Add description of
16708 (fanalyzer-debug-text-art): New.
16710 2023-06-22 David Malcolm <dmalcolm@redhat.com>
16712 * Makefile.in (OBJS-libcommon): Add text-art/box-drawing.o,
16713 text-art/canvas.o, text-art/ruler.o, text-art/selftests.o,
16714 text-art/style.o, text-art/styled-string.o, text-art/table.o,
16715 text-art/theme.o, and text-art/widget.o.
16716 * color-macros.h (COLOR_FG_BRIGHT_BLACK): New.
16717 (COLOR_FG_BRIGHT_RED): New.
16718 (COLOR_FG_BRIGHT_GREEN): New.
16719 (COLOR_FG_BRIGHT_YELLOW): New.
16720 (COLOR_FG_BRIGHT_BLUE): New.
16721 (COLOR_FG_BRIGHT_MAGENTA): New.
16722 (COLOR_FG_BRIGHT_CYAN): New.
16723 (COLOR_FG_BRIGHT_WHITE): New.
16724 (COLOR_BG_BRIGHT_BLACK): New.
16725 (COLOR_BG_BRIGHT_RED): New.
16726 (COLOR_BG_BRIGHT_GREEN): New.
16727 (COLOR_BG_BRIGHT_YELLOW): New.
16728 (COLOR_BG_BRIGHT_BLUE): New.
16729 (COLOR_BG_BRIGHT_MAGENTA): New.
16730 (COLOR_BG_BRIGHT_CYAN): New.
16731 (COLOR_BG_BRIGHT_WHITE): New.
16732 * common.opt (fdiagnostics-text-art-charset=): New option.
16733 (diagnostic-text-art.h): New SourceInclude.
16734 (diagnostic_text_art_charset) New Enum and EnumValues.
16735 * configure: Regenerate.
16736 * configure.ac (gccdepdir): Add text-art to loop.
16737 * diagnostic-diagram.h: New file.
16738 * diagnostic-format-json.cc (json_emit_diagram): New.
16739 (diagnostic_output_format_init_json): Wire it up to
16740 context->m_diagrams.m_emission_cb.
16741 * diagnostic-format-sarif.cc: Include "diagnostic-diagram.h" and
16742 "text-art/canvas.h".
16743 (sarif_result::on_nested_diagnostic): Move code to...
16744 (sarif_result::add_related_location): ...this new function.
16745 (sarif_result::on_diagram): New.
16746 (sarif_builder::emit_diagram): New.
16747 (sarif_builder::make_message_object_for_diagram): New.
16748 (sarif_emit_diagram): New.
16749 (diagnostic_output_format_init_sarif): Set
16750 context->m_diagrams.m_emission_cb to sarif_emit_diagram.
16751 * diagnostic-text-art.h: New file.
16752 * diagnostic.cc: Include "diagnostic-text-art.h",
16753 "diagnostic-diagram.h", and "text-art/theme.h".
16754 (diagnostic_initialize): Initialize context->m_diagrams and
16755 call diagnostics_text_art_charset_init.
16756 (diagnostic_finish): Clean up context->m_diagrams.m_theme.
16757 (diagnostic_emit_diagram): New.
16758 (diagnostics_text_art_charset_init): New.
16759 * diagnostic.h (text_art::theme): New forward decl.
16760 (class diagnostic_diagram): Likewise.
16761 (diagnostic_context::m_diagrams): New field.
16762 (diagnostic_emit_diagram): New decl.
16763 * doc/invoke.texi (Diagnostic Message Formatting Options): Add
16764 -fdiagnostics-text-art-charset=.
16765 (-fdiagnostics-plain-output): Add
16766 -fdiagnostics-text-art-charset=none.
16767 * gcc.cc: Include "diagnostic-text-art.h".
16768 (driver_handle_option): Handle OPT_fdiagnostics_text_art_charset_.
16769 * opts-common.cc (decode_cmdline_options_to_array): Add
16770 "-fdiagnostics-text-art-charset=none" to expanded_args for
16771 -fdiagnostics-plain-output.
16772 * opts.cc: Include "diagnostic-text-art.h".
16773 (common_handle_option): Handle OPT_fdiagnostics_text_art_charset_.
16774 * pretty-print.cc (pp_unicode_character): New.
16775 * pretty-print.h (pp_unicode_character): New decl.
16776 * selftest-run-tests.cc: Include "text-art/selftests.h".
16777 (selftest::run_tests): Call text_art_tests.
16778 * text-art/box-drawing-chars.inc: New file, generated by
16779 contrib/unicode/gen-box-drawing-chars.py.
16780 * text-art/box-drawing.cc: New file.
16781 * text-art/box-drawing.h: New file.
16782 * text-art/canvas.cc: New file.
16783 * text-art/canvas.h: New file.
16784 * text-art/ruler.cc: New file.
16785 * text-art/ruler.h: New file.
16786 * text-art/selftests.cc: New file.
16787 * text-art/selftests.h: New file.
16788 * text-art/style.cc: New file.
16789 * text-art/styled-string.cc: New file.
16790 * text-art/table.cc: New file.
16791 * text-art/table.h: New file.
16792 * text-art/theme.cc: New file.
16793 * text-art/theme.h: New file.
16794 * text-art/types.h: New file.
16795 * text-art/widget.cc: New file.
16796 * text-art/widget.h: New file.
16798 2023-06-21 Uros Bizjak <ubizjak@gmail.com>
16800 * function.h (emit_initial_value_sets):
16801 Change return type from int to void.
16802 (aggregate_value_p): Change return type from int to bool.
16803 (prologue_contains): Ditto.
16804 (epilogue_contains): Ditto.
16805 (prologue_epilogue_contains): Ditto.
16806 * function.cc (temp_slot): Make "in_use" variable bool.
16807 (make_slot_available): Update for changed "in_use" variable.
16808 (assign_stack_temp_for_type): Ditto.
16809 (emit_initial_value_sets): Change return type from int to void
16810 and update function body accordingly.
16811 (instantiate_virtual_regs): Ditto.
16812 (rest_of_handle_thread_prologue_and_epilogue): Ditto.
16813 (safe_insn_predicate): Change return type from int to bool.
16814 (aggregate_value_p): Change return type from int to bool
16815 and update function body accordingly.
16816 (prologue_contains): Change return type from int to bool.
16817 (prologue_epilogue_contains): Ditto.
16819 2023-06-21 Alexander Monakov <amonakov@ispras.ru>
16821 * common.opt (fp_contract_mode) [on]: Remove fallback.
16822 * config/sh/sh.md (*fmasf4): Correct flag_fp_contract_mode test.
16823 * doc/invoke.texi (-ffp-contract): Update.
16824 * trans-mem.cc (diagnose_tm_1): Skip internal function calls.
16826 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16828 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
16829 Add alternatives to prefer to avoid same input and output Z register.
16830 (mask_gather_load<mode><v_int_container>): Likewise.
16831 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
16832 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
16833 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
16834 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
16836 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
16838 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
16839 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
16840 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
16841 <SVE_2BHSI:mode>_sxtw): Likewise.
16842 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
16843 <SVE_2BHSI:mode>_uxtw): Likewise.
16844 (@aarch64_ldff1_gather<mode>): Likewise.
16845 (@aarch64_ldff1_gather<mode>): Likewise.
16846 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
16847 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
16848 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
16849 <VNx4_NARROW:mode>): Likewise.
16850 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
16851 <VNx2_NARROW:mode>): Likewise.
16852 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
16853 <VNx2_NARROW:mode>_sxtw): Likewise.
16854 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
16855 <VNx2_NARROW:mode>_uxtw): Likewise.
16856 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
16857 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
16858 <SVE_PARTIAL_I:mode>): Likewise.
16860 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16862 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
16863 Convert to compact alternatives syntax.
16864 (mask_gather_load<mode><v_int_container>): Likewise.
16865 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
16866 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
16867 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
16868 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
16870 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
16872 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
16873 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
16874 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
16875 <SVE_2BHSI:mode>_sxtw): Likewise.
16876 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
16877 <SVE_2BHSI:mode>_uxtw): Likewise.
16878 (@aarch64_ldff1_gather<mode>): Likewise.
16879 (@aarch64_ldff1_gather<mode>): Likewise.
16880 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
16881 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
16882 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
16883 <VNx4_NARROW:mode>): Likewise.
16884 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
16885 <VNx2_NARROW:mode>): Likewise.
16886 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
16887 <VNx2_NARROW:mode>_sxtw): Likewise.
16888 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
16889 <VNx2_NARROW:mode>_uxtw): Likewise.
16890 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
16891 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
16892 <SVE_PARTIAL_I:mode>): Likewise.
16894 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16897 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16899 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
16900 Convert to compact alternatives syntax.
16901 (mask_gather_load<mode><v_int_container>): Likewise.
16902 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
16903 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
16904 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
16905 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
16907 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
16909 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
16910 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
16911 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
16912 <SVE_2BHSI:mode>_sxtw): Likewise.
16913 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
16914 <SVE_2BHSI:mode>_uxtw): Likewise.
16915 (@aarch64_ldff1_gather<mode>): Likewise.
16916 (@aarch64_ldff1_gather<mode>): Likewise.
16917 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
16918 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
16919 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
16920 <VNx4_NARROW:mode>): Likewise.
16921 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
16922 <VNx2_NARROW:mode>): Likewise.
16923 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
16924 <VNx2_NARROW:mode>_sxtw): Likewise.
16925 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
16926 <VNx2_NARROW:mode>_uxtw): Likewise.
16927 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
16928 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
16929 <SVE_PARTIAL_I:mode>): Likewise.
16931 2023-06-21 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
16933 * optabs-query.cc (can_vec_mask_load_store_p): Move to optabs-tree.cc.
16934 (get_len_load_store_mode): Ditto.
16935 * optabs-query.h (can_vec_mask_load_store_p): Move to optabs-tree.h.
16936 (get_len_load_store_mode): Ditto.
16937 * optabs-tree.cc (can_vec_mask_load_store_p): New function.
16938 (get_len_load_store_mode): Ditto.
16939 * optabs-tree.h (can_vec_mask_load_store_p): Ditto.
16940 (get_len_load_store_mode): Ditto.
16941 * tree-if-conv.cc: include optabs-tree instead of optabs-query
16943 2023-06-21 Richard Biener <rguenther@suse.de>
16945 * tree-ssa-loop-ivopts.cc (add_iv_candidate_for_use): Use
16946 split_constant_offset for the POINTER_PLUS_EXPR case.
16948 2023-06-21 Richard Biener <rguenther@suse.de>
16950 * tree-ssa-loop-ivopts.cc (record_group_use): Use
16951 split_constant_offset.
16953 2023-06-21 Richard Biener <rguenther@suse.de>
16955 * tree-loop-distribution.cc (classify_builtin_st): Use
16956 split_constant_offset.
16957 * tree-ssa-loop-ivopts.h (strip_offset): Remove.
16958 * tree-ssa-loop-ivopts.cc (strip_offset): Make static.
16960 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16962 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
16963 Convert to compact alternatives syntax.
16964 (mask_gather_load<mode><v_int_container>): Likewise.
16965 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
16966 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
16967 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
16968 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
16970 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
16972 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
16973 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
16974 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
16975 <SVE_2BHSI:mode>_sxtw): Likewise.
16976 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
16977 <SVE_2BHSI:mode>_uxtw): Likewise.
16978 (@aarch64_ldff1_gather<mode>): Likewise.
16979 (@aarch64_ldff1_gather<mode>): Likewise.
16980 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
16981 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
16982 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
16983 <VNx4_NARROW:mode>): Likewise.
16984 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
16985 <VNx2_NARROW:mode>): Likewise.
16986 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
16987 <VNx2_NARROW:mode>_sxtw): Likewise.
16988 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
16989 <VNx2_NARROW:mode>_uxtw): Likewise.
16990 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
16991 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
16992 <SVE_PARTIAL_I:mode>): Likewise.
16994 2023-06-21 Tamar Christina <tamar.christina@arm.com>
16997 * doc/md.texi: Replace backslashchar.
16999 2023-06-21 Richard Biener <rguenther@suse.de>
17001 * config/i386/i386.cc (ix86_vector_costs::finish_cost):
17002 Overload. For masked main loops make sure the vectorization
17003 factor isn't more than double the number of iterations.
17005 2023-06-21 Jan Beulich <jbeulich@suse.com>
17007 * config/i386/i386-expand.cc (ix86_expand_copysign): Request
17008 value duplication by ix86_build_signbit_mask() when AVX512F and
17010 * config/i386/sse.md (*<avx512>_vternlog<mode>_all): Convert to
17011 2-alternative form. Adjust "mode" attribute. Add "enabled"
17013 (*<avx512>_vpternlog<mode>_1): Also permit when TARGET_AVX512F
17014 && !TARGET_PREFER_AVX256.
17015 (*<avx512>_vpternlog<mode>_2): Likewise.
17016 (*<avx512>_vpternlog<mode>_3): Likewise.
17018 2023-06-21 liuhongt <hongtao.liu@intel.com>
17021 * tree-vect-stmts.cc (vectorizable_conversion): Use
17022 intermiediate integer type for float_expr/fix_trunc_expr when
17023 direct optab is not existed.
17025 2023-06-20 Tamar Christina <tamar.christina@arm.com>
17027 PR bootstrap/110324
17028 * gensupport.cc (convert_syntax): Explicitly check for RTX code.
17030 2023-06-20 Richard Sandiford <richard.sandiford@arm.com>
17032 * config/aarch64/aarch64.md (stack_tie): Hard-code the first
17033 register operand to the stack pointer. Require the second register
17034 operand to have the number specified in a separate const_int operand.
17035 * config/aarch64/aarch64.cc (aarch64_emit_stack_tie): New function.
17036 (aarch64_allocate_and_probe_stack_space): Use it.
17037 (aarch64_expand_prologue, aarch64_expand_epilogue): Likewise.
17038 (aarch64_expand_epilogue): Likewise.
17040 2023-06-20 Jakub Jelinek <jakub@redhat.com>
17042 PR middle-end/79173
17043 * tree-ssa-math-opts.cc (match_uaddc_usubc): Remember lhs of
17044 IMAGPART_EXPR of arg2/arg3 and use that as arg3 if it has the right
17047 2023-06-20 Uros Bizjak <ubizjak@gmail.com>
17049 * calls.h (setjmp_call_p): Change return type from int to bool.
17050 * calls.cc (struct arg_data): Change "pass_on_stack" to bool.
17051 (store_one_arg): Change return type from int to bool
17052 and adjust function body accordingly. Change "sibcall_failure"
17054 (finalize_must_preallocate): Ditto. Change *must_preallocate pointer
17055 argument to bool. Change "partial_seen" variable to bool.
17056 (load_register_parameters): Change *sibcall_failure
17057 pointer argument to bool.
17058 (check_sibcall_argument_overlap_1): Change return type from int to bool
17059 and adjust function body accordingly.
17060 (check_sibcall_argument_overlap): Ditto. Change
17061 "mark_stored_args_map" argument to bool.
17062 (emit_call_1): Change "already_popped" variable to bool.
17063 (setjmp_call_p): Change return type from int to bool
17064 and adjust function body accordingly.
17065 (initialize_argument_information): Change *must_preallocate
17066 pointer argument to bool.
17067 (expand_call): Change "pcc_struct_value", "must_preallocate"
17068 and "sibcall_failure" variables to bool.
17069 (emit_library_call_value_1): Change "pcc_struct_value"
17072 2023-06-20 Martin Jambor <mjambor@suse.cz>
17075 * ipa-sra.cc (struct caller_issues): New field there_is_one.
17076 (check_for_caller_issues): Set it.
17077 (check_all_callers_for_issues): Check it.
17079 2023-06-20 Martin Jambor <mjambor@suse.cz>
17081 * ipa-prop.h (ipa_uid_to_idx_map_elt): New type.
17082 (struct ipcp_transformation): Rearrange members according to
17083 C++ class coding convention, add m_uid_to_idx,
17084 get_param_index and maybe_create_parm_idx_map.
17085 * ipa-cp.cc (ipcp_transformation::get_param_index): New function.
17086 (compare_uids): Likewise.
17087 (ipcp_transformation::maype_create_parm_idx_map): Likewise.
17088 * ipa-prop.cc (ipcp_get_parm_bits): Use get_param_index.
17089 (ipcp_update_bits): Accept TS as a parameter, assume it is not NULL.
17090 (ipcp_update_vr): Likewise.
17091 (ipcp_transform_function): Call, maybe_create_parm_idx_map of TS, bail
17092 out quickly if empty, pass it to ipcp_update_bits and ipcp_update_vr.
17094 2023-06-20 Carl Love <cel@us.ibm.com>
17096 * config/rs6000/rs6000-builtin.cc (rs6000_expand_builtin):
17097 Rename CODE_FOR_xsxsigqp_tf to CODE_FOR_xsxsigqp_tf_ti.
17098 Rename CODE_FOR_xsxsigqp_kf to CODE_FOR_xsxsigqp_kf_ti.
17099 Rename CCDE_FOR_xsxexpqp_tf to CODE_FOR_xsxexpqp_tf_di.
17100 Rename CODE_FOR_xsxexpqp_kf to CODE_FOR_xsxexpqp_kf_di.
17101 (CODE_FOR_xsxexpqp_kf_v2di, CODE_FOR_xsxsigqp_kf_v1ti,
17102 CODE_FOR_xsiexpqp_kf_v2di): Add case statements.
17103 * config/rs6000/rs6000-builtins.def
17104 (__builtin_vsx_scalar_extract_exp_to_vec,
17105 __builtin_vsx_scalar_extract_sig_to_vec,
17106 __builtin_vsx_scalar_insert_exp_vqp): Add new builtin definitions.
17107 Rename xsxexpqp_kf, xsxsigqp_kf, xsiexpqp_kf to xsexpqp_kf_di,
17108 xsxsigqp_kf_ti, xsiexpqp_kf_di respectively.
17109 * config/rs6000/rs6000-c.cc (altivec_resolve_overloaded_builtin):
17110 Update case RS6000_OVLD_VEC_VSIE to handle MODE_VECTOR_INT for new
17111 overloaded instance. Update comments.
17112 * config/rs6000/rs6000-overload.def
17113 (__builtin_vec_scalar_insert_exp): Add new overload definition with
17115 (scalar_extract_exp_to_vec, scalar_extract_sig_to_vec): New
17116 overloaded definitions.
17117 * config/rs6000/vsx.md (V2DI_DI): New mode iterator.
17118 (DI_to_TI): New mode attribute.
17119 Rename xsxexpqp_<mode> to sxexpqp_<IEEE128:mode>_<V2DI_DI:mode>.
17120 Rename xsxsigqp_<mode> to xsxsigqp_<IEEE128:mode>_<VEC_TI:mode>.
17121 Rename xsiexpqp_<mode> to xsiexpqp_<IEEE128:mode>_<V2DI_DI:mode>.
17122 * doc/extend.texi (scalar_extract_exp_to_vec,
17123 scalar_extract_sig_to_vec): Add documentation for new builtins.
17124 (scalar_insert_exp): Add new overloaded builtin definition.
17126 2023-06-20 Li Xu <xuli1@eswincomputing.com>
17128 * config/riscv/riscv.cc (riscv_regmode_natural_size): set the natural
17129 size of vector mask mode to one rvv register.
17131 2023-06-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17133 * config/riscv/riscv-v.cc (expand_const_vector): Optimize codegen.
17135 2023-06-20 Lehua Ding <lehua.ding@rivai.ai>
17137 * config/riscv/riscv.cc (riscv_arg_has_vector): Add default
17140 2023-06-20 Richard Biener <rguenther@suse.de>
17142 * tree-ssa-dse.cc (dse_classify_store): When we found
17143 no defs and the basic-block with the original definition
17144 ends in __builtin_unreachable[_trap] the store is dead.
17146 2023-06-20 Richard Biener <rguenther@suse.de>
17148 * tree-ssa-phiprop.cc (phiprop_insert_phi): For simple loads
17149 keep the virtual SSA form up-to-date.
17151 2023-06-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17153 * config/aarch64/aarch64-simd.md (*aarch64_addp_same_reg<mode>):
17154 New define_insn_and_split.
17156 2023-06-20 Tamar Christina <tamar.christina@arm.com>
17158 * config/aarch64/aarch64.md (*mov<mode>_aarch64): Drop test comment.
17160 2023-06-20 Jan Beulich <jbeulich@suse.com>
17162 * config/i386/sse.md (vec_dupv2di): Correct %vmovddup input
17163 constraint. Add new AVX512F alternative.
17165 2023-06-20 Richard Biener <rguenther@suse.de>
17168 * dwarf2out.cc (process_scope_var): Continue processing
17169 the decl after setting a parent in case the existing DIE
17172 2023-06-20 Lehua Ding <lehua.ding@rivai.ai>
17174 * config/riscv/riscv.cc (riscv_scalable_vector_type_p): Delete.
17175 (riscv_arg_has_vector): Simplify.
17176 (riscv_pass_in_vector_p): Adjust warning message.
17178 2023-06-19 Jin Ma <jinma@linux.alibaba.com>
17180 * config/riscv/riscv.cc (riscv_compute_frame_info): Allocate frame for FCSR.
17181 (riscv_for_each_saved_reg): Save and restore FCSR in interrupt functions.
17182 * config/riscv/riscv.md (riscv_frcsr): New patterns.
17183 (riscv_fscsr): Likewise.
17185 2023-06-19 Toru Kisuki <tkisuki@tachyum.com>
17187 PR rtl-optimization/110305
17188 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
17189 Handle HONOR_SNANS for x + 0.0.
17191 2023-06-19 Jan Hubicka <jh@suse.cz>
17193 PR tree-optimization/109811
17194 PR tree-optimization/109849
17195 * passes.def: Add phiprop to early optimization passes.
17196 * tree-ssa-phiprop.cc: Allow clonning.
17198 2023-06-19 Tamar Christina <tamar.christina@arm.com>
17200 * config/aarch64/aarch64.md (arches): Add nosimd.
17201 (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Rewrite to
17204 2023-06-19 Tamar Christina <tamar.christina@arm.com>
17205 Omar Tahir <Omar.Tahir2@arm.com>
17207 * gensupport.cc (class conlist, add_constraints, add_attributes,
17208 skip_spaces, expect_char, preprocess_compact_syntax,
17209 parse_section_layout, parse_section, convert_syntax): New.
17210 (process_rtx): Check for conversion.
17211 * genoutput.cc (process_template): Check for unresolved iterators.
17212 (class data): Add compact_syntax_p.
17213 (gen_insn): Use it.
17214 * gensupport.h (compact_syntax): New.
17215 (hash-set.h): Include.
17216 * doc/md.texi: Document it.
17218 2023-06-19 Uros Bizjak <ubizjak@gmail.com>
17220 * recog.h (check_asm_operands): Change return type from int to bool.
17221 (insn_invalid_p): Ditto.
17222 (verify_changes): Ditto.
17223 (apply_change_group): Ditto.
17224 (constrain_operands): Ditto.
17225 (constrain_operands_cached): Ditto.
17226 (validate_replace_rtx_subexp): Ditto.
17227 (validate_replace_rtx): Ditto.
17228 (validate_replace_rtx_part): Ditto.
17229 (validate_replace_rtx_part_nosimplify): Ditto.
17230 (added_clobbers_hard_reg_p): Ditto.
17231 (peep2_regno_dead_p): Ditto.
17232 (peep2_reg_dead_p): Ditto.
17233 (store_data_bypass_p): Ditto.
17234 (if_test_bypass_p): Ditto.
17235 * rtl.h (split_all_insns_noflow): Change
17236 return type from unsigned int to void.
17237 * genemit.cc (output_added_clobbers_hard_reg_p): Change return type
17238 of generated added_clobbers_hard_reg_p from int to bool and adjust
17239 function body accordingly. Change "used" variable type from
17241 * recog.cc (check_asm_operands): Change return type
17242 from int to bool and adjust function body accordingly.
17243 (insn_invalid_p): Ditto. Change "is_asm" variable to bool.
17244 (verify_changes): Change return type from int to bool.
17245 (apply_change_group): Change return type from int to bool
17246 and adjust function body accordingly.
17247 (validate_replace_rtx_subexp): Change return type from int to bool.
17248 (validate_replace_rtx): Ditto.
17249 (validate_replace_rtx_part): Ditto.
17250 (validate_replace_rtx_part_nosimplify): Ditto.
17251 (constrain_operands_cached): Ditto.
17252 (constrain_operands): Ditto. Change "lose" and "win"
17253 variables type from int to bool.
17254 (split_all_insns_noflow): Change return type from unsigned int
17255 to void and adjust function body accordingly.
17256 (peep2_regno_dead_p): Change return type from int to bool.
17257 (peep2_reg_dead_p): Ditto.
17258 (peep2_find_free_register): Change "success"
17259 variable type from int to bool
17260 (store_data_bypass_p_1): Change return type from int to bool.
17261 (store_data_bypass_p): Ditto.
17263 2023-06-19 Li Xu <xuli1@eswincomputing.com>
17265 * config/riscv/vector-iterators.md: zvfh/zvfhmin depends on the
17268 2023-06-19 Pan Li <pan2.li@intel.com>
17271 * config/riscv/riscv-vector-builtins-bases.cc: Adjust expand for
17273 * config/riscv/vector-iterators.md: Remove VWLMUL1, VWLMUL1_ZVE64,
17274 VWLMUL1_ZVE32, VI_ZVE64, VI_ZVE32, VWI, VWI_ZVE64, VWI_ZVE32,
17275 VF_ZVE63 and VF_ZVE32.
17276 * config/riscv/vector.md
17277 (@pred_widen_reduc_plus<v_su><mode><vwlmul1>): Removed.
17278 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve64>): Ditto.
17279 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve32>): Ditto.
17280 (@pred_widen_reduc_plus<order><mode><vwlmul1>): Ditto.
17281 (@pred_widen_reduc_plus<order><mode><vwlmul1_zve64>): Ditto.
17282 (@pred_widen_reduc_plus<v_su><VQI:mode><VHI_LMUL1:mode>): New pattern.
17283 (@pred_widen_reduc_plus<v_su><VHI:mode><VSI_LMUL1:mode>): Ditto.
17284 (@pred_widen_reduc_plus<v_su><VSI:mode><VDI_LMUL1:mode>): Ditto.
17285 (@pred_widen_reduc_plus<order><VHF:mode><VSF_LMUL1:mode>): Ditto.
17286 (@pred_widen_reduc_plus<order><VSF:mode><VDF_LMUL1:mode>): Ditto.
17288 2023-06-19 Pan Li <pan2.li@intel.com>
17291 * config/riscv/riscv-vector-builtins-bases.cc: Adjust expand for
17293 * config/riscv/vector-iterators.md: Add VHF, VSF, VDF,
17294 VHF_LMUL1, VSF_LMUL1, VDF_LMUL1, and remove unused attr.
17295 * config/riscv/vector.md (@pred_reduc_<reduc><mode><vlmul1>): Removed.
17296 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Ditto.
17297 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Ditto.
17298 (@pred_reduc_plus<order><mode><vlmul1>): Ditto.
17299 (@pred_reduc_plus<order><mode><vlmul1_zve32>): Ditto.
17300 (@pred_reduc_plus<order><mode><vlmul1_zve64>): Ditto.
17301 (@pred_reduc_<reduc><VHF:mode><VHF_LMUL1:mode>): New pattern.
17302 (@pred_reduc_<reduc><VSF:mode><VSF_LMUL1:mode>): Ditto.
17303 (@pred_reduc_<reduc><VDF:mode><VDF_LMUL1:mode>): Ditto.
17304 (@pred_reduc_plus<order><VHF:mode><VHF_LMUL1:mode>): Ditto.
17305 (@pred_reduc_plus<order><VSF:mode><VSF_LMUL1:mode>): Ditto.
17306 (@pred_reduc_plus<order><VDF:mode><VDF_LMUL1:mode>): Ditto.
17308 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
17310 * config/gcn/gcn.cc (gcn_expand_divmod_libfunc): New function.
17311 (gcn_init_libfuncs): Add div and mod functions for all modes.
17312 Add placeholders for divmod functions.
17313 (TARGET_EXPAND_DIVMOD_LIBFUNC): Define.
17315 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
17317 * tree-vect-generic.cc: Include optabs-libfuncs.h.
17318 (get_compute_type): Check optab_libfunc.
17319 * tree-vect-stmts.cc: Include optabs-libfuncs.h.
17320 (vectorizable_operation): Check optab_libfunc.
17322 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
17324 * config/gcn/gcn-protos.h (vgpr_4reg_mode_p): New function.
17325 * config/gcn/gcn-valu.md (V_4REG, V_4REG_ALT): New iterators.
17326 (V_MOV, V_MOV_ALT): Likewise.
17327 (scalar_mode, SCALAR_MODE): Add TImode.
17328 (vnsi, VnSI, vndi, VnDI): Likewise.
17329 (vec_merge, vec_merge_with_clobber, vec_merge_with_vcc): Use V_MOV.
17330 (mov<mode>, mov<mode>_unspec): Use V_MOV.
17331 (*mov<mode>_4reg): New insn.
17332 (mov<mode>_exec): New 4reg variant.
17333 (mov<mode>_sgprbase): Likewise.
17334 (reload_in<mode>, reload_out<mode>): Use V_MOV.
17335 (vec_set<mode>): Likewise.
17336 (vec_duplicate<mode><exec>): New 4reg variant.
17337 (vec_extract<mode><scalar_mode>): Likewise.
17338 (vec_extract<V_ALL:mode><V_ALL_ALT:mode>): Rename to ...
17339 (vec_extract<V_MOV:mode><V_MOV_ALT:mode>): ... this, and use V_MOV.
17340 (vec_extract<V_4REG:mode><V_4REG_ALT:mode>_nop): New 4reg variant.
17341 (fold_extract_last_<mode>): Use V_MOV.
17342 (vec_init<V_ALL:mode><V_ALL_ALT:mode>): Rename to ...
17343 (vec_init<V_MOV:mode><V_MOV_ALT:mode>): ... this, and use V_MOV.
17344 (gather_load<mode><vnsi>, gather<mode>_expr<exec>,
17345 gather<mode>_insn_1offset<exec>, gather<mode>_insn_1offset_ds<exec>,
17346 gather<mode>_insn_2offsets<exec>): Use V_MOV.
17347 (scatter_store<mode><vnsi>, scatter<mode>_expr<exec_scatter>,
17348 scatter<mode>_insn_1offset<exec_scatter>,
17349 scatter<mode>_insn_1offset_ds<exec_scatter>,
17350 scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
17351 (maskload<mode>di, maskstore<mode>di, mask_gather_load<mode><vnsi>,
17352 mask_scatter_store<mode><vnsi>): Likewise.
17353 * config/gcn/gcn.cc (gcn_class_max_nregs): Use vgpr_4reg_mode_p.
17354 (gcn_hard_regno_mode_ok): Likewise.
17355 (GEN_VNM): Add TImode support.
17356 (USE_TI): New macro. Separate TImode operations from non-TImode ones.
17357 (gcn_vector_mode_supported_p): Add V64TImode, V32TImode, V16TImode,
17358 V8TImode, and V2TImode.
17359 (print_operand): Add 'J' and 'K' print codes.
17361 2023-06-19 Richard Biener <rguenther@suse.de>
17363 PR tree-optimization/110298
17364 * tree-ssa-loop-ivcanon.cc (tree_unroll_loops_completely):
17365 Clear number of iterations info before cleaning up the CFG.
17367 2023-06-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17369 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
17370 Simplify vec_concat of lowpart subreg and high part vec_select.
17372 2023-06-19 Tobias Burnus <tobias@codesourcery.com>
17374 * doc/invoke.texi (-foffload-options): Remove '-O3' from the examples.
17376 2023-06-19 Richard Sandiford <richard.sandiford@arm.com>
17378 * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors):
17379 Handle null niters_skip.
17381 2023-06-19 Richard Biener <rguenther@suse.de>
17383 * config/aarch64/aarch64.cc
17384 (aarch64_vector_costs::analyze_loop_vinfo): Fix reference
17385 to LOOP_VINFO_MASKS.
17387 2023-06-19 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
17390 * common/config/avr/avr-common.cc: Remove setting
17391 of OPT_fdelete_null_pointer_checks.
17392 * config/avr/avr.cc (avr_option_override): Clear
17393 flag_delete_null_pointer_checks if zero_address_valid.
17394 (avr_addr_space_zero_address_valid): New function.
17395 (TARGET_ADDR_SPACE_ZERO_ADDRESS_VALID): Provide target
17398 2023-06-19 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
17399 Robin Dapp <rdapp.gcc@gmail.com>
17401 * doc/md.texi: Add len_mask{load,store}.
17402 * genopinit.cc (main): Ditto.
17404 * internal-fn.cc (len_maskload_direct): Ditto.
17405 (len_maskstore_direct): Ditto.
17406 (expand_call_mem_ref): Ditto.
17407 (expand_partial_load_optab_fn): Ditto.
17408 (expand_len_maskload_optab_fn): Ditto.
17409 (expand_partial_store_optab_fn): Ditto.
17410 (expand_len_maskstore_optab_fn): Ditto.
17411 (direct_len_maskload_optab_supported_p): Ditto.
17412 (direct_len_maskstore_optab_supported_p): Ditto.
17413 * internal-fn.def (LEN_MASK_LOAD): Ditto.
17414 (LEN_MASK_STORE): Ditto.
17415 * optabs.def (OPTAB_CD): Ditto.
17417 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
17419 * config/riscv/autovec.md (<optab><mode>2): Add unop expanders.
17421 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
17423 * config/riscv/autovec.md (<optab><mode>3): Implement binop
17425 * config/riscv/riscv-protos.h (emit_vlmax_fp_insn): Declare.
17426 (enum vxrm_field_enum): Rename this...
17427 (enum fixed_point_rounding_mode): ...to this.
17428 (enum frm_field_enum): Rename this...
17429 (enum floating_point_rounding_mode): ...to this.
17430 * config/riscv/riscv-v.cc (emit_vlmax_fp_insn): New function
17431 * config/riscv/riscv.cc (riscv_const_insns): Clarify const
17433 (riscv_libgcc_floating_mode_supported_p): Adjust comment.
17434 (riscv_excess_precision): Do not convert to float for ZVFH.
17435 * config/riscv/vector-iterators.md: Add VF_AUTO iterator.
17437 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
17439 * config/riscv/vector-iterators.md: Add VI_QH iterator.
17440 * config/riscv/autovec-opt.md
17441 (@pred_extract_first_sextdi<mode>): New vmv.x.s pattern
17442 that includes sign extension.
17443 (@pred_extract_first_sextsi<mode>): Dito for SImode.
17445 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
17447 * config/riscv/autovec.md (vec_set<mode>): Implement.
17448 (vec_extract<mode><vel>): Implement.
17449 * config/riscv/riscv-protos.h (enum insn_type): Add slide insn.
17450 (emit_vlmax_slide_insn): Declare.
17451 (emit_nonvlmax_slide_tu_insn): Declare.
17452 (emit_scalar_move_insn): Export.
17453 (emit_nonvlmax_integer_move_insn): Export.
17454 * config/riscv/riscv-v.cc (emit_vlmax_slide_insn): New function.
17455 (emit_nonvlmax_slide_tu_insn): New function.
17456 (emit_vlmax_masked_mu_insn): No change.
17457 (emit_vlmax_integer_move_insn): Export.
17459 2023-06-19 Richard Biener <rguenther@suse.de>
17461 * tree-vectorizer.h (enum vect_partial_vector_style): New.
17462 (_loop_vec_info::partial_vector_style): Likewise.
17463 (LOOP_VINFO_PARTIAL_VECTORS_STYLE): Likewise.
17464 (rgroup_controls::compare_type): Add.
17465 (vec_loop_masks): Change from a typedef to auto_vec<>
17467 * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors):
17468 Adjust. Convert niters_skip to compare_type.
17469 (vect_set_loop_condition_partial_vectors_avx512): New function
17470 implementing the AVX512 partial vector codegen.
17471 (vect_set_loop_condition): Dispatch to the correct
17472 vect_set_loop_condition_partial_vectors_* function based on
17473 LOOP_VINFO_PARTIAL_VECTORS_STYLE.
17474 (vect_prepare_for_masked_peels): Compute LOOP_VINFO_MASK_SKIP_NITERS
17475 in the original niter type.
17476 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): Initialize
17477 partial_vector_style.
17478 (can_produce_all_loop_masks_p): Adjust.
17479 (vect_verify_full_masking): Produce the rgroup_controls vector
17480 here. Set LOOP_VINFO_PARTIAL_VECTORS_STYLE on success.
17481 (vect_verify_full_masking_avx512): New function implementing
17482 verification of AVX512 style masking.
17483 (vect_verify_loop_lens): Set LOOP_VINFO_PARTIAL_VECTORS_STYLE.
17484 (vect_analyze_loop_2): Also try AVX512 style masking.
17486 (vect_estimate_min_profitable_iters): Implement AVX512 style
17487 mask producing cost.
17488 (vect_record_loop_mask): Do not build the rgroup_controls
17489 vector here but record masks in a hash-set.
17490 (vect_get_loop_mask): Implement AVX512 style mask query,
17491 complementing the existing while_ult style.
17493 2023-06-19 Richard Biener <rguenther@suse.de>
17495 * tree-vectorizer.h (vect_get_loop_mask): Add loop_vec_info
17497 * tree-vect-loop.cc (vect_get_loop_mask): Likewise.
17498 (vectorize_fold_left_reduction): Adjust.
17499 (vect_transform_reduction): Likewise.
17500 (vectorizable_live_operation): Likewise.
17501 * tree-vect-stmts.cc (vectorizable_call): Likewise.
17502 (vectorizable_operation): Likewise.
17503 (vectorizable_store): Likewise.
17504 (vectorizable_load): Likewise.
17505 (vectorizable_condition): Likewise.
17507 2023-06-19 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
17510 * config/avr/avr.opt (mgas-isr-prologues, mmain-is-OS_task):
17511 Add Optimization option property.
17513 2023-06-19 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
17515 * config/xtensa/xtensa.cc (xtensa_constantsynth_2insn):
17516 Add new pattern for the abovementioned case.
17518 2023-06-19 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
17520 * config/xtensa/xtensa.cc
17521 (TARGET_MEMORY_MOVE_COST, xtensa_memory_move_cost): Remove.
17523 2023-06-19 Jiufu Guo <guojiufu@linux.ibm.com>
17525 * config/rs6000/rs6000.cc (TARGET_CONST_ANCHOR): New define.
17527 2023-06-19 Jiufu Guo <guojiufu@linux.ibm.com>
17529 * cse.cc (try_const_anchors): Check SCALAR_INT_MODE.
17531 2023-06-19 liuhongt <hongtao.liu@intel.com>
17534 * config/i386/sse.md (<sse2_avx2>_packsswb<mask_name>):
17536 (sse2_packsswb<mask_name>): .. this, ..
17537 (avx2_packsswb<mask_name>): .. this and ..
17538 (avx512bw_packsswb<mask_name>): .. this.
17539 (<sse2_avx2>_packssdw<mask_name>): Substitute with ..
17540 (sse2_packssdw<mask_name>): .. this, ..
17541 (avx2_packssdw<mask_name>): .. this and ..
17542 (avx512bw_packssdw<mask_name>): .. this.
17544 2023-06-19 liuhongt <hongtao.liu@intel.com>
17547 * config/i386/i386-expand.cc (ix86_split_mmx_pack): Use
17548 UNSPEC_US_TRUNCATE instead of original us_truncate for
17550 * config/i386/mmx.md (mmx_pack<s_trunsuffix>swb): Substitute
17552 (mmx_packsswb): .. this and ..
17553 (mmx_packuswb): .. this.
17554 (mmx_packusdw): Use UNSPEC_US_TRUNCATE instead of original
17556 (s_trunsuffix): Removed code iterator.
17557 (any_s_truncate): Ditto.
17558 * config/i386/sse.md (<sse2_avx2>_packuswb<mask_name>): Use
17559 UNSPEC_US_TRUNCATE instead of original us_truncate.
17560 (<sse4_1_avx2>_packusdw<mask_name>): Ditto.
17561 * config/i386/i386.md (UNSPEC_US_TRUNCATE): New unspec_c_enum.
17563 2023-06-18 Pan Li <pan2.li@intel.com>
17565 * config/riscv/riscv-vector-builtins-bases.cc: Fix one typo.
17567 2023-06-18 Uros Bizjak <ubizjak@gmail.com>
17569 * rtl.h (*rtx_equal_p_callback_function):
17570 Change return type from int to bool.
17571 (rtx_equal_p): Ditto.
17572 (*hash_rtx_callback_function): Ditto.
17573 * rtl.cc (rtx_equal_p): Change return type from int to bool
17574 and adjust function body accordingly.
17575 * early-remat.cc (scratch_equal): Ditto.
17576 * sel-sched-ir.cc (skip_unspecs_callback): Ditto.
17577 (hash_with_unspec_callback): Ditto.
17579 2023-06-18 Jeff Law <jlaw@ventanamicro.com>
17581 * config/arc/arc.md (movqi_insn): Allow certain constants to
17582 be stored into memory in the pattern's condition.
17583 (movsf_insn): Similarly.
17585 2023-06-18 Honza <jh@ryzen3.suse.cz>
17587 PR tree-optimization/109849
17588 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Add new parameter
17589 ES; handle ipa_predicate::not_sra_candidate.
17590 (evaluate_properties_for_edge): Pass es to
17591 evaluate_conditions_for_known_args.
17592 (ipa_fn_summary_t::duplicate): Handle sra candidates.
17593 (dump_ipa_call_summary): Dump points_to_possible_sra_candidate.
17594 (load_or_store_of_ptr_parameter): New function.
17595 (points_to_possible_sra_candidate_p): New function.
17596 (analyze_function_body): Initialize points_to_possible_sra_candidate;
17597 determine sra predicates.
17598 (estimate_ipcp_clone_size_and_time): Update call of
17599 evaluate_conditions_for_known_args.
17600 (remap_edge_params): Update points_to_possible_sra_candidate.
17601 (read_ipa_call_summary): Stream points_to_possible_sra_candidate
17602 (write_ipa_call_summary): Likewise.
17603 * ipa-predicate.cc (ipa_predicate::add_clause): Handle not_sra_candidate.
17604 (dump_condition): Dump it.
17605 * ipa-predicate.h (struct inline_param_summary): Add
17606 points_to_possible_sra_candidate.
17608 2023-06-18 Roger Sayle <roger@nextmovesoftware.com>
17610 * config/i386/i386-expand.cc (ix86_expand_carry): New helper
17611 function for setting the carry flag.
17612 (ix86_expand_builtin) <handlecarry>: Use it here.
17613 * config/i386/i386-protos.h (ix86_expand_carry): Prototype here.
17614 * config/i386/i386.md (uaddc<mode>5): Use ix86_expand_carry.
17615 (usubc<mode>5): Likewise.
17617 2023-06-18 Roger Sayle <roger@nextmovesoftware.com>
17619 * config/i386/i386.md (*concat<mode><dwi>3_1): Use QImode
17620 for the immediate constant shift count.
17621 (*concat<mode><dwi>3_2): Likewise.
17622 (*concat<mode><dwi>3_3): Likewise.
17623 (*concat<mode><dwi>3_4): Likewise.
17624 (*concat<mode><dwi>3_5): Likewise.
17625 (*concat<mode><dwi>3_6): Likewise.
17627 2023-06-18 Uros Bizjak <ubizjak@gmail.com>
17629 * cse.cc (hash_rtx_cb): Rename to hash_rtx.
17630 (hash_rtx): Remove.
17631 * early-remat.cc (remat_candidate_hasher::equal): Update
17632 to call rtx_equal_p with rtx_equal_p_callback_function argument.
17633 * rtl.cc (rtx_equal_p_cb): Rename to rtx_equal_p.
17634 (rtx_equal_p): Remove.
17635 * rtl.h (rtx_equal_p): Add rtx_equal_p_callback_function
17636 argument with NULL default value.
17637 (rtx_equal_p_cb): Remove function declaration.
17638 (hash_rtx_cb): Ditto.
17639 (hash_rtx): Add hash_rtx_callback_function argument
17640 with NULL default value.
17641 * sel-sched-ir.cc (free_nop_pool): Update function comment.
17642 (skip_unspecs_callback): Ditto.
17643 (vinsn_init): Update to call hash_rtx with
17644 hash_rtx_callback_function argument.
17645 (vinsn_equal_p): Ditto.
17647 2023-06-18 yulong <shiyulong@iscas.ac.cn>
17649 * config/riscv/genrvv-type-indexer.cc (valid_type): Enable FP16 tuple.
17650 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
17651 (ADJUST_ALIGNMENT): Ditto.
17652 (RVV_TUPLE_PARTIAL_MODES): Ditto.
17653 (ADJUST_NUNITS): Ditto.
17654 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t):
17656 (vfloat16mf4x3_t): Ditto.
17657 (vfloat16mf4x4_t): Ditto.
17658 (vfloat16mf4x5_t): Ditto.
17659 (vfloat16mf4x6_t): Ditto.
17660 (vfloat16mf4x7_t): Ditto.
17661 (vfloat16mf4x8_t): Ditto.
17662 (vfloat16mf2x2_t): Ditto.
17663 (vfloat16mf2x3_t): Ditto.
17664 (vfloat16mf2x4_t): Ditto.
17665 (vfloat16mf2x5_t): Ditto.
17666 (vfloat16mf2x6_t): Ditto.
17667 (vfloat16mf2x7_t): Ditto.
17668 (vfloat16mf2x8_t): Ditto.
17669 (vfloat16m1x2_t): Ditto.
17670 (vfloat16m1x3_t): Ditto.
17671 (vfloat16m1x4_t): Ditto.
17672 (vfloat16m1x5_t): Ditto.
17673 (vfloat16m1x6_t): Ditto.
17674 (vfloat16m1x7_t): Ditto.
17675 (vfloat16m1x8_t): Ditto.
17676 (vfloat16m2x2_t): Ditto.
17677 (vfloat16m2x3_t): Ditto.
17678 (vfloat16m2x4_t): Ditto.
17679 (vfloat16m4x2_t): Ditto.
17680 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): New macro.
17681 (vfloat16mf4x3_t): Ditto.
17682 (vfloat16mf4x4_t): Ditto.
17683 (vfloat16mf4x5_t): Ditto.
17684 (vfloat16mf4x6_t): Ditto.
17685 (vfloat16mf4x7_t): Ditto.
17686 (vfloat16mf4x8_t): Ditto.
17687 (vfloat16mf2x2_t): Ditto.
17688 (vfloat16mf2x3_t): Ditto.
17689 (vfloat16mf2x4_t): Ditto.
17690 (vfloat16mf2x5_t): Ditto.
17691 (vfloat16mf2x6_t): Ditto.
17692 (vfloat16mf2x7_t): Ditto.
17693 (vfloat16mf2x8_t): Ditto.
17694 (vfloat16m1x2_t): Ditto.
17695 (vfloat16m1x3_t): Ditto.
17696 (vfloat16m1x4_t): Ditto.
17697 (vfloat16m1x5_t): Ditto.
17698 (vfloat16m1x6_t): Ditto.
17699 (vfloat16m1x7_t): Ditto.
17700 (vfloat16m1x8_t): Ditto.
17701 (vfloat16m2x2_t): Ditto.
17702 (vfloat16m2x3_t): Ditto.
17703 (vfloat16m2x4_t): Ditto.
17704 (vfloat16m4x2_t): Ditto.
17705 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): New.
17706 * config/riscv/riscv.md: New.
17707 * config/riscv/vector-iterators.md: New.
17709 2023-06-17 Roger Sayle <roger@nextmovesoftware.com>
17711 * config/i386/i386-expand.cc (ix86_expand_move): Check that OP1 is
17712 CONST_WIDE_INT_P before calling ix86_convert_wide_int_to_broadcast.
17713 Generalize special case for converting TImode to V1TImode to handle
17714 all 128-bit vector conversions.
17716 2023-06-17 Costas Argyris <costas.argyris@gmail.com>
17718 * gcc-ar.cc (main): Refactor to slightly reduce code
17719 duplication. Avoid unnecessary elements in nargv.
17721 2023-06-16 Pan Li <pan2.li@intel.com>
17724 * config/riscv/riscv-vector-builtins-bases.cc: Add ret_mode for
17725 integer reduction expand.
17726 * config/riscv/vector-iterators.md: Add VQI, VHI, VSI and VDI,
17727 and the LMUL1 attr respectively.
17728 * config/riscv/vector.md
17729 (@pred_reduc_<reduc><mode><vlmul1>): Removed.
17730 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Likewise.
17731 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Likewise.
17732 (@pred_reduc_<reduc><VQI:mode><VQI_LMUL1:mode>): New pattern.
17733 (@pred_reduc_<reduc><VHI:mode><VHI_LMUL1:mode>): Likewise.
17734 (@pred_reduc_<reduc><VSI:mode><VSI_LMUL1:mode>): Likewise.
17735 (@pred_reduc_<reduc><VDI:mode><VDI_LMUL1:mode>): Likewise.
17737 2023-06-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17740 * config/riscv/riscv-vsetvl.cc (insert_vsetvl): Fix bug.
17742 2023-06-16 Jakub Jelinek <jakub@redhat.com>
17744 PR middle-end/79173
17745 * builtin-types.def (BT_FN_UINT_UINT_UINT_UINT_UINTPTR,
17746 BT_FN_ULONG_ULONG_ULONG_ULONG_ULONGPTR,
17747 BT_FN_ULONGLONG_ULONGLONG_ULONGLONG_ULONGLONG_ULONGLONGPTR): New
17749 * builtins.def (BUILT_IN_ADDC, BUILT_IN_ADDCL, BUILT_IN_ADDCLL,
17750 BUILT_IN_SUBC, BUILT_IN_SUBCL, BUILT_IN_SUBCLL): New builtins.
17751 * builtins.cc (fold_builtin_addc_subc): New function.
17752 (fold_builtin_varargs): Handle BUILT_IN_{ADD,SUB}C{,L,LL}.
17753 * doc/extend.texi (__builtin_addc, __builtin_subc): Document.
17755 2023-06-16 Jakub Jelinek <jakub@redhat.com>
17757 PR tree-optimization/110271
17758 * tree-ssa-math-opts.cc (math_opts_dom_walker::after_dom_children)
17759 <case PLUS_EXPR>: Ignore return value from match_arith_overflow,
17760 instead call match_uaddc_usubc only if gsi_stmt (gsi) is still stmt.
17762 2023-06-16 Martin Jambor <mjambor@suse.cz>
17764 * configure: Regenerate.
17766 2023-06-16 Roger Sayle <roger@nextmovesoftware.com>
17767 Uros Bizjak <ubizjak@gmail.com>
17770 * config/i386/i386.md (*add<dwi>3_doubleword_concat): New
17771 define_insn_and_split combine *add<dwi>3_doubleword with
17772 a *concat<mode><dwi>3 for more efficient lowering after reload.
17774 2023-06-16 Vladimir N. Makarov <vmakarov@redhat.com>
17776 * ira-lives.cc: Include except.h.
17777 (process_bb_node_lives): Ignore conflicts from cleanup exceptions
17778 when the pseudo does not live at the exception landing pad.
17780 2023-06-16 Alex Coplan <alex.coplan@arm.com>
17782 * doc/invoke.texi: Document -Welaborated-enum-base.
17784 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17786 * config/aarch64/aarch64-simd-builtins.def (shrn2_n): Rename builtins to...
17787 (ushrn2_n): ... This.
17788 (sqshrn2_n): Rename builtins to...
17789 (ssqshrn2_n): ... This.
17790 (uqshrn2_n): Rename builtins to...
17791 (uqushrn2_n): ... This.
17792 * config/aarch64/arm_neon.h (vqshrn_high_n_s16): Adjust for the above.
17793 (vqshrn_high_n_s32): Likewise.
17794 (vqshrn_high_n_s64): Likewise.
17795 (vqshrn_high_n_u16): Likewise.
17796 (vqshrn_high_n_u32): Likewise.
17797 (vqshrn_high_n_u64): Likewise.
17798 (vshrn_high_n_s16): Likewise.
17799 (vshrn_high_n_s32): Likewise.
17800 (vshrn_high_n_s64): Likewise.
17801 (vshrn_high_n_u16): Likewise.
17802 (vshrn_high_n_u32): Likewise.
17803 (vshrn_high_n_u64): Likewise.
17804 * config/aarch64/aarch64-simd.md (aarch64_<shrn_op>shrn2_n<mode>_insn_le):
17806 (aarch64_<shrn_op><sra_op>shrn2_n<mode>_insn_le): ... This.
17807 Use SHIFTRT iterator and AARCH64_VALID_SHRN_OP check.
17808 (aarch64_<shrn_op>shrn2_n<mode>_insn_be): Rename to...
17809 (aarch64_<shrn_op><sra_op>shrn2_n<mode>_insn_be): ... This.
17810 Use SHIFTRT iterator and AARCH64_VALID_SHRN_OP check.
17811 (aarch64_<shrn_op>shrn2_n<mode>): Rename to...
17812 (aarch64_<shrn_op><sra_op>shrn2_n<mode>): ... This.
17813 Update expander for the above.
17815 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17817 * config/aarch64/aarch64-simd-builtins.def (shrn2): Rename builtins to...
17818 (shrn2_n): ... This.
17819 (rshrn2): Rename builtins to...
17820 (rshrn2_n): ... This.
17821 * config/aarch64/arm_neon.h (vrshrn_high_n_s16): Adjust for the above.
17822 (vrshrn_high_n_s32): Likewise.
17823 (vrshrn_high_n_s64): Likewise.
17824 (vrshrn_high_n_u16): Likewise.
17825 (vrshrn_high_n_u32): Likewise.
17826 (vrshrn_high_n_u64): Likewise.
17827 (vshrn_high_n_s16): Likewise.
17828 (vshrn_high_n_s32): Likewise.
17829 (vshrn_high_n_s64): Likewise.
17830 (vshrn_high_n_u16): Likewise.
17831 (vshrn_high_n_u32): Likewise.
17832 (vshrn_high_n_u64): Likewise.
17833 * config/aarch64/aarch64-simd.md (*aarch64_<srn_op>shrn<mode>2_vect_le):
17835 (*aarch64_<srn_op>shrn<mode>2_vect_be): Likewise.
17836 (aarch64_shrn2<mode>_insn_le): Likewise.
17837 (aarch64_shrn2<mode>_insn_be): Likewise.
17838 (aarch64_shrn2<mode>): Likewise.
17839 (aarch64_rshrn2<mode>_insn_le): Likewise.
17840 (aarch64_rshrn2<mode>_insn_be): Likewise.
17841 (aarch64_rshrn2<mode>): Likewise.
17842 (aarch64_<sur>q<r>shr<u>n2_n<mode>_insn_le): Likewise.
17843 (aarch64_<shrn_op>shrn2_n<mode>_insn_le): New define_insn.
17844 (aarch64_<sur>q<r>shr<u>n2_n<mode>_insn_be): Delete.
17845 (aarch64_<shrn_op>shrn2_n<mode>_insn_be): New define_insn.
17846 (aarch64_<sur>q<r>shr<u>n2_n<mode>): Delete.
17847 (aarch64_<shrn_op>shrn2_n<mode>): New define_expand.
17848 (aarch64_<shrn_op>rshrn2_n<mode>_insn_le): New define_insn.
17849 (aarch64_<shrn_op>rshrn2_n<mode>_insn_be): New define_insn.
17850 (aarch64_<shrn_op>rshrn2_n<mode>): New define_expand.
17851 (aarch64_sqshrun2_n<mode>_insn_le): New define_insn.
17852 (aarch64_sqshrun2_n<mode>_insn_be): New define_insn.
17853 (aarch64_sqshrun2_n<mode>): New define_expand.
17854 (aarch64_sqrshrun2_n<mode>_insn_le): New define_insn.
17855 (aarch64_sqrshrun2_n<mode>_insn_be): New define_insn.
17856 (aarch64_sqrshrun2_n<mode>): New define_expand.
17857 * config/aarch64/iterators.md (UNSPEC_SQSHRUN, UNSPEC_SQRSHRUN,
17858 UNSPEC_SQSHRN, UNSPEC_UQSHRN, UNSPEC_SQRSHRN, UNSPEC_UQRSHRN):
17859 Delete unspec values.
17860 (VQSHRN_N): Delete int iterator.
17862 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17864 * config/aarch64/aarch64.h (AARCH64_VALID_SHRN_OP): Define.
17865 * config/aarch64/aarch64-simd.md
17866 (*aarch64_<shrn_op>shrn_n<mode>_insn<vczle><vczbe>): Rename to...
17867 (*aarch64_<shrn_op><shrn_s>shrn_n<mode>_insn<vczle><vczbe>): ... This.
17868 Use SHIFTRT iterator and add AARCH64_VALID_SHRN_OP to condition.
17869 * config/aarch64/iterators.md (shrn_s): New code attribute.
17871 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17873 * config/aarch64/aarch64-simd.md (aarch64_<sur>q<r>shr<u>n_n<mode>):
17875 (aarch64_<shrn_op>shrn_n<mode>): ... This. Reimplement with RTL codes.
17876 (*aarch64_<shrn_op>rshrn_n<mode>_insn): New define_insn.
17877 (aarch64_sqrshrun_n<mode>_insn): Likewise.
17878 (aarch64_sqshrun_n<mode>_insn): Likewise.
17879 (aarch64_<shrn_op>rshrn_n<mode>): New define_expand.
17880 (aarch64_sqshrun_n<mode>): Likewise.
17881 (aarch64_sqrshrun_n<mode>): Likewise.
17882 * config/aarch64/iterators.md (V2XWIDE): Add HI and SI modes.
17884 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17886 * config/aarch64/aarch64-simd-builtins.def (shrn): Rename builtins to...
17887 (shrn_n): ... This.
17888 (rshrn): Rename builtins to...
17889 (rshrn_n): ... This.
17890 * config/aarch64/arm_neon.h (vshrn_n_s16): Adjust for the above.
17891 (vshrn_n_s32): Likewise.
17892 (vshrn_n_s64): Likewise.
17893 (vshrn_n_u16): Likewise.
17894 (vshrn_n_u32): Likewise.
17895 (vshrn_n_u64): Likewise.
17896 (vrshrn_n_s16): Likewise.
17897 (vrshrn_n_s32): Likewise.
17898 (vrshrn_n_s64): Likewise.
17899 (vrshrn_n_u16): Likewise.
17900 (vrshrn_n_u32): Likewise.
17901 (vrshrn_n_u64): Likewise.
17902 * config/aarch64/aarch64-simd.md
17903 (*aarch64_<srn_op>shrn<mode><vczle><vczbe>): Delete.
17904 (aarch64_shrn<mode>): Likewise.
17905 (aarch64_rshrn<mode><vczle><vczbe>_insn): Likewise.
17906 (aarch64_rshrn<mode>): Likewise.
17907 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn<vczle><vczbe>): Likewise.
17908 (aarch64_<sur>q<r>shr<u>n_n<mode>): Likewise.
17909 (*aarch64_<shrn_op>shrn_n<mode>_insn<vczle><vczbe>): New define_insn.
17910 (*aarch64_<shrn_op>rshrn_n<mode>_insn<vczle><vczbe>): Likewise.
17911 (*aarch64_sqshrun_n<mode>_insn<vczle><vczbe>): Likewise.
17912 (*aarch64_sqrshrun_n<mode>_insn<vczle><vczbe>): Likewise.
17913 (aarch64_<shrn_op>shrn_n<mode>): New define_expand.
17914 (aarch64_<shrn_op>rshrn_n<mode>): Likewise.
17915 (aarch64_sqshrun_n<mode>): Likewise.
17916 (aarch64_sqrshrun_n<mode>): Likewise.
17917 * config/aarch64/iterators.md (ALL_TRUNC): New code iterator.
17918 (TRUNCEXTEND): New code attribute.
17919 (TRUNC_SHIFT): Likewise.
17920 (shrn_op): Likewise.
17921 * config/aarch64/predicates.md (aarch64_simd_umax_quarter_mode):
17924 2023-06-16 Pan Li <pan2.li@intel.com>
17926 * config/riscv/riscv-vsetvl.cc
17927 (pass_vsetvl::global_eliminate_vsetvl_insn): Initialize var by NULL.
17929 2023-06-16 Richard Biener <rguenther@suse.de>
17931 PR tree-optimization/110278
17932 * match.pd (uns < (typeof uns)(uns != 0) -> false): New.
17933 (x != (typeof x)(x == 0) -> true): Likewise.
17935 2023-06-16 Pali Rohár <pali@kernel.org>
17937 * config/i386/mingw-w64.h (CPP_SPEC): Adjust for -mcrtdll=.
17938 (REAL_LIBGCC_SPEC): New define.
17939 * config/i386/mingw.opt: Add mcrtdll=
17940 * config/i386/mingw32.h (CPP_SPEC): Adjust for -mcrtdll=.
17941 (REAL_LIBGCC_SPEC): Adjust for -mcrtdll=.
17942 (STARTFILE_SPEC): Adjust for -mcrtdll=.
17943 * doc/invoke.texi: Add mcrtdll= documentation.
17945 2023-06-16 Simon Dardis <simon.dardis@imgtec.com>
17947 * config/mips/mips.cc (enum mips_code_readable_setting):New enmu.
17948 (mips_handle_code_readable_attr):New static function.
17949 (mips_get_code_readable_attr):New static enum function.
17950 (mips_set_current_function):Set the code_readable mode.
17951 (mips_option_override):Same as above.
17952 * doc/extend.texi:Document code_readable.
17954 2023-06-16 Richard Biener <rguenther@suse.de>
17956 PR tree-optimization/110269
17957 * fold-const.cc (fold_binary_loc): Merge x != 0 folding
17958 with tree_expr_nonzero_p ...
17959 * match.pd (cmp (convert? addr@0) integer_zerop): With this
17962 2023-06-15 Marek Polacek <polacek@redhat.com>
17964 * Makefile.in: Set LD_PICFLAG. Use it. Set enable_host_pie.
17965 Remove NO_PIE_CFLAGS and NO_PIE_FLAG. Pass LD_PICFLAG to
17966 ALL_LINKERFLAGS. Use the "pic" build of libiberty if --enable-host-pie.
17967 * configure.ac (--enable-host-shared): Don't set PICFLAG here.
17968 (--enable-host-pie): New check. Set PICFLAG and LD_PICFLAG after this
17970 * configure: Regenerate.
17971 * doc/install.texi: Document --enable-host-pie.
17973 2023-06-15 Manolis Tsamis <manolis.tsamis@vrull.eu>
17975 * regcprop.cc (maybe_mode_change): Enable stack pointer
17978 2023-06-15 Andrew MacLeod <amacleod@redhat.com>
17980 PR tree-optimization/110266
17981 * gimple-range-fold.cc (adjust_imagpart_expr): Check for integer
17983 (adjust_realpart_expr): Ditto.
17985 2023-06-15 Jan Beulich <jbeulich@suse.com>
17987 * config/i386/sse.md (<avx512>_vec_dup<mode><mask_name>): Use
17990 2023-06-15 Jan Beulich <jbeulich@suse.com>
17992 * config/i386/constraints.md: Mention k and r for B.
17994 2023-06-15 Lulu Cheng <chenglulu@loongson.cn>
17995 Andrew Pinski <apinski@marvell.com>
17998 * config/loongarch/loongarch.md: Modify the register constraints for template
17999 "jumptable" and "indirect_jump" from "r" to "e".
18001 2023-06-15 Xi Ruoyao <xry111@xry111.site>
18003 * config/loongarch/loongarch-tune.h (loongarch_align): New
18005 * config/loongarch/loongarch-def.h (loongarch_cpu_align): New
18007 * config/loongarch/loongarch-def.c (loongarch_cpu_align): Define
18009 * config/loongarch/loongarch.cc
18010 (loongarch_option_override_internal): Set the value of
18011 -falign-functions= if -falign-functions is enabled but no value
18012 is given. Likewise for -falign-labels=.
18014 2023-06-15 Jakub Jelinek <jakub@redhat.com>
18016 PR middle-end/79173
18017 * internal-fn.def (UADDC, USUBC): New internal functions.
18018 * internal-fn.cc (expand_UADDC, expand_USUBC): New functions.
18019 (commutative_ternary_fn_p): Return true also for IFN_UADDC.
18020 * optabs.def (uaddc5_optab, usubc5_optab): New optabs.
18021 * tree-ssa-math-opts.cc (uaddc_cast, uaddc_ne0, uaddc_is_cplxpart,
18022 match_uaddc_usubc): New functions.
18023 (math_opts_dom_walker::after_dom_children): Call match_uaddc_usubc
18024 for PLUS_EXPR, MINUS_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR unless
18025 other optimizations have been successful for those.
18026 * gimple-fold.cc (gimple_fold_call): Handle IFN_UADDC and IFN_USUBC.
18027 * fold-const-call.cc (fold_const_call): Likewise.
18028 * gimple-range-fold.cc (adjust_imagpart_expr): Likewise.
18029 * tree-ssa-dce.cc (eliminate_unnecessary_stmts): Likewise.
18030 * doc/md.texi (uaddc<mode>5, usubc<mode>5): Document new named
18032 * config/i386/i386.md (uaddc<mode>5, usubc<mode>5): New
18033 define_expand patterns.
18034 (*setcc_qi_addqi3_cconly_overflow_1_<mode>, *setccc): Split
18035 into NOTE_INSN_DELETED note rather than nop instruction.
18036 (*setcc_qi_negqi_ccc_1_<mode>, *setcc_qi_negqi_ccc_2_<mode>):
18039 2023-06-15 Jakub Jelinek <jakub@redhat.com>
18041 PR middle-end/79173
18042 * config/i386/i386.md (subborrow<mode>): Add alternative with
18043 memory destination and add for it define_peephole2
18044 TARGET_READ_MODIFY_WRITE/-Os patterns to prefer using memory
18045 destination in these patterns.
18047 2023-06-15 Jakub Jelinek <jakub@redhat.com>
18049 PR middle-end/79173
18050 * config/i386/i386.md (*sub<mode>_3, @add<mode>3_carry,
18051 addcarry<mode>, @sub<mode>3_carry, *add<mode>3_cc_overflow_1): Add
18052 define_peephole2 TARGET_READ_MODIFY_WRITE/-Os patterns to prefer
18053 using memory destination in these patterns.
18055 2023-06-15 Jakub Jelinek <jakub@redhat.com>
18057 * gimple-fold.cc (gimple_fold_call): Move handling of arg0
18058 as well as arg1 INTEGER_CSTs for .UBSAN_CHECK_{ADD,SUB,MUL}
18059 and .{ADD,SUB,MUL}_OVERFLOW calls from here...
18060 * fold-const-call.cc (fold_const_call): ... here.
18062 2023-06-15 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
18064 * config/aarch64/aarch64-simd.md (aarch64_<su>abd<mode>):
18065 Rename to <su>abd<mode>3.
18066 * config/aarch64/aarch64-sve.md (<su>abd<mode>_3): Rename
18069 2023-06-15 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
18071 * doc/md.texi (sabd, uabd): Document them.
18072 * internal-fn.def (ABD): Use new optab.
18073 * optabs.def (sabd_optab, uabd_optab): New optabs,
18074 * tree-vect-patterns.cc (vect_recog_absolute_difference):
18075 Recognize the following idiom abs (a - b).
18076 (vect_recog_sad_pattern): Refactor to use
18077 vect_recog_absolute_difference.
18078 (vect_recog_abd_pattern): Use patterns found by
18079 vect_recog_absolute_difference to build a new ABD
18082 2023-06-15 chenxiaolong <chenxl04200420@163.com>
18084 * config/loongarch/loongarch.h (LARCH_CALL_RATIO): Modify the value
18085 of macro LARCH_CALL_RATIO on LoongArch to make it perform optimally.
18087 2023-06-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18089 * config/riscv/riscv-v.cc (shuffle_merge_patterns): New pattern.
18090 (expand_vec_perm_const_1): Add merge optmization.
18092 2023-06-15 Lehua Ding <lehua.ding@rivai.ai>
18095 * config/riscv/riscv.cc (riscv_get_arg_info): Return NULL_RTX for vector mode
18096 (riscv_pass_by_reference): Return true for vector mode
18098 2023-06-15 Pan Li <pan2.li@intel.com>
18100 * config/riscv/autovec-opt.md: Align the predictor sytle.
18101 * config/riscv/autovec.md: Ditto.
18103 2023-06-15 Pan Li <pan2.li@intel.com>
18105 * config/riscv/riscv-v.cc (rvv_builder::get_merge_scalar_mask):
18106 Take elen instead of scalar BITS_PER_WORD.
18107 (expand_vector_init_merge_repeating_sequence): Use inner_bits_size
18108 instead of scaler BITS_PER_WORD.
18110 2023-06-14 Jivan Hakobyan <jivanhakobyan9@gmail.com>
18112 * config/moxie/uclinux.h (MFWRAP_SPEC): Remove
18114 2023-06-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
18116 * config/aarch64/aarch64-sve-builtins-base.cc (svlast_impl::fold):
18117 Fix signed comparison warning in loop from npats to enelts.
18119 2023-06-14 Thomas Schwinge <thomas@codesourcery.com>
18121 * gcc.cc (driver_handle_option): Forward host '-lgfortran', '-lm'
18122 to offloading compilation.
18123 * config/gcn/mkoffload.cc (main): Adjust.
18124 * config/nvptx/mkoffload.cc (main): Likewise.
18125 * doc/invoke.texi (foffload-options): Update example.
18127 2023-06-14 liuhongt <hongtao.liu@intel.com>
18130 * config/i386/sse.md (mov<mode>_internal>): Use x instead of v
18131 for alternative 2 since there's no evex version for vpcmpeqd
18134 2023-06-13 Jeff Law <jlaw@ventanamicro.com>
18136 * gcc.cc (LINK_COMMAND_SPEC): Remove mudflap spec handling.
18138 2023-06-13 Jeff Law <jlaw@ventanamicro.com>
18140 * config/sh/divtab.cc: Remove.
18142 2023-06-13 Jakub Jelinek <jakub@redhat.com>
18144 * config/i386/i386.cc (standard_sse_constant_opcode): Remove
18145 superfluous spaces around \t for vpcmpeqd.
18147 2023-06-13 Roger Sayle <roger@nextmovesoftware.com>
18149 * expr.cc (store_constructor) <case VECTOR_TYPE>: Don't bother
18150 clearing vectors with only a single element. Set CLEARED if the
18151 vector was initialized to zero.
18153 2023-06-13 Lehua Ding <lehua.ding@rivai.ai>
18155 * config/riscv/riscv-v.cc (struct mode_vtype_group): Remove duplicate
18158 (TUPLE_ENTRY): Undef.
18160 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18162 * config/riscv/riscv-v.cc (rvv_builder::single_step_npatterns_p): Add comment.
18163 (shuffle_generic_patterns): Ditto.
18164 (expand_vec_perm_const_1): Ditto.
18166 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18168 * config/riscv/riscv-v.cc (emit_vlmax_decompress_insn): Fix bug.
18169 (shuffle_decompress_patterns): Ditto.
18171 2023-06-13 Richard Biener <rguenther@suse.de>
18173 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Free loop BBs.
18175 2023-06-13 Yanzhang Wang <yanzhang.wang@intel.com>
18176 Kito Cheng <kito.cheng@sifive.com>
18178 * config/riscv/riscv-protos.h (riscv_init_cumulative_args): Set
18179 warning flag if func is not builtin
18180 * config/riscv/riscv.cc
18181 (riscv_scalable_vector_type_p): Determine whether the type is scalable vector.
18182 (riscv_arg_has_vector): Determine whether the arg is vector type.
18183 (riscv_pass_in_vector_p): Check the vector type param is passed by value.
18184 (riscv_init_cumulative_args): The same as header.
18185 (riscv_get_arg_info): Add the checking.
18186 (riscv_function_value): Check the func return and set warning flag
18187 * config/riscv/riscv.h (INIT_CUMULATIVE_ARGS): Add a flag to
18188 determine whether warning psabi or not.
18190 2023-06-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
18192 * config/arm/arm-opts.h (enum arm_tp_type): Remove TP_CP15.
18193 Add TP_TPIDRURW, TP_TPIDRURO, TP_TPIDRPRW values.
18194 * config/arm/arm-protos.h (arm_output_load_tpidr): Declare prototype.
18195 * config/arm/arm.cc (arm_option_reconfigure_globals): Replace TP_CP15
18197 (arm_output_load_tpidr): Define.
18198 * config/arm/arm.h (TARGET_HARD_TP): Define in terms of TARGET_SOFT_TP.
18199 * config/arm/arm.md (load_tp_hard): Call arm_output_load_tpidr to output
18201 (reload_tp_hard): Likewise.
18202 * config/arm/arm.opt (tpidrurw, tpidruro, tpidrprw): New values for
18204 * doc/invoke.texi (Arm Options, mtp): Document new values.
18206 2023-06-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
18209 * config/aarch64/aarch64-opts.h (enum aarch64_tp_reg): Add
18210 AARCH64_TPIDRRO_EL0 value.
18211 * config/aarch64/aarch64.cc (aarch64_output_load_tp): Define.
18212 * config/aarch64/aarch64.opt (tpidr_el0, tpidr_el1, tpidr_el2,
18213 tpidr_el3, tpidrro_el3): New accepted values to -mtp=.
18214 * doc/invoke.texi (AArch64 Options): Document new -mtp= options.
18216 2023-06-13 Alexandre Oliva <oliva@adacore.com>
18218 * range-op-float.cc (frange_nextafter): Drop inline.
18219 (frelop_early_resolve): Add static.
18220 (frange_float): Likewise.
18222 2023-06-13 Richard Biener <rguenther@suse.de>
18224 PR middle-end/110232
18225 * fold-const.cc (native_interpret_vector): Use TYPE_SIZE_UNIT
18226 to check whether the buffer covers the whole vector.
18228 2023-06-13 Richard Biener <rguenther@suse.de>
18230 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): For
18231 .MASK_LOAD and friends set the size of the access to unknown.
18233 2023-06-13 Tejas Belagod <tbelagod@arm.com>
18236 * config/aarch64/aarch64-sve-builtins-base.cc (svlast_impl::fold): Fold sve
18237 calls that have a constant input predicate vector.
18238 (svlast_impl::is_lasta): Query to check if intrinsic is svlasta.
18239 (svlast_impl::is_lastb): Query to check if intrinsic is svlastb.
18240 (svlast_impl::vect_all_same): Check if all vector elements are equal.
18242 2023-06-13 Andi Kleen <ak@linux.intel.com>
18244 * config/i386/gcc-auto-profile: Regenerate.
18246 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18248 * config/riscv/vector-iterators.md: Fix requirement.
18250 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18252 * config/riscv/riscv-v.cc (emit_vlmax_decompress_insn): New function.
18253 (shuffle_decompress_patterns): New function.
18254 (expand_vec_perm_const_1): Add decompress optimization.
18256 2023-06-12 Jeff Law <jlaw@ventanamicro.com>
18258 PR rtl-optimization/101188
18259 * postreload.cc (reload_cse_move2add_invalidate): New function,
18261 (reload_cse_move2add): Call reload_cse_move2add_invalidate.
18263 2023-06-12 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
18265 * config/aarch64/aarch64.cc (aarch64_expand_vector_init): Tweak condition
18266 if (n_var == n_elts && n_elts <= 16) to allow a single constant,
18267 and if maxv == 1, use constant element for duplicating into register.
18269 2023-06-12 Tobias Burnus <tobias@codesourcery.com>
18271 * gimplify.cc (gimplify_adjust_omp_clauses_1): Use
18272 GOMP_MAP_FORCE_PRESENT for 'present alloc' implicit mapping.
18273 (gimplify_adjust_omp_clauses): Change
18274 GOMP_MAP_PRESENT_{TO,TOFROM,FROM,ALLOC} to the equivalent
18275 GOMP_MAP_FORCE_PRESENT.
18276 * omp-low.cc (lower_omp_target): Remove handling of no-longer valid
18277 GOMP_MAP_PRESENT_{TO,TOFROM,FROM,ALLOC}; update map kinds used for
18278 to/from clauses with present modifier.
18280 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
18282 PR tree-optimization/110205
18283 * range-op-float.cc (range_operator::fold_range): Add default FII
18285 * range-op-mixed.h (class operator_gt): Add missing final overrides.
18286 * range-op.cc (range_op_handler::fold_range): Add RO_FII case.
18287 (operator_lshift ::update_bitmask): Add final override.
18288 (operator_rshift ::update_bitmask): Add final override.
18289 * range-op.h (range_operator::fold_range): Add FII prototype.
18291 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
18293 * gimple-range-op.cc (gimple_range_op_handler::maybe_non_standard):
18294 Use range_op_handler directly.
18295 * range-op.cc (range_op_handler::range_op_handler): Unsigned
18296 param instead of tree-code.
18297 (ptr_op_widen_plus_signed): Delete.
18298 (ptr_op_widen_plus_unsigned): Delete.
18299 (ptr_op_widen_mult_signed): Delete.
18300 (ptr_op_widen_mult_unsigned): Delete.
18301 (range_op_table::initialize_integral_ops): Add new opcodes.
18302 * range-op.h (range_op_handler): Use unsigned.
18303 (OP_WIDEN_MULT_SIGNED): New.
18304 (OP_WIDEN_MULT_UNSIGNED): New.
18305 (OP_WIDEN_PLUS_SIGNED): New.
18306 (OP_WIDEN_PLUS_UNSIGNED): New.
18307 (RANGE_OP_TABLE_SIZE): New.
18308 (range_op_table::operator []): Use unsigned.
18309 (range_op_table::set): Use unsigned.
18310 (m_range_tree): Make unsigned.
18311 (ptr_op_widen_mult_signed): Remove.
18312 (ptr_op_widen_mult_unsigned): Remove.
18313 (ptr_op_widen_plus_signed): Remove.
18314 (ptr_op_widen_plus_unsigned): Remove.
18316 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
18318 * gimple-range-op.cc (gimple_range_op_handler): Set m_operator
18319 manually as there is no access to the default operator.
18320 (cfn_copysign::fold_range): Don't check for validity.
18321 (cfn_ubsan::fold_range): Ditto.
18322 (gimple_range_op_handler::maybe_builtin_call): Don't set to NULL.
18323 * range-op.cc (default_operator): New.
18324 (range_op_handler::range_op_handler): Use default_operator
18326 (range_op_handler::operator bool): Move from header, compare
18327 against default operator.
18328 (range_op_handler::range_op): New.
18329 * range-op.h (range_op_handler::operator bool): Move.
18331 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
18333 * range-op.cc (unified_table): Delete.
18334 (range_op_table operator_table): Instantiate.
18335 (range_op_table::range_op_table): Rename from unified_table.
18336 (range_op_handler::range_op_handler): Use range_op_table.
18337 * range-op.h (range_op_table::operator []): Inline.
18338 (range_op_table::set): Inline.
18340 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
18342 * gimple-range-gori.cc (gori_compute::condexpr_adjust): Do not
18344 * gimple-range-op.cc (get_code): Rename from get_code_and_type
18346 (gimple_range_op_handler::supported_p): No need for type.
18347 (gimple_range_op_handler::gimple_range_op_handler): Ditto.
18348 (cfn_copysign::fold_range): Ditto.
18349 (cfn_ubsan::fold_range): Ditto.
18350 * ipa-cp.cc (ipa_vr_operation_and_type_effects): Ditto.
18351 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Ditto.
18352 * range-op-float.cc (operator_plus::op1_range): Ditto.
18353 (operator_mult::op1_range): Ditto.
18354 (range_op_float_tests): Ditto.
18355 * range-op.cc (get_op_handler): Remove.
18356 (range_op_handler::set_op_handler): Remove.
18357 (operator_plus::op1_range): No need for type.
18358 (operator_minus::op1_range): Ditto.
18359 (operator_mult::op1_range): Ditto.
18360 (operator_exact_divide::op1_range): Ditto.
18361 (operator_cast::op1_range): Ditto.
18362 (perator_bitwise_not::fold_range): Ditto.
18363 (operator_negate::fold_range): Ditto.
18364 * range-op.h (range_op_handler::range_op_handler): Remove type param.
18365 (range_cast): No need for type.
18366 (range_op_table::operator[]): Check for enum_code >= 0.
18367 * tree-data-ref.cc (compute_distributive_range): No need for type.
18368 * tree-ssa-loop-unswitch.cc (unswitch_predicate): Ditto.
18369 * value-query.cc (range_query::get_tree_range): Ditto.
18370 * value-relation.cc (relation_oracle::validate_relation): Ditto.
18371 * vr-values.cc (range_of_var_in_loop): Ditto.
18372 (simplify_using_ranges::fold_cond_with_ops): Ditto.
18374 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
18376 * range-op-mixed.h (operator_max): Remove final.
18377 * range-op-ptr.cc (pointer_table::pointer_table): Remove MAX_EXPR.
18378 (pointer_table::pointer_table): Remove.
18379 (class hybrid_max_operator): New.
18380 (range_op_table::initialize_pointer_ops): Add hybrid_max_operator.
18381 * range-op.cc (pointer_tree_table): Remove.
18382 (unified_table::unified_table): Comment out MAX_EXPR.
18383 (get_op_handler): Remove check of pointer table.
18384 * range-op.h (class pointer_table): Remove.
18386 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
18388 * range-op-mixed.h (operator_min): Remove final.
18389 * range-op-ptr.cc (pointer_table::pointer_table): Remove MIN_EXPR.
18390 (class hybrid_min_operator): New.
18391 (range_op_table::initialize_pointer_ops): Add hybrid_min_operator.
18392 * range-op.cc (unified_table::unified_table): Comment out MIN_EXPR.
18394 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
18396 * range-op-mixed.h (operator_bitwise_or): Remove final.
18397 * range-op-ptr.cc (pointer_table::pointer_table): Remove BIT_IOR_EXPR.
18398 (class hybrid_or_operator): New.
18399 (range_op_table::initialize_pointer_ops): Add hybrid_or_operator.
18400 * range-op.cc (unified_table::unified_table): Comment out BIT_IOR_EXPR.
18402 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
18404 * range-op-mixed.h (operator_bitwise_and): Remove final.
18405 * range-op-ptr.cc (pointer_table::pointer_table): Remove BIT_AND_EXPR.
18406 (class hybrid_and_operator): New.
18407 (range_op_table::initialize_pointer_ops): Add hybrid_and_operator.
18408 * range-op.cc (unified_table::unified_table): Comment out BIT_AND_EXPR.
18410 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
18412 * Makefile.in (OBJS): Add range-op-ptr.o.
18413 * range-op-mixed.h (update_known_bitmask): Move prototype here.
18414 (minus_op1_op2_relation_effect): Move prototype here.
18415 (wi_includes_zero_p): Move function to here.
18416 (wi_zero_p): Ditto.
18417 * range-op.cc (update_known_bitmask): Remove static.
18418 (wi_includes_zero_p): Move to header.
18419 (wi_zero_p): Move to header.
18420 (minus_op1_op2_relation_effect): Remove static.
18421 (operator_pointer_diff): Move class and routines to range-op-ptr.cc.
18422 (pointer_plus_operator): Ditto.
18423 (pointer_min_max_operator): Ditto.
18424 (pointer_and_operator): Ditto.
18425 (pointer_or_operator): Ditto.
18426 (pointer_table): Ditto.
18427 (range_op_table::initialize_pointer_ops): Ditto.
18428 * range-op-ptr.cc: New.
18430 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
18432 * range-op-mixed.h (class operator_max): Move from...
18433 * range-op.cc (unified_table::unified_table): Add MAX_EXPR.
18434 (get_op_handler): Remove the integral table.
18435 (class operator_max): Move from here.
18436 (integral_table::integral_table): Delete.
18437 * range-op.h (class integral_table): Delete.
18439 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
18441 * range-op-mixed.h (class operator_min): Move from...
18442 * range-op.cc (unified_table::unified_table): Add MIN_EXPR.
18443 (class operator_min): Move from here.
18444 (integral_table::integral_table): Remove MIN_EXPR.
18446 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
18448 * range-op-mixed.h (class operator_bitwise_or): Move from...
18449 * range-op.cc (unified_table::unified_table): Add BIT_IOR_EXPR.
18450 (class operator_bitwise_or): Move from here.
18451 (integral_table::integral_table): Remove BIT_IOR_EXPR.
18453 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
18455 * range-op-mixed.h (class operator_bitwise_and): Move from...
18456 * range-op.cc (unified_table::unified_table): Add BIT_AND_EXPR.
18457 (get_op_handler): Check for a pointer table entry first.
18458 (class operator_bitwise_and): Move from here.
18459 (integral_table::integral_table): Remove BIT_AND_EXPR.
18461 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
18463 * range-op-mixed.h (class operator_bitwise_xor): Move from...
18464 * range-op.cc (unified_table::unified_table): Add BIT_XOR_EXPR.
18465 (class operator_bitwise_xor): Move from here.
18466 (integral_table::integral_table): Remove BIT_XOR_EXPR.
18467 (pointer_table::pointer_table): Remove BIT_XOR_EXPR.
18469 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
18471 * range-op-mixed.h (class operator_bitwise_not): Move from...
18472 * range-op.cc (unified_table::unified_table): Add BIT_NOT_EXPR.
18473 (class operator_bitwise_not): Move from here.
18474 (integral_table::integral_table): Remove BIT_NOT_EXPR.
18475 (pointer_table::pointer_table): Remove BIT_NOT_EXPR.
18477 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
18479 * range-op-mixed.h (class operator_addr_expr): Move from...
18480 * range-op.cc (unified_table::unified_table): Add ADDR_EXPR.
18481 (class operator_addr_expr): Move from here.
18482 (integral_table::integral_table): Remove ADDR_EXPR.
18483 (pointer_table::pointer_table): Remove ADDR_EXPR.
18485 2023-06-12 Pan Li <pan2.li@intel.com>
18487 * config/riscv/riscv-vector-builtins-types.def
18488 (vfloat16m1_t): Add type to lmul1 ops.
18489 (vfloat16m2_t): Likewise.
18490 (vfloat16m4_t): Likewise.
18492 2023-06-12 Richard Biener <rguenther@suse.de>
18494 * tree-ssa-alias.cc (call_may_clobber_ref_p_1): For
18495 .MASK_STORE and friend set the size of the access to
18498 2023-06-12 Tamar Christina <tamar.christina@arm.com>
18500 * config.in: Regenerate.
18501 * configure: Regenerate.
18502 * configure.ac: Remove DEFAULT_MATCHPD_PARTITIONS.
18504 2023-06-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18506 * config/riscv/autovec-opt.md
18507 (*v<any_shiftrt:optab><any_extend:optab>trunc<mode>): New pattern.
18508 (*<any_shiftrt:optab>trunc<mode>): Ditto.
18509 * config/riscv/autovec.md (<optab><mode>3): Change to
18510 define_insn_and_split.
18511 (v<optab><mode>3): Ditto.
18512 (trunc<mode><v_double_trunc>2): Ditto.
18514 2023-06-12 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
18516 * simplify-rtx.cc (simplify_const_unary_operation):
18517 Handle US_TRUNCATE, SS_TRUNCATE.
18519 2023-06-12 Eric Botcazou <ebotcazou@adacore.com>
18522 * doc/gm2.texi (Standard procedures): Fix Next link.
18524 2023-06-12 Tamar Christina <tamar.christina@arm.com>
18526 * config.in: Regenerate.
18528 2023-06-12 Andre Vieira <andre.simoesdiasvieira@arm.com>
18530 PR middle-end/110142
18531 * tree-vect-patterns.cc (vect_recog_widen_op_pattern): Don't pass
18532 subtype to vect_widened_op_tree and remove subtype parameter, also
18533 remove superfluous overloaded function definition.
18534 (vect_recog_widen_plus_pattern): Remove subtype parameter and dont pass
18535 to call to vect_recog_widen_op_pattern.
18536 (vect_recog_widen_minus_pattern): Likewise.
18538 2023-06-12 liuhongt <hongtao.liu@intel.com>
18540 * config/i386/sse.md (vec_pack<floatprefix>_float_<mode>): New expander.
18541 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
18542 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
18543 (vec_unpacks_lo_<mode>): Ditto.
18544 (vec_unpacks_hi_<mode>): Ditto.
18545 (sse_movlhps_<mode>): New define_insn.
18546 (ssse3_palignr<mode>_perm): Extend to V_128H.
18547 (V_128H): New mode iterator.
18548 (ssepackPHmode): New mode attribute.
18549 (vunpck_extract_mode): Ditto.
18550 (vpckfloat_concat_mode): Extend to VxSI/VxSF for _Float16.
18551 (vpckfloat_temp_mode): Ditto.
18552 (vpckfloat_op_mode): Ditto.
18553 (vunpckfixt_mode): Extend to VxHF.
18554 (vunpckfixt_model): Ditto.
18555 (vunpckfixt_extract_mode): Ditto.
18557 2023-06-12 Richard Biener <rguenther@suse.de>
18559 PR middle-end/110200
18560 * genmatch.cc (expr::gen_transform): Put braces around
18561 the if arm for the (convert ...) short-cut.
18563 2023-06-12 Kewen Lin <linkw@linux.ibm.com>
18566 * config/rs6000/rs6000-builtins.def (__builtin_pack_vector_int128,
18567 __builtin_unpack_vector_int128): Move from stanza power7 to vsx.
18569 2023-06-12 Kewen Lin <linkw@linux.ibm.com>
18572 * config/rs6000/rs6000.cc (output_toc): Use the mode of the 128-bit
18573 floating constant itself for real_to_target call.
18575 2023-06-12 Pan Li <pan2.li@intel.com>
18577 * config/riscv/riscv-vector-builtins-types.def
18578 (vfloat16mf4_t): Add type to X2/X4/X8/X16/X32 vlmul ext ops.
18579 (vfloat16mf2_t): Ditto.
18580 (vfloat16m1_t): Ditto.
18581 (vfloat16m2_t): Ditto.
18582 (vfloat16m4_t): Ditto.
18584 2023-06-12 David Edelsohn <dje.gcc@gmail.com>
18586 * config/rs6000/rs6000-logue.cc (rs6000_stack_info):
18587 Do not require a stack frame when debugging is enabled for AIX.
18589 2023-06-11 Georg-Johann Lay <avr@gjlay.de>
18591 * config/avr/avr.md (adjust_len) [insv_notbit_0, insv_notbit_7]:
18592 Remove attribute values.
18593 (insv_notbit): New post-reload insn.
18594 (*insv.not-shiftrt_split, *insv.xor1-bit.0_split)
18595 (*insv.not-bit.0_split, *insv.not-bit.7_split)
18596 (*insv.xor-extract_split): Split to insv_notbit.
18597 (*insv.not-shiftrt, *insv.xor1-bit.0, *insv.not-bit.0, *insv.not-bit.7)
18598 (*insv.xor-extract): Remove post-reload insns.
18599 * config/avr/avr.cc (avr_out_insert_notbit) [bitno]: Remove parameter.
18600 (avr_adjust_insn_length): Adjust call of avr_out_insert_notbit.
18601 [ADJUST_LEN_INSV_NOTBIT_0, ADJUST_LEN_INSV_NOTBIT_7]: Remove cases.
18602 * config/avr/avr-protos.h (avr_out_insert_notbit): Adjust prototype.
18604 2023-06-11 Georg-Johann Lay <avr@gjlay.de>
18607 * config/avr/avr.md (adjust_len) [extr, extr_not]: New elements.
18608 (MSB, SIZE): New mode attributes.
18609 (any_shift): New code iterator.
18610 (*lshr<mode>3_split, *lshr<mode>3, lshr<mode>3)
18611 (*lshr<mode>3_const_split): Add constraint alternative for
18612 the case of shift-offset = MSB. Ditch "length" attribute.
18613 (extzv<mode): New. replaces extzv. Adjust following patterns.
18614 Use avr_out_extr, avr_out_extr_not to print asm.
18615 (*extzv.subreg.<mode>, *extzv.<mode>.subreg, *extzv.xor)
18616 (*extzv<mode>.ge, *neg.ashiftrt<mode>.msb, *extzv.io.lsr7): New.
18617 * config/avr/constraints.md (C15, C23, C31, Yil): New
18618 * config/avr/predicates.md (reg_or_low_io_operand)
18619 (const7_operand, reg_or_low_io_operand)
18620 (const15_operand, const_0_to_15_operand)
18621 (const23_operand, const_0_to_23_operand)
18622 (const31_operand, const_0_to_31_operand): New.
18623 * config/avr/avr-protos.h (avr_out_extr, avr_out_extr_not): New.
18624 * config/avr/avr.cc (avr_out_extr, avr_out_extr_not): New funcs.
18625 (lshrqi3_out, lshrhi3_out, lshrpsi3_out, lshrsi3_out): Adjust
18626 MSB case to new insn constraint "r" for operands[1].
18627 (avr_adjust_insn_length) [ADJUST_LEN_EXTR_NOT, ADJUST_LEN_EXTR]:
18628 Handle these cases.
18629 (avr_rtx_costs_1): Adjust cost for a new pattern.
18631 2023-06-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18633 * config/riscv/riscv-vsetvl.cc (available_occurrence_p): Enhance user vsetvl optimization.
18634 (vector_insn_info::parse_insn): Add rtx_insn parse.
18635 (pass_vsetvl::local_eliminate_vsetvl_insn): Enhance user vsetvl optimization.
18636 (get_first_vsetvl): New function.
18637 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
18638 (pass_vsetvl::cleanup_insns): Remove it.
18639 (pass_vsetvl::ssa_post_optimization): New function.
18640 (has_no_uses): Ditto.
18641 (pass_vsetvl::propagate_avl): Remove it.
18642 (pass_vsetvl::df_post_optimization): New function.
18643 (pass_vsetvl::lazy_vsetvl): Rework Phase 5 && Phase 6.
18644 * config/riscv/riscv-vsetvl.h: Adapt declaration.
18646 2023-06-10 Aldy Hernandez <aldyh@redhat.com>
18648 * ipa-cp.cc (ipcp_vr_lattice::init): Take type argument.
18649 (ipcp_vr_lattice::print): Call dump method.
18650 (ipcp_vr_lattice::meet_with): Adjust for m_vr being a
18652 (ipcp_vr_lattice::meet_with_1): Make argument a reference.
18653 (ipcp_vr_lattice::set_to_bottom): Set varying for an unsupported
18655 (initialize_node_lattices): Pass type when appropriate.
18656 (ipa_vr_operation_and_type_effects): Make type agnostic.
18657 (ipa_value_range_from_jfunc): Same.
18658 (propagate_vr_across_jump_function): Same.
18659 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
18660 (evaluate_properties_for_edge): Same.
18661 * ipa-prop.cc (ipa_vr::get_vrange): Same.
18662 (ipcp_update_vr): Same.
18663 * ipa-prop.h (ipa_value_range_from_jfunc): Same.
18664 (ipa_range_set_and_normalize): Same.
18666 2023-06-10 Georg-Johann Lay <avr@gjlay.de>
18670 * config/avr/avr-passes.def (avr_pass_ifelse): Insert new pass.
18671 * config/avr/avr.cc (avr_pass_ifelse): New RTL pass.
18672 (avr_pass_data_ifelse): New pass_data for it.
18673 (make_avr_pass_ifelse, avr_redundant_compare, avr_cbranch_cost)
18674 (avr_canonicalize_comparison, avr_out_plus_set_ZN)
18675 (avr_out_cmp_ext): New functions.
18676 (compare_condtition): Make sure REG_CC dies in the branch insn.
18677 (avr_rtx_costs_1): Add computation of cbranch costs.
18678 (avr_adjust_insn_length) [ADJUST_LEN_ADD_SET_ZN, ADJUST_LEN_CMP_ZEXT]:
18679 [ADJUST_LEN_CMP_SEXT]Handle them.
18680 (TARGET_CANONICALIZE_COMPARISON): New define.
18681 (avr_simplify_comparison_p, compare_diff_p, avr_compare_pattern)
18682 (avr_reorg_remove_redundant_compare, avr_reorg): Remove functions.
18683 (TARGET_MACHINE_DEPENDENT_REORG): Remove define.
18684 * config/avr/avr-protos.h (avr_simplify_comparison_p): Remove proto.
18685 (make_avr_pass_ifelse, avr_out_plus_set_ZN, cc_reg_rtx)
18686 (avr_out_cmp_zext): New Protos
18687 * config/avr/avr.md (branch, difficult_branch): Don't split insns.
18688 (*cbranchhi.zero-extend.0", *cbranchhi.zero-extend.1")
18689 (*swapped_tst<mode>, *add.for.eqne.<mode>): New insns.
18690 (*cbranch<mode>4): Rename to cbranch<mode>4_insn.
18691 (define_peephole): Add dead_or_set_regno_p(insn,REG_CC) as needed.
18692 (define_deephole2): Add peep2_regno_dead_p(*,REG_CC) as needed.
18693 Add new RTL peepholes for decrement-and-branch and *swapped_tst<mode>.
18694 Rework signtest-and-branch peepholes for *sbrx_branch<mode>.
18695 (adjust_len) [add_set_ZN, cmp_zext]: New.
18696 (QIPSI): New mode iterator.
18697 (ALLs1, ALLs2, ALLs4, ALLs234): New mode iterators.
18698 (gelt): New code iterator.
18699 (gelt_eqne): New code attribute.
18700 (rvbranch, *rvbranch, difficult_rvbranch, *difficult_rvbranch)
18701 (branch_unspec, *negated_tst<mode>, *reversed_tst<mode>)
18702 (*cmpqi_sign_extend): Remove insns.
18703 (define_c_enum "unspec") [UNSPEC_IDENTITY]: Remove.
18704 * config/avr/avr-dimode.md (cbranch<mode>4): Canonicalize comparisons.
18705 * config/avr/predicates.md (scratch_or_d_register_operand): New.
18706 * config/avr/constraints.md (Yxx): New constraint.
18708 2023-06-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18710 * config/riscv/autovec.md (select_vl<mode>): New pattern.
18711 * config/riscv/riscv-protos.h (expand_select_vl): New function.
18712 * config/riscv/riscv-v.cc (expand_select_vl): Ditto.
18714 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
18716 * range-op-float.cc (foperator_mult_div_base): Delete.
18717 (foperator_mult_div_base::find_range): Make static local function.
18718 (foperator_mult): Remove. Move prototypes to range-op-mixed.h
18719 (operator_mult::op1_range): Rename from foperator_mult.
18720 (operator_mult::op2_range): Ditto.
18721 (operator_mult::rv_fold): Ditto.
18722 (float_table::float_table): Remove MULT_EXPR.
18723 (class foperator_div): Inherit from range_operator.
18724 (float_table::float_table): Delete.
18725 * range-op-mixed.h (class operator_mult): Combined from integer
18727 * range-op.cc (float_tree_table): Delete.
18728 (op_mult): New object.
18729 (unified_table::unified_table): Add MULT_EXPR.
18730 (get_op_handler): Do not check float table any longer.
18731 (class cross_product_operator): Move to range-op-mixed.h.
18732 (class operator_mult): Move to range-op-mixed.h.
18733 (integral_table::integral_table): Remove MULT_EXPR.
18734 (pointer_table::pointer_table): Remove MULT_EXPR.
18735 * range-op.h (float_table): Remove.
18737 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
18739 * range-op-float.cc (foperator_negate): Remove. Move prototypes
18740 to range-op-mixed.h
18741 (operator_negate::fold_range): Rename from foperator_negate.
18742 (operator_negate::op1_range): Ditto.
18743 (float_table::float_table): Remove NEGATE_EXPR.
18744 * range-op-mixed.h (class operator_negate): Combined from integer
18746 * range-op.cc (op_negate): New object.
18747 (unified_table::unified_table): Add NEGATE_EXPR.
18748 (class operator_negate): Move to range-op-mixed.h.
18749 (integral_table::integral_table): Remove NEGATE_EXPR.
18750 (pointer_table::pointer_table): Remove NEGATE_EXPR.
18752 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
18754 * range-op-float.cc (foperator_minus): Remove. Move prototypes
18755 to range-op-mixed.h
18756 (operator_minus::fold_range): Rename from foperator_minus.
18757 (operator_minus::op1_range): Ditto.
18758 (operator_minus::op2_range): Ditto.
18759 (operator_minus::rv_fold): Ditto.
18760 (float_table::float_table): Remove MINUS_EXPR.
18761 * range-op-mixed.h (class operator_minus): Combined from integer
18763 * range-op.cc (op_minus): New object.
18764 (unified_table::unified_table): Add MINUS_EXPR.
18765 (class operator_minus): Move to range-op-mixed.h.
18766 (integral_table::integral_table): Remove MINUS_EXPR.
18767 (pointer_table::pointer_table): Remove MINUS_EXPR.
18769 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
18771 * range-op-float.cc (foperator_abs): Remove. Move prototypes
18772 to range-op-mixed.h
18773 (operator_abs::fold_range): Rename from foperator_abs.
18774 (operator_abs::op1_range): Ditto.
18775 (float_table::float_table): Remove ABS_EXPR.
18776 * range-op-mixed.h (class operator_abs): Combined from integer
18778 * range-op.cc (op_abs): New object.
18779 (unified_table::unified_table): Add ABS_EXPR.
18780 (class operator_abs): Move to range-op-mixed.h.
18781 (integral_table::integral_table): Remove ABS_EXPR.
18782 (pointer_table::pointer_table): Remove ABS_EXPR.
18784 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
18786 * range-op-float.cc (foperator_plus): Remove. Move prototypes
18787 to range-op-mixed.h
18788 (operator_plus::fold_range): Rename from foperator_plus.
18789 (operator_plus::op1_range): Ditto.
18790 (operator_plus::op2_range): Ditto.
18791 (operator_plus::rv_fold): Ditto.
18792 (float_table::float_table): Remove PLUS_EXPR.
18793 * range-op-mixed.h (class operator_plus): Combined from integer
18795 * range-op.cc (op_plus): New object.
18796 (unified_table::unified_table): Add PLUS_EXPR.
18797 (class operator_plus): Move to range-op-mixed.h.
18798 (integral_table::integral_table): Remove PLUS_EXPR.
18799 (pointer_table::pointer_table): Remove PLUS_EXPR.
18801 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
18803 * range-op-mixed.h (class operator_cast): Combined from integer
18805 * range-op.cc (op_cast): New object.
18806 (unified_table::unified_table): Add op_cast
18807 (class operator_cast): Move to range-op-mixed.h.
18808 (integral_table::integral_table): Remove op_cast
18809 (pointer_table::pointer_table): Remove op_cast.
18811 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
18813 * range-op-float.cc (operator_cst::fold_range): New.
18814 * range-op-mixed.h (class operator_cst): Move from integer file.
18815 * range-op.cc (op_cst): New object.
18816 (unified_table::unified_table): Add op_cst. Also use for REAL_CST.
18817 (class operator_cst): Move to range-op-mixed.h.
18818 (integral_table::integral_table): Remove op_cst.
18819 (pointer_table::pointer_table): Remove op_cst.
18821 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
18823 * range-op-float.cc (foperator_identity): Remove. Move prototypes
18824 to range-op-mixed.h
18825 (operator_identity::fold_range): Rename from foperator_identity.
18826 (operator_identity::op1_range): Ditto.
18827 (float_table::float_table): Remove fop_identity.
18828 * range-op-mixed.h (class operator_identity): Combined from integer
18830 * range-op.cc (op_identity): New object.
18831 (unified_table::unified_table): Add op_identity.
18832 (class operator_identity): Move to range-op-mixed.h.
18833 (integral_table::integral_table): Remove identity.
18834 (pointer_table::pointer_table): Remove identity.
18836 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
18838 * range-op-float.cc (foperator_ge): Remove. Move prototypes
18839 to range-op-mixed.h
18840 (operator_ge::fold_range): Rename from foperator_ge.
18841 (operator_ge::op1_range): Ditto.
18842 (float_table::float_table): Remove GE_EXPR.
18843 * range-op-mixed.h (class operator_ge): Combined from integer
18845 * range-op.cc (op_ge): New object.
18846 (unified_table::unified_table): Add GE_EXPR.
18847 (class operator_ge): Move to range-op-mixed.h.
18848 (ge_op1_op2_relation): Fold into
18849 operator_ge::op1_op2_relation.
18850 (integral_table::integral_table): Remove GE_EXPR.
18851 (pointer_table::pointer_table): Remove GE_EXPR.
18852 * range-op.h (ge_op1_op2_relation): Delete.
18854 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
18856 * range-op-float.cc (foperator_gt): Remove. Move prototypes
18857 to range-op-mixed.h
18858 (operator_gt::fold_range): Rename from foperator_gt.
18859 (operator_gt::op1_range): Ditto.
18860 (float_table::float_table): Remove GT_EXPR.
18861 * range-op-mixed.h (class operator_gt): Combined from integer
18863 * range-op.cc (op_gt): New object.
18864 (unified_table::unified_table): Add GT_EXPR.
18865 (class operator_gt): Move to range-op-mixed.h.
18866 (gt_op1_op2_relation): Fold into
18867 operator_gt::op1_op2_relation.
18868 (integral_table::integral_table): Remove GT_EXPR.
18869 (pointer_table::pointer_table): Remove GT_EXPR.
18870 * range-op.h (gt_op1_op2_relation): Delete.
18872 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
18874 * range-op-float.cc (foperator_le): Remove. Move prototypes
18875 to range-op-mixed.h
18876 (operator_le::fold_range): Rename from foperator_le.
18877 (operator_le::op1_range): Ditto.
18878 (float_table::float_table): Remove LE_EXPR.
18879 * range-op-mixed.h (class operator_le): Combined from integer
18881 * range-op.cc (op_le): New object.
18882 (unified_table::unified_table): Add LE_EXPR.
18883 (class operator_le): Move to range-op-mixed.h.
18884 (le_op1_op2_relation): Fold into
18885 operator_le::op1_op2_relation.
18886 (integral_table::integral_table): Remove LE_EXPR.
18887 (pointer_table::pointer_table): Remove LE_EXPR.
18888 * range-op.h (le_op1_op2_relation): Delete.
18890 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
18892 * range-op-float.cc (foperator_lt): Remove. Move prototypes
18893 to range-op-mixed.h
18894 (operator_lt::fold_range): Rename from foperator_lt.
18895 (operator_lt::op1_range): Ditto.
18896 (float_table::float_table): Remove LT_EXPR.
18897 * range-op-mixed.h (class operator_lt): Combined from integer
18899 * range-op.cc (op_lt): New object.
18900 (unified_table::unified_table): Add LT_EXPR.
18901 (class operator_lt): Move to range-op-mixed.h.
18902 (lt_op1_op2_relation): Fold into
18903 operator_lt::op1_op2_relation.
18904 (integral_table::integral_table): Remove LT_EXPR.
18905 (pointer_table::pointer_table): Remove LT_EXPR.
18906 * range-op.h (lt_op1_op2_relation): Delete.
18908 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
18910 * range-op-float.cc (foperator_not_equal): Remove. Move prototypes
18911 to range-op-mixed.h
18912 (operator_equal::fold_range): Rename from foperator_not_equal.
18913 (operator_equal::op1_range): Ditto.
18914 (float_table::float_table): Remove NE_EXPR.
18915 * range-op-mixed.h (class operator_not_equal): Combined from integer
18917 * range-op.cc (op_equal): New object.
18918 (unified_table::unified_table): Add NE_EXPR.
18919 (class operator_not_equal): Move to range-op-mixed.h.
18920 (not_equal_op1_op2_relation): Fold into
18921 operator_not_equal::op1_op2_relation.
18922 (integral_table::integral_table): Remove NE_EXPR.
18923 (pointer_table::pointer_table): Remove NE_EXPR.
18924 * range-op.h (not_equal_op1_op2_relation): Delete.
18926 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
18928 * range-op-float.cc (foperator_equal): Remove. Move prototypes
18929 to range-op-mixed.h
18930 (operator_equal::fold_range): Rename from foperator_equal.
18931 (operator_equal::op1_range): Ditto.
18932 (float_table::float_table): Remove EQ_EXPR.
18933 * range-op-mixed.h (class operator_equal): Combined from integer
18935 * range-op.cc (op_equal): New object.
18936 (unified_table::unified_table): Add EQ_EXPR.
18937 (class operator_equal): Move to range-op-mixed.h.
18938 (equal_op1_op2_relation): Fold into
18939 operator_equal::op1_op2_relation.
18940 (integral_table::integral_table): Remove EQ_EXPR.
18941 (pointer_table::pointer_table): Remove EQ_EXPR.
18942 * range-op.h (equal_op1_op2_relation): Delete.
18944 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
18946 * range-op-float.cc (class float_table): Move to header.
18947 (float_table::float_table): Move float only operators to...
18948 (range_op_table::initialize_float_ops): Here.
18949 * range-op-mixed.h: New.
18950 * range-op.cc (integral_tree_table, pointer_tree_table): Moved
18952 (float_tree_table): Moved from range-op-float.cc.
18953 (unified_tree_table): New.
18954 (unified_table::unified_table): New. Call initialize routines.
18955 (get_op_handler): Check unified table first.
18956 (range_op_handler::range_op_handler): Handle no type constructor.
18957 (integral_table::integral_table): Move integral only operators to...
18958 (range_op_table::initialize_integral_ops): Here.
18959 (pointer_table::pointer_table): Move pointer only operators to...
18960 (range_op_table::initialize_pointer_ops): Here.
18961 * range-op.h (enum bool_range_state): Move to range-op-mixed.h.
18962 (get_bool_state): Ditto.
18963 (empty_range_varying): Ditto.
18964 (relop_early_resolve): Ditto.
18965 (class range_op_table): Add new init methods for range types.
18966 (class integral_table): Move declaration to here.
18967 (class pointer_table): Move declaration to here.
18968 (class float_table): Move declaration to here.
18970 2023-06-09 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
18971 Richard Sandiford <richard.sandiford@arm.com>
18972 Richard Biener <rguenther@suse.de>
18974 * doc/md.texi: Add SELECT_VL support.
18975 * internal-fn.def (SELECT_VL): Ditto.
18976 * optabs.def (OPTAB_D): Ditto.
18977 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly): Ditto.
18978 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): Ditto.
18979 * tree-vect-stmts.cc (get_select_vl_data_ref_ptr): Ditto.
18980 (vectorizable_store): Ditto.
18981 (vectorizable_load): Ditto.
18982 * tree-vectorizer.h (LOOP_VINFO_USING_SELECT_VL_P): Ditto.
18984 2023-06-09 Andrew MacLeod <amacleod@redhat.com>
18987 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Check param
18990 2023-06-09 Andrew MacLeod <amacleod@redhat.com>
18992 * range-op.cc (range_cast): Move to...
18993 * range-op.h (range_cast): Here and add generic a version.
18995 2023-06-09 Marek Polacek <polacek@redhat.com>
18999 * doc/invoke.texi: Clarify that -Wmissing-field-initializers doesn't
19000 warn about designated initializers in C only.
19002 2023-06-09 Andrew Pinski <apinski@marvell.com>
19004 PR tree-optimization/97711
19005 PR tree-optimization/110155
19006 * match.pd ((zero_one == 0) ? y : z <op> y): Add plus to the op.
19007 ((zero_one != 0) ? z <op> y : y): Likewise.
19009 2023-06-09 Andrew Pinski <apinski@marvell.com>
19011 * match.pd ((zero_one ==/!= 0) ? y : z <op> y): Use
19012 multiply rather than negation/bit_and.
19014 2023-06-09 Andrew Pinski <apinski@marvell.com>
19016 * match.pd (`X & -Y -> X * Y`): Allow for truncation
19017 and the same type for unsigned types.
19019 2023-06-09 Andrew Pinski <apinski@marvell.com>
19021 PR tree-optimization/110165
19022 PR tree-optimization/110166
19023 * match.pd (zero_one_valued_p): Don't accept
19024 signed 1-bit integers.
19026 2023-06-09 Richard Biener <rguenther@suse.de>
19028 * match.pd (two conversions in a row): Use element_precision
19029 to DTRT for VECTOR_TYPE.
19031 2023-06-09 Pan Li <pan2.li@intel.com>
19033 * config/riscv/riscv.md (enabled): Move to another place, and
19034 add fp_vector_disabled to the cond.
19035 (fp_vector_disabled): New attr defined for disabling fp.
19036 * config/riscv/vector-iterators.md: Fix V_WHOLE and V_FRACT.
19038 2023-06-09 Pan Li <pan2.li@intel.com>
19040 * config/riscv/riscv-protos.h (enum frm_field_enum): Adjust
19043 2023-06-09 liuhongt <hongtao.liu@intel.com>
19046 * config/i386/i386.cc (ix86_gimple_fold_builtin): Explicitly
19047 view_convert_expr mask to signed type when folding pblendvb
19050 2023-06-09 liuhongt <hongtao.liu@intel.com>
19053 * config/i386/i386.cc (ix86_gimple_fold_builtin): Fold
19054 _mm{,256,512}_abs_{epi8,epi16,epi32,epi64} into gimple
19055 ABSU_EXPR + VCE, don't fold _mm_abs_{pi8,pi16,pi32} w/o
19057 * config/i386/i386-builtin.def: Replace CODE_FOR_nothing with
19058 real codename for __builtin_ia32_pabs{b,w,d}.
19060 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
19062 * gimple-range-op.cc
19063 (gimple_range_op_handler::gimple_range_op_handler): Adjust.
19064 (gimple_range_op_handler::maybe_builtin_call): Adjust.
19065 * gimple-range-op.h (operand1, operand2): Use m_operator.
19066 * range-op.cc (integral_table, pointer_table): Relocate.
19067 (get_op_handler): Rename from get_handler and handle all types.
19068 (range_op_handler::range_op_handler): Relocate.
19069 (range_op_handler::set_op_handler): Relocate and adjust.
19070 (range_op_handler::range_op_handler): Relocate.
19071 (dispatch_trio): New.
19072 (RO_III, RO_IFI, RO_IFF, RO_FFF, RO_FIF, RO_FII): New consts.
19073 (range_op_handler::dispatch_kind): New.
19074 (range_op_handler::fold_range): Relocate and Use new dispatch value.
19075 (range_op_handler::op1_range): Ditto.
19076 (range_op_handler::op2_range): Ditto.
19077 (range_op_handler::lhs_op1_relation): Ditto.
19078 (range_op_handler::lhs_op2_relation): Ditto.
19079 (range_op_handler::op1_op2_relation): Ditto.
19080 (range_op_handler::set_op_handler): Use m_operator member.
19081 * range-op.h (range_op_handler::operator bool): Use m_operator.
19082 (range_op_handler::dispatch_kind): New.
19083 (range_op_handler::m_valid): Delete.
19084 (range_op_handler::m_int): Delete
19085 (range_op_handler::m_float): Delete
19086 (range_op_handler::m_operator): New.
19087 (range_op_table::operator[]): Relocate from .cc file.
19088 (range_op_table::set): Ditto.
19089 * value-range.h (class vrange): Make range_op_handler a friend.
19091 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
19093 * gimple-range-op.cc (cfn_constant_float_p): Change base class.
19094 (cfn_pass_through_arg1): Adjust using statemenmt.
19095 (cfn_signbit): Change base class, adjust using statement.
19096 (cfn_copysign): Ditto.
19098 (cfn_sincos): Ditto.
19099 * range-op-float.cc (fold_range): Change class to range_operator.
19103 (lhs_op1_relation): Ditto.
19104 (lhs_op2_relation): Ditto.
19105 (op1_op2_relation): Ditto.
19106 (foperator_*): Ditto.
19107 (class float_table): New. Inherit from range_op_table.
19108 (floating_tree_table) Change to range_op_table pointer.
19109 (class floating_op_table): Delete.
19110 * range-op.cc (operator_equal): Adjust using statement.
19111 (operator_not_equal): Ditto.
19112 (operator_lt, operator_le, operator_gt, operator_ge): Ditto.
19113 (operator_minus, operator_cast): Ditto.
19114 (operator_bitwise_and, pointer_plus_operator): Ditto.
19115 (get_float_handle): Change return type.
19116 * range-op.h (range_operator_float): Delete. Relocate all methods
19117 into class range_operator.
19118 (range_op_handler::m_float): Change type to range_operator.
19119 (floating_op_table): Delete.
19120 (floating_tree_table): Change type.
19122 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
19124 * range-op.cc (range_operator::fold_range): Call virtual routine.
19125 (range_operator::update_bitmask): New.
19126 (operator_equal::update_bitmask): New.
19127 (operator_not_equal::update_bitmask): New.
19128 (operator_lt::update_bitmask): New.
19129 (operator_le::update_bitmask): New.
19130 (operator_gt::update_bitmask): New.
19131 (operator_ge::update_bitmask): New.
19132 (operator_ge::update_bitmask): New.
19133 (operator_plus::update_bitmask): New.
19134 (operator_minus::update_bitmask): New.
19135 (operator_pointer_diff::update_bitmask): New.
19136 (operator_min::update_bitmask): New.
19137 (operator_max::update_bitmask): New.
19138 (operator_mult::update_bitmask): New.
19139 (operator_div:operator_div):New.
19140 (operator_div::update_bitmask): New.
19141 (operator_div::m_code): New member.
19142 (operator_exact_divide::operator_exact_divide): New constructor.
19143 (operator_lshift::update_bitmask): New.
19144 (operator_rshift::update_bitmask): New.
19145 (operator_bitwise_and::update_bitmask): New.
19146 (operator_bitwise_or::update_bitmask): New.
19147 (operator_bitwise_xor::update_bitmask): New.
19148 (operator_trunc_mod::update_bitmask): New.
19149 (op_ident, op_unknown, op_ptr_min_max): New.
19150 (op_nop, op_convert): Delete.
19151 (op_ssa, op_paren, op_obj_type): Delete.
19152 (op_realpart, op_imagpart): Delete.
19153 (op_ptr_min, op_ptr_max): Delete.
19154 (pointer_plus_operator:update_bitmask): New.
19155 (range_op_table::set): Do not use m_code.
19156 (integral_table::integral_table): Adjust to single instances.
19157 * range-op.h (range_operator::range_operator): Delete.
19158 (range_operator::m_code): Delete.
19159 (range_operator::update_bitmask): New.
19161 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
19163 * range-op-float.cc (range_operator_float::fold_range): Return
19164 NAN of the result type.
19166 2023-06-08 Jakub Jelinek <jakub@redhat.com>
19168 * optabs.cc (expand_ffs): Add forward declaration.
19169 (expand_doubleword_clz): Rename to ...
19170 (expand_doubleword_clz_ctz_ffs): ... this. Add UNOPTAB argument,
19171 handle also doubleword CTZ and FFS in addition to CLZ.
19172 (expand_unop): Adjust caller. Also call it for doubleword
19173 ctz_optab and ffs_optab.
19175 2023-06-08 Jakub Jelinek <jakub@redhat.com>
19178 * config/i386/i386-expand.cc (ix86_expand_vector_init_general): For
19179 n_words == 2 recurse with mmx_ok as first argument rather than false.
19181 2023-06-07 Roger Sayle <roger@nextmovesoftware.com>
19183 * wide-int.cc (wi::bitreverse_large): Use HOST_WIDE_INT_1U to
19184 avoid sign extension/undefined behaviour when setting each bit.
19186 2023-06-07 Roger Sayle <roger@nextmovesoftware.com>
19187 Uros Bizjak <ubizjak@gmail.com>
19189 * config/i386/i386-expand.cc (ix86_expand_builtin) <handlecarry>:
19190 Use new x86_stc instruction when the carry flag must be set.
19191 * config/i386/i386.cc (ix86_cc_mode): Use CCCmode for *x86_cmc.
19192 (ix86_rtx_costs): Provide accurate rtx_costs for *x86_cmc.
19193 * config/i386/i386.h (TARGET_SLOW_STC): New define.
19194 * config/i386/i386.md (UNSPEC_STC): New UNSPEC for stc.
19195 (x86_stc): New define_insn.
19196 (define_peephole2): Convert x86_stc into alternate implementation
19197 on pentium4 without -Os when a QImode register is available.
19198 (*x86_cmc): New define_insn.
19199 (define_peephole2): Convert *x86_cmc into alternate implementation
19200 on pentium4 without -Os when a QImode register is available.
19201 (*setccc): New define_insn_and_split for a no-op CCCmode move.
19202 (*setcc_qi_negqi_ccc_1_<mode>): New define_insn_and_split to
19203 recognize (and eliminate) the carry flag being copied to itself.
19204 (*setcc_qi_negqi_ccc_2_<mode>): Likewise.
19205 * config/i386/x86-tune.def (X86_TUNE_SLOW_STC): New tuning flag.
19207 2023-06-07 Andrew Pinski <apinski@marvell.com>
19209 * match.pd: Fix comment for the
19210 `(zero_one ==/!= 0) ? y : z <op> y` patterns.
19212 2023-06-07 Jeff Law <jlaw@ventanamicro.com>
19213 Jeff Law <jlaw@ventanamicro.com>
19215 * config/riscv/bitmanip.md (rotrdi3, rotrsi3, rotlsi3): New expanders.
19216 (rotrsi3_sext): Expose generator.
19217 (rotlsi3 pattern): Hide generator.
19218 * config/riscv/riscv-protos.h (riscv_emit_binary): New function
19220 * config/riscv/riscv.cc (riscv_emit_binary): Removed static
19221 * config/riscv/riscv.md (addsi3, subsi3, negsi2): Hide generator.
19222 (mulsi3, <optab>si3): Likewise.
19223 (addsi3, subsi3, negsi2, mulsi3, <optab>si3): New expanders.
19224 (addv<mode>4, subv<mode>4, mulv<mode>4): Use riscv_emit_binary.
19225 (<u>mulsidi3): Likewise.
19226 (addsi3_extended, subsi3_extended, negsi2_extended): Expose generator.
19227 (mulsi3_extended, <optab>si3_extended): Likewise.
19228 (splitter for shadd feeding divison): Update RTL pattern to account
19229 for changes in how 32 bit ops are expanded for TARGET_64BIT.
19230 * loop-iv.cc (get_biv_step_1): Process src of extension when it PLUS.
19232 2023-06-07 Dimitar Dimitrov <dimitar@dinux.eu>
19235 * config/riscv/riscv.cc (riscv_print_operand): Calculate
19236 memmodel only when it is valid.
19238 2023-06-07 Dimitar Dimitrov <dimitar@dinux.eu>
19240 * config/riscv/riscv.cc (riscv_const_insns): Recursively call
19241 for constant element of a vector.
19243 2023-06-07 Jakub Jelinek <jakub@redhat.com>
19245 * match.pd (zero_one_valued_p): Don't handle integer_zerop specially,
19246 instead compare tree_nonzero_bits <= 1U rather than just == 1.
19248 2023-06-07 Alex Coplan <alex.coplan@arm.com>
19251 * config/aarch64/aarch64-builtins.cc (aarch64_general_simulate_builtin):
19253 (aarch64_init_ls64_builtins): ... here. Switch to declaring public ACLE
19254 names for builtins.
19255 (aarch64_general_init_builtins): Ensure we invoke the arm_acle.h
19256 setup if in_lto_p, just like we do for SVE.
19257 * config/aarch64/arm_acle.h: (__arm_ld64b): Delete.
19258 (__arm_st64b): Delete.
19259 (__arm_st64bv): Delete.
19260 (__arm_st64bv0): Delete.
19262 2023-06-07 Alex Coplan <alex.coplan@arm.com>
19265 * config/aarch64/aarch64-builtins.cc (aarch64_expand_builtin_ls64):
19266 Use input operand for the destination address.
19267 * config/aarch64/aarch64.md (st64b): Fix constraint on address
19270 2023-06-07 Alex Coplan <alex.coplan@arm.com>
19273 * config/aarch64/aarch64-builtins.cc (aarch64_init_ls64_builtins_types):
19274 Replace eight consecutive spaces with tabs.
19275 (aarch64_init_ls64_builtins): Likewise.
19276 (aarch64_expand_builtin_ls64): Likewise.
19277 * config/aarch64/aarch64.md (ld64b): Likewise.
19280 (st64bv0): Likewise.
19282 2023-06-07 Vladimir N. Makarov <vmakarov@redhat.com>
19284 * ira-costs.cc: (find_costs_and_classes): Constrain classes of pic
19285 offset table pseudo to a general reg subset.
19287 2023-06-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
19289 * config/aarch64/aarch64-simd.md (aarch64_sqmovun<mode><vczle><vczbe>):
19291 (*aarch64_sqmovun<mode>_insn<vczle><vczbe>): ... This. Reimplement
19293 (aarch64_sqmovun<mode> [SD_HSDI]): Reimplement with RTL codes.
19294 (aarch64_sqxtun2<mode>_le): Likewise.
19295 (aarch64_sqxtun2<mode>_be): Likewise.
19296 (aarch64_sqxtun2<mode>): Adjust for the above.
19297 (aarch64_sqmovun<mode>): New define_expand.
19298 * config/aarch64/iterators.md (UNSPEC_SQXTUN): Delete.
19299 (half_mask): New mode attribute.
19300 * config/aarch64/predicates.md (aarch64_simd_umax_half_mode):
19303 2023-06-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
19305 * config/aarch64/aarch64-simd.md (aarch64_addp<mode><vczle><vczbe>):
19307 (aarch64_addp<mode>_insn): ... This...
19308 (aarch64_addp<mode><vczle><vczbe>_insn): ... And this.
19309 (aarch64_addp<mode>): New define_expand.
19311 2023-06-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19313 * config/riscv/riscv-protos.h (expand_vec_perm_const): New function.
19314 * config/riscv/riscv-v.cc
19315 (rvv_builder::can_duplicate_repeating_sequence_p): Support POLY
19317 (rvv_builder::single_step_npatterns_p): New function.
19318 (rvv_builder::npatterns_all_equal_p): Ditto.
19319 (const_vec_all_in_range_p): Support POLY handling.
19320 (gen_const_vector_dup): Ditto.
19321 (emit_vlmax_gather_insn): Add vrgatherei16.
19322 (emit_vlmax_masked_gather_mu_insn): Ditto.
19323 (expand_const_vector): Add VLA SLP const vector support.
19324 (expand_vec_perm): Support POLY.
19325 (struct expand_vec_perm_d): New struct.
19326 (shuffle_generic_patterns): New function.
19327 (expand_vec_perm_const_1): Ditto.
19328 (expand_vec_perm_const): Ditto.
19329 * config/riscv/riscv.cc (riscv_vectorize_vec_perm_const): Ditto.
19330 (TARGET_VECTORIZE_VEC_PERM_CONST): New targethook.
19332 2023-06-07 Andrew Pinski <apinski@marvell.com>
19334 PR middle-end/110117
19335 * expr.cc (expand_single_bit_test): Handle
19336 const_int from expand_expr.
19338 2023-06-07 Andrew Pinski <apinski@marvell.com>
19340 * expr.cc (do_store_flag): Rearrange the
19341 TER code so that it overrides the nonzero bits
19342 info if we had `a & POW2`.
19344 2023-06-07 Andrew Pinski <apinski@marvell.com>
19346 PR tree-optimization/110134
19347 * match.pd (-A CMP -B -> B CMP A): Allow EQ/NE for all integer
19349 (-A CMP CST -> B CMP (-CST)): Likewise.
19351 2023-06-07 Andrew Pinski <apinski@marvell.com>
19353 PR tree-optimization/89263
19354 PR tree-optimization/99069
19355 PR tree-optimization/20083
19356 PR tree-optimization/94898
19357 * match.pd: Add patterns to optimize `a ? onezero : onezero` with
19358 one of the operands are constant.
19360 2023-06-07 Andrew Pinski <apinski@marvell.com>
19362 * match.pd (zero_one_valued_p): Match 0 integer constant
19365 2023-06-07 Pan Li <pan2.li@intel.com>
19367 * config/riscv/riscv-vector-builtins-types.def
19368 (vfloat32mf2_t): Take RVV_REQUIRE_ELEN_FP_16 as requirement.
19369 (vfloat32m1_t): Ditto.
19370 (vfloat32m2_t): Ditto.
19371 (vfloat32m4_t): Ditto.
19372 (vfloat32m8_t): Ditto.
19373 (vint16mf4_t): Ditto.
19374 (vint16mf2_t): Ditto.
19375 (vint16m1_t): Ditto.
19376 (vint16m2_t): Ditto.
19377 (vint16m4_t): Ditto.
19378 (vint16m8_t): Ditto.
19379 (vuint16mf4_t): Ditto.
19380 (vuint16mf2_t): Ditto.
19381 (vuint16m1_t): Ditto.
19382 (vuint16m2_t): Ditto.
19383 (vuint16m4_t): Ditto.
19384 (vuint16m8_t): Ditto.
19385 (vint32mf2_t): Ditto.
19386 (vint32m1_t): Ditto.
19387 (vint32m2_t): Ditto.
19388 (vint32m4_t): Ditto.
19389 (vint32m8_t): Ditto.
19390 (vuint32mf2_t): Ditto.
19391 (vuint32m1_t): Ditto.
19392 (vuint32m2_t): Ditto.
19393 (vuint32m4_t): Ditto.
19394 (vuint32m8_t): Ditto.
19396 2023-06-07 Jason Merrill <jason@redhat.com>
19399 * doc/invoke.texi: Document it.
19401 2023-06-06 Roger Sayle <roger@nextmovesoftware.com>
19403 * doc/rtl.texi (bitreverse, copysign): Document new RTX codes.
19404 * rtl.def (BITREVERSE, COPYSIGN): Define new RTX codes.
19405 * simplify-rtx.cc (simplify_unary_operation_1): Optimize
19406 NOT (BITREVERSE x) as BITREVERSE (NOT x).
19407 Optimize POPCOUNT (BITREVERSE x) as POPCOUNT x.
19408 Optimize PARITY (BITREVERSE x) as PARITY x.
19409 Optimize BITREVERSE (BITREVERSE x) as x.
19410 (simplify_const_unary_operation) <case BITREVERSE>: Evaluate
19411 BITREVERSE of a constant integer at compile-time.
19412 (simplify_binary_operation_1) <case COPYSIGN>: Optimize
19413 COPY_SIGN (x, x) as x. Optimize COPYSIGN (x, C) as ABS x
19414 or NEG (ABS x) for constant C. Optimize COPYSIGN (ABS x, y)
19415 and COPYSIGN (NEG x, y) as COPYSIGN (x, y).
19416 Optimize COPYSIGN (x, ABS y) as ABS x.
19417 Optimize COPYSIGN (COPYSIGN (x, y), z) as COPYSIGN (x, z).
19418 Optimize COPYSIGN (x, COPYSIGN (y, z)) as COPYSIGN (x, z).
19419 (simplify_const_binary_operation): Evaluate COPYSIGN of constant
19420 arguments at compile-time.
19422 2023-06-06 Uros Bizjak <ubizjak@gmail.com>
19424 * rtl.h (function_invariant_p): Change return type from int to bool.
19425 * reload1.cc (function_invariant_p): Change return type from
19426 int to bool and adjust function body accordingly.
19428 2023-06-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19430 * config/riscv/autovec-opt.md (*<optab>_fma<mode>): New pattern.
19431 (*single_<optab>mult_plus<mode>): Ditto.
19432 (*double_<optab>mult_plus<mode>): Ditto.
19433 (*sign_zero_extend_fma): Ditto.
19434 (*zero_sign_extend_fma): Ditto.
19435 * config/riscv/riscv-protos.h (enum insn_type): New enum.
19437 2023-06-06 Kwok Cheung Yeung <kcy@codesourcery.com>
19438 Tobias Burnus <tobias@codesourcery.com>
19440 * gimplify.cc (omp_notice_variable): Apply GOVD_MAP_ALLOC_ONLY flag
19441 and defaultmap flags if the defaultmap has GOVD_MAP_FORCE_PRESENT flag
19443 (omp_get_attachment): Handle map clauses with 'present' modifier.
19444 (omp_group_base): Likewise.
19445 (gimplify_scan_omp_clauses): Reorder present maps to come first.
19446 Set GOVD flags for present defaultmaps.
19447 (gimplify_adjust_omp_clauses_1): Set map kind for present defaultmaps.
19448 * omp-low.cc (scan_sharing_clauses): Handle 'always, present' map
19450 (lower_omp_target): Handle map clauses with 'present' modifier.
19451 Handle 'to' and 'from' clauses with 'present'.
19452 * tree-core.h (enum omp_clause_defaultmap_kind): Add
19453 OMP_CLAUSE_DEFAULTMAP_PRESENT defaultmap kind.
19454 * tree-pretty-print.cc (dump_omp_clause): Handle 'map', 'to' and
19455 'from' clauses with 'present' modifier. Handle present defaultmap.
19456 * tree.h (OMP_CLAUSE_MOTION_PRESENT): New #define.
19458 2023-06-06 Segher Boessenkool <segher@kernel.crashing.org>
19460 * config/rs6000/genfusion.pl: Delete some dead code.
19462 2023-06-06 Segher Boessenkool <segher@kernel.crashing.org>
19464 * config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): New, rewritten and
19466 (gen_ld_cmpi_p10): ... this.
19468 2023-06-06 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
19471 * config/rs6000/rs6000.cc (vec_const_128bit_to_bytes): Remove
19472 duplicate expression.
19474 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
19476 * config/aarch64/aarch64-builtins.cc (aarch64_general_gimple_fold_builtin):
19477 Handle unsigned reduc_plus_scal_ builtins.
19478 * config/aarch64/aarch64-simd-builtins.def (addp): Delete DImode instances.
19479 * config/aarch64/aarch64-simd.md (aarch64_addpdi): Delete.
19480 * config/aarch64/arm_neon.h (vpaddd_s64): Reimplement with
19481 __builtin_aarch64_reduc_plus_scal_v2di.
19482 (vpaddd_u64): Reimplement with __builtin_aarch64_reduc_plus_scal_v2di_uu.
19484 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
19486 * config/aarch64/aarch64-simd.md (aarch64_<sur>shr_n<mode>): Delete.
19487 (aarch64_<sra_op>rshr_n<mode><vczle><vczbe>_insn): New define_insn.
19488 (aarch64_<sra_op>rshr_n<mode>): New define_expand.
19490 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
19492 * config/aarch64/aarch64-simd.md (aarch64_shrn<mode>_insn_le): Delete.
19493 (aarch64_shrn<mode>_insn_be): Delete.
19494 (*aarch64_<srn_op>shrn<mode>_vect): Rename to...
19495 (*aarch64_<srn_op>shrn<mode><vczle><vczbe>): ... This.
19496 (aarch64_shrn<mode>): Remove reference to the above deleted patterns.
19497 (aarch64_rshrn<mode>_insn_le): Delete.
19498 (aarch64_rshrn<mode>_insn_be): Delete.
19499 (aarch64_rshrn<mode><vczle><vczbe>_insn): New define_insn.
19500 (aarch64_rshrn<mode>): Remove references to the above deleted patterns.
19502 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
19504 * config/aarch64/aarch64-protos.h (aarch64_parallel_select_half_p):
19506 (aarch64_pars_overlap_p): Likewise.
19507 * config/aarch64/aarch64-simd.md (aarch64_<su>addlv<mode>):
19508 Express in terms of UNSPEC_ADDV.
19509 (*aarch64_<su>addlv<VDQV_L:mode>_ze<GPI:mode>): Likewise.
19510 (*aarch64_<su>addlv<mode>_reduction): Define.
19511 (*aarch64_uaddlv<mode>_reduction_2): Likewise.
19512 * config/aarch64/aarch64.cc (aarch64_parallel_select_half_p): Define.
19513 (aarch64_pars_overlap_p): Likewise.
19514 * config/aarch64/iterators.md (UNSPEC_SADDLV, UNSPEC_UADDLV): Delete.
19515 (VQUADW): New mode attribute.
19516 (VWIDE2X_S): Likewise.
19518 (su): Delete handling of UNSPEC_SADDLV, UNSPEC_UADDLV.
19519 * config/aarch64/predicates.md (vect_par_cnst_select_half): Define.
19521 2023-06-06 Richard Biener <rguenther@suse.de>
19523 PR middle-end/110055
19524 * gimplify.cc (gimplify_target_expr): Do not emit
19525 CLOBBERs for variables which have static storage duration
19526 after gimplifying their initializers.
19528 2023-06-06 Richard Biener <rguenther@suse.de>
19530 PR tree-optimization/109143
19531 * tree-ssa-structalias.cc (solution_set_expand): Avoid
19532 one bitmap iteration and optimize bit range setting.
19534 2023-06-06 Hans-Peter Nilsson <hp@axis.com>
19536 PR bootstrap/110120
19537 * postreload.cc (reload_cse_move2add, move2add_use_add2_insn): Use
19538 XVECEXP, not XEXP, to access first item of a PARALLEL.
19540 2023-06-06 Pan Li <pan2.li@intel.com>
19542 * config/riscv/riscv-vector-builtins-types.def
19543 (vfloat16mf4_t): Add vfloat16mf4_t to WF operations.
19544 (vfloat16mf2_t): Likewise.
19545 (vfloat16m1_t): Likewise.
19546 (vfloat16m2_t): Likewise.
19547 (vfloat16m4_t): Likewise.
19548 (vfloat16m8_t): Likewise.
19549 * config/riscv/vector-iterators.md: Add FP=16 to VWF, VWF_ZVE64,
19550 VWLMUL1, VWLMUL1_ZVE64, vwlmul1 and vwlmul1_zve64.
19552 2023-06-06 Fei Gao <gaofei@eswincomputing.com>
19554 * config/riscv/riscv.cc (riscv_adjust_libcall_cfi_prologue): Use Pmode
19555 for cfi reg/mem machmode
19556 (riscv_adjust_libcall_cfi_epilogue): Use Pmode for cfi reg machmode
19558 2023-06-06 Li Xu <xuli1@eswincomputing.com>
19560 * config/riscv/vector-iterators.md:
19561 Fix 'REQUIREMENT' for machine_mode 'MODE'.
19562 * config/riscv/vector.md (@pred_indexed_<order>store<VNX16_QHS:mode>
19563 <VNX16_QHSI:mode>): change VNX16_QHSI to VNX16_QHSDI.
19564 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSDI:mode>): Ditto.
19566 2023-06-06 Pan Li <pan2.li@intel.com>
19568 * config/riscv/vector-iterators.md: Fix typo in mode attr.
19570 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
19571 Joel Hutton <joel.hutton@arm.com>
19573 * doc/generic.texi: Remove old tree codes.
19574 * expr.cc (expand_expr_real_2): Remove old tree code cases.
19575 * gimple-pretty-print.cc (dump_binary_rhs): Likewise.
19576 * optabs-tree.cc (optab_for_tree_code): Likewise.
19577 (supportable_half_widening_operation): Likewise.
19578 * tree-cfg.cc (verify_gimple_assign_binary): Likewise.
19579 * tree-inline.cc (estimate_operator_cost): Likewise.
19580 (op_symbol_code): Likewise.
19581 * tree-vect-data-refs.cc (vect_get_smallest_scalar_type): Likewise.
19582 (vect_analyze_data_ref_accesses): Likewise.
19583 * tree-vect-generic.cc (expand_vector_operations_1): Likewise.
19584 * cfgexpand.cc (expand_debug_expr): Likewise.
19585 * tree-vect-stmts.cc (vectorizable_conversion): Likewise.
19586 (supportable_widening_operation): Likewise.
19587 * gimple-range-op.cc (gimple_range_op_handler::maybe_non_standard):
19589 * optabs.def (vec_widen_ssubl_hi_optab, vec_widen_ssubl_lo_optab,
19590 vec_widen_saddl_hi_optab, vec_widen_saddl_lo_optab,
19591 vec_widen_usubl_hi_optab, vec_widen_usubl_lo_optab,
19592 vec_widen_uaddl_hi_optab, vec_widen_uaddl_lo_optab): Remove optabs.
19593 * tree-pretty-print.cc (dump_generic_node): Remove tree code definition.
19594 * tree.def (WIDEN_PLUS_EXPR, WIDEN_MINUS_EXPR, VEC_WIDEN_PLUS_HI_EXPR,
19595 VEC_WIDEN_PLUS_LO_EXPR, VEC_WIDEN_MINUS_HI_EXPR,
19596 VEC_WIDEN_MINUS_LO_EXPR): Likewise.
19598 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
19599 Joel Hutton <joel.hutton@arm.com>
19600 Tamar Christina <tamar.christina@arm.com>
19602 * config/aarch64/aarch64-simd.md (vec_widen_<su>addl_lo_<mode>): Rename
19604 (vec_widen_<su>add_lo_<mode>): ... to this.
19605 (vec_widen_<su>addl_hi_<mode>): Rename this ...
19606 (vec_widen_<su>add_hi_<mode>): ... to this.
19607 (vec_widen_<su>subl_lo_<mode>): Rename this ...
19608 (vec_widen_<su>sub_lo_<mode>): ... to this.
19609 (vec_widen_<su>subl_hi_<mode>): Rename this ...
19610 (vec_widen_<su>sub_hi_<mode>): ...to this.
19611 * doc/generic.texi: Document new IFN codes.
19612 * internal-fn.cc (lookup_hilo_internal_fn): Add lookup function.
19613 (commutative_binary_fn_p): Add widen_plus fn's.
19614 (widening_fn_p): New function.
19615 (narrowing_fn_p): New function.
19616 (direct_internal_fn_optab): Change visibility.
19617 * internal-fn.def (DEF_INTERNAL_WIDENING_OPTAB_FN): Macro to define an
19618 internal_fn that expands into multiple internal_fns for widening.
19619 (IFN_VEC_WIDEN_PLUS, IFN_VEC_WIDEN_PLUS_HI, IFN_VEC_WIDEN_PLUS_LO,
19620 IFN_VEC_WIDEN_PLUS_EVEN, IFN_VEC_WIDEN_PLUS_ODD,
19621 IFN_VEC_WIDEN_MINUS, IFN_VEC_WIDEN_MINUS_HI,
19622 IFN_VEC_WIDEN_MINUS_LO, IFN_VEC_WIDEN_MINUS_ODD,
19623 IFN_VEC_WIDEN_MINUS_EVEN): Define widening plus,minus functions.
19624 * internal-fn.h (direct_internal_fn_optab): Declare new prototype.
19625 (lookup_hilo_internal_fn): Likewise.
19626 (widening_fn_p): Likewise.
19627 (Narrowing_fn_p): Likewise.
19628 * optabs.cc (commutative_optab_p): Add widening plus optabs.
19629 * optabs.def (OPTAB_D): Define widen add, sub optabs.
19630 * tree-vect-patterns.cc (vect_recog_widen_op_pattern): Support
19631 patterns with a hi/lo or even/odd split.
19632 (vect_recog_sad_pattern): Refactor to use new IFN codes.
19633 (vect_recog_widen_plus_pattern): Likewise.
19634 (vect_recog_widen_minus_pattern): Likewise.
19635 (vect_recog_average_pattern): Likewise.
19636 * tree-vect-stmts.cc (vectorizable_conversion): Add support for
19638 (supportable_widening_operation): Likewise.
19639 * tree.def (WIDEN_SUM_EXPR): Update example to use new IFNs.
19641 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
19642 Joel Hutton <joel.hutton@arm.com>
19644 * tree-vect-patterns.cc: Add include for gimple-iterator.
19645 (vect_recog_widen_op_pattern): Refactor to use code_helper.
19646 (vect_gimple_build): New function.
19647 * tree-vect-stmts.cc (simple_integer_narrowing): Refactor to use
19649 (vectorizable_call): Likewise.
19650 (vect_gen_widened_results_half): Likewise.
19651 (vect_create_vectorized_demotion_stmts): Likewise.
19652 (vect_create_vectorized_promotion_stmts): Likewise.
19653 (vect_create_half_widening_stmts): Likewise.
19654 (vectorizable_conversion): Likewise.
19655 (supportable_widening_operation): Likewise.
19656 (supportable_narrowing_operation): Likewise.
19657 * tree-vectorizer.h (supportable_widening_operation): Change
19658 prototype to use code_helper.
19659 (supportable_narrowing_operation): Likewise.
19660 (vect_gimple_build): New function prototype.
19661 * tree.h (code_helper::safe_as_tree_code): New function.
19662 (code_helper::safe_as_fn_code): New function.
19664 2023-06-05 Roger Sayle <roger@nextmovesoftware.com>
19666 * wide-int.cc (wi::bitreverse_large): New function implementing
19667 bit reversal of an integer.
19668 * wide-int.h (wi::bitreverse): New (template) function prototype.
19669 (bitreverse_large): Prototype helper function/implementation.
19670 (wi::bitreverse): New template wrapper around bitreverse_large.
19672 2023-06-05 Uros Bizjak <ubizjak@gmail.com>
19674 * rtl.h (print_rtl_single): Change return type from int to void.
19675 (print_rtl_single_with_indent): Ditto.
19676 * print-rtl.h (class rtx_writer): Ditto. Change m_sawclose to bool.
19677 * print-rtl.cc (rtx_writer::rtx_writer): Update for m_sawclose change.
19678 (rtx_writer::print_rtx_operand_code_0): Ditto.
19679 (rtx_writer::print_rtx_operand_codes_E_and_V): Ditto.
19680 (rtx_writer::print_rtx_operand_code_i): Ditto.
19681 (rtx_writer::print_rtx_operand_code_u): Ditto.
19682 (rtx_writer::print_rtx_operand): Ditto.
19683 (rtx_writer::print_rtx): Ditto.
19684 (rtx_writer::finish_directive): Ditto.
19685 (print_rtl_single): Change return type from int to void
19686 and adjust function body accordingly.
19687 (rtx_writer::print_rtl_single_with_indent): Ditto.
19689 2023-06-05 Uros Bizjak <ubizjak@gmail.com>
19691 * rtl.h (reg_classes_intersect_p): Change return type from int to bool.
19692 (reg_class_subset_p): Ditto.
19693 * reginfo.cc (reg_classes_intersect_p): Ditto.
19694 (reg_class_subset_p): Ditto.
19696 2023-06-05 Pan Li <pan2.li@intel.com>
19698 * config/riscv/riscv-vector-builtins-types.def
19699 (vfloat32mf2_t): New type for DEF_RVV_WEXTF_OPS.
19700 (vfloat32m1_t): Ditto.
19701 (vfloat32m2_t): Ditto.
19702 (vfloat32m4_t): Ditto.
19703 (vfloat32m8_t): Ditto.
19704 (vint16mf4_t): New type for DEF_RVV_CONVERT_I_OPS.
19705 (vint16mf2_t): Ditto.
19706 (vint16m1_t): Ditto.
19707 (vint16m2_t): Ditto.
19708 (vint16m4_t): Ditto.
19709 (vint16m8_t): Ditto.
19710 (vuint16mf4_t): New type for DEF_RVV_CONVERT_U_OPS.
19711 (vuint16mf2_t): Ditto.
19712 (vuint16m1_t): Ditto.
19713 (vuint16m2_t): Ditto.
19714 (vuint16m4_t): Ditto.
19715 (vuint16m8_t): Ditto.
19716 (vint32mf2_t): New type for DEF_RVV_WCONVERT_I_OPS.
19717 (vint32m1_t): Ditto.
19718 (vint32m2_t): Ditto.
19719 (vint32m4_t): Ditto.
19720 (vint32m8_t): Ditto.
19721 (vuint32mf2_t): New type for DEF_RVV_WCONVERT_U_OPS.
19722 (vuint32m1_t): Ditto.
19723 (vuint32m2_t): Ditto.
19724 (vuint32m4_t): Ditto.
19725 (vuint32m8_t): Ditto.
19726 * config/riscv/vector-iterators.md: Add FP=16 support for V,
19727 VWCONVERTI, VCONVERT, VNCONVERT, VMUL1 and vlmul1.
19729 2023-06-05 Andrew Pinski <apinski@marvell.com>
19731 PR bootstrap/110085
19732 * Makefile.in (clean): Remove the removing of
19733 MULTILIB_DIR/MULTILIB_OPTIONS directories.
19735 2023-06-05 YunQiang Su <yunqiang.su@cipunited.com>
19737 * config/mips/mips-protos.h (mips_emit_speculation_barrier): New
19739 * config/mips/mips.cc (speculation_barrier_libfunc): New static
19741 (mips_init_libfuncs): Initialize it.
19742 (mips_emit_speculation_barrier): New function.
19743 * config/mips/mips.md (speculation_barrier): Call
19744 mips_emit_speculation_barrier.
19746 2023-06-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19748 * config/riscv/riscv-v.cc (class rvv_builder): Reorganize functions.
19749 (rvv_builder::can_duplicate_repeating_sequence_p): Ditto.
19750 (rvv_builder::repeating_sequence_use_merge_profitable_p): Ditto.
19751 (rvv_builder::get_merged_repeating_sequence): Ditto.
19752 (rvv_builder::get_merge_scalar_mask): Ditto.
19753 (emit_scalar_move_insn): Ditto.
19754 (emit_vlmax_integer_move_insn): Ditto.
19755 (emit_nonvlmax_integer_move_insn): Ditto.
19756 (emit_vlmax_gather_insn): Ditto.
19757 (emit_vlmax_masked_gather_mu_insn): Ditto.
19758 (get_repeating_sequence_dup_machine_mode): Ditto.
19760 2023-06-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19762 * config/riscv/autovec.md: Split arguments.
19763 * config/riscv/riscv-protos.h (expand_vec_perm): Ditto.
19764 * config/riscv/riscv-v.cc (expand_vec_perm): Ditto.
19766 2023-06-04 Andrew Pinski <apinski@marvell.com>
19768 * expr.cc (do_store_flag): Improve for single bit testing
19769 not against zero but against that single bit.
19771 2023-06-04 Andrew Pinski <apinski@marvell.com>
19773 * expr.cc (do_store_flag): Extend the one bit checking case
19774 to handle the case where we don't have an and but rather still
19775 one bit is known to be non-zero.
19777 2023-06-04 Jeff Law <jlaw@ventanamicro.com>
19779 * config/h8300/constraints.md (Zz): Make this a normal
19781 * config/h8300/h8300.cc (TARGET_LRA_P): Remove.
19782 * config/h8300/logical.md (H8/SX bit patterns): Remove.
19784 2023-06-04 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
19786 * config/xtensa/xtensa.md (*btrue_INT_MIN, *eqne_INT_MIN):
19787 New insn_and_split patterns.
19789 2023-06-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19792 * config/riscv/riscv-vector-builtins-bases.cc: Change expand approach.
19793 * config/riscv/vector.md (@vlmul_extx2<mode>): Remove it.
19794 (@vlmul_extx4<mode>): Ditto.
19795 (@vlmul_extx8<mode>): Ditto.
19796 (@vlmul_extx16<mode>): Ditto.
19797 (@vlmul_extx32<mode>): Ditto.
19798 (@vlmul_extx64<mode>): Ditto.
19799 (*vlmul_extx2<mode>): Ditto.
19800 (*vlmul_extx4<mode>): Ditto.
19801 (*vlmul_extx8<mode>): Ditto.
19802 (*vlmul_extx16<mode>): Ditto.
19803 (*vlmul_extx32<mode>): Ditto.
19804 (*vlmul_extx64<mode>): Ditto.
19806 2023-06-04 Pan Li <pan2.li@intel.com>
19808 * config/riscv/riscv-vector-builtins-types.def
19809 (vfloat32mf2_t): Add vfloat32mf2_t type to vfncvt.f.f.w operations.
19810 (vfloat32m1_t): Likewise.
19811 (vfloat32m2_t): Likewise.
19812 (vfloat32m4_t): Likewise.
19813 (vfloat32m8_t): Likewise.
19814 * config/riscv/riscv-vector-builtins.def: Fix typo in comments.
19815 * config/riscv/vector-iterators.md: Add single to half machine
19818 2023-06-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19820 * config/riscv/autovec-opt.md (*<optab>not<mode>): Move to autovec-opt.md.
19821 (*n<optab><mode>): Ditto.
19822 * config/riscv/autovec.md (*<optab>not<mode>): Ditto.
19823 (*n<optab><mode>): Ditto.
19824 * config/riscv/vector.md: Ditto.
19826 2023-06-04 Roger Sayle <roger@nextmovesoftware.com>
19829 * config/i386/i386-features.cc (scalar_chain::convert_compare):
19830 Update or delete REG_EQUAL notes, converting CONST_INT and
19831 CONST_WIDE_INT immediate operands to a suitable CONST_VECTOR.
19833 2023-06-04 Jason Merrill <jason@redhat.com>
19836 * tree-eh.cc (lower_resx): Pass the exception pointer to the
19838 * except.h: Tweak comment.
19840 2023-06-04 Hans-Peter Nilsson <hp@axis.com>
19842 * postreload.cc (move2add_use_add2_insn): Handle
19843 trivial single_sets. Rename variable PAT to SET.
19844 (move2add_use_add3_insn, reload_cse_move2add): Similar.
19846 2023-06-04 Pan Li <pan2.li@intel.com>
19848 * config/riscv/riscv-vector-builtins-types.def
19849 (vfloat16mf4_t): Add the float16 type to DEF_RVV_F_OPS.
19850 (vfloat16mf2_t): Likewise.
19851 (vfloat16m1_t): Likewise.
19852 (vfloat16m2_t): Likewise.
19853 (vfloat16m4_t): Likewise.
19854 (vfloat16m8_t): Likewise.
19855 * config/riscv/riscv.md: Add vfloat16*_t to attr mode.
19856 * config/riscv/vector-iterators.md: Add vfloat16*_t machine mode
19857 to V, V_WHOLE, V_FRACT, VINDEX, VM, VEL and sew.
19858 * config/riscv/vector.md: Add vfloat16*_t machine mode to sew,
19861 2023-06-03 Fei Gao <gaofei@eswincomputing.com>
19863 * config/riscv/riscv.cc (riscv_expand_epilogue): fix cfi issue with
19866 2023-06-03 Die Li <lidie@eswincomputing.com>
19868 * config/riscv/thead.md (*th_cond_gpr_mov<GPR:mode><GPR2:mode>): Delete.
19870 2023-06-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19872 * config/riscv/predicates.md: Change INTVAL into UINTVAL.
19874 2023-06-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19876 * config/riscv/vector.md: Add vector-opt.md.
19877 * config/riscv/autovec-opt.md: New file.
19879 2023-06-03 liuhongt <hongtao.liu@intel.com>
19881 PR tree-optimization/110067
19882 * gimple-ssa-store-merging.cc (find_bswap_or_nop): Don't try
19883 bswap + rotate when TYPE_PRECISION(n->type) > n->range.
19885 2023-06-03 liuhongt <hongtao.liu@intel.com>
19888 * config/i386/mmx.md (truncv2hiv2qi2): New define_insn.
19889 (truncv2si<mode>2): Ditto.
19891 2023-06-02 Andrew Pinski <apinski@marvell.com>
19893 PR rtl-optimization/102733
19894 * dse.cc (store_info): Add addrspace field.
19895 (record_store): Record the address space
19896 and check to make sure they are the same.
19898 2023-06-02 Andrew Pinski <apinski@marvell.com>
19900 PR rtl-optimization/110042
19901 * ifcvt.cc (bbs_ok_for_cmove_arith): Allow paradoxical subregs.
19902 (bb_valid_for_noce_process_p): Strip the subreg for the SET_DEST.
19904 2023-06-02 Iain Sandoe <iain@sandoe.co.uk>
19907 * config/rs6000/rs6000.cc (darwin_rs6000_special_round_type_align):
19908 Make sure that we do not have a cap on field alignment before altering
19909 the struct layout based on the type alignment of the first entry.
19911 2023-06-02 David Faust <david.faust@oracle.com>
19914 * btfout.cc (btf_absolute_func_id): New function.
19915 (btf_asm_func_type): Call it here. Change index parameter from
19916 size_t to ctf_id_t. Use PRIu64 formatter.
19918 2023-06-02 Alex Coplan <alex.coplan@arm.com>
19920 * btfout.cc (btf_asm_type): Use PRIu64 instead of %lu for uint64_t.
19921 (btf_asm_datasec_type): Likewise.
19923 2023-06-02 Carl Love <cel@us.ibm.com>
19925 * config/rs6000/rs6000-builtins.def (__builtin_altivec_tr_stxvrhx,
19926 __builtin_altivec_tr_stxvrwx): Fix type of third argument.
19928 2023-06-02 Jason Merrill <jason@redhat.com>
19932 * tree.h (DECL_MERGEABLE): New.
19933 * tree-core.h (struct tree_decl_common): Mention it.
19934 * gimplify.cc (gimplify_init_constructor): Check it.
19935 * cgraph.cc (symtab_node::address_can_be_compared_p): Likewise.
19936 * varasm.cc (categorize_decl_for_section): Likewise.
19938 2023-06-02 Uros Bizjak <ubizjak@gmail.com>
19940 * rtl.h (stack_regs_mentioned): Change return type from int to bool.
19941 * reg-stack.cc (struct_block_info_def): Change "done" to bool.
19942 (stack_regs_mentioned_p): Change return type from int to bool
19943 and adjust function body accordingly.
19944 (stack_regs_mentioned): Ditto.
19945 (check_asm_stack_operands): Ditto. Change "malformed_asm"
19947 (move_for_stack_reg): Recode handling of control_flow_insn_deleted.
19948 (swap_rtx_condition_1): Change return type from int to bool
19949 and adjust function body accordingly. Change "r" variable to bool.
19950 (swap_rtx_condition): Change return type from int to bool
19951 and adjust function body accordingly.
19952 (subst_stack_regs_pat): Recode handling of control_flow_insn_deleted.
19953 (subst_stack_regs): Ditto.
19954 (convert_regs_entry): Change return type from int to bool and adjust
19955 function body accordingly. Change "inserted" variable to bool.
19956 (convert_regs_1): Recode handling of control_flow_insn_deleted.
19957 (convert_regs_2): Recode handling of cfg_altered.
19958 (convert_regs): Ditto. Change "inserted" variable to bool.
19960 2023-06-02 Jason Merrill <jason@redhat.com>
19963 * varasm.cc (output_constant) [REAL_TYPE]: Check that sizes match.
19964 (initializer_constant_valid_p_1): Compare float precision.
19966 2023-06-02 Alexander Monakov <amonakov@ispras.ru>
19968 * doc/extend.texi (Vector Extensions): Clarify bitwise shift
19971 2023-06-02 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
19973 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly): Change decrement IV flow.
19974 (vect_set_loop_condition_partial_vectors): Ditto.
19976 2023-06-02 Georg-Johann Lay <avr@gjlay.de>
19979 * config/avr/avr.md: Add an RTL peephole to optimize operations on
19980 non-LD_REGS after a move from LD_REGS.
19981 (piaop): New code iterator.
19983 2023-06-02 Thomas Schwinge <thomas@codesourcery.com>
19986 * doc/install.texi: Document (optional) Perl usage for parallel
19987 testing of libgomp.
19989 2023-06-02 Thomas Schwinge <thomas@codesourcery.com>
19992 * doc/install.texi (Perl): Back to requiring "Perl version 5.6.1 (or
19995 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19996 KuanLin Chen <best124612@gmail.com>
19998 * config/riscv/riscv-vector-builtins-bases.cc: Add _mu overloaded intrinsics.
19999 * config/riscv/riscv-vector-builtins-shapes.cc (struct fault_load_def): Ditto.
20001 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20003 * config/riscv/riscv-v.cc (expand_vec_series): Optimize reverse series index vector.
20005 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20007 * config/riscv/predicates.md: Change INTVAL into UINTVAL.
20009 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20011 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_VXRM_ENUM): Add
20013 (DEF_RVV_FRM_ENUM): Ditto.
20015 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20017 * config/riscv/riscv-vector-builtins-bases.cc: Change vwadd.wv/vwsub.wv
20018 intrinsic API expander
20019 * config/riscv/vector.md
20020 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>): Remove it.
20021 (@pred_single_widen_sub<any_extend:su><mode>): New pattern.
20022 (@pred_single_widen_add<any_extend:su><mode>): New pattern.
20024 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20026 * config/riscv/autovec.md (vec_perm<mode>): New pattern.
20027 * config/riscv/predicates.md (vector_perm_operand): New predicate.
20028 * config/riscv/riscv-protos.h (enum insn_type): New enum.
20029 (expand_vec_perm): New function.
20030 * config/riscv/riscv-v.cc (const_vec_all_in_range_p): Ditto.
20031 (gen_const_vector_dup): Ditto.
20032 (emit_vlmax_gather_insn): Ditto.
20033 (emit_vlmax_masked_gather_mu_insn): Ditto.
20034 (expand_vec_perm): Ditto.
20036 2023-06-01 Jason Merrill <jason@redhat.com>
20038 * doc/invoke.texi (-Wpedantic): Improve clarity.
20040 2023-06-01 Uros Bizjak <ubizjak@gmail.com>
20042 * rtl.h (exp_equiv_p): Change return type from int to bool.
20043 * cse.cc (mention_regs): Change return type from int to bool
20044 and adjust function body accordingly.
20045 (exp_equiv_p): Ditto.
20046 (insert_regs): Ditto. Change "modified" function argument to bool
20047 and update usage accordingly.
20048 (record_jump_cond): Remove always zero "reversed_nonequality"
20049 function argument and update usage accordingly.
20050 (fold_rtx): Change "changed" variable to bool.
20051 (record_jump_equiv): Remove unneeded "reversed_nonequality" variable.
20052 (is_dead_reg): Change return type from int to bool.
20054 2023-06-01 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
20056 * config/xtensa/xtensa.md (adddi3, subdi3):
20057 New RTL generation patterns implemented according to the instruc-
20058 tion idioms described in the Xtensa ISA reference manual (p. 600).
20060 2023-06-01 Roger Sayle <roger@nextmovesoftware.com>
20061 Uros Bizjak <ubizjak@gmail.com>
20064 * config/i386/i386-builtin.def (__builtin_ia32_ptestz128): Use new
20065 CODE_for_sse4_1_ptestzv2di.
20066 (__builtin_ia32_ptestc128): Use new CODE_for_sse4_1_ptestcv2di.
20067 (__builtin_ia32_ptestz256): Use new CODE_for_avx_ptestzv4di.
20068 (__builtin_ia32_ptestc256): Use new CODE_for_avx_ptestcv4di.
20069 * config/i386/i386-expand.cc (ix86_expand_branch): Use CCZmode
20070 when expanding UNSPEC_PTEST to compare against zero.
20071 * config/i386/i386-features.cc (scalar_chain::convert_compare):
20072 Likewise generate CCZmode UNSPEC_PTESTs when converting comparisons.
20073 (general_scalar_chain::convert_insn): Use CCZmode for COMPARE result.
20074 (timode_scalar_chain::convert_insn): Use CCZmode for COMPARE result.
20075 * config/i386/i386-protos.h (ix86_match_ptest_ccmode): Prototype.
20076 * config/i386/i386.cc (ix86_match_ptest_ccmode): New predicate to
20077 check for suitable matching modes for the UNSPEC_PTEST pattern.
20078 * config/i386/sse.md (define_split): When splitting UNSPEC_MOVMSK
20079 to UNSPEC_PTEST, preserve the FLAG_REG mode as CCZ.
20080 (*<sse4_1>_ptest<mode>): Add asterisk to hide define_insn. Remove
20081 ":CC" mode of FLAGS_REG, instead use ix86_match_ptest_ccmode.
20082 (<sse4_1>_ptestz<mode>): New define_expand to specify CCZ.
20083 (<sse4_1>_ptestc<mode>): New define_expand to specify CCC.
20084 (<sse4_1>_ptest<mode>): A define_expand using CC to preserve the
20086 (*ptest<mode>_and): Specify CCZ to only perform this optimization
20087 when only the Z flag is required.
20089 2023-06-01 Jonathan Wakely <jwakely@redhat.com>
20092 * doc/invoke.texi (x86 Options): Fix description of -m32 option.
20094 2023-06-01 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
20096 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>):
20097 Add =r,m and =r,m alternatives.
20098 (load_pair<DREG:mode><DREG2:mode>): Likewise.
20099 (vec_store_pair<DREG:mode><DREG2:mode>): Likewise.
20101 2023-06-01 Pan Li <pan2.li@intel.com>
20103 * common/config/riscv/riscv-common.cc: Add FP_16 mask to zvfhmin
20105 * config/riscv/genrvv-type-indexer.cc (valid_type): Allow FP16.
20106 (main): Disable FP16 tuple.
20107 * config/riscv/riscv-opts.h (MASK_VECTOR_ELEN_FP_16): New macro.
20108 (TARGET_VECTOR_ELEN_FP_16): Ditto.
20109 * config/riscv/riscv-vector-builtins.cc (check_required_extensions):
20111 * config/riscv/riscv-vector-builtins.def (vfloat16mf4_t): New type.
20112 (vfloat16mf2_t): Ditto.
20113 (vfloat16m1_t): Ditto.
20114 (vfloat16m2_t): Ditto.
20115 (vfloat16m4_t): Ditto.
20116 (vfloat16m8_t): Ditto.
20117 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_ELEN_FP_16):
20119 * config/riscv/riscv-vector-switch.def (ENTRY): Allow FP16
20120 machine mode based on TARGET_VECTOR_ELEN_FP_16.
20122 2023-06-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20124 * config/riscv/riscv-vector-builtins.cc (register_frm): New function.
20125 (DEF_RVV_FRM_ENUM): New macro.
20126 (handle_pragma_vector): Add FRM enum
20127 * config/riscv/riscv-vector-builtins.def (DEF_RVV_FRM_ENUM): New macro.
20134 2023-05-31 Roger Sayle <roger@nextmovesoftware.com>
20135 Richard Sandiford <richard.sandiford@arm.com>
20137 * fold-const-call.cc (fold_const_call_ss) <CFN_BUILT_IN_BSWAP*>:
20138 Update call to wi::bswap.
20139 * simplify-rtx.cc (simplify_const_unary_operation) <case BSWAP>:
20140 Update call to wi::bswap.
20141 * tree-ssa-ccp.cc (evaluate_stmt) <case BUILT_IN_BSWAP*>:
20142 Update calls to wi::bswap.
20143 * wide-int.cc (wide_int_storage::bswap): Remove/rename to...
20144 (wi::bswap_large): New function, with revised API.
20145 * wide-int.h (wi::bswap): New (template) function prototype.
20146 (wide_int_storage::bswap): Remove method.
20147 (sext_large, zext_large): Consistent indentation/line wrapping.
20148 (bswap_large): Prototype helper function containing implementation.
20149 (wi::bswap): New template wrapper around bswap_large.
20151 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
20154 * config/aarch64/aarch64-simd.md (<sur>dot_prod<vsi2qi>): Rename to...
20155 (<sur>dot_prod<vsi2qi><vczle><vczbe>): ... This.
20156 (usdot_prod<vsi2qi>): Rename to...
20157 (usdot_prod<vsi2qi><vczle><vczbe>): ... This.
20158 (aarch64_<sur>dot_lane<vsi2qi>): Rename to...
20159 (aarch64_<sur>dot_lane<vsi2qi><vczle><vczbe>): ... This.
20160 (aarch64_<sur>dot_laneq<vsi2qi>): Rename to...
20161 (aarch64_<sur>dot_laneq<vsi2qi><vczle><vczbe>): ... This.
20162 (aarch64_<DOTPROD_I8MM:sur>dot_lane<VB:isquadop><VS:vsi2qi>): Rename to...
20163 (aarch64_<DOTPROD_I8MM:sur>dot_lane<VB:isquadop><VS:vsi2qi><vczle><vczbe>):
20166 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
20169 * config/aarch64/aarch64-simd.md (aarch64_sq<r>dmulh<mode>): Rename to...
20170 (aarch64_sq<r>dmulh<mode><vczle><vczbe>): ... This.
20171 (aarch64_sq<r>dmulh_n<mode>): Rename to...
20172 (aarch64_sq<r>dmulh_n<mode><vczle><vczbe>): ... This.
20173 (aarch64_sq<r>dmulh_lane<mode>): Rename to...
20174 (aarch64_sq<r>dmulh_lane<mode><vczle><vczbe>): ... This.
20175 (aarch64_sq<r>dmulh_laneq<mode>): Rename to...
20176 (aarch64_sq<r>dmulh_laneq<mode><vczle><vczbe>): ... This.
20177 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h<mode>): Rename to...
20178 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h<mode><vczle><vczbe>): ... This.
20179 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_lane<mode>): Rename to...
20180 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_lane<mode><vczle><vczbe>): ... This.
20181 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_laneq<mode>): Rename to...
20182 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_laneq<mode><vczle><vczbe>): ... This.
20184 2023-05-31 David Faust <david.faust@oracle.com>
20186 * btfout.cc (btf_kind_names): New.
20187 (btf_kind_name): New.
20188 (btf_absolute_var_id): New utility function.
20189 (btf_relative_var_id): Likewise.
20190 (btf_relative_func_id): Likewise.
20191 (btf_absolute_datasec_id): Likewise.
20192 (btf_asm_type_ref): New.
20193 (btf_asm_type): Update asm comments and use btf_asm_type_ref ().
20194 (btf_asm_array): Likewise. Accept ctf_container_ref parameter.
20195 (btf_asm_varent): Likewise.
20196 (btf_asm_func_arg): Likewise.
20197 (btf_asm_datasec_entry): Likewise.
20198 (btf_asm_datasec_type): Likewise.
20199 (btf_asm_func_type): Likewise. Add index parameter.
20200 (btf_asm_enum_const): Likewise.
20201 (btf_asm_sou_member): Likewise.
20202 (output_btf_vars): Update btf_asm_* call accordingly.
20203 (output_asm_btf_sou_fields): Likewise.
20204 (output_asm_btf_enum_list): Likewise.
20205 (output_asm_btf_func_args_list): Likewise.
20206 (output_asm_btf_vlen_bytes): Likewise.
20207 (output_btf_func_types): Add ctf_container_ref parameter.
20208 Pass it to btf_asm_func_type.
20209 (output_btf_datasec_types): Update btf_asm_datsec_type call similarly.
20210 (btf_output): Update output_btf_func_types call similarly.
20212 2023-05-31 David Faust <david.faust@oracle.com>
20214 * btfout.cc (btf_asm_type): Add dedicated cases for BTF_KIND_ARRAY
20215 and BTF_KIND_FWD which do not use the size/type field at all.
20217 2023-05-31 Uros Bizjak <ubizjak@gmail.com>
20219 * rtl.h (subreg_lowpart_p): Change return type from int to bool.
20220 (active_insn_p): Ditto.
20221 (in_sequence_p): Ditto.
20222 (unshare_all_rtl): Change return type from int to void.
20223 * emit-rtl.h (mem_expr_equal_p): Change return type from int to bool.
20224 * emit-rtl.cc (subreg_lowpart_p): Change return type from int to bool
20225 and adjust function body accordingly.
20226 (mem_expr_equal_p): Ditto.
20227 (unshare_all_rtl): Change return type from int to void
20228 and adjust function body accordingly.
20229 (verify_rtx_sharing): Remove unneeded return.
20230 (active_insn_p): Change return type from int to bool
20231 and adjust function body accordingly.
20232 (in_sequence_p): Ditto.
20234 2023-05-31 Uros Bizjak <ubizjak@gmail.com>
20236 * rtl.h (true_dependence): Change return type from int to bool.
20237 (canon_true_dependence): Ditto.
20238 (read_dependence): Ditto.
20239 (anti_dependence): Ditto.
20240 (canon_anti_dependence): Ditto.
20241 (output_dependence): Ditto.
20242 (canon_output_dependence): Ditto.
20243 (may_alias_p): Ditto.
20244 * alias.h (alias_sets_conflict_p): Ditto.
20245 (alias_sets_must_conflict_p): Ditto.
20246 (objects_must_conflict_p): Ditto.
20247 (nonoverlapping_memrefs_p): Ditto.
20248 * alias.cc (rtx_equal_for_memref_p): Remove forward declaration.
20249 (record_set): Ditto.
20250 (base_alias_check): Ditto.
20251 (find_base_value): Ditto.
20252 (mems_in_disjoint_alias_sets_p): Ditto.
20253 (get_alias_set_entry): Ditto.
20254 (decl_for_component_ref): Ditto.
20255 (write_dependence_p): Ditto.
20256 (memory_modified_1): Ditto.
20257 (mems_in_disjoint_alias_set_p): Change return type from int to bool
20258 and adjust function body accordingly.
20259 (alias_sets_conflict_p): Ditto.
20260 (alias_sets_must_conflict_p): Ditto.
20261 (objects_must_conflict_p): Ditto.
20262 (rtx_equal_for_memref_p): Ditto.
20263 (base_alias_check): Ditto.
20264 (read_dependence): Ditto.
20265 (nonoverlapping_memrefs_p): Ditto.
20266 (true_dependence_1): Ditto.
20267 (true_dependence): Ditto.
20268 (canon_true_dependence): Ditto.
20269 (write_dependence_p): Ditto.
20270 (anti_dependence): Ditto.
20271 (canon_anti_dependence): Ditto.
20272 (output_dependence): Ditto.
20273 (canon_output_dependence): Ditto.
20274 (may_alias_p): Ditto.
20275 (init_alias_analysis): Change "changed" variable to bool.
20277 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20279 * config/riscv/autovec.md (<optab><v_double_trunc><mode>2): Change
20280 expand into define_insn_and_split.
20282 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20284 * config/riscv/vector.md: Remove FRM.
20286 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20288 * config/riscv/vector.md: Remove FRM.
20290 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20292 * config/riscv/vector.md: Remove FRM.
20294 2023-05-31 Christophe Lyon <christophe.lyon@linaro.org>
20297 * config/aarch64/aarch64.md (aarch64_rev16si2_alt3): New
20300 2023-05-31 Richard Biener <rguenther@suse.de>
20303 PR tree-optimization/109143
20304 * tree-ssa-structalias.cc (struct topo_info): Remove.
20305 (init_topo_info): Likewise.
20306 (free_topo_info): Likewise.
20307 (compute_topo_order): Simplify API, put the component
20308 with ESCAPED last so it's processed first.
20309 (topo_visit): Adjust.
20310 (solve_graph): Likewise.
20312 2023-05-31 Richard Biener <rguenther@suse.de>
20314 * tree-ssa-structalias.cc (constraint_stats::num_avoided_edges):
20316 (add_graph_edge): Count redundant edges we avoid to create.
20317 (dump_sa_stats): Dump them.
20318 (ipa_pta_execute): Do not dump generating constraints when
20319 we are not dumping them.
20321 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
20323 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>): Rewrite
20324 output template to avoid explicit switch on which_alternative.
20325 (*aarch64_simd_mov<VQMOV:mode>): Likewise.
20326 (and<mode>3): Likewise.
20327 (ior<mode>3): Likewise.
20328 * config/aarch64/aarch64.md (*mov<mode>_aarch64): Likewise.
20330 2023-05-31 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
20332 * config/xtensa/predicates.md (xtensa_bit_join_operator):
20334 * config/xtensa/xtensa.md (ior_op): Remove.
20335 (*shlrd_reg): Rename from "*shlrd_reg_<code>", and add the
20336 insn_and_split pattern of the same name to express and capture
20337 the bit-combining operation with both sides swapped.
20338 In addition, replace use of code iterator with new operator
20340 (*shlrd_const, *shlrd_per_byte):
20341 Likewise regarding the code iterator.
20343 2023-05-31 Cui, Lili <lili.cui@intel.com>
20345 PR tree-optimization/110038
20346 * params.opt: Add a limit on tree-reassoc-width.
20347 * tree-ssa-reassoc.cc
20348 (rewrite_expr_tree_parallel): Add width limit.
20350 2023-05-31 Pan Li <pan2.li@intel.com>
20352 * common/config/riscv/riscv-common.cc:
20353 (riscv_implied_info): Add zvfh item.
20354 (riscv_ext_version_table): Ditto.
20355 (riscv_ext_flag_table): Ditto.
20356 * config/riscv/riscv-opts.h (MASK_ZVFH): New macro.
20357 (TARGET_ZVFH): Ditto.
20359 2023-05-30 liuhongt <hongtao.liu@intel.com>
20361 PR tree-optimization/108804
20362 * tree-vect-patterns.cc (vect_get_range_info): Remove static.
20363 * tree-vect-stmts.cc (vect_create_vectorized_demotion_stmts):
20364 Add new parameter narrow_src_p.
20365 (vectorizable_conversion): Enhance NARROW FLOAT_EXPR
20366 vectorization by truncating to lower precision.
20367 * tree-vectorizer.h (vect_get_range_info): New declare.
20369 2023-05-30 Vladimir N. Makarov <vmakarov@redhat.com>
20371 * lra-int.h (lra_update_sp_offset): Add the prototype.
20372 * lra.cc (setup_sp_offset): Change the return type. Use
20373 lra_update_sp_offset.
20374 * lra-eliminations.cc (lra_update_sp_offset): New function.
20375 (lra_process_new_insns): Push the current insn to reprocess if the
20376 input reload changes sp offset.
20378 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
20381 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
20382 Fix misleading identation.
20384 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
20386 * rtl.h (comparison_dominates_p): Change return type from int to bool.
20387 (condjump_p): Ditto.
20388 (any_condjump_p): Ditto.
20389 (any_uncondjump_p): Ditto.
20390 (simplejump_p): Ditto.
20391 (returnjump_p): Ditto.
20392 (eh_returnjump_p): Ditto.
20393 (onlyjump_p): Ditto.
20394 (invert_jump_1): Ditto.
20395 (invert_jump): Ditto.
20396 (rtx_renumbered_equal_p): Ditto.
20397 (redirect_jump_1): Ditto.
20398 (redirect_jump): Ditto.
20399 (condjump_in_parallel_p): Ditto.
20400 * jump.cc (invert_exp_1): Adjust forward declaration.
20401 (comparison_dominates_p): Change return type from int to bool
20402 and adjust function body accordingly.
20403 (simplejump_p): Ditto.
20404 (condjump_p): Ditto.
20405 (condjump_in_parallel_p): Ditto.
20406 (any_uncondjump_p): Ditto.
20407 (any_condjump_p): Ditto.
20408 (returnjump_p): Ditto.
20409 (eh_returnjump_p): Ditto.
20410 (onlyjump_p): Ditto.
20411 (redirect_jump_1): Ditto.
20412 (redirect_jump): Ditto.
20413 (invert_exp_1): Ditto.
20414 (invert_jump_1): Ditto.
20415 (invert_jump): Ditto.
20416 (rtx_renumbered_equal_p): Ditto.
20418 2023-05-30 Andrew Pinski <apinski@marvell.com>
20420 * fold-const.cc (minmax_from_comparison): Add support for NE_EXPR.
20421 * match.pd ((cond (cmp (convert1? x) c1) (convert2? x) c2) pattern):
20422 Add ne as a possible cmp.
20423 ((a CMP b) ? minmax<a, c> : minmax<b, c> pattern): Likewise.
20425 2023-05-30 Andrew Pinski <apinski@marvell.com>
20427 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`): New
20430 2023-05-30 Roger Sayle <roger@nextmovesoftware.com>
20432 * simplify-rtx.cc (simplify_binary_operation_1) <AND>: Use wide-int
20433 instead of HWI_COMPUTABLE_MODE_P and UINTVAL in transformation of
20434 (and (extend X) C) as (zero_extend (and X C)), to also optimize
20435 modes wider than HOST_WIDE_INT.
20437 2023-05-30 Roger Sayle <roger@nextmovesoftware.com>
20440 * simplify-rtx.cc (simplify_const_relational_operation): Return
20441 early if we have a MODE_CC comparison that isn't a COMPARE against
20444 2023-05-30 Robin Dapp <rdapp@ventanamicro.com>
20446 * config/riscv/riscv.cc (riscv_const_insns): Allow
20447 const_vec_duplicates.
20449 2023-05-30 liuhongt <hongtao.liu@intel.com>
20451 PR middle-end/108938
20452 * gimple-ssa-store-merging.cc (is_bswap_or_nop_p): New
20453 function, cut from original find_bswap_or_nop function.
20454 (find_bswap_or_nop): Add a new parameter, detect bswap +
20455 rotate and save rotate result in the new parameter.
20456 (bswap_replace): Add a new parameter to indicate rotate and
20457 generate rotate stmt if needed.
20458 (maybe_optimize_vector_constructor): Adjust for new rotate
20459 parameter in the upper 2 functions.
20460 (pass_optimize_bswap::execute): Ditto.
20461 (imm_store_chain_info::output_merged_store): Ditto.
20463 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
20465 * config/aarch64/aarch64-simd.md (aarch64_<sur>adalp<mode>): Delete.
20466 (aarch64_<su>adalp<mode>): New define_expand.
20467 (*aarch64_<su>adalp<mode><vczle><vczbe>_insn): New define_insn.
20468 (aarch64_<su>addlp<mode>): Convert to define_expand.
20469 (*aarch64_<su>addlp<mode><vczle><vczbe>_insn): New define_insn.
20470 * config/aarch64/iterators.md (UNSPEC_SADDLP, UNSPEC_UADDLP): Delete.
20472 (USADDLP): Likewise.
20473 * config/aarch64/predicates.md (vect_par_cnst_even_or_odd_half): Define.
20475 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
20477 * config/aarch64/aarch64-builtins.cc (VAR1): Move to after inclusion of
20478 aarch64-builtin-iterators.h. Add definition to remap shadd, uhadd,
20479 srhadd, urhadd builtin codes for standard optab ones.
20480 * config/aarch64/aarch64-simd.md (<u>avg<mode>3_floor): Rename to...
20481 (<su_optab>avg<mode>3_floor): ... This. Expand to RTL codes rather than
20483 (<u>avg<mode>3_ceil): Rename to...
20484 (<su_optab>avg<mode>3_ceil): ... This. Expand to RTL codes rather than
20486 (aarch64_<su>hsub<mode>): New define_expand.
20487 (aarch64_<sur>h<addsub><mode><vczle><vczbe>): Split into...
20488 (*aarch64_<su>h<ADDSUB:optab><mode><vczle><vczbe>_insn): ... This...
20489 (*aarch64_<su>rhadd<mode><vczle><vczbe>_insn): ... And this.
20491 2023-05-30 Andreas Schwab <schwab@suse.de>
20494 * config/riscv/riscv.cc (riscv_asan_shadow_offset): Update to
20495 match libsanitizer.
20497 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
20499 * config/aarch64/aarch64-modes.def (V16HI, V8SI, V4DI, V2TI): New modes.
20500 * config/aarch64/aarch64-protos.h (aarch64_const_vec_rnd_cst_p):
20502 (aarch64_const_vec_rsra_rnd_imm_p): Likewise.
20503 * config/aarch64/aarch64-simd.md (*aarch64_simd_sra<mode>): Rename to...
20504 (aarch64_<sra_op>sra_n<mode>_insn): ... This.
20505 (aarch64_<sra_op>rsra_n<mode>_insn): New define_insn.
20506 (aarch64_<sra_op>sra_n<mode>): New define_expand.
20507 (aarch64_<sra_op>rsra_n<mode>): Likewise.
20508 (aarch64_<sur>sra_n<mode>): Rename to...
20509 (aarch64_<sur>sra_ndi): ... This.
20510 * config/aarch64/aarch64.cc (aarch64_classify_vector_mode): Add
20511 any_target_p argument.
20512 (aarch64_extract_vec_duplicate_wide_int): Define.
20513 (aarch64_const_vec_rsra_rnd_imm_p): Likewise.
20514 (aarch64_const_vec_rnd_cst_p): Likewise.
20515 (aarch64_vector_mode_supported_any_target_p): Likewise.
20516 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Likewise.
20517 * config/aarch64/iterators.md (UNSPEC_SRSRA, UNSPEC_URSRA): Delete.
20518 (VSRA): Adjust for the above.
20520 (V2XWIDE): New mode_attr.
20521 (vec_or_offset): Likewise.
20522 (SHIFTEXTEND): Likewise.
20523 * config/aarch64/predicates.md (aarch64_simd_rsra_rnd_imm_vec): New
20525 * doc/tm.texi (TARGET_VECTOR_MODE_SUPPORTED_P): Adjust description to
20526 clarify that it applies to current target options.
20527 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Document.
20528 * doc/tm.texi.in: Regenerate.
20529 * stor-layout.cc (mode_for_vector): Check
20530 vector_mode_supported_any_target_p when iterating through vector modes.
20531 * target.def (TARGET_VECTOR_MODE_SUPPORTED_P): Adjust description to
20532 clarify that it applies to current target options.
20533 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Define.
20535 2023-05-30 Lili Cui <lili.cui@intel.com>
20537 PR tree-optimization/98350
20538 * tree-ssa-reassoc.cc
20539 (rewrite_expr_tree_parallel): Rewrite this function.
20540 (rank_ops_for_fma): New.
20541 (reassociate_bb): Handle new function.
20543 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
20545 * rtl.h (rtx_addr_can_trap_p): Change return type from int to bool.
20546 (rtx_unstable_p): Ditto.
20547 (reg_mentioned_p): Ditto.
20548 (reg_referenced_p): Ditto.
20549 (reg_used_between_p): Ditto.
20550 (reg_set_between_p): Ditto.
20551 (modified_between_p): Ditto.
20552 (no_labels_between_p): Ditto.
20553 (modified_in_p): Ditto.
20554 (reg_set_p): Ditto.
20555 (multiple_sets): Ditto.
20556 (set_noop_p): Ditto.
20557 (noop_move_p): Ditto.
20558 (reg_overlap_mentioned_p): Ditto.
20559 (dead_or_set_p): Ditto.
20560 (dead_or_set_regno_p): Ditto.
20561 (find_reg_fusage): Ditto.
20562 (find_regno_fusage): Ditto.
20563 (side_effects_p): Ditto.
20564 (volatile_refs_p): Ditto.
20565 (volatile_insn_p): Ditto.
20566 (may_trap_p_1): Ditto.
20567 (may_trap_p): Ditto.
20568 (may_trap_or_fault_p): Ditto.
20569 (computed_jump_p): Ditto.
20570 (auto_inc_p): Ditto.
20571 (loc_mentioned_in_p): Ditto.
20572 * rtlanal.cc (computed_jump_p_1): Adjust forward declaration.
20573 (rtx_unstable_p): Change return type from int to bool
20574 and adjust function body accordingly.
20575 (rtx_addr_can_trap_p): Ditto.
20576 (reg_mentioned_p): Ditto.
20577 (no_labels_between_p): Ditto.
20578 (reg_used_between_p): Ditto.
20579 (reg_referenced_p): Ditto.
20580 (reg_set_between_p): Ditto.
20581 (reg_set_p): Ditto.
20582 (modified_between_p): Ditto.
20583 (modified_in_p): Ditto.
20584 (multiple_sets): Ditto.
20585 (set_noop_p): Ditto.
20586 (noop_move_p): Ditto.
20587 (reg_overlap_mentioned_p): Ditto.
20588 (dead_or_set_p): Ditto.
20589 (dead_or_set_regno_p): Ditto.
20590 (find_reg_fusage): Ditto.
20591 (find_regno_fusage): Ditto.
20592 (remove_node_from_insn_list): Ditto.
20593 (volatile_insn_p): Ditto.
20594 (volatile_refs_p): Ditto.
20595 (side_effects_p): Ditto.
20596 (may_trap_p_1): Ditto.
20597 (may_trap_p): Ditto.
20598 (may_trap_or_fault_p): Ditto.
20599 (computed_jump_p): Ditto.
20600 (auto_inc_p): Ditto.
20601 (loc_mentioned_in_p): Ditto.
20602 * combine.cc (can_combine_p): Update indirect function.
20604 2023-05-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20606 * config/riscv/autovec.md (<optab><mode><vconvert>2): New pattern.
20607 * config/riscv/iterators.md: New attribute.
20608 * config/riscv/vector-iterators.md: New attribute.
20610 2023-05-30 From: Juzhe-Zhong <juzhe.zhong@rivai.ai>
20612 * config/riscv/riscv.md: Fix signed and unsigned comparison
20615 2023-05-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20617 * config/riscv/autovec.md (fnma<mode>4): New pattern.
20618 (*fnma<mode>): Ditto.
20620 2023-05-29 Die Li <lidie@eswincomputing.com>
20622 * config/riscv/riscv.cc (riscv_expand_conditional_move_onesided):
20624 (riscv_expand_conditional_move): Reuse the TARGET_SFB_ALU expand
20625 process for TARGET_XTHEADCONDMOV
20627 2023-05-29 Uros Bizjak <ubizjak@gmail.com>
20630 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2): Also require
20631 TARGET_AVX512BW to generate truncv16hiv16qi2.
20633 2023-05-29 Jivan Hakobyan <jivanhakobyan9@gmail.com>
20635 * config/riscv/riscv.md (and<mode>3): New expander.
20636 (*and<mode>3) New pattern.
20637 * config/riscv/predicates.md (arith_operand_or_mode_mask): New
20640 2023-05-29 Pan Li <pan2.li@intel.com>
20642 * config/riscv/riscv-v.cc (emit_vlmax_insn): Remove unnecessary
20643 comments and rename local variables.
20644 (emit_nonvlmax_insn): Diito.
20645 (emit_vlmax_merge_insn): Ditto.
20646 (emit_vlmax_cmp_insn): Ditto.
20647 (emit_vlmax_cmp_mu_insn): Ditto.
20648 (emit_scalar_move_insn): Ditto.
20650 2023-05-29 Pan Li <pan2.li@intel.com>
20652 * config/riscv/riscv-v.cc (emit_vlmax_insn): Eliminate the
20654 (emit_nonvlmax_insn): Ditto.
20655 (emit_vlmax_merge_insn): Ditto.
20656 (emit_vlmax_cmp_insn): Ditto.
20657 (emit_vlmax_cmp_mu_insn): Ditto.
20658 (expand_vec_series): Ditto.
20660 2023-05-29 Pan Li <pan2.li@intel.com>
20662 * config/riscv/riscv-protos.h (enum insn_type): New type.
20663 * config/riscv/riscv-v.cc (RVV_INSN_OPERANDS_MAX): New macro.
20664 (rvv_builder::can_duplicate_repeating_sequence_p): Align the referenced
20666 (rvv_builder::get_merged_repeating_sequence): Ditto.
20667 (rvv_builder::repeating_sequence_use_merge_profitable_p): New function
20668 to evaluate the optimization cost.
20669 (rvv_builder::get_merge_scalar_mask): New function to get the merge
20671 (emit_scalar_move_insn): New function to emit vmv.s.x.
20672 (emit_vlmax_integer_move_insn): New function to emit vlmax vmv.v.x.
20673 (emit_nonvlmax_integer_move_insn): New function to emit nonvlmax
20675 (get_repeating_sequence_dup_machine_mode): New function to get the dup
20677 (expand_vector_init_merge_repeating_sequence): New function to perform
20679 (expand_vec_init): Add this vector init optimization.
20680 * config/riscv/riscv.h (BITS_PER_WORD): New macro.
20682 2023-05-29 Eric Botcazou <ebotcazou@adacore.com>
20684 * tree-ssa-loop-manip.cc (create_iv): Try harder to find a SLOC to
20685 put onto the increment when it is inserted after the position.
20687 2023-05-29 Eric Botcazou <ebotcazou@adacore.com>
20689 * match.pd ((T)P - (T)(P + A) -> -(T) A): Avoid artificial overflow
20692 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20694 * config/riscv/riscv-vsetvl.cc (source_equal_p): Fix ICE.
20696 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20698 * config/riscv/autovec.md (fma<mode>4): New pattern.
20699 (*fma<mode>): Ditto.
20700 * config/riscv/riscv-protos.h (enum insn_type): New enum.
20701 (emit_vlmax_ternary_insn): New function.
20702 * config/riscv/riscv-v.cc (emit_vlmax_ternary_insn): Ditto.
20704 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20706 * config/riscv/vector.md: Fix vimuladd instruction bug.
20708 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20710 * config/riscv/riscv.cc (global_state_unknown_p): New function.
20711 (riscv_mode_after): Fix incorrect VXM.
20713 2023-05-29 Pan Li <pan2.li@intel.com>
20715 * common/config/riscv/riscv-common.cc:
20716 (riscv_implied_info): Add zvfhmin item.
20717 (riscv_ext_version_table): Ditto.
20718 (riscv_ext_flag_table): Ditto.
20719 * config/riscv/riscv-opts.h (MASK_ZVFHMIN): New macro.
20720 (TARGET_ZFHMIN): Align indent.
20721 (TARGET_ZFH): Ditto.
20722 (TARGET_ZVFHMIN): New macro.
20724 2023-05-27 liuhongt <hongtao.liu@intel.com>
20727 * config/i386/sse.md (*andnot<mode>3): Extend below splitter
20728 to VI_AVX2 to cover more modes.
20730 2023-05-27 liuhongt <hongtao.liu@intel.com>
20732 * config/i386/x86-tune.def (X86_TUNE_AVOID_FALSE_DEP_FOR_BMI):
20733 Remove ATOM and ICELAKE(and later) core processors.
20735 2023-05-26 Robin Dapp <rdapp@ventanamicro.com>
20737 * config/riscv/autovec.md (<optab><mode>2): Add vneg/vnot.
20739 * config/riscv/riscv-protos.h (emit_vlmax_masked_mu_insn):
20741 * config/riscv/riscv-v.cc (emit_vlmax_masked_mu_insn): New
20744 2023-05-26 Robin Dapp <rdapp@ventanamicro.com>
20745 Juzhe Zhong <juzhe.zhong@rivai.ai>
20747 * config/riscv/autovec.md (<optab><v_double_trunc><mode>2): New
20749 (<optab><v_quad_trunc><mode>2): Dito.
20750 (<optab><v_oct_trunc><mode>2): Dito.
20751 (trunc<mode><v_double_trunc>2): Dito.
20752 (trunc<mode><v_quad_trunc>2): Dito.
20753 (trunc<mode><v_oct_trunc>2): Dito.
20754 * config/riscv/riscv-protos.h (vectorize_related_mode): Define.
20755 (autovectorize_vector_modes): Define.
20756 * config/riscv/riscv-v.cc (vectorize_related_mode): Implement
20758 (autovectorize_vector_modes): Implement hook.
20759 * config/riscv/riscv.cc (riscv_autovectorize_vector_modes):
20760 Implement target hook.
20761 (riscv_vectorize_related_mode): Implement target hook.
20762 (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Define.
20763 (TARGET_VECTORIZE_RELATED_MODE): Define.
20764 * config/riscv/vector-iterators.md: Add lowercase versions of
20765 mode_attr iterators.
20767 2023-05-26 Andrew Stubbs <ams@codesourcery.com>
20768 Tobias Burnus <tobias@codesourcery.com>
20770 * config/gcn/gcn-hsa.h (XNACKOPT): New macro.
20771 (ASM_SPEC): Use XNACKOPT.
20772 * config/gcn/gcn-opts.h (enum sram_ecc_type): Rename to ...
20773 (enum hsaco_attr_type): ... this, and generalize the names.
20774 (TARGET_XNACK): New macro.
20775 * config/gcn/gcn.cc (gcn_option_override): Update to sorry for all
20777 (output_file_start): Update xnack handling.
20778 (gcn_hsa_declare_function_name): Use TARGET_XNACK.
20779 * config/gcn/gcn.opt (-mxnack): Add the "on/off/any" syntax.
20780 (sram_ecc_type): Rename to ...
20781 (hsaco_attr_type: ... this.)
20782 * config/gcn/mkoffload.cc (SET_XNACK_ANY): New macro.
20783 (TEST_XNACK): Delete.
20784 (TEST_XNACK_ANY): New macro.
20785 (TEST_XNACK_ON): New macro.
20786 (main): Support the new -mxnack=on/off/any syntax.
20787 * doc/invoke.texi (-mxnack): Update for new syntax.
20789 2023-05-26 Andrew Pinski <apinski@marvell.com>
20791 * genmatch.cc (emit_debug_printf): New function.
20792 (dt_simplify::gen_1): Emit printf into the code
20793 before the `return true` or returning the folded result
20794 instead of emitting it always.
20796 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
20798 * config/xtensa/xtensa-protos.h
20799 (xtensa_expand_block_set_unrolled_loop,
20800 xtensa_expand_block_set_small_loop): Remove.
20801 (xtensa_expand_block_set): New prototype.
20802 * config/xtensa/xtensa.cc
20803 (xtensa_expand_block_set_libcall): New subfunction.
20804 (xtensa_expand_block_set_unrolled_loop,
20805 xtensa_expand_block_set_small_loop): Rewrite as subfunctions.
20806 (xtensa_expand_block_set): New function that calls the above
20808 * config/xtensa/xtensa.md (memsetsi): Change to invoke only
20809 xtensa_expand_block_set().
20811 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
20813 * config/xtensa/xtensa-protos.h (xtensa_m1_or_1_thru_15):
20815 * config/xtensa/xtensa.cc (xtensa_m1_or_1_thru_15):
20817 * config/xtensa/constraints.md (O):
20818 Change to use the above function.
20819 * config/xtensa/xtensa.md (*subsi3_from_const):
20820 New insn_and_split pattern.
20822 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
20824 * config/xtensa/xtensa.md (*extzvsi-1bit_ashlsi3):
20825 Retract excessive line folding, and correct the value of
20826 the "length" insn attribute related to TARGET_DENSITY.
20827 (*extzvsi-1bit_addsubx): Ditto.
20829 2023-05-26 Uros Bizjak <ubizjak@gmail.com>
20831 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi):
20832 Do not disable call to ix86_expand_vecop_qihi2.
20834 2023-05-26 liuhongt <hongtao.liu@intel.com>
20838 * ira-costs.cc (scan_one_insn): Only use NO_REGS in cost
20839 calculation when !hard_regno_mode_ok for GENERAL_REGS and
20840 mode, otherwise still use GENERAL_REGS.
20842 2023-05-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20844 * config/riscv/riscv.cc (vector_zero_call_used_regs): Add
20845 explict VL and drop VL in ops.
20847 2023-05-25 Jin Ma <jinma@linux.alibaba.com>
20849 * sched-deps.cc (sched_macro_fuse_insns): Insns should not be fusion
20850 in different BB blocks.
20852 2023-05-25 Uros Bizjak <ubizjak@gmail.com>
20854 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
20855 Rewrite to expand to 2x-wider (e.g. V16QI -> V16HImode)
20856 instructions when available. Emulate truncation via
20857 ix86_expand_vec_perm_const_1 when native truncate insn
20859 (ix86_expand_vecop_qihi_partial) <case MULT>: Use pmovzx
20860 when available. Trivially rename some variables.
20861 (ix86_expand_vecop_qihi): Unconditionally call ix86_expand_vecop_qihi2.
20862 * config/i386/i386.cc (ix86_multiplication_cost): Rewrite cost
20863 calculation of V*QImode emulations to account for generation of
20864 2x-wider mode instructions.
20865 (ix86_shift_rotate_cost): Update cost calculation of V*QImode
20866 emulations to account for generation of 2x-wider mode instructions.
20868 2023-05-25 Georg-Johann Lay <avr@gjlay.de>
20871 * config/avr/avr.cc (avr_can_inline_p): New static function.
20872 (TARGET_CAN_INLINE_P): Define to that function.
20874 2023-05-25 Georg-Johann Lay <avr@gjlay.de>
20877 * config/avr/avr.md (*movbitqi.0): Rename to *movbit<mode>.0-6.
20878 Handle any bit position and use mode QISI.
20879 * config/avr/avr.cc (avr_rtx_costs_1) [IOR]: Return a cost
20880 of 2 insns for bit-transfer of respective style.
20882 2023-05-25 Christophe Lyon <christophe.lyon@linaro.org>
20884 * config/arm/iterators.md (MVE_6): Remove.
20885 * config/arm/mve.md: Replace MVE_6 with MVE_5.
20887 2023-05-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
20888 Richard Sandiford <richard.sandiford@arm.com>
20890 * tree-vect-loop-manip.cc (vect_adjust_loop_lens_control): New
20892 (vect_set_loop_controls_directly): Add decrement IV support.
20893 (vect_set_loop_condition_partial_vectors): Ditto.
20894 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): New
20896 * tree-vectorizer.h (LOOP_VINFO_USING_DECREMENTING_IV_P): New
20899 2023-05-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
20902 * config/aarch64/aarch64-simd.md (aarch64_fcadd<rot><mode>): Rename to...
20903 (aarch64_fcadd<rot><mode><vczle><vczbe>): ... This.
20904 Fix canonicalization of PLUS operands.
20905 (aarch64_fcmla<rot><mode>): Rename to...
20906 (aarch64_fcmla<rot><mode><vczle><vczbe>): ... This.
20907 Fix canonicalization of PLUS operands.
20908 (aarch64_fcmla_lane<rot><mode>): Rename to...
20909 (aarch64_fcmla_lane<rot><mode><vczle><vczbe>): ... This.
20910 Fix canonicalization of PLUS operands.
20911 (aarch64_fcmla_laneq<rot>v4hf): Rename to...
20912 (aarch64_fcmla_laneq<rot>v4hf<vczle><vczbe>): ... This.
20913 Fix canonicalization of PLUS operands.
20914 (aarch64_fcmlaq_lane<rot><mode>): Fix canonicalization of PLUS operands.
20916 2023-05-25 Chris Sidebottom <chris.sidebottom@arm.com>
20918 * config/arm/arm.md (rbitsi2): Rename to...
20919 (arm_rbit): ... This.
20920 (ctzsi2): Adjust for the above.
20921 (arm_rev16si2): Convert to define_expand.
20922 (arm_rev16si2_alt1): New pattern.
20923 (arm_rev16si2_alt): Rename to...
20924 (*arm_rev16si2_alt2): ... This.
20925 * config/arm/arm_acle.h (__ror, __rorl, __rorll, __clz, __clzl, __clzll,
20926 __cls, __clsl, __clsll, __revsh, __rev, __revl, __revll, __rev16,
20927 __rev16l, __rev16ll, __rbit, __rbitl, __rbitll): Define intrinsics.
20928 * config/arm/arm_acle_builtins.def (rbit, rev16si2): Define builtins.
20930 2023-05-25 Alex Coplan <alex.coplan@arm.com>
20933 * config/arm/arm.md (movdf): Generate temporary pseudo in DImode
20935 * config/arm/vfp.md (no_literal_pool_df_immediate): Rather than punning an
20936 lvalue DFmode pseudo into DImode, use a DImode pseudo and pun it into
20937 DFmode as an rvalue.
20939 2023-05-25 Richard Biener <rguenther@suse.de>
20942 * tree-vect-stmts.cc (vectorizable_condition): For
20943 embedded comparisons also handle the case when the target
20944 only provides vec_cmp and vcond_mask.
20946 2023-05-25 Claudiu Zissulescu <claziss@gmail.com>
20948 * config/arc/arc.cc (arc_call_tls_get_addr): Simplify access using
20951 2023-05-25 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
20953 * config/aarch64/aarch64.cc (scalar_move_insn_p): New function.
20954 (seq_cost_ignoring_scalar_moves): Likewise.
20955 (aarch64_expand_vector_init): Call seq_cost_ignoring_scalar_moves.
20957 2023-05-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
20959 * config/aarch64/arm_neon.h (vcage_f64): Reimplement with builtins.
20960 (vcage_f32): Likewise.
20961 (vcages_f32): Likewise.
20962 (vcageq_f32): Likewise.
20963 (vcaged_f64): Likewise.
20964 (vcageq_f64): Likewise.
20965 (vcagts_f32): Likewise.
20966 (vcagt_f32): Likewise.
20967 (vcagt_f64): Likewise.
20968 (vcagtq_f32): Likewise.
20969 (vcagtd_f64): Likewise.
20970 (vcagtq_f64): Likewise.
20971 (vcale_f32): Likewise.
20972 (vcale_f64): Likewise.
20973 (vcaled_f64): Likewise.
20974 (vcales_f32): Likewise.
20975 (vcaleq_f32): Likewise.
20976 (vcaleq_f64): Likewise.
20977 (vcalt_f32): Likewise.
20978 (vcalt_f64): Likewise.
20979 (vcaltd_f64): Likewise.
20980 (vcaltq_f32): Likewise.
20981 (vcaltq_f64): Likewise.
20982 (vcalts_f32): Likewise.
20984 2023-05-25 Hu, Lin1 <lin1.hu@intel.com>
20988 * config/i386/avx512bwintrin.h (_mm512_srli_epi16): Change type from
20989 int to const int or const int to const unsigned int.
20990 (_mm512_mask_srli_epi16): Ditto.
20991 (_mm512_slli_epi16): Ditto.
20992 (_mm512_mask_slli_epi16): Ditto.
20993 (_mm512_maskz_slli_epi16): Ditto.
20994 (_mm512_srai_epi16): Ditto.
20995 (_mm512_mask_srai_epi16): Ditto.
20996 (_mm512_maskz_srai_epi16): Ditto.
20997 * config/i386/avx512fintrin.h (_mm512_slli_epi64): Ditto.
20998 (_mm512_mask_slli_epi64): Ditto.
20999 (_mm512_maskz_slli_epi64): Ditto.
21000 (_mm512_srli_epi64): Ditto.
21001 (_mm512_mask_srli_epi64): Ditto.
21002 (_mm512_maskz_srli_epi64): Ditto.
21003 (_mm512_srai_epi64): Ditto.
21004 (_mm512_mask_srai_epi64): Ditto.
21005 (_mm512_maskz_srai_epi64): Ditto.
21006 (_mm512_slli_epi32): Ditto.
21007 (_mm512_mask_slli_epi32): Ditto.
21008 (_mm512_maskz_slli_epi32): Ditto.
21009 (_mm512_srli_epi32): Ditto.
21010 (_mm512_mask_srli_epi32): Ditto.
21011 (_mm512_maskz_srli_epi32): Ditto.
21012 (_mm512_srai_epi32): Ditto.
21013 (_mm512_mask_srai_epi32): Ditto.
21014 (_mm512_maskz_srai_epi32): Ditto.
21015 * config/i386/avx512vlbwintrin.h (_mm256_mask_srai_epi16): Ditto.
21016 (_mm256_maskz_srai_epi16): Ditto.
21017 (_mm_mask_srai_epi16): Ditto.
21018 (_mm_maskz_srai_epi16): Ditto.
21019 (_mm256_mask_slli_epi16): Ditto.
21020 (_mm256_maskz_slli_epi16): Ditto.
21021 (_mm_mask_slli_epi16): Ditto.
21022 (_mm_maskz_slli_epi16): Ditto.
21023 (_mm_maskz_srli_epi16): Ditto.
21024 * config/i386/avx512vlintrin.h (_mm256_mask_srli_epi32): Ditto.
21025 (_mm256_maskz_srli_epi32): Ditto.
21026 (_mm_mask_srli_epi32): Ditto.
21027 (_mm_maskz_srli_epi32): Ditto.
21028 (_mm256_mask_srli_epi64): Ditto.
21029 (_mm256_maskz_srli_epi64): Ditto.
21030 (_mm_mask_srli_epi64): Ditto.
21031 (_mm_maskz_srli_epi64): Ditto.
21032 (_mm256_mask_srai_epi32): Ditto.
21033 (_mm256_maskz_srai_epi32): Ditto.
21034 (_mm_mask_srai_epi32): Ditto.
21035 (_mm_maskz_srai_epi32): Ditto.
21036 (_mm256_srai_epi64): Ditto.
21037 (_mm256_mask_srai_epi64): Ditto.
21038 (_mm256_maskz_srai_epi64): Ditto.
21039 (_mm_srai_epi64): Ditto.
21040 (_mm_mask_srai_epi64): Ditto.
21041 (_mm_maskz_srai_epi64): Ditto.
21042 (_mm_mask_slli_epi32): Ditto.
21043 (_mm_maskz_slli_epi32): Ditto.
21044 (_mm_mask_slli_epi64): Ditto.
21045 (_mm_maskz_slli_epi64): Ditto.
21046 (_mm256_mask_slli_epi32): Ditto.
21047 (_mm256_maskz_slli_epi32): Ditto.
21048 (_mm256_mask_slli_epi64): Ditto.
21049 (_mm256_maskz_slli_epi64): Ditto.
21051 2023-05-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21053 * config/riscv/vector.md: Remove FRM_REGNUM dependency in rtz
21056 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
21058 * data-streamer-in.cc (streamer_read_value_range): Handle NANs.
21059 * data-streamer-out.cc (streamer_write_vrange): Same.
21060 * value-range.h (class vrange): Make streamer_write_vrange a friend.
21062 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
21064 * value-query.cc (range_query::get_tree_range): Set NAN directly
21066 * value-range.cc (frange::set): Assert that bounds are not NAN.
21068 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
21070 * value-range.cc (add_vrange): Handle known NANs.
21072 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
21074 * value-range.h (frange::set_nan): New.
21076 2023-05-25 Alexandre Oliva <oliva@adacore.com>
21079 * emit-rtl.cc (validate_subreg): Reject a SUBREG of a MEM that
21080 requires stricter alignment than MEM's.
21082 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
21084 PR tree-optimization/107822
21085 PR tree-optimization/107986
21086 * Makefile.in (OBJS): Add gimple-range-phi.o.
21087 * gimple-range-cache.h (ranger_cache::m_estimate): New
21088 phi_analyzer pointer member.
21089 * gimple-range-fold.cc (fold_using_range::range_of_phi): Use
21090 phi_analyzer if no loop info is available.
21091 * gimple-range-phi.cc: New file.
21092 * gimple-range-phi.h: New file.
21093 * tree-vrp.cc (execute_ranger_vrp): Utililze a phi_analyzer.
21095 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
21097 * gimple-range-fold.cc (fur_list::fur_list): Add range_query param
21099 (fold_range): Add range_query parameter.
21100 (fur_relation::fur_relation): New.
21101 (fur_relation::trio): New.
21102 (fur_relation::register_relation): New.
21103 (fold_relations): New.
21104 * gimple-range-fold.h (fold_range): Adjust prototypes.
21105 (fold_relations): New.
21107 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
21109 * gimple-range-cache.cc (ssa_cache::range_of_expr): New.
21110 * gimple-range-cache.h (class ssa_cache): Inherit from range_query.
21111 (ranger_cache::const_query): New.
21112 * gimple-range.cc (gimple_ranger::const_query): New.
21113 * gimple-range.h (gimple_ranger::const_query): New prototype.
21115 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
21117 * gimple-range-cache.cc (ssa_cache::dump): Use get_range.
21118 (ssa_cache::dump_range_query): Delete.
21119 (ssa_lazy_cache::dump_range_query): Delete.
21120 (ssa_lazy_cache::get_range): Move from header file.
21121 (ssa_lazy_cache::clear_range): ditto.
21122 (ssa_lazy_cache::clear): Ditto.
21123 * gimple-range-cache.h (class ssa_cache): Virtualize.
21124 (class ssa_lazy_cache): Inherit and virtualize.
21126 2023-05-24 Aldy Hernandez <aldyh@redhat.com>
21128 * value-range.h (vrange::kind): Remove.
21130 2023-05-24 Roger Sayle <roger@nextmovesoftware.com>
21132 PR middle-end/109840
21133 * match.pd <popcount optimizations>: Preserve zero-extension when
21134 optimizing popcount((T)bswap(x)) and popcount((T)rotate(x,y)) as
21135 popcount((T)x), so the popcount's argument keeps the same type.
21136 <parity optimizations>: Likewise preserve extensions when
21137 simplifying parity((T)bswap(x)) and parity((T)rotate(x,y)) as
21138 parity((T)x), so that the parity's argument type is the same.
21140 2023-05-24 Aldy Hernandez <aldyh@redhat.com>
21142 * ipa-cp.cc (ipa_value_range_from_jfunc): Use new ipa_vr API.
21143 (ipcp_store_vr_results): Same.
21144 * ipa-prop.cc (ipa_vr::ipa_vr): New.
21145 (ipa_vr::get_vrange): New.
21146 (ipa_vr::set_unknown): New.
21147 (ipa_vr::streamer_read): New.
21148 (ipa_vr::streamer_write): New.
21149 (write_ipcp_transformation_info): Use new ipa_vr API.
21150 (read_ipcp_transformation_info): Same.
21151 (ipa_vr::nonzero_p): Delete.
21152 (ipcp_update_vr): Use new ipa_vr API.
21153 * ipa-prop.h (class ipa_vr): Provide an API and hide internals.
21154 * ipa-sra.cc (zap_useless_ipcp_results): Use new ipa_vr API.
21156 2023-05-24 Jan-Benedict Glaw <jbglaw@lug-owl.de>
21158 * config/mcore/mcore.cc (output_inline_const) Make buffer smaller to
21159 silence overflow warnings later on.
21161 2023-05-24 Uros Bizjak <ubizjak@gmail.com>
21163 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
21164 Remove handling of V8QImode.
21165 * config/i386/mmx.md (v<insn>v8qi3): Move from sse.md.
21166 Call ix86_expand_vecop_qihi_partial. Enable for TARGET_MMX_WITH_SSE.
21167 (v<insn>v4qi3): Ditto.
21168 * config/i386/sse.md (v<insn>v8qi3): Remove.
21170 2023-05-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
21173 * config/aarch64/aarch64-simd.md (aarch64_simd_lshr<mode>): Rename to...
21174 (aarch64_simd_lshr<mode><vczle><vczbe>): ... This.
21175 (aarch64_simd_ashr<mode>): Rename to...
21176 (aarch64_simd_ashr<mode><vczle><vczbe>): ... This.
21177 (aarch64_simd_imm_shl<mode>): Rename to...
21178 (aarch64_simd_imm_shl<mode><vczle><vczbe>): ... This.
21179 (aarch64_simd_reg_sshl<mode>): Rename to...
21180 (aarch64_simd_reg_sshl<mode><vczle><vczbe>): ... This.
21181 (aarch64_simd_reg_shl<mode>_unsigned): Rename to...
21182 (aarch64_simd_reg_shl<mode>_unsigned<vczle><vczbe>): ... This.
21183 (aarch64_simd_reg_shl<mode>_signed): Rename to...
21184 (aarch64_simd_reg_shl<mode>_signed<vczle><vczbe>): ... This.
21185 (vec_shr_<mode>): Rename to...
21186 (vec_shr_<mode><vczle><vczbe>): ... This.
21187 (aarch64_<sur>shl<mode>): Rename to...
21188 (aarch64_<sur>shl<mode><vczle><vczbe>): ... This.
21189 (aarch64_<sur>q<r>shl<mode>): Rename to...
21190 (aarch64_<sur>q<r>shl<mode><vczle><vczbe>): ... This.
21192 2023-05-24 Richard Biener <rguenther@suse.de>
21195 * config/i386/i386-expand.cc (ix86_expand_vector_init_general):
21196 Perform final vector composition using
21197 ix86_expand_vector_init_general instead of setting
21198 the highpart and lowpart which causes spilling.
21200 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
21202 PR tree-optimization/109695
21203 * gimple-range-cache.cc (ranger_cache::get_global_range): Add
21205 * gimple-range-cache.h (ranger_cache::get_global_range): Ditto.
21206 * gimple-range.cc (gimple_ranger::range_of_stmt): Pass changed
21207 flag to set_global_range.
21208 (gimple_ranger::prefill_stmt_dependencies): Ditto.
21210 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
21212 PR tree-optimization/109695
21213 * gimple-range-cache.cc (temporal_cache::temporal_value): Return
21215 (temporal_cache::current_p): Check always_current method.
21216 (temporal_cache::set_always_current): Add param and set value
21218 (temporal_cache::always_current_p): New.
21219 (ranger_cache::get_global_range): Adjust.
21220 (ranger_cache::set_global_range): set always current first.
21222 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
21224 PR tree-optimization/109695
21225 * gimple-range-cache.cc (ranger_cache::get_global_range): Call
21226 fold_range with global query to choose an initial value.
21228 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21230 * config/riscv/riscv-protos.h (enum frm_field_enum): Add FRM_
21233 2023-05-24 Richard Biener <rguenther@suse.de>
21235 PR tree-optimization/109849
21236 * tree-ssa-pre.cc (do_hoist_insertion): Do not intersect
21237 expressions but take the first sets.
21239 2023-05-24 Gaius Mulley <gaiusmod2@gmail.com>
21242 * doc/gm2.texi (High procedure function): New node.
21243 (Using): New menu entry for High procedure function.
21245 2023-05-24 Richard Sandiford <richard.sandiford@arm.com>
21247 PR rtl-optimization/109940
21248 * early-remat.cc (postorder_index): Rename to...
21249 (rpo_index): ...this.
21250 (compare_candidates): Sort by decreasing rpo_index rather than
21251 increasing postorder_index.
21252 (early_remat::sort_candidates): Calculate the forward RPO from
21254 (early_remat::local_phase): Follow forward RPO using DF_FORWARD,
21255 rather than DF_BACKWARD in reverse.
21257 2023-05-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
21260 * config/arm/arm-builtins.cc (SAT_BINOP_UNSIGNED_IMM_QUALIFIERS): Use
21261 qualifier_none for the return operand.
21263 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21265 * config/riscv/autovec.md (<optab><mode>3): New pattern.
21266 (one_cmpl<mode>2): Ditto.
21267 (*<optab>not<mode>): Ditto.
21268 (*n<optab><mode>): Ditto.
21269 * config/riscv/riscv-v.cc (expand_vec_cmp_float): Change to
21272 2023-05-24 Kewen Lin <linkw@linux.ibm.com>
21274 * tree-vect-slp.cc (vect_transform_slp_perm_load_1): Adjust the
21275 calculation on n_perms by considering nvectors_per_build.
21277 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21278 Richard Sandiford <richard.sandiford@arm.com>
21280 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): New pattern.
21281 (vec_cmp<mode><vm>): New pattern.
21282 (vec_cmpu<mode><vm>): New pattern.
21283 (vcond<V:mode><VI:mode>): New pattern.
21284 (vcondu<V:mode><VI:mode>): New pattern.
21285 * config/riscv/riscv-protos.h (enum insn_type): Add new enum.
21286 (emit_vlmax_merge_insn): New function.
21287 (emit_vlmax_cmp_insn): Ditto.
21288 (emit_vlmax_cmp_mu_insn): Ditto.
21289 (expand_vec_cmp): Ditto.
21290 (expand_vec_cmp_float): Ditto.
21291 (expand_vcond): Ditto.
21292 * config/riscv/riscv-v.cc (emit_vlmax_merge_insn): Ditto.
21293 (emit_vlmax_cmp_insn): Ditto.
21294 (emit_vlmax_cmp_mu_insn): Ditto.
21295 (get_cmp_insn_code): Ditto.
21296 (expand_vec_cmp): Ditto.
21297 (expand_vec_cmp_float): Ditto.
21298 (expand_vcond): Ditto.
21300 2023-05-24 Pan Li <pan2.li@intel.com>
21302 * config/riscv/genrvv-type-indexer.cc (main): Add
21303 unsigned_eew*_lmul1_interpret for indexer.
21304 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
21305 Register vuint*m1_t interpret function.
21306 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_UNSIGNED_EEW8_LMUL1_INTERPRET_OPS):
21307 New macro for vuint8m1_t.
21308 (DEF_RVV_UNSIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
21309 (DEF_RVV_UNSIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
21310 (DEF_RVV_UNSIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
21311 (vbool1_t): Add to unsigned_eew*_interpret_ops.
21312 (vbool2_t): Likewise.
21313 (vbool4_t): Likewise.
21314 (vbool8_t): Likewise.
21315 (vbool16_t): Likewise.
21316 (vbool32_t): Likewise.
21317 (vbool64_t): Likewise.
21318 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_UNSIGNED_EEW8_LMUL1_INTERPRET_OPS):
21319 New macro for vuint*m1_t.
21320 (DEF_RVV_UNSIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
21321 (DEF_RVV_UNSIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
21322 (DEF_RVV_UNSIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
21323 (required_extensions_p): Add vuint*m1_t interpret case.
21324 * config/riscv/riscv-vector-builtins.def (unsigned_eew8_lmul1_interpret):
21325 Add vuint*m1_t interpret to base type.
21326 (unsigned_eew16_lmul1_interpret): Likewise.
21327 (unsigned_eew32_lmul1_interpret): Likewise.
21328 (unsigned_eew64_lmul1_interpret): Likewise.
21330 2023-05-24 Pan Li <pan2.li@intel.com>
21332 * config/riscv/genrvv-type-indexer.cc (EEW_SIZE_LIST): New macro
21333 for the eew size list.
21334 (LMUL1_LOG2): New macro for the log2 value of lmul=1.
21335 (main): Add signed_eew*_lmul1_interpret for indexer.
21336 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
21337 Register vint*m1_t interpret function.
21338 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_SIGNED_EEW8_LMUL1_INTERPRET_OPS):
21339 New macro for vint8m1_t.
21340 (DEF_RVV_SIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
21341 (DEF_RVV_SIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
21342 (DEF_RVV_SIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
21343 (vbool1_t): Add to signed_eew*_interpret_ops.
21344 (vbool2_t): Likewise.
21345 (vbool4_t): Likewise.
21346 (vbool8_t): Likewise.
21347 (vbool16_t): Likewise.
21348 (vbool32_t): Likewise.
21349 (vbool64_t): Likewise.
21350 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_SIGNED_EEW8_LMUL1_INTERPRET_OPS):
21351 New macro for vint*m1_t.
21352 (DEF_RVV_SIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
21353 (DEF_RVV_SIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
21354 (DEF_RVV_SIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
21355 (required_extensions_p): Add vint8m1_t interpret case.
21356 * config/riscv/riscv-vector-builtins.def (signed_eew8_lmul1_interpret):
21357 Add vint*m1_t interpret to base type.
21358 (signed_eew16_lmul1_interpret): Likewise.
21359 (signed_eew32_lmul1_interpret): Likewise.
21360 (signed_eew64_lmul1_interpret): Likewise.
21362 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21364 * config/riscv/autovec.md: Adjust for new interface.
21365 * config/riscv/riscv-protos.h (emit_vlmax_insn): Add VL operand.
21366 (emit_nonvlmax_insn): Add AVL operand.
21367 * config/riscv/riscv-v.cc (emit_vlmax_insn): Add VL operand.
21368 (emit_nonvlmax_insn): Add AVL operand.
21369 (sew64_scalar_helper): Adjust for new interface.
21370 (expand_tuple_move): Ditto.
21371 * config/riscv/vector.md: Ditto.
21373 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21375 * config/riscv/riscv-v.cc (expand_vec_series): Remove magic number.
21376 (expand_const_vector): Ditto.
21377 (legitimize_move): Ditto.
21378 (sew64_scalar_helper): Ditto.
21379 (expand_tuple_move): Ditto.
21380 (expand_vector_init_insert_elems): Ditto.
21381 * config/riscv/riscv.cc (vector_zero_call_used_regs): Ditto.
21383 2023-05-24 liuhongt <hongtao.liu@intel.com>
21386 * config/i386/i386.cc (ix86_gimple_fold_builtin): Fold
21387 _mm{,256,512}_abs_{epi8,epi16,epi32,epi64} and
21388 _mm_abs_{pi8,pi16,pi32} into gimple ABS_EXPR.
21389 (ix86_masked_all_ones): Handle 64-bit mask.
21390 * config/i386/i386-builtin.def: Replace icode of related
21391 non-mask simd abs builtins with CODE_FOR_nothing.
21393 2023-05-23 Martin Uecker <uecker@tugraz.at>
21396 * function.cc (gimplify_parm_type): Remove function.
21397 (gimplify_parameters): Call gimplify_type_sizes.
21399 2023-05-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
21401 * config/xtensa/xtensa.md (*addsubx): Rename from '*addx',
21402 and change to also accept '*subx' pattern.
21405 2023-05-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
21407 * config/xtensa/predicates.md (addsub_operator): New.
21408 * config/xtensa/xtensa.md (*extzvsi-1bit_ashlsi3,
21409 *extzvsi-1bit_addsubx): New insn_and_split patterns.
21410 * config/xtensa/xtensa.cc (xtensa_rtx_costs):
21411 Add a special case about ifcvt 'noce_try_cmove()' to handle
21412 constant loads that do not fit into signed 12 bits in the
21413 patterns added above.
21415 2023-05-23 Richard Biener <rguenther@suse.de>
21417 PR tree-optimization/109747
21418 * tree-vect-slp.cc (vect_prologue_cost_for_slp): Pass down
21419 the SLP node only once to the cost hook.
21421 2023-05-23 Georg-Johann Lay <avr@gjlay.de>
21423 * config/avr/avr.cc (avr_insn_cost): New static function.
21424 (TARGET_INSN_COST): Define to that function.
21426 2023-05-23 Richard Biener <rguenther@suse.de>
21429 * config/i386/i386.cc (ix86_vector_costs::add_stmt_cost):
21430 For vector construction or splats apply GPR->XMM move
21431 costing. QImode memory can be handled directly only
21432 with SSE4.1 pinsrb.
21434 2023-05-23 Richard Biener <rguenther@suse.de>
21436 PR tree-optimization/108752
21437 * tree-vect-stmts.cc (vectorizable_operation): For bit
21438 operations with generic word_mode vectors do not cost
21439 an extra stmt. For plus, minus and negate also cost the
21440 constant materialization.
21442 2023-05-23 Uros Bizjak <ubizjak@gmail.com>
21444 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi_partial):
21445 Call ix86_expand_vec_shift_qihi_constant for shifts
21446 with constant count operand.
21447 * config/i386/i386.cc (ix86_shift_rotate_cost):
21448 Handle V4QImode and V8QImode.
21449 * config/i386/mmx.md (<insn>v8qi3): New insn pattern.
21450 (<insn>v4qi3): Ditto.
21452 2023-05-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21454 * config/riscv/vector.md: Add mode.
21456 2023-05-23 Aldy Hernandez <aldyh@redhat.com>
21458 PR tree-optimization/109934
21459 * value-range.cc (irange::invert): Remove buggy special case.
21461 2023-05-23 Richard Biener <rguenther@suse.de>
21463 * tree-ssa-pre.cc (compute_antic_aux): Dump the correct
21466 2023-05-23 Richard Sandiford <richard.sandiford@arm.com>
21469 * config/aarch64/aarch64.cc (aarch64_modes_tieable_p): Allow
21470 subregs between any scalars that are 64 bits or smaller.
21471 * config/aarch64/iterators.md (SUBDI_BITS): New int iterator.
21472 (bits_etype): New int attribute.
21473 * config/aarch64/aarch64.md (*insv_reg<mode>_<SUBDI_BITS>)
21474 (*aarch64_bfi<GPI:mode><ALLX:mode>_<SUBDI_BITS>): New patterns.
21475 (*aarch64_bfidi<ALLX:mode>_subreg_<SUBDI_BITS>): Likewise.
21477 2023-05-23 Richard Sandiford <richard.sandiford@arm.com>
21479 * doc/md.texi: Document that <FOO> can be used to refer to the
21480 numerical value of an int iterator FOO. Tweak other parts of
21481 the int iterator documentation.
21482 * read-rtl.cc (iterator_group::has_self_attr): New field.
21483 (map_attr_string): When has_self_attr is true, make <FOO>
21484 expand to the current value of iterator FOO.
21485 (initialize_iterators): Set has_self_attr for int iterators.
21487 2023-05-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21489 * config/riscv/autovec.md: Refactor the framework of RVV auto-vectorization.
21490 * config/riscv/riscv-protos.h (RVV_MISC_OP_NUM): Ditto.
21491 (RVV_UNOP_NUM): New macro.
21492 (RVV_BINOP_NUM): Ditto.
21493 (legitimize_move): Refactor the framework of RVV auto-vectorization.
21494 (emit_vlmax_op): Ditto.
21495 (emit_vlmax_reg_op): Ditto.
21496 (emit_len_op): Ditto.
21497 (emit_len_binop): Ditto.
21498 (emit_vlmax_tany_many): Ditto.
21499 (emit_nonvlmax_tany_many): Ditto.
21500 (sew64_scalar_helper): Ditto.
21501 (expand_tuple_move): Ditto.
21502 * config/riscv/riscv-v.cc (emit_pred_op): Ditto.
21503 (emit_pred_binop): Ditto.
21504 (emit_vlmax_op): Ditto.
21505 (emit_vlmax_tany_many): New function.
21506 (emit_len_op): Remove.
21507 (emit_nonvlmax_tany_many): New function.
21508 (emit_vlmax_reg_op): Remove.
21509 (emit_len_binop): Ditto.
21510 (emit_index_op): Ditto.
21511 (expand_vec_series): Refactor the framework of RVV auto-vectorization.
21512 (expand_const_vector): Ditto.
21513 (legitimize_move): Ditto.
21514 (sew64_scalar_helper): Ditto.
21515 (expand_tuple_move): Ditto.
21516 (expand_vector_init_insert_elems): Ditto.
21517 * config/riscv/riscv.cc (vector_zero_call_used_regs): Ditto.
21518 * config/riscv/vector.md: Ditto.
21520 2023-05-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
21523 * config/aarch64/aarch64-simd.md (add_vec_concat_subst_le): Add predicate
21524 and constraint for operand 0.
21525 (add_vec_concat_subst_be): Likewise.
21527 2023-05-23 Richard Biener <rguenther@suse.de>
21529 PR tree-optimization/109849
21530 * tree-ssa-pre.cc (do_hoist_insertion): Compute ANTIC_OUT
21531 and use that to determine what to hoist.
21533 2023-05-23 Eric Botcazou <ebotcazou@adacore.com>
21535 * fold-const.cc (native_encode_initializer) <CONSTRUCTOR>: Apply the
21536 specific treatment for bit-fields only if they have an integral type
21537 and filter out non-integral bit-fields that do not start and end on
21540 2023-05-23 Aldy Hernandez <aldyh@redhat.com>
21542 PR tree-optimization/109920
21543 * value-range.h (RESIZABLE>::~int_range): Use delete[].
21545 2023-05-22 Uros Bizjak <ubizjak@gmail.com>
21547 * config/i386/i386.cc (ix86_shift_rotate_cost): Correct
21548 calcuation of integer vector mode costs to reflect generated
21549 instruction sequences of different integer vector modes and
21550 different target ABIs. Remove "speed" function argument.
21551 (ix86_rtx_costs): Update call for removed function argument.
21552 (ix86_vector_costs::add_stmt_cost): Ditto.
21554 2023-05-22 Aldy Hernandez <aldyh@redhat.com>
21556 * value-range.h (class Value_Range): Implement set_zero,
21557 set_nonzero, and nonzero_p.
21559 2023-05-22 Uros Bizjak <ubizjak@gmail.com>
21561 * config/i386/i386.cc (ix86_multiplication_cost): Add
21562 the cost of a memory read to the cost of V?QImode sequences.
21564 2023-05-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21566 * config/riscv/riscv-v.cc: Add "m_" prefix.
21568 2023-05-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
21570 * tree-vect-loop.cc (vect_get_loop_len): Fix issue for
21571 multiple-rgroup of length.
21572 * tree-vect-stmts.cc (vectorizable_store): Ditto.
21573 (vectorizable_load): Ditto.
21574 * tree-vectorizer.h (vect_get_loop_len): Ditto.
21576 2023-05-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21578 * config/riscv/riscv.cc (riscv_const_insns): Reorganize the
21581 2023-05-22 Kewen Lin <linkw@linux.ibm.com>
21583 * tree-vect-slp.cc (vect_transform_slp_perm_load_1): Refactor the
21584 handling for the case index == count.
21586 2023-05-21 Georg-Johann Lay <avr@gjlay.de>
21589 * config/avr/avr.cc (avr_fold_builtin) [AVR_BUILTIN_INSERT_BITS]:
21590 Don't fold to XOR / AND / XOR if just one bit is copied to the
21593 2023-05-21 Roger Sayle <roger@nextmovesoftware.com>
21595 * config/nvptx/nvptx.cc (nvptx_expand_brev): Expand target
21596 builtin for bit reversal using brev instruction.
21597 (enum nvptx_builtins): Add NVPTX_BUILTIN_BREV and
21598 NVPTX_BUILTIN_BREVLL.
21599 (nvptx_init_builtins): Define "brev" and "brevll".
21600 (nvptx_expand_builtin): Expand NVPTX_BUILTIN_BREV and
21601 NVPTX_BUILTIN_BREVLL via nvptx_expand_brev function.
21602 * doc/extend.texi (Nvidia PTX Builtin-in Functions): New
21603 section, document __builtin_nvptx_brev{,ll}.
21605 2023-05-21 Jakub Jelinek <jakub@redhat.com>
21607 PR tree-optimization/109505
21608 * match.pd ((x | CST1) & CST2 -> (x & CST2) | (CST1 & CST2),
21609 Combine successive equal operations with constants,
21610 (A +- CST1) +- CST2 -> A + CST3, (CST1 - A) +- CST2 -> CST3 - A,
21611 CST1 - (CST2 - A) -> CST3 + A): Use ! on ops with 2 CONSTANT_CLASS_P
21614 2023-05-21 Andrew Pinski <apinski@marvell.com>
21616 * expr.cc (expand_single_bit_test): Correct bitpos for big-endian.
21618 2023-05-21 Pan Li <pan2.li@intel.com>
21620 * config/riscv/genrvv-type-indexer.cc (BOOL_SIZE_LIST): Add the
21621 rest bool size, aka 2, 4, 8, 16, 32, 64.
21622 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
21623 Register vbool[2|4|8|16|32|64] interpret function.
21624 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_BOOL2_INTERPRET_OPS):
21625 New macro for vbool2_t.
21626 (DEF_RVV_BOOL4_INTERPRET_OPS): Likewise.
21627 (DEF_RVV_BOOL8_INTERPRET_OPS): Likewise.
21628 (DEF_RVV_BOOL16_INTERPRET_OPS): Likewise.
21629 (DEF_RVV_BOOL32_INTERPRET_OPS): Likewise.
21630 (DEF_RVV_BOOL64_INTERPRET_OPS): Likewise.
21631 (vint8m1_t): Add the type to bool[2|4|8|16|32|64]_interpret_ops.
21632 (vint16m1_t): Likewise.
21633 (vint32m1_t): Likewise.
21634 (vint64m1_t): Likewise.
21635 (vuint8m1_t): Likewise.
21636 (vuint16m1_t): Likewise.
21637 (vuint32m1_t): Likewise.
21638 (vuint64m1_t): Likewise.
21639 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_BOOL2_INTERPRET_OPS):
21640 New macro for vbool2_t.
21641 (DEF_RVV_BOOL4_INTERPRET_OPS): Likewise.
21642 (DEF_RVV_BOOL8_INTERPRET_OPS): Likewise.
21643 (DEF_RVV_BOOL16_INTERPRET_OPS): Likewise.
21644 (DEF_RVV_BOOL32_INTERPRET_OPS): Likewise.
21645 (DEF_RVV_BOOL64_INTERPRET_OPS): Likewise.
21646 (required_extensions_p): Add vbool[2|4|8|16|32|64] interpret case.
21647 * config/riscv/riscv-vector-builtins.def (bool2_interpret): Add
21648 vbool2_t interprect to base type.
21649 (bool4_interpret): Likewise.
21650 (bool8_interpret): Likewise.
21651 (bool16_interpret): Likewise.
21652 (bool32_interpret): Likewise.
21653 (bool64_interpret): Likewise.
21655 2023-05-21 Andrew Pinski <apinski@marvell.com>
21657 PR middle-end/109919
21658 * expr.cc (expand_single_bit_test): Don't use the
21659 target for expand_expr.
21661 2023-05-20 Gerald Pfeifer <gerald@pfeifer.com>
21663 * doc/install.texi (Specific): Remove de facto empty alpha*-*-*
21666 2023-05-20 Pan Li <pan2.li@intel.com>
21668 * mode-switching.cc (entity_map): Initialize the array to zero.
21671 2023-05-20 Triffid Hunter <triffid.hunter@gmail.com>
21674 * config/avr/avr.md (divmodpsi, udivmodpsi, divmodsi, udivmodsi):
21675 Remove superfluous "parallel" in insn pattern.
21676 ([u]divmod<mode>4): Tidy code. Use gcc_unreachable() instead of
21677 printing error text to assembly.
21679 2023-05-20 Andrew Pinski <apinski@marvell.com>
21681 * expr.cc (fold_single_bit_test): Rename to ...
21682 (expand_single_bit_test): This and expand directly.
21683 (do_store_flag): Update for the rename function.
21685 2023-05-20 Andrew Pinski <apinski@marvell.com>
21687 * expr.cc (fold_single_bit_test): Use BIT_FIELD_REF
21688 instead of shift/and.
21690 2023-05-20 Andrew Pinski <apinski@marvell.com>
21692 * expr.cc (fold_single_bit_test): Add an assert
21693 and simplify based on code being NE_EXPR or EQ_EXPR.
21695 2023-05-20 Andrew Pinski <apinski@marvell.com>
21697 * expr.cc (fold_single_bit_test): Take inner and bitnum
21698 instead of arg0 and arg1. Update the code.
21699 (do_store_flag): Don't create a tree when calling
21700 fold_single_bit_test instead just call it with the bitnum
21701 and the inner tree.
21703 2023-05-20 Andrew Pinski <apinski@marvell.com>
21705 * expr.cc (fold_single_bit_test): Use get_def_for_expr
21706 instead of checking the inner's code.
21708 2023-05-20 Andrew Pinski <apinski@marvell.com>
21710 * expr.cc (fold_single_bit_test_into_sign_test): Inline into ...
21711 (fold_single_bit_test): This and simplify.
21713 2023-05-20 Andrew Pinski <apinski@marvell.com>
21715 * fold-const.cc (fold_single_bit_test_into_sign_test): Move to
21717 (fold_single_bit_test): Likewise.
21718 * expr.cc (fold_single_bit_test_into_sign_test): Move from fold-const.cc
21719 (fold_single_bit_test): Likewise and make static.
21720 * fold-const.h (fold_single_bit_test): Remove declaration.
21722 2023-05-20 Die Li <lidie@eswincomputing.com>
21724 * config/riscv/riscv.cc (riscv_expand_conditional_move): Fix mode
21727 2023-05-20 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
21729 * config/riscv/bitmanip.md (branch<X:mode>_bext): New split pattern.
21731 2023-05-20 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
21734 * config/riscv/bitmanip.md
21735 (<bitmanip_optab>disi2): Match with any_extend.
21736 (<bitmanip_optab>disi2_sext): New pattern to match
21737 with sign extend using an ANDI instruction.
21739 2023-05-19 Nathan Sidwell <nathan@acm.org>
21742 * opts.h (handle_deferred_dump_options): Declare.
21743 * opts-global.cc (handle_common_deferred_options): Do not handle
21745 (handle_deferred_dump_options): New.
21746 * toplev.cc (toplev::main): Call it after plugin init.
21748 2023-05-19 Joern Rennecke <joern.rennecke@embecosm.com>
21750 * config/riscv/constraints.md (DsS, DsD): Restore agreement
21751 with shiftm1 mode attribute.
21753 2023-05-19 Andrew Pinski <apinski@marvell.com>
21756 * gcc.cc (default_compilers["@c-header"]): Add %w
21757 after the --output-pch.
21759 2023-05-19 Vineet Gupta <vineetg@rivosinc.com>
21761 * config/riscv/riscv.cc (riscv_split_integer): if loval is equal
21762 to hival, ASHIFT the corresponding regs.
21764 2023-05-19 Robin Dapp <rdapp@ventanamicro.com>
21766 * config/riscv/riscv.cc (riscv_const_insns): Remove else.
21768 2023-05-19 Jakub Jelinek <jakub@redhat.com>
21770 PR tree-optimization/105776
21771 * tree-ssa-math-opts.cc (arith_overflow_check_p): If cast_stmt is
21772 non-NULL, allow division statement to have a cast as single imm use
21773 rather than comparison/condition.
21774 (match_arith_overflow): In that case remove the cast stmt in addition
21775 to the division statement.
21777 2023-05-19 Jakub Jelinek <jakub@redhat.com>
21779 PR tree-optimization/101856
21780 * tree-ssa-math-opts.cc (match_arith_overflow): Pattern detect
21781 unsigned __builtin_mul_overflow_p even when umulv4_optab doesn't
21782 support it but umul_highpart_optab does.
21784 2023-05-19 Eric Botcazou <ebotcazou@adacore.com>
21786 * varasm.cc (output_constructor_bitfield): Call tree_to_uhwi instead
21787 of tree_to_shwi on array indices. Minor tweaks.
21789 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
21791 * alias.cc (ref_all_alias_ptr_type_p): Use _P() defines from tree.h.
21792 * attribs.cc (diag_attr_exclusions): Ditto.
21793 (decl_attributes): Ditto.
21794 (build_type_attribute_qual_variant): Ditto.
21795 * builtins.cc (fold_builtin_carg): Ditto.
21796 (fold_builtin_next_arg): Ditto.
21797 (do_mpc_arg2): Ditto.
21798 * cfgexpand.cc (expand_return): Ditto.
21799 * cgraph.h (decl_in_symtab_p): Ditto.
21800 (symtab_node::get_create): Ditto.
21801 * dwarf2out.cc (base_type_die): Ditto.
21802 (implicit_ptr_descriptor): Ditto.
21803 (gen_array_type_die): Ditto.
21804 (gen_type_die_with_usage): Ditto.
21805 (optimize_location_into_implicit_ptr): Ditto.
21806 * expr.cc (do_store_flag): Ditto.
21807 * fold-const.cc (negate_expr_p): Ditto.
21808 (fold_negate_expr_1): Ditto.
21809 (fold_convert_const): Ditto.
21810 (fold_convert_loc): Ditto.
21811 (constant_boolean_node): Ditto.
21812 (fold_binary_op_with_conditional_arg): Ditto.
21813 (build_fold_addr_expr_with_type_loc): Ditto.
21814 (fold_comparison): Ditto.
21815 (fold_checksum_tree): Ditto.
21816 (tree_unary_nonnegative_warnv_p): Ditto.
21817 (integer_valued_real_unary_p): Ditto.
21818 (fold_read_from_constant_string): Ditto.
21819 * gcc-rich-location.cc (maybe_range_label_for_tree_type_mismatch::get_text): Ditto.
21820 * gimple-expr.cc (useless_type_conversion_p): Ditto.
21821 (is_gimple_reg): Ditto.
21822 (is_gimple_asm_val): Ditto.
21823 (mark_addressable): Ditto.
21824 * gimple-expr.h (is_gimple_variable): Ditto.
21825 (virtual_operand_p): Ditto.
21826 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores): Ditto.
21827 * gimplify.cc (gimplify_bind_expr): Ditto.
21828 (gimplify_return_expr): Ditto.
21829 (gimple_add_padding_init_for_auto_var): Ditto.
21830 (gimplify_addr_expr): Ditto.
21831 (omp_add_variable): Ditto.
21832 (omp_notice_variable): Ditto.
21833 (omp_get_base_pointer): Ditto.
21834 (omp_strip_components_and_deref): Ditto.
21835 (omp_strip_indirections): Ditto.
21836 (omp_accumulate_sibling_list): Ditto.
21837 (omp_build_struct_sibling_lists): Ditto.
21838 (gimplify_adjust_omp_clauses_1): Ditto.
21839 (gimplify_adjust_omp_clauses): Ditto.
21840 (gimplify_omp_for): Ditto.
21841 (goa_lhs_expr_p): Ditto.
21842 (gimplify_one_sizepos): Ditto.
21843 * graphite-scop-detection.cc (scop_detection::graphite_can_represent_scev): Ditto.
21844 * ipa-devirt.cc (odr_types_equivalent_p): Ditto.
21845 * ipa-prop.cc (ipa_set_jf_constant): Ditto.
21846 (propagate_controlled_uses): Ditto.
21847 * ipa-sra.cc (type_prevails_p): Ditto.
21848 (scan_expr_access): Ditto.
21849 * optabs-tree.cc (optab_for_tree_code): Ditto.
21850 * toplev.cc (wrapup_global_declaration_1): Ditto.
21851 * trans-mem.cc (transaction_invariant_address_p): Ditto.
21852 * tree-cfg.cc (verify_types_in_gimple_reference): Ditto.
21853 (verify_gimple_comparison): Ditto.
21854 (verify_gimple_assign_binary): Ditto.
21855 (verify_gimple_assign_single): Ditto.
21856 * tree-complex.cc (get_component_ssa_name): Ditto.
21857 * tree-emutls.cc (lower_emutls_2): Ditto.
21858 * tree-inline.cc (copy_tree_body_r): Ditto.
21859 (estimate_move_cost): Ditto.
21860 (copy_decl_for_dup_finish): Ditto.
21861 * tree-nested.cc (convert_nonlocal_omp_clauses): Ditto.
21862 (note_nonlocal_vla_type): Ditto.
21863 (convert_local_omp_clauses): Ditto.
21864 (remap_vla_decls): Ditto.
21865 (fixup_vla_decls): Ditto.
21866 * tree-parloops.cc (loop_has_vector_phi_nodes): Ditto.
21867 * tree-pretty-print.cc (print_declaration): Ditto.
21868 (print_call_name): Ditto.
21869 * tree-sra.cc (compare_access_positions): Ditto.
21870 * tree-ssa-alias.cc (compare_type_sizes): Ditto.
21871 * tree-ssa-ccp.cc (get_default_value): Ditto.
21872 * tree-ssa-coalesce.cc (populate_coalesce_list_for_outofssa): Ditto.
21873 * tree-ssa-dom.cc (reduce_vector_comparison_to_scalar_comparison): Ditto.
21874 * tree-ssa-forwprop.cc (can_propagate_from): Ditto.
21875 * tree-ssa-propagate.cc (may_propagate_copy): Ditto.
21876 * tree-ssa-sccvn.cc (fully_constant_vn_reference_p): Ditto.
21877 * tree-ssa-sink.cc (statement_sink_location): Ditto.
21878 * tree-ssa-structalias.cc (type_must_have_pointers): Ditto.
21879 * tree-ssa-ter.cc (find_replaceable_in_bb): Ditto.
21880 * tree-ssa-uninit.cc (warn_uninit): Ditto.
21881 * tree-ssa.cc (maybe_rewrite_mem_ref_base): Ditto.
21882 (non_rewritable_mem_ref_base): Ditto.
21883 * tree-streamer-in.cc (lto_input_ts_type_non_common_tree_pointers): Ditto.
21884 * tree-streamer-out.cc (write_ts_type_non_common_tree_pointers): Ditto.
21885 * tree-vect-generic.cc (do_binop): Ditto.
21887 * tree-vect-stmts.cc (vect_init_vector): Ditto.
21888 * tree-vector-builder.h (tree_vector_builder::note_representative): Ditto.
21889 * tree.cc (sign_mask_for): Ditto.
21890 (verify_type_variant): Ditto.
21891 (gimple_canonical_types_compatible_p): Ditto.
21892 (verify_type): Ditto.
21893 * ubsan.cc (get_ubsan_type_info_for_type): Ditto.
21894 * var-tracking.cc (prepare_call_arguments): Ditto.
21895 (vt_add_function_parameters): Ditto.
21896 * varasm.cc (decode_addr_const): Ditto.
21898 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
21900 * omp-low.cc (scan_sharing_clauses): Use _P() defines from tree.h.
21901 (lower_reduction_clauses): Ditto.
21902 (lower_send_clauses): Ditto.
21903 (lower_omp_task_reductions): Ditto.
21904 * omp-oacc-neuter-broadcast.cc (install_var_field): Ditto.
21905 (worker_single_copy): Ditto.
21906 * omp-offload.cc (oacc_rewrite_var_decl): Ditto.
21907 * omp-simd-clone.cc (plausible_type_for_simd_clone): Ditto.
21909 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
21911 * lto-streamer-in.cc (lto_input_var_decl_ref): Use _P defines from
21913 (lto_read_body_or_constructor): Ditto.
21914 * lto-streamer-out.cc (tree_is_indexable): Ditto.
21915 (lto_output_var_decl_ref): Ditto.
21916 (DFS::DFS_write_tree_body): Ditto.
21917 (wrap_refs): Ditto.
21918 (write_symbol_extension_info): Ditto.
21920 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
21922 * config/aarch64/aarch64.cc (aarch64_short_vector_p): Use _P
21923 defines from tree.h.
21924 (aarch64_mangle_type): Ditto.
21925 * config/alpha/alpha.cc (alpha_in_small_data_p): Ditto.
21926 (alpha_gimplify_va_arg_1): Ditto.
21927 * config/arc/arc.cc (arc_encode_section_info): Ditto.
21928 (arc_is_aux_reg_p): Ditto.
21929 (arc_is_uncached_mem_p): Ditto.
21930 (arc_handle_aux_attribute): Ditto.
21931 * config/arm/arm.cc (arm_handle_isr_attribute): Ditto.
21932 (arm_handle_cmse_nonsecure_call): Ditto.
21933 (arm_set_default_type_attributes): Ditto.
21934 (arm_is_segment_info_known): Ditto.
21935 (arm_mangle_type): Ditto.
21936 * config/arm/unknown-elf.h (IN_NAMED_SECTION_P): Ditto.
21937 * config/avr/avr.cc (avr_lookup_function_attribute1): Ditto.
21938 (avr_decl_absdata_p): Ditto.
21939 (avr_insert_attributes): Ditto.
21940 (avr_section_type_flags): Ditto.
21941 (avr_encode_section_info): Ditto.
21942 * config/bfin/bfin.cc (bfin_handle_l2_attribute): Ditto.
21943 * config/bpf/bpf.cc (bpf_core_compute): Ditto.
21944 * config/c6x/c6x.cc (c6x_in_small_data_p): Ditto.
21945 * config/csky/csky.cc (csky_handle_isr_attribute): Ditto.
21946 (csky_mangle_type): Ditto.
21947 * config/darwin-c.cc (darwin_pragma_unused): Ditto.
21948 * config/darwin.cc (is_objc_metadata): Ditto.
21949 * config/epiphany/epiphany.cc (epiphany_function_ok_for_sibcall): Ditto.
21950 * config/epiphany/epiphany.h (ROUND_TYPE_ALIGN): Ditto.
21951 * config/frv/frv.cc (frv_emit_movsi): Ditto.
21952 * config/gcn/gcn-tree.cc (gcn_lockless_update): Ditto.
21953 * config/gcn/gcn.cc (gcn_asm_output_symbol_ref): Ditto.
21954 * config/h8300/h8300.cc (h8300_encode_section_info): Ditto.
21955 * config/i386/i386-expand.cc: Ditto.
21956 * config/i386/i386.cc (type_natural_mode): Ditto.
21957 (ix86_function_arg): Ditto.
21958 (ix86_data_alignment): Ditto.
21959 (ix86_local_alignment): Ditto.
21960 (ix86_simd_clone_compute_vecsize_and_simdlen): Ditto.
21961 * config/i386/winnt-cxx.cc (i386_pe_type_dllimport_p): Ditto.
21962 (i386_pe_type_dllexport_p): Ditto.
21963 (i386_pe_adjust_class_at_definition): Ditto.
21964 * config/i386/winnt.cc (i386_pe_determine_dllimport_p): Ditto.
21965 (i386_pe_binds_local_p): Ditto.
21966 (i386_pe_section_type_flags): Ditto.
21967 * config/ia64/ia64.cc (ia64_encode_section_info): Ditto.
21968 (ia64_gimplify_va_arg): Ditto.
21969 (ia64_in_small_data_p): Ditto.
21970 * config/iq2000/iq2000.cc (iq2000_function_arg): Ditto.
21971 * config/lm32/lm32.cc (lm32_in_small_data_p): Ditto.
21972 * config/loongarch/loongarch.cc (loongarch_handle_model_attribute): Ditto.
21973 * config/m32c/m32c.cc (m32c_insert_attributes): Ditto.
21974 * config/mcore/mcore.cc (mcore_mark_dllimport): Ditto.
21975 (mcore_encode_section_info): Ditto.
21976 * config/microblaze/microblaze.cc (microblaze_elf_in_small_data_p): Ditto.
21977 * config/mips/mips.cc (mips_output_aligned_decl_common): Ditto.
21978 * config/mmix/mmix.cc (mmix_encode_section_info): Ditto.
21979 * config/nvptx/nvptx.cc (nvptx_encode_section_info): Ditto.
21980 (pass_in_memory): Ditto.
21981 (nvptx_generate_vector_shuffle): Ditto.
21982 (nvptx_lockless_update): Ditto.
21983 * config/pa/pa.cc (pa_function_arg_padding): Ditto.
21984 (pa_function_value): Ditto.
21985 (pa_function_arg): Ditto.
21986 * config/pa/pa.h (IN_NAMED_SECTION_P): Ditto.
21987 (TEXT_SPACE_P): Ditto.
21988 * config/pa/som.h (MAKE_DECL_ONE_ONLY): Ditto.
21989 * config/pdp11/pdp11.cc (pdp11_return_in_memory): Ditto.
21990 * config/riscv/riscv.cc (riscv_in_small_data_p): Ditto.
21991 (riscv_mangle_type): Ditto.
21992 * config/rl78/rl78.cc (rl78_insert_attributes): Ditto.
21993 (rl78_addsi3_internal): Ditto.
21994 * config/rs6000/aix.h (ROUND_TYPE_ALIGN): Ditto.
21995 * config/rs6000/darwin.h (ROUND_TYPE_ALIGN): Ditto.
21996 * config/rs6000/freebsd64.h (ROUND_TYPE_ALIGN): Ditto.
21997 * config/rs6000/linux64.h (ROUND_TYPE_ALIGN): Ditto.
21998 * config/rs6000/rs6000-call.cc (rs6000_function_arg_boundary): Ditto.
21999 (rs6000_function_arg_advance_1): Ditto.
22000 (rs6000_function_arg): Ditto.
22001 (rs6000_pass_by_reference): Ditto.
22002 * config/rs6000/rs6000-logue.cc (rs6000_function_ok_for_sibcall): Ditto.
22003 * config/rs6000/rs6000.cc (rs6000_data_alignment): Ditto.
22004 (rs6000_set_default_type_attributes): Ditto.
22005 (rs6000_elf_in_small_data_p): Ditto.
22006 (IN_NAMED_SECTION): Ditto.
22007 (rs6000_xcoff_encode_section_info): Ditto.
22008 (rs6000_function_value): Ditto.
22009 (invalid_arg_for_unprototyped_fn): Ditto.
22010 * config/s390/s390-c.cc (s390_fn_types_compatible): Ditto.
22011 (s390_vec_n_elem): Ditto.
22012 * config/s390/s390.cc (s390_check_type_for_vector_abi): Ditto.
22013 (s390_function_arg_integer): Ditto.
22014 (s390_return_in_memory): Ditto.
22015 (s390_encode_section_info): Ditto.
22016 * config/sh/sh.cc (sh_gimplify_va_arg_expr): Ditto.
22017 (sh_function_value): Ditto.
22018 * config/sol2.cc (solaris_insert_attributes): Ditto.
22019 * config/sparc/sparc.cc (function_arg_slotno): Ditto.
22020 * config/sparc/sparc.h (ROUND_TYPE_ALIGN): Ditto.
22021 * config/stormy16/stormy16.cc (xstormy16_encode_section_info): Ditto.
22022 (xstormy16_handle_below100_attribute): Ditto.
22023 * config/v850/v850.cc (v850_encode_section_info): Ditto.
22024 (v850_insert_attributes): Ditto.
22025 * config/visium/visium.cc (visium_pass_by_reference): Ditto.
22026 (visium_return_in_memory): Ditto.
22027 * config/xtensa/xtensa.cc (xtensa_multibss_section_type_flags): Ditto.
22029 2023-05-18 Uros Bizjak <ubizjak@gmail.com>
22031 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi_partial): New.
22032 (ix86_expand_vecop_qihi): Add op2vec bool variable.
22033 Do not set REG_EQUAL note.
22034 * config/i386/i386-protos.h (ix86_expand_vecop_qihi_partial):
22036 * config/i386/i386.cc (ix86_multiplication_cost): Handle
22037 V4QImode and V8QImode.
22038 * config/i386/mmx.md (mulv8qi3): New expander.
22040 * config/i386/sse.md (mulv8qi3): Remove.
22042 2023-05-18 Georg-Johann Lay <avr@gjlay.de>
22044 * config/avr/gen-avr-mmcu-specs.cc: Remove stale */ after // comment.
22046 2023-05-18 Jonathan Wakely <jwakely@redhat.com>
22048 PR bootstrap/105831
22049 * config.gcc: Use = operator instead of ==.
22051 2023-05-18 Michael Bäuerle <micha@NetBSD.org>
22053 PR bootstrap/105831
22054 * config/nvptx/gen-opt.sh: Use = operator instead of ==.
22055 * configure.ac: Likewise.
22056 * configure: Regenerate.
22058 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
22060 * config/arm/arm_mve.h: (__ARM_mve_typeid): Add more pointer types.
22061 (__ARM_mve_coerce1): Remove.
22062 (__ARM_mve_coerce2): Remove.
22063 (__ARM_mve_coerce3): Remove.
22064 (__ARM_mve_coerce_i_scalar): New.
22065 (__ARM_mve_coerce_s8_ptr): New.
22066 (__ARM_mve_coerce_u8_ptr): New.
22067 (__ARM_mve_coerce_s16_ptr): New.
22068 (__ARM_mve_coerce_u16_ptr): New.
22069 (__ARM_mve_coerce_s32_ptr): New.
22070 (__ARM_mve_coerce_u32_ptr): New.
22071 (__ARM_mve_coerce_s64_ptr): New.
22072 (__ARM_mve_coerce_u64_ptr): New.
22073 (__ARM_mve_coerce_f_scalar): New.
22074 (__ARM_mve_coerce_f16_ptr): New.
22075 (__ARM_mve_coerce_f32_ptr): New.
22076 (__arm_vst4q): Change _coerce_ overloads.
22077 (__arm_vbicq): Change _coerce_ overloads.
22078 (__arm_vld1q): Change _coerce_ overloads.
22079 (__arm_vld1q_z): Change _coerce_ overloads.
22080 (__arm_vld2q): Change _coerce_ overloads.
22081 (__arm_vld4q): Change _coerce_ overloads.
22082 (__arm_vldrhq_gather_offset): Change _coerce_ overloads.
22083 (__arm_vldrhq_gather_offset_z): Change _coerce_ overloads.
22084 (__arm_vldrhq_gather_shifted_offset): Change _coerce_ overloads.
22085 (__arm_vldrhq_gather_shifted_offset_z): Change _coerce_ overloads.
22086 (__arm_vldrwq_gather_offset): Change _coerce_ overloads.
22087 (__arm_vldrwq_gather_offset_z): Change _coerce_ overloads.
22088 (__arm_vldrwq_gather_shifted_offset): Change _coerce_ overloads.
22089 (__arm_vldrwq_gather_shifted_offset_z): Change _coerce_ overloads.
22090 (__arm_vst1q_p): Change _coerce_ overloads.
22091 (__arm_vst2q): Change _coerce_ overloads.
22092 (__arm_vst1q): Change _coerce_ overloads.
22093 (__arm_vstrhq): Change _coerce_ overloads.
22094 (__arm_vstrhq_p): Change _coerce_ overloads.
22095 (__arm_vstrhq_scatter_offset_p): Change _coerce_ overloads.
22096 (__arm_vstrhq_scatter_offset): Change _coerce_ overloads.
22097 (__arm_vstrhq_scatter_shifted_offset_p): Change _coerce_ overloads.
22098 (__arm_vstrhq_scatter_shifted_offset): Change _coerce_ overloads.
22099 (__arm_vstrwq_p): Change _coerce_ overloads.
22100 (__arm_vstrwq): Change _coerce_ overloads.
22101 (__arm_vstrwq_scatter_offset): Change _coerce_ overloads.
22102 (__arm_vstrwq_scatter_offset_p): Change _coerce_ overloads.
22103 (__arm_vstrwq_scatter_shifted_offset): Change _coerce_ overloads.
22104 (__arm_vstrwq_scatter_shifted_offset_p): Change _coerce_ overloads.
22105 (__arm_vsetq_lane): Change _coerce_ overloads.
22106 (__arm_vldrbq_gather_offset): Change _coerce_ overloads.
22107 (__arm_vdwdupq_x_u8): Change _coerce_ overloads.
22108 (__arm_vdwdupq_x_u16): Change _coerce_ overloads.
22109 (__arm_vdwdupq_x_u32): Change _coerce_ overloads.
22110 (__arm_viwdupq_x_u8): Change _coerce_ overloads.
22111 (__arm_viwdupq_x_u16): Change _coerce_ overloads.
22112 (__arm_viwdupq_x_u32): Change _coerce_ overloads.
22113 (__arm_vidupq_x_u8): Change _coerce_ overloads.
22114 (__arm_vddupq_x_u8): Change _coerce_ overloads.
22115 (__arm_vidupq_x_u16): Change _coerce_ overloads.
22116 (__arm_vddupq_x_u16): Change _coerce_ overloads.
22117 (__arm_vidupq_x_u32): Change _coerce_ overloads.
22118 (__arm_vddupq_x_u32): Change _coerce_ overloads.
22119 (__arm_vldrdq_gather_offset): Change _coerce_ overloads.
22120 (__arm_vldrdq_gather_offset_z): Change _coerce_ overloads.
22121 (__arm_vldrdq_gather_shifted_offset): Change _coerce_ overloads.
22122 (__arm_vldrdq_gather_shifted_offset_z): Change _coerce_ overloads.
22123 (__arm_vldrbq_gather_offset_z): Change _coerce_ overloads.
22124 (__arm_vidupq_u16): Change _coerce_ overloads.
22125 (__arm_vidupq_u32): Change _coerce_ overloads.
22126 (__arm_vidupq_u8): Change _coerce_ overloads.
22127 (__arm_vddupq_u16): Change _coerce_ overloads.
22128 (__arm_vddupq_u32): Change _coerce_ overloads.
22129 (__arm_vddupq_u8): Change _coerce_ overloads.
22130 (__arm_viwdupq_m): Change _coerce_ overloads.
22131 (__arm_viwdupq_u16): Change _coerce_ overloads.
22132 (__arm_viwdupq_u32): Change _coerce_ overloads.
22133 (__arm_viwdupq_u8): Change _coerce_ overloads.
22134 (__arm_vdwdupq_m): Change _coerce_ overloads.
22135 (__arm_vdwdupq_u16): Change _coerce_ overloads.
22136 (__arm_vdwdupq_u32): Change _coerce_ overloads.
22137 (__arm_vdwdupq_u8): Change _coerce_ overloads.
22138 (__arm_vstrbq): Change _coerce_ overloads.
22139 (__arm_vstrbq_p): Change _coerce_ overloads.
22140 (__arm_vstrbq_scatter_offset_p): Change _coerce_ overloads.
22141 (__arm_vstrdq_scatter_offset_p): Change _coerce_ overloads.
22142 (__arm_vstrdq_scatter_offset): Change _coerce_ overloads.
22143 (__arm_vstrdq_scatter_shifted_offset_p): Change _coerce_ overloads.
22144 (__arm_vstrdq_scatter_shifted_offset): Change _coerce_ overloads.
22146 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
22148 * config/arm/arm_mve.h (__arm_vbicq): Change coerce on
22151 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
22153 * config/arm/arm_mve.h (__arm_vadcq_s32): Fix arithmetic.
22154 (__arm_vadcq_u32): Likewise.
22155 (__arm_vadcq_m_s32): Likewise.
22156 (__arm_vadcq_m_u32): Likewise.
22157 (__arm_vsbcq_s32): Likewise.
22158 (__arm_vsbcq_u32): Likewise.
22159 (__arm_vsbcq_m_s32): Likewise.
22160 (__arm_vsbcq_m_u32): Likewise.
22161 * config/arm/mve.md (get_fpscr_nzcvqc): Make unspec_volatile.
22163 2023-05-18 Andrea Corallo <andrea.corallo@arm.com>
22165 * config/arm/mve.md (mve_vrndq_m_f<mode>, mve_vrev64q_f<mode>)
22166 (mve_vrev32q_fv8hf, mve_vcvttq_f32_f16v4sf)
22167 (mve_vcvtbq_f32_f16v4sf, mve_vcvtq_to_f_<supf><mode>)
22168 (mve_vrev64q_<supf><mode>, mve_vcvtq_from_f_<supf><mode>)
22169 (mve_vmovltq_<supf><mode>, mve_vmovlbq_<supf><mode>)
22170 (mve_vcvtpq_<supf><mode>, mve_vcvtnq_<supf><mode>)
22171 (mve_vcvtmq_<supf><mode>, mve_vcvtaq_<supf><mode>)
22172 (mve_vmvnq_n_<supf><mode>, mve_vrev16q_<supf>v16qi)
22173 (mve_vctp<MVE_vctp>q<MVE_vpred>, mve_vbrsrq_n_f<mode>)
22174 (mve_vbrsrq_n_<supf><mode>, mve_vandq_f<mode>, mve_vbicq_f<mode>)
22175 (mve_vctp<MVE_vctp>q_m<MVE_vpred>, mve_vcvtbq_f16_f32v8hf)
22176 (mve_vcvttq_f16_f32v8hf, mve_veorq_f<mode>)
22177 (mve_vmlaldavxq_s<mode>, mve_vmlsldavq_s<mode>)
22178 (mve_vmlsldavxq_s<mode>, mve_vornq_f<mode>, mve_vorrq_f<mode>)
22179 (mve_vrmlaldavhxq_sv4si, mve_vcvtq_m_to_f_<supf><mode>)
22180 (mve_vshlcq_<supf><mode>, mve_vmvnq_m_<supf><mode>)
22181 (mve_vpselq_<supf><mode>, mve_vcvtbq_m_f16_f32v8hf)
22182 (mve_vcvtbq_m_f32_f16v4sf, mve_vcvttq_m_f16_f32v8hf)
22183 (mve_vcvttq_m_f32_f16v4sf, mve_vmlaldavq_p_<supf><mode>)
22184 (mve_vmlsldavaq_s<mode>, mve_vmlsldavaxq_s<mode>)
22185 (mve_vmlsldavq_p_s<mode>, mve_vmlsldavxq_p_s<mode>)
22186 (mve_vmvnq_m_n_<supf><mode>, mve_vorrq_m_n_<supf><mode>)
22187 (mve_vpselq_f<mode>, mve_vrev32q_m_fv8hf)
22188 (mve_vrev32q_m_<supf><mode>, mve_vrev64q_m_f<mode>)
22189 (mve_vrmlaldavhaxq_sv4si, mve_vrmlaldavhxq_p_sv4si)
22190 (mve_vrmlsldavhaxq_sv4si, mve_vrmlsldavhq_p_sv4si)
22191 (mve_vrmlsldavhxq_p_sv4si, mve_vrev16q_m_<supf>v16qi)
22192 (mve_vrmlaldavhq_p_<supf>v4si, mve_vrmlsldavhaq_sv4si)
22193 (mve_vandq_m_<supf><mode>, mve_vbicq_m_<supf><mode>)
22194 (mve_veorq_m_<supf><mode>, mve_vornq_m_<supf><mode>)
22195 (mve_vorrq_m_<supf><mode>, mve_vandq_m_f<mode>)
22196 (mve_vbicq_m_f<mode>, mve_veorq_m_f<mode>, mve_vornq_m_f<mode>)
22197 (mve_vorrq_m_f<mode>)
22198 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn)
22199 (mve_vstrdq_scatter_shifted_offset_<supf>v2di_insn)
22200 (mve_vstrdq_scatter_base_wb_p_<supf>v2di) : Fix spacing and
22201 capitalization in the emitted asm.
22203 2023-05-18 Andrea Corallo <andrea.corallo@arm.com>
22205 * config/arm/constraints.md (mve_vldrd_immediate): Move it to
22207 (Ri): Move constraint definition from predicates.md.
22208 (Rl): Define new constraint.
22209 * config/arm/mve.md (mve_vstrwq_scatter_base_wb_p_<supf>v4si): Add
22210 missing constraint.
22211 (mve_vstrwq_scatter_base_wb_p_fv4sf): Add missing Up constraint
22212 for op 1, use mve_vstrw_immediate predicate and Rl constraint for
22213 op 2. Fix asm output spacing.
22214 (mve_vstrdq_scatter_base_wb_p_<supf>v2di): Add missing constraint.
22215 * config/arm/predicates.md (Ri) Move constraint to constraints.md
22216 (mve_vldrd_immediate): Move it from
22218 (mve_vstrw_immediate): New predicate.
22220 2023-05-18 Pan Li <pan2.li@intel.com>
22221 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
22222 Kito Cheng <kito.cheng@sifive.com>
22223 Richard Biener <rguenther@suse.de>
22224 Richard Sandiford <richard.sandiford@arm.com>
22226 * combine.cc (struct reg_stat_type): Extend machine_mode to 16 bits.
22227 * cse.cc (struct qty_table_elem): Extend machine_mode to 16 bits
22228 (struct table_elt): Extend machine_mode to 16 bits.
22229 (struct set): Ditto.
22230 * genmodes.cc (emit_mode_wider): Extend type from char to short.
22231 (emit_mode_complex): Ditto.
22232 (emit_mode_inner): Ditto.
22233 (emit_class_narrowest_mode): Ditto.
22234 * genopinit.cc (main): Extend the machine_mode limit.
22235 * ira-int.h (struct ira_allocno): Extend machine_mode to 16 bits and
22236 re-ordered the struct fields for padding.
22237 * machmode.h (MACHINE_MODE_BITSIZE): New macro.
22238 (GET_MODE_2XWIDER_MODE): Extend type from char to short.
22239 (get_mode_alignment): Extend type from char to short.
22240 * ree.cc (struct ext_modified): Extend machine_mode to 16 bits and
22241 removed the ATTRIBUTE_PACKED.
22242 * rtl-ssa/accesses.h: Extend machine_mode to 16 bits, narrow
22243 * rtl-ssa/internals.inl (rtl_ssa::access_info): Adjust the assignment.
22244 m_kind to 2 bits and remove m_spare.
22245 * rtl.h (RTX_CODE_BITSIZE): New macro.
22246 (struct rtx_def): Swap both the bit size and location between the
22247 rtx_code and the machine_mode.
22248 (subreg_shape::unique_id): Extend the machine_mode limit.
22249 * rtlanal.h: Extend machine_mode to 16 bits.
22250 * tree-core.h (struct tree_type_common): Extend machine_mode to 16
22251 bits and re-ordered the struct fields for padding.
22252 (struct tree_decl_common): Extend machine_mode to 16 bits.
22254 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
22256 * genrecog.cc (print_nonbool_test): Fix type error of
22257 switch (SUBREG_BYTE (op))'.
22259 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
22261 * common/config/riscv/riscv-common.cc: Remove
22262 trailing spaces on lines.
22263 * config/riscv/riscv.cc (riscv_legitimize_move): Likewise.
22264 * config/riscv/riscv.h (enum reg_class): Likewise.
22265 * config/riscv/riscv.md: Likewise.
22267 2023-05-17 John David Anglin <danglin@gcc.gnu.org>
22269 * config/pa/pa.md (clear_cache): New.
22271 2023-05-17 Arsen Arsenović <arsen@aarsen.me>
22273 * doc/extend.texi (C++ Concepts) <forall>: Remove extraneous
22274 parenthesis. Fix misnamed index entry.
22275 <concept>: Fix misnamed index entry.
22277 2023-05-17 Jivan Hakobyan <jivanhakobyan9@gmail.com>
22279 * config/riscv/riscv.md (*<optab><GPR:mode>3_mask): New pattern,
22281 (*<optab>si3_mask, *<optab>di3_mask): Here.
22282 (*<optab>si3_mask_1, *<optab>di3_mask_1): And here.
22283 * config/riscv/bitmanip.md (*<bitmanip_optab><GPR:mode>3_mask): New
22285 (*<bitmanip_optab>si3_sext_mask): Likewise.
22286 * config/riscv/iterators.md (shiftm1): Use const_si_mask_operand
22287 and const_di_mask_operand.
22288 (bitmanip_rotate): New iterator.
22289 (bitmanip_optab): Add rotates.
22290 * config/riscv/predicates.md (const_si_mask_operand): Renamed
22291 from const31_operand. Generalize to handle more mask constants.
22292 (const_di_mask_operand): Similarly.
22294 2023-05-17 Jakub Jelinek <jakub@redhat.com>
22297 * config/i386/i386-builtin-types.def (FLOAT128): Use
22298 float128t_type_node rather than float128_type_node.
22300 2023-05-17 Alexander Monakov <amonakov@ispras.ru>
22302 * tree-ssa-math-opts.cc (convert_mult_to_fma): Enable only for
22303 FP_CONTRACT_FAST (no functional change).
22305 2023-05-17 Uros Bizjak <ubizjak@gmail.com>
22307 * config/i386/i386.cc (ix86_multiplication_cost): Correct
22308 calcuation of integer vector mode costs to reflect generated
22309 instruction sequences of different integer vector modes and
22310 different target ABIs.
22312 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22314 * config/riscv/riscv-opts.h (enum riscv_entity): New enum.
22315 * config/riscv/riscv.cc (riscv_emit_mode_set): New function.
22316 (riscv_mode_needed): Ditto.
22317 (riscv_mode_after): Ditto.
22318 (riscv_mode_entry): Ditto.
22319 (riscv_mode_exit): Ditto.
22320 (riscv_mode_priority): Ditto.
22321 (TARGET_MODE_EMIT): New target hook.
22322 (TARGET_MODE_NEEDED): Ditto.
22323 (TARGET_MODE_AFTER): Ditto.
22324 (TARGET_MODE_ENTRY): Ditto.
22325 (TARGET_MODE_EXIT): Ditto.
22326 (TARGET_MODE_PRIORITY): Ditto.
22327 * config/riscv/riscv.h (OPTIMIZE_MODE_SWITCHING): Ditto.
22328 (NUM_MODES_FOR_MODE_SWITCHING): Ditto.
22329 * config/riscv/riscv.md: Add csrwvxrm.
22330 * config/riscv/vector.md (rnu,rne,rdn,rod,none): New attribute.
22331 (vxrmsi): New pattern.
22333 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22335 * config/riscv/riscv-vector-builtins-bases.cc: Introduce rounding mode.
22336 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
22337 (struct narrow_alu_def): Ditto.
22338 * config/riscv/riscv-vector-builtins.cc (function_builder::apply_predication): Ditto.
22339 (function_expander::use_exact_insn): Ditto.
22340 * config/riscv/riscv-vector-builtins.h (function_checker::arg_num): New function.
22341 (function_base::has_rounding_mode_operand_p): New function.
22343 2023-05-17 Andrew Pinski <apinski@marvell.com>
22345 * tree-ssa-forwprop.cc (simplify_builtin_call): Check
22346 against 0 instead of calling integer_zerop.
22348 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22350 * config/riscv/riscv-vector-builtins.cc (register_vxrm): New function.
22351 (DEF_RVV_VXRM_ENUM): New macro.
22352 (handle_pragma_vector): Add vxrm enum register.
22353 * config/riscv/riscv-vector-builtins.def (DEF_RVV_VXRM_ENUM): New macro.
22359 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
22361 * value-range.h (Value_Range::operator=): New.
22363 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
22365 * value-range.cc (vrange::operator=): Add a stub to copy
22366 unsupported ranges.
22367 * value-range.h (is_a <unsupported_range>): New.
22368 (Value_Range::operator=): Support copying unsupported ranges.
22370 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
22372 * data-streamer-in.cc (streamer_read_real_value): New.
22373 (streamer_read_value_range): New.
22374 * data-streamer-out.cc (streamer_write_real_value): New.
22375 (streamer_write_vrange): New.
22376 * data-streamer.h (streamer_write_vrange): New.
22377 (streamer_read_value_range): New.
22379 2023-05-17 Jonathan Wakely <jwakely@redhat.com>
22382 * doc/invoke.texi (Code Gen Options): Note that -fshort-enums
22383 is ignored for a fixed underlying type.
22384 (C++ Dialect Options): Likewise for -fstrict-enums.
22386 2023-05-17 Tobias Burnus <tobias@codesourcery.com>
22388 * gimplify.cc (gimplify_scan_omp_clauses): Remove Fortran
22391 2023-05-17 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
22393 * config/s390/s390.cc (TARGET_ATOMIC_ALIGN_FOR_MODE):
22395 (s390_atomic_align_for_mode): New.
22397 2023-05-17 Jakub Jelinek <jakub@redhat.com>
22399 * wide-int.cc (wi::from_array): Add missing closing paren in function
22402 2023-05-17 Kewen Lin <linkw@linux.ibm.com>
22404 * tree-vect-loop.cc (vect_analyze_loop_1): Don't retry analysis with
22405 suggested unroll factor once the previous analysis fails.
22407 2023-05-17 Pan Li <pan2.li@intel.com>
22409 * config/riscv/genrvv-type-indexer.cc (BOOL_SIZE_LIST): New
22411 (main): Add bool1 to the type indexer.
22412 * config/riscv/riscv-vector-builtins-functions.def
22413 (vreinterpret): Register vbool1 interpret function.
22414 * config/riscv/riscv-vector-builtins-types.def
22415 (DEF_RVV_BOOL1_INTERPRET_OPS): New macro.
22416 (vint8m1_t): Add the type to bool1_interpret_ops.
22417 (vint16m1_t): Ditto.
22418 (vint32m1_t): Ditto.
22419 (vint64m1_t): Ditto.
22420 (vuint8m1_t): Ditto.
22421 (vuint16m1_t): Ditto.
22422 (vuint32m1_t): Ditto.
22423 (vuint64m1_t): Ditto.
22424 * config/riscv/riscv-vector-builtins.cc
22425 (DEF_RVV_BOOL1_INTERPRET_OPS): New macro.
22426 (required_extensions_p): Add bool1 interpret case.
22427 * config/riscv/riscv-vector-builtins.def
22428 (bool1_interpret): Add bool1 interpret to base type.
22429 * config/riscv/vector.md (@vreinterpret<mode>): Add new expand
22430 with VB dest for vreinterpret.
22432 2023-05-17 Jiufu Guo <guojiufu@linux.ibm.com>
22435 * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Support building
22436 constants through "lis; xoris".
22438 2023-05-16 Ajit Kumar Agarwal <aagarwa1@linux.ibm.com>
22440 * common/config/rs6000/rs6000-common.cc: Add REE pass as a
22441 default rs6000 target pass for O2 and above.
22442 * doc/invoke.texi: Document -free
22444 2023-05-16 Kito Cheng <kito.cheng@sifive.com>
22446 * common/config/riscv/riscv-common.cc (riscv_compute_multilib):
22447 Fix wrong select_kind...
22449 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
22451 * config/s390/s390-protos.h (s390_expand_setmem): Change
22452 function signature.
22453 * config/s390/s390.cc (s390_expand_setmem): For memset's less
22454 than or equal to 256 byte do not perform a libc call.
22455 * config/s390/s390.md: Change expander into a version which
22458 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
22460 * config/s390/s390-protos.h (s390_expand_movmem): New.
22461 * config/s390/s390.cc (s390_expand_movmem): New.
22462 * config/s390/s390.md (movmem<mode>): New.
22466 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
22468 * config/s390/s390-protos.h (s390_expand_cpymem): Change
22469 function signature.
22470 * config/s390/s390.cc (s390_expand_cpymem): For memcpy's less
22471 than or equal to 256 byte do not perform a libc call.
22472 (s390_expand_insv): Adapt new function signature of
22473 s390_expand_cpymem.
22474 * config/s390/s390.md: Change expander into a version which
22477 2023-05-16 Andrew Pinski <apinski@marvell.com>
22479 PR tree-optimization/109424
22480 * match.pd: Add patterns for min/max of zero_one_valued
22483 2023-05-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22485 * config/riscv/riscv-protos.h (enum frm_field_enum): New enum.
22486 * config/riscv/riscv-vector-builtins.cc
22487 (function_expander::use_ternop_insn): Add default rounding mode.
22488 (function_expander::use_widen_ternop_insn): Ditto.
22489 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Add FRM REGNUM.
22490 (riscv_hard_regno_mode_ok): Ditto.
22491 (riscv_conditional_register_usage): Ditto.
22492 * config/riscv/riscv.h (DWARF_FRAME_REGNUM): Ditto.
22493 (FRM_REG_P): Ditto.
22494 (RISCV_DWARF_FRM): Ditto.
22495 * config/riscv/riscv.md: Ditto.
22496 * config/riscv/vector-iterators.md: split no frm and has frm operations.
22497 * config/riscv/vector.md (@pred_<optab><mode>_scalar): New pattern.
22498 (@pred_<optab><mode>): Ditto.
22500 2023-05-15 Aldy Hernandez <aldyh@redhat.com>
22502 PR tree-optimization/109695
22503 * value-range.cc (irange::operator=): Resize range.
22504 (irange::union_): Same.
22505 (irange::intersect): Same.
22506 (irange::invert): Same.
22507 (int_range_max): Default to 3 sub-ranges and resize as needed.
22508 * value-range.h (irange::maybe_resize): New.
22510 (int_range::int_range): Adjust for resizing.
22511 (int_range::operator=): Same.
22513 2023-05-15 Aldy Hernandez <aldyh@redhat.com>
22515 * ipa-cp.cc (ipcp_vr_lattice::meet_with_1): Avoid unnecessary
22517 * value-range.cc (irange::union_nonzero_bits): Return TRUE only
22518 when range changed.
22520 2023-05-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22522 * config/riscv/riscv-protos.h (enum vxrm_field_enum): New enum.
22523 * config/riscv/riscv-vector-builtins.cc
22524 (function_expander::use_exact_insn): Add default rounding mode operand.
22525 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Add VXRM_REGNUM.
22526 (riscv_hard_regno_mode_ok): Ditto.
22527 (riscv_conditional_register_usage): Ditto.
22528 * config/riscv/riscv.h (DWARF_FRAME_REGNUM): Ditto.
22529 (VXRM_REG_P): Ditto.
22530 (RISCV_DWARF_VXRM): Ditto.
22531 * config/riscv/riscv.md: Ditto.
22532 * config/riscv/vector.md: Ditto
22534 2023-05-15 Pan Li <pan2.li@intel.com>
22536 * optabs.cc (maybe_gen_insn): Add case to generate instruction
22537 that has 11 operands.
22539 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
22541 * config/aarch64/aarch64.cc (aarch64_rtx_costs, NEG case): Add costing
22542 logic for vector modes.
22544 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
22547 * config/aarch64/aarch64-simd.md (aarch64_cm<optab><mode>): Rename to...
22548 (aarch64_cm<optab><mode><vczle><vczbe>): ... This.
22549 (aarch64_cmtst<mode>): Rename to...
22550 (aarch64_cmtst<mode><vczle><vczbe>): ... This.
22551 (*aarch64_cmtst_same_<mode>): Rename to...
22552 (*aarch64_cmtst_same_<mode><vczle><vczbe>): ... This.
22553 (*aarch64_cmtstdi): Rename to...
22554 (*aarch64_cmtstdi<vczle><vczbe>): ... This.
22555 (aarch64_fac<optab><mode>): Rename to...
22556 (aarch64_fac<optab><mode><vczle><vczbe>): ... This.
22558 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
22561 * config/aarch64/aarch64-simd.md (aarch64_s<optab><mode>): Rename to...
22562 (aarch64_s<optab><mode><vczle><vczbe>): ... This.
22564 2023-05-15 Pan Li <pan2.li@intel.com>
22565 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22566 kito-cheng <kito.cheng@sifive.com>
22568 * config/riscv/riscv-v.cc (const_vlmax_p): New function for
22569 deciding the mode is constant or not.
22570 (set_len_and_policy): Optimize VLS-VLMAX code gen to vsetivli.
22572 2023-05-15 Richard Biener <rguenther@suse.de>
22574 PR tree-optimization/109848
22575 * tree-ssa-forwprop.cc (pass_forwprop::execute): Put the
22576 TARGET_MEM_REF address preparation before the store, not
22579 2023-05-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22581 * config/riscv/riscv.cc
22582 (riscv_vectorize_preferred_vector_alignment): New function.
22583 (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): New target hook.
22585 2023-05-14 Andrew Pinski <apinski@marvell.com>
22587 PR tree-optimization/109829
22588 * match.pd: Add pattern for `signbit(x) !=/== 0 ? x : -x`.
22590 2023-05-14 Uros Bizjak <ubizjak@gmail.com>
22593 * config/i386/i386.cc: Revert the 2023-05-11 change.
22594 (ix86_widen_mult_cost): Return high value instead of
22595 ICEing for unsupported modes.
22597 2023-05-14 Ard Biesheuvel <ardb@kernel.org>
22599 * config/i386/i386.cc (x86_function_profiler): Take
22600 ix86_direct_extern_access into account when generating calls
22603 2023-05-14 Pan Li <pan2.li@intel.com>
22605 * config/riscv/riscv-vector-builtins.cc (required_extensions_p):
22606 Refactor the or pattern to switch cases.
22608 2023-05-13 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
22610 * config/aarch64/aarch64.cc (aarch64_expand_vector_init_fallback): Rename
22611 aarch64_expand_vector_init to this, and remove interleaving case.
22612 Recursively call aarch64_expand_vector_init_fallback, instead of
22613 aarch64_expand_vector_init.
22614 (aarch64_unzip_vector_init): New function.
22615 (aarch64_expand_vector_init): Likewise.
22617 2023-05-13 Kito Cheng <kito.cheng@sifive.com>
22619 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_insns):
22620 Pull out function call from the gcc_assert.
22622 2023-05-13 Kito Cheng <kito.cheng@sifive.com>
22624 * config/riscv/riscv-vsetvl.cc (vlmul_to_str): New.
22625 (policy_to_str): New.
22626 (vector_insn_info::dump): Use vlmul_to_str and policy_to_str.
22628 2023-05-13 Andrew Pinski <apinski@marvell.com>
22630 PR tree-optimization/109834
22631 * match.pd (popcount(bswap(x))->popcount(x)): Fix up unsigned type checking.
22632 (popcount(rotate(x,y))->popcount(x)): Likewise.
22634 2023-05-12 Uros Bizjak <ubizjak@gmail.com>
22636 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2): Also
22637 reject ymm instructions for TARGET_PREFER_AVX128. Use generic
22638 gen_extend_insn to generate zero/sign extension instructions.
22640 (ix86_expand_vecop_qihi): Initialize interleave functions
22641 for MULT code only. Fix comments.
22643 2023-05-12 Uros Bizjak <ubizjak@gmail.com>
22646 * config/i386/mmx.md (mulv2si3): Remove expander.
22647 (mulv2si3): Rename insn pattern from *mulv2si.
22649 2023-05-12 Tobias Burnus <tobias@codesourcery.com>
22651 PR libstdc++/109816
22652 * lto-cgraph.cc (output_symtab): Guard lto_output_toplevel_asms by
22653 '!lto_stream_offload_p'.
22655 2023-05-12 Kito Cheng <kito.cheng@sifive.com>
22656 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22659 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::get_vsetvl_at_end): New.
22660 (local_avl_compatible_p): New.
22661 (pass_vsetvl::local_eliminate_vsetvl_insn): Enhance local optimizations
22662 for LCM, rewrite as a backward algorithm.
22663 (pass_vsetvl::cleanup_insns): Use new local_eliminate_vsetvl_insn
22664 interface, handle a BB at once.
22666 2023-05-12 Richard Biener <rguenther@suse.de>
22668 PR tree-optimization/64731
22669 * tree-ssa-forwprop.cc (pass_forwprop::execute): Also
22670 handle TARGET_MEM_REF destinations of stores from vector
22673 2023-05-12 Richard Biener <rguenther@suse.de>
22675 PR tree-optimization/109791
22676 * match.pd (minus (convert ADDR_EXPR@0) (convert (pointer_plus @1 @2))):
22678 (minus (convert (pointer_plus @1 @2)) (convert ADDR_EXPR@0)):
22681 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
22683 * config/arm/arm-mve-builtins-base.cc (vsriq): New.
22684 * config/arm/arm-mve-builtins-base.def (vsriq): New.
22685 * config/arm/arm-mve-builtins-base.h (vsriq): New.
22686 * config/arm/arm-mve-builtins.cc
22687 (function_instance::has_inactive_argument): Handle vsriq.
22688 * config/arm/arm_mve.h (vsriq): Remove.
22690 (vsriq_n_u8): Remove.
22691 (vsriq_n_s8): Remove.
22692 (vsriq_n_u16): Remove.
22693 (vsriq_n_s16): Remove.
22694 (vsriq_n_u32): Remove.
22695 (vsriq_n_s32): Remove.
22696 (vsriq_m_n_s8): Remove.
22697 (vsriq_m_n_u8): Remove.
22698 (vsriq_m_n_s16): Remove.
22699 (vsriq_m_n_u16): Remove.
22700 (vsriq_m_n_s32): Remove.
22701 (vsriq_m_n_u32): Remove.
22702 (__arm_vsriq_n_u8): Remove.
22703 (__arm_vsriq_n_s8): Remove.
22704 (__arm_vsriq_n_u16): Remove.
22705 (__arm_vsriq_n_s16): Remove.
22706 (__arm_vsriq_n_u32): Remove.
22707 (__arm_vsriq_n_s32): Remove.
22708 (__arm_vsriq_m_n_s8): Remove.
22709 (__arm_vsriq_m_n_u8): Remove.
22710 (__arm_vsriq_m_n_s16): Remove.
22711 (__arm_vsriq_m_n_u16): Remove.
22712 (__arm_vsriq_m_n_s32): Remove.
22713 (__arm_vsriq_m_n_u32): Remove.
22714 (__arm_vsriq): Remove.
22715 (__arm_vsriq_m): Remove.
22717 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
22719 * config/arm/iterators.md (mve_insn): Add vsri.
22720 * config/arm/mve.md (mve_vsriq_n_<supf><mode>): Rename into ...
22721 (@mve_<mve_insn>q_n_<supf><mode>): .,. this.
22722 (mve_vsriq_m_n_<supf><mode>): Rename into ...
22723 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
22725 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
22727 * config/arm/arm-mve-builtins-shapes.cc (ternary_rshift): New.
22728 * config/arm/arm-mve-builtins-shapes.h (ternary_rshift): New.
22730 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
22732 * config/arm/arm-mve-builtins-base.cc (vsliq): New.
22733 * config/arm/arm-mve-builtins-base.def (vsliq): New.
22734 * config/arm/arm-mve-builtins-base.h (vsliq): New.
22735 * config/arm/arm-mve-builtins.cc
22736 (function_instance::has_inactive_argument): Handle vsliq.
22737 * config/arm/arm_mve.h (vsliq): Remove.
22739 (vsliq_n_u8): Remove.
22740 (vsliq_n_s8): Remove.
22741 (vsliq_n_u16): Remove.
22742 (vsliq_n_s16): Remove.
22743 (vsliq_n_u32): Remove.
22744 (vsliq_n_s32): Remove.
22745 (vsliq_m_n_s8): Remove.
22746 (vsliq_m_n_s32): Remove.
22747 (vsliq_m_n_s16): Remove.
22748 (vsliq_m_n_u8): Remove.
22749 (vsliq_m_n_u32): Remove.
22750 (vsliq_m_n_u16): Remove.
22751 (__arm_vsliq_n_u8): Remove.
22752 (__arm_vsliq_n_s8): Remove.
22753 (__arm_vsliq_n_u16): Remove.
22754 (__arm_vsliq_n_s16): Remove.
22755 (__arm_vsliq_n_u32): Remove.
22756 (__arm_vsliq_n_s32): Remove.
22757 (__arm_vsliq_m_n_s8): Remove.
22758 (__arm_vsliq_m_n_s32): Remove.
22759 (__arm_vsliq_m_n_s16): Remove.
22760 (__arm_vsliq_m_n_u8): Remove.
22761 (__arm_vsliq_m_n_u32): Remove.
22762 (__arm_vsliq_m_n_u16): Remove.
22763 (__arm_vsliq): Remove.
22764 (__arm_vsliq_m): Remove.
22766 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
22768 * config/arm/iterators.md (mve_insn>): Add vsli.
22769 * config/arm/mve.md (mve_vsliq_n_<supf><mode>): Rename into ...
22770 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
22771 (mve_vsliq_m_n_<supf><mode>): Rename into ...
22772 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
22774 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
22776 * config/arm/arm-mve-builtins-shapes.cc (ternary_lshift): New.
22777 * config/arm/arm-mve-builtins-shapes.h (ternary_lshift): New.
22779 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
22781 * config/arm/arm-mve-builtins-base.cc (vpselq): New.
22782 * config/arm/arm-mve-builtins-base.def (vpselq): New.
22783 * config/arm/arm-mve-builtins-base.h (vpselq): New.
22784 * config/arm/arm_mve.h (vpselq): Remove.
22785 (vpselq_u8): Remove.
22786 (vpselq_s8): Remove.
22787 (vpselq_u16): Remove.
22788 (vpselq_s16): Remove.
22789 (vpselq_u32): Remove.
22790 (vpselq_s32): Remove.
22791 (vpselq_u64): Remove.
22792 (vpselq_s64): Remove.
22793 (vpselq_f16): Remove.
22794 (vpselq_f32): Remove.
22795 (__arm_vpselq_u8): Remove.
22796 (__arm_vpselq_s8): Remove.
22797 (__arm_vpselq_u16): Remove.
22798 (__arm_vpselq_s16): Remove.
22799 (__arm_vpselq_u32): Remove.
22800 (__arm_vpselq_s32): Remove.
22801 (__arm_vpselq_u64): Remove.
22802 (__arm_vpselq_s64): Remove.
22803 (__arm_vpselq_f16): Remove.
22804 (__arm_vpselq_f32): Remove.
22805 (__arm_vpselq): Remove.
22807 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
22809 * config/arm/arm-mve-builtins-shapes.cc (vpsel): New.
22810 * config/arm/arm-mve-builtins-shapes.h (vpsel): New.
22812 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
22814 * config/arm/arm.cc (arm_expand_vcond): Use gen_mve_q instead of
22816 * config/arm/iterators.md (MVE_VPSELQ_F): New.
22817 (mve_insn): Add vpsel.
22818 * config/arm/mve.md (@mve_vpselq_<supf><mode>): Rename into ...
22819 (@mve_<mve_insn>q_<supf><mode>): ... this.
22820 (@mve_vpselq_f<mode>): Rename into ...
22821 (@mve_<mve_insn>q_f<mode>): ... this.
22823 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
22825 * config/arm/arm-mve-builtins-base.cc (vfmaq, vfmasq, vfmsq): New.
22826 * config/arm/arm-mve-builtins-base.def (vfmaq, vfmasq, vfmsq): New.
22827 * config/arm/arm-mve-builtins-base.h (vfmaq, vfmasq, vfmsq): New.
22828 * config/arm/arm-mve-builtins.cc
22829 (function_instance::has_inactive_argument): Handle vfmaq, vfmasq,
22831 * config/arm/arm_mve.h (vfmaq): Remove.
22835 (vfmasq_m): Remove.
22837 (vfmaq_f16): Remove.
22838 (vfmaq_n_f16): Remove.
22839 (vfmasq_n_f16): Remove.
22840 (vfmsq_f16): Remove.
22841 (vfmaq_f32): Remove.
22842 (vfmaq_n_f32): Remove.
22843 (vfmasq_n_f32): Remove.
22844 (vfmsq_f32): Remove.
22845 (vfmaq_m_f32): Remove.
22846 (vfmaq_m_f16): Remove.
22847 (vfmaq_m_n_f32): Remove.
22848 (vfmaq_m_n_f16): Remove.
22849 (vfmasq_m_n_f32): Remove.
22850 (vfmasq_m_n_f16): Remove.
22851 (vfmsq_m_f32): Remove.
22852 (vfmsq_m_f16): Remove.
22853 (__arm_vfmaq_f16): Remove.
22854 (__arm_vfmaq_n_f16): Remove.
22855 (__arm_vfmasq_n_f16): Remove.
22856 (__arm_vfmsq_f16): Remove.
22857 (__arm_vfmaq_f32): Remove.
22858 (__arm_vfmaq_n_f32): Remove.
22859 (__arm_vfmasq_n_f32): Remove.
22860 (__arm_vfmsq_f32): Remove.
22861 (__arm_vfmaq_m_f32): Remove.
22862 (__arm_vfmaq_m_f16): Remove.
22863 (__arm_vfmaq_m_n_f32): Remove.
22864 (__arm_vfmaq_m_n_f16): Remove.
22865 (__arm_vfmasq_m_n_f32): Remove.
22866 (__arm_vfmasq_m_n_f16): Remove.
22867 (__arm_vfmsq_m_f32): Remove.
22868 (__arm_vfmsq_m_f16): Remove.
22869 (__arm_vfmaq): Remove.
22870 (__arm_vfmasq): Remove.
22871 (__arm_vfmsq): Remove.
22872 (__arm_vfmaq_m): Remove.
22873 (__arm_vfmasq_m): Remove.
22874 (__arm_vfmsq_m): Remove.
22876 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
22878 * config/arm/iterators.md (MVE_FP_M_BINARY): Add VFMAQ_M_F,
22880 (MVE_FP_M_N_BINARY): Add VFMAQ_M_N_F, VFMASQ_M_N_F.
22881 (MVE_VFMxQ_F, MVE_VFMAxQ_N_F): New.
22882 (mve_insn): Add vfma, vfmas, vfms.
22883 * config/arm/mve.md (mve_vfmaq_f<mode>, mve_vfmsq_f<mode>): Merge
22885 (@mve_<mve_insn>q_f<mode>): ... this.
22886 (mve_vfmaq_n_f<mode>, mve_vfmasq_n_f<mode>): Merge into ...
22887 (@mve_<mve_insn>q_n_f<mode>): ... this.
22888 (mve_vfmaq_m_f<mode>, mve_vfmsq_m_f<mode>): Merge into
22889 @mve_<mve_insn>q_m_f<mode>.
22890 (mve_vfmaq_m_n_f<mode>, mve_vfmasq_m_n_f<mode>): Merge into
22891 @mve_<mve_insn>q_m_n_f<mode>.
22893 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
22895 * config/arm/arm-mve-builtins-shapes.cc (ternary_opt_n): New.
22896 * config/arm/arm-mve-builtins-shapes.h (ternary_opt_n): New.
22898 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
22900 * config/arm/arm-mve-builtins-base.cc
22901 (FUNCTION_WITH_RTX_M_N_NO_F): New.
22903 * config/arm/arm-mve-builtins-base.def (vmvnq): New.
22904 * config/arm/arm-mve-builtins-base.h (vmvnq): New.
22905 * config/arm/arm_mve.h (vmvnq): Remove.
22908 (vmvnq_s8): Remove.
22909 (vmvnq_s16): Remove.
22910 (vmvnq_s32): Remove.
22911 (vmvnq_n_s16): Remove.
22912 (vmvnq_n_s32): Remove.
22913 (vmvnq_u8): Remove.
22914 (vmvnq_u16): Remove.
22915 (vmvnq_u32): Remove.
22916 (vmvnq_n_u16): Remove.
22917 (vmvnq_n_u32): Remove.
22918 (vmvnq_m_u8): Remove.
22919 (vmvnq_m_s8): Remove.
22920 (vmvnq_m_u16): Remove.
22921 (vmvnq_m_s16): Remove.
22922 (vmvnq_m_u32): Remove.
22923 (vmvnq_m_s32): Remove.
22924 (vmvnq_m_n_s16): Remove.
22925 (vmvnq_m_n_u16): Remove.
22926 (vmvnq_m_n_s32): Remove.
22927 (vmvnq_m_n_u32): Remove.
22928 (vmvnq_x_s8): Remove.
22929 (vmvnq_x_s16): Remove.
22930 (vmvnq_x_s32): Remove.
22931 (vmvnq_x_u8): Remove.
22932 (vmvnq_x_u16): Remove.
22933 (vmvnq_x_u32): Remove.
22934 (vmvnq_x_n_s16): Remove.
22935 (vmvnq_x_n_s32): Remove.
22936 (vmvnq_x_n_u16): Remove.
22937 (vmvnq_x_n_u32): Remove.
22938 (__arm_vmvnq_s8): Remove.
22939 (__arm_vmvnq_s16): Remove.
22940 (__arm_vmvnq_s32): Remove.
22941 (__arm_vmvnq_n_s16): Remove.
22942 (__arm_vmvnq_n_s32): Remove.
22943 (__arm_vmvnq_u8): Remove.
22944 (__arm_vmvnq_u16): Remove.
22945 (__arm_vmvnq_u32): Remove.
22946 (__arm_vmvnq_n_u16): Remove.
22947 (__arm_vmvnq_n_u32): Remove.
22948 (__arm_vmvnq_m_u8): Remove.
22949 (__arm_vmvnq_m_s8): Remove.
22950 (__arm_vmvnq_m_u16): Remove.
22951 (__arm_vmvnq_m_s16): Remove.
22952 (__arm_vmvnq_m_u32): Remove.
22953 (__arm_vmvnq_m_s32): Remove.
22954 (__arm_vmvnq_m_n_s16): Remove.
22955 (__arm_vmvnq_m_n_u16): Remove.
22956 (__arm_vmvnq_m_n_s32): Remove.
22957 (__arm_vmvnq_m_n_u32): Remove.
22958 (__arm_vmvnq_x_s8): Remove.
22959 (__arm_vmvnq_x_s16): Remove.
22960 (__arm_vmvnq_x_s32): Remove.
22961 (__arm_vmvnq_x_u8): Remove.
22962 (__arm_vmvnq_x_u16): Remove.
22963 (__arm_vmvnq_x_u32): Remove.
22964 (__arm_vmvnq_x_n_s16): Remove.
22965 (__arm_vmvnq_x_n_s32): Remove.
22966 (__arm_vmvnq_x_n_u16): Remove.
22967 (__arm_vmvnq_x_n_u32): Remove.
22968 (__arm_vmvnq): Remove.
22969 (__arm_vmvnq_m): Remove.
22970 (__arm_vmvnq_x): Remove.
22972 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
22974 * config/arm/iterators.md (mve_insn): Add vmvn.
22975 * config/arm/mve.md (mve_vmvnq_n_<supf><mode>): Rename into ...
22976 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
22977 (mve_vmvnq_m_<supf><mode>): Rename into ...
22978 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
22979 (mve_vmvnq_m_n_<supf><mode>): Rename into ...
22980 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
22982 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
22984 * config/arm/arm-mve-builtins-shapes.cc (mvn): New.
22985 * config/arm/arm-mve-builtins-shapes.h (mvn): New.
22987 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
22989 * config/arm/arm-mve-builtins-base.cc (vbrsrq): New.
22990 * config/arm/arm-mve-builtins-base.def (vbrsrq): New.
22991 * config/arm/arm-mve-builtins-base.h (vbrsrq): New.
22992 * config/arm/arm_mve.h (vbrsrq): Remove.
22993 (vbrsrq_m): Remove.
22994 (vbrsrq_x): Remove.
22995 (vbrsrq_n_f16): Remove.
22996 (vbrsrq_n_f32): Remove.
22997 (vbrsrq_n_u8): Remove.
22998 (vbrsrq_n_s8): Remove.
22999 (vbrsrq_n_u16): Remove.
23000 (vbrsrq_n_s16): Remove.
23001 (vbrsrq_n_u32): Remove.
23002 (vbrsrq_n_s32): Remove.
23003 (vbrsrq_m_n_s8): Remove.
23004 (vbrsrq_m_n_s32): Remove.
23005 (vbrsrq_m_n_s16): Remove.
23006 (vbrsrq_m_n_u8): Remove.
23007 (vbrsrq_m_n_u32): Remove.
23008 (vbrsrq_m_n_u16): Remove.
23009 (vbrsrq_m_n_f32): Remove.
23010 (vbrsrq_m_n_f16): Remove.
23011 (vbrsrq_x_n_s8): Remove.
23012 (vbrsrq_x_n_s16): Remove.
23013 (vbrsrq_x_n_s32): Remove.
23014 (vbrsrq_x_n_u8): Remove.
23015 (vbrsrq_x_n_u16): Remove.
23016 (vbrsrq_x_n_u32): Remove.
23017 (vbrsrq_x_n_f16): Remove.
23018 (vbrsrq_x_n_f32): Remove.
23019 (__arm_vbrsrq_n_u8): Remove.
23020 (__arm_vbrsrq_n_s8): Remove.
23021 (__arm_vbrsrq_n_u16): Remove.
23022 (__arm_vbrsrq_n_s16): Remove.
23023 (__arm_vbrsrq_n_u32): Remove.
23024 (__arm_vbrsrq_n_s32): Remove.
23025 (__arm_vbrsrq_m_n_s8): Remove.
23026 (__arm_vbrsrq_m_n_s32): Remove.
23027 (__arm_vbrsrq_m_n_s16): Remove.
23028 (__arm_vbrsrq_m_n_u8): Remove.
23029 (__arm_vbrsrq_m_n_u32): Remove.
23030 (__arm_vbrsrq_m_n_u16): Remove.
23031 (__arm_vbrsrq_x_n_s8): Remove.
23032 (__arm_vbrsrq_x_n_s16): Remove.
23033 (__arm_vbrsrq_x_n_s32): Remove.
23034 (__arm_vbrsrq_x_n_u8): Remove.
23035 (__arm_vbrsrq_x_n_u16): Remove.
23036 (__arm_vbrsrq_x_n_u32): Remove.
23037 (__arm_vbrsrq_n_f16): Remove.
23038 (__arm_vbrsrq_n_f32): Remove.
23039 (__arm_vbrsrq_m_n_f32): Remove.
23040 (__arm_vbrsrq_m_n_f16): Remove.
23041 (__arm_vbrsrq_x_n_f16): Remove.
23042 (__arm_vbrsrq_x_n_f32): Remove.
23043 (__arm_vbrsrq): Remove.
23044 (__arm_vbrsrq_m): Remove.
23045 (__arm_vbrsrq_x): Remove.
23047 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
23049 * config/arm/iterators.md (MVE_VBRSR_M_N_FP, MVE_VBRSR_N_FP): New.
23050 (mve_insn): Add vbrsr.
23051 * config/arm/mve.md (mve_vbrsrq_n_f<mode>): Rename into ...
23052 (@mve_<mve_insn>q_n_f<mode>): ... this.
23053 (mve_vbrsrq_n_<supf><mode>): Rename into ...
23054 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
23055 (mve_vbrsrq_m_n_<supf><mode>): Rename into ...
23056 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
23057 (mve_vbrsrq_m_n_f<mode>): Rename into ...
23058 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
23060 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
23062 * config/arm/arm-mve-builtins-shapes.cc (binary_imm32): New.
23063 * config/arm/arm-mve-builtins-shapes.h (binary_imm32): New.
23065 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
23067 * config/arm/arm-mve-builtins-base.cc (vqshluq): New.
23068 * config/arm/arm-mve-builtins-base.def (vqshluq): New.
23069 * config/arm/arm-mve-builtins-base.h (vqshluq): New.
23070 * config/arm/arm_mve.h (vqshluq): Remove.
23071 (vqshluq_m): Remove.
23072 (vqshluq_n_s8): Remove.
23073 (vqshluq_n_s16): Remove.
23074 (vqshluq_n_s32): Remove.
23075 (vqshluq_m_n_s8): Remove.
23076 (vqshluq_m_n_s16): Remove.
23077 (vqshluq_m_n_s32): Remove.
23078 (__arm_vqshluq_n_s8): Remove.
23079 (__arm_vqshluq_n_s16): Remove.
23080 (__arm_vqshluq_n_s32): Remove.
23081 (__arm_vqshluq_m_n_s8): Remove.
23082 (__arm_vqshluq_m_n_s16): Remove.
23083 (__arm_vqshluq_m_n_s32): Remove.
23084 (__arm_vqshluq): Remove.
23085 (__arm_vqshluq_m): Remove.
23087 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
23089 * config/arm/iterators.md (mve_insn): Add vqshlu.
23090 (supf): Add VQSHLUQ_M_N_S, VQSHLUQ_N_S.
23091 (VQSHLUQ_M_N, VQSHLUQ_N): New.
23092 * config/arm/mve.md (mve_vqshluq_n_s<mode>): Change name into ...
23093 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
23094 (mve_vqshluq_m_n_s<mode>): Change name into ...
23095 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
23097 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
23099 * config/arm/arm-mve-builtins-shapes.cc
23100 (binary_lshift_unsigned): New.
23101 * config/arm/arm-mve-builtins-shapes.h
23102 (binary_lshift_unsigned): New.
23104 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
23106 * config/arm/arm-mve-builtins-base.cc (vrmlaldavhaq)
23107 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
23108 * config/arm/arm-mve-builtins-base.def (vrmlaldavhaq)
23109 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
23110 * config/arm/arm-mve-builtins-base.h (vrmlaldavhaq)
23111 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
23112 * config/arm/arm-mve-builtins-functions.h: Handle vrmlaldavhaq,
23113 vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq.
23114 * config/arm/arm_mve.h (vrmlaldavhaq): Remove.
23115 (vrmlaldavhaxq): Remove.
23116 (vrmlsldavhaq): Remove.
23117 (vrmlsldavhaxq): Remove.
23118 (vrmlaldavhaq_p): Remove.
23119 (vrmlaldavhaxq_p): Remove.
23120 (vrmlsldavhaq_p): Remove.
23121 (vrmlsldavhaxq_p): Remove.
23122 (vrmlaldavhaq_s32): Remove.
23123 (vrmlaldavhaq_u32): Remove.
23124 (vrmlaldavhaxq_s32): Remove.
23125 (vrmlsldavhaq_s32): Remove.
23126 (vrmlsldavhaxq_s32): Remove.
23127 (vrmlaldavhaq_p_s32): Remove.
23128 (vrmlaldavhaq_p_u32): Remove.
23129 (vrmlaldavhaxq_p_s32): Remove.
23130 (vrmlsldavhaq_p_s32): Remove.
23131 (vrmlsldavhaxq_p_s32): Remove.
23132 (__arm_vrmlaldavhaq_s32): Remove.
23133 (__arm_vrmlaldavhaq_u32): Remove.
23134 (__arm_vrmlaldavhaxq_s32): Remove.
23135 (__arm_vrmlsldavhaq_s32): Remove.
23136 (__arm_vrmlsldavhaxq_s32): Remove.
23137 (__arm_vrmlaldavhaq_p_s32): Remove.
23138 (__arm_vrmlaldavhaq_p_u32): Remove.
23139 (__arm_vrmlaldavhaxq_p_s32): Remove.
23140 (__arm_vrmlsldavhaq_p_s32): Remove.
23141 (__arm_vrmlsldavhaxq_p_s32): Remove.
23142 (__arm_vrmlaldavhaq): Remove.
23143 (__arm_vrmlaldavhaxq): Remove.
23144 (__arm_vrmlsldavhaq): Remove.
23145 (__arm_vrmlsldavhaxq): Remove.
23146 (__arm_vrmlaldavhaq_p): Remove.
23147 (__arm_vrmlaldavhaxq_p): Remove.
23148 (__arm_vrmlsldavhaq_p): Remove.
23149 (__arm_vrmlsldavhaxq_p): Remove.
23151 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
23153 * config/arm/iterators.md (MVE_VRMLxLDAVHAxQ)
23154 (MVE_VRMLxLDAVHAxQ_P): New.
23155 (mve_insn): Add vrmlaldavha, vrmlaldavhax, vrmlsldavha,
23157 (supf): Add VRMLALDAVHAXQ_P_S, VRMLALDAVHAXQ_S, VRMLSLDAVHAQ_P_S,
23158 VRMLSLDAVHAQ_S, VRMLSLDAVHAXQ_P_S, VRMLSLDAVHAXQ_S,
23160 * config/arm/mve.md (mve_vrmlaldavhaq_<supf>v4si)
23161 (mve_vrmlaldavhaxq_sv4si, mve_vrmlsldavhaxq_sv4si)
23162 (mve_vrmlsldavhaq_sv4si): Merge into ...
23163 (@mve_<mve_insn>q_<supf>v4si): ... this.
23164 (mve_vrmlaldavhaq_p_sv4si, mve_vrmlaldavhaq_p_uv4si)
23165 (mve_vrmlaldavhaxq_p_sv4si, mve_vrmlsldavhaq_p_sv4si)
23166 (mve_vrmlsldavhaxq_p_sv4si): Merge into ...
23167 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
23169 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
23171 * config/arm/arm-mve-builtins-base.cc (vqdmullbq, vqdmulltq): New.
23172 * config/arm/arm-mve-builtins-base.def (vqdmullbq, vqdmulltq):
23174 * config/arm/arm-mve-builtins-base.h (vqdmullbq, vqdmulltq): New.
23175 * config/arm/arm_mve.h (vqdmulltq): Remove.
23176 (vqdmullbq): Remove.
23177 (vqdmullbq_m): Remove.
23178 (vqdmulltq_m): Remove.
23179 (vqdmulltq_s16): Remove.
23180 (vqdmulltq_n_s16): Remove.
23181 (vqdmullbq_s16): Remove.
23182 (vqdmullbq_n_s16): Remove.
23183 (vqdmulltq_s32): Remove.
23184 (vqdmulltq_n_s32): Remove.
23185 (vqdmullbq_s32): Remove.
23186 (vqdmullbq_n_s32): Remove.
23187 (vqdmullbq_m_n_s32): Remove.
23188 (vqdmullbq_m_n_s16): Remove.
23189 (vqdmullbq_m_s32): Remove.
23190 (vqdmullbq_m_s16): Remove.
23191 (vqdmulltq_m_n_s32): Remove.
23192 (vqdmulltq_m_n_s16): Remove.
23193 (vqdmulltq_m_s32): Remove.
23194 (vqdmulltq_m_s16): Remove.
23195 (__arm_vqdmulltq_s16): Remove.
23196 (__arm_vqdmulltq_n_s16): Remove.
23197 (__arm_vqdmullbq_s16): Remove.
23198 (__arm_vqdmullbq_n_s16): Remove.
23199 (__arm_vqdmulltq_s32): Remove.
23200 (__arm_vqdmulltq_n_s32): Remove.
23201 (__arm_vqdmullbq_s32): Remove.
23202 (__arm_vqdmullbq_n_s32): Remove.
23203 (__arm_vqdmullbq_m_n_s32): Remove.
23204 (__arm_vqdmullbq_m_n_s16): Remove.
23205 (__arm_vqdmullbq_m_s32): Remove.
23206 (__arm_vqdmullbq_m_s16): Remove.
23207 (__arm_vqdmulltq_m_n_s32): Remove.
23208 (__arm_vqdmulltq_m_n_s16): Remove.
23209 (__arm_vqdmulltq_m_s32): Remove.
23210 (__arm_vqdmulltq_m_s16): Remove.
23211 (__arm_vqdmulltq): Remove.
23212 (__arm_vqdmullbq): Remove.
23213 (__arm_vqdmullbq_m): Remove.
23214 (__arm_vqdmulltq_m): Remove.
23216 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
23218 * config/arm/iterators.md (MVE_VQDMULLxQ, MVE_VQDMULLxQ_M)
23219 (MVE_VQDMULLxQ_M_N, MVE_VQDMULLxQ_N): New.
23220 (mve_insn): Add vqdmullb, vqdmullt.
23221 (supf): Add VQDMULLBQ_S, VQDMULLBQ_M_S, VQDMULLBQ_M_N_S,
23222 VQDMULLBQ_N_S, VQDMULLTQ_S, VQDMULLTQ_M_S, VQDMULLTQ_M_N_S,
23224 * config/arm/mve.md (mve_vqdmullbq_n_s<mode>)
23225 (mve_vqdmulltq_n_s<mode>): Merge into ...
23226 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
23227 (mve_vqdmullbq_s<mode>, mve_vqdmulltq_s<mode>): Merge into ...
23228 (@mve_<mve_insn>q_<supf><mode>): ... this.
23229 (mve_vqdmullbq_m_n_s<mode>, mve_vqdmulltq_m_n_s<mode>): Merge into
23231 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
23232 (mve_vqdmullbq_m_s<mode>, mve_vqdmulltq_m_s<mode>): Merge into ...
23233 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
23235 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
23237 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_opt_n): New.
23238 * config/arm/arm-mve-builtins-shapes.h (binary_widen_opt_n): New.
23240 2023-05-12 Kito Cheng <kito.cheng@sifive.com>
23242 * common/config/riscv/riscv-common.cc (riscv_select_multilib_by_abi):
23243 Drop unused parameter.
23244 (riscv_select_multilib): Ditto.
23245 (riscv_compute_multilib): Update call site of
23246 riscv_select_multilib_by_abi and riscv_select_multilib_by_abi.
23248 2023-05-12 Juzhe Zhong <juzhe.zhong@rivai.ai>
23250 * config/riscv/autovec.md (vec_init<mode><vel>): New pattern.
23251 * config/riscv/riscv-protos.h (expand_vec_init): New function.
23252 * config/riscv/riscv-v.cc (class rvv_builder): New class.
23253 (rvv_builder::can_duplicate_repeating_sequence_p): New function.
23254 (rvv_builder::get_merged_repeating_sequence): Ditto.
23255 (expand_vector_init_insert_elems): Ditto.
23256 (expand_vec_init): Ditto.
23257 * config/riscv/vector-iterators.md: New attribute.
23259 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
23261 * config/rs6000/rs6000-builtins.def
23262 (__builtin_vsx_scalar_insert_exp): Replace bif-pattern from xsiexpdp
23264 (__builtin_vsx_scalar_insert_exp_dp): Replace bif-pattern from
23265 xsiexpdpf to xsiexpdpf_di.
23266 * config/rs6000/vsx.md (xsiexpdp): Rename to...
23267 (xsiexpdp_<mode>): ..., set the mode of second operand to GPR and
23268 replace TARGET_64BIT with TARGET_POWERPC64.
23269 (xsiexpdpf): Rename to...
23270 (xsiexpdpf_<mode>): ..., set the mode of second operand to GPR and
23271 replace TARGET_64BIT with TARGET_POWERPC64.
23273 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
23275 * config/rs6000/rs6000-builtins.def
23276 (__builtin_vsx_scalar_extract_sig): Set return type to const signed
23278 * config/rs6000/vsx.md (xsxsigdp): Replace TARGET_64BIT with
23281 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
23283 * config/rs6000/rs6000-builtins.def
23284 (__builtin_vsx_scalar_extract_exp): Set return type to const signed
23285 int and set its bif-pattern to xsxexpdp_si, move it from power9-64
23287 * config/rs6000/vsx.md (xsxexpdp): Rename to ...
23288 (xsxexpdp_<mode>): ..., set mode of operand 0 to GPR and remove
23289 TARGET_64BIT check.
23290 * doc/extend.texi (scalar_extract_exp): Remove 64-bit environment
23291 requirement when it has a 64-bit argument.
23293 2023-05-12 Pan Li <pan2.li@intel.com>
23294 Richard Sandiford <richard.sandiford@arm.com>
23295 Richard Biener <rguenther@suse.de>
23296 Jakub Jelinek <jakub@redhat.com>
23298 * mux-utils.h: Add overload operator == and != for pointer_mux.
23299 * var-tracking.cc: Included mux-utils.h for pointer_tmux.
23300 (decl_or_value): Changed from void * to pointer_mux<tree_node, rtx_def>.
23301 (dv_is_decl_p): Reconciled to the new type, aka pointer_mux.
23302 (dv_as_decl): Ditto.
23303 (dv_as_opaque): Removed due to unnecessary.
23304 (struct variable_hasher): Take decl_or_value as compare_type.
23305 (variable_hasher::equal): Diito.
23306 (dv_from_decl): Reconciled to the new type, aka pointer_mux.
23307 (dv_from_value): Ditto.
23308 (attrs_list_member): Ditto.
23309 (vars_copy): Ditto.
23310 (var_reg_decl_set): Ditto.
23311 (var_reg_delete_and_set): Ditto.
23312 (find_loc_in_1pdv): Ditto.
23313 (canonicalize_values_star): Ditto.
23314 (variable_post_merge_new_vals): Ditto.
23315 (dump_onepart_variable_differences): Ditto.
23316 (variable_different_p): Ditto.
23317 (set_slot_part): Ditto.
23318 (clobber_slot_part): Ditto.
23319 (clobber_variable_part): Ditto.
23321 2023-05-11 mtsamis <manolis.tsamis@vrull.eu>
23323 * match.pd: simplify vector shift + bit_and + multiply.
23325 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23327 * config/arm/arm-mve-builtins-base.cc (vmlaq, vmlasq, vqdmlahq)
23328 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
23329 * config/arm/arm-mve-builtins-base.def (vmlaq, vmlasq, vqdmlahq)
23330 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
23331 * config/arm/arm-mve-builtins-base.h (vmlaq, vmlasq, vqdmlahq)
23332 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
23333 * config/arm/arm-mve-builtins.cc
23334 (function_instance::has_inactive_argument): Handle vmlaq, vmlasq,
23335 vqdmlahq, vqdmlashq, vqrdmlahq, vqrdmlashq.
23336 * config/arm/arm_mve.h (vqrdmlashq): Remove.
23337 (vqrdmlahq): Remove.
23338 (vqdmlashq): Remove.
23339 (vqdmlahq): Remove.
23343 (vmlasq_m): Remove.
23344 (vqdmlashq_m): Remove.
23345 (vqdmlahq_m): Remove.
23346 (vqrdmlahq_m): Remove.
23347 (vqrdmlashq_m): Remove.
23348 (vmlasq_n_u8): Remove.
23349 (vmlaq_n_u8): Remove.
23350 (vqrdmlashq_n_s8): Remove.
23351 (vqrdmlahq_n_s8): Remove.
23352 (vqdmlahq_n_s8): Remove.
23353 (vqdmlashq_n_s8): Remove.
23354 (vmlasq_n_s8): Remove.
23355 (vmlaq_n_s8): Remove.
23356 (vmlasq_n_u16): Remove.
23357 (vmlaq_n_u16): Remove.
23358 (vqrdmlashq_n_s16): Remove.
23359 (vqrdmlahq_n_s16): Remove.
23360 (vqdmlashq_n_s16): Remove.
23361 (vqdmlahq_n_s16): Remove.
23362 (vmlasq_n_s16): Remove.
23363 (vmlaq_n_s16): Remove.
23364 (vmlasq_n_u32): Remove.
23365 (vmlaq_n_u32): Remove.
23366 (vqrdmlashq_n_s32): Remove.
23367 (vqrdmlahq_n_s32): Remove.
23368 (vqdmlashq_n_s32): Remove.
23369 (vqdmlahq_n_s32): Remove.
23370 (vmlasq_n_s32): Remove.
23371 (vmlaq_n_s32): Remove.
23372 (vmlaq_m_n_s8): Remove.
23373 (vmlaq_m_n_s32): Remove.
23374 (vmlaq_m_n_s16): Remove.
23375 (vmlaq_m_n_u8): Remove.
23376 (vmlaq_m_n_u32): Remove.
23377 (vmlaq_m_n_u16): Remove.
23378 (vmlasq_m_n_s8): Remove.
23379 (vmlasq_m_n_s32): Remove.
23380 (vmlasq_m_n_s16): Remove.
23381 (vmlasq_m_n_u8): Remove.
23382 (vmlasq_m_n_u32): Remove.
23383 (vmlasq_m_n_u16): Remove.
23384 (vqdmlashq_m_n_s8): Remove.
23385 (vqdmlashq_m_n_s32): Remove.
23386 (vqdmlashq_m_n_s16): Remove.
23387 (vqdmlahq_m_n_s8): Remove.
23388 (vqdmlahq_m_n_s32): Remove.
23389 (vqdmlahq_m_n_s16): Remove.
23390 (vqrdmlahq_m_n_s8): Remove.
23391 (vqrdmlahq_m_n_s32): Remove.
23392 (vqrdmlahq_m_n_s16): Remove.
23393 (vqrdmlashq_m_n_s8): Remove.
23394 (vqrdmlashq_m_n_s32): Remove.
23395 (vqrdmlashq_m_n_s16): Remove.
23396 (__arm_vmlasq_n_u8): Remove.
23397 (__arm_vmlaq_n_u8): Remove.
23398 (__arm_vqrdmlashq_n_s8): Remove.
23399 (__arm_vqdmlashq_n_s8): Remove.
23400 (__arm_vqrdmlahq_n_s8): Remove.
23401 (__arm_vqdmlahq_n_s8): Remove.
23402 (__arm_vmlasq_n_s8): Remove.
23403 (__arm_vmlaq_n_s8): Remove.
23404 (__arm_vmlasq_n_u16): Remove.
23405 (__arm_vmlaq_n_u16): Remove.
23406 (__arm_vqrdmlashq_n_s16): Remove.
23407 (__arm_vqdmlashq_n_s16): Remove.
23408 (__arm_vqrdmlahq_n_s16): Remove.
23409 (__arm_vqdmlahq_n_s16): Remove.
23410 (__arm_vmlasq_n_s16): Remove.
23411 (__arm_vmlaq_n_s16): Remove.
23412 (__arm_vmlasq_n_u32): Remove.
23413 (__arm_vmlaq_n_u32): Remove.
23414 (__arm_vqrdmlashq_n_s32): Remove.
23415 (__arm_vqdmlashq_n_s32): Remove.
23416 (__arm_vqrdmlahq_n_s32): Remove.
23417 (__arm_vqdmlahq_n_s32): Remove.
23418 (__arm_vmlasq_n_s32): Remove.
23419 (__arm_vmlaq_n_s32): Remove.
23420 (__arm_vmlaq_m_n_s8): Remove.
23421 (__arm_vmlaq_m_n_s32): Remove.
23422 (__arm_vmlaq_m_n_s16): Remove.
23423 (__arm_vmlaq_m_n_u8): Remove.
23424 (__arm_vmlaq_m_n_u32): Remove.
23425 (__arm_vmlaq_m_n_u16): Remove.
23426 (__arm_vmlasq_m_n_s8): Remove.
23427 (__arm_vmlasq_m_n_s32): Remove.
23428 (__arm_vmlasq_m_n_s16): Remove.
23429 (__arm_vmlasq_m_n_u8): Remove.
23430 (__arm_vmlasq_m_n_u32): Remove.
23431 (__arm_vmlasq_m_n_u16): Remove.
23432 (__arm_vqdmlahq_m_n_s8): Remove.
23433 (__arm_vqdmlahq_m_n_s32): Remove.
23434 (__arm_vqdmlahq_m_n_s16): Remove.
23435 (__arm_vqrdmlahq_m_n_s8): Remove.
23436 (__arm_vqrdmlahq_m_n_s32): Remove.
23437 (__arm_vqrdmlahq_m_n_s16): Remove.
23438 (__arm_vqrdmlashq_m_n_s8): Remove.
23439 (__arm_vqrdmlashq_m_n_s32): Remove.
23440 (__arm_vqrdmlashq_m_n_s16): Remove.
23441 (__arm_vqdmlashq_m_n_s8): Remove.
23442 (__arm_vqdmlashq_m_n_s16): Remove.
23443 (__arm_vqdmlashq_m_n_s32): Remove.
23444 (__arm_vmlasq): Remove.
23445 (__arm_vmlaq): Remove.
23446 (__arm_vqrdmlashq): Remove.
23447 (__arm_vqdmlashq): Remove.
23448 (__arm_vqrdmlahq): Remove.
23449 (__arm_vqdmlahq): Remove.
23450 (__arm_vmlaq_m): Remove.
23451 (__arm_vmlasq_m): Remove.
23452 (__arm_vqdmlahq_m): Remove.
23453 (__arm_vqrdmlahq_m): Remove.
23454 (__arm_vqrdmlashq_m): Remove.
23455 (__arm_vqdmlashq_m): Remove.
23457 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23459 * config/arm/iterators.md (MVE_VMLxQ_N): New.
23460 (mve_insn): Add vmla, vmlas, vqdmlah, vqdmlash, vqrdmlah,
23462 (supf): Add VQDMLAHQ_N_S, VQDMLASHQ_N_S, VQRDMLAHQ_N_S,
23464 * config/arm/mve.md (mve_vmlaq_n_<supf><mode>)
23465 (mve_vmlasq_n_<supf><mode>, mve_vqdmlahq_n_<supf><mode>)
23466 (mve_vqdmlashq_n_<supf><mode>, mve_vqrdmlahq_n_<supf><mode>)
23467 (mve_vqrdmlashq_n_<supf><mode>): Merge into ...
23468 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
23470 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23472 * config/arm/arm-mve-builtins-shapes.cc (ternary_n): New.
23473 * config/arm/arm-mve-builtins-shapes.h (ternary_n): New.
23475 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23477 * config/arm/arm-mve-builtins-base.cc (vqdmladhq, vqdmladhxq)
23478 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
23479 (vqrdmlsdhxq): New.
23480 * config/arm/arm-mve-builtins-base.def (vqdmladhq, vqdmladhxq)
23481 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
23482 (vqrdmlsdhxq): New.
23483 * config/arm/arm-mve-builtins-base.h (vqdmladhq, vqdmladhxq)
23484 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
23485 (vqrdmlsdhxq): New.
23486 * config/arm/arm-mve-builtins.cc
23487 (function_instance::has_inactive_argument): Handle vqrdmladhq,
23488 vqrdmladhxq, vqrdmlsdhq, vqrdmlsdhxq vqdmladhq, vqdmladhxq,
23489 vqdmlsdhq, vqdmlsdhxq.
23490 * config/arm/arm_mve.h (vqrdmlsdhxq): Remove.
23491 (vqrdmlsdhq): Remove.
23492 (vqrdmladhxq): Remove.
23493 (vqrdmladhq): Remove.
23494 (vqdmlsdhxq): Remove.
23495 (vqdmlsdhq): Remove.
23496 (vqdmladhxq): Remove.
23497 (vqdmladhq): Remove.
23498 (vqdmladhq_m): Remove.
23499 (vqdmladhxq_m): Remove.
23500 (vqdmlsdhq_m): Remove.
23501 (vqdmlsdhxq_m): Remove.
23502 (vqrdmladhq_m): Remove.
23503 (vqrdmladhxq_m): Remove.
23504 (vqrdmlsdhq_m): Remove.
23505 (vqrdmlsdhxq_m): Remove.
23506 (vqrdmlsdhxq_s8): Remove.
23507 (vqrdmlsdhq_s8): Remove.
23508 (vqrdmladhxq_s8): Remove.
23509 (vqrdmladhq_s8): Remove.
23510 (vqdmlsdhxq_s8): Remove.
23511 (vqdmlsdhq_s8): Remove.
23512 (vqdmladhxq_s8): Remove.
23513 (vqdmladhq_s8): Remove.
23514 (vqrdmlsdhxq_s16): Remove.
23515 (vqrdmlsdhq_s16): Remove.
23516 (vqrdmladhxq_s16): Remove.
23517 (vqrdmladhq_s16): Remove.
23518 (vqdmlsdhxq_s16): Remove.
23519 (vqdmlsdhq_s16): Remove.
23520 (vqdmladhxq_s16): Remove.
23521 (vqdmladhq_s16): Remove.
23522 (vqrdmlsdhxq_s32): Remove.
23523 (vqrdmlsdhq_s32): Remove.
23524 (vqrdmladhxq_s32): Remove.
23525 (vqrdmladhq_s32): Remove.
23526 (vqdmlsdhxq_s32): Remove.
23527 (vqdmlsdhq_s32): Remove.
23528 (vqdmladhxq_s32): Remove.
23529 (vqdmladhq_s32): Remove.
23530 (vqdmladhq_m_s8): Remove.
23531 (vqdmladhq_m_s32): Remove.
23532 (vqdmladhq_m_s16): Remove.
23533 (vqdmladhxq_m_s8): Remove.
23534 (vqdmladhxq_m_s32): Remove.
23535 (vqdmladhxq_m_s16): Remove.
23536 (vqdmlsdhq_m_s8): Remove.
23537 (vqdmlsdhq_m_s32): Remove.
23538 (vqdmlsdhq_m_s16): Remove.
23539 (vqdmlsdhxq_m_s8): Remove.
23540 (vqdmlsdhxq_m_s32): Remove.
23541 (vqdmlsdhxq_m_s16): Remove.
23542 (vqrdmladhq_m_s8): Remove.
23543 (vqrdmladhq_m_s32): Remove.
23544 (vqrdmladhq_m_s16): Remove.
23545 (vqrdmladhxq_m_s8): Remove.
23546 (vqrdmladhxq_m_s32): Remove.
23547 (vqrdmladhxq_m_s16): Remove.
23548 (vqrdmlsdhq_m_s8): Remove.
23549 (vqrdmlsdhq_m_s32): Remove.
23550 (vqrdmlsdhq_m_s16): Remove.
23551 (vqrdmlsdhxq_m_s8): Remove.
23552 (vqrdmlsdhxq_m_s32): Remove.
23553 (vqrdmlsdhxq_m_s16): Remove.
23554 (__arm_vqrdmlsdhxq_s8): Remove.
23555 (__arm_vqrdmlsdhq_s8): Remove.
23556 (__arm_vqrdmladhxq_s8): Remove.
23557 (__arm_vqrdmladhq_s8): Remove.
23558 (__arm_vqdmlsdhxq_s8): Remove.
23559 (__arm_vqdmlsdhq_s8): Remove.
23560 (__arm_vqdmladhxq_s8): Remove.
23561 (__arm_vqdmladhq_s8): Remove.
23562 (__arm_vqrdmlsdhxq_s16): Remove.
23563 (__arm_vqrdmlsdhq_s16): Remove.
23564 (__arm_vqrdmladhxq_s16): Remove.
23565 (__arm_vqrdmladhq_s16): Remove.
23566 (__arm_vqdmlsdhxq_s16): Remove.
23567 (__arm_vqdmlsdhq_s16): Remove.
23568 (__arm_vqdmladhxq_s16): Remove.
23569 (__arm_vqdmladhq_s16): Remove.
23570 (__arm_vqrdmlsdhxq_s32): Remove.
23571 (__arm_vqrdmlsdhq_s32): Remove.
23572 (__arm_vqrdmladhxq_s32): Remove.
23573 (__arm_vqrdmladhq_s32): Remove.
23574 (__arm_vqdmlsdhxq_s32): Remove.
23575 (__arm_vqdmlsdhq_s32): Remove.
23576 (__arm_vqdmladhxq_s32): Remove.
23577 (__arm_vqdmladhq_s32): Remove.
23578 (__arm_vqdmladhq_m_s8): Remove.
23579 (__arm_vqdmladhq_m_s32): Remove.
23580 (__arm_vqdmladhq_m_s16): Remove.
23581 (__arm_vqdmladhxq_m_s8): Remove.
23582 (__arm_vqdmladhxq_m_s32): Remove.
23583 (__arm_vqdmladhxq_m_s16): Remove.
23584 (__arm_vqdmlsdhq_m_s8): Remove.
23585 (__arm_vqdmlsdhq_m_s32): Remove.
23586 (__arm_vqdmlsdhq_m_s16): Remove.
23587 (__arm_vqdmlsdhxq_m_s8): Remove.
23588 (__arm_vqdmlsdhxq_m_s32): Remove.
23589 (__arm_vqdmlsdhxq_m_s16): Remove.
23590 (__arm_vqrdmladhq_m_s8): Remove.
23591 (__arm_vqrdmladhq_m_s32): Remove.
23592 (__arm_vqrdmladhq_m_s16): Remove.
23593 (__arm_vqrdmladhxq_m_s8): Remove.
23594 (__arm_vqrdmladhxq_m_s32): Remove.
23595 (__arm_vqrdmladhxq_m_s16): Remove.
23596 (__arm_vqrdmlsdhq_m_s8): Remove.
23597 (__arm_vqrdmlsdhq_m_s32): Remove.
23598 (__arm_vqrdmlsdhq_m_s16): Remove.
23599 (__arm_vqrdmlsdhxq_m_s8): Remove.
23600 (__arm_vqrdmlsdhxq_m_s32): Remove.
23601 (__arm_vqrdmlsdhxq_m_s16): Remove.
23602 (__arm_vqrdmlsdhxq): Remove.
23603 (__arm_vqrdmlsdhq): Remove.
23604 (__arm_vqrdmladhxq): Remove.
23605 (__arm_vqrdmladhq): Remove.
23606 (__arm_vqdmlsdhxq): Remove.
23607 (__arm_vqdmlsdhq): Remove.
23608 (__arm_vqdmladhxq): Remove.
23609 (__arm_vqdmladhq): Remove.
23610 (__arm_vqdmladhq_m): Remove.
23611 (__arm_vqdmladhxq_m): Remove.
23612 (__arm_vqdmlsdhq_m): Remove.
23613 (__arm_vqdmlsdhxq_m): Remove.
23614 (__arm_vqrdmladhq_m): Remove.
23615 (__arm_vqrdmladhxq_m): Remove.
23616 (__arm_vqrdmlsdhq_m): Remove.
23617 (__arm_vqrdmlsdhxq_m): Remove.
23619 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23621 * config/arm/iterators.md (MVE_VQxDMLxDHxQ_S): New.
23622 (mve_insn): Add vqdmladh, vqdmladhx, vqdmlsdh, vqdmlsdhx,
23623 vqrdmladh, vqrdmladhx, vqrdmlsdh, vqrdmlsdhx.
23624 (supf): Add VQDMLADHQ_S, VQDMLADHXQ_S, VQDMLSDHQ_S, VQDMLSDHXQ_S,
23625 VQRDMLADHQ_S,VQRDMLADHXQ_S, VQRDMLSDHQ_S, VQRDMLSDHXQ_S.
23626 * config/arm/mve.md (mve_vqrdmladhq_s<mode>)
23627 (mve_vqrdmladhxq_s<mode>, mve_vqrdmlsdhq_s<mode>)
23628 (mve_vqrdmlsdhxq_s<mode>, mve_vqdmlsdhxq_s<mode>)
23629 (mve_vqdmlsdhq_s<mode>, mve_vqdmladhxq_s<mode>)
23630 (mve_vqdmladhq_s<mode>): Merge into ...
23631 (@mve_<mve_insn>q_<supf><mode>): ... this.
23633 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23635 * config/arm/arm-mve-builtins-shapes.cc (ternary): New.
23636 * config/arm/arm-mve-builtins-shapes.h (ternary): New.
23638 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23640 * config/arm/arm-mve-builtins-base.cc (vmlaldavaq, vmlaldavaxq)
23641 (vmlsldavaq, vmlsldavaxq): New.
23642 * config/arm/arm-mve-builtins-base.def (vmlaldavaq, vmlaldavaxq)
23643 (vmlsldavaq, vmlsldavaxq): New.
23644 * config/arm/arm-mve-builtins-base.h (vmlaldavaq, vmlaldavaxq)
23645 (vmlsldavaq, vmlsldavaxq): New.
23646 * config/arm/arm_mve.h (vmlaldavaq): Remove.
23647 (vmlaldavaxq): Remove.
23648 (vmlsldavaq): Remove.
23649 (vmlsldavaxq): Remove.
23650 (vmlaldavaq_p): Remove.
23651 (vmlaldavaxq_p): Remove.
23652 (vmlsldavaq_p): Remove.
23653 (vmlsldavaxq_p): Remove.
23654 (vmlaldavaq_s16): Remove.
23655 (vmlaldavaxq_s16): Remove.
23656 (vmlsldavaq_s16): Remove.
23657 (vmlsldavaxq_s16): Remove.
23658 (vmlaldavaq_u16): Remove.
23659 (vmlaldavaq_s32): Remove.
23660 (vmlaldavaxq_s32): Remove.
23661 (vmlsldavaq_s32): Remove.
23662 (vmlsldavaxq_s32): Remove.
23663 (vmlaldavaq_u32): Remove.
23664 (vmlaldavaq_p_s32): Remove.
23665 (vmlaldavaq_p_s16): Remove.
23666 (vmlaldavaq_p_u32): Remove.
23667 (vmlaldavaq_p_u16): Remove.
23668 (vmlaldavaxq_p_s32): Remove.
23669 (vmlaldavaxq_p_s16): Remove.
23670 (vmlsldavaq_p_s32): Remove.
23671 (vmlsldavaq_p_s16): Remove.
23672 (vmlsldavaxq_p_s32): Remove.
23673 (vmlsldavaxq_p_s16): Remove.
23674 (__arm_vmlaldavaq_s16): Remove.
23675 (__arm_vmlaldavaxq_s16): Remove.
23676 (__arm_vmlsldavaq_s16): Remove.
23677 (__arm_vmlsldavaxq_s16): Remove.
23678 (__arm_vmlaldavaq_u16): Remove.
23679 (__arm_vmlaldavaq_s32): Remove.
23680 (__arm_vmlaldavaxq_s32): Remove.
23681 (__arm_vmlsldavaq_s32): Remove.
23682 (__arm_vmlsldavaxq_s32): Remove.
23683 (__arm_vmlaldavaq_u32): Remove.
23684 (__arm_vmlaldavaq_p_s32): Remove.
23685 (__arm_vmlaldavaq_p_s16): Remove.
23686 (__arm_vmlaldavaq_p_u32): Remove.
23687 (__arm_vmlaldavaq_p_u16): Remove.
23688 (__arm_vmlaldavaxq_p_s32): Remove.
23689 (__arm_vmlaldavaxq_p_s16): Remove.
23690 (__arm_vmlsldavaq_p_s32): Remove.
23691 (__arm_vmlsldavaq_p_s16): Remove.
23692 (__arm_vmlsldavaxq_p_s32): Remove.
23693 (__arm_vmlsldavaxq_p_s16): Remove.
23694 (__arm_vmlaldavaq): Remove.
23695 (__arm_vmlaldavaxq): Remove.
23696 (__arm_vmlsldavaq): Remove.
23697 (__arm_vmlsldavaxq): Remove.
23698 (__arm_vmlaldavaq_p): Remove.
23699 (__arm_vmlaldavaxq_p): Remove.
23700 (__arm_vmlsldavaq_p): Remove.
23701 (__arm_vmlsldavaxq_p): Remove.
23703 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23705 * config/arm/iterators.md (MVE_VMLxLDAVAxQ, MVE_VMLxLDAVAxQ_P):
23707 (mve_insn): Add vmlaldava, vmlaldavax, vmlsldava, vmlsldavax.
23708 (supf): Add VMLALDAVAXQ_P_S, VMLALDAVAXQ_S, VMLSLDAVAQ_P_S,
23709 VMLSLDAVAQ_S, VMLSLDAVAXQ_P_S, VMLSLDAVAXQ_S.
23710 * config/arm/mve.md (mve_vmlaldavaq_<supf><mode>)
23711 (mve_vmlsldavaq_s<mode>, mve_vmlsldavaxq_s<mode>)
23712 (mve_vmlaldavaxq_s<mode>): Merge into ...
23713 (@mve_<mve_insn>q_<supf><mode>): ... this.
23714 (mve_vmlaldavaq_p_<supf><mode>, mve_vmlaldavaxq_p_<supf><mode>)
23715 (mve_vmlsldavaq_p_s<mode>, mve_vmlsldavaxq_p_s<mode>): Merge into
23717 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
23719 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23721 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int64): New.
23722 * config/arm/arm-mve-builtins-shapes.h (binary_acca_int64): New.
23724 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23726 * config/arm/arm-mve-builtins-base.cc (vrmlaldavhq, vrmlaldavhxq)
23727 (vrmlsldavhq, vrmlsldavhxq): New.
23728 * config/arm/arm-mve-builtins-base.def (vrmlaldavhq, vrmlaldavhxq)
23729 (vrmlsldavhq, vrmlsldavhxq): New.
23730 * config/arm/arm-mve-builtins-base.h (vrmlaldavhq, vrmlaldavhxq)
23731 (vrmlsldavhq, vrmlsldavhxq): New.
23732 * config/arm/arm-mve-builtins-functions.h
23733 (unspec_mve_function_exact_insn_pred_p): Handle vrmlaldavhq,
23734 vrmlaldavhxq, vrmlsldavhq, vrmlsldavhxq.
23735 * config/arm/arm_mve.h (vrmlaldavhq): Remove.
23736 (vrmlsldavhxq): Remove.
23737 (vrmlsldavhq): Remove.
23738 (vrmlaldavhxq): Remove.
23739 (vrmlaldavhq_p): Remove.
23740 (vrmlaldavhxq_p): Remove.
23741 (vrmlsldavhq_p): Remove.
23742 (vrmlsldavhxq_p): Remove.
23743 (vrmlaldavhq_u32): Remove.
23744 (vrmlsldavhxq_s32): Remove.
23745 (vrmlsldavhq_s32): Remove.
23746 (vrmlaldavhxq_s32): Remove.
23747 (vrmlaldavhq_s32): Remove.
23748 (vrmlaldavhq_p_s32): Remove.
23749 (vrmlaldavhxq_p_s32): Remove.
23750 (vrmlsldavhq_p_s32): Remove.
23751 (vrmlsldavhxq_p_s32): Remove.
23752 (vrmlaldavhq_p_u32): Remove.
23753 (__arm_vrmlaldavhq_u32): Remove.
23754 (__arm_vrmlsldavhxq_s32): Remove.
23755 (__arm_vrmlsldavhq_s32): Remove.
23756 (__arm_vrmlaldavhxq_s32): Remove.
23757 (__arm_vrmlaldavhq_s32): Remove.
23758 (__arm_vrmlaldavhq_p_s32): Remove.
23759 (__arm_vrmlaldavhxq_p_s32): Remove.
23760 (__arm_vrmlsldavhq_p_s32): Remove.
23761 (__arm_vrmlsldavhxq_p_s32): Remove.
23762 (__arm_vrmlaldavhq_p_u32): Remove.
23763 (__arm_vrmlaldavhq): Remove.
23764 (__arm_vrmlsldavhxq): Remove.
23765 (__arm_vrmlsldavhq): Remove.
23766 (__arm_vrmlaldavhxq): Remove.
23767 (__arm_vrmlaldavhq_p): Remove.
23768 (__arm_vrmlaldavhxq_p): Remove.
23769 (__arm_vrmlsldavhq_p): Remove.
23770 (__arm_vrmlsldavhxq_p): Remove.
23772 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23774 * config/arm/iterators.md (MVE_VRMLxLDAVxQ, MVE_VRMLxLDAVHxQ_P):
23776 (mve_insn): Add vrmlaldavh, vrmlaldavhx, vrmlsldavh, vrmlsldavhx.
23777 (supf): Add VRMLALDAVHXQ_P_S, VRMLALDAVHXQ_S, VRMLSLDAVHQ_P_S,
23778 VRMLSLDAVHQ_S, VRMLSLDAVHXQ_P_S, VRMLSLDAVHXQ_S.
23779 * config/arm/mve.md (mve_vrmlaldavhxq_sv4si)
23780 (mve_vrmlsldavhq_sv4si, mve_vrmlsldavhxq_sv4si)
23781 (mve_vrmlaldavhq_<supf>v4si): Merge into ...
23782 (@mve_<mve_insn>q_<supf>v4si): ... this.
23783 (mve_vrmlaldavhxq_p_sv4si, mve_vrmlsldavhq_p_sv4si)
23784 (mve_vrmlsldavhxq_p_sv4si, mve_vrmlaldavhq_p_<supf>v4si): Merge
23786 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
23788 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23790 * config/arm/arm-mve-builtins-base.cc (vmlaldavq, vmlaldavxq)
23791 (vmlsldavq, vmlsldavxq): New.
23792 * config/arm/arm-mve-builtins-base.def (vmlaldavq, vmlaldavxq)
23793 (vmlsldavq, vmlsldavxq): New.
23794 * config/arm/arm-mve-builtins-base.h (vmlaldavq, vmlaldavxq)
23795 (vmlsldavq, vmlsldavxq): New.
23796 * config/arm/arm_mve.h (vmlaldavq): Remove.
23797 (vmlsldavxq): Remove.
23798 (vmlsldavq): Remove.
23799 (vmlaldavxq): Remove.
23800 (vmlaldavq_p): Remove.
23801 (vmlaldavxq_p): Remove.
23802 (vmlsldavq_p): Remove.
23803 (vmlsldavxq_p): Remove.
23804 (vmlaldavq_u16): Remove.
23805 (vmlsldavxq_s16): Remove.
23806 (vmlsldavq_s16): Remove.
23807 (vmlaldavxq_s16): Remove.
23808 (vmlaldavq_s16): Remove.
23809 (vmlaldavq_u32): Remove.
23810 (vmlsldavxq_s32): Remove.
23811 (vmlsldavq_s32): Remove.
23812 (vmlaldavxq_s32): Remove.
23813 (vmlaldavq_s32): Remove.
23814 (vmlaldavq_p_s16): Remove.
23815 (vmlaldavxq_p_s16): Remove.
23816 (vmlsldavq_p_s16): Remove.
23817 (vmlsldavxq_p_s16): Remove.
23818 (vmlaldavq_p_u16): Remove.
23819 (vmlaldavq_p_s32): Remove.
23820 (vmlaldavxq_p_s32): Remove.
23821 (vmlsldavq_p_s32): Remove.
23822 (vmlsldavxq_p_s32): Remove.
23823 (vmlaldavq_p_u32): Remove.
23824 (__arm_vmlaldavq_u16): Remove.
23825 (__arm_vmlsldavxq_s16): Remove.
23826 (__arm_vmlsldavq_s16): Remove.
23827 (__arm_vmlaldavxq_s16): Remove.
23828 (__arm_vmlaldavq_s16): Remove.
23829 (__arm_vmlaldavq_u32): Remove.
23830 (__arm_vmlsldavxq_s32): Remove.
23831 (__arm_vmlsldavq_s32): Remove.
23832 (__arm_vmlaldavxq_s32): Remove.
23833 (__arm_vmlaldavq_s32): Remove.
23834 (__arm_vmlaldavq_p_s16): Remove.
23835 (__arm_vmlaldavxq_p_s16): Remove.
23836 (__arm_vmlsldavq_p_s16): Remove.
23837 (__arm_vmlsldavxq_p_s16): Remove.
23838 (__arm_vmlaldavq_p_u16): Remove.
23839 (__arm_vmlaldavq_p_s32): Remove.
23840 (__arm_vmlaldavxq_p_s32): Remove.
23841 (__arm_vmlsldavq_p_s32): Remove.
23842 (__arm_vmlsldavxq_p_s32): Remove.
23843 (__arm_vmlaldavq_p_u32): Remove.
23844 (__arm_vmlaldavq): Remove.
23845 (__arm_vmlsldavxq): Remove.
23846 (__arm_vmlsldavq): Remove.
23847 (__arm_vmlaldavxq): Remove.
23848 (__arm_vmlaldavq_p): Remove.
23849 (__arm_vmlaldavxq_p): Remove.
23850 (__arm_vmlsldavq_p): Remove.
23851 (__arm_vmlsldavxq_p): Remove.
23853 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23855 * config/arm/iterators.md (MVE_VMLxLDAVxQ, MVE_VMLxLDAVxQ_P): New.
23856 (mve_insn): Add vmlaldav, vmlaldavx, vmlsldav, vmlsldavx.
23857 (supf): Add VMLALDAVXQ_S, VMLSLDAVQ_S, VMLSLDAVXQ_S,
23858 VMLALDAVXQ_P_S, VMLSLDAVQ_P_S, VMLSLDAVXQ_P_S.
23859 * config/arm/mve.md (mve_vmlaldavq_<supf><mode>)
23860 (mve_vmlaldavxq_s<mode>, mve_vmlsldavq_s<mode>)
23861 (mve_vmlsldavxq_s<mode>): Merge into ...
23862 (@mve_<mve_insn>q_<supf><mode>): ... this.
23863 (mve_vmlaldavq_p_<supf><mode>, mve_vmlaldavxq_p_s<mode>)
23864 (mve_vmlsldavq_p_s<mode>, mve_vmlsldavxq_p_s<mode>): Merge into
23866 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
23868 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23870 * config/arm/arm-mve-builtins-shapes.cc (binary_acc_int64): New.
23871 * config/arm/arm-mve-builtins-shapes.h (binary_acc_int64): New.
23873 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23875 * config/arm/arm-mve-builtins-base.cc (vabavq): New.
23876 * config/arm/arm-mve-builtins-base.def (vabavq): New.
23877 * config/arm/arm-mve-builtins-base.h (vabavq): New.
23878 * config/arm/arm_mve.h (vabavq): Remove.
23879 (vabavq_p): Remove.
23880 (vabavq_s8): Remove.
23881 (vabavq_s16): Remove.
23882 (vabavq_s32): Remove.
23883 (vabavq_u8): Remove.
23884 (vabavq_u16): Remove.
23885 (vabavq_u32): Remove.
23886 (vabavq_p_s8): Remove.
23887 (vabavq_p_u8): Remove.
23888 (vabavq_p_s16): Remove.
23889 (vabavq_p_u16): Remove.
23890 (vabavq_p_s32): Remove.
23891 (vabavq_p_u32): Remove.
23892 (__arm_vabavq_s8): Remove.
23893 (__arm_vabavq_s16): Remove.
23894 (__arm_vabavq_s32): Remove.
23895 (__arm_vabavq_u8): Remove.
23896 (__arm_vabavq_u16): Remove.
23897 (__arm_vabavq_u32): Remove.
23898 (__arm_vabavq_p_s8): Remove.
23899 (__arm_vabavq_p_u8): Remove.
23900 (__arm_vabavq_p_s16): Remove.
23901 (__arm_vabavq_p_u16): Remove.
23902 (__arm_vabavq_p_s32): Remove.
23903 (__arm_vabavq_p_u32): Remove.
23904 (__arm_vabavq): Remove.
23905 (__arm_vabavq_p): Remove.
23907 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23909 * config/arm/iterators.md (mve_insn): Add vabav.
23910 * config/arm/mve.md (mve_vabavq_<supf><mode>): Rename into ...
23911 (@mve_<mve_insn>q_<supf><mode>): ... this,.
23912 (mve_vabavq_p_<supf><mode>): Rename into ...
23913 (@mve_<mve_insn>q_p_<supf><mode>): ... this,.
23915 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23917 * config/arm/arm-mve-builtins-base.cc (vmladavaxq, vmladavaq)
23918 (vmlsdavaq, vmlsdavaxq): New.
23919 * config/arm/arm-mve-builtins-base.def (vmladavaxq, vmladavaq)
23920 (vmlsdavaq, vmlsdavaxq): New.
23921 * config/arm/arm-mve-builtins-base.h (vmladavaxq, vmladavaq)
23922 (vmlsdavaq, vmlsdavaxq): New.
23923 * config/arm/arm_mve.h (vmladavaq): Remove.
23924 (vmlsdavaxq): Remove.
23925 (vmlsdavaq): Remove.
23926 (vmladavaxq): Remove.
23927 (vmladavaq_p): Remove.
23928 (vmladavaxq_p): Remove.
23929 (vmlsdavaq_p): Remove.
23930 (vmlsdavaxq_p): Remove.
23931 (vmladavaq_u8): Remove.
23932 (vmlsdavaxq_s8): Remove.
23933 (vmlsdavaq_s8): Remove.
23934 (vmladavaxq_s8): Remove.
23935 (vmladavaq_s8): Remove.
23936 (vmladavaq_u16): Remove.
23937 (vmlsdavaxq_s16): Remove.
23938 (vmlsdavaq_s16): Remove.
23939 (vmladavaxq_s16): Remove.
23940 (vmladavaq_s16): Remove.
23941 (vmladavaq_u32): Remove.
23942 (vmlsdavaxq_s32): Remove.
23943 (vmlsdavaq_s32): Remove.
23944 (vmladavaxq_s32): Remove.
23945 (vmladavaq_s32): Remove.
23946 (vmladavaq_p_s8): Remove.
23947 (vmladavaq_p_s32): Remove.
23948 (vmladavaq_p_s16): Remove.
23949 (vmladavaq_p_u8): Remove.
23950 (vmladavaq_p_u32): Remove.
23951 (vmladavaq_p_u16): Remove.
23952 (vmladavaxq_p_s8): Remove.
23953 (vmladavaxq_p_s32): Remove.
23954 (vmladavaxq_p_s16): Remove.
23955 (vmlsdavaq_p_s8): Remove.
23956 (vmlsdavaq_p_s32): Remove.
23957 (vmlsdavaq_p_s16): Remove.
23958 (vmlsdavaxq_p_s8): Remove.
23959 (vmlsdavaxq_p_s32): Remove.
23960 (vmlsdavaxq_p_s16): Remove.
23961 (__arm_vmladavaq_u8): Remove.
23962 (__arm_vmlsdavaxq_s8): Remove.
23963 (__arm_vmlsdavaq_s8): Remove.
23964 (__arm_vmladavaxq_s8): Remove.
23965 (__arm_vmladavaq_s8): Remove.
23966 (__arm_vmladavaq_u16): Remove.
23967 (__arm_vmlsdavaxq_s16): Remove.
23968 (__arm_vmlsdavaq_s16): Remove.
23969 (__arm_vmladavaxq_s16): Remove.
23970 (__arm_vmladavaq_s16): Remove.
23971 (__arm_vmladavaq_u32): Remove.
23972 (__arm_vmlsdavaxq_s32): Remove.
23973 (__arm_vmlsdavaq_s32): Remove.
23974 (__arm_vmladavaxq_s32): Remove.
23975 (__arm_vmladavaq_s32): Remove.
23976 (__arm_vmladavaq_p_s8): Remove.
23977 (__arm_vmladavaq_p_s32): Remove.
23978 (__arm_vmladavaq_p_s16): Remove.
23979 (__arm_vmladavaq_p_u8): Remove.
23980 (__arm_vmladavaq_p_u32): Remove.
23981 (__arm_vmladavaq_p_u16): Remove.
23982 (__arm_vmladavaxq_p_s8): Remove.
23983 (__arm_vmladavaxq_p_s32): Remove.
23984 (__arm_vmladavaxq_p_s16): Remove.
23985 (__arm_vmlsdavaq_p_s8): Remove.
23986 (__arm_vmlsdavaq_p_s32): Remove.
23987 (__arm_vmlsdavaq_p_s16): Remove.
23988 (__arm_vmlsdavaxq_p_s8): Remove.
23989 (__arm_vmlsdavaxq_p_s32): Remove.
23990 (__arm_vmlsdavaxq_p_s16): Remove.
23991 (__arm_vmladavaq): Remove.
23992 (__arm_vmlsdavaxq): Remove.
23993 (__arm_vmlsdavaq): Remove.
23994 (__arm_vmladavaxq): Remove.
23995 (__arm_vmladavaq_p): Remove.
23996 (__arm_vmladavaxq_p): Remove.
23997 (__arm_vmlsdavaq_p): Remove.
23998 (__arm_vmlsdavaxq_p): Remove.
24000 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24002 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int32): New.
24003 * config/arm/arm-mve-builtins-shapes.h (binary_acca_int32): New.
24005 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24007 * config/arm/arm-mve-builtins-base.cc (vmladavq, vmladavxq)
24008 (vmlsdavq, vmlsdavxq): New.
24009 * config/arm/arm-mve-builtins-base.def (vmladavq, vmladavxq)
24010 (vmlsdavq, vmlsdavxq): New.
24011 * config/arm/arm-mve-builtins-base.h (vmladavq, vmladavxq)
24012 (vmlsdavq, vmlsdavxq): New.
24013 * config/arm/arm_mve.h (vmladavq): Remove.
24014 (vmlsdavxq): Remove.
24015 (vmlsdavq): Remove.
24016 (vmladavxq): Remove.
24017 (vmladavq_p): Remove.
24018 (vmlsdavxq_p): Remove.
24019 (vmlsdavq_p): Remove.
24020 (vmladavxq_p): Remove.
24021 (vmladavq_u8): Remove.
24022 (vmlsdavxq_s8): Remove.
24023 (vmlsdavq_s8): Remove.
24024 (vmladavxq_s8): Remove.
24025 (vmladavq_s8): Remove.
24026 (vmladavq_u16): Remove.
24027 (vmlsdavxq_s16): Remove.
24028 (vmlsdavq_s16): Remove.
24029 (vmladavxq_s16): Remove.
24030 (vmladavq_s16): Remove.
24031 (vmladavq_u32): Remove.
24032 (vmlsdavxq_s32): Remove.
24033 (vmlsdavq_s32): Remove.
24034 (vmladavxq_s32): Remove.
24035 (vmladavq_s32): Remove.
24036 (vmladavq_p_u8): Remove.
24037 (vmlsdavxq_p_s8): Remove.
24038 (vmlsdavq_p_s8): Remove.
24039 (vmladavxq_p_s8): Remove.
24040 (vmladavq_p_s8): Remove.
24041 (vmladavq_p_u16): Remove.
24042 (vmlsdavxq_p_s16): Remove.
24043 (vmlsdavq_p_s16): Remove.
24044 (vmladavxq_p_s16): Remove.
24045 (vmladavq_p_s16): Remove.
24046 (vmladavq_p_u32): Remove.
24047 (vmlsdavxq_p_s32): Remove.
24048 (vmlsdavq_p_s32): Remove.
24049 (vmladavxq_p_s32): Remove.
24050 (vmladavq_p_s32): Remove.
24051 (__arm_vmladavq_u8): Remove.
24052 (__arm_vmlsdavxq_s8): Remove.
24053 (__arm_vmlsdavq_s8): Remove.
24054 (__arm_vmladavxq_s8): Remove.
24055 (__arm_vmladavq_s8): Remove.
24056 (__arm_vmladavq_u16): Remove.
24057 (__arm_vmlsdavxq_s16): Remove.
24058 (__arm_vmlsdavq_s16): Remove.
24059 (__arm_vmladavxq_s16): Remove.
24060 (__arm_vmladavq_s16): Remove.
24061 (__arm_vmladavq_u32): Remove.
24062 (__arm_vmlsdavxq_s32): Remove.
24063 (__arm_vmlsdavq_s32): Remove.
24064 (__arm_vmladavxq_s32): Remove.
24065 (__arm_vmladavq_s32): Remove.
24066 (__arm_vmladavq_p_u8): Remove.
24067 (__arm_vmlsdavxq_p_s8): Remove.
24068 (__arm_vmlsdavq_p_s8): Remove.
24069 (__arm_vmladavxq_p_s8): Remove.
24070 (__arm_vmladavq_p_s8): Remove.
24071 (__arm_vmladavq_p_u16): Remove.
24072 (__arm_vmlsdavxq_p_s16): Remove.
24073 (__arm_vmlsdavq_p_s16): Remove.
24074 (__arm_vmladavxq_p_s16): Remove.
24075 (__arm_vmladavq_p_s16): Remove.
24076 (__arm_vmladavq_p_u32): Remove.
24077 (__arm_vmlsdavxq_p_s32): Remove.
24078 (__arm_vmlsdavq_p_s32): Remove.
24079 (__arm_vmladavxq_p_s32): Remove.
24080 (__arm_vmladavq_p_s32): Remove.
24081 (__arm_vmladavq): Remove.
24082 (__arm_vmlsdavxq): Remove.
24083 (__arm_vmlsdavq): Remove.
24084 (__arm_vmladavxq): Remove.
24085 (__arm_vmladavq_p): Remove.
24086 (__arm_vmlsdavxq_p): Remove.
24087 (__arm_vmlsdavq_p): Remove.
24088 (__arm_vmladavxq_p): Remove.
24090 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24092 * config/arm/iterators.md (MVE_VMLxDAVQ, MVE_VMLxDAVQ_P)
24093 (MVE_VMLxDAVAQ, MVE_VMLxDAVAQ_P): New.
24094 (mve_insn): Add vmladava, vmladavax, vmladav, vmladavx, vmlsdava,
24095 vmlsdavax, vmlsdav, vmlsdavx.
24096 (supf): Add VMLADAVAXQ_P_S, VMLADAVAXQ_S, VMLADAVXQ_P_S,
24097 VMLADAVXQ_S, VMLSDAVAQ_P_S, VMLSDAVAQ_S, VMLSDAVAXQ_P_S,
24098 VMLSDAVAXQ_S, VMLSDAVQ_P_S, VMLSDAVQ_S, VMLSDAVXQ_P_S,
24100 * config/arm/mve.md (mve_vmladavq_<supf><mode>)
24101 (mve_vmladavxq_s<mode>, mve_vmlsdavq_s<mode>)
24102 (mve_vmlsdavxq_s<mode>): Merge into ...
24103 (@mve_<mve_insn>q_<supf><mode>): ... this.
24104 (mve_vmlsdavaq_s<mode>, mve_vmladavaxq_s<mode>)
24105 (mve_vmlsdavaxq_s<mode>, mve_vmladavaq_<supf><mode>): Merge into
24107 (@mve_<mve_insn>q_<supf><mode>): ... this.
24108 (mve_vmladavq_p_<supf><mode>, mve_vmladavxq_p_s<mode>)
24109 (mve_vmlsdavq_p_s<mode>, mve_vmlsdavxq_p_s<mode>): Merge into ...
24110 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
24111 (mve_vmladavaq_p_<supf><mode>, mve_vmladavaxq_p_s<mode>)
24112 (mve_vmlsdavaq_p_s<mode>, mve_vmlsdavaxq_p_s<mode>): Merge into
24114 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
24116 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24118 * config/arm/arm-mve-builtins-shapes.cc (binary_acc_int32): New.
24119 * config/arm/arm-mve-builtins-shapes.h (binary_acc_int32): New.
24121 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24123 * config/arm/arm-mve-builtins-base.cc (vaddlvaq): New.
24124 * config/arm/arm-mve-builtins-base.def (vaddlvaq): New.
24125 * config/arm/arm-mve-builtins-base.h (vaddlvaq): New.
24126 * config/arm/arm_mve.h (vaddlvaq): Remove.
24127 (vaddlvaq_p): Remove.
24128 (vaddlvaq_u32): Remove.
24129 (vaddlvaq_s32): Remove.
24130 (vaddlvaq_p_s32): Remove.
24131 (vaddlvaq_p_u32): Remove.
24132 (__arm_vaddlvaq_u32): Remove.
24133 (__arm_vaddlvaq_s32): Remove.
24134 (__arm_vaddlvaq_p_s32): Remove.
24135 (__arm_vaddlvaq_p_u32): Remove.
24136 (__arm_vaddlvaq): Remove.
24137 (__arm_vaddlvaq_p): Remove.
24139 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24141 * config/arm/arm-mve-builtins-shapes.cc (unary_widen_acc): New.
24142 * config/arm/arm-mve-builtins-shapes.h (unary_widen_acc): New.
24144 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24146 * config/arm/iterators.md (mve_insn): Add vaddlva.
24147 * config/arm/mve.md (mve_vaddlvaq_<supf>v4si): Rename into ...
24148 (@mve_<mve_insn>q_<supf>v4si): ... this.
24149 (mve_vaddlvaq_p_<supf>v4si): Rename into ...
24150 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
24152 2023-05-11 Uros Bizjak <ubizjak@gmail.com>
24155 * config/i386/i386.cc (ix86_widen_mult_cost):
24156 Handle V4HImode and V2SImode.
24158 2023-05-11 Andrew Pinski <apinski@marvell.com>
24160 * tree-ssa-dce.cc (simple_dce_from_worklist): For ssa names
24161 defined by a phi node with more than one uses, allow for the
24162 only uses are in that same defining statement.
24164 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
24166 * config/riscv/riscv.cc (riscv_const_insns): Add permissible
24169 2023-05-11 Pan Li <pan2.li@intel.com>
24171 * config/riscv/vector.md: Add comments for simplifying to vmset.
24173 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
24175 * config/riscv/autovec.md (<optab><mode>3): Add scalar shift
24177 (v<optab><mode>3): Add vector shift pattern.
24178 * config/riscv/vector-iterators.md: New iterator.
24180 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
24182 * config/riscv/autovec.md: Use renamed functions.
24183 * config/riscv/riscv-protos.h (emit_vlmax_op): Rename.
24184 (emit_vlmax_reg_op): To this.
24185 (emit_nonvlmax_op): Rename.
24186 (emit_len_op): To this.
24187 (emit_nonvlmax_binop): Rename.
24188 (emit_len_binop): To this.
24189 * config/riscv/riscv-v.cc (emit_pred_op): Add default parameter.
24190 (emit_pred_binop): Remove vlmax_p.
24191 (emit_vlmax_op): Rename.
24192 (emit_vlmax_reg_op): To this.
24193 (emit_nonvlmax_op): Rename.
24194 (emit_len_op): To this.
24195 (emit_nonvlmax_binop): Rename.
24196 (emit_len_binop): To this.
24197 (sew64_scalar_helper): Use renamed functions.
24198 (expand_tuple_move): Use renamed functions.
24199 * config/riscv/riscv.cc (vector_zero_call_used_regs): Use
24201 * config/riscv/vector.md: Use renamed functions.
24203 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
24204 Michael Collison <collison@rivosinc.com>
24206 * config/riscv/autovec.md (<optab><mode>3): Add integer binops.
24207 * config/riscv/riscv-protos.h (emit_nonvlmax_binop): Declare.
24208 * config/riscv/riscv-v.cc (emit_pred_op): New function.
24209 (set_expander_dest_and_mask): New function.
24210 (emit_pred_binop): New function.
24211 (emit_nonvlmax_binop): New function.
24213 2023-05-11 Pan Li <pan2.li@intel.com>
24215 * cfgloopmanip.cc (create_empty_loop_on_edge): Add PLUS_EXPR.
24216 * gimple-loop-interchange.cc
24217 (tree_loop_interchange::map_inductions_to_loop): Ditto.
24218 * tree-ssa-loop-ivcanon.cc (create_canonical_iv): Ditto.
24219 * tree-ssa-loop-ivopts.cc (create_new_iv): Ditto.
24220 * tree-ssa-loop-manip.cc (create_iv): Ditto.
24221 (tree_transform_and_unroll_loop): Ditto.
24222 (canonicalize_loop_ivs): Ditto.
24223 * tree-ssa-loop-manip.h (create_iv): Ditto.
24224 * tree-vect-data-refs.cc (vect_create_data_ref_ptr): Ditto.
24225 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly):
24227 (vect_set_loop_condition_normal): Ditto.
24228 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Ditto.
24229 * tree-vect-stmts.cc (vectorizable_store): Ditto.
24230 (vectorizable_load): Ditto.
24232 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24234 * config/arm/arm-mve-builtins-base.cc (vmovlbq, vmovltq): New.
24235 * config/arm/arm-mve-builtins-base.def (vmovlbq, vmovltq): New.
24236 * config/arm/arm-mve-builtins-base.h (vmovlbq, vmovltq): New.
24237 * config/arm/arm_mve.h (vmovlbq): Remove.
24239 (vmovlbq_m): Remove.
24240 (vmovltq_m): Remove.
24241 (vmovlbq_x): Remove.
24242 (vmovltq_x): Remove.
24243 (vmovlbq_s8): Remove.
24244 (vmovlbq_s16): Remove.
24245 (vmovltq_s8): Remove.
24246 (vmovltq_s16): Remove.
24247 (vmovltq_u8): Remove.
24248 (vmovltq_u16): Remove.
24249 (vmovlbq_u8): Remove.
24250 (vmovlbq_u16): Remove.
24251 (vmovlbq_m_s8): Remove.
24252 (vmovltq_m_s8): Remove.
24253 (vmovlbq_m_u8): Remove.
24254 (vmovltq_m_u8): Remove.
24255 (vmovlbq_m_s16): Remove.
24256 (vmovltq_m_s16): Remove.
24257 (vmovlbq_m_u16): Remove.
24258 (vmovltq_m_u16): Remove.
24259 (vmovlbq_x_s8): Remove.
24260 (vmovlbq_x_s16): Remove.
24261 (vmovlbq_x_u8): Remove.
24262 (vmovlbq_x_u16): Remove.
24263 (vmovltq_x_s8): Remove.
24264 (vmovltq_x_s16): Remove.
24265 (vmovltq_x_u8): Remove.
24266 (vmovltq_x_u16): Remove.
24267 (__arm_vmovlbq_s8): Remove.
24268 (__arm_vmovlbq_s16): Remove.
24269 (__arm_vmovltq_s8): Remove.
24270 (__arm_vmovltq_s16): Remove.
24271 (__arm_vmovltq_u8): Remove.
24272 (__arm_vmovltq_u16): Remove.
24273 (__arm_vmovlbq_u8): Remove.
24274 (__arm_vmovlbq_u16): Remove.
24275 (__arm_vmovlbq_m_s8): Remove.
24276 (__arm_vmovltq_m_s8): Remove.
24277 (__arm_vmovlbq_m_u8): Remove.
24278 (__arm_vmovltq_m_u8): Remove.
24279 (__arm_vmovlbq_m_s16): Remove.
24280 (__arm_vmovltq_m_s16): Remove.
24281 (__arm_vmovlbq_m_u16): Remove.
24282 (__arm_vmovltq_m_u16): Remove.
24283 (__arm_vmovlbq_x_s8): Remove.
24284 (__arm_vmovlbq_x_s16): Remove.
24285 (__arm_vmovlbq_x_u8): Remove.
24286 (__arm_vmovlbq_x_u16): Remove.
24287 (__arm_vmovltq_x_s8): Remove.
24288 (__arm_vmovltq_x_s16): Remove.
24289 (__arm_vmovltq_x_u8): Remove.
24290 (__arm_vmovltq_x_u16): Remove.
24291 (__arm_vmovlbq): Remove.
24292 (__arm_vmovltq): Remove.
24293 (__arm_vmovlbq_m): Remove.
24294 (__arm_vmovltq_m): Remove.
24295 (__arm_vmovlbq_x): Remove.
24296 (__arm_vmovltq_x): Remove.
24298 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24300 * config/arm/arm-mve-builtins-shapes.cc (unary_widen): New.
24301 * config/arm/arm-mve-builtins-shapes.h (unary_widen): New.
24303 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24305 * config/arm/iterators.md (mve_insn): Add vmovlb, vmovlt.
24306 (VMOVLBQ, VMOVLTQ): Merge into ...
24307 (VMOVLxQ): ... this.
24308 (VMOVLTQ_M, VMOVLBQ_M): Merge into ...
24309 (VMOVLxQ_M): ... this.
24310 * config/arm/mve.md (mve_vmovltq_<supf><mode>)
24311 (mve_vmovlbq_<supf><mode>): Merge into ...
24312 (@mve_<mve_insn>q_<supf><mode>): ... this.
24313 (mve_vmovlbq_m_<supf><mode>, mve_vmovltq_m_<supf><mode>): Merge
24315 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
24317 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24319 * config/arm/arm-mve-builtins-base.cc (vaddlvq): New.
24320 * config/arm/arm-mve-builtins-base.def (vaddlvq): New.
24321 * config/arm/arm-mve-builtins-base.h (vaddlvq): New.
24322 * config/arm/arm-mve-builtins-functions.h
24323 (unspec_mve_function_exact_insn_pred_p): Handle vaddlvq.
24324 * config/arm/arm_mve.h (vaddlvq): Remove.
24325 (vaddlvq_p): Remove.
24326 (vaddlvq_s32): Remove.
24327 (vaddlvq_u32): Remove.
24328 (vaddlvq_p_s32): Remove.
24329 (vaddlvq_p_u32): Remove.
24330 (__arm_vaddlvq_s32): Remove.
24331 (__arm_vaddlvq_u32): Remove.
24332 (__arm_vaddlvq_p_s32): Remove.
24333 (__arm_vaddlvq_p_u32): Remove.
24334 (__arm_vaddlvq): Remove.
24335 (__arm_vaddlvq_p): Remove.
24337 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24339 * config/arm/iterators.md (mve_insn): Add vaddlv.
24340 * config/arm/mve.md (mve_vaddlvq_<supf>v4si): Rename into ...
24341 (@mve_<mve_insn>q_<supf>v4si): ... this.
24342 (mve_vaddlvq_p_<supf>v4si): Rename into ...
24343 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
24345 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24347 * config/arm/arm-mve-builtins-shapes.cc (unary_acc): New.
24348 * config/arm/arm-mve-builtins-shapes.h (unary_acc): New.
24350 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24352 * config/arm/arm-mve-builtins-base.cc (vaddvaq): New.
24353 * config/arm/arm-mve-builtins-base.def (vaddvaq): New.
24354 * config/arm/arm-mve-builtins-base.h (vaddvaq): New.
24355 * config/arm/arm_mve.h (vaddvaq): Remove.
24356 (vaddvaq_p): Remove.
24357 (vaddvaq_u8): Remove.
24358 (vaddvaq_s8): Remove.
24359 (vaddvaq_u16): Remove.
24360 (vaddvaq_s16): Remove.
24361 (vaddvaq_u32): Remove.
24362 (vaddvaq_s32): Remove.
24363 (vaddvaq_p_u8): Remove.
24364 (vaddvaq_p_s8): Remove.
24365 (vaddvaq_p_u16): Remove.
24366 (vaddvaq_p_s16): Remove.
24367 (vaddvaq_p_u32): Remove.
24368 (vaddvaq_p_s32): Remove.
24369 (__arm_vaddvaq_u8): Remove.
24370 (__arm_vaddvaq_s8): Remove.
24371 (__arm_vaddvaq_u16): Remove.
24372 (__arm_vaddvaq_s16): Remove.
24373 (__arm_vaddvaq_u32): Remove.
24374 (__arm_vaddvaq_s32): Remove.
24375 (__arm_vaddvaq_p_u8): Remove.
24376 (__arm_vaddvaq_p_s8): Remove.
24377 (__arm_vaddvaq_p_u16): Remove.
24378 (__arm_vaddvaq_p_s16): Remove.
24379 (__arm_vaddvaq_p_u32): Remove.
24380 (__arm_vaddvaq_p_s32): Remove.
24381 (__arm_vaddvaq): Remove.
24382 (__arm_vaddvaq_p): Remove.
24384 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24386 * config/arm/arm-mve-builtins-shapes.cc (unary_int32_acc): New.
24387 * config/arm/arm-mve-builtins-shapes.h (unary_int32_acc): New.
24389 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24391 * config/arm/iterators.md (mve_insn): Add vaddva.
24392 * config/arm/mve.md (mve_vaddvaq_<supf><mode>): Rename into ...
24393 (@mve_<mve_insn>q_<supf><mode>): ... this.
24394 (mve_vaddvaq_p_<supf><mode>): Rename into ...
24395 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
24397 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24399 * config/arm/arm-mve-builtins-base.cc (vaddvq): New.
24400 * config/arm/arm-mve-builtins-base.def (vaddvq): New.
24401 * config/arm/arm-mve-builtins-base.h (vaddvq): New.
24402 * config/arm/arm_mve.h (vaddvq): Remove.
24403 (vaddvq_p): Remove.
24404 (vaddvq_s8): Remove.
24405 (vaddvq_s16): Remove.
24406 (vaddvq_s32): Remove.
24407 (vaddvq_u8): Remove.
24408 (vaddvq_u16): Remove.
24409 (vaddvq_u32): Remove.
24410 (vaddvq_p_u8): Remove.
24411 (vaddvq_p_s8): Remove.
24412 (vaddvq_p_u16): Remove.
24413 (vaddvq_p_s16): Remove.
24414 (vaddvq_p_u32): Remove.
24415 (vaddvq_p_s32): Remove.
24416 (__arm_vaddvq_s8): Remove.
24417 (__arm_vaddvq_s16): Remove.
24418 (__arm_vaddvq_s32): Remove.
24419 (__arm_vaddvq_u8): Remove.
24420 (__arm_vaddvq_u16): Remove.
24421 (__arm_vaddvq_u32): Remove.
24422 (__arm_vaddvq_p_u8): Remove.
24423 (__arm_vaddvq_p_s8): Remove.
24424 (__arm_vaddvq_p_u16): Remove.
24425 (__arm_vaddvq_p_s16): Remove.
24426 (__arm_vaddvq_p_u32): Remove.
24427 (__arm_vaddvq_p_s32): Remove.
24428 (__arm_vaddvq): Remove.
24429 (__arm_vaddvq_p): Remove.
24431 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24433 * config/arm/arm-mve-builtins-shapes.cc (unary_int32): New.
24434 * config/arm/arm-mve-builtins-shapes.h (unary_int32): New.
24436 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24438 * config/arm/iterators.md (mve_insn): Add vaddv.
24439 * config/arm/mve.md (@mve_vaddvq_<supf><mode>): Rename into ...
24440 (@mve_<mve_insn>q_<supf><mode>): ... this.
24441 (mve_vaddvq_p_<supf><mode>): Rename into ...
24442 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
24443 * config/arm/vec-common.md: Use gen_mve_q instead of
24446 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24448 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N): New.
24450 * config/arm/arm-mve-builtins-base.def (vdupq): New.
24451 * config/arm/arm-mve-builtins-base.h: (vdupq): New.
24452 * config/arm/arm_mve.h (vdupq_n): Remove.
24454 (vdupq_n_f16): Remove.
24455 (vdupq_n_f32): Remove.
24456 (vdupq_n_s8): Remove.
24457 (vdupq_n_s16): Remove.
24458 (vdupq_n_s32): Remove.
24459 (vdupq_n_u8): Remove.
24460 (vdupq_n_u16): Remove.
24461 (vdupq_n_u32): Remove.
24462 (vdupq_m_n_u8): Remove.
24463 (vdupq_m_n_s8): Remove.
24464 (vdupq_m_n_u16): Remove.
24465 (vdupq_m_n_s16): Remove.
24466 (vdupq_m_n_u32): Remove.
24467 (vdupq_m_n_s32): Remove.
24468 (vdupq_m_n_f16): Remove.
24469 (vdupq_m_n_f32): Remove.
24470 (vdupq_x_n_s8): Remove.
24471 (vdupq_x_n_s16): Remove.
24472 (vdupq_x_n_s32): Remove.
24473 (vdupq_x_n_u8): Remove.
24474 (vdupq_x_n_u16): Remove.
24475 (vdupq_x_n_u32): Remove.
24476 (vdupq_x_n_f16): Remove.
24477 (vdupq_x_n_f32): Remove.
24478 (__arm_vdupq_n_s8): Remove.
24479 (__arm_vdupq_n_s16): Remove.
24480 (__arm_vdupq_n_s32): Remove.
24481 (__arm_vdupq_n_u8): Remove.
24482 (__arm_vdupq_n_u16): Remove.
24483 (__arm_vdupq_n_u32): Remove.
24484 (__arm_vdupq_m_n_u8): Remove.
24485 (__arm_vdupq_m_n_s8): Remove.
24486 (__arm_vdupq_m_n_u16): Remove.
24487 (__arm_vdupq_m_n_s16): Remove.
24488 (__arm_vdupq_m_n_u32): Remove.
24489 (__arm_vdupq_m_n_s32): Remove.
24490 (__arm_vdupq_x_n_s8): Remove.
24491 (__arm_vdupq_x_n_s16): Remove.
24492 (__arm_vdupq_x_n_s32): Remove.
24493 (__arm_vdupq_x_n_u8): Remove.
24494 (__arm_vdupq_x_n_u16): Remove.
24495 (__arm_vdupq_x_n_u32): Remove.
24496 (__arm_vdupq_n_f16): Remove.
24497 (__arm_vdupq_n_f32): Remove.
24498 (__arm_vdupq_m_n_f16): Remove.
24499 (__arm_vdupq_m_n_f32): Remove.
24500 (__arm_vdupq_x_n_f16): Remove.
24501 (__arm_vdupq_x_n_f32): Remove.
24502 (__arm_vdupq_n): Remove.
24503 (__arm_vdupq_m): Remove.
24505 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24507 * config/arm/arm-mve-builtins-shapes.cc (unary_n): New.
24508 * config/arm/arm-mve-builtins-shapes.h (unary_n): New.
24510 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24512 * config/arm/iterators.md (MVE_FP_M_N_VDUPQ_ONLY)
24513 (MVE_FP_N_VDUPQ_ONLY): New.
24514 (mve_insn): Add vdupq.
24515 * config/arm/mve.md (mve_vdupq_n_f<mode>): Rename into ...
24516 (@mve_<mve_insn>q_n_f<mode>): ... this.
24517 (mve_vdupq_n_<supf><mode>): Rename into ...
24518 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
24519 (mve_vdupq_m_n_<supf><mode>): Rename into ...
24520 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
24521 (mve_vdupq_m_n_f<mode>): Rename into ...
24522 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
24524 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24526 * config/arm/arm-mve-builtins-base.cc (vrev16q, vrev32q, vrev64q):
24528 * config/arm/arm-mve-builtins-base.def (vrev16q, vrev32q)
24530 * config/arm/arm-mve-builtins-base.h (vrev16q, vrev32q)
24532 * config/arm/arm_mve.h (vrev16q): Remove.
24535 (vrev64q_m): Remove.
24536 (vrev16q_m): Remove.
24537 (vrev32q_m): Remove.
24538 (vrev16q_x): Remove.
24539 (vrev32q_x): Remove.
24540 (vrev64q_x): Remove.
24541 (vrev64q_f16): Remove.
24542 (vrev64q_f32): Remove.
24543 (vrev32q_f16): Remove.
24544 (vrev16q_s8): Remove.
24545 (vrev32q_s8): Remove.
24546 (vrev32q_s16): Remove.
24547 (vrev64q_s8): Remove.
24548 (vrev64q_s16): Remove.
24549 (vrev64q_s32): Remove.
24550 (vrev64q_u8): Remove.
24551 (vrev64q_u16): Remove.
24552 (vrev64q_u32): Remove.
24553 (vrev32q_u8): Remove.
24554 (vrev32q_u16): Remove.
24555 (vrev16q_u8): Remove.
24556 (vrev64q_m_u8): Remove.
24557 (vrev64q_m_s8): Remove.
24558 (vrev64q_m_u16): Remove.
24559 (vrev64q_m_s16): Remove.
24560 (vrev64q_m_u32): Remove.
24561 (vrev64q_m_s32): Remove.
24562 (vrev16q_m_s8): Remove.
24563 (vrev32q_m_f16): Remove.
24564 (vrev16q_m_u8): Remove.
24565 (vrev32q_m_s8): Remove.
24566 (vrev64q_m_f16): Remove.
24567 (vrev32q_m_u8): Remove.
24568 (vrev32q_m_s16): Remove.
24569 (vrev64q_m_f32): Remove.
24570 (vrev32q_m_u16): Remove.
24571 (vrev16q_x_s8): Remove.
24572 (vrev16q_x_u8): Remove.
24573 (vrev32q_x_s8): Remove.
24574 (vrev32q_x_s16): Remove.
24575 (vrev32q_x_u8): Remove.
24576 (vrev32q_x_u16): Remove.
24577 (vrev64q_x_s8): Remove.
24578 (vrev64q_x_s16): Remove.
24579 (vrev64q_x_s32): Remove.
24580 (vrev64q_x_u8): Remove.
24581 (vrev64q_x_u16): Remove.
24582 (vrev64q_x_u32): Remove.
24583 (vrev32q_x_f16): Remove.
24584 (vrev64q_x_f16): Remove.
24585 (vrev64q_x_f32): Remove.
24586 (__arm_vrev16q_s8): Remove.
24587 (__arm_vrev32q_s8): Remove.
24588 (__arm_vrev32q_s16): Remove.
24589 (__arm_vrev64q_s8): Remove.
24590 (__arm_vrev64q_s16): Remove.
24591 (__arm_vrev64q_s32): Remove.
24592 (__arm_vrev64q_u8): Remove.
24593 (__arm_vrev64q_u16): Remove.
24594 (__arm_vrev64q_u32): Remove.
24595 (__arm_vrev32q_u8): Remove.
24596 (__arm_vrev32q_u16): Remove.
24597 (__arm_vrev16q_u8): Remove.
24598 (__arm_vrev64q_m_u8): Remove.
24599 (__arm_vrev64q_m_s8): Remove.
24600 (__arm_vrev64q_m_u16): Remove.
24601 (__arm_vrev64q_m_s16): Remove.
24602 (__arm_vrev64q_m_u32): Remove.
24603 (__arm_vrev64q_m_s32): Remove.
24604 (__arm_vrev16q_m_s8): Remove.
24605 (__arm_vrev16q_m_u8): Remove.
24606 (__arm_vrev32q_m_s8): Remove.
24607 (__arm_vrev32q_m_u8): Remove.
24608 (__arm_vrev32q_m_s16): Remove.
24609 (__arm_vrev32q_m_u16): Remove.
24610 (__arm_vrev16q_x_s8): Remove.
24611 (__arm_vrev16q_x_u8): Remove.
24612 (__arm_vrev32q_x_s8): Remove.
24613 (__arm_vrev32q_x_s16): Remove.
24614 (__arm_vrev32q_x_u8): Remove.
24615 (__arm_vrev32q_x_u16): Remove.
24616 (__arm_vrev64q_x_s8): Remove.
24617 (__arm_vrev64q_x_s16): Remove.
24618 (__arm_vrev64q_x_s32): Remove.
24619 (__arm_vrev64q_x_u8): Remove.
24620 (__arm_vrev64q_x_u16): Remove.
24621 (__arm_vrev64q_x_u32): Remove.
24622 (__arm_vrev64q_f16): Remove.
24623 (__arm_vrev64q_f32): Remove.
24624 (__arm_vrev32q_f16): Remove.
24625 (__arm_vrev32q_m_f16): Remove.
24626 (__arm_vrev64q_m_f16): Remove.
24627 (__arm_vrev64q_m_f32): Remove.
24628 (__arm_vrev32q_x_f16): Remove.
24629 (__arm_vrev64q_x_f16): Remove.
24630 (__arm_vrev64q_x_f32): Remove.
24631 (__arm_vrev16q): Remove.
24632 (__arm_vrev32q): Remove.
24633 (__arm_vrev64q): Remove.
24634 (__arm_vrev64q_m): Remove.
24635 (__arm_vrev16q_m): Remove.
24636 (__arm_vrev32q_m): Remove.
24637 (__arm_vrev16q_x): Remove.
24638 (__arm_vrev32q_x): Remove.
24639 (__arm_vrev64q_x): Remove.
24641 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24643 * config/arm/iterators.md (MVE_V8HF, MVE_V16QI)
24644 (MVE_FP_VREV64Q_ONLY, MVE_FP_M_VREV64Q_ONLY, MVE_FP_VREV32Q_ONLY)
24645 (MVE_FP_M_VREV32Q_ONLY): New iterators.
24646 (mve_insn): Add vrev16q, vrev32q, vrev64q.
24647 * config/arm/mve.md (mve_vrev64q_f<mode>): Rename into ...
24648 (@mve_<mve_insn>q_f<mode>): ... this
24649 (mve_vrev32q_fv8hf): Rename into @mve_<mve_insn>q_f<mode>.
24650 (mve_vrev64q_<supf><mode>): Rename into ...
24651 (@mve_<mve_insn>q_<supf><mode>): ... this.
24652 (mve_vrev32q_<supf><mode>): Rename into
24653 @mve_<mve_insn>q_<supf><mode>.
24654 (mve_vrev16q_<supf>v16qi): Rename into
24655 @mve_<mve_insn>q_<supf><mode>.
24656 (mve_vrev64q_m_<supf><mode>): Rename into
24657 @mve_<mve_insn>q_m_<supf><mode>.
24658 (mve_vrev32q_m_fv8hf): Rename into @mve_<mve_insn>q_m_f<mode>.
24659 (mve_vrev32q_m_<supf><mode>): Rename into
24660 @mve_<mve_insn>q_m_<supf><mode>.
24661 (mve_vrev64q_m_f<mode>): Rename into @mve_<mve_insn>q_m_f<mode>.
24662 (mve_vrev16q_m_<supf>v16qi): Rename into
24663 @mve_<mve_insn>q_m_<supf><mode>.
24665 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24667 * config/arm/arm-mve-builtins-base.cc (vcmpeqq, vcmpneq, vcmpgeq)
24668 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
24669 * config/arm/arm-mve-builtins-base.def (vcmpeqq, vcmpneq, vcmpgeq)
24670 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
24671 * config/arm/arm-mve-builtins-base.h (vcmpeqq, vcmpneq, vcmpgeq)
24672 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
24673 * config/arm/arm-mve-builtins-functions.h (class
24674 unspec_based_mve_function_exact_insn_vcmp): New.
24675 * config/arm/arm-mve-builtins.cc
24676 (function_instance::has_inactive_argument): Handle vcmp.
24677 * config/arm/arm_mve.h (vcmpneq): Remove.
24685 (vcmpneq_m): Remove.
24686 (vcmphiq_m): Remove.
24687 (vcmpeqq_m): Remove.
24688 (vcmpcsq_m): Remove.
24689 (vcmpcsq_m_n): Remove.
24690 (vcmpltq_m): Remove.
24691 (vcmpleq_m): Remove.
24692 (vcmpgtq_m): Remove.
24693 (vcmpgeq_m): Remove.
24694 (vcmpneq_s8): Remove.
24695 (vcmpneq_s16): Remove.
24696 (vcmpneq_s32): Remove.
24697 (vcmpneq_u8): Remove.
24698 (vcmpneq_u16): Remove.
24699 (vcmpneq_u32): Remove.
24700 (vcmpneq_n_u8): Remove.
24701 (vcmphiq_u8): Remove.
24702 (vcmphiq_n_u8): Remove.
24703 (vcmpeqq_u8): Remove.
24704 (vcmpeqq_n_u8): Remove.
24705 (vcmpcsq_u8): Remove.
24706 (vcmpcsq_n_u8): Remove.
24707 (vcmpneq_n_s8): Remove.
24708 (vcmpltq_s8): Remove.
24709 (vcmpltq_n_s8): Remove.
24710 (vcmpleq_s8): Remove.
24711 (vcmpleq_n_s8): Remove.
24712 (vcmpgtq_s8): Remove.
24713 (vcmpgtq_n_s8): Remove.
24714 (vcmpgeq_s8): Remove.
24715 (vcmpgeq_n_s8): Remove.
24716 (vcmpeqq_s8): Remove.
24717 (vcmpeqq_n_s8): Remove.
24718 (vcmpneq_n_u16): Remove.
24719 (vcmphiq_u16): Remove.
24720 (vcmphiq_n_u16): Remove.
24721 (vcmpeqq_u16): Remove.
24722 (vcmpeqq_n_u16): Remove.
24723 (vcmpcsq_u16): Remove.
24724 (vcmpcsq_n_u16): Remove.
24725 (vcmpneq_n_s16): Remove.
24726 (vcmpltq_s16): Remove.
24727 (vcmpltq_n_s16): Remove.
24728 (vcmpleq_s16): Remove.
24729 (vcmpleq_n_s16): Remove.
24730 (vcmpgtq_s16): Remove.
24731 (vcmpgtq_n_s16): Remove.
24732 (vcmpgeq_s16): Remove.
24733 (vcmpgeq_n_s16): Remove.
24734 (vcmpeqq_s16): Remove.
24735 (vcmpeqq_n_s16): Remove.
24736 (vcmpneq_n_u32): Remove.
24737 (vcmphiq_u32): Remove.
24738 (vcmphiq_n_u32): Remove.
24739 (vcmpeqq_u32): Remove.
24740 (vcmpeqq_n_u32): Remove.
24741 (vcmpcsq_u32): Remove.
24742 (vcmpcsq_n_u32): Remove.
24743 (vcmpneq_n_s32): Remove.
24744 (vcmpltq_s32): Remove.
24745 (vcmpltq_n_s32): Remove.
24746 (vcmpleq_s32): Remove.
24747 (vcmpleq_n_s32): Remove.
24748 (vcmpgtq_s32): Remove.
24749 (vcmpgtq_n_s32): Remove.
24750 (vcmpgeq_s32): Remove.
24751 (vcmpgeq_n_s32): Remove.
24752 (vcmpeqq_s32): Remove.
24753 (vcmpeqq_n_s32): Remove.
24754 (vcmpneq_n_f16): Remove.
24755 (vcmpneq_f16): Remove.
24756 (vcmpltq_n_f16): Remove.
24757 (vcmpltq_f16): Remove.
24758 (vcmpleq_n_f16): Remove.
24759 (vcmpleq_f16): Remove.
24760 (vcmpgtq_n_f16): Remove.
24761 (vcmpgtq_f16): Remove.
24762 (vcmpgeq_n_f16): Remove.
24763 (vcmpgeq_f16): Remove.
24764 (vcmpeqq_n_f16): Remove.
24765 (vcmpeqq_f16): Remove.
24766 (vcmpneq_n_f32): Remove.
24767 (vcmpneq_f32): Remove.
24768 (vcmpltq_n_f32): Remove.
24769 (vcmpltq_f32): Remove.
24770 (vcmpleq_n_f32): Remove.
24771 (vcmpleq_f32): Remove.
24772 (vcmpgtq_n_f32): Remove.
24773 (vcmpgtq_f32): Remove.
24774 (vcmpgeq_n_f32): Remove.
24775 (vcmpgeq_f32): Remove.
24776 (vcmpeqq_n_f32): Remove.
24777 (vcmpeqq_f32): Remove.
24778 (vcmpeqq_m_f16): Remove.
24779 (vcmpeqq_m_f32): Remove.
24780 (vcmpneq_m_u8): Remove.
24781 (vcmpneq_m_n_u8): Remove.
24782 (vcmphiq_m_u8): Remove.
24783 (vcmphiq_m_n_u8): Remove.
24784 (vcmpeqq_m_u8): Remove.
24785 (vcmpeqq_m_n_u8): Remove.
24786 (vcmpcsq_m_u8): Remove.
24787 (vcmpcsq_m_n_u8): Remove.
24788 (vcmpneq_m_s8): Remove.
24789 (vcmpneq_m_n_s8): Remove.
24790 (vcmpltq_m_s8): Remove.
24791 (vcmpltq_m_n_s8): Remove.
24792 (vcmpleq_m_s8): Remove.
24793 (vcmpleq_m_n_s8): Remove.
24794 (vcmpgtq_m_s8): Remove.
24795 (vcmpgtq_m_n_s8): Remove.
24796 (vcmpgeq_m_s8): Remove.
24797 (vcmpgeq_m_n_s8): Remove.
24798 (vcmpeqq_m_s8): Remove.
24799 (vcmpeqq_m_n_s8): Remove.
24800 (vcmpneq_m_u16): Remove.
24801 (vcmpneq_m_n_u16): Remove.
24802 (vcmphiq_m_u16): Remove.
24803 (vcmphiq_m_n_u16): Remove.
24804 (vcmpeqq_m_u16): Remove.
24805 (vcmpeqq_m_n_u16): Remove.
24806 (vcmpcsq_m_u16): Remove.
24807 (vcmpcsq_m_n_u16): Remove.
24808 (vcmpneq_m_s16): Remove.
24809 (vcmpneq_m_n_s16): Remove.
24810 (vcmpltq_m_s16): Remove.
24811 (vcmpltq_m_n_s16): Remove.
24812 (vcmpleq_m_s16): Remove.
24813 (vcmpleq_m_n_s16): Remove.
24814 (vcmpgtq_m_s16): Remove.
24815 (vcmpgtq_m_n_s16): Remove.
24816 (vcmpgeq_m_s16): Remove.
24817 (vcmpgeq_m_n_s16): Remove.
24818 (vcmpeqq_m_s16): Remove.
24819 (vcmpeqq_m_n_s16): Remove.
24820 (vcmpneq_m_u32): Remove.
24821 (vcmpneq_m_n_u32): Remove.
24822 (vcmphiq_m_u32): Remove.
24823 (vcmphiq_m_n_u32): Remove.
24824 (vcmpeqq_m_u32): Remove.
24825 (vcmpeqq_m_n_u32): Remove.
24826 (vcmpcsq_m_u32): Remove.
24827 (vcmpcsq_m_n_u32): Remove.
24828 (vcmpneq_m_s32): Remove.
24829 (vcmpneq_m_n_s32): Remove.
24830 (vcmpltq_m_s32): Remove.
24831 (vcmpltq_m_n_s32): Remove.
24832 (vcmpleq_m_s32): Remove.
24833 (vcmpleq_m_n_s32): Remove.
24834 (vcmpgtq_m_s32): Remove.
24835 (vcmpgtq_m_n_s32): Remove.
24836 (vcmpgeq_m_s32): Remove.
24837 (vcmpgeq_m_n_s32): Remove.
24838 (vcmpeqq_m_s32): Remove.
24839 (vcmpeqq_m_n_s32): Remove.
24840 (vcmpeqq_m_n_f16): Remove.
24841 (vcmpgeq_m_f16): Remove.
24842 (vcmpgeq_m_n_f16): Remove.
24843 (vcmpgtq_m_f16): Remove.
24844 (vcmpgtq_m_n_f16): Remove.
24845 (vcmpleq_m_f16): Remove.
24846 (vcmpleq_m_n_f16): Remove.
24847 (vcmpltq_m_f16): Remove.
24848 (vcmpltq_m_n_f16): Remove.
24849 (vcmpneq_m_f16): Remove.
24850 (vcmpneq_m_n_f16): Remove.
24851 (vcmpeqq_m_n_f32): Remove.
24852 (vcmpgeq_m_f32): Remove.
24853 (vcmpgeq_m_n_f32): Remove.
24854 (vcmpgtq_m_f32): Remove.
24855 (vcmpgtq_m_n_f32): Remove.
24856 (vcmpleq_m_f32): Remove.
24857 (vcmpleq_m_n_f32): Remove.
24858 (vcmpltq_m_f32): Remove.
24859 (vcmpltq_m_n_f32): Remove.
24860 (vcmpneq_m_f32): Remove.
24861 (vcmpneq_m_n_f32): Remove.
24862 (__arm_vcmpneq_s8): Remove.
24863 (__arm_vcmpneq_s16): Remove.
24864 (__arm_vcmpneq_s32): Remove.
24865 (__arm_vcmpneq_u8): Remove.
24866 (__arm_vcmpneq_u16): Remove.
24867 (__arm_vcmpneq_u32): Remove.
24868 (__arm_vcmpneq_n_u8): Remove.
24869 (__arm_vcmphiq_u8): Remove.
24870 (__arm_vcmphiq_n_u8): Remove.
24871 (__arm_vcmpeqq_u8): Remove.
24872 (__arm_vcmpeqq_n_u8): Remove.
24873 (__arm_vcmpcsq_u8): Remove.
24874 (__arm_vcmpcsq_n_u8): Remove.
24875 (__arm_vcmpneq_n_s8): Remove.
24876 (__arm_vcmpltq_s8): Remove.
24877 (__arm_vcmpltq_n_s8): Remove.
24878 (__arm_vcmpleq_s8): Remove.
24879 (__arm_vcmpleq_n_s8): Remove.
24880 (__arm_vcmpgtq_s8): Remove.
24881 (__arm_vcmpgtq_n_s8): Remove.
24882 (__arm_vcmpgeq_s8): Remove.
24883 (__arm_vcmpgeq_n_s8): Remove.
24884 (__arm_vcmpeqq_s8): Remove.
24885 (__arm_vcmpeqq_n_s8): Remove.
24886 (__arm_vcmpneq_n_u16): Remove.
24887 (__arm_vcmphiq_u16): Remove.
24888 (__arm_vcmphiq_n_u16): Remove.
24889 (__arm_vcmpeqq_u16): Remove.
24890 (__arm_vcmpeqq_n_u16): Remove.
24891 (__arm_vcmpcsq_u16): Remove.
24892 (__arm_vcmpcsq_n_u16): Remove.
24893 (__arm_vcmpneq_n_s16): Remove.
24894 (__arm_vcmpltq_s16): Remove.
24895 (__arm_vcmpltq_n_s16): Remove.
24896 (__arm_vcmpleq_s16): Remove.
24897 (__arm_vcmpleq_n_s16): Remove.
24898 (__arm_vcmpgtq_s16): Remove.
24899 (__arm_vcmpgtq_n_s16): Remove.
24900 (__arm_vcmpgeq_s16): Remove.
24901 (__arm_vcmpgeq_n_s16): Remove.
24902 (__arm_vcmpeqq_s16): Remove.
24903 (__arm_vcmpeqq_n_s16): Remove.
24904 (__arm_vcmpneq_n_u32): Remove.
24905 (__arm_vcmphiq_u32): Remove.
24906 (__arm_vcmphiq_n_u32): Remove.
24907 (__arm_vcmpeqq_u32): Remove.
24908 (__arm_vcmpeqq_n_u32): Remove.
24909 (__arm_vcmpcsq_u32): Remove.
24910 (__arm_vcmpcsq_n_u32): Remove.
24911 (__arm_vcmpneq_n_s32): Remove.
24912 (__arm_vcmpltq_s32): Remove.
24913 (__arm_vcmpltq_n_s32): Remove.
24914 (__arm_vcmpleq_s32): Remove.
24915 (__arm_vcmpleq_n_s32): Remove.
24916 (__arm_vcmpgtq_s32): Remove.
24917 (__arm_vcmpgtq_n_s32): Remove.
24918 (__arm_vcmpgeq_s32): Remove.
24919 (__arm_vcmpgeq_n_s32): Remove.
24920 (__arm_vcmpeqq_s32): Remove.
24921 (__arm_vcmpeqq_n_s32): Remove.
24922 (__arm_vcmpneq_m_u8): Remove.
24923 (__arm_vcmpneq_m_n_u8): Remove.
24924 (__arm_vcmphiq_m_u8): Remove.
24925 (__arm_vcmphiq_m_n_u8): Remove.
24926 (__arm_vcmpeqq_m_u8): Remove.
24927 (__arm_vcmpeqq_m_n_u8): Remove.
24928 (__arm_vcmpcsq_m_u8): Remove.
24929 (__arm_vcmpcsq_m_n_u8): Remove.
24930 (__arm_vcmpneq_m_s8): Remove.
24931 (__arm_vcmpneq_m_n_s8): Remove.
24932 (__arm_vcmpltq_m_s8): Remove.
24933 (__arm_vcmpltq_m_n_s8): Remove.
24934 (__arm_vcmpleq_m_s8): Remove.
24935 (__arm_vcmpleq_m_n_s8): Remove.
24936 (__arm_vcmpgtq_m_s8): Remove.
24937 (__arm_vcmpgtq_m_n_s8): Remove.
24938 (__arm_vcmpgeq_m_s8): Remove.
24939 (__arm_vcmpgeq_m_n_s8): Remove.
24940 (__arm_vcmpeqq_m_s8): Remove.
24941 (__arm_vcmpeqq_m_n_s8): Remove.
24942 (__arm_vcmpneq_m_u16): Remove.
24943 (__arm_vcmpneq_m_n_u16): Remove.
24944 (__arm_vcmphiq_m_u16): Remove.
24945 (__arm_vcmphiq_m_n_u16): Remove.
24946 (__arm_vcmpeqq_m_u16): Remove.
24947 (__arm_vcmpeqq_m_n_u16): Remove.
24948 (__arm_vcmpcsq_m_u16): Remove.
24949 (__arm_vcmpcsq_m_n_u16): Remove.
24950 (__arm_vcmpneq_m_s16): Remove.
24951 (__arm_vcmpneq_m_n_s16): Remove.
24952 (__arm_vcmpltq_m_s16): Remove.
24953 (__arm_vcmpltq_m_n_s16): Remove.
24954 (__arm_vcmpleq_m_s16): Remove.
24955 (__arm_vcmpleq_m_n_s16): Remove.
24956 (__arm_vcmpgtq_m_s16): Remove.
24957 (__arm_vcmpgtq_m_n_s16): Remove.
24958 (__arm_vcmpgeq_m_s16): Remove.
24959 (__arm_vcmpgeq_m_n_s16): Remove.
24960 (__arm_vcmpeqq_m_s16): Remove.
24961 (__arm_vcmpeqq_m_n_s16): Remove.
24962 (__arm_vcmpneq_m_u32): Remove.
24963 (__arm_vcmpneq_m_n_u32): Remove.
24964 (__arm_vcmphiq_m_u32): Remove.
24965 (__arm_vcmphiq_m_n_u32): Remove.
24966 (__arm_vcmpeqq_m_u32): Remove.
24967 (__arm_vcmpeqq_m_n_u32): Remove.
24968 (__arm_vcmpcsq_m_u32): Remove.
24969 (__arm_vcmpcsq_m_n_u32): Remove.
24970 (__arm_vcmpneq_m_s32): Remove.
24971 (__arm_vcmpneq_m_n_s32): Remove.
24972 (__arm_vcmpltq_m_s32): Remove.
24973 (__arm_vcmpltq_m_n_s32): Remove.
24974 (__arm_vcmpleq_m_s32): Remove.
24975 (__arm_vcmpleq_m_n_s32): Remove.
24976 (__arm_vcmpgtq_m_s32): Remove.
24977 (__arm_vcmpgtq_m_n_s32): Remove.
24978 (__arm_vcmpgeq_m_s32): Remove.
24979 (__arm_vcmpgeq_m_n_s32): Remove.
24980 (__arm_vcmpeqq_m_s32): Remove.
24981 (__arm_vcmpeqq_m_n_s32): Remove.
24982 (__arm_vcmpneq_n_f16): Remove.
24983 (__arm_vcmpneq_f16): Remove.
24984 (__arm_vcmpltq_n_f16): Remove.
24985 (__arm_vcmpltq_f16): Remove.
24986 (__arm_vcmpleq_n_f16): Remove.
24987 (__arm_vcmpleq_f16): Remove.
24988 (__arm_vcmpgtq_n_f16): Remove.
24989 (__arm_vcmpgtq_f16): Remove.
24990 (__arm_vcmpgeq_n_f16): Remove.
24991 (__arm_vcmpgeq_f16): Remove.
24992 (__arm_vcmpeqq_n_f16): Remove.
24993 (__arm_vcmpeqq_f16): Remove.
24994 (__arm_vcmpneq_n_f32): Remove.
24995 (__arm_vcmpneq_f32): Remove.
24996 (__arm_vcmpltq_n_f32): Remove.
24997 (__arm_vcmpltq_f32): Remove.
24998 (__arm_vcmpleq_n_f32): Remove.
24999 (__arm_vcmpleq_f32): Remove.
25000 (__arm_vcmpgtq_n_f32): Remove.
25001 (__arm_vcmpgtq_f32): Remove.
25002 (__arm_vcmpgeq_n_f32): Remove.
25003 (__arm_vcmpgeq_f32): Remove.
25004 (__arm_vcmpeqq_n_f32): Remove.
25005 (__arm_vcmpeqq_f32): Remove.
25006 (__arm_vcmpeqq_m_f16): Remove.
25007 (__arm_vcmpeqq_m_f32): Remove.
25008 (__arm_vcmpeqq_m_n_f16): Remove.
25009 (__arm_vcmpgeq_m_f16): Remove.
25010 (__arm_vcmpgeq_m_n_f16): Remove.
25011 (__arm_vcmpgtq_m_f16): Remove.
25012 (__arm_vcmpgtq_m_n_f16): Remove.
25013 (__arm_vcmpleq_m_f16): Remove.
25014 (__arm_vcmpleq_m_n_f16): Remove.
25015 (__arm_vcmpltq_m_f16): Remove.
25016 (__arm_vcmpltq_m_n_f16): Remove.
25017 (__arm_vcmpneq_m_f16): Remove.
25018 (__arm_vcmpneq_m_n_f16): Remove.
25019 (__arm_vcmpeqq_m_n_f32): Remove.
25020 (__arm_vcmpgeq_m_f32): Remove.
25021 (__arm_vcmpgeq_m_n_f32): Remove.
25022 (__arm_vcmpgtq_m_f32): Remove.
25023 (__arm_vcmpgtq_m_n_f32): Remove.
25024 (__arm_vcmpleq_m_f32): Remove.
25025 (__arm_vcmpleq_m_n_f32): Remove.
25026 (__arm_vcmpltq_m_f32): Remove.
25027 (__arm_vcmpltq_m_n_f32): Remove.
25028 (__arm_vcmpneq_m_f32): Remove.
25029 (__arm_vcmpneq_m_n_f32): Remove.
25030 (__arm_vcmpneq): Remove.
25031 (__arm_vcmphiq): Remove.
25032 (__arm_vcmpeqq): Remove.
25033 (__arm_vcmpcsq): Remove.
25034 (__arm_vcmpltq): Remove.
25035 (__arm_vcmpleq): Remove.
25036 (__arm_vcmpgtq): Remove.
25037 (__arm_vcmpgeq): Remove.
25038 (__arm_vcmpneq_m): Remove.
25039 (__arm_vcmphiq_m): Remove.
25040 (__arm_vcmpeqq_m): Remove.
25041 (__arm_vcmpcsq_m): Remove.
25042 (__arm_vcmpltq_m): Remove.
25043 (__arm_vcmpleq_m): Remove.
25044 (__arm_vcmpgtq_m): Remove.
25045 (__arm_vcmpgeq_m): Remove.
25047 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
25049 * config/arm/arm-mve-builtins-shapes.cc (cmp): New.
25050 * config/arm/arm-mve-builtins-shapes.h (cmp): New.
25052 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
25054 * config/arm/iterators.md (MVE_CMP_M, MVE_CMP_M_F, MVE_CMP_M_N)
25055 (MVE_CMP_M_N_F, mve_cmp_op1): New.
25058 * config/arm/mve.md (mve_vcmp<mve_cmp_op>q_n_<mode>): Rename into ...
25059 (@mve_vcmp<mve_cmp_op>q_n_<mode>): ... this.
25060 (mve_vcmpeqq_m_f<mode>, mve_vcmpgeq_m_f<mode>)
25061 (mve_vcmpgtq_m_f<mode>, mve_vcmpleq_m_f<mode>)
25062 (mve_vcmpltq_m_f<mode>, mve_vcmpneq_m_f<mode>): Merge into ...
25063 (@mve_vcmp<mve_cmp_op1>q_m_f<mode>): ... this.
25064 (mve_vcmpcsq_m_u<mode>, mve_vcmpeqq_m_<supf><mode>)
25065 (mve_vcmpgeq_m_s<mode>, mve_vcmpgtq_m_s<mode>)
25066 (mve_vcmphiq_m_u<mode>, mve_vcmpleq_m_s<mode>)
25067 (mve_vcmpltq_m_s<mode>, mve_vcmpneq_m_<supf><mode>): Merge into
25069 (@mve_vcmp<mve_cmp_op1>q_m_<supf><mode>): ... this.
25070 (mve_vcmpcsq_m_n_u<mode>, mve_vcmpeqq_m_n_<supf><mode>)
25071 (mve_vcmpgeq_m_n_s<mode>, mve_vcmpgtq_m_n_s<mode>)
25072 (mve_vcmphiq_m_n_u<mode>, mve_vcmpleq_m_n_s<mode>)
25073 (mve_vcmpltq_m_n_s<mode>, mve_vcmpneq_m_n_<supf><mode>): Merge
25075 (@mve_vcmp<mve_cmp_op1>q_m_n_<supf><mode>): ... this.
25076 (mve_vcmpeqq_m_n_f<mode>, mve_vcmpgeq_m_n_f<mode>)
25077 (mve_vcmpgtq_m_n_f<mode>, mve_vcmpleq_m_n_f<mode>)
25078 (mve_vcmpltq_m_n_f<mode>, mve_vcmpneq_m_n_f<mode>): Merge into ...
25079 (@mve_vcmp<mve_cmp_op1>q_m_n_f<mode>): ... this.
25081 2023-05-11 Roger Sayle <roger@nextmovesoftware.com>
25083 * match.pd <popcount optimizations>: Simplify popcount(X|Y) +
25084 popcount(X&Y) as popcount(X)+popcount(Y). Likewise, simplify
25085 popcount(X)+popcount(Y)-popcount(X&Y) as popcount(X|Y), and
25088 2023-05-11 Roger Sayle <roger@nextmovesoftware.com>
25090 * match.pd <popcount optimizations>: Simplify popcount(bswap(x))
25091 as popcount(x). Simplify popcount(rotate(x,y)) as popcount(x).
25092 <parity optimizations>: Simplify parity(bswap(x)) as parity(x).
25093 Simplify parity(rotate(x,y)) as parity(x).
25095 2023-05-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25097 * config/riscv/autovec.md (@vec_series<mode>): New pattern
25098 * config/riscv/riscv-protos.h (expand_vec_series): New function.
25099 * config/riscv/riscv-v.cc (emit_binop): Ditto.
25100 (emit_index_op): Ditto.
25101 (expand_vec_series): Ditto.
25102 (expand_const_vector): Add series vector handling.
25103 * config/riscv/riscv.cc (riscv_const_insns): Enable series vector for testing.
25105 2023-05-10 Roger Sayle <roger@nextmovesoftware.com>
25107 * config/i386/i386.md (*concat<mode><dwi>3_1): Use preferred
25108 [(const_int 0)] idiom, instead of [(clobber (const_int 0))].
25109 (*concat<mode><dwi>3_2): Likewise.
25110 (*concat<mode><dwi>3_3): Likewise.
25111 (*concat<mode><dwi>3_4): Likewise.
25112 (*concat<mode><dwi>3_5): Likewise.
25113 (*concat<mode><dwi>3_6): Likewise.
25114 (*concat<mode><dwi>3_7): Likewise.
25116 2023-05-10 Uros Bizjak <ubizjak@gmail.com>
25119 * config/i386/mmx.md (sse4_1_<code>v2qiv2si2): New insn pattern.
25120 (<insn>v4qiv4hi2): New expander.
25121 (<insn>v2hiv2si2): Ditto.
25122 (<insn>v2qiv2si2): Ditto.
25123 (<insn>v2qiv2hi2): Ditto.
25125 2023-05-10 Jeff Law <jlaw@ventanamicro>
25127 * config/h8300/constraints.md (Q): Make this a special memory
25131 2023-05-10 Jakub Jelinek <jakub@redhat.com>
25134 * ipa-prop.cc (ipa_get_callee_param_type): Don't return TREE_VALUE (t)
25135 if t is void_list_node.
25137 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25139 * config/aarch64/aarch64-simd.md (aarch64_sqmovun<mode>_insn_le): Delete.
25140 (aarch64_sqmovun<mode>_insn_be): Delete.
25141 (aarch64_sqmovun<mode><vczle><vczbe>): New define_insn.
25142 (aarch64_sqmovun<mode>): Delete expander.
25144 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25147 * config/aarch64/aarch64-simd.md (aarch64_<PERMUTE:perm_insn><mode>):
25149 (aarch64_<PERMUTE:perm_insn><mode><vczle><vczbe>): ... This.
25150 (aarch64_rev<REVERSE:rev_op><mode>): Rename to...
25151 (aarch64_rev<REVERSE:rev_op><mode><vczle><vczbe>): ... This.
25153 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25156 * config/aarch64/aarch64-simd.md (aarch64_<su_optab>q<addsub><mode>):
25158 (aarch64_<su_optab>q<addsub><mode><vczle><vczbe>): ... This.
25159 (aarch64_<sur>qadd<mode>): Rename to...
25160 (aarch64_<sur>qadd<mode><vczle><vczbe>): ... This.
25162 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25164 * config/aarch64/aarch64-simd.md
25165 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn_le): Delete.
25166 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn_be): Delete.
25167 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn<vczle><vczbe>): New define_insn.
25168 (aarch64_<sur>q<r>shr<u>n_n<mode>): Simplify expander.
25170 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25173 * config/aarch64/aarch64-simd.md (aarch64_xtn<mode>_insn_le): Delete.
25174 (aarch64_xtn<mode>_insn_be): Likewise.
25175 (trunc<mode><Vnarrowq>2): Rename to...
25176 (trunc<mode><Vnarrowq>2<vczle><vczbe>): ... This.
25177 (aarch64_xtn<mode>): Move under the above. Just emit the truncate RTL.
25178 (aarch64_<su>qmovn<mode>): Likewise.
25179 (aarch64_<su>qmovn<mode><vczle><vczbe>): New define_insn.
25180 (aarch64_<su>qmovn<mode>_insn_le): Delete.
25181 (aarch64_<su>qmovn<mode>_insn_be): Likewise.
25183 2023-05-10 Li Xu <xuli1@eswincomputing.com>
25185 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): For vfmv.f.s/vmv.x.s
25186 intruction replace null avl with (const_int 0).
25188 2023-05-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25190 * config/riscv/riscv.cc (riscv_support_vector_misalignment): Fix
25193 2023-05-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25196 * config/riscv/riscv-vsetvl.cc (avl_source_has_vsetvl_p): New function.
25197 (source_equal_p): Fix dead loop in vsetvl avl checking.
25199 2023-05-10 Hans-Peter Nilsson <hp@axis.com>
25201 * config/cris/cris.cc (cris_postdbr_cmpelim): Correct mode
25202 of modeadjusted_dccr.
25204 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25206 * config/arm/arm-mve-builtins-base.cc (vmaxaq, vminaq): New.
25207 * config/arm/arm-mve-builtins-base.def (vmaxaq, vminaq): New.
25208 * config/arm/arm-mve-builtins-base.h (vmaxaq, vminaq): New.
25209 * config/arm/arm-mve-builtins.cc
25210 (function_instance::has_inactive_argument): Handle vmaxaq and
25212 * config/arm/arm_mve.h (vminaq): Remove.
25214 (vminaq_m): Remove.
25215 (vmaxaq_m): Remove.
25216 (vminaq_s8): Remove.
25217 (vmaxaq_s8): Remove.
25218 (vminaq_s16): Remove.
25219 (vmaxaq_s16): Remove.
25220 (vminaq_s32): Remove.
25221 (vmaxaq_s32): Remove.
25222 (vminaq_m_s8): Remove.
25223 (vmaxaq_m_s8): Remove.
25224 (vminaq_m_s16): Remove.
25225 (vmaxaq_m_s16): Remove.
25226 (vminaq_m_s32): Remove.
25227 (vmaxaq_m_s32): Remove.
25228 (__arm_vminaq_s8): Remove.
25229 (__arm_vmaxaq_s8): Remove.
25230 (__arm_vminaq_s16): Remove.
25231 (__arm_vmaxaq_s16): Remove.
25232 (__arm_vminaq_s32): Remove.
25233 (__arm_vmaxaq_s32): Remove.
25234 (__arm_vminaq_m_s8): Remove.
25235 (__arm_vmaxaq_m_s8): Remove.
25236 (__arm_vminaq_m_s16): Remove.
25237 (__arm_vmaxaq_m_s16): Remove.
25238 (__arm_vminaq_m_s32): Remove.
25239 (__arm_vmaxaq_m_s32): Remove.
25240 (__arm_vminaq): Remove.
25241 (__arm_vmaxaq): Remove.
25242 (__arm_vminaq_m): Remove.
25243 (__arm_vmaxaq_m): Remove.
25245 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25247 * config/arm/iterators.md (MVE_VMAXAVMINAQ, MVE_VMAXAVMINAQ_M):
25249 (mve_insn): Add vmaxa, vmina.
25250 (supf): Add VMAXAQ_S, VMAXAQ_M_S, VMINAQ_S, VMINAQ_M_S.
25251 * config/arm/mve.md (mve_vmaxaq_s<mode>, mve_vminaq_s<mode>):
25253 (@mve_<mve_insn>q_<supf><mode>): ... this.
25254 (mve_vmaxaq_m_s<mode>, mve_vminaq_m_s<mode>): Merge into ...
25255 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
25257 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25259 * config/arm/arm-mve-builtins-shapes.cc (binary_maxamina): New.
25260 * config/arm/arm-mve-builtins-shapes.h (binary_maxamina): New.
25262 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25264 * config/arm/arm-mve-builtins-base.cc (vmaxnmaq, vminnmaq): New.
25265 * config/arm/arm-mve-builtins-base.def (vmaxnmaq, vminnmaq): New.
25266 * config/arm/arm-mve-builtins-base.h (vmaxnmaq, vminnmaq): New.
25267 * config/arm/arm-mve-builtins.cc
25268 (function_instance::has_inactive_argument): Handle vmaxnmaq and
25270 * config/arm/arm_mve.h (vminnmaq): Remove.
25271 (vmaxnmaq): Remove.
25272 (vmaxnmaq_m): Remove.
25273 (vminnmaq_m): Remove.
25274 (vminnmaq_f16): Remove.
25275 (vmaxnmaq_f16): Remove.
25276 (vminnmaq_f32): Remove.
25277 (vmaxnmaq_f32): Remove.
25278 (vmaxnmaq_m_f16): Remove.
25279 (vminnmaq_m_f16): Remove.
25280 (vmaxnmaq_m_f32): Remove.
25281 (vminnmaq_m_f32): Remove.
25282 (__arm_vminnmaq_f16): Remove.
25283 (__arm_vmaxnmaq_f16): Remove.
25284 (__arm_vminnmaq_f32): Remove.
25285 (__arm_vmaxnmaq_f32): Remove.
25286 (__arm_vmaxnmaq_m_f16): Remove.
25287 (__arm_vminnmaq_m_f16): Remove.
25288 (__arm_vmaxnmaq_m_f32): Remove.
25289 (__arm_vminnmaq_m_f32): Remove.
25290 (__arm_vminnmaq): Remove.
25291 (__arm_vmaxnmaq): Remove.
25292 (__arm_vmaxnmaq_m): Remove.
25293 (__arm_vminnmaq_m): Remove.
25295 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25297 * config/arm/iterators.md (MVE_VMAXNMA_VMINNMAQ)
25298 (MVE_VMAXNMA_VMINNMAQ_M): New.
25299 (mve_insn): Add vmaxnma, vminnma.
25300 * config/arm/mve.md (mve_vmaxnmaq_f<mode>, mve_vminnmaq_f<mode>):
25302 (@mve_<mve_insn>q_f<mode>): ... this.
25303 (mve_vmaxnmaq_m_f<mode>, mve_vminnmaq_m_f<mode>): Merge into ...
25304 (@mve_<mve_insn>q_m_f<mode>): ... this.
25306 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25308 * config/arm/arm-mve-builtins-base.cc (FUNCTION_PRED_P_F): New.
25309 (vmaxnmavq, vmaxnmvq, vminnmavq, vminnmvq): New.
25310 * config/arm/arm-mve-builtins-base.def (vmaxnmavq, vmaxnmvq)
25311 (vminnmavq, vminnmvq): New.
25312 * config/arm/arm-mve-builtins-base.h (vmaxnmavq, vmaxnmvq)
25313 (vminnmavq, vminnmvq): New.
25314 * config/arm/arm_mve.h (vminnmvq): Remove.
25315 (vminnmavq): Remove.
25316 (vmaxnmvq): Remove.
25317 (vmaxnmavq): Remove.
25318 (vmaxnmavq_p): Remove.
25319 (vmaxnmvq_p): Remove.
25320 (vminnmavq_p): Remove.
25321 (vminnmvq_p): Remove.
25322 (vminnmvq_f16): Remove.
25323 (vminnmavq_f16): Remove.
25324 (vmaxnmvq_f16): Remove.
25325 (vmaxnmavq_f16): Remove.
25326 (vminnmvq_f32): Remove.
25327 (vminnmavq_f32): Remove.
25328 (vmaxnmvq_f32): Remove.
25329 (vmaxnmavq_f32): Remove.
25330 (vmaxnmavq_p_f16): Remove.
25331 (vmaxnmvq_p_f16): Remove.
25332 (vminnmavq_p_f16): Remove.
25333 (vminnmvq_p_f16): Remove.
25334 (vmaxnmavq_p_f32): Remove.
25335 (vmaxnmvq_p_f32): Remove.
25336 (vminnmavq_p_f32): Remove.
25337 (vminnmvq_p_f32): Remove.
25338 (__arm_vminnmvq_f16): Remove.
25339 (__arm_vminnmavq_f16): Remove.
25340 (__arm_vmaxnmvq_f16): Remove.
25341 (__arm_vmaxnmavq_f16): Remove.
25342 (__arm_vminnmvq_f32): Remove.
25343 (__arm_vminnmavq_f32): Remove.
25344 (__arm_vmaxnmvq_f32): Remove.
25345 (__arm_vmaxnmavq_f32): Remove.
25346 (__arm_vmaxnmavq_p_f16): Remove.
25347 (__arm_vmaxnmvq_p_f16): Remove.
25348 (__arm_vminnmavq_p_f16): Remove.
25349 (__arm_vminnmvq_p_f16): Remove.
25350 (__arm_vmaxnmavq_p_f32): Remove.
25351 (__arm_vmaxnmvq_p_f32): Remove.
25352 (__arm_vminnmavq_p_f32): Remove.
25353 (__arm_vminnmvq_p_f32): Remove.
25354 (__arm_vminnmvq): Remove.
25355 (__arm_vminnmavq): Remove.
25356 (__arm_vmaxnmvq): Remove.
25357 (__arm_vmaxnmavq): Remove.
25358 (__arm_vmaxnmavq_p): Remove.
25359 (__arm_vmaxnmvq_p): Remove.
25360 (__arm_vminnmavq_p): Remove.
25361 (__arm_vminnmvq_p): Remove.
25362 (__arm_vmaxnmavq_m): Remove.
25363 (__arm_vmaxnmvq_m): Remove.
25365 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25367 * config/arm/arm-mve-builtins-functions.h
25368 (unspec_mve_function_exact_insn_pred_p): Use code_for_mve_q_p_f.
25370 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25372 * config/arm/iterators.md (MVE_VMAXNMxV_MINNMxVQ)
25373 (MVE_VMAXNMxV_MINNMxVQ_P): New.
25374 (mve_insn): Add vmaxnmav, vmaxnmv, vminnmav, vminnmv.
25375 * config/arm/mve.md (mve_vmaxnmavq_f<mode>, mve_vmaxnmvq_f<mode>)
25376 (mve_vminnmavq_f<mode>, mve_vminnmvq_f<mode>): Merge into ...
25377 (@mve_<mve_insn>q_f<mode>): ... this.
25378 (mve_vmaxnmavq_p_f<mode>, mve_vmaxnmvq_p_f<mode>)
25379 (mve_vminnmavq_p_f<mode>, mve_vminnmvq_p_f<mode>): Merge into ...
25380 (@mve_<mve_insn>q_p_f<mode>): ... this.
25382 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25384 * config/arm/arm-mve-builtins-base.cc (vmaxnmq, vminnmq): New.
25385 * config/arm/arm-mve-builtins-base.def (vmaxnmq, vminnmq): New.
25386 * config/arm/arm-mve-builtins-base.h (vmaxnmq, vminnmq): New.
25387 * config/arm/arm_mve.h (vminnmq): Remove.
25389 (vmaxnmq_m): Remove.
25390 (vminnmq_m): Remove.
25391 (vminnmq_x): Remove.
25392 (vmaxnmq_x): Remove.
25393 (vminnmq_f16): Remove.
25394 (vmaxnmq_f16): Remove.
25395 (vminnmq_f32): Remove.
25396 (vmaxnmq_f32): Remove.
25397 (vmaxnmq_m_f32): Remove.
25398 (vmaxnmq_m_f16): Remove.
25399 (vminnmq_m_f32): Remove.
25400 (vminnmq_m_f16): Remove.
25401 (vminnmq_x_f16): Remove.
25402 (vminnmq_x_f32): Remove.
25403 (vmaxnmq_x_f16): Remove.
25404 (vmaxnmq_x_f32): Remove.
25405 (__arm_vminnmq_f16): Remove.
25406 (__arm_vmaxnmq_f16): Remove.
25407 (__arm_vminnmq_f32): Remove.
25408 (__arm_vmaxnmq_f32): Remove.
25409 (__arm_vmaxnmq_m_f32): Remove.
25410 (__arm_vmaxnmq_m_f16): Remove.
25411 (__arm_vminnmq_m_f32): Remove.
25412 (__arm_vminnmq_m_f16): Remove.
25413 (__arm_vminnmq_x_f16): Remove.
25414 (__arm_vminnmq_x_f32): Remove.
25415 (__arm_vmaxnmq_x_f16): Remove.
25416 (__arm_vmaxnmq_x_f32): Remove.
25417 (__arm_vminnmq): Remove.
25418 (__arm_vmaxnmq): Remove.
25419 (__arm_vmaxnmq_m): Remove.
25420 (__arm_vminnmq_m): Remove.
25421 (__arm_vminnmq_x): Remove.
25422 (__arm_vmaxnmq_x): Remove.
25424 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25426 * config/arm/iterators.md (MAX_MIN_F): New.
25427 (MVE_FP_M_BINARY): Add VMAXNMQ_M_F, VMINNMQ_M_F.
25428 (mve_insn): Add vmaxnm, vminnm.
25429 (max_min_f_str): New.
25430 * config/arm/mve.md (mve_vmaxnmq_f<mode>, mve_vminnmq_f<mode>):
25432 (@mve_<max_min_f_str>q_f<mode>): ... this.
25433 (mve_vmaxnmq_m_f<mode>, mve_vminnmq_m_f<mode>): Merge into ...
25434 (@mve_<mve_insn>q_m_f<mode>): ... this.
25436 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25438 * config/arm/vec-common.md (smin<mode>3): Use VDQWH iterator.
25439 (smax<mode>3): Likewise.
25441 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25443 * config/arm/arm-mve-builtins-base.cc (FUNCTION_PRED_P_S_U)
25444 (FUNCTION_PRED_P_S): New.
25445 (vmaxavq, vminavq, vmaxvq, vminvq): New.
25446 * config/arm/arm-mve-builtins-base.def (vmaxavq, vminavq, vmaxvq)
25448 * config/arm/arm-mve-builtins-base.h (vmaxavq, vminavq, vmaxvq)
25450 * config/arm/arm_mve.h (vminvq): Remove.
25452 (vminvq_p): Remove.
25453 (vmaxvq_p): Remove.
25454 (vminvq_u8): Remove.
25455 (vmaxvq_u8): Remove.
25456 (vminvq_s8): Remove.
25457 (vmaxvq_s8): Remove.
25458 (vminvq_u16): Remove.
25459 (vmaxvq_u16): Remove.
25460 (vminvq_s16): Remove.
25461 (vmaxvq_s16): Remove.
25462 (vminvq_u32): Remove.
25463 (vmaxvq_u32): Remove.
25464 (vminvq_s32): Remove.
25465 (vmaxvq_s32): Remove.
25466 (vminvq_p_u8): Remove.
25467 (vmaxvq_p_u8): Remove.
25468 (vminvq_p_s8): Remove.
25469 (vmaxvq_p_s8): Remove.
25470 (vminvq_p_u16): Remove.
25471 (vmaxvq_p_u16): Remove.
25472 (vminvq_p_s16): Remove.
25473 (vmaxvq_p_s16): Remove.
25474 (vminvq_p_u32): Remove.
25475 (vmaxvq_p_u32): Remove.
25476 (vminvq_p_s32): Remove.
25477 (vmaxvq_p_s32): Remove.
25478 (__arm_vminvq_u8): Remove.
25479 (__arm_vmaxvq_u8): Remove.
25480 (__arm_vminvq_s8): Remove.
25481 (__arm_vmaxvq_s8): Remove.
25482 (__arm_vminvq_u16): Remove.
25483 (__arm_vmaxvq_u16): Remove.
25484 (__arm_vminvq_s16): Remove.
25485 (__arm_vmaxvq_s16): Remove.
25486 (__arm_vminvq_u32): Remove.
25487 (__arm_vmaxvq_u32): Remove.
25488 (__arm_vminvq_s32): Remove.
25489 (__arm_vmaxvq_s32): Remove.
25490 (__arm_vminvq_p_u8): Remove.
25491 (__arm_vmaxvq_p_u8): Remove.
25492 (__arm_vminvq_p_s8): Remove.
25493 (__arm_vmaxvq_p_s8): Remove.
25494 (__arm_vminvq_p_u16): Remove.
25495 (__arm_vmaxvq_p_u16): Remove.
25496 (__arm_vminvq_p_s16): Remove.
25497 (__arm_vmaxvq_p_s16): Remove.
25498 (__arm_vminvq_p_u32): Remove.
25499 (__arm_vmaxvq_p_u32): Remove.
25500 (__arm_vminvq_p_s32): Remove.
25501 (__arm_vmaxvq_p_s32): Remove.
25502 (__arm_vminvq): Remove.
25503 (__arm_vmaxvq): Remove.
25504 (__arm_vminvq_p): Remove.
25505 (__arm_vmaxvq_p): Remove.
25508 (vminavq_p): Remove.
25509 (vmaxavq_p): Remove.
25510 (vminavq_s8): Remove.
25511 (vmaxavq_s8): Remove.
25512 (vminavq_s16): Remove.
25513 (vmaxavq_s16): Remove.
25514 (vminavq_s32): Remove.
25515 (vmaxavq_s32): Remove.
25516 (vminavq_p_s8): Remove.
25517 (vmaxavq_p_s8): Remove.
25518 (vminavq_p_s16): Remove.
25519 (vmaxavq_p_s16): Remove.
25520 (vminavq_p_s32): Remove.
25521 (vmaxavq_p_s32): Remove.
25522 (__arm_vminavq_s8): Remove.
25523 (__arm_vmaxavq_s8): Remove.
25524 (__arm_vminavq_s16): Remove.
25525 (__arm_vmaxavq_s16): Remove.
25526 (__arm_vminavq_s32): Remove.
25527 (__arm_vmaxavq_s32): Remove.
25528 (__arm_vminavq_p_s8): Remove.
25529 (__arm_vmaxavq_p_s8): Remove.
25530 (__arm_vminavq_p_s16): Remove.
25531 (__arm_vmaxavq_p_s16): Remove.
25532 (__arm_vminavq_p_s32): Remove.
25533 (__arm_vmaxavq_p_s32): Remove.
25534 (__arm_vminavq): Remove.
25535 (__arm_vmaxavq): Remove.
25536 (__arm_vminavq_p): Remove.
25537 (__arm_vmaxavq_p): Remove.
25539 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25541 * config/arm/iterators.md (MVE_VMAXVQ_VMINVQ, MVE_VMAXVQ_VMINVQ_P): New.
25542 (mve_insn): Add vmaxav, vmaxv, vminav, vminv.
25543 (supf): Add VMAXAVQ_S, VMAXAVQ_P_S, VMINAVQ_S, VMINAVQ_P_S.
25544 * config/arm/mve.md (mve_vmaxavq_s<mode>, mve_vmaxvq_<supf><mode>)
25545 (mve_vminavq_s<mode>, mve_vminvq_<supf><mode>): Merge into ...
25546 (@mve_<mve_insn>q_<supf><mode>): ... this.
25547 (mve_vmaxavq_p_s<mode>, mve_vmaxvq_p_<supf><mode>)
25548 (mve_vminavq_p_s<mode>, mve_vminvq_p_<supf><mode>): Merge into ...
25549 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
25551 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25553 * config/arm/arm-mve-builtins-functions.h (class
25554 unspec_mve_function_exact_insn_pred_p): New.
25556 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25558 * config/arm/arm-mve-builtins-shapes.cc (binary_maxavminav): New.
25559 * config/arm/arm-mve-builtins-shapes.h (binary_maxavminav): New.
25561 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25563 * config/arm/arm-mve-builtins-shapes.cc (binary_maxvminv): New.
25564 * config/arm/arm-mve-builtins-shapes.h (binary_maxvminv): New.
25566 2023-05-09 Richard Sandiford <richard.sandiford@arm.com>
25568 * config/aarch64/aarch64-protos.h (aarch64_adjust_reg_alloc_order):
25570 * config/aarch64/aarch64.h (REG_ALLOC_ORDER): Define.
25571 (ADJUST_REG_ALLOC_ORDER): Likewise.
25572 * config/aarch64/aarch64.cc (aarch64_adjust_reg_alloc_order): New
25574 * config/aarch64/aarch64-sve.md (*vcond_mask_<mode><vpred>): Use
25575 Upa rather than Upl for unpredicated movprfx alternatives.
25577 2023-05-09 Jeff Law <jlaw@ventanamicro>
25579 * config/h8300/testcompare.md: Add peephole2 which uses a memory
25580 load to set flags, thus eliminating a compare against zero.
25582 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25584 * config/arm/arm-mve-builtins-base.cc (vshllbq, vshlltq): New.
25585 * config/arm/arm-mve-builtins-base.def (vshllbq, vshlltq): New.
25586 * config/arm/arm-mve-builtins-base.h (vshllbq, vshlltq): New.
25587 * config/arm/arm_mve.h (vshlltq): Remove.
25589 (vshllbq_m): Remove.
25590 (vshlltq_m): Remove.
25591 (vshllbq_x): Remove.
25592 (vshlltq_x): Remove.
25593 (vshlltq_n_u8): Remove.
25594 (vshllbq_n_u8): Remove.
25595 (vshlltq_n_s8): Remove.
25596 (vshllbq_n_s8): Remove.
25597 (vshlltq_n_u16): Remove.
25598 (vshllbq_n_u16): Remove.
25599 (vshlltq_n_s16): Remove.
25600 (vshllbq_n_s16): Remove.
25601 (vshllbq_m_n_s8): Remove.
25602 (vshllbq_m_n_s16): Remove.
25603 (vshllbq_m_n_u8): Remove.
25604 (vshllbq_m_n_u16): Remove.
25605 (vshlltq_m_n_s8): Remove.
25606 (vshlltq_m_n_s16): Remove.
25607 (vshlltq_m_n_u8): Remove.
25608 (vshlltq_m_n_u16): Remove.
25609 (vshllbq_x_n_s8): Remove.
25610 (vshllbq_x_n_s16): Remove.
25611 (vshllbq_x_n_u8): Remove.
25612 (vshllbq_x_n_u16): Remove.
25613 (vshlltq_x_n_s8): Remove.
25614 (vshlltq_x_n_s16): Remove.
25615 (vshlltq_x_n_u8): Remove.
25616 (vshlltq_x_n_u16): Remove.
25617 (__arm_vshlltq_n_u8): Remove.
25618 (__arm_vshllbq_n_u8): Remove.
25619 (__arm_vshlltq_n_s8): Remove.
25620 (__arm_vshllbq_n_s8): Remove.
25621 (__arm_vshlltq_n_u16): Remove.
25622 (__arm_vshllbq_n_u16): Remove.
25623 (__arm_vshlltq_n_s16): Remove.
25624 (__arm_vshllbq_n_s16): Remove.
25625 (__arm_vshllbq_m_n_s8): Remove.
25626 (__arm_vshllbq_m_n_s16): Remove.
25627 (__arm_vshllbq_m_n_u8): Remove.
25628 (__arm_vshllbq_m_n_u16): Remove.
25629 (__arm_vshlltq_m_n_s8): Remove.
25630 (__arm_vshlltq_m_n_s16): Remove.
25631 (__arm_vshlltq_m_n_u8): Remove.
25632 (__arm_vshlltq_m_n_u16): Remove.
25633 (__arm_vshllbq_x_n_s8): Remove.
25634 (__arm_vshllbq_x_n_s16): Remove.
25635 (__arm_vshllbq_x_n_u8): Remove.
25636 (__arm_vshllbq_x_n_u16): Remove.
25637 (__arm_vshlltq_x_n_s8): Remove.
25638 (__arm_vshlltq_x_n_s16): Remove.
25639 (__arm_vshlltq_x_n_u8): Remove.
25640 (__arm_vshlltq_x_n_u16): Remove.
25641 (__arm_vshlltq): Remove.
25642 (__arm_vshllbq): Remove.
25643 (__arm_vshllbq_m): Remove.
25644 (__arm_vshlltq_m): Remove.
25645 (__arm_vshllbq_x): Remove.
25646 (__arm_vshlltq_x): Remove.
25648 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25650 * config/arm/iterators.md (mve_insn): Add vshllb, vshllt.
25651 (VSHLLBQ_N, VSHLLTQ_N): Remove.
25653 (VSHLLBQ_M_N, VSHLLTQ_M_N): Remove.
25654 (VSHLLxQ_M_N): New.
25655 * config/arm/mve.md (mve_vshllbq_n_<supf><mode>)
25656 (mve_vshlltq_n_<supf><mode>): Merge into ...
25657 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
25658 (mve_vshllbq_m_n_<supf><mode>, mve_vshlltq_m_n_<supf><mode>):
25660 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
25662 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25664 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_n): New.
25665 * config/arm/arm-mve-builtins-shapes.h (binary_widen_n): New.
25667 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25669 * config/arm/arm-mve-builtins-base.cc (vmovnbq, vmovntq, vqmovnbq)
25670 (vqmovntq, vqmovunbq, vqmovuntq): New.
25671 * config/arm/arm-mve-builtins-base.def (vmovnbq, vmovntq)
25672 (vqmovnbq, vqmovntq, vqmovunbq, vqmovuntq): New.
25673 * config/arm/arm-mve-builtins-base.h (vmovnbq, vmovntq, vqmovnbq)
25674 (vqmovntq, vqmovunbq, vqmovuntq): New.
25675 * config/arm/arm-mve-builtins.cc
25676 (function_instance::has_inactive_argument): Handle vmovnbq,
25677 vmovntq, vqmovnbq, vqmovntq, vqmovunbq, vqmovuntq.
25678 * config/arm/arm_mve.h (vqmovntq): Remove.
25679 (vqmovnbq): Remove.
25680 (vqmovnbq_m): Remove.
25681 (vqmovntq_m): Remove.
25682 (vqmovntq_u16): Remove.
25683 (vqmovnbq_u16): Remove.
25684 (vqmovntq_s16): Remove.
25685 (vqmovnbq_s16): Remove.
25686 (vqmovntq_u32): Remove.
25687 (vqmovnbq_u32): Remove.
25688 (vqmovntq_s32): Remove.
25689 (vqmovnbq_s32): Remove.
25690 (vqmovnbq_m_s16): Remove.
25691 (vqmovntq_m_s16): Remove.
25692 (vqmovnbq_m_u16): Remove.
25693 (vqmovntq_m_u16): Remove.
25694 (vqmovnbq_m_s32): Remove.
25695 (vqmovntq_m_s32): Remove.
25696 (vqmovnbq_m_u32): Remove.
25697 (vqmovntq_m_u32): Remove.
25698 (__arm_vqmovntq_u16): Remove.
25699 (__arm_vqmovnbq_u16): Remove.
25700 (__arm_vqmovntq_s16): Remove.
25701 (__arm_vqmovnbq_s16): Remove.
25702 (__arm_vqmovntq_u32): Remove.
25703 (__arm_vqmovnbq_u32): Remove.
25704 (__arm_vqmovntq_s32): Remove.
25705 (__arm_vqmovnbq_s32): Remove.
25706 (__arm_vqmovnbq_m_s16): Remove.
25707 (__arm_vqmovntq_m_s16): Remove.
25708 (__arm_vqmovnbq_m_u16): Remove.
25709 (__arm_vqmovntq_m_u16): Remove.
25710 (__arm_vqmovnbq_m_s32): Remove.
25711 (__arm_vqmovntq_m_s32): Remove.
25712 (__arm_vqmovnbq_m_u32): Remove.
25713 (__arm_vqmovntq_m_u32): Remove.
25714 (__arm_vqmovntq): Remove.
25715 (__arm_vqmovnbq): Remove.
25716 (__arm_vqmovnbq_m): Remove.
25717 (__arm_vqmovntq_m): Remove.
25720 (vmovnbq_m): Remove.
25721 (vmovntq_m): Remove.
25722 (vmovntq_u16): Remove.
25723 (vmovnbq_u16): Remove.
25724 (vmovntq_s16): Remove.
25725 (vmovnbq_s16): Remove.
25726 (vmovntq_u32): Remove.
25727 (vmovnbq_u32): Remove.
25728 (vmovntq_s32): Remove.
25729 (vmovnbq_s32): Remove.
25730 (vmovnbq_m_s16): Remove.
25731 (vmovntq_m_s16): Remove.
25732 (vmovnbq_m_u16): Remove.
25733 (vmovntq_m_u16): Remove.
25734 (vmovnbq_m_s32): Remove.
25735 (vmovntq_m_s32): Remove.
25736 (vmovnbq_m_u32): Remove.
25737 (vmovntq_m_u32): Remove.
25738 (__arm_vmovntq_u16): Remove.
25739 (__arm_vmovnbq_u16): Remove.
25740 (__arm_vmovntq_s16): Remove.
25741 (__arm_vmovnbq_s16): Remove.
25742 (__arm_vmovntq_u32): Remove.
25743 (__arm_vmovnbq_u32): Remove.
25744 (__arm_vmovntq_s32): Remove.
25745 (__arm_vmovnbq_s32): Remove.
25746 (__arm_vmovnbq_m_s16): Remove.
25747 (__arm_vmovntq_m_s16): Remove.
25748 (__arm_vmovnbq_m_u16): Remove.
25749 (__arm_vmovntq_m_u16): Remove.
25750 (__arm_vmovnbq_m_s32): Remove.
25751 (__arm_vmovntq_m_s32): Remove.
25752 (__arm_vmovnbq_m_u32): Remove.
25753 (__arm_vmovntq_m_u32): Remove.
25754 (__arm_vmovntq): Remove.
25755 (__arm_vmovnbq): Remove.
25756 (__arm_vmovnbq_m): Remove.
25757 (__arm_vmovntq_m): Remove.
25758 (vqmovuntq): Remove.
25759 (vqmovunbq): Remove.
25760 (vqmovunbq_m): Remove.
25761 (vqmovuntq_m): Remove.
25762 (vqmovuntq_s16): Remove.
25763 (vqmovunbq_s16): Remove.
25764 (vqmovuntq_s32): Remove.
25765 (vqmovunbq_s32): Remove.
25766 (vqmovunbq_m_s16): Remove.
25767 (vqmovuntq_m_s16): Remove.
25768 (vqmovunbq_m_s32): Remove.
25769 (vqmovuntq_m_s32): Remove.
25770 (__arm_vqmovuntq_s16): Remove.
25771 (__arm_vqmovunbq_s16): Remove.
25772 (__arm_vqmovuntq_s32): Remove.
25773 (__arm_vqmovunbq_s32): Remove.
25774 (__arm_vqmovunbq_m_s16): Remove.
25775 (__arm_vqmovuntq_m_s16): Remove.
25776 (__arm_vqmovunbq_m_s32): Remove.
25777 (__arm_vqmovuntq_m_s32): Remove.
25778 (__arm_vqmovuntq): Remove.
25779 (__arm_vqmovunbq): Remove.
25780 (__arm_vqmovunbq_m): Remove.
25781 (__arm_vqmovuntq_m): Remove.
25783 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25785 * config/arm/iterators.md (MVE_MOVN, MVE_MOVN_M): New.
25786 (mve_insn): Add vmovnb, vmovnt, vqmovnb, vqmovnt, vqmovunb,
25789 (supf): Add VQMOVUNBQ_M_S, VQMOVUNBQ_S, VQMOVUNTQ_M_S,
25791 * config/arm/mve.md (mve_vmovnbq_<supf><mode>)
25792 (mve_vmovntq_<supf><mode>, mve_vqmovnbq_<supf><mode>)
25793 (mve_vqmovntq_<supf><mode>, mve_vqmovunbq_s<mode>)
25794 (mve_vqmovuntq_s<mode>): Merge into ...
25795 (@mve_<mve_insn>q_<supf><mode>): ... this.
25796 (mve_vmovnbq_m_<supf><mode>, mve_vmovntq_m_<supf><mode>)
25797 (mve_vqmovnbq_m_<supf><mode>, mve_vqmovntq_m_<supf><mode>)
25798 (mve_vqmovunbq_m_s<mode>, mve_vqmovuntq_m_s<mode>): Merge into ...
25799 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
25801 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25803 * config/arm/arm-mve-builtins-shapes.cc (binary_move_narrow): New.
25804 (binary_move_narrow_unsigned): New.
25805 * config/arm/arm-mve-builtins-shapes.h (binary_move_narrow): New.
25806 (binary_move_narrow_unsigned): New.
25808 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25810 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_F): New.
25811 (vrndaq, vrndmq, vrndnq, vrndpq, vrndq, vrndxq): New.
25812 * config/arm/arm-mve-builtins-base.def (vrndaq, vrndmq, vrndnq)
25813 (vrndpq, vrndq, vrndxq): New.
25814 * config/arm/arm-mve-builtins-base.h (vrndaq, vrndmq, vrndnq)
25815 (vrndpq, vrndq, vrndxq): New.
25816 * config/arm/arm_mve.h (vrndxq): Remove.
25822 (vrndaq_m): Remove.
25823 (vrndmq_m): Remove.
25824 (vrndnq_m): Remove.
25825 (vrndpq_m): Remove.
25827 (vrndxq_m): Remove.
25829 (vrndnq_x): Remove.
25830 (vrndmq_x): Remove.
25831 (vrndpq_x): Remove.
25832 (vrndaq_x): Remove.
25833 (vrndxq_x): Remove.
25834 (vrndxq_f16): Remove.
25835 (vrndxq_f32): Remove.
25836 (vrndq_f16): Remove.
25837 (vrndq_f32): Remove.
25838 (vrndpq_f16): Remove.
25839 (vrndpq_f32): Remove.
25840 (vrndnq_f16): Remove.
25841 (vrndnq_f32): Remove.
25842 (vrndmq_f16): Remove.
25843 (vrndmq_f32): Remove.
25844 (vrndaq_f16): Remove.
25845 (vrndaq_f32): Remove.
25846 (vrndaq_m_f16): Remove.
25847 (vrndmq_m_f16): Remove.
25848 (vrndnq_m_f16): Remove.
25849 (vrndpq_m_f16): Remove.
25850 (vrndq_m_f16): Remove.
25851 (vrndxq_m_f16): Remove.
25852 (vrndaq_m_f32): Remove.
25853 (vrndmq_m_f32): Remove.
25854 (vrndnq_m_f32): Remove.
25855 (vrndpq_m_f32): Remove.
25856 (vrndq_m_f32): Remove.
25857 (vrndxq_m_f32): Remove.
25858 (vrndq_x_f16): Remove.
25859 (vrndq_x_f32): Remove.
25860 (vrndnq_x_f16): Remove.
25861 (vrndnq_x_f32): Remove.
25862 (vrndmq_x_f16): Remove.
25863 (vrndmq_x_f32): Remove.
25864 (vrndpq_x_f16): Remove.
25865 (vrndpq_x_f32): Remove.
25866 (vrndaq_x_f16): Remove.
25867 (vrndaq_x_f32): Remove.
25868 (vrndxq_x_f16): Remove.
25869 (vrndxq_x_f32): Remove.
25870 (__arm_vrndxq_f16): Remove.
25871 (__arm_vrndxq_f32): Remove.
25872 (__arm_vrndq_f16): Remove.
25873 (__arm_vrndq_f32): Remove.
25874 (__arm_vrndpq_f16): Remove.
25875 (__arm_vrndpq_f32): Remove.
25876 (__arm_vrndnq_f16): Remove.
25877 (__arm_vrndnq_f32): Remove.
25878 (__arm_vrndmq_f16): Remove.
25879 (__arm_vrndmq_f32): Remove.
25880 (__arm_vrndaq_f16): Remove.
25881 (__arm_vrndaq_f32): Remove.
25882 (__arm_vrndaq_m_f16): Remove.
25883 (__arm_vrndmq_m_f16): Remove.
25884 (__arm_vrndnq_m_f16): Remove.
25885 (__arm_vrndpq_m_f16): Remove.
25886 (__arm_vrndq_m_f16): Remove.
25887 (__arm_vrndxq_m_f16): Remove.
25888 (__arm_vrndaq_m_f32): Remove.
25889 (__arm_vrndmq_m_f32): Remove.
25890 (__arm_vrndnq_m_f32): Remove.
25891 (__arm_vrndpq_m_f32): Remove.
25892 (__arm_vrndq_m_f32): Remove.
25893 (__arm_vrndxq_m_f32): Remove.
25894 (__arm_vrndq_x_f16): Remove.
25895 (__arm_vrndq_x_f32): Remove.
25896 (__arm_vrndnq_x_f16): Remove.
25897 (__arm_vrndnq_x_f32): Remove.
25898 (__arm_vrndmq_x_f16): Remove.
25899 (__arm_vrndmq_x_f32): Remove.
25900 (__arm_vrndpq_x_f16): Remove.
25901 (__arm_vrndpq_x_f32): Remove.
25902 (__arm_vrndaq_x_f16): Remove.
25903 (__arm_vrndaq_x_f32): Remove.
25904 (__arm_vrndxq_x_f16): Remove.
25905 (__arm_vrndxq_x_f32): Remove.
25906 (__arm_vrndxq): Remove.
25907 (__arm_vrndq): Remove.
25908 (__arm_vrndpq): Remove.
25909 (__arm_vrndnq): Remove.
25910 (__arm_vrndmq): Remove.
25911 (__arm_vrndaq): Remove.
25912 (__arm_vrndaq_m): Remove.
25913 (__arm_vrndmq_m): Remove.
25914 (__arm_vrndnq_m): Remove.
25915 (__arm_vrndpq_m): Remove.
25916 (__arm_vrndq_m): Remove.
25917 (__arm_vrndxq_m): Remove.
25918 (__arm_vrndq_x): Remove.
25919 (__arm_vrndnq_x): Remove.
25920 (__arm_vrndmq_x): Remove.
25921 (__arm_vrndpq_x): Remove.
25922 (__arm_vrndaq_x): Remove.
25923 (__arm_vrndxq_x): Remove.
25925 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25927 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_N_NO_U_F): New.
25928 (vabsq, vnegq, vclsq, vclzq, vqabsq, vqnegq): New.
25929 * config/arm/arm-mve-builtins-base.def (vabsq, vnegq, vclsq)
25930 (vclzq, vqabsq, vqnegq): New.
25931 * config/arm/arm-mve-builtins-base.h (vabsq, vnegq, vclsq, vclzq)
25932 (vqabsq, vqnegq): New.
25933 * config/arm/arm_mve.h (vabsq): Remove.
25936 (vabsq_f16): Remove.
25937 (vabsq_f32): Remove.
25938 (vabsq_s8): Remove.
25939 (vabsq_s16): Remove.
25940 (vabsq_s32): Remove.
25941 (vabsq_m_s8): Remove.
25942 (vabsq_m_s16): Remove.
25943 (vabsq_m_s32): Remove.
25944 (vabsq_m_f16): Remove.
25945 (vabsq_m_f32): Remove.
25946 (vabsq_x_s8): Remove.
25947 (vabsq_x_s16): Remove.
25948 (vabsq_x_s32): Remove.
25949 (vabsq_x_f16): Remove.
25950 (vabsq_x_f32): Remove.
25951 (__arm_vabsq_s8): Remove.
25952 (__arm_vabsq_s16): Remove.
25953 (__arm_vabsq_s32): Remove.
25954 (__arm_vabsq_m_s8): Remove.
25955 (__arm_vabsq_m_s16): Remove.
25956 (__arm_vabsq_m_s32): Remove.
25957 (__arm_vabsq_x_s8): Remove.
25958 (__arm_vabsq_x_s16): Remove.
25959 (__arm_vabsq_x_s32): Remove.
25960 (__arm_vabsq_f16): Remove.
25961 (__arm_vabsq_f32): Remove.
25962 (__arm_vabsq_m_f16): Remove.
25963 (__arm_vabsq_m_f32): Remove.
25964 (__arm_vabsq_x_f16): Remove.
25965 (__arm_vabsq_x_f32): Remove.
25966 (__arm_vabsq): Remove.
25967 (__arm_vabsq_m): Remove.
25968 (__arm_vabsq_x): Remove.
25972 (vnegq_f16): Remove.
25973 (vnegq_f32): Remove.
25974 (vnegq_s8): Remove.
25975 (vnegq_s16): Remove.
25976 (vnegq_s32): Remove.
25977 (vnegq_m_s8): Remove.
25978 (vnegq_m_s16): Remove.
25979 (vnegq_m_s32): Remove.
25980 (vnegq_m_f16): Remove.
25981 (vnegq_m_f32): Remove.
25982 (vnegq_x_s8): Remove.
25983 (vnegq_x_s16): Remove.
25984 (vnegq_x_s32): Remove.
25985 (vnegq_x_f16): Remove.
25986 (vnegq_x_f32): Remove.
25987 (__arm_vnegq_s8): Remove.
25988 (__arm_vnegq_s16): Remove.
25989 (__arm_vnegq_s32): Remove.
25990 (__arm_vnegq_m_s8): Remove.
25991 (__arm_vnegq_m_s16): Remove.
25992 (__arm_vnegq_m_s32): Remove.
25993 (__arm_vnegq_x_s8): Remove.
25994 (__arm_vnegq_x_s16): Remove.
25995 (__arm_vnegq_x_s32): Remove.
25996 (__arm_vnegq_f16): Remove.
25997 (__arm_vnegq_f32): Remove.
25998 (__arm_vnegq_m_f16): Remove.
25999 (__arm_vnegq_m_f32): Remove.
26000 (__arm_vnegq_x_f16): Remove.
26001 (__arm_vnegq_x_f32): Remove.
26002 (__arm_vnegq): Remove.
26003 (__arm_vnegq_m): Remove.
26004 (__arm_vnegq_x): Remove.
26008 (vclsq_s8): Remove.
26009 (vclsq_s16): Remove.
26010 (vclsq_s32): Remove.
26011 (vclsq_m_s8): Remove.
26012 (vclsq_m_s16): Remove.
26013 (vclsq_m_s32): Remove.
26014 (vclsq_x_s8): Remove.
26015 (vclsq_x_s16): Remove.
26016 (vclsq_x_s32): Remove.
26017 (__arm_vclsq_s8): Remove.
26018 (__arm_vclsq_s16): Remove.
26019 (__arm_vclsq_s32): Remove.
26020 (__arm_vclsq_m_s8): Remove.
26021 (__arm_vclsq_m_s16): Remove.
26022 (__arm_vclsq_m_s32): Remove.
26023 (__arm_vclsq_x_s8): Remove.
26024 (__arm_vclsq_x_s16): Remove.
26025 (__arm_vclsq_x_s32): Remove.
26026 (__arm_vclsq): Remove.
26027 (__arm_vclsq_m): Remove.
26028 (__arm_vclsq_x): Remove.
26032 (vclzq_s8): Remove.
26033 (vclzq_s16): Remove.
26034 (vclzq_s32): Remove.
26035 (vclzq_u8): Remove.
26036 (vclzq_u16): Remove.
26037 (vclzq_u32): Remove.
26038 (vclzq_m_u8): Remove.
26039 (vclzq_m_s8): Remove.
26040 (vclzq_m_u16): Remove.
26041 (vclzq_m_s16): Remove.
26042 (vclzq_m_u32): Remove.
26043 (vclzq_m_s32): Remove.
26044 (vclzq_x_s8): Remove.
26045 (vclzq_x_s16): Remove.
26046 (vclzq_x_s32): Remove.
26047 (vclzq_x_u8): Remove.
26048 (vclzq_x_u16): Remove.
26049 (vclzq_x_u32): Remove.
26050 (__arm_vclzq_s8): Remove.
26051 (__arm_vclzq_s16): Remove.
26052 (__arm_vclzq_s32): Remove.
26053 (__arm_vclzq_u8): Remove.
26054 (__arm_vclzq_u16): Remove.
26055 (__arm_vclzq_u32): Remove.
26056 (__arm_vclzq_m_u8): Remove.
26057 (__arm_vclzq_m_s8): Remove.
26058 (__arm_vclzq_m_u16): Remove.
26059 (__arm_vclzq_m_s16): Remove.
26060 (__arm_vclzq_m_u32): Remove.
26061 (__arm_vclzq_m_s32): Remove.
26062 (__arm_vclzq_x_s8): Remove.
26063 (__arm_vclzq_x_s16): Remove.
26064 (__arm_vclzq_x_s32): Remove.
26065 (__arm_vclzq_x_u8): Remove.
26066 (__arm_vclzq_x_u16): Remove.
26067 (__arm_vclzq_x_u32): Remove.
26068 (__arm_vclzq): Remove.
26069 (__arm_vclzq_m): Remove.
26070 (__arm_vclzq_x): Remove.
26073 (vqnegq_m): Remove.
26074 (vqabsq_m): Remove.
26075 (vqabsq_s8): Remove.
26076 (vqabsq_s16): Remove.
26077 (vqabsq_s32): Remove.
26078 (vqnegq_s8): Remove.
26079 (vqnegq_s16): Remove.
26080 (vqnegq_s32): Remove.
26081 (vqnegq_m_s8): Remove.
26082 (vqabsq_m_s8): Remove.
26083 (vqnegq_m_s16): Remove.
26084 (vqabsq_m_s16): Remove.
26085 (vqnegq_m_s32): Remove.
26086 (vqabsq_m_s32): Remove.
26087 (__arm_vqabsq_s8): Remove.
26088 (__arm_vqabsq_s16): Remove.
26089 (__arm_vqabsq_s32): Remove.
26090 (__arm_vqnegq_s8): Remove.
26091 (__arm_vqnegq_s16): Remove.
26092 (__arm_vqnegq_s32): Remove.
26093 (__arm_vqnegq_m_s8): Remove.
26094 (__arm_vqabsq_m_s8): Remove.
26095 (__arm_vqnegq_m_s16): Remove.
26096 (__arm_vqabsq_m_s16): Remove.
26097 (__arm_vqnegq_m_s32): Remove.
26098 (__arm_vqabsq_m_s32): Remove.
26099 (__arm_vqabsq): Remove.
26100 (__arm_vqnegq): Remove.
26101 (__arm_vqnegq_m): Remove.
26102 (__arm_vqabsq_m): Remove.
26104 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
26106 * config/arm/iterators.md (MVE_INT_M_UNARY, MVE_INT_UNARY)
26107 (MVE_FP_UNARY, MVE_FP_M_UNARY): New.
26108 (mve_insn): Add vabs, vcls, vclz, vneg, vqabs, vqneg, vrnda,
26109 vrndm, vrndn, vrndp, vrnd, vrndx.
26110 (isu): Add VABSQ_M_S, VCLSQ_M_S, VCLZQ_M_S, VCLZQ_M_U, VNEGQ_M_S,
26111 VQABSQ_M_S, VQNEGQ_M_S.
26113 * config/arm/mve.md (mve_vrndq_m_f<mode>, mve_vrndxq_f<mode>)
26114 (mve_vrndq_f<mode>, mve_vrndpq_f<mode>, mve_vrndnq_f<mode>)
26115 (mve_vrndmq_f<mode>, mve_vrndaq_f<mode>): Merge into ...
26116 (@mve_<mve_insn>q_f<mode>): ... this.
26117 (mve_vnegq_f<mode>, mve_vabsq_f<mode>): Merge into ...
26118 (mve_v<absneg_str>q_f<mode>): ... this.
26119 (mve_vnegq_s<mode>, mve_vabsq_s<mode>): Merge into ...
26120 (mve_v<absneg_str>q_s<mode>): ... this.
26121 (mve_vclsq_s<mode>, mve_vqnegq_s<mode>, mve_vqabsq_s<mode>): Merge into ...
26122 (@mve_<mve_insn>q_<supf><mode>): ... this.
26123 (mve_vabsq_m_s<mode>, mve_vclsq_m_s<mode>)
26124 (mve_vclzq_m_<supf><mode>, mve_vnegq_m_s<mode>)
26125 (mve_vqabsq_m_s<mode>, mve_vqnegq_m_s<mode>): Merge into ...
26126 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
26127 (mve_vabsq_m_f<mode>, mve_vnegq_m_f<mode>, mve_vrndaq_m_f<mode>)
26128 (mve_vrndmq_m_f<mode>, mve_vrndnq_m_f<mode>, mve_vrndpq_m_f<mode>)
26129 (mve_vrndxq_m_f<mode>): Merge into ...
26130 (@mve_<mve_insn>q_m_f<mode>): ... this.
26132 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
26134 * config/arm/arm-mve-builtins-shapes.cc (unary): New.
26135 * config/arm/arm-mve-builtins-shapes.h (unary): New.
26137 2023-05-09 Jakub Jelinek <jakub@redhat.com>
26139 * mux-utils.h: Fix comment typo, avoides -> avoids.
26141 2023-05-09 Jakub Jelinek <jakub@redhat.com>
26143 PR tree-optimization/109778
26144 * wide-int.h (wi::lrotate, wi::rrotate): Call wi::lrshift on
26145 wi::zext (x, width) rather than x if width != precision, rather
26146 than using wi::zext (right, width) after the shift.
26147 * tree-ssa-ccp.cc (bit_value_binop): Call wi::ext on the results
26148 of wi::lrotate or wi::rrotate.
26150 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
26152 * genmatch.cc (get_out_file): Make static and rename to ...
26153 (choose_output): ... this. Reimplement. Update all uses ...
26154 (decision_tree::gen): ... here and ...
26157 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
26159 * genmatch.cc (showUsage): Reimplement as ...
26160 (usage): ...this. Adjust all uses.
26161 (main): Print usage when no arguments. Add missing 'return 1'.
26163 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
26165 * genmatch.cc (header_file): Make static.
26166 (emit_func): Rename to...
26167 (fp_decl): ... this. Adjust all uses.
26168 (fp_decl_done): New function. Use it...
26169 (decision_tree::gen): ... here and...
26170 (write_predicate): ... here.
26173 2023-05-09 Richard Sandiford <richard.sandiford@arm.com>
26175 * ira-conflicts.cc (can_use_same_reg_p): Skip over non-matching
26178 2023-05-08 Roger Sayle <roger@nextmovesoftware.com>
26179 Uros Bizjak <ubizjak@gmail.com>
26181 * config/i386/i386.md (any_or_plus): Move definition earlier.
26182 (*insvti_highpart_1): New define_insn_and_split to overwrite
26183 (insv) the highpart of a TImode register/memory.
26185 2023-05-08 Eugene Rozenfeld <erozen@microsoft.com>
26187 * auto-profile.cc (auto_profile): Check todo from early_inline
26188 to see if cleanup_tree_vfg needs to be called.
26189 (early_inline): Return todo from early_inliner.
26191 2023-05-08 Kito Cheng <kito.cheng@sifive.com>
26193 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::get_vector_info):
26195 (pass_vsetvl::get_block_info): New.
26196 (pass_vsetvl::update_vector_info): New.
26197 (pass_vsetvl::simple_vsetvl): Use get_vector_info.
26198 (pass_vsetvl::compute_local_backward_infos): Ditto.
26199 (pass_vsetvl::transfer_before): Ditto.
26200 (pass_vsetvl::transfer_after): Ditto.
26201 (pass_vsetvl::emit_local_forward_vsetvls): Ditto.
26202 (pass_vsetvl::local_eliminate_vsetvl_insn): Ditto.
26203 (pass_vsetvl::cleanup_insns): Ditto.
26204 (pass_vsetvl::compute_local_backward_infos): Use
26205 update_vector_info.
26207 2023-05-08 Jeff Law <jlaw@ventanamicro>
26209 * config/stormy16/stormy16.md (zero_extendhisi2): Fix length.
26211 2023-05-08 Richard Biener <rguenther@suse.de>
26212 Michael Meissner <meissner@linux.ibm.com>
26214 PR middle-end/108623
26215 * tree-core.h (tree_type_common): Bump up precision field to 16 bits.
26216 Align bit fields > 1 bit to at least an 8-bit boundary.
26218 2023-05-08 Andrew Pinski <apinski@marvell.com>
26220 PR tree-optimization/109424
26221 PR tree-optimization/59424
26222 * tree-ssa-phiopt.cc (factor_out_conditional_conversion): Rename to ...
26223 (factor_out_conditional_operation): This and add support for all unary
26225 (pass_phiopt::execute): Update call to factor_out_conditional_conversion
26226 to call factor_out_conditional_operation instead.
26228 2023-05-08 Andrew Pinski <apinski@marvell.com>
26230 * tree-ssa-phiopt.cc (pass_phiopt::execute): Loop
26231 over factor_out_conditional_conversion.
26233 2023-05-08 Andrew Pinski <apinski@marvell.com>
26235 PR tree-optimization/49959
26236 PR tree-optimization/103771
26237 * tree-ssa-phiopt.cc (pass_phiopt::execute): Support
26238 Diamond shapped bb form for factor_out_conditional_conversion.
26240 2023-05-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26242 * config/riscv/autovec.md (movmisalign<mode>): New pattern.
26243 * config/riscv/riscv-protos.h (riscv_vector_mask_mode_p): Delete.
26244 (riscv_vector_get_mask_mode): Ditto.
26245 (get_mask_policy_no_pred): Ditto.
26246 (get_tail_policy_no_pred): Ditto.
26247 (get_mask_mode): New function.
26248 * config/riscv/riscv-v.cc (get_mask_policy_no_pred): Delete.
26249 (get_tail_policy_no_pred): Ditto.
26250 (riscv_vector_mask_mode_p): Ditto.
26251 (riscv_vector_get_mask_mode): Ditto.
26252 (get_mask_mode): New function.
26253 * config/riscv/riscv-vector-builtins.cc (use_real_merge_p): Remove
26255 (get_tail_policy_for_pred): Ditto.
26256 * config/riscv/riscv-vector-builtins.h (get_tail_policy_for_pred): Ditto.
26257 (get_mask_policy_for_pred): Ditto
26258 * config/riscv/riscv.cc (riscv_get_mask_mode): Refine codes.
26260 2023-05-08 Kito Cheng <kito.cheng@sifive.com>
26262 * common/config/riscv/riscv-common.cc (riscv_select_multilib_by_abi): New.
26263 (riscv_select_multilib): New.
26264 (riscv_compute_multilib): Extract logic to riscv_select_multilib and
26265 also handle select_by_abi.
26266 * config/riscv/elf.h (RISCV_USE_CUSTOMISED_MULTI_LIB): Change it
26267 to select_by_abi_arch_cmodel from 1.
26268 * config/riscv/linux.h (RISCV_USE_CUSTOMISED_MULTI_LIB): Define.
26269 * config/riscv/riscv-opts.h (enum riscv_multilib_select_kind): New.
26271 2023-05-08 Alexander Monakov <amonakov@ispras.ru>
26273 * Makefile.in: (gimple-match-head.o-warn): Remove.
26274 (GIMPLE_MATCH_PD_SEQ_SRC): Do not depend on
26275 gimple-match-exports.cc.
26276 (gimple-match-auto.h): Only depend on s-gimple-match.
26277 (generic-match-auto.h): Likewise.
26279 2023-05-08 Andrew Pinski <apinski@marvell.com>
26281 PR tree-optimization/109691
26282 * tree-ssa-dce.cc (simple_dce_from_worklist): Add need_eh_cleanup
26284 If the removed statement can throw, have need_eh_cleanup
26285 include the bb of that statement.
26286 * tree-ssa-dce.h (simple_dce_from_worklist): Update declaration.
26287 * tree-ssa-propagate.cc (struct prop_stats_d): Remove
26289 (substitute_and_fold_dom_walker::substitute_and_fold_dom_walker):
26290 Initialize dceworklist instead of stmts_to_remove.
26291 (substitute_and_fold_dom_walker::~substitute_and_fold_dom_walker):
26292 Destore dceworklist instead of stmts_to_remove.
26293 (substitute_and_fold_dom_walker::before_dom_children):
26294 Set dceworklist instead of adding to stmts_to_remove.
26295 (substitute_and_fold_engine::substitute_and_fold):
26296 Call simple_dce_from_worklist instead of poping
26298 Don't update the stat on removal statements.
26300 2023-05-07 Andrew Pinski <apinski@marvell.com>
26303 * config/aarch64/aarch64-builtins.cc (aarch64_simd_switcher::aarch64_simd_switcher):
26304 Change argument type to aarch64_feature_flags.
26305 * config/aarch64/aarch64-protos.h (aarch64_simd_switcher): Change
26306 constructor argument type to aarch64_feature_flags.
26307 Change m_old_asm_isa_flags to be aarch64_feature_flags.
26309 2023-05-07 Jiufu Guo <guojiufu@linux.ibm.com>
26311 * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Generate
26312 more parallel code if can_create_pseudo_p.
26314 2023-05-07 Roger Sayle <roger@nextmovesoftware.com>
26317 * lower-subreg.cc (resolve_simple_move): Don't emit a clobber
26318 immediately before moving a multi-word register by parts.
26320 2023-05-06 Jeff Law <jlaw@ventanamicro>
26322 * config/riscv/riscv-v.cc (riscv_vector_preferred_simd_mode): Delete.
26324 2023-05-06 Michael Collison <collison@rivosinc.com>
26326 * tree-vect-slp.cc (can_duplicate_and_interleave_p):
26327 Check that GET_MODE_NUNITS is a multiple of 2.
26329 2023-05-06 Michael Collison <collison@rivosinc.com>
26331 * config/riscv/riscv.cc
26332 (riscv_estimated_poly_value): Implement
26333 TARGET_ESTIMATED_POLY_VALUE.
26334 (riscv_preferred_simd_mode): Implement
26335 TARGET_VECTORIZE_PREFERRED_SIMD_MODE.
26336 (riscv_get_mask_mode): Implement TARGET_VECTORIZE_GET_MASK_MODE.
26337 (riscv_empty_mask_is_expensive): Implement
26338 TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE.
26339 (riscv_vectorize_create_costs): Implement
26340 TARGET_VECTORIZE_CREATE_COSTS.
26341 (riscv_support_vector_misalignment): Implement
26342 TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT.
26343 (TARGET_ESTIMATED_POLY_VALUE): Register target macro.
26344 (TARGET_VECTORIZE_GET_MASK_MODE): Ditto.
26345 (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Ditto.
26346 (TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT): Ditto.
26348 2023-05-06 Jeff Law <jlaw@ventanamicro>
26350 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Remove
26351 duplicate definition.
26353 2023-05-06 Michael Collison <collison@rivosinc.com>
26355 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): New function.
26356 (riscv_vector_preferred_simd_mode): Ditto.
26357 (get_mask_policy_no_pred): Ditto.
26358 (get_tail_policy_no_pred): Ditto.
26359 (riscv_vector_mask_mode_p): Ditto.
26360 (riscv_vector_get_mask_mode): Ditto.
26362 2023-05-06 Michael Collison <collison@rivosinc.com>
26364 * config/riscv/riscv-vector-builtins.cc (get_tail_policy_for_pred):
26365 Remove static declaration to to make externally visible.
26366 (get_mask_policy_for_pred): Ditto.
26367 * config/riscv/riscv-vector-builtins.h (get_tail_policy_for_pred):
26368 New external declaration.
26369 (get_mask_policy_for_pred): Ditto.
26371 2023-05-06 Michael Collison <collison@rivosinc.com>
26373 * config/riscv/riscv-protos.h (riscv_vector_mask_mode_p): New.
26374 (riscv_vector_get_mask_mode): Ditto.
26375 (get_mask_policy_no_pred): Ditto.
26376 (get_tail_policy_no_pred): Ditto.
26378 2023-05-06 Xi Ruoyao <xry111@xry111.site>
26380 * config/loongarch/loongarch.h (struct machine_function): Add
26381 reg_is_wrapped_separately array for register wrapping
26383 * config/loongarch/loongarch.cc
26384 (loongarch_get_separate_components): New function.
26385 (loongarch_components_for_bb): Likewise.
26386 (loongarch_disqualify_components): Likewise.
26387 (loongarch_process_components): Likewise.
26388 (loongarch_emit_prologue_components): Likewise.
26389 (loongarch_emit_epilogue_components): Likewise.
26390 (loongarch_set_handled_components): Likewise.
26391 (TARGET_SHRINK_WRAP_GET_SEPARATE_COMPONENTS): Define.
26392 (TARGET_SHRINK_WRAP_COMPONENTS_FOR_BB): Likewise.
26393 (TARGET_SHRINK_WRAP_DISQUALIFY_COMPONENTS): Likewise.
26394 (TARGET_SHRINK_WRAP_EMIT_PROLOGUE_COMPONENTS): Likewise.
26395 (TARGET_SHRINK_WRAP_EMIT_EPILOGUE_COMPONENTS): Likewise.
26396 (TARGET_SHRINK_WRAP_SET_HANDLED_COMPONENTS): Likewise.
26397 (loongarch_for_each_saved_reg): Skip registers that are wrapped
26400 2023-05-06 Xi Ruoyao <xry111@xry111.site>
26403 * Makefile.in (s-macro_list): Pass -nostdinc to
26406 2023-05-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26408 * config/riscv/riscv-protos.h (preferred_simd_mode): New function.
26409 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Ditto.
26410 (preferred_simd_mode): Ditto.
26411 * config/riscv/riscv.cc (riscv_get_arg_info): Handle RVV type in function arg.
26412 (riscv_convert_vector_bits): Adjust for RVV auto-vectorization.
26413 (riscv_preferred_simd_mode): New function.
26414 (TARGET_VECTORIZE_PREFERRED_SIMD_MODE): New target hook support.
26415 * config/riscv/vector.md: Add autovec.md.
26416 * config/riscv/autovec.md: New file.
26418 2023-05-06 Jakub Jelinek <jakub@redhat.com>
26420 * real.h (dconst_pi): Define.
26421 (dconst_e_ptr): Formatting fix.
26422 (dconst_pi_ptr): Declare.
26423 * real.cc (dconst_pi_ptr): New function.
26424 * gimple-range-op.cc (cfn_sincos::fold_range): Intersect the generic
26425 boundaries range with range computed from sin/cos of the particular
26426 bounds if the argument range is shorter than 2*pi.
26427 (cfn_sincos::op1_range): Take bulps into account when determining
26428 which result ranges are always invalid or behave like known NAN.
26430 2023-05-06 Aldy Hernandez <aldyh@redhat.com>
26432 * gimple-range-cache.cc (sbr_sparse_bitmap::set_bb_range): Do not
26433 pass type to vrange_storage::equal_p.
26434 * value-range-storage.cc (vrange_storage::equal_p): Remove type.
26435 (irange_storage::equal_p): Same.
26436 (frange_storage::equal_p): Same.
26437 * value-range-storage.h (class frange_storage): Same.
26439 2023-05-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26442 * config/riscv/riscv-vsetvl.cc (local_eliminate_vsetvl_insn): Remove it.
26443 (pass_vsetvl::local_eliminate_vsetvl_insn): New function.
26445 2023-05-06 liuhongt <hongtao.liu@intel.com>
26447 * combine.cc (maybe_swap_commutative_operands): Canonicalize
26448 vec_merge when mask is constant.
26449 * doc/md.texi: Document vec_merge canonicalization.
26451 2023-05-06 Jakub Jelinek <jakub@redhat.com>
26453 * value-range.h (frange_arithmetic): Declare.
26454 * range-op-float.cc (frange_arithmetic): No longer static.
26455 * gimple-range-op.cc (frange_mpfr_arg1): New function.
26456 (cfn_sqrt::fold_range): Intersect the generic boundaries range
26457 with range computed from sqrt of the particular bounds.
26458 (cfn_sqrt::op1_range): Intersect the generic boundaries range
26459 with range computed from squared particular bounds.
26461 2023-05-06 Jakub Jelinek <jakub@redhat.com>
26463 * Makefile.in (check_p_numbers): Rename to one_to_9999, move
26464 earlier with helper variables also renamed.
26465 (MATCH_SPLUT_SEQ): Use $(wordlist 1,$(NUM_MATCH_SPLITS),$(one_to_9999))
26466 instead of $(shell seq 1 $(NUM_MATCH_SPLITS)).
26467 (check_p_subdirs): Use $(one_to_9999) instead of $(check_p_numbers).
26469 2023-05-06 Hans-Peter Nilsson <hp@axis.com>
26471 * config/cris/cris.md (splitop): Add PLUS.
26472 * config/cris/cris.cc (cris_split_constant): Also handle
26473 PLUS when a split into two insns may be useful.
26475 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
26477 * config/cris/cris.md (movandsplit1): New define_peephole2.
26479 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
26481 * config/cris/cris.md (lsrandsplit1): New define_peephole2.
26483 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
26485 * doc/md.texi (define_peephole2): Document order of scanning.
26487 2023-05-05 Pan Li <pan2.li@intel.com>
26488 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
26490 * config/riscv/vector.md: Allow const as the operand of RVV
26491 indexed load/store.
26493 2023-05-05 Pan Li <pan2.li@intel.com>
26495 * config/riscv/riscv.h (VECTOR_STORE_FLAG_VALUE): Add new macro
26496 consumed by simplify_rtx.
26498 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
26500 * config/arm/arm-mve-builtins-base.cc (vrshrq, vshrq): New.
26501 * config/arm/arm-mve-builtins-base.def (vrshrq, vshrq): New.
26502 * config/arm/arm-mve-builtins-base.h (vrshrq, vshrq): New.
26503 * config/arm/arm_mve.h (vshrq): Remove.
26505 (vrshrq_m): Remove.
26507 (vrshrq_x): Remove.
26509 (vshrq_n_s8): Remove.
26510 (vshrq_n_s16): Remove.
26511 (vshrq_n_s32): Remove.
26512 (vshrq_n_u8): Remove.
26513 (vshrq_n_u16): Remove.
26514 (vshrq_n_u32): Remove.
26515 (vrshrq_n_u8): Remove.
26516 (vrshrq_n_s8): Remove.
26517 (vrshrq_n_u16): Remove.
26518 (vrshrq_n_s16): Remove.
26519 (vrshrq_n_u32): Remove.
26520 (vrshrq_n_s32): Remove.
26521 (vrshrq_m_n_s8): Remove.
26522 (vrshrq_m_n_s32): Remove.
26523 (vrshrq_m_n_s16): Remove.
26524 (vrshrq_m_n_u8): Remove.
26525 (vrshrq_m_n_u32): Remove.
26526 (vrshrq_m_n_u16): Remove.
26527 (vshrq_m_n_s8): Remove.
26528 (vshrq_m_n_s32): Remove.
26529 (vshrq_m_n_s16): Remove.
26530 (vshrq_m_n_u8): Remove.
26531 (vshrq_m_n_u32): Remove.
26532 (vshrq_m_n_u16): Remove.
26533 (vrshrq_x_n_s8): Remove.
26534 (vrshrq_x_n_s16): Remove.
26535 (vrshrq_x_n_s32): Remove.
26536 (vrshrq_x_n_u8): Remove.
26537 (vrshrq_x_n_u16): Remove.
26538 (vrshrq_x_n_u32): Remove.
26539 (vshrq_x_n_s8): Remove.
26540 (vshrq_x_n_s16): Remove.
26541 (vshrq_x_n_s32): Remove.
26542 (vshrq_x_n_u8): Remove.
26543 (vshrq_x_n_u16): Remove.
26544 (vshrq_x_n_u32): Remove.
26545 (__arm_vshrq_n_s8): Remove.
26546 (__arm_vshrq_n_s16): Remove.
26547 (__arm_vshrq_n_s32): Remove.
26548 (__arm_vshrq_n_u8): Remove.
26549 (__arm_vshrq_n_u16): Remove.
26550 (__arm_vshrq_n_u32): Remove.
26551 (__arm_vrshrq_n_u8): Remove.
26552 (__arm_vrshrq_n_s8): Remove.
26553 (__arm_vrshrq_n_u16): Remove.
26554 (__arm_vrshrq_n_s16): Remove.
26555 (__arm_vrshrq_n_u32): Remove.
26556 (__arm_vrshrq_n_s32): Remove.
26557 (__arm_vrshrq_m_n_s8): Remove.
26558 (__arm_vrshrq_m_n_s32): Remove.
26559 (__arm_vrshrq_m_n_s16): Remove.
26560 (__arm_vrshrq_m_n_u8): Remove.
26561 (__arm_vrshrq_m_n_u32): Remove.
26562 (__arm_vrshrq_m_n_u16): Remove.
26563 (__arm_vshrq_m_n_s8): Remove.
26564 (__arm_vshrq_m_n_s32): Remove.
26565 (__arm_vshrq_m_n_s16): Remove.
26566 (__arm_vshrq_m_n_u8): Remove.
26567 (__arm_vshrq_m_n_u32): Remove.
26568 (__arm_vshrq_m_n_u16): Remove.
26569 (__arm_vrshrq_x_n_s8): Remove.
26570 (__arm_vrshrq_x_n_s16): Remove.
26571 (__arm_vrshrq_x_n_s32): Remove.
26572 (__arm_vrshrq_x_n_u8): Remove.
26573 (__arm_vrshrq_x_n_u16): Remove.
26574 (__arm_vrshrq_x_n_u32): Remove.
26575 (__arm_vshrq_x_n_s8): Remove.
26576 (__arm_vshrq_x_n_s16): Remove.
26577 (__arm_vshrq_x_n_s32): Remove.
26578 (__arm_vshrq_x_n_u8): Remove.
26579 (__arm_vshrq_x_n_u16): Remove.
26580 (__arm_vshrq_x_n_u32): Remove.
26581 (__arm_vshrq): Remove.
26582 (__arm_vrshrq): Remove.
26583 (__arm_vrshrq_m): Remove.
26584 (__arm_vshrq_m): Remove.
26585 (__arm_vrshrq_x): Remove.
26586 (__arm_vshrq_x): Remove.
26588 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
26590 * config/arm/iterators.md (MVE_VSHRQ_M_N, MVE_VSHRQ_N): New.
26591 (mve_insn): Add vrshr, vshr.
26592 * config/arm/mve.md (mve_vshrq_n_<supf><mode>)
26593 (mve_vrshrq_n_<supf><mode>): Merge into ...
26594 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
26595 (mve_vrshrq_m_n_<supf><mode>, mve_vshrq_m_n_<supf><mode>): Merge
26597 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
26599 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
26601 * config/arm/arm-mve-builtins-shapes.cc (binary_rshift): New.
26602 * config/arm/arm-mve-builtins-shapes.h (binary_rshift): New.
26604 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
26606 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N_NO_U_F): New.
26607 (vqshrunbq, vqshruntq, vqrshrunbq, vqrshruntq): New.
26608 * config/arm/arm-mve-builtins-base.def (vqshrunbq, vqshruntq)
26609 (vqrshrunbq, vqrshruntq): New.
26610 * config/arm/arm-mve-builtins-base.h (vqshrunbq, vqshruntq)
26611 (vqrshrunbq, vqrshruntq): New.
26612 * config/arm/arm-mve-builtins.cc
26613 (function_instance::has_inactive_argument): Handle vqshrunbq,
26614 vqshruntq, vqrshrunbq, vqrshruntq.
26615 * config/arm/arm_mve.h (vqrshrunbq): Remove.
26616 (vqrshruntq): Remove.
26617 (vqrshrunbq_m): Remove.
26618 (vqrshruntq_m): Remove.
26619 (vqrshrunbq_n_s16): Remove.
26620 (vqrshrunbq_n_s32): Remove.
26621 (vqrshruntq_n_s16): Remove.
26622 (vqrshruntq_n_s32): Remove.
26623 (vqrshrunbq_m_n_s32): Remove.
26624 (vqrshrunbq_m_n_s16): Remove.
26625 (vqrshruntq_m_n_s32): Remove.
26626 (vqrshruntq_m_n_s16): Remove.
26627 (__arm_vqrshrunbq_n_s16): Remove.
26628 (__arm_vqrshrunbq_n_s32): Remove.
26629 (__arm_vqrshruntq_n_s16): Remove.
26630 (__arm_vqrshruntq_n_s32): Remove.
26631 (__arm_vqrshrunbq_m_n_s32): Remove.
26632 (__arm_vqrshrunbq_m_n_s16): Remove.
26633 (__arm_vqrshruntq_m_n_s32): Remove.
26634 (__arm_vqrshruntq_m_n_s16): Remove.
26635 (__arm_vqrshrunbq): Remove.
26636 (__arm_vqrshruntq): Remove.
26637 (__arm_vqrshrunbq_m): Remove.
26638 (__arm_vqrshruntq_m): Remove.
26639 (vqshrunbq): Remove.
26640 (vqshruntq): Remove.
26641 (vqshrunbq_m): Remove.
26642 (vqshruntq_m): Remove.
26643 (vqshrunbq_n_s16): Remove.
26644 (vqshruntq_n_s16): Remove.
26645 (vqshrunbq_n_s32): Remove.
26646 (vqshruntq_n_s32): Remove.
26647 (vqshrunbq_m_n_s32): Remove.
26648 (vqshrunbq_m_n_s16): Remove.
26649 (vqshruntq_m_n_s32): Remove.
26650 (vqshruntq_m_n_s16): Remove.
26651 (__arm_vqshrunbq_n_s16): Remove.
26652 (__arm_vqshruntq_n_s16): Remove.
26653 (__arm_vqshrunbq_n_s32): Remove.
26654 (__arm_vqshruntq_n_s32): Remove.
26655 (__arm_vqshrunbq_m_n_s32): Remove.
26656 (__arm_vqshrunbq_m_n_s16): Remove.
26657 (__arm_vqshruntq_m_n_s32): Remove.
26658 (__arm_vqshruntq_m_n_s16): Remove.
26659 (__arm_vqshrunbq): Remove.
26660 (__arm_vqshruntq): Remove.
26661 (__arm_vqshrunbq_m): Remove.
26662 (__arm_vqshruntq_m): Remove.
26664 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
26666 * config/arm/iterators.md (MVE_SHRN_N): Add VQRSHRUNBQ,
26667 VQRSHRUNTQ, VQSHRUNBQ, VQSHRUNTQ.
26668 (MVE_SHRN_M_N): Likewise.
26669 (mve_insn): Add vqrshrunb, vqrshrunt, vqshrunb, vqshrunt.
26670 (isu): Add VQRSHRUNBQ, VQRSHRUNTQ, VQSHRUNBQ, VQSHRUNTQ.
26672 * config/arm/mve.md (mve_vqrshrunbq_n_s<mode>): Remove.
26673 (mve_vqrshruntq_n_s<mode>): Remove.
26674 (mve_vqshrunbq_n_s<mode>): Remove.
26675 (mve_vqshruntq_n_s<mode>): Remove.
26676 (mve_vqrshrunbq_m_n_s<mode>): Remove.
26677 (mve_vqrshruntq_m_n_s<mode>): Remove.
26678 (mve_vqshrunbq_m_n_s<mode>): Remove.
26679 (mve_vqshruntq_m_n_s<mode>): Remove.
26681 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
26683 * config/arm/arm-mve-builtins-shapes.cc
26684 (binary_rshift_narrow_unsigned): New.
26685 * config/arm/arm-mve-builtins-shapes.h
26686 (binary_rshift_narrow_unsigned): New.
26688 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
26690 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N_NO_F): New.
26691 (vshrnbq, vshrntq, vrshrnbq, vrshrntq, vqshrnbq, vqshrntq)
26692 (vqrshrnbq, vqrshrntq): New.
26693 * config/arm/arm-mve-builtins-base.def (vshrnbq, vshrntq)
26694 (vrshrnbq, vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq, vqrshrntq):
26696 * config/arm/arm-mve-builtins-base.h (vshrnbq, vshrntq, vrshrnbq)
26697 (vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq, vqrshrntq): New.
26698 * config/arm/arm-mve-builtins.cc
26699 (function_instance::has_inactive_argument): Handle vshrnbq,
26700 vshrntq, vrshrnbq, vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq,
26702 * config/arm/arm_mve.h (vshrnbq): Remove.
26704 (vshrnbq_m): Remove.
26705 (vshrntq_m): Remove.
26706 (vshrnbq_n_s16): Remove.
26707 (vshrntq_n_s16): Remove.
26708 (vshrnbq_n_u16): Remove.
26709 (vshrntq_n_u16): Remove.
26710 (vshrnbq_n_s32): Remove.
26711 (vshrntq_n_s32): Remove.
26712 (vshrnbq_n_u32): Remove.
26713 (vshrntq_n_u32): Remove.
26714 (vshrnbq_m_n_s32): Remove.
26715 (vshrnbq_m_n_s16): Remove.
26716 (vshrnbq_m_n_u32): Remove.
26717 (vshrnbq_m_n_u16): Remove.
26718 (vshrntq_m_n_s32): Remove.
26719 (vshrntq_m_n_s16): Remove.
26720 (vshrntq_m_n_u32): Remove.
26721 (vshrntq_m_n_u16): Remove.
26722 (__arm_vshrnbq_n_s16): Remove.
26723 (__arm_vshrntq_n_s16): Remove.
26724 (__arm_vshrnbq_n_u16): Remove.
26725 (__arm_vshrntq_n_u16): Remove.
26726 (__arm_vshrnbq_n_s32): Remove.
26727 (__arm_vshrntq_n_s32): Remove.
26728 (__arm_vshrnbq_n_u32): Remove.
26729 (__arm_vshrntq_n_u32): Remove.
26730 (__arm_vshrnbq_m_n_s32): Remove.
26731 (__arm_vshrnbq_m_n_s16): Remove.
26732 (__arm_vshrnbq_m_n_u32): Remove.
26733 (__arm_vshrnbq_m_n_u16): Remove.
26734 (__arm_vshrntq_m_n_s32): Remove.
26735 (__arm_vshrntq_m_n_s16): Remove.
26736 (__arm_vshrntq_m_n_u32): Remove.
26737 (__arm_vshrntq_m_n_u16): Remove.
26738 (__arm_vshrnbq): Remove.
26739 (__arm_vshrntq): Remove.
26740 (__arm_vshrnbq_m): Remove.
26741 (__arm_vshrntq_m): Remove.
26742 (vrshrnbq): Remove.
26743 (vrshrntq): Remove.
26744 (vrshrnbq_m): Remove.
26745 (vrshrntq_m): Remove.
26746 (vrshrnbq_n_s16): Remove.
26747 (vrshrntq_n_s16): Remove.
26748 (vrshrnbq_n_u16): Remove.
26749 (vrshrntq_n_u16): Remove.
26750 (vrshrnbq_n_s32): Remove.
26751 (vrshrntq_n_s32): Remove.
26752 (vrshrnbq_n_u32): Remove.
26753 (vrshrntq_n_u32): Remove.
26754 (vrshrnbq_m_n_s32): Remove.
26755 (vrshrnbq_m_n_s16): Remove.
26756 (vrshrnbq_m_n_u32): Remove.
26757 (vrshrnbq_m_n_u16): Remove.
26758 (vrshrntq_m_n_s32): Remove.
26759 (vrshrntq_m_n_s16): Remove.
26760 (vrshrntq_m_n_u32): Remove.
26761 (vrshrntq_m_n_u16): Remove.
26762 (__arm_vrshrnbq_n_s16): Remove.
26763 (__arm_vrshrntq_n_s16): Remove.
26764 (__arm_vrshrnbq_n_u16): Remove.
26765 (__arm_vrshrntq_n_u16): Remove.
26766 (__arm_vrshrnbq_n_s32): Remove.
26767 (__arm_vrshrntq_n_s32): Remove.
26768 (__arm_vrshrnbq_n_u32): Remove.
26769 (__arm_vrshrntq_n_u32): Remove.
26770 (__arm_vrshrnbq_m_n_s32): Remove.
26771 (__arm_vrshrnbq_m_n_s16): Remove.
26772 (__arm_vrshrnbq_m_n_u32): Remove.
26773 (__arm_vrshrnbq_m_n_u16): Remove.
26774 (__arm_vrshrntq_m_n_s32): Remove.
26775 (__arm_vrshrntq_m_n_s16): Remove.
26776 (__arm_vrshrntq_m_n_u32): Remove.
26777 (__arm_vrshrntq_m_n_u16): Remove.
26778 (__arm_vrshrnbq): Remove.
26779 (__arm_vrshrntq): Remove.
26780 (__arm_vrshrnbq_m): Remove.
26781 (__arm_vrshrntq_m): Remove.
26782 (vqshrnbq): Remove.
26783 (vqshrntq): Remove.
26784 (vqshrnbq_m): Remove.
26785 (vqshrntq_m): Remove.
26786 (vqshrnbq_n_s16): Remove.
26787 (vqshrntq_n_s16): Remove.
26788 (vqshrnbq_n_u16): Remove.
26789 (vqshrntq_n_u16): Remove.
26790 (vqshrnbq_n_s32): Remove.
26791 (vqshrntq_n_s32): Remove.
26792 (vqshrnbq_n_u32): Remove.
26793 (vqshrntq_n_u32): Remove.
26794 (vqshrnbq_m_n_s32): Remove.
26795 (vqshrnbq_m_n_s16): Remove.
26796 (vqshrnbq_m_n_u32): Remove.
26797 (vqshrnbq_m_n_u16): Remove.
26798 (vqshrntq_m_n_s32): Remove.
26799 (vqshrntq_m_n_s16): Remove.
26800 (vqshrntq_m_n_u32): Remove.
26801 (vqshrntq_m_n_u16): Remove.
26802 (__arm_vqshrnbq_n_s16): Remove.
26803 (__arm_vqshrntq_n_s16): Remove.
26804 (__arm_vqshrnbq_n_u16): Remove.
26805 (__arm_vqshrntq_n_u16): Remove.
26806 (__arm_vqshrnbq_n_s32): Remove.
26807 (__arm_vqshrntq_n_s32): Remove.
26808 (__arm_vqshrnbq_n_u32): Remove.
26809 (__arm_vqshrntq_n_u32): Remove.
26810 (__arm_vqshrnbq_m_n_s32): Remove.
26811 (__arm_vqshrnbq_m_n_s16): Remove.
26812 (__arm_vqshrnbq_m_n_u32): Remove.
26813 (__arm_vqshrnbq_m_n_u16): Remove.
26814 (__arm_vqshrntq_m_n_s32): Remove.
26815 (__arm_vqshrntq_m_n_s16): Remove.
26816 (__arm_vqshrntq_m_n_u32): Remove.
26817 (__arm_vqshrntq_m_n_u16): Remove.
26818 (__arm_vqshrnbq): Remove.
26819 (__arm_vqshrntq): Remove.
26820 (__arm_vqshrnbq_m): Remove.
26821 (__arm_vqshrntq_m): Remove.
26822 (vqrshrnbq): Remove.
26823 (vqrshrntq): Remove.
26824 (vqrshrnbq_m): Remove.
26825 (vqrshrntq_m): Remove.
26826 (vqrshrnbq_n_s16): Remove.
26827 (vqrshrnbq_n_u16): Remove.
26828 (vqrshrnbq_n_s32): Remove.
26829 (vqrshrnbq_n_u32): Remove.
26830 (vqrshrntq_n_s16): Remove.
26831 (vqrshrntq_n_u16): Remove.
26832 (vqrshrntq_n_s32): Remove.
26833 (vqrshrntq_n_u32): Remove.
26834 (vqrshrnbq_m_n_s32): Remove.
26835 (vqrshrnbq_m_n_s16): Remove.
26836 (vqrshrnbq_m_n_u32): Remove.
26837 (vqrshrnbq_m_n_u16): Remove.
26838 (vqrshrntq_m_n_s32): Remove.
26839 (vqrshrntq_m_n_s16): Remove.
26840 (vqrshrntq_m_n_u32): Remove.
26841 (vqrshrntq_m_n_u16): Remove.
26842 (__arm_vqrshrnbq_n_s16): Remove.
26843 (__arm_vqrshrnbq_n_u16): Remove.
26844 (__arm_vqrshrnbq_n_s32): Remove.
26845 (__arm_vqrshrnbq_n_u32): Remove.
26846 (__arm_vqrshrntq_n_s16): Remove.
26847 (__arm_vqrshrntq_n_u16): Remove.
26848 (__arm_vqrshrntq_n_s32): Remove.
26849 (__arm_vqrshrntq_n_u32): Remove.
26850 (__arm_vqrshrnbq_m_n_s32): Remove.
26851 (__arm_vqrshrnbq_m_n_s16): Remove.
26852 (__arm_vqrshrnbq_m_n_u32): Remove.
26853 (__arm_vqrshrnbq_m_n_u16): Remove.
26854 (__arm_vqrshrntq_m_n_s32): Remove.
26855 (__arm_vqrshrntq_m_n_s16): Remove.
26856 (__arm_vqrshrntq_m_n_u32): Remove.
26857 (__arm_vqrshrntq_m_n_u16): Remove.
26858 (__arm_vqrshrnbq): Remove.
26859 (__arm_vqrshrntq): Remove.
26860 (__arm_vqrshrnbq_m): Remove.
26861 (__arm_vqrshrntq_m): Remove.
26863 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
26865 * config/arm/iterators.md (MVE_SHRN_N, MVE_SHRN_M_N): New.
26866 (mve_insn): Add vqrshrnb, vqrshrnt, vqshrnb, vqshrnt, vrshrnb,
26867 vrshrnt, vshrnb, vshrnt.
26869 * config/arm/mve.md (mve_vqrshrnbq_n_<supf><mode>)
26870 (mve_vqrshrntq_n_<supf><mode>, mve_vqshrnbq_n_<supf><mode>)
26871 (mve_vqshrntq_n_<supf><mode>, mve_vrshrnbq_n_<supf><mode>)
26872 (mve_vrshrntq_n_<supf><mode>, mve_vshrnbq_n_<supf><mode>)
26873 (mve_vshrntq_n_<supf><mode>): Merge into ...
26874 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
26875 (mve_vqrshrnbq_m_n_<supf><mode>, mve_vqrshrntq_m_n_<supf><mode>)
26876 (mve_vqshrnbq_m_n_<supf><mode>, mve_vqshrntq_m_n_<supf><mode>)
26877 (mve_vrshrnbq_m_n_<supf><mode>, mve_vrshrntq_m_n_<supf><mode>)
26878 (mve_vshrnbq_m_n_<supf><mode>, mve_vshrntq_m_n_<supf><mode>):
26880 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
26882 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
26884 * config/arm/arm-mve-builtins-shapes.cc (binary_rshift_narrow):
26886 * config/arm/arm-mve-builtins-shapes.h (binary_rshift_narrow): New.
26888 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
26890 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_NO_F): New.
26891 (vmaxq, vminq): New.
26892 * config/arm/arm-mve-builtins-base.def (vmaxq, vminq): New.
26893 * config/arm/arm-mve-builtins-base.h (vmaxq, vminq): New.
26894 * config/arm/arm_mve.h (vminq): Remove.
26900 (vminq_u8): Remove.
26901 (vmaxq_u8): Remove.
26902 (vminq_s8): Remove.
26903 (vmaxq_s8): Remove.
26904 (vminq_u16): Remove.
26905 (vmaxq_u16): Remove.
26906 (vminq_s16): Remove.
26907 (vmaxq_s16): Remove.
26908 (vminq_u32): Remove.
26909 (vmaxq_u32): Remove.
26910 (vminq_s32): Remove.
26911 (vmaxq_s32): Remove.
26912 (vmaxq_m_s8): Remove.
26913 (vmaxq_m_s32): Remove.
26914 (vmaxq_m_s16): Remove.
26915 (vmaxq_m_u8): Remove.
26916 (vmaxq_m_u32): Remove.
26917 (vmaxq_m_u16): Remove.
26918 (vminq_m_s8): Remove.
26919 (vminq_m_s32): Remove.
26920 (vminq_m_s16): Remove.
26921 (vminq_m_u8): Remove.
26922 (vminq_m_u32): Remove.
26923 (vminq_m_u16): Remove.
26924 (vminq_x_s8): Remove.
26925 (vminq_x_s16): Remove.
26926 (vminq_x_s32): Remove.
26927 (vminq_x_u8): Remove.
26928 (vminq_x_u16): Remove.
26929 (vminq_x_u32): Remove.
26930 (vmaxq_x_s8): Remove.
26931 (vmaxq_x_s16): Remove.
26932 (vmaxq_x_s32): Remove.
26933 (vmaxq_x_u8): Remove.
26934 (vmaxq_x_u16): Remove.
26935 (vmaxq_x_u32): Remove.
26936 (__arm_vminq_u8): Remove.
26937 (__arm_vmaxq_u8): Remove.
26938 (__arm_vminq_s8): Remove.
26939 (__arm_vmaxq_s8): Remove.
26940 (__arm_vminq_u16): Remove.
26941 (__arm_vmaxq_u16): Remove.
26942 (__arm_vminq_s16): Remove.
26943 (__arm_vmaxq_s16): Remove.
26944 (__arm_vminq_u32): Remove.
26945 (__arm_vmaxq_u32): Remove.
26946 (__arm_vminq_s32): Remove.
26947 (__arm_vmaxq_s32): Remove.
26948 (__arm_vmaxq_m_s8): Remove.
26949 (__arm_vmaxq_m_s32): Remove.
26950 (__arm_vmaxq_m_s16): Remove.
26951 (__arm_vmaxq_m_u8): Remove.
26952 (__arm_vmaxq_m_u32): Remove.
26953 (__arm_vmaxq_m_u16): Remove.
26954 (__arm_vminq_m_s8): Remove.
26955 (__arm_vminq_m_s32): Remove.
26956 (__arm_vminq_m_s16): Remove.
26957 (__arm_vminq_m_u8): Remove.
26958 (__arm_vminq_m_u32): Remove.
26959 (__arm_vminq_m_u16): Remove.
26960 (__arm_vminq_x_s8): Remove.
26961 (__arm_vminq_x_s16): Remove.
26962 (__arm_vminq_x_s32): Remove.
26963 (__arm_vminq_x_u8): Remove.
26964 (__arm_vminq_x_u16): Remove.
26965 (__arm_vminq_x_u32): Remove.
26966 (__arm_vmaxq_x_s8): Remove.
26967 (__arm_vmaxq_x_s16): Remove.
26968 (__arm_vmaxq_x_s32): Remove.
26969 (__arm_vmaxq_x_u8): Remove.
26970 (__arm_vmaxq_x_u16): Remove.
26971 (__arm_vmaxq_x_u32): Remove.
26972 (__arm_vminq): Remove.
26973 (__arm_vmaxq): Remove.
26974 (__arm_vmaxq_m): Remove.
26975 (__arm_vminq_m): Remove.
26976 (__arm_vminq_x): Remove.
26977 (__arm_vmaxq_x): Remove.
26979 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
26981 * config/arm/iterators.md (MAX_MIN_SU): New.
26982 (max_min_su_str): New.
26983 (max_min_supf): New.
26984 * config/arm/mve.md (mve_vmaxq_s<mode>, mve_vmaxq_u<mode>)
26985 (mve_vminq_s<mode>, mve_vminq_u<mode>): Merge into ...
26986 (mve_<max_min_su_str>q_<max_min_supf><mode>): ... this.
26988 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
26990 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_M_N_R): New.
26991 (vqshlq, vshlq): New.
26992 * config/arm/arm-mve-builtins-base.def (vqshlq, vshlq): New.
26993 * config/arm/arm-mve-builtins-base.h (vqshlq, vshlq): New.
26994 * config/arm/arm_mve.h (vshlq): Remove.
26997 (vshlq_m_r): Remove.
26999 (vshlq_m_n): Remove.
27001 (vshlq_x_n): Remove.
27002 (vshlq_s8): Remove.
27003 (vshlq_s16): Remove.
27004 (vshlq_s32): Remove.
27005 (vshlq_u8): Remove.
27006 (vshlq_u16): Remove.
27007 (vshlq_u32): Remove.
27008 (vshlq_r_u8): Remove.
27009 (vshlq_n_u8): Remove.
27010 (vshlq_r_s8): Remove.
27011 (vshlq_n_s8): Remove.
27012 (vshlq_r_u16): Remove.
27013 (vshlq_n_u16): Remove.
27014 (vshlq_r_s16): Remove.
27015 (vshlq_n_s16): Remove.
27016 (vshlq_r_u32): Remove.
27017 (vshlq_n_u32): Remove.
27018 (vshlq_r_s32): Remove.
27019 (vshlq_n_s32): Remove.
27020 (vshlq_m_r_u8): Remove.
27021 (vshlq_m_r_s8): Remove.
27022 (vshlq_m_r_u16): Remove.
27023 (vshlq_m_r_s16): Remove.
27024 (vshlq_m_r_u32): Remove.
27025 (vshlq_m_r_s32): Remove.
27026 (vshlq_m_u8): Remove.
27027 (vshlq_m_s8): Remove.
27028 (vshlq_m_u16): Remove.
27029 (vshlq_m_s16): Remove.
27030 (vshlq_m_u32): Remove.
27031 (vshlq_m_s32): Remove.
27032 (vshlq_m_n_s8): Remove.
27033 (vshlq_m_n_s32): Remove.
27034 (vshlq_m_n_s16): Remove.
27035 (vshlq_m_n_u8): Remove.
27036 (vshlq_m_n_u32): Remove.
27037 (vshlq_m_n_u16): Remove.
27038 (vshlq_x_s8): Remove.
27039 (vshlq_x_s16): Remove.
27040 (vshlq_x_s32): Remove.
27041 (vshlq_x_u8): Remove.
27042 (vshlq_x_u16): Remove.
27043 (vshlq_x_u32): Remove.
27044 (vshlq_x_n_s8): Remove.
27045 (vshlq_x_n_s16): Remove.
27046 (vshlq_x_n_s32): Remove.
27047 (vshlq_x_n_u8): Remove.
27048 (vshlq_x_n_u16): Remove.
27049 (vshlq_x_n_u32): Remove.
27050 (__arm_vshlq_s8): Remove.
27051 (__arm_vshlq_s16): Remove.
27052 (__arm_vshlq_s32): Remove.
27053 (__arm_vshlq_u8): Remove.
27054 (__arm_vshlq_u16): Remove.
27055 (__arm_vshlq_u32): Remove.
27056 (__arm_vshlq_r_u8): Remove.
27057 (__arm_vshlq_n_u8): Remove.
27058 (__arm_vshlq_r_s8): Remove.
27059 (__arm_vshlq_n_s8): Remove.
27060 (__arm_vshlq_r_u16): Remove.
27061 (__arm_vshlq_n_u16): Remove.
27062 (__arm_vshlq_r_s16): Remove.
27063 (__arm_vshlq_n_s16): Remove.
27064 (__arm_vshlq_r_u32): Remove.
27065 (__arm_vshlq_n_u32): Remove.
27066 (__arm_vshlq_r_s32): Remove.
27067 (__arm_vshlq_n_s32): Remove.
27068 (__arm_vshlq_m_r_u8): Remove.
27069 (__arm_vshlq_m_r_s8): Remove.
27070 (__arm_vshlq_m_r_u16): Remove.
27071 (__arm_vshlq_m_r_s16): Remove.
27072 (__arm_vshlq_m_r_u32): Remove.
27073 (__arm_vshlq_m_r_s32): Remove.
27074 (__arm_vshlq_m_u8): Remove.
27075 (__arm_vshlq_m_s8): Remove.
27076 (__arm_vshlq_m_u16): Remove.
27077 (__arm_vshlq_m_s16): Remove.
27078 (__arm_vshlq_m_u32): Remove.
27079 (__arm_vshlq_m_s32): Remove.
27080 (__arm_vshlq_m_n_s8): Remove.
27081 (__arm_vshlq_m_n_s32): Remove.
27082 (__arm_vshlq_m_n_s16): Remove.
27083 (__arm_vshlq_m_n_u8): Remove.
27084 (__arm_vshlq_m_n_u32): Remove.
27085 (__arm_vshlq_m_n_u16): Remove.
27086 (__arm_vshlq_x_s8): Remove.
27087 (__arm_vshlq_x_s16): Remove.
27088 (__arm_vshlq_x_s32): Remove.
27089 (__arm_vshlq_x_u8): Remove.
27090 (__arm_vshlq_x_u16): Remove.
27091 (__arm_vshlq_x_u32): Remove.
27092 (__arm_vshlq_x_n_s8): Remove.
27093 (__arm_vshlq_x_n_s16): Remove.
27094 (__arm_vshlq_x_n_s32): Remove.
27095 (__arm_vshlq_x_n_u8): Remove.
27096 (__arm_vshlq_x_n_u16): Remove.
27097 (__arm_vshlq_x_n_u32): Remove.
27098 (__arm_vshlq): Remove.
27099 (__arm_vshlq_r): Remove.
27100 (__arm_vshlq_n): Remove.
27101 (__arm_vshlq_m_r): Remove.
27102 (__arm_vshlq_m): Remove.
27103 (__arm_vshlq_m_n): Remove.
27104 (__arm_vshlq_x): Remove.
27105 (__arm_vshlq_x_n): Remove.
27107 (vqshlq_r): Remove.
27108 (vqshlq_n): Remove.
27109 (vqshlq_m_r): Remove.
27110 (vqshlq_m_n): Remove.
27111 (vqshlq_m): Remove.
27112 (vqshlq_u8): Remove.
27113 (vqshlq_r_u8): Remove.
27114 (vqshlq_n_u8): Remove.
27115 (vqshlq_s8): Remove.
27116 (vqshlq_r_s8): Remove.
27117 (vqshlq_n_s8): Remove.
27118 (vqshlq_u16): Remove.
27119 (vqshlq_r_u16): Remove.
27120 (vqshlq_n_u16): Remove.
27121 (vqshlq_s16): Remove.
27122 (vqshlq_r_s16): Remove.
27123 (vqshlq_n_s16): Remove.
27124 (vqshlq_u32): Remove.
27125 (vqshlq_r_u32): Remove.
27126 (vqshlq_n_u32): Remove.
27127 (vqshlq_s32): Remove.
27128 (vqshlq_r_s32): Remove.
27129 (vqshlq_n_s32): Remove.
27130 (vqshlq_m_r_u8): Remove.
27131 (vqshlq_m_r_s8): Remove.
27132 (vqshlq_m_r_u16): Remove.
27133 (vqshlq_m_r_s16): Remove.
27134 (vqshlq_m_r_u32): Remove.
27135 (vqshlq_m_r_s32): Remove.
27136 (vqshlq_m_n_s8): Remove.
27137 (vqshlq_m_n_s32): Remove.
27138 (vqshlq_m_n_s16): Remove.
27139 (vqshlq_m_n_u8): Remove.
27140 (vqshlq_m_n_u32): Remove.
27141 (vqshlq_m_n_u16): Remove.
27142 (vqshlq_m_s8): Remove.
27143 (vqshlq_m_s32): Remove.
27144 (vqshlq_m_s16): Remove.
27145 (vqshlq_m_u8): Remove.
27146 (vqshlq_m_u32): Remove.
27147 (vqshlq_m_u16): Remove.
27148 (__arm_vqshlq_u8): Remove.
27149 (__arm_vqshlq_r_u8): Remove.
27150 (__arm_vqshlq_n_u8): Remove.
27151 (__arm_vqshlq_s8): Remove.
27152 (__arm_vqshlq_r_s8): Remove.
27153 (__arm_vqshlq_n_s8): Remove.
27154 (__arm_vqshlq_u16): Remove.
27155 (__arm_vqshlq_r_u16): Remove.
27156 (__arm_vqshlq_n_u16): Remove.
27157 (__arm_vqshlq_s16): Remove.
27158 (__arm_vqshlq_r_s16): Remove.
27159 (__arm_vqshlq_n_s16): Remove.
27160 (__arm_vqshlq_u32): Remove.
27161 (__arm_vqshlq_r_u32): Remove.
27162 (__arm_vqshlq_n_u32): Remove.
27163 (__arm_vqshlq_s32): Remove.
27164 (__arm_vqshlq_r_s32): Remove.
27165 (__arm_vqshlq_n_s32): Remove.
27166 (__arm_vqshlq_m_r_u8): Remove.
27167 (__arm_vqshlq_m_r_s8): Remove.
27168 (__arm_vqshlq_m_r_u16): Remove.
27169 (__arm_vqshlq_m_r_s16): Remove.
27170 (__arm_vqshlq_m_r_u32): Remove.
27171 (__arm_vqshlq_m_r_s32): Remove.
27172 (__arm_vqshlq_m_n_s8): Remove.
27173 (__arm_vqshlq_m_n_s32): Remove.
27174 (__arm_vqshlq_m_n_s16): Remove.
27175 (__arm_vqshlq_m_n_u8): Remove.
27176 (__arm_vqshlq_m_n_u32): Remove.
27177 (__arm_vqshlq_m_n_u16): Remove.
27178 (__arm_vqshlq_m_s8): Remove.
27179 (__arm_vqshlq_m_s32): Remove.
27180 (__arm_vqshlq_m_s16): Remove.
27181 (__arm_vqshlq_m_u8): Remove.
27182 (__arm_vqshlq_m_u32): Remove.
27183 (__arm_vqshlq_m_u16): Remove.
27184 (__arm_vqshlq): Remove.
27185 (__arm_vqshlq_r): Remove.
27186 (__arm_vqshlq_n): Remove.
27187 (__arm_vqshlq_m_r): Remove.
27188 (__arm_vqshlq_m_n): Remove.
27189 (__arm_vqshlq_m): Remove.
27191 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
27193 * config/arm/arm-mve-builtins-functions.h (class
27194 unspec_mve_function_exact_insn_vshl): New.
27196 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
27198 * config/arm/arm-mve-builtins-shapes.cc (binary_lshift_r): New.
27199 * config/arm/arm-mve-builtins-shapes.h (binary_lshift_r): New.
27201 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
27203 * config/arm/arm-mve-builtins.cc (has_inactive_argument)
27204 (finish_opt_n_resolution): Handle MODE_r.
27205 * config/arm/arm-mve-builtins.def (r): New mode.
27207 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
27209 * config/arm/arm-mve-builtins-shapes.cc (binary_lshift): New.
27210 * config/arm/arm-mve-builtins-shapes.h (binary_lshift): New.
27212 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
27214 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_N): New.
27216 * config/arm/arm-mve-builtins-base.def (vabdq): New.
27217 * config/arm/arm-mve-builtins-base.h (vabdq): New.
27218 * config/arm/arm_mve.h (vabdq): Remove.
27221 (vabdq_u8): Remove.
27222 (vabdq_s8): Remove.
27223 (vabdq_u16): Remove.
27224 (vabdq_s16): Remove.
27225 (vabdq_u32): Remove.
27226 (vabdq_s32): Remove.
27227 (vabdq_f16): Remove.
27228 (vabdq_f32): Remove.
27229 (vabdq_m_s8): Remove.
27230 (vabdq_m_s32): Remove.
27231 (vabdq_m_s16): Remove.
27232 (vabdq_m_u8): Remove.
27233 (vabdq_m_u32): Remove.
27234 (vabdq_m_u16): Remove.
27235 (vabdq_m_f32): Remove.
27236 (vabdq_m_f16): Remove.
27237 (vabdq_x_s8): Remove.
27238 (vabdq_x_s16): Remove.
27239 (vabdq_x_s32): Remove.
27240 (vabdq_x_u8): Remove.
27241 (vabdq_x_u16): Remove.
27242 (vabdq_x_u32): Remove.
27243 (vabdq_x_f16): Remove.
27244 (vabdq_x_f32): Remove.
27245 (__arm_vabdq_u8): Remove.
27246 (__arm_vabdq_s8): Remove.
27247 (__arm_vabdq_u16): Remove.
27248 (__arm_vabdq_s16): Remove.
27249 (__arm_vabdq_u32): Remove.
27250 (__arm_vabdq_s32): Remove.
27251 (__arm_vabdq_m_s8): Remove.
27252 (__arm_vabdq_m_s32): Remove.
27253 (__arm_vabdq_m_s16): Remove.
27254 (__arm_vabdq_m_u8): Remove.
27255 (__arm_vabdq_m_u32): Remove.
27256 (__arm_vabdq_m_u16): Remove.
27257 (__arm_vabdq_x_s8): Remove.
27258 (__arm_vabdq_x_s16): Remove.
27259 (__arm_vabdq_x_s32): Remove.
27260 (__arm_vabdq_x_u8): Remove.
27261 (__arm_vabdq_x_u16): Remove.
27262 (__arm_vabdq_x_u32): Remove.
27263 (__arm_vabdq_f16): Remove.
27264 (__arm_vabdq_f32): Remove.
27265 (__arm_vabdq_m_f32): Remove.
27266 (__arm_vabdq_m_f16): Remove.
27267 (__arm_vabdq_x_f16): Remove.
27268 (__arm_vabdq_x_f32): Remove.
27269 (__arm_vabdq): Remove.
27270 (__arm_vabdq_m): Remove.
27271 (__arm_vabdq_x): Remove.
27273 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
27275 * config/arm/iterators.md (MVE_FP_M_BINARY): Add vabdq.
27276 (MVE_FP_VABDQ_ONLY): New.
27277 (mve_insn): Add vabd.
27278 * config/arm/mve.md (mve_vabdq_f<mode>): Move into ...
27279 (@mve_<mve_insn>q_f<mode>): ... this.
27280 (mve_vabdq_m_f<mode>): Remove.
27282 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
27284 * config/arm/arm-mve-builtins-base.cc (vqrdmulhq): New.
27285 * config/arm/arm-mve-builtins-base.def (vqrdmulhq): New.
27286 * config/arm/arm-mve-builtins-base.h (vqrdmulhq): New.
27287 * config/arm/arm_mve.h (vqrdmulhq): Remove.
27288 (vqrdmulhq_m): Remove.
27289 (vqrdmulhq_s8): Remove.
27290 (vqrdmulhq_n_s8): Remove.
27291 (vqrdmulhq_s16): Remove.
27292 (vqrdmulhq_n_s16): Remove.
27293 (vqrdmulhq_s32): Remove.
27294 (vqrdmulhq_n_s32): Remove.
27295 (vqrdmulhq_m_n_s8): Remove.
27296 (vqrdmulhq_m_n_s32): Remove.
27297 (vqrdmulhq_m_n_s16): Remove.
27298 (vqrdmulhq_m_s8): Remove.
27299 (vqrdmulhq_m_s32): Remove.
27300 (vqrdmulhq_m_s16): Remove.
27301 (__arm_vqrdmulhq_s8): Remove.
27302 (__arm_vqrdmulhq_n_s8): Remove.
27303 (__arm_vqrdmulhq_s16): Remove.
27304 (__arm_vqrdmulhq_n_s16): Remove.
27305 (__arm_vqrdmulhq_s32): Remove.
27306 (__arm_vqrdmulhq_n_s32): Remove.
27307 (__arm_vqrdmulhq_m_n_s8): Remove.
27308 (__arm_vqrdmulhq_m_n_s32): Remove.
27309 (__arm_vqrdmulhq_m_n_s16): Remove.
27310 (__arm_vqrdmulhq_m_s8): Remove.
27311 (__arm_vqrdmulhq_m_s32): Remove.
27312 (__arm_vqrdmulhq_m_s16): Remove.
27313 (__arm_vqrdmulhq): Remove.
27314 (__arm_vqrdmulhq_m): Remove.
27316 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
27318 * config/arm/iterators.md (MVE_SHIFT_M_R, MVE_SHIFT_M_N)
27319 (MVE_SHIFT_N, MVE_SHIFT_R): New.
27320 (mve_insn): Add vqshl, vshl.
27321 * config/arm/mve.md (mve_vqshlq_n_<supf><mode>)
27322 (mve_vshlq_n_<supf><mode>): Merge into ...
27323 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
27324 (mve_vqshlq_r_<supf><mode>, mve_vshlq_r_<supf><mode>): Merge into
27326 (@mve_<mve_insn>q_r_<supf><mode>): ... this.
27327 (mve_vqshlq_m_r_<supf><mode>, mve_vshlq_m_r_<supf><mode>): Merge
27329 (@mve_<mve_insn>q_m_r_<supf><mode>): ... this.
27330 (mve_vqshlq_m_n_<supf><mode>, mve_vshlq_m_n_<supf><mode>): Merge
27332 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
27333 * config/arm/vec-common.md (mve_vshlq_<supf><mode>): Transform
27335 (@mve_<mve_insn>q_<supf><mode>): ... this.
27337 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
27339 * config/arm/arm-mve-builtins-base.cc (vqrshlq, vrshlq): New.
27340 * config/arm/arm-mve-builtins-base.def (vqrshlq, vrshlq): New.
27341 * config/arm/arm-mve-builtins-base.h (vqrshlq, vrshlq): New.
27342 * config/arm/arm-mve-builtins.cc (has_inactive_argument): Handle
27344 * config/arm/arm_mve.h (vrshlq): Remove.
27345 (vrshlq_m_n): Remove.
27346 (vrshlq_m): Remove.
27347 (vrshlq_x): Remove.
27348 (vrshlq_u8): Remove.
27349 (vrshlq_n_u8): Remove.
27350 (vrshlq_s8): Remove.
27351 (vrshlq_n_s8): Remove.
27352 (vrshlq_u16): Remove.
27353 (vrshlq_n_u16): Remove.
27354 (vrshlq_s16): Remove.
27355 (vrshlq_n_s16): Remove.
27356 (vrshlq_u32): Remove.
27357 (vrshlq_n_u32): Remove.
27358 (vrshlq_s32): Remove.
27359 (vrshlq_n_s32): Remove.
27360 (vrshlq_m_n_u8): Remove.
27361 (vrshlq_m_n_s8): Remove.
27362 (vrshlq_m_n_u16): Remove.
27363 (vrshlq_m_n_s16): Remove.
27364 (vrshlq_m_n_u32): Remove.
27365 (vrshlq_m_n_s32): Remove.
27366 (vrshlq_m_s8): Remove.
27367 (vrshlq_m_s32): Remove.
27368 (vrshlq_m_s16): Remove.
27369 (vrshlq_m_u8): Remove.
27370 (vrshlq_m_u32): Remove.
27371 (vrshlq_m_u16): Remove.
27372 (vrshlq_x_s8): Remove.
27373 (vrshlq_x_s16): Remove.
27374 (vrshlq_x_s32): Remove.
27375 (vrshlq_x_u8): Remove.
27376 (vrshlq_x_u16): Remove.
27377 (vrshlq_x_u32): Remove.
27378 (__arm_vrshlq_u8): Remove.
27379 (__arm_vrshlq_n_u8): Remove.
27380 (__arm_vrshlq_s8): Remove.
27381 (__arm_vrshlq_n_s8): Remove.
27382 (__arm_vrshlq_u16): Remove.
27383 (__arm_vrshlq_n_u16): Remove.
27384 (__arm_vrshlq_s16): Remove.
27385 (__arm_vrshlq_n_s16): Remove.
27386 (__arm_vrshlq_u32): Remove.
27387 (__arm_vrshlq_n_u32): Remove.
27388 (__arm_vrshlq_s32): Remove.
27389 (__arm_vrshlq_n_s32): Remove.
27390 (__arm_vrshlq_m_n_u8): Remove.
27391 (__arm_vrshlq_m_n_s8): Remove.
27392 (__arm_vrshlq_m_n_u16): Remove.
27393 (__arm_vrshlq_m_n_s16): Remove.
27394 (__arm_vrshlq_m_n_u32): Remove.
27395 (__arm_vrshlq_m_n_s32): Remove.
27396 (__arm_vrshlq_m_s8): Remove.
27397 (__arm_vrshlq_m_s32): Remove.
27398 (__arm_vrshlq_m_s16): Remove.
27399 (__arm_vrshlq_m_u8): Remove.
27400 (__arm_vrshlq_m_u32): Remove.
27401 (__arm_vrshlq_m_u16): Remove.
27402 (__arm_vrshlq_x_s8): Remove.
27403 (__arm_vrshlq_x_s16): Remove.
27404 (__arm_vrshlq_x_s32): Remove.
27405 (__arm_vrshlq_x_u8): Remove.
27406 (__arm_vrshlq_x_u16): Remove.
27407 (__arm_vrshlq_x_u32): Remove.
27408 (__arm_vrshlq): Remove.
27409 (__arm_vrshlq_m_n): Remove.
27410 (__arm_vrshlq_m): Remove.
27411 (__arm_vrshlq_x): Remove.
27413 (vqrshlq_m_n): Remove.
27414 (vqrshlq_m): Remove.
27415 (vqrshlq_u8): Remove.
27416 (vqrshlq_n_u8): Remove.
27417 (vqrshlq_s8): Remove.
27418 (vqrshlq_n_s8): Remove.
27419 (vqrshlq_u16): Remove.
27420 (vqrshlq_n_u16): Remove.
27421 (vqrshlq_s16): Remove.
27422 (vqrshlq_n_s16): Remove.
27423 (vqrshlq_u32): Remove.
27424 (vqrshlq_n_u32): Remove.
27425 (vqrshlq_s32): Remove.
27426 (vqrshlq_n_s32): Remove.
27427 (vqrshlq_m_n_u8): Remove.
27428 (vqrshlq_m_n_s8): Remove.
27429 (vqrshlq_m_n_u16): Remove.
27430 (vqrshlq_m_n_s16): Remove.
27431 (vqrshlq_m_n_u32): Remove.
27432 (vqrshlq_m_n_s32): Remove.
27433 (vqrshlq_m_s8): Remove.
27434 (vqrshlq_m_s32): Remove.
27435 (vqrshlq_m_s16): Remove.
27436 (vqrshlq_m_u8): Remove.
27437 (vqrshlq_m_u32): Remove.
27438 (vqrshlq_m_u16): Remove.
27439 (__arm_vqrshlq_u8): Remove.
27440 (__arm_vqrshlq_n_u8): Remove.
27441 (__arm_vqrshlq_s8): Remove.
27442 (__arm_vqrshlq_n_s8): Remove.
27443 (__arm_vqrshlq_u16): Remove.
27444 (__arm_vqrshlq_n_u16): Remove.
27445 (__arm_vqrshlq_s16): Remove.
27446 (__arm_vqrshlq_n_s16): Remove.
27447 (__arm_vqrshlq_u32): Remove.
27448 (__arm_vqrshlq_n_u32): Remove.
27449 (__arm_vqrshlq_s32): Remove.
27450 (__arm_vqrshlq_n_s32): Remove.
27451 (__arm_vqrshlq_m_n_u8): Remove.
27452 (__arm_vqrshlq_m_n_s8): Remove.
27453 (__arm_vqrshlq_m_n_u16): Remove.
27454 (__arm_vqrshlq_m_n_s16): Remove.
27455 (__arm_vqrshlq_m_n_u32): Remove.
27456 (__arm_vqrshlq_m_n_s32): Remove.
27457 (__arm_vqrshlq_m_s8): Remove.
27458 (__arm_vqrshlq_m_s32): Remove.
27459 (__arm_vqrshlq_m_s16): Remove.
27460 (__arm_vqrshlq_m_u8): Remove.
27461 (__arm_vqrshlq_m_u32): Remove.
27462 (__arm_vqrshlq_m_u16): Remove.
27463 (__arm_vqrshlq): Remove.
27464 (__arm_vqrshlq_m_n): Remove.
27465 (__arm_vqrshlq_m): Remove.
27467 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
27469 * config/arm/iterators.md (MVE_RSHIFT_M_N, MVE_RSHIFT_N): New.
27470 (mve_insn): Add vqrshl, vrshl.
27471 * config/arm/mve.md (mve_vqrshlq_n_<supf><mode>)
27472 (mve_vrshlq_n_<supf><mode>): Merge into ...
27473 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
27474 (mve_vqrshlq_m_n_<supf><mode>, mve_vrshlq_m_n_<supf><mode>): Merge
27476 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
27478 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
27480 * config/arm/arm-mve-builtins-shapes.cc (binary_round_lshift): New.
27481 * config/arm/arm-mve-builtins-shapes.h (binary_round_lshift): New.
27483 2023-05-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27486 * config/riscv/riscv-vsetvl.cc (avl_info::multiple_source_equal_p): Add
27487 denegrate PHI optmization.
27489 2023-05-05 Uros Bizjak <ubizjak@gmail.com>
27491 * config/i386/predicates.md (register_no_SP_operand):
27492 Rename from index_register_operand.
27493 (call_register_operand): Update for rename.
27494 * config/i386/i386.md (*lea<mode>_general_[1234]): Update for rename.
27496 2023-05-05 Tamar Christina <tamar.christina@arm.com>
27499 * Makefile.in (NUM_MATCH_SPLITS, MATCH_SPLITS_SEQ,
27500 GIMPLE_MATCH_PD_SEQ_SRC, GIMPLE_MATCH_PD_SEQ_O,
27501 GENERIC_MATCH_PD_SEQ_SRC, GENERIC_MATCH_PD_SEQ_O): New.
27502 (OBJS, MOSTLYCLEANFILES, .PRECIOUS): Use them.
27503 (s-match): Split into s-generic-match and s-gimple-match.
27504 * configure.ac (with-matchpd-partitions,
27505 DEFAULT_MATCHPD_PARTITIONS): New.
27506 * configure: Regenerate.
27508 2023-05-05 Tamar Christina <tamar.christina@arm.com>
27511 * genmatch.cc (emit_func, SIZED_BASED_CHUNKS, get_out_file): New.
27512 (decision_tree::gen): Accept list of files instead of single and update
27513 to write function definition to header and main file.
27514 (write_predicate): Likewise.
27515 (write_header): Emit pragmas and new includes.
27516 (main): Create file buffers and cleanup.
27517 (showUsage, write_header_includes): New.
27519 2023-05-05 Tamar Christina <tamar.christina@arm.com>
27522 * Makefile.in (OBJS): Add gimple-match-exports.o.
27523 * genmatch.cc (decision_tree::gen): Export gimple_gimplify helpers.
27524 * gimple-match-head.cc (gimple_simplify, gimple_resimplify1,
27525 gimple_resimplify2, gimple_resimplify3, gimple_resimplify4,
27526 gimple_resimplify5, constant_for_folding, convert_conditional_op,
27527 maybe_resimplify_conditional_op, gimple_match_op::resimplify,
27528 maybe_build_generic_op, build_call_internal, maybe_push_res_to_seq,
27529 do_valueize, try_conditional_simplification, gimple_extract,
27530 gimple_extract_op, canonicalize_code, commutative_binary_op_p,
27531 commutative_ternary_op_p, first_commutative_argument,
27532 associative_binary_op_p, directly_supported_p,
27533 get_conditional_internal_fn): Moved to gimple-match-exports.cc
27534 * gimple-match-exports.cc: New file.
27536 2023-05-05 Tamar Christina <tamar.christina@arm.com>
27539 * genmatch.cc (decision_tree::gen, write_predicate): Generate new
27541 (dt_simplify::gen_1): Use it.
27543 2023-05-05 Tamar Christina <tamar.christina@arm.com>
27546 * genmatch.cc (output_line_directive): Only emit commented directive
27549 2023-05-05 Tamar Christina <tamar.christina@arm.com>
27552 * genmatch.cc (dt_simplify::gen_1): Only emit labels if used.
27554 2023-05-05 Tobias Burnus <tobias@codesourcery.com>
27556 * config/gcn/gcn.cc (gcn_vectorize_builtin_vectorized_function): Remove
27557 unused in_mode/in_n variables.
27559 2023-05-05 Richard Biener <rguenther@suse.de>
27561 PR tree-optimization/109735
27562 * tree-vect-stmts.cc (vectorizable_operation): Perform
27563 conversion for POINTER_DIFF_EXPR unconditionally.
27565 2023-05-05 Uros Bizjak <ubizjak@gmail.com>
27567 * config/i386/mmx.md (mulv2si3): New expander.
27568 (*mulv2si3): New insn pattern.
27570 2023-05-05 Tobias Burnus <tobias@codesourcery.com>
27571 Thomas Schwinge <thomas@codesourcery.com>
27574 * config/nvptx/mkoffload.cc (process): Emit dummy procedure
27575 alongside reverse-offload function table to prevent NULL values
27576 of the function addresses.
27578 2023-05-05 Jakub Jelinek <jakub@redhat.com>
27580 * builtins.cc (do_mpfr_ckconv, do_mpc_ckconv): Fix comment typo,
27582 * fold-const-call.cc (do_mpfr_ckconv, do_mpc_ckconv): Likewise.
27584 2023-05-05 Andrew Pinski <apinski@marvell.com>
27586 PR tree-optimization/109732
27587 * tree-ssa-phiopt.cc (match_simplify_replacement): Fix the selection
27588 of the argtrue/argfalse.
27590 2023-05-05 Andrew Pinski <apinski@marvell.com>
27592 PR tree-optimization/109722
27593 * match.pd: Extend the `ABS<a> == 0` pattern
27594 to cover `ABSU<a> == 0` too.
27596 2023-05-04 Uros Bizjak <ubizjak@gmail.com>
27599 * config/i386/predicates.md (index_reg_operand): New predicate.
27600 * config/i386/i386.md (ashift to lea spliter): Use
27601 general_reg_operand and index_reg_operand predicates.
27603 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27605 * config/aarch64/aarch64-simd.md (aarch64_<sur><addsub>hn2<mode>_insn_le):
27606 Rename and reimplement with RTL codes to...
27607 (aarch64_<optab>hn2<mode>_insn_le): .. This.
27608 (aarch64_r<optab>hn2<mode>_insn_le): New pattern.
27609 (aarch64_<sur><addsub>hn2<mode>_insn_be): Rename and reimplement with RTL
27611 (aarch64_<optab>hn2<mode>_insn_be): ... This.
27612 (aarch64_r<optab>hn2<mode>_insn_be): New pattern.
27613 (aarch64_<sur><addsub>hn2<mode>): Rename and adjust expander to...
27614 (aarch64_<optab>hn2<mode>): ... This.
27615 (aarch64_r<optab>hn2<mode>): New expander.
27616 * config/aarch64/iterators.md (UNSPEC_ADDHN, UNSPEC_RADDHN,
27617 UNSPEC_SUBHN, UNSPEC_RSUBHN): Delete unspecs.
27618 (ADDSUBHN): Delete.
27619 (sur): Remove handling of the above.
27620 (addsub): Likewise.
27622 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27624 * config/aarch64/aarch64-simd.md (aarch64_<sur><addsub>hn<mode>_insn_le):
27626 (aarch64_<optab>hn<mode>_insn<vczle><vczbe>): New define_insn.
27627 (aarch64_<sur><addsub>hn<mode>_insn_be): Delete.
27628 (aarch64_r<optab>hn<mode>_insn<vczle><vczbe>): New define_insn.
27629 (aarch64_<sur><addsub>hn<mode>): Delete.
27630 (aarch64_<optab>hn<mode>): New define_expand.
27631 (aarch64_r<optab>hn<mode>): Likewise.
27632 * config/aarch64/predicates.md (aarch64_simd_raddsubhn_imm_vec):
27635 2023-05-04 Andrew Pinski <apinski@marvell.com>
27637 * tree-ssa-phiopt.cc (replace_phi_edge_with_variable): Handle
27638 diamond form bb with forwarder only empty blocks better.
27640 2023-05-04 Andrew Pinski <apinski@marvell.com>
27642 * tree-ssa-threadupdate.cc (copy_phi_arg_into_existing_phi): Move to ...
27643 * tree-cfg.cc (copy_phi_arg_into_existing_phi): Here and remove static.
27644 (gimple_duplicate_sese_tail): Use copy_phi_arg_into_existing_phi instead
27645 of an inline version of it.
27646 * tree-cfgcleanup.cc (remove_forwarder_block): Likewise.
27647 * tree-cfg.h (copy_phi_arg_into_existing_phi): New declaration.
27649 2023-05-04 Andrew Pinski <apinski@marvell.com>
27651 * tree-ssa-phiopt.cc (replace_phi_edge_with_variable): Change
27652 the default argument value for dce_ssa_names to nullptr.
27653 Check to make sure dce_ssa_names is a non-nullptr before
27654 calling simple_dce_from_worklist.
27656 2023-05-04 Uros Bizjak <ubizjak@gmail.com>
27658 * config/i386/predicates.md (index_register_operand): Reject
27659 arg_pointer_rtx, frame_pointer_rtx, stack_pointer_rtx and
27660 VIRTUAL_REGISTER_P operands. Allow subregs of memory before reload.
27661 (call_register_no_elim_operand): Rewrite as ...
27662 (call_register_operand): ... this.
27663 (call_insn_operand): Use call_register_operand predicate.
27665 2023-05-04 Richard Biener <rguenther@suse.de>
27667 PR tree-optimization/109721
27668 * tree-vect-stmts.cc (vectorizable_operation): Make sure
27669 to test word_mode for all !target_support_p operations.
27671 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27674 * config/aarch64/aarch64-simd.md (aarch64_<su>aba<mode>): Rename to...
27675 (aarch64_<su>aba<mode><vczle><vczbe>): ... This.
27676 (aarch64_mla<mode>): Rename to...
27677 (aarch64_mla<mode><vczle><vczbe>): ... This.
27678 (*aarch64_mla_elt<mode>): Rename to...
27679 (*aarch64_mla_elt<mode><vczle><vczbe>): ... This.
27680 (*aarch64_mla_elt_<vswap_width_name><mode>): Rename to...
27681 (*aarch64_mla_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
27682 (aarch64_mla_n<mode>): Rename to...
27683 (aarch64_mla_n<mode><vczle><vczbe>): ... This.
27684 (aarch64_mls<mode>): Rename to...
27685 (aarch64_mls<mode><vczle><vczbe>): ... This.
27686 (*aarch64_mls_elt<mode>): Rename to...
27687 (*aarch64_mls_elt<mode><vczle><vczbe>): ... This.
27688 (*aarch64_mls_elt_<vswap_width_name><mode>): Rename to...
27689 (*aarch64_mls_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
27690 (aarch64_mls_n<mode>): Rename to...
27691 (aarch64_mls_n<mode><vczle><vczbe>): ... This.
27692 (fma<mode>4): Rename to...
27693 (fma<mode>4<vczle><vczbe>): ... This.
27694 (*aarch64_fma4_elt<mode>): Rename to...
27695 (*aarch64_fma4_elt<mode><vczle><vczbe>): ... This.
27696 (*aarch64_fma4_elt_<vswap_width_name><mode>): Rename to...
27697 (*aarch64_fma4_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
27698 (*aarch64_fma4_elt_from_dup<mode>): Rename to...
27699 (*aarch64_fma4_elt_from_dup<mode><vczle><vczbe>): ... This.
27700 (fnma<mode>4): Rename to...
27701 (fnma<mode>4<vczle><vczbe>): ... This.
27702 (*aarch64_fnma4_elt<mode>): Rename to...
27703 (*aarch64_fnma4_elt<mode><vczle><vczbe>): ... This.
27704 (*aarch64_fnma4_elt_<vswap_width_name><mode>): Rename to...
27705 (*aarch64_fnma4_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
27706 (*aarch64_fnma4_elt_from_dup<mode>): Rename to...
27707 (*aarch64_fnma4_elt_from_dup<mode><vczle><vczbe>): ... This.
27708 (aarch64_simd_bsl<mode>_internal): Rename to...
27709 (aarch64_simd_bsl<mode>_internal<vczle><vczbe>): ... This.
27710 (*aarch64_simd_bsl<mode>_alt): Rename to...
27711 (*aarch64_simd_bsl<mode>_alt<vczle><vczbe>): ... This.
27713 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27716 * config/aarch64/aarch64-simd.md (aarch64_<su>abd<mode>): Rename to...
27717 (aarch64_<su>abd<mode><vczle><vczbe>): ... This.
27718 (fabd<mode>3): Rename to...
27719 (fabd<mode>3<vczle><vczbe>): ... This.
27720 (aarch64_<optab>p<mode>): Rename to...
27721 (aarch64_<optab>p<mode><vczle><vczbe>): ... This.
27722 (aarch64_faddp<mode>): Rename to...
27723 (aarch64_faddp<mode><vczle><vczbe>): ... This.
27725 2023-05-04 Martin Liska <mliska@suse.cz>
27727 * gcov.cc (GCOV_JSON_FORMAT_VERSION): New definition.
27728 (print_version): Use it.
27729 (generate_results): Likewise.
27731 2023-05-04 Richard Biener <rguenther@suse.de>
27733 * tree-cfg.h (last_stmt): Rename to ...
27734 (last_nondebug_stmt): ... this.
27735 * tree-cfg.cc (last_stmt): Rename to ...
27736 (last_nondebug_stmt): ... this.
27737 (assign_discriminators): Adjust.
27738 (group_case_labels_stmt): Likewise.
27739 (gimple_can_duplicate_bb_p): Likewise.
27740 (execute_fixup_cfg): Likewise.
27741 * auto-profile.cc (afdo_propagate_circuit): Likewise.
27742 * gimple-range.cc (gimple_ranger::range_on_exit): Likewise.
27743 * omp-expand.cc (workshare_safe_to_combine_p): Likewise.
27744 (determine_parallel_type): Likewise.
27745 (adjust_context_and_scope): Likewise.
27746 (expand_task_call): Likewise.
27747 (remove_exit_barrier): Likewise.
27748 (expand_omp_taskreg): Likewise.
27749 (expand_omp_for_init_counts): Likewise.
27750 (expand_omp_for_init_vars): Likewise.
27751 (expand_omp_for_static_chunk): Likewise.
27752 (expand_omp_simd): Likewise.
27753 (expand_oacc_for): Likewise.
27754 (expand_omp_for): Likewise.
27755 (expand_omp_sections): Likewise.
27756 (expand_omp_atomic_fetch_op): Likewise.
27757 (expand_omp_atomic_cas): Likewise.
27758 (expand_omp_atomic): Likewise.
27759 (expand_omp_target): Likewise.
27760 (expand_omp): Likewise.
27761 (omp_make_gimple_edges): Likewise.
27762 * trans-mem.cc (tm_region_init): Likewise.
27763 * tree-inline.cc (redirect_all_calls): Likewise.
27764 * tree-parloops.cc (gen_parallel_loop): Likewise.
27765 * tree-ssa-loop-ch.cc (do_while_loop_p): Likewise.
27766 * tree-ssa-loop-ivcanon.cc (canonicalize_loop_induction_variables):
27768 * tree-ssa-loop-ivopts.cc (stmt_after_ip_normal_pos): Likewise.
27769 (may_eliminate_iv): Likewise.
27770 * tree-ssa-loop-manip.cc (standard_iv_increment_position): Likewise.
27771 * tree-ssa-loop-niter.cc (do_warn_aggressive_loop_optimizations):
27773 (estimate_numbers_of_iterations): Likewise.
27774 * tree-ssa-loop-split.cc (compute_added_num_insns): Likewise.
27775 * tree-ssa-loop-unswitch.cc (get_predicates_for_bb): Likewise.
27776 (set_predicates_for_bb): Likewise.
27777 (init_loop_unswitch_info): Likewise.
27778 (hoist_guard): Likewise.
27779 * tree-ssa-phiopt.cc (match_simplify_replacement): Likewise.
27780 (minmax_replacement): Likewise.
27781 * tree-ssa-reassoc.cc (update_range_test): Likewise.
27782 (optimize_range_tests_to_bit_test): Likewise.
27783 (optimize_range_tests_var_bound): Likewise.
27784 (optimize_range_tests): Likewise.
27785 (no_side_effect_bb): Likewise.
27786 (suitable_cond_bb): Likewise.
27787 (maybe_optimize_range_tests): Likewise.
27788 (reassociate_bb): Likewise.
27789 * tree-vrp.cc (rvrp_folder::pre_fold_bb): Likewise.
27791 2023-05-04 Jakub Jelinek <jakub@redhat.com>
27794 * config/i386/i386-features.cc (timode_scalar_chain::convert_insn):
27795 If src is REG, change its mode to V1TImode and call fix_debug_reg_uses
27796 for it only if it still has TImode. Don't decide whether to call
27797 fix_debug_reg_uses based on whether SRC is ever set or not.
27799 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
27801 * config/cris/cris.cc (cris_split_constant): New function.
27802 * config/cris/cris.md (splitop): New iterator.
27803 (opsplit1): New define_peephole2.
27804 * config/cris/cris-protos.h (cris_split_constant): Declare.
27805 (cris_splittable_constant_p): New macro.
27807 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
27809 * config/cris/cris.cc (TARGET_SPILL_CLASS): Define
27812 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
27814 * config/cris/cris.cc (cris_side_effect_mode_ok): Use
27815 lra_in_progress, not reload_in_progress.
27816 * config/cris/cris.md ("movdi", "*addi_reload"): Ditto.
27817 * config/cris/constraints.md ("Q"): Ditto.
27819 2023-05-03 Andrew Pinski <apinski@marvell.com>
27821 * tree-ssa-dce.cc (simple_dce_from_worklist): Record
27822 stats on removed number of statements and phis.
27824 2023-05-03 Aldy Hernandez <aldyh@redhat.com>
27826 PR tree-optimization/109711
27827 * value-range.cc (irange::verify_range): Allow types of
27830 2023-05-03 Alexander Monakov <amonakov@ispras.ru>
27833 * calls.cc (can_implement_as_sibling_call_p): Reject calls
27834 to __sanitizer_cov_trace_pc.
27836 2023-05-03 Richard Sandiford <richard.sandiford@arm.com>
27839 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Add
27840 a new ABI break parameter for GCC 14. Set it to the alignment
27841 of enums that have an underlying type. Take the true alignment
27842 of such enums from the TYPE_ALIGN of the underlying type's
27844 (aarch64_function_arg_boundary): Update accordingly.
27845 (aarch64_layout_arg, aarch64_gimplify_va_arg_expr): Likewise.
27846 Warn about ABI differences.
27848 2023-05-03 Richard Sandiford <richard.sandiford@arm.com>
27851 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Rename
27852 ABI break variables to abi_break_gcc_9 and abi_break_gcc_13.
27853 (aarch64_layout_arg, aarch64_function_arg_boundary): Likewise.
27854 (aarch64_gimplify_va_arg_expr): Likewise.
27856 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
27858 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_M_N_NO_F)
27859 (FUNCTION_WITHOUT_N_NO_F, FUNCTION_WITH_M_N_NO_U_F): New.
27860 (vhaddq, vhsubq, vmulhq, vqaddq, vqsubq, vqdmulhq, vrhaddq)
27862 * config/arm/arm-mve-builtins-base.def (vhaddq, vhsubq, vmulhq)
27863 (vqaddq, vqsubq, vqdmulhq, vrhaddq, vrmulhq): New.
27864 * config/arm/arm-mve-builtins-base.h (vhaddq, vhsubq, vmulhq)
27865 (vqaddq, vqsubq, vqdmulhq, vrhaddq, vrmulhq): New.
27866 * config/arm/arm_mve.h (vhsubq): Remove.
27868 (vhaddq_m): Remove.
27869 (vhsubq_m): Remove.
27870 (vhaddq_x): Remove.
27871 (vhsubq_x): Remove.
27872 (vhsubq_u8): Remove.
27873 (vhsubq_n_u8): Remove.
27874 (vhaddq_u8): Remove.
27875 (vhaddq_n_u8): Remove.
27876 (vhsubq_s8): Remove.
27877 (vhsubq_n_s8): Remove.
27878 (vhaddq_s8): Remove.
27879 (vhaddq_n_s8): Remove.
27880 (vhsubq_u16): Remove.
27881 (vhsubq_n_u16): Remove.
27882 (vhaddq_u16): Remove.
27883 (vhaddq_n_u16): Remove.
27884 (vhsubq_s16): Remove.
27885 (vhsubq_n_s16): Remove.
27886 (vhaddq_s16): Remove.
27887 (vhaddq_n_s16): Remove.
27888 (vhsubq_u32): Remove.
27889 (vhsubq_n_u32): Remove.
27890 (vhaddq_u32): Remove.
27891 (vhaddq_n_u32): Remove.
27892 (vhsubq_s32): Remove.
27893 (vhsubq_n_s32): Remove.
27894 (vhaddq_s32): Remove.
27895 (vhaddq_n_s32): Remove.
27896 (vhaddq_m_n_s8): Remove.
27897 (vhaddq_m_n_s32): Remove.
27898 (vhaddq_m_n_s16): Remove.
27899 (vhaddq_m_n_u8): Remove.
27900 (vhaddq_m_n_u32): Remove.
27901 (vhaddq_m_n_u16): Remove.
27902 (vhaddq_m_s8): Remove.
27903 (vhaddq_m_s32): Remove.
27904 (vhaddq_m_s16): Remove.
27905 (vhaddq_m_u8): Remove.
27906 (vhaddq_m_u32): Remove.
27907 (vhaddq_m_u16): Remove.
27908 (vhsubq_m_n_s8): Remove.
27909 (vhsubq_m_n_s32): Remove.
27910 (vhsubq_m_n_s16): Remove.
27911 (vhsubq_m_n_u8): Remove.
27912 (vhsubq_m_n_u32): Remove.
27913 (vhsubq_m_n_u16): Remove.
27914 (vhsubq_m_s8): Remove.
27915 (vhsubq_m_s32): Remove.
27916 (vhsubq_m_s16): Remove.
27917 (vhsubq_m_u8): Remove.
27918 (vhsubq_m_u32): Remove.
27919 (vhsubq_m_u16): Remove.
27920 (vhaddq_x_n_s8): Remove.
27921 (vhaddq_x_n_s16): Remove.
27922 (vhaddq_x_n_s32): Remove.
27923 (vhaddq_x_n_u8): Remove.
27924 (vhaddq_x_n_u16): Remove.
27925 (vhaddq_x_n_u32): Remove.
27926 (vhaddq_x_s8): Remove.
27927 (vhaddq_x_s16): Remove.
27928 (vhaddq_x_s32): Remove.
27929 (vhaddq_x_u8): Remove.
27930 (vhaddq_x_u16): Remove.
27931 (vhaddq_x_u32): Remove.
27932 (vhsubq_x_n_s8): Remove.
27933 (vhsubq_x_n_s16): Remove.
27934 (vhsubq_x_n_s32): Remove.
27935 (vhsubq_x_n_u8): Remove.
27936 (vhsubq_x_n_u16): Remove.
27937 (vhsubq_x_n_u32): Remove.
27938 (vhsubq_x_s8): Remove.
27939 (vhsubq_x_s16): Remove.
27940 (vhsubq_x_s32): Remove.
27941 (vhsubq_x_u8): Remove.
27942 (vhsubq_x_u16): Remove.
27943 (vhsubq_x_u32): Remove.
27944 (__arm_vhsubq_u8): Remove.
27945 (__arm_vhsubq_n_u8): Remove.
27946 (__arm_vhaddq_u8): Remove.
27947 (__arm_vhaddq_n_u8): Remove.
27948 (__arm_vhsubq_s8): Remove.
27949 (__arm_vhsubq_n_s8): Remove.
27950 (__arm_vhaddq_s8): Remove.
27951 (__arm_vhaddq_n_s8): Remove.
27952 (__arm_vhsubq_u16): Remove.
27953 (__arm_vhsubq_n_u16): Remove.
27954 (__arm_vhaddq_u16): Remove.
27955 (__arm_vhaddq_n_u16): Remove.
27956 (__arm_vhsubq_s16): Remove.
27957 (__arm_vhsubq_n_s16): Remove.
27958 (__arm_vhaddq_s16): Remove.
27959 (__arm_vhaddq_n_s16): Remove.
27960 (__arm_vhsubq_u32): Remove.
27961 (__arm_vhsubq_n_u32): Remove.
27962 (__arm_vhaddq_u32): Remove.
27963 (__arm_vhaddq_n_u32): Remove.
27964 (__arm_vhsubq_s32): Remove.
27965 (__arm_vhsubq_n_s32): Remove.
27966 (__arm_vhaddq_s32): Remove.
27967 (__arm_vhaddq_n_s32): Remove.
27968 (__arm_vhaddq_m_n_s8): Remove.
27969 (__arm_vhaddq_m_n_s32): Remove.
27970 (__arm_vhaddq_m_n_s16): Remove.
27971 (__arm_vhaddq_m_n_u8): Remove.
27972 (__arm_vhaddq_m_n_u32): Remove.
27973 (__arm_vhaddq_m_n_u16): Remove.
27974 (__arm_vhaddq_m_s8): Remove.
27975 (__arm_vhaddq_m_s32): Remove.
27976 (__arm_vhaddq_m_s16): Remove.
27977 (__arm_vhaddq_m_u8): Remove.
27978 (__arm_vhaddq_m_u32): Remove.
27979 (__arm_vhaddq_m_u16): Remove.
27980 (__arm_vhsubq_m_n_s8): Remove.
27981 (__arm_vhsubq_m_n_s32): Remove.
27982 (__arm_vhsubq_m_n_s16): Remove.
27983 (__arm_vhsubq_m_n_u8): Remove.
27984 (__arm_vhsubq_m_n_u32): Remove.
27985 (__arm_vhsubq_m_n_u16): Remove.
27986 (__arm_vhsubq_m_s8): Remove.
27987 (__arm_vhsubq_m_s32): Remove.
27988 (__arm_vhsubq_m_s16): Remove.
27989 (__arm_vhsubq_m_u8): Remove.
27990 (__arm_vhsubq_m_u32): Remove.
27991 (__arm_vhsubq_m_u16): Remove.
27992 (__arm_vhaddq_x_n_s8): Remove.
27993 (__arm_vhaddq_x_n_s16): Remove.
27994 (__arm_vhaddq_x_n_s32): Remove.
27995 (__arm_vhaddq_x_n_u8): Remove.
27996 (__arm_vhaddq_x_n_u16): Remove.
27997 (__arm_vhaddq_x_n_u32): Remove.
27998 (__arm_vhaddq_x_s8): Remove.
27999 (__arm_vhaddq_x_s16): Remove.
28000 (__arm_vhaddq_x_s32): Remove.
28001 (__arm_vhaddq_x_u8): Remove.
28002 (__arm_vhaddq_x_u16): Remove.
28003 (__arm_vhaddq_x_u32): Remove.
28004 (__arm_vhsubq_x_n_s8): Remove.
28005 (__arm_vhsubq_x_n_s16): Remove.
28006 (__arm_vhsubq_x_n_s32): Remove.
28007 (__arm_vhsubq_x_n_u8): Remove.
28008 (__arm_vhsubq_x_n_u16): Remove.
28009 (__arm_vhsubq_x_n_u32): Remove.
28010 (__arm_vhsubq_x_s8): Remove.
28011 (__arm_vhsubq_x_s16): Remove.
28012 (__arm_vhsubq_x_s32): Remove.
28013 (__arm_vhsubq_x_u8): Remove.
28014 (__arm_vhsubq_x_u16): Remove.
28015 (__arm_vhsubq_x_u32): Remove.
28016 (__arm_vhsubq): Remove.
28017 (__arm_vhaddq): Remove.
28018 (__arm_vhaddq_m): Remove.
28019 (__arm_vhsubq_m): Remove.
28020 (__arm_vhaddq_x): Remove.
28021 (__arm_vhsubq_x): Remove.
28023 (vmulhq_m): Remove.
28024 (vmulhq_x): Remove.
28025 (vmulhq_u8): Remove.
28026 (vmulhq_s8): Remove.
28027 (vmulhq_u16): Remove.
28028 (vmulhq_s16): Remove.
28029 (vmulhq_u32): Remove.
28030 (vmulhq_s32): Remove.
28031 (vmulhq_m_s8): Remove.
28032 (vmulhq_m_s32): Remove.
28033 (vmulhq_m_s16): Remove.
28034 (vmulhq_m_u8): Remove.
28035 (vmulhq_m_u32): Remove.
28036 (vmulhq_m_u16): Remove.
28037 (vmulhq_x_s8): Remove.
28038 (vmulhq_x_s16): Remove.
28039 (vmulhq_x_s32): Remove.
28040 (vmulhq_x_u8): Remove.
28041 (vmulhq_x_u16): Remove.
28042 (vmulhq_x_u32): Remove.
28043 (__arm_vmulhq_u8): Remove.
28044 (__arm_vmulhq_s8): Remove.
28045 (__arm_vmulhq_u16): Remove.
28046 (__arm_vmulhq_s16): Remove.
28047 (__arm_vmulhq_u32): Remove.
28048 (__arm_vmulhq_s32): Remove.
28049 (__arm_vmulhq_m_s8): Remove.
28050 (__arm_vmulhq_m_s32): Remove.
28051 (__arm_vmulhq_m_s16): Remove.
28052 (__arm_vmulhq_m_u8): Remove.
28053 (__arm_vmulhq_m_u32): Remove.
28054 (__arm_vmulhq_m_u16): Remove.
28055 (__arm_vmulhq_x_s8): Remove.
28056 (__arm_vmulhq_x_s16): Remove.
28057 (__arm_vmulhq_x_s32): Remove.
28058 (__arm_vmulhq_x_u8): Remove.
28059 (__arm_vmulhq_x_u16): Remove.
28060 (__arm_vmulhq_x_u32): Remove.
28061 (__arm_vmulhq): Remove.
28062 (__arm_vmulhq_m): Remove.
28063 (__arm_vmulhq_x): Remove.
28066 (vqaddq_m): Remove.
28067 (vqsubq_m): Remove.
28068 (vqsubq_u8): Remove.
28069 (vqsubq_n_u8): Remove.
28070 (vqaddq_u8): Remove.
28071 (vqaddq_n_u8): Remove.
28072 (vqsubq_s8): Remove.
28073 (vqsubq_n_s8): Remove.
28074 (vqaddq_s8): Remove.
28075 (vqaddq_n_s8): Remove.
28076 (vqsubq_u16): Remove.
28077 (vqsubq_n_u16): Remove.
28078 (vqaddq_u16): Remove.
28079 (vqaddq_n_u16): Remove.
28080 (vqsubq_s16): Remove.
28081 (vqsubq_n_s16): Remove.
28082 (vqaddq_s16): Remove.
28083 (vqaddq_n_s16): Remove.
28084 (vqsubq_u32): Remove.
28085 (vqsubq_n_u32): Remove.
28086 (vqaddq_u32): Remove.
28087 (vqaddq_n_u32): Remove.
28088 (vqsubq_s32): Remove.
28089 (vqsubq_n_s32): Remove.
28090 (vqaddq_s32): Remove.
28091 (vqaddq_n_s32): Remove.
28092 (vqaddq_m_n_s8): Remove.
28093 (vqaddq_m_n_s32): Remove.
28094 (vqaddq_m_n_s16): Remove.
28095 (vqaddq_m_n_u8): Remove.
28096 (vqaddq_m_n_u32): Remove.
28097 (vqaddq_m_n_u16): Remove.
28098 (vqaddq_m_s8): Remove.
28099 (vqaddq_m_s32): Remove.
28100 (vqaddq_m_s16): Remove.
28101 (vqaddq_m_u8): Remove.
28102 (vqaddq_m_u32): Remove.
28103 (vqaddq_m_u16): Remove.
28104 (vqsubq_m_n_s8): Remove.
28105 (vqsubq_m_n_s32): Remove.
28106 (vqsubq_m_n_s16): Remove.
28107 (vqsubq_m_n_u8): Remove.
28108 (vqsubq_m_n_u32): Remove.
28109 (vqsubq_m_n_u16): Remove.
28110 (vqsubq_m_s8): Remove.
28111 (vqsubq_m_s32): Remove.
28112 (vqsubq_m_s16): Remove.
28113 (vqsubq_m_u8): Remove.
28114 (vqsubq_m_u32): Remove.
28115 (vqsubq_m_u16): Remove.
28116 (__arm_vqsubq_u8): Remove.
28117 (__arm_vqsubq_n_u8): Remove.
28118 (__arm_vqaddq_u8): Remove.
28119 (__arm_vqaddq_n_u8): Remove.
28120 (__arm_vqsubq_s8): Remove.
28121 (__arm_vqsubq_n_s8): Remove.
28122 (__arm_vqaddq_s8): Remove.
28123 (__arm_vqaddq_n_s8): Remove.
28124 (__arm_vqsubq_u16): Remove.
28125 (__arm_vqsubq_n_u16): Remove.
28126 (__arm_vqaddq_u16): Remove.
28127 (__arm_vqaddq_n_u16): Remove.
28128 (__arm_vqsubq_s16): Remove.
28129 (__arm_vqsubq_n_s16): Remove.
28130 (__arm_vqaddq_s16): Remove.
28131 (__arm_vqaddq_n_s16): Remove.
28132 (__arm_vqsubq_u32): Remove.
28133 (__arm_vqsubq_n_u32): Remove.
28134 (__arm_vqaddq_u32): Remove.
28135 (__arm_vqaddq_n_u32): Remove.
28136 (__arm_vqsubq_s32): Remove.
28137 (__arm_vqsubq_n_s32): Remove.
28138 (__arm_vqaddq_s32): Remove.
28139 (__arm_vqaddq_n_s32): Remove.
28140 (__arm_vqaddq_m_n_s8): Remove.
28141 (__arm_vqaddq_m_n_s32): Remove.
28142 (__arm_vqaddq_m_n_s16): Remove.
28143 (__arm_vqaddq_m_n_u8): Remove.
28144 (__arm_vqaddq_m_n_u32): Remove.
28145 (__arm_vqaddq_m_n_u16): Remove.
28146 (__arm_vqaddq_m_s8): Remove.
28147 (__arm_vqaddq_m_s32): Remove.
28148 (__arm_vqaddq_m_s16): Remove.
28149 (__arm_vqaddq_m_u8): Remove.
28150 (__arm_vqaddq_m_u32): Remove.
28151 (__arm_vqaddq_m_u16): Remove.
28152 (__arm_vqsubq_m_n_s8): Remove.
28153 (__arm_vqsubq_m_n_s32): Remove.
28154 (__arm_vqsubq_m_n_s16): Remove.
28155 (__arm_vqsubq_m_n_u8): Remove.
28156 (__arm_vqsubq_m_n_u32): Remove.
28157 (__arm_vqsubq_m_n_u16): Remove.
28158 (__arm_vqsubq_m_s8): Remove.
28159 (__arm_vqsubq_m_s32): Remove.
28160 (__arm_vqsubq_m_s16): Remove.
28161 (__arm_vqsubq_m_u8): Remove.
28162 (__arm_vqsubq_m_u32): Remove.
28163 (__arm_vqsubq_m_u16): Remove.
28164 (__arm_vqsubq): Remove.
28165 (__arm_vqaddq): Remove.
28166 (__arm_vqaddq_m): Remove.
28167 (__arm_vqsubq_m): Remove.
28168 (vqdmulhq): Remove.
28169 (vqdmulhq_m): Remove.
28170 (vqdmulhq_s8): Remove.
28171 (vqdmulhq_n_s8): Remove.
28172 (vqdmulhq_s16): Remove.
28173 (vqdmulhq_n_s16): Remove.
28174 (vqdmulhq_s32): Remove.
28175 (vqdmulhq_n_s32): Remove.
28176 (vqdmulhq_m_n_s8): Remove.
28177 (vqdmulhq_m_n_s32): Remove.
28178 (vqdmulhq_m_n_s16): Remove.
28179 (vqdmulhq_m_s8): Remove.
28180 (vqdmulhq_m_s32): Remove.
28181 (vqdmulhq_m_s16): Remove.
28182 (__arm_vqdmulhq_s8): Remove.
28183 (__arm_vqdmulhq_n_s8): Remove.
28184 (__arm_vqdmulhq_s16): Remove.
28185 (__arm_vqdmulhq_n_s16): Remove.
28186 (__arm_vqdmulhq_s32): Remove.
28187 (__arm_vqdmulhq_n_s32): Remove.
28188 (__arm_vqdmulhq_m_n_s8): Remove.
28189 (__arm_vqdmulhq_m_n_s32): Remove.
28190 (__arm_vqdmulhq_m_n_s16): Remove.
28191 (__arm_vqdmulhq_m_s8): Remove.
28192 (__arm_vqdmulhq_m_s32): Remove.
28193 (__arm_vqdmulhq_m_s16): Remove.
28194 (__arm_vqdmulhq): Remove.
28195 (__arm_vqdmulhq_m): Remove.
28197 (vrhaddq_m): Remove.
28198 (vrhaddq_x): Remove.
28199 (vrhaddq_u8): Remove.
28200 (vrhaddq_s8): Remove.
28201 (vrhaddq_u16): Remove.
28202 (vrhaddq_s16): Remove.
28203 (vrhaddq_u32): Remove.
28204 (vrhaddq_s32): Remove.
28205 (vrhaddq_m_s8): Remove.
28206 (vrhaddq_m_s32): Remove.
28207 (vrhaddq_m_s16): Remove.
28208 (vrhaddq_m_u8): Remove.
28209 (vrhaddq_m_u32): Remove.
28210 (vrhaddq_m_u16): Remove.
28211 (vrhaddq_x_s8): Remove.
28212 (vrhaddq_x_s16): Remove.
28213 (vrhaddq_x_s32): Remove.
28214 (vrhaddq_x_u8): Remove.
28215 (vrhaddq_x_u16): Remove.
28216 (vrhaddq_x_u32): Remove.
28217 (__arm_vrhaddq_u8): Remove.
28218 (__arm_vrhaddq_s8): Remove.
28219 (__arm_vrhaddq_u16): Remove.
28220 (__arm_vrhaddq_s16): Remove.
28221 (__arm_vrhaddq_u32): Remove.
28222 (__arm_vrhaddq_s32): Remove.
28223 (__arm_vrhaddq_m_s8): Remove.
28224 (__arm_vrhaddq_m_s32): Remove.
28225 (__arm_vrhaddq_m_s16): Remove.
28226 (__arm_vrhaddq_m_u8): Remove.
28227 (__arm_vrhaddq_m_u32): Remove.
28228 (__arm_vrhaddq_m_u16): Remove.
28229 (__arm_vrhaddq_x_s8): Remove.
28230 (__arm_vrhaddq_x_s16): Remove.
28231 (__arm_vrhaddq_x_s32): Remove.
28232 (__arm_vrhaddq_x_u8): Remove.
28233 (__arm_vrhaddq_x_u16): Remove.
28234 (__arm_vrhaddq_x_u32): Remove.
28235 (__arm_vrhaddq): Remove.
28236 (__arm_vrhaddq_m): Remove.
28237 (__arm_vrhaddq_x): Remove.
28239 (vrmulhq_m): Remove.
28240 (vrmulhq_x): Remove.
28241 (vrmulhq_u8): Remove.
28242 (vrmulhq_s8): Remove.
28243 (vrmulhq_u16): Remove.
28244 (vrmulhq_s16): Remove.
28245 (vrmulhq_u32): Remove.
28246 (vrmulhq_s32): Remove.
28247 (vrmulhq_m_s8): Remove.
28248 (vrmulhq_m_s32): Remove.
28249 (vrmulhq_m_s16): Remove.
28250 (vrmulhq_m_u8): Remove.
28251 (vrmulhq_m_u32): Remove.
28252 (vrmulhq_m_u16): Remove.
28253 (vrmulhq_x_s8): Remove.
28254 (vrmulhq_x_s16): Remove.
28255 (vrmulhq_x_s32): Remove.
28256 (vrmulhq_x_u8): Remove.
28257 (vrmulhq_x_u16): Remove.
28258 (vrmulhq_x_u32): Remove.
28259 (__arm_vrmulhq_u8): Remove.
28260 (__arm_vrmulhq_s8): Remove.
28261 (__arm_vrmulhq_u16): Remove.
28262 (__arm_vrmulhq_s16): Remove.
28263 (__arm_vrmulhq_u32): Remove.
28264 (__arm_vrmulhq_s32): Remove.
28265 (__arm_vrmulhq_m_s8): Remove.
28266 (__arm_vrmulhq_m_s32): Remove.
28267 (__arm_vrmulhq_m_s16): Remove.
28268 (__arm_vrmulhq_m_u8): Remove.
28269 (__arm_vrmulhq_m_u32): Remove.
28270 (__arm_vrmulhq_m_u16): Remove.
28271 (__arm_vrmulhq_x_s8): Remove.
28272 (__arm_vrmulhq_x_s16): Remove.
28273 (__arm_vrmulhq_x_s32): Remove.
28274 (__arm_vrmulhq_x_u8): Remove.
28275 (__arm_vrmulhq_x_u16): Remove.
28276 (__arm_vrmulhq_x_u32): Remove.
28277 (__arm_vrmulhq): Remove.
28278 (__arm_vrmulhq_m): Remove.
28279 (__arm_vrmulhq_x): Remove.
28281 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
28283 * config/arm/iterators.md (MVE_INT_SU_BINARY): New.
28284 (mve_insn): Add vabdq, vhaddq, vhsubq, vmulhq, vqaddq, vqdmulhq,
28285 vqrdmulhq, vqrshlq, vqshlq, vqsubq, vrhaddq, vrmulhq, vrshlq.
28286 (supf): Add VQDMULHQ_S, VQRDMULHQ_S.
28287 * config/arm/mve.md (mve_vabdq_<supf><mode>)
28288 (@mve_vhaddq_<supf><mode>, mve_vhsubq_<supf><mode>)
28289 (mve_vmulhq_<supf><mode>, mve_vqaddq_<supf><mode>)
28290 (mve_vqdmulhq_s<mode>, mve_vqrdmulhq_s<mode>)
28291 (mve_vqrshlq_<supf><mode>, mve_vqshlq_<supf><mode>)
28292 (mve_vqsubq_<supf><mode>, @mve_vrhaddq_<supf><mode>)
28293 (mve_vrmulhq_<supf><mode>, mve_vrshlq_<supf><mode>): Merge into
28295 (@mve_<mve_insn>q_<supf><mode>): ... this.
28296 * config/arm/vec-common.md (avg<mode>3_floor, uavg<mode>3_floor)
28297 (avg<mode>3_ceil, uavg<mode>3_ceil): Use gen_mve_q instead of
28298 gen_mve_vhaddq / gen_mve_vrhaddq.
28300 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
28302 * config/arm/iterators.md (MVE_INT_SU_M_N_BINARY): New.
28303 (mve_insn): Add vhaddq, vhsubq, vmlaq, vmlasq, vqaddq, vqdmlahq,
28304 vqdmlashq, vqdmulhq, vqrdmlahq, vqrdmlashq, vqrdmulhq, vqsubq.
28305 (supf): Add VQDMLAHQ_M_N_S, VQDMLASHQ_M_N_S, VQRDMLAHQ_M_N_S,
28306 VQRDMLASHQ_M_N_S, VQDMULHQ_M_N_S, VQRDMULHQ_M_N_S.
28307 * config/arm/mve.md (mve_vhaddq_m_n_<supf><mode>)
28308 (mve_vhsubq_m_n_<supf><mode>, mve_vmlaq_m_n_<supf><mode>)
28309 (mve_vmlasq_m_n_<supf><mode>, mve_vqaddq_m_n_<supf><mode>)
28310 (mve_vqdmlahq_m_n_s<mode>, mve_vqdmlashq_m_n_s<mode>)
28311 (mve_vqrdmlahq_m_n_s<mode>, mve_vqrdmlashq_m_n_s<mode>)
28312 (mve_vqsubq_m_n_<supf><mode>, mve_vqdmulhq_m_n_s<mode>)
28313 (mve_vqrdmulhq_m_n_s<mode>): Merge into ...
28314 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
28316 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
28318 * config/arm/iterators.md (MVE_INT_SU_N_BINARY): New.
28319 (mve_insn): Add vhaddq, vhsubq, vqaddq, vqdmulhq, vqrdmulhq,
28321 (supf): Add VQDMULHQ_N_S, VQRDMULHQ_N_S.
28322 * config/arm/mve.md (mve_vhaddq_n_<supf><mode>)
28323 (mve_vhsubq_n_<supf><mode>, mve_vqaddq_n_<supf><mode>)
28324 (mve_vqdmulhq_n_s<mode>, mve_vqrdmulhq_n_s<mode>)
28325 (mve_vqsubq_n_<supf><mode>): Merge into ...
28326 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
28328 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
28330 * config/arm/iterators.md (MVE_INT_SU_M_BINARY): New.
28331 (mve_insn): Add vabdq, vhaddq, vhsubq, vmaxq, vminq, vmulhq,
28332 vqaddq, vqdmladhq, vqdmladhxq, vqdmlsdhq, vqdmlsdhxq, vqdmulhq,
28333 vqrdmladhq, vqrdmladhxq, vqrdmlsdhq, vqrdmlsdhxq, vqrdmulhq,
28334 vqrshlq, vqshlq, vqsubq, vrhaddq, vrmulhq, vrshlq, vshlq.
28335 (supf): Add VQDMLADHQ_M_S, VQDMLADHXQ_M_S, VQDMLSDHQ_M_S,
28336 VQDMLSDHXQ_M_S, VQDMULHQ_M_S, VQRDMLADHQ_M_S, VQRDMLADHXQ_M_S,
28337 VQRDMLSDHQ_M_S, VQRDMLSDHXQ_M_S, VQRDMULHQ_M_S.
28338 * config/arm/mve.md (@mve_<mve_insn>q_m_<supf><mode>): New.
28339 (mve_vshlq_m_<supf><mode>): Merged into
28340 @mve_<mve_insn>q_m_<supf><mode>.
28341 (mve_vabdq_m_<supf><mode>): Likewise.
28342 (mve_vhaddq_m_<supf><mode>): Likewise.
28343 (mve_vhsubq_m_<supf><mode>): Likewise.
28344 (mve_vmaxq_m_<supf><mode>): Likewise.
28345 (mve_vminq_m_<supf><mode>): Likewise.
28346 (mve_vmulhq_m_<supf><mode>): Likewise.
28347 (mve_vqaddq_m_<supf><mode>): Likewise.
28348 (mve_vqrshlq_m_<supf><mode>): Likewise.
28349 (mve_vqshlq_m_<supf><mode>): Likewise.
28350 (mve_vqsubq_m_<supf><mode>): Likewise.
28351 (mve_vrhaddq_m_<supf><mode>): Likewise.
28352 (mve_vrmulhq_m_<supf><mode>): Likewise.
28353 (mve_vrshlq_m_<supf><mode>): Likewise.
28354 (mve_vqdmladhq_m_s<mode>): Likewise.
28355 (mve_vqdmladhxq_m_s<mode>): Likewise.
28356 (mve_vqdmlsdhq_m_s<mode>): Likewise.
28357 (mve_vqdmlsdhxq_m_s<mode>): Likewise.
28358 (mve_vqdmulhq_m_s<mode>): Likewise.
28359 (mve_vqrdmladhq_m_s<mode>): Likewise.
28360 (mve_vqrdmladhxq_m_s<mode>): Likewise.
28361 (mve_vqrdmlsdhq_m_s<mode>): Likewise.
28362 (mve_vqrdmlsdhxq_m_s<mode>): Likewise.
28363 (mve_vqrdmulhq_m_s<mode>): Likewise.
28365 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
28367 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_M_N): New. (vcreateq): New.
28368 * config/arm/arm-mve-builtins-base.def (vcreateq): New.
28369 * config/arm/arm-mve-builtins-base.h (vcreateq): New.
28370 * config/arm/arm_mve.h (vcreateq_f16): Remove.
28371 (vcreateq_f32): Remove.
28372 (vcreateq_u8): Remove.
28373 (vcreateq_u16): Remove.
28374 (vcreateq_u32): Remove.
28375 (vcreateq_u64): Remove.
28376 (vcreateq_s8): Remove.
28377 (vcreateq_s16): Remove.
28378 (vcreateq_s32): Remove.
28379 (vcreateq_s64): Remove.
28380 (__arm_vcreateq_u8): Remove.
28381 (__arm_vcreateq_u16): Remove.
28382 (__arm_vcreateq_u32): Remove.
28383 (__arm_vcreateq_u64): Remove.
28384 (__arm_vcreateq_s8): Remove.
28385 (__arm_vcreateq_s16): Remove.
28386 (__arm_vcreateq_s32): Remove.
28387 (__arm_vcreateq_s64): Remove.
28388 (__arm_vcreateq_f16): Remove.
28389 (__arm_vcreateq_f32): Remove.
28391 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
28393 * config/arm/iterators.md (MVE_FP_CREATE_ONLY): New.
28394 (mve_insn): Add VCREATEQ_S, VCREATEQ_U, VCREATEQ_F.
28395 * config/arm/mve.md (mve_vcreateq_f<mode>): Rename into ...
28396 (@mve_<mve_insn>q_f<mode>): ... this.
28397 (mve_vcreateq_<supf><mode>): Rename into ...
28398 (@mve_<mve_insn>q_<supf><mode>): ... this.
28400 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
28402 * config/arm/arm-mve-builtins-shapes.cc (create): New.
28403 * config/arm/arm-mve-builtins-shapes.h: (create): New.
28405 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
28407 * config/arm/arm-mve-builtins-functions.h (class
28408 unspec_mve_function_exact_insn): New.
28410 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
28412 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_N_NO_N_F): New.
28414 * config/arm/arm-mve-builtins-base.def (vorrq): New.
28415 * config/arm/arm-mve-builtins-base.h (vorrq): New.
28416 * config/arm/arm-mve-builtins.cc
28417 (function_instance::has_inactive_argument): Handle vorrq.
28418 * config/arm/arm_mve.h (vorrq): Remove.
28419 (vorrq_m_n): Remove.
28422 (vorrq_u8): Remove.
28423 (vorrq_s8): Remove.
28424 (vorrq_u16): Remove.
28425 (vorrq_s16): Remove.
28426 (vorrq_u32): Remove.
28427 (vorrq_s32): Remove.
28428 (vorrq_n_u16): Remove.
28429 (vorrq_f16): Remove.
28430 (vorrq_n_s16): Remove.
28431 (vorrq_n_u32): Remove.
28432 (vorrq_f32): Remove.
28433 (vorrq_n_s32): Remove.
28434 (vorrq_m_n_s16): Remove.
28435 (vorrq_m_n_u16): Remove.
28436 (vorrq_m_n_s32): Remove.
28437 (vorrq_m_n_u32): Remove.
28438 (vorrq_m_s8): Remove.
28439 (vorrq_m_s32): Remove.
28440 (vorrq_m_s16): Remove.
28441 (vorrq_m_u8): Remove.
28442 (vorrq_m_u32): Remove.
28443 (vorrq_m_u16): Remove.
28444 (vorrq_m_f32): Remove.
28445 (vorrq_m_f16): Remove.
28446 (vorrq_x_s8): Remove.
28447 (vorrq_x_s16): Remove.
28448 (vorrq_x_s32): Remove.
28449 (vorrq_x_u8): Remove.
28450 (vorrq_x_u16): Remove.
28451 (vorrq_x_u32): Remove.
28452 (vorrq_x_f16): Remove.
28453 (vorrq_x_f32): Remove.
28454 (__arm_vorrq_u8): Remove.
28455 (__arm_vorrq_s8): Remove.
28456 (__arm_vorrq_u16): Remove.
28457 (__arm_vorrq_s16): Remove.
28458 (__arm_vorrq_u32): Remove.
28459 (__arm_vorrq_s32): Remove.
28460 (__arm_vorrq_n_u16): Remove.
28461 (__arm_vorrq_n_s16): Remove.
28462 (__arm_vorrq_n_u32): Remove.
28463 (__arm_vorrq_n_s32): Remove.
28464 (__arm_vorrq_m_n_s16): Remove.
28465 (__arm_vorrq_m_n_u16): Remove.
28466 (__arm_vorrq_m_n_s32): Remove.
28467 (__arm_vorrq_m_n_u32): Remove.
28468 (__arm_vorrq_m_s8): Remove.
28469 (__arm_vorrq_m_s32): Remove.
28470 (__arm_vorrq_m_s16): Remove.
28471 (__arm_vorrq_m_u8): Remove.
28472 (__arm_vorrq_m_u32): Remove.
28473 (__arm_vorrq_m_u16): Remove.
28474 (__arm_vorrq_x_s8): Remove.
28475 (__arm_vorrq_x_s16): Remove.
28476 (__arm_vorrq_x_s32): Remove.
28477 (__arm_vorrq_x_u8): Remove.
28478 (__arm_vorrq_x_u16): Remove.
28479 (__arm_vorrq_x_u32): Remove.
28480 (__arm_vorrq_f16): Remove.
28481 (__arm_vorrq_f32): Remove.
28482 (__arm_vorrq_m_f32): Remove.
28483 (__arm_vorrq_m_f16): Remove.
28484 (__arm_vorrq_x_f16): Remove.
28485 (__arm_vorrq_x_f32): Remove.
28486 (__arm_vorrq): Remove.
28487 (__arm_vorrq_m_n): Remove.
28488 (__arm_vorrq_m): Remove.
28489 (__arm_vorrq_x): Remove.
28491 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
28493 * config/arm/arm-mve-builtins-shapes.cc (binary_orrq): New.
28494 * config/arm/arm-mve-builtins-shapes.h (binary_orrq): New.
28495 * config/arm/arm-mve-builtins.cc (preds_m_or_none): Remove static.
28496 * config/arm/arm-mve-builtins.h (preds_m_or_none): Declare.
28498 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
28500 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M): New.
28501 (vandq,veorq): New.
28502 * config/arm/arm-mve-builtins-base.def (vandq, veorq): New.
28503 * config/arm/arm-mve-builtins-base.h (vandq, veorq): New.
28504 * config/arm/arm_mve.h (vandq): Remove.
28507 (vandq_u8): Remove.
28508 (vandq_s8): Remove.
28509 (vandq_u16): Remove.
28510 (vandq_s16): Remove.
28511 (vandq_u32): Remove.
28512 (vandq_s32): Remove.
28513 (vandq_f16): Remove.
28514 (vandq_f32): Remove.
28515 (vandq_m_s8): Remove.
28516 (vandq_m_s32): Remove.
28517 (vandq_m_s16): Remove.
28518 (vandq_m_u8): Remove.
28519 (vandq_m_u32): Remove.
28520 (vandq_m_u16): Remove.
28521 (vandq_m_f32): Remove.
28522 (vandq_m_f16): Remove.
28523 (vandq_x_s8): Remove.
28524 (vandq_x_s16): Remove.
28525 (vandq_x_s32): Remove.
28526 (vandq_x_u8): Remove.
28527 (vandq_x_u16): Remove.
28528 (vandq_x_u32): Remove.
28529 (vandq_x_f16): Remove.
28530 (vandq_x_f32): Remove.
28531 (__arm_vandq_u8): Remove.
28532 (__arm_vandq_s8): Remove.
28533 (__arm_vandq_u16): Remove.
28534 (__arm_vandq_s16): Remove.
28535 (__arm_vandq_u32): Remove.
28536 (__arm_vandq_s32): Remove.
28537 (__arm_vandq_m_s8): Remove.
28538 (__arm_vandq_m_s32): Remove.
28539 (__arm_vandq_m_s16): Remove.
28540 (__arm_vandq_m_u8): Remove.
28541 (__arm_vandq_m_u32): Remove.
28542 (__arm_vandq_m_u16): Remove.
28543 (__arm_vandq_x_s8): Remove.
28544 (__arm_vandq_x_s16): Remove.
28545 (__arm_vandq_x_s32): Remove.
28546 (__arm_vandq_x_u8): Remove.
28547 (__arm_vandq_x_u16): Remove.
28548 (__arm_vandq_x_u32): Remove.
28549 (__arm_vandq_f16): Remove.
28550 (__arm_vandq_f32): Remove.
28551 (__arm_vandq_m_f32): Remove.
28552 (__arm_vandq_m_f16): Remove.
28553 (__arm_vandq_x_f16): Remove.
28554 (__arm_vandq_x_f32): Remove.
28555 (__arm_vandq): Remove.
28556 (__arm_vandq_m): Remove.
28557 (__arm_vandq_x): Remove.
28560 (veorq_u8): Remove.
28561 (veorq_s8): Remove.
28562 (veorq_u16): Remove.
28563 (veorq_s16): Remove.
28564 (veorq_u32): Remove.
28565 (veorq_s32): Remove.
28566 (veorq_f16): Remove.
28567 (veorq_f32): Remove.
28568 (veorq_m_s8): Remove.
28569 (veorq_m_s32): Remove.
28570 (veorq_m_s16): Remove.
28571 (veorq_m_u8): Remove.
28572 (veorq_m_u32): Remove.
28573 (veorq_m_u16): Remove.
28574 (veorq_m_f32): Remove.
28575 (veorq_m_f16): Remove.
28576 (veorq_x_s8): Remove.
28577 (veorq_x_s16): Remove.
28578 (veorq_x_s32): Remove.
28579 (veorq_x_u8): Remove.
28580 (veorq_x_u16): Remove.
28581 (veorq_x_u32): Remove.
28582 (veorq_x_f16): Remove.
28583 (veorq_x_f32): Remove.
28584 (__arm_veorq_u8): Remove.
28585 (__arm_veorq_s8): Remove.
28586 (__arm_veorq_u16): Remove.
28587 (__arm_veorq_s16): Remove.
28588 (__arm_veorq_u32): Remove.
28589 (__arm_veorq_s32): Remove.
28590 (__arm_veorq_m_s8): Remove.
28591 (__arm_veorq_m_s32): Remove.
28592 (__arm_veorq_m_s16): Remove.
28593 (__arm_veorq_m_u8): Remove.
28594 (__arm_veorq_m_u32): Remove.
28595 (__arm_veorq_m_u16): Remove.
28596 (__arm_veorq_x_s8): Remove.
28597 (__arm_veorq_x_s16): Remove.
28598 (__arm_veorq_x_s32): Remove.
28599 (__arm_veorq_x_u8): Remove.
28600 (__arm_veorq_x_u16): Remove.
28601 (__arm_veorq_x_u32): Remove.
28602 (__arm_veorq_f16): Remove.
28603 (__arm_veorq_f32): Remove.
28604 (__arm_veorq_m_f32): Remove.
28605 (__arm_veorq_m_f16): Remove.
28606 (__arm_veorq_x_f16): Remove.
28607 (__arm_veorq_x_f32): Remove.
28608 (__arm_veorq): Remove.
28609 (__arm_veorq_m): Remove.
28610 (__arm_veorq_x): Remove.
28612 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
28614 * config/arm/iterators.md (MVE_INT_M_BINARY_LOGIC)
28615 (MVE_FP_M_BINARY_LOGIC): New.
28616 (MVE_INT_M_N_BINARY_LOGIC): New.
28617 (MVE_INT_N_BINARY_LOGIC): New.
28618 (mve_insn): Add vand, veor, vorr, vbic.
28619 * config/arm/mve.md (mve_vandq_m_<supf><mode>)
28620 (mve_veorq_m_<supf><mode>, mve_vorrq_m_<supf><mode>)
28621 (mve_vbicq_m_<supf><mode>): Merge into ...
28622 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
28623 (mve_vandq_m_f<mode>, mve_veorq_m_f<mode>, mve_vorrq_m_f<mode>)
28624 (mve_vbicq_m_f<mode>): Merge into ...
28625 (@mve_<mve_insn>q_m_f<mode>): ... this.
28626 (mve_vorrq_n_<supf><mode>)
28627 (mve_vbicq_n_<supf><mode>): Merge into ...
28628 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
28629 (mve_vorrq_m_n_<supf><mode>, mve_vbicq_m_n_<supf><mode>): Merge
28631 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
28633 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
28635 * config/arm/arm-mve-builtins-shapes.cc (binary): New.
28636 * config/arm/arm-mve-builtins-shapes.h (binary): New.
28638 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
28640 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_N):
28642 (vaddq, vmulq, vsubq): New.
28643 * config/arm/arm-mve-builtins-base.def (vaddq, vmulq, vsubq): New.
28644 * config/arm/arm-mve-builtins-base.h (vaddq, vmulq, vsubq): New.
28645 * config/arm/arm_mve.h (vaddq): Remove.
28648 (vaddq_n_u8): Remove.
28649 (vaddq_n_s8): Remove.
28650 (vaddq_n_u16): Remove.
28651 (vaddq_n_s16): Remove.
28652 (vaddq_n_u32): Remove.
28653 (vaddq_n_s32): Remove.
28654 (vaddq_n_f16): Remove.
28655 (vaddq_n_f32): Remove.
28656 (vaddq_m_n_s8): Remove.
28657 (vaddq_m_n_s32): Remove.
28658 (vaddq_m_n_s16): Remove.
28659 (vaddq_m_n_u8): Remove.
28660 (vaddq_m_n_u32): Remove.
28661 (vaddq_m_n_u16): Remove.
28662 (vaddq_m_s8): Remove.
28663 (vaddq_m_s32): Remove.
28664 (vaddq_m_s16): Remove.
28665 (vaddq_m_u8): Remove.
28666 (vaddq_m_u32): Remove.
28667 (vaddq_m_u16): Remove.
28668 (vaddq_m_f32): Remove.
28669 (vaddq_m_f16): Remove.
28670 (vaddq_m_n_f32): Remove.
28671 (vaddq_m_n_f16): Remove.
28672 (vaddq_s8): Remove.
28673 (vaddq_s16): Remove.
28674 (vaddq_s32): Remove.
28675 (vaddq_u8): Remove.
28676 (vaddq_u16): Remove.
28677 (vaddq_u32): Remove.
28678 (vaddq_f16): Remove.
28679 (vaddq_f32): Remove.
28680 (vaddq_x_s8): Remove.
28681 (vaddq_x_s16): Remove.
28682 (vaddq_x_s32): Remove.
28683 (vaddq_x_n_s8): Remove.
28684 (vaddq_x_n_s16): Remove.
28685 (vaddq_x_n_s32): Remove.
28686 (vaddq_x_u8): Remove.
28687 (vaddq_x_u16): Remove.
28688 (vaddq_x_u32): Remove.
28689 (vaddq_x_n_u8): Remove.
28690 (vaddq_x_n_u16): Remove.
28691 (vaddq_x_n_u32): Remove.
28692 (vaddq_x_f16): Remove.
28693 (vaddq_x_f32): Remove.
28694 (vaddq_x_n_f16): Remove.
28695 (vaddq_x_n_f32): Remove.
28696 (__arm_vaddq_n_u8): Remove.
28697 (__arm_vaddq_n_s8): Remove.
28698 (__arm_vaddq_n_u16): Remove.
28699 (__arm_vaddq_n_s16): Remove.
28700 (__arm_vaddq_n_u32): Remove.
28701 (__arm_vaddq_n_s32): Remove.
28702 (__arm_vaddq_m_n_s8): Remove.
28703 (__arm_vaddq_m_n_s32): Remove.
28704 (__arm_vaddq_m_n_s16): Remove.
28705 (__arm_vaddq_m_n_u8): Remove.
28706 (__arm_vaddq_m_n_u32): Remove.
28707 (__arm_vaddq_m_n_u16): Remove.
28708 (__arm_vaddq_m_s8): Remove.
28709 (__arm_vaddq_m_s32): Remove.
28710 (__arm_vaddq_m_s16): Remove.
28711 (__arm_vaddq_m_u8): Remove.
28712 (__arm_vaddq_m_u32): Remove.
28713 (__arm_vaddq_m_u16): Remove.
28714 (__arm_vaddq_s8): Remove.
28715 (__arm_vaddq_s16): Remove.
28716 (__arm_vaddq_s32): Remove.
28717 (__arm_vaddq_u8): Remove.
28718 (__arm_vaddq_u16): Remove.
28719 (__arm_vaddq_u32): Remove.
28720 (__arm_vaddq_x_s8): Remove.
28721 (__arm_vaddq_x_s16): Remove.
28722 (__arm_vaddq_x_s32): Remove.
28723 (__arm_vaddq_x_n_s8): Remove.
28724 (__arm_vaddq_x_n_s16): Remove.
28725 (__arm_vaddq_x_n_s32): Remove.
28726 (__arm_vaddq_x_u8): Remove.
28727 (__arm_vaddq_x_u16): Remove.
28728 (__arm_vaddq_x_u32): Remove.
28729 (__arm_vaddq_x_n_u8): Remove.
28730 (__arm_vaddq_x_n_u16): Remove.
28731 (__arm_vaddq_x_n_u32): Remove.
28732 (__arm_vaddq_n_f16): Remove.
28733 (__arm_vaddq_n_f32): Remove.
28734 (__arm_vaddq_m_f32): Remove.
28735 (__arm_vaddq_m_f16): Remove.
28736 (__arm_vaddq_m_n_f32): Remove.
28737 (__arm_vaddq_m_n_f16): Remove.
28738 (__arm_vaddq_f16): Remove.
28739 (__arm_vaddq_f32): Remove.
28740 (__arm_vaddq_x_f16): Remove.
28741 (__arm_vaddq_x_f32): Remove.
28742 (__arm_vaddq_x_n_f16): Remove.
28743 (__arm_vaddq_x_n_f32): Remove.
28744 (__arm_vaddq): Remove.
28745 (__arm_vaddq_m): Remove.
28746 (__arm_vaddq_x): Remove.
28750 (vmulq_u8): Remove.
28751 (vmulq_n_u8): Remove.
28752 (vmulq_s8): Remove.
28753 (vmulq_n_s8): Remove.
28754 (vmulq_u16): Remove.
28755 (vmulq_n_u16): Remove.
28756 (vmulq_s16): Remove.
28757 (vmulq_n_s16): Remove.
28758 (vmulq_u32): Remove.
28759 (vmulq_n_u32): Remove.
28760 (vmulq_s32): Remove.
28761 (vmulq_n_s32): Remove.
28762 (vmulq_n_f16): Remove.
28763 (vmulq_f16): Remove.
28764 (vmulq_n_f32): Remove.
28765 (vmulq_f32): Remove.
28766 (vmulq_m_n_s8): Remove.
28767 (vmulq_m_n_s32): Remove.
28768 (vmulq_m_n_s16): Remove.
28769 (vmulq_m_n_u8): Remove.
28770 (vmulq_m_n_u32): Remove.
28771 (vmulq_m_n_u16): Remove.
28772 (vmulq_m_s8): Remove.
28773 (vmulq_m_s32): Remove.
28774 (vmulq_m_s16): Remove.
28775 (vmulq_m_u8): Remove.
28776 (vmulq_m_u32): Remove.
28777 (vmulq_m_u16): Remove.
28778 (vmulq_m_f32): Remove.
28779 (vmulq_m_f16): Remove.
28780 (vmulq_m_n_f32): Remove.
28781 (vmulq_m_n_f16): Remove.
28782 (vmulq_x_s8): Remove.
28783 (vmulq_x_s16): Remove.
28784 (vmulq_x_s32): Remove.
28785 (vmulq_x_n_s8): Remove.
28786 (vmulq_x_n_s16): Remove.
28787 (vmulq_x_n_s32): Remove.
28788 (vmulq_x_u8): Remove.
28789 (vmulq_x_u16): Remove.
28790 (vmulq_x_u32): Remove.
28791 (vmulq_x_n_u8): Remove.
28792 (vmulq_x_n_u16): Remove.
28793 (vmulq_x_n_u32): Remove.
28794 (vmulq_x_f16): Remove.
28795 (vmulq_x_f32): Remove.
28796 (vmulq_x_n_f16): Remove.
28797 (vmulq_x_n_f32): Remove.
28798 (__arm_vmulq_u8): Remove.
28799 (__arm_vmulq_n_u8): Remove.
28800 (__arm_vmulq_s8): Remove.
28801 (__arm_vmulq_n_s8): Remove.
28802 (__arm_vmulq_u16): Remove.
28803 (__arm_vmulq_n_u16): Remove.
28804 (__arm_vmulq_s16): Remove.
28805 (__arm_vmulq_n_s16): Remove.
28806 (__arm_vmulq_u32): Remove.
28807 (__arm_vmulq_n_u32): Remove.
28808 (__arm_vmulq_s32): Remove.
28809 (__arm_vmulq_n_s32): Remove.
28810 (__arm_vmulq_m_n_s8): Remove.
28811 (__arm_vmulq_m_n_s32): Remove.
28812 (__arm_vmulq_m_n_s16): Remove.
28813 (__arm_vmulq_m_n_u8): Remove.
28814 (__arm_vmulq_m_n_u32): Remove.
28815 (__arm_vmulq_m_n_u16): Remove.
28816 (__arm_vmulq_m_s8): Remove.
28817 (__arm_vmulq_m_s32): Remove.
28818 (__arm_vmulq_m_s16): Remove.
28819 (__arm_vmulq_m_u8): Remove.
28820 (__arm_vmulq_m_u32): Remove.
28821 (__arm_vmulq_m_u16): Remove.
28822 (__arm_vmulq_x_s8): Remove.
28823 (__arm_vmulq_x_s16): Remove.
28824 (__arm_vmulq_x_s32): Remove.
28825 (__arm_vmulq_x_n_s8): Remove.
28826 (__arm_vmulq_x_n_s16): Remove.
28827 (__arm_vmulq_x_n_s32): Remove.
28828 (__arm_vmulq_x_u8): Remove.
28829 (__arm_vmulq_x_u16): Remove.
28830 (__arm_vmulq_x_u32): Remove.
28831 (__arm_vmulq_x_n_u8): Remove.
28832 (__arm_vmulq_x_n_u16): Remove.
28833 (__arm_vmulq_x_n_u32): Remove.
28834 (__arm_vmulq_n_f16): Remove.
28835 (__arm_vmulq_f16): Remove.
28836 (__arm_vmulq_n_f32): Remove.
28837 (__arm_vmulq_f32): Remove.
28838 (__arm_vmulq_m_f32): Remove.
28839 (__arm_vmulq_m_f16): Remove.
28840 (__arm_vmulq_m_n_f32): Remove.
28841 (__arm_vmulq_m_n_f16): Remove.
28842 (__arm_vmulq_x_f16): Remove.
28843 (__arm_vmulq_x_f32): Remove.
28844 (__arm_vmulq_x_n_f16): Remove.
28845 (__arm_vmulq_x_n_f32): Remove.
28846 (__arm_vmulq): Remove.
28847 (__arm_vmulq_m): Remove.
28848 (__arm_vmulq_x): Remove.
28852 (vsubq_n_f16): Remove.
28853 (vsubq_n_f32): Remove.
28854 (vsubq_u8): Remove.
28855 (vsubq_n_u8): Remove.
28856 (vsubq_s8): Remove.
28857 (vsubq_n_s8): Remove.
28858 (vsubq_u16): Remove.
28859 (vsubq_n_u16): Remove.
28860 (vsubq_s16): Remove.
28861 (vsubq_n_s16): Remove.
28862 (vsubq_u32): Remove.
28863 (vsubq_n_u32): Remove.
28864 (vsubq_s32): Remove.
28865 (vsubq_n_s32): Remove.
28866 (vsubq_f16): Remove.
28867 (vsubq_f32): Remove.
28868 (vsubq_m_s8): Remove.
28869 (vsubq_m_u8): Remove.
28870 (vsubq_m_s16): Remove.
28871 (vsubq_m_u16): Remove.
28872 (vsubq_m_s32): Remove.
28873 (vsubq_m_u32): Remove.
28874 (vsubq_m_n_s8): Remove.
28875 (vsubq_m_n_s32): Remove.
28876 (vsubq_m_n_s16): Remove.
28877 (vsubq_m_n_u8): Remove.
28878 (vsubq_m_n_u32): Remove.
28879 (vsubq_m_n_u16): Remove.
28880 (vsubq_m_f32): Remove.
28881 (vsubq_m_f16): Remove.
28882 (vsubq_m_n_f32): Remove.
28883 (vsubq_m_n_f16): Remove.
28884 (vsubq_x_s8): Remove.
28885 (vsubq_x_s16): Remove.
28886 (vsubq_x_s32): Remove.
28887 (vsubq_x_n_s8): Remove.
28888 (vsubq_x_n_s16): Remove.
28889 (vsubq_x_n_s32): Remove.
28890 (vsubq_x_u8): Remove.
28891 (vsubq_x_u16): Remove.
28892 (vsubq_x_u32): Remove.
28893 (vsubq_x_n_u8): Remove.
28894 (vsubq_x_n_u16): Remove.
28895 (vsubq_x_n_u32): Remove.
28896 (vsubq_x_f16): Remove.
28897 (vsubq_x_f32): Remove.
28898 (vsubq_x_n_f16): Remove.
28899 (vsubq_x_n_f32): Remove.
28900 (__arm_vsubq_u8): Remove.
28901 (__arm_vsubq_n_u8): Remove.
28902 (__arm_vsubq_s8): Remove.
28903 (__arm_vsubq_n_s8): Remove.
28904 (__arm_vsubq_u16): Remove.
28905 (__arm_vsubq_n_u16): Remove.
28906 (__arm_vsubq_s16): Remove.
28907 (__arm_vsubq_n_s16): Remove.
28908 (__arm_vsubq_u32): Remove.
28909 (__arm_vsubq_n_u32): Remove.
28910 (__arm_vsubq_s32): Remove.
28911 (__arm_vsubq_n_s32): Remove.
28912 (__arm_vsubq_m_s8): Remove.
28913 (__arm_vsubq_m_u8): Remove.
28914 (__arm_vsubq_m_s16): Remove.
28915 (__arm_vsubq_m_u16): Remove.
28916 (__arm_vsubq_m_s32): Remove.
28917 (__arm_vsubq_m_u32): Remove.
28918 (__arm_vsubq_m_n_s8): Remove.
28919 (__arm_vsubq_m_n_s32): Remove.
28920 (__arm_vsubq_m_n_s16): Remove.
28921 (__arm_vsubq_m_n_u8): Remove.
28922 (__arm_vsubq_m_n_u32): Remove.
28923 (__arm_vsubq_m_n_u16): Remove.
28924 (__arm_vsubq_x_s8): Remove.
28925 (__arm_vsubq_x_s16): Remove.
28926 (__arm_vsubq_x_s32): Remove.
28927 (__arm_vsubq_x_n_s8): Remove.
28928 (__arm_vsubq_x_n_s16): Remove.
28929 (__arm_vsubq_x_n_s32): Remove.
28930 (__arm_vsubq_x_u8): Remove.
28931 (__arm_vsubq_x_u16): Remove.
28932 (__arm_vsubq_x_u32): Remove.
28933 (__arm_vsubq_x_n_u8): Remove.
28934 (__arm_vsubq_x_n_u16): Remove.
28935 (__arm_vsubq_x_n_u32): Remove.
28936 (__arm_vsubq_n_f16): Remove.
28937 (__arm_vsubq_n_f32): Remove.
28938 (__arm_vsubq_f16): Remove.
28939 (__arm_vsubq_f32): Remove.
28940 (__arm_vsubq_m_f32): Remove.
28941 (__arm_vsubq_m_f16): Remove.
28942 (__arm_vsubq_m_n_f32): Remove.
28943 (__arm_vsubq_m_n_f16): Remove.
28944 (__arm_vsubq_x_f16): Remove.
28945 (__arm_vsubq_x_f32): Remove.
28946 (__arm_vsubq_x_n_f16): Remove.
28947 (__arm_vsubq_x_n_f32): Remove.
28948 (__arm_vsubq): Remove.
28949 (__arm_vsubq_m): Remove.
28950 (__arm_vsubq_x): Remove.
28951 * config/arm/arm_mve_builtins.def (vsubq_u, vsubq_s, vsubq_f):
28953 (vmulq_u, vmulq_s, vmulq_f): Remove.
28954 * config/arm/mve.md (mve_vsubq_<supf><mode>): Remove.
28955 (mve_vmulq_<supf><mode>): Remove.
28957 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
28959 * config/arm/iterators.md (MVE_INT_BINARY_RTX, MVE_INT_M_BINARY)
28960 (MVE_INT_M_N_BINARY, MVE_INT_N_BINARY, MVE_FP_M_BINARY)
28961 (MVE_FP_M_N_BINARY, MVE_FP_N_BINARY, mve_addsubmul, mve_insn): New
28963 * config/arm/mve.md
28964 (mve_vsubq_n_f<mode>, mve_vaddq_n_f<mode>, mve_vmulq_n_f<mode>):
28966 (@mve_<mve_insn>q_n_f<mode>): ... this.
28967 (mve_vaddq_n_<supf><mode>, mve_vmulq_n_<supf><mode>)
28968 (mve_vsubq_n_<supf><mode>): Factorize into ...
28969 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
28970 (mve_vaddq<mode>, mve_vmulq<mode>, mve_vsubq<mode>): Factorize
28972 (mve_<mve_addsubmul>q<mode>): ... this.
28973 (mve_vaddq_f<mode>, mve_vmulq_f<mode>, mve_vsubq_f<mode>):
28975 (mve_<mve_addsubmul>q_f<mode>): ... this.
28976 (mve_vaddq_m_<supf><mode>, mve_vmulq_m_<supf><mode>)
28977 (mve_vsubq_m_<supf><mode>): Factorize into ...
28978 (@mve_<mve_insn>q_m_<supf><mode>): ... this,
28979 (mve_vaddq_m_n_<supf><mode>, mve_vmulq_m_n_<supf><mode>)
28980 (mve_vsubq_m_n_<supf><mode>): Factorize into ...
28981 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
28982 (mve_vaddq_m_f<mode>, mve_vmulq_m_f<mode>, mve_vsubq_m_f<mode>):
28984 (@mve_<mve_insn>q_m_f<mode>): ... this.
28985 (mve_vaddq_m_n_f<mode>, mve_vmulq_m_n_f<mode>)
28986 (mve_vsubq_m_n_f<mode>): Factorize into ...
28987 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
28989 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
28991 * config/arm/arm-mve-builtins-functions.h (class
28992 unspec_based_mve_function_base): New.
28993 (class unspec_based_mve_function_exact_insn): New.
28995 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
28997 * config/arm/arm-mve-builtins-shapes.cc (binary_opt_n): New.
28998 * config/arm/arm-mve-builtins-shapes.h (binary_opt_n): New.
29000 2023-05-03 Murray Steele <murray.steele@arm.com>
29001 Christophe Lyon <christophe.lyon@arm.com>
29003 * config/arm/arm-mve-builtins-base.cc (class
29004 vuninitializedq_impl): New.
29005 * config/arm/arm-mve-builtins-base.def (vuninitializedq): New.
29006 * config/arm/arm-mve-builtins-base.h (vuninitializedq): New
29008 * config/arm/arm-mve-builtins-shapes.cc (inherent): New.
29009 * config/arm/arm-mve-builtins-shapes.h (inherent): New
29011 * config/arm/arm_mve_types.h (__arm_vuninitializedq): Move to ...
29012 * config/arm/arm_mve.h (__arm_vuninitializedq): ... here.
29013 (__arm_vuninitializedq_u8): Remove.
29014 (__arm_vuninitializedq_u16): Remove.
29015 (__arm_vuninitializedq_u32): Remove.
29016 (__arm_vuninitializedq_u64): Remove.
29017 (__arm_vuninitializedq_s8): Remove.
29018 (__arm_vuninitializedq_s16): Remove.
29019 (__arm_vuninitializedq_s32): Remove.
29020 (__arm_vuninitializedq_s64): Remove.
29021 (__arm_vuninitializedq_f16): Remove.
29022 (__arm_vuninitializedq_f32): Remove.
29024 2023-05-03 Murray Steele <murray.steele@arm.com>
29025 Christophe Lyon <christophe.lyon@arm.com>
29027 * config/arm/arm-mve-builtins-base.cc (vreinterpretq_impl): New class.
29028 * config/arm/arm-mve-builtins-base.def: Define vreinterpretq.
29029 * config/arm/arm-mve-builtins-base.h (vreinterpretq): New declaration.
29030 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type): New function.
29031 (parse_type): Likewise.
29032 (parse_signature): Likewise.
29033 (build_one): Likewise.
29034 (build_all): Likewise.
29035 (overloaded_base): New struct.
29036 (unary_convert_def): Likewise.
29037 * config/arm/arm-mve-builtins-shapes.h (unary_convert): Declare.
29038 * config/arm/arm-mve-builtins.cc (TYPES_reinterpret_signed1): New
29040 (TYPES_reinterpret_unsigned1): Likewise.
29041 (TYPES_reinterpret_integer): Likewise.
29042 (TYPES_reinterpret_integer1): Likewise.
29043 (TYPES_reinterpret_float1): Likewise.
29044 (TYPES_reinterpret_float): Likewise.
29045 (reinterpret_integer): New.
29046 (reinterpret_float): New.
29047 (handle_arm_mve_h): Register builtins.
29048 * config/arm/arm_mve.h (vreinterpretq_s16): Remove.
29049 (vreinterpretq_s32): Likewise.
29050 (vreinterpretq_s64): Likewise.
29051 (vreinterpretq_s8): Likewise.
29052 (vreinterpretq_u16): Likewise.
29053 (vreinterpretq_u32): Likewise.
29054 (vreinterpretq_u64): Likewise.
29055 (vreinterpretq_u8): Likewise.
29056 (vreinterpretq_f16): Likewise.
29057 (vreinterpretq_f32): Likewise.
29058 (vreinterpretq_s16_s32): Likewise.
29059 (vreinterpretq_s16_s64): Likewise.
29060 (vreinterpretq_s16_s8): Likewise.
29061 (vreinterpretq_s16_u16): Likewise.
29062 (vreinterpretq_s16_u32): Likewise.
29063 (vreinterpretq_s16_u64): Likewise.
29064 (vreinterpretq_s16_u8): Likewise.
29065 (vreinterpretq_s32_s16): Likewise.
29066 (vreinterpretq_s32_s64): Likewise.
29067 (vreinterpretq_s32_s8): Likewise.
29068 (vreinterpretq_s32_u16): Likewise.
29069 (vreinterpretq_s32_u32): Likewise.
29070 (vreinterpretq_s32_u64): Likewise.
29071 (vreinterpretq_s32_u8): Likewise.
29072 (vreinterpretq_s64_s16): Likewise.
29073 (vreinterpretq_s64_s32): Likewise.
29074 (vreinterpretq_s64_s8): Likewise.
29075 (vreinterpretq_s64_u16): Likewise.
29076 (vreinterpretq_s64_u32): Likewise.
29077 (vreinterpretq_s64_u64): Likewise.
29078 (vreinterpretq_s64_u8): Likewise.
29079 (vreinterpretq_s8_s16): Likewise.
29080 (vreinterpretq_s8_s32): Likewise.
29081 (vreinterpretq_s8_s64): Likewise.
29082 (vreinterpretq_s8_u16): Likewise.
29083 (vreinterpretq_s8_u32): Likewise.
29084 (vreinterpretq_s8_u64): Likewise.
29085 (vreinterpretq_s8_u8): Likewise.
29086 (vreinterpretq_u16_s16): Likewise.
29087 (vreinterpretq_u16_s32): Likewise.
29088 (vreinterpretq_u16_s64): Likewise.
29089 (vreinterpretq_u16_s8): Likewise.
29090 (vreinterpretq_u16_u32): Likewise.
29091 (vreinterpretq_u16_u64): Likewise.
29092 (vreinterpretq_u16_u8): Likewise.
29093 (vreinterpretq_u32_s16): Likewise.
29094 (vreinterpretq_u32_s32): Likewise.
29095 (vreinterpretq_u32_s64): Likewise.
29096 (vreinterpretq_u32_s8): Likewise.
29097 (vreinterpretq_u32_u16): Likewise.
29098 (vreinterpretq_u32_u64): Likewise.
29099 (vreinterpretq_u32_u8): Likewise.
29100 (vreinterpretq_u64_s16): Likewise.
29101 (vreinterpretq_u64_s32): Likewise.
29102 (vreinterpretq_u64_s64): Likewise.
29103 (vreinterpretq_u64_s8): Likewise.
29104 (vreinterpretq_u64_u16): Likewise.
29105 (vreinterpretq_u64_u32): Likewise.
29106 (vreinterpretq_u64_u8): Likewise.
29107 (vreinterpretq_u8_s16): Likewise.
29108 (vreinterpretq_u8_s32): Likewise.
29109 (vreinterpretq_u8_s64): Likewise.
29110 (vreinterpretq_u8_s8): Likewise.
29111 (vreinterpretq_u8_u16): Likewise.
29112 (vreinterpretq_u8_u32): Likewise.
29113 (vreinterpretq_u8_u64): Likewise.
29114 (vreinterpretq_s32_f16): Likewise.
29115 (vreinterpretq_s32_f32): Likewise.
29116 (vreinterpretq_u16_f16): Likewise.
29117 (vreinterpretq_u16_f32): Likewise.
29118 (vreinterpretq_u32_f16): Likewise.
29119 (vreinterpretq_u32_f32): Likewise.
29120 (vreinterpretq_u64_f16): Likewise.
29121 (vreinterpretq_u64_f32): Likewise.
29122 (vreinterpretq_u8_f16): Likewise.
29123 (vreinterpretq_u8_f32): Likewise.
29124 (vreinterpretq_f16_f32): Likewise.
29125 (vreinterpretq_f16_s16): Likewise.
29126 (vreinterpretq_f16_s32): Likewise.
29127 (vreinterpretq_f16_s64): Likewise.
29128 (vreinterpretq_f16_s8): Likewise.
29129 (vreinterpretq_f16_u16): Likewise.
29130 (vreinterpretq_f16_u32): Likewise.
29131 (vreinterpretq_f16_u64): Likewise.
29132 (vreinterpretq_f16_u8): Likewise.
29133 (vreinterpretq_f32_f16): Likewise.
29134 (vreinterpretq_f32_s16): Likewise.
29135 (vreinterpretq_f32_s32): Likewise.
29136 (vreinterpretq_f32_s64): Likewise.
29137 (vreinterpretq_f32_s8): Likewise.
29138 (vreinterpretq_f32_u16): Likewise.
29139 (vreinterpretq_f32_u32): Likewise.
29140 (vreinterpretq_f32_u64): Likewise.
29141 (vreinterpretq_f32_u8): Likewise.
29142 (vreinterpretq_s16_f16): Likewise.
29143 (vreinterpretq_s16_f32): Likewise.
29144 (vreinterpretq_s64_f16): Likewise.
29145 (vreinterpretq_s64_f32): Likewise.
29146 (vreinterpretq_s8_f16): Likewise.
29147 (vreinterpretq_s8_f32): Likewise.
29148 (__arm_vreinterpretq_f16): Likewise.
29149 (__arm_vreinterpretq_f32): Likewise.
29150 (__arm_vreinterpretq_s16): Likewise.
29151 (__arm_vreinterpretq_s32): Likewise.
29152 (__arm_vreinterpretq_s64): Likewise.
29153 (__arm_vreinterpretq_s8): Likewise.
29154 (__arm_vreinterpretq_u16): Likewise.
29155 (__arm_vreinterpretq_u32): Likewise.
29156 (__arm_vreinterpretq_u64): Likewise.
29157 (__arm_vreinterpretq_u8): Likewise.
29158 * config/arm/arm_mve_types.h (__arm_vreinterpretq_s16_s32): Remove.
29159 (__arm_vreinterpretq_s16_s64): Likewise.
29160 (__arm_vreinterpretq_s16_s8): Likewise.
29161 (__arm_vreinterpretq_s16_u16): Likewise.
29162 (__arm_vreinterpretq_s16_u32): Likewise.
29163 (__arm_vreinterpretq_s16_u64): Likewise.
29164 (__arm_vreinterpretq_s16_u8): Likewise.
29165 (__arm_vreinterpretq_s32_s16): Likewise.
29166 (__arm_vreinterpretq_s32_s64): Likewise.
29167 (__arm_vreinterpretq_s32_s8): Likewise.
29168 (__arm_vreinterpretq_s32_u16): Likewise.
29169 (__arm_vreinterpretq_s32_u32): Likewise.
29170 (__arm_vreinterpretq_s32_u64): Likewise.
29171 (__arm_vreinterpretq_s32_u8): Likewise.
29172 (__arm_vreinterpretq_s64_s16): Likewise.
29173 (__arm_vreinterpretq_s64_s32): Likewise.
29174 (__arm_vreinterpretq_s64_s8): Likewise.
29175 (__arm_vreinterpretq_s64_u16): Likewise.
29176 (__arm_vreinterpretq_s64_u32): Likewise.
29177 (__arm_vreinterpretq_s64_u64): Likewise.
29178 (__arm_vreinterpretq_s64_u8): Likewise.
29179 (__arm_vreinterpretq_s8_s16): Likewise.
29180 (__arm_vreinterpretq_s8_s32): Likewise.
29181 (__arm_vreinterpretq_s8_s64): Likewise.
29182 (__arm_vreinterpretq_s8_u16): Likewise.
29183 (__arm_vreinterpretq_s8_u32): Likewise.
29184 (__arm_vreinterpretq_s8_u64): Likewise.
29185 (__arm_vreinterpretq_s8_u8): Likewise.
29186 (__arm_vreinterpretq_u16_s16): Likewise.
29187 (__arm_vreinterpretq_u16_s32): Likewise.
29188 (__arm_vreinterpretq_u16_s64): Likewise.
29189 (__arm_vreinterpretq_u16_s8): Likewise.
29190 (__arm_vreinterpretq_u16_u32): Likewise.
29191 (__arm_vreinterpretq_u16_u64): Likewise.
29192 (__arm_vreinterpretq_u16_u8): Likewise.
29193 (__arm_vreinterpretq_u32_s16): Likewise.
29194 (__arm_vreinterpretq_u32_s32): Likewise.
29195 (__arm_vreinterpretq_u32_s64): Likewise.
29196 (__arm_vreinterpretq_u32_s8): Likewise.
29197 (__arm_vreinterpretq_u32_u16): Likewise.
29198 (__arm_vreinterpretq_u32_u64): Likewise.
29199 (__arm_vreinterpretq_u32_u8): Likewise.
29200 (__arm_vreinterpretq_u64_s16): Likewise.
29201 (__arm_vreinterpretq_u64_s32): Likewise.
29202 (__arm_vreinterpretq_u64_s64): Likewise.
29203 (__arm_vreinterpretq_u64_s8): Likewise.
29204 (__arm_vreinterpretq_u64_u16): Likewise.
29205 (__arm_vreinterpretq_u64_u32): Likewise.
29206 (__arm_vreinterpretq_u64_u8): Likewise.
29207 (__arm_vreinterpretq_u8_s16): Likewise.
29208 (__arm_vreinterpretq_u8_s32): Likewise.
29209 (__arm_vreinterpretq_u8_s64): Likewise.
29210 (__arm_vreinterpretq_u8_s8): Likewise.
29211 (__arm_vreinterpretq_u8_u16): Likewise.
29212 (__arm_vreinterpretq_u8_u32): Likewise.
29213 (__arm_vreinterpretq_u8_u64): Likewise.
29214 (__arm_vreinterpretq_s32_f16): Likewise.
29215 (__arm_vreinterpretq_s32_f32): Likewise.
29216 (__arm_vreinterpretq_s16_f16): Likewise.
29217 (__arm_vreinterpretq_s16_f32): Likewise.
29218 (__arm_vreinterpretq_s64_f16): Likewise.
29219 (__arm_vreinterpretq_s64_f32): Likewise.
29220 (__arm_vreinterpretq_s8_f16): Likewise.
29221 (__arm_vreinterpretq_s8_f32): Likewise.
29222 (__arm_vreinterpretq_u16_f16): Likewise.
29223 (__arm_vreinterpretq_u16_f32): Likewise.
29224 (__arm_vreinterpretq_u32_f16): Likewise.
29225 (__arm_vreinterpretq_u32_f32): Likewise.
29226 (__arm_vreinterpretq_u64_f16): Likewise.
29227 (__arm_vreinterpretq_u64_f32): Likewise.
29228 (__arm_vreinterpretq_u8_f16): Likewise.
29229 (__arm_vreinterpretq_u8_f32): Likewise.
29230 (__arm_vreinterpretq_f16_f32): Likewise.
29231 (__arm_vreinterpretq_f16_s16): Likewise.
29232 (__arm_vreinterpretq_f16_s32): Likewise.
29233 (__arm_vreinterpretq_f16_s64): Likewise.
29234 (__arm_vreinterpretq_f16_s8): Likewise.
29235 (__arm_vreinterpretq_f16_u16): Likewise.
29236 (__arm_vreinterpretq_f16_u32): Likewise.
29237 (__arm_vreinterpretq_f16_u64): Likewise.
29238 (__arm_vreinterpretq_f16_u8): Likewise.
29239 (__arm_vreinterpretq_f32_f16): Likewise.
29240 (__arm_vreinterpretq_f32_s16): Likewise.
29241 (__arm_vreinterpretq_f32_s32): Likewise.
29242 (__arm_vreinterpretq_f32_s64): Likewise.
29243 (__arm_vreinterpretq_f32_s8): Likewise.
29244 (__arm_vreinterpretq_f32_u16): Likewise.
29245 (__arm_vreinterpretq_f32_u32): Likewise.
29246 (__arm_vreinterpretq_f32_u64): Likewise.
29247 (__arm_vreinterpretq_f32_u8): Likewise.
29248 (__arm_vreinterpretq_s16): Likewise.
29249 (__arm_vreinterpretq_s32): Likewise.
29250 (__arm_vreinterpretq_s64): Likewise.
29251 (__arm_vreinterpretq_s8): Likewise.
29252 (__arm_vreinterpretq_u16): Likewise.
29253 (__arm_vreinterpretq_u32): Likewise.
29254 (__arm_vreinterpretq_u64): Likewise.
29255 (__arm_vreinterpretq_u8): Likewise.
29256 (__arm_vreinterpretq_f16): Likewise.
29257 (__arm_vreinterpretq_f32): Likewise.
29258 * config/arm/mve.md (@arm_mve_reinterpret<mode>): New pattern.
29259 * config/arm/unspecs.md: (REINTERPRET): New unspec.
29261 2023-05-03 Murray Steele <murray.steele@arm.com>
29262 Christophe Lyon <christophe.lyon@arm.com>
29263 Christophe Lyon <christophe.lyon@arm.com
29265 * config.gcc: Add arm-mve-builtins-base.o and
29266 arm-mve-builtins-shapes.o to extra_objs.
29267 * config/arm/arm-builtins.cc (arm_builtin_decl): Handle MVE builtin
29269 (arm_expand_builtin): Likewise
29270 (arm_check_builtin_call): Likewise
29271 (arm_describe_resolver): Likewise.
29272 * config/arm/arm-builtins.h (enum resolver_ident): Add
29274 * config/arm/arm-c.cc (arm_pragma_arm): Handle new pragma.
29275 (arm_resolve_overloaded_builtin): Handle MVE builtins.
29276 (arm_register_target_pragmas): Register arm_check_builtin_call.
29277 * config/arm/arm-mve-builtins.cc (class registered_function): New
29279 (struct registered_function_hasher): New struct.
29280 (pred_suffixes): New table.
29281 (mode_suffixes): New table.
29282 (type_suffix_info): New table.
29283 (TYPES_float16): New.
29284 (TYPES_all_float): New.
29285 (TYPES_integer_8): New.
29286 (TYPES_integer_8_16): New.
29287 (TYPES_integer_16_32): New.
29288 (TYPES_integer_32): New.
29289 (TYPES_signed_16_32): New.
29290 (TYPES_signed_32): New.
29291 (TYPES_all_signed): New.
29292 (TYPES_all_unsigned): New.
29293 (TYPES_all_integer): New.
29294 (TYPES_all_integer_with_64): New.
29295 (DEF_VECTOR_TYPE): New.
29296 (DEF_DOUBLE_TYPE): New.
29297 (DEF_MVE_TYPES_ARRAY): New.
29298 (all_integer): New.
29299 (all_integer_with_64): New.
29303 (all_unsigned): New.
29305 (integer_8_16): New.
29306 (integer_16_32): New.
29308 (signed_16_32): New.
29310 (register_vector_type): Use void_type_node for mve.fp-only types when
29311 mve.fp is not enabled.
29312 (register_builtin_tuple_types): Likewise.
29313 (handle_arm_mve_h): New function..
29314 (matches_type_p): Likewise..
29315 (report_out_of_range): Likewise.
29316 (report_not_enum): Likewise.
29317 (report_missing_float): Likewise.
29318 (report_non_ice): Likewise.
29319 (check_requires_float): Likewise.
29320 (function_instance::hash): Likewise
29321 (function_instance::call_properties): Likewise.
29322 (function_instance::reads_global_state_p): Likewise.
29323 (function_instance::modifies_global_state_p): Likewise.
29324 (function_instance::could_trap_p): Likewise.
29325 (function_instance::has_inactive_argument): Likewise.
29326 (registered_function_hasher::hash): Likewise.
29327 (registered_function_hasher::equal): Likewise.
29328 (function_builder::function_builder): Likewise.
29329 (function_builder::~function_builder): Likewise.
29330 (function_builder::append_name): Likewise.
29331 (function_builder::finish_name): Likewise.
29332 (function_builder::get_name): Likewise.
29333 (add_attribute): Likewise.
29334 (function_builder::get_attributes): Likewise.
29335 (function_builder::add_function): Likewise.
29336 (function_builder::add_unique_function): Likewise.
29337 (function_builder::add_overloaded_function): Likewise.
29338 (function_builder::add_overloaded_functions): Likewise.
29339 (function_builder::register_function_group): Likewise.
29340 (function_call_info::function_call_info): Likewise.
29341 (function_resolver::function_resolver): Likewise.
29342 (function_resolver::get_vector_type): Likewise.
29343 (function_resolver::get_scalar_type_name): Likewise.
29344 (function_resolver::get_argument_type): Likewise.
29345 (function_resolver::scalar_argument_p): Likewise.
29346 (function_resolver::report_no_such_form): Likewise.
29347 (function_resolver::lookup_form): Likewise.
29348 (function_resolver::resolve_to): Likewise.
29349 (function_resolver::infer_vector_or_tuple_type): Likewise.
29350 (function_resolver::infer_vector_type): Likewise.
29351 (function_resolver::require_vector_or_scalar_type): Likewise.
29352 (function_resolver::require_vector_type): Likewise.
29353 (function_resolver::require_matching_vector_type): Likewise.
29354 (function_resolver::require_derived_vector_type): Likewise.
29355 (function_resolver::require_derived_scalar_type): Likewise.
29356 (function_resolver::require_integer_immediate): Likewise.
29357 (function_resolver::require_scalar_type): Likewise.
29358 (function_resolver::check_num_arguments): Likewise.
29359 (function_resolver::check_gp_argument): Likewise.
29360 (function_resolver::finish_opt_n_resolution): Likewise.
29361 (function_resolver::resolve_unary): Likewise.
29362 (function_resolver::resolve_unary_n): Likewise.
29363 (function_resolver::resolve_uniform): Likewise.
29364 (function_resolver::resolve_uniform_opt_n): Likewise.
29365 (function_resolver::resolve): Likewise.
29366 (function_checker::function_checker): Likewise.
29367 (function_checker::argument_exists_p): Likewise.
29368 (function_checker::require_immediate): Likewise.
29369 (function_checker::require_immediate_enum): Likewise.
29370 (function_checker::require_immediate_range): Likewise.
29371 (function_checker::check): Likewise.
29372 (gimple_folder::gimple_folder): Likewise.
29373 (gimple_folder::fold): Likewise.
29374 (function_expander::function_expander): Likewise.
29375 (function_expander::direct_optab_handler): Likewise.
29376 (function_expander::get_fallback_value): Likewise.
29377 (function_expander::get_reg_target): Likewise.
29378 (function_expander::add_output_operand): Likewise.
29379 (function_expander::add_input_operand): Likewise.
29380 (function_expander::add_integer_operand): Likewise.
29381 (function_expander::generate_insn): Likewise.
29382 (function_expander::use_exact_insn): Likewise.
29383 (function_expander::use_unpred_insn): Likewise.
29384 (function_expander::use_pred_x_insn): Likewise.
29385 (function_expander::use_cond_insn): Likewise.
29386 (function_expander::map_to_rtx_codes): Likewise.
29387 (function_expander::expand): Likewise.
29388 (resolve_overloaded_builtin): Likewise.
29389 (check_builtin_call): Likewise.
29390 (gimple_fold_builtin): Likewise.
29391 (expand_builtin): Likewise.
29392 (gt_ggc_mx): Likewise.
29393 (gt_pch_nx): Likewise.
29394 (gt_pch_nx): Likewise.
29395 * config/arm/arm-mve-builtins.def(s8): Define new type suffix.
29406 (offset): New mode.
29407 * config/arm/arm-mve-builtins.h (MAX_TUPLE_SIZE): New constant.
29408 (CP_READ_FPCR): Likewise.
29409 (CP_RAISE_FP_EXCEPTIONS): Likewise.
29410 (CP_READ_MEMORY): Likewise.
29411 (CP_WRITE_MEMORY): Likewise.
29412 (enum units_index): New enum.
29413 (enum predication_index): New.
29414 (enum type_class_index): New.
29415 (enum mode_suffix_index): New enum.
29416 (enum type_suffix_index): New.
29417 (struct mode_suffix_info): New struct.
29418 (struct type_suffix_info): New.
29419 (struct function_group_info): Likewise.
29420 (class function_instance): Likewise.
29421 (class registered_function): Likewise.
29422 (class function_builder): Likewise.
29423 (class function_call_info): Likewise.
29424 (class function_resolver): Likewise.
29425 (class function_checker): Likewise.
29426 (class gimple_folder): Likewise.
29427 (class function_expander): Likewise.
29428 (get_mve_pred16_t): Likewise.
29429 (find_mode_suffix): New function.
29430 (class function_base): Likewise.
29431 (class function_shape): Likewise.
29432 (function_instance::operator==): New function.
29433 (function_instance::operator!=): Likewise.
29434 (function_instance::vectors_per_tuple): Likewise.
29435 (function_instance::mode_suffix): Likewise.
29436 (function_instance::type_suffix): Likewise.
29437 (function_instance::scalar_type): Likewise.
29438 (function_instance::vector_type): Likewise.
29439 (function_instance::tuple_type): Likewise.
29440 (function_instance::vector_mode): Likewise.
29441 (function_call_info::function_returns_void_p): Likewise.
29442 (function_base::call_properties): Likewise.
29443 * config/arm/arm-protos.h (enum arm_builtin_class): Add
29445 (handle_arm_mve_h): New.
29446 (resolve_overloaded_builtin): New.
29447 (check_builtin_call): New.
29448 (gimple_fold_builtin): New.
29449 (expand_builtin): New.
29450 * config/arm/arm.cc (TARGET_GIMPLE_FOLD_BUILTIN): Define as
29451 arm_gimple_fold_builtin.
29452 (arm_gimple_fold_builtin): New function.
29453 * config/arm/arm_mve.h: Use new arm_mve.h pragma.
29454 * config/arm/predicates.md (arm_any_register_operand): New predicate.
29455 * config/arm/t-arm: (arm-mve-builtins.o): Add includes.
29456 (arm-mve-builtins-shapes.o): New target.
29457 (arm-mve-builtins-base.o): New target.
29458 * config/arm/arm-mve-builtins-base.cc: New file.
29459 * config/arm/arm-mve-builtins-base.def: New file.
29460 * config/arm/arm-mve-builtins-base.h: New file.
29461 * config/arm/arm-mve-builtins-functions.h: New file.
29462 * config/arm/arm-mve-builtins-shapes.cc: New file.
29463 * config/arm/arm-mve-builtins-shapes.h: New file.
29465 2023-05-03 Murray Steele <murray.steele@arm.com>
29466 Christophe Lyon <christophe.lyon@arm.com>
29467 Christophe Lyon <christophe.lyon@arm.com>
29469 * config/arm/arm-builtins.cc (arm_general_add_builtin_function):
29471 (arm_init_builtin): Use arm_general_add_builtin_function instead
29472 of arm_add_builtin_function.
29473 (arm_init_acle_builtins): Likewise.
29474 (arm_init_mve_builtins): Likewise.
29475 (arm_init_crypto_builtins): Likewise.
29476 (arm_init_builtins): Likewise.
29477 (arm_general_builtin_decl): New function.
29478 (arm_builtin_decl): Defer to numberspace-specialized functions.
29479 (arm_expand_builtin_args): Rename into arm_general_expand_builtin_args.
29480 (arm_expand_builtin_1): Rename into arm_general_expand_builtin_1 and ...
29481 (arm_general_expand_builtin_1): ... specialize for general builtins.
29482 (arm_expand_acle_builtin): Use arm_general_expand_builtin
29483 instead of arm_expand_builtin.
29484 (arm_expand_mve_builtin): Likewise.
29485 (arm_expand_neon_builtin): Likewise.
29486 (arm_expand_vfp_builtin): Likewise.
29487 (arm_general_expand_builtin): New function.
29488 (arm_expand_builtin): Specialize for general builtins.
29489 (arm_general_check_builtin_call): New function.
29490 (arm_check_builtin_call): Specialize for general builtins.
29491 (arm_describe_resolver): Validate numberspace.
29492 (arm_cde_end_args): Likewise.
29493 * config/arm/arm-protos.h (enum arm_builtin_class): New enum.
29494 (ARM_BUILTIN_SHIFT, ARM_BUILTIN_CLASS): New constants.
29496 2023-05-03 Martin Liska <mliska@suse.cz>
29499 * config/riscv/sync.md: Add gcc_unreachable to a switch.
29501 2023-05-03 Richard Biener <rguenther@suse.de>
29503 * tree-ssa-loop-split.cc (split_at_bb_p): Avoid last_stmt.
29504 (patch_loop_exit): Likewise.
29505 (connect_loops): Likewise.
29506 (split_loop): Likewise.
29507 (control_dep_semi_invariant_p): Likewise.
29508 (do_split_loop_on_cond): Likewise.
29509 (split_loop_on_cond): Likewise.
29510 * tree-ssa-loop-unswitch.cc (find_unswitching_predicates_for_bb):
29512 (simplify_loop_version): Likewise.
29513 (evaluate_bbs): Likewise.
29514 (find_loop_guard): Likewise.
29515 (clean_up_after_unswitching): Likewise.
29516 * tree-ssa-math-opts.cc (maybe_optimize_guarding_check):
29518 (optimize_spaceship): Take a gcond * argument, avoid
29520 (math_opts_dom_walker::after_dom_children): Adjust call to
29521 optimize_spaceship.
29522 * tree-vrp.cc (maybe_set_nonzero_bits): Avoid last_stmt.
29523 * value-pointer-equiv.cc (pointer_equiv_analyzer::visit_edge):
29526 2023-05-03 Andreas Schwab <schwab@suse.de>
29528 * config/riscv/linux.h (LIB_SPEC): Don't redefine.
29530 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29532 * config/riscv/riscv-vector-builtins-bases.cc (fold_fault_load):
29534 (class vlseg): New class.
29535 (class vsseg): Ditto.
29536 (class vlsseg): Ditto.
29537 (class vssseg): Ditto.
29538 (class seg_indexed_load): Ditto.
29539 (class seg_indexed_store): Ditto.
29540 (class vlsegff): Ditto.
29542 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
29543 * config/riscv/riscv-vector-builtins-functions.def (vlseg):
29553 * config/riscv/riscv-vector-builtins-shapes.cc (struct
29554 seg_loadstore_def): Ditto.
29555 (struct seg_indexed_loadstore_def): Ditto.
29556 (struct seg_fault_load_def): Ditto.
29558 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
29559 * config/riscv/riscv-vector-builtins.cc
29560 (function_builder::append_nf): New function.
29561 * config/riscv/riscv-vector-builtins.def (vfloat32m1x2_t):
29562 Change ptr from double into float.
29563 (vfloat32m1x3_t): Ditto.
29564 (vfloat32m1x4_t): Ditto.
29565 (vfloat32m1x5_t): Ditto.
29566 (vfloat32m1x6_t): Ditto.
29567 (vfloat32m1x7_t): Ditto.
29568 (vfloat32m1x8_t): Ditto.
29569 (vfloat32m2x2_t): Ditto.
29570 (vfloat32m2x3_t): Ditto.
29571 (vfloat32m2x4_t): Ditto.
29572 (vfloat32m4x2_t): Ditto.
29573 * config/riscv/riscv-vector-builtins.h: Add segment intrinsics.
29574 * config/riscv/riscv-vsetvl.cc (fault_first_load_p): Adapt for
29576 * config/riscv/riscv.md: Add segment instructions.
29577 * config/riscv/vector-iterators.md: Support segment intrinsics.
29578 * config/riscv/vector.md (@pred_unit_strided_load<mode>): New
29580 (@pred_unit_strided_store<mode>): Ditto.
29581 (@pred_strided_load<mode>): Ditto.
29582 (@pred_strided_store<mode>): Ditto.
29583 (@pred_fault_load<mode>): Ditto.
29584 (@pred_indexed_<order>load<V1T:mode><V1I:mode>): Ditto.
29585 (@pred_indexed_<order>load<V2T:mode><V2I:mode>): Ditto.
29586 (@pred_indexed_<order>load<V4T:mode><V4I:mode>): Ditto.
29587 (@pred_indexed_<order>load<V8T:mode><V8I:mode>): Ditto.
29588 (@pred_indexed_<order>load<V16T:mode><V16I:mode>): Ditto.
29589 (@pred_indexed_<order>load<V32T:mode><V32I:mode>): Ditto.
29590 (@pred_indexed_<order>load<V64T:mode><V64I:mode>): Ditto.
29591 (@pred_indexed_<order>store<V1T:mode><V1I:mode>): Ditto.
29592 (@pred_indexed_<order>store<V2T:mode><V2I:mode>): Ditto.
29593 (@pred_indexed_<order>store<V4T:mode><V4I:mode>): Ditto.
29594 (@pred_indexed_<order>store<V8T:mode><V8I:mode>): Ditto.
29595 (@pred_indexed_<order>store<V16T:mode><V16I:mode>): Ditto.
29596 (@pred_indexed_<order>store<V32T:mode><V32I:mode>): Ditto.
29597 (@pred_indexed_<order>store<V64T:mode><V64I:mode>): Ditto.
29599 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29601 * config/riscv/genrvv-type-indexer.cc (valid_type): Adapt for
29602 tuple type support.
29604 (floattype): Ditto.
29606 * config/riscv/riscv-vector-builtins-bases.cc: Ditto.
29607 * config/riscv/riscv-vector-builtins-functions.def (vset): Add
29609 (vget): Add tuple type vget.
29610 * config/riscv/riscv-vector-builtins-types.def
29611 (DEF_RVV_TUPLE_OPS): New macro.
29612 (vint8mf8x2_t): Ditto.
29613 (vuint8mf8x2_t): Ditto.
29614 (vint8mf8x3_t): Ditto.
29615 (vuint8mf8x3_t): Ditto.
29616 (vint8mf8x4_t): Ditto.
29617 (vuint8mf8x4_t): Ditto.
29618 (vint8mf8x5_t): Ditto.
29619 (vuint8mf8x5_t): Ditto.
29620 (vint8mf8x6_t): Ditto.
29621 (vuint8mf8x6_t): Ditto.
29622 (vint8mf8x7_t): Ditto.
29623 (vuint8mf8x7_t): Ditto.
29624 (vint8mf8x8_t): Ditto.
29625 (vuint8mf8x8_t): Ditto.
29626 (vint8mf4x2_t): Ditto.
29627 (vuint8mf4x2_t): Ditto.
29628 (vint8mf4x3_t): Ditto.
29629 (vuint8mf4x3_t): Ditto.
29630 (vint8mf4x4_t): Ditto.
29631 (vuint8mf4x4_t): Ditto.
29632 (vint8mf4x5_t): Ditto.
29633 (vuint8mf4x5_t): Ditto.
29634 (vint8mf4x6_t): Ditto.
29635 (vuint8mf4x6_t): Ditto.
29636 (vint8mf4x7_t): Ditto.
29637 (vuint8mf4x7_t): Ditto.
29638 (vint8mf4x8_t): Ditto.
29639 (vuint8mf4x8_t): Ditto.
29640 (vint8mf2x2_t): Ditto.
29641 (vuint8mf2x2_t): Ditto.
29642 (vint8mf2x3_t): Ditto.
29643 (vuint8mf2x3_t): Ditto.
29644 (vint8mf2x4_t): Ditto.
29645 (vuint8mf2x4_t): Ditto.
29646 (vint8mf2x5_t): Ditto.
29647 (vuint8mf2x5_t): Ditto.
29648 (vint8mf2x6_t): Ditto.
29649 (vuint8mf2x6_t): Ditto.
29650 (vint8mf2x7_t): Ditto.
29651 (vuint8mf2x7_t): Ditto.
29652 (vint8mf2x8_t): Ditto.
29653 (vuint8mf2x8_t): Ditto.
29654 (vint8m1x2_t): Ditto.
29655 (vuint8m1x2_t): Ditto.
29656 (vint8m1x3_t): Ditto.
29657 (vuint8m1x3_t): Ditto.
29658 (vint8m1x4_t): Ditto.
29659 (vuint8m1x4_t): Ditto.
29660 (vint8m1x5_t): Ditto.
29661 (vuint8m1x5_t): Ditto.
29662 (vint8m1x6_t): Ditto.
29663 (vuint8m1x6_t): Ditto.
29664 (vint8m1x7_t): Ditto.
29665 (vuint8m1x7_t): Ditto.
29666 (vint8m1x8_t): Ditto.
29667 (vuint8m1x8_t): Ditto.
29668 (vint8m2x2_t): Ditto.
29669 (vuint8m2x2_t): Ditto.
29670 (vint8m2x3_t): Ditto.
29671 (vuint8m2x3_t): Ditto.
29672 (vint8m2x4_t): Ditto.
29673 (vuint8m2x4_t): Ditto.
29674 (vint8m4x2_t): Ditto.
29675 (vuint8m4x2_t): Ditto.
29676 (vint16mf4x2_t): Ditto.
29677 (vuint16mf4x2_t): Ditto.
29678 (vint16mf4x3_t): Ditto.
29679 (vuint16mf4x3_t): Ditto.
29680 (vint16mf4x4_t): Ditto.
29681 (vuint16mf4x4_t): Ditto.
29682 (vint16mf4x5_t): Ditto.
29683 (vuint16mf4x5_t): Ditto.
29684 (vint16mf4x6_t): Ditto.
29685 (vuint16mf4x6_t): Ditto.
29686 (vint16mf4x7_t): Ditto.
29687 (vuint16mf4x7_t): Ditto.
29688 (vint16mf4x8_t): Ditto.
29689 (vuint16mf4x8_t): Ditto.
29690 (vint16mf2x2_t): Ditto.
29691 (vuint16mf2x2_t): Ditto.
29692 (vint16mf2x3_t): Ditto.
29693 (vuint16mf2x3_t): Ditto.
29694 (vint16mf2x4_t): Ditto.
29695 (vuint16mf2x4_t): Ditto.
29696 (vint16mf2x5_t): Ditto.
29697 (vuint16mf2x5_t): Ditto.
29698 (vint16mf2x6_t): Ditto.
29699 (vuint16mf2x6_t): Ditto.
29700 (vint16mf2x7_t): Ditto.
29701 (vuint16mf2x7_t): Ditto.
29702 (vint16mf2x8_t): Ditto.
29703 (vuint16mf2x8_t): Ditto.
29704 (vint16m1x2_t): Ditto.
29705 (vuint16m1x2_t): Ditto.
29706 (vint16m1x3_t): Ditto.
29707 (vuint16m1x3_t): Ditto.
29708 (vint16m1x4_t): Ditto.
29709 (vuint16m1x4_t): Ditto.
29710 (vint16m1x5_t): Ditto.
29711 (vuint16m1x5_t): Ditto.
29712 (vint16m1x6_t): Ditto.
29713 (vuint16m1x6_t): Ditto.
29714 (vint16m1x7_t): Ditto.
29715 (vuint16m1x7_t): Ditto.
29716 (vint16m1x8_t): Ditto.
29717 (vuint16m1x8_t): Ditto.
29718 (vint16m2x2_t): Ditto.
29719 (vuint16m2x2_t): Ditto.
29720 (vint16m2x3_t): Ditto.
29721 (vuint16m2x3_t): Ditto.
29722 (vint16m2x4_t): Ditto.
29723 (vuint16m2x4_t): Ditto.
29724 (vint16m4x2_t): Ditto.
29725 (vuint16m4x2_t): Ditto.
29726 (vint32mf2x2_t): Ditto.
29727 (vuint32mf2x2_t): Ditto.
29728 (vint32mf2x3_t): Ditto.
29729 (vuint32mf2x3_t): Ditto.
29730 (vint32mf2x4_t): Ditto.
29731 (vuint32mf2x4_t): Ditto.
29732 (vint32mf2x5_t): Ditto.
29733 (vuint32mf2x5_t): Ditto.
29734 (vint32mf2x6_t): Ditto.
29735 (vuint32mf2x6_t): Ditto.
29736 (vint32mf2x7_t): Ditto.
29737 (vuint32mf2x7_t): Ditto.
29738 (vint32mf2x8_t): Ditto.
29739 (vuint32mf2x8_t): Ditto.
29740 (vint32m1x2_t): Ditto.
29741 (vuint32m1x2_t): Ditto.
29742 (vint32m1x3_t): Ditto.
29743 (vuint32m1x3_t): Ditto.
29744 (vint32m1x4_t): Ditto.
29745 (vuint32m1x4_t): Ditto.
29746 (vint32m1x5_t): Ditto.
29747 (vuint32m1x5_t): Ditto.
29748 (vint32m1x6_t): Ditto.
29749 (vuint32m1x6_t): Ditto.
29750 (vint32m1x7_t): Ditto.
29751 (vuint32m1x7_t): Ditto.
29752 (vint32m1x8_t): Ditto.
29753 (vuint32m1x8_t): Ditto.
29754 (vint32m2x2_t): Ditto.
29755 (vuint32m2x2_t): Ditto.
29756 (vint32m2x3_t): Ditto.
29757 (vuint32m2x3_t): Ditto.
29758 (vint32m2x4_t): Ditto.
29759 (vuint32m2x4_t): Ditto.
29760 (vint32m4x2_t): Ditto.
29761 (vuint32m4x2_t): Ditto.
29762 (vint64m1x2_t): Ditto.
29763 (vuint64m1x2_t): Ditto.
29764 (vint64m1x3_t): Ditto.
29765 (vuint64m1x3_t): Ditto.
29766 (vint64m1x4_t): Ditto.
29767 (vuint64m1x4_t): Ditto.
29768 (vint64m1x5_t): Ditto.
29769 (vuint64m1x5_t): Ditto.
29770 (vint64m1x6_t): Ditto.
29771 (vuint64m1x6_t): Ditto.
29772 (vint64m1x7_t): Ditto.
29773 (vuint64m1x7_t): Ditto.
29774 (vint64m1x8_t): Ditto.
29775 (vuint64m1x8_t): Ditto.
29776 (vint64m2x2_t): Ditto.
29777 (vuint64m2x2_t): Ditto.
29778 (vint64m2x3_t): Ditto.
29779 (vuint64m2x3_t): Ditto.
29780 (vint64m2x4_t): Ditto.
29781 (vuint64m2x4_t): Ditto.
29782 (vint64m4x2_t): Ditto.
29783 (vuint64m4x2_t): Ditto.
29784 (vfloat32mf2x2_t): Ditto.
29785 (vfloat32mf2x3_t): Ditto.
29786 (vfloat32mf2x4_t): Ditto.
29787 (vfloat32mf2x5_t): Ditto.
29788 (vfloat32mf2x6_t): Ditto.
29789 (vfloat32mf2x7_t): Ditto.
29790 (vfloat32mf2x8_t): Ditto.
29791 (vfloat32m1x2_t): Ditto.
29792 (vfloat32m1x3_t): Ditto.
29793 (vfloat32m1x4_t): Ditto.
29794 (vfloat32m1x5_t): Ditto.
29795 (vfloat32m1x6_t): Ditto.
29796 (vfloat32m1x7_t): Ditto.
29797 (vfloat32m1x8_t): Ditto.
29798 (vfloat32m2x2_t): Ditto.
29799 (vfloat32m2x3_t): Ditto.
29800 (vfloat32m2x4_t): Ditto.
29801 (vfloat32m4x2_t): Ditto.
29802 (vfloat64m1x2_t): Ditto.
29803 (vfloat64m1x3_t): Ditto.
29804 (vfloat64m1x4_t): Ditto.
29805 (vfloat64m1x5_t): Ditto.
29806 (vfloat64m1x6_t): Ditto.
29807 (vfloat64m1x7_t): Ditto.
29808 (vfloat64m1x8_t): Ditto.
29809 (vfloat64m2x2_t): Ditto.
29810 (vfloat64m2x3_t): Ditto.
29811 (vfloat64m2x4_t): Ditto.
29812 (vfloat64m4x2_t): Ditto.
29813 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TUPLE_OPS):
29815 (DEF_RVV_TYPE_INDEX): Ditto.
29816 (rvv_arg_type_info::get_tuple_subpart_type): New function.
29817 (DEF_RVV_TUPLE_TYPE): New macro.
29818 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE_INDEX):
29819 Adapt for tuple vget/vset support.
29820 (vint8mf4_t): Ditto.
29821 (vuint8mf4_t): Ditto.
29822 (vint8mf2_t): Ditto.
29823 (vuint8mf2_t): Ditto.
29824 (vint8m1_t): Ditto.
29825 (vuint8m1_t): Ditto.
29826 (vint8m2_t): Ditto.
29827 (vuint8m2_t): Ditto.
29828 (vint8m4_t): Ditto.
29829 (vuint8m4_t): Ditto.
29830 (vint8m8_t): Ditto.
29831 (vuint8m8_t): Ditto.
29832 (vint16mf4_t): Ditto.
29833 (vuint16mf4_t): Ditto.
29834 (vint16mf2_t): Ditto.
29835 (vuint16mf2_t): Ditto.
29836 (vint16m1_t): Ditto.
29837 (vuint16m1_t): Ditto.
29838 (vint16m2_t): Ditto.
29839 (vuint16m2_t): Ditto.
29840 (vint16m4_t): Ditto.
29841 (vuint16m4_t): Ditto.
29842 (vint16m8_t): Ditto.
29843 (vuint16m8_t): Ditto.
29844 (vint32mf2_t): Ditto.
29845 (vuint32mf2_t): Ditto.
29846 (vint32m1_t): Ditto.
29847 (vuint32m1_t): Ditto.
29848 (vint32m2_t): Ditto.
29849 (vuint32m2_t): Ditto.
29850 (vint32m4_t): Ditto.
29851 (vuint32m4_t): Ditto.
29852 (vint32m8_t): Ditto.
29853 (vuint32m8_t): Ditto.
29854 (vint64m1_t): Ditto.
29855 (vuint64m1_t): Ditto.
29856 (vint64m2_t): Ditto.
29857 (vuint64m2_t): Ditto.
29858 (vint64m4_t): Ditto.
29859 (vuint64m4_t): Ditto.
29860 (vint64m8_t): Ditto.
29861 (vuint64m8_t): Ditto.
29862 (vfloat32mf2_t): Ditto.
29863 (vfloat32m1_t): Ditto.
29864 (vfloat32m2_t): Ditto.
29865 (vfloat32m4_t): Ditto.
29866 (vfloat32m8_t): Ditto.
29867 (vfloat64m1_t): Ditto.
29868 (vfloat64m2_t): Ditto.
29869 (vfloat64m4_t): Ditto.
29870 (vfloat64m8_t): Ditto.
29871 (tuple_subpart): Add tuple subpart base type.
29872 * config/riscv/riscv-vector-builtins.h (struct
29873 rvv_arg_type_info): Ditto.
29874 (tuple_type_field): New function.
29876 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29878 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
29879 (RVV_TUPLE_PARTIAL_MODES): Ditto.
29880 * config/riscv/riscv-protos.h (riscv_v_ext_tuple_mode_p): New
29883 (get_subpart_mode): Ditto.
29884 (get_tuple_mode): Ditto.
29885 (expand_tuple_move): Ditto.
29886 * config/riscv/riscv-v.cc (ENTRY): New macro.
29887 (TUPLE_ENTRY): Ditto.
29888 (get_nf): New function.
29889 (get_subpart_mode): Ditto.
29890 (get_tuple_mode): Ditto.
29891 (expand_tuple_move): Ditto.
29892 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TUPLE_TYPE):
29894 (register_tuple_type): New function
29895 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TUPLE_TYPE):
29897 (vint8mf8x2_t): New macro.
29898 (vuint8mf8x2_t): Ditto.
29899 (vint8mf8x3_t): Ditto.
29900 (vuint8mf8x3_t): Ditto.
29901 (vint8mf8x4_t): Ditto.
29902 (vuint8mf8x4_t): Ditto.
29903 (vint8mf8x5_t): Ditto.
29904 (vuint8mf8x5_t): Ditto.
29905 (vint8mf8x6_t): Ditto.
29906 (vuint8mf8x6_t): Ditto.
29907 (vint8mf8x7_t): Ditto.
29908 (vuint8mf8x7_t): Ditto.
29909 (vint8mf8x8_t): Ditto.
29910 (vuint8mf8x8_t): Ditto.
29911 (vint8mf4x2_t): Ditto.
29912 (vuint8mf4x2_t): Ditto.
29913 (vint8mf4x3_t): Ditto.
29914 (vuint8mf4x3_t): Ditto.
29915 (vint8mf4x4_t): Ditto.
29916 (vuint8mf4x4_t): Ditto.
29917 (vint8mf4x5_t): Ditto.
29918 (vuint8mf4x5_t): Ditto.
29919 (vint8mf4x6_t): Ditto.
29920 (vuint8mf4x6_t): Ditto.
29921 (vint8mf4x7_t): Ditto.
29922 (vuint8mf4x7_t): Ditto.
29923 (vint8mf4x8_t): Ditto.
29924 (vuint8mf4x8_t): Ditto.
29925 (vint8mf2x2_t): Ditto.
29926 (vuint8mf2x2_t): Ditto.
29927 (vint8mf2x3_t): Ditto.
29928 (vuint8mf2x3_t): Ditto.
29929 (vint8mf2x4_t): Ditto.
29930 (vuint8mf2x4_t): Ditto.
29931 (vint8mf2x5_t): Ditto.
29932 (vuint8mf2x5_t): Ditto.
29933 (vint8mf2x6_t): Ditto.
29934 (vuint8mf2x6_t): Ditto.
29935 (vint8mf2x7_t): Ditto.
29936 (vuint8mf2x7_t): Ditto.
29937 (vint8mf2x8_t): Ditto.
29938 (vuint8mf2x8_t): Ditto.
29939 (vint8m1x2_t): Ditto.
29940 (vuint8m1x2_t): Ditto.
29941 (vint8m1x3_t): Ditto.
29942 (vuint8m1x3_t): Ditto.
29943 (vint8m1x4_t): Ditto.
29944 (vuint8m1x4_t): Ditto.
29945 (vint8m1x5_t): Ditto.
29946 (vuint8m1x5_t): Ditto.
29947 (vint8m1x6_t): Ditto.
29948 (vuint8m1x6_t): Ditto.
29949 (vint8m1x7_t): Ditto.
29950 (vuint8m1x7_t): Ditto.
29951 (vint8m1x8_t): Ditto.
29952 (vuint8m1x8_t): Ditto.
29953 (vint8m2x2_t): Ditto.
29954 (vuint8m2x2_t): Ditto.
29955 (vint8m2x3_t): Ditto.
29956 (vuint8m2x3_t): Ditto.
29957 (vint8m2x4_t): Ditto.
29958 (vuint8m2x4_t): Ditto.
29959 (vint8m4x2_t): Ditto.
29960 (vuint8m4x2_t): Ditto.
29961 (vint16mf4x2_t): Ditto.
29962 (vuint16mf4x2_t): Ditto.
29963 (vint16mf4x3_t): Ditto.
29964 (vuint16mf4x3_t): Ditto.
29965 (vint16mf4x4_t): Ditto.
29966 (vuint16mf4x4_t): Ditto.
29967 (vint16mf4x5_t): Ditto.
29968 (vuint16mf4x5_t): Ditto.
29969 (vint16mf4x6_t): Ditto.
29970 (vuint16mf4x6_t): Ditto.
29971 (vint16mf4x7_t): Ditto.
29972 (vuint16mf4x7_t): Ditto.
29973 (vint16mf4x8_t): Ditto.
29974 (vuint16mf4x8_t): Ditto.
29975 (vint16mf2x2_t): Ditto.
29976 (vuint16mf2x2_t): Ditto.
29977 (vint16mf2x3_t): Ditto.
29978 (vuint16mf2x3_t): Ditto.
29979 (vint16mf2x4_t): Ditto.
29980 (vuint16mf2x4_t): Ditto.
29981 (vint16mf2x5_t): Ditto.
29982 (vuint16mf2x5_t): Ditto.
29983 (vint16mf2x6_t): Ditto.
29984 (vuint16mf2x6_t): Ditto.
29985 (vint16mf2x7_t): Ditto.
29986 (vuint16mf2x7_t): Ditto.
29987 (vint16mf2x8_t): Ditto.
29988 (vuint16mf2x8_t): Ditto.
29989 (vint16m1x2_t): Ditto.
29990 (vuint16m1x2_t): Ditto.
29991 (vint16m1x3_t): Ditto.
29992 (vuint16m1x3_t): Ditto.
29993 (vint16m1x4_t): Ditto.
29994 (vuint16m1x4_t): Ditto.
29995 (vint16m1x5_t): Ditto.
29996 (vuint16m1x5_t): Ditto.
29997 (vint16m1x6_t): Ditto.
29998 (vuint16m1x6_t): Ditto.
29999 (vint16m1x7_t): Ditto.
30000 (vuint16m1x7_t): Ditto.
30001 (vint16m1x8_t): Ditto.
30002 (vuint16m1x8_t): Ditto.
30003 (vint16m2x2_t): Ditto.
30004 (vuint16m2x2_t): Ditto.
30005 (vint16m2x3_t): Ditto.
30006 (vuint16m2x3_t): Ditto.
30007 (vint16m2x4_t): Ditto.
30008 (vuint16m2x4_t): Ditto.
30009 (vint16m4x2_t): Ditto.
30010 (vuint16m4x2_t): Ditto.
30011 (vint32mf2x2_t): Ditto.
30012 (vuint32mf2x2_t): Ditto.
30013 (vint32mf2x3_t): Ditto.
30014 (vuint32mf2x3_t): Ditto.
30015 (vint32mf2x4_t): Ditto.
30016 (vuint32mf2x4_t): Ditto.
30017 (vint32mf2x5_t): Ditto.
30018 (vuint32mf2x5_t): Ditto.
30019 (vint32mf2x6_t): Ditto.
30020 (vuint32mf2x6_t): Ditto.
30021 (vint32mf2x7_t): Ditto.
30022 (vuint32mf2x7_t): Ditto.
30023 (vint32mf2x8_t): Ditto.
30024 (vuint32mf2x8_t): Ditto.
30025 (vint32m1x2_t): Ditto.
30026 (vuint32m1x2_t): Ditto.
30027 (vint32m1x3_t): Ditto.
30028 (vuint32m1x3_t): Ditto.
30029 (vint32m1x4_t): Ditto.
30030 (vuint32m1x4_t): Ditto.
30031 (vint32m1x5_t): Ditto.
30032 (vuint32m1x5_t): Ditto.
30033 (vint32m1x6_t): Ditto.
30034 (vuint32m1x6_t): Ditto.
30035 (vint32m1x7_t): Ditto.
30036 (vuint32m1x7_t): Ditto.
30037 (vint32m1x8_t): Ditto.
30038 (vuint32m1x8_t): Ditto.
30039 (vint32m2x2_t): Ditto.
30040 (vuint32m2x2_t): Ditto.
30041 (vint32m2x3_t): Ditto.
30042 (vuint32m2x3_t): Ditto.
30043 (vint32m2x4_t): Ditto.
30044 (vuint32m2x4_t): Ditto.
30045 (vint32m4x2_t): Ditto.
30046 (vuint32m4x2_t): Ditto.
30047 (vint64m1x2_t): Ditto.
30048 (vuint64m1x2_t): Ditto.
30049 (vint64m1x3_t): Ditto.
30050 (vuint64m1x3_t): Ditto.
30051 (vint64m1x4_t): Ditto.
30052 (vuint64m1x4_t): Ditto.
30053 (vint64m1x5_t): Ditto.
30054 (vuint64m1x5_t): Ditto.
30055 (vint64m1x6_t): Ditto.
30056 (vuint64m1x6_t): Ditto.
30057 (vint64m1x7_t): Ditto.
30058 (vuint64m1x7_t): Ditto.
30059 (vint64m1x8_t): Ditto.
30060 (vuint64m1x8_t): Ditto.
30061 (vint64m2x2_t): Ditto.
30062 (vuint64m2x2_t): Ditto.
30063 (vint64m2x3_t): Ditto.
30064 (vuint64m2x3_t): Ditto.
30065 (vint64m2x4_t): Ditto.
30066 (vuint64m2x4_t): Ditto.
30067 (vint64m4x2_t): Ditto.
30068 (vuint64m4x2_t): Ditto.
30069 (vfloat32mf2x2_t): Ditto.
30070 (vfloat32mf2x3_t): Ditto.
30071 (vfloat32mf2x4_t): Ditto.
30072 (vfloat32mf2x5_t): Ditto.
30073 (vfloat32mf2x6_t): Ditto.
30074 (vfloat32mf2x7_t): Ditto.
30075 (vfloat32mf2x8_t): Ditto.
30076 (vfloat32m1x2_t): Ditto.
30077 (vfloat32m1x3_t): Ditto.
30078 (vfloat32m1x4_t): Ditto.
30079 (vfloat32m1x5_t): Ditto.
30080 (vfloat32m1x6_t): Ditto.
30081 (vfloat32m1x7_t): Ditto.
30082 (vfloat32m1x8_t): Ditto.
30083 (vfloat32m2x2_t): Ditto.
30084 (vfloat32m2x3_t): Ditto.
30085 (vfloat32m2x4_t): Ditto.
30086 (vfloat32m4x2_t): Ditto.
30087 (vfloat64m1x2_t): Ditto.
30088 (vfloat64m1x3_t): Ditto.
30089 (vfloat64m1x4_t): Ditto.
30090 (vfloat64m1x5_t): Ditto.
30091 (vfloat64m1x6_t): Ditto.
30092 (vfloat64m1x7_t): Ditto.
30093 (vfloat64m1x8_t): Ditto.
30094 (vfloat64m2x2_t): Ditto.
30095 (vfloat64m2x3_t): Ditto.
30096 (vfloat64m2x4_t): Ditto.
30097 (vfloat64m4x2_t): Ditto.
30098 * config/riscv/riscv-vector-builtins.h (DEF_RVV_TUPLE_TYPE):
30100 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): Ditto.
30101 * config/riscv/riscv.cc (riscv_v_ext_tuple_mode_p): New
30103 (TUPLE_ENTRY): Ditto.
30104 (riscv_v_ext_mode_p): New function.
30105 (riscv_v_adjust_nunits): Add tuple mode adjustment.
30106 (riscv_classify_address): Ditto.
30107 (riscv_binary_cost): Ditto.
30108 (riscv_rtx_costs): Ditto.
30109 (riscv_secondary_memory_needed): Ditto.
30110 (riscv_hard_regno_nregs): Ditto.
30111 (riscv_hard_regno_mode_ok): Ditto.
30112 (riscv_vector_mode_supported_p): Ditto.
30113 (riscv_regmode_natural_size): Ditto.
30114 (riscv_array_mode): New function.
30115 (TARGET_ARRAY_MODE): New target hook.
30116 * config/riscv/riscv.md: Add tuple modes.
30117 * config/riscv/vector-iterators.md: Ditto.
30118 * config/riscv/vector.md (mov<mode>): Add tuple modes data
30120 (*mov<VT:mode>_<P:mode>): Ditto.
30122 2023-05-03 Richard Biener <rguenther@suse.de>
30124 * cse.cc (cse_insn): Track an equivalence to the destination
30125 separately and delay using src_related for it.
30127 2023-05-03 Richard Biener <rguenther@suse.de>
30129 * cse.cc (HASH): Turn into inline function and mix
30130 in another HASH_SHIFT bits.
30131 (SAFE_HASH): Likewise.
30133 2023-05-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30136 * config/aarch64/aarch64-simd.md (aarch64_<sur>h<addsub><mode>): Rename to...
30137 (aarch64_<sur>h<addsub><mode><vczle><vczbe>): ... This.
30139 2023-05-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30142 * config/aarch64/aarch64-simd.md (add<mode>3): Rename to...
30143 (add<mode>3<vczle><vczbe>): ... This.
30144 (sub<mode>3): Rename to...
30145 (sub<mode>3<vczle><vczbe>): ... This.
30146 (mul<mode>3): Rename to...
30147 (mul<mode>3<vczle><vczbe>): ... This.
30148 (*div<mode>3): Rename to...
30149 (*div<mode>3<vczle><vczbe>): ... This.
30150 (neg<mode>2): Rename to...
30151 (neg<mode>2<vczle><vczbe>): ... This.
30152 (abs<mode>2): Rename to...
30153 (abs<mode>2<vczle><vczbe>): ... This.
30154 (<frint_pattern><mode>2): Rename to...
30155 (<frint_pattern><mode>2<vczle><vczbe>): ... This.
30156 (<fmaxmin><mode>3): Rename to...
30157 (<fmaxmin><mode>3<vczle><vczbe>): ... This.
30158 (*sqrt<mode>2): Rename to...
30159 (*sqrt<mode>2<vczle><vczbe>): ... This.
30161 2023-05-03 Kito Cheng <kito.cheng@sifive.com>
30163 * doc/md.texi (RISC-V): Add vr, vm, vd constarint.
30165 2023-05-03 Martin Liska <mliska@suse.cz>
30167 PR tree-optimization/109693
30168 * value-range-storage.cc (vrange_allocator::vrange_allocator):
30169 Remove unused field.
30170 * value-range-storage.h: Likewise.
30172 2023-05-02 Andrew Pinski <apinski@marvell.com>
30174 * tree-ssa-phiopt.cc (move_stmt): New function.
30175 (match_simplify_replacement): Use move_stmt instead
30176 of the inlined version.
30178 2023-05-02 Andrew Pinski <apinski@marvell.com>
30180 * match.pd (a != 0 ? CLRSB(a) : CST -> CLRSB(a)): New
30183 2023-05-02 Andrew Pinski <apinski@marvell.com>
30185 PR tree-optimization/109702
30186 * match.pd: Fix "a != 0 ? FUNC(a) : CST" patterns
30187 for FUNC of POPCOUNT BSWAP FFS PARITY CLZ and CTZ.
30189 2023-05-02 Andrew Pinski <apinski@marvell.com>
30192 * config/aarch64/aarch64.md (*cmov<mode>_insn_m1): New
30193 insn_and_split pattern.
30195 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
30197 * config/riscv/sync.md (atomic_load<mode>): Implement atomic
30200 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
30202 * config/riscv/sync.md (mem_thread_fence_1): Change fence
30203 depending on the given memory model.
30205 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
30207 * config/riscv/riscv-protos.h (riscv_union_memmodels): Expose
30208 riscv_union_memmodels function to sync.md.
30209 * config/riscv/riscv.cc (riscv_union_memmodels): Add function to
30210 get the union of two memmodels in sync.md.
30211 (riscv_print_operand): Add %I and %J flags that output the
30212 optimal LR/SC flag bits for a given memory model.
30213 * config/riscv/sync.md: Remove static .aqrl bits on LR op/.rl
30214 bits on SC op and replace with optimized %I, %J flags.
30216 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
30218 * config/riscv/riscv.cc
30219 (riscv_memmodel_needs_amo_release): Change function name.
30220 (riscv_print_operand): Remove unneeded %F case.
30221 * config/riscv/sync.md: Remove unneeded fences.
30223 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
30226 * config/riscv/sync.md (atomic_store<mode>): Use simple store
30227 instruction in combination with fence(s).
30229 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
30231 * config/riscv/riscv.cc (riscv_print_operand): Change behavior
30232 of %A to include release bits.
30234 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
30236 * config/riscv/sync.md (atomic_cas_value_strong<mode>): Change
30237 FENCE/LR.aq/SC.aq into sequentially consistent LR.aqrl/SC.rl
30240 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
30242 * config/riscv/sync.md: Change LR.aq/SC.rl pairs into
30243 sequentially consistent LR.aqrl/SC.rl pairs.
30245 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
30247 * config/riscv/riscv.cc: Remove MEMMODEL_SYNC_* cases and
30248 sanitize memmodel input with memmodel_base.
30250 2023-05-02 Yanzhang Wang <yanzhang.wang@intel.com>
30251 Pan Li <pan2.li@intel.com>
30254 * config/riscv/vector-iterators.md: Support VNx2HI and VNX4DI when MIN_VLEN >= 128.
30256 2023-05-02 Romain Naour <romain.naour@gmail.com>
30258 * config/riscv/genrvv-type-indexer.cc: Use log2 from the C header, without
30261 2023-05-02 Martin Liska <mliska@suse.cz>
30263 * doc/invoke.texi: Update documentation based on param.opt file.
30265 2023-05-02 Richard Biener <rguenther@suse.de>
30267 PR tree-optimization/109672
30268 * tree-vect-stmts.cc (vectorizable_operation): For plus,
30269 minus and negate always check the vector mode is word mode.
30271 2023-05-01 Andrew Pinski <apinski@marvell.com>
30273 * tree-ssa-phiopt.cc: Update comment about
30274 how the transformation are implemented.
30276 2023-05-01 Jeff Law <jlaw@ventanamicro>
30278 * config/stormy16/stormy16.cc (TARGET_LRA_P): Remove defintion.
30280 2023-05-01 Jeff Law <jlaw@ventanamicro>
30282 * config/cris/cris.cc (TARGET_LRA_P): Remove.
30283 * config/epiphany/epiphany.cc (TARGET_LRA_P): Remove.
30284 * config/iq2000/iq2000.cc (TARGET_LRA_P): Remove.
30285 * config/m32r/m32r.cc (TARGET_LRA_P): Remove.
30286 * config/microblaze/microblaze.cc (TARGET_LRA_P): Remove.
30287 * config/mmix/mmix.cc (TARGET_LRA_P): Remove.
30289 2023-05-01 Rasmus Villemoes <rasmus.villemoes@prevas.dk>
30291 * print-tree.h (PRINT_DECL_REMAP_DEBUG): New flag.
30292 * print-tree.cc (print_decl_identifier): Implement it.
30293 * toplev.cc (output_stack_usage_1): Use it.
30295 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
30297 * value-range.h (class int_range): Remove gt_ggc_mx and gt_pch_nx
30300 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
30302 * value-range.h (irange::set_nonzero): Inline.
30304 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
30306 * gimple-range-op.cc (cfn_ffs::fold_range): Use the correct
30308 * gimple-ssa-warn-alloca.cc (alloca_call_type): Use <2> for
30309 invalid_range, as it is an inverse range.
30310 * tree-vrp.cc (find_case_label_range): Avoid trees.
30311 * value-range.cc (irange::irange_set): Delete.
30312 (irange::irange_set_1bit_anti_range): Delete.
30313 (irange::irange_set_anti_range): Delete.
30314 (irange::set): Cleanup.
30315 * value-range.h (class irange): Remove irange_set,
30316 irange_set_anti_range, irange_set_1bit_anti_range.
30317 (irange::set_undefined): Remove set to m_type.
30319 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
30321 * range-op.cc (update_known_bitmask): Adjust for irange containing
30322 wide_ints internally.
30323 * tree-ssanames.cc (set_nonzero_bits): Same.
30324 * tree-ssanames.h (set_nonzero_bits): Same.
30325 * value-range-storage.cc (irange_storage::set_irange): Same.
30326 (irange_storage::get_irange): Same.
30327 * value-range.cc (irange::operator=): Same.
30328 (irange::irange_set): Same.
30329 (irange::irange_set_1bit_anti_range): Same.
30330 (irange::irange_set_anti_range): Same.
30331 (irange::set): Same.
30332 (irange::verify_range): Same.
30333 (irange::contains_p): Same.
30334 (irange::irange_single_pair_union): Same.
30335 (irange::union_): Same.
30336 (irange::irange_contains_p): Same.
30337 (irange::intersect): Same.
30338 (irange::invert): Same.
30339 (irange::set_range_from_nonzero_bits): Same.
30340 (irange::set_nonzero_bits): Same.
30341 (mask_to_wi): Same.
30342 (irange::intersect_nonzero_bits): Same.
30343 (irange::union_nonzero_bits): Same.
30346 (tree_range): Same.
30347 (range_tests_strict_enum): Same.
30348 (range_tests_misc): Same.
30349 (range_tests_nonzero_bits): Same.
30350 * value-range.h (irange::type): Same.
30351 (irange::varying_compatible_p): Same.
30352 (irange::irange): Same.
30353 (int_range::int_range): Same.
30354 (irange::set_undefined): Same.
30355 (irange::set_varying): Same.
30356 (irange::lower_bound): Same.
30357 (irange::upper_bound): Same.
30359 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
30361 * gimple-range-fold.cc (tree_lower_bound): Delete.
30362 (tree_upper_bound): Delete.
30363 (vrp_val_max): Delete.
30364 (vrp_val_min): Delete.
30365 (fold_using_range::range_of_ssa_name_with_loop_info): Call
30366 range_of_var_in_loop.
30367 * vr-values.cc (valid_value_p): Delete.
30368 (fix_overflow): Delete.
30369 (get_scev_info): New.
30370 (bounds_of_var_in_loop): Refactor into...
30371 (induction_variable_may_overflow_p): ...this,
30372 (range_from_loop_direction): ...and this,
30373 (range_of_var_in_loop): ...and this.
30374 * vr-values.h (bounds_of_var_in_loop): Delete.
30375 (range_of_var_in_loop): New.
30377 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
30379 * gimple-range-fold.cc (adjust_pointer_diff_expr): Rewrite with
30381 (vrp_val_max): New.
30382 (vrp_val_min): New.
30383 * gimple-range-op.cc (cfn_strlen::fold_range): Use irange_val_*.
30384 * range-op.cc (max_limit): Same.
30386 (plus_minus_ranges): Same.
30387 (operator_rshift::op1_range): Same.
30388 (operator_cast::inside_domain_p): Same.
30389 * value-range.cc (vrp_val_is_max): Delete.
30390 (vrp_val_is_min): Delete.
30391 (range_tests_misc): Use irange_val_*.
30392 * value-range.h (vrp_val_is_min): Delete.
30393 (vrp_val_is_max): Delete.
30394 (vrp_val_max): Delete.
30395 (irange_val_min): New.
30396 (vrp_val_min): Delete.
30397 (irange_val_max): New.
30398 * vr-values.cc (check_for_binary_op_overflow): Use irange_val_*.
30400 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
30402 * fold-const.cc (expr_not_equal_to): Convert to irange wide_int API.
30403 * gimple-fold.cc (size_must_be_zero_p): Same.
30404 * gimple-loop-versioning.cc
30405 (loop_versioning::prune_loop_conditions): Same.
30406 * gimple-range-edge.cc (gcond_edge_range): Same.
30407 (gimple_outgoing_range::calc_switch_ranges): Same.
30408 * gimple-range-fold.cc (adjust_imagpart_expr): Same.
30409 (adjust_realpart_expr): Same.
30410 (fold_using_range::range_of_address): Same.
30411 (fold_using_range::relation_fold_and_or): Same.
30412 * gimple-range-gori.cc (gori_compute::gori_compute): Same.
30413 (range_is_either_true_or_false): Same.
30414 * gimple-range-op.cc (cfn_toupper_tolower::get_letter_range): Same.
30415 (cfn_clz::fold_range): Same.
30416 (cfn_ctz::fold_range): Same.
30417 * gimple-range-tests.cc (class test_expr_eval): Same.
30418 * gimple-ssa-warn-alloca.cc (alloca_call_type): Same.
30419 * ipa-cp.cc (ipa_value_range_from_jfunc): Same.
30420 (propagate_vr_across_jump_function): Same.
30421 (decide_whether_version_node): Same.
30422 * ipa-prop.cc (ipa_get_value_range): Same.
30423 * ipa-prop.h (ipa_range_set_and_normalize): Same.
30424 * range-op.cc (get_shift_range): Same.
30425 (value_range_from_overflowed_bounds): Same.
30426 (value_range_with_overflow): Same.
30427 (create_possibly_reversed_range): Same.
30428 (equal_op1_op2_relation): Same.
30429 (not_equal_op1_op2_relation): Same.
30430 (lt_op1_op2_relation): Same.
30431 (le_op1_op2_relation): Same.
30432 (gt_op1_op2_relation): Same.
30433 (ge_op1_op2_relation): Same.
30434 (operator_mult::op1_range): Same.
30435 (operator_exact_divide::op1_range): Same.
30436 (operator_lshift::op1_range): Same.
30437 (operator_rshift::op1_range): Same.
30438 (operator_cast::op1_range): Same.
30439 (operator_logical_and::fold_range): Same.
30440 (set_nonzero_range_from_mask): Same.
30441 (operator_bitwise_or::op1_range): Same.
30442 (operator_bitwise_xor::op1_range): Same.
30443 (operator_addr_expr::fold_range): Same.
30444 (pointer_plus_operator::wi_fold): Same.
30445 (pointer_or_operator::op1_range): Same.
30452 (range_op_cast_tests): Same.
30453 (range_op_lshift_tests): Same.
30454 (range_op_rshift_tests): Same.
30455 (range_op_bitwise_and_tests): Same.
30456 (range_relational_tests): Same.
30457 * range.cc (range_zero): Same.
30458 (range_nonzero): Same.
30459 * range.h (range_true): Same.
30460 (range_false): Same.
30461 (range_true_and_false): Same.
30462 * tree-data-ref.cc (split_constant_offset_1): Same.
30463 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Same.
30464 * tree-ssa-loop-unswitch.cc (struct unswitch_predicate): Same.
30465 (find_unswitching_predicates_for_bb): Same.
30466 * tree-ssa-phiopt.cc (value_replacement): Same.
30467 * tree-ssa-threadbackward.cc
30468 (back_threader::find_taken_edge_cond): Same.
30469 * tree-ssanames.cc (ssa_name_has_boolean_range): Same.
30470 * tree-vrp.cc (find_case_label_range): Same.
30471 * value-query.cc (range_query::get_tree_range): Same.
30472 * value-range.cc (irange::set_nonnegative): Same.
30473 (frange::contains_p): Same.
30474 (frange::singleton_p): Same.
30475 (frange::internal_singleton_p): Same.
30476 (irange::irange_set): Same.
30477 (irange::irange_set_1bit_anti_range): Same.
30478 (irange::irange_set_anti_range): Same.
30479 (irange::set): Same.
30480 (irange::operator==): Same.
30481 (irange::singleton_p): Same.
30482 (irange::contains_p): Same.
30483 (irange::set_range_from_nonzero_bits): Same.
30484 (DEFINE_INT_RANGE_INSTANCE): Same.
30494 (range_uint128): New.
30495 (range_uchar): New.
30497 (build_range3): Convert to irange wide_int API.
30498 (range_tests_irange3): Same.
30499 (range_tests_int_range_max): Same.
30500 (range_tests_strict_enum): Same.
30501 (range_tests_misc): Same.
30502 (range_tests_nonzero_bits): Same.
30503 (range_tests_nan): Same.
30504 (range_tests_signed_zeros): Same.
30505 * value-range.h (Value_Range::Value_Range): Same.
30506 (irange::set): Same.
30507 (irange::nonzero_p): Same.
30508 (irange::contains_p): Same.
30509 (range_includes_zero_p): Same.
30510 (irange::set_nonzero): Same.
30511 (irange::set_zero): Same.
30512 (contains_zero_p): Same.
30513 (frange::contains_p): Same.
30515 (simplify_using_ranges::op_with_boolean_value_range_p): Same.
30516 (bounds_of_var_in_loop): Same.
30517 (simplify_using_ranges::legacy_fold_cond_overflow): Same.
30519 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
30521 * value-range.cc (irange::irange_union): Rename to...
30522 (irange::union_): ...this.
30523 (irange::irange_intersect): Rename to...
30524 (irange::intersect): ...this.
30525 * value-range.h (irange::union_): Delete.
30526 (irange::intersect): Delete.
30528 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
30530 * vr-values.cc (bounds_of_var_in_loop): Convert to irange API.
30532 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
30534 * vr-values.cc (check_for_binary_op_overflow): Tidy up by using
30536 (compare_ranges): Delete.
30537 (compare_range_with_value): Delete.
30538 (bounds_of_var_in_loop): Tidy up by using ranger API.
30539 (simplify_using_ranges::fold_cond_with_ops): Cleanup and rename
30540 from vrp_evaluate_conditional_warnv_with_ops_using_ranges.
30541 (simplify_using_ranges::legacy_fold_cond_overflow): Remove
30542 strict_overflow_p and only_ranges.
30543 (simplify_using_ranges::legacy_fold_cond): Adjust call to
30544 legacy_fold_cond_overflow.
30545 (simplify_using_ranges::simplify_abs_using_ranges): Adjust for
30547 (range_fits_type_p): Rename value_range to irange.
30548 * vr-values.h (range_fits_type_p): Adjust prototype.
30550 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
30552 * value-range.cc (irange::irange_set_anti_range): Remove uses of
30553 tree_lower_bound and tree_upper_bound.
30554 (irange::verify_range): Same.
30555 (irange::operator==): Same.
30556 (irange::singleton_p): Same.
30557 * value-range.h (irange::tree_lower_bound): Delete.
30558 (irange::tree_upper_bound): Delete.
30559 (irange::lower_bound): Delete.
30560 (irange::upper_bound): Delete.
30561 (irange::zero_p): Remove uses of tree_lower_bound and
30564 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
30566 * tree-ssa-loop-niter.cc (refine_value_range_using_guard): Remove
30568 (determine_value_range): Same.
30569 (record_nonwrapping_iv): Same.
30570 (infer_loop_bounds_from_signedness): Same.
30571 (scev_var_range_cant_overflow): Same.
30572 * tree-vrp.cc (operand_less_p): Delete.
30573 * tree-vrp.h (operand_less_p): Delete.
30574 * value-range.cc (get_legacy_range): Remove uses of deprecated API.
30575 (irange::value_inside_range): Delete.
30576 * value-range.h (vrange::kind): Delete.
30577 (irange::num_pairs): Remove check of m_kind.
30578 (irange::min): Delete.
30579 (irange::max): Delete.
30581 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
30583 * gimple-fold.cc (maybe_fold_comparisons_from_match_pd): Adjust
30584 for vrange_storage.
30585 * gimple-range-cache.cc (sbr_vector::sbr_vector): Same.
30586 (sbr_vector::grow): Same.
30587 (sbr_vector::set_bb_range): Same.
30588 (sbr_vector::get_bb_range): Same.
30589 (sbr_sparse_bitmap::sbr_sparse_bitmap): Same.
30590 (sbr_sparse_bitmap::set_bb_range): Same.
30591 (sbr_sparse_bitmap::get_bb_range): Same.
30592 (block_range_cache::block_range_cache): Same.
30593 (ssa_global_cache::ssa_global_cache): Same.
30594 (ssa_global_cache::get_global_range): Same.
30595 (ssa_global_cache::set_global_range): Same.
30596 * gimple-range-cache.h: Same.
30597 * gimple-range-edge.cc
30598 (gimple_outgoing_range::gimple_outgoing_range): Same.
30599 (gimple_outgoing_range::switch_edge_range): Same.
30600 (gimple_outgoing_range::calc_switch_ranges): Same.
30601 * gimple-range-edge.h: Same.
30602 * gimple-range-infer.cc
30603 (infer_range_manager::infer_range_manager): Same.
30604 (infer_range_manager::get_nonzero): Same.
30605 (infer_range_manager::maybe_adjust_range): Same.
30606 (infer_range_manager::add_range): Same.
30607 * gimple-range-infer.h: Rename obstack_vrange_allocator to
30609 * tree-core.h (struct irange_storage_slot): Remove.
30610 (struct tree_ssa_name): Remove irange_info and frange_info. Make
30611 range_info a pointer to vrange_storage.
30612 * tree-ssanames.cc (range_info_fits_p): Adjust for vrange_storage.
30613 (range_info_alloc): Same.
30614 (range_info_free): Same.
30615 (range_info_get_range): Same.
30616 (range_info_set_range): Same.
30617 (get_nonzero_bits): Same.
30618 * value-query.cc (get_ssa_name_range_info): Same.
30619 * value-range-storage.cc (class vrange_internal_alloc): New.
30620 (class vrange_obstack_alloc): New.
30621 (class vrange_ggc_alloc): New.
30622 (vrange_allocator::vrange_allocator): New.
30623 (vrange_allocator::~vrange_allocator): New.
30624 (vrange_storage::alloc_slot): New.
30625 (vrange_allocator::alloc): New.
30626 (vrange_allocator::free): New.
30627 (vrange_allocator::clone): New.
30628 (vrange_allocator::clone_varying): New.
30629 (vrange_allocator::clone_undefined): New.
30630 (vrange_storage::alloc): New.
30631 (vrange_storage::set_vrange): Remove slot argument.
30632 (vrange_storage::get_vrange): Same.
30633 (vrange_storage::fits_p): Same.
30634 (vrange_storage::equal_p): New.
30635 (irange_storage::write_lengths_address): New.
30636 (irange_storage::lengths_address): New.
30637 (irange_storage_slot::alloc_slot): Remove.
30638 (irange_storage::alloc): New.
30639 (irange_storage_slot::irange_storage_slot): Remove.
30640 (irange_storage::irange_storage): New.
30641 (write_wide_int): New.
30642 (irange_storage_slot::set_irange): Remove.
30643 (irange_storage::set_irange): New.
30644 (read_wide_int): New.
30645 (irange_storage_slot::get_irange): Remove.
30646 (irange_storage::get_irange): New.
30647 (irange_storage_slot::size): Remove.
30648 (irange_storage::equal_p): New.
30649 (irange_storage_slot::num_wide_ints_needed): Remove.
30650 (irange_storage::size): New.
30651 (irange_storage_slot::fits_p): Remove.
30652 (irange_storage::fits_p): New.
30653 (irange_storage_slot::dump): Remove.
30654 (irange_storage::dump): New.
30655 (frange_storage_slot::alloc_slot): Remove.
30656 (frange_storage::alloc): New.
30657 (frange_storage_slot::set_frange): Remove.
30658 (frange_storage::set_frange): New.
30659 (frange_storage_slot::get_frange): Remove.
30660 (frange_storage::get_frange): New.
30661 (frange_storage_slot::fits_p): Remove.
30662 (frange_storage::equal_p): New.
30663 (frange_storage::fits_p): New.
30664 (ggc_vrange_allocator): New.
30665 (ggc_alloc_vrange_storage): New.
30666 * value-range-storage.h (class vrange_storage): Rewrite.
30667 (class irange_storage): Rewrite.
30668 (class frange_storage): Rewrite.
30669 (class obstack_vrange_allocator): Remove.
30670 (class ggc_vrange_allocator): Remove.
30671 (vrange_allocator::alloc_vrange): Remove.
30672 (vrange_allocator::alloc_irange): Remove.
30673 (vrange_allocator::alloc_frange): Remove.
30674 (ggc_alloc_vrange_storage): New.
30675 * value-range.h (class irange): Rename vrange_allocator to
30677 (class frange): Same.
30679 2023-04-30 Roger Sayle <roger@nextmovesoftware.com>
30681 * config/stormy16/stormy16.md (neghi2): Rewrite pattern using
30682 inc to avoid clobbering the carry flag.
30684 2023-04-30 Andrew Pinski <apinski@marvell.com>
30686 * match.pd: Add patterns for "a != 0 ? FUNC(a) : CST"
30687 for FUNC of POPCOUNT BSWAP FFS PARITY CLZ and CTZ.
30689 2023-04-30 Andrew Pinski <apinski@marvell.com>
30691 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
30692 Allow some builtin/internal function calls which
30693 are known not to trap/throw.
30694 (phiopt_worker::match_simplify_replacement):
30695 Use name instead of getting the lhs again.
30697 2023-04-30 Joakim Nohlgård <joakim@nohlgard.se>
30699 * configure: Regenerate.
30700 * configure.ac: Use ld -r in the check for HAVE_LD_RO_RW_SECTION_MIXING
30702 2023-04-29 Hans-Peter Nilsson <hp@axis.com>
30704 * reload1.cc (emit_insn_if_valid_for_reload_1): Rename from
30705 emit_insn_if_valid_for_reload.
30706 (emit_insn_if_valid_for_reload): Call new helper, and if a SET fails
30707 to be recognized, also try emitting a parallel that clobbers
30708 TARGET_FLAGS_REGNUM, as applicable.
30710 2023-04-29 Roger Sayle <roger@nextmovesoftware.com>
30712 * config/stormy16/stormy16.md (neghi2): Convert from a define_expand
30714 (*rotatehi_1): New define_insn for efficient 2 insn sequence.
30715 (*rotatehi_8, *rotaterthi_8): New define_insn to emit a swpb.
30717 2023-04-29 Roger Sayle <roger@nextmovesoftware.com>
30719 * config/stormy16/stormy16.md (any_lshift): New code iterator.
30720 (any_or_plus): Likewise.
30721 (any_rotate): Likewise.
30722 (*<any_lshift>_and_internal): New define_insn_and_split to
30723 recognize a logical shift followed by an AND, and split it
30724 again after reload.
30725 (*swpn): New define_insn matching xstormy16's swpn.
30726 (*swpn_zext): New define_insn recognizing swpn followed by
30727 zero_extendqihi2, i.e. with the high byte set to zero.
30728 (*swpn_sext): Likewise, for swpn followed by cbw.
30729 (*swpn_sext_2): Likewise, for an alternate RTL form.
30730 (*swpn_zext_ior): A pre-reload splitter so that an swpn+zext+ior
30731 sequence is split in the correct place to recognize the *swpn_zext
30732 followed by any_or_plus (ior, xor or plus) instruction.
30734 2023-04-29 Mikael Pettersson <mikpelinux@gmail.com>
30737 * config.gcc (vax-*-linux*): Add glibc-stdint.h.
30738 (lm32-*-uclinux*): Likewise.
30740 2023-04-29 Fei Gao <gaofei@eswincomputing.com>
30742 * config/riscv/riscv.cc (riscv_avoid_save_libcall): helper function
30743 for riscv_use_save_libcall.
30744 (riscv_use_save_libcall): call riscv_avoid_save_libcall.
30745 (riscv_compute_frame_info): restructure to decouple stack allocation
30746 for rv32e w/o save-restore.
30748 2023-04-28 Eugene Rozenfeld <erozen@microsoft.com>
30750 * doc/install.texi: Fix documentation typo
30752 2023-04-28 Matevos Mehrabyan <matevosmehrabyan@gmail.com>
30754 * config/riscv/iterators.md (only_div, paired_mod): New iterators.
30755 (u): Add div/udiv cases.
30756 * config/riscv/riscv-protos.h (riscv_use_divmod_expander): Prototype.
30757 * config/riscv/riscv.cc (struct riscv_tune_param): Add field for
30759 (rocket_tune_info, sifive_7_tune_info): Initialize new field.
30760 (thead_c906_tune_info): Likewise.
30761 (optimize_size_tune_info): Likewise.
30762 (riscv_use_divmod_expander): New function.
30763 * config/riscv/riscv.md (<u>divmod<mode>4): New expander.
30765 2023-04-28 Karen Sargsyan <karen1999411@gmail.com>
30767 * config/riscv/bitmanip.md: Added clmulr instruction.
30768 * config/riscv/riscv-builtins.cc (AVAIL): Add new.
30769 * config/riscv/riscv.md: (UNSPEC_CLMULR): Add new unspec type.
30771 * config/riscv/riscv-cmo.def: Added built-in function for clmulr.
30772 * config/riscv/crypto.md: Move clmul[h] instructions to bitmanip.md.
30773 * config/riscv/riscv-scalar-crypto.def: Move clmul[h] built-in
30774 functions to riscv-cmo.def.
30775 * config/riscv/generic.md: Add clmul to list of instructions
30776 using the generic_imul reservation.
30778 2023-04-28 Jivan Hakobyan <jivanhakobyan9@gmail.com>
30780 * config/riscv/bitmanip.md: Added expanders for minu/maxu instructions
30782 2023-04-28 Andrew Pinski <apinski@marvell.com>
30784 PR tree-optimization/100958
30785 * tree-ssa-phiopt.cc (two_value_replacement): Remove.
30786 (pass_phiopt::execute): Don't call two_value_replacement.
30787 * match.pd (a !=/== CST1 ? CST2 : CST3): Add pattern to
30788 handle what two_value_replacement did.
30790 2023-04-28 Andrew Pinski <apinski@marvell.com>
30792 * match.pd: Add patterns for
30793 "(A CMP B) ? MIN/MAX<A, C> : MIN/MAX <B, C>".
30795 2023-04-28 Andrew Pinski <apinski@marvell.com>
30797 * match.pd: Factor out the deciding the min/max from
30798 the "(cond (cmp (convert1? x) c1) (convert2? x) c2)"
30800 * fold-const.cc (minmax_from_comparison): this new function.
30801 * fold-const.h (minmax_from_comparison): New prototype.
30803 2023-04-28 Roger Sayle <roger@nextmovesoftware.com>
30805 PR rtl-optimization/109476
30806 * lower-subreg.cc: Include explow.h for force_reg.
30807 (find_decomposable_shift_zext): Pass an additional SPEED_P argument.
30808 If decomposing a suitable LSHIFTRT and we're not splitting
30809 ZERO_EXTEND (based on the current SPEED_P), then use a ZERO_EXTEND
30810 instead of setting a high part SUBREG to zero, which helps combine.
30811 (decompose_multiword_subregs): Update call to resolve_shift_zext.
30813 2023-04-28 Richard Biener <rguenther@suse.de>
30815 * tree-vect-data-refs.cc (vect_analyze_data_refs): Always
30817 * tree-vect-stmts.cc (vect_model_store_cost): Pass in the
30818 gather-scatter info and cost emulated scatters accordingly.
30819 (get_load_store_type): Support emulated scatters.
30820 (vectorizable_store): Likewise. Emulate them by extracting
30821 scalar offsets and data, doing scalar stores.
30823 2023-04-28 Richard Biener <rguenther@suse.de>
30825 * config/i386/i386.cc (ix86_vector_costs::add_stmt_cost):
30826 Tame down element extracts and scalar loads for gather/scatter
30827 similar to elementwise strided accesses.
30829 2023-04-28 Pan Li <pan2.li@intel.com>
30830 kito-cheng <kito.cheng@sifive.com>
30832 * config/riscv/vector.md: Add new define split to perform
30833 the simplification.
30835 2023-04-28 Richard Biener <rguenther@suse.de>
30838 * ipa-param-manipulation.cc
30839 (ipa_param_body_adjustments::modify_expression): Allow
30840 conversion of a register to a non-register type. Elide
30841 conversions inside BIT_FIELD_REFs.
30843 2023-04-28 Richard Biener <rguenther@suse.de>
30845 PR tree-optimization/109644
30846 * tree-cfg.cc (verify_types_in_gimple_reference): Check
30847 register constraints on the outermost VIEW_CONVERT_EXPR
30848 only. Do not allow register or invariant bases on
30849 multi-level or possibly variable index handled components.
30851 2023-04-28 Richard Biener <rguenther@suse.de>
30853 * gimplify.cc (gimplify_compound_lval): When there's a
30854 non-register type produced by one of the handled component
30855 operations make sure we get a non-register base.
30857 2023-04-28 Richard Biener <rguenther@suse.de>
30859 PR tree-optimization/108752
30860 * tree-vect-generic.cc (build_replicated_const): Rename
30861 to build_replicated_int_cst and move to tree.{h,cc}.
30862 (do_plus_minus): Adjust.
30863 (do_negate): Likewise.
30864 * tree-vect-stmts.cc (vectorizable_operation): Emit emulated
30865 arithmetic vector operations in lowered form.
30866 * tree.h (build_replicated_int_cst): Declare.
30867 * tree.cc (build_replicated_int_cst): Moved from
30868 tree-vect-generic.cc build_replicated_const.
30870 2023-04-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30873 * config/aarch64/aarch64-simd.md (aarch64_rbit<mode>): Rename to...
30874 (aarch64_rbit<mode><vczle><vczbe>): ... This.
30875 (neg<mode>2): Rename to...
30876 (neg<mode>2<vczle><vczbe>): ... This.
30877 (abs<mode>2): Rename to...
30878 (abs<mode>2<vczle><vczbe>): ... This.
30879 (aarch64_abs<mode>): Rename to...
30880 (aarch64_abs<mode><vczle><vczbe>): ... This.
30881 (one_cmpl<mode>2): Rename to...
30882 (one_cmpl<mode>2<vczle><vczbe>): ... This.
30883 (clrsb<mode>2): Rename to...
30884 (clrsb<mode>2<vczle><vczbe>): ... This.
30885 (clz<mode>2): Rename to...
30886 (clz<mode>2<vczle><vczbe>): ... This.
30887 (popcount<mode>2): Rename to...
30888 (popcount<mode>2<vczle><vczbe>): ... This.
30890 2023-04-28 Jakub Jelinek <jakub@redhat.com>
30892 * gimple-range-op.cc (class cfn_sqrt): New type.
30893 (op_cfn_sqrt): New variable.
30894 (gimple_range_op_handler::maybe_builtin_call): Handle
30895 CASE_CFN_SQRT{,_FN}.
30897 2023-04-28 Aldy Hernandez <aldyh@redhat.com>
30898 Jakub Jelinek <jakub@redhat.com>
30900 * value-range.h (frange_nextafter): Declare.
30901 * gimple-range-op.cc (class cfn_sincos): New.
30902 (op_cfn_sin, op_cfn_cos): New variables.
30903 (gimple_range_op_handler::maybe_builtin_call): Handle
30904 CASE_CFN_{SIN,COS}{,_FN}.
30906 2023-04-28 Jakub Jelinek <jakub@redhat.com>
30908 * target.def (libm_function_max_error): New target hook.
30909 * doc/tm.texi.in (TARGET_LIBM_FUNCTION_MAX_ERROR): Add.
30910 * doc/tm.texi: Regenerated.
30911 * targhooks.h (default_libm_function_max_error,
30912 glibc_linux_libm_function_max_error): Declare.
30913 * targhooks.cc: Include case-cfn-macros.h.
30914 (default_libm_function_max_error,
30915 glibc_linux_libm_function_max_error): New functions.
30916 * config/linux.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
30917 * config/linux-protos.h (linux_libm_function_max_error): Declare.
30918 * config/linux.cc: Include target.h and targhooks.h.
30919 (linux_libm_function_max_error): New function.
30920 * config/arc/arc.cc: Include targhooks.h and case-cfn-macros.h.
30921 (arc_libm_function_max_error): New function.
30922 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
30923 * config/i386/i386.cc (ix86_libc_has_fast_function): Formatting fix.
30924 (ix86_libm_function_max_error): New function.
30925 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
30926 * config/rs6000/rs6000-protos.h
30927 (rs6000_linux_libm_function_max_error): Declare.
30928 * config/rs6000/rs6000-linux.cc: Include target.h, targhooks.h, tree.h
30929 and case-cfn-macros.h.
30930 (rs6000_linux_libm_function_max_error): New function.
30931 * config/rs6000/linux.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
30932 * config/rs6000/linux64.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
30933 * config/or1k/or1k.cc: Include targhooks.h and case-cfn-macros.h.
30934 (or1k_libm_function_max_error): New function.
30935 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
30937 2023-04-28 Alexandre Oliva <oliva@adacore.com>
30939 * gimple-harden-conditionals.cc (insert_edge_check_and_trap):
30940 Move detach value calls...
30941 (pass_harden_conditional_branches::execute): ... here.
30942 (pass_harden_compares::execute): Detach values before
30945 2023-04-27 Andrew Stubbs <ams@codesourcery.com>
30947 * config/gcn/gcn-valu.md (cmul<conj_op><mode>3): Use gcn_gen_undef.
30948 (cml<addsub_as><mode>4): Likewise.
30949 (vec_addsub<mode>3): Likewise.
30950 (cadd<rot><mode>3): Likewise.
30951 (vec_fmaddsub<mode>4): Likewise.
30952 (vec_fmsubadd<mode>4): Likewise, and use sub for the odd lanes.
30954 2023-04-27 Andrew Pinski <apinski@marvell.com>
30956 * tree-ssa-phiopt.cc (phiopt_early_allow): Allow for
30957 up to 2 min/max expressions in the sequence/match code.
30959 2023-04-27 Andrew Pinski <apinski@marvell.com>
30961 * rtlanal.cc (may_trap_p_1): Treat SMIN/SMAX similar as
30963 * tree-eh.cc (operation_could_trap_helper_p): Treate
30964 MIN_EXPR/MAX_EXPR similar as other comparisons.
30966 2023-04-27 Andrew Pinski <apinski@marvell.com>
30968 * tree-ssa-phiopt.cc (cond_store_replacement): Remove
30970 (cond_if_else_store_replacement): Likewise.
30971 (get_non_trapping): Likewise.
30972 (store_elim_worker): Move into ...
30973 (pass_cselim::execute): This.
30975 2023-04-27 Andrew Pinski <apinski@marvell.com>
30977 * tree-ssa-phiopt.cc (two_value_replacement): Remove
30979 (match_simplify_replacement): Likewise.
30980 (factor_out_conditional_conversion): Likewise.
30981 (value_replacement): Likewise.
30982 (minmax_replacement): Likewise.
30983 (spaceship_replacement): Likewise.
30984 (cond_removal_in_builtin_zero_pattern): Likewise.
30985 (hoist_adjacent_loads): Likewise.
30986 (tree_ssa_phiopt_worker): Move into ...
30987 (pass_phiopt::execute): this.
30989 2023-04-27 Andrew Pinski <apinski@marvell.com>
30991 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove
30992 do_store_elim argument and split that part out to ...
30993 (store_elim_worker): This new function.
30994 (pass_cselim::execute): Call store_elim_worker.
30995 (pass_phiopt::execute): Update call to tree_ssa_phiopt_worker.
30997 2023-04-27 Jan Hubicka <jh@suse.cz>
30999 * cfgloopmanip.h (unloop_loops): Export.
31000 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Unloop loops
31001 that no longer loop.
31002 * tree-ssa-loop-ivcanon.cc (unloop_loops): Export; do not free
31003 vectors of loops to unloop.
31004 (canonicalize_induction_variables): Free vectors here.
31005 (tree_unroll_loops_completely): Free vectors here.
31007 2023-04-27 Richard Biener <rguenther@suse.de>
31009 PR tree-optimization/109170
31010 * gimple-range-op.cc (gimple_range_op_handler::maybe_builtin_call):
31011 Handle __builtin_expect and similar via cfn_pass_through_arg1
31012 and inspecting the calls fnspec.
31013 * builtins.cc (builtin_fnspec): Handle BUILT_IN_EXPECT
31014 and BUILT_IN_EXPECT_WITH_PROBABILITY.
31016 2023-04-27 Alexandre Oliva <oliva@adacore.com>
31018 * genmultilib: Use CONFIG_SHELL to run sub-scripts.
31020 2023-04-27 Aldy Hernandez <aldyh@redhat.com>
31022 PR tree-optimization/109639
31023 * ipa-cp.cc (ipa_value_range_from_jfunc): Normalize range.
31024 (propagate_vr_across_jump_function): Same.
31025 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
31026 * ipa-prop.h (ipa_range_set_and_normalize): New.
31027 * value-range.cc (irange::set): Assert min and max are INTEGER_CST.
31029 2023-04-27 Richard Biener <rguenther@suse.de>
31031 * match.pd (BIT_FIELD_REF CONSTRUCTOR@0 @1 @2): Do not
31032 create a CTOR operand in the result when simplifying GIMPLE.
31034 2023-04-27 Richard Biener <rguenther@suse.de>
31036 * gimplify.cc (gimplify_compound_lval): When the base
31037 gimplified to a register make sure to split up chains
31040 2023-04-27 Richard Biener <rguenther@suse.de>
31043 * ipa-param-manipulation.h
31044 (ipa_param_body_adjustments::modify_expression): Add extra_stmts
31046 * ipa-param-manipulation.cc
31047 (ipa_param_body_adjustments::modify_expression): Likewise.
31048 When we need a conversion and the replacement is a register
31049 split the conversion out.
31050 (ipa_param_body_adjustments::modify_assignment): Pass
31051 extra_stmts to RHS modify_expression.
31053 2023-04-27 Jonathan Wakely <jwakely@redhat.com>
31055 * doc/extend.texi (Zero Length): Describe example.
31057 2023-04-27 Richard Biener <rguenther@suse.de>
31059 PR tree-optimization/109594
31060 * tree-ssa.cc (non_rewritable_mem_ref_base): Constrain
31061 what we rewrite to a register based on the above.
31063 2023-04-26 Patrick O'Neill <patrick@rivosinc.com>
31065 * config/riscv/riscv.cc: Fix whitespace.
31066 * config/riscv/sync.md: Fix whitespace.
31068 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
31070 PR tree-optimization/108697
31071 * gimple-range-cache.cc (ssa_global_cache::clear_range): Do
31072 not clear the vector on an out of range query.
31073 (ssa_cache::dump): Use dump_range_query instead of get_range.
31074 (ssa_cache::dump_range_query): New.
31075 (ssa_lazy_cache::dump_range_query): New.
31076 (ssa_lazy_cache::set_range): New.
31077 * gimple-range-cache.h (ssa_cache::dump_range_query): New.
31078 (class ssa_lazy_cache): New.
31079 (ssa_lazy_cache::ssa_lazy_cache): New.
31080 (ssa_lazy_cache::~ssa_lazy_cache): New.
31081 (ssa_lazy_cache::get_range): New.
31082 (ssa_lazy_cache::clear_range): New.
31083 (ssa_lazy_cache::clear): New.
31084 (ssa_lazy_cache::dump): New.
31085 * gimple-range-path.cc (path_range_query::path_range_query): Do
31086 not allocate a ssa_cache object nor has_cache bitmap.
31087 (path_range_query::~path_range_query): Do not free objects.
31088 (path_range_query::clear_cache): Remove.
31089 (path_range_query::get_cache): Adjust.
31090 (path_range_query::set_cache): Remove.
31091 (path_range_query::dump): Don't call through a pointer.
31092 (path_range_query::internal_range_of_expr): Set cache directly.
31093 (path_range_query::reset_path): Clear cache directly.
31094 (path_range_query::ssa_range_in_phi): Fold with globals only.
31095 (path_range_query::compute_ranges_in_phis): Simply set range.
31096 (path_range_query::compute_ranges_in_block): Call cache directly.
31097 * gimple-range-path.h (class path_range_query): Replace bitmap
31098 and cache pointer with lazy cache object.
31099 * gimple-range.h (class assume_query): Use ssa_lazy_cache.
31101 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
31103 * gimple-range-cache.cc (ssa_cache::ssa_cache): Rename.
31104 (ssa_cache::~ssa_cache): Rename.
31105 (ssa_cache::has_range): New.
31106 (ssa_cache::get_range): Rename.
31107 (ssa_cache::set_range): Rename.
31108 (ssa_cache::clear_range): Rename.
31109 (ssa_cache::clear): Rename.
31110 (ssa_cache::dump): Rename and use get_range.
31111 (ranger_cache::get_global_range): Use get_range and set_range.
31112 (ranger_cache::range_of_def): Use get_range.
31113 * gimple-range-cache.h (class ssa_cache): Rename class and methods.
31114 (class ranger_cache): Use ssa_cache.
31115 * gimple-range-path.cc (path_range_query::path_range_query): Use
31117 (path_range_query::get_cache): Use get_range.
31118 (path_range_query::set_cache): Use set_range.
31119 * gimple-range-path.h (class path_range_query): Use ssa_cache.
31120 * gimple-range.cc (assume_query::assume_range_p): Use get_range.
31121 (assume_query::range_of_expr): Use get_range.
31122 (assume_query::assume_query): Use set_range.
31123 (assume_query::calculate_op): Use get_range and set_range.
31124 * gimple-range.h (class assume_query): Use ssa_cache.
31126 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
31128 * gimple-range-cache.cc (sbr_vector::sbr_vector): Add parameter
31129 and local to optionally zero memory.
31130 (br_vector::grow): Only zero memory if flag is set.
31131 (class sbr_lazy_vector): New.
31132 (sbr_lazy_vector::sbr_lazy_vector): New.
31133 (sbr_lazy_vector::set_bb_range): New.
31134 (sbr_lazy_vector::get_bb_range): New.
31135 (sbr_lazy_vector::bb_range_p): New.
31136 (block_range_cache::set_bb_range): Check flags and Use sbr_lazy_vector.
31137 * gimple-range-gori.cc (gori_map::calculate_gori): Use
31138 param_vrp_switch_limit.
31139 (gori_compute::gori_compute): Use param_vrp_switch_limit.
31140 * params.opt (vrp_sparse_threshold): Rename from evrp_sparse_threshold.
31141 (vrp_switch_limit): Rename from evrp_switch_limit.
31142 (vrp_vector_threshold): New.
31144 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
31146 * value-relation.cc (dom_oracle::query_relation): Check early for lack
31148 * value-relation.h (equiv_oracle::has_equiv_p): New.
31150 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
31152 PR tree-optimization/109417
31153 * gimple-range-gori.cc (range_def_chain::register_dependency):
31154 Save the ssa version number, not the pointer.
31155 (gori_compute::may_recompute_p): No need to check if a dependency
31156 is in the free list.
31157 * gimple-range-gori.h (class range_def_chain): Change ssa1 and ssa2
31158 fields to be unsigned int instead of trees.
31159 (ange_def_chain::depend1): Adjust.
31160 (ange_def_chain::depend2): Adjust.
31161 * gimple-range.h: Include "ssa.h" to inline ssa_name().
31163 2023-04-26 David Edelsohn <dje.gcc@gmail.com>
31165 * config/rs6000/aix72.h (TARGET_DEFAULT): Use ISA_2_6_MASKS_SERVER.
31166 * config/rs6000/aix73.h (TARGET_DEFAULT): Use ISA_2_7_MASKS_SERVER.
31167 (PROCESSOR_DEFAULT): Use PROCESSOR_POWER8.
31169 2023-04-26 Patrick O'Neill <patrick@rivosinc.com>
31172 * config/riscv/riscv-protos.h: Add helper function stubs.
31173 * config/riscv/riscv.cc: Add helper functions for subword masking.
31174 * config/riscv/riscv.opt: Add command-line flags -minline-atomics and
31175 -mno-inline-atomics.
31176 * config/riscv/sync.md: Add masking logic and inline asm for fetch_and_op,
31177 fetch_and_nand, CAS, and exchange ops.
31178 * doc/invoke.texi: Add blurb regarding new command-line flags
31179 -minline-atomics and -mno-inline-atomics.
31181 2023-04-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31183 * config/aarch64/aarch64-simd.md (aarch64_rshrn2<mode>_insn_le):
31184 Reimplement using standard RTL codes instead of unspec.
31185 (aarch64_rshrn2<mode>_insn_be): Likewise.
31186 (aarch64_rshrn2<mode>): Adjust for the above.
31187 * config/aarch64/aarch64.md (UNSPEC_RSHRN): Delete.
31189 2023-04-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31191 * config/aarch64/aarch64-simd.md (aarch64_rshrn<mode>_insn_le): Reimplement
31192 with standard RTL codes instead of an UNSPEC.
31193 (aarch64_rshrn<mode>_insn_be): Likewise.
31194 (aarch64_rshrn<mode>): Adjust for the above.
31195 * config/aarch64/predicates.md (aarch64_simd_rshrn_imm_vec): Define.
31197 2023-04-26 Pan Li <pan2.li@intel.com>
31198 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31200 * config/riscv/riscv.cc (riscv_classify_address): Allow
31201 const0_rtx for the RVV load/store.
31203 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
31205 * range-op.cc (range_op_cast_tests): Remove legacy support.
31206 * value-range-storage.h (vrange_allocator::alloc_irange): Same.
31207 * value-range.cc (irange::operator=): Same.
31208 (get_legacy_range): Same.
31209 (irange::copy_legacy_to_multi_range): Delete.
31210 (irange::copy_to_legacy): Delete.
31211 (irange::irange_set_anti_range): Delete.
31212 (irange::set): Remove legacy support.
31213 (irange::verify_range): Same.
31214 (irange::legacy_lower_bound): Delete.
31215 (irange::legacy_upper_bound): Delete.
31216 (irange::legacy_equal_p): Delete.
31217 (irange::operator==): Remove legacy support.
31218 (irange::singleton_p): Same.
31219 (irange::value_inside_range): Same.
31220 (irange::contains_p): Same.
31221 (intersect_ranges): Delete.
31222 (irange::legacy_intersect): Delete.
31223 (union_ranges): Delete.
31224 (irange::legacy_union): Delete.
31225 (irange::legacy_verbose_union_): Delete.
31226 (irange::legacy_verbose_intersect): Delete.
31227 (irange::irange_union): Remove legacy support.
31228 (irange::irange_intersect): Same.
31229 (irange::intersect): Same.
31230 (irange::invert): Same.
31231 (ranges_from_anti_range): Delete.
31232 (gt_pch_nx): Adjust for legacy removal.
31234 (range_tests_legacy): Delete.
31235 (range_tests_misc): Adjust for legacy removal.
31236 (range_tests): Same.
31237 * value-range.h (class irange): Same.
31238 (irange::legacy_mode_p): Delete.
31239 (ranges_from_anti_range): Delete.
31240 (irange::nonzero_p): Adjust for legacy removal.
31241 (irange::lower_bound): Same.
31242 (irange::upper_bound): Same.
31243 (irange::union_): Same.
31244 (irange::intersect): Same.
31245 (irange::set_nonzero): Same.
31246 (irange::set_zero): Same.
31247 * vr-values.cc (simplify_using_ranges::legacy_fold_cond_overflow): Same.
31249 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
31251 * value-range.cc (irange::copy_legacy_to_multi_range): Rewrite use
31252 of range_has_numeric_bounds_p with irange API.
31253 (range_has_numeric_bounds_p): Delete.
31254 * value-range.h (range_has_numeric_bounds_p): Delete.
31256 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
31258 * tree-data-ref.cc (compute_distributive_range): Replace uses of
31259 range_int_cst_p with irange API.
31260 * tree-ssa-strlen.cc (get_range_strlen_dynamic): Same.
31261 * tree-vrp.h (range_int_cst_p): Delete.
31262 * vr-values.cc (check_for_binary_op_overflow): Replace usees of
31263 range_int_cst_p with irange API.
31264 (vr_set_zero_nonzero_bits): Same.
31265 (range_fits_type_p): Same.
31266 (simplify_using_ranges::simplify_casted_cond): Same.
31267 * tree-vrp.cc (range_int_cst_p): Remove.
31269 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
31271 * tree-ssa-strlen.cc (compare_nonzero_chars): Convert to wide_ints.
31273 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
31275 * builtins.cc (expand_builtin_strnlen): Rewrite deprecated irange
31276 API uses to new API.
31277 * gimple-predicate-analysis.cc (find_var_cmp_const): Same.
31278 * internal-fn.cc (get_min_precision): Same.
31280 * tree-affine.cc (expr_to_aff_combination): Same.
31281 * tree-data-ref.cc (dr_step_indicator): Same.
31282 * tree-dfa.cc (get_ref_base_and_extent): Same.
31283 * tree-scalar-evolution.cc (iv_can_overflow_p): Same.
31284 * tree-ssa-phiopt.cc (two_value_replacement): Same.
31285 * tree-ssa-pre.cc (insert_into_preds_of_block): Same.
31286 * tree-ssa-reassoc.cc (optimize_range_tests_to_bit_test): Same.
31287 * tree-ssa-strlen.cc (compare_nonzero_chars): Same.
31288 * tree-switch-conversion.cc (bit_test_cluster::emit): Same.
31289 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Same.
31290 * tree.cc (get_range_pos_neg): Same.
31292 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
31294 * ipa-prop.cc (ipa_print_node_jump_functions_for_edge): Use
31295 vrange::dump instead of ad-hoc dumper.
31296 * tree-ssa-strlen.cc (dump_strlen_info): Same.
31297 * value-range-pretty-print.cc (visit): Pass TDF_NOUID to
31300 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
31302 * range-op.cc (operator_cast::op1_range): Use
31303 create_possibly_reversed_range.
31304 (operator_bitwise_and::simple_op1_range_solver): Same.
31305 * value-range.cc (swap_out_of_order_endpoints): Delete.
31306 (irange::set): Remove call to swap_out_of_order_endpoints.
31308 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
31310 * builtins.cc (determine_block_size): Convert use of legacy API to
31312 * gimple-array-bounds.cc (check_out_of_bounds_and_warn): Same.
31313 (array_bounds_checker::check_array_ref): Same.
31314 * gimple-ssa-warn-restrict.cc
31315 (builtin_memref::extend_offset_range): Same.
31316 * ipa-cp.cc (ipcp_store_vr_results): Same.
31317 * ipa-fnsummary.cc (set_switch_stmt_execution_predicate): Same.
31318 * ipa-prop.cc (struct ipa_vr_ggc_hash_traits): Same.
31319 (ipa_write_jump_function): Same.
31320 * pointer-query.cc (get_size_range): Same.
31321 * tree-data-ref.cc (split_constant_offset): Same.
31322 * tree-ssa-strlen.cc (get_range): Same.
31323 (maybe_diag_stxncpy_trunc): Same.
31324 (strlen_pass::get_len_or_size): Same.
31325 (strlen_pass::count_nonzero_bytes_addr): Same.
31326 * tree-vect-patterns.cc (vect_get_range_info): Same.
31327 * value-range.cc (irange::maybe_anti_range): Remove.
31328 (get_legacy_range): New.
31329 (irange::copy_to_legacy): Use get_legacy_range.
31330 (ranges_from_anti_range): Same.
31331 * value-range.h (class irange): Remove maybe_anti_range.
31332 (get_legacy_range): New.
31333 * vr-values.cc (check_for_binary_op_overflow): Convert use of
31334 legacy API to get_legacy_range.
31335 (compare_ranges): Same.
31336 (compare_range_with_value): Same.
31337 (bounds_of_var_in_loop): Same.
31338 (find_case_label_ranges): Same.
31339 (simplify_using_ranges::simplify_switch_using_ranges): Same.
31341 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
31343 * value-range-pretty-print.cc (vrange_printer::visit): Remove
31345 * value-range.cc (irange::constant_p): Remove.
31346 (irange::get_nonzero_bits_from_range): Remove constant_p use.
31347 * value-range.h (class irange): Remove constant_p.
31348 (irange::num_pairs): Remove constant_p use.
31350 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
31352 * value-range.cc (irange::copy_legacy_to_multi_range): Remove
31354 (irange::set): Same.
31355 (irange::legacy_lower_bound): Same.
31356 (irange::legacy_upper_bound): Same.
31357 (irange::contains_p): Same.
31358 (range_tests_legacy): Same.
31359 (irange::normalize_addresses): Remove.
31360 (irange::normalize_symbolics): Remove.
31361 (irange::symbolic_p): Remove.
31362 * value-range.h (class irange): Remove symbolic_p,
31363 normalize_symbolics, and normalize_addresses.
31364 * vr-values.cc (simplify_using_ranges::two_valued_val_range_p):
31365 Remove symbolics support.
31367 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
31369 * value-range.cc (irange::may_contain_p): Remove.
31370 * value-range.h (range_includes_zero_p): Rewrite may_contain_p
31371 usage with contains_p.
31372 * vr-values.cc (compare_range_with_value): Same.
31374 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
31376 * tree-vrp.cc (supported_types_p): Remove.
31377 (defined_ranges_p): Remove.
31378 (range_fold_binary_expr): Remove.
31379 (range_fold_unary_expr): Remove.
31380 * tree-vrp.h (range_fold_unary_expr): Remove.
31381 (range_fold_binary_expr): Remove.
31383 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
31385 * ipa-cp.cc (ipa_vr_operation_and_type_effects): Convert to ranger API.
31386 (ipa_value_range_from_jfunc): Same.
31387 (propagate_vr_across_jump_function): Same.
31388 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
31389 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Same.
31390 * vr-values.cc (bounds_of_var_in_loop): Same.
31392 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
31394 * gimple-array-bounds.cc (array_bounds_checker::get_value_range):
31395 Add irange argument.
31396 (check_out_of_bounds_and_warn): Remove check for vr.
31397 (array_bounds_checker::check_array_ref): Remove pointer qualifier
31398 for vr and adjust accordingly.
31399 * gimple-array-bounds.h (get_value_range): Add irange argument.
31400 * value-query.cc (class equiv_allocator): Delete.
31401 (range_query::get_value_range): Delete.
31402 (range_query::range_query): Remove allocator access.
31403 (range_query::~range_query): Same.
31404 * value-query.h (get_value_range): Delete.
31406 (simplify_using_ranges::op_with_boolean_value_range_p): Remove
31407 call to get_value_range.
31408 (check_for_binary_op_overflow): Same.
31409 (simplify_using_ranges::legacy_fold_cond_overflow): Same.
31410 (simplify_using_ranges::simplify_abs_using_ranges): Same.
31411 (simplify_using_ranges::simplify_cond_using_ranges_1): Same.
31412 (simplify_using_ranges::simplify_casted_cond): Same.
31413 (simplify_using_ranges::simplify_switch_using_ranges): Same.
31414 (simplify_using_ranges::two_valued_val_range_p): Same.
31416 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
31419 (simplify_using_ranges::vrp_evaluate_conditional_warnv_with_ops):
31421 (simplify_using_ranges::legacy_fold_cond_overflow): ...this.
31422 (simplify_using_ranges::vrp_visit_cond_stmt): Rename to...
31423 (simplify_using_ranges::legacy_fold_cond): ...this.
31424 (simplify_using_ranges::fold_cond): Rename
31425 vrp_evaluate_conditional_warnv_with_ops to
31426 legacy_fold_cond_overflow.
31427 * vr-values.h (class vr_values): Replace vrp_visit_cond_stmt and
31428 vrp_evaluate_conditional_warnv_with_ops with legacy_fold_cond and
31429 legacy_fold_cond_overflow respectively.
31431 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
31433 * vr-values.cc (get_vr_for_comparison): Remove.
31434 (compare_name_with_value): Same.
31435 (vrp_evaluate_conditional_warnv_with_ops): Remove calls to
31436 compare_name_with_value.
31437 * vr-values.h: Remove compare_name_with_value.
31438 Remove get_vr_for_comparison.
31440 2023-04-26 Roger Sayle <roger@nextmovesoftware.com>
31442 * config/stormy16/stormy16.md (bswaphi2): New define_insn.
31443 (bswapsi2): New define_insn.
31444 (swaphi): New define_insn to exchange two registers (swpw).
31445 (define_peephole2): Recognize exchange of registers as swaphi.
31447 2023-04-26 Richard Biener <rguenther@suse.de>
31449 * gimple-range-path.cc (path_range_query::compute_outgoing_relations):
31451 * ipa-pure-const.cc (pass_nothrow::execute): Likewise.
31452 * predict.cc (apply_return_prediction): Likewise.
31453 * sese.cc (set_ifsese_condition): Likewise. Simplify.
31454 * tree-cfg.cc (assert_unreachable_fallthru_edge_p): Avoid last_stmt.
31455 (make_edges_bb): Likewise.
31456 (make_cond_expr_edges): Likewise.
31457 (end_recording_case_labels): Likewise.
31458 (make_gimple_asm_edges): Likewise.
31459 (cleanup_dead_labels): Likewise.
31460 (group_case_labels): Likewise.
31461 (gimple_can_merge_blocks_p): Likewise.
31462 (gimple_merge_blocks): Likewise.
31463 (find_taken_edge): Likewise. Also handle empty fallthru blocks.
31464 (gimple_duplicate_sese_tail): Avoid last_stmt.
31465 (find_loop_dist_alias): Likewise.
31466 (gimple_block_ends_with_condjump_p): Likewise.
31467 (gimple_purge_dead_eh_edges): Likewise.
31468 (gimple_purge_dead_abnormal_call_edges): Likewise.
31469 (pass_warn_function_return::execute): Likewise.
31470 (execute_fixup_cfg): Likewise.
31471 * tree-eh.cc (redirect_eh_edge_1): Likewise.
31472 (pass_lower_resx::execute): Likewise.
31473 (pass_lower_eh_dispatch::execute): Likewise.
31474 (cleanup_empty_eh): Likewise.
31475 * tree-if-conv.cc (if_convertible_bb_p): Likewise.
31476 (predicate_bbs): Likewise.
31477 (ifcvt_split_critical_edges): Likewise.
31478 * tree-loop-distribution.cc (create_edge_for_control_dependence):
31480 (loop_distribution::transform_reduction_loop): Likewise.
31481 * tree-parloops.cc (transform_to_exit_first_loop_alt): Likewise.
31482 (try_transform_to_exit_first_loop_alt): Likewise.
31483 (transform_to_exit_first_loop): Likewise.
31484 (create_parallel_loop): Likewise.
31485 * tree-scalar-evolution.cc (get_loop_exit_condition): Likewise.
31486 * tree-ssa-dce.cc (mark_last_stmt_necessary): Likewise.
31487 (eliminate_unnecessary_stmts): Likewise.
31489 (dom_opt_dom_walker::set_global_ranges_from_unreachable_edges):
31491 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Likewise.
31492 (pass_tree_ifcombine::execute): Likewise.
31493 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Likewise.
31494 (should_duplicate_loop_header_p): Likewise.
31495 * tree-ssa-loop-ivcanon.cc (create_canonical_iv): Likewise.
31496 (tree_estimate_loop_size): Likewise.
31497 (try_unroll_loop_completely): Likewise.
31498 * tree-ssa-loop-ivopts.cc (tree_ssa_iv_optimize_loop): Likewise.
31499 * tree-ssa-loop-manip.cc (ip_normal_pos): Likewise.
31500 (canonicalize_loop_ivs): Likewise.
31501 * tree-ssa-loop-niter.cc (determine_value_range): Likewise.
31502 (bound_difference): Likewise.
31503 (number_of_iterations_popcount): Likewise.
31504 (number_of_iterations_cltz): Likewise.
31505 (number_of_iterations_cltz_complement): Likewise.
31506 (simplify_using_initial_conditions): Likewise.
31507 (number_of_iterations_exit_assumptions): Likewise.
31508 (loop_niter_by_eval): Likewise.
31509 (estimate_numbers_of_iterations): Likewise.
31511 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31513 * config/riscv/vector.md: Refine vmadc/vmsbc RA constraint.
31515 2023-04-26 Kewen Lin <linkw@linux.ibm.com>
31518 * config/rs6000/rs6000-builtins.def
31519 (__builtin_vsx_scalar_cmp_exp_qp_eq, __builtin_vsx_scalar_cmp_exp_qp_gt
31520 __builtin_vsx_scalar_cmp_exp_qp_lt,
31521 __builtin_vsx_scalar_cmp_exp_qp_unordered): Move from stanza ieee128-hw
31524 2023-04-26 Kewen Lin <linkw@linux.ibm.com>
31527 * config/rs6000/altivec.md (sldoi_to_mov<mode>): Replace predicate
31528 easy_vector_constant with const_vector_each_byte_same, add
31529 handlings in preparation for !easy_vector_constant, and update
31530 VECTOR_UNIT_ALTIVEC_OR_VSX_P with VECTOR_MEM_ALTIVEC_OR_VSX_P.
31531 * config/rs6000/predicates.md (const_vector_each_byte_same): New
31534 2023-04-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
31536 * config/riscv/vector.md (*pred_cmp<mode>_merge_tie_mask): New pattern.
31537 (*pred_ltge<mode>_merge_tie_mask): Ditto.
31538 (*pred_cmp<mode>_scalar_merge_tie_mask): Ditto.
31539 (*pred_eqne<mode>_scalar_merge_tie_mask): Ditto.
31540 (*pred_cmp<mode>_extended_scalar_merge_tie_mask): Ditto.
31541 (*pred_eqne<mode>_extended_scalar_merge_tie_mask): Ditto.
31542 (*pred_cmp<mode>_narrow_merge_tie_mask): Ditto.
31544 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31546 * config/riscv/vector.md: Fix redundant vmv1r.v.
31548 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31550 * config/riscv/vector.md: Fix RA constraint.
31552 2023-04-26 Pan Li <pan2.li@intel.com>
31555 * tree-ssa-sccvn.cc (vn_reference_eq): add type vector subparts
31556 check for vn_reference equal.
31558 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31560 * config/riscv/riscv-opts.h (enum riscv_autovec_preference_enum): Add enum for
31561 auto-vectorization preference.
31562 (enum riscv_autovec_lmul_enum): Add enum for choosing LMUL of RVV
31563 auto-vectorization.
31564 * config/riscv/riscv.opt: Add compile option for RVV auto-vectorization.
31566 2023-04-26 Jivan Hakobyan <jivanhakobyan9@gmail.com>
31568 * config/riscv/bitmanip.md: Updated predicates of bclri<mode>_nottwobits
31569 and bclridisi_nottwobits patterns.
31570 * config/riscv/predicates.md: (not_uimm_extra_bit_or_nottwobits): Adjust
31571 predicate to avoid splitting arith constants.
31572 (const_nottwobits_not_arith_operand): New predicate.
31574 2023-04-25 Hans-Peter Nilsson <hp@axis.com>
31576 * recog.cc (peep2_attempt, peep2_update_life): Correct
31577 head-comment description of parameter match_len.
31579 2023-04-25 Vineet Gupta <vineetg@rivosinc.com>
31581 * config/riscv/riscv.md: riscv_move_integer() drop in_splitter arg.
31582 riscv_split_symbol() drop in_splitter arg.
31583 * config/riscv/riscv.cc: riscv_move_integer() drop in_splitter arg.
31584 riscv_split_symbol() drop in_splitter arg.
31585 riscv_force_temporary() drop in_splitter arg.
31586 * config/riscv/riscv-protos.h: riscv_move_integer() drop in_splitter arg.
31587 riscv_split_symbol() drop in_splitter arg.
31589 2023-04-25 Eric Botcazou <ebotcazou@adacore.com>
31591 * tree-ssa.cc (insert_debug_temp_for_var_def): Do not create
31592 superfluous debug temporaries for single GIMPLE assignments.
31594 2023-04-25 Richard Biener <rguenther@suse.de>
31596 PR tree-optimization/109609
31597 * attr-fnspec.h (arg_max_access_size_given_by_arg_p):
31599 * tree-ssa-alias.cc (check_fnspec): Correctly interpret
31600 the size given by arg_max_access_size_given_by_arg_p as
31601 maximum, not exact, size.
31603 2023-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31606 * config/aarch64/aarch64-simd.md (orn<mode>3): Rename to...
31607 (orn<mode>3<vczle><vczbe>): ... This.
31608 (bic<mode>3): Rename to...
31609 (bic<mode>3<vczle><vczbe>): ... This.
31610 (<su><maxmin><mode>3): Rename to...
31611 (<su><maxmin><mode>3<vczle><vczbe>): ... This.
31613 2023-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31615 * config/aarch64/aarch64-simd.md (<su_optab>div<mode>3): New define_expand.
31616 * config/aarch64/iterators.md (VQDIV): New mode iterator.
31617 (vnx2di): New mode attribute.
31619 2023-04-25 Richard Biener <rguenther@suse.de>
31621 PR rtl-optimization/109585
31622 * tree-ssa-alias.cc (aliasing_component_refs_p): Fix typo.
31624 2023-04-25 Jakub Jelinek <jakub@redhat.com>
31627 * config/rs6000/rs6000.cc (rs6000_is_valid_rotate_dot_mask): For
31628 !TARGET_64BIT, don't return true if UINTVAL (mask) << (63 - nb)
31629 is larger than signed int maximum.
31631 2023-04-25 Martin Liska <mliska@suse.cz>
31633 * doc/gcov.texi: Document the new "calls" field and document
31634 the API bump. Mention also "block_ids" for lines.
31635 * gcov.cc (output_intermediate_json_line): Output info about
31636 calls and extend branches as well.
31637 (generate_results): Bump version to 2.
31638 (output_line_details): Use block ID instead of a non-sensual
31641 2023-04-25 Roger Sayle <roger@nextmovesoftware.com>
31643 * config/stormy16/stormy16.md (zero_extendqihi2): Restore/fix
31644 length attribute for the first (memory operand) alternative.
31646 2023-04-25 Victor Do Nascimento <victor.donascimento@arm.com>
31648 * config/aarch64/aarch64-simd.md(aarch64_simd_stp<mode>): New.
31649 * config/aarch64/constraints.md: Make "Umn" relaxed memory
31651 * config/aarch64/iterators.md(ldpstp_vel_sz): New.
31653 2023-04-25 Aldy Hernandez <aldyh@redhat.com>
31655 * value-range.cc (frange::set): Adjust constructor.
31656 * value-range.h (nan_state::nan_state): Replace default
31657 constructor with one taking an argument.
31659 2023-04-25 Aldy Hernandez <aldyh@redhat.com>
31661 * ipa-cp.cc (ipa_range_contains_p): New.
31662 (decide_whether_version_node): Use it.
31664 2023-04-24 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
31666 * tree-ssa-forwprop.cc (is_combined_permutation_identity): Try to
31667 simplify two successive VEC_PERM_EXPRs with same VLA mask,
31668 where mask chooses elements in reverse order.
31670 2023-04-24 Andrew Pinski <apinski@marvell.com>
31672 * tree-ssa-phiopt.cc (match_simplify_replacement): Add new arguments
31673 and support diamond shaped basic block form.
31674 (tree_ssa_phiopt_worker): Update call to match_simplify_replacement
31676 2023-04-24 Andrew Pinski <apinski@marvell.com>
31678 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
31679 Instead of calling last_and_only_stmt, look for the last statement
31682 2023-04-24 Andrew Pinski <apinski@marvell.com>
31684 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
31686 (match_simplify_replacement): Call
31687 empty_bb_or_one_feeding_into_p instead of doing it inline.
31689 2023-04-24 Andrew Pinski <apinski@marvell.com>
31691 PR tree-optimization/68894
31692 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove the
31693 continue for the do_hoist_loads diamond case.
31695 2023-04-24 Andrew Pinski <apinski@marvell.com>
31697 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Rearrange
31698 code for better code readability.
31700 2023-04-24 Andrew Pinski <apinski@marvell.com>
31702 PR tree-optimization/109604
31703 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Move the
31704 diamond form check from ...
31705 (minmax_replacement): Here.
31707 2023-04-24 Patrick Palka <ppalka@redhat.com>
31709 * tree.cc (strip_array_types): Don't define here.
31710 (is_typedef_decl): Don't define here.
31711 (typedef_variant_p): Don't define here.
31712 * tree.h (strip_array_types): Define here.
31713 (is_typedef_decl): Define here.
31714 (typedef_variant_p): Define here.
31716 2023-04-24 Frederik Harwath <frederik@codesourcery.com>
31718 * doc/generic.texi (OpenMP): Add != to allowed
31719 conditions and state that vars can be unsigned.
31720 * tree.def (OMP_FOR): Likewise.
31722 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31724 * config/aarch64/aarch64-simd.md (mulv2di3): New expander.
31726 2023-04-24 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
31728 * doc/install.texi: Consistently use Solaris rather than Solaris 2.
31729 Remove explicit Solaris 11 references.
31731 (Options specification, --with-gnu-as): as and gas always differ
31733 Remove /usr/ccs/bin reference.
31734 (Installing GCC: Binaries, Solaris (SPARC, Intel)): Remove.
31735 (i?86-*-solaris2*): Merge assembler, linker recommendations ...
31736 (*-*-solaris2*): ... here.
31737 Update bundled GCC versions.
31738 Don't refer to pre-built binaries.
31739 Remove /bin/sh warning.
31740 Update assembler, linker recommendations.
31741 Document GNAT bootstrap compiler.
31742 (sparc-sun-solaris2*): Remove non-UltraSPARC reference.
31743 (sparc64-*-solaris2*): Move content...
31744 (sparcv9-*-solaris2*): ...here.
31745 Add GDC for 64-bit bootstrap compilers.
31747 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31750 * config/aarch64/aarch64-sve.md (<optab><mode>3): Handle TARGET_SVE2 MUL
31752 * config/aarch64/aarch64-sve2.md (*aarch64_mul_unpredicated_<mode>): New
31755 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31757 * config/aarch64/aarch64-simd.md (aarch64_<sur>abal2<mode>): Rename to...
31758 (aarch64_<su>abal2<mode>_insn): ... This. Use RTL codes instead of unspec.
31759 (aarch64_<su>abal2<mode>): New define_expand.
31760 * config/aarch64/aarch64.cc (aarch64_abd_rtx_p): New function.
31761 (aarch64_rtx_costs): Handle ABD rtxes.
31762 * config/aarch64/aarch64.md (UNSPEC_SABAL2, UNSPEC_UABAL2): Delete.
31763 * config/aarch64/iterators.md (ABAL2): Delete.
31764 (sur): Remove handling of UNSPEC_UABAL2 and UNSPEC_SABAL2.
31766 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31768 * config/aarch64/aarch64-simd.md (aarch64_<sur>abal<mode>): Rename to...
31769 (aarch64_<su>abal<mode>): ... This. Use RTL codes instead of unspec.
31770 (<sur>sadv16qi): Rename to...
31771 (<su>sadv16qi): ... This. Adjust for the above.
31772 * config/aarch64/aarch64-sve.md (<sur>sad<vsi2qi>): Rename to...
31773 (<su>sad<vsi2qi>): ... This. Adjust for the above.
31774 * config/aarch64/aarch64.md (UNSPEC_SABAL, UNSPEC_UABAL): Delete.
31775 * config/aarch64/iterators.md (ABAL): Delete.
31776 (sur): Remove handling of UNSPEC_SABAL and UNSPEC_UABAL.
31778 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31780 * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl2<mode>): Rename to...
31781 (aarch64_<su>abdl2<mode>_insn): ... This. Use RTL codes instead of unspec.
31782 (aarch64_<su>abdl2<mode>): New define_expand.
31783 * config/aarch64/aarch64.md (UNSPEC_SABDL2, UNSPEC_UABDL2): Delete.
31784 * config/aarch64/iterators.md (ABDL2): Delete.
31785 (sur): Remove handling of UNSPEC_SABDL2 and UNSPEC_UABDL2.
31787 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31789 * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl<mode>): Rename to...
31790 (aarch64_<su>abdl<mode>): ... This. Use standard RTL ops instead of
31792 * config/aarch64/aarch64.md (UNSPEC_SABDL, UNSPEC_UABDL): Delete.
31793 * config/aarch64/iterators.md (ABDL): Delete.
31794 (sur): Remove handling of UNSPEC_SABDL and UNSPEC_UABDL.
31796 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31798 * config/aarch64/aarch64-simd.md
31799 (*aarch64_<su>addlv<VDQV_L:mode>_ze<GPI:mode>): New pattern.
31801 2023-04-24 Richard Biener <rguenther@suse.de>
31803 * gimple-ssa-split-paths.cc (is_feasible_trace): Avoid
31805 * graphite-scop-detection.cc (single_pred_cond_non_loop_exit):
31807 * ipa-fnsummary.cc (set_cond_stmt_execution_predicate): Likewise.
31808 (set_switch_stmt_execution_predicate): Likewise.
31809 (phi_result_unknown_predicate): Likewise.
31810 * ipa-prop.cc (compute_complex_ancestor_jump_func): Likewise.
31811 (ipa_analyze_indirect_call_uses): Likewise.
31812 * predict.cc (predict_iv_comparison): Likewise.
31813 (predict_extra_loop_exits): Likewise.
31814 (predict_loops): Likewise.
31815 (tree_predict_by_opcode): Likewise.
31816 * gimple-predicate-analysis.cc (predicate::init_from_control_deps):
31818 * gimple-pretty-print.cc (dump_implicit_edges): Likewise.
31819 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Likewise.
31820 (replace_phi_edge_with_variable): Likewise.
31821 (two_value_replacement): Likewise.
31822 (value_replacement): Likewise.
31823 (minmax_replacement): Likewise.
31824 (spaceship_replacement): Likewise.
31825 (cond_removal_in_builtin_zero_pattern): Likewise.
31826 * tree-ssa-reassoc.cc (maybe_optimize_range_tests): Likewise.
31827 * tree-ssa-sccvn.cc (vn_phi_eq): Likewise.
31828 (vn_phi_lookup): Likewise.
31829 (vn_phi_insert): Likewise.
31830 * tree-ssa-structalias.cc (compute_points_to_sets): Likewise.
31831 * tree-ssa-threadbackward.cc (back_threader::maybe_thread_block):
31833 (back_threader_profitability::possibly_profitable_path_p):
31835 * tree-ssa-threadedge.cc (jump_threader::thread_outgoing_edges):
31837 * tree-switch-conversion.cc (pass_convert_switch::execute):
31839 (pass_lower_switch<O0>::execute): Likewise.
31840 * tree-tailcall.cc (tree_optimize_tail_calls_1): Likewise.
31841 * tree-vect-loop-manip.cc (vect_loop_versioning): Likewise.
31842 * tree-vect-slp.cc (vect_slp_function): Likewise.
31843 * tree-vect-stmts.cc (cfun_returns): Likewise.
31844 * tree-vectorizer.cc (vect_loop_vectorized_call): Likewise.
31845 (vect_loop_dist_alias_call): Likewise.
31847 2023-04-24 Richard Biener <rguenther@suse.de>
31849 * cfgcleanup.cc (outgoing_edges_match): Use FORWARDER_BLOCK_P.
31851 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
31853 * config/riscv/riscv-vsetvl.cc
31854 (vector_infos_manager::all_avail_in_compatible_p): New function.
31855 (pass_vsetvl::refine_vsetvls): Optimize vsetvls.
31856 * config/riscv/riscv-vsetvl.h: New function.
31858 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
31860 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::pre_vsetvl): Add function
31861 comment for cleanup_insns.
31863 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
31865 * config/riscv/vector-iterators.md: New unspec to refine fault first load pattern.
31866 * config/riscv/vector.md: Refine fault first load pattern to erase avl from instructions
31867 with the fault first load property.
31869 2023-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31871 * config/aarch64/aarch64-simd.md (aarch64_float_truncate_lo_): Rename to...
31872 (aarch64_float_truncate_lo_<mode><vczle><vczbe>): ... This.
31874 2023-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31877 * config/aarch64/aarch64-simd.md (aarch64_addp<mode>): Rename to...
31878 (aarch64_addp<mode><vczle><vczbe>): ... This.
31880 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
31882 * config/stormy16/stormy16.cc (xstormy16_rtx_costs): Rewrite to
31883 provide reasonable values for common arithmetic operations and
31884 immediate operands (in several machine modes).
31886 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
31888 * config/stormy16/stormy16.cc (xstormy16_print_operand): Add %h
31889 format specifier to output high_part register name of SImode reg.
31890 * config/stormy16/stormy16.md (extendhisi2): New define_insn.
31891 (zero_extendqihi2): Fix lengths, consistent formatting and add
31892 "and Rx,#255" alternative, for documentation purposes.
31893 (zero_extendhisi2): New define_insn.
31895 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
31897 * config/stormy16/stormy16.cc (xstormy16_output_shift): Implement
31898 SImode shifts by two by performing a single bit SImode shift twice.
31900 2023-04-23 Aldy Hernandez <aldyh@redhat.com>
31902 PR tree-optimization/109593
31903 * value-range.cc (frange::operator==): Handle NANs.
31905 2023-04-23 liuhongt <hongtao.liu@intel.com>
31907 PR rtl-optimization/108707
31908 * ira-costs.cc (scan_one_insn): Use NO_REGS instead of
31909 GENERAL_REGS when preferred reg_class is not known.
31911 2023-04-22 Andrew Pinski <apinski@marvell.com>
31913 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker):
31914 Change the code around slightly to move diamond
31915 handling for do_store_elim/do_hoist_loads out of
31918 2023-04-22 Andrew Pinski <apinski@marvell.com>
31920 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker):
31921 Remove check on empty_block_p.
31923 2023-04-22 Jakub Jelinek <jakub@redhat.com>
31925 PR bootstrap/109589
31926 * system.h (class auto_mpz): Workaround PR62101 bug in GCC 4.8 and 4.9.
31927 * realmpfr.h (class auto_mpfr): Likewise.
31929 2023-04-22 Jakub Jelinek <jakub@redhat.com>
31931 PR tree-optimization/109583
31932 * match.pd (fneg/fadd simplify): Don't call related_vector_mode
31933 if vec_mode is not VECTOR_MODE_P.
31935 2023-04-22 Jan Hubicka <hubicka@ucw.cz>
31936 Ondrej Kubanek <kubanek0ondrej@gmail.com>
31938 * cfgloopmanip.h (adjust_loop_info_after_peeling): Declare.
31939 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Fix updating of
31940 loop profile and bounds after header duplication.
31941 * tree-ssa-loop-ivcanon.cc (adjust_loop_info_after_peeling):
31942 Break out from try_peel_loop; fix handling of 0 iterations.
31943 (try_peel_loop): Use adjust_loop_info_after_peeling.
31945 2023-04-21 Andrew MacLeod <amacleod@redhat.com>
31947 PR tree-optimization/109546
31948 * tree-vrp.cc (remove_unreachable::remove_and_update_globals): Do
31949 not fold conditions with ADDR_EXPR early.
31951 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31953 * config/aarch64/aarch64.md (aarch64_umax<mode>3_insn): Delete.
31954 (umax<mode>3): Emit raw UMAX RTL instead of going through gen_ function
31956 (<optab><mode>3): New define_expand for MAXMIN_NOUMAX codes.
31957 (*aarch64_<optab><mode>3_zero): Define.
31958 (*aarch64_<optab><mode>3_cssc): Likewise.
31959 * config/aarch64/iterators.md (maxminand): New code attribute.
31961 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31964 * config/aarch64/aarch64-opts.h (enum aarch64_tp_reg): Define.
31965 * config/aarch64/aarch64-protos.h (aarch64_output_load_tp):
31967 * config/aarch64/aarch64.cc (aarch64_tpidr_register): Declare.
31968 (aarch64_override_options_internal): Handle the above.
31969 (aarch64_output_load_tp): New function.
31970 * config/aarch64/aarch64.md (aarch64_load_tp_hard): Call
31971 aarch64_output_load_tp.
31972 * config/aarch64/aarch64.opt (aarch64_tp_reg): Define enum.
31973 (mtp=): New option.
31974 * doc/invoke.texi (AArch64 Options): Document -mtp=.
31976 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31979 * config/aarch64/aarch64-simd.md (add_vec_concat_subst_le): Define.
31980 (add_vec_concat_subst_be): Likewise.
31983 (add<mode>3): Rename to...
31984 (add<mode>3<vczle><vczbe>): ... This.
31985 (sub<mode>3): Rename to...
31986 (sub<mode>3<vczle><vczbe>): ... This.
31987 (mul<mode>3): Rename to...
31988 (mul<mode>3<vczle><vczbe>): ... This.
31989 (and<mode>3): Rename to...
31990 (and<mode>3<vczle><vczbe>): ... This.
31991 (ior<mode>3): Rename to...
31992 (ior<mode>3<vczle><vczbe>): ... This.
31993 (xor<mode>3): Rename to...
31994 (xor<mode>3<vczle><vczbe>): ... This.
31995 * config/aarch64/iterators.md (VDZ): Define.
31997 2023-04-21 Patrick Palka <ppalka@redhat.com>
31999 * tree.cc (walk_tree_1): Avoid repeatedly dereferencing tp
32002 2023-04-21 Jan Hubicka <jh@suse.cz>
32004 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Fix previous
32007 2023-04-21 Vineet Gupta <vineetg@rivosinc.com>
32009 * expmed.h (x_shift*_cost): convert to int [speed][mode][shift].
32010 (shift*_cost_ptr ()): Access x_shift*_cost array directly.
32012 2023-04-21 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
32014 * config/aarch64/aarch64.cc (aarch64_simd_dup_constant): Use
32015 force_reg instead of copy_to_mode_reg.
32016 (aarch64_expand_vector_init): Likewise.
32018 2023-04-21 Uroš Bizjak <ubizjak@gmail.com>
32020 * config/i386/i386.h (REG_OK_FOR_INDEX_P, REG_OK_FOR_BASE_P): Remove.
32021 (REG_OK_FOR_INDEX_NONSTRICT_P, REG_OK_FOR_BASE_NONSTRICT_P): Ditto.
32022 (REG_OK_FOR_INDEX_STRICT_P, REG_OK_FOR_BASE_STRICT_P): Ditto.
32023 (FIRST_INDEX_REG, LAST_INDEX_REG): New defines.
32024 (LEGACY_INDEX_REG_P, LEGACY_INDEX_REGNO_P): New macros.
32025 (INDEX_REG_P, INDEX_REGNO_P): Ditto.
32026 (REGNO_OK_FOR_INDEX_P): Use INDEX_REGNO_P predicates.
32027 (REGNO_OK_FOR_INDEX_NONSTRICT_P): New macro.
32028 (EG_OK_FOR_BASE_NONSTRICT_P): Ditto.
32029 * config/i386/predicates.md (index_register_operand):
32030 Use REGNO_OK_FOR_INDEX_P and REGNO_OK_FOR_INDEX_NONSTRICT_P macros.
32031 * config/i386/i386.cc (ix86_legitimate_address_p): Use
32032 REGNO_OK_FOR_BASE_P, REGNO_OK_FOR_BASE_NONSTRICT_P,
32033 REGNO_OK_FOR_INDEX_P and REGNO_OK_FOR_INDEX_NONSTRICT_P macros.
32035 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
32036 Ondrej Kubanek <kubanek0ondrej@gmail.com>
32038 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Update loop header and
32041 2023-04-21 Richard Biener <rguenther@suse.de>
32043 * is-a.h (safe_is_a): New.
32045 2023-04-21 Richard Biener <rguenther@suse.de>
32047 * gimple-iterator.h (gimple_stmt_iterator::operator*): Add.
32048 (gphi_iterator::operator*): Likewise.
32050 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
32051 Michal Jires <michal@jires.eu>
32053 * ipa-inline.cc (class inline_badness): New class.
32054 (edge_heap_t, edge_heap_node_t): Use inline_badness for badness instead
32056 (update_edge_key): Update.
32057 (lookup_recursive_calls): Likewise.
32058 (recursive_inlining): Likewise.
32059 (add_new_edges_to_heap): Likewise.
32060 (inline_small_functions): Likewise.
32062 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
32064 * ipa-devirt.cc (odr_types_equivalent_p): Cleanup warned checks.
32066 2023-04-21 Richard Biener <rguenther@suse.de>
32068 PR tree-optimization/109573
32069 * tree-vect-loop.cc (vectorizable_live_operation): Allow
32070 unhandled SSA copy as well. Demote assert to checking only.
32072 2023-04-21 Richard Biener <rguenther@suse.de>
32074 * df-core.cc (df_analyze): Compute RPO on the reverse graph
32075 for DF_BACKWARD problems.
32076 (loop_post_order_compute): Rename to ...
32077 (loop_rev_post_order_compute): ... this, compute a RPO.
32078 (loop_inverted_post_order_compute): Rename to ...
32079 (loop_inverted_rev_post_order_compute): ... this, compute a RPO.
32080 (df_analyze_loop): Use RPO on the forward graph for DF_FORWARD
32081 problems, RPO on the inverted graph for DF_BACKWARD.
32083 2023-04-21 Richard Biener <rguenther@suse.de>
32085 * cfganal.h (inverted_rev_post_order_compute): Rename
32087 (inverted_post_order_compute): ... this. Add struct function
32088 argument, change allocation to a C array.
32089 * cfganal.cc (inverted_rev_post_order_compute): Likewise.
32090 * lcm.cc (compute_antinout_edge): Adjust.
32091 * lra-lives.cc (lra_create_live_ranges_1): Likewise.
32092 * tree-ssa-dce.cc (remove_dead_stmt): Likewise.
32093 * tree-ssa-pre.cc (compute_antic): Likewise.
32095 2023-04-21 Richard Biener <rguenther@suse.de>
32097 * df.h (df_d::postorder_inverted): Change back to int *,
32099 * df-core.cc (rest_of_handle_df_finish): Adjust.
32100 (df_analyze_1): Likewise.
32101 (df_analyze): For DF_FORWARD problems use RPO on the forward
32103 (loop_inverted_post_order_compute): Adjust API.
32104 (df_analyze_loop): Adjust.
32105 (df_get_n_blocks): Likewise.
32106 (df_get_postorder): Likewise.
32108 2023-04-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32111 * config/riscv/riscv-vsetvl.cc
32112 (vector_infos_manager::all_empty_predecessor_p): New function.
32113 (pass_vsetvl::backward_demand_fusion): Ditto.
32114 * config/riscv/riscv-vsetvl.h: Ditto.
32116 2023-04-21 Robin Dapp <rdapp@ventanamicro.com>
32119 * config/riscv/generic.md: Change standard names to insn names.
32121 2023-04-21 Richard Biener <rguenther@suse.de>
32123 * lcm.cc (compute_antinout_edge): Use RPO on the inverted graph.
32124 (compute_laterin): Use RPO.
32125 (compute_available): Likewise.
32127 2023-04-21 Peng Fan <fanpeng@loongson.cn>
32129 * config/loongarch/gnu-user.h (MUSL_DYNAMIC_LINKER): Redefine.
32131 2023-04-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32134 * config/riscv/riscv-vsetvl.cc (local_eliminate_vsetvl_insn): New function.
32135 (vector_insn_info::skip_avl_compatible_p): Ditto.
32136 (vector_insn_info::merge): Remove default value.
32137 (pass_vsetvl::compute_local_backward_infos): Ditto.
32138 (pass_vsetvl::cleanup_insns): Add local vsetvl elimination.
32139 * config/riscv/riscv-vsetvl.h: Ditto.
32141 2023-04-20 Alejandro Colomar <alx.manpages@gmail.com>
32143 * doc/extend.texi (Common Function Attributes): Remove duplicate
32146 2023-04-20 Andrew MacLeod <amacleod@redhat.com>
32148 PR tree-optimization/109564
32149 * gimple-range-fold.cc (fold_using_range::range_of_phi): Do no ignore
32150 UNDEFINED range names when deciding if all PHI arguments are the same,
32152 2023-04-20 Jakub Jelinek <jakub@redhat.com>
32154 PR tree-optimization/109011
32155 * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern): Use
32156 .CTZ (X) = .POPCOUNT ((X - 1) & ~X) in preference to
32157 .CTZ (X) = PREC - .POPCOUNT (X | -X).
32159 2023-04-20 Vladimir N. Makarov <vmakarov@redhat.com>
32161 * lra-constraints.cc (match_reload): Exclude some hard regs for
32162 multi-reg inout reload pseudos used in asm in different mode.
32164 2023-04-20 Uros Bizjak <ubizjak@gmail.com>
32166 * config/arm/arm.cc (thumb1_legitimate_address_p):
32167 Use VIRTUAL_REGISTER_P predicate.
32168 (arm_eliminable_register): Ditto.
32169 * config/avr/avr.md (push<mode>_1): Ditto.
32170 * config/bfin/predicates.md (register_no_elim_operand): Ditto.
32171 * config/h8300/predicates.md (register_no_sp_elim_operand): Ditto.
32172 * config/i386/predicates.md (register_no_elim_operand): Ditto.
32173 * config/iq2000/predicates.md (call_insn_operand): Ditto.
32174 * config/microblaze/microblaze.h (CALL_INSN_OP): Ditto.
32176 2023-04-20 Uros Bizjak <ubizjak@gmail.com>
32179 * config/i386/predicates.md (extract_operator): New predicate.
32180 * config/i386/i386.md (any_extract): Remove code iterator.
32181 (*cmpqi_ext<mode>_1_mem_rex64): Use extract_operator predicate.
32182 (*cmpqi_ext<mode>_1): Ditto.
32183 (*cmpqi_ext<mode>_2): Ditto.
32184 (*cmpqi_ext<mode>_3_mem_rex64): Ditto.
32185 (*cmpqi_ext<mode>_3): Ditto.
32186 (*cmpqi_ext<mode>_4): Ditto.
32187 (*extzvqi_mem_rex64): Ditto.
32189 (*insvqi_2): Ditto.
32190 (*extendqi<SWI24:mode>_ext_1): Ditto.
32191 (*addqi_ext<mode>_0): Ditto.
32192 (*addqi_ext<mode>_1): Ditto.
32193 (*addqi_ext<mode>_2): Ditto.
32194 (*subqi_ext<mode>_0): Ditto.
32195 (*subqi_ext<mode>_2): Ditto.
32196 (*testqi_ext<mode>_1): Ditto.
32197 (*testqi_ext<mode>_2): Ditto.
32198 (*andqi_ext<mode>_0): Ditto.
32199 (*andqi_ext<mode>_1): Ditto.
32200 (*andqi_ext<mode>_1_cc): Ditto.
32201 (*andqi_ext<mode>_2): Ditto.
32202 (*<any_or:code>qi_ext<mode>_0): Ditto.
32203 (*<any_or:code>qi_ext<mode>_1): Ditto.
32204 (*<any_or:code>qi_ext<mode>_2): Ditto.
32205 (*xorqi_ext<mode>_1_cc): Ditto.
32206 (*negqi_ext<mode>_2): Ditto.
32207 (*ashlqi_ext<mode>_2): Ditto.
32208 (*<any_shiftrt:insn>qi_ext<mode>_2): Ditto.
32210 2023-04-20 Raphael Zinsly <rzinsly@ventanamicro.com>
32213 * config/riscv/bitmanip.md (clz, ctz, pcnt, min, max patterns): Use
32214 <bitmanip_insn> as the type to allow for fine grained control of
32215 scheduling these insns.
32216 * config/riscv/generic.md (generic_alu): Add bitmanip, clz, ctz, pcnt,
32218 * config/riscv/riscv.md (type attribute): Add types for clz, ctz,
32219 pcnt, signed and unsigned min/max.
32221 2023-04-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32222 kito-cheng <kito.cheng@sifive.com>
32224 * config/riscv/riscv.h (enum reg_class): Fix RVV register order.
32226 2023-04-20 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32227 kito-cheng <kito.cheng@sifive.com>
32230 * config/riscv/riscv-vsetvl.cc (count_regno_occurrences): New function.
32231 (pass_vsetvl::cleanup_insns): Fix bug.
32233 2023-04-20 Andrew Stubbs <ams@codesourcery.com>
32235 * config/gcn/gcn-valu.md (vnsi, VnSI): Add scalar modes.
32236 (ldexp<mode>3): Delete.
32237 (ldexp<mode>3<exec>): Change "B" to "A".
32239 2023-04-20 Jakub Jelinek <jakub@redhat.com>
32240 Jonathan Wakely <jwakely@redhat.com>
32242 * tree.h (built_in_function_equal_p): New helper function.
32243 (fndecl_built_in_p): Turn into variadic template to support
32244 1 or more built_in_function arguments.
32245 * builtins.cc (fold_builtin_expect): Use 3 argument fndecl_built_in_p.
32246 * gimplify.cc (goa_stabilize_expr): Likewise.
32247 * cgraphclones.cc (cgraph_node::create_clone): Likewise.
32248 * ipa-fnsummary.cc (compute_fn_summary): Likewise.
32249 * omp-low.cc (setjmp_or_longjmp_p): Likewise.
32250 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee,
32251 cgraph_update_edges_for_call_stmt_node,
32252 cgraph_edge::verify_corresponds_to_fndecl,
32253 cgraph_node::verify_node): Likewise.
32254 * tree-stdarg.cc (optimize_va_list_gpr_fpr_size): Likewise.
32255 * gimple-ssa-warn-access.cc (matching_alloc_calls_p): Likewise.
32256 * ipa-prop.cc (try_make_edge_direct_virtual_call): Likewise.
32258 2023-04-20 Jakub Jelinek <jakub@redhat.com>
32260 PR tree-optimization/109011
32261 * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern): New function.
32262 (vect_recog_popcount_clz_ctz_ffs_pattern): Move vect_pattern_detected
32263 call later. Don't punt for IFN_CTZ or IFN_FFS if it doesn't have
32264 direct optab support, but has instead IFN_CLZ, IFN_POPCOUNT or
32265 for IFN_FFS IFN_CTZ support, use vect_recog_ctz_ffs_pattern for that
32267 (vect_vect_recog_func_ptrs): Add ctz_ffs entry.
32269 2023-04-20 Richard Biener <rguenther@suse.de>
32271 * df-core.cc (rest_of_handle_df_initialize): Remove
32272 computation of df->postorder, df->postorder_inverted and
32275 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
32277 * common/config/i386/i386-common.cc
32278 (OPTION_MASK_ISA2_AVX_UNSET): Add OPTION_MASK_ISA2_VAES_UNSET.
32279 (ix86_handle_option): Set AVX flag for VAES.
32280 * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
32281 Add OPTION_MASK_ISA2_VAES_UNSET.
32282 (def_builtin): Share builtin between AES and VAES.
32283 * config/i386/i386-expand.cc (ix86_check_builtin_isa_match):
32285 * config/i386/i386.md (aes): New isa attribute.
32286 * config/i386/sse.md (aesenc): Add pattern for VAES with xmm.
32287 (aesenclast): Ditto.
32289 (aesdeclast): Ditto.
32290 * config/i386/vaesintrin.h: Remove redundant avx target push.
32291 * config/i386/wmmintrin.h (_mm_aesdec_si128): Change to macro.
32292 (_mm_aesdeclast_si128): Ditto.
32293 (_mm_aesenc_si128): Ditto.
32294 (_mm_aesenclast_si128): Ditto.
32296 2023-04-20 Hu, Lin1 <lin1.hu@intel.com>
32298 * config/i386/avx2intrin.h
32299 (_MM_REDUCE_OPERATOR_BASIC_EPI16): New macro.
32300 (_MM_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto.
32301 (_MM256_REDUCE_OPERATOR_BASIC_EPI16): Ditto.
32302 (_MM256_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto.
32303 (_MM_REDUCE_OPERATOR_BASIC_EPI8): Ditto.
32304 (_MM_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto.
32305 (_MM256_REDUCE_OPERATOR_BASIC_EPI8): Ditto.
32306 (_MM256_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto.
32307 (_mm_reduce_add_epi16): New instrinsics.
32308 (_mm_reduce_mul_epi16): Ditto.
32309 (_mm_reduce_and_epi16): Ditto.
32310 (_mm_reduce_or_epi16): Ditto.
32311 (_mm_reduce_max_epi16): Ditto.
32312 (_mm_reduce_max_epu16): Ditto.
32313 (_mm_reduce_min_epi16): Ditto.
32314 (_mm_reduce_min_epu16): Ditto.
32315 (_mm256_reduce_add_epi16): Ditto.
32316 (_mm256_reduce_mul_epi16): Ditto.
32317 (_mm256_reduce_and_epi16): Ditto.
32318 (_mm256_reduce_or_epi16): Ditto.
32319 (_mm256_reduce_max_epi16): Ditto.
32320 (_mm256_reduce_max_epu16): Ditto.
32321 (_mm256_reduce_min_epi16): Ditto.
32322 (_mm256_reduce_min_epu16): Ditto.
32323 (_mm_reduce_add_epi8): Ditto.
32324 (_mm_reduce_mul_epi8): Ditto.
32325 (_mm_reduce_and_epi8): Ditto.
32326 (_mm_reduce_or_epi8): Ditto.
32327 (_mm_reduce_max_epi8): Ditto.
32328 (_mm_reduce_max_epu8): Ditto.
32329 (_mm_reduce_min_epi8): Ditto.
32330 (_mm_reduce_min_epu8): Ditto.
32331 (_mm256_reduce_add_epi8): Ditto.
32332 (_mm256_reduce_mul_epi8): Ditto.
32333 (_mm256_reduce_and_epi8): Ditto.
32334 (_mm256_reduce_or_epi8): Ditto.
32335 (_mm256_reduce_max_epi8): Ditto.
32336 (_mm256_reduce_max_epu8): Ditto.
32337 (_mm256_reduce_min_epi8): Ditto.
32338 (_mm256_reduce_min_epu8): Ditto.
32339 * config/i386/avx512vlbwintrin.h:
32340 (_mm_mask_reduce_add_epi16): Ditto.
32341 (_mm_mask_reduce_mul_epi16): Ditto.
32342 (_mm_mask_reduce_and_epi16): Ditto.
32343 (_mm_mask_reduce_or_epi16): Ditto.
32344 (_mm_mask_reduce_max_epi16): Ditto.
32345 (_mm_mask_reduce_max_epu16): Ditto.
32346 (_mm_mask_reduce_min_epi16): Ditto.
32347 (_mm_mask_reduce_min_epu16): Ditto.
32348 (_mm256_mask_reduce_add_epi16): Ditto.
32349 (_mm256_mask_reduce_mul_epi16): Ditto.
32350 (_mm256_mask_reduce_and_epi16): Ditto.
32351 (_mm256_mask_reduce_or_epi16): Ditto.
32352 (_mm256_mask_reduce_max_epi16): Ditto.
32353 (_mm256_mask_reduce_max_epu16): Ditto.
32354 (_mm256_mask_reduce_min_epi16): Ditto.
32355 (_mm256_mask_reduce_min_epu16): Ditto.
32356 (_mm_mask_reduce_add_epi8): Ditto.
32357 (_mm_mask_reduce_mul_epi8): Ditto.
32358 (_mm_mask_reduce_and_epi8): Ditto.
32359 (_mm_mask_reduce_or_epi8): Ditto.
32360 (_mm_mask_reduce_max_epi8): Ditto.
32361 (_mm_mask_reduce_max_epu8): Ditto.
32362 (_mm_mask_reduce_min_epi8): Ditto.
32363 (_mm_mask_reduce_min_epu8): Ditto.
32364 (_mm256_mask_reduce_add_epi8): Ditto.
32365 (_mm256_mask_reduce_mul_epi8): Ditto.
32366 (_mm256_mask_reduce_and_epi8): Ditto.
32367 (_mm256_mask_reduce_or_epi8): Ditto.
32368 (_mm256_mask_reduce_max_epi8): Ditto.
32369 (_mm256_mask_reduce_max_epu8): Ditto.
32370 (_mm256_mask_reduce_min_epi8): Ditto.
32371 (_mm256_mask_reduce_min_epu8): Ditto.
32373 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
32375 * common/config/i386/i386-common.cc
32376 (OPTION_MASK_ISA_VPCLMULQDQ_SET):
32377 Add OPTION_MASK_ISA_PCLMUL_SET and OPTION_MASK_ISA_AVX_SET.
32378 (OPTION_MASK_ISA_AVX_UNSET):
32379 Add OPTION_MASK_ISA_VPCLMULQDQ_UNSET.
32380 (OPTION_MASK_ISA_PCLMUL_UNSET): Ditto.
32381 * config/i386/i386.md (vpclmulqdqvl): New.
32382 * config/i386/sse.md (pclmulqdq): Add evex encoding.
32383 * config/i386/vpclmulqdqintrin.h: Remove redudant avx target
32386 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
32388 * config/i386/avx512vlbwintrin.h
32389 (_mm_mask_blend_epi16): Remove __OPTIMIZE__ wrapper.
32390 (_mm_mask_blend_epi8): Ditto.
32391 (_mm256_mask_blend_epi16): Ditto.
32392 (_mm256_mask_blend_epi8): Ditto.
32393 * config/i386/avx512vlintrin.h
32394 (_mm256_mask_blend_pd): Ditto.
32395 (_mm256_mask_blend_ps): Ditto.
32396 (_mm256_mask_blend_epi64): Ditto.
32397 (_mm256_mask_blend_epi32): Ditto.
32398 (_mm_mask_blend_pd): Ditto.
32399 (_mm_mask_blend_ps): Ditto.
32400 (_mm_mask_blend_epi64): Ditto.
32401 (_mm_mask_blend_epi32): Ditto.
32402 * config/i386/sse.md (VF_AVX512BWHFBF16): Removed.
32403 (VF_AVX512HFBFVL): Move it before the first usage.
32404 (<avx512>_blendm<mode>): Change iterator from VF_AVX512BWHFBF16
32405 to VF_AVX512HFBFVL.
32407 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
32409 * common/config/i386/i386-common.cc
32410 (OPTION_MASK_ISA_AVX512VBMI2_SET): Change OPTION_MASK_ISA_AVX512F_SET
32411 to OPTION_MASK_ISA_AVX512BW_SET.
32412 (OPTION_MASK_ISA_AVX512F_UNSET):
32413 Remove OPTION_MASK_ISA_AVX512VBMI2_UNSET.
32414 (OPTION_MASK_ISA_AVX512BW_UNSET):
32415 Add OPTION_MASK_ISA_AVX512VBMI2_UNSET.
32416 * config/i386/avx512vbmi2intrin.h: Do not push avx512bw.
32417 * config/i386/avx512vbmi2vlintrin.h: Ditto.
32418 * config/i386/i386-builtin.def: Remove OPTION_MASK_ISA_AVX512BW.
32419 * config/i386/sse.md (VI12_AVX512VLBW): Removed.
32420 (VI12_VI48F_AVX512VLBW): Rename to VI12_VI48F_AVX512VL.
32421 (compress<mode>_mask): Change iterator from VI12_AVX512VLBW to
32423 (compressstore<mode>_mask): Ditto.
32424 (expand<mode>_mask): Ditto.
32425 (expand<mode>_maskz): Ditto.
32426 (*expand<mode>_mask): Change iterator from VI12_VI48F_AVX512VLBW to
32427 VI12_VI48F_AVX512VL.
32429 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
32431 * common/config/i386/i386-common.cc
32432 (OPTION_MASK_ISA_AVX512BITALG_SET):
32433 Change OPTION_MASK_ISA_AVX512F_SET
32434 to OPTION_MASK_ISA_AVX512BW_SET.
32435 (OPTION_MASK_ISA_AVX512F_UNSET):
32436 Remove OPTION_MASK_ISA_AVX512BITALG_SET.
32437 (OPTION_MASK_ISA_AVX512BW_UNSET):
32438 Add OPTION_MASK_ISA_AVX512BITALG_SET.
32439 * config/i386/avx512bitalgintrin.h: Do not push avx512bw.
32440 * config/i386/i386-builtin.def:
32441 Remove redundant OPTION_MASK_ISA_AVX512BW.
32442 * config/i386/sse.md (VI1_AVX512VLBW): Removed.
32443 (avx512vl_vpshufbitqmb<mode><mask_scalar_merge_name>):
32444 Change the iterator from VI1_AVX512VLBW to VI1_AVX512VL.
32446 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
32448 * config/i386/i386-expand.cc
32449 (ix86_check_builtin_isa_match): Correct wrong comments.
32450 Add a new macro SHARE_BUILTIN and refactor the current if
32453 2023-04-20 Mo, Zewei <zewei.mo@intel.com>
32455 * config/i386/cpuid.h: Open a new section for Extended Features
32456 Leaf (%eax == 7, %ecx == 0) and Extended Features Sub-leaf (%eax == 7,
32459 2023-04-20 Hu, Lin1 <lin1.hu@intel.com>
32461 * config/i386/sse.md: Modify insn vperm{i,f}
32464 2023-04-19 Max Filippov <jcmvbkbc@gmail.com>
32466 * config/xtensa/xtensa-opts.h: New header.
32467 * config/xtensa/xtensa.h (STRICT_ALIGNMENT): Redefine as
32468 xtensa_strict_align.
32469 * config/xtensa/xtensa.cc (xtensa_option_override): When
32470 -m[no-]strict-align is not specified in the command line set
32471 xtensa_strict_align to 0 if the hardware supports both unaligned
32472 loads and stores or to 1 otherwise.
32473 * config/xtensa/xtensa.opt (mstrict-align): New option.
32474 * doc/invoke.texi (Xtensa Options): Document -m[no-]strict-align.
32476 2023-04-19 Max Filippov <jcmvbkbc@gmail.com>
32478 * config/xtensa/xtensa-dynconfig.cc (xtensa_get_config_v4): New
32481 2023-04-19 Andrew Pinski <apinski@marvell.com>
32483 * config/i386/i386.md (*movsicc_noc_zext_1): New pattern.
32485 2023-04-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32487 * config/riscv/riscv-modes.def (FLOAT_MODE): Add chunk 128 support.
32488 (VECTOR_BOOL_MODE): Ditto.
32489 (ADJUST_NUNITS): Ditto.
32490 (ADJUST_ALIGNMENT): Ditto.
32491 (ADJUST_BYTESIZE): Ditto.
32492 (ADJUST_PRECISION): Ditto.
32493 (RVV_MODES): Ditto.
32494 (VECTOR_MODE_WITH_PREFIX): Ditto.
32495 * config/riscv/riscv-v.cc (ENTRY): Ditto.
32496 (get_vlmul): Ditto.
32497 (get_ratio): Ditto.
32498 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
32499 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): Ditto.
32500 (vbool64_t): Ditto.
32501 (vbool32_t): Ditto.
32502 (vbool16_t): Ditto.
32507 (vint8mf8_t): Ditto.
32508 (vuint8mf8_t): Ditto.
32509 (vint8mf4_t): Ditto.
32510 (vuint8mf4_t): Ditto.
32511 (vint8mf2_t): Ditto.
32512 (vuint8mf2_t): Ditto.
32513 (vint8m1_t): Ditto.
32514 (vuint8m1_t): Ditto.
32515 (vint8m2_t): Ditto.
32516 (vuint8m2_t): Ditto.
32517 (vint8m4_t): Ditto.
32518 (vuint8m4_t): Ditto.
32519 (vint8m8_t): Ditto.
32520 (vuint8m8_t): Ditto.
32521 (vint16mf4_t): Ditto.
32522 (vuint16mf4_t): Ditto.
32523 (vint16mf2_t): Ditto.
32524 (vuint16mf2_t): Ditto.
32525 (vint16m1_t): Ditto.
32526 (vuint16m1_t): Ditto.
32527 (vint16m2_t): Ditto.
32528 (vuint16m2_t): Ditto.
32529 (vint16m4_t): Ditto.
32530 (vuint16m4_t): Ditto.
32531 (vint16m8_t): Ditto.
32532 (vuint16m8_t): Ditto.
32533 (vint32mf2_t): Ditto.
32534 (vuint32mf2_t): Ditto.
32535 (vint32m1_t): Ditto.
32536 (vuint32m1_t): Ditto.
32537 (vint32m2_t): Ditto.
32538 (vuint32m2_t): Ditto.
32539 (vint32m4_t): Ditto.
32540 (vuint32m4_t): Ditto.
32541 (vint32m8_t): Ditto.
32542 (vuint32m8_t): Ditto.
32543 (vint64m1_t): Ditto.
32544 (vuint64m1_t): Ditto.
32545 (vint64m2_t): Ditto.
32546 (vuint64m2_t): Ditto.
32547 (vint64m4_t): Ditto.
32548 (vuint64m4_t): Ditto.
32549 (vint64m8_t): Ditto.
32550 (vuint64m8_t): Ditto.
32551 (vfloat32mf2_t): Ditto.
32552 (vfloat32m1_t): Ditto.
32553 (vfloat32m2_t): Ditto.
32554 (vfloat32m4_t): Ditto.
32555 (vfloat32m8_t): Ditto.
32556 (vfloat64m1_t): Ditto.
32557 (vfloat64m2_t): Ditto.
32558 (vfloat64m4_t): Ditto.
32559 (vfloat64m8_t): Ditto.
32560 * config/riscv/riscv-vector-switch.def (ENTRY): Ditto.
32561 * config/riscv/riscv.cc (riscv_legitimize_poly_move): Ditto.
32562 (riscv_convert_vector_bits): Ditto.
32563 * config/riscv/riscv.md:
32564 * config/riscv/vector-iterators.md:
32565 * config/riscv/vector.md
32566 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
32567 (@pred_indexed_<order>store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
32568 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
32569 (@pred_indexed_<order>store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
32570 (@pred_indexed_<order>store<VNX128_Q:mode><VNX128_Q:mode>): Ditto.
32571 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Ditto.
32572 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve64>): Ditto.
32573 (@pred_reduc_plus<order><mode><vlmul1_zve64>): Ditto.
32574 (@pred_widen_reduc_plus<order><mode><vwlmul1_zve64>): Ditto.
32576 2023-04-19 Pan Li <pan2.li@intel.com>
32578 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
32579 Align IOR (A | (~A) -> -1) optimization MODE_CLASS condition to AND.
32581 2023-04-19 Uros Bizjak <ubizjak@gmail.com>
32585 * config/i386/i386.md (*cmpqi_ext<mode>_1_mem_rex64): New insn pattern.
32586 (*cmpqi_ext<mode>_1): Use nonimmediate_operand predicate
32587 for operand 0. Use any_extract code iterator.
32588 (*cmpqi_ext<mode>_1 peephole2): New peephole2 pattern.
32589 (*cmpqi_ext<mode>_2): Use any_extract code iterator.
32590 (*cmpqi_ext<mode>_3_mem_rex64): New insn pattern.
32591 (*cmpqi_ext<mode>_1): Use general_operand predicate
32592 for operand 1. Use any_extract code iterator.
32593 (*cmpqi_ext<mode>_3 peephole2): New peephole2 pattern.
32594 (*cmpqi_ext<mode>_4): Use any_extract code iterator.
32596 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32598 * config/aarch64/aarch64-simd.md (aarch64_saddw2<mode>): Delete.
32599 (aarch64_uaddw2<mode>): Delete.
32600 (aarch64_ssubw2<mode>): Delete.
32601 (aarch64_usubw2<mode>): Delete.
32602 (aarch64_<ANY_EXTEND:su><ADDSUB:optab>w2<mode>): New define_expand.
32604 2023-04-19 Richard Biener <rguenther@suse.de>
32606 * tree-ssa-structalias.cc (do_ds_constraint): Use
32607 solve_add_graph_edge.
32609 2023-04-19 Richard Biener <rguenther@suse.de>
32611 * tree-ssa-structalias.cc (solve_add_graph_edge): New function,
32613 (do_sd_constraint): ... here.
32615 2023-04-19 Richard Biener <rguenther@suse.de>
32617 * tree-cfg.cc (gimple_can_merge_blocks_p): Remove condition
32618 rejecting the merge when A contains only a non-local label.
32620 2023-04-19 Uros Bizjak <ubizjak@gmail.com>
32622 * rtl.h (VIRTUAL_REGISTER_P): New predicate.
32623 (VIRTUAL_REGISTER_NUM_P): Ditto.
32624 (REGNO_PTR_FRAME_P): Use VIRTUAL_REGISTER_NUM_P predicate.
32625 * expr.cc (force_operand): Use VIRTUAL_REGISTER_P predicate.
32626 * function.cc (instantiate_decl_rtl): Ditto.
32627 * rtlanal.cc (rtx_addr_can_trap_p_1): Ditto.
32628 (nonzero_address_p): Ditto.
32629 (refers_to_regno_p): Use VIRTUAL_REGISTER_NUM_P predicate.
32631 2023-04-19 Aldy Hernandez <aldyh@redhat.com>
32633 * value-range.h (Value_Range::Value_Range): Avoid pointer sharing.
32635 2023-04-19 Richard Biener <rguenther@suse.de>
32637 * system.h (auto_mpz::operator->()): New.
32638 * realmpfr.h (auto_mpfr::operator->()): New.
32639 * builtins.cc (do_mpfr_lgamma_r): Use auto_mpfr.
32640 * real.cc (real_from_string): Likewise.
32641 (dconst_e_ptr): Likewise.
32642 (dconst_sqrt2_ptr): Likewise.
32643 * tree-ssa-loop-niter.cc (refine_value_range_using_guard):
32645 (bound_difference_of_offsetted_base): Likewise.
32646 (number_of_iterations_ne): Likewise.
32647 (number_of_iterations_lt_to_ne): Likewise.
32648 * ubsan.cc: Include realmpfr.h.
32649 (ubsan_instrument_float_cast): Use auto_mpfr.
32651 2023-04-19 Richard Biener <rguenther@suse.de>
32653 * tree-ssa-structalias.cc (solve_graph): Remove self-copy
32654 edges, remove edges from escaped after special-casing them.
32656 2023-04-19 Richard Biener <rguenther@suse.de>
32658 * tree-ssa-structalias.cc (do_sd_constraint): Fixup escape
32661 2023-04-19 Richard Biener <rguenther@suse.de>
32663 * tree-ssa-structalias.cc (do_sd_constraint): Do not write
32664 to the LHS varinfo solution member.
32666 2023-04-19 Richard Biener <rguenther@suse.de>
32668 * tree-ssa-structalias.cc (topo_visit): Look at the real
32669 destination of edges.
32671 2023-04-19 Richard Biener <rguenther@suse.de>
32673 PR tree-optimization/44794
32674 * tree-ssa-loop-manip.cc (tree_transform_and_unroll_loop):
32675 If an epilogue loop is required set its iteration upper bound.
32677 2023-04-19 Xi Ruoyao <xry111@xry111.site>
32680 * config/loongarch/loongarch-protos.h
32681 (loongarch_expand_block_move): Add a parameter as alignment RTX.
32682 * config/loongarch/loongarch.h:
32683 (LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER): Remove.
32684 (LARCH_MAX_MOVE_BYTES_STRAIGHT): Remove.
32685 (LARCH_MAX_MOVE_OPS_PER_LOOP_ITER): Define.
32686 (LARCH_MAX_MOVE_OPS_STRAIGHT): Define.
32687 (MOVE_RATIO): Use LARCH_MAX_MOVE_OPS_PER_LOOP_ITER instead of
32688 LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER.
32689 * config/loongarch/loongarch.cc (loongarch_expand_block_move):
32690 Take the alignment from the parameter, but set it to
32691 UNITS_PER_WORD if !TARGET_STRICT_ALIGN. Limit the length of
32692 straight-line implementation with LARCH_MAX_MOVE_OPS_STRAIGHT
32693 instead of LARCH_MAX_MOVE_BYTES_STRAIGHT.
32694 (loongarch_block_move_straight): When there are left-over bytes,
32695 half the mode size instead of falling back to byte mode at once.
32696 (loongarch_block_move_loop): Limit the length of loop body with
32697 LARCH_MAX_MOVE_OPS_PER_LOOP_ITER instead of
32698 LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER.
32699 * config/loongarch/loongarch.md (cpymemsi): Pass the alignment
32700 to loongarch_expand_block_move.
32702 2023-04-19 Xi Ruoyao <xry111@xry111.site>
32704 * config/loongarch/loongarch.cc
32705 (loongarch_setup_incoming_varargs): Don't save more GARs than
32706 cfun->va_list_gpr_size / UNITS_PER_WORD.
32708 2023-04-19 Richard Biener <rguenther@suse.de>
32710 * tree-ssa-loop-manip.cc (determine_exit_conditions): Fix
32711 no epilogue condition.
32713 2023-04-19 Richard Biener <rguenther@suse.de>
32715 * gimple.h (gimple_assign_load): Outline...
32716 * gimple.cc (gimple_assign_load): ... here. Avoid
32717 get_base_address and instead just strip the outermost
32718 handled component, treating a remaining handled component
32721 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32723 * config/aarch64/aarch64-simd-builtins.def (neg): Delete builtins
32725 * config/aarch64/arm_fp16.h (vnegh_f16): Reimplement using normal negation.
32727 2023-04-19 Jakub Jelinek <jakub@redhat.com>
32729 PR tree-optimization/109011
32730 * tree-vect-patterns.cc (vect_recog_popcount_pattern): Rename to ...
32731 (vect_recog_popcount_clz_ctz_ffs_pattern): ... this. Handle also
32732 CLZ, CTZ and FFS. Remove vargs variable, use
32733 gimple_build_call_internal rather than gimple_build_call_internal_vec.
32734 (vect_vect_recog_func_ptrs): Adjust popcount entry.
32736 2023-04-19 Jakub Jelinek <jakub@redhat.com>
32739 * dse.cc (replace_read): If read_reg is a SUBREG of a word mode
32740 REG, for WORD_REGISTER_OPERATIONS copy SUBREG_REG of it into
32741 a new REG rather than the SUBREG.
32743 2023-04-19 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
32745 * config/aarch64/aarch64-simd.md (aarch64_simd_vec_set_zero<mode>):
32748 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32751 * config/aarch64/aarch64.cc (aarch64_rtx_costs): Merge ASHIFT and
32752 ROTATE, ROTATERT, LSHIFTRT, ASHIFTRT cases. Handle subregs in op1.
32754 2023-04-19 Richard Biener <rguenther@suse.de>
32756 PR rtl-optimization/109237
32757 * cse.cc (insn_live_p): Remove NEXT_INSN walk, instead check
32758 TREE_VISITED on INSN_VAR_LOCATION_DECL.
32759 (delete_trivially_dead_insns): Maintain TREE_VISITED on
32760 active debug bind INSN_VAR_LOCATION_DECL.
32762 2023-04-19 Richard Biener <rguenther@suse.de>
32764 PR rtl-optimization/109237
32765 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
32767 2023-04-19 Christophe Lyon <christophe.lyon@arm.com>
32769 * doc/install.texi (enable-decimal-float): Add AArch64.
32771 2023-04-19 liuhongt <hongtao.liu@intel.com>
32773 PR rtl-optimization/109351
32774 * ira.cc (setup_class_subset_and_memory_move_costs): Check
32775 hard_regno_mode_ok before setting lowest memory move cost for
32776 the mode with different reg classes.
32778 2023-04-18 Jason Merrill <jason@redhat.com>
32780 * doc/invoke.texi: Remove stray @gol.
32782 2023-04-18 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
32784 * ifcvt.cc (cond_move_process_if_block): Consider the result of
32785 targetm.noce_conversion_profitable_p() when replacing the original
32786 sequence with the converted one.
32788 2023-04-18 Mark Harmstone <mark@harmstone.com>
32790 * common.opt (gcodeview): Add new option.
32791 * gcc.cc (driver_handle_option); Handle OPT_gcodeview.
32792 * opts.cc (command_handle_option): Similarly.
32793 * doc/invoke.texi: Add documentation for -gcodeview.
32795 2023-04-18 Andrew Pinski <apinski@marvell.com>
32797 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove declaration.
32798 (make_pass_phiopt): Make execute out of line.
32799 (tree_ssa_cs_elim): Move code into ...
32800 (pass_cselim::execute): here.
32802 2023-04-18 Sam James <sam@gentoo.org>
32804 * system.h: Drop unused INCLUDE_PTHREAD_H.
32806 2023-04-18 Kevin Lee <kevinl@rivosinc.com>
32808 * tree-vect-data-refs.cc (vect_grouped_store_supported): Add new
32811 2023-04-18 Sinan Lin <sinan.lin@linux.alibaba.com>
32813 * config/riscv/bitmanip.md (rotr<mode>3 expander): Enable for ZBKB.
32814 (bswapdi2, bswapsi2): Similarly.
32816 2023-04-18 Uros Bizjak <ubizjak@gmail.com>
32819 * config/i386/i386-builtin.def (__builtin_ia32_insertps128):
32820 Use CODE_FOR_sse4_1_insertps_v4sf.
32821 * config/i386/i386-expand.cc (expand_vec_perm_insertps): New.
32822 (expand_vec_perm_1): Call expand_vec_per_insertps.
32823 * config/i386/i386.md ("unspec"): Declare UNSPEC_INSERTPS here.
32824 * config/i386/mmx.md (mmxscalarmode): New mode attribute.
32825 (@sse4_1_insertps_<mode>): New insn pattern.
32826 * config/i386/sse.md (@sse4_1_insertps_<mode>): Macroize insn
32827 pattern from sse4_1_insertps using VI4F_128 mode iterator.
32829 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
32831 * value-range.cc (gt_ggc_mx): New.
32833 * value-range.h (class vrange): Add GTY marker.
32834 (class frange): Same.
32835 (gt_ggc_mx): Remove.
32836 (gt_pch_nx): Remove.
32838 2023-04-18 Victor L. Do Nascimento <victor.donascimento@arm.com>
32840 * lra-constraints.cc (constraint_unique): New.
32841 (process_address_1): Apply constraint_unique test.
32842 * recog.cc (constrain_operands): Allow relaxed memory
32845 2023-04-18 Kito Cheng <kito.cheng@sifive.com>
32847 * doc/extend.texi (Target Builtins): Add RISC-V Vector
32849 (RISC-V Vector Intrinsics): Document GCC implemented which
32850 version of RISC-V vector intrinsics and its reference.
32852 2023-04-18 Richard Biener <rguenther@suse.de>
32854 PR middle-end/108786
32855 * bitmap.h (bitmap_clear_first_set_bit): New.
32856 * bitmap.cc (bitmap_first_set_bit_worker): Rename from
32857 bitmap_first_set_bit and add optional clearing of the bit.
32858 (bitmap_first_set_bit): Wrap bitmap_first_set_bit_worker.
32859 (bitmap_clear_first_set_bit): Likewise.
32860 * df-core.cc (df_worklist_dataflow_doublequeue): Use
32861 bitmap_clear_first_set_bit.
32862 * graphite-scop-detection.cc (scop_detection::merge_sese):
32864 * sanopt.cc (sanitize_asan_mark_unpoison): Likewise.
32865 (sanitize_asan_mark_poison): Likewise.
32866 * tree-cfgcleanup.cc (cleanup_tree_cfg_noloop): Likewise.
32867 * tree-into-ssa.cc (rewrite_blocks): Likewise.
32868 * tree-ssa-dce.cc (simple_dce_from_worklist): Likewise.
32869 * tree-ssa-sccvn.cc (do_rpo_vn_1): Likewise.
32871 2023-04-18 Richard Biener <rguenther@suse.de>
32873 * tree-ssa-structalias.cc (dump_sa_stats): Split out from...
32874 (dump_sa_points_to_info): ... this function.
32875 (compute_points_to_sets): Guard large dumps with TDF_DETAILS,
32876 and call dump_sa_stats guarded with TDF_STATS.
32877 (ipa_pta_execute): Likewise.
32878 (compute_may_aliases): Guard dump_alias_info with
32879 TDF_DETAILS|TDF_ALIAS.
32881 2023-04-18 Andrew Pinski <apinski@marvell.com>
32883 * tree-ssa-phiopt.cc (gimple_simplify_phiopt): Dump
32884 the expression that is being tried when TDF_FOLDING
32886 (phiopt_worker::match_simplify_replacement): Dump
32887 the sequence which was created by gimple_simplify_phiopt
32888 when TDF_FOLDING is true.
32890 2023-04-18 Andrew Pinski <apinski@marvell.com>
32892 * tree-ssa-phiopt.cc (match_simplify_replacement):
32893 Simplify code that does the movement slightly.
32895 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32897 * config/aarch64/aarch64.md (@aarch64_rev16<mode>): Change to
32899 (rev16<mode>2): Rename to...
32900 (aarch64_rev16<mode>2_alt1): ... This.
32901 (rev16<mode>2_alt): Rename to...
32902 (*aarch64_rev16<mode>2_alt2): ... This.
32904 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
32906 * emit-rtl.cc (init_emit_once): Initialize dconstm0.
32907 * gimple-range-op.cc (class cfn_signbit): Remove dconstm0
32909 * range-op-float.cc (zero_range): Use dconstm0.
32910 (zero_to_inf_range): Same.
32911 * real.h (dconstm0): New.
32912 * value-range.cc (frange::flush_denormals_to_zero): Use dconstm0.
32913 (frange::set_zero): Do not declare dconstm0.
32915 2023-04-18 Richard Biener <rguenther@suse.de>
32917 * system.h (class auto_mpz): New,
32918 * realmpfr.h (class auto_mpfr): Likewise.
32919 * fold-const-call.cc (do_mpfr_arg1): Use auto_mpfr.
32920 (do_mpfr_arg2): Likewise.
32921 * tree-ssa-loop-niter.cc (bound_difference): Use auto_mpz;
32923 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32925 * config/aarch64/aarch64-builtins.cc (aarch64_init_simd_intrinsics): Take
32926 builtin flags from intrinsic data rather than hardcoded FLAG_AUTO_FP.
32928 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
32930 * value-range.cc (frange::operator==): Adjust for NAN.
32931 (range_tests_nan): Remove some NAN tests.
32933 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
32935 * inchash.cc (hash::add_real_value): New.
32936 * inchash.h (class hash): Add add_real_value.
32937 * value-range.cc (add_vrange): New.
32938 * value-range.h (inchash::add_vrange): New.
32940 2023-04-18 Richard Biener <rguenther@suse.de>
32942 PR tree-optimization/109539
32943 * gimple-ssa-warn-access.cc (pass_waccess::check_pointer_uses):
32944 Re-implement pointer relatedness for PHIs.
32946 2023-04-18 Andrew Stubbs <ams@codesourcery.com>
32948 * config/gcn/gcn-valu.md (SV_SFDF): New iterator.
32949 (SV_FP): New iterator.
32950 (scalar_mode, SCALAR_MODE): Add identity mappings for scalar modes.
32951 (recip<mode>2): Unify the two patterns using SV_FP.
32952 (div_scale<mode><exec_vcc>): New insn.
32953 (div_fmas<mode><exec>): New insn.
32954 (div_fixup<mode><exec>): New insn.
32955 (div<mode>3): Unify the two expanders and rewrite using hardfp.
32956 * config/gcn/gcn.cc (gcn_md_reorg): Support "vccwait" attribute.
32957 * config/gcn/gcn.md (unspec): Add UNSPEC_DIV_SCALE, UNSPEC_DIV_FMAS,
32958 and UNSPEC_DIV_FIXUP.
32959 (vccwait): New attribute.
32961 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32963 * config/aarch64/aarch64.cc (aarch64_validate_mcpu): Add hint to use -march
32964 if the argument matches that.
32966 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32968 * config/aarch64/atomics.md
32969 (*aarch64_atomic_load<ALLX:mode>_rcpc_zext):
32970 Use SD_HSDI for destination mode iterator.
32972 2023-04-18 Jin Ma <jinma@linux.alibaba.com>
32974 * common/config/riscv/riscv-common.cc (multi_letter_subset_rank): Swap the order
32975 of z-extensions and s-extensions.
32976 (riscv_subset_list::parse): Likewise.
32978 2023-04-18 Jakub Jelinek <jakub@redhat.com>
32980 PR tree-optimization/109240
32981 * match.pd (fneg/fadd): Rewrite such that it handles both plus as
32982 first vec_perm operand and minus as second using fneg/fadd and
32983 minus as first vec_perm operand and plus as second using fneg/fsub.
32985 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
32987 * data-streamer.cc (bp_pack_real_value): New.
32988 (bp_unpack_real_value): New.
32989 * data-streamer.h (bp_pack_real_value): New.
32990 (bp_unpack_real_value): New.
32991 * tree-streamer-in.cc (unpack_ts_real_cst_value_fields): Use
32992 bp_unpack_real_value.
32993 * tree-streamer-out.cc (pack_ts_real_cst_value_fields): Use
32994 bp_pack_real_value.
32996 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
32998 * wide-int.h (WIDE_INT_MAX_HWIS): New.
32999 (class fixed_wide_int_storage): Use it.
33000 (trailing_wide_ints <N>::set_precision): Use it.
33001 (trailing_wide_ints <N>::extra_size): Use it.
33003 2023-04-18 Xi Ruoyao <xry111@xry111.site>
33005 * config/loongarch/loongarch-protos.h
33006 (loongarch_addu16i_imm12_operand_p): New function prototype.
33007 (loongarch_split_plus_constant): Likewise.
33008 * config/loongarch/loongarch.cc
33009 (loongarch_addu16i_imm12_operand_p): New function.
33010 (loongarch_split_plus_constant): Likewise.
33011 * config/loongarch/loongarch.h (ADDU16I_OPERAND): New macro.
33012 (DUAL_IMM12_OPERAND): Likewise.
33013 (DUAL_ADDU16I_OPERAND): Likewise.
33014 * config/loongarch/constraints.md (La, Lb, Lc, Ld, Le): New
33016 * config/loongarch/predicates.md (const_dual_imm12_operand): New
33018 (const_addu16i_operand): Likewise.
33019 (const_addu16i_imm12_di_operand): Likewise.
33020 (const_addu16i_imm12_si_operand): Likewise.
33021 (plus_di_operand): Likewise.
33022 (plus_si_operand): Likewise.
33023 (plus_si_extend_operand): Likewise.
33024 * config/loongarch/loongarch.md (add<mode>3): Convert to
33025 define_insn_and_split. Use plus_<mode>_operand predicate
33026 instead of arith_operand. Add alternatives for La, Lb, Lc, Ld,
33027 and Le constraints.
33028 (*addsi3_extended): Convert to define_insn_and_split. Use
33029 plus_si_extend_operand instead of arith_operand. Add
33030 alternatives for La and Le alternatives.
33032 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
33034 * value-range.h (Value_Range::Value_Range): New.
33035 (Value_Range::contains_p): New.
33037 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
33039 * value-range.h (class vrange): Make m_discriminator const.
33040 (class irange): Make m_max_ranges const. Adjust constructors
33042 (class unsupported_range): Construct vrange appropriately.
33043 (class frange): Same.
33045 2023-04-18 Lulu Cheng <chenglulu@loongson.cn>
33047 * config/loongarch/loongarch.h (LOGICAL_OP_NON_SHORT_CIRCUIT): Remove the macro
33050 2023-04-18 Lulu Cheng <chenglulu@loongson.cn>
33052 * doc/extend.texi: Add section for LoongArch Base Built-in functions.
33054 2023-04-18 Fei Gao <gaofei@eswincomputing.com>
33056 * config/riscv/riscv.cc (riscv_first_stack_step): Make codes more
33058 (riscv_expand_epilogue): Likewise.
33060 2023-04-17 Fei Gao <gaofei@eswincomputing.com>
33062 * config/riscv/riscv.cc (riscv_expand_prologue): Consider save-restore in
33064 (riscv_expand_epilogue): Consider save-restore in stack deallocation.
33066 2023-04-17 Andrew Pinski <apinski@marvell.com>
33068 * tree-ssa-phiopt.cc (gate_hoist_loads): Remove
33071 2023-04-17 Aldy Hernandez <aldyh@redhat.com>
33073 * gimple-ssa-warn-alloca.cc (pass_walloca::execute): Do not export
33076 2023-04-17 Fei Gao <gaofei@eswincomputing.com>
33078 * config/riscv/riscv.cc (riscv_first_stack_step): Add a new function
33079 parameter remaining_size.
33080 (riscv_compute_frame_info): Adapt new riscv_first_stack_step interface.
33081 (riscv_expand_prologue): Likewise.
33082 (riscv_expand_epilogue): Likewise.
33084 2023-04-17 Feng Wang <wangfeng@eswincomputing.com>
33086 * config/riscv/bitmanip.md (rotrsi3_sext): Support generating
33087 roriw for constant counts.
33088 * rtl.h (reverse_rotate_by_imm_p): Add function declartion
33089 * simplify-rtx.cc (reverse_rotate_by_imm_p): New function.
33090 (simplify_context::simplify_binary_operation_1): Use it.
33091 * expmed.cc (expand_shift_1): Likewise.
33093 2023-04-17 Martin Jambor <mjambor@suse.cz>
33097 * cgraph.h (symtab_node::find_reference): Add parameter use_type.
33098 * ipa-prop.h (ipa_pass_through_data): New flag refdesc_decremented.
33099 (ipa_zap_jf_refdesc): New function.
33100 (ipa_get_jf_pass_through_refdesc_decremented): Likewise.
33101 (ipa_set_jf_pass_through_refdesc_decremented): Likewise.
33102 * ipa-cp.cc (ipcp_discover_new_direct_edges): Provide a value for
33103 the new parameter of find_reference.
33104 (adjust_references_in_caller): Likewise. Make sure the constant jump
33105 function is not used to decrement a refdec counter again. Only
33106 decrement refdesc counters when the pass_through jump function allows
33107 it. Added a detailed dump when decrementing refdesc counters.
33108 * ipa-prop.cc (ipa_print_node_jump_functions_for_edge): Dump new flag.
33109 (ipa_set_jf_simple_pass_through): Initialize the new flag.
33110 (ipa_set_jf_unary_pass_through): Likewise.
33111 (ipa_set_jf_arith_pass_through): Likewise.
33112 (remove_described_reference): Provide a value for the new parameter of
33114 (update_jump_functions_after_inlining): Zap refdesc of new jfunc if
33115 the previous pass_through had a flag mandating that we do so.
33116 (propagate_controlled_uses): Likewise. Only decrement refdesc
33117 counters when the pass_through jump function allows it.
33118 (ipa_edge_args_sum_t::duplicate): Provide a value for the new
33119 parameter of find_reference.
33120 (ipa_write_jump_function): Assert the new flag does not have to be
33122 * symtab.cc (symtab_node::find_reference): Add parameter use_type, use
33125 2023-04-17 Philipp Tomsich <philipp.tomsich@vrull.eu>
33126 Di Zhao <di.zhao@amperecomputing.com>
33128 * config/aarch64/aarch64-tuning-flags.def (AARCH64_EXTRA_TUNING_OPTION):
33129 Add AARCH64_EXTRA_TUNE_NO_LDP_COMBINE.
33130 * config/aarch64/aarch64.cc (aarch64_operands_ok_for_ldpstp):
33131 Check for the above tuning option when processing loads.
33133 2023-04-17 Richard Biener <rguenther@suse.de>
33135 PR tree-optimization/109524
33136 * tree-vrp.cc (remove_unreachable::m_list): Change to a
33137 vector of pairs of block indices.
33138 (remove_unreachable::maybe_register_block): Adjust.
33139 (remove_unreachable::remove_and_update_globals): Likewise.
33140 Deal with removed blocks.
33142 2023-04-16 Jeff Law <jlaw@ventanamicro>
33145 * config/riscv/riscv.cc (riscv_expand_conditional_move): For
33146 TARGET_SFB_ALU, force the true arm into a register.
33148 2023-04-15 John David Anglin <danglin@gcc.gnu.org>
33151 * config/pa/pa-protos.h (pa_function_arg_size): Update prototype.
33152 * config/pa/pa.cc (pa_function_arg): Return NULL_RTX if argument
33154 (pa_arg_partial_bytes): Don't call pa_function_arg_size twice.
33155 (pa_function_arg_size): Change return type to int. Return zero
33156 for arguments larger than 1 GB. Update comments.
33158 2023-04-15 Jakub Jelinek <jakub@redhat.com>
33160 PR tree-optimization/109154
33161 * tree-if-conv.cc (predicate_scalar_phi): For complex PHIs, emit just
33162 args_len - 1 COND_EXPRs rather than args_len. Formatting fix.
33164 2023-04-15 Jason Merrill <jason@redhat.com>
33167 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores):
33168 Overhaul lhs_ref.ref analysis.
33170 2023-04-14 Richard Biener <rguenther@suse.de>
33172 PR tree-optimization/109502
33173 * tree-vect-stmts.cc (vectorizable_assignment): Fix
33174 check for conversion between mask and non-mask types.
33176 2023-04-14 Jeff Law <jlaw@ventanamicro.com>
33177 Jakub Jelinek <jakub@redhat.com>
33181 * combine.cc (simplify_and_const_int_1): Compute nonzero_bits in
33182 word_mode rather than mode if WORD_REGISTER_OPERATIONS and mode is
33183 smaller than word_mode.
33184 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1)
33185 <case AND>: Likewise.
33187 2023-04-14 Jakub Jelinek <jakub@redhat.com>
33189 * loop-iv.cc (iv_number_of_iterations): Use gen_int_mode instead
33192 2023-04-13 Andrew MacLeod <amacleod@redhat.com>
33194 PR tree-optimization/108139
33195 PR tree-optimization/109462
33196 * gimple-range-cache.cc (ranger_cache::fill_block_cache): Remove
33197 equivalency check for PHI nodes.
33198 * gimple-range-fold.cc (fold_using_range::range_of_phi): Ensure def
33199 does not dominate single-arg equivalency edges.
33201 2023-04-13 Richard Sandiford <richard.sandiford@arm.com>
33204 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Do
33205 not trust TYPE_ALIGN for pointer types; use POINTER_SIZE instead.
33207 2023-04-13 Richard Biener <rguenther@suse.de>
33209 PR tree-optimization/109491
33210 * tree-ssa-sccvn.cc (expressions_equal_p): Restore the
33211 NULL operands test.
33213 2023-04-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33216 * config/riscv/riscv-vector-builtins-types.def (vint8mf8_t): Fix predicate.
33217 (vint16mf4_t): Ditto.
33218 (vint32mf2_t): Ditto.
33219 (vint64m1_t): Ditto.
33220 (vint64m2_t): Ditto.
33221 (vint64m4_t): Ditto.
33222 (vint64m8_t): Ditto.
33223 (vuint8mf8_t): Ditto.
33224 (vuint16mf4_t): Ditto.
33225 (vuint32mf2_t): Ditto.
33226 (vuint64m1_t): Ditto.
33227 (vuint64m2_t): Ditto.
33228 (vuint64m4_t): Ditto.
33229 (vuint64m8_t): Ditto.
33230 (vfloat32mf2_t): Ditto.
33231 (vbool64_t): Ditto.
33232 * config/riscv/riscv-vector-builtins.cc (register_builtin_type): Add comments.
33233 (register_vector_type): Ditto.
33234 (check_required_extensions): Fix condition.
33235 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_ZVE64): Remove it.
33236 (RVV_REQUIRE_ELEN_64): New define.
33237 (RVV_REQUIRE_MIN_VLEN_64): Ditto.
33238 * config/riscv/riscv-vector-switch.def (TARGET_VECTOR_FP32): Remove it.
33239 (TARGET_VECTOR_FP64): Ditto.
33240 (ENTRY): Fix predicate.
33241 * config/riscv/vector-iterators.md: Fix predicate.
33243 2023-04-12 Jakub Jelinek <jakub@redhat.com>
33245 PR tree-optimization/109410
33246 * tree-ssa-reassoc.cc (build_and_add_sum): Split edge from entry
33247 block if first statement of the function is a call to returns_twice
33250 2023-04-12 Jakub Jelinek <jakub@redhat.com>
33253 * config/i386/i386.cc: Include rtl-error.h.
33254 (ix86_print_operand): For z modifier warning, use warning_for_asm
33255 if this_is_asm_operands. For Z modifier errors, use %c and code
33256 instead of hardcoded Z.
33258 2023-04-12 Costas Argyris <costas.argyris@gmail.com>
33260 * config/i386/x-mingw32-utf8: Remove extrataneous $@
33262 2023-04-12 Andrew MacLeod <amacleod@redhat.com>
33264 PR tree-optimization/109462
33265 * gimple-range-cache.cc (ranger_cache::fill_block_cache): Don't
33266 check for equivalences if NAME is a phi node.
33268 2023-04-12 Richard Biener <rguenther@suse.de>
33270 PR tree-optimization/109473
33271 * tree-vect-loop.cc (vect_create_epilog_for_reduction):
33272 Convert scalar result to the computation type before performing
33273 the reduction adjustment.
33275 2023-04-12 Richard Biener <rguenther@suse.de>
33277 PR tree-optimization/109469
33278 * tree-vect-slp.cc (vect_slp_function): Skip region starts with
33279 a returns-twice call.
33281 2023-04-12 Richard Biener <rguenther@suse.de>
33283 PR tree-optimization/109434
33284 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Properly
33285 handle possibly throwing calls when processing the LHS
33286 and may-defs are not OK.
33288 2023-04-11 Lin Sinan <mynameisxiaou@gmail.com>
33290 * config/riscv/predicates.md (uimm_extra_bit_or_twobits): Adjust
33291 predicate to avoid splitting arith constants.
33293 2023-04-11 Yanzhang Wang <yanzhang.wang@intel.com>
33294 Pan Li <pan2.li@intel.com>
33295 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33296 Kito Cheng <kito.cheng@sifive.com>
33299 * config/riscv/riscv-protos.h (emit_hard_vlmax_vsetvl): New.
33300 * config/riscv/riscv-v.cc (emit_hard_vlmax_vsetvl): New.
33301 (emit_vlmax_vsetvl): Use emit_hard_vlmax_vsetvl.
33302 * config/riscv/riscv.cc (vector_zero_call_used_regs): New.
33303 (riscv_zero_call_used_regs): New.
33304 (TARGET_ZERO_CALL_USED_REGS): New.
33306 2023-04-11 Martin Liska <mliska@suse.cz>
33309 * opts.cc (finish_options): Drop also
33310 x_flag_var_tracking_assignments.
33312 2023-04-11 Andre Vieira <andre.simoesdiasvieira@arm.com>
33314 PR tree-optimization/108888
33315 * tree-if-conv.cc (predicate_statements): Fix gimple call check.
33317 2023-04-11 Haochen Gui <guihaoc@gcc.gnu.org>
33320 * config/rs6000/vsx.md (vsx_sign_extend_qi_<mode>): Rename to...
33321 (vsx_sign_extend_v16qi_<mode>): ... this.
33322 (vsx_sign_extend_hi_<mode>): Rename to...
33323 (vsx_sign_extend_v8hi_<mode>): ... this.
33324 (vsx_sign_extend_si_v2di): Rename to...
33325 (vsx_sign_extend_v4si_v2di): ... this.
33326 (vsignextend_qi_<mode>): Remove.
33327 (vsignextend_hi_<mode>): Remove.
33328 (vsignextend_si_v2di): Remove.
33329 (vsignextend_v2di_v1ti): Remove.
33330 (*xxspltib_<mode>_split): Replace gen_vsx_sign_extend_qi_v2di with
33331 gen_vsx_sign_extend_v16qi_v2di and gen_vsx_sign_extend_qi_v4si
33332 with gen_vsx_sign_extend_v16qi_v4si.
33333 * config/rs6000/rs6000.md (split for DI constant generation):
33334 Replace gen_vsx_sign_extend_qi_si with gen_vsx_sign_extend_v16qi_si.
33335 (split for HSDI constant generation): Replace gen_vsx_sign_extend_qi_di
33336 with gen_vsx_sign_extend_v16qi_di and gen_vsx_sign_extend_qi_si
33337 with gen_vsx_sign_extend_v16qi_si.
33338 * config/rs6000/rs6000-builtins.def (__builtin_altivec_vsignextsb2d):
33339 Set bif-pattern to vsx_sign_extend_v16qi_v2di.
33340 (__builtin_altivec_vsignextsb2w): Set bif-pattern to
33341 vsx_sign_extend_v16qi_v4si.
33342 (__builtin_altivec_visgnextsh2d): Set bif-pattern to
33343 vsx_sign_extend_v8hi_v2di.
33344 (__builtin_altivec_vsignextsh2w): Set bif-pattern to
33345 vsx_sign_extend_v8hi_v4si.
33346 (__builtin_altivec_vsignextsw2d): Set bif-pattern to
33347 vsx_sign_extend_si_v2di.
33348 (__builtin_altivec_vsignext): Set bif-pattern to
33349 vsx_sign_extend_v2di_v1ti.
33350 * config/rs6000/rs6000-builtin.cc (lxvrse_expand_builtin): Replace
33351 gen_vsx_sign_extend_qi_v2di with gen_vsx_sign_extend_v16qi_v2di,
33352 gen_vsx_sign_extend_hi_v2di with gen_vsx_sign_extend_v8hi_v2di and
33353 gen_vsx_sign_extend_si_v2di with gen_vsx_sign_extend_v4si_v2di.
33355 2023-04-10 Michael Meissner <meissner@linux.ibm.com>
33358 * config/rs6000/vsx.md (vsx_fmav4sf4): Do not generate vmaddfp.
33359 (vsx_nfmsv4sf4): Do not generate vnmsubfp.
33361 2023-04-10 Haochen Jiang <haochen.jiang@intel.com>
33363 * config/i386/i386.h (PTA_GRANITERAPIDS): Add PTA_AMX_COMPLEX.
33365 2023-04-10 Haochen Jiang <haochen.jiang@intel.com>
33367 * common/config/i386/cpuinfo.h (get_available_features):
33368 Detect AMX-COMPLEX.
33369 * common/config/i386/i386-common.cc
33370 (OPTION_MASK_ISA2_AMX_COMPLEX_SET,
33371 OPTION_MASK_ISA2_AMX_COMPLEX_UNSET): New.
33372 (ix86_handle_option): Handle -mamx-complex.
33373 * common/config/i386/i386-cpuinfo.h (enum processor_features):
33374 Add FEATURE_AMX_COMPLEX.
33375 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
33377 * config.gcc: Add amxcomplexintrin.h.
33378 * config/i386/cpuid.h (bit_AMX_COMPLEX): New.
33379 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
33381 * config/i386/i386-isa.def (AMX_COMPLEX): Add DEF_PTA(AMX_COMPLEX).
33382 * config/i386/i386-options.cc (ix86_valid_target_attribute_inner_p):
33383 Handle amx-complex.
33384 * config/i386/i386.opt: Add option -mamx-complex.
33385 * config/i386/immintrin.h: Include amxcomplexintrin.h.
33386 * doc/extend.texi: Document amx-complex.
33387 * doc/invoke.texi: Document -mamx-complex.
33388 * doc/sourcebuild.texi: Document target amx-complex.
33389 * config/i386/amxcomplexintrin.h: New file.
33391 2023-04-08 Jakub Jelinek <jakub@redhat.com>
33393 PR tree-optimization/109392
33394 * tree-vect-generic.cc (tree_vec_extract): Handle failure
33395 of maybe_push_res_to_seq better.
33397 2023-04-08 Jakub Jelinek <jakub@redhat.com>
33399 * Makefile.in (CORETYPES_H): Depend on align.h, poly-int.h and
33401 (SYSTEM_H): Depend on $(HASHTAB_H).
33402 * config/riscv/t-riscv (build/genrvv-type-indexer.o): Remove unused
33403 dependency on $(RTL_BASE_H), remove redundant dependency on
33406 2023-04-06 Richard Earnshaw <rearnsha@arm.com>
33409 * config/arm/arm.cc (arm_effective_regno): New function.
33410 (mve_vector_mem_operand): Use it.
33412 2023-04-06 Andrew MacLeod <amacleod@redhat.com>
33414 PR tree-optimization/109417
33415 * gimple-range-gori.cc (gori_compute::may_recompute_p): Check if
33416 dependency is in SSA_NAME_FREE_LIST.
33418 2023-04-06 Andrew Pinski <apinski@marvell.com>
33420 PR tree-optimization/109427
33421 * params.opt (-param=vect-induction-float=):
33422 Fix option attribute typo for IntegerRange.
33424 2023-04-05 Jeff Law <jlaw@ventanamicro>
33427 * combine.cc (combine_instructions): Force re-recognition when
33428 after restoring the body of an insn to its original form.
33430 2023-04-05 Martin Jambor <mjambor@suse.cz>
33433 * ipa-sra.cc (zap_useless_ipcp_results): New function.
33434 (process_isra_node_results): Call it.
33436 2023-04-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33438 * config/riscv/vector.md: Fix incorrect operand order.
33440 2023-04-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
33442 * config/riscv/riscv-vsetvl.cc
33443 (pass_vsetvl::compute_local_backward_infos): Update user vsetvl in local
33446 2023-04-05 Li Xu <xuli1@eswincomputing.com>
33448 * config/riscv/riscv-vector-builtins.def: Fix typo.
33449 * config/riscv/riscv.cc (riscv_dwarf_poly_indeterminate_value): Ditto.
33450 * config/riscv/vector-iterators.md: Ditto.
33452 2023-04-04 Hans-Peter Nilsson <hp@axis.com>
33454 * doc/md.texi (Including Patterns): Fix page break.
33456 2023-04-04 Jakub Jelinek <jakub@redhat.com>
33458 PR tree-optimization/109386
33459 * range-op-float.cc (foperator_lt::op1_range, foperator_lt::op2_range,
33460 foperator_le::op1_range, foperator_le::op2_range,
33461 foperator_gt::op1_range, foperator_gt::op2_range,
33462 foperator_ge::op1_range, foperator_ge::op2_range): Make r varying for
33463 BRS_FALSE case even if the other op is maybe_isnan, not just
33465 (foperator_unordered_lt::op1_range, foperator_unordered_lt::op2_range,
33466 foperator_unordered_le::op1_range, foperator_unordered_le::op2_range,
33467 foperator_unordered_gt::op1_range, foperator_unordered_gt::op2_range,
33468 foperator_unordered_ge::op1_range, foperator_unordered_ge::op2_range):
33469 Make r varying for BRS_TRUE case even if the other op is maybe_isnan,
33470 not just known_isnan.
33472 2023-04-04 Marek Polacek <polacek@redhat.com>
33474 PR sanitizer/109107
33475 * fold-const.cc (fold_binary_loc): Use TYPE_OVERFLOW_SANITIZED
33477 * match.pd: Use TYPE_OVERFLOW_SANITIZED.
33479 2023-04-04 Stam Markianos-Wright <stam.markianos-wright@arm.com>
33481 * config/arm/mve.md (mve_vcvtq_n_to_f_<supf><mode>): Swap operands.
33482 (mve_vcreateq_f<mode>): Swap operands.
33484 2023-04-04 Andrew Stubbs <ams@codesourcery.com>
33486 * config/gcn/gcn-valu.md (one_cmpl<mode>2<exec>): New.
33488 2023-04-04 Jakub Jelinek <jakub@redhat.com>
33491 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
33492 Reword diagnostics about zfinx conflict with f, formatting fixes.
33494 2023-04-04 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
33496 * config/sol2.h (LIB_SPEC): Don't link with -lpthread.
33498 2023-04-04 Richard Biener <rguenther@suse.de>
33500 PR tree-optimization/109304
33501 * tree-profile.cc (tree_profiling): Use symtab node
33502 availability to decide whether to skip adjusting calls.
33503 Do not adjust calls to internal functions.
33505 2023-04-04 Kewen Lin <linkw@linux.ibm.com>
33508 * config/rs6000/rs6000.cc (rs6000_expand_vector_set_var_p9): Fix gen
33509 function for permutation control vector by considering big endianness.
33511 2023-04-04 Kewen Lin <linkw@linux.ibm.com>
33514 * config/rs6000/altivec.md (*p9v_parity<mode>2): Rename to ...
33515 (rs6000_vprtyb<mode>2): ... this.
33516 * config/rs6000/rs6000-builtins.def (VPRTYBD): Replace parityv2di2 with
33517 rs6000_vprtybv2di2.
33518 (VPRTYBW): Replace parityv4si2 with rs6000_vprtybv4si2.
33519 (VPRTYBQ): Replace parityv1ti2 with rs6000_vprtybv1ti2.
33520 * config/rs6000/vector.md (parity<mode>2 with VEC_IP): Expand with
33521 popcountv16qi2 and the corresponding rs6000_vprtyb<mode>2.
33523 2023-04-04 Hans-Peter Nilsson <hp@axis.com>
33524 Sandra Loosemore <sandra@codesourcery.com>
33526 * doc/md.texi (Insn Splitting): Tweak wording for readability.
33528 2023-04-03 Martin Jambor <mjambor@suse.cz>
33531 * ipa-prop.cc (determine_known_aggregate_parts): Check that the
33532 offset + size will be representable in unsigned int.
33534 2023-04-03 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
33536 * configure.ac (ZSTD_LIB): Move before zstd.h check.
33537 Unset gcc_cv_header_zstd_h without libzstd.
33538 * configure: Regenerate.
33540 2023-04-03 Martin Liska <mliska@suse.cz>
33542 * doc/invoke.texi: Document new param.
33544 2023-04-03 Cupertino Miranda <cupertino.miranda@oracle.com>
33546 * doc/sourcebuild.texi (const_volatile_readonly_section): Document
33547 new check_effective_target function.
33549 2023-04-03 Li Xu <xuli1@eswincomputing.com>
33551 * config/riscv/riscv-vector-builtins.def (vuint32m8_t): Fix typo.
33552 (vfloat32m8_t): Likewise
33554 2023-04-03 liuhongt <hongtao.liu@intel.com>
33556 * doc/md.texi: Document signbitm2.
33558 2023-04-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
33559 kito-cheng <kito.cheng@sifive.com>
33561 * config/riscv/vector.md: Fix RA constraint.
33563 2023-04-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
33565 * config/riscv/riscv-protos.h (gen_avl_for_scalar_move): New function.
33566 * config/riscv/riscv-v.cc (gen_avl_for_scalar_move): New function.
33567 * config/riscv/vector.md: Fix scalar move bug.
33569 2023-04-01 Jakub Jelinek <jakub@redhat.com>
33571 * range-op-float.cc (foperator_equal::fold_range): If at least
33572 one of the op ranges is not singleton and neither is NaN and all
33573 4 bounds are zero, return [1, 1].
33574 (foperator_not_equal::fold_range): In the same case return [0, 0].
33576 2023-04-01 Jakub Jelinek <jakub@redhat.com>
33578 * range-op-float.cc (foperator_equal::fold_range): Perform the
33579 non-singleton handling regardless of maybe_isnan (op1, op2).
33580 (foperator_not_equal::fold_range): Likewise.
33581 (foperator_lt::fold_range, foperator_le::fold_range,
33582 foperator_gt::fold_range, foperator_ge::fold_range): Perform the
33583 real_* comparison check which results in range_false (type)
33584 even if maybe_isnan (op1, op2). Simplify.
33585 (foperator_ltgt): New class.
33586 (fop_ltgt): New variable.
33587 (floating_op_table::floating_op_table): Handle LTGT_EXPR using
33590 2023-04-01 Jakub Jelinek <jakub@redhat.com>
33593 * builtins.cc (apply_args_size): If targetm.calls.get_raw_arg_mode
33594 returns VOIDmode, handle it like if the register isn't used for
33595 passing arguments at all.
33596 (apply_result_size): If targetm.calls.get_raw_result_mode returns
33597 VOIDmode, handle it like if the register isn't used for returning
33599 * target.def (get_raw_result_mode, get_raw_arg_mode): Document what it
33600 means to return VOIDmode.
33601 * doc/tm.texi: Regenerated.
33602 * config/aarch64/aarch64.cc (aarch64_function_value_regno_p): Return
33603 TARGET_SVE for P0_REGNUM.
33604 (aarch64_function_arg_regno_p): Also return true for p0-p3.
33605 (aarch64_get_reg_raw_mode): Return VOIDmode for PR_REGNUM_P regs.
33607 2023-03-31 Vladimir N. Makarov <vmakarov@redhat.com>
33609 * lra-constraints.cc: (combine_reload_insn): New function.
33611 2023-03-31 Jakub Jelinek <jakub@redhat.com>
33613 PR tree-optimization/91645
33614 * range-op-float.cc (foperator_unordered_lt::fold_range,
33615 foperator_unordered_le::fold_range,
33616 foperator_unordered_gt::fold_range,
33617 foperator_unordered_ge::fold_range,
33618 foperator_unordered_equal::fold_range): Call the ordered
33619 fold_range on ranges with cleared NaNs.
33620 * value-query.cc (range_query::get_tree_range): Handle also
33621 COMPARISON_CLASS_P trees.
33623 2023-03-31 Kito Cheng <kito.cheng@sifive.com>
33624 Andrew Pinski <pinskia@gmail.com>
33627 * config/riscv/t-riscv: Add missing dependencies.
33629 2023-03-31 liuhongt <hongtao.liu@intel.com>
33631 * config/i386/i386.cc (inline_memory_move_cost): Return 100
33632 for MASK_REGS when MODE_SIZE > 8.
33634 2023-03-31 liuhongt <hongtao.liu@intel.com>
33637 * config/i386/i386-builtin.def (BDESC): Adjust icode name from
33638 ufloat/ufix to floatuns/fixuns.
33639 * config/i386/i386-expand.cc
33640 (ix86_expand_vector_convert_uns_vsivsf): Adjust comments.
33641 * config/i386/sse.md
33642 (ufloat<sseintvecmodelower><mode>2<mask_name><round_name>):
33644 (<mask_codefor>floatuns<sseintvecmodelower><mode>2<mask_name><round_name>):.. this.
33645 (<mask_codefor><avx512>_ufix_notrunc<sf2simodelower><mode><mask_name><round_name>):
33647 (<mask_codefor><avx512>_fixuns_notrunc<sf2simodelower><mode><mask_name><round_name>):
33649 (<fixsuffix>fix_truncv16sfv16si2<mask_name><round_saeonly_name>):
33651 (fix<fixunssuffix>_truncv16sfv16si2<mask_name><round_saeonly_name>):.. this.
33652 (ufloat<si2dfmodelower><mode>2<mask_name>): Renamed to ..
33653 (floatuns<si2dfmodelower><mode>2<mask_name>): .. this.
33654 (ufloatv2siv2df2<mask_name>): Renamed to ..
33655 (<mask_codefor>floatunsv2siv2df2<mask_name>): .. this.
33656 (ufix_notrunc<mode><si2dfmodelower>2<mask_name><round_name>):
33658 (fixuns_notrunc<mode><si2dfmodelower>2<mask_name><round_name>):
33660 (ufix_notruncv2dfv2si2): Renamed to ..
33661 (fixuns_notruncv2dfv2si2):.. this.
33662 (ufix_notruncv2dfv2si2_mask): Renamed to ..
33663 (fixuns_notruncv2dfv2si2_mask): .. this.
33664 (*ufix_notruncv2dfv2si2_mask_1): Renamed to ..
33665 (*fixuns_notruncv2dfv2si2_mask_1): .. this.
33666 (ufix_truncv2dfv2si2): Renamed to ..
33667 (*fixuns_truncv2dfv2si2): .. this.
33668 (ufix_truncv2dfv2si2_mask): Renamed to ..
33669 (fixuns_truncv2dfv2si2_mask): .. this.
33670 (*ufix_truncv2dfv2si2_mask_1): Renamed to ..
33671 (*fixuns_truncv2dfv2si2_mask_1): .. this.
33672 (ufix_truncv4dfv4si2<mask_name>): Renamed to ..
33673 (fixuns_truncv4dfv4si2<mask_name>): .. this.
33674 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
33676 (fixuns_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
33678 (ufix_trunc<mode><sseintvecmodelower>2<mask_name>): Renamed to ..
33679 (<mask_codefor>fixuns_trunc<mode><sseintvecmodelower>2<mask_name>):
33682 2023-03-30 Andrew MacLeod <amacleod@redhat.com>
33684 PR tree-optimization/109154
33685 * gimple-range-gori.cc (gori_compute::may_recompute_p): Add depth limit.
33686 * gimple-range-gori.h (may_recompute_p): Add depth param.
33687 * params.opt (ranger-recompute-depth): New param.
33689 2023-03-30 Jason Merrill <jason@redhat.com>
33693 * cgraph.h: Move reset() from cgraph_node to symtab_node.
33694 * cgraphunit.cc (symtab_node::reset): Adjust. Also call
33695 remove_from_same_comdat_group.
33697 2023-03-30 Richard Biener <rguenther@suse.de>
33699 PR tree-optimization/107561
33700 * gimple-ssa-warn-access.cc (get_size_range): Add flags
33701 argument and pass it on.
33702 (check_access): When querying for the size range pass
33703 SR_ALLOW_ZERO when the known destination size is zero.
33705 2023-03-30 Richard Biener <rguenther@suse.de>
33707 PR tree-optimization/109342
33708 * tree-ssa-sccvn.cc (vn_nary_op_get_predicated_value): New
33709 overload for edge. When that edge is a backedge use
33710 dominated_by_p directly.
33712 2023-03-30 liuhongt <hongtao.liu@intel.com>
33714 * config/i386/i386-expand.cc (expand_vec_perm_blend): Generate
33715 vpblendd instead of vpblendw for V4SI under avx2.
33717 2023-03-29 Hans-Peter Nilsson <hp@axis.com>
33719 * config/cris/cris.cc (cris_rtx_costs) [CONST_INT]: Return 0
33720 for many quick operands, for register-sized modes.
33722 2023-03-29 Jiawei <jiawei@iscas.ac.cn>
33724 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
33727 2023-03-29 Martin Liska <mliska@suse.cz>
33729 PR bootstrap/109310
33730 * configure.ac: Emit a warning for deprecated option
33731 --enable-link-mutex.
33732 * configure: Regenerate.
33734 2023-03-29 Richard Biener <rguenther@suse.de>
33736 PR tree-optimization/109331
33737 * tree-ssa-forwprop.cc (pass_forwprop::execute): When we
33738 discover a taken edge make sure to cleanup the CFG.
33740 2023-03-29 Richard Biener <rguenther@suse.de>
33742 PR tree-optimization/109327
33743 * tree-ssa-forwprop.cc (pass_forwprop::execute): Deal with
33744 already removed stmts when draining to_remove.
33746 2023-03-29 Richard Biener <rguenther@suse.de>
33749 * dwarf2out.cc (lookup_type_die): Reset TREE_ASM_WRITTEN
33750 so we can re-create the DIE for the type if required.
33752 2023-03-29 Jakub Jelinek <jakub@redhat.com>
33753 Richard Biener <rguenther@suse.de>
33755 PR tree-optimization/109301
33756 * tree-ssa-math-opts.cc (pass_data_cse_sincos): Change
33757 properties_provided from PROP_gimple_opt_math to 0.
33758 (pass_data_expand_powcabs): Change properties_provided from 0 to
33759 PROP_gimple_opt_math.
33761 2023-03-29 Richard Biener <rguenther@suse.de>
33763 PR tree-optimization/109154
33764 * tree-if-conv.cc (gen_phi_arg_condition): Handle single
33765 inverted condition specially by inverting at the caller.
33766 (gen_phi_arg_condition): Swap COND_EXPR arms if requested.
33768 2023-03-28 David Malcolm <dmalcolm@redhat.com>
33771 * diagnostic-show-locus.cc (column_range::column_range): Factor
33772 out assertion conditional into...
33773 (column_range::valid_p): ...this new function.
33774 (line_corrections::add_hint): Don't attempt to consolidate hints
33775 if it would lead to invalid column_range instances.
33777 2023-03-28 Kito Cheng <kito.cheng@sifive.com>
33780 * config/riscv/riscv-c.cc (riscv_ext_version_value): New.
33781 (riscv_cpu_cpp_builtins): Define __riscv_v_intrinsic and
33784 2023-03-28 Alexander Monakov <amonakov@ispras.ru>
33786 PR rtl-optimization/109187
33787 * haifa-sched.cc (autopref_rank_for_schedule): Avoid use of overflowing
33788 subtraction in three-way comparison.
33790 2023-03-28 Andrew MacLeod <amacleod@redhat.com>
33792 PR tree-optimization/109265
33793 PR tree-optimization/109274
33794 * gimple-range-gori.cc (gori_compute::compute_operand_range): Do
33795 not create a relation record is op1 and op2 are the same symbol.
33796 (gori_compute::compute_operand1_range): Pass op1 == op2 to the
33797 handler for this stmt, but create a new record only if this statement
33798 generates a relation based on the ranges.
33799 (gori_compute::compute_operand2_range): Ditto.
33800 * value-relation.h (value_relation::set_relation): Always create the
33801 record that is requested.
33803 2023-03-28 Richard Biener <rguenther@suse.de>
33805 PR tree-optimization/107087
33806 * tree-ssa-forwprop.cc (pass_forwprop::execute): Track
33807 executable regions to avoid useless work and to better
33808 propagate degenerate PHIs.
33810 2023-03-28 Costas Argyris <costas.argyris@gmail.com>
33812 * config/i386/x-mingw32-utf8: update comments.
33814 2023-03-28 Richard Sandiford <richard.sandiford@arm.com>
33817 * config/aarch64/aarch64-protos.h (aarch64_vector_load_decl): Declare.
33818 * config/aarch64/aarch64.h (machine_function::vector_load_decls): New
33820 * config/aarch64/aarch64-builtins.cc (aarch64_record_vector_load_arg):
33822 (aarch64_general_gimple_fold_builtin): Delay folding of vld1 until
33823 after inlining. Record which decls are loaded from. Fix handling
33824 of vops for loads and stores.
33825 * config/aarch64/aarch64.cc (aarch64_vector_load_decl): New function.
33826 (aarch64_accesses_vector_load_decl_p): Likewise.
33827 (aarch64_vector_costs::m_stores_to_vector_load_decl): New member
33829 (aarch64_vector_costs::add_stmt_cost): If the function has a vld1
33830 that loads from a decl, treat vector stores to those decls as
33832 (aarch64_vector_costs::finish_cost): ...and in that case,
33833 if the vector code does nothing more than a store, give the
33834 prologue a zero cost as well.
33836 2023-03-28 Richard Biener <rguenther@suse.de>
33839 PR tree-optimization/108129
33840 * genmatch.cc (lower_for): For (match ...) delay
33841 substituting into the match operator if possible.
33842 (dt_operand::gen_gimple_expr): For user_id look at the
33843 first substitute for determining how to access operands.
33844 (dt_operand::gen_generic_expr): Likewise.
33845 (dt_node::gen_kids): Properly sort user_ids according
33846 to their substitutes.
33847 (dt_node::gen_kids_1): Code-generate user_id matching.
33849 2023-03-28 Jakub Jelinek <jakub@redhat.com>
33850 Jonathan Wakely <jwakely@redhat.com>
33852 * gcov-tool.cc (do_merge, do_merge_stream, do_rewrite, do_overlap):
33853 Use subcommand rather than sub-command in function comments.
33855 2023-03-28 Jakub Jelinek <jakub@redhat.com>
33857 PR tree-optimization/109154
33858 * value-range.h (frange::flush_denormals_to_zero): Make it public
33859 rather than private.
33860 * value-range.cc (frange::set): Don't call flush_denormals_to_zero
33862 * range-op-float.cc (range_operator_float::fold_range): Call
33863 flush_denormals_to_zero.
33865 2023-03-28 Jakub Jelinek <jakub@redhat.com>
33867 PR middle-end/106190
33868 * sanopt.cc (pass_sanopt::execute): Return TODO_cleanup_cfg if any
33869 of the IFN_{UB,HWA,A}SAN_* internal fns are lowered.
33871 2023-03-28 Jakub Jelinek <jakub@redhat.com>
33873 * range-op-float.cc (float_widen_lhs_range): Use pass get_nan_state
33874 as 4th argument to set to avoid clear_nan and union_ calls.
33876 2023-03-28 Jakub Jelinek <jakub@redhat.com>
33879 * config/i386/i386.cc (assign_386_stack_local): For DImode
33880 with SLOT_FLOATxFDI_387 and -m32 -mpreferred-stack-boundary=2 pass
33881 align 32 rather than 0 to assign_stack_local.
33883 2023-03-28 Eric Botcazou <ebotcazou@adacore.com>
33886 * config/sparc/sparc.cc (sparc_expand_vcond): Call signed_condition
33887 on operand #3 to get the final condition code. Use std::swap.
33888 * config/sparc/sparc.md (vcondv8qiv8qi): New VIS 4 expander.
33889 (fucmp<gcond:code>8<P:mode>_vis): Move around.
33890 (fpcmpu<gcond:code><GCM:gcm_name><P:mode>_vis): Likewise.
33891 (vcondu<GCM:mode><GCM:mode>): New VIS 4 expander.
33893 2023-03-28 Eric Botcazou <ebotcazou@adacore.com>
33895 * doc/gm2.texi: Add missing Next, Previous and Top fields to most
33896 top-level sections.
33898 2023-03-28 Costas Argyris <costas.argyris@gmail.com>
33900 * config.host: Pull in i386/x-mingw32-utf8 Makefile
33901 fragment and reference utf8rc-mingw32.o explicitly
33903 * config/i386/sym-mingw32.cc: prevent name mangling of
33905 * config/i386/x-mingw32-utf8: Make utf8rc-mingw32.o
33906 depend on manifest file explicitly.
33908 2023-03-28 Richard Biener <rguenther@suse.de>
33911 2023-03-27 Richard Biener <rguenther@suse.de>
33913 PR rtl-optimization/109237
33914 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
33916 2023-03-28 Richard Biener <rguenther@suse.de>
33918 * common.opt (gdwarf): Remove Negative(gdwarf-).
33920 2023-03-28 Richard Biener <rguenther@suse.de>
33922 * common.opt (gdwarf): Add RejectNegative.
33923 (gdwarf-): Likewise.
33927 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
33929 * config/cris/constraints.md ("T"): Correct to
33930 define_memory_constraint.
33932 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
33934 * config/cris/cris.md (BW2): New mode-iterator.
33935 (lra_szext_decomposed, lra_szext_decomposed_indirect_with_offset): New
33938 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
33940 * config/cris/cris.md ("*add<mode>3_addi"): Improve to bail only
33941 for possible eliminable compares.
33943 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
33945 * config/cris/constraints.md ("R"): Remove unused constraint.
33947 2023-03-27 Jonathan Wakely <jwakely@redhat.com>
33949 PR gcov-profile/109297
33950 * gcov-tool.cc (merge_usage): Fix "subcomand" typo.
33951 (merge_stream_usage): Likewise.
33952 (overlap_usage): Likewise.
33954 2023-03-27 Christoph Müllner <christoph.muellner@vrull.eu>
33957 * config/riscv/thead.md: Add missing mode specifiers.
33959 2023-03-27 Philipp Tomsich <philipp.tomsich@vrull.eu>
33960 Jiangning Liu <jiangning.liu@amperecomputing.com>
33961 Manolis Tsamis <manolis.tsamis@vrull.eu>
33963 * config/aarch64/aarch64.cc: Update vector costs for ampere1.
33965 2023-03-27 Richard Biener <rguenther@suse.de>
33967 PR rtl-optimization/109237
33968 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
33970 2023-03-27 Richard Biener <rguenther@suse.de>
33973 * lto-wrapper.cc (run_gcc): Parse alternate debug options
33974 as well, they always enable debug.
33976 2023-03-27 Kewen Lin <linkw@linux.ibm.com>
33979 * config/rs6000/emmintrin.h (_mm_bslli_si128): Move the implementation
33981 (_mm_slli_si128): ... here. Change to call _mm_bslli_si128 directly.
33983 2023-03-27 Kewen Lin <linkw@linux.ibm.com>
33986 * config/rs6000/emmintrin.h (_mm_bslli_si128): Check __N is not less
33987 than zero when calling vec_sld.
33988 (_mm_bsrli_si128): Return __A if __N is zero, check __N is bigger than
33989 zero when calling vec_sld.
33990 (_mm_slli_si128): Return __A if _imm5 is zero, check _imm5 is bigger
33991 than zero when calling vec_sld.
33993 2023-03-27 Sandra Loosemore <sandra@codesourcery.com>
33995 * doc/generic.texi (OpenMP): Document OMP_SIMD, OMP_DISTRIBUTE,
33996 OMP_TASKLOOP, and OMP_LOOP with OMP_FOR. Document how collapsed
33997 loops are represented and which fields are vectors. Add
33998 documentation for OMP_FOR_PRE_BODY field. Document internal
33999 form of non-rectangular loops and OMP_FOR_NON_RECTANGULAR.
34000 * tree.def (OMP_FOR): Make documentation consistent with the
34001 Texinfo manual, to fill some gaps and correct errors.
34003 2023-03-26 Andreas Schwab <schwab@linux-m68k.org>
34006 * config/m68k/m68k.h (FINAL_PRESCAN_INSN): Define.
34007 * config/m68k/m68k.cc (m68k_final_prescan_insn): Define.
34008 (handle_move_double): Call it before handle_movsi.
34009 * config/m68k/m68k-protos.h: Declare it.
34011 2023-03-26 Jakub Jelinek <jakub@redhat.com>
34013 PR tree-optimization/109230
34014 * match.pd (fneg/fadd simplify): Verify also odd permutation indexes.
34016 2023-03-26 Jakub Jelinek <jakub@redhat.com>
34019 * predict.cc (compute_function_frequency): Don't call
34020 warn_function_cold if function already has cold attribute.
34022 2023-03-26 Gerald Pfeifer <gerald@pfeifer.com>
34024 * doc/install.texi: Remove anachronistic note
34025 related to languages built and separate source tarballs.
34027 2023-03-25 David Malcolm <dmalcolm@redhat.com>
34030 * diagnostic-format-sarif.cc (read_until_eof): Delete.
34031 (maybe_read_file): Delete.
34032 (sarif_builder::maybe_make_artifact_content_object): Use
34033 get_source_file_content rather than maybe_read_file.
34034 Reject it if it's not valid UTF-8.
34035 * input.cc (file_cache_slot::get_full_file_content): New.
34036 (get_source_file_content): New.
34037 (selftest::check_cpp_valid_utf8_p): New.
34038 (selftest::test_cpp_valid_utf8_p): New.
34039 (selftest::input_cc_tests): Call selftest::test_cpp_valid_utf8_p.
34040 * input.h (get_source_file_content): New prototype.
34042 2023-03-24 David Malcolm <dmalcolm@redhat.com>
34044 * doc/analyzer.texi (Debugging the Analyzer): Add notes on useful
34046 (Special Functions for Debugging the Analyzer): Convert to a
34047 table, and rewrite in places.
34048 (Other Debugging Techniques): Add notes on how to compare two
34049 different exploded graphs.
34051 2023-03-24 David Malcolm <dmalcolm@redhat.com>
34054 * json.cc: Update comments to indicate that we now preserve
34055 insertion order of keys within objects.
34056 (object::print): Traverse keys in insertion order.
34057 (object::set): Preserve insertion order of keys.
34058 (selftest::test_writing_objects): Add an additional key to verify
34059 that we preserve insertion order.
34060 * json.h (object::m_keys): New field.
34062 2023-03-24 Andrew MacLeod <amacleod@redhat.com>
34064 PR tree-optimization/109238
34065 * gimple-range-cache.cc (ranger_cache::resolve_dom): Ignore
34066 predecessors which this block dominates.
34068 2023-03-24 Richard Biener <rguenther@suse.de>
34070 PR tree-optimization/106912
34071 * tree-profile.cc (tree_profiling): Update stmts only when
34072 profiling or testing coverage. Make sure to update calls
34073 fntype, stripping 'const' there.
34075 2023-03-24 Jakub Jelinek <jakub@redhat.com>
34077 PR middle-end/109258
34078 * builtins.cc (inline_expand_builtin_bytecmp): Return NULL_RTX early
34079 if target == const0_rtx.
34081 2023-03-24 Alexandre Oliva <oliva@adacore.com>
34083 * doc/sourcebuild.texi (weak_undefined, posix_memalign):
34084 Document options and effective targets.
34086 2023-03-24 Costas Argyris <costas.argyris@gmail.com>
34088 * config/i386/x-mingw32-utf8: Make HOST_EXTRA_OBJS_SYMBOL
34091 2023-03-23 Pat Haugen <pthaugen@linux.ibm.com>
34093 * config/rs6000/rs6000.md (*mod<mode>3, umod<mode>3): Add
34094 non-earlyclobber alternative.
34096 2023-03-23 Andrew Pinski <apinski@marvell.com>
34099 * fold-const.cc (maybe_lvalue_p): Treat COMPOUND_LITERAL_EXPR
34102 2023-03-23 Richard Biener <rguenther@suse.de>
34104 PR tree-optimization/107569
34105 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_stmt):
34106 Do not push SSA names with zero uses as available leader.
34107 (process_bb): Likewise.
34109 2023-03-23 Richard Biener <rguenther@suse.de>
34111 PR tree-optimization/109262
34112 * tree-ssa-forwprop.cc (pass_forwprop::execute): When
34113 combining a piecewise complex load avoid touching loads
34114 that throw internally. Use fun, not cfun throughout.
34116 2023-03-23 Jakub Jelinek <jakub@redhat.com>
34118 * value-range.cc (irange::irange_union, irange::intersect): Fix
34119 comment spelling bugs.
34120 * gimple-range-trace.cc (range_tracer::do_header): Likewise.
34121 * gimple-range-trace.h: Likewise.
34122 * gimple-range-edge.cc: Likewise.
34123 (gimple_outgoing_range_stmt_p,
34124 gimple_outgoing_range::switch_edge_range,
34125 gimple_outgoing_range::edge_range_p): Likewise.
34126 * gimple-range.cc (gimple_ranger::prefill_stmt_dependencies,
34127 gimple_ranger::fold_stmt, gimple_ranger::register_transitive_infer,
34128 assume_query::assume_query, assume_query::calculate_phi): Likewise.
34129 * gimple-range-edge.h: Likewise.
34130 * value-range.h (Value_Range::set, Value_Range::lower_bound,
34131 Value_Range::upper_bound, frange::set_undefined): Likewise.
34132 * gimple-range-gori.h (range_def_chain::depend, gori_map::m_outgoing,
34133 gori_compute): Likewise.
34134 * gimple-range-fold.h (fold_using_range): Likewise.
34135 * gimple-range-path.cc (path_range_query::compute_ranges_in_phis):
34137 * gimple-range-gori.cc (range_def_chain::in_chain_p,
34138 range_def_chain::dump, gori_map::calculate_gori,
34139 gori_compute::compute_operand_range_switch,
34140 gori_compute::logical_combine, gori_compute::refine_using_relation,
34141 gori_compute::compute_operand1_range, gori_compute::may_recompute_p):
34143 * gimple-range.h: Likewise.
34144 (enable_ranger): Likewise.
34145 * range-op.h (empty_range_varying): Likewise.
34146 * value-query.h (value_query): Likewise.
34147 * gimple-range-cache.cc (block_range_cache::set_bb_range,
34148 block_range_cache::dump, ssa_global_cache::clear_global_range,
34149 temporal_cache::temporal_value, temporal_cache::current_p,
34150 ranger_cache::range_of_def, ranger_cache::propagate_updated_value,
34151 ranger_cache::range_from_dom, ranger_cache::register_inferred_value):
34153 * gimple-range-fold.cc (fur_edge::get_phi_operand,
34154 fur_stmt::get_operand, gimple_range_adjustment,
34155 fold_using_range::range_of_phi,
34156 fold_using_range::relation_fold_and_or): Likewise.
34157 * value-range-storage.h (irange_storage_slot::MAX_INTS): Likewise.
34158 * value-query.cc (range_query::value_of_expr,
34159 range_query::value_on_edge, range_query::query_relation): Likewise.
34160 * tree-vrp.cc (remove_unreachable::remove_and_update_globals,
34161 intersect_range_with_nonzero_bits): Likewise.
34162 * gimple-range-infer.cc (gimple_infer_range::check_assume_func,
34163 exit_range): Likewise.
34164 * value-relation.h: Likewise.
34165 (equiv_oracle, relation_trio::relation_trio, value_relation,
34166 value_relation::value_relation, pe_min): Likewise.
34167 * range-op-float.cc (range_operator_float::rv_fold,
34168 frange_arithmetic, foperator_unordered_equal::op1_range,
34169 foperator_div::rv_fold): Likewise.
34170 * gimple-range-op.cc (cfn_clz::fold_range): Likewise.
34171 * value-relation.cc (equiv_oracle::query_relation,
34172 equiv_oracle::register_equiv, equiv_oracle::add_equiv_to_block,
34173 value_relation::apply_transitive, relation_chain_head::find_relation,
34174 dom_oracle::query_relation, dom_oracle::find_relation_block,
34175 dom_oracle::find_relation_dom, path_oracle::register_equiv): Likewise.
34176 * range-op.cc (range_operator::wi_fold_in_parts_equiv,
34177 create_possibly_reversed_range, adjust_op1_for_overflow,
34178 operator_mult::wi_fold, operator_exact_divide::op1_range,
34179 operator_cast::lhs_op1_relation, operator_cast::fold_pair,
34180 operator_cast::fold_range, operator_abs::wi_fold, range_op_cast_tests,
34181 range_op_lshift_tests): Likewise.
34183 2023-03-23 Andrew Stubbs <ams@codesourcery.com>
34185 * config/gcn/gcn.cc (gcn_class_max_nregs): Handle vectors in SGPRs.
34186 (move_callee_saved_registers): Detect the bug condition early.
34188 2023-03-23 Andrew Stubbs <ams@codesourcery.com>
34190 * config/gcn/gcn-protos.h (gcn_stepped_zero_int_parallel_p): New.
34191 * config/gcn/gcn-valu.md (V_1REG_ALT): New.
34193 (vec_extract<V_1REG:mode><V_1REG_ALT:mode>_nop): New.
34194 (vec_extract<V_2REG:mode><V_2REG_ALT:mode>_nop): New.
34195 (vec_extract<V_ALL:mode><V_ALL_ALT:mode>): Use new patterns.
34196 * config/gcn/gcn.cc (gcn_stepped_zero_int_parallel_p): New.
34197 * config/gcn/predicates.md (ascending_zero_int_parallel): New.
34199 2023-03-23 Jakub Jelinek <jakub@redhat.com>
34201 PR tree-optimization/109176
34202 * tree-vect-generic.cc (expand_vector_condition): If a has
34203 vector boolean type and is a comparison, also check if both
34204 the comparison and VEC_COND_EXPR could be successfully expanded
34207 2023-03-23 Pan Li <pan2.li@intel.com>
34208 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34212 * config/riscv/riscv-modes.def (ADJUST_BYTESIZE): Adjust size
34213 for vector mask modes.
34214 * config/riscv/riscv.cc (riscv_v_adjust_bytesize): New.
34215 * config/riscv/riscv.h (riscv_v_adjust_bytesize): New.
34217 2023-03-23 Songhe Zhu <zhusonghe@eswincomputing.com>
34219 * config/riscv/multilib-generator: Adjusting the loop of 'alt' in 'alts'.
34221 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34224 * config/riscv/riscv-protos.h (emit_vlmax_vsetvl): Define as global.
34225 (emit_vlmax_op): Ditto.
34226 * config/riscv/riscv-v.cc (get_sew): New function.
34227 (emit_vlmax_vsetvl): Adapt function.
34228 (emit_pred_op): Ditto.
34229 (emit_vlmax_op): Ditto.
34230 (emit_nonvlmax_op): Ditto.
34231 (legitimize_move): Fix LRA ICE.
34232 (gen_no_side_effects_vsetvl_rtx): Adapt function.
34233 * config/riscv/vector.md (@mov<V_FRACT:mode><P:mode>_lra): New pattern.
34234 (@mov<VB:mode><P:mode>_lra): Ditto.
34235 (*mov<V_FRACT:mode><P:mode>_lra): Ditto.
34236 (*mov<VB:mode><P:mode>_lra): Ditto.
34238 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34241 * config/riscv/riscv-vector-builtins-bases.cc (class vlenb): Add
34242 __riscv_vlenb support.
34244 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
34245 * config/riscv/riscv-vector-builtins-functions.def (vlenb): Ditto.
34246 * config/riscv/riscv-vector-builtins-shapes.cc (struct vlenb_def): Ditto.
34248 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
34249 * config/riscv/riscv-vector-builtins.cc: Ditto.
34251 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34252 kito-cheng <kito.cheng@sifive.com>
34254 * config/riscv/riscv-vsetvl.cc (reg_available_p): Fix bugs.
34255 (pass_vsetvl::compute_local_backward_infos): Fix bugs.
34256 (pass_vsetvl::need_vsetvl): Fix bugs.
34257 (pass_vsetvl::backward_demand_fusion): Fix bugs.
34258 (pass_vsetvl::demand_fusion): Fix bugs.
34259 (eliminate_insn): Fix bugs.
34260 (insert_vsetvl): Ditto.
34261 (pass_vsetvl::emit_local_forward_vsetvls): Ditto.
34262 * config/riscv/riscv-vsetvl.h (enum vsetvl_type): Ditto.
34263 * config/riscv/vector.md: Ditto.
34265 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34266 kito-cheng <kito.cheng@sifive.com>
34268 * config/riscv/riscv-vector-builtins-bases.cc: Fix ternary bug.
34269 * config/riscv/vector-iterators.md (nmsac): Ditto.
34275 * config/riscv/vector.md (@pred_mul_<optab><mode>): Ditto.
34276 (@pred_mul_plus<mode>): Ditto.
34277 (*pred_madd<mode>): Ditto.
34278 (*pred_macc<mode>): Ditto.
34279 (*pred_mul_plus<mode>): Ditto.
34280 (@pred_mul_plus<mode>_scalar): Ditto.
34281 (*pred_madd<mode>_scalar): Ditto.
34282 (*pred_macc<mode>_scalar): Ditto.
34283 (*pred_mul_plus<mode>_scalar): Ditto.
34284 (*pred_madd<mode>_extended_scalar): Ditto.
34285 (*pred_macc<mode>_extended_scalar): Ditto.
34286 (*pred_mul_plus<mode>_extended_scalar): Ditto.
34287 (@pred_minus_mul<mode>): Ditto.
34288 (*pred_<madd_nmsub><mode>): Ditto.
34289 (*pred_nmsub<mode>): Ditto.
34290 (*pred_<macc_nmsac><mode>): Ditto.
34291 (*pred_nmsac<mode>): Ditto.
34292 (*pred_mul_<optab><mode>): Ditto.
34293 (*pred_minus_mul<mode>): Ditto.
34294 (@pred_mul_<optab><mode>_scalar): Ditto.
34295 (@pred_minus_mul<mode>_scalar): Ditto.
34296 (*pred_<madd_nmsub><mode>_scalar): Ditto.
34297 (*pred_nmsub<mode>_scalar): Ditto.
34298 (*pred_<macc_nmsac><mode>_scalar): Ditto.
34299 (*pred_nmsac<mode>_scalar): Ditto.
34300 (*pred_mul_<optab><mode>_scalar): Ditto.
34301 (*pred_minus_mul<mode>_scalar): Ditto.
34302 (*pred_<madd_nmsub><mode>_extended_scalar): Ditto.
34303 (*pred_nmsub<mode>_extended_scalar): Ditto.
34304 (*pred_<macc_nmsac><mode>_extended_scalar): Ditto.
34305 (*pred_nmsac<mode>_extended_scalar): Ditto.
34306 (*pred_mul_<optab><mode>_extended_scalar): Ditto.
34307 (*pred_minus_mul<mode>_extended_scalar): Ditto.
34308 (*pred_<madd_msub><mode>): Ditto.
34309 (*pred_<macc_msac><mode>): Ditto.
34310 (*pred_<madd_msub><mode>_scalar): Ditto.
34311 (*pred_<macc_msac><mode>_scalar): Ditto.
34312 (@pred_neg_mul_<optab><mode>): Ditto.
34313 (@pred_mul_neg_<optab><mode>): Ditto.
34314 (*pred_<nmadd_msub><mode>): Ditto.
34315 (*pred_<nmsub_nmadd><mode>): Ditto.
34316 (*pred_<nmacc_msac><mode>): Ditto.
34317 (*pred_<nmsac_nmacc><mode>): Ditto.
34318 (*pred_neg_mul_<optab><mode>): Ditto.
34319 (*pred_mul_neg_<optab><mode>): Ditto.
34320 (@pred_neg_mul_<optab><mode>_scalar): Ditto.
34321 (@pred_mul_neg_<optab><mode>_scalar): Ditto.
34322 (*pred_<nmadd_msub><mode>_scalar): Ditto.
34323 (*pred_<nmsub_nmadd><mode>_scalar): Ditto.
34324 (*pred_<nmacc_msac><mode>_scalar): Ditto.
34325 (*pred_<nmsac_nmacc><mode>_scalar): Ditto.
34326 (*pred_neg_mul_<optab><mode>_scalar): Ditto.
34327 (*pred_mul_neg_<optab><mode>_scalar): Ditto.
34328 (@pred_widen_neg_mul_<optab><mode>): Ditto.
34329 (@pred_widen_mul_neg_<optab><mode>): Ditto.
34330 (@pred_widen_neg_mul_<optab><mode>_scalar): Ditto.
34331 (@pred_widen_mul_neg_<optab><mode>_scalar): Ditto.
34333 2023-03-23 liuhongt <hongtao.liu@intel.com>
34335 * builtins.cc (builtin_memset_read_str): Replace
34336 targetm.gen_memset_scratch_rtx with gen_reg_rtx.
34337 (builtin_memset_gen_str): Ditto.
34338 * config/i386/i386-expand.cc
34339 (ix86_convert_const_wide_int_to_broadcast): Replace
34340 ix86_gen_scratch_sse_rtx with gen_reg_rtx.
34341 (ix86_expand_vector_move): Ditto.
34342 * config/i386/i386-protos.h (ix86_gen_scratch_sse_rtx):
34344 * config/i386/i386.cc (ix86_gen_scratch_sse_rtx): Removed.
34345 (TARGET_GEN_MEMSET_SCRATCH_RTX): Removed.
34346 * doc/tm.texi: Remove TARGET_GEN_MEMSET_SCRATCH_RTX.
34347 * doc/tm.texi.in: Ditto.
34348 * target.def: Ditto.
34350 2023-03-22 Vladimir N. Makarov <vmakarov@redhat.com>
34352 * lra.cc (lra): Do not repeat inheritance and live range splitting
34353 when asm error is found.
34355 2023-03-22 Andrew Jenner <andrew@codesourcery.com>
34357 * config/gcn/gcn-protos.h (gcn_expand_dpp_swap_pairs_insn)
34358 (gcn_expand_dpp_distribute_even_insn)
34359 (gcn_expand_dpp_distribute_odd_insn): Declare.
34360 * config/gcn/gcn-valu.md (@dpp_swap_pairs<mode>)
34361 (@dpp_distribute_even<mode>, @dpp_distribute_odd<mode>)
34362 (cmul<conj_op><mode>3, cml<addsub_as><mode>4, vec_addsub<mode>3)
34363 (cadd<rot><mode>3, vec_fmaddsub<mode>4, vec_fmsubadd<mode>4)
34364 (fms<mode>4<exec>, fms<mode>4_negop2<exec>, fms<mode>4)
34365 (fms<mode>4_negop2): New patterns.
34366 * config/gcn/gcn.cc (gcn_expand_dpp_swap_pairs_insn)
34367 (gcn_expand_dpp_distribute_even_insn)
34368 (gcn_expand_dpp_distribute_odd_insn): New functions.
34369 * config/gcn/gcn.md: Add entries to unspec enum.
34371 2023-03-22 Aldy Hernandez <aldyh@redhat.com>
34373 PR tree-optimization/109008
34374 * value-range.cc (frange::set): Add nan_state argument.
34375 * value-range.h (class nan_state): New.
34376 (frange::get_nan_state): New.
34378 2023-03-22 Martin Liska <mliska@suse.cz>
34380 * configure: Regenerate.
34382 2023-03-21 Joseph Myers <joseph@codesourcery.com>
34384 * stor-layout.cc (finalize_type_size): Copy TYPE_TYPELESS_STORAGE
34387 2023-03-21 Andrew MacLeod <amacleod@redhat.com>
34389 PR tree-optimization/109192
34390 * gimple-range-gori.cc (gori_compute::compute_operand_range):
34391 Terminate gori calculations if a relation is not relevant.
34392 * value-relation.h (value_relation::set_relation): Allow
34393 equality between op1 and op2 if they are the same.
34395 2023-03-21 Richard Biener <rguenther@suse.de>
34397 PR tree-optimization/109219
34398 * tree-vect-loop.cc (vectorizable_reduction): Check
34399 slp_node, not STMT_SLP_TYPE.
34400 * tree-vect-stmts.cc (vectorizable_condition): Likewise.
34401 * tree-vect-slp.cc (vect_slp_analyze_node_operations_1):
34402 Remove assertion on STMT_SLP_TYPE.
34404 2023-03-21 Jakub Jelinek <jakub@redhat.com>
34406 PR tree-optimization/109215
34407 * tree.h (enum special_array_member): Adjust comments for int_0
34409 * tree.cc (component_ref_sam_type): Clear zero_elts if memtype
34410 has zero sized element type and the array has variable number of
34411 elements or constant one or more elements.
34412 (component_ref_size): Adjust comments, formatting fix.
34414 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
34416 * configure.ac: Add check for the Texinfo 6.8
34417 CONTENTS_OUTPUT_LOCATION customization variable and set it if
34419 * configure: Regenerate.
34420 * Makefile.in (MAKEINFO_TOC_INLINE_FLAG): New variable. Set by
34421 configure.ac to -c CONTENTS_OUTPUT_LOCATION=inline if
34422 CONTENTS_OUTPUT_LOCATION support is detected, empty otherwise.
34423 ($(build_htmldir)/%/index.html): Pass MAKEINFO_TOC_INLINE_FLAG.
34425 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
34427 * doc/extend.texi: Associate use_hazard_barrier_return index
34428 entry with its attribute.
34429 * doc/invoke.texi: Associate -fcanon-prefix-map index entry with
34432 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
34434 * doc/implement-c.texi: Remove usage of @gol.
34435 * doc/invoke.texi: Ditto.
34436 * doc/sourcebuild.texi: Ditto.
34437 * doc/include/gcc-common.texi: Remove @gol. In new Makeinfo and
34438 texinfo.tex versions, the bug it was working around appears to
34441 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
34443 * doc/include/texinfo.tex: Update to 2023-01-17.19.
34445 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
34447 * doc/include/gcc-common.texi: Add @defbuiltin{,x} and
34448 @enddefbuiltin for defining built-in functions.
34449 * doc/extend.texi: Apply @defbuiltin{,x} to many, but not all,
34450 places where it should be used.
34452 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
34454 * doc/extend.texi (Formatted Output Function Checking): New
34455 subsection for grouping together printf et al.
34456 (Exception handling) Fix missing @ sign before copyright
34457 header, which lead to the copyright line leaking into
34458 '(gcc)Exception handling'.
34459 * doc/gcc.texi: Set document language to en_US.
34460 (@copying): Wrap front cover texts in quotations, move in manual
34463 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
34465 * doc/gcc.texi: Add the Indices appendix, to make texinfo
34466 generate nice indices overview page.
34468 2023-03-21 Richard Biener <rguenther@suse.de>
34470 PR tree-optimization/109170
34471 * gimple-range-op.cc (cfn_pass_through_arg1): New.
34472 (gimple_range_op_handler::maybe_builtin_call): Handle
34473 __builtin_expect via cfn_pass_through_arg1.
34475 2023-03-20 Michael Meissner <meissner@linux.ibm.com>
34478 * config/rs6000/rs6000.cc (create_complex_muldiv): Delete.
34479 (init_float128_ieee): Delete code to switch complex multiply and divide
34481 (complex_multiply_builtin_code): New helper function.
34482 (complex_divide_builtin_code): Likewise.
34483 (rs6000_mangle_decl_assembler_name): Add support for mangling the name
34484 of complex 128-bit multiply and divide built-in functions.
34486 2023-03-20 Peter Bergner <bergner@linux.ibm.com>
34489 * config/rs6000/rs6000-builtin.cc (stv_expand_builtin): Use tmode.
34491 2023-03-19 Jonny Grant <jg@jguk.org>
34493 * doc/extend.texi (Common Function Attributes) <nonnull>:
34496 2023-03-18 Peter Bergner <bergner@linux.ibm.com>
34498 PR rtl-optimization/109179
34499 * lra-constraints.cc (combine_reload_insn): Enforce TO is not a debug
34500 insn or note. Move the tests earlier to guard lra_get_insn_recog_data.
34502 2023-03-17 Jakub Jelinek <jakub@redhat.com>
34505 * function.h (push_struct_function): Add ABSTRACT_P argument defaulted
34507 * function.cc (push_struct_function): Add ABSTRACT_P argument, pass it
34508 to allocate_struct_function instead of false.
34509 * tree-inline.cc (initialize_cfun): Don't copy DECL_ARGUMENTS
34510 nor DECL_RESULT here. Pass true as ABSTRACT_P to
34511 push_struct_function. Call targetm.target_option.relayout_function
34513 (tree_function_versioning): Formatting fix.
34515 2023-03-17 Vladimir N. Makarov <vmakarov@redhat.com>
34517 * lra-constraints.cc: Include hooks.h.
34518 (combine_reload_insn): New function.
34519 (lra_constraints): Call it.
34521 2023-03-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34522 kito-cheng <kito.cheng@sifive.com>
34524 * config/riscv/riscv-v.cc (legitimize_move): Allow undef value
34525 as legitimate value.
34526 * config/riscv/riscv-vector-builtins.cc
34527 (function_expander::use_ternop_insn): Fix bugs of ternary intrinsic.
34528 (function_expander::use_widen_ternop_insn): Ditto.
34529 * config/riscv/vector.md (@vundefined<mode>): New pattern.
34530 (pred_mul_<optab><mode>_undef_merge): Remove.
34531 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
34532 (*pred_mul_<optab><mode>_undef_merge_extended_scalar): Ditto.
34533 (pred_neg_mul_<optab><mode>_undef_merge): Ditto.
34534 (*pred_neg_mul_<optab><mode>_undef_merge_scalar): Ditto.
34536 2023-03-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34539 * config/riscv/riscv.md: Fix subreg bug.
34541 2023-03-17 Jakub Jelinek <jakub@redhat.com>
34543 PR middle-end/108685
34544 * omp-expand.cc (expand_omp_for_ordered_loops): Add L0_BB argument,
34545 use its loop_father rather than BODY_BB's loop_father.
34546 (expand_omp_for_generic): Adjust expand_omp_for_ordered_loops caller.
34547 If broken_loop with ordered > collapse and at least one of those
34548 extra loops aren't guaranteed to have at least one iteration, change
34549 l0_bb's loop_father to entry_bb's loop_father. Set cont_bb's
34550 loop_father to l0_bb's loop_father rather than l1_bb's.
34552 2023-03-17 Jakub Jelinek <jakub@redhat.com>
34555 * gdbhooks.py (TreePrinter.to_string): Wrap
34556 gdb.parse_and_eval('tree_code_type') in a try block, parse
34557 and eval 'tree_code_type_tmpl<0>::tree_code_type' instead if it
34558 raises exception. Update comments for the recent tree_code_type
34561 2023-03-17 Sandra Loosemore <sandra@codesourcery.com>
34563 * doc/extend.texi (BPF Built-in Functions): Fix numerous markup
34564 issues. Add more line breaks to example so it doesn't overflow
34567 2023-03-17 Sandra Loosemore <sandra@codesourcery.com>
34569 * doc/extend.texi (Common Function Attributes) <access>: Fix bad
34570 line breaks in examples.
34571 <malloc>: Fix bad line breaks in running text, also copy-edit
34573 (Extended Asm) <Generic Operand Modifiers>: Fix @multitable width.
34574 * doc/invoke.texi (Option Summary) <Developer Options>: Fix misplaced
34576 (C++ Dialect Options) <-fcontracts>: Add line break in example.
34577 <-Wctad-maybe-unsupported>: Likewise.
34578 <-Winvalid-constexpr>: Likewise.
34579 (Warning Options) <-Wdangling-pointer>: Likewise.
34580 <-Winterference-size>: Likewise.
34581 <-Wvla-parameter>: Likewise.
34582 (Static Analyzer Options): Fix bad line breaks in running text,
34583 plus add some missing markup.
34584 (Optimize Options) <openacc-privatization>: Fix more bad line
34585 breaks in running text.
34587 2023-03-16 Uros Bizjak <ubizjak@gmail.com>
34589 * config/i386/i386-expand.cc (expand_vec_perm_pblendv):
34590 Handle 8-byte modes only with TARGET_MMX_WITH_SSE.
34591 (expand_vec_perm_2perm_pblendv): Ditto.
34593 2023-03-16 Martin Liska <mliska@suse.cz>
34595 PR middle-end/106133
34596 * gcc.cc (driver_handle_option): Use x_main_input_basename
34597 if x_dump_base_name is null.
34598 * opts.cc (common_handle_option): Likewise.
34600 2023-03-16 Richard Biener <rguenther@suse.de>
34602 PR tree-optimization/109123
34603 * gimple-ssa-warn-access.cc (pass_waccess::warn_invalid_pointer):
34604 Do not emit -Wuse-after-free late.
34605 (pass_waccess::check_call): Always check call pointer uses.
34607 2023-03-16 Richard Biener <rguenther@suse.de>
34609 PR tree-optimization/109141
34610 * tree-dfa.h (renumber_gimple_stmt_uids_in_block): New.
34611 * tree-dfa.cc (renumber_gimple_stmt_uids_in_block): Split
34613 (renumber_gimple_stmt_uids): ... here and
34614 (renumber_gimple_stmt_uids_in_blocks): ... here.
34615 * gimple-ssa-warn-access.cc (pass_waccess::use_after_inval_p):
34616 Use renumber_gimple_stmt_uids_in_block to also assign UIDs
34618 (pass_waccess::check_pointer_uses): Process all PHIs.
34620 2023-03-15 David Malcolm <dmalcolm@redhat.com>
34623 * diagnostic-format-sarif.cc (class sarif_invocation): New.
34624 (class sarif_ice_notification): New.
34625 (sarif_builder::m_invocation_obj): New field.
34626 (sarif_invocation::add_notification_for_ice): New.
34627 (sarif_invocation::prepare_to_flush): New.
34628 (sarif_ice_notification::sarif_ice_notification): New.
34629 (sarif_builder::sarif_builder): Add m_invocation_obj.
34630 (sarif_builder::end_diagnostic): Special-case DK_ICE and
34632 (sarif_builder::flush_to_file): Call prepare_to_flush on
34633 m_invocation_obj. Pass the latter to make_top_level_object.
34634 (sarif_builder::make_result_object): Move creation of "locations"
34636 (sarif_builder::make_locations_arr): ...this new function.
34637 (sarif_builder::make_top_level_object): Add "invocation_obj" param
34638 and pass it to make_run_object.
34639 (sarif_builder::make_run_object): Add "invocation_obj" param and
34641 (sarif_ice_handler): New callback.
34642 (diagnostic_output_format_init_sarif): Wire up sarif_ice_handler.
34643 * diagnostic.cc (diagnostic_initialize): Initialize new field
34645 (diagnostic_action_after_output): If it is set, make one attempt
34646 to call ice_handler_cb.
34647 * diagnostic.h (diagnostic_context::ice_handler_cb): New field.
34649 2023-03-15 Uros Bizjak <ubizjak@gmail.com>
34651 * config/i386/i386-expand.cc (expand_vec_perm_blend):
34652 Handle 8-byte modes only with TARGET_MMX_WITH_SSE. Handle V2SFmode
34653 and fix V2HImode handling.
34654 (expand_vec_perm_1): Try to emit BLEND instruction
34655 before MOVSS/MOVSD.
34656 * config/i386/mmx.md (*mmx_blendps): New insn pattern.
34658 2023-03-15 Tobias Burnus <tobias@codesourcery.com>
34660 * omp-low.cc (omp_runtime_api_call): Add omp_in_explicit_task.
34662 2023-03-15 Richard Biener <rguenther@suse.de>
34664 * gimple-ssa-warn-access.cc (pass_waccess::check_pointer_uses):
34665 Do not diagnose clobbers.
34667 2023-03-15 Richard Biener <rguenther@suse.de>
34669 PR tree-optimization/109139
34670 * tree-ssa-live.cc (remove_unused_locals): Look at the
34671 base address for unused decls on the LHS of .DEFERRED_INIT.
34673 2023-03-15 Xi Ruoyao <xry111@xry111.site>
34676 * builtins.cc (inline_string_cmp): Force the character
34677 difference into "result" pseudo-register, instead of reassign
34678 the pseudo-register.
34680 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
34682 * config.gcc: Add thead.o to RISC-V extra_objs.
34683 * config/riscv/peephole.md: Add mempair peephole passes.
34684 * config/riscv/riscv-protos.h (riscv_split_64bit_move_p): New
34686 (th_mempair_operands_p): Likewise.
34687 (th_mempair_order_operands): Likewise.
34688 (th_mempair_prepare_save_restore_operands): Likewise.
34689 (th_mempair_save_restore_regs): Likewise.
34690 (th_mempair_output_move): Likewise.
34691 * config/riscv/riscv.cc (riscv_save_reg): Move code.
34692 (riscv_restore_reg): Move code.
34693 (riscv_for_each_saved_reg): Add code to emit mempair insns.
34694 * config/riscv/t-riscv: Add thead.cc.
34695 * config/riscv/thead.md (*th_mempair_load_<GPR:mode>2):
34697 (*th_mempair_store_<GPR:mode>2): Likewise.
34698 (*th_mempair_load_extendsidi2): Likewise.
34699 (*th_mempair_load_zero_extendsidi2): Likewise.
34700 * config/riscv/thead.cc: New file.
34702 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
34704 * config/riscv/constraints.md (TARGET_XTHEADFMV ? FP_REGS : NO_REGS)
34705 New constraint "th_f_fmv".
34706 (TARGET_XTHEADFMV ? GR_REGS : NO_REGS): New constraint
34708 * config/riscv/riscv.cc (riscv_split_doubleword_move):
34709 Add split code for XTheadFmv.
34710 (riscv_secondary_memory_needed): XTheadFmv does not need
34712 * config/riscv/riscv.md: Add new UNSPEC_XTHEADFMV and
34713 UNSPEC_XTHEADFMV_HW. Add support for XTheadFmv to
34714 movdf_hardfloat_rv32.
34715 * config/riscv/thead.md (th_fmv_hw_w_x): New INSN.
34716 (th_fmv_x_w): New INSN.
34717 (th_fmv_x_hw): New INSN.
34719 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
34721 * config/riscv/riscv.md (maddhisi4): New expand.
34722 (msubhisi4): New expand.
34723 * config/riscv/thead.md (*th_mula<mode>): New pattern.
34724 (*th_mulawsi): New pattern.
34725 (*th_mulawsi2): New pattern.
34726 (*th_maddhisi4): New pattern.
34727 (*th_sextw_maddhisi4): New pattern.
34728 (*th_muls<mode>): New pattern.
34729 (*th_mulswsi): New pattern.
34730 (*th_mulswsi2): New pattern.
34731 (*th_msubhisi4): New pattern.
34732 (*th_sextw_msubhisi4): New pattern.
34734 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
34736 * config/riscv/iterators.md (TARGET_64BIT): Add GPR2 iterator.
34737 * config/riscv/riscv-protos.h (riscv_expand_conditional_move):
34739 * config/riscv/riscv.cc (riscv_rtx_costs): Add costs for
34741 (riscv_expand_conditional_move): New function.
34742 (riscv_expand_conditional_move_onesided): New function.
34743 * config/riscv/riscv.md: Add support for XTheadCondMov.
34744 * config/riscv/thead.md (*th_cond_mov<GPR:mode><GPR2:mode>): Add
34745 support for XTheadCondMov.
34746 (*th_cond_gpr_mov<GPR:mode><GPR2:mode>): Likewise.
34748 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
34750 * config/riscv/bitmanip.md (clzdi2): New expand.
34751 (clzsi2): New expand.
34752 (ctz<mode>2): New expand.
34753 (popcount<mode>2): New expand.
34754 (<bitmanip_optab>si2): Rename INSN.
34755 (*<bitmanip_optab>si2): Hide INSN name.
34756 (<bitmanip_optab>di2): Rename INSN.
34757 (*<bitmanip_optab>di2): Hide INSN name.
34758 (rotrsi3): Remove INSN.
34759 (rotr<mode>3): Add expand.
34760 (*rotrsi3): New INSN.
34761 (rotrdi3): Rename INSN.
34762 (*rotrdi3): Hide INSN name.
34763 (rotrsi3_sext): Rename INSN.
34764 (*rotrsi3_sext): Hide INSN name.
34765 (bswap<mode>2): Remove INSN.
34766 (bswapdi2): Add expand.
34767 (bswapsi2): Add expand.
34768 (*bswap<mode>2): Hide INSN name.
34769 * config/riscv/riscv.cc (riscv_rtx_costs): Add costs for sign
34771 * config/riscv/riscv.md (extv<mode>): New expand.
34772 (extzv<mode>): New expand.
34773 * config/riscv/thead.md (*th_srri<mode>3): New INSN.
34774 (*th_ext<mode>): New INSN.
34775 (*th_extu<mode>): New INSN.
34776 (*th_clz<mode>2): New INSN.
34777 (*th_rev<mode>2): New INSN.
34779 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
34781 * config/riscv/riscv.cc (riscv_rtx_costs): Add xthead:tst cost.
34782 * config/riscv/thead.md (*th_tst<mode>3): New INSN.
34784 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
34786 * config/riscv/riscv.md: Include thead.md
34787 * config/riscv/thead.md: New file.
34789 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
34791 * config/riscv/riscv-cores.def (RISCV_CORE): Add "thead-c906".
34793 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
34795 * common/config/riscv/riscv-common.cc: Add xthead* extensions.
34796 * config/riscv/riscv-opts.h (MASK_XTHEADBA): New.
34797 (MASK_XTHEADBB): New.
34798 (MASK_XTHEADBS): New.
34799 (MASK_XTHEADCMO): New.
34800 (MASK_XTHEADCONDMOV): New.
34801 (MASK_XTHEADFMEMIDX): New.
34802 (MASK_XTHEADFMV): New.
34803 (MASK_XTHEADINT): New.
34804 (MASK_XTHEADMAC): New.
34805 (MASK_XTHEADMEMIDX): New.
34806 (MASK_XTHEADMEMPAIR): New.
34807 (MASK_XTHEADSYNC): New.
34808 (TARGET_XTHEADBA): New.
34809 (TARGET_XTHEADBB): New.
34810 (TARGET_XTHEADBS): New.
34811 (TARGET_XTHEADCMO): New.
34812 (TARGET_XTHEADCONDMOV): New.
34813 (TARGET_XTHEADFMEMIDX): New.
34814 (TARGET_XTHEADFMV): New.
34815 (TARGET_XTHEADINT): New.
34816 (TARGET_XTHEADMAC): New.
34817 (TARGET_XTHEADMEMIDX): New.
34818 (TARGET_XTHEADMEMPAIR): new.
34819 (TARGET_XTHEADSYNC): New.
34820 * config/riscv/riscv.opt: Add riscv_xthead_subext.
34822 2023-03-15 Hu, Lin1 <lin1.hu@intel.com>
34825 * config/i386/i386-builtin.def (__builtin_ia32_vaesdec_v16qi,
34826 __builtin_ia32_vaesdeclast_v16qi,__builtin_ia32_vaesenc_v16qi,
34827 __builtin_ia32_vaesenclast_v16qi): Require OPTION_MASK_ISA_AVX512VL.
34829 2023-03-14 Jakub Jelinek <jakub@redhat.com>
34832 * config/i386/i386-expand.cc (split_double_concat): Fix splitting
34833 when lo is equal to dhi and hi is a MEM which uses dlo register.
34835 2023-03-14 Martin Jambor <mjambor@suse.cz>
34838 * ipa-cp.cc (update_profiling_info): Drop counts of orig_node to
34839 global0 instead of zeroing when it does not have as many counts as
34842 2023-03-14 Martin Jambor <mjambor@suse.cz>
34845 * ipa-cp.cc (update_specialized_profile): Drop orig_node_count to
34846 ipa count, remove assert, lenient_count_portion_handling, dump
34847 also orig_node_count.
34849 2023-03-14 Uros Bizjak <ubizjak@gmail.com>
34851 * config/i386/i386-expand.cc (expand_vec_perm_movs):
34852 Handle V2SImode for TARGET_MMX_WITH_SSE.
34853 * config/i386/mmx.md (*mmx_movss_<mode>): Rename from *mmx_movss
34854 using V2FI mode iterator to handle both V2SI and V2SF modes.
34856 2023-03-14 Sam James <sam@gentoo.org>
34858 * config/riscv/genrvv-type-indexer.cc: Avoid calloc() poisoning on musl by
34859 including <sstream> earlier.
34860 * system.h: Add INCLUDE_SSTREAM.
34862 2023-03-14 Richard Biener <rguenther@suse.de>
34864 * tree-ssa-live.cc (remove_unused_locals): Do not treat
34865 the .DEFERRED_INIT of a variable as use, instead remove
34866 that if it is the only use.
34868 2023-03-14 Eric Botcazou <ebotcazou@adacore.com>
34870 PR rtl-optimization/107762
34871 * expr.cc (emit_group_store): Revert latest change.
34873 2023-03-14 Andre Vieira <andre.simoesdiasvieira@arm.com>
34875 PR tree-optimization/109005
34876 * tree-if-conv.cc (get_bitfield_rep): Replace BLKmode check with
34877 aggregate type check.
34879 2023-03-14 Jakub Jelinek <jakub@redhat.com>
34881 PR tree-optimization/109115
34882 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Don't use
34883 r.upper_bound () on r.undefined_p () range.
34885 2023-03-14 Jan Hubicka <hubicka@ucw.cz>
34887 PR tree-optimization/106896
34888 * profile-count.cc (profile_count::to_sreal_scale): Synchronize
34889 implementatoin with probability_in; avoid some asserts.
34891 2023-03-13 Max Filippov <jcmvbkbc@gmail.com>
34893 * config/xtensa/linux.h (TARGET_ASM_FILE_END): New macro.
34895 2023-03-13 Sean Bright <sean@seanbright.com>
34897 * doc/invoke.texi (Warning Options): Remove errant 'See'
34900 2023-03-13 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
34902 * config/xtensa/xtensa.h (REG_OK_STRICT, REG_OK_FOR_INDEX_P,
34903 REG_OK_FOR_BASE_P): Remove.
34905 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34907 * config/riscv/vector-iterators.md (=vd,vr): Fine tune.
34908 (=vd,vd,vr,vr): Ditto.
34909 * config/riscv/vector.md: Ditto.
34911 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34913 * config/riscv/riscv-vector-builtins.cc
34914 (function_expander::use_compare_insn): Add operand predicate check.
34916 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34918 * config/riscv/vector.md: Fine tune RA constraints.
34920 2023-03-13 Tobias Burnus <tobias@codesourcery.com>
34922 * config/gcn/mkoffload.cc (main): Pass -save-temps on for the
34923 hsaco assemble/link.
34925 2023-03-13 Richard Biener <rguenther@suse.de>
34927 PR tree-optimization/109046
34928 * tree-ssa-forwprop.cc (pass_forwprop::execute): Combine
34929 piecewise complex loads.
34931 2023-03-12 Jakub Jelinek <jakub@redhat.com>
34933 * config/aarch64/aarch64.h (aarch64_bf16_type_node): Remove.
34934 (aarch64_bf16_ptr_type_node): Adjust comment.
34935 * config/aarch64/aarch64.cc (aarch64_gimplify_va_arg_expr): Use
34936 bfloat16_type_node rather than aarch64_bf16_type_node.
34937 (aarch64_libgcc_floating_mode_supported_p,
34938 aarch64_scalar_mode_supported_p): Also support BFmode.
34939 (aarch64_invalid_conversion, aarch64_invalid_unary_op): Remove.
34940 (aarch64_invalid_binary_op): Remove BFmode related rejections.
34941 (TARGET_INVALID_CONVERSION, TARGET_INVALID_UNARY_OP): Don't redefine.
34942 * config/aarch64/aarch64-builtins.cc (aarch64_bf16_type_node): Remove.
34943 (aarch64_int_or_fp_type): Use bfloat16_type_node rather than
34944 aarch64_bf16_type_node.
34945 (aarch64_init_simd_builtin_types): Likewise.
34946 (aarch64_init_bf16_types): Likewise. Don't create bfloat16_type_node,
34947 which is created in tree.cc already.
34948 * config/aarch64/aarch64-sve-builtins.def (svbfloat16_t): Likewise.
34950 2023-03-12 Roger Sayle <roger@nextmovesoftware.com>
34952 PR middle-end/109031
34953 * tree-chrec.cc (chrec_apply): When folding "{a, +, a} (x-1)",
34954 ensure that the type of x is as wide or wider than the type of a.
34956 2023-03-12 Tamar Christina <tamar.christina@arm.com>
34959 * config/aarch64/aarch64-simd.md (@aarch64_bitmask_udiv<mode>3): Remove.
34960 (*bitmask_shift_plus<mode>): New.
34961 * config/aarch64/aarch64-sve2.md (*bitmask_shift_plus<mode>): New.
34962 (@aarch64_bitmask_udiv<mode>3): Remove.
34963 * config/aarch64/aarch64.cc
34964 (aarch64_vectorize_can_special_div_by_constant,
34965 TARGET_VECTORIZE_CAN_SPECIAL_DIV_BY_CONST): Removed.
34966 (TARGET_VECTORIZE_PREFERRED_DIV_AS_SHIFTS_OVER_MULT,
34967 aarch64_vectorize_preferred_div_as_shifts_over_mult): New.
34969 2023-03-12 Tamar Christina <tamar.christina@arm.com>
34972 * target.def (preferred_div_as_shifts_over_mult): New.
34973 * doc/tm.texi.in: Document it.
34974 * doc/tm.texi: Regenerate.
34975 * targhooks.cc (default_preferred_div_as_shifts_over_mult): New.
34976 * targhooks.h (default_preferred_div_as_shifts_over_mult): New.
34977 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Use it.
34979 2023-03-12 Tamar Christina <tamar.christina@arm.com>
34980 Richard Sandiford <richard.sandiford@arm.com>
34983 * tree-ssa-math-opts.cc (convert_mult_to_fma): Inhibit FMA in case not
34986 2023-03-12 Tamar Christina <tamar.christina@arm.com>
34987 Andrew MacLeod <amacleod@redhat.com>
34990 * gimple-range-op.h (gimple_range_op_handler): Add maybe_non_standard.
34991 * gimple-range-op.cc (gimple_range_op_handler::gimple_range_op_handler):
34993 (gimple_range_op_handler::maybe_non_standard): New.
34994 * range-op.cc (class operator_widen_plus_signed,
34995 operator_widen_plus_signed::wi_fold, class operator_widen_plus_unsigned,
34996 operator_widen_plus_unsigned::wi_fold, class operator_widen_mult_signed,
34997 operator_widen_mult_signed::wi_fold, class operator_widen_mult_unsigned,
34998 operator_widen_mult_unsigned::wi_fold,
34999 ptr_op_widen_mult_signed, ptr_op_widen_mult_unsigned,
35000 ptr_op_widen_plus_signed, ptr_op_widen_plus_unsigned): New.
35001 * range-op.h (ptr_op_widen_mult_signed, ptr_op_widen_mult_unsigned,
35002 ptr_op_widen_plus_signed, ptr_op_widen_plus_unsigned): New
35004 2023-03-12 Tamar Christina <tamar.christina@arm.com>
35007 * doc/tm.texi (TARGET_VECTORIZE_CAN_SPECIAL_DIV_BY_CONST): Remove.
35008 * doc/tm.texi.in: Likewise.
35009 * explow.cc (round_push, align_dynamic_address): Revert previous patch.
35010 * expmed.cc (expand_divmod): Likewise.
35011 * expmed.h (expand_divmod): Likewise.
35012 * expr.cc (force_operand, expand_expr_divmod): Likewise.
35013 * optabs.cc (expand_doubleword_mod, expand_doubleword_divmod): Likewise.
35014 * target.def (can_special_div_by_const): Remove.
35015 * target.h: Remove tree-core.h include
35016 * targhooks.cc (default_can_special_div_by_const): Remove.
35017 * targhooks.h (default_can_special_div_by_const): Remove.
35018 * tree-vect-generic.cc (expand_vector_operation): Remove hook.
35019 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Remove hook.
35020 * tree-vect-stmts.cc (vectorizable_operation): Remove hook.
35022 2023-03-12 Sandra Loosemore <sandra@codesourcery.com>
35024 * doc/install.texi2html: Fix issue number typo in comment.
35026 2023-03-12 Gaius Mulley <gaiusmod2@gmail.com>
35028 * doc/gm2.texi (Elementary data types): Equivalence BOOLEAN with
35031 2023-03-12 Sandra Loosemore <sandra@codesourcery.com>
35033 * doc/invoke.texi (Optimize Options): Add markup to
35034 description of asan-kernel-mem-intrinsic-prefix, and clarify
35037 2023-03-11 Gerald Pfeifer <gerald@pfeifer.com>
35039 * doc/extend.texi (Named Address Spaces): Drop a redundant link
35042 2023-03-11 Jeff Law <jlaw@ventanamicro>
35045 * doc/extend.texi: Clarify Attribute Syntax a bit.
35047 2023-03-11 Sandra Loosemore <sandra@codesourcery.com>
35049 * doc/install.texi (Prerequisites): Suggest using newer versions
35051 (Final install): Clean up and modernize discussion of how to
35052 build or obtain the GCC manuals.
35053 * doc/install.texi2html: Update comment to point to the PR instead
35054 of "makeinfo 4.7 brokenness" (it's not specific to that version).
35056 2023-03-10 Jakub Jelinek <jakub@redhat.com>
35059 * optabs.cc (expand_fix): For conversions from BFmode to integral,
35060 use shifts to convert it to SFmode first and then convert SFmode
35063 2023-03-10 Andrew Pinski <apinski@marvell.com>
35065 * config/aarch64/aarch64.md: Add a new define_split
35068 2023-03-10 Richard Biener <rguenther@suse.de>
35070 * tree-ssa-structalias.cc (solve_graph): Immediately
35071 iterate self-cycles.
35073 2023-03-10 Jakub Jelinek <jakub@redhat.com>
35075 PR tree-optimization/109008
35076 * range-op-float.cc (float_widen_lhs_range): If not
35077 -frounding-math and not IBM double double format, extend lhs
35078 range just by 0.5ulp rather than 1ulp in each direction.
35080 2023-03-10 Jakub Jelinek <jakub@redhat.com>
35083 * config.gcc (x86_64-*-cygwin*): Don't add i386/t-cygwin-w64 into
35085 * config/i386/t-cygwin-w64: Remove.
35087 2023-03-10 Jakub Jelinek <jakub@redhat.com>
35090 * tree-core.h (tree_code_type, tree_code_length): For C++11 or
35091 C++14, don't declare as extern const arrays.
35092 (tree_code_type_tmpl, tree_code_length_tmpl): New types with
35093 static constexpr member arrays for C++11 or C++14.
35094 * tree.h (TREE_CODE_CLASS): For C++11 or C++14 use
35095 tree_code_type_tmpl <0>::tree_code_type instead of tree_code_type.
35096 (TREE_CODE_LENGTH): For C++11 or C++14 use
35097 tree_code_length_tmpl <0>::tree_code_length instead of
35099 * tree.cc (tree_code_type, tree_code_length): Remove.
35101 2023-03-10 Jakub Jelinek <jakub@redhat.com>
35104 * common.opt (fcanon-prefix-map): New option.
35105 * opts.cc: Include file-prefix-map.h.
35106 (flag_canon_prefix_map): New variable.
35107 (common_handle_option): Handle OPT_fcanon_prefix_map.
35108 (gen_command_line_string): Ignore OPT_fcanon_prefix_map.
35109 * file-prefix-map.h (flag_canon_prefix_map): Declare.
35110 * file-prefix-map.cc (struct file_prefix_map): Add canonicalize
35112 (add_prefix_map): Initialize canonicalize member from
35113 flag_canon_prefix_map, and if true canonicalize it using lrealpath.
35114 (remap_filename): Revert 2022-11-01 and 2022-11-07 changes,
35115 use lrealpath result only for map->canonicalize map entries.
35116 * lto-opts.cc (lto_write_options): Ignore OPT_fcanon_prefix_map.
35117 * opts-global.cc (handle_common_deferred_options): Clear
35118 flag_canon_prefix_map at the start and handle OPT_fcanon_prefix_map.
35119 * doc/invoke.texi (-fcanon-prefix-map): Document.
35120 (-ffile-prefix-map, -fdebug-prefix-map, -fprofile-prefix-map): Add
35121 see also for -fcanon-prefix-map.
35122 * doc/cppopts.texi (-fmacro-prefix-map): Likewise.
35124 2023-03-10 Jakub Jelinek <jakub@redhat.com>
35127 * cgraphunit.cc (check_global_declaration): Don't warn for unused
35128 variables which have OPT_Wunused_variable warning suppressed.
35130 2023-03-10 Jakub Jelinek <jakub@redhat.com>
35132 PR tree-optimization/109008
35133 * range-op-float.cc (float_widen_lhs_range): If lb is
35134 minimum representable finite number or ub is maximum
35135 representable finite number, instead of widening it to
35136 -inf or inf widen it to negative or positive 0x0.8p+(EMAX+1).
35137 Temporarily clear flag_finite_math_only when canonicalizing
35140 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35142 * config/riscv/riscv-builtins.cc (riscv_gimple_fold_builtin): New function.
35143 * config/riscv/riscv-protos.h (riscv_gimple_fold_builtin): Ditto.
35144 (gimple_fold_builtin): Ditto.
35145 * config/riscv/riscv-vector-builtins-bases.cc (class read_vl): New class.
35146 (class vleff): Ditto.
35148 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
35149 * config/riscv/riscv-vector-builtins-functions.def (read_vl): Ditto.
35151 * config/riscv/riscv-vector-builtins-shapes.cc (struct read_vl_def): Ditto.
35152 (struct fault_load_def): Ditto.
35154 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
35155 * config/riscv/riscv-vector-builtins.cc
35156 (rvv_arg_type_info::get_tree_type): Add size_ptr.
35157 (gimple_folder::gimple_folder): New class.
35158 (gimple_folder::fold): Ditto.
35159 (gimple_fold_builtin): New function.
35160 (get_read_vl_instance): Ditto.
35161 (get_read_vl_decl): Ditto.
35162 * config/riscv/riscv-vector-builtins.def (size_ptr): Add size_ptr.
35163 * config/riscv/riscv-vector-builtins.h (class gimple_folder): New class.
35164 (get_read_vl_instance): New function.
35165 (get_read_vl_decl): Ditto.
35166 * config/riscv/riscv-vsetvl.cc (fault_first_load_p): Ditto.
35167 (read_vl_insn_p): Ditto.
35168 (available_occurrence_p): Ditto.
35169 (backward_propagate_worthwhile_p): Ditto.
35170 (gen_vsetvl_pat): Adapt for vleff support.
35171 (get_forward_read_vl_insn): New function.
35172 (get_backward_fault_first_load_insn): Ditto.
35173 (source_equal_p): Adapt for vleff support.
35174 (first_ratio_invalid_for_second_sew_p): Remove.
35175 (first_ratio_invalid_for_second_lmul_p): Ditto.
35176 (first_lmul_less_than_second_lmul_p): Ditto.
35177 (first_ratio_less_than_second_ratio_p): Ditto.
35178 (support_relaxed_compatible_p): New function.
35179 (vector_insn_info::operator>): Remove.
35180 (vector_insn_info::operator>=): Refine.
35181 (vector_insn_info::parse_insn): Adapt for vleff support.
35182 (vector_insn_info::compatible_p): Ditto.
35183 (vector_insn_info::update_fault_first_load_avl): New function.
35184 (pass_vsetvl::transfer_after): Adapt for vleff support.
35185 (pass_vsetvl::demand_fusion): Ditto.
35186 (pass_vsetvl::cleanup_insns): Ditto.
35187 * config/riscv/riscv-vsetvl.def (DEF_INCOMPATIBLE_COND): Remove
35188 redundant condtions.
35189 * config/riscv/riscv-vsetvl.h (struct demands_cond): New function.
35190 * config/riscv/riscv.cc (TARGET_GIMPLE_FOLD_BUILTIN): New target hook.
35191 * config/riscv/riscv.md: Adapt for vleff support.
35192 * config/riscv/t-riscv: Ditto.
35193 * config/riscv/vector-iterators.md: New iterator.
35194 * config/riscv/vector.md (read_vlsi): New pattern.
35195 (read_vldi_zero_extend): Ditto.
35196 (@pred_fault_load<mode>): Ditto.
35198 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35200 * config/riscv/riscv-vector-builtins.cc
35201 (function_expander::use_ternop_insn): Use maybe_gen_insn instead.
35202 (function_expander::use_widen_ternop_insn): Ditto.
35203 * optabs.cc (maybe_gen_insn): Extend nops handling.
35205 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35207 * config/riscv/riscv-vector-builtins-bases.cc: Split indexed load
35208 patterns according to RVV ISA.
35209 * config/riscv/vector-iterators.md: New iterators.
35210 * config/riscv/vector.md
35211 (@pred_indexed_<order>load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Remove.
35212 (@pred_indexed_<order>load<mode>_same_eew): New pattern.
35213 (@pred_indexed_<order>load<mode>_x2_greater_eew): Ditto.
35214 (@pred_indexed_<order>load<mode>_x4_greater_eew): Ditto.
35215 (@pred_indexed_<order>load<mode>_x8_greater_eew): Ditto.
35216 (@pred_indexed_<order>load<mode>_x2_smaller_eew): Ditto.
35217 (@pred_indexed_<order>load<mode>_x4_smaller_eew): Ditto.
35218 (@pred_indexed_<order>load<mode>_x8_smaller_eew): Ditto.
35219 (@pred_indexed_<order>load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Remove.
35220 (@pred_indexed_<order>load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
35221 (@pred_indexed_<order>load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
35222 (@pred_indexed_<order>load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
35223 (@pred_indexed_<order>load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
35224 (@pred_indexed_<order>load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
35226 2023-03-10 Michael Collison <collison@rivosinc.com>
35228 * tree-vect-loop-manip.cc (vect_do_peeling): Use
35229 result of constant_lower_bound instead of vf for the lower
35230 bound of the epilog loop trip count.
35232 2023-03-09 Tamar Christina <tamar.christina@arm.com>
35234 * passes.cc (emergency_dump_function): Finish graph generation.
35236 2023-03-09 Tamar Christina <tamar.christina@arm.com>
35238 * config/aarch64/aarch64.md (tbranch_<code><mode>3): Restrict to SHORT
35239 and bottom bit only.
35241 2023-03-09 Andrew Pinski <apinski@marvell.com>
35243 PR tree-optimization/108980
35244 * gimple-array-bounds.cc (array_bounds_checker::check_array_ref):
35245 Reorgnize the call to warning for not strict flexible arrays
35246 to be before the check of warned.
35248 2023-03-09 Jason Merrill <jason@redhat.com>
35250 * doc/extend.texi: Comment out __is_deducible docs.
35252 2023-03-09 Jason Merrill <jason@redhat.com>
35255 * doc/extend.texi (Type Traits):: Document __is_deducible.
35257 2023-03-09 Costas Argyris <costas.argyris@gmail.com>
35260 * config.host: add object for x86_64-*-mingw*.
35261 * config/i386/sym-mingw32.cc: dummy file to attach
35263 * config/i386/utf8-mingw32.rc: windres resource file.
35264 * config/i386/winnt-utf8.manifest: XML manifest to
35266 * config/i386/x-mingw32: reference to x-mingw32-utf8.
35267 * config/i386/x-mingw32-utf8: Makefile fragment to
35268 embed UTF-8 manifest.
35270 2023-03-09 Vladimir N. Makarov <vmakarov@redhat.com>
35272 * lra-constraints.cc (process_alt_operands): Use operand modes for
35273 clobbered regs instead of the biggest access mode.
35275 2023-03-09 Richard Biener <rguenther@suse.de>
35277 PR middle-end/108995
35278 * fold-const.cc (extract_muldiv_1): Avoid folding
35279 (CST * b) / CST2 when sanitizing overflow and we rely on
35280 overflow being undefined.
35282 2023-03-09 Jakub Jelinek <jakub@redhat.com>
35283 Richard Biener <rguenther@suse.de>
35285 PR tree-optimization/109008
35286 * range-op-float.cc (float_widen_lhs_range): New function.
35287 (foperator_plus::op1_range, foperator_minus::op1_range,
35288 foperator_minus::op2_range, foperator_mult::op1_range,
35289 foperator_div::op1_range, foperator_div::op2_range): Use it.
35291 2023-03-07 Jonathan Grant <jg@jguk.org>
35294 * doc/invoke.texi (Instrumentation Options): Clarify
35295 LeakSanitizer behavior.
35297 2023-03-07 Benson Muite <benson_muite@emailplus.org>
35299 * doc/install.texi (Prerequisites): Add link to gmplib.org.
35301 2023-03-07 Pan Li <pan2.li@intel.com>
35302 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35306 * config/riscv/riscv-modes.def (ADJUST_PRECISION): Adjust VNx*BI
35308 * config/riscv/riscv.cc (riscv_v_adjust_precision): New.
35309 * config/riscv/riscv.h (riscv_v_adjust_precision): New.
35310 * genmodes.cc (adj_precision): New.
35311 (ADJUST_PRECISION): New.
35312 (emit_mode_adjustments): Handle ADJUST_PRECISION.
35314 2023-03-07 Hans-Peter Nilsson <hp@axis.com>
35316 * doc/sourcebuild.texi: Document check_effective_target_tail_call.
35318 2023-03-06 Paul-Antoine Arras <pa@codesourcery.com>
35320 * config/gcn/gcn-valu.md (<expander><mode>3_exec): Add patterns for
35321 {s|u}{max|min} in QI, HI and DI modes.
35322 (<expander><mode>3): Add pattern for {s|u}{max|min} in DI mode.
35323 (cond_<fexpander><mode>): Add pattern for cond_f{max|min}.
35324 (cond_<expander><mode>): Add pattern for cond_{s|u}{max|min}.
35325 * config/gcn/gcn.cc (gcn_spill_class): Allow the exec register to be
35328 2023-03-06 Richard Biener <rguenther@suse.de>
35330 PR tree-optimization/109025
35331 * tree-vect-loop.cc (vect_is_simple_reduction): Verify
35332 the inner LC PHI use is the inner loop PHI latch definition
35333 before classifying an outer PHI as double reduction.
35335 2023-03-06 Jan Hubicka <hubicka@ucw.cz>
35338 * config/i386/x86-tune.def (X86_TUNE_USE_SCATTER_2PARTS): Enable for
35340 (X86_TUNE_USE_SCATTER_4PARTS): Likewise.
35341 (X86_TUNE_USE_SCATTER): Likewise.
35343 2023-03-06 Xi Ruoyao <xry111@xry111.site>
35346 * config/loongarch/loongarch.h (FP_RETURN): Use
35347 TARGET_*_FLOAT_ABI instead of TARGET_*_FLOAT.
35348 (UNITS_PER_FP_ARG): Likewise.
35350 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35352 * config/riscv/riscv-vsetvl.cc (reg_available_p): Fix bug.
35353 (pass_vsetvl::backward_demand_fusion): Ditto.
35355 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
35356 SiYu Wu <siyu@isrc.iscas.ac.cn>
35358 * config/riscv/crypto.md (riscv_sm3p0_<mode>): Add ZKSED's and ZKSH's
35360 (riscv_sm3p1_<mode>): New.
35361 (riscv_sm4ed_<mode>): New.
35362 (riscv_sm4ks_<mode>): New.
35363 * config/riscv/riscv-builtins.cc (AVAIL): Add ZKSED's and ZKSH's AVAIL.
35364 * config/riscv/riscv-scalar-crypto.def (RISCV_BUILTIN): Add ZKSED's and
35365 ZKSH's built-in functions.
35367 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
35368 SiYu Wu <siyu@isrc.iscas.ac.cn>
35370 * config/riscv/crypto.md (riscv_sha256sig0_<mode>): Add ZKNH's instructions.
35371 (riscv_sha256sig1_<mode>): New.
35372 (riscv_sha256sum0_<mode>): New.
35373 (riscv_sha256sum1_<mode>): New.
35374 (riscv_sha512sig0h): New.
35375 (riscv_sha512sig0l): New.
35376 (riscv_sha512sig1h): New.
35377 (riscv_sha512sig1l): New.
35378 (riscv_sha512sum0r): New.
35379 (riscv_sha512sum1r): New.
35380 (riscv_sha512sig0): New.
35381 (riscv_sha512sig1): New.
35382 (riscv_sha512sum0): New.
35383 (riscv_sha512sum1): New.
35384 * config/riscv/riscv-builtins.cc (AVAIL): And ZKNH's AVAIL.
35385 * config/riscv/riscv-scalar-crypto.def (RISCV_BUILTIN): And ZKNH's
35386 built-in functions.
35387 (DIRECT_BUILTIN): Add new.
35389 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
35390 SiYu Wu <siyu@isrc.iscas.ac.cn>
35392 * config/riscv/constraints.md (D03): Add constants of bs and rnum.
35394 * config/riscv/crypto.md (riscv_aes32dsi): Add ZKND's and ZKNE's instructions.
35395 (riscv_aes32dsmi): New.
35396 (riscv_aes64ds): New.
35397 (riscv_aes64dsm): New.
35398 (riscv_aes64im): New.
35399 (riscv_aes64ks1i): New.
35400 (riscv_aes64ks2): New.
35401 (riscv_aes32esi): New.
35402 (riscv_aes32esmi): New.
35403 (riscv_aes64es): New.
35404 (riscv_aes64esm): New.
35405 * config/riscv/riscv-builtins.cc (AVAIL): Add ZKND's and ZKNE's AVAIL.
35406 * config/riscv/riscv-scalar-crypto.def (DIRECT_BUILTIN): Add ZKND's and
35407 ZKNE's built-in functions.
35409 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
35410 SiYu Wu <siyu@isrc.iscas.ac.cn>
35412 * config/riscv/bitmanip.md: Add ZBKB's instructions.
35413 * config/riscv/riscv-builtins.cc (AVAIL): Add new.
35414 * config/riscv/riscv.md: Add new type for crypto instructions.
35415 * config/riscv/crypto.md: Add Scalar Cryptography extension's machine
35417 * config/riscv/riscv-scalar-crypto.def: Add Scalar Cryptography
35418 extension's built-in function file.
35420 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
35421 SiYu Wu <siyu@isrc.iscas.ac.cn>
35423 * config/riscv/riscv-builtins.cc (RISCV_FTYPE_NAME2): New.
35424 (RISCV_FTYPE_NAME3): New.
35425 (RISCV_ATYPE_QI): New.
35426 (RISCV_ATYPE_HI): New.
35427 (RISCV_FTYPE_ATYPES2): New.
35428 (RISCV_FTYPE_ATYPES3): New.
35429 * config/riscv/riscv-ftypes.def (2): New.
35432 2023-03-05 Vineet Gupta <vineetg@rivosinc.com>
35434 * config/riscv/riscv.cc (riscv_rtx_costs): Fixed IN_RANGE() to
35437 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35438 kito-cheng <kito.cheng@sifive.com>
35440 * config/riscv/predicates.md (vector_any_register_operand): New predicate.
35441 * config/riscv/riscv-c.cc (riscv_check_builtin_call): New function.
35442 (riscv_register_pragmas): Add builtin function check call.
35443 * config/riscv/riscv-protos.h (RVV_VUNDEF): Adapt macro.
35444 (check_builtin_call): New function.
35445 * config/riscv/riscv-vector-builtins-bases.cc (class vundefined): New class.
35446 (class vreinterpret): Ditto.
35447 (class vlmul_ext): Ditto.
35448 (class vlmul_trunc): Ditto.
35449 (class vset): Ditto.
35450 (class vget): Ditto.
35452 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
35453 * config/riscv/riscv-vector-builtins-functions.def (vluxei8): Change name.
35469 (vundefined): Add new intrinsic.
35470 (vreinterpret): Ditto.
35471 (vlmul_ext): Ditto.
35472 (vlmul_trunc): Ditto.
35475 * config/riscv/riscv-vector-builtins-shapes.cc (struct return_mask_def): New class.
35476 (struct narrow_alu_def): Ditto.
35477 (struct reduc_alu_def): Ditto.
35478 (struct vundefined_def): Ditto.
35479 (struct misc_def): Ditto.
35480 (struct vset_def): Ditto.
35481 (struct vget_def): Ditto.
35483 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
35484 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_EEW8_INTERPRET_OPS): New def.
35485 (DEF_RVV_EEW16_INTERPRET_OPS): Ditto.
35486 (DEF_RVV_EEW32_INTERPRET_OPS): Ditto.
35487 (DEF_RVV_EEW64_INTERPRET_OPS): Ditto.
35488 (DEF_RVV_X2_VLMUL_EXT_OPS): Ditto.
35489 (DEF_RVV_X4_VLMUL_EXT_OPS): Ditto.
35490 (DEF_RVV_X8_VLMUL_EXT_OPS): Ditto.
35491 (DEF_RVV_X16_VLMUL_EXT_OPS): Ditto.
35492 (DEF_RVV_X32_VLMUL_EXT_OPS): Ditto.
35493 (DEF_RVV_X64_VLMUL_EXT_OPS): Ditto.
35494 (DEF_RVV_LMUL1_OPS): Ditto.
35495 (DEF_RVV_LMUL2_OPS): Ditto.
35496 (DEF_RVV_LMUL4_OPS): Ditto.
35497 (vint16mf4_t): Ditto.
35498 (vint16mf2_t): Ditto.
35499 (vint16m1_t): Ditto.
35500 (vint16m2_t): Ditto.
35501 (vint16m4_t): Ditto.
35502 (vint16m8_t): Ditto.
35503 (vint32mf2_t): Ditto.
35504 (vint32m1_t): Ditto.
35505 (vint32m2_t): Ditto.
35506 (vint32m4_t): Ditto.
35507 (vint32m8_t): Ditto.
35508 (vint64m1_t): Ditto.
35509 (vint64m2_t): Ditto.
35510 (vint64m4_t): Ditto.
35511 (vint64m8_t): Ditto.
35512 (vuint16mf4_t): Ditto.
35513 (vuint16mf2_t): Ditto.
35514 (vuint16m1_t): Ditto.
35515 (vuint16m2_t): Ditto.
35516 (vuint16m4_t): Ditto.
35517 (vuint16m8_t): Ditto.
35518 (vuint32mf2_t): Ditto.
35519 (vuint32m1_t): Ditto.
35520 (vuint32m2_t): Ditto.
35521 (vuint32m4_t): Ditto.
35522 (vuint32m8_t): Ditto.
35523 (vuint64m1_t): Ditto.
35524 (vuint64m2_t): Ditto.
35525 (vuint64m4_t): Ditto.
35526 (vuint64m8_t): Ditto.
35527 (vint8mf4_t): Ditto.
35528 (vint8mf2_t): Ditto.
35529 (vint8m1_t): Ditto.
35530 (vint8m2_t): Ditto.
35531 (vint8m4_t): Ditto.
35532 (vint8m8_t): Ditto.
35533 (vuint8mf4_t): Ditto.
35534 (vuint8mf2_t): Ditto.
35535 (vuint8m1_t): Ditto.
35536 (vuint8m2_t): Ditto.
35537 (vuint8m4_t): Ditto.
35538 (vuint8m8_t): Ditto.
35539 (vint8mf8_t): Ditto.
35540 (vuint8mf8_t): Ditto.
35541 (vfloat32mf2_t): Ditto.
35542 (vfloat32m1_t): Ditto.
35543 (vfloat32m2_t): Ditto.
35544 (vfloat32m4_t): Ditto.
35545 (vfloat64m1_t): Ditto.
35546 (vfloat64m2_t): Ditto.
35547 (vfloat64m4_t): Ditto.
35548 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
35549 (DEF_RVV_EEW8_INTERPRET_OPS): Ditto.
35550 (DEF_RVV_EEW16_INTERPRET_OPS): Ditto.
35551 (DEF_RVV_EEW32_INTERPRET_OPS): Ditto.
35552 (DEF_RVV_EEW64_INTERPRET_OPS): Ditto.
35553 (DEF_RVV_X2_VLMUL_EXT_OPS): Ditto.
35554 (DEF_RVV_X4_VLMUL_EXT_OPS): Ditto.
35555 (DEF_RVV_X8_VLMUL_EXT_OPS): Ditto.
35556 (DEF_RVV_X16_VLMUL_EXT_OPS): Ditto.
35557 (DEF_RVV_X32_VLMUL_EXT_OPS): Ditto.
35558 (DEF_RVV_X64_VLMUL_EXT_OPS): Ditto.
35559 (DEF_RVV_LMUL1_OPS): Ditto.
35560 (DEF_RVV_LMUL2_OPS): Ditto.
35561 (DEF_RVV_LMUL4_OPS): Ditto.
35562 (DEF_RVV_TYPE_INDEX): Ditto.
35563 (required_extensions_p): Adapt for new intrinsic support/
35564 (get_required_extensions): New function.
35565 (check_required_extensions): Ditto.
35566 (unsigned_base_type_p): Remove.
35567 (rvv_arg_type_info::get_scalar_ptr_type): New function.
35568 (get_mode_for_bitsize): Remove.
35569 (rvv_arg_type_info::get_scalar_const_ptr_type): New function.
35570 (rvv_arg_type_info::get_base_vector_type): Ditto.
35571 (rvv_arg_type_info::get_function_type_index): Ditto.
35572 (DEF_RVV_BASE_TYPE): New def.
35573 (function_builder::apply_predication): New class.
35574 (function_expander::mask_mode): Ditto.
35575 (function_checker::function_checker): Ditto.
35576 (function_checker::report_non_ice): Ditto.
35577 (function_checker::report_out_of_range): Ditto.
35578 (function_checker::require_immediate): Ditto.
35579 (function_checker::require_immediate_range): Ditto.
35580 (function_checker::check): Ditto.
35581 (check_builtin_call): Ditto.
35582 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): New def.
35583 (DEF_RVV_BASE_TYPE): Ditto.
35584 (DEF_RVV_TYPE_INDEX): Ditto.
35585 (vbool64_t): Ditto.
35586 (vbool32_t): Ditto.
35587 (vbool16_t): Ditto.
35592 (vuint8mf8_t): Ditto.
35593 (vuint8mf4_t): Ditto.
35594 (vuint8mf2_t): Ditto.
35595 (vuint8m1_t): Ditto.
35596 (vuint8m2_t): Ditto.
35597 (vint8m4_t): Ditto.
35598 (vuint8m4_t): Ditto.
35599 (vint8m8_t): Ditto.
35600 (vuint8m8_t): Ditto.
35601 (vint16mf4_t): Ditto.
35602 (vuint16mf2_t): Ditto.
35603 (vuint16m1_t): Ditto.
35604 (vuint16m2_t): Ditto.
35605 (vuint16m4_t): Ditto.
35606 (vuint16m8_t): Ditto.
35607 (vint32mf2_t): Ditto.
35608 (vuint32m1_t): Ditto.
35609 (vuint32m2_t): Ditto.
35610 (vuint32m4_t): Ditto.
35611 (vuint32m8_t): Ditto.
35612 (vuint64m1_t): Ditto.
35613 (vuint64m2_t): Ditto.
35614 (vuint64m4_t): Ditto.
35615 (vuint64m8_t): Ditto.
35616 (vfloat32mf2_t): Ditto.
35617 (vfloat32m1_t): Ditto.
35618 (vfloat32m2_t): Ditto.
35619 (vfloat32m4_t): Ditto.
35620 (vfloat32m8_t): Ditto.
35621 (vfloat64m1_t): Ditto.
35622 (vfloat64m4_t): Ditto.
35623 (vector): Move it def.
35626 (signed_vector): Ditto.
35627 (unsigned_vector): Ditto.
35628 (unsigned_scalar): Ditto.
35629 (vector_ptr): Ditto.
35630 (scalar_ptr): Ditto.
35631 (scalar_const_ptr): Ditto.
35635 (unsigned_long): Ditto.
35637 (eew8_index): Ditto.
35638 (eew16_index): Ditto.
35639 (eew32_index): Ditto.
35640 (eew64_index): Ditto.
35641 (shift_vector): Ditto.
35642 (double_trunc_vector): Ditto.
35643 (quad_trunc_vector): Ditto.
35644 (oct_trunc_vector): Ditto.
35645 (double_trunc_scalar): Ditto.
35646 (double_trunc_signed_vector): Ditto.
35647 (double_trunc_unsigned_vector): Ditto.
35648 (double_trunc_unsigned_scalar): Ditto.
35649 (double_trunc_float_vector): Ditto.
35650 (float_vector): Ditto.
35651 (lmul1_vector): Ditto.
35652 (widen_lmul1_vector): Ditto.
35653 (eew8_interpret): Ditto.
35654 (eew16_interpret): Ditto.
35655 (eew32_interpret): Ditto.
35656 (eew64_interpret): Ditto.
35657 (vlmul_ext_x2): Ditto.
35658 (vlmul_ext_x4): Ditto.
35659 (vlmul_ext_x8): Ditto.
35660 (vlmul_ext_x16): Ditto.
35661 (vlmul_ext_x32): Ditto.
35662 (vlmul_ext_x64): Ditto.
35663 * config/riscv/riscv-vector-builtins.h (DEF_RVV_BASE_TYPE): New def.
35664 (struct function_type_info): New function.
35665 (struct rvv_arg_type_info): Ditto.
35666 (class function_checker): New class.
35667 (rvv_arg_type_info::get_scalar_type): New function.
35668 (rvv_arg_type_info::get_vector_type): Ditto.
35669 (function_expander::ret_mode): New function.
35670 (function_checker::arg_mode): Ditto.
35671 (function_checker::ret_mode): Ditto.
35672 * config/riscv/t-riscv: Add generator.
35673 * config/riscv/vector-iterators.md: New iterators.
35674 * config/riscv/vector.md (vundefined<mode>): New pattern.
35675 (@vundefined<mode>): Ditto.
35676 (@vreinterpret<mode>): Ditto.
35677 (@vlmul_extx2<mode>): Ditto.
35678 (@vlmul_extx4<mode>): Ditto.
35679 (@vlmul_extx8<mode>): Ditto.
35680 (@vlmul_extx16<mode>): Ditto.
35681 (@vlmul_extx32<mode>): Ditto.
35682 (@vlmul_extx64<mode>): Ditto.
35683 (*vlmul_extx2<mode>): Ditto.
35684 (*vlmul_extx4<mode>): Ditto.
35685 (*vlmul_extx8<mode>): Ditto.
35686 (*vlmul_extx16<mode>): Ditto.
35687 (*vlmul_extx32<mode>): Ditto.
35688 (*vlmul_extx64<mode>): Ditto.
35689 * config/riscv/genrvv-type-indexer.cc: New file.
35691 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35693 * config/riscv/riscv-protos.h (enum vlen_enum): New enum.
35694 (slide1_sew64_helper): New function.
35695 * config/riscv/riscv-v.cc (compute_vlmax): Ditto.
35696 (get_unknown_min_value): Ditto.
35697 (force_vector_length_operand): Ditto.
35698 (gen_no_side_effects_vsetvl_rtx): Ditto.
35699 (get_vl_x2_rtx): Ditto.
35700 (slide1_sew64_helper): Ditto.
35701 * config/riscv/riscv-vector-builtins-bases.cc (class slideop): New class.
35702 (class vrgather): Ditto.
35703 (class vrgatherei16): Ditto.
35704 (class vcompress): Ditto.
35706 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
35707 * config/riscv/riscv-vector-builtins-functions.def (vslideup): Ditto.
35708 (vslidedown): Ditto.
35709 (vslide1up): Ditto.
35710 (vslide1down): Ditto.
35711 (vfslide1up): Ditto.
35712 (vfslide1down): Ditto.
35714 (vrgatherei16): Ditto.
35715 (vcompress): Ditto.
35716 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_EI16_OPS): New macro.
35717 (vint8mf8_t): Ditto.
35718 (vint8mf4_t): Ditto.
35719 (vint8mf2_t): Ditto.
35720 (vint8m1_t): Ditto.
35721 (vint8m2_t): Ditto.
35722 (vint8m4_t): Ditto.
35723 (vint16mf4_t): Ditto.
35724 (vint16mf2_t): Ditto.
35725 (vint16m1_t): Ditto.
35726 (vint16m2_t): Ditto.
35727 (vint16m4_t): Ditto.
35728 (vint16m8_t): Ditto.
35729 (vint32mf2_t): Ditto.
35730 (vint32m1_t): Ditto.
35731 (vint32m2_t): Ditto.
35732 (vint32m4_t): Ditto.
35733 (vint32m8_t): Ditto.
35734 (vint64m1_t): Ditto.
35735 (vint64m2_t): Ditto.
35736 (vint64m4_t): Ditto.
35737 (vint64m8_t): Ditto.
35738 (vuint8mf8_t): Ditto.
35739 (vuint8mf4_t): Ditto.
35740 (vuint8mf2_t): Ditto.
35741 (vuint8m1_t): Ditto.
35742 (vuint8m2_t): Ditto.
35743 (vuint8m4_t): Ditto.
35744 (vuint16mf4_t): Ditto.
35745 (vuint16mf2_t): Ditto.
35746 (vuint16m1_t): Ditto.
35747 (vuint16m2_t): Ditto.
35748 (vuint16m4_t): Ditto.
35749 (vuint16m8_t): Ditto.
35750 (vuint32mf2_t): Ditto.
35751 (vuint32m1_t): Ditto.
35752 (vuint32m2_t): Ditto.
35753 (vuint32m4_t): Ditto.
35754 (vuint32m8_t): Ditto.
35755 (vuint64m1_t): Ditto.
35756 (vuint64m2_t): Ditto.
35757 (vuint64m4_t): Ditto.
35758 (vuint64m8_t): Ditto.
35759 (vfloat32mf2_t): Ditto.
35760 (vfloat32m1_t): Ditto.
35761 (vfloat32m2_t): Ditto.
35762 (vfloat32m4_t): Ditto.
35763 (vfloat32m8_t): Ditto.
35764 (vfloat64m1_t): Ditto.
35765 (vfloat64m2_t): Ditto.
35766 (vfloat64m4_t): Ditto.
35767 (vfloat64m8_t): Ditto.
35768 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_EI16_OPS): Ditto.
35769 * config/riscv/riscv.md: Adjust RVV instruction types.
35770 * config/riscv/vector-iterators.md (down): New iterator.
35771 (=vd,vr): New attribute.
35772 (UNSPEC_VSLIDE1UP): New unspec.
35773 * config/riscv/vector.md (@pred_slide<ud><mode>): New pattern.
35774 (*pred_slide<ud><mode>): Ditto.
35775 (*pred_slide<ud><mode>_extended): Ditto.
35776 (@pred_gather<mode>): Ditto.
35777 (@pred_gather<mode>_scalar): Ditto.
35778 (@pred_gatherei16<mode>): Ditto.
35779 (@pred_compress<mode>): Ditto.
35781 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35783 * config/riscv/riscv-vector-builtins.cc: Remove void_type_node.
35785 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35787 * config/riscv/constraints.md (Wb1): New constraint.
35788 * config/riscv/predicates.md
35789 (vector_least_significant_set_mask_operand): New predicate.
35790 (vector_broadcast_mask_operand): Ditto.
35791 * config/riscv/riscv-protos.h (enum vlmul_type): Adjust.
35792 (gen_scalar_move_mask): New function.
35793 * config/riscv/riscv-v.cc (gen_scalar_move_mask): Ditto.
35794 * config/riscv/riscv-vector-builtins-bases.cc (class vmv): New class.
35795 (class vmv_s): Ditto.
35797 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
35798 * config/riscv/riscv-vector-builtins-functions.def (vmv_x): Ditto.
35802 * config/riscv/riscv-vector-builtins-shapes.cc (struct scalar_move_def): Ditto.
35804 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
35805 * config/riscv/riscv-vector-builtins.cc (function_expander::mask_mode): Ditto.
35806 (function_expander::use_exact_insn): New function.
35807 (function_expander::use_contiguous_load_insn): New function.
35808 (function_expander::use_contiguous_store_insn): New function.
35809 (function_expander::use_ternop_insn): New function.
35810 (function_expander::use_widen_ternop_insn): New function.
35811 (function_expander::use_scalar_move_insn): New function.
35812 * config/riscv/riscv-vector-builtins.def (s): New operand suffix.
35813 * config/riscv/riscv-vector-builtins.h
35814 (function_expander::add_scalar_move_mask_operand): New class.
35815 * config/riscv/riscv-vsetvl.cc (ignore_vlmul_insn_p): New function.
35816 (scalar_move_insn_p): Ditto.
35817 (has_vsetvl_killed_avl_p): Ditto.
35818 (anticipatable_occurrence_p): Ditto.
35819 (insert_vsetvl): Ditto.
35820 (get_vl_vtype_info): Ditto.
35821 (calculate_sew): Ditto.
35822 (calculate_vlmul): Ditto.
35823 (incompatible_avl_p): Ditto.
35824 (different_sew_p): Ditto.
35825 (different_lmul_p): Ditto.
35826 (different_ratio_p): Ditto.
35827 (different_tail_policy_p): Ditto.
35828 (different_mask_policy_p): Ditto.
35829 (possible_zero_avl_p): Ditto.
35830 (first_ratio_invalid_for_second_sew_p): Ditto.
35831 (first_ratio_invalid_for_second_lmul_p): Ditto.
35832 (second_ratio_invalid_for_first_sew_p): Ditto.
35833 (second_ratio_invalid_for_first_lmul_p): Ditto.
35834 (second_sew_less_than_first_sew_p): Ditto.
35835 (first_sew_less_than_second_sew_p): Ditto.
35836 (compare_lmul): Ditto.
35837 (second_lmul_less_than_first_lmul_p): Ditto.
35838 (first_lmul_less_than_second_lmul_p): Ditto.
35839 (first_ratio_less_than_second_ratio_p): Ditto.
35840 (second_ratio_less_than_first_ratio_p): Ditto.
35841 (DEF_INCOMPATIBLE_COND): Ditto.
35842 (greatest_sew): Ditto.
35843 (first_sew): Ditto.
35844 (second_sew): Ditto.
35845 (first_vlmul): Ditto.
35846 (second_vlmul): Ditto.
35847 (first_ratio): Ditto.
35848 (second_ratio): Ditto.
35849 (vlmul_for_first_sew_second_ratio): Ditto.
35850 (ratio_for_second_sew_first_vlmul): Ditto.
35851 (DEF_SEW_LMUL_FUSE_RULE): Ditto.
35852 (always_unavailable): Ditto.
35853 (avl_unavailable_p): Ditto.
35854 (sew_unavailable_p): Ditto.
35855 (lmul_unavailable_p): Ditto.
35856 (ge_sew_unavailable_p): Ditto.
35857 (ge_sew_lmul_unavailable_p): Ditto.
35858 (ge_sew_ratio_unavailable_p): Ditto.
35859 (DEF_UNAVAILABLE_COND): Ditto.
35860 (same_sew_lmul_demand_p): Ditto.
35861 (propagate_avl_across_demands_p): Ditto.
35862 (reg_available_p): Ditto.
35863 (avl_info::has_non_zero_avl): Ditto.
35864 (vl_vtype_info::has_non_zero_avl): Ditto.
35865 (vector_insn_info::operator>=): Refactor.
35866 (vector_insn_info::parse_insn): Adjust for scalar move.
35867 (vector_insn_info::demand_vl_vtype): Remove.
35868 (vector_insn_info::compatible_p): New function.
35869 (vector_insn_info::compatible_avl_p): Ditto.
35870 (vector_insn_info::compatible_vtype_p): Ditto.
35871 (vector_insn_info::available_p): Ditto.
35872 (vector_insn_info::merge): Ditto.
35873 (vector_insn_info::fuse_avl): Ditto.
35874 (vector_insn_info::fuse_sew_lmul): Ditto.
35875 (vector_insn_info::fuse_tail_policy): Ditto.
35876 (vector_insn_info::fuse_mask_policy): Ditto.
35877 (vector_insn_info::dump): Ditto.
35878 (vector_infos_manager::release): Ditto.
35879 (pass_vsetvl::compute_local_backward_infos): Adjust for scalar move support.
35880 (pass_vsetvl::get_backward_fusion_type): Adjust for scalar move support.
35881 (pass_vsetvl::hard_empty_block_p): Ditto.
35882 (pass_vsetvl::backward_demand_fusion): Ditto.
35883 (pass_vsetvl::forward_demand_fusion): Ditto.
35884 (pass_vsetvl::refine_vsetvls): Ditto.
35885 (pass_vsetvl::cleanup_vsetvls): Ditto.
35886 (pass_vsetvl::commit_vsetvls): Ditto.
35887 (pass_vsetvl::propagate_avl): Ditto.
35888 * config/riscv/riscv-vsetvl.h (enum demand_status): New class.
35889 (struct demands_pair): Ditto.
35890 (struct demands_cond): Ditto.
35891 (struct demands_fuse_rule): Ditto.
35892 * config/riscv/vector-iterators.md: New iterator.
35893 * config/riscv/vector.md (@pred_broadcast<mode>): New pattern.
35894 (*pred_broadcast<mode>): Ditto.
35895 (*pred_broadcast<mode>_extended_scalar): Ditto.
35896 (@pred_extract_first<mode>): Ditto.
35897 (*pred_extract_first<mode>): Ditto.
35898 (@pred_extract_first_trunc<mode>): Ditto.
35899 * config/riscv/riscv-vsetvl.def: New file.
35901 2023-03-05 Lin Sinan <sinan.lin@linux.alibaba.com>
35903 * config/riscv/bitmanip.md: allow 0 constant in max/min
35906 2023-03-05 Lin Sinan <sinan.lin@linux.alibaba.com>
35908 * config/riscv/bitmanip.md: Fix wrong index in the check.
35910 2023-03-04 Jakub Jelinek <jakub@redhat.com>
35912 PR middle-end/109006
35913 * vec.cc (test_auto_alias): Adjust comment for removal of
35915 * read-rtl-function.cc (function_reader::parse_block): Likewise.
35916 * gdbhooks.py: Likewise.
35918 2023-03-04 Jakub Jelinek <jakub@redhat.com>
35920 PR testsuite/108973
35921 * selftest-diagnostic.cc
35922 (test_diagnostic_context::test_diagnostic_context): Set
35923 caret_max_width to 80.
35925 2023-03-03 Alexandre Oliva <oliva@adacore.com>
35927 * gimple-ssa-warn-access.cc
35928 (pass_waccess::check_dangling_stores): Skip non-stores.
35930 2023-03-03 Alexandre Oliva <oliva@adacore.com>
35932 * config/arm/vfp.md (*thumb2_movsi_vfp): Drop blank after tab
35933 after vmsr and vmrs, and lower the case of P0.
35935 2023-03-03 Jonathan Wakely <jwakely@redhat.com>
35937 PR middle-end/109006
35938 * gdbhooks.py (VecPrinter): Handle vec<T> as well as vec<T>*.
35940 2023-03-03 Jonathan Wakely <jwakely@redhat.com>
35942 PR middle-end/109006
35943 * gdbhooks.py (VecPrinter): Adjust for new vec layout.
35945 2023-03-03 Jakub Jelinek <jakub@redhat.com>
35948 * gimple-ssa-warn-access.cc (pass_waccess::maybe_check_access_sizes):
35949 Return immediately if OPT_Wnonnull or OPT_Wstringop_overflow_ is
35950 suppressed on stmt. For [static %E] warning, print access_nelts
35951 rather than access_size. Fix up comment wording.
35953 2023-03-03 Robin Dapp <rdapp@linux.ibm.com>
35955 * config/s390/driver-native.cc (s390_host_detect_local_cpu): Use
35956 arch14 instead of z16.
35958 2023-03-03 Anthony Green <green@moxielogic.com>
35960 * config/moxie/moxie.cc (TARGET_LRA_P): Remove.
35962 2023-03-03 Anthony Green <green@moxielogic.com>
35964 * config/moxie/constraints.md (A, B, W): Change
35965 define_constraint to define_memory_constraint.
35967 2023-03-03 Xi Ruoyao <xry111@xry111.site>
35969 * toplev.cc (process_options): Fix the spelling of
35970 "-fstack-clash-protection".
35972 2023-03-03 Richard Biener <rguenther@suse.de>
35974 PR tree-optimization/109002
35975 * tree-ssa-pre.cc (compute_partial_antic_aux): Properly
35976 PHI-translate ANTIC_IN.
35978 2023-03-03 Jakub Jelinek <jakub@redhat.com>
35980 PR tree-optimization/108988
35981 * gimple-fold.cc (gimple_fold_builtin_fputs): Fold len to
35982 size_type_node before passing it as argument to fwrite. Formatting
35985 2023-03-03 Richard Biener <rguenther@suse.de>
35988 * config/i386/i386.opt (--param x86-stv-max-visits): New param.
35989 * doc/invoke.texi (--param x86-stv-max-visits): Document it.
35990 * config/i386/i386-features.h (scalar_chain::max_visits): New.
35991 (scalar_chain::build): Add bitmap parameter, return boolean.
35992 (scalar_chain::add_insn): Likewise.
35993 (scalar_chain::analyze_register_chain): Likewise.
35994 * config/i386/i386-features.cc (scalar_chain::scalar_chain):
35995 Initialize max_visits.
35996 (scalar_chain::analyze_register_chain): When we exhaust
35997 max_visits, abort. Also abort when running into any
35999 (scalar_chain::add_insn): Propagate abort.
36000 (scalar_chain::build): Likewise. When aborting amend
36001 the set of disallowed insn with the insns set.
36002 (convert_scalars_to_vector): Adjust. Do not convert aborted
36005 2023-03-03 Richard Biener <rguenther@suse.de>
36008 * dwarf2out.cc (dwarf2out_late_global_decl): Do not
36009 generate a DIE for a function scope static.
36011 2023-03-03 Alexandre Oliva <oliva@adacore.com>
36013 * config/vx-common.h (WINT_TYPE): Alias to "wchar_t".
36015 2023-03-02 Jakub Jelinek <jakub@redhat.com>
36018 * target.h (emit_support_tinfos_callback): New typedef.
36019 * targhooks.h (default_emit_support_tinfos): Declare.
36020 * targhooks.cc (default_emit_support_tinfos): New function.
36021 * target.def (emit_support_tinfos): New target hook.
36022 * doc/tm.texi.in (emit_support_tinfos): Document it.
36023 * doc/tm.texi: Regenerated.
36024 * config/i386/i386.cc (ix86_emit_support_tinfos): New function.
36025 (TARGET_EMIT_SUPPORT_TINFOS): Redefine.
36027 2023-03-02 Vladimir N. Makarov <vmakarov@redhat.com>
36029 * ira-costs.cc: Include print-rtl.h.
36030 (record_reg_classes, scan_one_insn): Add code to print debug info.
36031 (record_operand_costs): Find and use smaller cost for hard reg
36034 2023-03-02 Kwok Cheung Yeung <kcy@codesourcery.com>
36035 Paul-Antoine Arras <pa@codesourcery.com>
36037 * builtins.cc (mathfn_built_in_explicit): New.
36038 * config/gcn/gcn.cc: Include case-cfn-macros.h.
36039 (mathfn_built_in_explicit): Add prototype.
36040 (gcn_vectorize_builtin_vectorized_function): New.
36041 (gcn_libc_has_function): New.
36042 (TARGET_LIBC_HAS_FUNCTION): Define.
36043 (TARGET_VECTORIZE_BUILTIN_VECTORIZED_FUNCTION): Define.
36045 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
36047 PR tree-optimization/108979
36048 * tree-vect-stmts.cc (vectorizable_operation): Don't mask
36049 operations on invariants.
36051 2023-03-02 Robin Dapp <rdapp@linux.ibm.com>
36053 * config/s390/predicates.md (vll_bias_operand): Add -1 bias.
36054 * config/s390/s390.cc (s390_option_override_internal): Make
36055 partial vector usage the default from z13 on.
36056 * config/s390/vector.md (len_load_v16qi): Add.
36057 (len_store_v16qi): Add.
36059 2023-03-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
36061 * simplify-rtx.cc (simplify_context::simplify_subreg): Use byte instead
36062 of constant 0 offset.
36064 2023-03-02 Robert Suchanek <robert.suchanek@imgtec.com>
36066 * config/mips/mips.cc (mips_set_text_contents_type): Use HOST_WIDE_INT
36068 * config/mips/mips-protos.h (mips_set_text_contents_type): Likewise.
36070 2023-03-02 Junxian Zhu <zhujunxian@oss.cipunited.com>
36072 * config.gcc: add -with-{no-}msa build option.
36073 * config/mips/mips.h: Likewise.
36074 * doc/install.texi: Likewise.
36076 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
36078 PR tree-optimization/108603
36079 * explow.cc (convert_memory_address_addr_space_1): Only wrap
36080 the result of a recursive call in a CONST if no instructions
36083 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
36085 PR tree-optimization/108430
36086 * tree-vect-stmts.cc (vectorizable_condition): Fix handling
36087 of inverted condition.
36089 2023-03-02 Jakub Jelinek <jakub@redhat.com>
36092 * fold-const.cc (native_interpret_expr) <case REAL_CST>: Before memcmp
36093 comparison copy the bytes from ptr to a temporary buffer and clearing
36094 padding bits in there.
36096 2023-03-01 Tobias Burnus <tobias@codesourcery.com>
36098 PR middle-end/108545
36099 * gimplify.cc (struct tree_operand_hash_no_se): New.
36100 (omp_index_mapping_groups_1, omp_index_mapping_groups,
36101 omp_reindex_mapping_groups, omp_mapped_by_containing_struct,
36102 omp_tsort_mapping_groups_1, omp_tsort_mapping_groups,
36103 oacc_resolve_clause_dependencies, omp_build_struct_sibling_lists,
36104 gimplify_scan_omp_clauses): Use tree_operand_hash_no_se instead
36105 of tree_operand_hash.
36107 2023-03-01 LIU Hao <lh_mouse@126.com>
36110 * config/i386/host-mingw32.cc (mingw32_gt_pch_get_address):
36111 Remove the size limit `pch_VA_max_size`
36113 2023-03-01 Tobias Burnus <tobias@codesourcery.com>
36115 PR middle-end/108546
36116 * omp-low.cc (lower_omp_target): Remove optional handling
36117 on the receiver side, i.e. inside target (data), for
36120 2023-03-01 Jakub Jelinek <jakub@redhat.com>
36123 * cfgexpand.cc (expand_debug_expr): Handle WIDEN_{PLUS,MINUS}_EXPR
36124 and VEC_WIDEN_{PLUS,MINUS}_{HI,LO}_EXPR.
36126 2023-03-01 Richard Biener <rguenther@suse.de>
36128 PR tree-optimization/108970
36129 * tree-vect-loop-manip.cc (slpeel_can_duplicate_loop_p):
36130 Check we can copy the BBs.
36131 (slpeel_tree_duplicate_loop_to_edge_cfg): Avoid redundant
36133 (vect_do_peeling): Streamline error handling.
36135 2023-03-01 Richard Biener <rguenther@suse.de>
36137 PR tree-optimization/108950
36138 * tree-vect-patterns.cc (vect_recog_widen_sum_pattern):
36139 Check oprnd0 is defined in the loop.
36140 * tree-vect-loop.cc (vectorizable_reduction): Record all
36141 operands vector types, compute that of invariants and
36142 properly update their SLP nodes.
36144 2023-03-01 Kewen Lin <linkw@linux.ibm.com>
36147 * config/rs6000/rs6000.cc (rs6000_option_override_internal): Allow
36148 implicit powerpc64 setting to be unset if 64 bit is enabled implicitly.
36150 2023-02-28 Qing Zhao <qing.zhao@oracle.com>
36152 PR middle-end/107411
36153 PR middle-end/107411
36154 * gimplify.cc (gimple_add_init_for_auto_var): Use sprintf to replace
36156 * tree-ssa-uninit.cc (warn_uninit): Handle the case when the
36157 LHS varaible of a .DEFERRED_INIT call doesn't have a DECL_NAME.
36159 2023-02-28 Jakub Jelinek <jakub@redhat.com>
36161 PR sanitizer/108894
36162 * ubsan.cc (ubsan_expand_bounds_ifn): Emit index >= bound
36163 comparison rather than index > bound.
36164 * gimple-fold.cc (gimple_fold_call): Use tree_int_cst_lt
36165 rather than tree_int_cst_le for IFN_UBSAN_BOUND comparison.
36166 * doc/invoke.texi (-fsanitize=bounds): Document that whether
36167 flexible array member-like arrays are instrumented or not depends
36168 on -fstrict-flex-arrays* options of strict_flex_array attributes.
36169 (-fsanitize=bounds-strict): Document that flexible array members
36170 are not instrumented.
36172 2023-02-27 Uroš Bizjak <ubizjak@gmail.com>
36176 * config/i386/i386.md (fmodxf3): Enable for flag_finite_math_only only.
36177 (fmod<mode>3): Ditto.
36178 (fpremxf4_i387): Ditto.
36179 (reminderxf3): Ditto.
36180 (reminder<mode>3): Ditto.
36181 (fprem1xf4_i387): Ditto.
36183 2023-02-27 Roger Sayle <roger@nextmovesoftware.com>
36185 * simplify-rtx.cc (simplify_unary_operation_1) <case FFS>: Avoid
36186 generating FFS with mismatched operand and result modes, by using
36187 an explicit SIGN_EXTEND/ZERO_EXTEND.
36188 <case POPCOUNT>: Likewise, for POPCOUNT of ZERO_EXTEND.
36189 <case PARITY>: Likewise, for PARITY of {ZERO,SIGN}_EXTEND.
36191 2023-02-27 Patrick Palka <ppalka@redhat.com>
36193 * hash-table.h (gt_pch_nx(hash_table<D>)): Remove static.
36194 * lra-int.h (lra_change_class): Likewise.
36195 * recog.h (which_op_alt): Likewise.
36196 * sel-sched-ir.h (sel_bb_empty_or_nop_p): Declare inline
36199 2023-02-27 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
36201 * config/xtensa/xtensa-protos.h (xtensa_match_CLAMPS_imms_p):
36203 * config/xtensa/xtensa.cc (xtensa_match_CLAMPS_imms_p):
36205 * config/xtensa/xtensa.h (TARGET_CLAMPS): New macro definition.
36206 * config/xtensa/xtensa.md (*xtensa_clamps): New insn pattern.
36208 2023-02-27 Max Filippov <jcmvbkbc@gmail.com>
36210 * config/xtensa/xtensa-dynconfig.cc (xtensa_get_config_v2)
36211 (xtensa_get_config_v3): New functions.
36213 2023-02-27 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
36215 * config/aarch64/aarch64-simd.md (aarch64_abs<mode>): Fix typo in comment.
36217 2023-02-27 Lulu Cheng <chenglulu@loongson.cn>
36219 * config/host-linux.cc (TRY_EMPTY_VM_SPACE): Modify the value of
36220 the macro to 0x1000000000.
36222 2023-02-25 Gaius Mulley <gaiusmod2@gmail.com>
36225 * doc/gm2.texi (-fm2-pathname): New option documented.
36226 (-fm2-pathnameI): New option documented.
36227 (-fm2-prefix=): New option documented.
36228 (-fruntime-modules=): Update default module list.
36230 2023-02-25 Max Filippov <jcmvbkbc@gmail.com>
36233 * config/xtensa/xtensa-protos.h
36234 (xtensa_prepare_expand_call): Rename to xtensa_expand_call.
36235 * config/xtensa/xtensa.cc (xtensa_prepare_expand_call): Rename
36236 to xtensa_expand_call.
36237 (xtensa_expand_call): Emit the call and add a clobber expression
36238 for the static chain to it in case of windowed ABI.
36239 * config/xtensa/xtensa.md (call, call_value, sibcall)
36240 (sibcall_value): Call xtensa_expand_call and complete expansion
36241 right after that call.
36243 2023-02-24 Richard Biener <rguenther@suse.de>
36245 * vec.h (vec<T, A, vl_embed>::m_vecdata): Remove.
36246 (vec<T, A, vl_embed>::m_vecpfx): Align as T to avoid
36247 changing alignment of vec<T, A, vl_embed> and simplifying
36249 (vec<T, A, vl_embed>::address): Compute as this + 1.
36250 (vec<T, A, vl_embed>::embedded_size): Use sizeof the
36251 vector instead of the offset of the m_vecdata member.
36252 (auto_vec<T, N>::m_data): Turn storage into
36253 uninitialized unsigned char.
36254 (auto_vec<T, N>::auto_vec): Allow allocation of one
36255 stack member. Initialize m_vec in a special way to
36256 avoid later stringop overflow diagnostics.
36257 * vec.cc (test_auto_alias): New.
36258 (vec_cc_tests): Call it.
36260 2023-02-24 Richard Biener <rguenther@suse.de>
36262 * vec.h (vec<T, A, vl_embed>::lower_bound): Adjust to
36263 take a const reference to the object, use address to
36265 (vec<T, A, vl_embed>::contains): Use address to access data.
36266 (vec<T, A, vl_embed>::operator[]): Use address instead of
36267 m_vecdata to access data.
36268 (vec<T, A, vl_embed>::iterate): Likewise.
36269 (vec<T, A, vl_embed>::copy): Likewise.
36270 (vec<T, A, vl_embed>::quick_push): Likewise.
36271 (vec<T, A, vl_embed>::pop): Likewise.
36272 (vec<T, A, vl_embed>::quick_insert): Likewise.
36273 (vec<T, A, vl_embed>::ordered_remove): Likewise.
36274 (vec<T, A, vl_embed>::unordered_remove): Likewise.
36275 (vec<T, A, vl_embed>::block_remove): Likewise.
36276 (vec<T, A, vl_heap>::address): Likewise.
36278 2023-02-24 Martin Liska <mliska@suse.cz>
36280 PR sanitizer/108834
36281 * asan.cc (asan_add_global): Use proper TU name for normal
36282 global variables (and aux_base_name for the artificial one).
36284 2023-02-24 Jakub Jelinek <jakub@redhat.com>
36286 * config/i386/i386-builtin.def: Update description of BDESC
36287 and BDESC_FIRST in file comment to include mask2.
36289 2023-02-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
36291 * config/aarch64/aarch64-cores.def (FLAGS): Update comment.
36293 2023-02-24 Jakub Jelinek <jakub@redhat.com>
36295 PR middle-end/108854
36296 * cgraphclones.cc (duplicate_thunk_for_node): If no parameter
36297 changes are needed, copy at least DECL_ARGUMENTS PARM_DECL
36298 nodes and adjust their DECL_CONTEXT.
36300 2023-02-24 Jakub Jelinek <jakub@redhat.com>
36303 * config/i386/i386-builtin.def (__builtin_ia32_cvtne2ps2bf16_v16bf,
36304 __builtin_ia32_cvtne2ps2bf16_v16bf_mask,
36305 __builtin_ia32_cvtne2ps2bf16_v16bf_maskz,
36306 __builtin_ia32_cvtne2ps2bf16_v8bf,
36307 __builtin_ia32_cvtne2ps2bf16_v8bf_mask,
36308 __builtin_ia32_cvtne2ps2bf16_v8bf_maskz,
36309 __builtin_ia32_cvtneps2bf16_v8sf_mask,
36310 __builtin_ia32_cvtneps2bf16_v8sf_maskz,
36311 __builtin_ia32_cvtneps2bf16_v4sf_mask,
36312 __builtin_ia32_cvtneps2bf16_v4sf_maskz,
36313 __builtin_ia32_dpbf16ps_v8sf, __builtin_ia32_dpbf16ps_v8sf_mask,
36314 __builtin_ia32_dpbf16ps_v8sf_maskz, __builtin_ia32_dpbf16ps_v4sf,
36315 __builtin_ia32_dpbf16ps_v4sf_mask,
36316 __builtin_ia32_dpbf16ps_v4sf_maskz): Require also
36317 OPTION_MASK_ISA_AVX512VL.
36319 2023-02-24 Sebastian Huber <sebastian.huber@embedded-brains.de>
36321 * config/riscv/t-rtems: Keep only -mcmodel=medany 64-bit multilibs.
36322 Add non-compact 32-bit multilibs.
36324 2023-02-24 Junxian Zhu <zhujunxian@oss.cipunited.com>
36326 * config/mips/mips.md (*clo<mode>2): New pattern.
36328 2023-02-24 Prachi Godbole <prachi.godbole@imgtec.com>
36330 * config/mips/mips.h (machine_function): New variable
36331 use_hazard_barrier_return_p.
36332 * config/mips/mips.md (UNSPEC_JRHB): New unspec.
36333 (mips_hb_return_internal): New insn pattern.
36334 * config/mips/mips.cc (mips_attribute_table): Add attribute
36335 use_hazard_barrier_return.
36336 (mips_use_hazard_barrier_return_p): New static function.
36337 (mips_function_attr_inlinable_p): Likewise.
36338 (mips_compute_frame_info): Set use_hazard_barrier_return_p.
36339 Emit error for unsupported architecture choice.
36340 (mips_function_ok_for_sibcall, mips_can_use_return_insn):
36341 Return false for use_hazard_barrier_return.
36342 (mips_expand_epilogue): Emit hazard barrier return.
36343 * doc/extend.texi: Document use_hazard_barrier_return.
36345 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
36347 * config/xtensa/xtensa-dynconfig.cc (config.h, system.h)
36348 (coretypes.h, diagnostic.h, intl.h): Use "..." instead of <...>
36349 for the gcc-internal headers.
36351 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
36353 * config/xtensa/t-xtensa (xtensa-dynconfig.o): Use $(COMPILE)
36354 and $(POSTCOMPILE) instead of manual dependency listing.
36355 * config/xtensa/xtensa-dynconfig.c: Rename to ...
36356 * config/xtensa/xtensa-dynconfig.cc: ... this.
36358 2023-02-23 Arsen Arsenović <arsen@aarsen.me>
36360 * doc/cfg.texi: Reorder index entries around @items.
36361 * doc/cpp.texi: Ditto.
36362 * doc/cppenv.texi: Ditto.
36363 * doc/cppopts.texi: Ditto.
36364 * doc/generic.texi: Ditto.
36365 * doc/install.texi: Ditto.
36366 * doc/extend.texi: Ditto.
36367 * doc/invoke.texi: Ditto.
36368 * doc/md.texi: Ditto.
36369 * doc/rtl.texi: Ditto.
36370 * doc/tm.texi.in: Ditto.
36371 * doc/trouble.texi: Ditto.
36372 * doc/tm.texi: Regenerate.
36374 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
36376 * config/xtensa/xtensa.md: New peephole2 pattern that eliminates
36377 the occurrence of general-purpose register used only once and for
36378 transferring intermediate value.
36380 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
36382 * config/xtensa/xtensa.cc (machine_function): Add new member
36383 'eliminated_callee_saved_bmp'.
36384 (xtensa_can_eliminate_callee_saved_reg_p): New function to
36385 determine whether the register can be eliminated or not.
36386 (xtensa_expand_prologue): Add invoking the above function and
36387 elimination the use of callee-saved register by using its stack
36388 slot through the stack pointer (or the frame pointer if needed)
36390 (xtensa_expand_prologue): Modify to not emit register restoration
36391 insn from its stack slot if the register is already eliminated.
36393 2023-02-23 Jakub Jelinek <jakub@redhat.com>
36395 PR translation/108890
36396 * config/xtensa/xtensa-dynconfig.c (xtensa_load_config): Drop _()s
36397 around fatal_error format strings.
36399 2023-02-23 Richard Biener <rguenther@suse.de>
36401 * tree-ssa-structalias.cc (handle_lhs_call): Do not
36402 re-create rhsc, only truncate it.
36404 2023-02-23 Jakub Jelinek <jakub@redhat.com>
36406 PR middle-end/106258
36407 * ipa-prop.cc (try_make_edge_direct_virtual_call): Handle
36408 BUILT_IN_UNREACHABLE_TRAP like BUILT_IN_UNREACHABLE.
36410 2023-02-23 Richard Biener <rguenther@suse.de>
36412 * tree-if-conv.cc (tree_if_conversion): Properly manage
36413 memory of refs and the contained data references.
36415 2023-02-23 Richard Biener <rguenther@suse.de>
36417 PR tree-optimization/108888
36418 * tree-if-conv.cc (if_convertible_stmt_p): Set PLF_2 on
36419 calls to predicate.
36420 (predicate_statements): Only predicate calls with PLF_2.
36422 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
36424 * config/xtensa/xtensa.md
36425 (zero_cost_loop_start, zero_cost_loop_end, loop_end):
36426 Add missing "SI:" to PLUS RTXes.
36428 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
36431 * config/xtensa/xtensa.cc (xtensa_expand_epilogue):
36432 Emit (use (reg:SI A0_REG)) at the end in the sibling call
36433 (i.e. the same place as (return) in the normal call).
36435 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
36438 2023-02-21 Max Filippov <jcmvbkbc@gmail.com>
36441 * config/xtensa/xtensa.cc (xtensa_expand_epilogue): Drop emit_use
36443 * config/xtensa/xtensa.md (sibcall, sibcall_internal)
36444 (sibcall_value, sibcall_value_internal): Add 'use' expression
36447 2023-02-23 Arsen Arsenović <arsen@aarsen.me>
36449 * doc/cppdiropts.texi: Reorder @opindex commands to precede
36450 @items they relate to.
36451 * doc/cppopts.texi: Ditto.
36452 * doc/cppwarnopts.texi: Ditto.
36453 * doc/invoke.texi: Ditto.
36454 * doc/lto.texi: Ditto.
36456 2023-02-22 Andrew Stubbs <ams@codesourcery.com>
36458 * internal-fn.cc (expand_MASK_CALL): New.
36459 * internal-fn.def (MASK_CALL): New.
36460 * internal-fn.h (expand_MASK_CALL): New prototype.
36461 * omp-simd-clone.cc (simd_clone_adjust_argument_types): Set vector_type
36462 for mask arguments also.
36463 * tree-if-conv.cc: Include cgraph.h.
36464 (if_convertible_stmt_p): Do if conversions for calls to SIMD calls.
36465 (predicate_statements): Convert functions to IFN_MASK_CALL.
36466 * tree-vect-loop.cc (vect_get_datarefs_in_loop): Recognise
36467 IFN_MASK_CALL as a SIMD function call.
36468 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Handle
36469 IFN_MASK_CALL as an inbranch SIMD function call.
36470 Generate the mask vector arguments.
36472 2023-02-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36474 * config/riscv/riscv-vector-builtins-bases.cc (class reducop): New class.
36475 (class widen_reducop): Ditto.
36476 (class freducop): Ditto.
36477 (class widen_freducop): Ditto.
36479 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
36480 * config/riscv/riscv-vector-builtins-functions.def (vredsum): Add reduction support.
36489 (vwredsumu): Ditto.
36490 (vfredusum): Ditto.
36491 (vfredosum): Ditto.
36494 (vfwredosum): Ditto.
36495 (vfwredusum): Ditto.
36496 * config/riscv/riscv-vector-builtins-shapes.cc (struct reduc_alu_def): Ditto.
36498 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
36499 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WI_OPS): New macro.
36500 (DEF_RVV_WU_OPS): Ditto.
36501 (DEF_RVV_WF_OPS): Ditto.
36502 (vint8mf8_t): Ditto.
36503 (vint8mf4_t): Ditto.
36504 (vint8mf2_t): Ditto.
36505 (vint8m1_t): Ditto.
36506 (vint8m2_t): Ditto.
36507 (vint8m4_t): Ditto.
36508 (vint8m8_t): Ditto.
36509 (vint16mf4_t): Ditto.
36510 (vint16mf2_t): Ditto.
36511 (vint16m1_t): Ditto.
36512 (vint16m2_t): Ditto.
36513 (vint16m4_t): Ditto.
36514 (vint16m8_t): Ditto.
36515 (vint32mf2_t): Ditto.
36516 (vint32m1_t): Ditto.
36517 (vint32m2_t): Ditto.
36518 (vint32m4_t): Ditto.
36519 (vint32m8_t): Ditto.
36520 (vuint8mf8_t): Ditto.
36521 (vuint8mf4_t): Ditto.
36522 (vuint8mf2_t): Ditto.
36523 (vuint8m1_t): Ditto.
36524 (vuint8m2_t): Ditto.
36525 (vuint8m4_t): Ditto.
36526 (vuint8m8_t): Ditto.
36527 (vuint16mf4_t): Ditto.
36528 (vuint16mf2_t): Ditto.
36529 (vuint16m1_t): Ditto.
36530 (vuint16m2_t): Ditto.
36531 (vuint16m4_t): Ditto.
36532 (vuint16m8_t): Ditto.
36533 (vuint32mf2_t): Ditto.
36534 (vuint32m1_t): Ditto.
36535 (vuint32m2_t): Ditto.
36536 (vuint32m4_t): Ditto.
36537 (vuint32m8_t): Ditto.
36538 (vfloat32mf2_t): Ditto.
36539 (vfloat32m1_t): Ditto.
36540 (vfloat32m2_t): Ditto.
36541 (vfloat32m4_t): Ditto.
36542 (vfloat32m8_t): Ditto.
36543 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WI_OPS): Ditto.
36544 (DEF_RVV_WU_OPS): Ditto.
36545 (DEF_RVV_WF_OPS): Ditto.
36546 (required_extensions_p): Add reduction support.
36547 (rvv_arg_type_info::get_base_vector_type): Ditto.
36548 (rvv_arg_type_info::get_tree_type): Ditto.
36549 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
36550 * config/riscv/riscv.md: Ditto.
36551 * config/riscv/vector-iterators.md (minu): Ditto.
36552 * config/riscv/vector.md (@pred_reduc_<reduc><mode><vlmul1>): New patern.
36553 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Ditto.
36554 (@pred_widen_reduc_plus<v_su><mode><vwlmul1>): Ditto.
36555 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve32>):Ditto.
36556 (@pred_reduc_plus<order><mode><vlmul1>): Ditto.
36557 (@pred_reduc_plus<order><mode><vlmul1_zve32>): Ditto.
36558 (@pred_widen_reduc_plus<order><mode><vwlmul1>): Ditto.
36560 2023-02-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36562 * config/riscv/iterators.md: New iterator.
36563 * config/riscv/riscv-vector-builtins-bases.cc (class widen_binop): New class.
36564 (enum ternop_type): New enum.
36565 (class vmacc): New class.
36566 (class imac): Ditto.
36567 (class vnmsac): Ditto.
36568 (enum widen_ternop_type): New enum.
36569 (class vmadd): Ditto.
36570 (class vnmsub): Ditto.
36571 (class iwmac): Ditto.
36572 (class vwmacc): Ditto.
36573 (class vwmaccu): Ditto.
36574 (class vwmaccsu): Ditto.
36575 (class vwmaccus): Ditto.
36576 (class reverse_binop): Ditto.
36577 (class vfmacc): Ditto.
36578 (class vfnmsac): Ditto.
36579 (class vfmadd): Ditto.
36580 (class vfnmsub): Ditto.
36581 (class vfnmacc): Ditto.
36582 (class vfmsac): Ditto.
36583 (class vfnmadd): Ditto.
36584 (class vfmsub): Ditto.
36585 (class vfwmacc): Ditto.
36586 (class vfwnmacc): Ditto.
36587 (class vfwmsac): Ditto.
36588 (class vfwnmsac): Ditto.
36589 (class float_misc): Ditto.
36590 (class fcmp): Ditto.
36591 (class vfclass): Ditto.
36592 (class vfcvt_x): Ditto.
36593 (class vfcvt_rtz_x): Ditto.
36594 (class vfcvt_f): Ditto.
36595 (class vfwcvt_x): Ditto.
36596 (class vfwcvt_rtz_x): Ditto.
36597 (class vfwcvt_f): Ditto.
36598 (class vfncvt_x): Ditto.
36599 (class vfncvt_rtz_x): Ditto.
36600 (class vfncvt_f): Ditto.
36601 (class vfncvt_rod_f): Ditto.
36603 * config/riscv/riscv-vector-builtins-bases.h:
36604 * config/riscv/riscv-vector-builtins-functions.def (vzext): Ditto.
36648 (vfcvt_rtz_x): Ditto.
36649 (vfcvt_rtz_xu): Ditto.
36652 (vfwcvt_xu): Ditto.
36653 (vfwcvt_rtz_x): Ditto.
36654 (vfwcvt_rtz_xu): Ditto.
36657 (vfncvt_xu): Ditto.
36658 (vfncvt_rtz_x): Ditto.
36659 (vfncvt_rtz_xu): Ditto.
36661 (vfncvt_rod_f): Ditto.
36662 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
36663 (struct move_def): Ditto.
36664 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WEXTF_OPS): New macro.
36665 (DEF_RVV_CONVERT_I_OPS): Ditto.
36666 (DEF_RVV_CONVERT_U_OPS): Ditto.
36667 (DEF_RVV_WCONVERT_I_OPS): Ditto.
36668 (DEF_RVV_WCONVERT_U_OPS): Ditto.
36669 (DEF_RVV_WCONVERT_F_OPS): Ditto.
36670 (vfloat64m1_t): Ditto.
36671 (vfloat64m2_t): Ditto.
36672 (vfloat64m4_t): Ditto.
36673 (vfloat64m8_t): Ditto.
36674 (vint32mf2_t): Ditto.
36675 (vint32m1_t): Ditto.
36676 (vint32m2_t): Ditto.
36677 (vint32m4_t): Ditto.
36678 (vint32m8_t): Ditto.
36679 (vint64m1_t): Ditto.
36680 (vint64m2_t): Ditto.
36681 (vint64m4_t): Ditto.
36682 (vint64m8_t): Ditto.
36683 (vuint32mf2_t): Ditto.
36684 (vuint32m1_t): Ditto.
36685 (vuint32m2_t): Ditto.
36686 (vuint32m4_t): Ditto.
36687 (vuint32m8_t): Ditto.
36688 (vuint64m1_t): Ditto.
36689 (vuint64m2_t): Ditto.
36690 (vuint64m4_t): Ditto.
36691 (vuint64m8_t): Ditto.
36692 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_CONVERT_I_OPS): Ditto.
36693 (DEF_RVV_CONVERT_U_OPS): Ditto.
36694 (DEF_RVV_WCONVERT_I_OPS): Ditto.
36695 (DEF_RVV_WCONVERT_U_OPS): Ditto.
36696 (DEF_RVV_WCONVERT_F_OPS): Ditto.
36697 (DEF_RVV_F_OPS): Ditto.
36698 (DEF_RVV_WEXTF_OPS): Ditto.
36699 (required_extensions_p): Adjust for floating-point support.
36700 (check_required_extensions): Ditto.
36701 (unsigned_base_type_p): Ditto.
36702 (get_mode_for_bitsize): Ditto.
36703 (rvv_arg_type_info::get_base_vector_type): Ditto.
36704 (rvv_arg_type_info::get_tree_type): Ditto.
36705 * config/riscv/riscv-vector-builtins.def (v_f): New define.
36708 (xu_v): New define.
36710 (xu_w): New define.
36711 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): New enum.
36712 (function_expander::arg_mode): New function.
36713 * config/riscv/vector-iterators.md (sof): New iterator.
36719 (fixuns_trunc): Ditto.
36721 * config/riscv/vector.md (@pred_broadcast<mode>): New pattern.
36722 (@pred_<optab><mode>): Ditto.
36723 (@pred_<optab><mode>_scalar): Ditto.
36724 (@pred_<optab><mode>_reverse_scalar): Ditto.
36725 (@pred_<copysign><mode>): Ditto.
36726 (@pred_<copysign><mode>_scalar): Ditto.
36727 (@pred_mul_<optab><mode>): Ditto.
36728 (pred_mul_<optab><mode>_undef_merge): Ditto.
36729 (*pred_<madd_nmsub><mode>): Ditto.
36730 (*pred_<macc_nmsac><mode>): Ditto.
36731 (*pred_mul_<optab><mode>): Ditto.
36732 (@pred_mul_<optab><mode>_scalar): Ditto.
36733 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
36734 (*pred_<madd_nmsub><mode>_scalar): Ditto.
36735 (*pred_<macc_nmsac><mode>_scalar): Ditto.
36736 (*pred_mul_<optab><mode>_scalar): Ditto.
36737 (@pred_neg_mul_<optab><mode>): Ditto.
36738 (pred_neg_mul_<optab><mode>_undef_merge): Ditto.
36739 (*pred_<nmadd_msub><mode>): Ditto.
36740 (*pred_<nmacc_msac><mode>): Ditto.
36741 (*pred_neg_mul_<optab><mode>): Ditto.
36742 (@pred_neg_mul_<optab><mode>_scalar): Ditto.
36743 (*pred_neg_mul_<optab><mode>_undef_merge_scalar): Ditto.
36744 (*pred_<nmadd_msub><mode>_scalar): Ditto.
36745 (*pred_<nmacc_msac><mode>_scalar): Ditto.
36746 (*pred_neg_mul_<optab><mode>_scalar): Ditto.
36747 (@pred_<misc_op><mode>): Ditto.
36748 (@pred_class<mode>): Ditto.
36749 (@pred_dual_widen_<optab><mode>): Ditto.
36750 (@pred_dual_widen_<optab><mode>_scalar): Ditto.
36751 (@pred_single_widen_<plus_minus:optab><mode>): Ditto.
36752 (@pred_single_widen_<plus_minus:optab><mode>_scalar): Ditto.
36753 (@pred_widen_mul_<optab><mode>): Ditto.
36754 (@pred_widen_mul_<optab><mode>_scalar): Ditto.
36755 (@pred_widen_neg_mul_<optab><mode>): Ditto.
36756 (@pred_widen_neg_mul_<optab><mode>_scalar): Ditto.
36757 (@pred_cmp<mode>): Ditto.
36758 (*pred_cmp<mode>): Ditto.
36759 (*pred_cmp<mode>_narrow): Ditto.
36760 (@pred_cmp<mode>_scalar): Ditto.
36761 (*pred_cmp<mode>_scalar): Ditto.
36762 (*pred_cmp<mode>_scalar_narrow): Ditto.
36763 (@pred_eqne<mode>_scalar): Ditto.
36764 (*pred_eqne<mode>_scalar): Ditto.
36765 (*pred_eqne<mode>_scalar_narrow): Ditto.
36766 (@pred_merge<mode>_scalar): Ditto.
36767 (@pred_fcvt_x<v_su>_f<mode>): Ditto.
36768 (@pred_<fix_cvt><mode>): Ditto.
36769 (@pred_<float_cvt><mode>): Ditto.
36770 (@pred_widen_fcvt_x<v_su>_f<mode>): Ditto.
36771 (@pred_widen_<fix_cvt><mode>): Ditto.
36772 (@pred_widen_<float_cvt><mode>): Ditto.
36773 (@pred_extend<mode>): Ditto.
36774 (@pred_narrow_fcvt_x<v_su>_f<mode>): Ditto.
36775 (@pred_narrow_<fix_cvt><mode>): Ditto.
36776 (@pred_narrow_<float_cvt><mode>): Ditto.
36777 (@pred_trunc<mode>): Ditto.
36778 (@pred_rod_trunc<mode>): Ditto.
36780 2023-02-22 Jakub Jelinek <jakub@redhat.com>
36782 PR middle-end/106258
36783 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee,
36784 cgraph_update_edges_for_call_stmt_node, cgraph_node::verify_node):
36785 Handle BUILT_IN_UNREACHABLE_TRAP like BUILT_IN_UNREACHABLE.
36786 * cgraphclones.cc (cgraph_node::create_clone): Likewise.
36788 2023-02-22 Thomas Schwinge <thomas@codesourcery.com>
36790 * common.opt (-Wcomplain-wrong-lang): New.
36791 * doc/invoke.texi (-Wno-complain-wrong-lang): Document it.
36792 * opts-common.cc (prune_options): Handle it.
36793 * opts-global.cc (complain_wrong_lang): Use it.
36795 2023-02-21 David Malcolm <dmalcolm@redhat.com>
36798 * doc/invoke.texi: Document -fno-analyzer-suppress-followups.
36800 2023-02-21 Max Filippov <jcmvbkbc@gmail.com>
36803 * config/xtensa/xtensa.cc (xtensa_expand_epilogue): Drop emit_use
36805 * config/xtensa/xtensa.md (sibcall, sibcall_internal)
36806 (sibcall_value, sibcall_value_internal): Add 'use' expression
36809 2023-02-21 Richard Biener <rguenther@suse.de>
36811 PR tree-optimization/108691
36812 * tree-ssa-dce.cc (eliminate_unnecessary_stmts): Remove
36813 assert about calls_setjmp not becoming true when it was false.
36815 2023-02-21 Richard Biener <rguenther@suse.de>
36817 PR tree-optimization/108793
36818 * tree-ssa-loop-niter.cc (number_of_iterations_until_wrap):
36819 Use convert operands to niter_type when computing num.
36821 2023-02-21 Richard Biener <rguenther@suse.de>
36824 2023-02-13 Richard Biener <rguenther@suse.de>
36826 PR tree-optimization/108691
36827 * tree-cfg.cc (notice_special_calls): When the CFG is built
36828 honor gimple_call_ctrl_altering_p.
36829 * cfgexpand.cc (expand_call_stmt): Clear cfun->calls_setjmp
36830 temporarily if the call is not control-altering.
36831 * calls.cc (emit_call_1): Do not add REG_SETJMP if
36832 cfun->calls_setjmp is not set. Do not alter cfun->calls_setjmp.
36834 2023-02-21 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
36836 * config/xtensa/xtensa.cc (xtensa_call_save_reg): Change to return
36837 true if register A0 (return address register) when -Og is specified.
36839 2023-02-20 Uroš Bizjak <ubizjak@gmail.com>
36841 * config/i386/predicates.md
36842 (general_x64constmem_operand): New predicate.
36843 * config/i386/i386.md (*cmpqi_ext<mode>_1):
36844 Use nonimm_x64constmem_operand.
36845 (*cmpqi_ext<mode>_3): Use general_x64constmem_operand.
36846 (*addqi_ext<mode>_1): Ditto.
36847 (*testqi_ext<mode>_1): Ditto.
36848 (*andqi_ext<mode>_1): Ditto.
36849 (*andqi_ext<mode>_1_cc): Ditto.
36850 (*<any_or:code>qi_ext<mode>_1): Ditto.
36851 (*xorqi_ext<mode>_1_cc): Ditto.
36853 2023-02-20 Jakub Jelinek <jakub2redhat.com>
36856 * config/rs6000/rs6000.md (umaddditi4): Swap gen_maddlddi4 with
36857 gen_umadddi4_highpart{,_le}.
36859 2023-02-20 Kito Cheng <kito.cheng@sifive.com>
36861 * config/riscv/riscv.md (prefetch): Use r instead of p for the
36863 (riscv_prefetchi_<mode>): Ditto.
36865 2023-02-20 Richard Biener <rguenther@suse.de>
36867 PR tree-optimization/108816
36868 * tree-vect-loop-manip.cc (vect_loop_versioning): Adjust
36869 versioning condition split prerequesite, assert required
36872 2023-02-20 Richard Biener <rguenther@suse.de>
36874 PR tree-optimization/108825
36875 * tree-ssa-loop-manip.cc (verify_loop_closed_ssa): For
36876 loop-local verfication only verify there's no pending SSA
36879 2023-02-20 Richard Biener <rguenther@suse.de>
36881 PR tree-optimization/108819
36882 * tree-ssa-loop-niter.cc (number_of_iterations_cltz): Check
36883 we have an SSA name as iv_2 as expected.
36885 2023-02-18 Jakub Jelinek <jakub@redhat.com>
36887 PR tree-optimization/108819
36888 * tree-ssa-reassoc.cc (update_ops): Fold new stmt in place.
36890 2023-02-18 Jakub Jelinek <jakub@redhat.com>
36893 * config/i386/i386-protos.h (ix86_replace_reg_with_reg): Declare.
36894 * config/i386/i386-expand.cc (ix86_replace_reg_with_reg): New
36896 * config/i386/i386.md: Replace replace_rtx calls in all peephole2s
36897 with ix86_replace_reg_with_reg.
36899 2023-02-18 Gerald Pfeifer <gerald@pfeifer.com>
36901 * doc/invoke.texi (AVR Options): Update link to AVR-LibC.
36903 2023-02-18 Xi Ruoyao <xry111@xry111.site>
36905 * config.gcc (triplet_abi): Set its value based on $with_abi,
36906 instead of $target.
36907 (la_canonical_triplet): Set it after $triplet_abi is set
36909 * config/loongarch/t-linux (MULTILIB_OSDIRNAMES): Make the
36910 multiarch tuple for lp64d "loongarch64-linux-gnu" (without
36913 2023-02-18 Andrew Pinski <apinski@marvell.com>
36915 * match.pd: Remove #if GIMPLE around the
36918 2023-02-18 Andrew Pinski <apinski@marvell.com>
36920 * value-query.h (get_range_query): Return the global ranges
36921 for a nullptr func.
36923 2023-02-17 Siddhesh Poyarekar <siddhesh@gotplt.org>
36925 * doc/invoke.texi (@item -Wall): Fix typo in
36928 2023-02-17 Uroš Bizjak <ubizjak@gmail.com>
36931 * config/i386/predicates.md
36932 (nonimm_x64constmem_operand): New predicate.
36933 * config/i386/i386.md (*addqi_ext<mode>_0): New insn pattern.
36934 (*subqi_ext<mode>_0): Ditto.
36935 (*andqi_ext<mode>_0): Ditto.
36936 (*<any_or:code>qi_ext<mode>_0): Ditto.
36938 2023-02-17 Uroš Bizjak <ubizjak@gmail.com>
36941 * simplify-rtx.cc (simplify_context::simplify_subreg): Use
36942 int_outermode instead of GET_MODE (tem) to prevent
36943 VOIDmode from entering simplify_gen_subreg.
36945 2023-02-17 Richard Biener <rguenther@suse.de>
36947 PR tree-optimization/108821
36948 * tree-ssa-loop-im.cc (sm_seq_valid_bb): We can also not
36949 move volatile accesses.
36951 2023-02-17 Richard Biener <rguenther@suse.de>
36953 * tree-ssa.cc (ssa_undefined_value_p): Assert we are not
36954 called on virtual operands.
36955 * tree-ssa-sccvn.cc (vn_phi_lookup): Guard
36956 ssa_undefined_value_p calls.
36957 (vn_phi_insert): Likewise.
36958 (set_ssa_val_to): Likewise.
36959 (visit_phi): Avoid extra work with equivalences for
36960 virtual operand PHIs.
36962 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36964 * config/riscv/riscv-vector-builtins-bases.cc (class mask_logic): New
36966 (class mask_nlogic): Ditto.
36967 (class mask_notlogic): Ditto.
36968 (class vmmv): Ditto.
36969 (class vmclr): Ditto.
36970 (class vmset): Ditto.
36971 (class vmnot): Ditto.
36972 (class vcpop): Ditto.
36973 (class vfirst): Ditto.
36974 (class mask_misc): Ditto.
36975 (class viota): Ditto.
36976 (class vid): Ditto.
36978 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
36979 * config/riscv/riscv-vector-builtins-functions.def (vmand): Ditto.
36998 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
36999 (struct mask_alu_def): Ditto.
37001 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
37002 * config/riscv/riscv-vector-builtins.cc: Ditto.
37003 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_insns): Fix bug
37004 for dest it scalar RVV intrinsics.
37005 * config/riscv/vector-iterators.md (sof): New iterator.
37006 * config/riscv/vector.md (@pred_<optab>n<mode>): New pattern.
37007 (@pred_<optab>not<mode>): New pattern.
37008 (@pred_popcount<VB:mode><P:mode>): New pattern.
37009 (@pred_ffs<VB:mode><P:mode>): New pattern.
37010 (@pred_<misc_op><mode>): New pattern.
37011 (@pred_iota<mode>): New pattern.
37012 (@pred_series<mode>): New pattern.
37014 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37016 * config/riscv/riscv-vector-builtins-functions.def (vadc): Rename.
37020 * config/riscv/riscv-vector-builtins.cc: Ditto.
37022 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37023 kito-cheng <kito.cheng@sifive.com>
37025 * config/riscv/riscv-protos.h (sew64_scalar_helper): New function.
37026 * config/riscv/riscv-v.cc (has_vi_variant_p): Adjust.
37027 (sew64_scalar_helper): New function.
37028 * config/riscv/vector.md: Normalization.
37030 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37032 * config/riscv/riscv-vector-builtins-functions.def (vsetvlmax): Rearrange.
37094 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37096 * config/riscv/vector.md (@pred_<optab><mode>): Rearrange.
37097 (@pred_<optab><mode>_scalar): Ditto.
37098 (*pred_<optab><mode>_scalar): Ditto.
37099 (*pred_<optab><mode>_extended_scalar): Ditto.
37101 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37103 * config/riscv/riscv-protos.h (riscv_run_selftests): Remove 'extern'.
37104 (init_builtins): Ditto.
37105 (mangle_builtin_type): Ditto.
37106 (verify_type_context): Ditto.
37107 (handle_pragma_vector): Ditto.
37108 (builtin_decl): Ditto.
37109 (expand_builtin): Ditto.
37110 (const_vec_all_same_in_range_p): Ditto.
37111 (legitimize_move): Ditto.
37112 (emit_vlmax_op): Ditto.
37113 (emit_nonvlmax_op): Ditto.
37114 (get_vlmul): Ditto.
37115 (get_ratio): Ditto.
37118 (get_avl_type): Ditto.
37119 (calculate_ratio): Ditto.
37120 (enum vlmul_type): Ditto.
37122 (neg_simm5_p): Ditto.
37123 (has_vi_variant_p): Ditto.
37125 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37127 * config/riscv/riscv-protos.h (simm32_p): Remove.
37128 * config/riscv/riscv-v.cc (simm32_p): Ditto.
37129 * config/riscv/vector.md: Use immediate_operand
37130 instead of riscv_vector::simm32_p.
37132 2023-02-16 Gerald Pfeifer <gerald@pfeifer.com>
37134 * doc/invoke.texi (Optimize Options): Reword the explanation
37135 getting minimal, maximal and default values of a parameter.
37137 2023-02-16 Patrick Palka <ppalka@redhat.com>
37139 * addresses.h: Mechanically drop 'static' from 'static inline'
37140 functions via s/^static inline/inline/g.
37141 * asan.h: Likewise.
37142 * attribs.h: Likewise.
37143 * basic-block.h: Likewise.
37144 * bitmap.h: Likewise.
37145 * cfghooks.h: Likewise.
37146 * cfgloop.h: Likewise.
37147 * cgraph.h: Likewise.
37148 * cselib.h: Likewise.
37149 * data-streamer.h: Likewise.
37150 * debug.h: Likewise.
37152 * diagnostic.h: Likewise.
37153 * dominance.h: Likewise.
37154 * dumpfile.h: Likewise.
37155 * emit-rtl.h: Likewise.
37156 * except.h: Likewise.
37157 * expmed.h: Likewise.
37158 * expr.h: Likewise.
37159 * fixed-value.h: Likewise.
37160 * gengtype.h: Likewise.
37161 * gimple-expr.h: Likewise.
37162 * gimple-iterator.h: Likewise.
37163 * gimple-predict.h: Likewise.
37164 * gimple-range-fold.h: Likewise.
37165 * gimple-ssa.h: Likewise.
37166 * gimple.h: Likewise.
37167 * graphite.h: Likewise.
37168 * hard-reg-set.h: Likewise.
37169 * hash-map.h: Likewise.
37170 * hash-set.h: Likewise.
37171 * hash-table.h: Likewise.
37172 * hwint.h: Likewise.
37173 * input.h: Likewise.
37174 * insn-addr.h: Likewise.
37175 * internal-fn.h: Likewise.
37176 * ipa-fnsummary.h: Likewise.
37177 * ipa-icf-gimple.h: Likewise.
37178 * ipa-inline.h: Likewise.
37179 * ipa-modref.h: Likewise.
37180 * ipa-prop.h: Likewise.
37181 * ira-int.h: Likewise.
37183 * lra-int.h: Likewise.
37185 * lto-streamer.h: Likewise.
37186 * memmodel.h: Likewise.
37187 * omp-general.h: Likewise.
37188 * optabs-query.h: Likewise.
37189 * optabs.h: Likewise.
37190 * plugin.h: Likewise.
37191 * pretty-print.h: Likewise.
37192 * range.h: Likewise.
37193 * read-md.h: Likewise.
37194 * recog.h: Likewise.
37195 * regs.h: Likewise.
37196 * rtl-iter.h: Likewise.
37198 * sbitmap.h: Likewise.
37199 * sched-int.h: Likewise.
37200 * sel-sched-ir.h: Likewise.
37201 * sese.h: Likewise.
37202 * sparseset.h: Likewise.
37203 * ssa-iterators.h: Likewise.
37204 * system.h: Likewise.
37205 * target-globals.h: Likewise.
37206 * target.h: Likewise.
37207 * timevar.h: Likewise.
37208 * tree-chrec.h: Likewise.
37209 * tree-data-ref.h: Likewise.
37210 * tree-iterator.h: Likewise.
37211 * tree-outof-ssa.h: Likewise.
37212 * tree-phinodes.h: Likewise.
37213 * tree-scalar-evolution.h: Likewise.
37214 * tree-sra.h: Likewise.
37215 * tree-ssa-alias.h: Likewise.
37216 * tree-ssa-live.h: Likewise.
37217 * tree-ssa-loop-manip.h: Likewise.
37218 * tree-ssa-loop.h: Likewise.
37219 * tree-ssa-operands.h: Likewise.
37220 * tree-ssa-propagate.h: Likewise.
37221 * tree-ssa-sccvn.h: Likewise.
37222 * tree-ssa.h: Likewise.
37223 * tree-ssanames.h: Likewise.
37224 * tree-streamer.h: Likewise.
37225 * tree-switch-conversion.h: Likewise.
37226 * tree-vectorizer.h: Likewise.
37227 * tree.h: Likewise.
37228 * wide-int.h: Likewise.
37230 2023-02-16 Jakub Jelinek <jakub@redhat.com>
37232 PR tree-optimization/108657
37233 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): If lhs of stmt
37234 exists and is not a SSA_NAME, call ao_ref_init even if the stmt
37235 is a call to internal or builtin function.
37237 2023-02-16 Jonathan Wakely <jwakely@redhat.com>
37239 * doc/invoke.texi (C++ Dialect Options): Suggest adding a
37240 using-declaration to unhide functions.
37242 2023-02-16 Jakub Jelinek <jakub@redhat.com>
37244 PR tree-optimization/108783
37245 * tree-ssa-reassoc.cc (eliminate_redundant_comparison): If lcode
37246 is equal to TREE_CODE (t), op1 to newop1 and op2 to newop2, set
37247 t to curr->op. Otherwise, punt if either newop1 or newop2 are
37248 SSA_NAME_OCCURS_IN_ABNORMAL_PHI SSA_NAMEs.
37250 2023-02-16 Richard Biener <rguenther@suse.de>
37252 PR tree-optimization/108791
37253 * tree-ssa-forwprop.cc (optimize_vector_load): Build
37254 the ADDR_EXPR of a TARGET_MEM_REF using a more meaningful
37257 2023-02-15 Eric Botcazou <ebotcazou@adacore.com>
37260 * config/i386/i386.cc (ix86_compute_frame_layout): Disable the
37261 effects of -fstack-clash-protection for TARGET_STACK_PROBE.
37262 (ix86_expand_prologue): Likewise.
37264 2023-02-15 Jan-Benedict Glaw <jbglaw@lug-owl.de>
37266 * config/bpf/bpf.cc (bpf_option_override): Fix doubled space.
37268 2023-02-15 Uroš Bizjak <ubizjak@gmail.com>
37270 * config/i386/i386.md (*cmpqi_ext<mode>_1): Use
37271 int248_register_operand predicate in zero_extract sub-RTX.
37272 (*cmpqi_ext<mode>_2): Ditto.
37273 (*cmpqi_ext<mode>_3): Ditto.
37274 (*cmpqi_ext<mode>_4): Ditto.
37275 (*extzvqi_mem_rex64): Ditto.
37277 (*insvqi_1_mem_rex64): Ditto.
37278 (@insv<mode>_1): Ditto.
37279 (*insvqi_1): Ditto.
37280 (*insvqi_2): Ditto.
37281 (*insvqi_3): Ditto.
37282 (*extendqi<SWI24:mode>_ext_1): Ditto.
37283 (*addqi_ext<mode>_1): Ditto.
37284 (*addqi_ext<mode>_2): Ditto.
37285 (*subqi_ext<mode>_2): Ditto.
37286 (*testqi_ext<mode>_1): Ditto.
37287 (*testqi_ext<mode>_2): Ditto.
37288 (*andqi_ext<mode>_1): Ditto.
37289 (*andqi_ext<mode>_1_cc): Ditto.
37290 (*andqi_ext<mode>_2): Ditto.
37291 (*<any_or:code>qi_ext<mode>_1): Ditto.
37292 (*<any_or:code>qi_ext<mode>_2): Ditto.
37293 (*xorqi_ext<mode>_1_cc): Ditto.
37294 (*negqi_ext<mode>_2): Ditto.
37295 (*ashlqi_ext<mode>_2): Ditto.
37296 (*<any_shiftrt:insn>qi_ext<mode>_2): Ditto.
37298 2023-02-15 Uroš Bizjak <ubizjak@gmail.com>
37300 * config/i386/predicates.md (int248_register_operand):
37301 Rename from extr_register_operand.
37302 * config/i386/i386.md (*extv<mode>): Update for renamed predicate.
37303 (*extzx<mode>): Ditto.
37304 (*ashl<dwi>3_doubleword_mask): Use int248_register_operand predicate.
37305 (*ashl<mode>3_mask): Ditto.
37306 (*<any_shiftrt:insn><mode>3_mask): Ditto.
37307 (*<any_shiftrt:insn><dwi>3_doubleword_mask): Ditto.
37308 (*<any_rotate:insn><mode>3_mask): Ditto.
37309 (*<btsc><mode>_mask): Ditto.
37310 (*btr<mode>_mask): Ditto.
37311 (*jcc_bt<mode>_mask_1): Ditto.
37313 2023-02-15 Richard Biener <rguenther@suse.de>
37315 PR middle-end/26854
37316 * df-core.cc (df_worklist_propagate_forward): Put later
37317 blocks on worklist and only earlier blocks on pending.
37318 (df_worklist_propagate_backward): Likewise.
37319 (df_worklist_dataflow_doublequeue): Change the iteration
37320 to process new blocks in the same iteration if that
37321 maintains the iteration order.
37323 2023-02-15 Marek Polacek <polacek@redhat.com>
37325 PR middle-end/106080
37326 * gimple-ssa-warn-access.cc (is_auto_decl): Remove. Use auto_var_p
37329 2023-02-15 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37331 * config/riscv/predicates.md: Refine codes.
37332 * config/riscv/riscv-protos.h (RVV_VUNDEF): New macro.
37333 * config/riscv/riscv-v.cc: Refine codes.
37334 * config/riscv/riscv-vector-builtins-bases.cc (enum ternop_type): New
37336 (class imac): New class.
37337 (enum widen_ternop_type): New enum.
37338 (class iwmac): New class.
37340 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
37341 * config/riscv/riscv-vector-builtins-functions.def (vmacc): Ditto.
37349 * config/riscv/riscv-vector-builtins.cc
37350 (function_builder::apply_predication): Adjust for multiply-add support.
37351 (function_expander::add_vundef_operand): Refine codes.
37352 (function_expander::use_ternop_insn): New function.
37353 (function_expander::use_widen_ternop_insn): Ditto.
37354 * config/riscv/riscv-vector-builtins.h: New function.
37355 * config/riscv/vector.md (@pred_mul_<optab><mode>): New pattern.
37356 (pred_mul_<optab><mode>_undef_merge): Ditto.
37357 (*pred_<madd_nmsub><mode>): Ditto.
37358 (*pred_<macc_nmsac><mode>): Ditto.
37359 (*pred_mul_<optab><mode>): Ditto.
37360 (@pred_mul_<optab><mode>_scalar): Ditto.
37361 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
37362 (*pred_<madd_nmsub><mode>_scalar): Ditto.
37363 (*pred_<macc_nmsac><mode>_scalar): Ditto.
37364 (*pred_mul_<optab><mode>_scalar): Ditto.
37365 (*pred_mul_<optab><mode>_undef_merge_extended_scalar): Ditto.
37366 (*pred_<madd_nmsub><mode>_extended_scalar): Ditto.
37367 (*pred_<macc_nmsac><mode>_extended_scalar): Ditto.
37368 (*pred_mul_<optab><mode>_extended_scalar): Ditto.
37369 (@pred_widen_mul_plus<su><mode>): Ditto.
37370 (@pred_widen_mul_plus<su><mode>_scalar): Ditto.
37371 (@pred_widen_mul_plussu<mode>): Ditto.
37372 (@pred_widen_mul_plussu<mode>_scalar): Ditto.
37373 (@pred_widen_mul_plusus<mode>_scalar): Ditto.
37375 2023-02-15 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37377 * config/riscv/predicates.md (vector_mask_operand): Refine the codes.
37378 (vector_all_trues_mask_operand): New predicate.
37379 (vector_undef_operand): New predicate.
37380 (ltge_operator): New predicate.
37381 (comparison_except_ltge_operator): New predicate.
37382 (comparison_except_eqge_operator): New predicate.
37383 (ge_operator): New predicate.
37384 * config/riscv/riscv-v.cc (has_vi_variant_p): Add compare support.
37385 * config/riscv/riscv-vector-builtins-bases.cc (class icmp): New class.
37387 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
37388 * config/riscv/riscv-vector-builtins-functions.def (vmseq): Ditto.
37398 * config/riscv/riscv-vector-builtins-shapes.cc
37399 (struct return_mask_def): Adjust for compare support.
37400 * config/riscv/riscv-vector-builtins.cc
37401 (function_expander::use_compare_insn): New function.
37402 * config/riscv/riscv-vector-builtins.h
37403 (function_expander::add_integer_operand): Ditto.
37404 * config/riscv/riscv.cc (riscv_print_operand): Add compare support.
37405 * config/riscv/riscv.md: Add vector min/max attributes.
37406 * config/riscv/vector-iterators.md (xnor): New iterator.
37407 * config/riscv/vector.md (@pred_cmp<mode>): New pattern.
37408 (*pred_cmp<mode>): Ditto.
37409 (*pred_cmp<mode>_narrow): Ditto.
37410 (@pred_ltge<mode>): Ditto.
37411 (*pred_ltge<mode>): Ditto.
37412 (*pred_ltge<mode>_narrow): Ditto.
37413 (@pred_cmp<mode>_scalar): Ditto.
37414 (*pred_cmp<mode>_scalar): Ditto.
37415 (*pred_cmp<mode>_scalar_narrow): Ditto.
37416 (@pred_eqne<mode>_scalar): Ditto.
37417 (*pred_eqne<mode>_scalar): Ditto.
37418 (*pred_eqne<mode>_scalar_narrow): Ditto.
37419 (*pred_cmp<mode>_extended_scalar): Ditto.
37420 (*pred_cmp<mode>_extended_scalar_narrow): Ditto.
37421 (*pred_eqne<mode>_extended_scalar): Ditto.
37422 (*pred_eqne<mode>_extended_scalar_narrow): Ditto.
37423 (@pred_ge<mode>_scalar): Ditto.
37424 (@pred_<optab><mode>): Ditto.
37425 (@pred_n<optab><mode>): Ditto.
37426 (@pred_<optab>n<mode>): Ditto.
37427 (@pred_not<mode>): Ditto.
37429 2023-02-15 Martin Jambor <mjambor@suse.cz>
37432 * ipa-sra.cc (push_param_adjustments_for_index): Do not omit
37433 creation of non-scalar replacements even if IPA-CP knows their
37436 2023-02-15 Jakub Jelinek <jakub@redhat.com>
37440 * config/rs6000/rs6000.md (<u>maddditi4): Change into umaddditi4 only
37441 expander, change operand 3 to be TImode, emit maddlddi4 and
37442 umadddi4_highpart{,_le} with its low half and finally add the high
37443 half to the result.
37445 2023-02-15 Martin Liska <mliska@suse.cz>
37447 * doc/invoke.texi: Document --param=asan-kernel-mem-intrinsic-prefix.
37449 2023-02-15 Richard Biener <rguenther@suse.de>
37451 * sanopt.cc (sanitize_asan_mark_unpoison): Use bitmap
37452 for with_poison and alias worklist to it.
37453 (sanitize_asan_mark_poison): Likewise.
37455 2023-02-15 Richard Biener <rguenther@suse.de>
37458 * config/i386/i386-features.cc (scalar_chain::add_to_queue):
37459 Combine bitmap test and set.
37460 (scalar_chain::add_insn): Likewise.
37461 (scalar_chain::analyze_register_chain): Remove redundant
37462 attempt to add to queue and instead strengthen assert.
37463 Sink common attempts to mark the def dual-mode.
37464 (scalar_chain::add_to_queue): Remove redundant insn bitmap
37467 2023-02-15 Richard Biener <rguenther@suse.de>
37470 * config/i386/i386-features.cc (convert_scalars_to_vector):
37471 Switch candidates bitmaps to tree view before building the chains.
37473 2023-02-15 Hans-Peter Nilsson <hp@axis.com>
37475 * reload1.cc (gen_reload): Correct rtx parameter for fatal_insn
37476 "failure trying to reload" call.
37478 2023-02-15 Hans-Peter Nilsson <hp@axis.com>
37480 * gdbinit.in (phrs): New command.
37481 * sel-sched-dump.cc (debug_hard_reg_set): Remove debug-function.
37482 * ira-color.cc (debug_hard_reg_set): New, calling print_hard_reg_set.
37484 2023-02-14 David Faust <david.faust@oracle.com>
37487 * config/bpf/constraints.md (q): New memory constraint.
37488 * config/bpf/bpf.md (zero_extendhidi2): Use it here.
37489 (zero_extendqidi2): Likewise.
37490 (zero_extendsidi2): Likewise.
37491 (*mov<MM:mode>): Likewise.
37493 2023-02-14 Andrew Pinski <apinski@marvell.com>
37495 PR tree-optimization/108355
37496 PR tree-optimization/96921
37497 * match.pd: Add pattern for "1 - bool_val".
37499 2023-02-14 Richard Biener <rguenther@suse.de>
37501 * tree-ssa-sccvn.cc (vn_phi_compute_hash): Key skipping
37502 basic block index hashing on the availability of ->cclhs.
37503 (vn_phi_eq): Avoid re-doing sanity checks for CSE but
37504 rely on ->cclhs availability.
37505 (vn_phi_lookup): Set ->cclhs only when we are eventually
37506 going to CSE the PHI.
37507 (vn_phi_insert): Likewise.
37509 2023-02-14 Eric Botcazou <ebotcazou@adacore.com>
37511 * gimplify.cc (gimplify_save_expr): Add missing guard.
37513 2023-02-14 Richard Biener <rguenther@suse.de>
37515 PR tree-optimization/108782
37516 * tree-vect-loop.cc (vect_phi_first_order_recurrence_p):
37517 Make sure we're not vectorizing an inner loop.
37519 2023-02-14 Jakub Jelinek <jakub@redhat.com>
37521 PR sanitizer/108777
37522 * params.opt (-param=asan-kernel-mem-intrinsic-prefix=): New param.
37523 * asan.h (asan_memfn_rtl): Declare.
37524 * asan.cc (asan_memfn_rtls): New variable.
37525 (asan_memfn_rtl): New function.
37526 * builtins.cc (expand_builtin): If
37527 param_asan_kernel_mem_intrinsic_prefix and function is
37528 kernel-{,hw}address sanitized, emit calls to
37529 __{,hw}asan_{memcpy,memmove,memset} rather than
37530 {memcpy,memmove,memset}. Use sanitize_flags_p (SANITIZE_ADDRESS)
37531 instead of flag_sanitize & SANITIZE_ADDRESS to check if
37532 asan_intercepted_p functions shouldn't be expanded inline.
37534 2023-02-14 Richard Sandiford <richard.sandiford@arm.com>
37536 PR tree-optimization/96373
37537 * tree-vect-stmts.cc (vectorizable_operation): Predicate trapping
37538 operations on the loop mask. Reject partial vectors if this isn't
37541 2023-02-13 Richard Sandiford <richard.sandiford@arm.com>
37543 PR rtl-optimization/108681
37544 * lra-spills.cc (lra_final_code_change): Extend subreg replacement
37545 code to handle bare uses and clobbers.
37547 2023-02-13 Vladimir N. Makarov <vmakarov@redhat.com>
37549 * ira.cc (ira_update_equiv_info_by_shuffle_insn): Clear equiv
37550 caller_save_p flag when clearing defined_p flag.
37551 (setup_reg_equiv): Ditto.
37552 * lra-constraints.cc (lra_constraints): Ditto.
37554 2023-02-13 Uroš Bizjak <ubizjak@gmail.com>
37557 * config/i386/predicates.md (extr_register_operand):
37558 New special predicate.
37559 * config/i386/i386.md (*extv<mode>): Use extr_register_operand
37560 as operand 1 predicate.
37561 (*exzv<mode>): Ditto.
37562 (*extendqi<SWI24:mode>_ext_1): New insn pattern.
37564 2023-02-13 Richard Biener <rguenther@suse.de>
37566 PR tree-optimization/28614
37567 * tree-ssa-sccvn.cc (can_track_predicate_on_edge): Avoid
37568 walking all edges in most cases.
37569 (vn_nary_op_insert_pieces_predicated): Avoid repeated
37570 calls to can_track_predicate_on_edge unless checking is
37572 (process_bb): Instead call it once here for each edge
37573 we register possibly multiple predicates on.
37575 2023-02-13 Richard Biener <rguenther@suse.de>
37577 PR tree-optimization/108691
37578 * tree-cfg.cc (notice_special_calls): When the CFG is built
37579 honor gimple_call_ctrl_altering_p.
37580 * cfgexpand.cc (expand_call_stmt): Clear cfun->calls_setjmp
37581 temporarily if the call is not control-altering.
37582 * calls.cc (emit_call_1): Do not add REG_SETJMP if
37583 cfun->calls_setjmp is not set. Do not alter cfun->calls_setjmp.
37585 2023-02-13 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
37588 * config/s390/s390.cc (s390_bb_fallthru_entry_likely): Remove.
37589 (struct s390_sched_state): Initialise to zero.
37590 (s390_sched_variable_issue): For better debuggability also emit
37592 (s390_sched_init): Unconditionally reset scheduler state.
37594 2023-02-13 Richard Sandiford <richard.sandiford@arm.com>
37596 * ifcvt.h (noce_if_info::cond_inverted): New field.
37597 * ifcvt.cc (cond_move_convert_if_block): Swap the then and else
37598 values when cond_inverted is true.
37599 (noce_find_if_block): Allow the condition to be inverted when
37600 handling conditional moves.
37602 2023-02-13 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
37604 * config/s390/predicates.md (execute_operation): Use
37605 constrain_operands instead of extract_constrain_insn in order to
37606 determine wheter there exists a valid alternative.
37608 2023-02-13 Claudiu Zissulescu <claziss@gmail.com>
37610 * common/config/arc/arc-common.cc (arc_option_optimization_table):
37611 Remove millicode from list.
37613 2023-02-13 Martin Liska <mliska@suse.cz>
37615 * doc/invoke.texi: Document ira-simple-lra-insn-threshold.
37617 2023-02-13 Richard Biener <rguenther@suse.de>
37619 PR tree-optimization/106722
37620 * tree-ssa-dce.cc (mark_last_stmt_necessary): Return
37621 whether we marked a stmt.
37622 (mark_control_dependent_edges_necessary): When
37623 mark_last_stmt_necessary didn't mark any stmt make sure
37624 to mark its control dependent edges.
37625 (propagate_necessity): Likewise.
37627 2023-02-13 Kito Cheng <kito.cheng@sifive.com>
37629 * config/riscv/riscv.h (RISCV_DWARF_VLENB): New.
37630 (DWARF_FRAME_REGISTERS): New.
37631 (DWARF_REG_TO_UNWIND_COLUMN): New.
37633 2023-02-12 Gerald Pfeifer <gerald@pfeifer.com>
37635 * doc/sourcebuild.texi: Remove (broken) direct reference to
37636 "The GNU configure and build system".
37638 2023-02-12 Jin Ma <jinma@linux.alibaba.com>
37640 * config/riscv/riscv.cc (riscv_adjust_libcall_cfi_prologue): Change
37641 gen_add3_insn to gen_rtx_SET.
37642 (riscv_adjust_libcall_cfi_epilogue): Likewise.
37644 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37646 * config/riscv/riscv-vector-builtins-bases.cc (class sat_op): New class.
37647 (class vnclip): Ditto.
37649 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
37650 * config/riscv/riscv-vector-builtins-functions.def (vaadd): Ditto.
37659 * config/riscv/vector-iterators.md (su): Add instruction.
37662 * config/riscv/vector.md (@pred_<sat_op><mode>): New pattern.
37663 (@pred_<sat_op><mode>_scalar): Ditto.
37664 (*pred_<sat_op><mode>_scalar): Ditto.
37665 (*pred_<sat_op><mode>_extended_scalar): Ditto.
37666 (@pred_narrow_clip<v_su><mode>): Ditto.
37667 (@pred_narrow_clip<v_su><mode>_scalar): Ditto.
37669 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37671 * config/riscv/constraints.md (Wbr): Remove unused constraint.
37672 * config/riscv/predicates.md: Fix move operand predicate.
37673 * config/riscv/riscv-vector-builtins-bases.cc (class vnshift): New class.
37674 (class vncvt_x): Ditto.
37675 (class vmerge): Ditto.
37676 (class vmv_v): Ditto.
37678 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
37679 * config/riscv/riscv-vector-builtins-functions.def (vsra): Ditto.
37686 * config/riscv/riscv-vector-builtins-shapes.cc (struct narrow_alu_def): Ditto.
37687 (struct move_def): Ditto.
37689 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
37690 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WEXTI_OPS): New variable.
37691 (DEF_RVV_WEXTU_OPS): Ditto
37692 * config/riscv/riscv-vector-builtins.def (x_x_w): Fix type for suffix.
37697 * config/riscv/riscv.cc (riscv_print_operand): Refine ASM printting rule.
37698 * config/riscv/vector-iterators.md (nmsac):New iterator.
37699 (nmsub): New iterator.
37700 * config/riscv/vector.md (@pred_merge<mode>): New pattern.
37701 (@pred_merge<mode>_scalar): New pattern.
37702 (*pred_merge<mode>_scalar): New pattern.
37703 (*pred_merge<mode>_extended_scalar): New pattern.
37704 (@pred_narrow_<optab><mode>): New pattern.
37705 (@pred_narrow_<optab><mode>_scalar): New pattern.
37706 (@pred_trunc<mode>): New pattern.
37708 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37710 * config/riscv/riscv-vector-builtins-bases.cc (class vmadc): New class.
37711 (class vmsbc): Ditto.
37712 (BASE): Define new class.
37713 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
37714 * config/riscv/riscv-vector-builtins-functions.def (vmadc): New define.
37716 * config/riscv/riscv-vector-builtins-shapes.cc (struct return_mask_def):
37719 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
37720 * config/riscv/riscv-vector-builtins.cc
37721 (function_expander::use_exact_insn): Adjust for new support
37722 * config/riscv/riscv-vector-builtins.h
37723 (function_base::has_merge_operand_p): New function.
37724 * config/riscv/vector-iterators.md: New iterator.
37725 * config/riscv/vector.md (@pred_madc<mode>): New pattern.
37726 (@pred_msbc<mode>): Ditto.
37727 (@pred_madc<mode>_scalar): Ditto.
37728 (@pred_msbc<mode>_scalar): Ditto.
37729 (*pred_madc<mode>_scalar): Ditto.
37730 (*pred_madc<mode>_extended_scalar): Ditto.
37731 (*pred_msbc<mode>_scalar): Ditto.
37732 (*pred_msbc<mode>_extended_scalar): Ditto.
37733 (@pred_madc<mode>_overflow): Ditto.
37734 (@pred_msbc<mode>_overflow): Ditto.
37735 (@pred_madc<mode>_overflow_scalar): Ditto.
37736 (@pred_msbc<mode>_overflow_scalar): Ditto.
37737 (*pred_madc<mode>_overflow_scalar): Ditto.
37738 (*pred_madc<mode>_overflow_extended_scalar): Ditto.
37739 (*pred_msbc<mode>_overflow_scalar): Ditto.
37740 (*pred_msbc<mode>_overflow_extended_scalar): Ditto.
37742 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37744 * config/riscv/riscv-protos.h (simm5_p): Add vadc/vsbc support.
37745 * config/riscv/riscv-v.cc (simm32_p): Ditto.
37746 * config/riscv/riscv-vector-builtins-bases.cc (class vadc): New class.
37747 (class vsbc): Ditto.
37749 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
37750 * config/riscv/riscv-vector-builtins-functions.def (vadc): Ditto.
37752 * config/riscv/riscv-vector-builtins-shapes.cc
37753 (struct no_mask_policy_def): Ditto.
37755 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
37756 * config/riscv/riscv-vector-builtins.cc
37757 (rvv_arg_type_info::get_base_vector_type): Add vadc/vsbc support.
37758 (rvv_arg_type_info::get_tree_type): Ditto.
37759 (function_expander::use_exact_insn): Ditto.
37760 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
37761 (function_base::use_mask_predication_p): New function.
37762 * config/riscv/vector-iterators.md: New iterator.
37763 * config/riscv/vector.md (@pred_adc<mode>): New pattern.
37764 (@pred_sbc<mode>): Ditto.
37765 (@pred_adc<mode>_scalar): Ditto.
37766 (@pred_sbc<mode>_scalar): Ditto.
37767 (*pred_adc<mode>_scalar): Ditto.
37768 (*pred_adc<mode>_extended_scalar): Ditto.
37769 (*pred_sbc<mode>_scalar): Ditto.
37770 (*pred_sbc<mode>_extended_scalar): Ditto.
37772 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37774 * config/riscv/vector.md: use "zero" reg.
37776 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37778 * config/riscv/riscv-vector-builtins-bases.cc (class widen_binop): New
37780 (class vwmulsu): Ditto.
37781 (class vwcvt): Ditto.
37782 (BASE): Add integer widening support.
37783 * config/riscv/riscv-vector-builtins-bases.h: Ditto
37784 * config/riscv/riscv-vector-builtins-functions.def (vwadd): New class.
37785 (vwsub): New class.
37786 (vwmul): New class.
37787 (vwmulu): New class.
37788 (vwmulsu): New class.
37789 (vwaddu): New class.
37790 (vwsubu): New class.
37791 (vwcvt_x): New class.
37792 (vwcvtu_x): New class.
37793 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): New
37795 (struct widen_alu_def): New class.
37796 (SHAPE): New class.
37797 * config/riscv/riscv-vector-builtins-shapes.h: New class.
37798 * config/riscv/riscv-vector-builtins.cc
37799 (rvv_arg_type_info::get_base_vector_type): Add integer widening support.
37800 (rvv_arg_type_info::get_tree_type): Ditto.
37801 * config/riscv/riscv-vector-builtins.def (x_x_v): Change into "x_v"
37803 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Add integer
37805 * config/riscv/riscv-vsetvl.cc (change_insn): Fix reg_equal use bug.
37806 * config/riscv/riscv.h (X0_REGNUM): New constant.
37807 * config/riscv/vector-iterators.md: New iterators.
37808 * config/riscv/vector.md
37809 (@pred_dual_widen_<any_widen_binop:optab><any_extend:su><mode>): New
37811 (@pred_dual_widen_<any_widen_binop:optab><any_extend:su><mode>_scalar):
37813 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>): Ditto.
37814 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>_scalar):
37816 (@pred_widen_mulsu<mode>): Ditto.
37817 (@pred_widen_mulsu<mode>_scalar): Ditto.
37818 (@pred_<optab><mode>): Ditto.
37820 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37821 kito-cheng <kito.cheng@sifive.com>
37823 * common/config/riscv/riscv-common.cc: Add flag for 'V' extension.
37824 * config/riscv/riscv-vector-builtins-bases.cc (class vmulh): New class.
37826 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
37827 * config/riscv/riscv-vector-builtins-functions.def (vmulh): Add vmulh
37831 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_FULL_V_I_OPS):
37833 (DEF_RVV_FULL_V_U_OPS): Ditto.
37834 (vint8mf8_t): Ditto.
37835 (vint8mf4_t): Ditto.
37836 (vint8mf2_t): Ditto.
37837 (vint8m1_t): Ditto.
37838 (vint8m2_t): Ditto.
37839 (vint8m4_t): Ditto.
37840 (vint8m8_t): Ditto.
37841 (vint16mf4_t): Ditto.
37842 (vint16mf2_t): Ditto.
37843 (vint16m1_t): Ditto.
37844 (vint16m2_t): Ditto.
37845 (vint16m4_t): Ditto.
37846 (vint16m8_t): Ditto.
37847 (vint32mf2_t): Ditto.
37848 (vint32m1_t): Ditto.
37849 (vint32m2_t): Ditto.
37850 (vint32m4_t): Ditto.
37851 (vint32m8_t): Ditto.
37852 (vint64m1_t): Ditto.
37853 (vint64m2_t): Ditto.
37854 (vint64m4_t): Ditto.
37855 (vint64m8_t): Ditto.
37856 (vuint8mf8_t): Ditto.
37857 (vuint8mf4_t): Ditto.
37858 (vuint8mf2_t): Ditto.
37859 (vuint8m1_t): Ditto.
37860 (vuint8m2_t): Ditto.
37861 (vuint8m4_t): Ditto.
37862 (vuint8m8_t): Ditto.
37863 (vuint16mf4_t): Ditto.
37864 (vuint16mf2_t): Ditto.
37865 (vuint16m1_t): Ditto.
37866 (vuint16m2_t): Ditto.
37867 (vuint16m4_t): Ditto.
37868 (vuint16m8_t): Ditto.
37869 (vuint32mf2_t): Ditto.
37870 (vuint32m1_t): Ditto.
37871 (vuint32m2_t): Ditto.
37872 (vuint32m4_t): Ditto.
37873 (vuint32m8_t): Ditto.
37874 (vuint64m1_t): Ditto.
37875 (vuint64m2_t): Ditto.
37876 (vuint64m4_t): Ditto.
37877 (vuint64m8_t): Ditto.
37878 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_FULL_V_I_OPS): Ditto.
37879 (DEF_RVV_FULL_V_U_OPS): Ditto.
37880 (check_required_extensions): Add vmulh support.
37881 (rvv_arg_type_info::get_tree_type): Ditto.
37882 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_FULL_V): Ditto.
37883 (enum rvv_base_type): Ditto.
37884 * config/riscv/riscv.opt: Add 'V' extension flag.
37885 * config/riscv/vector-iterators.md (su): New iterator.
37886 * config/riscv/vector.md (@pred_mulh<v_su><mode>): New pattern.
37887 (@pred_mulh<v_su><mode>_scalar): Ditto.
37888 (*pred_mulh<v_su><mode>_scalar): Ditto.
37889 (*pred_mulh<v_su><mode>_extended_scalar): Ditto.
37891 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37893 * config/riscv/iterators.md: Add sign_extend/zero_extend.
37894 * config/riscv/riscv-vector-builtins-bases.cc (class ext): New class.
37896 * config/riscv/riscv-vector-builtins-bases.h: Add vsext/vzext support.
37897 * config/riscv/riscv-vector-builtins-functions.def (vsext): New macro
37900 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Adjust
37901 for vsext/vzext support.
37902 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WEXTI_OPS): New
37904 (DEF_RVV_QEXTI_OPS): Ditto.
37905 (DEF_RVV_OEXTI_OPS): Ditto.
37906 (DEF_RVV_WEXTU_OPS): Ditto.
37907 (DEF_RVV_QEXTU_OPS): Ditto.
37908 (DEF_RVV_OEXTU_OPS): Ditto.
37909 (vint16mf4_t): Ditto.
37910 (vint16mf2_t): Ditto.
37911 (vint16m1_t): Ditto.
37912 (vint16m2_t): Ditto.
37913 (vint16m4_t): Ditto.
37914 (vint16m8_t): Ditto.
37915 (vint32mf2_t): Ditto.
37916 (vint32m1_t): Ditto.
37917 (vint32m2_t): Ditto.
37918 (vint32m4_t): Ditto.
37919 (vint32m8_t): Ditto.
37920 (vint64m1_t): Ditto.
37921 (vint64m2_t): Ditto.
37922 (vint64m4_t): Ditto.
37923 (vint64m8_t): Ditto.
37924 (vuint16mf4_t): Ditto.
37925 (vuint16mf2_t): Ditto.
37926 (vuint16m1_t): Ditto.
37927 (vuint16m2_t): Ditto.
37928 (vuint16m4_t): Ditto.
37929 (vuint16m8_t): Ditto.
37930 (vuint32mf2_t): Ditto.
37931 (vuint32m1_t): Ditto.
37932 (vuint32m2_t): Ditto.
37933 (vuint32m4_t): Ditto.
37934 (vuint32m8_t): Ditto.
37935 (vuint64m1_t): Ditto.
37936 (vuint64m2_t): Ditto.
37937 (vuint64m4_t): Ditto.
37938 (vuint64m8_t): Ditto.
37939 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WEXTI_OPS): Ditto.
37940 (DEF_RVV_QEXTI_OPS): Ditto.
37941 (DEF_RVV_OEXTI_OPS): Ditto.
37942 (DEF_RVV_WEXTU_OPS): Ditto.
37943 (DEF_RVV_QEXTU_OPS): Ditto.
37944 (DEF_RVV_OEXTU_OPS): Ditto.
37945 (rvv_arg_type_info::get_base_vector_type): Add sign_exted/zero_extend
37947 (rvv_arg_type_info::get_tree_type): Ditto.
37948 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
37949 * config/riscv/vector-iterators.md (z): New attribute.
37950 * config/riscv/vector.md (@pred_<optab><mode>_vf2): New pattern.
37951 (@pred_<optab><mode>_vf4): Ditto.
37952 (@pred_<optab><mode>_vf8): Ditto.
37954 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37956 * config/riscv/iterators.md: Add saturating Addition && Subtraction.
37957 * config/riscv/riscv-v.cc (has_vi_variant_p): Ditto.
37958 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Ditto.
37959 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
37960 * config/riscv/riscv-vector-builtins-functions.def (vsadd): New def.
37964 * config/riscv/vector-iterators.md (sll.vi): Adjust for Saturating
37969 * config/riscv/vector.md (@pred_<optab><mode>): New pattern.
37970 (@pred_<optab><mode>_scalar): New pattern.
37971 (*pred_<optab><mode>_scalar): New pattern.
37972 (*pred_<optab><mode>_extended_scalar): New pattern.
37974 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37976 * config/riscv/iterators.md: Add neg and not.
37977 * config/riscv/riscv-vector-builtins-bases.cc (class unop): New class.
37979 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
37980 * config/riscv/riscv-vector-builtins-functions.def (vadd): Rename binop
38001 * config/riscv/riscv-vector-builtins-shapes.cc (struct binop_def): Ditto.
38002 (struct alu_def): Ditto.
38004 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
38005 * config/riscv/riscv-vector-builtins.cc: Support unary C/C/++.
38006 * config/riscv/vector-iterators.md: New iterator.
38007 * config/riscv/vector.md (@pred_<optab><mode>): New pattern
38009 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38011 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::compute_probabilities): Skip exit block.
38013 2023-02-11 Jakub Jelinek <jakub@redhat.com>
38016 * ipa-cp.cc (ipa_agg_value_from_jfunc): Return NULL_TREE also if
38017 item->offset bit position is too large to be representable as
38018 unsigned int byte position.
38020 2023-02-11 Gerald Pfeifer <gerald@pfeifer.com>
38022 * doc/extend.texi (Other Builtins): Adjust link to WG14 N965.
38024 2023-02-10 Vladimir N. Makarov <vmakarov@redhat.com>
38026 * ira.cc (update_equiv_regs): Set up ira_reg_equiv for
38027 valid_combine only when ira_use_lra_p is true.
38029 2023-02-10 Vladimir N. Makarov <vmakarov@redhat.com>
38031 * params.opt (ira-simple-lra-insn-threshold): Add new param.
38032 * ira.cc (ira): Use the param to switch on simple LRA.
38034 2023-02-10 Andrew MacLeod <amacleod@redhat.com>
38036 PR tree-optimization/108687
38037 * gimple-range-cache.cc (ranger_cache::range_on_edge): Revert
38038 back to RFD_NONE mode for calculations.
38039 (ranger_cache::propagate_cache): Call the internal edge range API
38040 with RFD_READ_ONLY instead of changing the external routine.
38042 2023-02-10 Andrew MacLeod <amacleod@redhat.com>
38044 PR tree-optimization/108520
38045 * gimple-range-infer.cc (check_assume_func): Invoke
38046 gimple_range_global directly instead using global_range_query.
38047 * value-query.cc (get_range_global): Add function context and
38048 avoid calling nonnull_arg_p if not cfun.
38049 (gimple_range_global): Add function context pointer.
38050 * value-query.h (imple_range_global): Add function context.
38052 2023-02-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38054 * config/riscv/constraints.md (Wdm): Adjust constraint.
38055 (Wbr): New constraint.
38056 * config/riscv/predicates.md (reg_or_int_operand): New predicate.
38057 * config/riscv/riscv-protos.h (emit_pred_op): Remove function.
38058 (emit_vlmax_op): New function.
38059 (emit_nonvlmax_op): Ditto.
38061 (neg_simm5_p): Ditto.
38062 (has_vi_variant_p): Ditto.
38063 * config/riscv/riscv-v.cc (emit_pred_op): Adjust function.
38064 (emit_vlmax_op): New function.
38065 (emit_nonvlmax_op): Ditto.
38066 (expand_const_vector): Adjust function.
38067 (legitimize_move): Ditto.
38068 (simm32_p): New function.
38070 (neg_simm5_p): Ditto.
38071 (has_vi_variant_p): Ditto.
38072 * config/riscv/riscv-vector-builtins-bases.cc (class vrsub): New class.
38074 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
38075 * config/riscv/riscv-vector-builtins-functions.def (vmin): Remove
38078 (vminu): Remove signed cases.
38080 (vdiv): Remove unsigned cases.
38082 (vdivu): Remove signed cases.
38086 (vrsub): New class.
38091 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_U_OPS): New macro.
38092 * config/riscv/riscv.h: change VL/VTYPE as fixed reg.
38093 * config/riscv/vector-iterators.md: New iterators.
38094 * config/riscv/vector.md (@pred_broadcast<mode>): Adjust pattern for vx
38096 (@pred_<optab><mode>_scalar): New pattern.
38097 (@pred_sub<mode>_reverse_scalar): Ditto.
38098 (*pred_<optab><mode>_scalar): Ditto.
38099 (*pred_<optab><mode>_extended_scalar): Ditto.
38100 (*pred_sub<mode>_reverse_scalar): Ditto.
38101 (*pred_sub<mode>_extended_reverse_scalar): Ditto.
38103 2023-02-10 Richard Biener <rguenther@suse.de>
38105 PR tree-optimization/108724
38106 * tree-vect-stmts.cc (vectorizable_operation): Avoid
38107 using word_mode vectors when vector lowering will
38108 decompose them to elementwise operations.
38110 2023-02-10 Jakub Jelinek <jakub@redhat.com>
38113 2023-02-09 Martin Liska <mliska@suse.cz>
38116 * doc/extend.texi: Document that the function
38117 does not work correctly for old VIA processors.
38119 2023-02-10 Andrew Pinski <apinski@marvell.com>
38120 Andrew Macleod <amacleod@redhat.com>
38122 PR tree-optimization/108684
38123 * tree-ssa-dce.cc (simple_dce_from_worklist):
38124 Check all ssa names and not just non-vdef ones
38125 before accepting the inline-asm.
38126 Call unlink_stmt_vdef on the statement before
38129 2023-02-09 Vladimir N. Makarov <vmakarov@redhat.com>
38131 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
38132 * ira.cc (validate_equiv_mem): Check memref address variance.
38133 (no_equiv): Clear caller_save_p flag.
38134 (update_equiv_regs): Define caller save equivalence for
38136 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
38137 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
38138 call_save_p. Use caller save equivalence depending on the arg.
38139 (split_reg): Adjust the call.
38141 2023-02-09 Jakub Jelinek <jakub@redhat.com>
38144 * common/config/i386/cpuinfo.h (get_zhaoxin_cpu): Formatting fixes.
38145 (cpu_indicator_init): Call get_available_features for all CPUs with
38146 max_level >= 1, rather than just Intel, AMD or Zhaoxin. Formatting
38149 2023-02-09 Jakub Jelinek <jakub@redhat.com>
38151 PR tree-optimization/108688
38152 * match.pd (bit_field_ref [bit_insert]): Simplify BIT_FIELD_REF
38153 of BIT_INSERT_EXPR extracting exactly all inserted bits even
38154 when without mode precision. Formatting fixes.
38156 2023-02-09 Andrew Pinski <apinski@marvell.com>
38158 PR tree-optimization/108688
38159 * match.pd (bit_field_ref [bit_insert]): Avoid generating
38160 BIT_FIELD_REFs of non-mode-precision integral operands.
38162 2023-02-09 Martin Liska <mliska@suse.cz>
38165 * doc/extend.texi: Document that the function
38166 does not work correctly for old VIA processors.
38168 2023-02-09 Andreas Schwab <schwab@suse.de>
38170 * lto-wrapper.cc (merge_and_complain): Handle
38171 -funwind-tables and -fasynchronous-unwind-tables.
38172 (append_compiler_options): Likewise.
38174 2023-02-09 Richard Biener <rguenther@suse.de>
38176 PR tree-optimization/26854
38177 * tree-into-ssa.cc (update_ssa): Turn blocks_to_update to tree
38178 view around insert_updated_phi_nodes_for.
38179 * tree-ssa-alias.cc (maybe_skip_until): Allocate visited bitmap
38181 (walk_aliased_vdefs_1): Likewise.
38183 2023-02-08 Gerald Pfeifer <gerald@pfeifer.com>
38185 * doc/include/gpl_v3.texi: Change fsf.org to www.fsf.org.
38187 2023-02-08 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
38190 * config.gcc (tm_mlib_file): Define new variable.
38192 2023-02-08 Jakub Jelinek <jakub@redhat.com>
38194 PR tree-optimization/108692
38195 * tree-vect-patterns.cc (vect_widened_op_tree): If rhs_code is
38196 widened_code which is different from code, don't call
38197 vect_look_through_possible_promotion but instead just check op is
38198 SSA_NAME with integral type for which vect_is_simple_use is true
38199 and call set_op on this_unprom.
38201 2023-02-08 Andrea Corallo <andrea.corallo@arm.com>
38203 * config/aarch64/aarch64-protos.h (aarch_ra_sign_key): Remove
38205 * config/aarch64/aarch64.cc (aarch_ra_sign_key): Remove
38207 * config/aarch64/aarch64.opt (aarch64_ra_sign_key): Rename
38208 to 'aarch_ra_sign_key'.
38209 * config/arm/aarch-common.cc (aarch_ra_sign_key): Remove
38211 * config/arm/arm-protos.h (aarch_ra_sign_key): Likewise.
38212 * config/arm/arm.cc (enum aarch_key_type): Remove definition.
38213 * config/arm/arm.opt: Define.
38215 2023-02-08 Richard Sandiford <richard.sandiford@arm.com>
38217 PR tree-optimization/108316
38218 * tree-vect-stmts.cc (get_load_store_type): When using
38219 internal functions for gather/scatter, make sure that the type
38220 of the offset argument is consistent with the offset vector type.
38222 2023-02-08 Vladimir N. Makarov <vmakarov@redhat.com>
38225 2023-02-07 Vladimir N. Makarov <vmakarov@redhat.com>
38227 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
38228 * ira.cc (validate_equiv_mem): Check memref address variance.
38229 (update_equiv_regs): Define caller save equivalence for
38231 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
38232 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
38233 call_save_p. Use caller save equivalence depending on the arg.
38234 (split_reg): Adjust the call.
38236 2023-02-08 Jakub Jelinek <jakub@redhat.com>
38238 * tree.def (SAD_EXPR): Remove outdated comment about missing
38241 2023-02-07 Marek Polacek <polacek@redhat.com>
38243 * doc/invoke.texi: Update -fchar8_t documentation.
38245 2023-02-07 Vladimir N. Makarov <vmakarov@redhat.com>
38247 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
38248 * ira.cc (validate_equiv_mem): Check memref address variance.
38249 (update_equiv_regs): Define caller save equivalence for
38251 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
38252 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
38253 call_save_p. Use caller save equivalence depending on the arg.
38254 (split_reg): Adjust the call.
38256 2023-02-07 Richard Biener <rguenther@suse.de>
38258 PR tree-optimization/26854
38259 * gimple-fold.cc (has_use_on_stmt): Look at stmt operands
38260 instead of immediate uses.
38262 2023-02-07 Jakub Jelinek <jakub@redhat.com>
38264 PR tree-optimization/106923
38265 * ipa-split.cc (execute_split_functions): Don't split returns_twice
38268 2023-02-07 Jakub Jelinek <jakub@redhat.com>
38270 PR tree-optimization/106433
38271 * cgraph.cc (set_const_flag_1): Recurse on simd clones too.
38272 (cgraph_node::set_pure_flag): Call set_pure_flag_1 on simd clones too.
38274 2023-02-07 Jan Hubicka <jh@suse.cz>
38276 * config/i386/x86-tune.def (X86_TUNE_AVX256_OPTIMAL): Turn off
38279 2023-02-06 Andrew Stubbs <ams@codesourcery.com>
38281 * config/gcn/mkoffload.cc (gcn_stack_size): New global variable.
38282 (process_asm): Create a constructor for GCN_STACK_SIZE.
38283 (main): Parse the -mstack-size option.
38285 2023-02-06 Alex Coplan <alex.coplan@arm.com>
38288 * config/aarch64/aarch64-simd.md (aarch64_bfmlal<bt>_lane<q>v4sf):
38289 Use correct constraint for operand 3.
38291 2023-02-06 Martin Jambor <mjambor@suse.cz>
38293 * ipa-sra.cc (adjust_parameter_descriptions): Fix a typo in a dump.
38295 2023-02-06 Xi Ruoyao <xry111@xry111.site>
38297 * config/loongarch/loongarch.md (bytepick_w_ashift_amount):
38298 New define_int_iterator.
38299 (bytepick_d_ashift_amount): Likewise.
38300 (bytepick_imm): New define_int_attr.
38301 (bytepick_w_lshiftrt_amount): Likewise.
38302 (bytepick_d_lshiftrt_amount): Likewise.
38303 (bytepick_w_<bytepick_imm>): New define_insn template.
38304 (bytepick_w_<bytepick_imm>_extend): Likewise.
38305 (bytepick_d_<bytepick_imm>): Likewise.
38306 (bytepick_w): Remove unused define_insn.
38307 (bytepick_d): Likewise.
38308 (UNSPEC_BYTEPICK_W): Remove unused unspec.
38309 (UNSPEC_BYTEPICK_D): Likewise.
38310 * config/loongarch/predicates.md (const_0_to_3_operand):
38311 Remove unused define_predicate.
38312 (const_0_to_7_operand): Likewise.
38314 2023-02-06 Jakub Jelinek <jakub@redhat.com>
38316 PR tree-optimization/108655
38317 * ubsan.cc (sanitize_unreachable_fn): For -funreachable-traps
38318 or -fsanitize=unreachable -fsanitize-trap=unreachable return
38319 BUILT_IN_UNREACHABLE_TRAP decl rather than BUILT_IN_TRAP.
38321 2023-02-05 Gerald Pfeifer <gerald@pfeifer.com>
38323 * doc/install.texi (Specific): Remove PW32.
38325 2023-02-03 Jakub Jelinek <jakub@redhat.com>
38327 PR tree-optimization/108647
38328 * range-op.cc (operator_equal::op1_range,
38329 operator_not_equal::op1_range): Don't test op2 bound
38330 equality if op2.undefined_p (), instead set_varying.
38331 (operator_lt::op1_range, operator_le::op1_range,
38332 operator_gt::op1_range, operator_ge::op1_range): Return false if
38333 op2.undefined_p ().
38334 (operator_lt::op2_range, operator_le::op2_range,
38335 operator_gt::op2_range, operator_ge::op2_range): Return false if
38336 op1.undefined_p ().
38338 2023-02-03 Aldy Hernandez <aldyh@redhat.com>
38340 PR tree-optimization/108639
38341 * value-range.cc (irange::legacy_equal_p): Compare nonzero bits as
38343 (irange::operator==): Same.
38345 2023-02-03 Aldy Hernandez <aldyh@redhat.com>
38347 PR tree-optimization/108647
38348 * range-op-float.cc (foperator_lt::op1_range): Handle undefined ranges.
38349 (foperator_lt::op2_range): Same.
38350 (foperator_le::op1_range): Same.
38351 (foperator_le::op2_range): Same.
38352 (foperator_gt::op1_range): Same.
38353 (foperator_gt::op2_range): Same.
38354 (foperator_ge::op1_range): Same.
38355 (foperator_ge::op2_range): Same.
38356 (foperator_unordered_lt::op1_range): Same.
38357 (foperator_unordered_lt::op2_range): Same.
38358 (foperator_unordered_le::op1_range): Same.
38359 (foperator_unordered_le::op2_range): Same.
38360 (foperator_unordered_gt::op1_range): Same.
38361 (foperator_unordered_gt::op2_range): Same.
38362 (foperator_unordered_ge::op1_range): Same.
38363 (foperator_unordered_ge::op2_range): Same.
38365 2023-02-03 Andrew MacLeod <amacleod@redhat.com>
38367 PR tree-optimization/107570
38368 * tree-vrp.cc (remove_and_update_globals): Reset SCEV.
38370 2023-02-03 Gaius Mulley <gaiusmod2@gmail.com>
38372 * doc/gm2.texi (Internals): Remove from menu.
38373 (Using): Comment out ifnohtml conditional.
38374 (Documentation): Use gcc url.
38375 (License): Node simplified.
38376 (Copying): New node. Include gpl_v3_without_node.
38377 (Contributing): Node simplified.
38378 (Internals): Commented out.
38379 (Libraries): Node simplified.
38382 (Functions): Ditto.
38384 2023-02-03 Christophe Lyon <christophe.lyon@arm.com>
38386 * config/arm/mve.md (mve_vabavq_p_<supf><mode>): Add length
38388 (mve_vqshluq_m_n_s<mode>): Likewise.
38389 (mve_vshlq_m_<supf><mode>): Likewise.
38390 (mve_vsriq_m_n_<supf><mode>): Likewise.
38391 (mve_vsubq_m_<supf><mode>): Likewise.
38393 2023-02-03 Martin Jambor <mjambor@suse.cz>
38396 * ipa-sra.cc (push_param_adjustments_for_index): Remove a size check
38397 when comparing to an IPA-CP value.
38398 (dump_list_of_param_indices): New function.
38399 (adjust_parameter_descriptions): Check for mismatching IPA-CP values.
38400 Dump removed candidates using dump_list_of_param_indices.
38401 * ipa-param-manipulation.cc
38402 (ipa_param_body_adjustments::modify_expression): Add assert checking
38403 sizes of a VIEW_CONVERT_EXPR will match.
38404 (ipa_param_body_adjustments::modify_assignment): Likewise.
38406 2023-02-03 Monk Chiang <monk.chiang@sifive.com>
38408 * config/riscv/riscv.h: Remove VL_REGS, VTYPE_REGS class.
38409 * config/riscv/riscv.cc: Ditto.
38411 2023-02-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38413 * config/riscv/vector-iterators.md (sll.vi): Fix constraint bug.
38417 * config/riscv/vector.md: Ditto.
38419 2023-02-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38421 * config/riscv/predicates.md (pmode_reg_or_uimm5_operand): New predicate.
38422 * config/riscv/riscv-vector-builtins-bases.cc: New class.
38423 * config/riscv/riscv-vector-builtins-functions.def (vsll): Ditto.
38426 * config/riscv/riscv-vector-builtins.cc: Ditto.
38427 * config/riscv/vector.md (@pred_<optab><mode>_scalar): New pattern.
38429 2023-02-02 Iain Sandoe <iain@sandoe.co.uk>
38431 * toplev.cc (toplev::main): Only print the version information header
38432 from toplevel main().
38434 2023-02-02 Paul-Antoine Arras <pa@codesourcery.com>
38436 * config/gcn/gcn-valu.md (cond_<expander><mode>): Add
38437 cond_{ashl|ashr|lshr}
38439 2023-02-02 Richard Sandiford <richard.sandiford@arm.com>
38441 PR rtl-optimization/108086
38442 * rtl-ssa/insns.h (insn_info): Make m_num_defs a full unsigned int.
38443 Adjust size-related commentary accordingly.
38445 2023-02-02 Richard Sandiford <richard.sandiford@arm.com>
38447 PR rtl-optimization/108508
38448 * rtl-ssa/accesses.cc (function_info::split_clobber_group): When
38449 the splay tree search gives the first clobber in the second group,
38450 make sure that the root of the first clobber group is updated
38451 correctly. Enter the new clobber group into the definition splay
38454 2023-02-02 Jin Ma <jinma@linux.alibaba.com>
38456 * common/config/riscv/riscv-common.cc (riscv_compute_multilib):
38457 Fix finding best match score.
38459 2023-02-02 Jakub Jelinek <jakub@redhat.com>
38462 PR rtl-optimization/108463
38464 * cselib.cc (cselib_current_insn): Move declaration earlier.
38465 (cselib_hasher::equal): For debug only locs, temporarily override
38466 cselib_current_insn to their l->setting_insn for the
38467 rtx_equal_for_cselib_1 call, so that unsuccessful comparisons don't
38468 promote some debug locs.
38469 * sched-deps.cc (sched_analyze_2) <case MEM>: For MEMs in DEBUG_INSNs
38470 when using cselib call cselib_lookup_from_insn on the address but
38471 don't substitute it.
38473 2023-02-02 Richard Biener <rguenther@suse.de>
38475 PR middle-end/108625
38476 * genmatch.cc (expr::gen_transform): Also disallow resimplification
38477 from pushing to lseq with force_leaf.
38478 (dt_simplify::gen_1): Likewise.
38480 2023-02-02 Andrew Stubbs <ams@codesourcery.com>
38482 * config/gcn/gcn-run.cc: Include libgomp-gcn.h.
38483 (struct kernargs): Replace the common content with kernargs_abi.
38484 (struct heap): Delete.
38485 (main): Read GCN_STACK_SIZE envvar.
38486 Allocate space for the device stacks.
38487 Write the new kernargs fields.
38488 * config/gcn/gcn.cc (gcn_option_override): Remove stack_size_opt.
38489 (default_requested_args): Remove PRIVATE_SEGMENT_BUFFER_ARG and
38490 PRIVATE_SEGMENT_WAVE_OFFSET_ARG.
38491 (gcn_addr_space_convert): Mask the QUEUE_PTR_ARG content.
38492 (gcn_expand_prologue): Move the TARGET_PACKED_WORK_ITEMS to the top.
38493 Set up the stacks from the values in the kernargs, not private.
38494 (gcn_expand_builtin_1): Match the stack configuration in the prologue.
38495 (gcn_hsa_declare_function_name): Turn off the private segment.
38496 (gcn_conditional_register_usage): Ensure QUEUE_PTR is fixed.
38497 * config/gcn/gcn.h (FIXED_REGISTERS): Fix the QUEUE_PTR register.
38498 * config/gcn/gcn.opt (mstack-size): Change the description.
38500 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
38503 * config/arm/arm.h (VALID_MVE_PRED_MODE): Add V2QI.
38504 * config/arm/arm.cc (thumb2_legitimate_address_p): Use HImode for
38505 addressing MVE predicate modes.
38506 (mve_bool_vec_to_const): Change to represent correct MVE predicate
38508 (arm_hard_regno_mode_ok): Use VALID_MVE_PRED_MODE instead of checking
38510 (arm_vector_mode_supported_p): Likewise.
38511 (arm_mode_to_pred_mode): Add V2QI.
38512 * config/arm/arm-builtins.cc (UNOP_PRED_UNONE_QUALIFIERS): New
38514 (UNOP_PRED_PRED_QUALIFIERS): New qualifier
38515 (BINOP_PRED_UNONE_PRED_QUALIFIERS): New qualifier.
38516 (v2qi_UP): New macro.
38517 (v4bi_UP): New macro.
38518 (v8bi_UP): New macro.
38519 (v16bi_UP): New macro.
38520 (arm_expand_builtin_args): Make it able to expand the new predicate
38522 * config/arm/arm-modes.def (V2QI): New mode.
38523 * config/arm/arm-simd-builtin-types.def (Pred1x16_t, Pred2x8_t
38524 Pred4x4_t): Remove unused predicate builtin types.
38525 * config/arm/arm_mve.h (__arm_vctp16q, __arm_vctp32q, __arm_vctp64q,
38526 __arm_vctp8q, __arm_vpnot, __arm_vctp8q_m, __arm_vctp64q_m,
38527 __arm_vctp32q_m, __arm_vctp16q_m): Use predicate modes.
38528 * config/arm/arm_mve_builtins.def (vctp16q, vctp32q, vctp64q, vctp8q,
38529 vpnot, vctp8q_m, vctp16q_m, vctp32q_m, vctp64q_m): Likewise.
38530 * config/arm/constraints.md (DB): Check for VALID_MVE_PRED_MODE instead
38531 of MODE_VECTOR_BOOL.
38532 * config/arm/iterators.md (MVE_7, MVE_7_HI): Add V2QI
38533 (MVE_VPRED): Likewise.
38534 (MVE_vpred): Add V2QI and map upper case predicate modes to lower case.
38535 (MVE_vctp): New mode attribute.
38539 * config/arm/mve.md (mve_vctp<mode1>qhi): Rename this...
38540 (mve_vctp<MVE_vctp>q<MVE_vpred>): ... to this. And use new mode
38542 (mve_vpnothi): Rename this...
38543 (mve_vpnotv16bi): ... to this.
38544 (mve_vctp<mode1>q_mhi): Rename this...
38545 (mve_vctp<MVE_vctp>q_m<MVE_vpred>):... to this.
38546 (mve_vldrdq_gather_base_z_<supf>v2di,
38547 mve_vldrdq_gather_offset_z_<supf>v2di,
38548 mve_vldrdq_gather_shifted_offset_z_<supf>v2di,
38549 mve_vstrdq_scatter_base_p_<supf>v2di,
38550 mve_vstrdq_scatter_offset_p_<supf>v2di,
38551 mve_vstrdq_scatter_offset_p_<supf>v2di_insn,
38552 mve_vstrdq_scatter_shifted_offset_p_<supf>v2di,
38553 mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn,
38554 mve_vstrdq_scatter_base_wb_p_<supf>v2di,
38555 mve_vldrdq_gather_base_wb_z_<supf>v2di,
38556 mve_vldrdq_gather_base_nowb_z_<supf>v2di,
38557 mve_vldrdq_gather_base_wb_z_<supf>v2di_insn): Use V2QI insead of HI for
38559 * config/arm/unspecs.md (VCTP8Q, VCTP16Q, VCTP32Q, VCTP64Q): Replace
38561 (VCTP): ... with this.
38562 (VCTP8Q_M, VCTP16Q_M, VCTP32Q_M, VCTP64Q_M): Replace these...
38563 (VCTP_M): ... with this.
38564 * config/arm/vfp.md (*thumb2_movhi_vfp, *thumb2_movhi_fp16): Use
38565 VALID_MVE_PRED_MODE instead of checking for MODE_VECTOR_BOOL class.
38567 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
38570 * config/arm/arm.cc (arm_hard_regno_mode_ok): Use new MACRO.
38571 (arm_modes_tieable_p): Make MVE predicate modes tieable.
38572 * config/arm/arm.h (VALID_MVE_PRED_MODE): New define.
38573 * simplify-rtx.cc (simplify_context::simplify_subreg): Teach
38574 simplify_subreg to simplify subregs where the outermode is not scalar.
38576 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
38579 * config/arm/arm-builtins.cc (arm_simd_builtin_type): Rewrite to use
38580 new qualifiers parameter and use unsigned short type for MVE predicate.
38581 (arm_init_builtin): Call arm_simd_builtin_type with qualifiers
38583 (arm_init_crypto_builtins): Likewise.
38585 2023-02-02 Jakub Jelinek <jakub@redhat.com>
38588 * builtins.def (BUILT_IN_UNREACHABLE_TRAP): New builtin.
38589 * internal-fn.def (TRAP): Remove.
38590 * internal-fn.cc (expand_TRAP): Remove.
38591 * tree.cc (build_common_builtin_nodes): Define
38592 BUILT_IN_UNREACHABLE_TRAP if not yet defined.
38593 (builtin_decl_unreachable): Use BUILT_IN_UNREACHABLE_TRAP
38594 instead of BUILT_IN_TRAP.
38595 * gimple.cc (gimple_build_builtin_unreachable): Remove
38596 emitting internal function for BUILT_IN_TRAP.
38597 * asan.cc (maybe_instrument_call): Handle BUILT_IN_UNREACHABLE_TRAP.
38598 * cgraph.cc (cgraph_edge::verify_corresponds_to_fndecl): Handle
38599 BUILT_IN_UNREACHABLE_TRAP instead of BUILT_IN_TRAP.
38600 * ipa-devirt.cc (possible_polymorphic_call_target_p): Handle
38601 BUILT_IN_UNREACHABLE_TRAP.
38602 * builtins.cc (expand_builtin, is_inexpensive_builtin): Likewise.
38603 * tree-cfg.cc (verify_gimple_call,
38604 pass_warn_function_return::execute): Likewise.
38605 * attribs.cc (decl_attributes): Don't report exclusions on
38606 BUILT_IN_UNREACHABLE_TRAP either.
38608 2023-02-02 liuhongt <hongtao.liu@intel.com>
38610 PR tree-optimization/108601
38611 * tree-vectorizer.h (vect_can_peel_nonlinear_iv_p): Removed.
38612 * tree-vect-loop.cc
38613 (vectorizable_nonlinear_induction): Remove
38614 vect_can_peel_nonlinear_iv_p.
38615 (vect_can_peel_nonlinear_iv_p): Don't peel
38616 nonlinear iv(mult or shift) for epilog when vf is not
38617 constant and moved the defination to ..
38618 * tree-vect-loop-manip.cc (vect_can_peel_nonlinear_iv_p):
38621 2023-02-02 Jakub Jelinek <jakub@redhat.com>
38623 PR middle-end/108435
38624 * tree-nested.cc (convert_nonlocal_omp_clauses)
38625 <case OMP_CLAUSE_LASTPRIVATE>: If info->new_local_var_chain and *seq
38626 is not a GIMPLE_BIND, wrap the sequence into a new GIMPLE_BIND
38627 before calling declare_vars.
38628 (convert_nonlocal_omp_clauses) <case OMP_CLAUSE_LINEAR>: Merge
38629 with the OMP_CLAUSE_LASTPRIVATE handling except for whether
38630 seq is initialized to &OMP_CLAUSE_LASTPRIVATE_GIMPLE_SEQ (clause)
38631 or &OMP_CLAUSE_LINEAR_GIMPLE_SEQ (clause).
38633 2023-02-01 Tamar Christina <tamar.christina@arm.com>
38635 * common/config/aarch64/aarch64-common.cc
38636 (struct aarch64_option_extension): Add native_detect and document struct
38638 (all_extensions): Set new field native_detect.
38639 * config/aarch64/aarch64.cc (struct aarch64_option_extension): Delete
38642 2023-02-01 Martin Liska <mliska@suse.cz>
38644 * ipa-devirt.cc (odr_types_equivalent_p): Respect *warned
38647 2023-02-01 Andrew MacLeod <amacleod@redhat.com>
38649 PR tree-optimization/108356
38650 * gimple-range-cache.cc (ranger_cache::range_on_edge): Always
38651 do a search of the DOM tree for a range.
38653 2023-02-01 Martin Liska <mliska@suse.cz>
38656 * cgraphunit.cc (walk_polymorphic_call_targets): Insert
38657 ony non-null values.
38658 * ipa.cc (walk_polymorphic_call_targets): Likewise.
38660 2023-02-01 Martin Liska <mliska@suse.cz>
38663 * gcc.cc (LINK_COMPRESS_DEBUG_SPEC): Report error only for
38666 2023-02-01 Jakub Jelinek <jakub@redhat.com>
38669 * ree.cc (combine_reaching_defs): Don't return false for paradoxical
38670 subregs in DEBUG_INSNs.
38672 2023-02-01 Richard Sandiford <richard.sandiford@arm.com>
38674 * compare-elim.cc (find_flags_uses_in_insn): Guard use of SET_SRC.
38676 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
38678 * config/s390/s390.cc (s390_restore_gpr_p): New function.
38679 (s390_preserve_gpr_arg_in_range_p): New function.
38680 (s390_preserve_gpr_arg_p): New function.
38681 (s390_preserve_fpr_arg_p): New function.
38682 (s390_register_info_stdarg_fpr): Rename to ...
38683 (s390_register_info_arg_fpr): ... this. Add -mpreserve-args handling.
38684 (s390_register_info_stdarg_gpr): Rename to ...
38685 (s390_register_info_arg_gpr): ... this. Add -mpreserve-args handling.
38686 (s390_register_info): Use the renamed functions above.
38687 (s390_optimize_register_info): Likewise.
38688 (save_fpr): Generate CFI for -mpreserve-args.
38689 (save_gprs): Generate CFI for -mpreserve-args. Drop return value.
38690 (s390_emit_prologue): Adjust to changed calling convention of save_gprs.
38691 (s390_optimize_prologue): Likewise.
38692 * config/s390/s390.opt: New option -mpreserve-args
38694 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
38696 * config/s390/s390.cc (save_gprs): Use gen_frame_mem.
38697 (restore_gprs): Likewise.
38698 (s390_emit_stack_tie): Make the stack_tie to be dependent on the
38699 frame pointer if a frame-pointer is used.
38700 (s390_emit_prologue): Emit stack_tie when frame-pointer is needed.
38701 * config/s390/s390.md (stack_tie): Add a register operand and
38703 (@stack_tie<mode>): ... this.
38705 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
38707 * dwarf2cfi.cc (dwarf2out_frame_debug_cfa_restore): Add
38708 EMIT_CFI parameter.
38709 (dwarf2out_frame_debug): Add case for REG_CFA_NORESTORE.
38710 * reg-notes.def (REG_CFA_NOTE): New reg note definition.
38712 2023-02-01 Richard Biener <rguenther@suse.de>
38714 PR middle-end/108500
38715 * dominance.cc (assign_dfs_numbers): Replace recursive DFS
38716 with tree traversal algorithm.
38718 2023-02-01 Jason Merrill <jason@redhat.com>
38720 * doc/invoke.texi: Document -Wno-changes-meaning.
38722 2023-02-01 David Malcolm <dmalcolm@redhat.com>
38724 * doc/invoke.texi (Static Analyzer Options): Add notes about
38725 limitations of -fanalyzer.
38727 2023-01-31 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38729 * config/riscv/constraints.md (vj): New.
38731 * config/riscv/iterators.md: Add more opcode.
38732 * config/riscv/predicates.md (vector_arith_operand): New.
38733 (vector_neg_arith_operand): New.
38734 (vector_shift_operand): New.
38735 * config/riscv/riscv-vector-builtins-bases.cc (class binop): New.
38736 * config/riscv/riscv-vector-builtins-bases.h: (vadd): New.
38753 * config/riscv/riscv-vector-builtins-functions.def (vadd): New.
38770 * config/riscv/riscv-vector-builtins-shapes.cc (struct binop_def): New.
38771 * config/riscv/riscv-vector-builtins-shapes.h (binop): New.
38772 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_I_OPS): New.
38773 (DEF_RVV_U_OPS): New.
38774 (rvv_arg_type_info::get_base_vector_type): Handle
38775 RVV_BASE_shift_vector.
38776 (rvv_arg_type_info::get_tree_type): Ditto.
38777 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Add
38778 RVV_BASE_shift_vector.
38779 * config/riscv/riscv.cc (riscv_print_operand): Handle 'V'.
38780 * config/riscv/vector-iterators.md: Handle more opcode.
38781 * config/riscv/vector.md (@pred_<optab><mode>): New.
38783 2023-01-31 Philipp Tomsich <philipp.tomsich@vrull.eu>
38786 * config/aarch64/aarch64.cc (aarch_macro_fusion_pair_p): Check
38789 2023-01-31 Richard Sandiford <richard.sandiford@arm.com>
38791 PR tree-optimization/108608
38792 * tree-vect-loop.cc (vect_transform_reduction): Handle single
38793 def-use cycles that involve function calls rather than tree codes.
38795 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
38797 PR tree-optimization/108385
38798 * gimple-range-gori.cc (gori_compute::compute_operand_range):
38799 Allow VARYING computations to continue if there is a relation.
38800 * range-op.cc (pointer_plus_operator::op2_range): New.
38802 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
38804 PR tree-optimization/108359
38805 * range-op.cc (range_operator::wi_fold_in_parts_equiv): New.
38806 (range_operator::fold_range): If op1 is equivalent to op2 then
38807 invoke new fold_in_parts_equiv to operate on sub-components.
38808 * range-op.h (wi_fold_in_parts_equiv): New prototype.
38810 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
38812 * gimple-range-gori.cc (gori_compute::compute_operand_range): Do
38813 not abort calculations if there is a valid relation available.
38814 (gori_compute::refine_using_relation): Pass correct relation trio.
38815 (gori_compute::compute_operand1_range): Create trio and use it.
38816 (gori_compute::compute_operand2_range): Ditto.
38817 * range-op.cc (operator_plus::op1_range): Use correct trio member.
38818 (operator_minus::op1_range): Use correct trio member.
38819 * value-relation.cc (value_relation::create_trio): New.
38820 * value-relation.h (value_relation::create_trio): New prototype.
38822 2023-01-31 Jakub Jelinek <jakub@redhat.com>
38825 * config/i386/i386-expand.cc
38826 (ix86_convert_const_wide_int_to_broadcast): Return nullptr if
38827 CONST_WIDE_INT_NUNITS (op) times HOST_BITS_PER_WIDE_INT isn't
38828 equal to bitsize of mode.
38830 2023-01-31 Jakub Jelinek <jakub@redhat.com>
38832 PR rtl-optimization/108596
38833 * bb-reorder.cc (fix_up_fall_thru_edges): Handle the case where cur_bb
38834 ends with asm goto and has a crossing fallthrough edge to the same bb
38835 that contains at least one of its labels by restoring EDGE_CROSSING
38836 flag even on possible edge from cur_bb to new_bb successor.
38838 2023-01-31 Jakub Jelinek <jakub@redhat.com>
38841 * config/i386/avx512erintrin.h (_mm512_exp2a23_round_pd,
38842 _mm512_exp2a23_round_ps, _mm512_rcp28_round_pd, _mm512_rcp28_round_ps,
38843 _mm512_rsqrt28_round_pd, _mm512_rsqrt28_round_ps): Use
38844 _mm512_undefined_pd () or _mm512_undefined_ps () instead of using
38845 uninitialized automatic variable __W.
38847 2023-01-31 Gerald Pfeifer <gerald@pfeifer.com>
38849 * doc/include/fdl.texi: Change fsf.org to www.fsf.org.
38851 2023-01-30 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38853 * config/riscv/riscv-protos.h (get_vector_mode): New function.
38854 * config/riscv/riscv-v.cc (get_vector_mode): Ditto.
38855 * config/riscv/riscv-vector-builtins-bases.cc (enum lst_type): New enum.
38856 (class loadstore): Adjust for indexed loads/stores support.
38858 * config/riscv/riscv-vector-builtins-bases.h: New function declare.
38859 * config/riscv/riscv-vector-builtins-functions.def (vluxei8): Ditto.
38875 * config/riscv/riscv-vector-builtins-shapes.cc
38876 (struct indexed_loadstore_def): New class.
38878 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
38879 * config/riscv/riscv-vector-builtins.cc (required_extensions_p): Adjust
38880 for indexed loads/stores support.
38881 (check_required_extensions): Ditto.
38882 (rvv_arg_type_info::get_base_vector_type): New function.
38883 (rvv_arg_type_info::get_tree_type): Ditto.
38884 (function_builder::add_unique_function): Adjust for indexed loads/stores
38886 (function_expander::use_exact_insn): New function.
38887 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Adjust for
38888 indexed loads/stores support.
38889 (struct rvv_arg_type_info): Ditto.
38890 (function_expander::index_mode): New function.
38891 (function_base::apply_tail_policy_p): Ditto.
38892 (function_base::apply_mask_policy_p): Ditto.
38893 * config/riscv/vector-iterators.md (unspec): New unspec.
38894 * config/riscv/vector.md (unspec): Ditto.
38895 (@pred_indexed_<order>load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): New
38897 (@pred_indexed_<order>store<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Ditto.
38898 (@pred_indexed_<order>load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
38899 (@pred_indexed_<order>store<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
38900 (@pred_indexed_<order>load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
38901 (@pred_indexed_<order>store<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
38902 (@pred_indexed_<order>load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
38903 (@pred_indexed_<order>store<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
38904 (@pred_indexed_<order>load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
38905 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
38906 (@pred_indexed_<order>load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
38907 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
38908 (@pred_indexed_<order>load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
38909 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
38911 2023-01-30 Flavio Cruz <flaviocruz@gmail.com>
38913 * config.gcc: Recognize x86_64-*-gnu* targets and include
38915 * config/i386/gnu64.h: Define configuration for new target
38916 including ld.so location.
38918 2023-01-30 Philipp Tomsich <philipp.tomsich@vrull.eu>
38920 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Update
38921 ampere1a to include SM4.
38923 2023-01-30 Andrew Pinski <apinski@marvell.com>
38925 PR tree-optimization/108582
38926 * tree-ssa-phiopt.cc (match_simplify_replacement): Add check
38927 for middlebb to have no phi nodes.
38929 2023-01-30 Richard Biener <rguenther@suse.de>
38931 PR tree-optimization/108574
38932 * tree-ssa-sccvn.cc (visit_phi): Instead of swapping
38933 sameval and def, ignore the equivalence if there's the
38934 danger of oscillating between two values.
38936 2023-01-30 Andreas Schwab <schwab@suse.de>
38938 * common/config/riscv/riscv-common.cc
38939 (riscv_option_optimization_table)
38940 [TARGET_DEFAULT_ASYNC_UNWIND_TABLES]: Enable
38941 -fasynchronous-unwind-tables and -funwind-tables.
38942 * config.gcc (riscv*-*-linux*): Define
38943 TARGET_DEFAULT_ASYNC_UNWIND_TABLES.
38945 2023-01-30 YunQiang Su <yunqiang.su@cipunited.com>
38947 * Makefile.in (CROSS_SYSTEM_HEADER_DIR): set according the
38948 value of includedir.
38950 2023-01-30 Richard Biener <rguenther@suse.de>
38953 * cgraph.cc (possibly_call_in_translation_unit_p): Relax
38956 2023-01-30 liuhongt <hongtao.liu@intel.com>
38958 * config/i386/i386.opt: Change AVX512FP16 to AVX512-FP16.
38959 * doc/invoke.texi: Ditto.
38961 2023-01-29 Jan Hubicka <hubicka@ucw.cz>
38963 * ipa-utils.cc: Include calls.h, cfgloop.h and cfganal.h
38964 (stmt_may_terminate_function_p): If assuming return or EH
38965 volatile asm is safe.
38966 (find_always_executed_bbs): Fix handling of terminating BBS and
38967 infinite loops; add debug output.
38968 * tree-ssa-alias.cc (stmt_kills_ref_p): Fix debug output
38970 2023-01-28 Philipp Tomsich <philipp.tomsich@vrull.eu>
38972 * config/aarch64/aarch64.cc (aarch64_uxt_size): fix an
38973 off-by-one in checking the permissible shift-amount.
38975 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
38977 * doc/extend.texi (Named Address Spaces): Update link to the
38980 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
38982 * doc/standards.texi (Standards): Fix markup.
38984 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
38986 * doc/standards.texi (Standards): Update link to Objective-C book.
38988 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
38990 * doc/invoke.texi (Instrumentation Options): Update reference to
38993 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
38995 * doc/standards.texi: Update Go1 link.
38997 2023-01-28 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38999 * config/riscv/predicates.md (pmode_reg_or_0_operand): New predicate.
39000 * config/riscv/riscv-vector-builtins-bases.cc (class loadstore):
39003 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
39004 * config/riscv/riscv-vector-builtins-functions.def (vlse): New class.
39006 * config/riscv/riscv-vector-builtins.cc
39007 (function_expander::use_contiguous_load_insn): Support vlse/vsse.
39008 * config/riscv/vector.md (@pred_strided_load<mode>): New md pattern.
39009 (@pred_strided_store<mode>): Ditto.
39011 2023-01-28 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39013 * config/riscv/vector.md (tail_policy_op_idx): Remove.
39014 (mask_policy_op_idx): Remove.
39015 (avl_type_op_idx): Remove.
39017 2023-01-27 Richard Sandiford <richard.sandiford@arm.com>
39019 PR tree-optimization/96373
39020 * tree.h (sign_mask_for): Declare.
39021 * tree.cc (sign_mask_for): New function.
39022 (signed_or_unsigned_type_for): For vector types, try to use the
39023 related_int_vector_mode.
39024 * genmatch.cc (commutative_op): Handle conditional internal functions.
39025 * match.pd: Fold an IFN_COND_MUL+copysign into an IFN_COND_XOR+and.
39027 2023-01-27 Richard Sandiford <richard.sandiford@arm.com>
39029 * tree-vectorizer.cc (vector_costs::compare_inside_loop_cost):
39030 Use the likely minimum VF when bounding the denominators to
39031 the estimated number of iterations.
39033 2023-01-27 Richard Biener <rguenther@suse.de>
39036 * doc/invoke.texi (-shared): Clarify effect on -ffast-math
39037 and -Ofast FP environment side-effects.
39039 2023-01-27 Richard Biener <rguenther@suse.de>
39042 * config/mips/gnu-user.h (GNU_USER_TARGET_MATHFILE_SPEC):
39043 Don't add crtfastmath.o for -shared.
39045 2023-01-27 Richard Biener <rguenther@suse.de>
39048 * config/ia64/linux.h (ENDFILE_SPEC): Don't add crtfastmath.o
39051 2023-01-27 Richard Biener <rguenther@suse.de>
39054 * config/alpha/linux.h (ENDFILE_SPEC): Don't add
39055 crtfastmath.o for -shared.
39057 2023-01-27 Andrew MacLeod <amacleod@redhat.com>
39059 PR tree-optimization/108306
39060 * range-op.cc (operator_lshift::fold_range): Return [0, 0] not
39061 varying for shifts that are always out of void range.
39062 (operator_rshift::fold_range): Return [0, 0] not
39063 varying for shifts that are always out of void range.
39065 2023-01-27 Andrew MacLeod <amacleod@redhat.com>
39067 PR tree-optimization/108447
39068 * gimple-range-fold.cc (old_using_range::relation_fold_and_or):
39069 Do not attempt to fold HONOR_NAN types.
39071 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39073 * config/riscv/riscv-vector-builtins-shapes.cc (struct loadstore_def):
39074 Remove _m suffix for "vop_m" C++ overloaded API name.
39076 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39078 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Add vlm/vsm support.
39079 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
39080 * config/riscv/riscv-vector-builtins-functions.def (vlm): New define.
39082 * config/riscv/riscv-vector-builtins-shapes.cc (struct loadstore_def): Add vlm/vsm support.
39083 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_B_OPS): Ditto.
39084 (vbool64_t): Ditto.
39085 (vbool32_t): Ditto.
39086 (vbool16_t): Ditto.
39091 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_B_OPS): Ditto.
39092 (rvv_arg_type_info::get_tree_type): Ditto.
39093 (function_expander::use_contiguous_load_insn): Ditto.
39094 * config/riscv/vector.md (@pred_store<mode>): Ditto.
39096 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39098 * config/riscv/riscv-vsetvl.cc (vsetvl_insn_p): Add condition to avoid ICE.
39099 (vsetvl_discard_result_insn_p): New function.
39100 (reg_killed_by_bb_p): rename to find_reg_killed_by.
39101 (find_reg_killed_by): New name.
39102 (get_vl): allow it to be called by more functions.
39103 (has_vsetvl_killed_avl_p): Add condition.
39104 (get_avl): allow it to be called by more functions.
39105 (insn_should_be_added_p): New function.
39106 (get_all_nonphi_defs): Refine function.
39107 (get_all_sets): Ditto.
39108 (get_same_bb_set): New function.
39109 (any_insn_in_bb_p): Ditto.
39110 (any_set_in_bb_p): Ditto.
39111 (get_vl_vtype_info): Add VLMAX forward optimization.
39112 (source_equal_p): Fix issues.
39113 (extract_single_source): Refine.
39114 (avl_info::multiple_source_equal_p): New function.
39115 (avl_info::operator==): Adjust for final version.
39116 (vl_vtype_info::operator==): Ditto.
39117 (vl_vtype_info::same_avl_p): Ditto.
39118 (vector_insn_info::parse_insn): Ditto.
39119 (vector_insn_info::available_p): New function.
39120 (vector_insn_info::merge): Adjust for final version.
39121 (vector_insn_info::dump): Add hard_empty.
39122 (pass_vsetvl::hard_empty_block_p): New function.
39123 (pass_vsetvl::backward_demand_fusion): Adjust for final version.
39124 (pass_vsetvl::forward_demand_fusion): Ditto.
39125 (pass_vsetvl::demand_fusion): Ditto.
39126 (pass_vsetvl::cleanup_illegal_dirty_blocks): New function.
39127 (pass_vsetvl::compute_local_properties): Adjust for final version.
39128 (pass_vsetvl::can_refine_vsetvl_p): Ditto.
39129 (pass_vsetvl::refine_vsetvls): Ditto.
39130 (pass_vsetvl::commit_vsetvls): Ditto.
39131 (pass_vsetvl::propagate_avl): New function.
39132 (pass_vsetvl::lazy_vsetvl): Adjust for new version.
39133 * config/riscv/riscv-vsetvl.h (enum def_type): New enum.
39135 2023-01-27 Jakub Jelinek <jakub@redhat.com>
39138 * doc/extend.texi: Fix up return type of __builtin_va_arg_pack_len
39139 from size_t to int.
39141 2023-01-27 Jakub Jelinek <jakub@redhat.com>
39144 * cgraph.cc (cgraph_edge::verify_corresponds_to_fndecl): Allow
39145 redirection of calls to __builtin_trap in addition to redirection
39146 to __builtin_unreachable.
39148 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39150 * config/riscv/riscv-vsetvl.cc (before_p): Fix bug.
39152 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39154 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Refine function args.
39155 (emit_vsetvl_insn): Ditto.
39157 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39159 * config/riscv/vector.md: Fix constraints.
39161 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39163 * config/riscv/vector-iterators.md: Add TARGET_MIN_VLEN > 32 predicates.
39165 2023-01-27 Patrick Palka <ppalka@redhat.com>
39166 Jakub Jelinek <jakub@redhat.com>
39168 * tree-core.h (tree_code_type, tree_code_length): For
39169 C++17 and later, add inline keyword, otherwise don't define
39170 the arrays, but declare extern arrays.
39171 * tree.cc (tree_code_type, tree_code_length): Define these
39172 arrays for C++14 and older.
39174 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39176 * config/riscv/riscv-vsetvl.h: Change it into public.
39178 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39180 * config/riscv/riscv-passes.def (INSERT_PASS_BEFORE): Reorder VSETVL
39183 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39185 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::execute): Always call split_all_insns.
39187 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39189 * config/riscv/vector.md: Fix incorrect attributes.
39191 2023-01-27 Richard Biener <rguenther@suse.de>
39194 * config/loongarch/gnu-user.h (GNU_USER_TARGET_MATHFILE_SPEC):
39195 Don't add crtfastmath.o for -shared.
39197 2023-01-27 Alexandre Oliva <oliva@gnu.org>
39199 * doc/options.texi (option, RejectNegative): Mention that
39200 -g-started options are also implicitly negatable.
39202 2023-01-26 Kito Cheng <kito.cheng@sifive.com>
39204 * config/riscv/riscv-vector-builtins.cc (register_builtin_types):
39205 Use get_typenode_from_name to get fixed-width integer type
39207 * config/riscv/riscv-vector-builtins.def: Update define with
39208 fixed-width integer type nodes.
39210 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39212 * config/riscv/riscv-vsetvl.cc (same_bb_and_before_p): Remove it.
39213 (real_insn_and_same_bb_p): New function.
39214 (same_bb_and_after_or_equal_p): Remove it.
39215 (before_p): New function.
39216 (reg_killed_by_bb_p): Ditto.
39217 (has_vsetvl_killed_avl_p): Ditto.
39218 (get_vl): Move location so that we can call it.
39219 (anticipatable_occurrence_p): Fix issue of AVL=REG support.
39220 (available_occurrence_p): Ditto.
39221 (dominate_probability_p): Remove it.
39222 (can_backward_propagate_p): Remove it.
39223 (get_all_nonphi_defs): New function.
39224 (get_all_predecessors): Ditto.
39225 (any_insn_in_bb_p): Ditto.
39226 (insert_vsetvl): Adjust AVL REG.
39227 (source_equal_p): New function.
39228 (extract_single_source): Ditto.
39229 (avl_info::single_source_equal_p): Ditto.
39230 (avl_info::operator==): Adjust for AVL=REG.
39231 (vl_vtype_info::same_avl_p): Ditto.
39232 (vector_insn_info::set_demand_info): Remove it.
39233 (vector_insn_info::compatible_p): Adjust for AVL=REG.
39234 (vector_insn_info::compatible_avl_p): New function.
39235 (vector_insn_info::merge): Adjust AVL=REG.
39236 (vector_insn_info::dump): Ditto.
39237 (pass_vsetvl::merge_successors): Remove it.
39238 (enum fusion_type): New enum.
39239 (pass_vsetvl::get_backward_fusion_type): New function.
39240 (pass_vsetvl::backward_demand_fusion): Adjust for AVL=REG.
39241 (pass_vsetvl::forward_demand_fusion): Ditto.
39242 (pass_vsetvl::demand_fusion): Ditto.
39243 (pass_vsetvl::prune_expressions): Ditto.
39244 (pass_vsetvl::compute_local_properties): Ditto.
39245 (pass_vsetvl::cleanup_vsetvls): Ditto.
39246 (pass_vsetvl::commit_vsetvls): Ditto.
39247 (pass_vsetvl::init): Ditto.
39248 * config/riscv/riscv-vsetvl.h (enum fusion_type): New enum.
39249 (enum merge_type): New enum.
39251 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39253 * config/riscv/riscv-vsetvl.cc
39254 (vector_infos_manager::vector_infos_manager): Add probability.
39255 (vector_infos_manager::dump): Ditto.
39256 (pass_vsetvl::compute_probabilities): Ditto.
39257 * config/riscv/riscv-vsetvl.h (struct vector_block_info): Ditto.
39259 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39261 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator==): Remove dirty_pat.
39262 (vector_insn_info::merge): Ditto.
39263 (vector_insn_info::dump): Ditto.
39264 (pass_vsetvl::merge_successors): Ditto.
39265 (pass_vsetvl::backward_demand_fusion): Ditto.
39266 (pass_vsetvl::forward_demand_fusion): Ditto.
39267 (pass_vsetvl::commit_vsetvls): Ditto.
39268 * config/riscv/riscv-vsetvl.h: Ditto.
39270 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39272 * config/riscv/riscv-vsetvl.cc (add_label_notes): Rename insn to
39275 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39277 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::backward_demand_fusion): Refine codes.
39279 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39281 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::forward_demand_fusion):
39282 Add pre-check for redundant flow.
39284 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39286 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::create_bitmap_vectors): New function.
39287 (vector_infos_manager::free_bitmap_vectors): Ditto.
39288 (pass_vsetvl::pre_vsetvl): Adjust codes.
39289 * config/riscv/riscv-vsetvl.h: New function declaration.
39291 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39293 * config/riscv/riscv-vsetvl.cc (can_backward_propagate_p): Fix for null iter_bb.
39294 (vector_insn_info::set_demand_info): New function.
39295 (pass_vsetvl::emit_local_forward_vsetvls): Adjust for refinement of Phase 3.
39296 (pass_vsetvl::merge_successors): Ditto.
39297 (pass_vsetvl::compute_global_backward_infos): Ditto.
39298 (pass_vsetvl::backward_demand_fusion): Ditto.
39299 (pass_vsetvl::forward_demand_fusion): Ditto.
39300 (pass_vsetvl::demand_fusion): New function.
39301 (pass_vsetvl::lazy_vsetvl): Adjust for refinement of phase 3.
39302 * config/riscv/riscv-vsetvl.h: New function declaration.
39304 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39306 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator>=): Fix available condition.
39308 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39310 * config/riscv/riscv-vsetvl.cc (change_vsetvl_insn): New function.
39311 (pass_vsetvl::compute_global_backward_infos): Simplify codes.
39313 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39315 * config/riscv/riscv-vsetvl.cc (loop_basic_block_p): Adjust function.
39316 (backward_propagate_worthwhile_p): Fix non-worthwhile.
39318 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39320 * config/riscv/riscv-vsetvl.cc (change_insn): Adjust in_group in validate_change.
39322 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39324 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::all_same_avl_p): New function.
39325 (pass_vsetvl::can_refine_vsetvl_p): Add AVL check.
39326 (pass_vsetvl::commit_vsetvls): Ditto.
39327 * config/riscv/riscv-vsetvl.h: New function declaration.
39329 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39331 * config/riscv/vector.md:
39333 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39335 * config/riscv/riscv-vector-builtins-bases.cc (class loadstore): use
39336 pred_store for vse.
39337 * config/riscv/riscv-vector-builtins.cc
39338 (function_expander::add_mem_operand): Refine function.
39339 (function_expander::use_contiguous_load_insn): Adjust new
39341 (function_expander::use_contiguous_store_insn): Ditto.
39342 * config/riscv/riscv-vector-builtins.h: Refine function.
39343 * config/riscv/vector.md (@pred_store<mode>): New pattern.
39345 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39347 * config/riscv/riscv-vector-builtins.cc: Change to scalar pointer.
39349 2023-01-26 Marek Polacek <polacek@redhat.com>
39351 PR middle-end/108543
39352 * opts.cc (parse_sanitizer_options): Don't always clear SANITIZE_ADDRESS
39353 if it was previously set.
39355 2023-01-26 Jakub Jelinek <jakub@redhat.com>
39357 PR tree-optimization/108540
39358 * range-op-float.cc (foperator_equal::fold_range): If both op1 and op2
39359 are singletons, use range_true even if op1 != op2
39360 when one range is [-0.0, -0.0] and another [0.0, 0.0]. Similarly,
39361 even if intersection of the ranges is empty and one has
39362 zero low bound and another zero high bound, use range_true_and_false
39363 rather than range_false.
39364 (foperator_not_equal::fold_range): If both op1 and op2
39365 are singletons, use range_false even if op1 != op2
39366 when one range is [-0.0, -0.0] and another [0.0, 0.0]. Similarly,
39367 even if intersection of the ranges is empty and one has
39368 zero low bound and another zero high bound, use range_true_and_false
39369 rather than range_true.
39371 2023-01-26 Jakub Jelinek <jakub@redhat.com>
39373 * value-relation.cc (kind_string): Add const.
39374 (rr_negate_table, rr_swap_table, rr_intersect_table,
39375 rr_union_table, rr_transitive_table): Add static const, change
39376 element type from relation_kind to unsigned char.
39377 (relation_negate, relation_swap, relation_intersect, relation_union,
39378 relation_transitive): Cast rr_*_table element to relation_kind.
39379 (relation_to_code): Add static const.
39380 (relation_tests): Assert VREL_LAST is smaller than UCHAR_MAX.
39382 2023-01-26 Richard Biener <rguenther@suse.de>
39384 PR tree-optimization/108547
39385 * gimple-predicate-analysis.cc (value_sat_pred_p):
39388 2023-01-26 Siddhesh Poyarekar <siddhesh@gotplt.org>
39390 PR tree-optimization/108522
39391 * tree-object-size.cc (compute_object_offset): Make EXPR
39392 argument non-const. Call component_ref_field_offset.
39394 2023-01-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
39396 * config/aarch64/aarch64-option-extensions.def (cssc): Specify
39397 FEATURE_STRING field.
39399 2023-01-26 Gerald Pfeifer <gerald@pfeifer.com>
39401 * doc/sourcebuild.texi: Refer to projects as GCC and GDB.
39403 2023-01-25 Iain Sandoe <iain@sandoe.co.uk>
39407 * gcc.cc: Provide default specs for Modula-2 so that when the
39408 language is not built-in better diagnostics are emitted for
39409 attempts to use .mod or .m2i file extensions.
39411 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
39413 * config/arm/mve.md (mve_vqnegq_s<mode>): Fix spacing.
39415 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
39417 * config/arm/mve.md (mve_vqabsq_s<mode>): Fix spacing.
39419 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
39421 * config/arm/mve.md (mve_vnegq_f<mode>, mve_vnegq_s<mode>):
39424 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
39426 * config/arm/mve.md (@mve_vclzq_s<mode>): Fix spacing.
39428 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
39430 * config/arm/mve.md (mve_vclsq_s<mode>): Fix spacing.
39432 2023-01-25 Richard Biener <rguenther@suse.de>
39434 PR tree-optimization/108523
39435 * tree-ssa-sccvn.cc (visit_phi): Avoid using the exclusive
39436 backedge value for the result when using predication to
39439 2023-01-25 Richard Biener <rguenther@suse.de>
39441 * doc/lto.texi (Command line options): Reword and update reference
39442 to removed lto_read_all_file_options.
39444 2023-01-25 Richard Sandiford <richard.sandiford@arm.com>
39446 * config/aarch64/aarch64.md (umax<mode>3): Separate the CNT and CSSC
39449 2023-01-25 Gerald Pfeifer <gerald@pfeifer.com>
39451 * doc/contrib.texi: Add Jose E. Marchesi.
39453 2023-01-25 Jakub Jelinek <jakub@redhat.com>
39455 PR tree-optimization/108498
39456 * gimple-ssa-store-merging.cc (class store_operand_info):
39457 End coment with full stop rather than comma.
39458 (split_group): Likewise.
39459 (merged_store_group::apply_stores): Clear string_concatenation if
39460 start or end aren't on a byte boundary.
39462 2023-01-25 Siddhesh Poyarekar <siddhesh@gotplt.org>
39463 Jakub Jelinek <jakub@redhat.com>
39465 PR tree-optimization/108522
39466 * tree-object-size.cc (compute_object_offset): Use
39467 TREE_OPERAND(ref, 2) for COMPONENT_REF when available.
39469 2023-01-24 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
39471 * config/xtensa/xtensa.md:
39472 Fix exit from loops detecting references before overwriting in the
39475 2023-01-24 Vladimir N. Makarov <vmakarov@redhat.com>
39477 * lra-constraints.cc (get_hard_regno): Remove final_p arg. Always
39478 do elimination but only for hard register.
39479 (operands_match_p, uses_hard_regs_p, process_alt_operands): Adjust
39480 calls of get_hard_regno.
39482 2023-01-24 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
39484 * config/s390/s390-d.cc (s390_d_target_versions): Fix detection
39487 2023-01-24 Andre Vieira <andre.simoesdiasvieira@arm.com>
39490 * config/arm/mve.md (mve_vstrbq_p_<supf><mode>, mve_vstrhq_p_fv8hf,
39491 mve_vstrhq_p_<supf><mode>, mve_vstrwq_p_<supf>v4si): Add memory operand
39494 2023-01-24 Xianmiao Qu <cooper.qu@linux.alibaba.com>
39496 * config.gcc(csky-*-linux*): Define CSKY_ENABLE_MULTILIB
39497 and only include 'csky/t-csky-linux' when enable multilib.
39498 * config/csky/csky-linux-elf.h(SYSROOT_SUFFIX_SPEC): Don't
39499 define it when disable multilib.
39501 2023-01-24 Richard Biener <rguenther@suse.de>
39503 PR tree-optimization/108500
39504 * dominance.h (calculate_dominance_info): Add parameter
39505 to indicate fast-query compute, defaulted to true.
39506 * dominance.cc (calculate_dominance_info): Honor
39507 fast-query compute parameter.
39508 * tree-cfgcleanup.cc (cleanup_tree_cfg_noloop): Do
39509 not compute the dominator fast-query DFS numbers.
39511 2023-01-24 Eric Biggers <ebiggers@google.com>
39514 * optc-save-gen.awk: Fix copy-and-paste error.
39516 2023-01-24 Jakub Jelinek <jakub@redhat.com>
39519 * cgraphbuild.cc: Include gimplify.h.
39520 (record_reference): Replace VAR_DECLs with DECL_HAS_VALUE_EXPR_P with
39521 their corresponding DECL_VALUE_EXPR expressions after unsharing.
39523 2023-01-24 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
39526 * config.gcc (tm_file): Move the variable out of loop.
39528 2023-01-24 Lulu Cheng <chenglulu@loongson.cn>
39529 Yang Yujie <yangyujie@loongson.cn>
39532 * config/loongarch/loongarch.cc (loongarch_classify_address):
39533 Add precessint for CONST_INT.
39534 (loongarch_print_operand_reloc): Operand modifier 'c' is supported.
39535 (loongarch_print_operand): Increase the processing of '%c'.
39536 * doc/extend.texi: Adds documents for LoongArch operand modifiers.
39537 And port the public operand modifiers information to this document.
39539 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
39541 * doc/invoke.texi (-mbranch-protection): Update documentation.
39543 2023-01-23 Richard Biener <rguenther@suse.de>
39546 * config/sparc/freebsd.h (ENDFILE_SPEC): Don't add crtfastmath.o
39548 * config/sparc/linux.h (ENDFILE_SPEC): Likewise.
39549 * config/sparc/linux64.h (ENDFILE_SPEC): Likewise.
39550 * config/sparc/sp-elf.h (ENDFILE_SPEC): Likewise.
39551 * config/sparc/sp64-elf.h (ENDFILE_SPEC): Likewise.
39553 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
39555 * config/arm/aout.h (ra_auth_code): Add entry in enum.
39556 * config/arm/arm.cc (emit_multi_reg_push): Add RA_AUTH_CODE register
39557 to dwarf frame expression.
39558 (arm_emit_multi_reg_pop): Restore RA_AUTH_CODE register.
39559 (arm_expand_prologue): Update frame related information and reg notes
39560 for pac/pacbit insn.
39561 (arm_regno_class): Check for pac pseudo reigster.
39562 (arm_dbx_register_number): Assign ra_auth_code register number in dwarf.
39563 (arm_init_machine_status): Set pacspval_needed to zero.
39564 (arm_debugger_regno): Check for PAC register.
39565 (arm_unwind_emit_sequence): Print .save directive with ra_auth_code
39567 (arm_unwind_emit_set): Add entry for IP_REGNUM in switch case.
39568 (arm_unwind_emit): Update REG_CFA_REGISTER case._
39569 * config/arm/arm.h (FIRST_PSEUDO_REGISTER): Modify.
39570 (DWARF_PAC_REGNUM): Define.
39571 (IS_PAC_REGNUM): Likewise.
39572 (enum reg_class): Add PAC_REG entry.
39573 (machine_function): Add pacbti_needed state to structure.
39574 * config/arm/arm.md (RA_AUTH_CODE): Define.
39576 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
39578 * config.gcc ($tm_file): Update variable.
39579 * config/arm/arm-mlib.h: Create new header file.
39580 * config/arm/t-rmprofile (MULTI_ARCH_DIRS_RM): Rename mbranch-protection
39581 multilib arch directory.
39582 (MULTILIB_REUSE): Add multilib reuse rules.
39583 (MULTILIB_MATCHES): Add multilib match rules.
39585 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
39587 * config/arm/arm-cpus.in (cortex-m85): Define new CPU.
39588 * config/arm/arm-tables.opt: Regenerate.
39589 * config/arm/arm-tune.md: Likewise.
39590 * doc/invoke.texi (Arm Options): Document -mcpu=cortex-m85.
39591 * (-mfix-cmse-cve-2021-35465): Likewise.
39593 2023-01-23 Richard Biener <rguenther@suse.de>
39595 PR tree-optimization/108482
39596 * tree-vect-generic.cc (expand_vector_operations): Fold remaining
39597 .LOOP_DIST_ALIAS calls.
39599 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
39601 * config.gcc (arm*-*-*): Add 'aarch-bti-insert.o' object.
39602 * config/arm/arm-protos.h: Update.
39603 * config/arm/aarch-common-protos.h: Declare
39604 'aarch_bti_arch_check'.
39605 * config/arm/arm.cc (aarch_bti_enabled) Update.
39606 (aarch_bti_j_insn_p, aarch_pac_insn_p, aarch_gen_bti_c)
39607 (aarch_gen_bti_j, aarch_bti_arch_check): New functions.
39608 * config/arm/arm.md (bti_nop): New insn.
39609 * config/arm/t-arm (PASSES_EXTRA): Add 'arm-passes.def'.
39610 (aarch-bti-insert.o): New target.
39611 * config/arm/unspecs.md (VUNSPEC_BTI_NOP): New unspec.
39612 * config/arm/aarch-bti-insert.cc (rest_of_insert_bti): Verify arch
39614 (gate): Make use of 'aarch_bti_arch_check'.
39615 * config/arm/arm-passes.def: New file.
39616 * config/aarch64/aarch64.cc (aarch_bti_arch_check): New function.
39618 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
39620 * config.gcc (aarch64*-*-*): Rename 'aarch64-bti-insert.o' into
39621 'aarch-bti-insert.o'.
39622 * config/aarch64/aarch64-protos.h: Remove 'aarch64_bti_enabled'
39624 * config/aarch64/aarch64.cc (aarch_bti_enabled): Rename.
39625 (aarch_bti_j_insn_p, aarch_pac_insn_p): New functions.
39626 (aarch64_output_mi_thunk)
39627 (aarch64_print_patchable_function_entry)
39628 (aarch64_file_end_indicate_exec_stack): Update renamed function
39629 calls to renamed functions.
39630 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Likewise.
39631 * config/aarch64/t-aarch64 (aarch-bti-insert.o): Update
39633 * config/aarch64/aarch64-bti-insert.cc: Delete.
39634 * config/arm/aarch-bti-insert.cc: New file including and
39635 generalizing code from aarch64-bti-insert.cc.
39636 * config/arm/aarch-common-protos.h: Update.
39638 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
39640 * config/arm/arm.h (arm_arch8m_main): Declare it.
39641 * config/arm/arm-protos.h (arm_current_function_pac_enabled_p):
39643 * config/arm/arm.cc (arm_arch8m_main): Define it.
39644 (arm_option_reconfigure_globals): Set arm_arch8m_main.
39645 (arm_compute_frame_layout, arm_expand_prologue)
39646 (thumb2_expand_return, arm_expand_epilogue)
39647 (arm_conditional_register_usage): Update for pac codegen.
39648 (arm_current_function_pac_enabled_p): New function.
39649 (aarch_bti_enabled) New function.
39650 (use_return_insn): Return zero when pac is enabled.
39651 * config/arm/arm.md (pac_ip_lr_sp, pacbti_ip_lr_sp, aut_ip_lr_sp):
39653 * config/arm/unspecs.md (UNSPEC_PAC_NOP)
39654 (VUNSPEC_PACBTI_NOP, VUNSPEC_AUT_NOP): Add unspecs.
39656 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
39658 * config/arm/t-rmprofile: Add multilib rules for march +pacbti and
39659 mbranch-protection.
39661 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
39662 Tejas Belagod <tbelagod@arm.com>
39664 * config/arm/arm.cc (arm_file_start): Emit EABI attributes for
39665 Tag_PAC_extension, Tag_BTI_extension, TAG_BTI_use, TAG_PACRET_use.
39667 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
39668 Tejas Belagod <tbelagod@arm.com>
39669 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
39671 * ginclude/unwind-arm-common.h (_Unwind_VRS_RegClass): Introduce
39672 new pseudo register class _UVRSC_PAC.
39674 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
39675 Tejas Belagod <tbelagod@arm.com>
39677 * config/arm/arm-c.cc (arm_cpu_builtins): Define
39678 __ARM_FEATURE_BTI_DEFAULT, __ARM_FEATURE_PAC_DEFAULT,
39679 __ARM_FEATURE_PAUTH and __ARM_FEATURE_BTI.
39681 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
39682 Tejas Belagod <tbelagod@arm.com>
39684 * doc/sourcebuild.texi: Document arm_pacbti_hw.
39686 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
39687 Tejas Belagod <tbelagod@arm.com>
39688 Richard Earnshaw <Richard.Earnshaw@arm.com>
39690 * config/arm/arm.cc (arm_configure_build_target): Parse and validate
39691 -mbranch-protection option and initialize appropriate data structures.
39692 * config/arm/arm.opt (-mbranch-protection): New option.
39693 * doc/invoke.texi (Arm Options): Document it.
39695 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
39696 Tejas Belagod <tbelagod@arm.com>
39698 * config/arm/arm.h (TARGET_HAVE_PACBTI): New macro.
39699 * config/arm/arm-cpus.in (pacbti): New feature.
39700 * doc/invoke.texi (Arm Options): Document it.
39702 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
39703 Tejas Belagod <tbelagod@arm.com>
39705 * common/config/aarch64/aarch64-common.cc: Include aarch-common.h.
39706 (all_architectures): Fix comment.
39707 (aarch64_parse_extension): Rename return type, enum value names.
39708 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Rename
39709 factored out aarch_ra_sign_scope and aarch_ra_sign_key variables.
39710 Also rename corresponding enum values.
39711 * config/aarch64/aarch64-opts.h (aarch64_function_type): Factor
39712 out aarch64_function_type and move it to common code as
39713 aarch_function_type in aarch-common.h.
39714 * config/aarch64/aarch64-protos.h: Include common types header,
39715 move out types aarch64_parse_opt_result and aarch64_key_type to
39717 * config/aarch64/aarch64.cc: Move mbranch-protection parsing types
39718 and functions out into aarch-common.h and aarch-common.cc. Fix up
39719 all the name changes resulting from the move.
39720 * config/aarch64/aarch64.md: Fix up aarch64_ra_sign_key type name change
39722 * config/aarch64/aarch64.opt: Include aarch-common.h to import
39723 type move. Fix up name changes from factoring out common code and
39725 * config/arm/aarch-common-protos.h: Export factored out routines to both
39727 * config/arm/aarch-common.cc: Include newly factored out types.
39728 Move all mbranch-protection code and data structures from
39730 * config/arm/aarch-common.h: New header that declares types shared
39731 between aarch32 and aarch64 backends.
39732 * config/arm/arm-protos.h: Declare types and variables that are
39733 made common to aarch64 and aarch32 backends - aarch_ra_sign_key,
39734 aarch_ra_sign_scope and aarch_enable_bti.
39735 * config/arm/arm.opt (config/arm/aarch-common.h): Include header.
39736 (aarch_ra_sign_scope, aarch_enable_bti): Declare variable.
39737 * config/arm/arm.cc: Add missing includes.
39739 2023-01-23 Tobias Burnus <tobias@codesourcery.com>
39741 * doc/install.texi (amdgcn, nvptx): Require newlib 4.3.0.
39743 2023-01-23 Richard Biener <rguenther@suse.de>
39745 PR tree-optimization/108449
39746 * cgraphunit.cc (check_global_declaration): Do not turn
39747 undefined statics into externs.
39749 2023-01-22 Dimitar Dimitrov <dimitar@dinux.eu>
39751 * config/pru/pru.h (CLZ_DEFINED_VALUE_AT_ZERO): Fix value for QI
39752 and HI input modes.
39753 * config/pru/pru.md (clz): Fix generated code for QI and HI
39756 2023-01-22 Cupertino Miranda <cupertino.miranda@oracle.com>
39758 * config/v850/v850.cc (v850_select_section): Put const volatile
39759 objects into read-only sections.
39761 2023-01-20 Tejas Belagod <tejas.belagod@arm.com>
39763 * config/aarch64/arm_neon.h (vmull_p64, vmull_high_p64, vaeseq_u8,
39764 vaesdq_u8, vaesmcq_u8, vaesimcq_u8): Gate under "nothing+aes".
39765 (vsha1*_u32, vsha256*_u32): Gate under "nothing+sha2".
39767 2023-01-20 Jakub Jelinek <jakub@redhat.com>
39769 PR tree-optimization/108457
39770 * tree-ssa-loop-niter.cc (build_cltz_expr): Use
39771 SCALAR_INT_TYPE_MODE (utype) directly as C[LT]Z_DEFINED_VALUE_AT_ZERO
39772 argument instead of a temporary. Formatting fixes.
39774 2023-01-19 Jakub Jelinek <jakub@redhat.com>
39776 PR tree-optimization/108447
39777 * value-relation.cc (rr_union_table): Fix VREL_UNDEFINED row order.
39778 (relation_tests): Add self-tests for relation_{intersect,union}
39780 * selftest.h (relation_tests): Declare.
39781 * function-tests.cc (test_ranges): Call it.
39783 2023-01-19 H.J. Lu <hjl.tools@gmail.com>
39786 * config/i386/i386-expand.cc (ix86_expand_builtin): Check
39787 invalid third argument to __builtin_ia32_prefetch.
39789 2023-01-19 Jakub Jelinek <jakub@redhat.com>
39791 PR middle-end/108459
39792 * omp-expand.cc (expand_omp_for_init_counts): Use fold_build1 rather
39793 than fold_unary for NEGATE_EXPR.
39795 2023-01-19 Christophe Lyon <christophe.lyon@arm.com>
39798 * config/aarch64/aarch64.cc (aarch64_layout_arg): Improve
39799 comment. Move assert about alignment a bit later.
39801 2023-01-19 Jakub Jelinek <jakub@redhat.com>
39803 PR tree-optimization/108440
39804 * tree-ssa-forwprop.cc: Include gimple-range.h.
39805 (simplify_rotate): For the forms with T2 wider than T and shift counts of
39806 Y and B - Y add & (B - 1) masking for the rotate count if Y could be equal
39807 to B. For the forms with T2 wider than T and shift counts of
39808 Y and (-Y) & (B - 1), don't punt if range could be [B, B2], but only if
39809 range doesn't guarantee Y < B or Y = N * B. If range doesn't guarantee
39810 Y < B, also add & (B - 1) masking for the rotate count. Use lazily created
39811 pass specific ranger instead of get_global_range_query.
39812 (pass_forwprop::execute): Disable that ranger at the end of pass if it has
39815 2023-01-19 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
39817 * config/aarch64/aarch64-simd.md (aarch64_simd_vec_set<mode>): Use
39818 exact_log2 (INTVAL (operands[2])) >= 0 as condition for gating
39820 (aarch64_simd_vec_copy_lane<mode>): Likewise.
39821 (aarch64_simd_vec_copy_lane_<vswap_width_name><mode>): Likewise.
39823 2023-01-19 Alexandre Oliva <oliva@adacore.com>
39826 * sched-deps.cc (sched_analyze_2): Skip cselib address lookup
39827 within debug insns.
39829 2023-01-18 Martin Jambor <mjambor@suse.cz>
39832 * cgraph.cc (cgraph_node::remove): Check whether nodes up the
39833 lcone_of chain also do not need the body.
39835 2023-01-18 Richard Biener <rguenther@suse.de>
39838 2022-12-16 Richard Biener <rguenther@suse.de>
39840 PR middle-end/108086
39841 * tree-inline.cc (remap_ssa_name): Do not unshare the
39842 result from the decl_map.
39844 2023-01-18 Murray Steele <murray.steele@arm.com>
39847 * config/arm/arm_mve.h (__arm_vst1q_p_u8): Use prefixed intrinsic
39849 (__arm_vst1q_p_s8): Likewise.
39850 (__arm_vld1q_z_u8): Likewise.
39851 (__arm_vld1q_z_s8): Likewise.
39852 (__arm_vst1q_p_u16): Likewise.
39853 (__arm_vst1q_p_s16): Likewise.
39854 (__arm_vld1q_z_u16): Likewise.
39855 (__arm_vld1q_z_s16): Likewise.
39856 (__arm_vst1q_p_u32): Likewise.
39857 (__arm_vst1q_p_s32): Likewise.
39858 (__arm_vld1q_z_u32): Likewise.
39859 (__arm_vld1q_z_s32): Likewise.
39860 (__arm_vld1q_z_f16): Likewise.
39861 (__arm_vst1q_p_f16): Likewise.
39862 (__arm_vld1q_z_f32): Likewise.
39863 (__arm_vst1q_p_f32): Likewise.
39865 2023-01-18 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
39867 * config/xtensa/xtensa.md (xorsi3_internal):
39868 Rename from the original of "xorsi3".
39869 (xorsi3): New expansion pattern that emits addition rather than
39870 bitwise-XOR when the second source is a constant of -2147483648
39873 2023-01-18 Kewen Lin <linkw@linux.ibm.com>
39874 Andrew Pinski <apinski@marvell.com>
39877 * config/rs6000/rs6000-overload.def (VEC_VSUBCUQ): Fix typo
39878 vec_vsubcuqP with vec_vsubcuq.
39880 2023-01-18 Kewen Lin <linkw@linux.ibm.com>
39883 * config/rs6000/rs6000.cc (rs6000_opaque_type_invalid_use_p): Add the
39884 support for invalid uses of MMA opaque type in function arguments.
39886 2023-01-18 liuhongt <hongtao.liu@intel.com>
39889 * config/i386/cygwin.h (ENDFILE_SPEC): Link crtfastmath.o
39890 whenever -mdaz-ftz is specified. Don't link crtfastmath.o when
39891 -share or -mno-daz-ftz is specified.
39892 * config/i386/darwin.h (ENDFILE_SPEC): Ditto.
39893 * config/i386/mingw32.h (ENDFILE_SPEC): Ditto.
39895 2023-01-17 Jose E. Marchesi <jose.marchesi@oracle.com>
39897 * config/bpf/bpf.cc (bpf_option_override): Disable
39900 2023-01-17 Jakub Jelinek <jakub@redhat.com>
39902 PR tree-optimization/106523
39903 * tree-ssa-forwprop.cc (simplify_rotate): For the
39904 patterns with (-Y) & (B - 1) in one operand's shift
39905 count and Y in another, if T2 has wider precision than T,
39906 punt if Y could have a value in [B, B2 - 1] range.
39908 2023-01-16 H.J. Lu <hjl.tools@gmail.com>
39911 * config/i386/i386.cc (x86_output_mi_thunk): Disable
39912 -mforce-indirect-call for PIC in 32-bit mode.
39914 2023-01-16 Jan Hubicka <hubicka@ucw.cz>
39917 * ipa-modref.cc (modref_access_analysis::analyze): Use
39918 find_always_executed_bbs.
39919 * ipa-sra.cc (process_scan_results): Likewise.
39920 * ipa-utils.cc (stmt_may_terminate_function_p): New function.
39921 (find_always_executed_bbs): New function.
39922 * ipa-utils.h (stmt_may_terminate_function_p): Declare.
39923 (find_always_executed_bbs): Declare.
39925 2023-01-16 Jan Hubicka <jh@suse.cz>
39927 * config/i386/i386.cc (ix86_vectorize_builtin_scatter): Guard scatter
39928 by TARGET_USE_SCATTER.
39929 * config/i386/i386.h (TARGET_USE_SCATTER_2PARTS,
39930 TARGET_USE_SCATTER_4PARTS, TARGET_USE_SCATTER): New macros.
39931 * config/i386/x86-tune.def (TARGET_USE_SCATTER_2PARTS,
39932 TARGET_USE_SCATTER_4PARTS, TARGET_USE_SCATTER): New tunes.
39933 (X86_TUNE_AVOID_256FMA_CHAINS, X86_TUNE_AVOID_512FMA_CHAINS): Disable
39934 for znver4. (X86_TUNE_USE_GATHER): Disable for zen4.
39936 2023-01-16 Richard Biener <rguenther@suse.de>
39939 * config/sol2.h (ENDFILE_SPEC): Don't add crtfastmath.o for -shared.
39941 2023-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
39945 * config/arm/arm_mve.h (__ARM_mve_coerce2): Split types.
39946 (__ARM_mve_coerce3): Likewise.
39948 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
39950 * tree-ssa-loop-niter.cc (build_popcount_expr): Add IFN support.
39952 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
39954 * tree-ssa-loop-niter.cc (number_of_iterations_cltz): New.
39955 (number_of_iterations_bitcount): Add call to the above.
39956 (number_of_iterations_exit_assumptions): Add EQ_EXPR case for
39957 c[lt]z idiom recognition.
39959 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
39961 * doc/sourcebuild.texi: Add missing target attributes.
39963 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
39965 PR tree-optimization/94793
39966 * tree-scalar-evolution.cc (expression_expensive_p): Add checks
39968 * tree-ssa-loop-niter.cc (build_cltz_expr): New.
39969 (number_of_iterations_cltz_complement): New.
39970 (number_of_iterations_bitcount): Add call to the above.
39972 2023-01-16 Jonathan Wakely <jwakely@redhat.com>
39974 * doc/extend.texi (Common Function Attributes): Fix grammar.
39976 2023-01-16 Jakub Jelinek <jakub@redhat.com>
39979 * config/riscv/riscv-vsetvl.h: Add space in between Copyright and (C).
39980 * config/riscv/riscv-vsetvl.cc: Likewise.
39982 2023-01-16 Jakub Jelinek <jakub@redhat.com>
39985 * config/i386/xmmintrin.h (_mm_undefined_ps): Temporarily
39986 disable -Winit-self using pragma GCC diagnostic ignored.
39987 * config/i386/emmintrin.h (_mm_undefined_pd, _mm_undefined_si128):
39989 * config/i386/avxintrin.h (_mm256_undefined_pd, _mm256_undefined_ps,
39990 _mm256_undefined_si256): Likewise.
39991 * config/i386/avx512fintrin.h (_mm512_undefined_pd,
39992 _mm512_undefined_ps, _mm512_undefined_epi32): Likewise.
39993 * config/i386/avx512fp16intrin.h (_mm_undefined_ph,
39994 _mm256_undefined_ph, _mm512_undefined_ph): Likewise.
39996 2023-01-16 Kewen Lin <linkw@linux.ibm.com>
39999 * config/rs6000/rs6000.cc (rs6000_opaque_type_invalid_use_p): Add the
40000 support for invalid uses in inline asm, factor out the checking and
40001 erroring to lambda function check_and_error_invalid_use.
40003 2023-01-15 Aldy Hernandez <aldyh@redhat.com>
40005 PR tree-optimization/107608
40006 * range-op-float.cc (range_operator_float::fold_range): Avoid
40007 folding into INF when flag_trapping_math.
40008 * value-range.h (frange::known_isinf): Return false for possible NANs.
40010 2023-01-15 Xianmiao Qu <cooper.qu@linux.alibaba.com>
40012 * config.gcc (csky-*-*): Support --with-float=softfp.
40014 2023-01-14 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
40016 * config/xtensa/xtensa-protos.h (order_regs_for_local_alloc):
40017 Rename to xtensa_adjust_reg_alloc_order.
40018 * config/xtensa/xtensa.cc (xtensa_adjust_reg_alloc_order):
40019 Ditto. And also remove code to reorder register numbers for
40020 leaf functions, rename the tables, and adjust the allocation
40021 order for the call0 ABI to use register A0 more.
40022 (xtensa_leaf_regs): Remove.
40023 * config/xtensa/xtensa.h (REG_ALLOC_ORDER): Cosmetics.
40024 (order_regs_for_local_alloc): Rename as the above.
40025 (LEAF_REGISTERS, LEAF_REG_REMAP, leaf_function): Remove.
40027 2023-01-14 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
40029 * config/aarch64/aarch64-sve.md (aarch64_vec_duplicate_vq<mode>_le):
40030 Change to define_insn_and_split to fold ldr+dup to ld1rq.
40031 * config/aarch64/predicates.md (aarch64_sve_dup_ld1rq_operand): New.
40033 2023-01-14 Alexandre Oliva <oliva@adacore.com>
40035 * hash-table.h (is_deleted): Precheck !is_empty.
40036 (mark_deleted): Postcheck !is_empty.
40037 (copy constructor): Test is_empty before is_deleted.
40039 2023-01-14 Alexandre Oliva <oliva@adacore.com>
40042 * config/arm/arm.md (movmisaligndi): Prefer aligned SImode
40045 2023-01-13 Eric Botcazou <ebotcazou@adacore.com>
40047 PR rtl-optimization/108274
40048 * function.cc (thread_prologue_and_epilogue_insns): Also update the
40049 DF information for calls in a few more cases.
40051 2023-01-13 John David Anglin <danglin@gcc.gnu.org>
40053 * config/pa/pa-linux.h (TARGET_SYNC_LIBCALL): Delete define.
40054 * config/pa/pa.cc (pa_init_libfuncs): Use MAX_SYNC_LIBFUNC_SIZE
40056 * config/pa/pa.h (TARGET_SYNC_LIBCALLS): Use flag_sync_libcalls.
40057 (MAX_SYNC_LIBFUNC_SIZE): Define.
40058 (TARGET_CPU_CPP_BUILTINS): Define __SOFTFP__ when soft float is
40060 * config/pa/pa.md (atomic_storeqi): Emit __atomic_exchange_1
40061 libcall when sync libcalls are disabled.
40062 (atomic_storehi, atomic_storesi, atomic_storedi): Likewise.
40063 (atomic_loaddi): Emit __atomic_load_8 libcall when sync libcalls
40064 are disabled on 32-bit target.
40065 * config/pa/pa.opt (matomic-libcalls): New option.
40066 * doc/invoke.texi (HPPA Options): Update.
40068 2023-01-13 Alexander Monakov <amonakov@ispras.ru>
40070 PR rtl-optimization/108117
40071 PR rtl-optimization/108132
40072 * sched-deps.cc (deps_analyze_insn): Do not schedule across
40073 calls before reload.
40075 2023-01-13 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
40077 * common/config/arm/arm-common.cc (arm_canon_arch_option_1): Ignore cde
40078 options for -mlibarch.
40079 * config/arm/arm-cpus.in (begin cpu cortex-m55): Add cde options.
40080 * doc/invoke.texi (CDE): Document options for Cortex-M55 CPU.
40082 2023-01-13 Qing Zhao <qing.zhao@oracle.com>
40084 * attribs.cc (strict_flex_array_level_of): Move this function to ...
40085 * attribs.h (strict_flex_array_level_of): Remove the declaration.
40086 * gimple-array-bounds.cc (array_bounds_checker::check_array_ref):
40087 replace the referece to strict_flex_array_level_of with
40088 DECL_NOT_FLEXARRAY.
40089 * tree.cc (component_ref_size): Likewise.
40091 2023-01-13 Richard Biener <rguenther@suse.de>
40094 * config/arm/linux-eabi.h (ENDFILE_SPEC): Don't add
40095 crtfastmath.o for -shared.
40096 * config/arm/unknown-elf.h (STARTFILE_SPEC): Likewise.
40098 2023-01-13 Richard Biener <rguenther@suse.de>
40101 * config/aarch64/aarch64-elf-raw.h (ENDFILE_SPEC): Don't add
40102 crtfastmath.o for -shared.
40103 * config/aarch64/aarch64-freebsd.h (GNU_USER_TARGET_MATHFILE_SPEC):
40105 * config/aarch64/aarch64-linux.h (GNU_USER_TARGET_MATHFILE_SPEC):
40108 2023-01-13 Richard Sandiford <richard.sandiford@arm.com>
40110 * config/aarch64/aarch64.cc (aarch64_dwarf_frame_reg_mode): New
40112 (TARGET_DWARF_FRAME_REG_MODE): Define.
40114 2023-01-13 Richard Biener <rguenther@suse.de>
40117 * config/aarch64/aarch64.cc (aarch64_gimple_fold_builtin): Don't
40118 update EH info on the fly.
40120 2023-01-13 Richard Biener <rguenther@suse.de>
40122 PR tree-optimization/108387
40123 * tree-ssa-sccvn.cc (visit_nary_op): Check for SSA_NAME
40124 value before inserting expression into the tables.
40126 2023-01-12 Andrew Pinski <apinski@marvell.com>
40127 Roger Sayle <roger@nextmovesoftware.com>
40129 PR tree-optimization/92342
40130 * match.pd ((m1 CMP m2) * d -> (m1 CMP m2) ? d : 0):
40131 Use tcc_comparison and :c for the multiply.
40132 (b & -(a CMP c) -> (a CMP c)?b:0): New pattern.
40134 2023-01-12 Christophe Lyon <christophe.lyon@arm.com>
40135 Richard Sandiford <richard.sandiford@arm.com>
40138 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment):
40139 Check DECL_PACKED for bitfield.
40140 (aarch64_layout_arg): Warn when parameter passing ABI changes.
40141 (aarch64_function_arg_boundary): Do not warn here.
40142 (aarch64_gimplify_va_arg_expr): Warn when parameter passing ABI
40145 2023-01-12 Christophe Lyon <christophe.lyon@arm.com>
40146 Richard Sandiford <richard.sandiford@arm.com>
40148 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Fix
40150 (aarch64_layout_arg): Factorize warning conditions.
40151 (aarch64_function_arg_boundary): Fix typo.
40152 * function.cc (currently_expanding_function_start): New variable.
40153 (expand_function_start): Handle
40154 currently_expanding_function_start.
40155 * function.h (currently_expanding_function_start): Declare.
40157 2023-01-12 Richard Biener <rguenther@suse.de>
40159 PR tree-optimization/99412
40160 * tree-ssa-reassoc.cc (is_phi_for_stmt): Remove.
40161 (swap_ops_for_binary_stmt): Remove reduction handling.
40162 (rewrite_expr_tree_parallel): Adjust.
40163 (reassociate_bb): Likewise.
40164 * tree-parloops.cc (build_new_reduction): Handle MINUS_EXPR.
40166 2023-01-12 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
40168 * config/xtensa/xtensa.md (ctzsi2, ffssi2):
40169 Rearrange the emitting codes.
40171 2023-01-12 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
40173 * config/xtensa/xtensa.md (*btrue):
40174 Correct value of the attribute "length" that depends on
40175 TARGET_DENSITY and operands, and add '?' character to the register
40176 constraint of the compared operand.
40178 2023-01-12 Alexandre Oliva <oliva@adacore.com>
40180 * hash-table.h (expand): Check elements and deleted counts.
40181 (verify): Likewise.
40183 2023-01-11 Roger Sayle <roger@nextmovesoftware.com>
40185 PR tree-optimization/71343
40186 * tree-ssa-sccvn.cc (visit_nary_op) <case LSHIFT_EXPR>: Make
40187 the value number of the expression X << C the same as the value
40188 number for the multiplication X * (1<<C).
40190 2023-01-11 David Faust <david.faust@oracle.com>
40193 * config/bpf/bpf.cc (bpf_print_operand): Correct handling for
40194 floating point modes.
40196 2023-01-11 Eric Botcazou <ebotcazou@adacore.com>
40198 PR tree-optimization/108199
40199 * tree-sra.cc (sra_modify_expr): Deal with reverse storage order
40200 for bit-field references.
40202 2023-01-11 Kewen Lin <linkw@linux.ibm.com>
40204 * config/rs6000/rs6000.cc (rs6000_option_override_internal): Make
40205 OPTION_MASK_P10_FUSION implicit setting honour Power10 tuning setting.
40206 * config/rs6000/rs6000-cpus.def (ISA_3_1_MASKS_SERVER): Remove
40207 OPTION_MASK_P10_FUSION.
40209 2023-01-11 Richard Biener <rguenther@suse.de>
40211 PR tree-optimization/107767
40212 * tree-cfgcleanup.cc (phi_alternatives_equal): Export.
40213 * tree-cfgcleanup.h (phi_alternatives_equal): Declare.
40214 * tree-switch-conversion.cc (switch_conversion::collect):
40215 Count unique non-default targets accounting for later
40216 merging opportunities.
40218 2023-01-11 Martin Liska <mliska@suse.cz>
40220 PR middle-end/107976
40221 * params.opt: Limit JT params.
40222 * stmt.cc (emit_case_dispatch_table): Use auto_vec.
40224 2023-01-11 Richard Biener <rguenther@suse.de>
40226 PR tree-optimization/108352
40227 * tree-ssa-threadbackward.cc
40228 (back_threader_profitability::profitable_path_p): Adjust
40229 heuristic that allows non-multi-way branch threads creating
40231 * doc/invoke.texi (--param fsm-scale-path-blocks): Remove.
40232 (--param fsm-scale-path-stmts): Adjust.
40233 * params.opt (--param=fsm-scale-path-blocks=): Remove.
40234 (-param=fsm-scale-path-stmts=): Adjust description.
40236 2023-01-11 Richard Biener <rguenther@suse.de>
40238 PR tree-optimization/108353
40239 * tree-ssa-propagate.cc (cfg_blocks_back, ssa_edge_worklist_back):
40241 (add_ssa_edge): Simplify.
40242 (add_control_edge): Likewise.
40243 (ssa_prop_init): Likewise.
40244 (ssa_prop_fini): Likewise.
40245 (ssa_propagation_engine::ssa_propagate): Likewise.
40247 2023-01-11 Andreas Krebbel <krebbel@linux.ibm.com>
40249 * config/s390/s390.md (*not<mode>): New pattern.
40251 2023-01-11 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
40253 * config/xtensa/xtensa.cc (xtensa_insn_cost):
40254 Let insn cost for size be obtained by applying COSTS_N_INSNS()
40255 to instruction length and then dividing by 3.
40257 2023-01-10 Richard Biener <rguenther@suse.de>
40259 PR tree-optimization/106293
40260 * tree-ssa-dse.cc (dse_classify_store): Use a worklist to
40261 process degenerate PHI defs.
40263 2023-01-10 Roger Sayle <roger@nextmovesoftware.com>
40265 PR rtl-optimization/106421
40266 * cprop.cc (bypass_block): Check that DEST is local to this
40267 function (non-NULL) before calling find_edge.
40269 2023-01-10 Martin Jambor <mjambor@suse.cz>
40272 * ipa-param-manipulation.h (ipa_param_body_adjustments): New members
40273 sort_replacements, lookup_first_base_replacement and
40274 m_sorted_replacements_p.
40275 * ipa-param-manipulation.cc: Define INCLUDE_ALGORITHM.
40276 (ipa_param_body_adjustments::register_replacement): Set
40277 m_sorted_replacements_p to false.
40278 (compare_param_body_replacement): New function.
40279 (ipa_param_body_adjustments::sort_replacements): Likewise.
40280 (ipa_param_body_adjustments::common_initialization): Call
40282 (ipa_param_body_adjustments::ipa_param_body_adjustments): Initialize
40283 m_sorted_replacements_p.
40284 (ipa_param_body_adjustments::lookup_replacement_1): Rework to use
40286 (ipa_param_body_adjustments::lookup_first_base_replacement): New
40288 (ipa_param_body_adjustments::modify_call_stmt): Use
40289 lookup_first_base_replacement.
40290 * omp-simd-clone.cc (ipa_simd_modify_function_body): Call
40291 adjustments->sort_replacements.
40293 2023-01-10 Richard Biener <rguenther@suse.de>
40295 PR tree-optimization/108314
40296 * tree-vect-stmts.cc (vectorizable_condition): Do not
40297 perform BIT_NOT_EXPR optimization for EXTRACT_LAST_REDUCTION.
40299 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
40301 * config/csky/csky-linux-elf.h (SYSROOT_SUFFIX_SPEC): New.
40303 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
40305 * config/csky/csky.h (MULTILIB_DEFAULTS): Fix float abi option.
40307 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
40309 * config/csky/csky.cc (csky_cpu_cpp_builtins): Add builtin
40310 defines for soft float abi.
40312 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
40314 * config/csky/csky.md (smart_bseti): Change condition to CSKY_ISA_FEATURE (E1).
40315 (smart_bclri): Likewise.
40316 (fast_bseti): Change condition to CSKY_ISA_FEATURE (E2).
40317 (fast_bclri): Likewise.
40318 (fast_cmpnesi_i): Likewise.
40319 (*fast_cmpltsi_i): Likewise.
40320 (*fast_cmpgeusi_i): Likewise.
40322 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
40324 * config/csky/csky_insn_fpuv3.md (l<frm_pattern><fixsuop><mode>si2): Test
40325 flag_fp_int_builtin_inexact || !flag_trapping_math.
40326 (<frm_pattern><mode>2): Likewise.
40328 2023-01-10 Andreas Krebbel <krebbel@linux.ibm.com>
40330 * config/s390/s390.cc (s390_register_info): Check call_used_regs
40331 instead of hard-coding the register numbers for call saved
40333 (s390_optimize_register_info): Likewise.
40335 2023-01-09 Eric Botcazou <ebotcazou@adacore.com>
40337 * doc/gm2.texi (Overview): Fix @node markers.
40338 (Using): Likewise. Remove subsections that were moved to Overview
40339 from the menu and move others around.
40341 2023-01-09 Richard Biener <rguenther@suse.de>
40343 PR middle-end/108209
40344 * genmatch.cc (commutative_op): Fix return value for
40345 user-id with non-commutative first replacement.
40347 2023-01-09 Jakub Jelinek <jakub@redhat.com>
40350 * calls.cc (expand_call): For calls with
40351 TYPE_NO_NAMED_ARGS_STDARG_P (funtype) use zero for n_named_args.
40354 2023-01-09 Richard Biener <rguenther@suse.de>
40356 PR middle-end/69482
40357 * cfgexpand.cc (discover_nonconstant_array_refs_r): Volatile
40358 qualified accesses also force objects to memory.
40360 2023-01-09 Martin Liska <mliska@suse.cz>
40363 * lto-cgraph.cc (compute_ltrans_boundary): Do not insert
40364 NULL (deleleted value) to a hash_set.
40366 2023-01-08 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
40368 * config/xtensa/xtensa.md (*splice_bits):
40369 New insn_and_split pattern.
40371 2023-01-07 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
40373 * config/xtensa/xtensa.cc
40374 (xtensa_split_imm_two_addends, xtensa_emit_add_imm):
40375 New helper functions.
40376 (xtensa_set_return_address, xtensa_output_mi_thunk):
40377 Change to use the helper function.
40378 (xtensa_emit_adjust_stack_ptr): Ditto.
40379 And also change to try reusing the content of scratch register
40380 A9 if the register is not modified in the function body.
40382 2023-01-07 LIU Hao <lh_mouse@126.com>
40384 PR middle-end/108300
40385 * config/xtensa/xtensa-dynconfig.c: Define `WIN32_LEAN_AND_MEAN`
40386 before <windows.h>.
40387 * diagnostic-color.cc: Likewise.
40388 * plugin.cc: Likewise.
40389 * prefix.cc: Likewise.
40391 2023-01-06 Joseph Myers <joseph@codesourcery.com>
40393 * doc/extend.texi (__builtin_tgmath): Do not restate standard rule
40394 for handling real integer types.
40396 2023-01-06 Tamar Christina <tamar.christina@arm.com>
40399 2022-12-12 Tamar Christina <tamar.christina@arm.com>
40401 * config/aarch64/aarch64-simd.md (*aarch64_simd_movv2hf): New.
40402 (mov<mode>, movmisalign<mode>, aarch64_dup_lane<mode>,
40403 aarch64_store_lane0<mode>, aarch64_simd_vec_set<mode>,
40404 @aarch64_simd_vec_copy_lane<mode>, vec_set<mode>,
40405 reduc_<optab>_scal_<mode>, reduc_<fmaxmin>_scal_<mode>,
40406 aarch64_reduc_<optab>_internal<mode>, aarch64_get_lane<mode>,
40407 vec_init<mode><Vel>, vec_extract<mode><Vel>): Support V2HF.
40408 (aarch64_simd_dupv2hf): New.
40409 * config/aarch64/aarch64.cc (aarch64_classify_vector_mode):
40411 * config/aarch64/iterators.md (VHSDF_P): New.
40412 (V2F, VMOVE, nunits, Vtype, Vmtype, Vetype, stype, VEL,
40413 Vel, q, vp): Add V2HF.
40414 * config/arm/types.md (neon_fp_reduc_add_h): New.
40416 2023-01-06 Martin Liska <mliska@suse.cz>
40418 PR middle-end/107966
40419 * doc/options.texi: Fix Var documentation in internal manual.
40421 2023-01-05 Roger Sayle <roger@nextmovesoftware.com>
40424 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
40426 * config/i386/i386-expand.cc (ix86_expand_int_movcc): Rewrite
40427 RTL expansion to allow condition (mask) to be shared/reused,
40428 by avoiding overwriting pseudos and adding REG_EQUAL notes.
40430 2023-01-05 Iain Sandoe <iain@sandoe.co.uk>
40432 * common.opt: Add -static-libgm2.
40433 * config/darwin.h (LINK_SPEC): Handle static-libgm2.
40434 * doc/gm2.texi: Document static-libgm2.
40435 * gcc.cc (driver_handle_option): Allow static-libgm2.
40437 2023-01-05 Tejas Joshi <TejasSanjay.Joshi@amd.com>
40439 * common/config/i386/i386-common.cc (processor_alias_table):
40440 Use CPU_ZNVER4 for znver4.
40441 * config/i386/i386.md: Add znver4.md.
40442 * config/i386/znver4.md: New.
40444 2023-01-04 Jakub Jelinek <jakub@redhat.com>
40446 PR tree-optimization/108253
40447 * tree-vrp.cc (maybe_set_nonzero_bits): Handle var with pointer
40450 2023-01-04 Jakub Jelinek <jakub@redhat.com>
40452 PR middle-end/108237
40453 * generic-match-head.cc: Include tree-pass.h.
40454 (canonicalize_math_p, optimize_vectors_before_lowering_p): Define
40455 to false if cfun and cfun->curr_properties has PROP_gimple_opt_math
40456 resp. PROP_gimple_lvec property set.
40458 2023-01-04 Jakub Jelinek <jakub@redhat.com>
40460 PR sanitizer/108256
40461 * convert.cc (do_narrow): Punt for MULT_EXPR if original
40462 type doesn't wrap around and -fsanitize=signed-integer-overflow
40464 * fold-const.cc (fold_unary_loc) <CASE_CONVERT>: Likewise.
40466 2023-01-04 Hu, Lin1 <lin1.hu@intel.com>
40468 * common/config/i386/cpuinfo.h (get_intel_cpu): Handle Emeraldrapids.
40469 * common/config/i386/i386-common.cc: Add Emeraldrapids.
40471 2023-01-04 Hu, Lin1 <lin1.hu@intel.com>
40473 * common/config/i386/cpuinfo.h (get_intel_cpu): Remove case 0xb5
40476 2023-01-03 Sandra Loosemore <sandra@codesourcery.com>
40478 * cgraph.h (struct cgraph_node): Add gc_candidate bit, modify
40479 default constructor to initialize it.
40480 * cgraphunit.cc (expand_all_functions): Save gc_candidate functions
40481 for last and iterate to handle recursive calls. Delete leftover
40482 candidates at the end.
40483 * omp-simd-clone.cc (simd_clone_create): Set gc_candidate bit
40485 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Clear
40486 gc_candidate bit when a clone is used.
40488 2023-01-03 Florian Weimer <fweimer@redhat.com>
40491 2023-01-02 Florian Weimer <fweimer@redhat.com>
40493 * dwarf2cfi.cc (init_return_column_size): Remove.
40494 (init_one_dwarf_reg_size): Adjust.
40495 (generate_dwarf_reg_sizes): New function. Extracted
40496 from expand_builtin_init_dwarf_reg_sizes.
40497 (expand_builtin_init_dwarf_reg_sizes): Call
40498 generate_dwarf_reg_sizes.
40499 * target.def (init_dwarf_reg_sizes_extra): Adjust
40501 * config/msp430/msp430.cc
40502 (msp430_init_dwarf_reg_sizes_extra): Adjust.
40503 * config/rs6000/rs6000.cc
40504 (rs6000_init_dwarf_reg_sizes_extra): Likewise.
40505 * doc/tm.texi: Update.
40507 2023-01-03 Florian Weimer <fweimer@redhat.com>
40510 2023-01-02 Florian Weimer <fweimer@redhat.com>
40512 * debug.h (dwarf_reg_sizes_constant): Declare.
40513 * dwarf2cfi.cc (dwarf_reg_sizes_constant): New function.
40515 2023-01-03 Siddhesh Poyarekar <siddhesh@gotplt.org>
40517 PR tree-optimization/105043
40518 * doc/extend.texi (Object Size Checking): Split out into two
40519 subsections and mention _FORTIFY_SOURCE.
40521 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
40523 * config/i386/i386-expand.cc (ix86_expand_int_movcc): Rewrite
40524 RTL expansion to allow condition (mask) to be shared/reused,
40525 by avoiding overwriting pseudos and adding REG_EQUAL notes.
40527 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
40530 * config/i386/i386-features.cc
40531 (general_scalar_chain::compute_convert_gain) <case PLUS>: Consider
40532 the gain/cost of converting a MEM operand.
40534 2023-01-03 Jakub Jelinek <jakub@redhat.com>
40536 PR middle-end/108264
40537 * expr.cc (store_expr): For stores into SUBREG_PROMOTED_* targets
40538 from source which doesn't have scalar integral mode first convert
40541 2023-01-03 Jakub Jelinek <jakub@redhat.com>
40543 PR rtl-optimization/108263
40544 * cfgrtl.cc (fixup_reorder_chain): Avoid trying to redirect
40547 2023-01-02 Alexander Monakov <amonakov@ispras.ru>
40550 * config/i386/lujiazui.md (lujiazui_div): New automaton.
40551 (lua_div): New unit.
40552 (lua_idiv_qi): Correct unit in the reservation.
40553 (lua_idiv_qi_load): Ditto.
40554 (lua_idiv_hi): Ditto.
40555 (lua_idiv_hi_load): Ditto.
40556 (lua_idiv_si): Ditto.
40557 (lua_idiv_si_load): Ditto.
40558 (lua_idiv_di): Ditto.
40559 (lua_idiv_di_load): Ditto.
40560 (lua_fdiv_SF): Ditto.
40561 (lua_fdiv_SF_load): Ditto.
40562 (lua_fdiv_DF): Ditto.
40563 (lua_fdiv_DF_load): Ditto.
40564 (lua_fdiv_XF): Ditto.
40565 (lua_fdiv_XF_load): Ditto.
40566 (lua_ssediv_SF): Ditto.
40567 (lua_ssediv_load_SF): Ditto.
40568 (lua_ssediv_V4SF): Ditto.
40569 (lua_ssediv_load_V4SF): Ditto.
40570 (lua_ssediv_V8SF): Ditto.
40571 (lua_ssediv_load_V8SF): Ditto.
40572 (lua_ssediv_SD): Ditto.
40573 (lua_ssediv_load_SD): Ditto.
40574 (lua_ssediv_V2DF): Ditto.
40575 (lua_ssediv_load_V2DF): Ditto.
40576 (lua_ssediv_V4DF): Ditto.
40577 (lua_ssediv_load_V4DF): Ditto.
40579 2023-01-02 Florian Weimer <fweimer@redhat.com>
40581 * debug.h (dwarf_reg_sizes_constant): Declare.
40582 * dwarf2cfi.cc (dwarf_reg_sizes_constant): New function.
40584 2023-01-02 Florian Weimer <fweimer@redhat.com>
40586 * dwarf2cfi.cc (init_return_column_size): Remove.
40587 (init_one_dwarf_reg_size): Adjust.
40588 (generate_dwarf_reg_sizes): New function. Extracted
40589 from expand_builtin_init_dwarf_reg_sizes.
40590 (expand_builtin_init_dwarf_reg_sizes): Call
40591 generate_dwarf_reg_sizes.
40592 * target.def (init_dwarf_reg_sizes_extra): Adjust
40594 * config/msp430/msp430.cc
40595 (msp430_init_dwarf_reg_sizes_extra): Adjust.
40596 * config/rs6000/rs6000.cc
40597 (rs6000_init_dwarf_reg_sizes_extra): Likewise.
40598 * doc/tm.texi: Update.
40600 2023-01-02 Jakub Jelinek <jakub@redhat.com>
40602 * gcc.cc (process_command): Update copyright notice dates.
40603 * gcov-dump.cc (print_version): Ditto.
40604 * gcov.cc (print_version): Ditto.
40605 * gcov-tool.cc (print_version): Ditto.
40606 * gengtype.cc (create_file): Ditto.
40607 * doc/cpp.texi: Bump @copying's copyright year.
40608 * doc/cppinternals.texi: Ditto.
40609 * doc/gcc.texi: Ditto.
40610 * doc/gccint.texi: Ditto.
40611 * doc/gcov.texi: Ditto.
40612 * doc/install.texi: Ditto.
40613 * doc/invoke.texi: Ditto.
40615 2023-01-01 Roger Sayle <roger@nextmovesoftware.com>
40616 Uroš Bizjak <ubizjak@gmail.com>
40618 * config/i386/i386.md (extendditi2): New define_insn.
40619 (define_split): Use DWIH mode iterator to treat new extendditi2
40620 identically to existing extendsidi2_1.
40621 (define_peephole2): Likewise.
40622 (define_peephole2): Likewise.
40623 (define_Split): Likewise.
40626 Copyright (C) 2023 Free Software Foundation, Inc.
40628 Copying and distribution of this file, with or without modification,
40629 are permitted in any medium without royalty provided the copyright
40630 notice and this notice are preserved.