1 /* { dg-do compile } */
2 /* { dg-options "-O2 -mcpu=thunderx+nofp -march=armv8-a" } */
6 /* Unless we do something about re-laying out the SIMD builtin types
7 this testcase ICEs during expansion of the crypto builtin. */
9 __attribute__ ((target ("cpu=cortex-a57+crypto")))
11 test_vsha1cq_u32 (uint32x4_t hash_abcd
, uint32_t hash_e
, uint32x4_t wk
)
13 return vsha1cq_u32 (hash_abcd
, hash_e
, wk
);
16 /* This one should be compiled for thunderx with no fp. */