1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998
3 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* stdio.h must precede rtl.h for FFS. */
29 #include "hard-reg-set.h"
30 #include "basic-block.h"
33 #include "insn-config.h"
42 /* The basic idea of common subexpression elimination is to go
43 through the code, keeping a record of expressions that would
44 have the same value at the current scan point, and replacing
45 expressions encountered with the cheapest equivalent expression.
47 It is too complicated to keep track of the different possibilities
48 when control paths merge in this code; so, at each label, we forget all
49 that is known and start fresh. This can be described as processing each
50 extended basic block separately. We have a separate pass to perform
53 Note CSE can turn a conditional or computed jump into a nop or
54 an unconditional jump. When this occurs we arrange to run the jump
55 optimizer after CSE to delete the unreachable code.
57 We use two data structures to record the equivalent expressions:
58 a hash table for most expressions, and a vector of "quantity
59 numbers" to record equivalent (pseudo) registers.
61 The use of the special data structure for registers is desirable
62 because it is faster. It is possible because registers references
63 contain a fairly small number, the register number, taken from
64 a contiguously allocated series, and two register references are
65 identical if they have the same number. General expressions
66 do not have any such thing, so the only way to retrieve the
67 information recorded on an expression other than a register
68 is to keep it in a hash table.
70 Registers and "quantity numbers":
72 At the start of each basic block, all of the (hardware and pseudo)
73 registers used in the function are given distinct quantity
74 numbers to indicate their contents. During scan, when the code
75 copies one register into another, we copy the quantity number.
76 When a register is loaded in any other way, we allocate a new
77 quantity number to describe the value generated by this operation.
78 `reg_qty' records what quantity a register is currently thought
81 All real quantity numbers are greater than or equal to `max_reg'.
82 If register N has not been assigned a quantity, reg_qty[N] will equal N.
84 Quantity numbers below `max_reg' do not exist and none of the `qty_table'
85 entries should be referenced with an index below `max_reg'.
87 We also maintain a bidirectional chain of registers for each
88 quantity number. The `qty_table` members `first_reg' and `last_reg',
89 and `reg_eqv_table' members `next' and `prev' hold these chains.
91 The first register in a chain is the one whose lifespan is least local.
92 Among equals, it is the one that was seen first.
93 We replace any equivalent register with that one.
95 If two registers have the same quantity number, it must be true that
96 REG expressions with qty_table `mode' must be in the hash table for both
97 registers and must be in the same class.
99 The converse is not true. Since hard registers may be referenced in
100 any mode, two REG expressions might be equivalent in the hash table
101 but not have the same quantity number if the quantity number of one
102 of the registers is not the same mode as those expressions.
104 Constants and quantity numbers
106 When a quantity has a known constant value, that value is stored
107 in the appropriate qty_table `const_rtx'. This is in addition to
108 putting the constant in the hash table as is usual for non-regs.
110 Whether a reg or a constant is preferred is determined by the configuration
111 macro CONST_COSTS and will often depend on the constant value. In any
112 event, expressions containing constants can be simplified, by fold_rtx.
114 When a quantity has a known nearly constant value (such as an address
115 of a stack slot), that value is stored in the appropriate qty_table
118 Integer constants don't have a machine mode. However, cse
119 determines the intended machine mode from the destination
120 of the instruction that moves the constant. The machine mode
121 is recorded in the hash table along with the actual RTL
122 constant expression so that different modes are kept separate.
126 To record known equivalences among expressions in general
127 we use a hash table called `table'. It has a fixed number of buckets
128 that contain chains of `struct table_elt' elements for expressions.
129 These chains connect the elements whose expressions have the same
132 Other chains through the same elements connect the elements which
133 currently have equivalent values.
135 Register references in an expression are canonicalized before hashing
136 the expression. This is done using `reg_qty' and qty_table `first_reg'.
137 The hash code of a register reference is computed using the quantity
138 number, not the register number.
140 When the value of an expression changes, it is necessary to remove from the
141 hash table not just that expression but all expressions whose values
142 could be different as a result.
144 1. If the value changing is in memory, except in special cases
145 ANYTHING referring to memory could be changed. That is because
146 nobody knows where a pointer does not point.
147 The function `invalidate_memory' removes what is necessary.
149 The special cases are when the address is constant or is
150 a constant plus a fixed register such as the frame pointer
151 or a static chain pointer. When such addresses are stored in,
152 we can tell exactly which other such addresses must be invalidated
153 due to overlap. `invalidate' does this.
154 All expressions that refer to non-constant
155 memory addresses are also invalidated. `invalidate_memory' does this.
157 2. If the value changing is a register, all expressions
158 containing references to that register, and only those,
161 Because searching the entire hash table for expressions that contain
162 a register is very slow, we try to figure out when it isn't necessary.
163 Precisely, this is necessary only when expressions have been
164 entered in the hash table using this register, and then the value has
165 changed, and then another expression wants to be added to refer to
166 the register's new value. This sequence of circumstances is rare
167 within any one basic block.
169 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
170 reg_tick[i] is incremented whenever a value is stored in register i.
171 reg_in_table[i] holds -1 if no references to register i have been
172 entered in the table; otherwise, it contains the value reg_tick[i] had
173 when the references were entered. If we want to enter a reference
174 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
175 Until we want to enter a new entry, the mere fact that the two vectors
176 don't match makes the entries be ignored if anyone tries to match them.
178 Registers themselves are entered in the hash table as well as in
179 the equivalent-register chains. However, the vectors `reg_tick'
180 and `reg_in_table' do not apply to expressions which are simple
181 register references. These expressions are removed from the table
182 immediately when they become invalid, and this can be done even if
183 we do not immediately search for all the expressions that refer to
186 A CLOBBER rtx in an instruction invalidates its operand for further
187 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
188 invalidates everything that resides in memory.
192 Constant expressions that differ only by an additive integer
193 are called related. When a constant expression is put in
194 the table, the related expression with no constant term
195 is also entered. These are made to point at each other
196 so that it is possible to find out if there exists any
197 register equivalent to an expression related to a given expression. */
199 /* One plus largest register number used in this function. */
203 /* One plus largest instruction UID used in this function at time of
206 static int max_insn_uid
;
208 /* Length of qty_table vector. We know in advance we will not need
209 a quantity number this big. */
213 /* Next quantity number to be allocated.
214 This is 1 + the largest number needed so far. */
218 /* Per-qty information tracking.
220 `first_reg' and `last_reg' track the head and tail of the
221 chain of registers which currently contain this quantity.
223 `mode' contains the machine mode of this quantity.
225 `const_rtx' holds the rtx of the constant value of this
226 quantity, if known. A summations of the frame/arg pointer
227 and a constant can also be entered here. When this holds
228 a known value, `const_insn' is the insn which stored the
231 `comparison_{code,const,qty}' are used to track when a
232 comparison between a quantity and some constant or register has
233 been passed. In such a case, we know the results of the comparison
234 in case we see it again. These members record a comparison that
235 is known to be true. `comparison_code' holds the rtx code of such
236 a comparison, else it is set to UNKNOWN and the other two
237 comparison members are undefined. `comparison_const' holds
238 the constant being compared against, or zero if the comparison
239 is not against a constant. `comparison_qty' holds the quantity
240 being compared against when the result is known. If the comparison
241 is not with a register, `comparison_qty' is -1. */
243 struct qty_table_elem
247 rtx comparison_const
;
249 unsigned int first_reg
, last_reg
;
250 enum machine_mode mode
;
251 enum rtx_code comparison_code
;
254 /* The table of all qtys, indexed by qty number. */
255 static struct qty_table_elem
*qty_table
;
258 /* For machines that have a CC0, we do not record its value in the hash
259 table since its use is guaranteed to be the insn immediately following
260 its definition and any other insn is presumed to invalidate it.
262 Instead, we store below the value last assigned to CC0. If it should
263 happen to be a constant, it is stored in preference to the actual
264 assigned value. In case it is a constant, we store the mode in which
265 the constant should be interpreted. */
267 static rtx prev_insn_cc0
;
268 static enum machine_mode prev_insn_cc0_mode
;
271 /* Previous actual insn. 0 if at first insn of basic block. */
273 static rtx prev_insn
;
275 /* Insn being scanned. */
277 static rtx this_insn
;
279 /* Index by register number, gives the number of the next (or
280 previous) register in the chain of registers sharing the same
283 Or -1 if this register is at the end of the chain.
285 If reg_qty[N] == N, reg_eqv_table[N].next is undefined. */
287 /* Per-register equivalence chain. */
293 /* The table of all register equivalence chains. */
294 static struct reg_eqv_elem
*reg_eqv_table
;
298 /* Next in hash chain. */
299 struct cse_reg_info
*hash_next
;
301 /* The next cse_reg_info structure in the free or used list. */
302 struct cse_reg_info
*next
;
307 /* The quantity number of the register's current contents. */
310 /* The number of times the register has been altered in the current
314 /* The REG_TICK value at which rtx's containing this register are
315 valid in the hash table. If this does not equal the current
316 reg_tick value, such expressions existing in the hash table are
321 /* A free list of cse_reg_info entries. */
322 static struct cse_reg_info
*cse_reg_info_free_list
;
324 /* A used list of cse_reg_info entries. */
325 static struct cse_reg_info
*cse_reg_info_used_list
;
326 static struct cse_reg_info
*cse_reg_info_used_list_end
;
328 /* A mapping from registers to cse_reg_info data structures. */
329 #define REGHASH_SHIFT 7
330 #define REGHASH_SIZE (1 << REGHASH_SHIFT)
331 #define REGHASH_MASK (REGHASH_SIZE - 1)
332 static struct cse_reg_info
*reg_hash
[REGHASH_SIZE
];
334 #define REGHASH_FN(REGNO) \
335 (((REGNO) ^ ((REGNO) >> REGHASH_SHIFT)) & REGHASH_MASK)
337 /* The last lookup we did into the cse_reg_info_tree. This allows us
338 to cache repeated lookups. */
339 static unsigned int cached_regno
;
340 static struct cse_reg_info
*cached_cse_reg_info
;
342 /* A HARD_REG_SET containing all the hard registers for which there is
343 currently a REG expression in the hash table. Note the difference
344 from the above variables, which indicate if the REG is mentioned in some
345 expression in the table. */
347 static HARD_REG_SET hard_regs_in_table
;
349 /* CUID of insn that starts the basic block currently being cse-processed. */
351 static int cse_basic_block_start
;
353 /* CUID of insn that ends the basic block currently being cse-processed. */
355 static int cse_basic_block_end
;
357 /* Vector mapping INSN_UIDs to cuids.
358 The cuids are like uids but increase monotonically always.
359 We use them to see whether a reg is used outside a given basic block. */
361 static int *uid_cuid
;
363 /* Highest UID in UID_CUID. */
366 /* Get the cuid of an insn. */
368 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
370 /* Nonzero if this pass has made changes, and therefore it's
371 worthwhile to run the garbage collector. */
373 static int cse_altered
;
375 /* Nonzero if cse has altered conditional jump insns
376 in such a way that jump optimization should be redone. */
378 static int cse_jumps_altered
;
380 /* Nonzero if we put a LABEL_REF into the hash table for an INSN without a
381 REG_LABEL, we have to rerun jump after CSE to put in the note. */
382 static int recorded_label_ref
;
384 /* canon_hash stores 1 in do_not_record
385 if it notices a reference to CC0, PC, or some other volatile
388 static int do_not_record
;
390 #ifdef LOAD_EXTEND_OP
392 /* Scratch rtl used when looking for load-extended copy of a MEM. */
393 static rtx memory_extend_rtx
;
396 /* canon_hash stores 1 in hash_arg_in_memory
397 if it notices a reference to memory within the expression being hashed. */
399 static int hash_arg_in_memory
;
401 /* The hash table contains buckets which are chains of `struct table_elt's,
402 each recording one expression's information.
403 That expression is in the `exp' field.
405 The canon_exp field contains a canonical (from the point of view of
406 alias analysis) version of the `exp' field.
408 Those elements with the same hash code are chained in both directions
409 through the `next_same_hash' and `prev_same_hash' fields.
411 Each set of expressions with equivalent values
412 are on a two-way chain through the `next_same_value'
413 and `prev_same_value' fields, and all point with
414 the `first_same_value' field at the first element in
415 that chain. The chain is in order of increasing cost.
416 Each element's cost value is in its `cost' field.
418 The `in_memory' field is nonzero for elements that
419 involve any reference to memory. These elements are removed
420 whenever a write is done to an unidentified location in memory.
421 To be safe, we assume that a memory address is unidentified unless
422 the address is either a symbol constant or a constant plus
423 the frame pointer or argument pointer.
425 The `related_value' field is used to connect related expressions
426 (that differ by adding an integer).
427 The related expressions are chained in a circular fashion.
428 `related_value' is zero for expressions for which this
431 The `cost' field stores the cost of this element's expression.
432 The `regcost' field stores the value returned by approx_reg_cost for
433 this element's expression.
435 The `is_const' flag is set if the element is a constant (including
438 The `flag' field is used as a temporary during some search routines.
440 The `mode' field is usually the same as GET_MODE (`exp'), but
441 if `exp' is a CONST_INT and has no machine mode then the `mode'
442 field is the mode it was being used as. Each constant is
443 recorded separately for each mode it is used with. */
449 struct table_elt
*next_same_hash
;
450 struct table_elt
*prev_same_hash
;
451 struct table_elt
*next_same_value
;
452 struct table_elt
*prev_same_value
;
453 struct table_elt
*first_same_value
;
454 struct table_elt
*related_value
;
457 enum machine_mode mode
;
463 /* We don't want a lot of buckets, because we rarely have very many
464 things stored in the hash table, and a lot of buckets slows
465 down a lot of loops that happen frequently. */
467 #define HASH_SIZE (1 << HASH_SHIFT)
468 #define HASH_MASK (HASH_SIZE - 1)
470 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
471 register (hard registers may require `do_not_record' to be set). */
474 ((GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
475 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
476 : canon_hash (X, M)) & HASH_MASK)
478 /* Determine whether register number N is considered a fixed register for the
479 purpose of approximating register costs.
480 It is desirable to replace other regs with fixed regs, to reduce need for
482 A reg wins if it is either the frame pointer or designated as fixed. */
483 #define FIXED_REGNO_P(N) \
484 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
485 || fixed_regs[N] || global_regs[N])
487 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
488 hard registers and pointers into the frame are the cheapest with a cost
489 of 0. Next come pseudos with a cost of one and other hard registers with
490 a cost of 2. Aside from these special cases, call `rtx_cost'. */
492 #define CHEAP_REGNO(N) \
493 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
494 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
495 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
496 || ((N) < FIRST_PSEUDO_REGISTER \
497 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
499 #define COST(X) (GET_CODE (X) == REG ? 0 : notreg_cost (X, SET))
500 #define COST_IN(X,OUTER) (GET_CODE (X) == REG ? 0 : notreg_cost (X, OUTER))
502 /* Get the info associated with register N. */
504 #define GET_CSE_REG_INFO(N) \
505 (((N) == cached_regno && cached_cse_reg_info) \
506 ? cached_cse_reg_info : get_cse_reg_info ((N)))
508 /* Get the number of times this register has been updated in this
511 #define REG_TICK(N) ((GET_CSE_REG_INFO (N))->reg_tick)
513 /* Get the point at which REG was recorded in the table. */
515 #define REG_IN_TABLE(N) ((GET_CSE_REG_INFO (N))->reg_in_table)
517 /* Get the quantity number for REG. */
519 #define REG_QTY(N) ((GET_CSE_REG_INFO (N))->reg_qty)
521 /* Determine if the quantity number for register X represents a valid index
522 into the qty_table. */
524 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) != (int) (N))
526 static struct table_elt
*table
[HASH_SIZE
];
528 /* Chain of `struct table_elt's made so far for this function
529 but currently removed from the table. */
531 static struct table_elt
*free_element_chain
;
533 /* Number of `struct table_elt' structures made so far for this function. */
535 static int n_elements_made
;
537 /* Maximum value `n_elements_made' has had so far in this compilation
538 for functions previously processed. */
540 static int max_elements_made
;
542 /* Surviving equivalence class when two equivalence classes are merged
543 by recording the effects of a jump in the last insn. Zero if the
544 last insn was not a conditional jump. */
546 static struct table_elt
*last_jump_equiv_class
;
548 /* Set to the cost of a constant pool reference if one was found for a
549 symbolic constant. If this was found, it means we should try to
550 convert constants into constant pool entries if they don't fit in
553 static int constant_pool_entries_cost
;
555 /* Define maximum length of a branch path. */
557 #define PATHLENGTH 10
559 /* This data describes a block that will be processed by cse_basic_block. */
561 struct cse_basic_block_data
563 /* Lowest CUID value of insns in block. */
565 /* Highest CUID value of insns in block. */
567 /* Total number of SETs in block. */
569 /* Last insn in the block. */
571 /* Size of current branch path, if any. */
573 /* Current branch path, indicating which branches will be taken. */
576 /* The branch insn. */
578 /* Whether it should be taken or not. AROUND is the same as taken
579 except that it is used when the destination label is not preceded
581 enum taken
{TAKEN
, NOT_TAKEN
, AROUND
} status
;
585 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
586 virtual regs here because the simplify_*_operation routines are called
587 by integrate.c, which is called before virtual register instantiation.
589 ?!? FIXED_BASE_PLUS_P and NONZERO_BASE_PLUS_P need to move into
590 a header file so that their definitions can be shared with the
591 simplification routines in simplify-rtx.c. Until then, do not
592 change these macros without also changing the copy in simplify-rtx.c. */
594 #define FIXED_BASE_PLUS_P(X) \
595 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
596 || ((X) == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])\
597 || (X) == virtual_stack_vars_rtx \
598 || (X) == virtual_incoming_args_rtx \
599 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
600 && (XEXP (X, 0) == frame_pointer_rtx \
601 || XEXP (X, 0) == hard_frame_pointer_rtx \
602 || ((X) == arg_pointer_rtx \
603 && fixed_regs[ARG_POINTER_REGNUM]) \
604 || XEXP (X, 0) == virtual_stack_vars_rtx \
605 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
606 || GET_CODE (X) == ADDRESSOF)
608 /* Similar, but also allows reference to the stack pointer.
610 This used to include FIXED_BASE_PLUS_P, however, we can't assume that
611 arg_pointer_rtx by itself is nonzero, because on at least one machine,
612 the i960, the arg pointer is zero when it is unused. */
614 #define NONZERO_BASE_PLUS_P(X) \
615 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
616 || (X) == virtual_stack_vars_rtx \
617 || (X) == virtual_incoming_args_rtx \
618 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
619 && (XEXP (X, 0) == frame_pointer_rtx \
620 || XEXP (X, 0) == hard_frame_pointer_rtx \
621 || ((X) == arg_pointer_rtx \
622 && fixed_regs[ARG_POINTER_REGNUM]) \
623 || XEXP (X, 0) == virtual_stack_vars_rtx \
624 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
625 || (X) == stack_pointer_rtx \
626 || (X) == virtual_stack_dynamic_rtx \
627 || (X) == virtual_outgoing_args_rtx \
628 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
629 && (XEXP (X, 0) == stack_pointer_rtx \
630 || XEXP (X, 0) == virtual_stack_dynamic_rtx \
631 || XEXP (X, 0) == virtual_outgoing_args_rtx)) \
632 || GET_CODE (X) == ADDRESSOF)
634 static int notreg_cost
PARAMS ((rtx
, enum rtx_code
));
635 static int approx_reg_cost_1
PARAMS ((rtx
*, void *));
636 static int approx_reg_cost
PARAMS ((rtx
));
637 static int preferrable
PARAMS ((int, int, int, int));
638 static void new_basic_block
PARAMS ((void));
639 static void make_new_qty
PARAMS ((unsigned int, enum machine_mode
));
640 static void make_regs_eqv
PARAMS ((unsigned int, unsigned int));
641 static void delete_reg_equiv
PARAMS ((unsigned int));
642 static int mention_regs
PARAMS ((rtx
));
643 static int insert_regs
PARAMS ((rtx
, struct table_elt
*, int));
644 static void remove_from_table
PARAMS ((struct table_elt
*, unsigned));
645 static struct table_elt
*lookup
PARAMS ((rtx
, unsigned, enum machine_mode
)),
646 *lookup_for_remove
PARAMS ((rtx
, unsigned, enum machine_mode
));
647 static rtx lookup_as_function
PARAMS ((rtx
, enum rtx_code
));
648 static struct table_elt
*insert
PARAMS ((rtx
, struct table_elt
*, unsigned,
650 static void merge_equiv_classes
PARAMS ((struct table_elt
*,
651 struct table_elt
*));
652 static void invalidate
PARAMS ((rtx
, enum machine_mode
));
653 static int cse_rtx_varies_p
PARAMS ((rtx
, int));
654 static void remove_invalid_refs
PARAMS ((unsigned int));
655 static void remove_invalid_subreg_refs
PARAMS ((unsigned int, unsigned int,
657 static void rehash_using_reg
PARAMS ((rtx
));
658 static void invalidate_memory
PARAMS ((void));
659 static void invalidate_for_call
PARAMS ((void));
660 static rtx use_related_value
PARAMS ((rtx
, struct table_elt
*));
661 static unsigned canon_hash
PARAMS ((rtx
, enum machine_mode
));
662 static unsigned canon_hash_string
PARAMS ((const char *));
663 static unsigned safe_hash
PARAMS ((rtx
, enum machine_mode
));
664 static int exp_equiv_p
PARAMS ((rtx
, rtx
, int, int));
665 static rtx canon_reg
PARAMS ((rtx
, rtx
));
666 static void find_best_addr
PARAMS ((rtx
, rtx
*, enum machine_mode
));
667 static enum rtx_code find_comparison_args
PARAMS ((enum rtx_code
, rtx
*, rtx
*,
669 enum machine_mode
*));
670 static rtx fold_rtx
PARAMS ((rtx
, rtx
));
671 static rtx equiv_constant
PARAMS ((rtx
));
672 static void record_jump_equiv
PARAMS ((rtx
, int));
673 static void record_jump_cond
PARAMS ((enum rtx_code
, enum machine_mode
,
675 static void cse_insn
PARAMS ((rtx
, rtx
));
676 static int addr_affects_sp_p
PARAMS ((rtx
));
677 static void invalidate_from_clobbers
PARAMS ((rtx
));
678 static rtx cse_process_notes
PARAMS ((rtx
, rtx
));
679 static void cse_around_loop
PARAMS ((rtx
));
680 static void invalidate_skipped_set
PARAMS ((rtx
, rtx
, void *));
681 static void invalidate_skipped_block
PARAMS ((rtx
));
682 static void cse_check_loop_start
PARAMS ((rtx
, rtx
, void *));
683 static void cse_set_around_loop
PARAMS ((rtx
, rtx
, rtx
));
684 static rtx cse_basic_block
PARAMS ((rtx
, rtx
, struct branch_path
*, int));
685 static void count_reg_usage
PARAMS ((rtx
, int *, rtx
, int));
686 static int check_for_label_ref
PARAMS ((rtx
*, void *));
687 extern void dump_class
PARAMS ((struct table_elt
*));
688 static struct cse_reg_info
* get_cse_reg_info
PARAMS ((unsigned int));
689 static int check_dependence
PARAMS ((rtx
*, void *));
691 static void flush_hash_table
PARAMS ((void));
692 static bool insn_live_p
PARAMS ((rtx
, int *));
693 static bool set_live_p
PARAMS ((rtx
, rtx
, int *));
694 static bool dead_libcall_p
PARAMS ((rtx
, int *));
696 /* Dump the expressions in the equivalence class indicated by CLASSP.
697 This function is used only for debugging. */
700 struct table_elt
*classp
;
702 struct table_elt
*elt
;
704 fprintf (stderr
, "Equivalence chain for ");
705 print_rtl (stderr
, classp
->exp
);
706 fprintf (stderr
, ": \n");
708 for (elt
= classp
->first_same_value
; elt
; elt
= elt
->next_same_value
)
710 print_rtl (stderr
, elt
->exp
);
711 fprintf (stderr
, "\n");
715 /* Subroutine of approx_reg_cost; called through for_each_rtx. */
718 approx_reg_cost_1 (xp
, data
)
725 if (x
&& GET_CODE (x
) == REG
)
727 unsigned int regno
= REGNO (x
);
729 if (! CHEAP_REGNO (regno
))
731 if (regno
< FIRST_PSEUDO_REGISTER
)
733 if (SMALL_REGISTER_CLASSES
)
745 /* Return an estimate of the cost of the registers used in an rtx.
746 This is mostly the number of different REG expressions in the rtx;
747 however for some exceptions like fixed registers we use a cost of
748 0. If any other hard register reference occurs, return MAX_COST. */
756 if (for_each_rtx (&x
, approx_reg_cost_1
, (void *) &cost
))
762 /* Return a negative value if an rtx A, whose costs are given by COST_A
763 and REGCOST_A, is more desirable than an rtx B.
764 Return a positive value if A is less desirable, or 0 if the two are
767 preferrable (cost_a
, regcost_a
, cost_b
, regcost_b
)
768 int cost_a
, regcost_a
, cost_b
, regcost_b
;
770 /* First, get rid of a cases involving expressions that are entirely
772 if (cost_a
!= cost_b
)
774 if (cost_a
== MAX_COST
)
776 if (cost_b
== MAX_COST
)
780 /* Avoid extending lifetimes of hardregs. */
781 if (regcost_a
!= regcost_b
)
783 if (regcost_a
== MAX_COST
)
785 if (regcost_b
== MAX_COST
)
789 /* Normal operation costs take precedence. */
790 if (cost_a
!= cost_b
)
791 return cost_a
- cost_b
;
792 /* Only if these are identical consider effects on register pressure. */
793 if (regcost_a
!= regcost_b
)
794 return regcost_a
- regcost_b
;
798 /* Internal function, to compute cost when X is not a register; called
799 from COST macro to keep it simple. */
802 notreg_cost (x
, outer
)
806 return ((GET_CODE (x
) == SUBREG
807 && GET_CODE (SUBREG_REG (x
)) == REG
808 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_INT
809 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x
))) == MODE_INT
810 && (GET_MODE_SIZE (GET_MODE (x
))
811 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
812 && subreg_lowpart_p (x
)
813 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x
)),
814 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
)))))
816 : rtx_cost (x
, outer
) * 2);
819 /* Return an estimate of the cost of computing rtx X.
820 One use is in cse, to decide which expression to keep in the hash table.
821 Another is in rtl generation, to pick the cheapest way to multiply.
822 Other uses like the latter are expected in the future. */
825 rtx_cost (x
, outer_code
)
827 enum rtx_code outer_code ATTRIBUTE_UNUSED
;
837 /* Compute the default costs of certain things.
838 Note that RTX_COSTS can override the defaults. */
844 total
= COSTS_N_INSNS (5);
850 total
= COSTS_N_INSNS (7);
853 /* Used in loop.c and combine.c as a marker. */
857 total
= COSTS_N_INSNS (1);
866 /* If we can't tie these modes, make this expensive. The larger
867 the mode, the more expensive it is. */
868 if (! MODES_TIEABLE_P (GET_MODE (x
), GET_MODE (SUBREG_REG (x
))))
869 return COSTS_N_INSNS (2
870 + GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
);
874 RTX_COSTS (x
, code
, outer_code
);
877 CONST_COSTS (x
, code
, outer_code
);
881 #ifdef DEFAULT_RTX_COSTS
882 DEFAULT_RTX_COSTS (x
, code
, outer_code
);
887 /* Sum the costs of the sub-rtx's, plus cost of this operation,
888 which is already in total. */
890 fmt
= GET_RTX_FORMAT (code
);
891 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
893 total
+= rtx_cost (XEXP (x
, i
), code
);
894 else if (fmt
[i
] == 'E')
895 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
896 total
+= rtx_cost (XVECEXP (x
, i
, j
), code
);
901 /* Return cost of address expression X.
902 Expect that X is properly formed address reference. */
905 address_cost (x
, mode
)
907 enum machine_mode mode
;
909 /* The ADDRESS_COST macro does not deal with ADDRESSOF nodes. But,
910 during CSE, such nodes are present. Using an ADDRESSOF node which
911 refers to the address of a REG is a good thing because we can then
912 turn (MEM (ADDRESSSOF (REG))) into just plain REG. */
914 if (GET_CODE (x
) == ADDRESSOF
&& REG_P (XEXP ((x
), 0)))
917 /* We may be asked for cost of various unusual addresses, such as operands
918 of push instruction. It is not worthwhile to complicate writing
919 of ADDRESS_COST macro by such cases. */
921 if (!memory_address_p (mode
, x
))
924 return ADDRESS_COST (x
);
926 return rtx_cost (x
, MEM
);
931 static struct cse_reg_info
*
932 get_cse_reg_info (regno
)
935 struct cse_reg_info
**hash_head
= ®_hash
[REGHASH_FN (regno
)];
936 struct cse_reg_info
*p
;
938 for (p
= *hash_head
; p
!= NULL
; p
= p
->hash_next
)
939 if (p
->regno
== regno
)
944 /* Get a new cse_reg_info structure. */
945 if (cse_reg_info_free_list
)
947 p
= cse_reg_info_free_list
;
948 cse_reg_info_free_list
= p
->next
;
951 p
= (struct cse_reg_info
*) xmalloc (sizeof (struct cse_reg_info
));
953 /* Insert into hash table. */
954 p
->hash_next
= *hash_head
;
959 p
->reg_in_table
= -1;
962 p
->next
= cse_reg_info_used_list
;
963 cse_reg_info_used_list
= p
;
964 if (!cse_reg_info_used_list_end
)
965 cse_reg_info_used_list_end
= p
;
968 /* Cache this lookup; we tend to be looking up information about the
969 same register several times in a row. */
970 cached_regno
= regno
;
971 cached_cse_reg_info
= p
;
976 /* Clear the hash table and initialize each register with its own quantity,
977 for a new basic block. */
986 /* Clear out hash table state for this pass. */
988 memset ((char *) reg_hash
, 0, sizeof reg_hash
);
990 if (cse_reg_info_used_list
)
992 cse_reg_info_used_list_end
->next
= cse_reg_info_free_list
;
993 cse_reg_info_free_list
= cse_reg_info_used_list
;
994 cse_reg_info_used_list
= cse_reg_info_used_list_end
= 0;
996 cached_cse_reg_info
= 0;
998 CLEAR_HARD_REG_SET (hard_regs_in_table
);
1000 /* The per-quantity values used to be initialized here, but it is
1001 much faster to initialize each as it is made in `make_new_qty'. */
1003 for (i
= 0; i
< HASH_SIZE
; i
++)
1005 struct table_elt
*first
;
1010 struct table_elt
*last
= first
;
1014 while (last
->next_same_hash
!= NULL
)
1015 last
= last
->next_same_hash
;
1017 /* Now relink this hash entire chain into
1018 the free element list. */
1020 last
->next_same_hash
= free_element_chain
;
1021 free_element_chain
= first
;
1032 /* Say that register REG contains a quantity in mode MODE not in any
1033 register before and initialize that quantity. */
1036 make_new_qty (reg
, mode
)
1038 enum machine_mode mode
;
1041 struct qty_table_elem
*ent
;
1042 struct reg_eqv_elem
*eqv
;
1044 if (next_qty
>= max_qty
)
1047 q
= REG_QTY (reg
) = next_qty
++;
1048 ent
= &qty_table
[q
];
1049 ent
->first_reg
= reg
;
1050 ent
->last_reg
= reg
;
1052 ent
->const_rtx
= ent
->const_insn
= NULL_RTX
;
1053 ent
->comparison_code
= UNKNOWN
;
1055 eqv
= ®_eqv_table
[reg
];
1056 eqv
->next
= eqv
->prev
= -1;
1059 /* Make reg NEW equivalent to reg OLD.
1060 OLD is not changing; NEW is. */
1063 make_regs_eqv (new, old
)
1064 unsigned int new, old
;
1066 unsigned int lastr
, firstr
;
1067 int q
= REG_QTY (old
);
1068 struct qty_table_elem
*ent
;
1070 ent
= &qty_table
[q
];
1072 /* Nothing should become eqv until it has a "non-invalid" qty number. */
1073 if (! REGNO_QTY_VALID_P (old
))
1077 firstr
= ent
->first_reg
;
1078 lastr
= ent
->last_reg
;
1080 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
1081 hard regs. Among pseudos, if NEW will live longer than any other reg
1082 of the same qty, and that is beyond the current basic block,
1083 make it the new canonical replacement for this qty. */
1084 if (! (firstr
< FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (firstr
))
1085 /* Certain fixed registers might be of the class NO_REGS. This means
1086 that not only can they not be allocated by the compiler, but
1087 they cannot be used in substitutions or canonicalizations
1089 && (new >= FIRST_PSEUDO_REGISTER
|| REGNO_REG_CLASS (new) != NO_REGS
)
1090 && ((new < FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (new))
1091 || (new >= FIRST_PSEUDO_REGISTER
1092 && (firstr
< FIRST_PSEUDO_REGISTER
1093 || ((uid_cuid
[REGNO_LAST_UID (new)] > cse_basic_block_end
1094 || (uid_cuid
[REGNO_FIRST_UID (new)]
1095 < cse_basic_block_start
))
1096 && (uid_cuid
[REGNO_LAST_UID (new)]
1097 > uid_cuid
[REGNO_LAST_UID (firstr
)]))))))
1099 reg_eqv_table
[firstr
].prev
= new;
1100 reg_eqv_table
[new].next
= firstr
;
1101 reg_eqv_table
[new].prev
= -1;
1102 ent
->first_reg
= new;
1106 /* If NEW is a hard reg (known to be non-fixed), insert at end.
1107 Otherwise, insert before any non-fixed hard regs that are at the
1108 end. Registers of class NO_REGS cannot be used as an
1109 equivalent for anything. */
1110 while (lastr
< FIRST_PSEUDO_REGISTER
&& reg_eqv_table
[lastr
].prev
>= 0
1111 && (REGNO_REG_CLASS (lastr
) == NO_REGS
|| ! FIXED_REGNO_P (lastr
))
1112 && new >= FIRST_PSEUDO_REGISTER
)
1113 lastr
= reg_eqv_table
[lastr
].prev
;
1114 reg_eqv_table
[new].next
= reg_eqv_table
[lastr
].next
;
1115 if (reg_eqv_table
[lastr
].next
>= 0)
1116 reg_eqv_table
[reg_eqv_table
[lastr
].next
].prev
= new;
1118 qty_table
[q
].last_reg
= new;
1119 reg_eqv_table
[lastr
].next
= new;
1120 reg_eqv_table
[new].prev
= lastr
;
1124 /* Remove REG from its equivalence class. */
1127 delete_reg_equiv (reg
)
1130 struct qty_table_elem
*ent
;
1131 int q
= REG_QTY (reg
);
1134 /* If invalid, do nothing. */
1138 ent
= &qty_table
[q
];
1140 p
= reg_eqv_table
[reg
].prev
;
1141 n
= reg_eqv_table
[reg
].next
;
1144 reg_eqv_table
[n
].prev
= p
;
1148 reg_eqv_table
[p
].next
= n
;
1152 REG_QTY (reg
) = reg
;
1155 /* Remove any invalid expressions from the hash table
1156 that refer to any of the registers contained in expression X.
1158 Make sure that newly inserted references to those registers
1159 as subexpressions will be considered valid.
1161 mention_regs is not called when a register itself
1162 is being stored in the table.
1164 Return 1 if we have done something that may have changed the hash code
1179 code
= GET_CODE (x
);
1182 unsigned int regno
= REGNO (x
);
1183 unsigned int endregno
1184 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
1185 : HARD_REGNO_NREGS (regno
, GET_MODE (x
)));
1188 for (i
= regno
; i
< endregno
; i
++)
1190 if (REG_IN_TABLE (i
) >= 0 && REG_IN_TABLE (i
) != REG_TICK (i
))
1191 remove_invalid_refs (i
);
1193 REG_IN_TABLE (i
) = REG_TICK (i
);
1199 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1200 pseudo if they don't use overlapping words. We handle only pseudos
1201 here for simplicity. */
1202 if (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
1203 && REGNO (SUBREG_REG (x
)) >= FIRST_PSEUDO_REGISTER
)
1205 unsigned int i
= REGNO (SUBREG_REG (x
));
1207 if (REG_IN_TABLE (i
) >= 0 && REG_IN_TABLE (i
) != REG_TICK (i
))
1209 /* If reg_tick has been incremented more than once since
1210 reg_in_table was last set, that means that the entire
1211 register has been set before, so discard anything memorized
1212 for the entire register, including all SUBREG expressions. */
1213 if (REG_IN_TABLE (i
) != REG_TICK (i
) - 1)
1214 remove_invalid_refs (i
);
1216 remove_invalid_subreg_refs (i
, SUBREG_BYTE (x
), GET_MODE (x
));
1219 REG_IN_TABLE (i
) = REG_TICK (i
);
1223 /* If X is a comparison or a COMPARE and either operand is a register
1224 that does not have a quantity, give it one. This is so that a later
1225 call to record_jump_equiv won't cause X to be assigned a different
1226 hash code and not found in the table after that call.
1228 It is not necessary to do this here, since rehash_using_reg can
1229 fix up the table later, but doing this here eliminates the need to
1230 call that expensive function in the most common case where the only
1231 use of the register is in the comparison. */
1233 if (code
== COMPARE
|| GET_RTX_CLASS (code
) == '<')
1235 if (GET_CODE (XEXP (x
, 0)) == REG
1236 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0))))
1237 if (insert_regs (XEXP (x
, 0), NULL
, 0))
1239 rehash_using_reg (XEXP (x
, 0));
1243 if (GET_CODE (XEXP (x
, 1)) == REG
1244 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 1))))
1245 if (insert_regs (XEXP (x
, 1), NULL
, 0))
1247 rehash_using_reg (XEXP (x
, 1));
1252 fmt
= GET_RTX_FORMAT (code
);
1253 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1255 changed
|= mention_regs (XEXP (x
, i
));
1256 else if (fmt
[i
] == 'E')
1257 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1258 changed
|= mention_regs (XVECEXP (x
, i
, j
));
1263 /* Update the register quantities for inserting X into the hash table
1264 with a value equivalent to CLASSP.
1265 (If the class does not contain a REG, it is irrelevant.)
1266 If MODIFIED is nonzero, X is a destination; it is being modified.
1267 Note that delete_reg_equiv should be called on a register
1268 before insert_regs is done on that register with MODIFIED != 0.
1270 Nonzero value means that elements of reg_qty have changed
1271 so X's hash code may be different. */
1274 insert_regs (x
, classp
, modified
)
1276 struct table_elt
*classp
;
1279 if (GET_CODE (x
) == REG
)
1281 unsigned int regno
= REGNO (x
);
1284 /* If REGNO is in the equivalence table already but is of the
1285 wrong mode for that equivalence, don't do anything here. */
1287 qty_valid
= REGNO_QTY_VALID_P (regno
);
1290 struct qty_table_elem
*ent
= &qty_table
[REG_QTY (regno
)];
1292 if (ent
->mode
!= GET_MODE (x
))
1296 if (modified
|| ! qty_valid
)
1299 for (classp
= classp
->first_same_value
;
1301 classp
= classp
->next_same_value
)
1302 if (GET_CODE (classp
->exp
) == REG
1303 && GET_MODE (classp
->exp
) == GET_MODE (x
))
1305 make_regs_eqv (regno
, REGNO (classp
->exp
));
1309 /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
1310 than REG_IN_TABLE to find out if there was only a single preceding
1311 invalidation - for the SUBREG - or another one, which would be
1312 for the full register. However, if we find here that REG_TICK
1313 indicates that the register is invalid, it means that it has
1314 been invalidated in a separate operation. The SUBREG might be used
1315 now (then this is a recursive call), or we might use the full REG
1316 now and a SUBREG of it later. So bump up REG_TICK so that
1317 mention_regs will do the right thing. */
1319 && REG_IN_TABLE (regno
) >= 0
1320 && REG_TICK (regno
) == REG_IN_TABLE (regno
) + 1)
1322 make_new_qty (regno
, GET_MODE (x
));
1329 /* If X is a SUBREG, we will likely be inserting the inner register in the
1330 table. If that register doesn't have an assigned quantity number at
1331 this point but does later, the insertion that we will be doing now will
1332 not be accessible because its hash code will have changed. So assign
1333 a quantity number now. */
1335 else if (GET_CODE (x
) == SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
1336 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x
))))
1338 insert_regs (SUBREG_REG (x
), NULL
, 0);
1343 return mention_regs (x
);
1346 /* Look in or update the hash table. */
1348 /* Remove table element ELT from use in the table.
1349 HASH is its hash code, made using the HASH macro.
1350 It's an argument because often that is known in advance
1351 and we save much time not recomputing it. */
1354 remove_from_table (elt
, hash
)
1355 struct table_elt
*elt
;
1361 /* Mark this element as removed. See cse_insn. */
1362 elt
->first_same_value
= 0;
1364 /* Remove the table element from its equivalence class. */
1367 struct table_elt
*prev
= elt
->prev_same_value
;
1368 struct table_elt
*next
= elt
->next_same_value
;
1371 next
->prev_same_value
= prev
;
1374 prev
->next_same_value
= next
;
1377 struct table_elt
*newfirst
= next
;
1380 next
->first_same_value
= newfirst
;
1381 next
= next
->next_same_value
;
1386 /* Remove the table element from its hash bucket. */
1389 struct table_elt
*prev
= elt
->prev_same_hash
;
1390 struct table_elt
*next
= elt
->next_same_hash
;
1393 next
->prev_same_hash
= prev
;
1396 prev
->next_same_hash
= next
;
1397 else if (table
[hash
] == elt
)
1401 /* This entry is not in the proper hash bucket. This can happen
1402 when two classes were merged by `merge_equiv_classes'. Search
1403 for the hash bucket that it heads. This happens only very
1404 rarely, so the cost is acceptable. */
1405 for (hash
= 0; hash
< HASH_SIZE
; hash
++)
1406 if (table
[hash
] == elt
)
1411 /* Remove the table element from its related-value circular chain. */
1413 if (elt
->related_value
!= 0 && elt
->related_value
!= elt
)
1415 struct table_elt
*p
= elt
->related_value
;
1417 while (p
->related_value
!= elt
)
1418 p
= p
->related_value
;
1419 p
->related_value
= elt
->related_value
;
1420 if (p
->related_value
== p
)
1421 p
->related_value
= 0;
1424 /* Now add it to the free element chain. */
1425 elt
->next_same_hash
= free_element_chain
;
1426 free_element_chain
= elt
;
1429 /* Look up X in the hash table and return its table element,
1430 or 0 if X is not in the table.
1432 MODE is the machine-mode of X, or if X is an integer constant
1433 with VOIDmode then MODE is the mode with which X will be used.
1435 Here we are satisfied to find an expression whose tree structure
1438 static struct table_elt
*
1439 lookup (x
, hash
, mode
)
1442 enum machine_mode mode
;
1444 struct table_elt
*p
;
1446 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1447 if (mode
== p
->mode
&& ((x
== p
->exp
&& GET_CODE (x
) == REG
)
1448 || exp_equiv_p (x
, p
->exp
, GET_CODE (x
) != REG
, 0)))
1454 /* Like `lookup' but don't care whether the table element uses invalid regs.
1455 Also ignore discrepancies in the machine mode of a register. */
1457 static struct table_elt
*
1458 lookup_for_remove (x
, hash
, mode
)
1461 enum machine_mode mode
;
1463 struct table_elt
*p
;
1465 if (GET_CODE (x
) == REG
)
1467 unsigned int regno
= REGNO (x
);
1469 /* Don't check the machine mode when comparing registers;
1470 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1471 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1472 if (GET_CODE (p
->exp
) == REG
1473 && REGNO (p
->exp
) == regno
)
1478 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1479 if (mode
== p
->mode
&& (x
== p
->exp
|| exp_equiv_p (x
, p
->exp
, 0, 0)))
1486 /* Look for an expression equivalent to X and with code CODE.
1487 If one is found, return that expression. */
1490 lookup_as_function (x
, code
)
1495 = lookup (x
, safe_hash (x
, VOIDmode
) & HASH_MASK
, GET_MODE (x
));
1497 /* If we are looking for a CONST_INT, the mode doesn't really matter, as
1498 long as we are narrowing. So if we looked in vain for a mode narrower
1499 than word_mode before, look for word_mode now. */
1500 if (p
== 0 && code
== CONST_INT
1501 && GET_MODE_SIZE (GET_MODE (x
)) < GET_MODE_SIZE (word_mode
))
1504 PUT_MODE (x
, word_mode
);
1505 p
= lookup (x
, safe_hash (x
, VOIDmode
) & HASH_MASK
, word_mode
);
1511 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
1512 if (GET_CODE (p
->exp
) == code
1513 /* Make sure this is a valid entry in the table. */
1514 && exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
1520 /* Insert X in the hash table, assuming HASH is its hash code
1521 and CLASSP is an element of the class it should go in
1522 (or 0 if a new class should be made).
1523 It is inserted at the proper position to keep the class in
1524 the order cheapest first.
1526 MODE is the machine-mode of X, or if X is an integer constant
1527 with VOIDmode then MODE is the mode with which X will be used.
1529 For elements of equal cheapness, the most recent one
1530 goes in front, except that the first element in the list
1531 remains first unless a cheaper element is added. The order of
1532 pseudo-registers does not matter, as canon_reg will be called to
1533 find the cheapest when a register is retrieved from the table.
1535 The in_memory field in the hash table element is set to 0.
1536 The caller must set it nonzero if appropriate.
1538 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1539 and if insert_regs returns a nonzero value
1540 you must then recompute its hash code before calling here.
1542 If necessary, update table showing constant values of quantities. */
1544 #define CHEAPER(X, Y) \
1545 (preferrable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0)
1547 static struct table_elt
*
1548 insert (x
, classp
, hash
, mode
)
1550 struct table_elt
*classp
;
1552 enum machine_mode mode
;
1554 struct table_elt
*elt
;
1556 /* If X is a register and we haven't made a quantity for it,
1557 something is wrong. */
1558 if (GET_CODE (x
) == REG
&& ! REGNO_QTY_VALID_P (REGNO (x
)))
1561 /* If X is a hard register, show it is being put in the table. */
1562 if (GET_CODE (x
) == REG
&& REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1564 unsigned int regno
= REGNO (x
);
1565 unsigned int endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (x
));
1568 for (i
= regno
; i
< endregno
; i
++)
1569 SET_HARD_REG_BIT (hard_regs_in_table
, i
);
1572 /* Put an element for X into the right hash bucket. */
1574 elt
= free_element_chain
;
1576 free_element_chain
= elt
->next_same_hash
;
1580 elt
= (struct table_elt
*) xmalloc (sizeof (struct table_elt
));
1584 elt
->canon_exp
= NULL_RTX
;
1585 elt
->cost
= COST (x
);
1586 elt
->regcost
= approx_reg_cost (x
);
1587 elt
->next_same_value
= 0;
1588 elt
->prev_same_value
= 0;
1589 elt
->next_same_hash
= table
[hash
];
1590 elt
->prev_same_hash
= 0;
1591 elt
->related_value
= 0;
1594 elt
->is_const
= (CONSTANT_P (x
)
1595 /* GNU C++ takes advantage of this for `this'
1596 (and other const values). */
1597 || (GET_CODE (x
) == REG
1598 && RTX_UNCHANGING_P (x
)
1599 && REGNO (x
) >= FIRST_PSEUDO_REGISTER
)
1600 || FIXED_BASE_PLUS_P (x
));
1603 table
[hash
]->prev_same_hash
= elt
;
1606 /* Put it into the proper value-class. */
1609 classp
= classp
->first_same_value
;
1610 if (CHEAPER (elt
, classp
))
1611 /* Insert at the head of the class */
1613 struct table_elt
*p
;
1614 elt
->next_same_value
= classp
;
1615 classp
->prev_same_value
= elt
;
1616 elt
->first_same_value
= elt
;
1618 for (p
= classp
; p
; p
= p
->next_same_value
)
1619 p
->first_same_value
= elt
;
1623 /* Insert not at head of the class. */
1624 /* Put it after the last element cheaper than X. */
1625 struct table_elt
*p
, *next
;
1627 for (p
= classp
; (next
= p
->next_same_value
) && CHEAPER (next
, elt
);
1630 /* Put it after P and before NEXT. */
1631 elt
->next_same_value
= next
;
1633 next
->prev_same_value
= elt
;
1635 elt
->prev_same_value
= p
;
1636 p
->next_same_value
= elt
;
1637 elt
->first_same_value
= classp
;
1641 elt
->first_same_value
= elt
;
1643 /* If this is a constant being set equivalent to a register or a register
1644 being set equivalent to a constant, note the constant equivalence.
1646 If this is a constant, it cannot be equivalent to a different constant,
1647 and a constant is the only thing that can be cheaper than a register. So
1648 we know the register is the head of the class (before the constant was
1651 If this is a register that is not already known equivalent to a
1652 constant, we must check the entire class.
1654 If this is a register that is already known equivalent to an insn,
1655 update the qtys `const_insn' to show that `this_insn' is the latest
1656 insn making that quantity equivalent to the constant. */
1658 if (elt
->is_const
&& classp
&& GET_CODE (classp
->exp
) == REG
1659 && GET_CODE (x
) != REG
)
1661 int exp_q
= REG_QTY (REGNO (classp
->exp
));
1662 struct qty_table_elem
*exp_ent
= &qty_table
[exp_q
];
1664 exp_ent
->const_rtx
= gen_lowpart_if_possible (exp_ent
->mode
, x
);
1665 exp_ent
->const_insn
= this_insn
;
1668 else if (GET_CODE (x
) == REG
1670 && ! qty_table
[REG_QTY (REGNO (x
))].const_rtx
1673 struct table_elt
*p
;
1675 for (p
= classp
; p
!= 0; p
= p
->next_same_value
)
1677 if (p
->is_const
&& GET_CODE (p
->exp
) != REG
)
1679 int x_q
= REG_QTY (REGNO (x
));
1680 struct qty_table_elem
*x_ent
= &qty_table
[x_q
];
1683 = gen_lowpart_if_possible (GET_MODE (x
), p
->exp
);
1684 x_ent
->const_insn
= this_insn
;
1690 else if (GET_CODE (x
) == REG
1691 && qty_table
[REG_QTY (REGNO (x
))].const_rtx
1692 && GET_MODE (x
) == qty_table
[REG_QTY (REGNO (x
))].mode
)
1693 qty_table
[REG_QTY (REGNO (x
))].const_insn
= this_insn
;
1695 /* If this is a constant with symbolic value,
1696 and it has a term with an explicit integer value,
1697 link it up with related expressions. */
1698 if (GET_CODE (x
) == CONST
)
1700 rtx subexp
= get_related_value (x
);
1702 struct table_elt
*subelt
, *subelt_prev
;
1706 /* Get the integer-free subexpression in the hash table. */
1707 subhash
= safe_hash (subexp
, mode
) & HASH_MASK
;
1708 subelt
= lookup (subexp
, subhash
, mode
);
1710 subelt
= insert (subexp
, NULL
, subhash
, mode
);
1711 /* Initialize SUBELT's circular chain if it has none. */
1712 if (subelt
->related_value
== 0)
1713 subelt
->related_value
= subelt
;
1714 /* Find the element in the circular chain that precedes SUBELT. */
1715 subelt_prev
= subelt
;
1716 while (subelt_prev
->related_value
!= subelt
)
1717 subelt_prev
= subelt_prev
->related_value
;
1718 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1719 This way the element that follows SUBELT is the oldest one. */
1720 elt
->related_value
= subelt_prev
->related_value
;
1721 subelt_prev
->related_value
= elt
;
1728 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1729 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1730 the two classes equivalent.
1732 CLASS1 will be the surviving class; CLASS2 should not be used after this
1735 Any invalid entries in CLASS2 will not be copied. */
1738 merge_equiv_classes (class1
, class2
)
1739 struct table_elt
*class1
, *class2
;
1741 struct table_elt
*elt
, *next
, *new;
1743 /* Ensure we start with the head of the classes. */
1744 class1
= class1
->first_same_value
;
1745 class2
= class2
->first_same_value
;
1747 /* If they were already equal, forget it. */
1748 if (class1
== class2
)
1751 for (elt
= class2
; elt
; elt
= next
)
1755 enum machine_mode mode
= elt
->mode
;
1757 next
= elt
->next_same_value
;
1759 /* Remove old entry, make a new one in CLASS1's class.
1760 Don't do this for invalid entries as we cannot find their
1761 hash code (it also isn't necessary). */
1762 if (GET_CODE (exp
) == REG
|| exp_equiv_p (exp
, exp
, 1, 0))
1764 hash_arg_in_memory
= 0;
1765 hash
= HASH (exp
, mode
);
1767 if (GET_CODE (exp
) == REG
)
1768 delete_reg_equiv (REGNO (exp
));
1770 remove_from_table (elt
, hash
);
1772 if (insert_regs (exp
, class1
, 0))
1774 rehash_using_reg (exp
);
1775 hash
= HASH (exp
, mode
);
1777 new = insert (exp
, class1
, hash
, mode
);
1778 new->in_memory
= hash_arg_in_memory
;
1783 /* Flush the entire hash table. */
1789 struct table_elt
*p
;
1791 for (i
= 0; i
< HASH_SIZE
; i
++)
1792 for (p
= table
[i
]; p
; p
= table
[i
])
1794 /* Note that invalidate can remove elements
1795 after P in the current hash chain. */
1796 if (GET_CODE (p
->exp
) == REG
)
1797 invalidate (p
->exp
, p
->mode
);
1799 remove_from_table (p
, i
);
1803 /* Function called for each rtx to check whether true dependence exist. */
1804 struct check_dependence_data
1806 enum machine_mode mode
;
1811 check_dependence (x
, data
)
1815 struct check_dependence_data
*d
= (struct check_dependence_data
*) data
;
1816 if (*x
&& GET_CODE (*x
) == MEM
)
1817 return true_dependence (d
->exp
, d
->mode
, *x
, cse_rtx_varies_p
);
1822 /* Remove from the hash table, or mark as invalid, all expressions whose
1823 values could be altered by storing in X. X is a register, a subreg, or
1824 a memory reference with nonvarying address (because, when a memory
1825 reference with a varying address is stored in, all memory references are
1826 removed by invalidate_memory so specific invalidation is superfluous).
1827 FULL_MODE, if not VOIDmode, indicates that this much should be
1828 invalidated instead of just the amount indicated by the mode of X. This
1829 is only used for bitfield stores into memory.
1831 A nonvarying address may be just a register or just a symbol reference,
1832 or it may be either of those plus a numeric offset. */
1835 invalidate (x
, full_mode
)
1837 enum machine_mode full_mode
;
1840 struct table_elt
*p
;
1842 switch (GET_CODE (x
))
1846 /* If X is a register, dependencies on its contents are recorded
1847 through the qty number mechanism. Just change the qty number of
1848 the register, mark it as invalid for expressions that refer to it,
1849 and remove it itself. */
1850 unsigned int regno
= REGNO (x
);
1851 unsigned int hash
= HASH (x
, GET_MODE (x
));
1853 /* Remove REGNO from any quantity list it might be on and indicate
1854 that its value might have changed. If it is a pseudo, remove its
1855 entry from the hash table.
1857 For a hard register, we do the first two actions above for any
1858 additional hard registers corresponding to X. Then, if any of these
1859 registers are in the table, we must remove any REG entries that
1860 overlap these registers. */
1862 delete_reg_equiv (regno
);
1865 if (regno
>= FIRST_PSEUDO_REGISTER
)
1867 /* Because a register can be referenced in more than one mode,
1868 we might have to remove more than one table entry. */
1869 struct table_elt
*elt
;
1871 while ((elt
= lookup_for_remove (x
, hash
, GET_MODE (x
))))
1872 remove_from_table (elt
, hash
);
1876 HOST_WIDE_INT in_table
1877 = TEST_HARD_REG_BIT (hard_regs_in_table
, regno
);
1878 unsigned int endregno
1879 = regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (x
));
1880 unsigned int tregno
, tendregno
, rn
;
1881 struct table_elt
*p
, *next
;
1883 CLEAR_HARD_REG_BIT (hard_regs_in_table
, regno
);
1885 for (rn
= regno
+ 1; rn
< endregno
; rn
++)
1887 in_table
|= TEST_HARD_REG_BIT (hard_regs_in_table
, rn
);
1888 CLEAR_HARD_REG_BIT (hard_regs_in_table
, rn
);
1889 delete_reg_equiv (rn
);
1894 for (hash
= 0; hash
< HASH_SIZE
; hash
++)
1895 for (p
= table
[hash
]; p
; p
= next
)
1897 next
= p
->next_same_hash
;
1899 if (GET_CODE (p
->exp
) != REG
1900 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1903 tregno
= REGNO (p
->exp
);
1905 = tregno
+ HARD_REGNO_NREGS (tregno
, GET_MODE (p
->exp
));
1906 if (tendregno
> regno
&& tregno
< endregno
)
1907 remove_from_table (p
, hash
);
1914 invalidate (SUBREG_REG (x
), VOIDmode
);
1918 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; --i
)
1919 invalidate (XVECEXP (x
, 0, i
), VOIDmode
);
1923 /* This is part of a disjoint return value; extract the location in
1924 question ignoring the offset. */
1925 invalidate (XEXP (x
, 0), VOIDmode
);
1929 /* Calculate the canonical version of X here so that
1930 true_dependence doesn't generate new RTL for X on each call. */
1933 /* Remove all hash table elements that refer to overlapping pieces of
1935 if (full_mode
== VOIDmode
)
1936 full_mode
= GET_MODE (x
);
1938 for (i
= 0; i
< HASH_SIZE
; i
++)
1940 struct table_elt
*next
;
1942 for (p
= table
[i
]; p
; p
= next
)
1944 next
= p
->next_same_hash
;
1947 struct check_dependence_data d
;
1949 /* Just canonicalize the expression once;
1950 otherwise each time we call invalidate
1951 true_dependence will canonicalize the
1952 expression again. */
1954 p
->canon_exp
= canon_rtx (p
->exp
);
1957 if (for_each_rtx (&p
->canon_exp
, check_dependence
, &d
))
1958 remove_from_table (p
, i
);
1969 /* Remove all expressions that refer to register REGNO,
1970 since they are already invalid, and we are about to
1971 mark that register valid again and don't want the old
1972 expressions to reappear as valid. */
1975 remove_invalid_refs (regno
)
1979 struct table_elt
*p
, *next
;
1981 for (i
= 0; i
< HASH_SIZE
; i
++)
1982 for (p
= table
[i
]; p
; p
= next
)
1984 next
= p
->next_same_hash
;
1985 if (GET_CODE (p
->exp
) != REG
1986 && refers_to_regno_p (regno
, regno
+ 1, p
->exp
, (rtx
*) 0))
1987 remove_from_table (p
, i
);
1991 /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET,
1994 remove_invalid_subreg_refs (regno
, offset
, mode
)
1996 unsigned int offset
;
1997 enum machine_mode mode
;
2000 struct table_elt
*p
, *next
;
2001 unsigned int end
= offset
+ (GET_MODE_SIZE (mode
) - 1);
2003 for (i
= 0; i
< HASH_SIZE
; i
++)
2004 for (p
= table
[i
]; p
; p
= next
)
2007 next
= p
->next_same_hash
;
2009 if (GET_CODE (exp
) != REG
2010 && (GET_CODE (exp
) != SUBREG
2011 || GET_CODE (SUBREG_REG (exp
)) != REG
2012 || REGNO (SUBREG_REG (exp
)) != regno
2013 || (((SUBREG_BYTE (exp
)
2014 + (GET_MODE_SIZE (GET_MODE (exp
)) - 1)) >= offset
)
2015 && SUBREG_BYTE (exp
) <= end
))
2016 && refers_to_regno_p (regno
, regno
+ 1, p
->exp
, (rtx
*) 0))
2017 remove_from_table (p
, i
);
2021 /* Recompute the hash codes of any valid entries in the hash table that
2022 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
2024 This is called when we make a jump equivalence. */
2027 rehash_using_reg (x
)
2031 struct table_elt
*p
, *next
;
2034 if (GET_CODE (x
) == SUBREG
)
2037 /* If X is not a register or if the register is known not to be in any
2038 valid entries in the table, we have no work to do. */
2040 if (GET_CODE (x
) != REG
2041 || REG_IN_TABLE (REGNO (x
)) < 0
2042 || REG_IN_TABLE (REGNO (x
)) != REG_TICK (REGNO (x
)))
2045 /* Scan all hash chains looking for valid entries that mention X.
2046 If we find one and it is in the wrong hash chain, move it. We can skip
2047 objects that are registers, since they are handled specially. */
2049 for (i
= 0; i
< HASH_SIZE
; i
++)
2050 for (p
= table
[i
]; p
; p
= next
)
2052 next
= p
->next_same_hash
;
2053 if (GET_CODE (p
->exp
) != REG
&& reg_mentioned_p (x
, p
->exp
)
2054 && exp_equiv_p (p
->exp
, p
->exp
, 1, 0)
2055 && i
!= (hash
= safe_hash (p
->exp
, p
->mode
) & HASH_MASK
))
2057 if (p
->next_same_hash
)
2058 p
->next_same_hash
->prev_same_hash
= p
->prev_same_hash
;
2060 if (p
->prev_same_hash
)
2061 p
->prev_same_hash
->next_same_hash
= p
->next_same_hash
;
2063 table
[i
] = p
->next_same_hash
;
2065 p
->next_same_hash
= table
[hash
];
2066 p
->prev_same_hash
= 0;
2068 table
[hash
]->prev_same_hash
= p
;
2074 /* Remove from the hash table any expression that is a call-clobbered
2075 register. Also update their TICK values. */
2078 invalidate_for_call ()
2080 unsigned int regno
, endregno
;
2083 struct table_elt
*p
, *next
;
2086 /* Go through all the hard registers. For each that is clobbered in
2087 a CALL_INSN, remove the register from quantity chains and update
2088 reg_tick if defined. Also see if any of these registers is currently
2091 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
2092 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, regno
))
2094 delete_reg_equiv (regno
);
2095 if (REG_TICK (regno
) >= 0)
2098 in_table
|= (TEST_HARD_REG_BIT (hard_regs_in_table
, regno
) != 0);
2101 /* In the case where we have no call-clobbered hard registers in the
2102 table, we are done. Otherwise, scan the table and remove any
2103 entry that overlaps a call-clobbered register. */
2106 for (hash
= 0; hash
< HASH_SIZE
; hash
++)
2107 for (p
= table
[hash
]; p
; p
= next
)
2109 next
= p
->next_same_hash
;
2111 if (GET_CODE (p
->exp
) != REG
2112 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
2115 regno
= REGNO (p
->exp
);
2116 endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (p
->exp
));
2118 for (i
= regno
; i
< endregno
; i
++)
2119 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, i
))
2121 remove_from_table (p
, hash
);
2127 /* Given an expression X of type CONST,
2128 and ELT which is its table entry (or 0 if it
2129 is not in the hash table),
2130 return an alternate expression for X as a register plus integer.
2131 If none can be found, return 0. */
2134 use_related_value (x
, elt
)
2136 struct table_elt
*elt
;
2138 struct table_elt
*relt
= 0;
2139 struct table_elt
*p
, *q
;
2140 HOST_WIDE_INT offset
;
2142 /* First, is there anything related known?
2143 If we have a table element, we can tell from that.
2144 Otherwise, must look it up. */
2146 if (elt
!= 0 && elt
->related_value
!= 0)
2148 else if (elt
== 0 && GET_CODE (x
) == CONST
)
2150 rtx subexp
= get_related_value (x
);
2152 relt
= lookup (subexp
,
2153 safe_hash (subexp
, GET_MODE (subexp
)) & HASH_MASK
,
2160 /* Search all related table entries for one that has an
2161 equivalent register. */
2166 /* This loop is strange in that it is executed in two different cases.
2167 The first is when X is already in the table. Then it is searching
2168 the RELATED_VALUE list of X's class (RELT). The second case is when
2169 X is not in the table. Then RELT points to a class for the related
2172 Ensure that, whatever case we are in, that we ignore classes that have
2173 the same value as X. */
2175 if (rtx_equal_p (x
, p
->exp
))
2178 for (q
= p
->first_same_value
; q
; q
= q
->next_same_value
)
2179 if (GET_CODE (q
->exp
) == REG
)
2185 p
= p
->related_value
;
2187 /* We went all the way around, so there is nothing to be found.
2188 Alternatively, perhaps RELT was in the table for some other reason
2189 and it has no related values recorded. */
2190 if (p
== relt
|| p
== 0)
2197 offset
= (get_integer_term (x
) - get_integer_term (p
->exp
));
2198 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2199 return plus_constant (q
->exp
, offset
);
2202 /* Hash a string. Just add its bytes up. */
2203 static inline unsigned
2204 canon_hash_string (ps
)
2208 const unsigned char *p
= (const unsigned char *) ps
;
2217 /* Hash an rtx. We are careful to make sure the value is never negative.
2218 Equivalent registers hash identically.
2219 MODE is used in hashing for CONST_INTs only;
2220 otherwise the mode of X is used.
2222 Store 1 in do_not_record if any subexpression is volatile.
2224 Store 1 in hash_arg_in_memory if X contains a MEM rtx
2225 which does not have the RTX_UNCHANGING_P bit set.
2227 Note that cse_insn knows that the hash code of a MEM expression
2228 is just (int) MEM plus the hash code of the address. */
2231 canon_hash (x
, mode
)
2233 enum machine_mode mode
;
2240 /* repeat is used to turn tail-recursion into iteration. */
2245 code
= GET_CODE (x
);
2250 unsigned int regno
= REGNO (x
);
2253 /* On some machines, we can't record any non-fixed hard register,
2254 because extending its life will cause reload problems. We
2255 consider ap, fp, sp, gp to be fixed for this purpose.
2257 We also consider CCmode registers to be fixed for this purpose;
2258 failure to do so leads to failure to simplify 0<100 type of
2261 On all machines, we can't record any global registers.
2262 Nor should we record any register that is in a small
2263 class, as defined by CLASS_LIKELY_SPILLED_P. */
2265 if (regno
>= FIRST_PSEUDO_REGISTER
)
2267 else if (x
== frame_pointer_rtx
2268 || x
== hard_frame_pointer_rtx
2269 || x
== arg_pointer_rtx
2270 || x
== stack_pointer_rtx
2271 || x
== pic_offset_table_rtx
)
2273 else if (global_regs
[regno
])
2275 else if (fixed_regs
[regno
])
2277 else if (GET_MODE_CLASS (GET_MODE (x
)) == MODE_CC
)
2279 else if (SMALL_REGISTER_CLASSES
)
2281 else if (CLASS_LIKELY_SPILLED_P (REGNO_REG_CLASS (regno
)))
2292 hash
+= ((unsigned) REG
<< 7) + (unsigned) REG_QTY (regno
);
2296 /* We handle SUBREG of a REG specially because the underlying
2297 reg changes its hash value with every value change; we don't
2298 want to have to forget unrelated subregs when one subreg changes. */
2301 if (GET_CODE (SUBREG_REG (x
)) == REG
)
2303 hash
+= (((unsigned) SUBREG
<< 7)
2304 + REGNO (SUBREG_REG (x
))
2305 + (SUBREG_BYTE (x
) / UNITS_PER_WORD
));
2313 unsigned HOST_WIDE_INT tem
= INTVAL (x
);
2314 hash
+= ((unsigned) CONST_INT
<< 7) + (unsigned) mode
+ tem
;
2319 /* This is like the general case, except that it only counts
2320 the integers representing the constant. */
2321 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
);
2322 if (GET_MODE (x
) != VOIDmode
)
2323 hash
+= real_hash (CONST_DOUBLE_REAL_VALUE (x
));
2325 hash
+= ((unsigned) CONST_DOUBLE_LOW (x
)
2326 + (unsigned) CONST_DOUBLE_HIGH (x
));
2334 units
= CONST_VECTOR_NUNITS (x
);
2336 for (i
= 0; i
< units
; ++i
)
2338 elt
= CONST_VECTOR_ELT (x
, i
);
2339 hash
+= canon_hash (elt
, GET_MODE (elt
));
2345 /* Assume there is only one rtx object for any given label. */
2347 hash
+= ((unsigned) LABEL_REF
<< 7) + (unsigned long) XEXP (x
, 0);
2351 hash
+= ((unsigned) SYMBOL_REF
<< 7) + (unsigned long) XSTR (x
, 0);
2355 /* We don't record if marked volatile or if BLKmode since we don't
2356 know the size of the move. */
2357 if (MEM_VOLATILE_P (x
) || GET_MODE (x
) == BLKmode
)
2362 if (! RTX_UNCHANGING_P (x
) || FIXED_BASE_PLUS_P (XEXP (x
, 0)))
2364 hash_arg_in_memory
= 1;
2366 /* Now that we have already found this special case,
2367 might as well speed it up as much as possible. */
2368 hash
+= (unsigned) MEM
;
2373 /* A USE that mentions non-volatile memory needs special
2374 handling since the MEM may be BLKmode which normally
2375 prevents an entry from being made. Pure calls are
2376 marked by a USE which mentions BLKmode memory. */
2377 if (GET_CODE (XEXP (x
, 0)) == MEM
2378 && ! MEM_VOLATILE_P (XEXP (x
, 0)))
2380 hash
+= (unsigned) USE
;
2383 if (! RTX_UNCHANGING_P (x
) || FIXED_BASE_PLUS_P (XEXP (x
, 0)))
2384 hash_arg_in_memory
= 1;
2386 /* Now that we have already found this special case,
2387 might as well speed it up as much as possible. */
2388 hash
+= (unsigned) MEM
;
2403 case UNSPEC_VOLATILE
:
2408 if (MEM_VOLATILE_P (x
))
2415 /* We don't want to take the filename and line into account. */
2416 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
)
2417 + canon_hash_string (ASM_OPERANDS_TEMPLATE (x
))
2418 + canon_hash_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x
))
2419 + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x
);
2421 if (ASM_OPERANDS_INPUT_LENGTH (x
))
2423 for (i
= 1; i
< ASM_OPERANDS_INPUT_LENGTH (x
); i
++)
2425 hash
+= (canon_hash (ASM_OPERANDS_INPUT (x
, i
),
2426 GET_MODE (ASM_OPERANDS_INPUT (x
, i
)))
2427 + canon_hash_string (ASM_OPERANDS_INPUT_CONSTRAINT
2431 hash
+= canon_hash_string (ASM_OPERANDS_INPUT_CONSTRAINT (x
, 0));
2432 x
= ASM_OPERANDS_INPUT (x
, 0);
2433 mode
= GET_MODE (x
);
2445 i
= GET_RTX_LENGTH (code
) - 1;
2446 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
);
2447 fmt
= GET_RTX_FORMAT (code
);
2452 rtx tem
= XEXP (x
, i
);
2454 /* If we are about to do the last recursive call
2455 needed at this level, change it into iteration.
2456 This function is called enough to be worth it. */
2462 hash
+= canon_hash (tem
, 0);
2464 else if (fmt
[i
] == 'E')
2465 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2466 hash
+= canon_hash (XVECEXP (x
, i
, j
), 0);
2467 else if (fmt
[i
] == 's')
2468 hash
+= canon_hash_string (XSTR (x
, i
));
2469 else if (fmt
[i
] == 'i')
2471 unsigned tem
= XINT (x
, i
);
2474 else if (fmt
[i
] == '0' || fmt
[i
] == 't')
2483 /* Like canon_hash but with no side effects. */
2488 enum machine_mode mode
;
2490 int save_do_not_record
= do_not_record
;
2491 int save_hash_arg_in_memory
= hash_arg_in_memory
;
2492 unsigned hash
= canon_hash (x
, mode
);
2493 hash_arg_in_memory
= save_hash_arg_in_memory
;
2494 do_not_record
= save_do_not_record
;
2498 /* Return 1 iff X and Y would canonicalize into the same thing,
2499 without actually constructing the canonicalization of either one.
2500 If VALIDATE is nonzero,
2501 we assume X is an expression being processed from the rtl
2502 and Y was found in the hash table. We check register refs
2503 in Y for being marked as valid.
2505 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2506 that is known to be in the register. Ordinarily, we don't allow them
2507 to match, because letting them match would cause unpredictable results
2508 in all the places that search a hash table chain for an equivalent
2509 for a given value. A possible equivalent that has different structure
2510 has its hash code computed from different data. Whether the hash code
2511 is the same as that of the given value is pure luck. */
2514 exp_equiv_p (x
, y
, validate
, equal_values
)
2523 /* Note: it is incorrect to assume an expression is equivalent to itself
2524 if VALIDATE is nonzero. */
2525 if (x
== y
&& !validate
)
2527 if (x
== 0 || y
== 0)
2530 code
= GET_CODE (x
);
2531 if (code
!= GET_CODE (y
))
2536 /* If X is a constant and Y is a register or vice versa, they may be
2537 equivalent. We only have to validate if Y is a register. */
2538 if (CONSTANT_P (x
) && GET_CODE (y
) == REG
2539 && REGNO_QTY_VALID_P (REGNO (y
)))
2541 int y_q
= REG_QTY (REGNO (y
));
2542 struct qty_table_elem
*y_ent
= &qty_table
[y_q
];
2544 if (GET_MODE (y
) == y_ent
->mode
2545 && rtx_equal_p (x
, y_ent
->const_rtx
)
2546 && (! validate
|| REG_IN_TABLE (REGNO (y
)) == REG_TICK (REGNO (y
))))
2550 if (CONSTANT_P (y
) && code
== REG
2551 && REGNO_QTY_VALID_P (REGNO (x
)))
2553 int x_q
= REG_QTY (REGNO (x
));
2554 struct qty_table_elem
*x_ent
= &qty_table
[x_q
];
2556 if (GET_MODE (x
) == x_ent
->mode
2557 && rtx_equal_p (y
, x_ent
->const_rtx
))
2564 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2565 if (GET_MODE (x
) != GET_MODE (y
))
2576 return XEXP (x
, 0) == XEXP (y
, 0);
2579 return XSTR (x
, 0) == XSTR (y
, 0);
2583 unsigned int regno
= REGNO (y
);
2584 unsigned int endregno
2585 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
2586 : HARD_REGNO_NREGS (regno
, GET_MODE (y
)));
2589 /* If the quantities are not the same, the expressions are not
2590 equivalent. If there are and we are not to validate, they
2591 are equivalent. Otherwise, ensure all regs are up-to-date. */
2593 if (REG_QTY (REGNO (x
)) != REG_QTY (regno
))
2599 for (i
= regno
; i
< endregno
; i
++)
2600 if (REG_IN_TABLE (i
) != REG_TICK (i
))
2606 /* For commutative operations, check both orders. */
2614 return ((exp_equiv_p (XEXP (x
, 0), XEXP (y
, 0), validate
, equal_values
)
2615 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 1),
2616 validate
, equal_values
))
2617 || (exp_equiv_p (XEXP (x
, 0), XEXP (y
, 1),
2618 validate
, equal_values
)
2619 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 0),
2620 validate
, equal_values
)));
2623 /* We don't use the generic code below because we want to
2624 disregard filename and line numbers. */
2626 /* A volatile asm isn't equivalent to any other. */
2627 if (MEM_VOLATILE_P (x
) || MEM_VOLATILE_P (y
))
2630 if (GET_MODE (x
) != GET_MODE (y
)
2631 || strcmp (ASM_OPERANDS_TEMPLATE (x
), ASM_OPERANDS_TEMPLATE (y
))
2632 || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x
),
2633 ASM_OPERANDS_OUTPUT_CONSTRAINT (y
))
2634 || ASM_OPERANDS_OUTPUT_IDX (x
) != ASM_OPERANDS_OUTPUT_IDX (y
)
2635 || ASM_OPERANDS_INPUT_LENGTH (x
) != ASM_OPERANDS_INPUT_LENGTH (y
))
2638 if (ASM_OPERANDS_INPUT_LENGTH (x
))
2640 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
2641 if (! exp_equiv_p (ASM_OPERANDS_INPUT (x
, i
),
2642 ASM_OPERANDS_INPUT (y
, i
),
2643 validate
, equal_values
)
2644 || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x
, i
),
2645 ASM_OPERANDS_INPUT_CONSTRAINT (y
, i
)))
2655 /* Compare the elements. If any pair of corresponding elements
2656 fail to match, return 0 for the whole things. */
2658 fmt
= GET_RTX_FORMAT (code
);
2659 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2664 if (! exp_equiv_p (XEXP (x
, i
), XEXP (y
, i
), validate
, equal_values
))
2669 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2671 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2672 if (! exp_equiv_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
),
2673 validate
, equal_values
))
2678 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
2683 if (XINT (x
, i
) != XINT (y
, i
))
2688 if (XWINT (x
, i
) != XWINT (y
, i
))
2704 /* Return 1 if X has a value that can vary even between two
2705 executions of the program. 0 means X can be compared reliably
2706 against certain constants or near-constants. */
2709 cse_rtx_varies_p (x
, from_alias
)
2713 /* We need not check for X and the equivalence class being of the same
2714 mode because if X is equivalent to a constant in some mode, it
2715 doesn't vary in any mode. */
2717 if (GET_CODE (x
) == REG
2718 && REGNO_QTY_VALID_P (REGNO (x
)))
2720 int x_q
= REG_QTY (REGNO (x
));
2721 struct qty_table_elem
*x_ent
= &qty_table
[x_q
];
2723 if (GET_MODE (x
) == x_ent
->mode
2724 && x_ent
->const_rtx
!= NULL_RTX
)
2728 if (GET_CODE (x
) == PLUS
2729 && GET_CODE (XEXP (x
, 1)) == CONST_INT
2730 && GET_CODE (XEXP (x
, 0)) == REG
2731 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0))))
2733 int x0_q
= REG_QTY (REGNO (XEXP (x
, 0)));
2734 struct qty_table_elem
*x0_ent
= &qty_table
[x0_q
];
2736 if ((GET_MODE (XEXP (x
, 0)) == x0_ent
->mode
)
2737 && x0_ent
->const_rtx
!= NULL_RTX
)
2741 /* This can happen as the result of virtual register instantiation, if
2742 the initial constant is too large to be a valid address. This gives
2743 us a three instruction sequence, load large offset into a register,
2744 load fp minus a constant into a register, then a MEM which is the
2745 sum of the two `constant' registers. */
2746 if (GET_CODE (x
) == PLUS
2747 && GET_CODE (XEXP (x
, 0)) == REG
2748 && GET_CODE (XEXP (x
, 1)) == REG
2749 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0)))
2750 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 1))))
2752 int x0_q
= REG_QTY (REGNO (XEXP (x
, 0)));
2753 int x1_q
= REG_QTY (REGNO (XEXP (x
, 1)));
2754 struct qty_table_elem
*x0_ent
= &qty_table
[x0_q
];
2755 struct qty_table_elem
*x1_ent
= &qty_table
[x1_q
];
2757 if ((GET_MODE (XEXP (x
, 0)) == x0_ent
->mode
)
2758 && x0_ent
->const_rtx
!= NULL_RTX
2759 && (GET_MODE (XEXP (x
, 1)) == x1_ent
->mode
)
2760 && x1_ent
->const_rtx
!= NULL_RTX
)
2764 return rtx_varies_p (x
, from_alias
);
2767 /* Canonicalize an expression:
2768 replace each register reference inside it
2769 with the "oldest" equivalent register.
2771 If INSN is nonzero and we are replacing a pseudo with a hard register
2772 or vice versa, validate_change is used to ensure that INSN remains valid
2773 after we make our substitution. The calls are made with IN_GROUP nonzero
2774 so apply_change_group must be called upon the outermost return from this
2775 function (unless INSN is zero). The result of apply_change_group can
2776 generally be discarded since the changes we are making are optional. */
2790 code
= GET_CODE (x
);
2809 struct qty_table_elem
*ent
;
2811 /* Never replace a hard reg, because hard regs can appear
2812 in more than one machine mode, and we must preserve the mode
2813 of each occurrence. Also, some hard regs appear in
2814 MEMs that are shared and mustn't be altered. Don't try to
2815 replace any reg that maps to a reg of class NO_REGS. */
2816 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
2817 || ! REGNO_QTY_VALID_P (REGNO (x
)))
2820 q
= REG_QTY (REGNO (x
));
2821 ent
= &qty_table
[q
];
2822 first
= ent
->first_reg
;
2823 return (first
>= FIRST_PSEUDO_REGISTER
? regno_reg_rtx
[first
]
2824 : REGNO_REG_CLASS (first
) == NO_REGS
? x
2825 : gen_rtx_REG (ent
->mode
, first
));
2832 fmt
= GET_RTX_FORMAT (code
);
2833 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2839 rtx
new = canon_reg (XEXP (x
, i
), insn
);
2842 /* If replacing pseudo with hard reg or vice versa, ensure the
2843 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2844 if (insn
!= 0 && new != 0
2845 && GET_CODE (new) == REG
&& GET_CODE (XEXP (x
, i
)) == REG
2846 && (((REGNO (new) < FIRST_PSEUDO_REGISTER
)
2847 != (REGNO (XEXP (x
, i
)) < FIRST_PSEUDO_REGISTER
))
2848 || (insn_code
= recog_memoized (insn
)) < 0
2849 || insn_data
[insn_code
].n_dups
> 0))
2850 validate_change (insn
, &XEXP (x
, i
), new, 1);
2854 else if (fmt
[i
] == 'E')
2855 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2856 XVECEXP (x
, i
, j
) = canon_reg (XVECEXP (x
, i
, j
), insn
);
2862 /* LOC is a location within INSN that is an operand address (the contents of
2863 a MEM). Find the best equivalent address to use that is valid for this
2866 On most CISC machines, complicated address modes are costly, and rtx_cost
2867 is a good approximation for that cost. However, most RISC machines have
2868 only a few (usually only one) memory reference formats. If an address is
2869 valid at all, it is often just as cheap as any other address. Hence, for
2870 RISC machines, we use the configuration macro `ADDRESS_COST' to compare the
2871 costs of various addresses. For two addresses of equal cost, choose the one
2872 with the highest `rtx_cost' value as that has the potential of eliminating
2873 the most insns. For equal costs, we choose the first in the equivalence
2874 class. Note that we ignore the fact that pseudo registers are cheaper
2875 than hard registers here because we would also prefer the pseudo registers.
2879 find_best_addr (insn
, loc
, mode
)
2882 enum machine_mode mode
;
2884 struct table_elt
*elt
;
2887 struct table_elt
*p
;
2888 int found_better
= 1;
2890 int save_do_not_record
= do_not_record
;
2891 int save_hash_arg_in_memory
= hash_arg_in_memory
;
2896 /* Do not try to replace constant addresses or addresses of local and
2897 argument slots. These MEM expressions are made only once and inserted
2898 in many instructions, as well as being used to control symbol table
2899 output. It is not safe to clobber them.
2901 There are some uncommon cases where the address is already in a register
2902 for some reason, but we cannot take advantage of that because we have
2903 no easy way to unshare the MEM. In addition, looking up all stack
2904 addresses is costly. */
2905 if ((GET_CODE (addr
) == PLUS
2906 && GET_CODE (XEXP (addr
, 0)) == REG
2907 && GET_CODE (XEXP (addr
, 1)) == CONST_INT
2908 && (regno
= REGNO (XEXP (addr
, 0)),
2909 regno
== FRAME_POINTER_REGNUM
|| regno
== HARD_FRAME_POINTER_REGNUM
2910 || regno
== ARG_POINTER_REGNUM
))
2911 || (GET_CODE (addr
) == REG
2912 && (regno
= REGNO (addr
), regno
== FRAME_POINTER_REGNUM
2913 || regno
== HARD_FRAME_POINTER_REGNUM
2914 || regno
== ARG_POINTER_REGNUM
))
2915 || GET_CODE (addr
) == ADDRESSOF
2916 || CONSTANT_ADDRESS_P (addr
))
2919 /* If this address is not simply a register, try to fold it. This will
2920 sometimes simplify the expression. Many simplifications
2921 will not be valid, but some, usually applying the associative rule, will
2922 be valid and produce better code. */
2923 if (GET_CODE (addr
) != REG
)
2925 rtx folded
= fold_rtx (copy_rtx (addr
), NULL_RTX
);
2926 int addr_folded_cost
= address_cost (folded
, mode
);
2927 int addr_cost
= address_cost (addr
, mode
);
2929 if ((addr_folded_cost
< addr_cost
2930 || (addr_folded_cost
== addr_cost
2931 /* ??? The rtx_cost comparison is left over from an older
2932 version of this code. It is probably no longer helpful. */
2933 && (rtx_cost (folded
, MEM
) > rtx_cost (addr
, MEM
)
2934 || approx_reg_cost (folded
) < approx_reg_cost (addr
))))
2935 && validate_change (insn
, loc
, folded
, 0))
2939 /* If this address is not in the hash table, we can't look for equivalences
2940 of the whole address. Also, ignore if volatile. */
2943 hash
= HASH (addr
, Pmode
);
2944 addr_volatile
= do_not_record
;
2945 do_not_record
= save_do_not_record
;
2946 hash_arg_in_memory
= save_hash_arg_in_memory
;
2951 elt
= lookup (addr
, hash
, Pmode
);
2953 #ifndef ADDRESS_COST
2956 int our_cost
= elt
->cost
;
2958 /* Find the lowest cost below ours that works. */
2959 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
2960 if (elt
->cost
< our_cost
2961 && (GET_CODE (elt
->exp
) == REG
2962 || exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
2963 && validate_change (insn
, loc
,
2964 canon_reg (copy_rtx (elt
->exp
), NULL_RTX
), 0))
2971 /* We need to find the best (under the criteria documented above) entry
2972 in the class that is valid. We use the `flag' field to indicate
2973 choices that were invalid and iterate until we can't find a better
2974 one that hasn't already been tried. */
2976 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2979 while (found_better
)
2981 int best_addr_cost
= address_cost (*loc
, mode
);
2982 int best_rtx_cost
= (elt
->cost
+ 1) >> 1;
2984 struct table_elt
*best_elt
= elt
;
2987 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2990 if ((GET_CODE (p
->exp
) == REG
2991 || exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
2992 && ((exp_cost
= address_cost (p
->exp
, mode
)) < best_addr_cost
2993 || (exp_cost
== best_addr_cost
2994 && ((p
->cost
+ 1) >> 1) > best_rtx_cost
)))
2997 best_addr_cost
= exp_cost
;
2998 best_rtx_cost
= (p
->cost
+ 1) >> 1;
3005 if (validate_change (insn
, loc
,
3006 canon_reg (copy_rtx (best_elt
->exp
),
3015 /* If the address is a binary operation with the first operand a register
3016 and the second a constant, do the same as above, but looking for
3017 equivalences of the register. Then try to simplify before checking for
3018 the best address to use. This catches a few cases: First is when we
3019 have REG+const and the register is another REG+const. We can often merge
3020 the constants and eliminate one insn and one register. It may also be
3021 that a machine has a cheap REG+REG+const. Finally, this improves the
3022 code on the Alpha for unaligned byte stores. */
3024 if (flag_expensive_optimizations
3025 && (GET_RTX_CLASS (GET_CODE (*loc
)) == '2'
3026 || GET_RTX_CLASS (GET_CODE (*loc
)) == 'c')
3027 && GET_CODE (XEXP (*loc
, 0)) == REG
3028 && GET_CODE (XEXP (*loc
, 1)) == CONST_INT
)
3030 rtx c
= XEXP (*loc
, 1);
3033 hash
= HASH (XEXP (*loc
, 0), Pmode
);
3034 do_not_record
= save_do_not_record
;
3035 hash_arg_in_memory
= save_hash_arg_in_memory
;
3037 elt
= lookup (XEXP (*loc
, 0), hash
, Pmode
);
3041 /* We need to find the best (under the criteria documented above) entry
3042 in the class that is valid. We use the `flag' field to indicate
3043 choices that were invalid and iterate until we can't find a better
3044 one that hasn't already been tried. */
3046 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
3049 while (found_better
)
3051 int best_addr_cost
= address_cost (*loc
, mode
);
3052 int best_rtx_cost
= (COST (*loc
) + 1) >> 1;
3053 struct table_elt
*best_elt
= elt
;
3054 rtx best_rtx
= *loc
;
3057 /* This is at worst case an O(n^2) algorithm, so limit our search
3058 to the first 32 elements on the list. This avoids trouble
3059 compiling code with very long basic blocks that can easily
3060 call simplify_gen_binary so many times that we run out of
3064 for (p
= elt
->first_same_value
, count
= 0;
3066 p
= p
->next_same_value
, count
++)
3068 && (GET_CODE (p
->exp
) == REG
3069 || exp_equiv_p (p
->exp
, p
->exp
, 1, 0)))
3071 rtx
new = simplify_gen_binary (GET_CODE (*loc
), Pmode
,
3074 new_cost
= address_cost (new, mode
);
3076 if (new_cost
< best_addr_cost
3077 || (new_cost
== best_addr_cost
3078 && (COST (new) + 1) >> 1 > best_rtx_cost
))
3081 best_addr_cost
= new_cost
;
3082 best_rtx_cost
= (COST (new) + 1) >> 1;
3090 if (validate_change (insn
, loc
,
3091 canon_reg (copy_rtx (best_rtx
),
3102 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
3103 operation (EQ, NE, GT, etc.), follow it back through the hash table and
3104 what values are being compared.
3106 *PARG1 and *PARG2 are updated to contain the rtx representing the values
3107 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
3108 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
3109 compared to produce cc0.
3111 The return value is the comparison operator and is either the code of
3112 A or the code corresponding to the inverse of the comparison. */
3114 static enum rtx_code
3115 find_comparison_args (code
, parg1
, parg2
, pmode1
, pmode2
)
3118 enum machine_mode
*pmode1
, *pmode2
;
3122 arg1
= *parg1
, arg2
= *parg2
;
3124 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
3126 while (arg2
== CONST0_RTX (GET_MODE (arg1
)))
3128 /* Set nonzero when we find something of interest. */
3130 int reverse_code
= 0;
3131 struct table_elt
*p
= 0;
3133 /* If arg1 is a COMPARE, extract the comparison arguments from it.
3134 On machines with CC0, this is the only case that can occur, since
3135 fold_rtx will return the COMPARE or item being compared with zero
3138 if (GET_CODE (arg1
) == COMPARE
&& arg2
== const0_rtx
)
3141 /* If ARG1 is a comparison operator and CODE is testing for
3142 STORE_FLAG_VALUE, get the inner arguments. */
3144 else if (GET_RTX_CLASS (GET_CODE (arg1
)) == '<')
3146 #ifdef FLOAT_STORE_FLAG_VALUE
3147 REAL_VALUE_TYPE fsfv
;
3151 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
3152 && code
== LT
&& STORE_FLAG_VALUE
== -1)
3153 #ifdef FLOAT_STORE_FLAG_VALUE
3154 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_FLOAT
3155 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
3156 REAL_VALUE_NEGATIVE (fsfv
)))
3161 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
3162 && code
== GE
&& STORE_FLAG_VALUE
== -1)
3163 #ifdef FLOAT_STORE_FLAG_VALUE
3164 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_FLOAT
3165 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
3166 REAL_VALUE_NEGATIVE (fsfv
)))
3169 x
= arg1
, reverse_code
= 1;
3172 /* ??? We could also check for
3174 (ne (and (eq (...) (const_int 1))) (const_int 0))
3176 and related forms, but let's wait until we see them occurring. */
3179 /* Look up ARG1 in the hash table and see if it has an equivalence
3180 that lets us see what is being compared. */
3181 p
= lookup (arg1
, safe_hash (arg1
, GET_MODE (arg1
)) & HASH_MASK
,
3185 p
= p
->first_same_value
;
3187 /* If what we compare is already known to be constant, that is as
3189 We need to break the loop in this case, because otherwise we
3190 can have an infinite loop when looking at a reg that is known
3191 to be a constant which is the same as a comparison of a reg
3192 against zero which appears later in the insn stream, which in
3193 turn is constant and the same as the comparison of the first reg
3199 for (; p
; p
= p
->next_same_value
)
3201 enum machine_mode inner_mode
= GET_MODE (p
->exp
);
3202 #ifdef FLOAT_STORE_FLAG_VALUE
3203 REAL_VALUE_TYPE fsfv
;
3206 /* If the entry isn't valid, skip it. */
3207 if (! exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
3210 if (GET_CODE (p
->exp
) == COMPARE
3211 /* Another possibility is that this machine has a compare insn
3212 that includes the comparison code. In that case, ARG1 would
3213 be equivalent to a comparison operation that would set ARG1 to
3214 either STORE_FLAG_VALUE or zero. If this is an NE operation,
3215 ORIG_CODE is the actual comparison being done; if it is an EQ,
3216 we must reverse ORIG_CODE. On machine with a negative value
3217 for STORE_FLAG_VALUE, also look at LT and GE operations. */
3220 && GET_MODE_CLASS (inner_mode
) == MODE_INT
3221 && (GET_MODE_BITSIZE (inner_mode
)
3222 <= HOST_BITS_PER_WIDE_INT
)
3223 && (STORE_FLAG_VALUE
3224 & ((HOST_WIDE_INT
) 1
3225 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
3226 #ifdef FLOAT_STORE_FLAG_VALUE
3228 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
3229 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
3230 REAL_VALUE_NEGATIVE (fsfv
)))
3233 && GET_RTX_CLASS (GET_CODE (p
->exp
)) == '<'))
3238 else if ((code
== EQ
3240 && GET_MODE_CLASS (inner_mode
) == MODE_INT
3241 && (GET_MODE_BITSIZE (inner_mode
)
3242 <= HOST_BITS_PER_WIDE_INT
)
3243 && (STORE_FLAG_VALUE
3244 & ((HOST_WIDE_INT
) 1
3245 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
3246 #ifdef FLOAT_STORE_FLAG_VALUE
3248 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
3249 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
3250 REAL_VALUE_NEGATIVE (fsfv
)))
3253 && GET_RTX_CLASS (GET_CODE (p
->exp
)) == '<')
3260 /* If this is fp + constant, the equivalent is a better operand since
3261 it may let us predict the value of the comparison. */
3262 else if (NONZERO_BASE_PLUS_P (p
->exp
))
3269 /* If we didn't find a useful equivalence for ARG1, we are done.
3270 Otherwise, set up for the next iteration. */
3274 /* If we need to reverse the comparison, make sure that that is
3275 possible -- we can't necessarily infer the value of GE from LT
3276 with floating-point operands. */
3279 enum rtx_code reversed
= reversed_comparison_code (x
, NULL_RTX
);
3280 if (reversed
== UNKNOWN
)
3285 else if (GET_RTX_CLASS (GET_CODE (x
)) == '<')
3286 code
= GET_CODE (x
);
3287 arg1
= XEXP (x
, 0), arg2
= XEXP (x
, 1);
3290 /* Return our results. Return the modes from before fold_rtx
3291 because fold_rtx might produce const_int, and then it's too late. */
3292 *pmode1
= GET_MODE (arg1
), *pmode2
= GET_MODE (arg2
);
3293 *parg1
= fold_rtx (arg1
, 0), *parg2
= fold_rtx (arg2
, 0);
3298 /* If X is a nontrivial arithmetic operation on an argument
3299 for which a constant value can be determined, return
3300 the result of operating on that value, as a constant.
3301 Otherwise, return X, possibly with one or more operands
3302 modified by recursive calls to this function.
3304 If X is a register whose contents are known, we do NOT
3305 return those contents here. equiv_constant is called to
3308 INSN is the insn that we may be modifying. If it is 0, make a copy
3309 of X before modifying it. */
3317 enum machine_mode mode
;
3324 /* Folded equivalents of first two operands of X. */
3328 /* Constant equivalents of first three operands of X;
3329 0 when no such equivalent is known. */
3334 /* The mode of the first operand of X. We need this for sign and zero
3336 enum machine_mode mode_arg0
;
3341 mode
= GET_MODE (x
);
3342 code
= GET_CODE (x
);
3352 /* No use simplifying an EXPR_LIST
3353 since they are used only for lists of args
3354 in a function call's REG_EQUAL note. */
3356 /* Changing anything inside an ADDRESSOF is incorrect; we don't
3357 want to (e.g.,) make (addressof (const_int 0)) just because
3358 the location is known to be zero. */
3364 return prev_insn_cc0
;
3368 /* If the next insn is a CODE_LABEL followed by a jump table,
3369 PC's value is a LABEL_REF pointing to that label. That
3370 lets us fold switch statements on the VAX. */
3371 if (insn
&& GET_CODE (insn
) == JUMP_INSN
)
3373 rtx next
= next_nonnote_insn (insn
);
3375 if (next
&& GET_CODE (next
) == CODE_LABEL
3376 && NEXT_INSN (next
) != 0
3377 && GET_CODE (NEXT_INSN (next
)) == JUMP_INSN
3378 && (GET_CODE (PATTERN (NEXT_INSN (next
))) == ADDR_VEC
3379 || GET_CODE (PATTERN (NEXT_INSN (next
))) == ADDR_DIFF_VEC
))
3380 return gen_rtx_LABEL_REF (Pmode
, next
);
3385 /* See if we previously assigned a constant value to this SUBREG. */
3386 if ((new = lookup_as_function (x
, CONST_INT
)) != 0
3387 || (new = lookup_as_function (x
, CONST_DOUBLE
)) != 0)
3390 /* If this is a paradoxical SUBREG, we have no idea what value the
3391 extra bits would have. However, if the operand is equivalent
3392 to a SUBREG whose operand is the same as our mode, and all the
3393 modes are within a word, we can just use the inner operand
3394 because these SUBREGs just say how to treat the register.
3396 Similarly if we find an integer constant. */
3398 if (GET_MODE_SIZE (mode
) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
3400 enum machine_mode imode
= GET_MODE (SUBREG_REG (x
));
3401 struct table_elt
*elt
;
3403 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
3404 && GET_MODE_SIZE (imode
) <= UNITS_PER_WORD
3405 && (elt
= lookup (SUBREG_REG (x
), HASH (SUBREG_REG (x
), imode
),
3407 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
3409 if (CONSTANT_P (elt
->exp
)
3410 && GET_MODE (elt
->exp
) == VOIDmode
)
3413 if (GET_CODE (elt
->exp
) == SUBREG
3414 && GET_MODE (SUBREG_REG (elt
->exp
)) == mode
3415 && exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
3416 return copy_rtx (SUBREG_REG (elt
->exp
));
3422 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
3423 We might be able to if the SUBREG is extracting a single word in an
3424 integral mode or extracting the low part. */
3426 folded_arg0
= fold_rtx (SUBREG_REG (x
), insn
);
3427 const_arg0
= equiv_constant (folded_arg0
);
3429 folded_arg0
= const_arg0
;
3431 if (folded_arg0
!= SUBREG_REG (x
))
3433 new = simplify_subreg (mode
, folded_arg0
,
3434 GET_MODE (SUBREG_REG (x
)), SUBREG_BYTE (x
));
3439 /* If this is a narrowing SUBREG and our operand is a REG, see if
3440 we can find an equivalence for REG that is an arithmetic operation
3441 in a wider mode where both operands are paradoxical SUBREGs
3442 from objects of our result mode. In that case, we couldn't report
3443 an equivalent value for that operation, since we don't know what the
3444 extra bits will be. But we can find an equivalence for this SUBREG
3445 by folding that operation is the narrow mode. This allows us to
3446 fold arithmetic in narrow modes when the machine only supports
3447 word-sized arithmetic.
3449 Also look for a case where we have a SUBREG whose operand is the
3450 same as our result. If both modes are smaller than a word, we
3451 are simply interpreting a register in different modes and we
3452 can use the inner value. */
3454 if (GET_CODE (folded_arg0
) == REG
3455 && GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (folded_arg0
))
3456 && subreg_lowpart_p (x
))
3458 struct table_elt
*elt
;
3460 /* We can use HASH here since we know that canon_hash won't be
3462 elt
= lookup (folded_arg0
,
3463 HASH (folded_arg0
, GET_MODE (folded_arg0
)),
3464 GET_MODE (folded_arg0
));
3467 elt
= elt
->first_same_value
;
3469 for (; elt
; elt
= elt
->next_same_value
)
3471 enum rtx_code eltcode
= GET_CODE (elt
->exp
);
3473 /* Just check for unary and binary operations. */
3474 if (GET_RTX_CLASS (GET_CODE (elt
->exp
)) == '1'
3475 && GET_CODE (elt
->exp
) != SIGN_EXTEND
3476 && GET_CODE (elt
->exp
) != ZERO_EXTEND
3477 && GET_CODE (XEXP (elt
->exp
, 0)) == SUBREG
3478 && GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 0))) == mode
3479 && (GET_MODE_CLASS (mode
)
3480 == GET_MODE_CLASS (GET_MODE (XEXP (elt
->exp
, 0)))))
3482 rtx op0
= SUBREG_REG (XEXP (elt
->exp
, 0));
3484 if (GET_CODE (op0
) != REG
&& ! CONSTANT_P (op0
))
3485 op0
= fold_rtx (op0
, NULL_RTX
);
3487 op0
= equiv_constant (op0
);
3489 new = simplify_unary_operation (GET_CODE (elt
->exp
), mode
,
3492 else if ((GET_RTX_CLASS (GET_CODE (elt
->exp
)) == '2'
3493 || GET_RTX_CLASS (GET_CODE (elt
->exp
)) == 'c')
3494 && eltcode
!= DIV
&& eltcode
!= MOD
3495 && eltcode
!= UDIV
&& eltcode
!= UMOD
3496 && eltcode
!= ASHIFTRT
&& eltcode
!= LSHIFTRT
3497 && eltcode
!= ROTATE
&& eltcode
!= ROTATERT
3498 && ((GET_CODE (XEXP (elt
->exp
, 0)) == SUBREG
3499 && (GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 0)))
3501 || CONSTANT_P (XEXP (elt
->exp
, 0)))
3502 && ((GET_CODE (XEXP (elt
->exp
, 1)) == SUBREG
3503 && (GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 1)))
3505 || CONSTANT_P (XEXP (elt
->exp
, 1))))
3507 rtx op0
= gen_lowpart_common (mode
, XEXP (elt
->exp
, 0));
3508 rtx op1
= gen_lowpart_common (mode
, XEXP (elt
->exp
, 1));
3510 if (op0
&& GET_CODE (op0
) != REG
&& ! CONSTANT_P (op0
))
3511 op0
= fold_rtx (op0
, NULL_RTX
);
3514 op0
= equiv_constant (op0
);
3516 if (op1
&& GET_CODE (op1
) != REG
&& ! CONSTANT_P (op1
))
3517 op1
= fold_rtx (op1
, NULL_RTX
);
3520 op1
= equiv_constant (op1
);
3522 /* If we are looking for the low SImode part of
3523 (ashift:DI c (const_int 32)), it doesn't work
3524 to compute that in SImode, because a 32-bit shift
3525 in SImode is unpredictable. We know the value is 0. */
3527 && GET_CODE (elt
->exp
) == ASHIFT
3528 && GET_CODE (op1
) == CONST_INT
3529 && INTVAL (op1
) >= GET_MODE_BITSIZE (mode
))
3531 if (INTVAL (op1
) < GET_MODE_BITSIZE (GET_MODE (elt
->exp
)))
3533 /* If the count fits in the inner mode's width,
3534 but exceeds the outer mode's width,
3535 the value will get truncated to 0
3539 /* If the count exceeds even the inner mode's width,
3540 don't fold this expression. */
3543 else if (op0
&& op1
)
3544 new = simplify_binary_operation (GET_CODE (elt
->exp
), mode
,
3548 else if (GET_CODE (elt
->exp
) == SUBREG
3549 && GET_MODE (SUBREG_REG (elt
->exp
)) == mode
3550 && (GET_MODE_SIZE (GET_MODE (folded_arg0
))
3552 && exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
3553 new = copy_rtx (SUBREG_REG (elt
->exp
));
3564 /* If we have (NOT Y), see if Y is known to be (NOT Z).
3565 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
3566 new = lookup_as_function (XEXP (x
, 0), code
);
3568 return fold_rtx (copy_rtx (XEXP (new, 0)), insn
);
3572 /* If we are not actually processing an insn, don't try to find the
3573 best address. Not only don't we care, but we could modify the
3574 MEM in an invalid way since we have no insn to validate against. */
3576 find_best_addr (insn
, &XEXP (x
, 0), GET_MODE (x
));
3579 /* Even if we don't fold in the insn itself,
3580 we can safely do so here, in hopes of getting a constant. */
3581 rtx addr
= fold_rtx (XEXP (x
, 0), NULL_RTX
);
3583 HOST_WIDE_INT offset
= 0;
3585 if (GET_CODE (addr
) == REG
3586 && REGNO_QTY_VALID_P (REGNO (addr
)))
3588 int addr_q
= REG_QTY (REGNO (addr
));
3589 struct qty_table_elem
*addr_ent
= &qty_table
[addr_q
];
3591 if (GET_MODE (addr
) == addr_ent
->mode
3592 && addr_ent
->const_rtx
!= NULL_RTX
)
3593 addr
= addr_ent
->const_rtx
;
3596 /* If address is constant, split it into a base and integer offset. */
3597 if (GET_CODE (addr
) == SYMBOL_REF
|| GET_CODE (addr
) == LABEL_REF
)
3599 else if (GET_CODE (addr
) == CONST
&& GET_CODE (XEXP (addr
, 0)) == PLUS
3600 && GET_CODE (XEXP (XEXP (addr
, 0), 1)) == CONST_INT
)
3602 base
= XEXP (XEXP (addr
, 0), 0);
3603 offset
= INTVAL (XEXP (XEXP (addr
, 0), 1));
3605 else if (GET_CODE (addr
) == LO_SUM
3606 && GET_CODE (XEXP (addr
, 1)) == SYMBOL_REF
)
3607 base
= XEXP (addr
, 1);
3608 else if (GET_CODE (addr
) == ADDRESSOF
)
3609 return change_address (x
, VOIDmode
, addr
);
3611 /* If this is a constant pool reference, we can fold it into its
3612 constant to allow better value tracking. */
3613 if (base
&& GET_CODE (base
) == SYMBOL_REF
3614 && CONSTANT_POOL_ADDRESS_P (base
))
3616 rtx constant
= get_pool_constant (base
);
3617 enum machine_mode const_mode
= get_pool_mode (base
);
3620 if (CONSTANT_P (constant
) && GET_CODE (constant
) != CONST_INT
)
3621 constant_pool_entries_cost
= COST (constant
);
3623 /* If we are loading the full constant, we have an equivalence. */
3624 if (offset
== 0 && mode
== const_mode
)
3627 /* If this actually isn't a constant (weird!), we can't do
3628 anything. Otherwise, handle the two most common cases:
3629 extracting a word from a multi-word constant, and extracting
3630 the low-order bits. Other cases don't seem common enough to
3632 if (! CONSTANT_P (constant
))
3635 if (GET_MODE_CLASS (mode
) == MODE_INT
3636 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
3637 && offset
% UNITS_PER_WORD
== 0
3638 && (new = operand_subword (constant
,
3639 offset
/ UNITS_PER_WORD
,
3640 0, const_mode
)) != 0)
3643 if (((BYTES_BIG_ENDIAN
3644 && offset
== GET_MODE_SIZE (GET_MODE (constant
)) - 1)
3645 || (! BYTES_BIG_ENDIAN
&& offset
== 0))
3646 && (new = gen_lowpart_if_possible (mode
, constant
)) != 0)
3650 /* If this is a reference to a label at a known position in a jump
3651 table, we also know its value. */
3652 if (base
&& GET_CODE (base
) == LABEL_REF
)
3654 rtx label
= XEXP (base
, 0);
3655 rtx table_insn
= NEXT_INSN (label
);
3657 if (table_insn
&& GET_CODE (table_insn
) == JUMP_INSN
3658 && GET_CODE (PATTERN (table_insn
)) == ADDR_VEC
)
3660 rtx table
= PATTERN (table_insn
);
3663 && (offset
/ GET_MODE_SIZE (GET_MODE (table
))
3664 < XVECLEN (table
, 0)))
3665 return XVECEXP (table
, 0,
3666 offset
/ GET_MODE_SIZE (GET_MODE (table
)));
3668 if (table_insn
&& GET_CODE (table_insn
) == JUMP_INSN
3669 && GET_CODE (PATTERN (table_insn
)) == ADDR_DIFF_VEC
)
3671 rtx table
= PATTERN (table_insn
);
3674 && (offset
/ GET_MODE_SIZE (GET_MODE (table
))
3675 < XVECLEN (table
, 1)))
3677 offset
/= GET_MODE_SIZE (GET_MODE (table
));
3678 new = gen_rtx_MINUS (Pmode
, XVECEXP (table
, 1, offset
),
3681 if (GET_MODE (table
) != Pmode
)
3682 new = gen_rtx_TRUNCATE (GET_MODE (table
), new);
3684 /* Indicate this is a constant. This isn't a
3685 valid form of CONST, but it will only be used
3686 to fold the next insns and then discarded, so
3689 Note this expression must be explicitly discarded,
3690 by cse_insn, else it may end up in a REG_EQUAL note
3691 and "escape" to cause problems elsewhere. */
3692 return gen_rtx_CONST (GET_MODE (new), new);
3700 #ifdef NO_FUNCTION_CSE
3702 if (CONSTANT_P (XEXP (XEXP (x
, 0), 0)))
3708 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
3709 validate_change (insn
, &ASM_OPERANDS_INPUT (x
, i
),
3710 fold_rtx (ASM_OPERANDS_INPUT (x
, i
), insn
), 0);
3720 mode_arg0
= VOIDmode
;
3722 /* Try folding our operands.
3723 Then see which ones have constant values known. */
3725 fmt
= GET_RTX_FORMAT (code
);
3726 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3729 rtx arg
= XEXP (x
, i
);
3730 rtx folded_arg
= arg
, const_arg
= 0;
3731 enum machine_mode mode_arg
= GET_MODE (arg
);
3732 rtx cheap_arg
, expensive_arg
;
3733 rtx replacements
[2];
3735 int old_cost
= COST_IN (XEXP (x
, i
), code
);
3737 /* Most arguments are cheap, so handle them specially. */
3738 switch (GET_CODE (arg
))
3741 /* This is the same as calling equiv_constant; it is duplicated
3743 if (REGNO_QTY_VALID_P (REGNO (arg
)))
3745 int arg_q
= REG_QTY (REGNO (arg
));
3746 struct qty_table_elem
*arg_ent
= &qty_table
[arg_q
];
3748 if (arg_ent
->const_rtx
!= NULL_RTX
3749 && GET_CODE (arg_ent
->const_rtx
) != REG
3750 && GET_CODE (arg_ent
->const_rtx
) != PLUS
)
3752 = gen_lowpart_if_possible (GET_MODE (arg
),
3753 arg_ent
->const_rtx
);
3768 folded_arg
= prev_insn_cc0
;
3769 mode_arg
= prev_insn_cc0_mode
;
3770 const_arg
= equiv_constant (folded_arg
);
3775 folded_arg
= fold_rtx (arg
, insn
);
3776 const_arg
= equiv_constant (folded_arg
);
3779 /* For the first three operands, see if the operand
3780 is constant or equivalent to a constant. */
3784 folded_arg0
= folded_arg
;
3785 const_arg0
= const_arg
;
3786 mode_arg0
= mode_arg
;
3789 folded_arg1
= folded_arg
;
3790 const_arg1
= const_arg
;
3793 const_arg2
= const_arg
;
3797 /* Pick the least expensive of the folded argument and an
3798 equivalent constant argument. */
3799 if (const_arg
== 0 || const_arg
== folded_arg
3800 || COST_IN (const_arg
, code
) > COST_IN (folded_arg
, code
))
3801 cheap_arg
= folded_arg
, expensive_arg
= const_arg
;
3803 cheap_arg
= const_arg
, expensive_arg
= folded_arg
;
3805 /* Try to replace the operand with the cheapest of the two
3806 possibilities. If it doesn't work and this is either of the first
3807 two operands of a commutative operation, try swapping them.
3808 If THAT fails, try the more expensive, provided it is cheaper
3809 than what is already there. */
3811 if (cheap_arg
== XEXP (x
, i
))
3814 if (insn
== 0 && ! copied
)
3820 /* Order the replacements from cheapest to most expensive. */
3821 replacements
[0] = cheap_arg
;
3822 replacements
[1] = expensive_arg
;
3824 for (j
= 0; j
< 2 && replacements
[j
]; j
++)
3826 int new_cost
= COST_IN (replacements
[j
], code
);
3828 /* Stop if what existed before was cheaper. Prefer constants
3829 in the case of a tie. */
3830 if (new_cost
> old_cost
3831 || (new_cost
== old_cost
&& CONSTANT_P (XEXP (x
, i
))))
3834 if (validate_change (insn
, &XEXP (x
, i
), replacements
[j
], 0))
3837 if (code
== NE
|| code
== EQ
|| GET_RTX_CLASS (code
) == 'c'
3838 || code
== LTGT
|| code
== UNEQ
|| code
== ORDERED
3839 || code
== UNORDERED
)
3841 validate_change (insn
, &XEXP (x
, i
), XEXP (x
, 1 - i
), 1);
3842 validate_change (insn
, &XEXP (x
, 1 - i
), replacements
[j
], 1);
3844 if (apply_change_group ())
3846 /* Swap them back to be invalid so that this loop can
3847 continue and flag them to be swapped back later. */
3850 tem
= XEXP (x
, 0); XEXP (x
, 0) = XEXP (x
, 1);
3862 /* Don't try to fold inside of a vector of expressions.
3863 Doing nothing is harmless. */
3867 /* If a commutative operation, place a constant integer as the second
3868 operand unless the first operand is also a constant integer. Otherwise,
3869 place any constant second unless the first operand is also a constant. */
3871 if (code
== EQ
|| code
== NE
|| GET_RTX_CLASS (code
) == 'c'
3872 || code
== LTGT
|| code
== UNEQ
|| code
== ORDERED
3873 || code
== UNORDERED
)
3875 if (must_swap
|| (const_arg0
3877 || (GET_CODE (const_arg0
) == CONST_INT
3878 && GET_CODE (const_arg1
) != CONST_INT
))))
3880 rtx tem
= XEXP (x
, 0);
3882 if (insn
== 0 && ! copied
)
3888 validate_change (insn
, &XEXP (x
, 0), XEXP (x
, 1), 1);
3889 validate_change (insn
, &XEXP (x
, 1), tem
, 1);
3890 if (apply_change_group ())
3892 tem
= const_arg0
, const_arg0
= const_arg1
, const_arg1
= tem
;
3893 tem
= folded_arg0
, folded_arg0
= folded_arg1
, folded_arg1
= tem
;
3898 /* If X is an arithmetic operation, see if we can simplify it. */
3900 switch (GET_RTX_CLASS (code
))
3906 /* We can't simplify extension ops unless we know the
3908 if ((code
== ZERO_EXTEND
|| code
== SIGN_EXTEND
)
3909 && mode_arg0
== VOIDmode
)
3912 /* If we had a CONST, strip it off and put it back later if we
3914 if (const_arg0
!= 0 && GET_CODE (const_arg0
) == CONST
)
3915 is_const
= 1, const_arg0
= XEXP (const_arg0
, 0);
3917 new = simplify_unary_operation (code
, mode
,
3918 const_arg0
? const_arg0
: folded_arg0
,
3920 if (new != 0 && is_const
)
3921 new = gen_rtx_CONST (mode
, new);
3926 /* See what items are actually being compared and set FOLDED_ARG[01]
3927 to those values and CODE to the actual comparison code. If any are
3928 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3929 do anything if both operands are already known to be constant. */
3931 if (const_arg0
== 0 || const_arg1
== 0)
3933 struct table_elt
*p0
, *p1
;
3934 rtx true_rtx
= const_true_rtx
, false_rtx
= const0_rtx
;
3935 enum machine_mode mode_arg1
;
3937 #ifdef FLOAT_STORE_FLAG_VALUE
3938 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
3940 true_rtx
= (CONST_DOUBLE_FROM_REAL_VALUE
3941 (FLOAT_STORE_FLAG_VALUE (mode
), mode
));
3942 false_rtx
= CONST0_RTX (mode
);
3946 code
= find_comparison_args (code
, &folded_arg0
, &folded_arg1
,
3947 &mode_arg0
, &mode_arg1
);
3948 const_arg0
= equiv_constant (folded_arg0
);
3949 const_arg1
= equiv_constant (folded_arg1
);
3951 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3952 what kinds of things are being compared, so we can't do
3953 anything with this comparison. */
3955 if (mode_arg0
== VOIDmode
|| GET_MODE_CLASS (mode_arg0
) == MODE_CC
)
3958 /* If we do not now have two constants being compared, see
3959 if we can nevertheless deduce some things about the
3961 if (const_arg0
== 0 || const_arg1
== 0)
3963 /* Is FOLDED_ARG0 frame-pointer plus a constant? Or
3964 non-explicit constant? These aren't zero, but we
3965 don't know their sign. */
3966 if (const_arg1
== const0_rtx
3967 && (NONZERO_BASE_PLUS_P (folded_arg0
)
3968 #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address
3970 || GET_CODE (folded_arg0
) == SYMBOL_REF
3972 || GET_CODE (folded_arg0
) == LABEL_REF
3973 || GET_CODE (folded_arg0
) == CONST
))
3977 else if (code
== NE
)
3981 /* See if the two operands are the same. */
3983 if (folded_arg0
== folded_arg1
3984 || (GET_CODE (folded_arg0
) == REG
3985 && GET_CODE (folded_arg1
) == REG
3986 && (REG_QTY (REGNO (folded_arg0
))
3987 == REG_QTY (REGNO (folded_arg1
))))
3988 || ((p0
= lookup (folded_arg0
,
3989 (safe_hash (folded_arg0
, mode_arg0
)
3990 & HASH_MASK
), mode_arg0
))
3991 && (p1
= lookup (folded_arg1
,
3992 (safe_hash (folded_arg1
, mode_arg0
)
3993 & HASH_MASK
), mode_arg0
))
3994 && p0
->first_same_value
== p1
->first_same_value
))
3996 /* Sadly two equal NaNs are not equivalent. */
3997 if (!HONOR_NANS (mode_arg0
))
3998 return ((code
== EQ
|| code
== LE
|| code
== GE
3999 || code
== LEU
|| code
== GEU
|| code
== UNEQ
4000 || code
== UNLE
|| code
== UNGE
4002 ? true_rtx
: false_rtx
);
4003 /* Take care for the FP compares we can resolve. */
4004 if (code
== UNEQ
|| code
== UNLE
|| code
== UNGE
)
4006 if (code
== LTGT
|| code
== LT
|| code
== GT
)
4010 /* If FOLDED_ARG0 is a register, see if the comparison we are
4011 doing now is either the same as we did before or the reverse
4012 (we only check the reverse if not floating-point). */
4013 else if (GET_CODE (folded_arg0
) == REG
)
4015 int qty
= REG_QTY (REGNO (folded_arg0
));
4017 if (REGNO_QTY_VALID_P (REGNO (folded_arg0
)))
4019 struct qty_table_elem
*ent
= &qty_table
[qty
];
4021 if ((comparison_dominates_p (ent
->comparison_code
, code
)
4022 || (! FLOAT_MODE_P (mode_arg0
)
4023 && comparison_dominates_p (ent
->comparison_code
,
4024 reverse_condition (code
))))
4025 && (rtx_equal_p (ent
->comparison_const
, folded_arg1
)
4027 && rtx_equal_p (ent
->comparison_const
,
4029 || (GET_CODE (folded_arg1
) == REG
4030 && (REG_QTY (REGNO (folded_arg1
)) == ent
->comparison_qty
))))
4031 return (comparison_dominates_p (ent
->comparison_code
, code
)
4032 ? true_rtx
: false_rtx
);
4038 /* If we are comparing against zero, see if the first operand is
4039 equivalent to an IOR with a constant. If so, we may be able to
4040 determine the result of this comparison. */
4042 if (const_arg1
== const0_rtx
)
4044 rtx y
= lookup_as_function (folded_arg0
, IOR
);
4048 && (inner_const
= equiv_constant (XEXP (y
, 1))) != 0
4049 && GET_CODE (inner_const
) == CONST_INT
4050 && INTVAL (inner_const
) != 0)
4052 int sign_bitnum
= GET_MODE_BITSIZE (mode_arg0
) - 1;
4053 int has_sign
= (HOST_BITS_PER_WIDE_INT
>= sign_bitnum
4054 && (INTVAL (inner_const
)
4055 & ((HOST_WIDE_INT
) 1 << sign_bitnum
)));
4056 rtx true_rtx
= const_true_rtx
, false_rtx
= const0_rtx
;
4058 #ifdef FLOAT_STORE_FLAG_VALUE
4059 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
4061 true_rtx
= (CONST_DOUBLE_FROM_REAL_VALUE
4062 (FLOAT_STORE_FLAG_VALUE (mode
), mode
));
4063 false_rtx
= CONST0_RTX (mode
);
4087 new = simplify_relational_operation (code
,
4088 (mode_arg0
!= VOIDmode
4090 : (GET_MODE (const_arg0
4094 ? GET_MODE (const_arg0
4097 : GET_MODE (const_arg1
4100 const_arg0
? const_arg0
: folded_arg0
,
4101 const_arg1
? const_arg1
: folded_arg1
);
4102 #ifdef FLOAT_STORE_FLAG_VALUE
4103 if (new != 0 && GET_MODE_CLASS (mode
) == MODE_FLOAT
)
4105 if (new == const0_rtx
)
4106 new = CONST0_RTX (mode
);
4108 new = (CONST_DOUBLE_FROM_REAL_VALUE
4109 (FLOAT_STORE_FLAG_VALUE (mode
), mode
));
4119 /* If the second operand is a LABEL_REF, see if the first is a MINUS
4120 with that LABEL_REF as its second operand. If so, the result is
4121 the first operand of that MINUS. This handles switches with an
4122 ADDR_DIFF_VEC table. */
4123 if (const_arg1
&& GET_CODE (const_arg1
) == LABEL_REF
)
4126 = GET_CODE (folded_arg0
) == MINUS
? folded_arg0
4127 : lookup_as_function (folded_arg0
, MINUS
);
4129 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
4130 && XEXP (XEXP (y
, 1), 0) == XEXP (const_arg1
, 0))
4133 /* Now try for a CONST of a MINUS like the above. */
4134 if ((y
= (GET_CODE (folded_arg0
) == CONST
? folded_arg0
4135 : lookup_as_function (folded_arg0
, CONST
))) != 0
4136 && GET_CODE (XEXP (y
, 0)) == MINUS
4137 && GET_CODE (XEXP (XEXP (y
, 0), 1)) == LABEL_REF
4138 && XEXP (XEXP (XEXP (y
, 0), 1), 0) == XEXP (const_arg1
, 0))
4139 return XEXP (XEXP (y
, 0), 0);
4142 /* Likewise if the operands are in the other order. */
4143 if (const_arg0
&& GET_CODE (const_arg0
) == LABEL_REF
)
4146 = GET_CODE (folded_arg1
) == MINUS
? folded_arg1
4147 : lookup_as_function (folded_arg1
, MINUS
);
4149 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
4150 && XEXP (XEXP (y
, 1), 0) == XEXP (const_arg0
, 0))
4153 /* Now try for a CONST of a MINUS like the above. */
4154 if ((y
= (GET_CODE (folded_arg1
) == CONST
? folded_arg1
4155 : lookup_as_function (folded_arg1
, CONST
))) != 0
4156 && GET_CODE (XEXP (y
, 0)) == MINUS
4157 && GET_CODE (XEXP (XEXP (y
, 0), 1)) == LABEL_REF
4158 && XEXP (XEXP (XEXP (y
, 0), 1), 0) == XEXP (const_arg0
, 0))
4159 return XEXP (XEXP (y
, 0), 0);
4162 /* If second operand is a register equivalent to a negative
4163 CONST_INT, see if we can find a register equivalent to the
4164 positive constant. Make a MINUS if so. Don't do this for
4165 a non-negative constant since we might then alternate between
4166 choosing positive and negative constants. Having the positive
4167 constant previously-used is the more common case. Be sure
4168 the resulting constant is non-negative; if const_arg1 were
4169 the smallest negative number this would overflow: depending
4170 on the mode, this would either just be the same value (and
4171 hence not save anything) or be incorrect. */
4172 if (const_arg1
!= 0 && GET_CODE (const_arg1
) == CONST_INT
4173 && INTVAL (const_arg1
) < 0
4174 /* This used to test
4176 -INTVAL (const_arg1) >= 0
4178 But The Sun V5.0 compilers mis-compiled that test. So
4179 instead we test for the problematic value in a more direct
4180 manner and hope the Sun compilers get it correct. */
4181 && INTVAL (const_arg1
) !=
4182 ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
- 1))
4183 && GET_CODE (folded_arg1
) == REG
)
4185 rtx new_const
= GEN_INT (-INTVAL (const_arg1
));
4187 = lookup (new_const
, safe_hash (new_const
, mode
) & HASH_MASK
,
4191 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
4192 if (GET_CODE (p
->exp
) == REG
)
4193 return simplify_gen_binary (MINUS
, mode
, folded_arg0
,
4194 canon_reg (p
->exp
, NULL_RTX
));
4199 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
4200 If so, produce (PLUS Z C2-C). */
4201 if (const_arg1
!= 0 && GET_CODE (const_arg1
) == CONST_INT
)
4203 rtx y
= lookup_as_function (XEXP (x
, 0), PLUS
);
4204 if (y
&& GET_CODE (XEXP (y
, 1)) == CONST_INT
)
4205 return fold_rtx (plus_constant (copy_rtx (y
),
4206 -INTVAL (const_arg1
)),
4213 case SMIN
: case SMAX
: case UMIN
: case UMAX
:
4214 case IOR
: case AND
: case XOR
:
4215 case MULT
: case DIV
: case UDIV
:
4216 case ASHIFT
: case LSHIFTRT
: case ASHIFTRT
:
4217 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
4218 is known to be of similar form, we may be able to replace the
4219 operation with a combined operation. This may eliminate the
4220 intermediate operation if every use is simplified in this way.
4221 Note that the similar optimization done by combine.c only works
4222 if the intermediate operation's result has only one reference. */
4224 if (GET_CODE (folded_arg0
) == REG
4225 && const_arg1
&& GET_CODE (const_arg1
) == CONST_INT
)
4228 = (code
== ASHIFT
|| code
== ASHIFTRT
|| code
== LSHIFTRT
);
4229 rtx y
= lookup_as_function (folded_arg0
, code
);
4231 enum rtx_code associate_code
;
4235 || 0 == (inner_const
4236 = equiv_constant (fold_rtx (XEXP (y
, 1), 0)))
4237 || GET_CODE (inner_const
) != CONST_INT
4238 /* If we have compiled a statement like
4239 "if (x == (x & mask1))", and now are looking at
4240 "x & mask2", we will have a case where the first operand
4241 of Y is the same as our first operand. Unless we detect
4242 this case, an infinite loop will result. */
4243 || XEXP (y
, 0) == folded_arg0
)
4246 /* Don't associate these operations if they are a PLUS with the
4247 same constant and it is a power of two. These might be doable
4248 with a pre- or post-increment. Similarly for two subtracts of
4249 identical powers of two with post decrement. */
4251 if (code
== PLUS
&& INTVAL (const_arg1
) == INTVAL (inner_const
)
4252 && ((HAVE_PRE_INCREMENT
4253 && exact_log2 (INTVAL (const_arg1
)) >= 0)
4254 || (HAVE_POST_INCREMENT
4255 && exact_log2 (INTVAL (const_arg1
)) >= 0)
4256 || (HAVE_PRE_DECREMENT
4257 && exact_log2 (- INTVAL (const_arg1
)) >= 0)
4258 || (HAVE_POST_DECREMENT
4259 && exact_log2 (- INTVAL (const_arg1
)) >= 0)))
4262 /* Compute the code used to compose the constants. For example,
4263 A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */
4266 = (code
== MULT
|| code
== DIV
|| code
== UDIV
? MULT
4267 : is_shift
|| code
== PLUS
|| code
== MINUS
? PLUS
: code
);
4269 new_const
= simplify_binary_operation (associate_code
, mode
,
4270 const_arg1
, inner_const
);
4275 /* If we are associating shift operations, don't let this
4276 produce a shift of the size of the object or larger.
4277 This could occur when we follow a sign-extend by a right
4278 shift on a machine that does a sign-extend as a pair
4281 if (is_shift
&& GET_CODE (new_const
) == CONST_INT
4282 && INTVAL (new_const
) >= GET_MODE_BITSIZE (mode
))
4284 /* As an exception, we can turn an ASHIFTRT of this
4285 form into a shift of the number of bits - 1. */
4286 if (code
== ASHIFTRT
)
4287 new_const
= GEN_INT (GET_MODE_BITSIZE (mode
) - 1);
4292 y
= copy_rtx (XEXP (y
, 0));
4294 /* If Y contains our first operand (the most common way this
4295 can happen is if Y is a MEM), we would do into an infinite
4296 loop if we tried to fold it. So don't in that case. */
4298 if (! reg_mentioned_p (folded_arg0
, y
))
4299 y
= fold_rtx (y
, insn
);
4301 return simplify_gen_binary (code
, mode
, y
, new_const
);
4309 new = simplify_binary_operation (code
, mode
,
4310 const_arg0
? const_arg0
: folded_arg0
,
4311 const_arg1
? const_arg1
: folded_arg1
);
4315 /* (lo_sum (high X) X) is simply X. */
4316 if (code
== LO_SUM
&& const_arg0
!= 0
4317 && GET_CODE (const_arg0
) == HIGH
4318 && rtx_equal_p (XEXP (const_arg0
, 0), const_arg1
))
4324 new = simplify_ternary_operation (code
, mode
, mode_arg0
,
4325 const_arg0
? const_arg0
: folded_arg0
,
4326 const_arg1
? const_arg1
: folded_arg1
,
4327 const_arg2
? const_arg2
: XEXP (x
, 2));
4331 /* Always eliminate CONSTANT_P_RTX at this stage. */
4332 if (code
== CONSTANT_P_RTX
)
4333 return (const_arg0
? const1_rtx
: const0_rtx
);
4337 return new ? new : x
;
4340 /* Return a constant value currently equivalent to X.
4341 Return 0 if we don't know one. */
4347 if (GET_CODE (x
) == REG
4348 && REGNO_QTY_VALID_P (REGNO (x
)))
4350 int x_q
= REG_QTY (REGNO (x
));
4351 struct qty_table_elem
*x_ent
= &qty_table
[x_q
];
4353 if (x_ent
->const_rtx
)
4354 x
= gen_lowpart_if_possible (GET_MODE (x
), x_ent
->const_rtx
);
4357 if (x
== 0 || CONSTANT_P (x
))
4360 /* If X is a MEM, try to fold it outside the context of any insn to see if
4361 it might be equivalent to a constant. That handles the case where it
4362 is a constant-pool reference. Then try to look it up in the hash table
4363 in case it is something whose value we have seen before. */
4365 if (GET_CODE (x
) == MEM
)
4367 struct table_elt
*elt
;
4369 x
= fold_rtx (x
, NULL_RTX
);
4373 elt
= lookup (x
, safe_hash (x
, GET_MODE (x
)) & HASH_MASK
, GET_MODE (x
));
4377 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
4378 if (elt
->is_const
&& CONSTANT_P (elt
->exp
))
4385 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
4386 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
4387 least-significant part of X.
4388 MODE specifies how big a part of X to return.
4390 If the requested operation cannot be done, 0 is returned.
4392 This is similar to gen_lowpart in emit-rtl.c. */
4395 gen_lowpart_if_possible (mode
, x
)
4396 enum machine_mode mode
;
4399 rtx result
= gen_lowpart_common (mode
, x
);
4403 else if (GET_CODE (x
) == MEM
)
4405 /* This is the only other case we handle. */
4409 if (WORDS_BIG_ENDIAN
)
4410 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
4411 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
4412 if (BYTES_BIG_ENDIAN
)
4413 /* Adjust the address so that the address-after-the-data is
4415 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
4416 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
4418 new = adjust_address_nv (x
, mode
, offset
);
4419 if (! memory_address_p (mode
, XEXP (new, 0)))
4428 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
4429 branch. It will be zero if not.
4431 In certain cases, this can cause us to add an equivalence. For example,
4432 if we are following the taken case of
4434 we can add the fact that `i' and '2' are now equivalent.
4436 In any case, we can record that this comparison was passed. If the same
4437 comparison is seen later, we will know its value. */
4440 record_jump_equiv (insn
, taken
)
4444 int cond_known_true
;
4447 enum machine_mode mode
, mode0
, mode1
;
4448 int reversed_nonequality
= 0;
4451 /* Ensure this is the right kind of insn. */
4452 if (! any_condjump_p (insn
))
4454 set
= pc_set (insn
);
4456 /* See if this jump condition is known true or false. */
4458 cond_known_true
= (XEXP (SET_SRC (set
), 2) == pc_rtx
);
4460 cond_known_true
= (XEXP (SET_SRC (set
), 1) == pc_rtx
);
4462 /* Get the type of comparison being done and the operands being compared.
4463 If we had to reverse a non-equality condition, record that fact so we
4464 know that it isn't valid for floating-point. */
4465 code
= GET_CODE (XEXP (SET_SRC (set
), 0));
4466 op0
= fold_rtx (XEXP (XEXP (SET_SRC (set
), 0), 0), insn
);
4467 op1
= fold_rtx (XEXP (XEXP (SET_SRC (set
), 0), 1), insn
);
4469 code
= find_comparison_args (code
, &op0
, &op1
, &mode0
, &mode1
);
4470 if (! cond_known_true
)
4472 code
= reversed_comparison_code_parts (code
, op0
, op1
, insn
);
4474 /* Don't remember if we can't find the inverse. */
4475 if (code
== UNKNOWN
)
4479 /* The mode is the mode of the non-constant. */
4481 if (mode1
!= VOIDmode
)
4484 record_jump_cond (code
, mode
, op0
, op1
, reversed_nonequality
);
4487 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
4488 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
4489 Make any useful entries we can with that information. Called from
4490 above function and called recursively. */
4493 record_jump_cond (code
, mode
, op0
, op1
, reversed_nonequality
)
4495 enum machine_mode mode
;
4497 int reversed_nonequality
;
4499 unsigned op0_hash
, op1_hash
;
4500 int op0_in_memory
, op1_in_memory
;
4501 struct table_elt
*op0_elt
, *op1_elt
;
4503 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
4504 we know that they are also equal in the smaller mode (this is also
4505 true for all smaller modes whether or not there is a SUBREG, but
4506 is not worth testing for with no SUBREG). */
4508 /* Note that GET_MODE (op0) may not equal MODE. */
4509 if (code
== EQ
&& GET_CODE (op0
) == SUBREG
4510 && (GET_MODE_SIZE (GET_MODE (op0
))
4511 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
)))))
4513 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
4514 rtx tem
= gen_lowpart_if_possible (inner_mode
, op1
);
4516 record_jump_cond (code
, mode
, SUBREG_REG (op0
),
4517 tem
? tem
: gen_rtx_SUBREG (inner_mode
, op1
, 0),
4518 reversed_nonequality
);
4521 if (code
== EQ
&& GET_CODE (op1
) == SUBREG
4522 && (GET_MODE_SIZE (GET_MODE (op1
))
4523 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
)))))
4525 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
4526 rtx tem
= gen_lowpart_if_possible (inner_mode
, op0
);
4528 record_jump_cond (code
, mode
, SUBREG_REG (op1
),
4529 tem
? tem
: gen_rtx_SUBREG (inner_mode
, op0
, 0),
4530 reversed_nonequality
);
4533 /* Similarly, if this is an NE comparison, and either is a SUBREG
4534 making a smaller mode, we know the whole thing is also NE. */
4536 /* Note that GET_MODE (op0) may not equal MODE;
4537 if we test MODE instead, we can get an infinite recursion
4538 alternating between two modes each wider than MODE. */
4540 if (code
== NE
&& GET_CODE (op0
) == SUBREG
4541 && subreg_lowpart_p (op0
)
4542 && (GET_MODE_SIZE (GET_MODE (op0
))
4543 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
)))))
4545 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
4546 rtx tem
= gen_lowpart_if_possible (inner_mode
, op1
);
4548 record_jump_cond (code
, mode
, SUBREG_REG (op0
),
4549 tem
? tem
: gen_rtx_SUBREG (inner_mode
, op1
, 0),
4550 reversed_nonequality
);
4553 if (code
== NE
&& GET_CODE (op1
) == SUBREG
4554 && subreg_lowpart_p (op1
)
4555 && (GET_MODE_SIZE (GET_MODE (op1
))
4556 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
)))))
4558 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
4559 rtx tem
= gen_lowpart_if_possible (inner_mode
, op0
);
4561 record_jump_cond (code
, mode
, SUBREG_REG (op1
),
4562 tem
? tem
: gen_rtx_SUBREG (inner_mode
, op0
, 0),
4563 reversed_nonequality
);
4566 /* Hash both operands. */
4569 hash_arg_in_memory
= 0;
4570 op0_hash
= HASH (op0
, mode
);
4571 op0_in_memory
= hash_arg_in_memory
;
4577 hash_arg_in_memory
= 0;
4578 op1_hash
= HASH (op1
, mode
);
4579 op1_in_memory
= hash_arg_in_memory
;
4584 /* Look up both operands. */
4585 op0_elt
= lookup (op0
, op0_hash
, mode
);
4586 op1_elt
= lookup (op1
, op1_hash
, mode
);
4588 /* If both operands are already equivalent or if they are not in the
4589 table but are identical, do nothing. */
4590 if ((op0_elt
!= 0 && op1_elt
!= 0
4591 && op0_elt
->first_same_value
== op1_elt
->first_same_value
)
4592 || op0
== op1
|| rtx_equal_p (op0
, op1
))
4595 /* If we aren't setting two things equal all we can do is save this
4596 comparison. Similarly if this is floating-point. In the latter
4597 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
4598 If we record the equality, we might inadvertently delete code
4599 whose intent was to change -0 to +0. */
4601 if (code
!= EQ
|| FLOAT_MODE_P (GET_MODE (op0
)))
4603 struct qty_table_elem
*ent
;
4606 /* If we reversed a floating-point comparison, if OP0 is not a
4607 register, or if OP1 is neither a register or constant, we can't
4610 if (GET_CODE (op1
) != REG
)
4611 op1
= equiv_constant (op1
);
4613 if ((reversed_nonequality
&& FLOAT_MODE_P (mode
))
4614 || GET_CODE (op0
) != REG
|| op1
== 0)
4617 /* Put OP0 in the hash table if it isn't already. This gives it a
4618 new quantity number. */
4621 if (insert_regs (op0
, NULL
, 0))
4623 rehash_using_reg (op0
);
4624 op0_hash
= HASH (op0
, mode
);
4626 /* If OP0 is contained in OP1, this changes its hash code
4627 as well. Faster to rehash than to check, except
4628 for the simple case of a constant. */
4629 if (! CONSTANT_P (op1
))
4630 op1_hash
= HASH (op1
,mode
);
4633 op0_elt
= insert (op0
, NULL
, op0_hash
, mode
);
4634 op0_elt
->in_memory
= op0_in_memory
;
4637 qty
= REG_QTY (REGNO (op0
));
4638 ent
= &qty_table
[qty
];
4640 ent
->comparison_code
= code
;
4641 if (GET_CODE (op1
) == REG
)
4643 /* Look it up again--in case op0 and op1 are the same. */
4644 op1_elt
= lookup (op1
, op1_hash
, mode
);
4646 /* Put OP1 in the hash table so it gets a new quantity number. */
4649 if (insert_regs (op1
, NULL
, 0))
4651 rehash_using_reg (op1
);
4652 op1_hash
= HASH (op1
, mode
);
4655 op1_elt
= insert (op1
, NULL
, op1_hash
, mode
);
4656 op1_elt
->in_memory
= op1_in_memory
;
4659 ent
->comparison_const
= NULL_RTX
;
4660 ent
->comparison_qty
= REG_QTY (REGNO (op1
));
4664 ent
->comparison_const
= op1
;
4665 ent
->comparison_qty
= -1;
4671 /* If either side is still missing an equivalence, make it now,
4672 then merge the equivalences. */
4676 if (insert_regs (op0
, NULL
, 0))
4678 rehash_using_reg (op0
);
4679 op0_hash
= HASH (op0
, mode
);
4682 op0_elt
= insert (op0
, NULL
, op0_hash
, mode
);
4683 op0_elt
->in_memory
= op0_in_memory
;
4688 if (insert_regs (op1
, NULL
, 0))
4690 rehash_using_reg (op1
);
4691 op1_hash
= HASH (op1
, mode
);
4694 op1_elt
= insert (op1
, NULL
, op1_hash
, mode
);
4695 op1_elt
->in_memory
= op1_in_memory
;
4698 merge_equiv_classes (op0_elt
, op1_elt
);
4699 last_jump_equiv_class
= op0_elt
;
4702 /* CSE processing for one instruction.
4703 First simplify sources and addresses of all assignments
4704 in the instruction, using previously-computed equivalents values.
4705 Then install the new sources and destinations in the table
4706 of available values.
4708 If LIBCALL_INSN is nonzero, don't record any equivalence made in
4709 the insn. It means that INSN is inside libcall block. In this
4710 case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */
4712 /* Data on one SET contained in the instruction. */
4716 /* The SET rtx itself. */
4718 /* The SET_SRC of the rtx (the original value, if it is changing). */
4720 /* The hash-table element for the SET_SRC of the SET. */
4721 struct table_elt
*src_elt
;
4722 /* Hash value for the SET_SRC. */
4724 /* Hash value for the SET_DEST. */
4726 /* The SET_DEST, with SUBREG, etc., stripped. */
4728 /* Nonzero if the SET_SRC is in memory. */
4730 /* Nonzero if the SET_SRC contains something
4731 whose value cannot be predicted and understood. */
4733 /* Original machine mode, in case it becomes a CONST_INT. */
4734 enum machine_mode mode
;
4735 /* A constant equivalent for SET_SRC, if any. */
4737 /* Original SET_SRC value used for libcall notes. */
4739 /* Hash value of constant equivalent for SET_SRC. */
4740 unsigned src_const_hash
;
4741 /* Table entry for constant equivalent for SET_SRC, if any. */
4742 struct table_elt
*src_const_elt
;
4746 cse_insn (insn
, libcall_insn
)
4750 rtx x
= PATTERN (insn
);
4756 /* Records what this insn does to set CC0. */
4757 rtx this_insn_cc0
= 0;
4758 enum machine_mode this_insn_cc0_mode
= VOIDmode
;
4762 struct table_elt
*src_eqv_elt
= 0;
4763 int src_eqv_volatile
= 0;
4764 int src_eqv_in_memory
= 0;
4765 unsigned src_eqv_hash
= 0;
4767 struct set
*sets
= (struct set
*) 0;
4771 /* Find all the SETs and CLOBBERs in this instruction.
4772 Record all the SETs in the array `set' and count them.
4773 Also determine whether there is a CLOBBER that invalidates
4774 all memory references, or all references at varying addresses. */
4776 if (GET_CODE (insn
) == CALL_INSN
)
4778 for (tem
= CALL_INSN_FUNCTION_USAGE (insn
); tem
; tem
= XEXP (tem
, 1))
4780 if (GET_CODE (XEXP (tem
, 0)) == CLOBBER
)
4781 invalidate (SET_DEST (XEXP (tem
, 0)), VOIDmode
);
4782 XEXP (tem
, 0) = canon_reg (XEXP (tem
, 0), insn
);
4786 if (GET_CODE (x
) == SET
)
4788 sets
= (struct set
*) alloca (sizeof (struct set
));
4791 /* Ignore SETs that are unconditional jumps.
4792 They never need cse processing, so this does not hurt.
4793 The reason is not efficiency but rather
4794 so that we can test at the end for instructions
4795 that have been simplified to unconditional jumps
4796 and not be misled by unchanged instructions
4797 that were unconditional jumps to begin with. */
4798 if (SET_DEST (x
) == pc_rtx
4799 && GET_CODE (SET_SRC (x
)) == LABEL_REF
)
4802 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4803 The hard function value register is used only once, to copy to
4804 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
4805 Ensure we invalidate the destination register. On the 80386 no
4806 other code would invalidate it since it is a fixed_reg.
4807 We need not check the return of apply_change_group; see canon_reg. */
4809 else if (GET_CODE (SET_SRC (x
)) == CALL
)
4811 canon_reg (SET_SRC (x
), insn
);
4812 apply_change_group ();
4813 fold_rtx (SET_SRC (x
), insn
);
4814 invalidate (SET_DEST (x
), VOIDmode
);
4819 else if (GET_CODE (x
) == PARALLEL
)
4821 int lim
= XVECLEN (x
, 0);
4823 sets
= (struct set
*) alloca (lim
* sizeof (struct set
));
4825 /* Find all regs explicitly clobbered in this insn,
4826 and ensure they are not replaced with any other regs
4827 elsewhere in this insn.
4828 When a reg that is clobbered is also used for input,
4829 we should presume that that is for a reason,
4830 and we should not substitute some other register
4831 which is not supposed to be clobbered.
4832 Therefore, this loop cannot be merged into the one below
4833 because a CALL may precede a CLOBBER and refer to the
4834 value clobbered. We must not let a canonicalization do
4835 anything in that case. */
4836 for (i
= 0; i
< lim
; i
++)
4838 rtx y
= XVECEXP (x
, 0, i
);
4839 if (GET_CODE (y
) == CLOBBER
)
4841 rtx clobbered
= XEXP (y
, 0);
4843 if (GET_CODE (clobbered
) == REG
4844 || GET_CODE (clobbered
) == SUBREG
)
4845 invalidate (clobbered
, VOIDmode
);
4846 else if (GET_CODE (clobbered
) == STRICT_LOW_PART
4847 || GET_CODE (clobbered
) == ZERO_EXTRACT
)
4848 invalidate (XEXP (clobbered
, 0), GET_MODE (clobbered
));
4852 for (i
= 0; i
< lim
; i
++)
4854 rtx y
= XVECEXP (x
, 0, i
);
4855 if (GET_CODE (y
) == SET
)
4857 /* As above, we ignore unconditional jumps and call-insns and
4858 ignore the result of apply_change_group. */
4859 if (GET_CODE (SET_SRC (y
)) == CALL
)
4861 canon_reg (SET_SRC (y
), insn
);
4862 apply_change_group ();
4863 fold_rtx (SET_SRC (y
), insn
);
4864 invalidate (SET_DEST (y
), VOIDmode
);
4866 else if (SET_DEST (y
) == pc_rtx
4867 && GET_CODE (SET_SRC (y
)) == LABEL_REF
)
4870 sets
[n_sets
++].rtl
= y
;
4872 else if (GET_CODE (y
) == CLOBBER
)
4874 /* If we clobber memory, canon the address.
4875 This does nothing when a register is clobbered
4876 because we have already invalidated the reg. */
4877 if (GET_CODE (XEXP (y
, 0)) == MEM
)
4878 canon_reg (XEXP (y
, 0), NULL_RTX
);
4880 else if (GET_CODE (y
) == USE
4881 && ! (GET_CODE (XEXP (y
, 0)) == REG
4882 && REGNO (XEXP (y
, 0)) < FIRST_PSEUDO_REGISTER
))
4883 canon_reg (y
, NULL_RTX
);
4884 else if (GET_CODE (y
) == CALL
)
4886 /* The result of apply_change_group can be ignored; see
4888 canon_reg (y
, insn
);
4889 apply_change_group ();
4894 else if (GET_CODE (x
) == CLOBBER
)
4896 if (GET_CODE (XEXP (x
, 0)) == MEM
)
4897 canon_reg (XEXP (x
, 0), NULL_RTX
);
4900 /* Canonicalize a USE of a pseudo register or memory location. */
4901 else if (GET_CODE (x
) == USE
4902 && ! (GET_CODE (XEXP (x
, 0)) == REG
4903 && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
))
4904 canon_reg (XEXP (x
, 0), NULL_RTX
);
4905 else if (GET_CODE (x
) == CALL
)
4907 /* The result of apply_change_group can be ignored; see canon_reg. */
4908 canon_reg (x
, insn
);
4909 apply_change_group ();
4913 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
4914 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
4915 is handled specially for this case, and if it isn't set, then there will
4916 be no equivalence for the destination. */
4917 if (n_sets
== 1 && REG_NOTES (insn
) != 0
4918 && (tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
)) != 0
4919 && (! rtx_equal_p (XEXP (tem
, 0), SET_SRC (sets
[0].rtl
))
4920 || GET_CODE (SET_DEST (sets
[0].rtl
)) == STRICT_LOW_PART
))
4922 src_eqv
= fold_rtx (canon_reg (XEXP (tem
, 0), NULL_RTX
), insn
);
4923 XEXP (tem
, 0) = src_eqv
;
4926 /* Canonicalize sources and addresses of destinations.
4927 We do this in a separate pass to avoid problems when a MATCH_DUP is
4928 present in the insn pattern. In that case, we want to ensure that
4929 we don't break the duplicate nature of the pattern. So we will replace
4930 both operands at the same time. Otherwise, we would fail to find an
4931 equivalent substitution in the loop calling validate_change below.
4933 We used to suppress canonicalization of DEST if it appears in SRC,
4934 but we don't do this any more. */
4936 for (i
= 0; i
< n_sets
; i
++)
4938 rtx dest
= SET_DEST (sets
[i
].rtl
);
4939 rtx src
= SET_SRC (sets
[i
].rtl
);
4940 rtx
new = canon_reg (src
, insn
);
4943 sets
[i
].orig_src
= src
;
4944 if ((GET_CODE (new) == REG
&& GET_CODE (src
) == REG
4945 && ((REGNO (new) < FIRST_PSEUDO_REGISTER
)
4946 != (REGNO (src
) < FIRST_PSEUDO_REGISTER
)))
4947 || (insn_code
= recog_memoized (insn
)) < 0
4948 || insn_data
[insn_code
].n_dups
> 0)
4949 validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new, 1);
4951 SET_SRC (sets
[i
].rtl
) = new;
4953 if (GET_CODE (dest
) == ZERO_EXTRACT
|| GET_CODE (dest
) == SIGN_EXTRACT
)
4955 validate_change (insn
, &XEXP (dest
, 1),
4956 canon_reg (XEXP (dest
, 1), insn
), 1);
4957 validate_change (insn
, &XEXP (dest
, 2),
4958 canon_reg (XEXP (dest
, 2), insn
), 1);
4961 while (GET_CODE (dest
) == SUBREG
|| GET_CODE (dest
) == STRICT_LOW_PART
4962 || GET_CODE (dest
) == ZERO_EXTRACT
4963 || GET_CODE (dest
) == SIGN_EXTRACT
)
4964 dest
= XEXP (dest
, 0);
4966 if (GET_CODE (dest
) == MEM
)
4967 canon_reg (dest
, insn
);
4970 /* Now that we have done all the replacements, we can apply the change
4971 group and see if they all work. Note that this will cause some
4972 canonicalizations that would have worked individually not to be applied
4973 because some other canonicalization didn't work, but this should not
4976 The result of apply_change_group can be ignored; see canon_reg. */
4978 apply_change_group ();
4980 /* Set sets[i].src_elt to the class each source belongs to.
4981 Detect assignments from or to volatile things
4982 and set set[i] to zero so they will be ignored
4983 in the rest of this function.
4985 Nothing in this loop changes the hash table or the register chains. */
4987 for (i
= 0; i
< n_sets
; i
++)
4991 struct table_elt
*elt
= 0, *p
;
4992 enum machine_mode mode
;
4995 rtx src_related
= 0;
4996 struct table_elt
*src_const_elt
= 0;
4997 int src_cost
= MAX_COST
;
4998 int src_eqv_cost
= MAX_COST
;
4999 int src_folded_cost
= MAX_COST
;
5000 int src_related_cost
= MAX_COST
;
5001 int src_elt_cost
= MAX_COST
;
5002 int src_regcost
= MAX_COST
;
5003 int src_eqv_regcost
= MAX_COST
;
5004 int src_folded_regcost
= MAX_COST
;
5005 int src_related_regcost
= MAX_COST
;
5006 int src_elt_regcost
= MAX_COST
;
5007 /* Set nonzero if we need to call force_const_mem on with the
5008 contents of src_folded before using it. */
5009 int src_folded_force_flag
= 0;
5011 dest
= SET_DEST (sets
[i
].rtl
);
5012 src
= SET_SRC (sets
[i
].rtl
);
5014 /* If SRC is a constant that has no machine mode,
5015 hash it with the destination's machine mode.
5016 This way we can keep different modes separate. */
5018 mode
= GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
5019 sets
[i
].mode
= mode
;
5023 enum machine_mode eqvmode
= mode
;
5024 if (GET_CODE (dest
) == STRICT_LOW_PART
)
5025 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
5027 hash_arg_in_memory
= 0;
5028 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
5030 /* Find the equivalence class for the equivalent expression. */
5033 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, eqvmode
);
5035 src_eqv_volatile
= do_not_record
;
5036 src_eqv_in_memory
= hash_arg_in_memory
;
5039 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
5040 value of the INNER register, not the destination. So it is not
5041 a valid substitution for the source. But save it for later. */
5042 if (GET_CODE (dest
) == STRICT_LOW_PART
)
5045 src_eqv_here
= src_eqv
;
5047 /* Simplify and foldable subexpressions in SRC. Then get the fully-
5048 simplified result, which may not necessarily be valid. */
5049 src_folded
= fold_rtx (src
, insn
);
5052 /* ??? This caused bad code to be generated for the m68k port with -O2.
5053 Suppose src is (CONST_INT -1), and that after truncation src_folded
5054 is (CONST_INT 3). Suppose src_folded is then used for src_const.
5055 At the end we will add src and src_const to the same equivalence
5056 class. We now have 3 and -1 on the same equivalence class. This
5057 causes later instructions to be mis-optimized. */
5058 /* If storing a constant in a bitfield, pre-truncate the constant
5059 so we will be able to record it later. */
5060 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
5061 || GET_CODE (SET_DEST (sets
[i
].rtl
)) == SIGN_EXTRACT
)
5063 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
5065 if (GET_CODE (src
) == CONST_INT
5066 && GET_CODE (width
) == CONST_INT
5067 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
5068 && (INTVAL (src
) & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
5070 = GEN_INT (INTVAL (src
) & (((HOST_WIDE_INT
) 1
5071 << INTVAL (width
)) - 1));
5075 /* Compute SRC's hash code, and also notice if it
5076 should not be recorded at all. In that case,
5077 prevent any further processing of this assignment. */
5079 hash_arg_in_memory
= 0;
5082 sets
[i
].src_hash
= HASH (src
, mode
);
5083 sets
[i
].src_volatile
= do_not_record
;
5084 sets
[i
].src_in_memory
= hash_arg_in_memory
;
5086 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
5087 a pseudo, do not record SRC. Using SRC as a replacement for
5088 anything else will be incorrect in that situation. Note that
5089 this usually occurs only for stack slots, in which case all the
5090 RTL would be referring to SRC, so we don't lose any optimization
5091 opportunities by not having SRC in the hash table. */
5093 if (GET_CODE (src
) == MEM
5094 && find_reg_note (insn
, REG_EQUIV
, NULL_RTX
) != 0
5095 && GET_CODE (dest
) == REG
5096 && REGNO (dest
) >= FIRST_PSEUDO_REGISTER
)
5097 sets
[i
].src_volatile
= 1;
5100 /* It is no longer clear why we used to do this, but it doesn't
5101 appear to still be needed. So let's try without it since this
5102 code hurts cse'ing widened ops. */
5103 /* If source is a perverse subreg (such as QI treated as an SI),
5104 treat it as volatile. It may do the work of an SI in one context
5105 where the extra bits are not being used, but cannot replace an SI
5107 if (GET_CODE (src
) == SUBREG
5108 && (GET_MODE_SIZE (GET_MODE (src
))
5109 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))))
5110 sets
[i
].src_volatile
= 1;
5113 /* Locate all possible equivalent forms for SRC. Try to replace
5114 SRC in the insn with each cheaper equivalent.
5116 We have the following types of equivalents: SRC itself, a folded
5117 version, a value given in a REG_EQUAL note, or a value related
5120 Each of these equivalents may be part of an additional class
5121 of equivalents (if more than one is in the table, they must be in
5122 the same class; we check for this).
5124 If the source is volatile, we don't do any table lookups.
5126 We note any constant equivalent for possible later use in a
5129 if (!sets
[i
].src_volatile
)
5130 elt
= lookup (src
, sets
[i
].src_hash
, mode
);
5132 sets
[i
].src_elt
= elt
;
5134 if (elt
&& src_eqv_here
&& src_eqv_elt
)
5136 if (elt
->first_same_value
!= src_eqv_elt
->first_same_value
)
5138 /* The REG_EQUAL is indicating that two formerly distinct
5139 classes are now equivalent. So merge them. */
5140 merge_equiv_classes (elt
, src_eqv_elt
);
5141 src_eqv_hash
= HASH (src_eqv
, elt
->mode
);
5142 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, elt
->mode
);
5148 else if (src_eqv_elt
)
5151 /* Try to find a constant somewhere and record it in `src_const'.
5152 Record its table element, if any, in `src_const_elt'. Look in
5153 any known equivalences first. (If the constant is not in the
5154 table, also set `sets[i].src_const_hash'). */
5156 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
5160 src_const_elt
= elt
;
5165 && (CONSTANT_P (src_folded
)
5166 /* Consider (minus (label_ref L1) (label_ref L2)) as
5167 "constant" here so we will record it. This allows us
5168 to fold switch statements when an ADDR_DIFF_VEC is used. */
5169 || (GET_CODE (src_folded
) == MINUS
5170 && GET_CODE (XEXP (src_folded
, 0)) == LABEL_REF
5171 && GET_CODE (XEXP (src_folded
, 1)) == LABEL_REF
)))
5172 src_const
= src_folded
, src_const_elt
= elt
;
5173 else if (src_const
== 0 && src_eqv_here
&& CONSTANT_P (src_eqv_here
))
5174 src_const
= src_eqv_here
, src_const_elt
= src_eqv_elt
;
5176 /* If we don't know if the constant is in the table, get its
5177 hash code and look it up. */
5178 if (src_const
&& src_const_elt
== 0)
5180 sets
[i
].src_const_hash
= HASH (src_const
, mode
);
5181 src_const_elt
= lookup (src_const
, sets
[i
].src_const_hash
, mode
);
5184 sets
[i
].src_const
= src_const
;
5185 sets
[i
].src_const_elt
= src_const_elt
;
5187 /* If the constant and our source are both in the table, mark them as
5188 equivalent. Otherwise, if a constant is in the table but the source
5189 isn't, set ELT to it. */
5190 if (src_const_elt
&& elt
5191 && src_const_elt
->first_same_value
!= elt
->first_same_value
)
5192 merge_equiv_classes (elt
, src_const_elt
);
5193 else if (src_const_elt
&& elt
== 0)
5194 elt
= src_const_elt
;
5196 /* See if there is a register linearly related to a constant
5197 equivalent of SRC. */
5199 && (GET_CODE (src_const
) == CONST
5200 || (src_const_elt
&& src_const_elt
->related_value
!= 0)))
5202 src_related
= use_related_value (src_const
, src_const_elt
);
5205 struct table_elt
*src_related_elt
5206 = lookup (src_related
, HASH (src_related
, mode
), mode
);
5207 if (src_related_elt
&& elt
)
5209 if (elt
->first_same_value
5210 != src_related_elt
->first_same_value
)
5211 /* This can occur when we previously saw a CONST
5212 involving a SYMBOL_REF and then see the SYMBOL_REF
5213 twice. Merge the involved classes. */
5214 merge_equiv_classes (elt
, src_related_elt
);
5217 src_related_elt
= 0;
5219 else if (src_related_elt
&& elt
== 0)
5220 elt
= src_related_elt
;
5224 /* See if we have a CONST_INT that is already in a register in a
5227 if (src_const
&& src_related
== 0 && GET_CODE (src_const
) == CONST_INT
5228 && GET_MODE_CLASS (mode
) == MODE_INT
5229 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
)
5231 enum machine_mode wider_mode
;
5233 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
5234 GET_MODE_BITSIZE (wider_mode
) <= BITS_PER_WORD
5235 && src_related
== 0;
5236 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
5238 struct table_elt
*const_elt
5239 = lookup (src_const
, HASH (src_const
, wider_mode
), wider_mode
);
5244 for (const_elt
= const_elt
->first_same_value
;
5245 const_elt
; const_elt
= const_elt
->next_same_value
)
5246 if (GET_CODE (const_elt
->exp
) == REG
)
5248 src_related
= gen_lowpart_if_possible (mode
,
5255 /* Another possibility is that we have an AND with a constant in
5256 a mode narrower than a word. If so, it might have been generated
5257 as part of an "if" which would narrow the AND. If we already
5258 have done the AND in a wider mode, we can use a SUBREG of that
5261 if (flag_expensive_optimizations
&& ! src_related
5262 && GET_CODE (src
) == AND
&& GET_CODE (XEXP (src
, 1)) == CONST_INT
5263 && GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
5265 enum machine_mode tmode
;
5266 rtx new_and
= gen_rtx_AND (VOIDmode
, NULL_RTX
, XEXP (src
, 1));
5268 for (tmode
= GET_MODE_WIDER_MODE (mode
);
5269 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
5270 tmode
= GET_MODE_WIDER_MODE (tmode
))
5272 rtx inner
= gen_lowpart_if_possible (tmode
, XEXP (src
, 0));
5273 struct table_elt
*larger_elt
;
5277 PUT_MODE (new_and
, tmode
);
5278 XEXP (new_and
, 0) = inner
;
5279 larger_elt
= lookup (new_and
, HASH (new_and
, tmode
), tmode
);
5280 if (larger_elt
== 0)
5283 for (larger_elt
= larger_elt
->first_same_value
;
5284 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
5285 if (GET_CODE (larger_elt
->exp
) == REG
)
5288 = gen_lowpart_if_possible (mode
, larger_elt
->exp
);
5298 #ifdef LOAD_EXTEND_OP
5299 /* See if a MEM has already been loaded with a widening operation;
5300 if it has, we can use a subreg of that. Many CISC machines
5301 also have such operations, but this is only likely to be
5302 beneficial these machines. */
5304 if (flag_expensive_optimizations
&& src_related
== 0
5305 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
5306 && GET_MODE_CLASS (mode
) == MODE_INT
5307 && GET_CODE (src
) == MEM
&& ! do_not_record
5308 && LOAD_EXTEND_OP (mode
) != NIL
)
5310 enum machine_mode tmode
;
5312 /* Set what we are trying to extend and the operation it might
5313 have been extended with. */
5314 PUT_CODE (memory_extend_rtx
, LOAD_EXTEND_OP (mode
));
5315 XEXP (memory_extend_rtx
, 0) = src
;
5317 for (tmode
= GET_MODE_WIDER_MODE (mode
);
5318 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
5319 tmode
= GET_MODE_WIDER_MODE (tmode
))
5321 struct table_elt
*larger_elt
;
5323 PUT_MODE (memory_extend_rtx
, tmode
);
5324 larger_elt
= lookup (memory_extend_rtx
,
5325 HASH (memory_extend_rtx
, tmode
), tmode
);
5326 if (larger_elt
== 0)
5329 for (larger_elt
= larger_elt
->first_same_value
;
5330 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
5331 if (GET_CODE (larger_elt
->exp
) == REG
)
5333 src_related
= gen_lowpart_if_possible (mode
,
5342 #endif /* LOAD_EXTEND_OP */
5344 if (src
== src_folded
)
5347 /* At this point, ELT, if nonzero, points to a class of expressions
5348 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
5349 and SRC_RELATED, if nonzero, each contain additional equivalent
5350 expressions. Prune these latter expressions by deleting expressions
5351 already in the equivalence class.
5353 Check for an equivalent identical to the destination. If found,
5354 this is the preferred equivalent since it will likely lead to
5355 elimination of the insn. Indicate this by placing it in
5359 elt
= elt
->first_same_value
;
5360 for (p
= elt
; p
; p
= p
->next_same_value
)
5362 enum rtx_code code
= GET_CODE (p
->exp
);
5364 /* If the expression is not valid, ignore it. Then we do not
5365 have to check for validity below. In most cases, we can use
5366 `rtx_equal_p', since canonicalization has already been done. */
5367 if (code
!= REG
&& ! exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
5370 /* Also skip paradoxical subregs, unless that's what we're
5373 && (GET_MODE_SIZE (GET_MODE (p
->exp
))
5374 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p
->exp
))))
5376 && GET_CODE (src
) == SUBREG
5377 && GET_MODE (src
) == GET_MODE (p
->exp
)
5378 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))
5379 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p
->exp
))))))
5382 if (src
&& GET_CODE (src
) == code
&& rtx_equal_p (src
, p
->exp
))
5384 else if (src_folded
&& GET_CODE (src_folded
) == code
5385 && rtx_equal_p (src_folded
, p
->exp
))
5387 else if (src_eqv_here
&& GET_CODE (src_eqv_here
) == code
5388 && rtx_equal_p (src_eqv_here
, p
->exp
))
5390 else if (src_related
&& GET_CODE (src_related
) == code
5391 && rtx_equal_p (src_related
, p
->exp
))
5394 /* This is the same as the destination of the insns, we want
5395 to prefer it. Copy it to src_related. The code below will
5396 then give it a negative cost. */
5397 if (GET_CODE (dest
) == code
&& rtx_equal_p (p
->exp
, dest
))
5401 /* Find the cheapest valid equivalent, trying all the available
5402 possibilities. Prefer items not in the hash table to ones
5403 that are when they are equal cost. Note that we can never
5404 worsen an insn as the current contents will also succeed.
5405 If we find an equivalent identical to the destination, use it as best,
5406 since this insn will probably be eliminated in that case. */
5409 if (rtx_equal_p (src
, dest
))
5410 src_cost
= src_regcost
= -1;
5413 src_cost
= COST (src
);
5414 src_regcost
= approx_reg_cost (src
);
5420 if (rtx_equal_p (src_eqv_here
, dest
))
5421 src_eqv_cost
= src_eqv_regcost
= -1;
5424 src_eqv_cost
= COST (src_eqv_here
);
5425 src_eqv_regcost
= approx_reg_cost (src_eqv_here
);
5431 if (rtx_equal_p (src_folded
, dest
))
5432 src_folded_cost
= src_folded_regcost
= -1;
5435 src_folded_cost
= COST (src_folded
);
5436 src_folded_regcost
= approx_reg_cost (src_folded
);
5442 if (rtx_equal_p (src_related
, dest
))
5443 src_related_cost
= src_related_regcost
= -1;
5446 src_related_cost
= COST (src_related
);
5447 src_related_regcost
= approx_reg_cost (src_related
);
5451 /* If this was an indirect jump insn, a known label will really be
5452 cheaper even though it looks more expensive. */
5453 if (dest
== pc_rtx
&& src_const
&& GET_CODE (src_const
) == LABEL_REF
)
5454 src_folded
= src_const
, src_folded_cost
= src_folded_regcost
= -1;
5456 /* Terminate loop when replacement made. This must terminate since
5457 the current contents will be tested and will always be valid. */
5462 /* Skip invalid entries. */
5463 while (elt
&& GET_CODE (elt
->exp
) != REG
5464 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
5465 elt
= elt
->next_same_value
;
5467 /* A paradoxical subreg would be bad here: it'll be the right
5468 size, but later may be adjusted so that the upper bits aren't
5469 what we want. So reject it. */
5471 && GET_CODE (elt
->exp
) == SUBREG
5472 && (GET_MODE_SIZE (GET_MODE (elt
->exp
))
5473 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt
->exp
))))
5474 /* It is okay, though, if the rtx we're trying to match
5475 will ignore any of the bits we can't predict. */
5477 && GET_CODE (src
) == SUBREG
5478 && GET_MODE (src
) == GET_MODE (elt
->exp
)
5479 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))
5480 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt
->exp
))))))
5482 elt
= elt
->next_same_value
;
5488 src_elt_cost
= elt
->cost
;
5489 src_elt_regcost
= elt
->regcost
;
5492 /* Find cheapest and skip it for the next time. For items
5493 of equal cost, use this order:
5494 src_folded, src, src_eqv, src_related and hash table entry. */
5496 && preferrable (src_folded_cost
, src_folded_regcost
,
5497 src_cost
, src_regcost
) <= 0
5498 && preferrable (src_folded_cost
, src_folded_regcost
,
5499 src_eqv_cost
, src_eqv_regcost
) <= 0
5500 && preferrable (src_folded_cost
, src_folded_regcost
,
5501 src_related_cost
, src_related_regcost
) <= 0
5502 && preferrable (src_folded_cost
, src_folded_regcost
,
5503 src_elt_cost
, src_elt_regcost
) <= 0)
5505 trial
= src_folded
, src_folded_cost
= MAX_COST
;
5506 if (src_folded_force_flag
)
5507 trial
= force_const_mem (mode
, trial
);
5510 && preferrable (src_cost
, src_regcost
,
5511 src_eqv_cost
, src_eqv_regcost
) <= 0
5512 && preferrable (src_cost
, src_regcost
,
5513 src_related_cost
, src_related_regcost
) <= 0
5514 && preferrable (src_cost
, src_regcost
,
5515 src_elt_cost
, src_elt_regcost
) <= 0)
5516 trial
= src
, src_cost
= MAX_COST
;
5517 else if (src_eqv_here
5518 && preferrable (src_eqv_cost
, src_eqv_regcost
,
5519 src_related_cost
, src_related_regcost
) <= 0
5520 && preferrable (src_eqv_cost
, src_eqv_regcost
,
5521 src_elt_cost
, src_elt_regcost
) <= 0)
5522 trial
= copy_rtx (src_eqv_here
), src_eqv_cost
= MAX_COST
;
5523 else if (src_related
5524 && preferrable (src_related_cost
, src_related_regcost
,
5525 src_elt_cost
, src_elt_regcost
) <= 0)
5526 trial
= copy_rtx (src_related
), src_related_cost
= MAX_COST
;
5529 trial
= copy_rtx (elt
->exp
);
5530 elt
= elt
->next_same_value
;
5531 src_elt_cost
= MAX_COST
;
5534 /* We don't normally have an insn matching (set (pc) (pc)), so
5535 check for this separately here. We will delete such an
5538 For other cases such as a table jump or conditional jump
5539 where we know the ultimate target, go ahead and replace the
5540 operand. While that may not make a valid insn, we will
5541 reemit the jump below (and also insert any necessary
5543 if (n_sets
== 1 && dest
== pc_rtx
5545 || (GET_CODE (trial
) == LABEL_REF
5546 && ! condjump_p (insn
))))
5548 SET_SRC (sets
[i
].rtl
) = trial
;
5549 cse_jumps_altered
= 1;
5553 /* Look for a substitution that makes a valid insn. */
5554 else if (validate_change (insn
, &SET_SRC (sets
[i
].rtl
), trial
, 0))
5556 /* If we just made a substitution inside a libcall, then we
5557 need to make the same substitution in any notes attached
5558 to the RETVAL insn. */
5560 && (GET_CODE (sets
[i
].orig_src
) == REG
5561 || GET_CODE (sets
[i
].orig_src
) == SUBREG
5562 || GET_CODE (sets
[i
].orig_src
) == MEM
))
5563 replace_rtx (REG_NOTES (libcall_insn
), sets
[i
].orig_src
,
5564 canon_reg (SET_SRC (sets
[i
].rtl
), insn
));
5566 /* The result of apply_change_group can be ignored; see
5569 validate_change (insn
, &SET_SRC (sets
[i
].rtl
),
5570 canon_reg (SET_SRC (sets
[i
].rtl
), insn
),
5572 apply_change_group ();
5576 /* If we previously found constant pool entries for
5577 constants and this is a constant, try making a
5578 pool entry. Put it in src_folded unless we already have done
5579 this since that is where it likely came from. */
5581 else if (constant_pool_entries_cost
5582 && CONSTANT_P (trial
)
5583 /* Reject cases that will abort in decode_rtx_const.
5584 On the alpha when simplifying a switch, we get
5585 (const (truncate (minus (label_ref) (label_ref)))). */
5586 && ! (GET_CODE (trial
) == CONST
5587 && GET_CODE (XEXP (trial
, 0)) == TRUNCATE
)
5588 /* Likewise on IA-64, except without the truncate. */
5589 && ! (GET_CODE (trial
) == CONST
5590 && GET_CODE (XEXP (trial
, 0)) == MINUS
5591 && GET_CODE (XEXP (XEXP (trial
, 0), 0)) == LABEL_REF
5592 && GET_CODE (XEXP (XEXP (trial
, 0), 1)) == LABEL_REF
)
5594 || (GET_CODE (src_folded
) != MEM
5595 && ! src_folded_force_flag
))
5596 && GET_MODE_CLASS (mode
) != MODE_CC
5597 && mode
!= VOIDmode
)
5599 src_folded_force_flag
= 1;
5601 src_folded_cost
= constant_pool_entries_cost
;
5605 src
= SET_SRC (sets
[i
].rtl
);
5607 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5608 However, there is an important exception: If both are registers
5609 that are not the head of their equivalence class, replace SET_SRC
5610 with the head of the class. If we do not do this, we will have
5611 both registers live over a portion of the basic block. This way,
5612 their lifetimes will likely abut instead of overlapping. */
5613 if (GET_CODE (dest
) == REG
5614 && REGNO_QTY_VALID_P (REGNO (dest
)))
5616 int dest_q
= REG_QTY (REGNO (dest
));
5617 struct qty_table_elem
*dest_ent
= &qty_table
[dest_q
];
5619 if (dest_ent
->mode
== GET_MODE (dest
)
5620 && dest_ent
->first_reg
!= REGNO (dest
)
5621 && GET_CODE (src
) == REG
&& REGNO (src
) == REGNO (dest
)
5622 /* Don't do this if the original insn had a hard reg as
5623 SET_SRC or SET_DEST. */
5624 && (GET_CODE (sets
[i
].src
) != REG
5625 || REGNO (sets
[i
].src
) >= FIRST_PSEUDO_REGISTER
)
5626 && (GET_CODE (dest
) != REG
|| REGNO (dest
) >= FIRST_PSEUDO_REGISTER
))
5627 /* We can't call canon_reg here because it won't do anything if
5628 SRC is a hard register. */
5630 int src_q
= REG_QTY (REGNO (src
));
5631 struct qty_table_elem
*src_ent
= &qty_table
[src_q
];
5632 int first
= src_ent
->first_reg
;
5634 = (first
>= FIRST_PSEUDO_REGISTER
5635 ? regno_reg_rtx
[first
] : gen_rtx_REG (GET_MODE (src
), first
));
5637 /* We must use validate-change even for this, because this
5638 might be a special no-op instruction, suitable only to
5640 if (validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new_src
, 0))
5643 /* If we had a constant that is cheaper than what we are now
5644 setting SRC to, use that constant. We ignored it when we
5645 thought we could make this into a no-op. */
5646 if (src_const
&& COST (src_const
) < COST (src
)
5647 && validate_change (insn
, &SET_SRC (sets
[i
].rtl
),
5654 /* If we made a change, recompute SRC values. */
5655 if (src
!= sets
[i
].src
)
5659 hash_arg_in_memory
= 0;
5661 sets
[i
].src_hash
= HASH (src
, mode
);
5662 sets
[i
].src_volatile
= do_not_record
;
5663 sets
[i
].src_in_memory
= hash_arg_in_memory
;
5664 sets
[i
].src_elt
= lookup (src
, sets
[i
].src_hash
, mode
);
5667 /* If this is a single SET, we are setting a register, and we have an
5668 equivalent constant, we want to add a REG_NOTE. We don't want
5669 to write a REG_EQUAL note for a constant pseudo since verifying that
5670 that pseudo hasn't been eliminated is a pain. Such a note also
5671 won't help anything.
5673 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5674 which can be created for a reference to a compile time computable
5675 entry in a jump table. */
5677 if (n_sets
== 1 && src_const
&& GET_CODE (dest
) == REG
5678 && GET_CODE (src_const
) != REG
5679 && ! (GET_CODE (src_const
) == CONST
5680 && GET_CODE (XEXP (src_const
, 0)) == MINUS
5681 && GET_CODE (XEXP (XEXP (src_const
, 0), 0)) == LABEL_REF
5682 && GET_CODE (XEXP (XEXP (src_const
, 0), 1)) == LABEL_REF
))
5684 /* Make sure that the rtx is not shared with any other insn. */
5685 src_const
= copy_rtx (src_const
);
5687 /* Record the actual constant value in a REG_EQUAL note, making
5688 a new one if one does not already exist. */
5689 set_unique_reg_note (insn
, REG_EQUAL
, src_const
);
5691 /* If storing a constant value in a register that
5692 previously held the constant value 0,
5693 record this fact with a REG_WAS_0 note on this insn.
5695 Note that the *register* is required to have previously held 0,
5696 not just any register in the quantity and we must point to the
5697 insn that set that register to zero.
5699 Rather than track each register individually, we just see if
5700 the last set for this quantity was for this register. */
5702 if (REGNO_QTY_VALID_P (REGNO (dest
)))
5704 int dest_q
= REG_QTY (REGNO (dest
));
5705 struct qty_table_elem
*dest_ent
= &qty_table
[dest_q
];
5707 if (dest_ent
->const_rtx
== const0_rtx
)
5709 /* See if we previously had a REG_WAS_0 note. */
5710 rtx note
= find_reg_note (insn
, REG_WAS_0
, NULL_RTX
);
5711 rtx const_insn
= dest_ent
->const_insn
;
5713 if ((tem
= single_set (const_insn
)) != 0
5714 && rtx_equal_p (SET_DEST (tem
), dest
))
5717 XEXP (note
, 0) = const_insn
;
5720 = gen_rtx_INSN_LIST (REG_WAS_0
, const_insn
,
5727 /* Now deal with the destination. */
5730 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
5731 to the MEM or REG within it. */
5732 while (GET_CODE (dest
) == SIGN_EXTRACT
5733 || GET_CODE (dest
) == ZERO_EXTRACT
5734 || GET_CODE (dest
) == SUBREG
5735 || GET_CODE (dest
) == STRICT_LOW_PART
)
5736 dest
= XEXP (dest
, 0);
5738 sets
[i
].inner_dest
= dest
;
5740 if (GET_CODE (dest
) == MEM
)
5742 #ifdef PUSH_ROUNDING
5743 /* Stack pushes invalidate the stack pointer. */
5744 rtx addr
= XEXP (dest
, 0);
5745 if (GET_RTX_CLASS (GET_CODE (addr
)) == 'a'
5746 && XEXP (addr
, 0) == stack_pointer_rtx
)
5747 invalidate (stack_pointer_rtx
, Pmode
);
5749 dest
= fold_rtx (dest
, insn
);
5752 /* Compute the hash code of the destination now,
5753 before the effects of this instruction are recorded,
5754 since the register values used in the address computation
5755 are those before this instruction. */
5756 sets
[i
].dest_hash
= HASH (dest
, mode
);
5758 /* Don't enter a bit-field in the hash table
5759 because the value in it after the store
5760 may not equal what was stored, due to truncation. */
5762 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
5763 || GET_CODE (SET_DEST (sets
[i
].rtl
)) == SIGN_EXTRACT
)
5765 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
5767 if (src_const
!= 0 && GET_CODE (src_const
) == CONST_INT
5768 && GET_CODE (width
) == CONST_INT
5769 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
5770 && ! (INTVAL (src_const
)
5771 & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
5772 /* Exception: if the value is constant,
5773 and it won't be truncated, record it. */
5777 /* This is chosen so that the destination will be invalidated
5778 but no new value will be recorded.
5779 We must invalidate because sometimes constant
5780 values can be recorded for bitfields. */
5781 sets
[i
].src_elt
= 0;
5782 sets
[i
].src_volatile
= 1;
5788 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5790 else if (n_sets
== 1 && dest
== pc_rtx
&& src
== pc_rtx
)
5792 /* One less use of the label this insn used to jump to. */
5794 cse_jumps_altered
= 1;
5795 /* No more processing for this set. */
5799 /* If this SET is now setting PC to a label, we know it used to
5800 be a conditional or computed branch. */
5801 else if (dest
== pc_rtx
&& GET_CODE (src
) == LABEL_REF
)
5803 /* Now emit a BARRIER after the unconditional jump. */
5804 if (NEXT_INSN (insn
) == 0
5805 || GET_CODE (NEXT_INSN (insn
)) != BARRIER
)
5806 emit_barrier_after (insn
);
5808 /* We reemit the jump in as many cases as possible just in
5809 case the form of an unconditional jump is significantly
5810 different than a computed jump or conditional jump.
5812 If this insn has multiple sets, then reemitting the
5813 jump is nontrivial. So instead we just force rerecognition
5814 and hope for the best. */
5817 rtx
new = emit_jump_insn_after (gen_jump (XEXP (src
, 0)), insn
);
5819 JUMP_LABEL (new) = XEXP (src
, 0);
5820 LABEL_NUSES (XEXP (src
, 0))++;
5824 /* Now emit a BARRIER after the unconditional jump. */
5825 if (NEXT_INSN (insn
) == 0
5826 || GET_CODE (NEXT_INSN (insn
)) != BARRIER
)
5827 emit_barrier_after (insn
);
5830 INSN_CODE (insn
) = -1;
5832 never_reached_warning (insn
, NULL
);
5834 /* Do not bother deleting any unreachable code,
5835 let jump/flow do that. */
5837 cse_jumps_altered
= 1;
5841 /* If destination is volatile, invalidate it and then do no further
5842 processing for this assignment. */
5844 else if (do_not_record
)
5846 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
)
5847 invalidate (dest
, VOIDmode
);
5848 else if (GET_CODE (dest
) == MEM
)
5850 /* Outgoing arguments for a libcall don't
5851 affect any recorded expressions. */
5852 if (! libcall_insn
|| insn
== libcall_insn
)
5853 invalidate (dest
, VOIDmode
);
5855 else if (GET_CODE (dest
) == STRICT_LOW_PART
5856 || GET_CODE (dest
) == ZERO_EXTRACT
)
5857 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
5861 if (sets
[i
].rtl
!= 0 && dest
!= SET_DEST (sets
[i
].rtl
))
5862 sets
[i
].dest_hash
= HASH (SET_DEST (sets
[i
].rtl
), mode
);
5865 /* If setting CC0, record what it was set to, or a constant, if it
5866 is equivalent to a constant. If it is being set to a floating-point
5867 value, make a COMPARE with the appropriate constant of 0. If we
5868 don't do this, later code can interpret this as a test against
5869 const0_rtx, which can cause problems if we try to put it into an
5870 insn as a floating-point operand. */
5871 if (dest
== cc0_rtx
)
5873 this_insn_cc0
= src_const
&& mode
!= VOIDmode
? src_const
: src
;
5874 this_insn_cc0_mode
= mode
;
5875 if (FLOAT_MODE_P (mode
))
5876 this_insn_cc0
= gen_rtx_COMPARE (VOIDmode
, this_insn_cc0
,
5882 /* Now enter all non-volatile source expressions in the hash table
5883 if they are not already present.
5884 Record their equivalence classes in src_elt.
5885 This way we can insert the corresponding destinations into
5886 the same classes even if the actual sources are no longer in them
5887 (having been invalidated). */
5889 if (src_eqv
&& src_eqv_elt
== 0 && sets
[0].rtl
!= 0 && ! src_eqv_volatile
5890 && ! rtx_equal_p (src_eqv
, SET_DEST (sets
[0].rtl
)))
5892 struct table_elt
*elt
;
5893 struct table_elt
*classp
= sets
[0].src_elt
;
5894 rtx dest
= SET_DEST (sets
[0].rtl
);
5895 enum machine_mode eqvmode
= GET_MODE (dest
);
5897 if (GET_CODE (dest
) == STRICT_LOW_PART
)
5899 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
5902 if (insert_regs (src_eqv
, classp
, 0))
5904 rehash_using_reg (src_eqv
);
5905 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
5907 elt
= insert (src_eqv
, classp
, src_eqv_hash
, eqvmode
);
5908 elt
->in_memory
= src_eqv_in_memory
;
5911 /* Check to see if src_eqv_elt is the same as a set source which
5912 does not yet have an elt, and if so set the elt of the set source
5914 for (i
= 0; i
< n_sets
; i
++)
5915 if (sets
[i
].rtl
&& sets
[i
].src_elt
== 0
5916 && rtx_equal_p (SET_SRC (sets
[i
].rtl
), src_eqv
))
5917 sets
[i
].src_elt
= src_eqv_elt
;
5920 for (i
= 0; i
< n_sets
; i
++)
5921 if (sets
[i
].rtl
&& ! sets
[i
].src_volatile
5922 && ! rtx_equal_p (SET_SRC (sets
[i
].rtl
), SET_DEST (sets
[i
].rtl
)))
5924 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == STRICT_LOW_PART
)
5926 /* REG_EQUAL in setting a STRICT_LOW_PART
5927 gives an equivalent for the entire destination register,
5928 not just for the subreg being stored in now.
5929 This is a more interesting equivalence, so we arrange later
5930 to treat the entire reg as the destination. */
5931 sets
[i
].src_elt
= src_eqv_elt
;
5932 sets
[i
].src_hash
= src_eqv_hash
;
5936 /* Insert source and constant equivalent into hash table, if not
5938 struct table_elt
*classp
= src_eqv_elt
;
5939 rtx src
= sets
[i
].src
;
5940 rtx dest
= SET_DEST (sets
[i
].rtl
);
5941 enum machine_mode mode
5942 = GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
5944 if (sets
[i
].src_elt
== 0)
5946 /* Don't put a hard register source into the table if this is
5947 the last insn of a libcall. In this case, we only need
5948 to put src_eqv_elt in src_elt. */
5949 if (! find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
5951 struct table_elt
*elt
;
5953 /* Note that these insert_regs calls cannot remove
5954 any of the src_elt's, because they would have failed to
5955 match if not still valid. */
5956 if (insert_regs (src
, classp
, 0))
5958 rehash_using_reg (src
);
5959 sets
[i
].src_hash
= HASH (src
, mode
);
5961 elt
= insert (src
, classp
, sets
[i
].src_hash
, mode
);
5962 elt
->in_memory
= sets
[i
].src_in_memory
;
5963 sets
[i
].src_elt
= classp
= elt
;
5966 sets
[i
].src_elt
= classp
;
5968 if (sets
[i
].src_const
&& sets
[i
].src_const_elt
== 0
5969 && src
!= sets
[i
].src_const
5970 && ! rtx_equal_p (sets
[i
].src_const
, src
))
5971 sets
[i
].src_elt
= insert (sets
[i
].src_const
, classp
,
5972 sets
[i
].src_const_hash
, mode
);
5975 else if (sets
[i
].src_elt
== 0)
5976 /* If we did not insert the source into the hash table (e.g., it was
5977 volatile), note the equivalence class for the REG_EQUAL value, if any,
5978 so that the destination goes into that class. */
5979 sets
[i
].src_elt
= src_eqv_elt
;
5981 invalidate_from_clobbers (x
);
5983 /* Some registers are invalidated by subroutine calls. Memory is
5984 invalidated by non-constant calls. */
5986 if (GET_CODE (insn
) == CALL_INSN
)
5988 if (! CONST_OR_PURE_CALL_P (insn
))
5989 invalidate_memory ();
5990 invalidate_for_call ();
5993 /* Now invalidate everything set by this instruction.
5994 If a SUBREG or other funny destination is being set,
5995 sets[i].rtl is still nonzero, so here we invalidate the reg
5996 a part of which is being set. */
5998 for (i
= 0; i
< n_sets
; i
++)
6001 /* We can't use the inner dest, because the mode associated with
6002 a ZERO_EXTRACT is significant. */
6003 rtx dest
= SET_DEST (sets
[i
].rtl
);
6005 /* Needed for registers to remove the register from its
6006 previous quantity's chain.
6007 Needed for memory if this is a nonvarying address, unless
6008 we have just done an invalidate_memory that covers even those. */
6009 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
)
6010 invalidate (dest
, VOIDmode
);
6011 else if (GET_CODE (dest
) == MEM
)
6013 /* Outgoing arguments for a libcall don't
6014 affect any recorded expressions. */
6015 if (! libcall_insn
|| insn
== libcall_insn
)
6016 invalidate (dest
, VOIDmode
);
6018 else if (GET_CODE (dest
) == STRICT_LOW_PART
6019 || GET_CODE (dest
) == ZERO_EXTRACT
)
6020 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
6023 /* A volatile ASM invalidates everything. */
6024 if (GET_CODE (insn
) == INSN
6025 && GET_CODE (PATTERN (insn
)) == ASM_OPERANDS
6026 && MEM_VOLATILE_P (PATTERN (insn
)))
6027 flush_hash_table ();
6029 /* Make sure registers mentioned in destinations
6030 are safe for use in an expression to be inserted.
6031 This removes from the hash table
6032 any invalid entry that refers to one of these registers.
6034 We don't care about the return value from mention_regs because
6035 we are going to hash the SET_DEST values unconditionally. */
6037 for (i
= 0; i
< n_sets
; i
++)
6041 rtx x
= SET_DEST (sets
[i
].rtl
);
6043 if (GET_CODE (x
) != REG
)
6047 /* We used to rely on all references to a register becoming
6048 inaccessible when a register changes to a new quantity,
6049 since that changes the hash code. However, that is not
6050 safe, since after HASH_SIZE new quantities we get a
6051 hash 'collision' of a register with its own invalid
6052 entries. And since SUBREGs have been changed not to
6053 change their hash code with the hash code of the register,
6054 it wouldn't work any longer at all. So we have to check
6055 for any invalid references lying around now.
6056 This code is similar to the REG case in mention_regs,
6057 but it knows that reg_tick has been incremented, and
6058 it leaves reg_in_table as -1 . */
6059 unsigned int regno
= REGNO (x
);
6060 unsigned int endregno
6061 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
6062 : HARD_REGNO_NREGS (regno
, GET_MODE (x
)));
6065 for (i
= regno
; i
< endregno
; i
++)
6067 if (REG_IN_TABLE (i
) >= 0)
6069 remove_invalid_refs (i
);
6070 REG_IN_TABLE (i
) = -1;
6077 /* We may have just removed some of the src_elt's from the hash table.
6078 So replace each one with the current head of the same class. */
6080 for (i
= 0; i
< n_sets
; i
++)
6083 if (sets
[i
].src_elt
&& sets
[i
].src_elt
->first_same_value
== 0)
6084 /* If elt was removed, find current head of same class,
6085 or 0 if nothing remains of that class. */
6087 struct table_elt
*elt
= sets
[i
].src_elt
;
6089 while (elt
&& elt
->prev_same_value
)
6090 elt
= elt
->prev_same_value
;
6092 while (elt
&& elt
->first_same_value
== 0)
6093 elt
= elt
->next_same_value
;
6094 sets
[i
].src_elt
= elt
? elt
->first_same_value
: 0;
6098 /* Now insert the destinations into their equivalence classes. */
6100 for (i
= 0; i
< n_sets
; i
++)
6103 rtx dest
= SET_DEST (sets
[i
].rtl
);
6104 rtx inner_dest
= sets
[i
].inner_dest
;
6105 struct table_elt
*elt
;
6107 /* Don't record value if we are not supposed to risk allocating
6108 floating-point values in registers that might be wider than
6110 if ((flag_float_store
6111 && GET_CODE (dest
) == MEM
6112 && FLOAT_MODE_P (GET_MODE (dest
)))
6113 /* Don't record BLKmode values, because we don't know the
6114 size of it, and can't be sure that other BLKmode values
6115 have the same or smaller size. */
6116 || GET_MODE (dest
) == BLKmode
6117 /* Don't record values of destinations set inside a libcall block
6118 since we might delete the libcall. Things should have been set
6119 up so we won't want to reuse such a value, but we play it safe
6122 /* If we didn't put a REG_EQUAL value or a source into the hash
6123 table, there is no point is recording DEST. */
6124 || sets
[i
].src_elt
== 0
6125 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
6126 or SIGN_EXTEND, don't record DEST since it can cause
6127 some tracking to be wrong.
6129 ??? Think about this more later. */
6130 || (GET_CODE (dest
) == SUBREG
6131 && (GET_MODE_SIZE (GET_MODE (dest
))
6132 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))))
6133 && (GET_CODE (sets
[i
].src
) == SIGN_EXTEND
6134 || GET_CODE (sets
[i
].src
) == ZERO_EXTEND
)))
6137 /* STRICT_LOW_PART isn't part of the value BEING set,
6138 and neither is the SUBREG inside it.
6139 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
6140 if (GET_CODE (dest
) == STRICT_LOW_PART
)
6141 dest
= SUBREG_REG (XEXP (dest
, 0));
6143 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
)
6144 /* Registers must also be inserted into chains for quantities. */
6145 if (insert_regs (dest
, sets
[i
].src_elt
, 1))
6147 /* If `insert_regs' changes something, the hash code must be
6149 rehash_using_reg (dest
);
6150 sets
[i
].dest_hash
= HASH (dest
, GET_MODE (dest
));
6153 if (GET_CODE (inner_dest
) == MEM
6154 && GET_CODE (XEXP (inner_dest
, 0)) == ADDRESSOF
)
6155 /* Given (SET (MEM (ADDRESSOF (X))) Y) we don't want to say
6156 that (MEM (ADDRESSOF (X))) is equivalent to Y.
6157 Consider the case in which the address of the MEM is
6158 passed to a function, which alters the MEM. Then, if we
6159 later use Y instead of the MEM we'll miss the update. */
6160 elt
= insert (dest
, 0, sets
[i
].dest_hash
, GET_MODE (dest
));
6162 elt
= insert (dest
, sets
[i
].src_elt
,
6163 sets
[i
].dest_hash
, GET_MODE (dest
));
6165 elt
->in_memory
= (GET_CODE (sets
[i
].inner_dest
) == MEM
6166 && (! RTX_UNCHANGING_P (sets
[i
].inner_dest
)
6167 || FIXED_BASE_PLUS_P (XEXP (sets
[i
].inner_dest
,
6170 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
6171 narrower than M2, and both M1 and M2 are the same number of words,
6172 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
6173 make that equivalence as well.
6175 However, BAR may have equivalences for which gen_lowpart_if_possible
6176 will produce a simpler value than gen_lowpart_if_possible applied to
6177 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
6178 BAR's equivalences. If we don't get a simplified form, make
6179 the SUBREG. It will not be used in an equivalence, but will
6180 cause two similar assignments to be detected.
6182 Note the loop below will find SUBREG_REG (DEST) since we have
6183 already entered SRC and DEST of the SET in the table. */
6185 if (GET_CODE (dest
) == SUBREG
6186 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))) - 1)
6188 == (GET_MODE_SIZE (GET_MODE (dest
)) - 1) / UNITS_PER_WORD
)
6189 && (GET_MODE_SIZE (GET_MODE (dest
))
6190 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))))
6191 && sets
[i
].src_elt
!= 0)
6193 enum machine_mode new_mode
= GET_MODE (SUBREG_REG (dest
));
6194 struct table_elt
*elt
, *classp
= 0;
6196 for (elt
= sets
[i
].src_elt
->first_same_value
; elt
;
6197 elt
= elt
->next_same_value
)
6201 struct table_elt
*src_elt
;
6204 /* Ignore invalid entries. */
6205 if (GET_CODE (elt
->exp
) != REG
6206 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
6209 /* We may have already been playing subreg games. If the
6210 mode is already correct for the destination, use it. */
6211 if (GET_MODE (elt
->exp
) == new_mode
)
6215 /* Calculate big endian correction for the SUBREG_BYTE.
6216 We have already checked that M1 (GET_MODE (dest))
6217 is not narrower than M2 (new_mode). */
6218 if (BYTES_BIG_ENDIAN
)
6219 byte
= (GET_MODE_SIZE (GET_MODE (dest
))
6220 - GET_MODE_SIZE (new_mode
));
6222 new_src
= simplify_gen_subreg (new_mode
, elt
->exp
,
6223 GET_MODE (dest
), byte
);
6226 /* The call to simplify_gen_subreg fails if the value
6227 is VOIDmode, yet we can't do any simplification, e.g.
6228 for EXPR_LISTs denoting function call results.
6229 It is invalid to construct a SUBREG with a VOIDmode
6230 SUBREG_REG, hence a zero new_src means we can't do
6231 this substitution. */
6235 src_hash
= HASH (new_src
, new_mode
);
6236 src_elt
= lookup (new_src
, src_hash
, new_mode
);
6238 /* Put the new source in the hash table is if isn't
6242 if (insert_regs (new_src
, classp
, 0))
6244 rehash_using_reg (new_src
);
6245 src_hash
= HASH (new_src
, new_mode
);
6247 src_elt
= insert (new_src
, classp
, src_hash
, new_mode
);
6248 src_elt
->in_memory
= elt
->in_memory
;
6250 else if (classp
&& classp
!= src_elt
->first_same_value
)
6251 /* Show that two things that we've seen before are
6252 actually the same. */
6253 merge_equiv_classes (src_elt
, classp
);
6255 classp
= src_elt
->first_same_value
;
6256 /* Ignore invalid entries. */
6258 && GET_CODE (classp
->exp
) != REG
6259 && ! exp_equiv_p (classp
->exp
, classp
->exp
, 1, 0))
6260 classp
= classp
->next_same_value
;
6265 /* Special handling for (set REG0 REG1) where REG0 is the
6266 "cheapest", cheaper than REG1. After cse, REG1 will probably not
6267 be used in the sequel, so (if easily done) change this insn to
6268 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
6269 that computed their value. Then REG1 will become a dead store
6270 and won't cloud the situation for later optimizations.
6272 Do not make this change if REG1 is a hard register, because it will
6273 then be used in the sequel and we may be changing a two-operand insn
6274 into a three-operand insn.
6276 Also do not do this if we are operating on a copy of INSN.
6278 Also don't do this if INSN ends a libcall; this would cause an unrelated
6279 register to be set in the middle of a libcall, and we then get bad code
6280 if the libcall is deleted. */
6282 if (n_sets
== 1 && sets
[0].rtl
&& GET_CODE (SET_DEST (sets
[0].rtl
)) == REG
6283 && NEXT_INSN (PREV_INSN (insn
)) == insn
6284 && GET_CODE (SET_SRC (sets
[0].rtl
)) == REG
6285 && REGNO (SET_SRC (sets
[0].rtl
)) >= FIRST_PSEUDO_REGISTER
6286 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets
[0].rtl
))))
6288 int src_q
= REG_QTY (REGNO (SET_SRC (sets
[0].rtl
)));
6289 struct qty_table_elem
*src_ent
= &qty_table
[src_q
];
6291 if ((src_ent
->first_reg
== REGNO (SET_DEST (sets
[0].rtl
)))
6292 && ! find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
6294 rtx prev
= prev_nonnote_insn (insn
);
6296 /* Do not swap the registers around if the previous instruction
6297 attaches a REG_EQUIV note to REG1.
6299 ??? It's not entirely clear whether we can transfer a REG_EQUIV
6300 from the pseudo that originally shadowed an incoming argument
6301 to another register. Some uses of REG_EQUIV might rely on it
6302 being attached to REG1 rather than REG2.
6304 This section previously turned the REG_EQUIV into a REG_EQUAL
6305 note. We cannot do that because REG_EQUIV may provide an
6306 uninitialized stack slot when REG_PARM_STACK_SPACE is used. */
6308 if (prev
!= 0 && GET_CODE (prev
) == INSN
6309 && GET_CODE (PATTERN (prev
)) == SET
6310 && SET_DEST (PATTERN (prev
)) == SET_SRC (sets
[0].rtl
)
6311 && ! find_reg_note (prev
, REG_EQUIV
, NULL_RTX
))
6313 rtx dest
= SET_DEST (sets
[0].rtl
);
6314 rtx src
= SET_SRC (sets
[0].rtl
);
6317 validate_change (prev
, &SET_DEST (PATTERN (prev
)), dest
, 1);
6318 validate_change (insn
, &SET_DEST (sets
[0].rtl
), src
, 1);
6319 validate_change (insn
, &SET_SRC (sets
[0].rtl
), dest
, 1);
6320 apply_change_group ();
6322 /* If there was a REG_WAS_0 note on PREV, remove it. Move
6323 any REG_WAS_0 note on INSN to PREV. */
6324 note
= find_reg_note (prev
, REG_WAS_0
, NULL_RTX
);
6326 remove_note (prev
, note
);
6328 note
= find_reg_note (insn
, REG_WAS_0
, NULL_RTX
);
6331 remove_note (insn
, note
);
6332 XEXP (note
, 1) = REG_NOTES (prev
);
6333 REG_NOTES (prev
) = note
;
6336 /* If INSN has a REG_EQUAL note, and this note mentions
6337 REG0, then we must delete it, because the value in
6338 REG0 has changed. If the note's value is REG1, we must
6339 also delete it because that is now this insn's dest. */
6340 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
6342 && (reg_mentioned_p (dest
, XEXP (note
, 0))
6343 || rtx_equal_p (src
, XEXP (note
, 0))))
6344 remove_note (insn
, note
);
6349 /* If this is a conditional jump insn, record any known equivalences due to
6350 the condition being tested. */
6352 last_jump_equiv_class
= 0;
6353 if (GET_CODE (insn
) == JUMP_INSN
6354 && n_sets
== 1 && GET_CODE (x
) == SET
6355 && GET_CODE (SET_SRC (x
)) == IF_THEN_ELSE
)
6356 record_jump_equiv (insn
, 0);
6359 /* If the previous insn set CC0 and this insn no longer references CC0,
6360 delete the previous insn. Here we use the fact that nothing expects CC0
6361 to be valid over an insn, which is true until the final pass. */
6362 if (prev_insn
&& GET_CODE (prev_insn
) == INSN
6363 && (tem
= single_set (prev_insn
)) != 0
6364 && SET_DEST (tem
) == cc0_rtx
6365 && ! reg_mentioned_p (cc0_rtx
, x
))
6366 delete_insn (prev_insn
);
6368 prev_insn_cc0
= this_insn_cc0
;
6369 prev_insn_cc0_mode
= this_insn_cc0_mode
;
6375 /* Remove from the hash table all expressions that reference memory. */
6378 invalidate_memory ()
6381 struct table_elt
*p
, *next
;
6383 for (i
= 0; i
< HASH_SIZE
; i
++)
6384 for (p
= table
[i
]; p
; p
= next
)
6386 next
= p
->next_same_hash
;
6388 remove_from_table (p
, i
);
6392 /* If ADDR is an address that implicitly affects the stack pointer, return
6393 1 and update the register tables to show the effect. Else, return 0. */
6396 addr_affects_sp_p (addr
)
6399 if (GET_RTX_CLASS (GET_CODE (addr
)) == 'a'
6400 && GET_CODE (XEXP (addr
, 0)) == REG
6401 && REGNO (XEXP (addr
, 0)) == STACK_POINTER_REGNUM
)
6403 if (REG_TICK (STACK_POINTER_REGNUM
) >= 0)
6404 REG_TICK (STACK_POINTER_REGNUM
)++;
6406 /* This should be *very* rare. */
6407 if (TEST_HARD_REG_BIT (hard_regs_in_table
, STACK_POINTER_REGNUM
))
6408 invalidate (stack_pointer_rtx
, VOIDmode
);
6416 /* Perform invalidation on the basis of everything about an insn
6417 except for invalidating the actual places that are SET in it.
6418 This includes the places CLOBBERed, and anything that might
6419 alias with something that is SET or CLOBBERed.
6421 X is the pattern of the insn. */
6424 invalidate_from_clobbers (x
)
6427 if (GET_CODE (x
) == CLOBBER
)
6429 rtx ref
= XEXP (x
, 0);
6432 if (GET_CODE (ref
) == REG
|| GET_CODE (ref
) == SUBREG
6433 || GET_CODE (ref
) == MEM
)
6434 invalidate (ref
, VOIDmode
);
6435 else if (GET_CODE (ref
) == STRICT_LOW_PART
6436 || GET_CODE (ref
) == ZERO_EXTRACT
)
6437 invalidate (XEXP (ref
, 0), GET_MODE (ref
));
6440 else if (GET_CODE (x
) == PARALLEL
)
6443 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
6445 rtx y
= XVECEXP (x
, 0, i
);
6446 if (GET_CODE (y
) == CLOBBER
)
6448 rtx ref
= XEXP (y
, 0);
6449 if (GET_CODE (ref
) == REG
|| GET_CODE (ref
) == SUBREG
6450 || GET_CODE (ref
) == MEM
)
6451 invalidate (ref
, VOIDmode
);
6452 else if (GET_CODE (ref
) == STRICT_LOW_PART
6453 || GET_CODE (ref
) == ZERO_EXTRACT
)
6454 invalidate (XEXP (ref
, 0), GET_MODE (ref
));
6460 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
6461 and replace any registers in them with either an equivalent constant
6462 or the canonical form of the register. If we are inside an address,
6463 only do this if the address remains valid.
6465 OBJECT is 0 except when within a MEM in which case it is the MEM.
6467 Return the replacement for X. */
6470 cse_process_notes (x
, object
)
6474 enum rtx_code code
= GET_CODE (x
);
6475 const char *fmt
= GET_RTX_FORMAT (code
);
6492 validate_change (x
, &XEXP (x
, 0),
6493 cse_process_notes (XEXP (x
, 0), x
), 0);
6498 if (REG_NOTE_KIND (x
) == REG_EQUAL
)
6499 XEXP (x
, 0) = cse_process_notes (XEXP (x
, 0), NULL_RTX
);
6501 XEXP (x
, 1) = cse_process_notes (XEXP (x
, 1), NULL_RTX
);
6508 rtx
new = cse_process_notes (XEXP (x
, 0), object
);
6509 /* We don't substitute VOIDmode constants into these rtx,
6510 since they would impede folding. */
6511 if (GET_MODE (new) != VOIDmode
)
6512 validate_change (object
, &XEXP (x
, 0), new, 0);
6517 i
= REG_QTY (REGNO (x
));
6519 /* Return a constant or a constant register. */
6520 if (REGNO_QTY_VALID_P (REGNO (x
)))
6522 struct qty_table_elem
*ent
= &qty_table
[i
];
6524 if (ent
->const_rtx
!= NULL_RTX
6525 && (CONSTANT_P (ent
->const_rtx
)
6526 || GET_CODE (ent
->const_rtx
) == REG
))
6528 rtx
new = gen_lowpart_if_possible (GET_MODE (x
), ent
->const_rtx
);
6534 /* Otherwise, canonicalize this register. */
6535 return canon_reg (x
, NULL_RTX
);
6541 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
6543 validate_change (object
, &XEXP (x
, i
),
6544 cse_process_notes (XEXP (x
, i
), object
), 0);
6549 /* Find common subexpressions between the end test of a loop and the beginning
6550 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
6552 Often we have a loop where an expression in the exit test is used
6553 in the body of the loop. For example "while (*p) *q++ = *p++;".
6554 Because of the way we duplicate the loop exit test in front of the loop,
6555 however, we don't detect that common subexpression. This will be caught
6556 when global cse is implemented, but this is a quite common case.
6558 This function handles the most common cases of these common expressions.
6559 It is called after we have processed the basic block ending with the
6560 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
6561 jumps to a label used only once. */
6564 cse_around_loop (loop_start
)
6569 struct table_elt
*p
;
6571 /* If the jump at the end of the loop doesn't go to the start, we don't
6573 for (insn
= PREV_INSN (loop_start
);
6574 insn
&& (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) >= 0);
6575 insn
= PREV_INSN (insn
))
6579 || GET_CODE (insn
) != NOTE
6580 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
)
6583 /* If the last insn of the loop (the end test) was an NE comparison,
6584 we will interpret it as an EQ comparison, since we fell through
6585 the loop. Any equivalences resulting from that comparison are
6586 therefore not valid and must be invalidated. */
6587 if (last_jump_equiv_class
)
6588 for (p
= last_jump_equiv_class
->first_same_value
; p
;
6589 p
= p
->next_same_value
)
6591 if (GET_CODE (p
->exp
) == MEM
|| GET_CODE (p
->exp
) == REG
6592 || (GET_CODE (p
->exp
) == SUBREG
6593 && GET_CODE (SUBREG_REG (p
->exp
)) == REG
))
6594 invalidate (p
->exp
, VOIDmode
);
6595 else if (GET_CODE (p
->exp
) == STRICT_LOW_PART
6596 || GET_CODE (p
->exp
) == ZERO_EXTRACT
)
6597 invalidate (XEXP (p
->exp
, 0), GET_MODE (p
->exp
));
6600 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
6601 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
6603 The only thing we do with SET_DEST is invalidate entries, so we
6604 can safely process each SET in order. It is slightly less efficient
6605 to do so, but we only want to handle the most common cases.
6607 The gen_move_insn call in cse_set_around_loop may create new pseudos.
6608 These pseudos won't have valid entries in any of the tables indexed
6609 by register number, such as reg_qty. We avoid out-of-range array
6610 accesses by not processing any instructions created after cse started. */
6612 for (insn
= NEXT_INSN (loop_start
);
6613 GET_CODE (insn
) != CALL_INSN
&& GET_CODE (insn
) != CODE_LABEL
6614 && INSN_UID (insn
) < max_insn_uid
6615 && ! (GET_CODE (insn
) == NOTE
6616 && NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_END
);
6617 insn
= NEXT_INSN (insn
))
6620 && (GET_CODE (PATTERN (insn
)) == SET
6621 || GET_CODE (PATTERN (insn
)) == CLOBBER
))
6622 cse_set_around_loop (PATTERN (insn
), insn
, loop_start
);
6623 else if (INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == PARALLEL
)
6624 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
6625 if (GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == SET
6626 || GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == CLOBBER
)
6627 cse_set_around_loop (XVECEXP (PATTERN (insn
), 0, i
), insn
,
6632 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
6633 since they are done elsewhere. This function is called via note_stores. */
6636 invalidate_skipped_set (dest
, set
, data
)
6639 void *data ATTRIBUTE_UNUSED
;
6641 enum rtx_code code
= GET_CODE (dest
);
6644 && ! addr_affects_sp_p (dest
) /* If this is not a stack push ... */
6645 /* There are times when an address can appear varying and be a PLUS
6646 during this scan when it would be a fixed address were we to know
6647 the proper equivalences. So invalidate all memory if there is
6648 a BLKmode or nonscalar memory reference or a reference to a
6649 variable address. */
6650 && (MEM_IN_STRUCT_P (dest
) || GET_MODE (dest
) == BLKmode
6651 || cse_rtx_varies_p (XEXP (dest
, 0), 0)))
6653 invalidate_memory ();
6657 if (GET_CODE (set
) == CLOBBER
6664 if (code
== STRICT_LOW_PART
|| code
== ZERO_EXTRACT
)
6665 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
6666 else if (code
== REG
|| code
== SUBREG
|| code
== MEM
)
6667 invalidate (dest
, VOIDmode
);
6670 /* Invalidate all insns from START up to the end of the function or the
6671 next label. This called when we wish to CSE around a block that is
6672 conditionally executed. */
6675 invalidate_skipped_block (start
)
6680 for (insn
= start
; insn
&& GET_CODE (insn
) != CODE_LABEL
;
6681 insn
= NEXT_INSN (insn
))
6683 if (! INSN_P (insn
))
6686 if (GET_CODE (insn
) == CALL_INSN
)
6688 if (! CONST_OR_PURE_CALL_P (insn
))
6689 invalidate_memory ();
6690 invalidate_for_call ();
6693 invalidate_from_clobbers (PATTERN (insn
));
6694 note_stores (PATTERN (insn
), invalidate_skipped_set
, NULL
);
6698 /* If modifying X will modify the value in *DATA (which is really an
6699 `rtx *'), indicate that fact by setting the pointed to value to
6703 cse_check_loop_start (x
, set
, data
)
6705 rtx set ATTRIBUTE_UNUSED
;
6708 rtx
*cse_check_loop_start_value
= (rtx
*) data
;
6710 if (*cse_check_loop_start_value
== NULL_RTX
6711 || GET_CODE (x
) == CC0
|| GET_CODE (x
) == PC
)
6714 if ((GET_CODE (x
) == MEM
&& GET_CODE (*cse_check_loop_start_value
) == MEM
)
6715 || reg_overlap_mentioned_p (x
, *cse_check_loop_start_value
))
6716 *cse_check_loop_start_value
= NULL_RTX
;
6719 /* X is a SET or CLOBBER contained in INSN that was found near the start of
6720 a loop that starts with the label at LOOP_START.
6722 If X is a SET, we see if its SET_SRC is currently in our hash table.
6723 If so, we see if it has a value equal to some register used only in the
6724 loop exit code (as marked by jump.c).
6726 If those two conditions are true, we search backwards from the start of
6727 the loop to see if that same value was loaded into a register that still
6728 retains its value at the start of the loop.
6730 If so, we insert an insn after the load to copy the destination of that
6731 load into the equivalent register and (try to) replace our SET_SRC with that
6734 In any event, we invalidate whatever this SET or CLOBBER modifies. */
6737 cse_set_around_loop (x
, insn
, loop_start
)
6742 struct table_elt
*src_elt
;
6744 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
6745 are setting PC or CC0 or whose SET_SRC is already a register. */
6746 if (GET_CODE (x
) == SET
6747 && GET_CODE (SET_DEST (x
)) != PC
&& GET_CODE (SET_DEST (x
)) != CC0
6748 && GET_CODE (SET_SRC (x
)) != REG
)
6750 src_elt
= lookup (SET_SRC (x
),
6751 HASH (SET_SRC (x
), GET_MODE (SET_DEST (x
))),
6752 GET_MODE (SET_DEST (x
)));
6755 for (src_elt
= src_elt
->first_same_value
; src_elt
;
6756 src_elt
= src_elt
->next_same_value
)
6757 if (GET_CODE (src_elt
->exp
) == REG
&& REG_LOOP_TEST_P (src_elt
->exp
)
6758 && COST (src_elt
->exp
) < COST (SET_SRC (x
)))
6762 /* Look for an insn in front of LOOP_START that sets
6763 something in the desired mode to SET_SRC (x) before we hit
6764 a label or CALL_INSN. */
6766 for (p
= prev_nonnote_insn (loop_start
);
6767 p
&& GET_CODE (p
) != CALL_INSN
6768 && GET_CODE (p
) != CODE_LABEL
;
6769 p
= prev_nonnote_insn (p
))
6770 if ((set
= single_set (p
)) != 0
6771 && GET_CODE (SET_DEST (set
)) == REG
6772 && GET_MODE (SET_DEST (set
)) == src_elt
->mode
6773 && rtx_equal_p (SET_SRC (set
), SET_SRC (x
)))
6775 /* We now have to ensure that nothing between P
6776 and LOOP_START modified anything referenced in
6777 SET_SRC (x). We know that nothing within the loop
6778 can modify it, or we would have invalidated it in
6781 rtx cse_check_loop_start_value
= SET_SRC (x
);
6782 for (q
= p
; q
!= loop_start
; q
= NEXT_INSN (q
))
6784 note_stores (PATTERN (q
),
6785 cse_check_loop_start
,
6786 &cse_check_loop_start_value
);
6788 /* If nothing was changed and we can replace our
6789 SET_SRC, add an insn after P to copy its destination
6790 to what we will be replacing SET_SRC with. */
6791 if (cse_check_loop_start_value
6792 && validate_change (insn
, &SET_SRC (x
),
6795 /* If this creates new pseudos, this is unsafe,
6796 because the regno of new pseudo is unsuitable
6797 to index into reg_qty when cse_insn processes
6798 the new insn. Therefore, if a new pseudo was
6799 created, discard this optimization. */
6800 int nregs
= max_reg_num ();
6802 = gen_move_insn (src_elt
->exp
, SET_DEST (set
));
6803 if (nregs
!= max_reg_num ())
6805 if (! validate_change (insn
, &SET_SRC (x
),
6810 emit_insn_after (move
, p
);
6817 /* Deal with the destination of X affecting the stack pointer. */
6818 addr_affects_sp_p (SET_DEST (x
));
6820 /* See comment on similar code in cse_insn for explanation of these
6822 if (GET_CODE (SET_DEST (x
)) == REG
|| GET_CODE (SET_DEST (x
)) == SUBREG
6823 || GET_CODE (SET_DEST (x
)) == MEM
)
6824 invalidate (SET_DEST (x
), VOIDmode
);
6825 else if (GET_CODE (SET_DEST (x
)) == STRICT_LOW_PART
6826 || GET_CODE (SET_DEST (x
)) == ZERO_EXTRACT
)
6827 invalidate (XEXP (SET_DEST (x
), 0), GET_MODE (SET_DEST (x
)));
6830 /* Find the end of INSN's basic block and return its range,
6831 the total number of SETs in all the insns of the block, the last insn of the
6832 block, and the branch path.
6834 The branch path indicates which branches should be followed. If a nonzero
6835 path size is specified, the block should be rescanned and a different set
6836 of branches will be taken. The branch path is only used if
6837 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is nonzero.
6839 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
6840 used to describe the block. It is filled in with the information about
6841 the current block. The incoming structure's branch path, if any, is used
6842 to construct the output branch path. */
6845 cse_end_of_basic_block (insn
, data
, follow_jumps
, after_loop
, skip_blocks
)
6847 struct cse_basic_block_data
*data
;
6854 int low_cuid
= INSN_CUID (insn
), high_cuid
= INSN_CUID (insn
);
6855 rtx next
= INSN_P (insn
) ? insn
: next_real_insn (insn
);
6856 int path_size
= data
->path_size
;
6860 /* Update the previous branch path, if any. If the last branch was
6861 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
6862 shorten the path by one and look at the previous branch. We know that
6863 at least one branch must have been taken if PATH_SIZE is nonzero. */
6864 while (path_size
> 0)
6866 if (data
->path
[path_size
- 1].status
!= NOT_TAKEN
)
6868 data
->path
[path_size
- 1].status
= NOT_TAKEN
;
6875 /* If the first instruction is marked with QImode, that means we've
6876 already processed this block. Our caller will look at DATA->LAST
6877 to figure out where to go next. We want to return the next block
6878 in the instruction stream, not some branched-to block somewhere
6879 else. We accomplish this by pretending our called forbid us to
6880 follow jumps, or skip blocks. */
6881 if (GET_MODE (insn
) == QImode
)
6882 follow_jumps
= skip_blocks
= 0;
6884 /* Scan to end of this basic block. */
6885 while (p
&& GET_CODE (p
) != CODE_LABEL
)
6887 /* Don't cse out the end of a loop. This makes a difference
6888 only for the unusual loops that always execute at least once;
6889 all other loops have labels there so we will stop in any case.
6890 Cse'ing out the end of the loop is dangerous because it
6891 might cause an invariant expression inside the loop
6892 to be reused after the end of the loop. This would make it
6893 hard to move the expression out of the loop in loop.c,
6894 especially if it is one of several equivalent expressions
6895 and loop.c would like to eliminate it.
6897 If we are running after loop.c has finished, we can ignore
6898 the NOTE_INSN_LOOP_END. */
6900 if (! after_loop
&& GET_CODE (p
) == NOTE
6901 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
6904 /* Don't cse over a call to setjmp; on some machines (eg VAX)
6905 the regs restored by the longjmp come from
6906 a later time than the setjmp. */
6907 if (PREV_INSN (p
) && GET_CODE (PREV_INSN (p
)) == CALL_INSN
6908 && find_reg_note (PREV_INSN (p
), REG_SETJMP
, NULL
))
6911 /* A PARALLEL can have lots of SETs in it,
6912 especially if it is really an ASM_OPERANDS. */
6913 if (INSN_P (p
) && GET_CODE (PATTERN (p
)) == PARALLEL
)
6914 nsets
+= XVECLEN (PATTERN (p
), 0);
6915 else if (GET_CODE (p
) != NOTE
)
6918 /* Ignore insns made by CSE; they cannot affect the boundaries of
6921 if (INSN_UID (p
) <= max_uid
&& INSN_CUID (p
) > high_cuid
)
6922 high_cuid
= INSN_CUID (p
);
6923 if (INSN_UID (p
) <= max_uid
&& INSN_CUID (p
) < low_cuid
)
6924 low_cuid
= INSN_CUID (p
);
6926 /* See if this insn is in our branch path. If it is and we are to
6928 if (path_entry
< path_size
&& data
->path
[path_entry
].branch
== p
)
6930 if (data
->path
[path_entry
].status
!= NOT_TAKEN
)
6933 /* Point to next entry in path, if any. */
6937 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
6938 was specified, we haven't reached our maximum path length, there are
6939 insns following the target of the jump, this is the only use of the
6940 jump label, and the target label is preceded by a BARRIER.
6942 Alternatively, we can follow the jump if it branches around a
6943 block of code and there are no other branches into the block.
6944 In this case invalidate_skipped_block will be called to invalidate any
6945 registers set in the block when following the jump. */
6947 else if ((follow_jumps
|| skip_blocks
) && path_size
< PATHLENGTH
- 1
6948 && GET_CODE (p
) == JUMP_INSN
6949 && GET_CODE (PATTERN (p
)) == SET
6950 && GET_CODE (SET_SRC (PATTERN (p
))) == IF_THEN_ELSE
6951 && JUMP_LABEL (p
) != 0
6952 && LABEL_NUSES (JUMP_LABEL (p
)) == 1
6953 && NEXT_INSN (JUMP_LABEL (p
)) != 0)
6955 for (q
= PREV_INSN (JUMP_LABEL (p
)); q
; q
= PREV_INSN (q
))
6956 if ((GET_CODE (q
) != NOTE
6957 || NOTE_LINE_NUMBER (q
) == NOTE_INSN_LOOP_END
6958 || (PREV_INSN (q
) && GET_CODE (PREV_INSN (q
)) == CALL_INSN
6959 && find_reg_note (PREV_INSN (q
), REG_SETJMP
, NULL
)))
6960 && (GET_CODE (q
) != CODE_LABEL
|| LABEL_NUSES (q
) != 0))
6963 /* If we ran into a BARRIER, this code is an extension of the
6964 basic block when the branch is taken. */
6965 if (follow_jumps
&& q
!= 0 && GET_CODE (q
) == BARRIER
)
6967 /* Don't allow ourself to keep walking around an
6968 always-executed loop. */
6969 if (next_real_insn (q
) == next
)
6975 /* Similarly, don't put a branch in our path more than once. */
6976 for (i
= 0; i
< path_entry
; i
++)
6977 if (data
->path
[i
].branch
== p
)
6980 if (i
!= path_entry
)
6983 data
->path
[path_entry
].branch
= p
;
6984 data
->path
[path_entry
++].status
= TAKEN
;
6986 /* This branch now ends our path. It was possible that we
6987 didn't see this branch the last time around (when the
6988 insn in front of the target was a JUMP_INSN that was
6989 turned into a no-op). */
6990 path_size
= path_entry
;
6993 /* Mark block so we won't scan it again later. */
6994 PUT_MODE (NEXT_INSN (p
), QImode
);
6996 /* Detect a branch around a block of code. */
6997 else if (skip_blocks
&& q
!= 0 && GET_CODE (q
) != CODE_LABEL
)
7001 if (next_real_insn (q
) == next
)
7007 for (i
= 0; i
< path_entry
; i
++)
7008 if (data
->path
[i
].branch
== p
)
7011 if (i
!= path_entry
)
7014 /* This is no_labels_between_p (p, q) with an added check for
7015 reaching the end of a function (in case Q precedes P). */
7016 for (tmp
= NEXT_INSN (p
); tmp
&& tmp
!= q
; tmp
= NEXT_INSN (tmp
))
7017 if (GET_CODE (tmp
) == CODE_LABEL
)
7022 data
->path
[path_entry
].branch
= p
;
7023 data
->path
[path_entry
++].status
= AROUND
;
7025 path_size
= path_entry
;
7028 /* Mark block so we won't scan it again later. */
7029 PUT_MODE (NEXT_INSN (p
), QImode
);
7036 data
->low_cuid
= low_cuid
;
7037 data
->high_cuid
= high_cuid
;
7038 data
->nsets
= nsets
;
7041 /* If all jumps in the path are not taken, set our path length to zero
7042 so a rescan won't be done. */
7043 for (i
= path_size
- 1; i
>= 0; i
--)
7044 if (data
->path
[i
].status
!= NOT_TAKEN
)
7048 data
->path_size
= 0;
7050 data
->path_size
= path_size
;
7052 /* End the current branch path. */
7053 data
->path
[path_size
].branch
= 0;
7056 /* Perform cse on the instructions of a function.
7057 F is the first instruction.
7058 NREGS is one plus the highest pseudo-reg number used in the instruction.
7060 AFTER_LOOP is 1 if this is the cse call done after loop optimization
7061 (only if -frerun-cse-after-loop).
7063 Returns 1 if jump_optimize should be redone due to simplifications
7064 in conditional jump instructions. */
7067 cse_main (f
, nregs
, after_loop
, file
)
7073 struct cse_basic_block_data val
;
7077 cse_jumps_altered
= 0;
7078 recorded_label_ref
= 0;
7079 constant_pool_entries_cost
= 0;
7083 init_alias_analysis ();
7087 max_insn_uid
= get_max_uid ();
7089 reg_eqv_table
= (struct reg_eqv_elem
*)
7090 xmalloc (nregs
* sizeof (struct reg_eqv_elem
));
7092 #ifdef LOAD_EXTEND_OP
7094 /* Allocate scratch rtl here. cse_insn will fill in the memory reference
7095 and change the code and mode as appropriate. */
7096 memory_extend_rtx
= gen_rtx_ZERO_EXTEND (VOIDmode
, NULL_RTX
);
7099 /* Reset the counter indicating how many elements have been made
7101 n_elements_made
= 0;
7103 /* Find the largest uid. */
7105 max_uid
= get_max_uid ();
7106 uid_cuid
= (int *) xcalloc (max_uid
+ 1, sizeof (int));
7108 /* Compute the mapping from uids to cuids.
7109 CUIDs are numbers assigned to insns, like uids,
7110 except that cuids increase monotonically through the code.
7111 Don't assign cuids to line-number NOTEs, so that the distance in cuids
7112 between two insns is not affected by -g. */
7114 for (insn
= f
, i
= 0; insn
; insn
= NEXT_INSN (insn
))
7116 if (GET_CODE (insn
) != NOTE
7117 || NOTE_LINE_NUMBER (insn
) < 0)
7118 INSN_CUID (insn
) = ++i
;
7120 /* Give a line number note the same cuid as preceding insn. */
7121 INSN_CUID (insn
) = i
;
7124 ggc_push_context ();
7126 /* Loop over basic blocks.
7127 Compute the maximum number of qty's needed for each basic block
7128 (which is 2 for each SET). */
7133 cse_end_of_basic_block (insn
, &val
, flag_cse_follow_jumps
, after_loop
,
7134 flag_cse_skip_blocks
);
7136 /* If this basic block was already processed or has no sets, skip it. */
7137 if (val
.nsets
== 0 || GET_MODE (insn
) == QImode
)
7139 PUT_MODE (insn
, VOIDmode
);
7140 insn
= (val
.last
? NEXT_INSN (val
.last
) : 0);
7145 cse_basic_block_start
= val
.low_cuid
;
7146 cse_basic_block_end
= val
.high_cuid
;
7147 max_qty
= val
.nsets
* 2;
7150 fnotice (file
, ";; Processing block from %d to %d, %d sets.\n",
7151 INSN_UID (insn
), val
.last
? INSN_UID (val
.last
) : 0,
7154 /* Make MAX_QTY bigger to give us room to optimize
7155 past the end of this basic block, if that should prove useful. */
7161 /* If this basic block is being extended by following certain jumps,
7162 (see `cse_end_of_basic_block'), we reprocess the code from the start.
7163 Otherwise, we start after this basic block. */
7164 if (val
.path_size
> 0)
7165 cse_basic_block (insn
, val
.last
, val
.path
, 0);
7168 int old_cse_jumps_altered
= cse_jumps_altered
;
7171 /* When cse changes a conditional jump to an unconditional
7172 jump, we want to reprocess the block, since it will give
7173 us a new branch path to investigate. */
7174 cse_jumps_altered
= 0;
7175 temp
= cse_basic_block (insn
, val
.last
, val
.path
, ! after_loop
);
7176 if (cse_jumps_altered
== 0
7177 || (flag_cse_follow_jumps
== 0 && flag_cse_skip_blocks
== 0))
7180 cse_jumps_altered
|= old_cse_jumps_altered
;
7193 if (max_elements_made
< n_elements_made
)
7194 max_elements_made
= n_elements_made
;
7197 end_alias_analysis ();
7199 free (reg_eqv_table
);
7201 return cse_jumps_altered
|| recorded_label_ref
;
7204 /* Process a single basic block. FROM and TO and the limits of the basic
7205 block. NEXT_BRANCH points to the branch path when following jumps or
7206 a null path when not following jumps.
7208 AROUND_LOOP is nonzero if we are to try to cse around to the start of a
7209 loop. This is true when we are being called for the last time on a
7210 block and this CSE pass is before loop.c. */
7213 cse_basic_block (from
, to
, next_branch
, around_loop
)
7215 struct branch_path
*next_branch
;
7220 rtx libcall_insn
= NULL_RTX
;
7223 /* This array is undefined before max_reg, so only allocate
7224 the space actually needed and adjust the start. */
7227 = (struct qty_table_elem
*) xmalloc ((max_qty
- max_reg
)
7228 * sizeof (struct qty_table_elem
));
7229 qty_table
-= max_reg
;
7233 /* TO might be a label. If so, protect it from being deleted. */
7234 if (to
!= 0 && GET_CODE (to
) == CODE_LABEL
)
7237 for (insn
= from
; insn
!= to
; insn
= NEXT_INSN (insn
))
7239 enum rtx_code code
= GET_CODE (insn
);
7241 /* If we have processed 1,000 insns, flush the hash table to
7242 avoid extreme quadratic behavior. We must not include NOTEs
7243 in the count since there may be more of them when generating
7244 debugging information. If we clear the table at different
7245 times, code generated with -g -O might be different than code
7246 generated with -O but not -g.
7248 ??? This is a real kludge and needs to be done some other way.
7250 if (code
!= NOTE
&& num_insns
++ > 1000)
7252 flush_hash_table ();
7256 /* See if this is a branch that is part of the path. If so, and it is
7257 to be taken, do so. */
7258 if (next_branch
->branch
== insn
)
7260 enum taken status
= next_branch
++->status
;
7261 if (status
!= NOT_TAKEN
)
7263 if (status
== TAKEN
)
7264 record_jump_equiv (insn
, 1);
7266 invalidate_skipped_block (NEXT_INSN (insn
));
7268 /* Set the last insn as the jump insn; it doesn't affect cc0.
7269 Then follow this branch. */
7274 insn
= JUMP_LABEL (insn
);
7279 if (GET_MODE (insn
) == QImode
)
7280 PUT_MODE (insn
, VOIDmode
);
7282 if (GET_RTX_CLASS (code
) == 'i')
7286 /* Process notes first so we have all notes in canonical forms when
7287 looking for duplicate operations. */
7289 if (REG_NOTES (insn
))
7290 REG_NOTES (insn
) = cse_process_notes (REG_NOTES (insn
), NULL_RTX
);
7292 /* Track when we are inside in LIBCALL block. Inside such a block,
7293 we do not want to record destinations. The last insn of a
7294 LIBCALL block is not considered to be part of the block, since
7295 its destination is the result of the block and hence should be
7298 if (REG_NOTES (insn
) != 0)
7300 if ((p
= find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
)))
7301 libcall_insn
= XEXP (p
, 0);
7302 else if (find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
7306 cse_insn (insn
, libcall_insn
);
7308 /* If we haven't already found an insn where we added a LABEL_REF,
7310 if (GET_CODE (insn
) == INSN
&& ! recorded_label_ref
7311 && for_each_rtx (&PATTERN (insn
), check_for_label_ref
,
7313 recorded_label_ref
= 1;
7316 /* If INSN is now an unconditional jump, skip to the end of our
7317 basic block by pretending that we just did the last insn in the
7318 basic block. If we are jumping to the end of our block, show
7319 that we can have one usage of TO. */
7321 if (any_uncondjump_p (insn
))
7325 free (qty_table
+ max_reg
);
7329 if (JUMP_LABEL (insn
) == to
)
7332 /* Maybe TO was deleted because the jump is unconditional.
7333 If so, there is nothing left in this basic block. */
7334 /* ??? Perhaps it would be smarter to set TO
7335 to whatever follows this insn,
7336 and pretend the basic block had always ended here. */
7337 if (INSN_DELETED_P (to
))
7340 insn
= PREV_INSN (to
);
7343 /* See if it is ok to keep on going past the label
7344 which used to end our basic block. Remember that we incremented
7345 the count of that label, so we decrement it here. If we made
7346 a jump unconditional, TO_USAGE will be one; in that case, we don't
7347 want to count the use in that jump. */
7349 if (to
!= 0 && NEXT_INSN (insn
) == to
7350 && GET_CODE (to
) == CODE_LABEL
&& --LABEL_NUSES (to
) == to_usage
)
7352 struct cse_basic_block_data val
;
7355 insn
= NEXT_INSN (to
);
7357 /* If TO was the last insn in the function, we are done. */
7360 free (qty_table
+ max_reg
);
7364 /* If TO was preceded by a BARRIER we are done with this block
7365 because it has no continuation. */
7366 prev
= prev_nonnote_insn (to
);
7367 if (prev
&& GET_CODE (prev
) == BARRIER
)
7369 free (qty_table
+ max_reg
);
7373 /* Find the end of the following block. Note that we won't be
7374 following branches in this case. */
7377 cse_end_of_basic_block (insn
, &val
, 0, 0, 0);
7379 /* If the tables we allocated have enough space left
7380 to handle all the SETs in the next basic block,
7381 continue through it. Otherwise, return,
7382 and that block will be scanned individually. */
7383 if (val
.nsets
* 2 + next_qty
> max_qty
)
7386 cse_basic_block_start
= val
.low_cuid
;
7387 cse_basic_block_end
= val
.high_cuid
;
7390 /* Prevent TO from being deleted if it is a label. */
7391 if (to
!= 0 && GET_CODE (to
) == CODE_LABEL
)
7394 /* Back up so we process the first insn in the extension. */
7395 insn
= PREV_INSN (insn
);
7399 if (next_qty
> max_qty
)
7402 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
7403 the previous insn is the only insn that branches to the head of a loop,
7404 we can cse into the loop. Don't do this if we changed the jump
7405 structure of a loop unless we aren't going to be following jumps. */
7407 insn
= prev_nonnote_insn (to
);
7408 if ((cse_jumps_altered
== 0
7409 || (flag_cse_follow_jumps
== 0 && flag_cse_skip_blocks
== 0))
7410 && around_loop
&& to
!= 0
7411 && GET_CODE (to
) == NOTE
&& NOTE_LINE_NUMBER (to
) == NOTE_INSN_LOOP_END
7412 && GET_CODE (insn
) == JUMP_INSN
7413 && JUMP_LABEL (insn
) != 0
7414 && LABEL_NUSES (JUMP_LABEL (insn
)) == 1)
7415 cse_around_loop (JUMP_LABEL (insn
));
7417 free (qty_table
+ max_reg
);
7419 return to
? NEXT_INSN (to
) : 0;
7422 /* Called via for_each_rtx to see if an insn is using a LABEL_REF for which
7423 there isn't a REG_LABEL note. Return one if so. DATA is the insn. */
7426 check_for_label_ref (rtl
, data
)
7430 rtx insn
= (rtx
) data
;
7432 /* If this insn uses a LABEL_REF and there isn't a REG_LABEL note for it,
7433 we must rerun jump since it needs to place the note. If this is a
7434 LABEL_REF for a CODE_LABEL that isn't in the insn chain, don't do this
7435 since no REG_LABEL will be added. */
7436 return (GET_CODE (*rtl
) == LABEL_REF
7437 && ! LABEL_REF_NONLOCAL_P (*rtl
)
7438 && LABEL_P (XEXP (*rtl
, 0))
7439 && INSN_UID (XEXP (*rtl
, 0)) != 0
7440 && ! find_reg_note (insn
, REG_LABEL
, XEXP (*rtl
, 0)));
7443 /* Count the number of times registers are used (not set) in X.
7444 COUNTS is an array in which we accumulate the count, INCR is how much
7445 we count each register usage.
7447 Don't count a usage of DEST, which is the SET_DEST of a SET which
7448 contains X in its SET_SRC. This is because such a SET does not
7449 modify the liveness of DEST. */
7452 count_reg_usage (x
, counts
, dest
, incr
)
7465 switch (code
= GET_CODE (x
))
7469 counts
[REGNO (x
)] += incr
;
7483 /* If we are clobbering a MEM, mark any registers inside the address
7485 if (GET_CODE (XEXP (x
, 0)) == MEM
)
7486 count_reg_usage (XEXP (XEXP (x
, 0), 0), counts
, NULL_RTX
, incr
);
7490 /* Unless we are setting a REG, count everything in SET_DEST. */
7491 if (GET_CODE (SET_DEST (x
)) != REG
)
7492 count_reg_usage (SET_DEST (x
), counts
, NULL_RTX
, incr
);
7494 /* If SRC has side-effects, then we can't delete this insn, so the
7495 usage of SET_DEST inside SRC counts.
7497 ??? Strictly-speaking, we might be preserving this insn
7498 because some other SET has side-effects, but that's hard
7499 to do and can't happen now. */
7500 count_reg_usage (SET_SRC (x
), counts
,
7501 side_effects_p (SET_SRC (x
)) ? NULL_RTX
: SET_DEST (x
),
7506 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x
), counts
, NULL_RTX
, incr
);
7511 count_reg_usage (PATTERN (x
), counts
, NULL_RTX
, incr
);
7513 /* Things used in a REG_EQUAL note aren't dead since loop may try to
7516 count_reg_usage (REG_NOTES (x
), counts
, NULL_RTX
, incr
);
7521 if (REG_NOTE_KIND (x
) == REG_EQUAL
7522 || (REG_NOTE_KIND (x
) != REG_NONNEG
&& GET_CODE (XEXP (x
,0)) == USE
))
7523 count_reg_usage (XEXP (x
, 0), counts
, NULL_RTX
, incr
);
7524 count_reg_usage (XEXP (x
, 1), counts
, NULL_RTX
, incr
);
7531 fmt
= GET_RTX_FORMAT (code
);
7532 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
7535 count_reg_usage (XEXP (x
, i
), counts
, dest
, incr
);
7536 else if (fmt
[i
] == 'E')
7537 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
7538 count_reg_usage (XVECEXP (x
, i
, j
), counts
, dest
, incr
);
7542 /* Return true if set is live. */
7544 set_live_p (set
, insn
, counts
)
7546 rtx insn ATTRIBUTE_UNUSED
; /* Only used with HAVE_cc0. */
7553 if (set_noop_p (set
))
7557 else if (GET_CODE (SET_DEST (set
)) == CC0
7558 && !side_effects_p (SET_SRC (set
))
7559 && ((tem
= next_nonnote_insn (insn
)) == 0
7561 || !reg_referenced_p (cc0_rtx
, PATTERN (tem
))))
7564 else if (GET_CODE (SET_DEST (set
)) != REG
7565 || REGNO (SET_DEST (set
)) < FIRST_PSEUDO_REGISTER
7566 || counts
[REGNO (SET_DEST (set
))] != 0
7567 || side_effects_p (SET_SRC (set
))
7568 /* An ADDRESSOF expression can turn into a use of the
7569 internal arg pointer, so always consider the
7570 internal arg pointer live. If it is truly dead,
7571 flow will delete the initializing insn. */
7572 || (SET_DEST (set
) == current_function_internal_arg_pointer
))
7577 /* Return true if insn is live. */
7580 insn_live_p (insn
, counts
)
7585 if (GET_CODE (PATTERN (insn
)) == SET
)
7586 return set_live_p (PATTERN (insn
), insn
, counts
);
7587 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
7589 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
7591 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
7593 if (GET_CODE (elt
) == SET
)
7595 if (set_live_p (elt
, insn
, counts
))
7598 else if (GET_CODE (elt
) != CLOBBER
&& GET_CODE (elt
) != USE
)
7607 /* Return true if libcall is dead as a whole. */
7610 dead_libcall_p (insn
, counts
)
7615 /* See if there's a REG_EQUAL note on this insn and try to
7616 replace the source with the REG_EQUAL expression.
7618 We assume that insns with REG_RETVALs can only be reg->reg
7619 copies at this point. */
7620 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
7623 rtx set
= single_set (insn
);
7624 rtx
new = simplify_rtx (XEXP (note
, 0));
7627 new = XEXP (note
, 0);
7629 /* While changing insn, we must update the counts accordingly. */
7630 count_reg_usage (insn
, counts
, NULL_RTX
, -1);
7632 if (set
&& validate_change (insn
, &SET_SRC (set
), new, 0))
7634 count_reg_usage (insn
, counts
, NULL_RTX
, 1);
7635 remove_note (insn
, find_reg_note (insn
, REG_RETVAL
, NULL_RTX
));
7636 remove_note (insn
, note
);
7639 count_reg_usage (insn
, counts
, NULL_RTX
, 1);
7644 /* Scan all the insns and delete any that are dead; i.e., they store a register
7645 that is never used or they copy a register to itself.
7647 This is used to remove insns made obviously dead by cse, loop or other
7648 optimizations. It improves the heuristics in loop since it won't try to
7649 move dead invariants out of loops or make givs for dead quantities. The
7650 remaining passes of the compilation are also sped up. */
7653 delete_trivially_dead_insns (insns
, nreg
)
7659 int in_libcall
= 0, dead_libcall
= 0;
7660 int ndead
= 0, nlastdead
, niterations
= 0;
7662 timevar_push (TV_DELETE_TRIVIALLY_DEAD
);
7663 /* First count the number of times each register is used. */
7664 counts
= (int *) xcalloc (nreg
, sizeof (int));
7665 for (insn
= next_real_insn (insns
); insn
; insn
= next_real_insn (insn
))
7666 count_reg_usage (insn
, counts
, NULL_RTX
, 1);
7672 /* Go from the last insn to the first and delete insns that only set unused
7673 registers or copy a register to itself. As we delete an insn, remove
7674 usage counts for registers it uses.
7676 The first jump optimization pass may leave a real insn as the last
7677 insn in the function. We must not skip that insn or we may end
7678 up deleting code that is not really dead. */
7679 insn
= get_last_insn ();
7680 if (! INSN_P (insn
))
7681 insn
= prev_real_insn (insn
);
7683 for (; insn
; insn
= prev
)
7687 prev
= prev_real_insn (insn
);
7689 /* Don't delete any insns that are part of a libcall block unless
7690 we can delete the whole libcall block.
7692 Flow or loop might get confused if we did that. Remember
7693 that we are scanning backwards. */
7694 if (find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
7698 dead_libcall
= dead_libcall_p (insn
, counts
);
7700 else if (in_libcall
)
7701 live_insn
= ! dead_libcall
;
7703 live_insn
= insn_live_p (insn
, counts
);
7705 /* If this is a dead insn, delete it and show registers in it aren't
7710 count_reg_usage (insn
, counts
, NULL_RTX
, -1);
7711 delete_insn_and_edges (insn
);
7715 if (find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
))
7722 while (ndead
!= nlastdead
);
7724 if (rtl_dump_file
&& ndead
)
7725 fprintf (rtl_dump_file
, "Deleted %i trivially dead insns; %i iterations\n",
7726 ndead
, niterations
);
7729 timevar_pop (TV_DELETE_TRIVIALLY_DEAD
);