1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009,
5 Free Software Foundation, Inc.
7 This file is part of GCC.
9 GCC is free software; you can redistribute it and/or modify it under
10 the terms of the GNU General Public License as published by the Free
11 Software Foundation; either version 3, or (at your option) any later
14 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
15 WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING3. If not see
21 <http://www.gnu.org/licenses/>. */
24 /* Middle-to-low level generation of rtx code and insns.
26 This file contains support functions for creating rtl expressions
27 and manipulating them in the doubly-linked chain of insns.
29 The patterns of the insns are created by machine-dependent
30 routines in insn-emit.c, which is generated automatically from
31 the machine description. These routines make the individual rtx's
32 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
33 which are automatically generated from rtl.def; what is machine
34 dependent is the kind of rtx's they make and what arguments they
39 #include "coretypes.h"
41 #include "diagnostic-core.h"
50 #include "hard-reg-set.h"
52 #include "insn-config.h"
55 #include "basic-block.h"
58 #include "langhooks.h"
63 struct target_rtl default_target_rtl
;
65 struct target_rtl
*this_target_rtl
= &default_target_rtl
;
68 #define initial_regno_reg_rtx (this_target_rtl->x_initial_regno_reg_rtx)
70 /* Commonly used modes. */
72 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
73 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
74 enum machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
75 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
77 /* Datastructures maintained for currently processed function in RTL form. */
79 struct rtl_data x_rtl
;
81 /* Indexed by pseudo register number, gives the rtx for that pseudo.
82 Allocated in parallel with regno_pointer_align.
83 FIXME: We could put it into emit_status struct, but gengtype is not able to deal
84 with length attribute nested in top level structures. */
88 /* This is *not* reset after each function. It gives each CODE_LABEL
89 in the entire compilation a unique label number. */
91 static GTY(()) int label_num
= 1;
93 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
94 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
95 record a copy of const[012]_rtx and constm1_rtx. CONSTM1_RTX
96 is set only for MODE_INT and MODE_VECTOR_INT modes. */
98 rtx const_tiny_rtx
[4][(int) MAX_MACHINE_MODE
];
102 REAL_VALUE_TYPE dconst0
;
103 REAL_VALUE_TYPE dconst1
;
104 REAL_VALUE_TYPE dconst2
;
105 REAL_VALUE_TYPE dconstm1
;
106 REAL_VALUE_TYPE dconsthalf
;
108 /* Record fixed-point constant 0 and 1. */
109 FIXED_VALUE_TYPE fconst0
[MAX_FCONST0
];
110 FIXED_VALUE_TYPE fconst1
[MAX_FCONST1
];
112 /* We make one copy of (const_int C) where C is in
113 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
114 to save space during the compilation and simplify comparisons of
117 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
119 /* Standard pieces of rtx, to be substituted directly into things. */
122 rtx simple_return_rtx
;
125 /* A hash table storing CONST_INTs whose absolute value is greater
126 than MAX_SAVED_CONST_INT. */
128 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
129 htab_t const_int_htab
;
131 /* A hash table storing memory attribute structures. */
132 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs
)))
133 htab_t mem_attrs_htab
;
135 /* A hash table storing register attribute structures. */
136 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs
)))
137 htab_t reg_attrs_htab
;
139 /* A hash table storing all CONST_DOUBLEs. */
140 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
141 htab_t const_double_htab
;
143 /* A hash table storing all CONST_FIXEDs. */
144 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
145 htab_t const_fixed_htab
;
147 #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
148 #define cur_debug_insn_uid (crtl->emit.x_cur_debug_insn_uid)
149 #define first_label_num (crtl->emit.x_first_label_num)
151 static rtx
change_address_1 (rtx
, enum machine_mode
, rtx
, int);
152 static void set_used_decls (tree
);
153 static void mark_label_nuses (rtx
);
154 static hashval_t
const_int_htab_hash (const void *);
155 static int const_int_htab_eq (const void *, const void *);
156 static hashval_t
const_double_htab_hash (const void *);
157 static int const_double_htab_eq (const void *, const void *);
158 static rtx
lookup_const_double (rtx
);
159 static hashval_t
const_fixed_htab_hash (const void *);
160 static int const_fixed_htab_eq (const void *, const void *);
161 static rtx
lookup_const_fixed (rtx
);
162 static hashval_t
mem_attrs_htab_hash (const void *);
163 static int mem_attrs_htab_eq (const void *, const void *);
164 static hashval_t
reg_attrs_htab_hash (const void *);
165 static int reg_attrs_htab_eq (const void *, const void *);
166 static reg_attrs
*get_reg_attrs (tree
, int);
167 static rtx
gen_const_vector (enum machine_mode
, int);
168 static void copy_rtx_if_shared_1 (rtx
*orig
);
170 /* Probability of the conditional branch currently proceeded by try_split.
171 Set to -1 otherwise. */
172 int split_branch_probability
= -1;
174 /* Returns a hash code for X (which is a really a CONST_INT). */
177 const_int_htab_hash (const void *x
)
179 return (hashval_t
) INTVAL ((const_rtx
) x
);
182 /* Returns nonzero if the value represented by X (which is really a
183 CONST_INT) is the same as that given by Y (which is really a
187 const_int_htab_eq (const void *x
, const void *y
)
189 return (INTVAL ((const_rtx
) x
) == *((const HOST_WIDE_INT
*) y
));
192 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
194 const_double_htab_hash (const void *x
)
196 const_rtx
const value
= (const_rtx
) x
;
199 if (GET_MODE (value
) == VOIDmode
)
200 h
= CONST_DOUBLE_LOW (value
) ^ CONST_DOUBLE_HIGH (value
);
203 h
= real_hash (CONST_DOUBLE_REAL_VALUE (value
));
204 /* MODE is used in the comparison, so it should be in the hash. */
205 h
^= GET_MODE (value
);
210 /* Returns nonzero if the value represented by X (really a ...)
211 is the same as that represented by Y (really a ...) */
213 const_double_htab_eq (const void *x
, const void *y
)
215 const_rtx
const a
= (const_rtx
)x
, b
= (const_rtx
)y
;
217 if (GET_MODE (a
) != GET_MODE (b
))
219 if (GET_MODE (a
) == VOIDmode
)
220 return (CONST_DOUBLE_LOW (a
) == CONST_DOUBLE_LOW (b
)
221 && CONST_DOUBLE_HIGH (a
) == CONST_DOUBLE_HIGH (b
));
223 return real_identical (CONST_DOUBLE_REAL_VALUE (a
),
224 CONST_DOUBLE_REAL_VALUE (b
));
227 /* Returns a hash code for X (which is really a CONST_FIXED). */
230 const_fixed_htab_hash (const void *x
)
232 const_rtx
const value
= (const_rtx
) x
;
235 h
= fixed_hash (CONST_FIXED_VALUE (value
));
236 /* MODE is used in the comparison, so it should be in the hash. */
237 h
^= GET_MODE (value
);
241 /* Returns nonzero if the value represented by X (really a ...)
242 is the same as that represented by Y (really a ...). */
245 const_fixed_htab_eq (const void *x
, const void *y
)
247 const_rtx
const a
= (const_rtx
) x
, b
= (const_rtx
) y
;
249 if (GET_MODE (a
) != GET_MODE (b
))
251 return fixed_identical (CONST_FIXED_VALUE (a
), CONST_FIXED_VALUE (b
));
254 /* Returns a hash code for X (which is a really a mem_attrs *). */
257 mem_attrs_htab_hash (const void *x
)
259 const mem_attrs
*const p
= (const mem_attrs
*) x
;
261 return (p
->alias
^ (p
->align
* 1000)
262 ^ (p
->addrspace
* 4000)
263 ^ ((p
->offset_known_p
? p
->offset
: 0) * 50000)
264 ^ ((p
->size_known_p
? p
->size
: 0) * 2500000)
265 ^ (size_t) iterative_hash_expr (p
->expr
, 0));
268 /* Return true if the given memory attributes are equal. */
271 mem_attrs_eq_p (const struct mem_attrs
*p
, const struct mem_attrs
*q
)
273 return (p
->alias
== q
->alias
274 && p
->offset_known_p
== q
->offset_known_p
275 && (!p
->offset_known_p
|| p
->offset
== q
->offset
)
276 && p
->size_known_p
== q
->size_known_p
277 && (!p
->size_known_p
|| p
->size
== q
->size
)
278 && p
->align
== q
->align
279 && p
->addrspace
== q
->addrspace
280 && (p
->expr
== q
->expr
281 || (p
->expr
!= NULL_TREE
&& q
->expr
!= NULL_TREE
282 && operand_equal_p (p
->expr
, q
->expr
, 0))));
285 /* Returns nonzero if the value represented by X (which is really a
286 mem_attrs *) is the same as that given by Y (which is also really a
290 mem_attrs_htab_eq (const void *x
, const void *y
)
292 return mem_attrs_eq_p ((const mem_attrs
*) x
, (const mem_attrs
*) y
);
295 /* Set MEM's memory attributes so that they are the same as ATTRS. */
298 set_mem_attrs (rtx mem
, mem_attrs
*attrs
)
302 /* If everything is the default, we can just clear the attributes. */
303 if (mem_attrs_eq_p (attrs
, mode_mem_attrs
[(int) GET_MODE (mem
)]))
309 slot
= htab_find_slot (mem_attrs_htab
, attrs
, INSERT
);
312 *slot
= ggc_alloc_mem_attrs ();
313 memcpy (*slot
, attrs
, sizeof (mem_attrs
));
316 MEM_ATTRS (mem
) = (mem_attrs
*) *slot
;
319 /* Returns a hash code for X (which is a really a reg_attrs *). */
322 reg_attrs_htab_hash (const void *x
)
324 const reg_attrs
*const p
= (const reg_attrs
*) x
;
326 return ((p
->offset
* 1000) ^ (intptr_t) p
->decl
);
329 /* Returns nonzero if the value represented by X (which is really a
330 reg_attrs *) is the same as that given by Y (which is also really a
334 reg_attrs_htab_eq (const void *x
, const void *y
)
336 const reg_attrs
*const p
= (const reg_attrs
*) x
;
337 const reg_attrs
*const q
= (const reg_attrs
*) y
;
339 return (p
->decl
== q
->decl
&& p
->offset
== q
->offset
);
341 /* Allocate a new reg_attrs structure and insert it into the hash table if
342 one identical to it is not already in the table. We are doing this for
346 get_reg_attrs (tree decl
, int offset
)
351 /* If everything is the default, we can just return zero. */
352 if (decl
== 0 && offset
== 0)
356 attrs
.offset
= offset
;
358 slot
= htab_find_slot (reg_attrs_htab
, &attrs
, INSERT
);
361 *slot
= ggc_alloc_reg_attrs ();
362 memcpy (*slot
, &attrs
, sizeof (reg_attrs
));
365 return (reg_attrs
*) *slot
;
370 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule
376 rtx x
= gen_rtx_ASM_INPUT (VOIDmode
, "");
377 MEM_VOLATILE_P (x
) = true;
383 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
384 don't attempt to share with the various global pieces of rtl (such as
385 frame_pointer_rtx). */
388 gen_raw_REG (enum machine_mode mode
, int regno
)
390 rtx x
= gen_rtx_raw_REG (mode
, regno
);
391 ORIGINAL_REGNO (x
) = regno
;
395 /* There are some RTL codes that require special attention; the generation
396 functions do the raw handling. If you add to this list, modify
397 special_rtx in gengenrtl.c as well. */
400 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED
, HOST_WIDE_INT arg
)
404 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
405 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
407 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
408 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
409 return const_true_rtx
;
412 /* Look up the CONST_INT in the hash table. */
413 slot
= htab_find_slot_with_hash (const_int_htab
, &arg
,
414 (hashval_t
) arg
, INSERT
);
416 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
422 gen_int_mode (HOST_WIDE_INT c
, enum machine_mode mode
)
424 return GEN_INT (trunc_int_for_mode (c
, mode
));
427 /* CONST_DOUBLEs might be created from pairs of integers, or from
428 REAL_VALUE_TYPEs. Also, their length is known only at run time,
429 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
431 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
432 hash table. If so, return its counterpart; otherwise add it
433 to the hash table and return it. */
435 lookup_const_double (rtx real
)
437 void **slot
= htab_find_slot (const_double_htab
, real
, INSERT
);
444 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
445 VALUE in mode MODE. */
447 const_double_from_real_value (REAL_VALUE_TYPE value
, enum machine_mode mode
)
449 rtx real
= rtx_alloc (CONST_DOUBLE
);
450 PUT_MODE (real
, mode
);
454 return lookup_const_double (real
);
457 /* Determine whether FIXED, a CONST_FIXED, already exists in the
458 hash table. If so, return its counterpart; otherwise add it
459 to the hash table and return it. */
462 lookup_const_fixed (rtx fixed
)
464 void **slot
= htab_find_slot (const_fixed_htab
, fixed
, INSERT
);
471 /* Return a CONST_FIXED rtx for a fixed-point value specified by
472 VALUE in mode MODE. */
475 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value
, enum machine_mode mode
)
477 rtx fixed
= rtx_alloc (CONST_FIXED
);
478 PUT_MODE (fixed
, mode
);
482 return lookup_const_fixed (fixed
);
485 /* Constructs double_int from rtx CST. */
488 rtx_to_double_int (const_rtx cst
)
492 if (CONST_INT_P (cst
))
493 r
= shwi_to_double_int (INTVAL (cst
));
494 else if (CONST_DOUBLE_AS_INT_P (cst
))
496 r
.low
= CONST_DOUBLE_LOW (cst
);
497 r
.high
= CONST_DOUBLE_HIGH (cst
);
506 /* Return a CONST_DOUBLE or CONST_INT for a value specified as
510 immed_double_int_const (double_int i
, enum machine_mode mode
)
512 return immed_double_const (i
.low
, i
.high
, mode
);
515 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
516 of ints: I0 is the low-order word and I1 is the high-order word.
517 For values that are larger than HOST_BITS_PER_DOUBLE_INT, the
518 implied upper bits are copies of the high bit of i1. The value
519 itself is neither signed nor unsigned. Do not use this routine for
520 non-integer modes; convert to REAL_VALUE_TYPE and use
521 CONST_DOUBLE_FROM_REAL_VALUE. */
524 immed_double_const (HOST_WIDE_INT i0
, HOST_WIDE_INT i1
, enum machine_mode mode
)
529 /* There are the following cases (note that there are no modes with
530 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < HOST_BITS_PER_DOUBLE_INT):
532 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
534 2) If the value of the integer fits into HOST_WIDE_INT anyway
535 (i.e., i1 consists only from copies of the sign bit, and sign
536 of i0 and i1 are the same), then we return a CONST_INT for i0.
537 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
538 if (mode
!= VOIDmode
)
540 gcc_assert (GET_MODE_CLASS (mode
) == MODE_INT
541 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
542 /* We can get a 0 for an error mark. */
543 || GET_MODE_CLASS (mode
) == MODE_VECTOR_INT
544 || GET_MODE_CLASS (mode
) == MODE_VECTOR_FLOAT
);
546 if (GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
)
547 return gen_int_mode (i0
, mode
);
550 /* If this integer fits in one word, return a CONST_INT. */
551 if ((i1
== 0 && i0
>= 0) || (i1
== ~0 && i0
< 0))
554 /* We use VOIDmode for integers. */
555 value
= rtx_alloc (CONST_DOUBLE
);
556 PUT_MODE (value
, VOIDmode
);
558 CONST_DOUBLE_LOW (value
) = i0
;
559 CONST_DOUBLE_HIGH (value
) = i1
;
561 for (i
= 2; i
< (sizeof CONST_DOUBLE_FORMAT
- 1); i
++)
562 XWINT (value
, i
) = 0;
564 return lookup_const_double (value
);
568 gen_rtx_REG (enum machine_mode mode
, unsigned int regno
)
570 /* In case the MD file explicitly references the frame pointer, have
571 all such references point to the same frame pointer. This is
572 used during frame pointer elimination to distinguish the explicit
573 references to these registers from pseudos that happened to be
576 If we have eliminated the frame pointer or arg pointer, we will
577 be using it as a normal register, for example as a spill
578 register. In such cases, we might be accessing it in a mode that
579 is not Pmode and therefore cannot use the pre-allocated rtx.
581 Also don't do this when we are making new REGs in reload, since
582 we don't want to get confused with the real pointers. */
584 if (mode
== Pmode
&& !reload_in_progress
)
586 if (regno
== FRAME_POINTER_REGNUM
587 && (!reload_completed
|| frame_pointer_needed
))
588 return frame_pointer_rtx
;
589 #if !HARD_FRAME_POINTER_IS_FRAME_POINTER
590 if (regno
== HARD_FRAME_POINTER_REGNUM
591 && (!reload_completed
|| frame_pointer_needed
))
592 return hard_frame_pointer_rtx
;
594 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && !HARD_FRAME_POINTER_IS_ARG_POINTER
595 if (regno
== ARG_POINTER_REGNUM
)
596 return arg_pointer_rtx
;
598 #ifdef RETURN_ADDRESS_POINTER_REGNUM
599 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
600 return return_address_pointer_rtx
;
602 if (regno
== (unsigned) PIC_OFFSET_TABLE_REGNUM
603 && PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
604 && fixed_regs
[PIC_OFFSET_TABLE_REGNUM
])
605 return pic_offset_table_rtx
;
606 if (regno
== STACK_POINTER_REGNUM
)
607 return stack_pointer_rtx
;
611 /* If the per-function register table has been set up, try to re-use
612 an existing entry in that table to avoid useless generation of RTL.
614 This code is disabled for now until we can fix the various backends
615 which depend on having non-shared hard registers in some cases. Long
616 term we want to re-enable this code as it can significantly cut down
617 on the amount of useless RTL that gets generated.
619 We'll also need to fix some code that runs after reload that wants to
620 set ORIGINAL_REGNO. */
625 && regno
< FIRST_PSEUDO_REGISTER
626 && reg_raw_mode
[regno
] == mode
)
627 return regno_reg_rtx
[regno
];
630 return gen_raw_REG (mode
, regno
);
634 gen_rtx_MEM (enum machine_mode mode
, rtx addr
)
636 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
638 /* This field is not cleared by the mere allocation of the rtx, so
645 /* Generate a memory referring to non-trapping constant memory. */
648 gen_const_mem (enum machine_mode mode
, rtx addr
)
650 rtx mem
= gen_rtx_MEM (mode
, addr
);
651 MEM_READONLY_P (mem
) = 1;
652 MEM_NOTRAP_P (mem
) = 1;
656 /* Generate a MEM referring to fixed portions of the frame, e.g., register
660 gen_frame_mem (enum machine_mode mode
, rtx addr
)
662 rtx mem
= gen_rtx_MEM (mode
, addr
);
663 MEM_NOTRAP_P (mem
) = 1;
664 set_mem_alias_set (mem
, get_frame_alias_set ());
668 /* Generate a MEM referring to a temporary use of the stack, not part
669 of the fixed stack frame. For example, something which is pushed
670 by a target splitter. */
672 gen_tmp_stack_mem (enum machine_mode mode
, rtx addr
)
674 rtx mem
= gen_rtx_MEM (mode
, addr
);
675 MEM_NOTRAP_P (mem
) = 1;
676 if (!cfun
->calls_alloca
)
677 set_mem_alias_set (mem
, get_frame_alias_set ());
681 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
682 this construct would be valid, and false otherwise. */
685 validate_subreg (enum machine_mode omode
, enum machine_mode imode
,
686 const_rtx reg
, unsigned int offset
)
688 unsigned int isize
= GET_MODE_SIZE (imode
);
689 unsigned int osize
= GET_MODE_SIZE (omode
);
691 /* All subregs must be aligned. */
692 if (offset
% osize
!= 0)
695 /* The subreg offset cannot be outside the inner object. */
699 /* ??? This should not be here. Temporarily continue to allow word_mode
700 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
701 Generally, backends are doing something sketchy but it'll take time to
703 if (omode
== word_mode
)
705 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
706 is the culprit here, and not the backends. */
707 else if (osize
>= UNITS_PER_WORD
&& isize
>= osize
)
709 /* Allow component subregs of complex and vector. Though given the below
710 extraction rules, it's not always clear what that means. */
711 else if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
712 && GET_MODE_INNER (imode
) == omode
)
714 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
715 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
716 represent this. It's questionable if this ought to be represented at
717 all -- why can't this all be hidden in post-reload splitters that make
718 arbitrarily mode changes to the registers themselves. */
719 else if (VECTOR_MODE_P (omode
) && GET_MODE_INNER (omode
) == imode
)
721 /* Subregs involving floating point modes are not allowed to
722 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
723 (subreg:SI (reg:DF) 0) isn't. */
724 else if (FLOAT_MODE_P (imode
) || FLOAT_MODE_P (omode
))
730 /* Paradoxical subregs must have offset zero. */
734 /* This is a normal subreg. Verify that the offset is representable. */
736 /* For hard registers, we already have most of these rules collected in
737 subreg_offset_representable_p. */
738 if (reg
&& REG_P (reg
) && HARD_REGISTER_P (reg
))
740 unsigned int regno
= REGNO (reg
);
742 #ifdef CANNOT_CHANGE_MODE_CLASS
743 if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
744 && GET_MODE_INNER (imode
) == omode
)
746 else if (REG_CANNOT_CHANGE_MODE_P (regno
, imode
, omode
))
750 return subreg_offset_representable_p (regno
, imode
, offset
, omode
);
753 /* For pseudo registers, we want most of the same checks. Namely:
754 If the register no larger than a word, the subreg must be lowpart.
755 If the register is larger than a word, the subreg must be the lowpart
756 of a subword. A subreg does *not* perform arbitrary bit extraction.
757 Given that we've already checked mode/offset alignment, we only have
758 to check subword subregs here. */
759 if (osize
< UNITS_PER_WORD
)
761 enum machine_mode wmode
= isize
> UNITS_PER_WORD
? word_mode
: imode
;
762 unsigned int low_off
= subreg_lowpart_offset (omode
, wmode
);
763 if (offset
% UNITS_PER_WORD
!= low_off
)
770 gen_rtx_SUBREG (enum machine_mode mode
, rtx reg
, int offset
)
772 gcc_assert (validate_subreg (mode
, GET_MODE (reg
), reg
, offset
));
773 return gen_rtx_raw_SUBREG (mode
, reg
, offset
);
776 /* Generate a SUBREG representing the least-significant part of REG if MODE
777 is smaller than mode of REG, otherwise paradoxical SUBREG. */
780 gen_lowpart_SUBREG (enum machine_mode mode
, rtx reg
)
782 enum machine_mode inmode
;
784 inmode
= GET_MODE (reg
);
785 if (inmode
== VOIDmode
)
787 return gen_rtx_SUBREG (mode
, reg
,
788 subreg_lowpart_offset (mode
, inmode
));
792 /* Create an rtvec and stores within it the RTXen passed in the arguments. */
795 gen_rtvec (int n
, ...)
803 /* Don't allocate an empty rtvec... */
810 rt_val
= rtvec_alloc (n
);
812 for (i
= 0; i
< n
; i
++)
813 rt_val
->elem
[i
] = va_arg (p
, rtx
);
820 gen_rtvec_v (int n
, rtx
*argp
)
825 /* Don't allocate an empty rtvec... */
829 rt_val
= rtvec_alloc (n
);
831 for (i
= 0; i
< n
; i
++)
832 rt_val
->elem
[i
] = *argp
++;
837 /* Return the number of bytes between the start of an OUTER_MODE
838 in-memory value and the start of an INNER_MODE in-memory value,
839 given that the former is a lowpart of the latter. It may be a
840 paradoxical lowpart, in which case the offset will be negative
841 on big-endian targets. */
844 byte_lowpart_offset (enum machine_mode outer_mode
,
845 enum machine_mode inner_mode
)
847 if (GET_MODE_SIZE (outer_mode
) < GET_MODE_SIZE (inner_mode
))
848 return subreg_lowpart_offset (outer_mode
, inner_mode
);
850 return -subreg_lowpart_offset (inner_mode
, outer_mode
);
853 /* Generate a REG rtx for a new pseudo register of mode MODE.
854 This pseudo is assigned the next sequential register number. */
857 gen_reg_rtx (enum machine_mode mode
)
860 unsigned int align
= GET_MODE_ALIGNMENT (mode
);
862 gcc_assert (can_create_pseudo_p ());
864 /* If a virtual register with bigger mode alignment is generated,
865 increase stack alignment estimation because it might be spilled
867 if (SUPPORTS_STACK_ALIGNMENT
868 && crtl
->stack_alignment_estimated
< align
869 && !crtl
->stack_realign_processed
)
871 unsigned int min_align
= MINIMUM_ALIGNMENT (NULL
, mode
, align
);
872 if (crtl
->stack_alignment_estimated
< min_align
)
873 crtl
->stack_alignment_estimated
= min_align
;
876 if (generating_concat_p
877 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
878 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
880 /* For complex modes, don't make a single pseudo.
881 Instead, make a CONCAT of two pseudos.
882 This allows noncontiguous allocation of the real and imaginary parts,
883 which makes much better code. Besides, allocating DCmode
884 pseudos overstrains reload on some machines like the 386. */
885 rtx realpart
, imagpart
;
886 enum machine_mode partmode
= GET_MODE_INNER (mode
);
888 realpart
= gen_reg_rtx (partmode
);
889 imagpart
= gen_reg_rtx (partmode
);
890 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
893 /* Make sure regno_pointer_align, and regno_reg_rtx are large
894 enough to have an element for this pseudo reg number. */
896 if (reg_rtx_no
== crtl
->emit
.regno_pointer_align_length
)
898 int old_size
= crtl
->emit
.regno_pointer_align_length
;
902 tmp
= XRESIZEVEC (char, crtl
->emit
.regno_pointer_align
, old_size
* 2);
903 memset (tmp
+ old_size
, 0, old_size
);
904 crtl
->emit
.regno_pointer_align
= (unsigned char *) tmp
;
906 new1
= GGC_RESIZEVEC (rtx
, regno_reg_rtx
, old_size
* 2);
907 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
908 regno_reg_rtx
= new1
;
910 crtl
->emit
.regno_pointer_align_length
= old_size
* 2;
913 val
= gen_raw_REG (mode
, reg_rtx_no
);
914 regno_reg_rtx
[reg_rtx_no
++] = val
;
918 /* Update NEW with the same attributes as REG, but with OFFSET added
919 to the REG_OFFSET. */
922 update_reg_offset (rtx new_rtx
, rtx reg
, int offset
)
924 REG_ATTRS (new_rtx
) = get_reg_attrs (REG_EXPR (reg
),
925 REG_OFFSET (reg
) + offset
);
928 /* Generate a register with same attributes as REG, but with OFFSET
929 added to the REG_OFFSET. */
932 gen_rtx_REG_offset (rtx reg
, enum machine_mode mode
, unsigned int regno
,
935 rtx new_rtx
= gen_rtx_REG (mode
, regno
);
937 update_reg_offset (new_rtx
, reg
, offset
);
941 /* Generate a new pseudo-register with the same attributes as REG, but
942 with OFFSET added to the REG_OFFSET. */
945 gen_reg_rtx_offset (rtx reg
, enum machine_mode mode
, int offset
)
947 rtx new_rtx
= gen_reg_rtx (mode
);
949 update_reg_offset (new_rtx
, reg
, offset
);
953 /* Adjust REG in-place so that it has mode MODE. It is assumed that the
954 new register is a (possibly paradoxical) lowpart of the old one. */
957 adjust_reg_mode (rtx reg
, enum machine_mode mode
)
959 update_reg_offset (reg
, reg
, byte_lowpart_offset (mode
, GET_MODE (reg
)));
960 PUT_MODE (reg
, mode
);
963 /* Copy REG's attributes from X, if X has any attributes. If REG and X
964 have different modes, REG is a (possibly paradoxical) lowpart of X. */
967 set_reg_attrs_from_value (rtx reg
, rtx x
)
970 bool can_be_reg_pointer
= true;
972 /* Don't call mark_reg_pointer for incompatible pointer sign
974 while (GET_CODE (x
) == SIGN_EXTEND
975 || GET_CODE (x
) == ZERO_EXTEND
976 || GET_CODE (x
) == TRUNCATE
977 || (GET_CODE (x
) == SUBREG
&& subreg_lowpart_p (x
)))
979 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
980 if ((GET_CODE (x
) == SIGN_EXTEND
&& POINTERS_EXTEND_UNSIGNED
)
981 || (GET_CODE (x
) != SIGN_EXTEND
&& ! POINTERS_EXTEND_UNSIGNED
))
982 can_be_reg_pointer
= false;
987 /* Hard registers can be reused for multiple purposes within the same
988 function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
990 if (HARD_REGISTER_P (reg
))
993 offset
= byte_lowpart_offset (GET_MODE (reg
), GET_MODE (x
));
996 if (MEM_OFFSET_KNOWN_P (x
))
997 REG_ATTRS (reg
) = get_reg_attrs (MEM_EXPR (x
),
998 MEM_OFFSET (x
) + offset
);
999 if (can_be_reg_pointer
&& MEM_POINTER (x
))
1000 mark_reg_pointer (reg
, 0);
1005 update_reg_offset (reg
, x
, offset
);
1006 if (can_be_reg_pointer
&& REG_POINTER (x
))
1007 mark_reg_pointer (reg
, REGNO_POINTER_ALIGN (REGNO (x
)));
1011 /* Generate a REG rtx for a new pseudo register, copying the mode
1012 and attributes from X. */
1015 gen_reg_rtx_and_attrs (rtx x
)
1017 rtx reg
= gen_reg_rtx (GET_MODE (x
));
1018 set_reg_attrs_from_value (reg
, x
);
1022 /* Set the register attributes for registers contained in PARM_RTX.
1023 Use needed values from memory attributes of MEM. */
1026 set_reg_attrs_for_parm (rtx parm_rtx
, rtx mem
)
1028 if (REG_P (parm_rtx
))
1029 set_reg_attrs_from_value (parm_rtx
, mem
);
1030 else if (GET_CODE (parm_rtx
) == PARALLEL
)
1032 /* Check for a NULL entry in the first slot, used to indicate that the
1033 parameter goes both on the stack and in registers. */
1034 int i
= XEXP (XVECEXP (parm_rtx
, 0, 0), 0) ? 0 : 1;
1035 for (; i
< XVECLEN (parm_rtx
, 0); i
++)
1037 rtx x
= XVECEXP (parm_rtx
, 0, i
);
1038 if (REG_P (XEXP (x
, 0)))
1039 REG_ATTRS (XEXP (x
, 0))
1040 = get_reg_attrs (MEM_EXPR (mem
),
1041 INTVAL (XEXP (x
, 1)));
1046 /* Set the REG_ATTRS for registers in value X, given that X represents
1050 set_reg_attrs_for_decl_rtl (tree t
, rtx x
)
1052 if (GET_CODE (x
) == SUBREG
)
1054 gcc_assert (subreg_lowpart_p (x
));
1059 = get_reg_attrs (t
, byte_lowpart_offset (GET_MODE (x
),
1061 if (GET_CODE (x
) == CONCAT
)
1063 if (REG_P (XEXP (x
, 0)))
1064 REG_ATTRS (XEXP (x
, 0)) = get_reg_attrs (t
, 0);
1065 if (REG_P (XEXP (x
, 1)))
1066 REG_ATTRS (XEXP (x
, 1))
1067 = get_reg_attrs (t
, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x
, 0))));
1069 if (GET_CODE (x
) == PARALLEL
)
1073 /* Check for a NULL entry, used to indicate that the parameter goes
1074 both on the stack and in registers. */
1075 if (XEXP (XVECEXP (x
, 0, 0), 0))
1080 for (i
= start
; i
< XVECLEN (x
, 0); i
++)
1082 rtx y
= XVECEXP (x
, 0, i
);
1083 if (REG_P (XEXP (y
, 0)))
1084 REG_ATTRS (XEXP (y
, 0)) = get_reg_attrs (t
, INTVAL (XEXP (y
, 1)));
1089 /* Assign the RTX X to declaration T. */
1092 set_decl_rtl (tree t
, rtx x
)
1094 DECL_WRTL_CHECK (t
)->decl_with_rtl
.rtl
= x
;
1096 set_reg_attrs_for_decl_rtl (t
, x
);
1099 /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1100 if the ABI requires the parameter to be passed by reference. */
1103 set_decl_incoming_rtl (tree t
, rtx x
, bool by_reference_p
)
1105 DECL_INCOMING_RTL (t
) = x
;
1106 if (x
&& !by_reference_p
)
1107 set_reg_attrs_for_decl_rtl (t
, x
);
1110 /* Identify REG (which may be a CONCAT) as a user register. */
1113 mark_user_reg (rtx reg
)
1115 if (GET_CODE (reg
) == CONCAT
)
1117 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
1118 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
1122 gcc_assert (REG_P (reg
));
1123 REG_USERVAR_P (reg
) = 1;
1127 /* Identify REG as a probable pointer register and show its alignment
1128 as ALIGN, if nonzero. */
1131 mark_reg_pointer (rtx reg
, int align
)
1133 if (! REG_POINTER (reg
))
1135 REG_POINTER (reg
) = 1;
1138 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1140 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
1141 /* We can no-longer be sure just how aligned this pointer is. */
1142 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1145 /* Return 1 plus largest pseudo reg number used in the current function. */
1153 /* Return 1 + the largest label number used so far in the current function. */
1156 max_label_num (void)
1161 /* Return first label number used in this function (if any were used). */
1164 get_first_label_num (void)
1166 return first_label_num
;
1169 /* If the rtx for label was created during the expansion of a nested
1170 function, then first_label_num won't include this label number.
1171 Fix this now so that array indices work later. */
1174 maybe_set_first_label_num (rtx x
)
1176 if (CODE_LABEL_NUMBER (x
) < first_label_num
)
1177 first_label_num
= CODE_LABEL_NUMBER (x
);
1180 /* Return a value representing some low-order bits of X, where the number
1181 of low-order bits is given by MODE. Note that no conversion is done
1182 between floating-point and fixed-point values, rather, the bit
1183 representation is returned.
1185 This function handles the cases in common between gen_lowpart, below,
1186 and two variants in cse.c and combine.c. These are the cases that can
1187 be safely handled at all points in the compilation.
1189 If this is not a case we can handle, return 0. */
1192 gen_lowpart_common (enum machine_mode mode
, rtx x
)
1194 int msize
= GET_MODE_SIZE (mode
);
1197 enum machine_mode innermode
;
1199 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1200 so we have to make one up. Yuk. */
1201 innermode
= GET_MODE (x
);
1203 && msize
* BITS_PER_UNIT
<= HOST_BITS_PER_WIDE_INT
)
1204 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
, MODE_INT
, 0);
1205 else if (innermode
== VOIDmode
)
1206 innermode
= mode_for_size (HOST_BITS_PER_DOUBLE_INT
, MODE_INT
, 0);
1208 xsize
= GET_MODE_SIZE (innermode
);
1210 gcc_assert (innermode
!= VOIDmode
&& innermode
!= BLKmode
);
1212 if (innermode
== mode
)
1215 /* MODE must occupy no more words than the mode of X. */
1216 if ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
1217 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))
1220 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1221 if (SCALAR_FLOAT_MODE_P (mode
) && msize
> xsize
)
1224 offset
= subreg_lowpart_offset (mode
, innermode
);
1226 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
1227 && (GET_MODE_CLASS (mode
) == MODE_INT
1228 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
1230 /* If we are getting the low-order part of something that has been
1231 sign- or zero-extended, we can either just use the object being
1232 extended or make a narrower extension. If we want an even smaller
1233 piece than the size of the object being extended, call ourselves
1236 This case is used mostly by combine and cse. */
1238 if (GET_MODE (XEXP (x
, 0)) == mode
)
1240 else if (msize
< GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
1241 return gen_lowpart_common (mode
, XEXP (x
, 0));
1242 else if (msize
< xsize
)
1243 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
1245 else if (GET_CODE (x
) == SUBREG
|| REG_P (x
)
1246 || GET_CODE (x
) == CONCAT
|| GET_CODE (x
) == CONST_VECTOR
1247 || CONST_DOUBLE_P (x
) || CONST_INT_P (x
))
1248 return simplify_gen_subreg (mode
, x
, innermode
, offset
);
1250 /* Otherwise, we can't do this. */
1255 gen_highpart (enum machine_mode mode
, rtx x
)
1257 unsigned int msize
= GET_MODE_SIZE (mode
);
1260 /* This case loses if X is a subreg. To catch bugs early,
1261 complain if an invalid MODE is used even in other cases. */
1262 gcc_assert (msize
<= UNITS_PER_WORD
1263 || msize
== (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x
)));
1265 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1266 subreg_highpart_offset (mode
, GET_MODE (x
)));
1267 gcc_assert (result
);
1269 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1270 the target if we have a MEM. gen_highpart must return a valid operand,
1271 emitting code if necessary to do so. */
1274 result
= validize_mem (result
);
1275 gcc_assert (result
);
1281 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1282 be VOIDmode constant. */
1284 gen_highpart_mode (enum machine_mode outermode
, enum machine_mode innermode
, rtx exp
)
1286 if (GET_MODE (exp
) != VOIDmode
)
1288 gcc_assert (GET_MODE (exp
) == innermode
);
1289 return gen_highpart (outermode
, exp
);
1291 return simplify_gen_subreg (outermode
, exp
, innermode
,
1292 subreg_highpart_offset (outermode
, innermode
));
1295 /* Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value. */
1298 subreg_lowpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1300 unsigned int offset
= 0;
1301 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1305 if (WORDS_BIG_ENDIAN
)
1306 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1307 if (BYTES_BIG_ENDIAN
)
1308 offset
+= difference
% UNITS_PER_WORD
;
1314 /* Return offset in bytes to get OUTERMODE high part
1315 of the value in mode INNERMODE stored in memory in target format. */
1317 subreg_highpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1319 unsigned int offset
= 0;
1320 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1322 gcc_assert (GET_MODE_SIZE (innermode
) >= GET_MODE_SIZE (outermode
));
1326 if (! WORDS_BIG_ENDIAN
)
1327 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1328 if (! BYTES_BIG_ENDIAN
)
1329 offset
+= difference
% UNITS_PER_WORD
;
1335 /* Return 1 iff X, assumed to be a SUBREG,
1336 refers to the least significant part of its containing reg.
1337 If X is not a SUBREG, always return 1 (it is its own low part!). */
1340 subreg_lowpart_p (const_rtx x
)
1342 if (GET_CODE (x
) != SUBREG
)
1344 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1347 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1348 == SUBREG_BYTE (x
));
1351 /* Return true if X is a paradoxical subreg, false otherwise. */
1353 paradoxical_subreg_p (const_rtx x
)
1355 if (GET_CODE (x
) != SUBREG
)
1357 return (GET_MODE_PRECISION (GET_MODE (x
))
1358 > GET_MODE_PRECISION (GET_MODE (SUBREG_REG (x
))));
1361 /* Return subword OFFSET of operand OP.
1362 The word number, OFFSET, is interpreted as the word number starting
1363 at the low-order address. OFFSET 0 is the low-order word if not
1364 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1366 If we cannot extract the required word, we return zero. Otherwise,
1367 an rtx corresponding to the requested word will be returned.
1369 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1370 reload has completed, a valid address will always be returned. After
1371 reload, if a valid address cannot be returned, we return zero.
1373 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1374 it is the responsibility of the caller.
1376 MODE is the mode of OP in case it is a CONST_INT.
1378 ??? This is still rather broken for some cases. The problem for the
1379 moment is that all callers of this thing provide no 'goal mode' to
1380 tell us to work with. This exists because all callers were written
1381 in a word based SUBREG world.
1382 Now use of this function can be deprecated by simplify_subreg in most
1387 operand_subword (rtx op
, unsigned int offset
, int validate_address
, enum machine_mode mode
)
1389 if (mode
== VOIDmode
)
1390 mode
= GET_MODE (op
);
1392 gcc_assert (mode
!= VOIDmode
);
1394 /* If OP is narrower than a word, fail. */
1396 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1399 /* If we want a word outside OP, return zero. */
1401 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1404 /* Form a new MEM at the requested address. */
1407 rtx new_rtx
= adjust_address_nv (op
, word_mode
, offset
* UNITS_PER_WORD
);
1409 if (! validate_address
)
1412 else if (reload_completed
)
1414 if (! strict_memory_address_addr_space_p (word_mode
,
1416 MEM_ADDR_SPACE (op
)))
1420 return replace_equiv_address (new_rtx
, XEXP (new_rtx
, 0));
1423 /* Rest can be handled by simplify_subreg. */
1424 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1427 /* Similar to `operand_subword', but never return 0. If we can't
1428 extract the required subword, put OP into a register and try again.
1429 The second attempt must succeed. We always validate the address in
1432 MODE is the mode of OP, in case it is CONST_INT. */
1435 operand_subword_force (rtx op
, unsigned int offset
, enum machine_mode mode
)
1437 rtx result
= operand_subword (op
, offset
, 1, mode
);
1442 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1444 /* If this is a register which can not be accessed by words, copy it
1445 to a pseudo register. */
1447 op
= copy_to_reg (op
);
1449 op
= force_reg (mode
, op
);
1452 result
= operand_subword (op
, offset
, 1, mode
);
1453 gcc_assert (result
);
1458 /* Returns 1 if both MEM_EXPR can be considered equal
1462 mem_expr_equal_p (const_tree expr1
, const_tree expr2
)
1467 if (! expr1
|| ! expr2
)
1470 if (TREE_CODE (expr1
) != TREE_CODE (expr2
))
1473 return operand_equal_p (expr1
, expr2
, 0);
1476 /* Return OFFSET if XEXP (MEM, 0) - OFFSET is known to be ALIGN
1477 bits aligned for 0 <= OFFSET < ALIGN / BITS_PER_UNIT, or
1481 get_mem_align_offset (rtx mem
, unsigned int align
)
1484 unsigned HOST_WIDE_INT offset
;
1486 /* This function can't use
1487 if (!MEM_EXPR (mem) || !MEM_OFFSET_KNOWN_P (mem)
1488 || (MAX (MEM_ALIGN (mem),
1489 MAX (align, get_object_alignment (MEM_EXPR (mem))))
1493 return (- MEM_OFFSET (mem)) & (align / BITS_PER_UNIT - 1);
1495 - COMPONENT_REFs in MEM_EXPR can have NULL first operand,
1496 for <variable>. get_inner_reference doesn't handle it and
1497 even if it did, the alignment in that case needs to be determined
1498 from DECL_FIELD_CONTEXT's TYPE_ALIGN.
1499 - it would do suboptimal job for COMPONENT_REFs, even if MEM_EXPR
1500 isn't sufficiently aligned, the object it is in might be. */
1501 gcc_assert (MEM_P (mem
));
1502 expr
= MEM_EXPR (mem
);
1503 if (expr
== NULL_TREE
|| !MEM_OFFSET_KNOWN_P (mem
))
1506 offset
= MEM_OFFSET (mem
);
1509 if (DECL_ALIGN (expr
) < align
)
1512 else if (INDIRECT_REF_P (expr
))
1514 if (TYPE_ALIGN (TREE_TYPE (expr
)) < (unsigned int) align
)
1517 else if (TREE_CODE (expr
) == COMPONENT_REF
)
1521 tree inner
= TREE_OPERAND (expr
, 0);
1522 tree field
= TREE_OPERAND (expr
, 1);
1523 tree byte_offset
= component_ref_field_offset (expr
);
1524 tree bit_offset
= DECL_FIELD_BIT_OFFSET (field
);
1527 || !host_integerp (byte_offset
, 1)
1528 || !host_integerp (bit_offset
, 1))
1531 offset
+= tree_low_cst (byte_offset
, 1);
1532 offset
+= tree_low_cst (bit_offset
, 1) / BITS_PER_UNIT
;
1534 if (inner
== NULL_TREE
)
1536 if (TYPE_ALIGN (DECL_FIELD_CONTEXT (field
))
1537 < (unsigned int) align
)
1541 else if (DECL_P (inner
))
1543 if (DECL_ALIGN (inner
) < align
)
1547 else if (TREE_CODE (inner
) != COMPONENT_REF
)
1555 return offset
& ((align
/ BITS_PER_UNIT
) - 1);
1558 /* Given REF (a MEM) and T, either the type of X or the expression
1559 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1560 if we are making a new object of this type. BITPOS is nonzero if
1561 there is an offset outstanding on T that will be applied later. */
1564 set_mem_attributes_minus_bitpos (rtx ref
, tree t
, int objectp
,
1565 HOST_WIDE_INT bitpos
)
1567 HOST_WIDE_INT apply_bitpos
= 0;
1569 struct mem_attrs attrs
, *defattrs
, *refattrs
;
1572 /* It can happen that type_for_mode was given a mode for which there
1573 is no language-level type. In which case it returns NULL, which
1578 type
= TYPE_P (t
) ? t
: TREE_TYPE (t
);
1579 if (type
== error_mark_node
)
1582 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1583 wrong answer, as it assumes that DECL_RTL already has the right alias
1584 info. Callers should not set DECL_RTL until after the call to
1585 set_mem_attributes. */
1586 gcc_assert (!DECL_P (t
) || ref
!= DECL_RTL_IF_SET (t
));
1588 memset (&attrs
, 0, sizeof (attrs
));
1590 /* Get the alias set from the expression or type (perhaps using a
1591 front-end routine) and use it. */
1592 attrs
.alias
= get_alias_set (t
);
1594 MEM_VOLATILE_P (ref
) |= TYPE_VOLATILE (type
);
1595 MEM_POINTER (ref
) = POINTER_TYPE_P (type
);
1597 /* Default values from pre-existing memory attributes if present. */
1598 refattrs
= MEM_ATTRS (ref
);
1601 /* ??? Can this ever happen? Calling this routine on a MEM that
1602 already carries memory attributes should probably be invalid. */
1603 attrs
.expr
= refattrs
->expr
;
1604 attrs
.offset_known_p
= refattrs
->offset_known_p
;
1605 attrs
.offset
= refattrs
->offset
;
1606 attrs
.size_known_p
= refattrs
->size_known_p
;
1607 attrs
.size
= refattrs
->size
;
1608 attrs
.align
= refattrs
->align
;
1611 /* Otherwise, default values from the mode of the MEM reference. */
1614 defattrs
= mode_mem_attrs
[(int) GET_MODE (ref
)];
1615 gcc_assert (!defattrs
->expr
);
1616 gcc_assert (!defattrs
->offset_known_p
);
1618 /* Respect mode size. */
1619 attrs
.size_known_p
= defattrs
->size_known_p
;
1620 attrs
.size
= defattrs
->size
;
1621 /* ??? Is this really necessary? We probably should always get
1622 the size from the type below. */
1624 /* Respect mode alignment for STRICT_ALIGNMENT targets if T is a type;
1625 if T is an object, always compute the object alignment below. */
1627 attrs
.align
= defattrs
->align
;
1629 attrs
.align
= BITS_PER_UNIT
;
1630 /* ??? If T is a type, respecting mode alignment may *also* be wrong
1631 e.g. if the type carries an alignment attribute. Should we be
1632 able to simply always use TYPE_ALIGN? */
1635 /* We can set the alignment from the type if we are making an object,
1636 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1637 if (objectp
|| TREE_CODE (t
) == INDIRECT_REF
|| TYPE_ALIGN_OK (type
))
1638 attrs
.align
= MAX (attrs
.align
, TYPE_ALIGN (type
));
1640 else if (TREE_CODE (t
) == MEM_REF
)
1642 tree op0
= TREE_OPERAND (t
, 0);
1643 if (TREE_CODE (op0
) == ADDR_EXPR
1644 && (DECL_P (TREE_OPERAND (op0
, 0))
1645 || CONSTANT_CLASS_P (TREE_OPERAND (op0
, 0))))
1647 if (DECL_P (TREE_OPERAND (op0
, 0)))
1648 attrs
.align
= DECL_ALIGN (TREE_OPERAND (op0
, 0));
1649 else if (CONSTANT_CLASS_P (TREE_OPERAND (op0
, 0)))
1651 attrs
.align
= TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (op0
, 0)));
1652 #ifdef CONSTANT_ALIGNMENT
1653 attrs
.align
= CONSTANT_ALIGNMENT (TREE_OPERAND (op0
, 0),
1657 if (TREE_INT_CST_LOW (TREE_OPERAND (t
, 1)) != 0)
1659 unsigned HOST_WIDE_INT ioff
1660 = TREE_INT_CST_LOW (TREE_OPERAND (t
, 1));
1661 unsigned HOST_WIDE_INT aoff
= (ioff
& -ioff
) * BITS_PER_UNIT
;
1662 attrs
.align
= MIN (aoff
, attrs
.align
);
1666 /* ??? This isn't fully correct, we can't set the alignment from the
1667 type in all cases. */
1668 attrs
.align
= MAX (attrs
.align
, TYPE_ALIGN (type
));
1671 else if (TREE_CODE (t
) == TARGET_MEM_REF
)
1672 /* ??? This isn't fully correct, we can't set the alignment from the
1673 type in all cases. */
1674 attrs
.align
= MAX (attrs
.align
, TYPE_ALIGN (type
));
1676 /* If the size is known, we can set that. */
1677 if (TYPE_SIZE_UNIT (type
) && host_integerp (TYPE_SIZE_UNIT (type
), 1))
1679 attrs
.size_known_p
= true;
1680 attrs
.size
= tree_low_cst (TYPE_SIZE_UNIT (type
), 1);
1683 /* If T is not a type, we may be able to deduce some more information about
1688 bool align_computed
= false;
1690 if (TREE_THIS_VOLATILE (t
))
1691 MEM_VOLATILE_P (ref
) = 1;
1693 /* Now remove any conversions: they don't change what the underlying
1694 object is. Likewise for SAVE_EXPR. */
1695 while (CONVERT_EXPR_P (t
)
1696 || TREE_CODE (t
) == VIEW_CONVERT_EXPR
1697 || TREE_CODE (t
) == SAVE_EXPR
)
1698 t
= TREE_OPERAND (t
, 0);
1700 /* Note whether this expression can trap. */
1701 MEM_NOTRAP_P (ref
) = !tree_could_trap_p (t
);
1703 base
= get_base_address (t
);
1707 && TREE_READONLY (base
)
1708 && (TREE_STATIC (base
) || DECL_EXTERNAL (base
))
1709 && !TREE_THIS_VOLATILE (base
))
1710 MEM_READONLY_P (ref
) = 1;
1712 /* Mark static const strings readonly as well. */
1713 if (TREE_CODE (base
) == STRING_CST
1714 && TREE_READONLY (base
)
1715 && TREE_STATIC (base
))
1716 MEM_READONLY_P (ref
) = 1;
1718 if (TREE_CODE (base
) == MEM_REF
1719 || TREE_CODE (base
) == TARGET_MEM_REF
)
1720 as
= TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (base
,
1723 as
= TYPE_ADDR_SPACE (TREE_TYPE (base
));
1726 as
= TYPE_ADDR_SPACE (type
);
1728 /* If this expression uses it's parent's alias set, mark it such
1729 that we won't change it. */
1730 if (component_uses_parent_alias_set (t
))
1731 MEM_KEEP_ALIAS_SET_P (ref
) = 1;
1733 /* If this is a decl, set the attributes of the MEM from it. */
1737 attrs
.offset_known_p
= true;
1739 apply_bitpos
= bitpos
;
1740 if (DECL_SIZE_UNIT (t
) && host_integerp (DECL_SIZE_UNIT (t
), 1))
1742 attrs
.size_known_p
= true;
1743 attrs
.size
= tree_low_cst (DECL_SIZE_UNIT (t
), 1);
1746 attrs
.size_known_p
= false;
1747 attrs
.align
= DECL_ALIGN (t
);
1748 align_computed
= true;
1751 /* If this is a constant, we know the alignment. */
1752 else if (CONSTANT_CLASS_P (t
))
1754 attrs
.align
= TYPE_ALIGN (type
);
1755 #ifdef CONSTANT_ALIGNMENT
1756 attrs
.align
= CONSTANT_ALIGNMENT (t
, attrs
.align
);
1758 align_computed
= true;
1761 /* If this is a field reference and not a bit-field, record it. */
1762 /* ??? There is some information that can be gleaned from bit-fields,
1763 such as the word offset in the structure that might be modified.
1764 But skip it for now. */
1765 else if (TREE_CODE (t
) == COMPONENT_REF
1766 && ! DECL_BIT_FIELD (TREE_OPERAND (t
, 1)))
1769 attrs
.offset_known_p
= true;
1771 apply_bitpos
= bitpos
;
1772 /* ??? Any reason the field size would be different than
1773 the size we got from the type? */
1776 /* If this is an array reference, look for an outer field reference. */
1777 else if (TREE_CODE (t
) == ARRAY_REF
)
1779 tree off_tree
= size_zero_node
;
1780 /* We can't modify t, because we use it at the end of the
1786 tree index
= TREE_OPERAND (t2
, 1);
1787 tree low_bound
= array_ref_low_bound (t2
);
1788 tree unit_size
= array_ref_element_size (t2
);
1790 /* We assume all arrays have sizes that are a multiple of a byte.
1791 First subtract the lower bound, if any, in the type of the
1792 index, then convert to sizetype and multiply by the size of
1793 the array element. */
1794 if (! integer_zerop (low_bound
))
1795 index
= fold_build2 (MINUS_EXPR
, TREE_TYPE (index
),
1798 off_tree
= size_binop (PLUS_EXPR
,
1799 size_binop (MULT_EXPR
,
1800 fold_convert (sizetype
,
1804 t2
= TREE_OPERAND (t2
, 0);
1806 while (TREE_CODE (t2
) == ARRAY_REF
);
1811 attrs
.offset_known_p
= false;
1812 if (host_integerp (off_tree
, 1))
1814 HOST_WIDE_INT ioff
= tree_low_cst (off_tree
, 1);
1815 HOST_WIDE_INT aoff
= (ioff
& -ioff
) * BITS_PER_UNIT
;
1816 attrs
.align
= DECL_ALIGN (t2
);
1817 if (aoff
&& (unsigned HOST_WIDE_INT
) aoff
< attrs
.align
)
1819 align_computed
= true;
1820 attrs
.offset_known_p
= true;
1821 attrs
.offset
= ioff
;
1822 apply_bitpos
= bitpos
;
1825 else if (TREE_CODE (t2
) == COMPONENT_REF
)
1828 attrs
.offset_known_p
= false;
1829 if (host_integerp (off_tree
, 1))
1831 attrs
.offset_known_p
= true;
1832 attrs
.offset
= tree_low_cst (off_tree
, 1);
1833 apply_bitpos
= bitpos
;
1835 /* ??? Any reason the field size would be different than
1836 the size we got from the type? */
1840 /* If this is an indirect reference, record it. */
1841 else if (TREE_CODE (t
) == MEM_REF
1842 || TREE_CODE (t
) == TARGET_MEM_REF
)
1845 attrs
.offset_known_p
= true;
1847 apply_bitpos
= bitpos
;
1850 if (!align_computed
)
1852 unsigned int obj_align
= get_object_alignment (t
);
1853 attrs
.align
= MAX (attrs
.align
, obj_align
);
1857 as
= TYPE_ADDR_SPACE (type
);
1859 /* If we modified OFFSET based on T, then subtract the outstanding
1860 bit position offset. Similarly, increase the size of the accessed
1861 object to contain the negative offset. */
1864 gcc_assert (attrs
.offset_known_p
);
1865 attrs
.offset
-= apply_bitpos
/ BITS_PER_UNIT
;
1866 if (attrs
.size_known_p
)
1867 attrs
.size
+= apply_bitpos
/ BITS_PER_UNIT
;
1870 /* Now set the attributes we computed above. */
1871 attrs
.addrspace
= as
;
1872 set_mem_attrs (ref
, &attrs
);
1876 set_mem_attributes (rtx ref
, tree t
, int objectp
)
1878 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, 0);
1881 /* Set the alias set of MEM to SET. */
1884 set_mem_alias_set (rtx mem
, alias_set_type set
)
1886 struct mem_attrs attrs
;
1888 /* If the new and old alias sets don't conflict, something is wrong. */
1889 gcc_checking_assert (alias_sets_conflict_p (set
, MEM_ALIAS_SET (mem
)));
1890 attrs
= *get_mem_attrs (mem
);
1892 set_mem_attrs (mem
, &attrs
);
1895 /* Set the address space of MEM to ADDRSPACE (target-defined). */
1898 set_mem_addr_space (rtx mem
, addr_space_t addrspace
)
1900 struct mem_attrs attrs
;
1902 attrs
= *get_mem_attrs (mem
);
1903 attrs
.addrspace
= addrspace
;
1904 set_mem_attrs (mem
, &attrs
);
1907 /* Set the alignment of MEM to ALIGN bits. */
1910 set_mem_align (rtx mem
, unsigned int align
)
1912 struct mem_attrs attrs
;
1914 attrs
= *get_mem_attrs (mem
);
1915 attrs
.align
= align
;
1916 set_mem_attrs (mem
, &attrs
);
1919 /* Set the expr for MEM to EXPR. */
1922 set_mem_expr (rtx mem
, tree expr
)
1924 struct mem_attrs attrs
;
1926 attrs
= *get_mem_attrs (mem
);
1928 set_mem_attrs (mem
, &attrs
);
1931 /* Set the offset of MEM to OFFSET. */
1934 set_mem_offset (rtx mem
, HOST_WIDE_INT offset
)
1936 struct mem_attrs attrs
;
1938 attrs
= *get_mem_attrs (mem
);
1939 attrs
.offset_known_p
= true;
1940 attrs
.offset
= offset
;
1941 set_mem_attrs (mem
, &attrs
);
1944 /* Clear the offset of MEM. */
1947 clear_mem_offset (rtx mem
)
1949 struct mem_attrs attrs
;
1951 attrs
= *get_mem_attrs (mem
);
1952 attrs
.offset_known_p
= false;
1953 set_mem_attrs (mem
, &attrs
);
1956 /* Set the size of MEM to SIZE. */
1959 set_mem_size (rtx mem
, HOST_WIDE_INT size
)
1961 struct mem_attrs attrs
;
1963 attrs
= *get_mem_attrs (mem
);
1964 attrs
.size_known_p
= true;
1966 set_mem_attrs (mem
, &attrs
);
1969 /* Clear the size of MEM. */
1972 clear_mem_size (rtx mem
)
1974 struct mem_attrs attrs
;
1976 attrs
= *get_mem_attrs (mem
);
1977 attrs
.size_known_p
= false;
1978 set_mem_attrs (mem
, &attrs
);
1981 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1982 and its address changed to ADDR. (VOIDmode means don't change the mode.
1983 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1984 returned memory location is required to be valid. The memory
1985 attributes are not changed. */
1988 change_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
, int validate
)
1993 gcc_assert (MEM_P (memref
));
1994 as
= MEM_ADDR_SPACE (memref
);
1995 if (mode
== VOIDmode
)
1996 mode
= GET_MODE (memref
);
1998 addr
= XEXP (memref
, 0);
1999 if (mode
== GET_MODE (memref
) && addr
== XEXP (memref
, 0)
2000 && (!validate
|| memory_address_addr_space_p (mode
, addr
, as
)))
2005 if (reload_in_progress
|| reload_completed
)
2006 gcc_assert (memory_address_addr_space_p (mode
, addr
, as
));
2008 addr
= memory_address_addr_space (mode
, addr
, as
);
2011 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
2014 new_rtx
= gen_rtx_MEM (mode
, addr
);
2015 MEM_COPY_ATTRIBUTES (new_rtx
, memref
);
2019 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
2020 way we are changing MEMREF, so we only preserve the alias set. */
2023 change_address (rtx memref
, enum machine_mode mode
, rtx addr
)
2025 rtx new_rtx
= change_address_1 (memref
, mode
, addr
, 1);
2026 enum machine_mode mmode
= GET_MODE (new_rtx
);
2027 struct mem_attrs attrs
, *defattrs
;
2029 attrs
= *get_mem_attrs (memref
);
2030 defattrs
= mode_mem_attrs
[(int) mmode
];
2031 attrs
.expr
= NULL_TREE
;
2032 attrs
.offset_known_p
= false;
2033 attrs
.size_known_p
= defattrs
->size_known_p
;
2034 attrs
.size
= defattrs
->size
;
2035 attrs
.align
= defattrs
->align
;
2037 /* If there are no changes, just return the original memory reference. */
2038 if (new_rtx
== memref
)
2040 if (mem_attrs_eq_p (get_mem_attrs (memref
), &attrs
))
2043 new_rtx
= gen_rtx_MEM (mmode
, XEXP (memref
, 0));
2044 MEM_COPY_ATTRIBUTES (new_rtx
, memref
);
2047 set_mem_attrs (new_rtx
, &attrs
);
2051 /* Return a memory reference like MEMREF, but with its mode changed
2052 to MODE and its address offset by OFFSET bytes. If VALIDATE is
2053 nonzero, the memory address is forced to be valid.
2054 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
2055 and caller is responsible for adjusting MEMREF base register. */
2058 adjust_address_1 (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
,
2059 int validate
, int adjust
)
2061 rtx addr
= XEXP (memref
, 0);
2063 enum machine_mode address_mode
;
2065 struct mem_attrs attrs
, *defattrs
;
2066 unsigned HOST_WIDE_INT max_align
;
2068 attrs
= *get_mem_attrs (memref
);
2070 /* If there are no changes, just return the original memory reference. */
2071 if (mode
== GET_MODE (memref
) && !offset
2072 && (!validate
|| memory_address_addr_space_p (mode
, addr
,
2076 /* ??? Prefer to create garbage instead of creating shared rtl.
2077 This may happen even if offset is nonzero -- consider
2078 (plus (plus reg reg) const_int) -- so do this always. */
2079 addr
= copy_rtx (addr
);
2081 /* Convert a possibly large offset to a signed value within the
2082 range of the target address space. */
2083 address_mode
= get_address_mode (memref
);
2084 pbits
= GET_MODE_BITSIZE (address_mode
);
2085 if (HOST_BITS_PER_WIDE_INT
> pbits
)
2087 int shift
= HOST_BITS_PER_WIDE_INT
- pbits
;
2088 offset
= (((HOST_WIDE_INT
) ((unsigned HOST_WIDE_INT
) offset
<< shift
))
2094 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2095 object, we can merge it into the LO_SUM. */
2096 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
2098 && (unsigned HOST_WIDE_INT
) offset
2099 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
2100 addr
= gen_rtx_LO_SUM (address_mode
, XEXP (addr
, 0),
2101 plus_constant (address_mode
,
2102 XEXP (addr
, 1), offset
));
2104 addr
= plus_constant (address_mode
, addr
, offset
);
2107 new_rtx
= change_address_1 (memref
, mode
, addr
, validate
);
2109 /* If the address is a REG, change_address_1 rightfully returns memref,
2110 but this would destroy memref's MEM_ATTRS. */
2111 if (new_rtx
== memref
&& offset
!= 0)
2112 new_rtx
= copy_rtx (new_rtx
);
2114 /* Compute the new values of the memory attributes due to this adjustment.
2115 We add the offsets and update the alignment. */
2116 if (attrs
.offset_known_p
)
2117 attrs
.offset
+= offset
;
2119 /* Compute the new alignment by taking the MIN of the alignment and the
2120 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2124 max_align
= (offset
& -offset
) * BITS_PER_UNIT
;
2125 attrs
.align
= MIN (attrs
.align
, max_align
);
2128 /* We can compute the size in a number of ways. */
2129 defattrs
= mode_mem_attrs
[(int) GET_MODE (new_rtx
)];
2130 if (defattrs
->size_known_p
)
2132 attrs
.size_known_p
= true;
2133 attrs
.size
= defattrs
->size
;
2135 else if (attrs
.size_known_p
)
2136 attrs
.size
-= offset
;
2138 set_mem_attrs (new_rtx
, &attrs
);
2140 /* At some point, we should validate that this offset is within the object,
2141 if all the appropriate values are known. */
2145 /* Return a memory reference like MEMREF, but with its mode changed
2146 to MODE and its address changed to ADDR, which is assumed to be
2147 MEMREF offset by OFFSET bytes. If VALIDATE is
2148 nonzero, the memory address is forced to be valid. */
2151 adjust_automodify_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
,
2152 HOST_WIDE_INT offset
, int validate
)
2154 memref
= change_address_1 (memref
, VOIDmode
, addr
, validate
);
2155 return adjust_address_1 (memref
, mode
, offset
, validate
, 0);
2158 /* Return a memory reference like MEMREF, but whose address is changed by
2159 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2160 known to be in OFFSET (possibly 1). */
2163 offset_address (rtx memref
, rtx offset
, unsigned HOST_WIDE_INT pow2
)
2165 rtx new_rtx
, addr
= XEXP (memref
, 0);
2166 enum machine_mode address_mode
;
2167 struct mem_attrs attrs
, *defattrs
;
2169 attrs
= *get_mem_attrs (memref
);
2170 address_mode
= get_address_mode (memref
);
2171 new_rtx
= simplify_gen_binary (PLUS
, address_mode
, addr
, offset
);
2173 /* At this point we don't know _why_ the address is invalid. It
2174 could have secondary memory references, multiplies or anything.
2176 However, if we did go and rearrange things, we can wind up not
2177 being able to recognize the magic around pic_offset_table_rtx.
2178 This stuff is fragile, and is yet another example of why it is
2179 bad to expose PIC machinery too early. */
2180 if (! memory_address_addr_space_p (GET_MODE (memref
), new_rtx
,
2182 && GET_CODE (addr
) == PLUS
2183 && XEXP (addr
, 0) == pic_offset_table_rtx
)
2185 addr
= force_reg (GET_MODE (addr
), addr
);
2186 new_rtx
= simplify_gen_binary (PLUS
, address_mode
, addr
, offset
);
2189 update_temp_slot_address (XEXP (memref
, 0), new_rtx
);
2190 new_rtx
= change_address_1 (memref
, VOIDmode
, new_rtx
, 1);
2192 /* If there are no changes, just return the original memory reference. */
2193 if (new_rtx
== memref
)
2196 /* Update the alignment to reflect the offset. Reset the offset, which
2198 defattrs
= mode_mem_attrs
[(int) GET_MODE (new_rtx
)];
2199 attrs
.offset_known_p
= false;
2200 attrs
.size_known_p
= defattrs
->size_known_p
;
2201 attrs
.size
= defattrs
->size
;
2202 attrs
.align
= MIN (attrs
.align
, pow2
* BITS_PER_UNIT
);
2203 set_mem_attrs (new_rtx
, &attrs
);
2207 /* Return a memory reference like MEMREF, but with its address changed to
2208 ADDR. The caller is asserting that the actual piece of memory pointed
2209 to is the same, just the form of the address is being changed, such as
2210 by putting something into a register. */
2213 replace_equiv_address (rtx memref
, rtx addr
)
2215 /* change_address_1 copies the memory attribute structure without change
2216 and that's exactly what we want here. */
2217 update_temp_slot_address (XEXP (memref
, 0), addr
);
2218 return change_address_1 (memref
, VOIDmode
, addr
, 1);
2221 /* Likewise, but the reference is not required to be valid. */
2224 replace_equiv_address_nv (rtx memref
, rtx addr
)
2226 return change_address_1 (memref
, VOIDmode
, addr
, 0);
2229 /* Return a memory reference like MEMREF, but with its mode widened to
2230 MODE and offset by OFFSET. This would be used by targets that e.g.
2231 cannot issue QImode memory operations and have to use SImode memory
2232 operations plus masking logic. */
2235 widen_memory_access (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
)
2237 rtx new_rtx
= adjust_address_1 (memref
, mode
, offset
, 1, 1);
2238 struct mem_attrs attrs
;
2239 unsigned int size
= GET_MODE_SIZE (mode
);
2241 /* If there are no changes, just return the original memory reference. */
2242 if (new_rtx
== memref
)
2245 attrs
= *get_mem_attrs (new_rtx
);
2247 /* If we don't know what offset we were at within the expression, then
2248 we can't know if we've overstepped the bounds. */
2249 if (! attrs
.offset_known_p
)
2250 attrs
.expr
= NULL_TREE
;
2254 if (TREE_CODE (attrs
.expr
) == COMPONENT_REF
)
2256 tree field
= TREE_OPERAND (attrs
.expr
, 1);
2257 tree offset
= component_ref_field_offset (attrs
.expr
);
2259 if (! DECL_SIZE_UNIT (field
))
2261 attrs
.expr
= NULL_TREE
;
2265 /* Is the field at least as large as the access? If so, ok,
2266 otherwise strip back to the containing structure. */
2267 if (TREE_CODE (DECL_SIZE_UNIT (field
)) == INTEGER_CST
2268 && compare_tree_int (DECL_SIZE_UNIT (field
), size
) >= 0
2269 && attrs
.offset
>= 0)
2272 if (! host_integerp (offset
, 1))
2274 attrs
.expr
= NULL_TREE
;
2278 attrs
.expr
= TREE_OPERAND (attrs
.expr
, 0);
2279 attrs
.offset
+= tree_low_cst (offset
, 1);
2280 attrs
.offset
+= (tree_low_cst (DECL_FIELD_BIT_OFFSET (field
), 1)
2283 /* Similarly for the decl. */
2284 else if (DECL_P (attrs
.expr
)
2285 && DECL_SIZE_UNIT (attrs
.expr
)
2286 && TREE_CODE (DECL_SIZE_UNIT (attrs
.expr
)) == INTEGER_CST
2287 && compare_tree_int (DECL_SIZE_UNIT (attrs
.expr
), size
) >= 0
2288 && (! attrs
.offset_known_p
|| attrs
.offset
>= 0))
2292 /* The widened memory access overflows the expression, which means
2293 that it could alias another expression. Zap it. */
2294 attrs
.expr
= NULL_TREE
;
2300 attrs
.offset_known_p
= false;
2302 /* The widened memory may alias other stuff, so zap the alias set. */
2303 /* ??? Maybe use get_alias_set on any remaining expression. */
2305 attrs
.size_known_p
= true;
2307 set_mem_attrs (new_rtx
, &attrs
);
2311 /* A fake decl that is used as the MEM_EXPR of spill slots. */
2312 static GTY(()) tree spill_slot_decl
;
2315 get_spill_slot_decl (bool force_build_p
)
2317 tree d
= spill_slot_decl
;
2319 struct mem_attrs attrs
;
2321 if (d
|| !force_build_p
)
2324 d
= build_decl (DECL_SOURCE_LOCATION (current_function_decl
),
2325 VAR_DECL
, get_identifier ("%sfp"), void_type_node
);
2326 DECL_ARTIFICIAL (d
) = 1;
2327 DECL_IGNORED_P (d
) = 1;
2329 spill_slot_decl
= d
;
2331 rd
= gen_rtx_MEM (BLKmode
, frame_pointer_rtx
);
2332 MEM_NOTRAP_P (rd
) = 1;
2333 attrs
= *mode_mem_attrs
[(int) BLKmode
];
2334 attrs
.alias
= new_alias_set ();
2336 set_mem_attrs (rd
, &attrs
);
2337 SET_DECL_RTL (d
, rd
);
2342 /* Given MEM, a result from assign_stack_local, fill in the memory
2343 attributes as appropriate for a register allocator spill slot.
2344 These slots are not aliasable by other memory. We arrange for
2345 them all to use a single MEM_EXPR, so that the aliasing code can
2346 work properly in the case of shared spill slots. */
2349 set_mem_attrs_for_spill (rtx mem
)
2351 struct mem_attrs attrs
;
2354 attrs
= *get_mem_attrs (mem
);
2355 attrs
.expr
= get_spill_slot_decl (true);
2356 attrs
.alias
= MEM_ALIAS_SET (DECL_RTL (attrs
.expr
));
2357 attrs
.addrspace
= ADDR_SPACE_GENERIC
;
2359 /* We expect the incoming memory to be of the form:
2360 (mem:MODE (plus (reg sfp) (const_int offset)))
2361 with perhaps the plus missing for offset = 0. */
2362 addr
= XEXP (mem
, 0);
2363 attrs
.offset_known_p
= true;
2365 if (GET_CODE (addr
) == PLUS
2366 && CONST_INT_P (XEXP (addr
, 1)))
2367 attrs
.offset
= INTVAL (XEXP (addr
, 1));
2369 set_mem_attrs (mem
, &attrs
);
2370 MEM_NOTRAP_P (mem
) = 1;
2373 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2376 gen_label_rtx (void)
2378 return gen_rtx_CODE_LABEL (VOIDmode
, 0, NULL_RTX
, NULL_RTX
,
2379 NULL
, label_num
++, NULL
);
2382 /* For procedure integration. */
2384 /* Install new pointers to the first and last insns in the chain.
2385 Also, set cur_insn_uid to one higher than the last in use.
2386 Used for an inline-procedure after copying the insn chain. */
2389 set_new_first_and_last_insn (rtx first
, rtx last
)
2393 set_first_insn (first
);
2394 set_last_insn (last
);
2397 if (MIN_NONDEBUG_INSN_UID
|| MAY_HAVE_DEBUG_INSNS
)
2399 int debug_count
= 0;
2401 cur_insn_uid
= MIN_NONDEBUG_INSN_UID
- 1;
2402 cur_debug_insn_uid
= 0;
2404 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2405 if (INSN_UID (insn
) < MIN_NONDEBUG_INSN_UID
)
2406 cur_debug_insn_uid
= MAX (cur_debug_insn_uid
, INSN_UID (insn
));
2409 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2410 if (DEBUG_INSN_P (insn
))
2415 cur_debug_insn_uid
= MIN_NONDEBUG_INSN_UID
+ debug_count
;
2417 cur_debug_insn_uid
++;
2420 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2421 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2426 /* Go through all the RTL insn bodies and copy any invalid shared
2427 structure. This routine should only be called once. */
2430 unshare_all_rtl_1 (rtx insn
)
2432 /* Unshare just about everything else. */
2433 unshare_all_rtl_in_chain (insn
);
2435 /* Make sure the addresses of stack slots found outside the insn chain
2436 (such as, in DECL_RTL of a variable) are not shared
2437 with the insn chain.
2439 This special care is necessary when the stack slot MEM does not
2440 actually appear in the insn chain. If it does appear, its address
2441 is unshared from all else at that point. */
2442 stack_slot_list
= copy_rtx_if_shared (stack_slot_list
);
2445 /* Go through all the RTL insn bodies and copy any invalid shared
2446 structure, again. This is a fairly expensive thing to do so it
2447 should be done sparingly. */
2450 unshare_all_rtl_again (rtx insn
)
2455 for (p
= insn
; p
; p
= NEXT_INSN (p
))
2458 reset_used_flags (PATTERN (p
));
2459 reset_used_flags (REG_NOTES (p
));
2461 reset_used_flags (CALL_INSN_FUNCTION_USAGE (p
));
2464 /* Make sure that virtual stack slots are not shared. */
2465 set_used_decls (DECL_INITIAL (cfun
->decl
));
2467 /* Make sure that virtual parameters are not shared. */
2468 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= DECL_CHAIN (decl
))
2469 set_used_flags (DECL_RTL (decl
));
2471 reset_used_flags (stack_slot_list
);
2473 unshare_all_rtl_1 (insn
);
2477 unshare_all_rtl (void)
2479 unshare_all_rtl_1 (get_insns ());
2484 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2485 Recursively does the same for subexpressions. */
2488 verify_rtx_sharing (rtx orig
, rtx insn
)
2493 const char *format_ptr
;
2498 code
= GET_CODE (x
);
2500 /* These types may be freely shared. */
2520 /* SCRATCH must be shared because they represent distinct values. */
2522 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
)
2527 if (shared_const_p (orig
))
2532 /* A MEM is allowed to be shared if its address is constant. */
2533 if (CONSTANT_ADDRESS_P (XEXP (x
, 0))
2534 || reload_completed
|| reload_in_progress
)
2543 /* This rtx may not be shared. If it has already been seen,
2544 replace it with a copy of itself. */
2545 #ifdef ENABLE_CHECKING
2546 if (RTX_FLAG (x
, used
))
2548 error ("invalid rtl sharing found in the insn");
2550 error ("shared rtx");
2552 internal_error ("internal consistency failure");
2555 gcc_assert (!RTX_FLAG (x
, used
));
2557 RTX_FLAG (x
, used
) = 1;
2559 /* Now scan the subexpressions recursively. */
2561 format_ptr
= GET_RTX_FORMAT (code
);
2563 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2565 switch (*format_ptr
++)
2568 verify_rtx_sharing (XEXP (x
, i
), insn
);
2572 if (XVEC (x
, i
) != NULL
)
2575 int len
= XVECLEN (x
, i
);
2577 for (j
= 0; j
< len
; j
++)
2579 /* We allow sharing of ASM_OPERANDS inside single
2581 if (j
&& GET_CODE (XVECEXP (x
, i
, j
)) == SET
2582 && (GET_CODE (SET_SRC (XVECEXP (x
, i
, j
)))
2584 verify_rtx_sharing (SET_DEST (XVECEXP (x
, i
, j
)), insn
);
2586 verify_rtx_sharing (XVECEXP (x
, i
, j
), insn
);
2595 /* Go through all the RTL insn bodies and check that there is no unexpected
2596 sharing in between the subexpressions. */
2599 verify_rtl_sharing (void)
2603 timevar_push (TV_VERIFY_RTL_SHARING
);
2605 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2608 reset_used_flags (PATTERN (p
));
2609 reset_used_flags (REG_NOTES (p
));
2611 reset_used_flags (CALL_INSN_FUNCTION_USAGE (p
));
2612 if (GET_CODE (PATTERN (p
)) == SEQUENCE
)
2615 rtx q
, sequence
= PATTERN (p
);
2617 for (i
= 0; i
< XVECLEN (sequence
, 0); i
++)
2619 q
= XVECEXP (sequence
, 0, i
);
2620 gcc_assert (INSN_P (q
));
2621 reset_used_flags (PATTERN (q
));
2622 reset_used_flags (REG_NOTES (q
));
2624 reset_used_flags (CALL_INSN_FUNCTION_USAGE (q
));
2629 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2632 verify_rtx_sharing (PATTERN (p
), p
);
2633 verify_rtx_sharing (REG_NOTES (p
), p
);
2635 verify_rtx_sharing (CALL_INSN_FUNCTION_USAGE (p
), p
);
2638 timevar_pop (TV_VERIFY_RTL_SHARING
);
2641 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2642 Assumes the mark bits are cleared at entry. */
2645 unshare_all_rtl_in_chain (rtx insn
)
2647 for (; insn
; insn
= NEXT_INSN (insn
))
2650 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
2651 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
2653 CALL_INSN_FUNCTION_USAGE (insn
)
2654 = copy_rtx_if_shared (CALL_INSN_FUNCTION_USAGE (insn
));
2658 /* Go through all virtual stack slots of a function and mark them as
2659 shared. We never replace the DECL_RTLs themselves with a copy,
2660 but expressions mentioned into a DECL_RTL cannot be shared with
2661 expressions in the instruction stream.
2663 Note that reload may convert pseudo registers into memories in-place.
2664 Pseudo registers are always shared, but MEMs never are. Thus if we
2665 reset the used flags on MEMs in the instruction stream, we must set
2666 them again on MEMs that appear in DECL_RTLs. */
2669 set_used_decls (tree blk
)
2674 for (t
= BLOCK_VARS (blk
); t
; t
= DECL_CHAIN (t
))
2675 if (DECL_RTL_SET_P (t
))
2676 set_used_flags (DECL_RTL (t
));
2678 /* Now process sub-blocks. */
2679 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= BLOCK_CHAIN (t
))
2683 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2684 Recursively does the same for subexpressions. Uses
2685 copy_rtx_if_shared_1 to reduce stack space. */
2688 copy_rtx_if_shared (rtx orig
)
2690 copy_rtx_if_shared_1 (&orig
);
2694 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2695 use. Recursively does the same for subexpressions. */
2698 copy_rtx_if_shared_1 (rtx
*orig1
)
2704 const char *format_ptr
;
2708 /* Repeat is used to turn tail-recursion into iteration. */
2715 code
= GET_CODE (x
);
2717 /* These types may be freely shared. */
2736 /* SCRATCH must be shared because they represent distinct values. */
2739 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
)
2744 if (shared_const_p (x
))
2754 /* The chain of insns is not being copied. */
2761 /* This rtx may not be shared. If it has already been seen,
2762 replace it with a copy of itself. */
2764 if (RTX_FLAG (x
, used
))
2766 x
= shallow_copy_rtx (x
);
2769 RTX_FLAG (x
, used
) = 1;
2771 /* Now scan the subexpressions recursively.
2772 We can store any replaced subexpressions directly into X
2773 since we know X is not shared! Any vectors in X
2774 must be copied if X was copied. */
2776 format_ptr
= GET_RTX_FORMAT (code
);
2777 length
= GET_RTX_LENGTH (code
);
2780 for (i
= 0; i
< length
; i
++)
2782 switch (*format_ptr
++)
2786 copy_rtx_if_shared_1 (last_ptr
);
2787 last_ptr
= &XEXP (x
, i
);
2791 if (XVEC (x
, i
) != NULL
)
2794 int len
= XVECLEN (x
, i
);
2796 /* Copy the vector iff I copied the rtx and the length
2798 if (copied
&& len
> 0)
2799 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
2801 /* Call recursively on all inside the vector. */
2802 for (j
= 0; j
< len
; j
++)
2805 copy_rtx_if_shared_1 (last_ptr
);
2806 last_ptr
= &XVECEXP (x
, i
, j
);
2821 /* Set the USED bit in X and its non-shareable subparts to FLAG. */
2824 mark_used_flags (rtx x
, int flag
)
2828 const char *format_ptr
;
2831 /* Repeat is used to turn tail-recursion into iteration. */
2836 code
= GET_CODE (x
);
2838 /* These types may be freely shared so we needn't do any resetting
2865 /* The chain of insns is not being copied. */
2872 RTX_FLAG (x
, used
) = flag
;
2874 format_ptr
= GET_RTX_FORMAT (code
);
2875 length
= GET_RTX_LENGTH (code
);
2877 for (i
= 0; i
< length
; i
++)
2879 switch (*format_ptr
++)
2887 mark_used_flags (XEXP (x
, i
), flag
);
2891 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2892 mark_used_flags (XVECEXP (x
, i
, j
), flag
);
2898 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2899 to look for shared sub-parts. */
2902 reset_used_flags (rtx x
)
2904 mark_used_flags (x
, 0);
2907 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2908 to look for shared sub-parts. */
2911 set_used_flags (rtx x
)
2913 mark_used_flags (x
, 1);
2916 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2917 Return X or the rtx for the pseudo reg the value of X was copied into.
2918 OTHER must be valid as a SET_DEST. */
2921 make_safe_from (rtx x
, rtx other
)
2924 switch (GET_CODE (other
))
2927 other
= SUBREG_REG (other
);
2929 case STRICT_LOW_PART
:
2932 other
= XEXP (other
, 0);
2941 && GET_CODE (x
) != SUBREG
)
2943 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
2944 || reg_mentioned_p (other
, x
))))
2946 rtx temp
= gen_reg_rtx (GET_MODE (x
));
2947 emit_move_insn (temp
, x
);
2953 /* Emission of insns (adding them to the doubly-linked list). */
2955 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2958 get_last_insn_anywhere (void)
2960 struct sequence_stack
*stack
;
2961 if (get_last_insn ())
2962 return get_last_insn ();
2963 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
2964 if (stack
->last
!= 0)
2969 /* Return the first nonnote insn emitted in current sequence or current
2970 function. This routine looks inside SEQUENCEs. */
2973 get_first_nonnote_insn (void)
2975 rtx insn
= get_insns ();
2980 for (insn
= next_insn (insn
);
2981 insn
&& NOTE_P (insn
);
2982 insn
= next_insn (insn
))
2986 if (NONJUMP_INSN_P (insn
)
2987 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2988 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2995 /* Return the last nonnote insn emitted in current sequence or current
2996 function. This routine looks inside SEQUENCEs. */
2999 get_last_nonnote_insn (void)
3001 rtx insn
= get_last_insn ();
3006 for (insn
= previous_insn (insn
);
3007 insn
&& NOTE_P (insn
);
3008 insn
= previous_insn (insn
))
3012 if (NONJUMP_INSN_P (insn
)
3013 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3014 insn
= XVECEXP (PATTERN (insn
), 0,
3015 XVECLEN (PATTERN (insn
), 0) - 1);
3022 /* Return the number of actual (non-debug) insns emitted in this
3026 get_max_insn_count (void)
3028 int n
= cur_insn_uid
;
3030 /* The table size must be stable across -g, to avoid codegen
3031 differences due to debug insns, and not be affected by
3032 -fmin-insn-uid, to avoid excessive table size and to simplify
3033 debugging of -fcompare-debug failures. */
3034 if (cur_debug_insn_uid
> MIN_NONDEBUG_INSN_UID
)
3035 n
-= cur_debug_insn_uid
;
3037 n
-= MIN_NONDEBUG_INSN_UID
;
3043 /* Return the next insn. If it is a SEQUENCE, return the first insn
3047 next_insn (rtx insn
)
3051 insn
= NEXT_INSN (insn
);
3052 if (insn
&& NONJUMP_INSN_P (insn
)
3053 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3054 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3060 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3064 previous_insn (rtx insn
)
3068 insn
= PREV_INSN (insn
);
3069 if (insn
&& NONJUMP_INSN_P (insn
)
3070 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3071 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
3077 /* Return the next insn after INSN that is not a NOTE. This routine does not
3078 look inside SEQUENCEs. */
3081 next_nonnote_insn (rtx insn
)
3085 insn
= NEXT_INSN (insn
);
3086 if (insn
== 0 || !NOTE_P (insn
))
3093 /* Return the next insn after INSN that is not a NOTE, but stop the
3094 search before we enter another basic block. This routine does not
3095 look inside SEQUENCEs. */
3098 next_nonnote_insn_bb (rtx insn
)
3102 insn
= NEXT_INSN (insn
);
3103 if (insn
== 0 || !NOTE_P (insn
))
3105 if (NOTE_INSN_BASIC_BLOCK_P (insn
))
3112 /* Return the previous insn before INSN that is not a NOTE. This routine does
3113 not look inside SEQUENCEs. */
3116 prev_nonnote_insn (rtx insn
)
3120 insn
= PREV_INSN (insn
);
3121 if (insn
== 0 || !NOTE_P (insn
))
3128 /* Return the previous insn before INSN that is not a NOTE, but stop
3129 the search before we enter another basic block. This routine does
3130 not look inside SEQUENCEs. */
3133 prev_nonnote_insn_bb (rtx insn
)
3137 insn
= PREV_INSN (insn
);
3138 if (insn
== 0 || !NOTE_P (insn
))
3140 if (NOTE_INSN_BASIC_BLOCK_P (insn
))
3147 /* Return the next insn after INSN that is not a DEBUG_INSN. This
3148 routine does not look inside SEQUENCEs. */
3151 next_nondebug_insn (rtx insn
)
3155 insn
= NEXT_INSN (insn
);
3156 if (insn
== 0 || !DEBUG_INSN_P (insn
))
3163 /* Return the previous insn before INSN that is not a DEBUG_INSN.
3164 This routine does not look inside SEQUENCEs. */
3167 prev_nondebug_insn (rtx insn
)
3171 insn
= PREV_INSN (insn
);
3172 if (insn
== 0 || !DEBUG_INSN_P (insn
))
3179 /* Return the next insn after INSN that is not a NOTE nor DEBUG_INSN.
3180 This routine does not look inside SEQUENCEs. */
3183 next_nonnote_nondebug_insn (rtx insn
)
3187 insn
= NEXT_INSN (insn
);
3188 if (insn
== 0 || (!NOTE_P (insn
) && !DEBUG_INSN_P (insn
)))
3195 /* Return the previous insn before INSN that is not a NOTE nor DEBUG_INSN.
3196 This routine does not look inside SEQUENCEs. */
3199 prev_nonnote_nondebug_insn (rtx insn
)
3203 insn
= PREV_INSN (insn
);
3204 if (insn
== 0 || (!NOTE_P (insn
) && !DEBUG_INSN_P (insn
)))
3211 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3212 or 0, if there is none. This routine does not look inside
3216 next_real_insn (rtx insn
)
3220 insn
= NEXT_INSN (insn
);
3221 if (insn
== 0 || INSN_P (insn
))
3228 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3229 or 0, if there is none. This routine does not look inside
3233 prev_real_insn (rtx insn
)
3237 insn
= PREV_INSN (insn
);
3238 if (insn
== 0 || INSN_P (insn
))
3245 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3246 This routine does not look inside SEQUENCEs. */
3249 last_call_insn (void)
3253 for (insn
= get_last_insn ();
3254 insn
&& !CALL_P (insn
);
3255 insn
= PREV_INSN (insn
))
3261 /* Find the next insn after INSN that really does something. This routine
3262 does not look inside SEQUENCEs. After reload this also skips over
3263 standalone USE and CLOBBER insn. */
3266 active_insn_p (const_rtx insn
)
3268 return (CALL_P (insn
) || JUMP_P (insn
)
3269 || (NONJUMP_INSN_P (insn
)
3270 && (! reload_completed
3271 || (GET_CODE (PATTERN (insn
)) != USE
3272 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
3276 next_active_insn (rtx insn
)
3280 insn
= NEXT_INSN (insn
);
3281 if (insn
== 0 || active_insn_p (insn
))
3288 /* Find the last insn before INSN that really does something. This routine
3289 does not look inside SEQUENCEs. After reload this also skips over
3290 standalone USE and CLOBBER insn. */
3293 prev_active_insn (rtx insn
)
3297 insn
= PREV_INSN (insn
);
3298 if (insn
== 0 || active_insn_p (insn
))
3305 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3308 next_label (rtx insn
)
3312 insn
= NEXT_INSN (insn
);
3313 if (insn
== 0 || LABEL_P (insn
))
3320 /* Return the last label to mark the same position as LABEL. Return LABEL
3321 itself if it is null or any return rtx. */
3324 skip_consecutive_labels (rtx label
)
3328 if (label
&& ANY_RETURN_P (label
))
3331 for (insn
= label
; insn
!= 0 && !INSN_P (insn
); insn
= NEXT_INSN (insn
))
3339 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3340 and REG_CC_USER notes so we can find it. */
3343 link_cc0_insns (rtx insn
)
3345 rtx user
= next_nonnote_insn (insn
);
3347 if (NONJUMP_INSN_P (user
) && GET_CODE (PATTERN (user
)) == SEQUENCE
)
3348 user
= XVECEXP (PATTERN (user
), 0, 0);
3350 add_reg_note (user
, REG_CC_SETTER
, insn
);
3351 add_reg_note (insn
, REG_CC_USER
, user
);
3354 /* Return the next insn that uses CC0 after INSN, which is assumed to
3355 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3356 applied to the result of this function should yield INSN).
3358 Normally, this is simply the next insn. However, if a REG_CC_USER note
3359 is present, it contains the insn that uses CC0.
3361 Return 0 if we can't find the insn. */
3364 next_cc0_user (rtx insn
)
3366 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
3369 return XEXP (note
, 0);
3371 insn
= next_nonnote_insn (insn
);
3372 if (insn
&& NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3373 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3375 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
3381 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3382 note, it is the previous insn. */
3385 prev_cc0_setter (rtx insn
)
3387 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
3390 return XEXP (note
, 0);
3392 insn
= prev_nonnote_insn (insn
);
3393 gcc_assert (sets_cc0_p (PATTERN (insn
)));
3400 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3403 find_auto_inc (rtx
*xp
, void *data
)
3406 rtx reg
= (rtx
) data
;
3408 if (GET_RTX_CLASS (GET_CODE (x
)) != RTX_AUTOINC
)
3411 switch (GET_CODE (x
))
3419 if (rtx_equal_p (reg
, XEXP (x
, 0)))
3430 /* Increment the label uses for all labels present in rtx. */
3433 mark_label_nuses (rtx x
)
3439 code
= GET_CODE (x
);
3440 if (code
== LABEL_REF
&& LABEL_P (XEXP (x
, 0)))
3441 LABEL_NUSES (XEXP (x
, 0))++;
3443 fmt
= GET_RTX_FORMAT (code
);
3444 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3447 mark_label_nuses (XEXP (x
, i
));
3448 else if (fmt
[i
] == 'E')
3449 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3450 mark_label_nuses (XVECEXP (x
, i
, j
));
3455 /* Try splitting insns that can be split for better scheduling.
3456 PAT is the pattern which might split.
3457 TRIAL is the insn providing PAT.
3458 LAST is nonzero if we should return the last insn of the sequence produced.
3460 If this routine succeeds in splitting, it returns the first or last
3461 replacement insn depending on the value of LAST. Otherwise, it
3462 returns TRIAL. If the insn to be returned can be split, it will be. */
3465 try_split (rtx pat
, rtx trial
, int last
)
3467 rtx before
= PREV_INSN (trial
);
3468 rtx after
= NEXT_INSN (trial
);
3469 int has_barrier
= 0;
3472 rtx insn_last
, insn
;
3475 /* We're not good at redistributing frame information. */
3476 if (RTX_FRAME_RELATED_P (trial
))
3479 if (any_condjump_p (trial
)
3480 && (note
= find_reg_note (trial
, REG_BR_PROB
, 0)))
3481 split_branch_probability
= INTVAL (XEXP (note
, 0));
3482 probability
= split_branch_probability
;
3484 seq
= split_insns (pat
, trial
);
3486 split_branch_probability
= -1;
3488 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3489 We may need to handle this specially. */
3490 if (after
&& BARRIER_P (after
))
3493 after
= NEXT_INSN (after
);
3499 /* Avoid infinite loop if any insn of the result matches
3500 the original pattern. */
3504 if (INSN_P (insn_last
)
3505 && rtx_equal_p (PATTERN (insn_last
), pat
))
3507 if (!NEXT_INSN (insn_last
))
3509 insn_last
= NEXT_INSN (insn_last
);
3512 /* We will be adding the new sequence to the function. The splitters
3513 may have introduced invalid RTL sharing, so unshare the sequence now. */
3514 unshare_all_rtl_in_chain (seq
);
3517 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3521 mark_jump_label (PATTERN (insn
), insn
, 0);
3523 if (probability
!= -1
3524 && any_condjump_p (insn
)
3525 && !find_reg_note (insn
, REG_BR_PROB
, 0))
3527 /* We can preserve the REG_BR_PROB notes only if exactly
3528 one jump is created, otherwise the machine description
3529 is responsible for this step using
3530 split_branch_probability variable. */
3531 gcc_assert (njumps
== 1);
3532 add_reg_note (insn
, REG_BR_PROB
, GEN_INT (probability
));
3537 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3538 in SEQ and copy any additional information across. */
3541 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3546 /* Add the old CALL_INSN_FUNCTION_USAGE to whatever the
3547 target may have explicitly specified. */
3548 p
= &CALL_INSN_FUNCTION_USAGE (insn
);
3551 *p
= CALL_INSN_FUNCTION_USAGE (trial
);
3553 /* If the old call was a sibling call, the new one must
3555 SIBLING_CALL_P (insn
) = SIBLING_CALL_P (trial
);
3557 /* If the new call is the last instruction in the sequence,
3558 it will effectively replace the old call in-situ. Otherwise
3559 we must move any following NOTE_INSN_CALL_ARG_LOCATION note
3560 so that it comes immediately after the new call. */
3561 if (NEXT_INSN (insn
))
3562 for (next
= NEXT_INSN (trial
);
3563 next
&& NOTE_P (next
);
3564 next
= NEXT_INSN (next
))
3565 if (NOTE_KIND (next
) == NOTE_INSN_CALL_ARG_LOCATION
)
3568 add_insn_after (next
, insn
, NULL
);
3574 /* Copy notes, particularly those related to the CFG. */
3575 for (note
= REG_NOTES (trial
); note
; note
= XEXP (note
, 1))
3577 switch (REG_NOTE_KIND (note
))
3580 copy_reg_eh_region_note_backward (note
, insn_last
, NULL
);
3586 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3589 add_reg_note (insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3593 case REG_NON_LOCAL_GOTO
:
3594 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3597 add_reg_note (insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3603 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3605 rtx reg
= XEXP (note
, 0);
3606 if (!FIND_REG_INC_NOTE (insn
, reg
)
3607 && for_each_rtx (&PATTERN (insn
), find_auto_inc
, reg
) > 0)
3608 add_reg_note (insn
, REG_INC
, reg
);
3614 fixup_args_size_notes (NULL_RTX
, insn_last
, INTVAL (XEXP (note
, 0)));
3622 /* If there are LABELS inside the split insns increment the
3623 usage count so we don't delete the label. */
3627 while (insn
!= NULL_RTX
)
3629 /* JUMP_P insns have already been "marked" above. */
3630 if (NONJUMP_INSN_P (insn
))
3631 mark_label_nuses (PATTERN (insn
));
3633 insn
= PREV_INSN (insn
);
3637 tem
= emit_insn_after_setloc (seq
, trial
, INSN_LOCATOR (trial
));
3639 delete_insn (trial
);
3641 emit_barrier_after (tem
);
3643 /* Recursively call try_split for each new insn created; by the
3644 time control returns here that insn will be fully split, so
3645 set LAST and continue from the insn after the one returned.
3646 We can't use next_active_insn here since AFTER may be a note.
3647 Ignore deleted insns, which can be occur if not optimizing. */
3648 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
3649 if (! INSN_DELETED_P (tem
) && INSN_P (tem
))
3650 tem
= try_split (PATTERN (tem
), tem
, 1);
3652 /* Return either the first or the last insn, depending on which was
3655 ? (after
? PREV_INSN (after
) : get_last_insn ())
3656 : NEXT_INSN (before
);
3659 /* Make and return an INSN rtx, initializing all its slots.
3660 Store PATTERN in the pattern slots. */
3663 make_insn_raw (rtx pattern
)
3667 insn
= rtx_alloc (INSN
);
3669 INSN_UID (insn
) = cur_insn_uid
++;
3670 PATTERN (insn
) = pattern
;
3671 INSN_CODE (insn
) = -1;
3672 REG_NOTES (insn
) = NULL
;
3673 INSN_LOCATOR (insn
) = curr_insn_locator ();
3674 BLOCK_FOR_INSN (insn
) = NULL
;
3676 #ifdef ENABLE_RTL_CHECKING
3679 && (returnjump_p (insn
)
3680 || (GET_CODE (insn
) == SET
3681 && SET_DEST (insn
) == pc_rtx
)))
3683 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3691 /* Like `make_insn_raw' but make a DEBUG_INSN instead of an insn. */
3694 make_debug_insn_raw (rtx pattern
)
3698 insn
= rtx_alloc (DEBUG_INSN
);
3699 INSN_UID (insn
) = cur_debug_insn_uid
++;
3700 if (cur_debug_insn_uid
> MIN_NONDEBUG_INSN_UID
)
3701 INSN_UID (insn
) = cur_insn_uid
++;
3703 PATTERN (insn
) = pattern
;
3704 INSN_CODE (insn
) = -1;
3705 REG_NOTES (insn
) = NULL
;
3706 INSN_LOCATOR (insn
) = curr_insn_locator ();
3707 BLOCK_FOR_INSN (insn
) = NULL
;
3712 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3715 make_jump_insn_raw (rtx pattern
)
3719 insn
= rtx_alloc (JUMP_INSN
);
3720 INSN_UID (insn
) = cur_insn_uid
++;
3722 PATTERN (insn
) = pattern
;
3723 INSN_CODE (insn
) = -1;
3724 REG_NOTES (insn
) = NULL
;
3725 JUMP_LABEL (insn
) = NULL
;
3726 INSN_LOCATOR (insn
) = curr_insn_locator ();
3727 BLOCK_FOR_INSN (insn
) = NULL
;
3732 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3735 make_call_insn_raw (rtx pattern
)
3739 insn
= rtx_alloc (CALL_INSN
);
3740 INSN_UID (insn
) = cur_insn_uid
++;
3742 PATTERN (insn
) = pattern
;
3743 INSN_CODE (insn
) = -1;
3744 REG_NOTES (insn
) = NULL
;
3745 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
3746 INSN_LOCATOR (insn
) = curr_insn_locator ();
3747 BLOCK_FOR_INSN (insn
) = NULL
;
3752 /* Add INSN to the end of the doubly-linked list.
3753 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3758 PREV_INSN (insn
) = get_last_insn();
3759 NEXT_INSN (insn
) = 0;
3761 if (NULL
!= get_last_insn())
3762 NEXT_INSN (get_last_insn ()) = insn
;
3764 if (NULL
== get_insns ())
3765 set_first_insn (insn
);
3767 set_last_insn (insn
);
3770 /* Add INSN into the doubly-linked list after insn AFTER. This and
3771 the next should be the only functions called to insert an insn once
3772 delay slots have been filled since only they know how to update a
3776 add_insn_after (rtx insn
, rtx after
, basic_block bb
)
3778 rtx next
= NEXT_INSN (after
);
3780 gcc_assert (!optimize
|| !INSN_DELETED_P (after
));
3782 NEXT_INSN (insn
) = next
;
3783 PREV_INSN (insn
) = after
;
3787 PREV_INSN (next
) = insn
;
3788 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
3789 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
3791 else if (get_last_insn () == after
)
3792 set_last_insn (insn
);
3795 struct sequence_stack
*stack
= seq_stack
;
3796 /* Scan all pending sequences too. */
3797 for (; stack
; stack
= stack
->next
)
3798 if (after
== stack
->last
)
3807 if (!BARRIER_P (after
)
3808 && !BARRIER_P (insn
)
3809 && (bb
= BLOCK_FOR_INSN (after
)))
3811 set_block_for_insn (insn
, bb
);
3813 df_insn_rescan (insn
);
3814 /* Should not happen as first in the BB is always
3815 either NOTE or LABEL. */
3816 if (BB_END (bb
) == after
3817 /* Avoid clobbering of structure when creating new BB. */
3818 && !BARRIER_P (insn
)
3819 && !NOTE_INSN_BASIC_BLOCK_P (insn
))
3823 NEXT_INSN (after
) = insn
;
3824 if (NONJUMP_INSN_P (after
) && GET_CODE (PATTERN (after
)) == SEQUENCE
)
3826 rtx sequence
= PATTERN (after
);
3827 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3831 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3832 the previous should be the only functions called to insert an insn
3833 once delay slots have been filled since only they know how to
3834 update a SEQUENCE. If BB is NULL, an attempt is made to infer the
3838 add_insn_before (rtx insn
, rtx before
, basic_block bb
)
3840 rtx prev
= PREV_INSN (before
);
3842 gcc_assert (!optimize
|| !INSN_DELETED_P (before
));
3844 PREV_INSN (insn
) = prev
;
3845 NEXT_INSN (insn
) = before
;
3849 NEXT_INSN (prev
) = insn
;
3850 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3852 rtx sequence
= PATTERN (prev
);
3853 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3856 else if (get_insns () == before
)
3857 set_first_insn (insn
);
3860 struct sequence_stack
*stack
= seq_stack
;
3861 /* Scan all pending sequences too. */
3862 for (; stack
; stack
= stack
->next
)
3863 if (before
== stack
->first
)
3865 stack
->first
= insn
;
3873 && !BARRIER_P (before
)
3874 && !BARRIER_P (insn
))
3875 bb
= BLOCK_FOR_INSN (before
);
3879 set_block_for_insn (insn
, bb
);
3881 df_insn_rescan (insn
);
3882 /* Should not happen as first in the BB is always either NOTE or
3884 gcc_assert (BB_HEAD (bb
) != insn
3885 /* Avoid clobbering of structure when creating new BB. */
3887 || NOTE_INSN_BASIC_BLOCK_P (insn
));
3890 PREV_INSN (before
) = insn
;
3891 if (NONJUMP_INSN_P (before
) && GET_CODE (PATTERN (before
)) == SEQUENCE
)
3892 PREV_INSN (XVECEXP (PATTERN (before
), 0, 0)) = insn
;
3896 /* Replace insn with an deleted instruction note. */
3899 set_insn_deleted (rtx insn
)
3901 df_insn_delete (BLOCK_FOR_INSN (insn
), INSN_UID (insn
));
3902 PUT_CODE (insn
, NOTE
);
3903 NOTE_KIND (insn
) = NOTE_INSN_DELETED
;
3907 /* Remove an insn from its doubly-linked list. This function knows how
3908 to handle sequences. */
3910 remove_insn (rtx insn
)
3912 rtx next
= NEXT_INSN (insn
);
3913 rtx prev
= PREV_INSN (insn
);
3916 /* Later in the code, the block will be marked dirty. */
3917 df_insn_delete (NULL
, INSN_UID (insn
));
3921 NEXT_INSN (prev
) = next
;
3922 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3924 rtx sequence
= PATTERN (prev
);
3925 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
3928 else if (get_insns () == insn
)
3931 PREV_INSN (next
) = NULL
;
3932 set_first_insn (next
);
3936 struct sequence_stack
*stack
= seq_stack
;
3937 /* Scan all pending sequences too. */
3938 for (; stack
; stack
= stack
->next
)
3939 if (insn
== stack
->first
)
3941 stack
->first
= next
;
3950 PREV_INSN (next
) = prev
;
3951 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
3952 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = prev
;
3954 else if (get_last_insn () == insn
)
3955 set_last_insn (prev
);
3958 struct sequence_stack
*stack
= seq_stack
;
3959 /* Scan all pending sequences too. */
3960 for (; stack
; stack
= stack
->next
)
3961 if (insn
== stack
->last
)
3969 if (!BARRIER_P (insn
)
3970 && (bb
= BLOCK_FOR_INSN (insn
)))
3972 if (NONDEBUG_INSN_P (insn
))
3973 df_set_bb_dirty (bb
);
3974 if (BB_HEAD (bb
) == insn
)
3976 /* Never ever delete the basic block note without deleting whole
3978 gcc_assert (!NOTE_P (insn
));
3979 BB_HEAD (bb
) = next
;
3981 if (BB_END (bb
) == insn
)
3986 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3989 add_function_usage_to (rtx call_insn
, rtx call_fusage
)
3991 gcc_assert (call_insn
&& CALL_P (call_insn
));
3993 /* Put the register usage information on the CALL. If there is already
3994 some usage information, put ours at the end. */
3995 if (CALL_INSN_FUNCTION_USAGE (call_insn
))
3999 for (link
= CALL_INSN_FUNCTION_USAGE (call_insn
); XEXP (link
, 1) != 0;
4000 link
= XEXP (link
, 1))
4003 XEXP (link
, 1) = call_fusage
;
4006 CALL_INSN_FUNCTION_USAGE (call_insn
) = call_fusage
;
4009 /* Delete all insns made since FROM.
4010 FROM becomes the new last instruction. */
4013 delete_insns_since (rtx from
)
4018 NEXT_INSN (from
) = 0;
4019 set_last_insn (from
);
4022 /* This function is deprecated, please use sequences instead.
4024 Move a consecutive bunch of insns to a different place in the chain.
4025 The insns to be moved are those between FROM and TO.
4026 They are moved to a new position after the insn AFTER.
4027 AFTER must not be FROM or TO or any insn in between.
4029 This function does not know about SEQUENCEs and hence should not be
4030 called after delay-slot filling has been done. */
4033 reorder_insns_nobb (rtx from
, rtx to
, rtx after
)
4035 #ifdef ENABLE_CHECKING
4037 for (x
= from
; x
!= to
; x
= NEXT_INSN (x
))
4038 gcc_assert (after
!= x
);
4039 gcc_assert (after
!= to
);
4042 /* Splice this bunch out of where it is now. */
4043 if (PREV_INSN (from
))
4044 NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
4046 PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
4047 if (get_last_insn () == to
)
4048 set_last_insn (PREV_INSN (from
));
4049 if (get_insns () == from
)
4050 set_first_insn (NEXT_INSN (to
));
4052 /* Make the new neighbors point to it and it to them. */
4053 if (NEXT_INSN (after
))
4054 PREV_INSN (NEXT_INSN (after
)) = to
;
4056 NEXT_INSN (to
) = NEXT_INSN (after
);
4057 PREV_INSN (from
) = after
;
4058 NEXT_INSN (after
) = from
;
4059 if (after
== get_last_insn())
4063 /* Same as function above, but take care to update BB boundaries. */
4065 reorder_insns (rtx from
, rtx to
, rtx after
)
4067 rtx prev
= PREV_INSN (from
);
4068 basic_block bb
, bb2
;
4070 reorder_insns_nobb (from
, to
, after
);
4072 if (!BARRIER_P (after
)
4073 && (bb
= BLOCK_FOR_INSN (after
)))
4076 df_set_bb_dirty (bb
);
4078 if (!BARRIER_P (from
)
4079 && (bb2
= BLOCK_FOR_INSN (from
)))
4081 if (BB_END (bb2
) == to
)
4082 BB_END (bb2
) = prev
;
4083 df_set_bb_dirty (bb2
);
4086 if (BB_END (bb
) == after
)
4089 for (x
= from
; x
!= NEXT_INSN (to
); x
= NEXT_INSN (x
))
4091 df_insn_change_bb (x
, bb
);
4096 /* Emit insn(s) of given code and pattern
4097 at a specified place within the doubly-linked list.
4099 All of the emit_foo global entry points accept an object
4100 X which is either an insn list or a PATTERN of a single
4103 There are thus a few canonical ways to generate code and
4104 emit it at a specific place in the instruction stream. For
4105 example, consider the instruction named SPOT and the fact that
4106 we would like to emit some instructions before SPOT. We might
4110 ... emit the new instructions ...
4111 insns_head = get_insns ();
4114 emit_insn_before (insns_head, SPOT);
4116 It used to be common to generate SEQUENCE rtl instead, but that
4117 is a relic of the past which no longer occurs. The reason is that
4118 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4119 generated would almost certainly die right after it was created. */
4122 emit_pattern_before_noloc (rtx x
, rtx before
, rtx last
, basic_block bb
,
4123 rtx (*make_raw
) (rtx
))
4127 gcc_assert (before
);
4132 switch (GET_CODE (x
))
4144 rtx next
= NEXT_INSN (insn
);
4145 add_insn_before (insn
, before
, bb
);
4151 #ifdef ENABLE_RTL_CHECKING
4158 last
= (*make_raw
) (x
);
4159 add_insn_before (last
, before
, bb
);
4166 /* Make X be output before the instruction BEFORE. */
4169 emit_insn_before_noloc (rtx x
, rtx before
, basic_block bb
)
4171 return emit_pattern_before_noloc (x
, before
, before
, bb
, make_insn_raw
);
4174 /* Make an instruction with body X and code JUMP_INSN
4175 and output it before the instruction BEFORE. */
4178 emit_jump_insn_before_noloc (rtx x
, rtx before
)
4180 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4181 make_jump_insn_raw
);
4184 /* Make an instruction with body X and code CALL_INSN
4185 and output it before the instruction BEFORE. */
4188 emit_call_insn_before_noloc (rtx x
, rtx before
)
4190 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4191 make_call_insn_raw
);
4194 /* Make an instruction with body X and code DEBUG_INSN
4195 and output it before the instruction BEFORE. */
4198 emit_debug_insn_before_noloc (rtx x
, rtx before
)
4200 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4201 make_debug_insn_raw
);
4204 /* Make an insn of code BARRIER
4205 and output it before the insn BEFORE. */
4208 emit_barrier_before (rtx before
)
4210 rtx insn
= rtx_alloc (BARRIER
);
4212 INSN_UID (insn
) = cur_insn_uid
++;
4214 add_insn_before (insn
, before
, NULL
);
4218 /* Emit the label LABEL before the insn BEFORE. */
4221 emit_label_before (rtx label
, rtx before
)
4223 gcc_checking_assert (INSN_UID (label
) == 0);
4224 INSN_UID (label
) = cur_insn_uid
++;
4225 add_insn_before (label
, before
, NULL
);
4229 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4232 emit_note_before (enum insn_note subtype
, rtx before
)
4234 rtx note
= rtx_alloc (NOTE
);
4235 INSN_UID (note
) = cur_insn_uid
++;
4236 NOTE_KIND (note
) = subtype
;
4237 BLOCK_FOR_INSN (note
) = NULL
;
4238 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
4240 add_insn_before (note
, before
, NULL
);
4244 /* Helper for emit_insn_after, handles lists of instructions
4248 emit_insn_after_1 (rtx first
, rtx after
, basic_block bb
)
4252 if (!bb
&& !BARRIER_P (after
))
4253 bb
= BLOCK_FOR_INSN (after
);
4257 df_set_bb_dirty (bb
);
4258 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4259 if (!BARRIER_P (last
))
4261 set_block_for_insn (last
, bb
);
4262 df_insn_rescan (last
);
4264 if (!BARRIER_P (last
))
4266 set_block_for_insn (last
, bb
);
4267 df_insn_rescan (last
);
4269 if (BB_END (bb
) == after
)
4273 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4276 after_after
= NEXT_INSN (after
);
4278 NEXT_INSN (after
) = first
;
4279 PREV_INSN (first
) = after
;
4280 NEXT_INSN (last
) = after_after
;
4282 PREV_INSN (after_after
) = last
;
4284 if (after
== get_last_insn())
4285 set_last_insn (last
);
4291 emit_pattern_after_noloc (rtx x
, rtx after
, basic_block bb
,
4292 rtx (*make_raw
)(rtx
))
4301 switch (GET_CODE (x
))
4310 last
= emit_insn_after_1 (x
, after
, bb
);
4313 #ifdef ENABLE_RTL_CHECKING
4320 last
= (*make_raw
) (x
);
4321 add_insn_after (last
, after
, bb
);
4328 /* Make X be output after the insn AFTER and set the BB of insn. If
4329 BB is NULL, an attempt is made to infer the BB from AFTER. */
4332 emit_insn_after_noloc (rtx x
, rtx after
, basic_block bb
)
4334 return emit_pattern_after_noloc (x
, after
, bb
, make_insn_raw
);
4338 /* Make an insn of code JUMP_INSN with body X
4339 and output it after the insn AFTER. */
4342 emit_jump_insn_after_noloc (rtx x
, rtx after
)
4344 return emit_pattern_after_noloc (x
, after
, NULL
, make_jump_insn_raw
);
4347 /* Make an instruction with body X and code CALL_INSN
4348 and output it after the instruction AFTER. */
4351 emit_call_insn_after_noloc (rtx x
, rtx after
)
4353 return emit_pattern_after_noloc (x
, after
, NULL
, make_call_insn_raw
);
4356 /* Make an instruction with body X and code CALL_INSN
4357 and output it after the instruction AFTER. */
4360 emit_debug_insn_after_noloc (rtx x
, rtx after
)
4362 return emit_pattern_after_noloc (x
, after
, NULL
, make_debug_insn_raw
);
4365 /* Make an insn of code BARRIER
4366 and output it after the insn AFTER. */
4369 emit_barrier_after (rtx after
)
4371 rtx insn
= rtx_alloc (BARRIER
);
4373 INSN_UID (insn
) = cur_insn_uid
++;
4375 add_insn_after (insn
, after
, NULL
);
4379 /* Emit the label LABEL after the insn AFTER. */
4382 emit_label_after (rtx label
, rtx after
)
4384 gcc_checking_assert (INSN_UID (label
) == 0);
4385 INSN_UID (label
) = cur_insn_uid
++;
4386 add_insn_after (label
, after
, NULL
);
4390 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4393 emit_note_after (enum insn_note subtype
, rtx after
)
4395 rtx note
= rtx_alloc (NOTE
);
4396 INSN_UID (note
) = cur_insn_uid
++;
4397 NOTE_KIND (note
) = subtype
;
4398 BLOCK_FOR_INSN (note
) = NULL
;
4399 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
4400 add_insn_after (note
, after
, NULL
);
4404 /* Insert PATTERN after AFTER, setting its INSN_LOCATION to LOC.
4405 MAKE_RAW indicates how to turn PATTERN into a real insn. */
4408 emit_pattern_after_setloc (rtx pattern
, rtx after
, int loc
,
4409 rtx (*make_raw
) (rtx
))
4411 rtx last
= emit_pattern_after_noloc (pattern
, after
, NULL
, make_raw
);
4413 if (pattern
== NULL_RTX
|| !loc
)
4416 after
= NEXT_INSN (after
);
4419 if (active_insn_p (after
) && !INSN_LOCATOR (after
))
4420 INSN_LOCATOR (after
) = loc
;
4423 after
= NEXT_INSN (after
);
4428 /* Insert PATTERN after AFTER. MAKE_RAW indicates how to turn PATTERN
4429 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert after
4433 emit_pattern_after (rtx pattern
, rtx after
, bool skip_debug_insns
,
4434 rtx (*make_raw
) (rtx
))
4438 if (skip_debug_insns
)
4439 while (DEBUG_INSN_P (prev
))
4440 prev
= PREV_INSN (prev
);
4443 return emit_pattern_after_setloc (pattern
, after
, INSN_LOCATOR (prev
),
4446 return emit_pattern_after_noloc (pattern
, after
, NULL
, make_raw
);
4449 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to LOC. */
4451 emit_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4453 return emit_pattern_after_setloc (pattern
, after
, loc
, make_insn_raw
);
4456 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4458 emit_insn_after (rtx pattern
, rtx after
)
4460 return emit_pattern_after (pattern
, after
, true, make_insn_raw
);
4463 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to LOC. */
4465 emit_jump_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4467 return emit_pattern_after_setloc (pattern
, after
, loc
, make_jump_insn_raw
);
4470 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4472 emit_jump_insn_after (rtx pattern
, rtx after
)
4474 return emit_pattern_after (pattern
, after
, true, make_jump_insn_raw
);
4477 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to LOC. */
4479 emit_call_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4481 return emit_pattern_after_setloc (pattern
, after
, loc
, make_call_insn_raw
);
4484 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4486 emit_call_insn_after (rtx pattern
, rtx after
)
4488 return emit_pattern_after (pattern
, after
, true, make_call_insn_raw
);
4491 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATOR according to LOC. */
4493 emit_debug_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4495 return emit_pattern_after_setloc (pattern
, after
, loc
, make_debug_insn_raw
);
4498 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4500 emit_debug_insn_after (rtx pattern
, rtx after
)
4502 return emit_pattern_after (pattern
, after
, false, make_debug_insn_raw
);
4505 /* Insert PATTERN before BEFORE, setting its INSN_LOCATION to LOC.
4506 MAKE_RAW indicates how to turn PATTERN into a real insn. INSNP
4507 indicates if PATTERN is meant for an INSN as opposed to a JUMP_INSN,
4511 emit_pattern_before_setloc (rtx pattern
, rtx before
, int loc
, bool insnp
,
4512 rtx (*make_raw
) (rtx
))
4514 rtx first
= PREV_INSN (before
);
4515 rtx last
= emit_pattern_before_noloc (pattern
, before
,
4516 insnp
? before
: NULL_RTX
,
4519 if (pattern
== NULL_RTX
|| !loc
)
4523 first
= get_insns ();
4525 first
= NEXT_INSN (first
);
4528 if (active_insn_p (first
) && !INSN_LOCATOR (first
))
4529 INSN_LOCATOR (first
) = loc
;
4532 first
= NEXT_INSN (first
);
4537 /* Insert PATTERN before BEFORE. MAKE_RAW indicates how to turn PATTERN
4538 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert
4539 before any DEBUG_INSNs. INSNP indicates if PATTERN is meant for an
4540 INSN as opposed to a JUMP_INSN, CALL_INSN, etc. */
4543 emit_pattern_before (rtx pattern
, rtx before
, bool skip_debug_insns
,
4544 bool insnp
, rtx (*make_raw
) (rtx
))
4548 if (skip_debug_insns
)
4549 while (DEBUG_INSN_P (next
))
4550 next
= PREV_INSN (next
);
4553 return emit_pattern_before_setloc (pattern
, before
, INSN_LOCATOR (next
),
4556 return emit_pattern_before_noloc (pattern
, before
,
4557 insnp
? before
: NULL_RTX
,
4561 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to LOC. */
4563 emit_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4565 return emit_pattern_before_setloc (pattern
, before
, loc
, true,
4569 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4571 emit_insn_before (rtx pattern
, rtx before
)
4573 return emit_pattern_before (pattern
, before
, true, true, make_insn_raw
);
4576 /* like emit_insn_before_noloc, but set INSN_LOCATOR according to LOC. */
4578 emit_jump_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4580 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4581 make_jump_insn_raw
);
4584 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4586 emit_jump_insn_before (rtx pattern
, rtx before
)
4588 return emit_pattern_before (pattern
, before
, true, false,
4589 make_jump_insn_raw
);
4592 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to LOC. */
4594 emit_call_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4596 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4597 make_call_insn_raw
);
4600 /* Like emit_call_insn_before_noloc,
4601 but set insn_locator according to BEFORE. */
4603 emit_call_insn_before (rtx pattern
, rtx before
)
4605 return emit_pattern_before (pattern
, before
, true, false,
4606 make_call_insn_raw
);
4609 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to LOC. */
4611 emit_debug_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4613 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4614 make_debug_insn_raw
);
4617 /* Like emit_debug_insn_before_noloc,
4618 but set insn_locator according to BEFORE. */
4620 emit_debug_insn_before (rtx pattern
, rtx before
)
4622 return emit_pattern_before (pattern
, before
, false, false,
4623 make_debug_insn_raw
);
4626 /* Take X and emit it at the end of the doubly-linked
4629 Returns the last insn emitted. */
4634 rtx last
= get_last_insn();
4640 switch (GET_CODE (x
))
4652 rtx next
= NEXT_INSN (insn
);
4659 #ifdef ENABLE_RTL_CHECKING
4666 last
= make_insn_raw (x
);
4674 /* Make an insn of code DEBUG_INSN with pattern X
4675 and add it to the end of the doubly-linked list. */
4678 emit_debug_insn (rtx x
)
4680 rtx last
= get_last_insn();
4686 switch (GET_CODE (x
))
4698 rtx next
= NEXT_INSN (insn
);
4705 #ifdef ENABLE_RTL_CHECKING
4712 last
= make_debug_insn_raw (x
);
4720 /* Make an insn of code JUMP_INSN with pattern X
4721 and add it to the end of the doubly-linked list. */
4724 emit_jump_insn (rtx x
)
4726 rtx last
= NULL_RTX
, insn
;
4728 switch (GET_CODE (x
))
4740 rtx next
= NEXT_INSN (insn
);
4747 #ifdef ENABLE_RTL_CHECKING
4754 last
= make_jump_insn_raw (x
);
4762 /* Make an insn of code CALL_INSN with pattern X
4763 and add it to the end of the doubly-linked list. */
4766 emit_call_insn (rtx x
)
4770 switch (GET_CODE (x
))
4779 insn
= emit_insn (x
);
4782 #ifdef ENABLE_RTL_CHECKING
4789 insn
= make_call_insn_raw (x
);
4797 /* Add the label LABEL to the end of the doubly-linked list. */
4800 emit_label (rtx label
)
4802 gcc_checking_assert (INSN_UID (label
) == 0);
4803 INSN_UID (label
) = cur_insn_uid
++;
4808 /* Make an insn of code BARRIER
4809 and add it to the end of the doubly-linked list. */
4814 rtx barrier
= rtx_alloc (BARRIER
);
4815 INSN_UID (barrier
) = cur_insn_uid
++;
4820 /* Emit a copy of note ORIG. */
4823 emit_note_copy (rtx orig
)
4827 note
= rtx_alloc (NOTE
);
4829 INSN_UID (note
) = cur_insn_uid
++;
4830 NOTE_DATA (note
) = NOTE_DATA (orig
);
4831 NOTE_KIND (note
) = NOTE_KIND (orig
);
4832 BLOCK_FOR_INSN (note
) = NULL
;
4838 /* Make an insn of code NOTE or type NOTE_NO
4839 and add it to the end of the doubly-linked list. */
4842 emit_note (enum insn_note kind
)
4846 note
= rtx_alloc (NOTE
);
4847 INSN_UID (note
) = cur_insn_uid
++;
4848 NOTE_KIND (note
) = kind
;
4849 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
4850 BLOCK_FOR_INSN (note
) = NULL
;
4855 /* Emit a clobber of lvalue X. */
4858 emit_clobber (rtx x
)
4860 /* CONCATs should not appear in the insn stream. */
4861 if (GET_CODE (x
) == CONCAT
)
4863 emit_clobber (XEXP (x
, 0));
4864 return emit_clobber (XEXP (x
, 1));
4866 return emit_insn (gen_rtx_CLOBBER (VOIDmode
, x
));
4869 /* Return a sequence of insns to clobber lvalue X. */
4883 /* Emit a use of rvalue X. */
4888 /* CONCATs should not appear in the insn stream. */
4889 if (GET_CODE (x
) == CONCAT
)
4891 emit_use (XEXP (x
, 0));
4892 return emit_use (XEXP (x
, 1));
4894 return emit_insn (gen_rtx_USE (VOIDmode
, x
));
4897 /* Return a sequence of insns to use rvalue X. */
4911 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4912 note of this type already exists, remove it first. */
4915 set_unique_reg_note (rtx insn
, enum reg_note kind
, rtx datum
)
4917 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
4923 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4924 has multiple sets (some callers assume single_set
4925 means the insn only has one set, when in fact it
4926 means the insn only has one * useful * set). */
4927 if (GET_CODE (PATTERN (insn
)) == PARALLEL
&& multiple_sets (insn
))
4933 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4934 It serves no useful purpose and breaks eliminate_regs. */
4935 if (GET_CODE (datum
) == ASM_OPERANDS
)
4940 XEXP (note
, 0) = datum
;
4941 df_notes_rescan (insn
);
4949 XEXP (note
, 0) = datum
;
4955 add_reg_note (insn
, kind
, datum
);
4961 df_notes_rescan (insn
);
4967 return REG_NOTES (insn
);
4970 /* Like set_unique_reg_note, but don't do anything unless INSN sets DST. */
4972 set_dst_reg_note (rtx insn
, enum reg_note kind
, rtx datum
, rtx dst
)
4974 rtx set
= single_set (insn
);
4976 if (set
&& SET_DEST (set
) == dst
)
4977 return set_unique_reg_note (insn
, kind
, datum
);
4981 /* Return an indication of which type of insn should have X as a body.
4982 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4984 static enum rtx_code
4985 classify_insn (rtx x
)
4989 if (GET_CODE (x
) == CALL
)
4991 if (ANY_RETURN_P (x
))
4993 if (GET_CODE (x
) == SET
)
4995 if (SET_DEST (x
) == pc_rtx
)
4997 else if (GET_CODE (SET_SRC (x
)) == CALL
)
5002 if (GET_CODE (x
) == PARALLEL
)
5005 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
5006 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
5008 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
5009 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
5011 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
5012 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
5018 /* Emit the rtl pattern X as an appropriate kind of insn.
5019 If X is a label, it is simply added into the insn chain. */
5024 enum rtx_code code
= classify_insn (x
);
5029 return emit_label (x
);
5031 return emit_insn (x
);
5034 rtx insn
= emit_jump_insn (x
);
5035 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
5036 return emit_barrier ();
5040 return emit_call_insn (x
);
5042 return emit_debug_insn (x
);
5048 /* Space for free sequence stack entries. */
5049 static GTY ((deletable
)) struct sequence_stack
*free_sequence_stack
;
5051 /* Begin emitting insns to a sequence. If this sequence will contain
5052 something that might cause the compiler to pop arguments to function
5053 calls (because those pops have previously been deferred; see
5054 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
5055 before calling this function. That will ensure that the deferred
5056 pops are not accidentally emitted in the middle of this sequence. */
5059 start_sequence (void)
5061 struct sequence_stack
*tem
;
5063 if (free_sequence_stack
!= NULL
)
5065 tem
= free_sequence_stack
;
5066 free_sequence_stack
= tem
->next
;
5069 tem
= ggc_alloc_sequence_stack ();
5071 tem
->next
= seq_stack
;
5072 tem
->first
= get_insns ();
5073 tem
->last
= get_last_insn ();
5081 /* Set up the insn chain starting with FIRST as the current sequence,
5082 saving the previously current one. See the documentation for
5083 start_sequence for more information about how to use this function. */
5086 push_to_sequence (rtx first
)
5092 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
))
5095 set_first_insn (first
);
5096 set_last_insn (last
);
5099 /* Like push_to_sequence, but take the last insn as an argument to avoid
5100 looping through the list. */
5103 push_to_sequence2 (rtx first
, rtx last
)
5107 set_first_insn (first
);
5108 set_last_insn (last
);
5111 /* Set up the outer-level insn chain
5112 as the current sequence, saving the previously current one. */
5115 push_topmost_sequence (void)
5117 struct sequence_stack
*stack
, *top
= NULL
;
5121 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
5124 set_first_insn (top
->first
);
5125 set_last_insn (top
->last
);
5128 /* After emitting to the outer-level insn chain, update the outer-level
5129 insn chain, and restore the previous saved state. */
5132 pop_topmost_sequence (void)
5134 struct sequence_stack
*stack
, *top
= NULL
;
5136 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
5139 top
->first
= get_insns ();
5140 top
->last
= get_last_insn ();
5145 /* After emitting to a sequence, restore previous saved state.
5147 To get the contents of the sequence just made, you must call
5148 `get_insns' *before* calling here.
5150 If the compiler might have deferred popping arguments while
5151 generating this sequence, and this sequence will not be immediately
5152 inserted into the instruction stream, use do_pending_stack_adjust
5153 before calling get_insns. That will ensure that the deferred
5154 pops are inserted into this sequence, and not into some random
5155 location in the instruction stream. See INHIBIT_DEFER_POP for more
5156 information about deferred popping of arguments. */
5161 struct sequence_stack
*tem
= seq_stack
;
5163 set_first_insn (tem
->first
);
5164 set_last_insn (tem
->last
);
5165 seq_stack
= tem
->next
;
5167 memset (tem
, 0, sizeof (*tem
));
5168 tem
->next
= free_sequence_stack
;
5169 free_sequence_stack
= tem
;
5172 /* Return 1 if currently emitting into a sequence. */
5175 in_sequence_p (void)
5177 return seq_stack
!= 0;
5180 /* Put the various virtual registers into REGNO_REG_RTX. */
5183 init_virtual_regs (void)
5185 regno_reg_rtx
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
5186 regno_reg_rtx
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
5187 regno_reg_rtx
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
5188 regno_reg_rtx
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
5189 regno_reg_rtx
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
5190 regno_reg_rtx
[VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM
]
5191 = virtual_preferred_stack_boundary_rtx
;
5195 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5196 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
5197 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
5198 static int copy_insn_n_scratches
;
5200 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5201 copied an ASM_OPERANDS.
5202 In that case, it is the original input-operand vector. */
5203 static rtvec orig_asm_operands_vector
;
5205 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5206 copied an ASM_OPERANDS.
5207 In that case, it is the copied input-operand vector. */
5208 static rtvec copy_asm_operands_vector
;
5210 /* Likewise for the constraints vector. */
5211 static rtvec orig_asm_constraints_vector
;
5212 static rtvec copy_asm_constraints_vector
;
5214 /* Recursively create a new copy of an rtx for copy_insn.
5215 This function differs from copy_rtx in that it handles SCRATCHes and
5216 ASM_OPERANDs properly.
5217 Normally, this function is not used directly; use copy_insn as front end.
5218 However, you could first copy an insn pattern with copy_insn and then use
5219 this function afterwards to properly copy any REG_NOTEs containing
5223 copy_insn_1 (rtx orig
)
5228 const char *format_ptr
;
5233 code
= GET_CODE (orig
);
5251 if (REG_P (XEXP (orig
, 0)) && REGNO (XEXP (orig
, 0)) < FIRST_PSEUDO_REGISTER
)
5256 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
5257 if (copy_insn_scratch_in
[i
] == orig
)
5258 return copy_insn_scratch_out
[i
];
5262 if (shared_const_p (orig
))
5266 /* A MEM with a constant address is not sharable. The problem is that
5267 the constant address may need to be reloaded. If the mem is shared,
5268 then reloading one copy of this mem will cause all copies to appear
5269 to have been reloaded. */
5275 /* Copy the various flags, fields, and other information. We assume
5276 that all fields need copying, and then clear the fields that should
5277 not be copied. That is the sensible default behavior, and forces
5278 us to explicitly document why we are *not* copying a flag. */
5279 copy
= shallow_copy_rtx (orig
);
5281 /* We do not copy the USED flag, which is used as a mark bit during
5282 walks over the RTL. */
5283 RTX_FLAG (copy
, used
) = 0;
5285 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5288 RTX_FLAG (copy
, jump
) = 0;
5289 RTX_FLAG (copy
, call
) = 0;
5290 RTX_FLAG (copy
, frame_related
) = 0;
5293 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
5295 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
5296 switch (*format_ptr
++)
5299 if (XEXP (orig
, i
) != NULL
)
5300 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
5305 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
5306 XVEC (copy
, i
) = copy_asm_constraints_vector
;
5307 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
5308 XVEC (copy
, i
) = copy_asm_operands_vector
;
5309 else if (XVEC (orig
, i
) != NULL
)
5311 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
5312 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
5313 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
5324 /* These are left unchanged. */
5331 if (code
== SCRATCH
)
5333 i
= copy_insn_n_scratches
++;
5334 gcc_assert (i
< MAX_RECOG_OPERANDS
);
5335 copy_insn_scratch_in
[i
] = orig
;
5336 copy_insn_scratch_out
[i
] = copy
;
5338 else if (code
== ASM_OPERANDS
)
5340 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
5341 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
5342 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
5343 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
5349 /* Create a new copy of an rtx.
5350 This function differs from copy_rtx in that it handles SCRATCHes and
5351 ASM_OPERANDs properly.
5352 INSN doesn't really have to be a full INSN; it could be just the
5355 copy_insn (rtx insn
)
5357 copy_insn_n_scratches
= 0;
5358 orig_asm_operands_vector
= 0;
5359 orig_asm_constraints_vector
= 0;
5360 copy_asm_operands_vector
= 0;
5361 copy_asm_constraints_vector
= 0;
5362 return copy_insn_1 (insn
);
5365 /* Initialize data structures and variables in this file
5366 before generating rtl for each function. */
5371 set_first_insn (NULL
);
5372 set_last_insn (NULL
);
5373 if (MIN_NONDEBUG_INSN_UID
)
5374 cur_insn_uid
= MIN_NONDEBUG_INSN_UID
;
5377 cur_debug_insn_uid
= 1;
5378 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
5379 first_label_num
= label_num
;
5382 /* Init the tables that describe all the pseudo regs. */
5384 crtl
->emit
.regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
5386 crtl
->emit
.regno_pointer_align
5387 = XCNEWVEC (unsigned char, crtl
->emit
.regno_pointer_align_length
);
5389 regno_reg_rtx
= ggc_alloc_vec_rtx (crtl
->emit
.regno_pointer_align_length
);
5391 /* Put copies of all the hard registers into regno_reg_rtx. */
5392 memcpy (regno_reg_rtx
,
5393 initial_regno_reg_rtx
,
5394 FIRST_PSEUDO_REGISTER
* sizeof (rtx
));
5396 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5397 init_virtual_regs ();
5399 /* Indicate that the virtual registers and stack locations are
5401 REG_POINTER (stack_pointer_rtx
) = 1;
5402 REG_POINTER (frame_pointer_rtx
) = 1;
5403 REG_POINTER (hard_frame_pointer_rtx
) = 1;
5404 REG_POINTER (arg_pointer_rtx
) = 1;
5406 REG_POINTER (virtual_incoming_args_rtx
) = 1;
5407 REG_POINTER (virtual_stack_vars_rtx
) = 1;
5408 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
5409 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
5410 REG_POINTER (virtual_cfa_rtx
) = 1;
5412 #ifdef STACK_BOUNDARY
5413 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
5414 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5415 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5416 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
5418 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5419 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
5420 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
5421 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5422 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
5425 #ifdef INIT_EXPANDERS
5430 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5433 gen_const_vector (enum machine_mode mode
, int constant
)
5438 enum machine_mode inner
;
5440 units
= GET_MODE_NUNITS (mode
);
5441 inner
= GET_MODE_INNER (mode
);
5443 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner
));
5445 v
= rtvec_alloc (units
);
5447 /* We need to call this function after we set the scalar const_tiny_rtx
5449 gcc_assert (const_tiny_rtx
[constant
][(int) inner
]);
5451 for (i
= 0; i
< units
; ++i
)
5452 RTVEC_ELT (v
, i
) = const_tiny_rtx
[constant
][(int) inner
];
5454 tem
= gen_rtx_raw_CONST_VECTOR (mode
, v
);
5458 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5459 all elements are zero, and the one vector when all elements are one. */
5461 gen_rtx_CONST_VECTOR (enum machine_mode mode
, rtvec v
)
5463 enum machine_mode inner
= GET_MODE_INNER (mode
);
5464 int nunits
= GET_MODE_NUNITS (mode
);
5468 /* Check to see if all of the elements have the same value. */
5469 x
= RTVEC_ELT (v
, nunits
- 1);
5470 for (i
= nunits
- 2; i
>= 0; i
--)
5471 if (RTVEC_ELT (v
, i
) != x
)
5474 /* If the values are all the same, check to see if we can use one of the
5475 standard constant vectors. */
5478 if (x
== CONST0_RTX (inner
))
5479 return CONST0_RTX (mode
);
5480 else if (x
== CONST1_RTX (inner
))
5481 return CONST1_RTX (mode
);
5482 else if (x
== CONSTM1_RTX (inner
))
5483 return CONSTM1_RTX (mode
);
5486 return gen_rtx_raw_CONST_VECTOR (mode
, v
);
5489 /* Initialise global register information required by all functions. */
5492 init_emit_regs (void)
5495 enum machine_mode mode
;
5498 /* Reset register attributes */
5499 htab_empty (reg_attrs_htab
);
5501 /* We need reg_raw_mode, so initialize the modes now. */
5502 init_reg_modes_target ();
5504 /* Assign register numbers to the globally defined register rtx. */
5505 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
5506 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
5507 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
, HARD_FRAME_POINTER_REGNUM
);
5508 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
5509 virtual_incoming_args_rtx
=
5510 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
5511 virtual_stack_vars_rtx
=
5512 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
5513 virtual_stack_dynamic_rtx
=
5514 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
5515 virtual_outgoing_args_rtx
=
5516 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
5517 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
5518 virtual_preferred_stack_boundary_rtx
=
5519 gen_raw_REG (Pmode
, VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM
);
5521 /* Initialize RTL for commonly used hard registers. These are
5522 copied into regno_reg_rtx as we begin to compile each function. */
5523 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5524 initial_regno_reg_rtx
[i
] = gen_raw_REG (reg_raw_mode
[i
], i
);
5526 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5527 return_address_pointer_rtx
5528 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
5531 if ((unsigned) PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
5532 pic_offset_table_rtx
= gen_raw_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
5534 pic_offset_table_rtx
= NULL_RTX
;
5536 for (i
= 0; i
< (int) MAX_MACHINE_MODE
; i
++)
5538 mode
= (enum machine_mode
) i
;
5539 attrs
= ggc_alloc_cleared_mem_attrs ();
5540 attrs
->align
= BITS_PER_UNIT
;
5541 attrs
->addrspace
= ADDR_SPACE_GENERIC
;
5542 if (mode
!= BLKmode
)
5544 attrs
->size_known_p
= true;
5545 attrs
->size
= GET_MODE_SIZE (mode
);
5546 if (STRICT_ALIGNMENT
)
5547 attrs
->align
= GET_MODE_ALIGNMENT (mode
);
5549 mode_mem_attrs
[i
] = attrs
;
5553 /* Create some permanent unique rtl objects shared between all functions. */
5556 init_emit_once (void)
5559 enum machine_mode mode
;
5560 enum machine_mode double_mode
;
5562 /* Initialize the CONST_INT, CONST_DOUBLE, CONST_FIXED, and memory attribute
5564 const_int_htab
= htab_create_ggc (37, const_int_htab_hash
,
5565 const_int_htab_eq
, NULL
);
5567 const_double_htab
= htab_create_ggc (37, const_double_htab_hash
,
5568 const_double_htab_eq
, NULL
);
5570 const_fixed_htab
= htab_create_ggc (37, const_fixed_htab_hash
,
5571 const_fixed_htab_eq
, NULL
);
5573 mem_attrs_htab
= htab_create_ggc (37, mem_attrs_htab_hash
,
5574 mem_attrs_htab_eq
, NULL
);
5575 reg_attrs_htab
= htab_create_ggc (37, reg_attrs_htab_hash
,
5576 reg_attrs_htab_eq
, NULL
);
5578 /* Compute the word and byte modes. */
5580 byte_mode
= VOIDmode
;
5581 word_mode
= VOIDmode
;
5582 double_mode
= VOIDmode
;
5584 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5586 mode
= GET_MODE_WIDER_MODE (mode
))
5588 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
5589 && byte_mode
== VOIDmode
)
5592 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
5593 && word_mode
== VOIDmode
)
5597 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
);
5599 mode
= GET_MODE_WIDER_MODE (mode
))
5601 if (GET_MODE_BITSIZE (mode
) == DOUBLE_TYPE_SIZE
5602 && double_mode
== VOIDmode
)
5606 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
5608 #ifdef INIT_EXPANDERS
5609 /* This is to initialize {init|mark|free}_machine_status before the first
5610 call to push_function_context_to. This is needed by the Chill front
5611 end which calls push_function_context_to before the first call to
5612 init_function_start. */
5616 /* Create the unique rtx's for certain rtx codes and operand values. */
5618 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5619 tries to use these variables. */
5620 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
5621 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
5622 gen_rtx_raw_CONST_INT (VOIDmode
, (HOST_WIDE_INT
) i
);
5624 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
5625 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
5626 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
5628 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
5630 REAL_VALUE_FROM_INT (dconst0
, 0, 0, double_mode
);
5631 REAL_VALUE_FROM_INT (dconst1
, 1, 0, double_mode
);
5632 REAL_VALUE_FROM_INT (dconst2
, 2, 0, double_mode
);
5637 dconsthalf
= dconst1
;
5638 SET_REAL_EXP (&dconsthalf
, REAL_EXP (&dconsthalf
) - 1);
5640 for (i
= 0; i
< 3; i
++)
5642 const REAL_VALUE_TYPE
*const r
=
5643 (i
== 0 ? &dconst0
: i
== 1 ? &dconst1
: &dconst2
);
5645 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
);
5647 mode
= GET_MODE_WIDER_MODE (mode
))
5648 const_tiny_rtx
[i
][(int) mode
] =
5649 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5651 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT
);
5653 mode
= GET_MODE_WIDER_MODE (mode
))
5654 const_tiny_rtx
[i
][(int) mode
] =
5655 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5657 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
5659 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5661 mode
= GET_MODE_WIDER_MODE (mode
))
5662 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5664 for (mode
= MIN_MODE_PARTIAL_INT
;
5665 mode
<= MAX_MODE_PARTIAL_INT
;
5666 mode
= (enum machine_mode
)((int)(mode
) + 1))
5667 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5670 const_tiny_rtx
[3][(int) VOIDmode
] = constm1_rtx
;
5672 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5674 mode
= GET_MODE_WIDER_MODE (mode
))
5675 const_tiny_rtx
[3][(int) mode
] = constm1_rtx
;
5677 for (mode
= MIN_MODE_PARTIAL_INT
;
5678 mode
<= MAX_MODE_PARTIAL_INT
;
5679 mode
= (enum machine_mode
)((int)(mode
) + 1))
5680 const_tiny_rtx
[3][(int) mode
] = constm1_rtx
;
5682 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT
);
5684 mode
= GET_MODE_WIDER_MODE (mode
))
5686 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
5687 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
5690 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT
);
5692 mode
= GET_MODE_WIDER_MODE (mode
))
5694 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
5695 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
5698 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT
);
5700 mode
= GET_MODE_WIDER_MODE (mode
))
5702 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5703 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5704 const_tiny_rtx
[3][(int) mode
] = gen_const_vector (mode
, 3);
5707 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT
);
5709 mode
= GET_MODE_WIDER_MODE (mode
))
5711 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5712 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5715 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FRACT
);
5717 mode
= GET_MODE_WIDER_MODE (mode
))
5719 FCONST0(mode
).data
.high
= 0;
5720 FCONST0(mode
).data
.low
= 0;
5721 FCONST0(mode
).mode
= mode
;
5722 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5723 FCONST0 (mode
), mode
);
5726 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_UFRACT
);
5728 mode
= GET_MODE_WIDER_MODE (mode
))
5730 FCONST0(mode
).data
.high
= 0;
5731 FCONST0(mode
).data
.low
= 0;
5732 FCONST0(mode
).mode
= mode
;
5733 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5734 FCONST0 (mode
), mode
);
5737 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_ACCUM
);
5739 mode
= GET_MODE_WIDER_MODE (mode
))
5741 FCONST0(mode
).data
.high
= 0;
5742 FCONST0(mode
).data
.low
= 0;
5743 FCONST0(mode
).mode
= mode
;
5744 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5745 FCONST0 (mode
), mode
);
5747 /* We store the value 1. */
5748 FCONST1(mode
).data
.high
= 0;
5749 FCONST1(mode
).data
.low
= 0;
5750 FCONST1(mode
).mode
= mode
;
5751 lshift_double (1, 0, GET_MODE_FBIT (mode
),
5752 HOST_BITS_PER_DOUBLE_INT
,
5753 &FCONST1(mode
).data
.low
,
5754 &FCONST1(mode
).data
.high
,
5755 SIGNED_FIXED_POINT_MODE_P (mode
));
5756 const_tiny_rtx
[1][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5757 FCONST1 (mode
), mode
);
5760 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_UACCUM
);
5762 mode
= GET_MODE_WIDER_MODE (mode
))
5764 FCONST0(mode
).data
.high
= 0;
5765 FCONST0(mode
).data
.low
= 0;
5766 FCONST0(mode
).mode
= mode
;
5767 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5768 FCONST0 (mode
), mode
);
5770 /* We store the value 1. */
5771 FCONST1(mode
).data
.high
= 0;
5772 FCONST1(mode
).data
.low
= 0;
5773 FCONST1(mode
).mode
= mode
;
5774 lshift_double (1, 0, GET_MODE_FBIT (mode
),
5775 HOST_BITS_PER_DOUBLE_INT
,
5776 &FCONST1(mode
).data
.low
,
5777 &FCONST1(mode
).data
.high
,
5778 SIGNED_FIXED_POINT_MODE_P (mode
));
5779 const_tiny_rtx
[1][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5780 FCONST1 (mode
), mode
);
5783 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FRACT
);
5785 mode
= GET_MODE_WIDER_MODE (mode
))
5787 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5790 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UFRACT
);
5792 mode
= GET_MODE_WIDER_MODE (mode
))
5794 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5797 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_ACCUM
);
5799 mode
= GET_MODE_WIDER_MODE (mode
))
5801 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5802 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5805 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UACCUM
);
5807 mode
= GET_MODE_WIDER_MODE (mode
))
5809 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5810 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5813 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
5814 if (GET_MODE_CLASS ((enum machine_mode
) i
) == MODE_CC
)
5815 const_tiny_rtx
[0][i
] = const0_rtx
;
5817 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
5818 if (STORE_FLAG_VALUE
== 1)
5819 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
5821 pc_rtx
= gen_rtx_fmt_ (PC
, VOIDmode
);
5822 ret_rtx
= gen_rtx_fmt_ (RETURN
, VOIDmode
);
5823 simple_return_rtx
= gen_rtx_fmt_ (SIMPLE_RETURN
, VOIDmode
);
5824 cc0_rtx
= gen_rtx_fmt_ (CC0
, VOIDmode
);
5827 /* Produce exact duplicate of insn INSN after AFTER.
5828 Care updating of libcall regions if present. */
5831 emit_copy_of_insn_after (rtx insn
, rtx after
)
5835 switch (GET_CODE (insn
))
5838 new_rtx
= emit_insn_after (copy_insn (PATTERN (insn
)), after
);
5842 new_rtx
= emit_jump_insn_after (copy_insn (PATTERN (insn
)), after
);
5846 new_rtx
= emit_debug_insn_after (copy_insn (PATTERN (insn
)), after
);
5850 new_rtx
= emit_call_insn_after (copy_insn (PATTERN (insn
)), after
);
5851 if (CALL_INSN_FUNCTION_USAGE (insn
))
5852 CALL_INSN_FUNCTION_USAGE (new_rtx
)
5853 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn
));
5854 SIBLING_CALL_P (new_rtx
) = SIBLING_CALL_P (insn
);
5855 RTL_CONST_CALL_P (new_rtx
) = RTL_CONST_CALL_P (insn
);
5856 RTL_PURE_CALL_P (new_rtx
) = RTL_PURE_CALL_P (insn
);
5857 RTL_LOOPING_CONST_OR_PURE_CALL_P (new_rtx
)
5858 = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn
);
5865 /* Update LABEL_NUSES. */
5866 mark_jump_label (PATTERN (new_rtx
), new_rtx
, 0);
5868 INSN_LOCATOR (new_rtx
) = INSN_LOCATOR (insn
);
5870 /* If the old insn is frame related, then so is the new one. This is
5871 primarily needed for IA-64 unwind info which marks epilogue insns,
5872 which may be duplicated by the basic block reordering code. */
5873 RTX_FRAME_RELATED_P (new_rtx
) = RTX_FRAME_RELATED_P (insn
);
5875 /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
5876 will make them. REG_LABEL_TARGETs are created there too, but are
5877 supposed to be sticky, so we copy them. */
5878 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5879 if (REG_NOTE_KIND (link
) != REG_LABEL_OPERAND
)
5881 if (GET_CODE (link
) == EXPR_LIST
)
5882 add_reg_note (new_rtx
, REG_NOTE_KIND (link
),
5883 copy_insn_1 (XEXP (link
, 0)));
5885 add_reg_note (new_rtx
, REG_NOTE_KIND (link
), XEXP (link
, 0));
5888 INSN_CODE (new_rtx
) = INSN_CODE (insn
);
5892 static GTY((deletable
)) rtx hard_reg_clobbers
[NUM_MACHINE_MODES
][FIRST_PSEUDO_REGISTER
];
5894 gen_hard_reg_clobber (enum machine_mode mode
, unsigned int regno
)
5896 if (hard_reg_clobbers
[mode
][regno
])
5897 return hard_reg_clobbers
[mode
][regno
];
5899 return (hard_reg_clobbers
[mode
][regno
] =
5900 gen_rtx_CLOBBER (VOIDmode
, gen_rtx_REG (mode
, regno
)));
5903 /* Data structures representing mapping of INSN_LOCATOR into scope blocks, line
5904 numbers and files. In order to be GGC friendly we need to use separate
5905 varrays. This also slightly improve the memory locality in binary search.
5906 The _locs array contains locators where the given property change. The
5907 block_locators_blocks contains the scope block that is used for all insn
5908 locator greater than corresponding block_locators_locs value and smaller
5909 than the following one. Similarly for the other properties. */
5910 static VEC(int,heap
) *block_locators_locs
;
5911 static GTY(()) VEC(tree
,gc
) *block_locators_blocks
;
5912 static VEC(int,heap
) *locations_locators_locs
;
5913 DEF_VEC_A(location_t
);
5914 DEF_VEC_ALLOC_A(location_t
,heap
);
5915 static VEC(location_t
,heap
) *locations_locators_vals
;
5916 int prologue_locator
;
5917 int epilogue_locator
;
5919 /* Hold current location information and last location information, so the
5920 datastructures are built lazily only when some instructions in given
5921 place are needed. */
5922 static location_t curr_location
, last_location
;
5923 static tree curr_block
, last_block
;
5924 static int curr_rtl_loc
= -1;
5926 /* Allocate insn locator datastructure. */
5928 insn_locators_alloc (void)
5930 prologue_locator
= epilogue_locator
= 0;
5932 block_locators_locs
= VEC_alloc (int, heap
, 32);
5933 block_locators_blocks
= VEC_alloc (tree
, gc
, 32);
5934 locations_locators_locs
= VEC_alloc (int, heap
, 32);
5935 locations_locators_vals
= VEC_alloc (location_t
, heap
, 32);
5937 curr_location
= UNKNOWN_LOCATION
;
5938 last_location
= UNKNOWN_LOCATION
;
5944 /* At the end of emit stage, clear current location. */
5946 insn_locators_finalize (void)
5948 if (curr_rtl_loc
>= 0)
5949 epilogue_locator
= curr_insn_locator ();
5953 /* Allocate insn locator datastructure. */
5955 insn_locators_free (void)
5957 prologue_locator
= epilogue_locator
= 0;
5959 VEC_free (int, heap
, block_locators_locs
);
5960 VEC_free (tree
,gc
, block_locators_blocks
);
5961 VEC_free (int, heap
, locations_locators_locs
);
5962 VEC_free (location_t
, heap
, locations_locators_vals
);
5965 /* Set current location. */
5967 set_curr_insn_source_location (location_t location
)
5969 /* IV opts calls into RTL expansion to compute costs of operations. At this
5970 time locators are not initialized. */
5971 if (curr_rtl_loc
== -1)
5973 curr_location
= location
;
5976 /* Get current location. */
5978 get_curr_insn_source_location (void)
5980 return curr_location
;
5983 /* Set current scope block. */
5985 set_curr_insn_block (tree b
)
5987 /* IV opts calls into RTL expansion to compute costs of operations. At this
5988 time locators are not initialized. */
5989 if (curr_rtl_loc
== -1)
5995 /* Get current scope block. */
5997 get_curr_insn_block (void)
6002 /* Return current insn locator. */
6004 curr_insn_locator (void)
6006 if (curr_rtl_loc
== -1 || curr_location
== UNKNOWN_LOCATION
)
6008 if (last_block
!= curr_block
)
6011 VEC_safe_push (int, heap
, block_locators_locs
, curr_rtl_loc
);
6012 VEC_safe_push (tree
, gc
, block_locators_blocks
, curr_block
);
6013 last_block
= curr_block
;
6015 if (last_location
!= curr_location
)
6018 VEC_safe_push (int, heap
, locations_locators_locs
, curr_rtl_loc
);
6019 VEC_safe_push (location_t
, heap
, locations_locators_vals
, &curr_location
);
6020 last_location
= curr_location
;
6022 return curr_rtl_loc
;
6026 /* Return lexical scope block locator belongs to. */
6028 locator_scope (int loc
)
6030 int max
= VEC_length (int, block_locators_locs
);
6033 /* When block_locators_locs was initialized, the pro- and epilogue
6034 insns didn't exist yet and can therefore not be found this way.
6035 But we know that they belong to the outer most block of the
6037 Without this test, the prologue would be put inside the block of
6038 the first valid instruction in the function and when that first
6039 insn is part of an inlined function then the low_pc of that
6040 inlined function is messed up. Likewise for the epilogue and
6041 the last valid instruction. */
6042 if (loc
== prologue_locator
|| loc
== epilogue_locator
)
6043 return DECL_INITIAL (cfun
->decl
);
6049 int pos
= (min
+ max
) / 2;
6050 int tmp
= VEC_index (int, block_locators_locs
, pos
);
6052 if (tmp
<= loc
&& min
!= pos
)
6054 else if (tmp
> loc
&& max
!= pos
)
6062 return VEC_index (tree
, block_locators_blocks
, min
);
6065 /* Return lexical scope block insn belongs to. */
6067 insn_scope (const_rtx insn
)
6069 return locator_scope (INSN_LOCATOR (insn
));
6072 /* Return line number of the statement specified by the locator. */
6074 locator_location (int loc
)
6076 int max
= VEC_length (int, locations_locators_locs
);
6081 int pos
= (min
+ max
) / 2;
6082 int tmp
= VEC_index (int, locations_locators_locs
, pos
);
6084 if (tmp
<= loc
&& min
!= pos
)
6086 else if (tmp
> loc
&& max
!= pos
)
6094 return VEC_index (location_t
, locations_locators_vals
, min
);
6097 /* Return source line of the statement that produced this insn. */
6099 locator_line (int loc
)
6101 expanded_location xloc
;
6105 xloc
= expand_location (locator_location (loc
));
6109 /* Return line number of the statement that produced this insn. */
6111 insn_line (const_rtx insn
)
6113 return locator_line (INSN_LOCATOR (insn
));
6116 /* Return source file of the statement specified by LOC. */
6118 locator_file (int loc
)
6120 expanded_location xloc
;
6124 xloc
= expand_location (locator_location (loc
));
6128 /* Return source file of the statement that produced this insn. */
6130 insn_file (const_rtx insn
)
6132 return locator_file (INSN_LOCATOR (insn
));
6135 /* Return true if LOC1 and LOC2 locators have the same location and scope. */
6137 locator_eq (int loc1
, int loc2
)
6141 if (locator_location (loc1
) != locator_location (loc2
))
6143 return locator_scope (loc1
) == locator_scope (loc2
);
6147 /* Return true if memory model MODEL requires a pre-operation (release-style)
6148 barrier or a post-operation (acquire-style) barrier. While not universal,
6149 this function matches behavior of several targets. */
6152 need_atomic_barrier_p (enum memmodel model
, bool pre
)
6156 case MEMMODEL_RELAXED
:
6157 case MEMMODEL_CONSUME
:
6159 case MEMMODEL_RELEASE
:
6161 case MEMMODEL_ACQUIRE
:
6163 case MEMMODEL_ACQ_REL
:
6164 case MEMMODEL_SEQ_CST
:
6171 #include "gt-emit-rtl.h"