1 /****************************************************************************
3 * GNAT COMPILER COMPONENTS *
5 * S I G T R A M P - T A R G E T *
7 * Asm Implementation Include File *
9 * Copyright (C) 2011-2015, Free Software Foundation, Inc. *
11 * GNAT is free software; you can redistribute it and/or modify it under *
12 * terms of the GNU General Public License as published by the Free Soft- *
13 * ware Foundation; either version 3, or (at your option) any later ver- *
14 * sion. GNAT is distributed in the hope that it will be useful, but WITH- *
15 * OUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY *
16 * or FITNESS FOR A PARTICULAR PURPOSE. *
18 * As a special exception under Section 7 of GPL version 3, you are granted *
19 * additional permissions described in the GCC Runtime Library Exception, *
20 * version 3.1, as published by the Free Software Foundation. *
22 * In particular, you can freely distribute your programs built with the *
23 * GNAT Pro compiler, including any required library run-time units, using *
24 * any licensing terms of your choosing. See the AdaCore Software License *
27 * GNAT was originally developed by the GNAT team at New York University. *
28 * Extensive contributions were provided by Ada Core Technologies Inc. *
30 ****************************************************************************/
32 /***************************************************************
33 * VxWorks target specific part of the __gnat_sigtramp service *
34 ***************************************************************/
36 /* Note: This target specific part is kept in a separate file to avoid
37 duplication of its code for the vxworks and vxworks-vxsim asm
38 implementation files. */
40 /* ---------------------------
41 -- And now the asm stubs --
42 ---------------------------
44 They all have a common structure with blocks of asm sequences queued one
45 after the others. Typically:
55 asm code to establish frame, setup the cfa reg value,
56 call the real signal handler, ...
61 /*--------------------------------
62 -- Misc constants and helpers --
63 -------------------------------- */
65 /* asm string construction helpers. */
67 #define STR(TEXT) #TEXT
68 /* stringify expanded TEXT, surrounding it with double quotes. */
71 /* stringify E, which will resolve as text but may contain macros
72 still to be expanded. */
74 /* asm (TEXT) outputs <tab>TEXT. These facilitate the output of
80 #define TCR(S) TAB(CR(S))
82 /* REGNO constants, dwarf column numbers for registers of interest. */
90 #define REGNO_GR(N) (N)
92 #define REGNO_PC 67 /* ARG_POINTER_REGNUM */
94 #define FUNCTION "@function"
96 #elif defined (__ARMEL__)
98 #define REGNO_G_REG_OFFSET(N) (N)
100 #define REGNO_PC_OFFSET 15 /* PC_REGNUM */
102 #define FUNCTION "%function"
106 /* These are the cfi colunm numbers */
116 #define REGNO_EFLAGS 9
117 #define REGNO_SET_PC 8 /* aka %eip */
119 #define FUNCTION "@function"
121 /* Mapping of CFI Column, Gcc Regno, Signal context offset for 32bit
137 There is no unique numbering for the x86 architecture. It's parameterized
138 by DWARF_FRAME_REGNUM, which is DBX_REGISTER_NUMBER except for Windows, and
139 the latter depends on the platform.
142 #elif defined (__x86_64__)
144 /* These are the cfi colunm numbers */
162 #define REGNO_RPC 16 /* aka %rip */
163 #define REGNO_EFLAGS 49
166 #define FUNCTION "@function"
170 #endif /* REGNO constants */
173 /*------------------------------
174 -- Stub construction blocks --
175 ------------------------------ */
179 Only non-volatile registers are suitable for a CFA base. These are the
180 only ones we can expect to be able retrieve from the unwinding context
181 while walking up the chain, saved by at least the bottom-most exception
182 propagation services. We set a non-volatile register to the value we
183 need in the stub body that follows. */
185 #if defined (__PPC__)
187 /* Use r15 for PPC. Note that r14 is inappropriate here, even though it
188 is non-volatile according to the ABI, because GCC uses it as an extra
189 SCRATCH on SPE targets. */
193 #elif defined (__ARMEL__)
195 /* Use r8 for ARM. Any of r4-r8 should work. */
203 #elif defined (__x86_64__)
210 #endif /* CFA setup block */
212 #define CFI_DEF_CFA \
213 CR(".cfi_def_cfa " S(CFA_REG) ", 0")
215 /* Register location blocks
216 ------------------------
217 Rules to find registers of interest from the CFA. This should comprise
218 all the non-volatile registers relevant to the interrupted context.
220 Note that we include r1 in this set, unlike the libgcc unwinding
221 fallbacks. This is useful for fallbacks to allow the use of r1 in CFI
222 expressions and the absence of rule for r1 gets compensated by using the
223 target CFA instead. We don't need the expression facility here and
224 setup a fake CFA to allow very simple offset expressions, so having a
225 rule for r1 is the proper thing to do. We for sure have observed
226 crashes in some cases without it. */
228 #if defined (__PPC__)
230 #define COMMON_CFI(REG) \
231 ".cfi_offset " S(REGNO_##REG) "," S(REG_SET_##REG)
233 #define CFI_COMMON_REGS \
234 CR("# CFI for common registers\n") \
235 TCR(COMMON_CFI(GR(0))) \
236 TCR(COMMON_CFI(GR(1))) \
237 TCR(COMMON_CFI(GR(2))) \
238 TCR(COMMON_CFI(GR(3))) \
239 TCR(COMMON_CFI(GR(4))) \
240 TCR(COMMON_CFI(GR(5))) \
241 TCR(COMMON_CFI(GR(6))) \
242 TCR(COMMON_CFI(GR(7))) \
243 TCR(COMMON_CFI(GR(8))) \
244 TCR(COMMON_CFI(GR(9))) \
245 TCR(COMMON_CFI(GR(10))) \
246 TCR(COMMON_CFI(GR(11))) \
247 TCR(COMMON_CFI(GR(12))) \
248 TCR(COMMON_CFI(GR(13))) \
249 TCR(COMMON_CFI(GR(14))) \
250 TCR(COMMON_CFI(GR(15))) \
251 TCR(COMMON_CFI(GR(16))) \
252 TCR(COMMON_CFI(GR(17))) \
253 TCR(COMMON_CFI(GR(18))) \
254 TCR(COMMON_CFI(GR(19))) \
255 TCR(COMMON_CFI(GR(20))) \
256 TCR(COMMON_CFI(GR(21))) \
257 TCR(COMMON_CFI(GR(22))) \
258 TCR(COMMON_CFI(GR(23))) \
259 TCR(COMMON_CFI(GR(24))) \
260 TCR(COMMON_CFI(GR(25))) \
261 TCR(COMMON_CFI(GR(26))) \
262 TCR(COMMON_CFI(GR(27))) \
263 TCR(COMMON_CFI(GR(28))) \
264 TCR(COMMON_CFI(GR(29))) \
265 TCR(COMMON_CFI(GR(30))) \
266 TCR(COMMON_CFI(GR(31))) \
267 TCR(COMMON_CFI(LR)) \
268 TCR(COMMON_CFI(CR)) \
269 TCR(COMMON_CFI(CTR)) \
270 TCR(COMMON_CFI(XER)) \
271 TCR(COMMON_CFI(PC)) \
272 TCR(".cfi_return_column " S(REGNO_PC))
274 /* Trampoline body block
275 --------------------- */
277 #if !defined (__PPC64__)
278 #define SIGTRAMP_BODY \
280 TCR("# Allocate frame and save the non-volatile") \
281 TCR("# registers we're going to modify") \
282 TCR("stwu %r1,-16(%r1)") \
284 TCR("stw %r0,20(%r1)") \
285 TCR("stw %r" S(CFA_REG) ",8(%r1)") \
287 TCR("# Setup CFA_REG = context, which we'll retrieve as our CFA value") \
288 TCR("mr %r" S(CFA_REG) ", %r7") \
290 TCR("# Call the real handler. The signo, siginfo and sigcontext") \
291 TCR("# arguments are the same as those we received in r3, r4 and r5") \
295 TCR("# Restore our callee-saved items, release our frame and return") \
296 TCR("lwz %r" S(CFA_REG) ",8(%r1)") \
297 TCR("lwz %r0,20(%r1)") \
300 TCR("addi %r1,%r1,16") \
303 #define SIGTRAMP_BODY \
306 TCR("addis 2,12,.TOC.-0@ha") \
307 TCR("addi 2,2,.TOC.-0@l") \
308 TCR(".localentry __gnat_sigtramp_common,.-__gnat_sigtramp_common") \
309 TCR("# Allocate frame and save the non-volatile") \
310 TCR("# registers we're going to modify") \
312 TCR("std %r0,16(%r1)") \
313 TCR("stdu %r1,-32(%r1)") \
314 TCR("std %r2,24(%r1)") \
315 TCR("std %r" S(CFA_REG) ",8(%r1)") \
317 TCR("# Setup CFA_REG = context, which we'll retrieve as our CFA value") \
318 TCR("mr %r" S(CFA_REG) ", %r7") \
320 TCR("# Call the real handler. The signo, siginfo and sigcontext") \
321 TCR("# arguments are the same as those we received in r3, r4 and r5") \
326 TCR("# Restore our callee-saved items, release our frame and return") \
327 TCR("ld %r" S(CFA_REG) ",8(%r1)") \
328 TCR("ld %r2,24(%r1)") \
329 TCR("addi %r1,%r1,32") \
330 TCR("ld %r0,16(%r1)") \
335 #elif defined (__ARMEL__)
337 #define COMMON_CFI(REG) \
338 ".cfi_offset " S(REGNO_##REG) "," S(REG_SET_##REG)
340 #define CFI_COMMON_REGS \
341 CR("# CFI for common registers\n") \
342 TCR(COMMON_CFI(G_REG_OFFSET(0))) \
343 TCR(COMMON_CFI(G_REG_OFFSET(1))) \
344 TCR(COMMON_CFI(G_REG_OFFSET(2))) \
345 TCR(COMMON_CFI(G_REG_OFFSET(3))) \
346 TCR(COMMON_CFI(G_REG_OFFSET(4))) \
347 TCR(COMMON_CFI(G_REG_OFFSET(5))) \
348 TCR(COMMON_CFI(G_REG_OFFSET(6))) \
349 TCR(COMMON_CFI(G_REG_OFFSET(7))) \
350 TCR(COMMON_CFI(G_REG_OFFSET(8))) \
351 TCR(COMMON_CFI(G_REG_OFFSET(9))) \
352 TCR(COMMON_CFI(G_REG_OFFSET(10))) \
353 TCR(COMMON_CFI(G_REG_OFFSET(11))) \
354 TCR(COMMON_CFI(G_REG_OFFSET(12))) \
355 TCR(COMMON_CFI(G_REG_OFFSET(13))) \
356 TCR(COMMON_CFI(G_REG_OFFSET(14))) \
357 TCR(COMMON_CFI(PC_OFFSET)) \
358 TCR(".cfi_return_column " S(REGNO_PC_OFFSET))
360 /* Trampoline body block
361 --------------------- */
363 #define SIGTRAMP_BODY \
365 TCR("# Allocate frame and save the non-volatile") \
366 TCR("# registers we're going to modify") \
368 TCR("stmfd sp!, {r"S(CFA_REG)", fp, ip, lr, pc}") \
369 TCR("# Setup CFA_REG = context, which we'll retrieve as our CFA value") \
370 TCR("ldr r"S(CFA_REG)", [ip]") \
372 TCR("# Call the real handler. The signo, siginfo and sigcontext") \
373 TCR("# arguments are the same as those we received in r0, r1 and r2") \
374 TCR("sub fp, ip, #4") \
376 TCR("# Restore our callee-saved items, release our frame and return") \
377 TCR("ldmfd sp, {r"S(CFA_REG)", fp, sp, pc}")
381 #if CPU == SIMNT || CPU == SIMPENTIUM || CPU == SIMLINUX
382 #define COMMON_CFI(REG) \
383 ".cfi_offset " S(REGNO_##REG) "," S(REG_SET_##REG)
385 #define COMMON_CFI(REG) \
386 ".cfi_offset " S(REGNO_##REG) "," S(REG_##REG)
389 #define PC_CFI(REG) \
390 ".cfi_offset " S(REGNO_##REG) "," S(REG_##REG)
392 #define CFI_COMMON_REGS \
393 CR("# CFI for common registers\n") \
394 TCR(COMMON_CFI(EDI)) \
395 TCR(COMMON_CFI(ESI)) \
396 TCR(COMMON_CFI(EBP)) \
397 TCR(COMMON_CFI(ESP)) \
398 TCR(COMMON_CFI(EBX)) \
399 TCR(COMMON_CFI(EDX)) \
400 TCR(COMMON_CFI(ECX)) \
401 TCR(COMMON_CFI(EAX)) \
402 TCR(COMMON_CFI(EFLAGS)) \
403 TCR(PC_CFI(SET_PC)) \
404 TCR(".cfi_return_column " S(REGNO_SET_PC))
406 /* Trampoline body block
407 --------------------- */
409 #define SIGTRAMP_BODY \
411 TCR("# Allocate frame and save the non-volatile") \
412 TCR("# registers we're going to modify") \
414 TCR("movl %esp, %ebp") \
416 TCR("subl $24, %esp") \
417 TCR("# Setup CFA_REG = context, which we'll retrieve as our CFA value") \
418 TCR("movl 24(%ebp), %edi") \
419 TCR("# Call the real handler. The signo, siginfo and sigcontext") \
420 TCR("# arguments are the same as those we received") \
421 TCR("movl 16(%ebp), %eax") \
422 TCR("movl %eax, 8(%esp)") \
423 TCR("movl 12(%ebp), %eax") \
424 TCR("movl %eax, 4(%esp)") \
425 TCR("movl 8(%ebp), %eax") \
426 TCR("movl %eax, (%esp)") \
427 TCR("call *20(%ebp)") \
428 TCR("# Restore our callee-saved items, release our frame and return") \
433 #elif defined (__x86_64__)
435 #define COMMON_CFI(REG) \
436 ".cfi_offset " S(REGNO_##REG) "," S(REG_##REG)
438 #define CFI_COMMON_REGS \
439 CR("# CFI for common registers\n") \
440 TCR(COMMON_CFI(R15)) \
441 TCR(COMMON_CFI(R14)) \
442 TCR(COMMON_CFI(R13)) \
443 TCR(COMMON_CFI(R12)) \
444 TCR(COMMON_CFI(R11)) \
445 TCR(COMMON_CFI(R10)) \
446 TCR(COMMON_CFI(R9)) \
447 TCR(COMMON_CFI(R8)) \
448 TCR(COMMON_CFI(RDI)) \
449 TCR(COMMON_CFI(RSI)) \
450 TCR(COMMON_CFI(RBP)) \
451 TCR(COMMON_CFI(RSP)) \
452 TCR(COMMON_CFI(RBX)) \
453 TCR(COMMON_CFI(RDX)) \
454 TCR(COMMON_CFI(RCX)) \
455 TCR(COMMON_CFI(RAX)) \
456 TCR(COMMON_CFI(RPC)) \
457 TCR(".cfi_return_column " S(REGNO_RPC))
459 /* Trampoline body block
460 --------------------- */
462 #define SIGTRAMP_BODY \
464 TCR("# Allocate frame and save the non-volatile") \
465 TCR("# registers we're going to modify") \
466 TCR("subq $8, %rsp") \
467 TCR("# Setup CFA_REG = context, which we'll retrieve as our CFA value") \
468 TCR("movq %r8, %r15") \
469 TCR("# Call the real handler. The signo, siginfo and sigcontext") \
470 TCR("# arguments are the same as those we received") \
472 TCR("# This part should never be executed") \
473 TCR("addq $8, %rsp") \
478 #endif /* CFI_COMMON_REGS and SIGTRAMP_BODY */
480 /* Symbol definition block
481 ----------------------- */
484 #define FUNC_ALIGN TCR(".p2align 4,,15")
489 #define SIGTRAMP_START(SYM) \
490 CR("# " S(SYM) " cfi trampoline") \
491 TCR(".type " S(SYM) ", "FUNCTION) \
495 TCR(".cfi_startproc") \
496 TCR(".cfi_signal_frame")
498 /* Symbol termination block
499 ------------------------ */
501 #define SIGTRAMP_END(SYM) \
503 TCR(".size " S(SYM) ", .-" S(SYM))
505 /*----------------------------
506 -- And now, the real code --
507 ---------------------------- */
509 /* Text section start. The compiler isn't aware of that switch. */