1 /* { dg-do assemble { target aarch64_asm_sve_ok } } */
2 /* { dg-options "-O3 -msve-vector-bits=256 --save-temps" } */
4 typedef _Float16 vnx8hf
__attribute__((vector_size(32)));
5 typedef float vnx4sf
__attribute__((vector_size(32)));
6 typedef double vnx2df
__attribute__((vector_size(32)));
9 void vdiv_##TYPE (TYPE *x, TYPE y) \
11 register TYPE dst asm("z0"); \
12 register TYPE src asm("z2"); \
15 asm volatile ("" :: "w" (dst), "w" (src)); \
17 asm volatile ("" :: "w" (dst)); \
20 void vdivr_##TYPE (TYPE *x, TYPE y) \
22 register TYPE dst asm("z0"); \
23 register TYPE src asm("z2"); \
26 asm volatile ("" :: "w" (dst), "w" (src)); \
28 asm volatile ("" :: "w" (dst)); \
36 /* { dg-final { scan-assembler-times {\tfdiv\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 1 } } */
37 /* { dg-final { scan-assembler-times {\tfdivr\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 1 } } */
39 /* { dg-final { scan-assembler-times {\tfdiv\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 1 } } */
40 /* { dg-final { scan-assembler-times {\tfdivr\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 1 } } */
42 /* { dg-final { scan-assembler-times {\tfdiv\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.d, z[0-9]+\.d\n} 1 } } */
43 /* { dg-final { scan-assembler-times {\tfdivr\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.d, z[0-9]+\.d\n} 1 } } */