riscv: thead: Add support for the XTheadMemIdx ISA extension
[official-gcc.git] / gcc / testsuite / gcc.target / riscv / xtheadmemidx-helpers.h
bloba97f08c5cc1bec3f4dc08f3fad04f9aed3007390
1 #ifndef XTHEADMEMIDX_HELPERS_H
2 #define XTHEADMEMIDX_HELPERS_H
4 #include <stdint.h>
6 #define intX_t long
7 #define uintX_t unsigned long
9 #define PRE_DEC_LOAD(T, N) \
10 void \
11 T ## _pre_dec_load_ ## N (T *p) \
12 { \
13 extern void f ## T ## N (T*, uintX_t); \
14 p = p - N; \
15 T x = *p; \
16 f ## T ## N (p, x); \
19 #define PRE_INC_LOAD(T, N) \
20 void \
21 T ## _pre_inc_load_ ## N (T *p) \
22 { \
23 extern void f ## T ## N (T*, uintX_t); \
24 p = p + N; \
25 T x = *p; \
26 f ## T ## N (p, x); \
29 #define POST_DEC_LOAD(T, N) \
30 void \
31 T ## _post_dec_load_ ## N (T *p) \
32 { \
33 extern void f ## T ## N (T*, uintX_t); \
34 T x = *p; \
35 p = p - N; \
36 f ## T ## N (p, x); \
39 #define POST_INC_LOAD(T,N) \
40 void \
41 T ## _post_inc_load_ ## N (T *p) \
42 { \
43 extern void f ## T ## N (T*,uintX_t); \
44 T x = *p; \
45 p = p + N; \
46 f ## T ## N (p, x); \
49 #define PRE_DEC_STORE(T, N) \
50 T * \
51 T ## _pre_dec_store_ ## N (T *p, T v) \
52 { \
53 p = p - N; \
54 *p = v; \
55 return p; \
58 #define PRE_INC_STORE(T, N) \
59 T * \
60 T ## _pre_inc_store_ ## N (T *p, T v) \
61 { \
62 p = p + N; \
63 *p = v; \
64 return p; \
67 #define POST_DEC_STORE(T, N) \
68 T * \
69 T ## _post_dec_store_ ## N (T *p, T v) \
70 { \
71 *p = v; \
72 p = p - N; \
73 return p; \
76 #define POST_INC_STORE(T, N) \
77 T * \
78 T ## _post_inc_store_ ## N (T *p, T v) \
79 { \
80 *p = v; \
81 p = p + N; \
82 return p; \
85 #define LR_REG_IMM(T, IMM) \
86 intX_t \
87 lr_reg_imm_ ## T ## _ ## IMM (intX_t rs1, intX_t rs2) \
88 { \
89 return *(T*)(rs1 + (rs2 << IMM)); \
92 #define SR_REG_IMM(T, IMM) \
93 void \
94 sr_reg_imm_ ## T ## _ ## IMM (intX_t rs1, intX_t rs2, T val) \
95 { \
96 *(T*)(rs1 + (rs2 << IMM)) = val; \
99 #define LR_REG_IMM_UPD(T, IMM) \
100 intX_t \
101 lr_reg_imm_upd_ ## T ## _ ## IMM (intX_t *rs1, intX_t rs2) \
103 *rs1 = *rs1 + (rs2 << IMM); \
104 return *(T*)(*rs1); \
107 #define SR_REG_IMM_UPD(T, IMM) \
108 void \
109 sr_reg_imm_upd_ ## T ## _ ## IMM (intX_t *rs1, intX_t rs2, T val) \
111 *rs1 = *rs1 + (rs2 << IMM); \
112 *(T*)(*rs1) = val; \
115 #define LRU_REG_IMM(T, IMM) \
116 intX_t \
117 lru_reg_imm_ ## T ## IMM (intX_t rs1, intX_t rs2) \
119 rs2 = (uint32_t)rs2; \
120 return *(T*)(rs1 + (rs2 << IMM)); \
123 #define SRU_REG_IMM(T, IMM) \
124 void \
125 sr_reg_imm_ ## T ## _ ## IMM (intX_t rs1, intX_t rs2, T val) \
127 rs2 = (uint32_t)rs2; \
128 *(T*)(rs1 + (rs2 << IMM)) = val; \
131 #define LRU_REG_IMM_UPD(T, IMM) \
132 intX_t \
133 lru_reg_imm_upd_ ## T ## IMM (intX_t rs1, intX_t *rs2) \
135 uintX_t rs2_32 = (uint32_t)*rs2; \
136 intX_t t = rs1 + (rs2_32 << IMM); \
137 intX_t v = *(T*)t; \
138 *rs2 = t; \
139 return v; \
142 #define SRU_REG_IMM_UPD(T, IMM) \
143 void \
144 sr_reg_imm_upd_ ## T ## _ ## IMM (intX_t rs1, intX_t *rs2, T val) \
146 uintX_t rs2_32 = (uint32_t)*rs2; \
147 intX_t t = rs1 + (rs2_32 << IMM); \
148 *(T*)t = val; \
149 *rs2 = t; \
152 #endif /* XTHEADMEMIDX_HELPERS_H */