1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988-2021 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
38 #include "diagnostic.h"
40 #include "fold-const.h"
41 #include "stor-layout.h"
45 #include "insn-attr.h"
50 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
52 #include "optabs-tree.h"
55 #include "langhooks.h"
56 #include "common/common-target.h"
58 #include "tree-ssa-live.h"
59 #include "tree-outof-ssa.h"
60 #include "tree-ssa-address.h"
63 #include "gimple-fold.h"
64 #include "rtx-vector-builder.h"
65 #include "tree-pretty-print.h"
69 /* If this is nonzero, we do not bother generating VOLATILE
70 around volatile memory references, and we are willing to
71 output indirect addresses. If cse is to follow, we reject
72 indirect addresses so a useful potential cse is generated;
73 if it is used only once, instruction combination will produce
74 the same indirect address eventually. */
77 static bool block_move_libcall_safe_for_call_parm (void);
78 static bool emit_block_move_via_pattern (rtx
, rtx
, rtx
, unsigned, unsigned,
79 HOST_WIDE_INT
, unsigned HOST_WIDE_INT
,
80 unsigned HOST_WIDE_INT
,
81 unsigned HOST_WIDE_INT
, bool);
82 static void emit_block_move_via_loop (rtx
, rtx
, rtx
, unsigned);
83 static void clear_by_pieces (rtx
, unsigned HOST_WIDE_INT
, unsigned int);
84 static rtx_insn
*compress_float_constant (rtx
, rtx
);
85 static rtx
get_subtarget (rtx
);
86 static void store_constructor (tree
, rtx
, int, poly_int64
, bool);
87 static rtx
store_field (rtx
, poly_int64
, poly_int64
, poly_uint64
, poly_uint64
,
88 machine_mode
, tree
, alias_set_type
, bool, bool);
90 static unsigned HOST_WIDE_INT
highest_pow2_factor_for_target (const_tree
, const_tree
);
92 static int is_aligning_offset (const_tree
, const_tree
);
93 static rtx
reduce_to_bit_field_precision (rtx
, rtx
, tree
);
94 static rtx
do_store_flag (sepops
, rtx
, machine_mode
);
96 static void emit_single_push_insn (machine_mode
, rtx
, tree
);
98 static void do_tablejump (rtx
, machine_mode
, rtx
, rtx
, rtx
,
100 static rtx
const_vector_from_tree (tree
);
101 static tree
tree_expr_size (const_tree
);
102 static HOST_WIDE_INT
int_expr_size (tree
);
103 static void convert_mode_scalar (rtx
, rtx
, int);
106 /* This is run to set up which modes can be used
107 directly in memory and to initialize the block move optab. It is run
108 at the beginning of compilation and when the target is reinitialized. */
111 init_expr_target (void)
118 /* Try indexing by frame ptr and try by stack ptr.
119 It is known that on the Convex the stack ptr isn't a valid index.
120 With luck, one or the other is valid on any machine. */
121 mem
= gen_rtx_MEM (word_mode
, stack_pointer_rtx
);
122 mem1
= gen_rtx_MEM (word_mode
, frame_pointer_rtx
);
124 /* A scratch register we can modify in-place below to avoid
125 useless RTL allocations. */
126 reg
= gen_rtx_REG (word_mode
, LAST_VIRTUAL_REGISTER
+ 1);
128 rtx_insn
*insn
= as_a
<rtx_insn
*> (rtx_alloc (INSN
));
129 pat
= gen_rtx_SET (NULL_RTX
, NULL_RTX
);
130 PATTERN (insn
) = pat
;
132 for (machine_mode mode
= VOIDmode
; (int) mode
< NUM_MACHINE_MODES
;
133 mode
= (machine_mode
) ((int) mode
+ 1))
137 direct_load
[(int) mode
] = direct_store
[(int) mode
] = 0;
138 PUT_MODE (mem
, mode
);
139 PUT_MODE (mem1
, mode
);
141 /* See if there is some register that can be used in this mode and
142 directly loaded or stored from memory. */
144 if (mode
!= VOIDmode
&& mode
!= BLKmode
)
145 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
146 && (direct_load
[(int) mode
] == 0 || direct_store
[(int) mode
] == 0);
149 if (!targetm
.hard_regno_mode_ok (regno
, mode
))
152 set_mode_and_regno (reg
, mode
, regno
);
155 SET_DEST (pat
) = reg
;
156 if (recog (pat
, insn
, &num_clobbers
) >= 0)
157 direct_load
[(int) mode
] = 1;
159 SET_SRC (pat
) = mem1
;
160 SET_DEST (pat
) = reg
;
161 if (recog (pat
, insn
, &num_clobbers
) >= 0)
162 direct_load
[(int) mode
] = 1;
165 SET_DEST (pat
) = mem
;
166 if (recog (pat
, insn
, &num_clobbers
) >= 0)
167 direct_store
[(int) mode
] = 1;
170 SET_DEST (pat
) = mem1
;
171 if (recog (pat
, insn
, &num_clobbers
) >= 0)
172 direct_store
[(int) mode
] = 1;
176 mem
= gen_rtx_MEM (VOIDmode
, gen_raw_REG (Pmode
, LAST_VIRTUAL_REGISTER
+ 1));
178 opt_scalar_float_mode mode_iter
;
179 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_FLOAT
)
181 scalar_float_mode mode
= mode_iter
.require ();
182 scalar_float_mode srcmode
;
183 FOR_EACH_MODE_UNTIL (srcmode
, mode
)
187 ic
= can_extend_p (mode
, srcmode
, 0);
188 if (ic
== CODE_FOR_nothing
)
191 PUT_MODE (mem
, srcmode
);
193 if (insn_operand_matches (ic
, 1, mem
))
194 float_extend_from_mem
[mode
][srcmode
] = true;
199 /* This is run at the start of compiling a function. */
204 memset (&crtl
->expr
, 0, sizeof (crtl
->expr
));
207 /* Copy data from FROM to TO, where the machine modes are not the same.
208 Both modes may be integer, or both may be floating, or both may be
210 UNSIGNEDP should be nonzero if FROM is an unsigned type.
211 This causes zero-extension instead of sign-extension. */
214 convert_move (rtx to
, rtx from
, int unsignedp
)
216 machine_mode to_mode
= GET_MODE (to
);
217 machine_mode from_mode
= GET_MODE (from
);
219 gcc_assert (to_mode
!= BLKmode
);
220 gcc_assert (from_mode
!= BLKmode
);
222 /* If the source and destination are already the same, then there's
227 /* If FROM is a SUBREG that indicates that we have already done at least
228 the required extension, strip it. We don't handle such SUBREGs as
231 scalar_int_mode to_int_mode
;
232 if (GET_CODE (from
) == SUBREG
233 && SUBREG_PROMOTED_VAR_P (from
)
234 && is_a
<scalar_int_mode
> (to_mode
, &to_int_mode
)
235 && (GET_MODE_PRECISION (subreg_promoted_mode (from
))
236 >= GET_MODE_PRECISION (to_int_mode
))
237 && SUBREG_CHECK_PROMOTED_SIGN (from
, unsignedp
))
239 from
= gen_lowpart (to_int_mode
, SUBREG_REG (from
));
240 from_mode
= to_int_mode
;
243 gcc_assert (GET_CODE (to
) != SUBREG
|| !SUBREG_PROMOTED_VAR_P (to
));
245 if (to_mode
== from_mode
246 || (from_mode
== VOIDmode
&& CONSTANT_P (from
)))
248 emit_move_insn (to
, from
);
252 if (VECTOR_MODE_P (to_mode
) || VECTOR_MODE_P (from_mode
))
254 if (GET_MODE_UNIT_PRECISION (to_mode
)
255 > GET_MODE_UNIT_PRECISION (from_mode
))
257 optab op
= unsignedp
? zext_optab
: sext_optab
;
258 insn_code icode
= convert_optab_handler (op
, to_mode
, from_mode
);
259 if (icode
!= CODE_FOR_nothing
)
261 emit_unop_insn (icode
, to
, from
,
262 unsignedp
? ZERO_EXTEND
: SIGN_EXTEND
);
267 if (GET_MODE_UNIT_PRECISION (to_mode
)
268 < GET_MODE_UNIT_PRECISION (from_mode
))
270 insn_code icode
= convert_optab_handler (trunc_optab
,
272 if (icode
!= CODE_FOR_nothing
)
274 emit_unop_insn (icode
, to
, from
, TRUNCATE
);
279 gcc_assert (known_eq (GET_MODE_BITSIZE (from_mode
),
280 GET_MODE_BITSIZE (to_mode
)));
282 if (VECTOR_MODE_P (to_mode
))
283 from
= simplify_gen_subreg (to_mode
, from
, GET_MODE (from
), 0);
285 to
= simplify_gen_subreg (from_mode
, to
, GET_MODE (to
), 0);
287 emit_move_insn (to
, from
);
291 if (GET_CODE (to
) == CONCAT
&& GET_CODE (from
) == CONCAT
)
293 convert_move (XEXP (to
, 0), XEXP (from
, 0), unsignedp
);
294 convert_move (XEXP (to
, 1), XEXP (from
, 1), unsignedp
);
298 convert_mode_scalar (to
, from
, unsignedp
);
301 /* Like convert_move, but deals only with scalar modes. */
304 convert_mode_scalar (rtx to
, rtx from
, int unsignedp
)
306 /* Both modes should be scalar types. */
307 scalar_mode from_mode
= as_a
<scalar_mode
> (GET_MODE (from
));
308 scalar_mode to_mode
= as_a
<scalar_mode
> (GET_MODE (to
));
309 bool to_real
= SCALAR_FLOAT_MODE_P (to_mode
);
310 bool from_real
= SCALAR_FLOAT_MODE_P (from_mode
);
314 gcc_assert (to_real
== from_real
);
316 /* rtx code for making an equivalent value. */
317 enum rtx_code equiv_code
= (unsignedp
< 0 ? UNKNOWN
318 : (unsignedp
? ZERO_EXTEND
: SIGN_EXTEND
));
326 gcc_assert ((GET_MODE_PRECISION (from_mode
)
327 != GET_MODE_PRECISION (to_mode
))
328 || (DECIMAL_FLOAT_MODE_P (from_mode
)
329 != DECIMAL_FLOAT_MODE_P (to_mode
)));
331 if (GET_MODE_PRECISION (from_mode
) == GET_MODE_PRECISION (to_mode
))
332 /* Conversion between decimal float and binary float, same size. */
333 tab
= DECIMAL_FLOAT_MODE_P (from_mode
) ? trunc_optab
: sext_optab
;
334 else if (GET_MODE_PRECISION (from_mode
) < GET_MODE_PRECISION (to_mode
))
339 /* Try converting directly if the insn is supported. */
341 code
= convert_optab_handler (tab
, to_mode
, from_mode
);
342 if (code
!= CODE_FOR_nothing
)
344 emit_unop_insn (code
, to
, from
,
345 tab
== sext_optab
? FLOAT_EXTEND
: FLOAT_TRUNCATE
);
349 /* Otherwise use a libcall. */
350 libcall
= convert_optab_libfunc (tab
, to_mode
, from_mode
);
352 /* Is this conversion implemented yet? */
353 gcc_assert (libcall
);
356 value
= emit_library_call_value (libcall
, NULL_RTX
, LCT_CONST
, to_mode
,
358 insns
= get_insns ();
360 emit_libcall_block (insns
, to
, value
,
361 tab
== trunc_optab
? gen_rtx_FLOAT_TRUNCATE (to_mode
,
363 : gen_rtx_FLOAT_EXTEND (to_mode
, from
));
367 /* Handle pointer conversion. */ /* SPEE 900220. */
368 /* If the target has a converter from FROM_MODE to TO_MODE, use it. */
372 if (GET_MODE_PRECISION (from_mode
) > GET_MODE_PRECISION (to_mode
))
379 if (convert_optab_handler (ctab
, to_mode
, from_mode
)
382 emit_unop_insn (convert_optab_handler (ctab
, to_mode
, from_mode
),
388 /* Targets are expected to provide conversion insns between PxImode and
389 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
390 if (GET_MODE_CLASS (to_mode
) == MODE_PARTIAL_INT
)
392 scalar_int_mode full_mode
393 = smallest_int_mode_for_size (GET_MODE_BITSIZE (to_mode
));
395 gcc_assert (convert_optab_handler (trunc_optab
, to_mode
, full_mode
)
396 != CODE_FOR_nothing
);
398 if (full_mode
!= from_mode
)
399 from
= convert_to_mode (full_mode
, from
, unsignedp
);
400 emit_unop_insn (convert_optab_handler (trunc_optab
, to_mode
, full_mode
),
404 if (GET_MODE_CLASS (from_mode
) == MODE_PARTIAL_INT
)
407 scalar_int_mode full_mode
408 = smallest_int_mode_for_size (GET_MODE_BITSIZE (from_mode
));
409 convert_optab ctab
= unsignedp
? zext_optab
: sext_optab
;
410 enum insn_code icode
;
412 icode
= convert_optab_handler (ctab
, full_mode
, from_mode
);
413 gcc_assert (icode
!= CODE_FOR_nothing
);
415 if (to_mode
== full_mode
)
417 emit_unop_insn (icode
, to
, from
, UNKNOWN
);
421 new_from
= gen_reg_rtx (full_mode
);
422 emit_unop_insn (icode
, new_from
, from
, UNKNOWN
);
424 /* else proceed to integer conversions below. */
425 from_mode
= full_mode
;
429 /* Make sure both are fixed-point modes or both are not. */
430 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode
) ==
431 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode
));
432 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode
))
434 /* If we widen from_mode to to_mode and they are in the same class,
435 we won't saturate the result.
436 Otherwise, always saturate the result to play safe. */
437 if (GET_MODE_CLASS (from_mode
) == GET_MODE_CLASS (to_mode
)
438 && GET_MODE_SIZE (from_mode
) < GET_MODE_SIZE (to_mode
))
439 expand_fixed_convert (to
, from
, 0, 0);
441 expand_fixed_convert (to
, from
, 0, 1);
445 /* Now both modes are integers. */
447 /* Handle expanding beyond a word. */
448 if (GET_MODE_PRECISION (from_mode
) < GET_MODE_PRECISION (to_mode
)
449 && GET_MODE_PRECISION (to_mode
) > BITS_PER_WORD
)
456 scalar_mode lowpart_mode
;
457 int nwords
= CEIL (GET_MODE_SIZE (to_mode
), UNITS_PER_WORD
);
459 /* Try converting directly if the insn is supported. */
460 if ((code
= can_extend_p (to_mode
, from_mode
, unsignedp
))
463 /* If FROM is a SUBREG, put it into a register. Do this
464 so that we always generate the same set of insns for
465 better cse'ing; if an intermediate assignment occurred,
466 we won't be doing the operation directly on the SUBREG. */
467 if (optimize
> 0 && GET_CODE (from
) == SUBREG
)
468 from
= force_reg (from_mode
, from
);
469 emit_unop_insn (code
, to
, from
, equiv_code
);
472 /* Next, try converting via full word. */
473 else if (GET_MODE_PRECISION (from_mode
) < BITS_PER_WORD
474 && ((code
= can_extend_p (to_mode
, word_mode
, unsignedp
))
475 != CODE_FOR_nothing
))
477 rtx word_to
= gen_reg_rtx (word_mode
);
480 if (reg_overlap_mentioned_p (to
, from
))
481 from
= force_reg (from_mode
, from
);
484 convert_move (word_to
, from
, unsignedp
);
485 emit_unop_insn (code
, to
, word_to
, equiv_code
);
489 /* No special multiword conversion insn; do it by hand. */
492 /* Since we will turn this into a no conflict block, we must ensure
493 the source does not overlap the target so force it into an isolated
494 register when maybe so. Likewise for any MEM input, since the
495 conversion sequence might require several references to it and we
496 must ensure we're getting the same value every time. */
498 if (MEM_P (from
) || reg_overlap_mentioned_p (to
, from
))
499 from
= force_reg (from_mode
, from
);
501 /* Get a copy of FROM widened to a word, if necessary. */
502 if (GET_MODE_PRECISION (from_mode
) < BITS_PER_WORD
)
503 lowpart_mode
= word_mode
;
505 lowpart_mode
= from_mode
;
507 lowfrom
= convert_to_mode (lowpart_mode
, from
, unsignedp
);
509 lowpart
= gen_lowpart (lowpart_mode
, to
);
510 emit_move_insn (lowpart
, lowfrom
);
512 /* Compute the value to put in each remaining word. */
514 fill_value
= const0_rtx
;
516 fill_value
= emit_store_flag_force (gen_reg_rtx (word_mode
),
517 LT
, lowfrom
, const0_rtx
,
518 lowpart_mode
, 0, -1);
520 /* Fill the remaining words. */
521 for (i
= GET_MODE_SIZE (lowpart_mode
) / UNITS_PER_WORD
; i
< nwords
; i
++)
523 int index
= (WORDS_BIG_ENDIAN
? nwords
- i
- 1 : i
);
524 rtx subword
= operand_subword (to
, index
, 1, to_mode
);
526 gcc_assert (subword
);
528 if (fill_value
!= subword
)
529 emit_move_insn (subword
, fill_value
);
532 insns
= get_insns ();
539 /* Truncating multi-word to a word or less. */
540 if (GET_MODE_PRECISION (from_mode
) > BITS_PER_WORD
541 && GET_MODE_PRECISION (to_mode
) <= BITS_PER_WORD
)
544 && ! MEM_VOLATILE_P (from
)
545 && direct_load
[(int) to_mode
]
546 && ! mode_dependent_address_p (XEXP (from
, 0),
547 MEM_ADDR_SPACE (from
)))
549 || GET_CODE (from
) == SUBREG
))
550 from
= force_reg (from_mode
, from
);
551 convert_move (to
, gen_lowpart (word_mode
, from
), 0);
555 /* Now follow all the conversions between integers
556 no more than a word long. */
558 /* For truncation, usually we can just refer to FROM in a narrower mode. */
559 if (GET_MODE_BITSIZE (to_mode
) < GET_MODE_BITSIZE (from_mode
)
560 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode
, from_mode
))
563 && ! MEM_VOLATILE_P (from
)
564 && direct_load
[(int) to_mode
]
565 && ! mode_dependent_address_p (XEXP (from
, 0),
566 MEM_ADDR_SPACE (from
)))
568 || GET_CODE (from
) == SUBREG
))
569 from
= force_reg (from_mode
, from
);
570 if (REG_P (from
) && REGNO (from
) < FIRST_PSEUDO_REGISTER
571 && !targetm
.hard_regno_mode_ok (REGNO (from
), to_mode
))
572 from
= copy_to_reg (from
);
573 emit_move_insn (to
, gen_lowpart (to_mode
, from
));
577 /* Handle extension. */
578 if (GET_MODE_PRECISION (to_mode
) > GET_MODE_PRECISION (from_mode
))
580 /* Convert directly if that works. */
581 if ((code
= can_extend_p (to_mode
, from_mode
, unsignedp
))
584 emit_unop_insn (code
, to
, from
, equiv_code
);
592 /* Search for a mode to convert via. */
593 opt_scalar_mode intermediate_iter
;
594 FOR_EACH_MODE_FROM (intermediate_iter
, from_mode
)
596 scalar_mode intermediate
= intermediate_iter
.require ();
597 if (((can_extend_p (to_mode
, intermediate
, unsignedp
)
599 || (GET_MODE_SIZE (to_mode
) < GET_MODE_SIZE (intermediate
)
600 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode
,
602 && (can_extend_p (intermediate
, from_mode
, unsignedp
)
603 != CODE_FOR_nothing
))
605 convert_move (to
, convert_to_mode (intermediate
, from
,
606 unsignedp
), unsignedp
);
611 /* No suitable intermediate mode.
612 Generate what we need with shifts. */
613 shift_amount
= (GET_MODE_PRECISION (to_mode
)
614 - GET_MODE_PRECISION (from_mode
));
615 from
= gen_lowpart (to_mode
, force_reg (from_mode
, from
));
616 tmp
= expand_shift (LSHIFT_EXPR
, to_mode
, from
, shift_amount
,
618 tmp
= expand_shift (RSHIFT_EXPR
, to_mode
, tmp
, shift_amount
,
621 emit_move_insn (to
, tmp
);
626 /* Support special truncate insns for certain modes. */
627 if (convert_optab_handler (trunc_optab
, to_mode
,
628 from_mode
) != CODE_FOR_nothing
)
630 emit_unop_insn (convert_optab_handler (trunc_optab
, to_mode
, from_mode
),
635 /* Handle truncation of volatile memrefs, and so on;
636 the things that couldn't be truncated directly,
637 and for which there was no special instruction.
639 ??? Code above formerly short-circuited this, for most integer
640 mode pairs, with a force_reg in from_mode followed by a recursive
641 call to this routine. Appears always to have been wrong. */
642 if (GET_MODE_PRECISION (to_mode
) < GET_MODE_PRECISION (from_mode
))
644 rtx temp
= force_reg (to_mode
, gen_lowpart (to_mode
, from
));
645 emit_move_insn (to
, temp
);
649 /* Mode combination is not recognized. */
653 /* Return an rtx for a value that would result
654 from converting X to mode MODE.
655 Both X and MODE may be floating, or both integer.
656 UNSIGNEDP is nonzero if X is an unsigned value.
657 This can be done by referring to a part of X in place
658 or by copying to a new temporary with conversion. */
661 convert_to_mode (machine_mode mode
, rtx x
, int unsignedp
)
663 return convert_modes (mode
, VOIDmode
, x
, unsignedp
);
666 /* Return an rtx for a value that would result
667 from converting X from mode OLDMODE to mode MODE.
668 Both modes may be floating, or both integer.
669 UNSIGNEDP is nonzero if X is an unsigned value.
671 This can be done by referring to a part of X in place
672 or by copying to a new temporary with conversion.
674 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
677 convert_modes (machine_mode mode
, machine_mode oldmode
, rtx x
, int unsignedp
)
680 scalar_int_mode int_mode
;
682 /* If FROM is a SUBREG that indicates that we have already done at least
683 the required extension, strip it. */
685 if (GET_CODE (x
) == SUBREG
686 && SUBREG_PROMOTED_VAR_P (x
)
687 && is_a
<scalar_int_mode
> (mode
, &int_mode
)
688 && (GET_MODE_PRECISION (subreg_promoted_mode (x
))
689 >= GET_MODE_PRECISION (int_mode
))
690 && SUBREG_CHECK_PROMOTED_SIGN (x
, unsignedp
))
691 x
= gen_lowpart (int_mode
, SUBREG_REG (x
));
693 if (GET_MODE (x
) != VOIDmode
)
694 oldmode
= GET_MODE (x
);
699 if (CONST_SCALAR_INT_P (x
)
700 && is_a
<scalar_int_mode
> (mode
, &int_mode
))
702 /* If the caller did not tell us the old mode, then there is not
703 much to do with respect to canonicalization. We have to
704 assume that all the bits are significant. */
705 if (!is_a
<scalar_int_mode
> (oldmode
))
706 oldmode
= MAX_MODE_INT
;
707 wide_int w
= wide_int::from (rtx_mode_t (x
, oldmode
),
708 GET_MODE_PRECISION (int_mode
),
709 unsignedp
? UNSIGNED
: SIGNED
);
710 return immed_wide_int_const (w
, int_mode
);
713 /* We can do this with a gen_lowpart if both desired and current modes
714 are integer, and this is either a constant integer, a register, or a
716 scalar_int_mode int_oldmode
;
717 if (is_int_mode (mode
, &int_mode
)
718 && is_int_mode (oldmode
, &int_oldmode
)
719 && GET_MODE_PRECISION (int_mode
) <= GET_MODE_PRECISION (int_oldmode
)
720 && ((MEM_P (x
) && !MEM_VOLATILE_P (x
) && direct_load
[(int) int_mode
])
721 || CONST_POLY_INT_P (x
)
723 && (!HARD_REGISTER_P (x
)
724 || targetm
.hard_regno_mode_ok (REGNO (x
), int_mode
))
725 && TRULY_NOOP_TRUNCATION_MODES_P (int_mode
, GET_MODE (x
)))))
726 return gen_lowpart (int_mode
, x
);
728 /* Converting from integer constant into mode is always equivalent to an
730 if (VECTOR_MODE_P (mode
) && GET_MODE (x
) == VOIDmode
)
732 gcc_assert (known_eq (GET_MODE_BITSIZE (mode
),
733 GET_MODE_BITSIZE (oldmode
)));
734 return simplify_gen_subreg (mode
, x
, oldmode
, 0);
737 temp
= gen_reg_rtx (mode
);
738 convert_move (temp
, x
, unsignedp
);
742 /* Return the largest alignment we can use for doing a move (or store)
743 of MAX_PIECES. ALIGN is the largest alignment we could use. */
746 alignment_for_piecewise_move (unsigned int max_pieces
, unsigned int align
)
748 scalar_int_mode tmode
749 = int_mode_for_size (max_pieces
* BITS_PER_UNIT
, 1).require ();
751 if (align
>= GET_MODE_ALIGNMENT (tmode
))
752 align
= GET_MODE_ALIGNMENT (tmode
);
755 scalar_int_mode xmode
= NARROWEST_INT_MODE
;
756 opt_scalar_int_mode mode_iter
;
757 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
759 tmode
= mode_iter
.require ();
760 if (GET_MODE_SIZE (tmode
) > max_pieces
761 || targetm
.slow_unaligned_access (tmode
, align
))
766 align
= MAX (align
, GET_MODE_ALIGNMENT (xmode
));
772 /* Return the widest integer mode that is narrower than SIZE bytes. */
774 static scalar_int_mode
775 widest_int_mode_for_size (unsigned int size
)
777 scalar_int_mode result
= NARROWEST_INT_MODE
;
779 gcc_checking_assert (size
> 1);
781 opt_scalar_int_mode tmode
;
782 FOR_EACH_MODE_IN_CLASS (tmode
, MODE_INT
)
783 if (GET_MODE_SIZE (tmode
.require ()) < size
)
784 result
= tmode
.require ();
789 /* Determine whether an operation OP on LEN bytes with alignment ALIGN can
790 and should be performed piecewise. */
793 can_do_by_pieces (unsigned HOST_WIDE_INT len
, unsigned int align
,
794 enum by_pieces_operation op
)
796 return targetm
.use_by_pieces_infrastructure_p (len
, align
, op
,
797 optimize_insn_for_speed_p ());
800 /* Determine whether the LEN bytes can be moved by using several move
801 instructions. Return nonzero if a call to move_by_pieces should
805 can_move_by_pieces (unsigned HOST_WIDE_INT len
, unsigned int align
)
807 return can_do_by_pieces (len
, align
, MOVE_BY_PIECES
);
810 /* Return number of insns required to perform operation OP by pieces
811 for L bytes. ALIGN (in bits) is maximum alignment we can assume. */
813 unsigned HOST_WIDE_INT
814 by_pieces_ninsns (unsigned HOST_WIDE_INT l
, unsigned int align
,
815 unsigned int max_size
, by_pieces_operation op
)
817 unsigned HOST_WIDE_INT n_insns
= 0;
819 align
= alignment_for_piecewise_move (MOVE_MAX_PIECES
, align
);
821 while (max_size
> 1 && l
> 0)
823 scalar_int_mode mode
= widest_int_mode_for_size (max_size
);
824 enum insn_code icode
;
826 unsigned int modesize
= GET_MODE_SIZE (mode
);
828 icode
= optab_handler (mov_optab
, mode
);
829 if (icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
))
831 unsigned HOST_WIDE_INT n_pieces
= l
/ modesize
;
839 case COMPARE_BY_PIECES
:
840 int batch
= targetm
.compare_by_pieces_branch_ratio (mode
);
841 int batch_ops
= 4 * batch
- 1;
842 unsigned HOST_WIDE_INT full
= n_pieces
/ batch
;
843 n_insns
+= full
* batch_ops
;
844 if (n_pieces
% batch
!= 0)
857 /* Used when performing piecewise block operations, holds information
858 about one of the memory objects involved. The member functions
859 can be used to generate code for loading from the object and
860 updating the address when iterating. */
864 /* The object being referenced, a MEM. Can be NULL_RTX to indicate
867 /* The address of the object. Can differ from that seen in the
868 MEM rtx if we copied the address to a register. */
870 /* Nonzero if the address on the object has an autoincrement already,
871 signifies whether that was an increment or decrement. */
872 signed char m_addr_inc
;
873 /* Nonzero if we intend to use autoinc without the address already
874 having autoinc form. We will insert add insns around each memory
875 reference, expecting later passes to form autoinc addressing modes.
876 The only supported options are predecrement and postincrement. */
877 signed char m_explicit_inc
;
878 /* True if we have either of the two possible cases of using
881 /* True if this is an address to be used for load operations rather
885 /* Optionally, a function to obtain constants for any given offset into
886 the objects, and data associated with it. */
887 by_pieces_constfn m_constfn
;
890 pieces_addr (rtx
, bool, by_pieces_constfn
, void *);
891 rtx
adjust (scalar_int_mode
, HOST_WIDE_INT
);
892 void increment_address (HOST_WIDE_INT
);
893 void maybe_predec (HOST_WIDE_INT
);
894 void maybe_postinc (HOST_WIDE_INT
);
895 void decide_autoinc (machine_mode
, bool, HOST_WIDE_INT
);
902 /* Initialize a pieces_addr structure from an object OBJ. IS_LOAD is
903 true if the operation to be performed on this object is a load
904 rather than a store. For stores, OBJ can be NULL, in which case we
905 assume the operation is a stack push. For loads, the optional
906 CONSTFN and its associated CFNDATA can be used in place of the
909 pieces_addr::pieces_addr (rtx obj
, bool is_load
, by_pieces_constfn constfn
,
911 : m_obj (obj
), m_is_load (is_load
), m_constfn (constfn
), m_cfndata (cfndata
)
917 rtx addr
= XEXP (obj
, 0);
918 rtx_code code
= GET_CODE (addr
);
920 bool dec
= code
== PRE_DEC
|| code
== POST_DEC
;
921 bool inc
= code
== PRE_INC
|| code
== POST_INC
;
924 m_addr_inc
= dec
? -1 : 1;
926 /* While we have always looked for these codes here, the code
927 implementing the memory operation has never handled them.
928 Support could be added later if necessary or beneficial. */
929 gcc_assert (code
!= PRE_INC
&& code
!= POST_DEC
);
937 if (STACK_GROWS_DOWNWARD
)
943 gcc_assert (constfn
!= NULL
);
947 gcc_assert (is_load
);
950 /* Decide whether to use autoinc for an address involved in a memory op.
951 MODE is the mode of the accesses, REVERSE is true if we've decided to
952 perform the operation starting from the end, and LEN is the length of
953 the operation. Don't override an earlier decision to set m_auto. */
956 pieces_addr::decide_autoinc (machine_mode
ARG_UNUSED (mode
), bool reverse
,
959 if (m_auto
|| m_obj
== NULL_RTX
)
962 bool use_predec
= (m_is_load
963 ? USE_LOAD_PRE_DECREMENT (mode
)
964 : USE_STORE_PRE_DECREMENT (mode
));
965 bool use_postinc
= (m_is_load
966 ? USE_LOAD_POST_INCREMENT (mode
)
967 : USE_STORE_POST_INCREMENT (mode
));
968 machine_mode addr_mode
= get_address_mode (m_obj
);
970 if (use_predec
&& reverse
)
972 m_addr
= copy_to_mode_reg (addr_mode
,
973 plus_constant (addr_mode
,
978 else if (use_postinc
&& !reverse
)
980 m_addr
= copy_to_mode_reg (addr_mode
, m_addr
);
984 else if (CONSTANT_P (m_addr
))
985 m_addr
= copy_to_mode_reg (addr_mode
, m_addr
);
988 /* Adjust the address to refer to the data at OFFSET in MODE. If we
989 are using autoincrement for this address, we don't add the offset,
990 but we still modify the MEM's properties. */
993 pieces_addr::adjust (scalar_int_mode mode
, HOST_WIDE_INT offset
)
996 return m_constfn (m_cfndata
, offset
, mode
);
997 if (m_obj
== NULL_RTX
)
1000 return adjust_automodify_address (m_obj
, mode
, m_addr
, offset
);
1002 return adjust_address (m_obj
, mode
, offset
);
1005 /* Emit an add instruction to increment the address by SIZE. */
1008 pieces_addr::increment_address (HOST_WIDE_INT size
)
1010 rtx amount
= gen_int_mode (size
, GET_MODE (m_addr
));
1011 emit_insn (gen_add2_insn (m_addr
, amount
));
1014 /* If we are supposed to decrement the address after each access, emit code
1015 to do so now. Increment by SIZE (which has should have the correct sign
1019 pieces_addr::maybe_predec (HOST_WIDE_INT size
)
1021 if (m_explicit_inc
>= 0)
1023 gcc_assert (HAVE_PRE_DECREMENT
);
1024 increment_address (size
);
1027 /* If we are supposed to decrement the address after each access, emit code
1028 to do so now. Increment by SIZE. */
1031 pieces_addr::maybe_postinc (HOST_WIDE_INT size
)
1033 if (m_explicit_inc
<= 0)
1035 gcc_assert (HAVE_POST_INCREMENT
);
1036 increment_address (size
);
1039 /* This structure is used by do_op_by_pieces to describe the operation
1042 class op_by_pieces_d
1045 pieces_addr m_to
, m_from
;
1046 unsigned HOST_WIDE_INT m_len
;
1047 HOST_WIDE_INT m_offset
;
1048 unsigned int m_align
;
1049 unsigned int m_max_size
;
1052 /* Virtual functions, overriden by derived classes for the specific
1054 virtual void generate (rtx
, rtx
, machine_mode
) = 0;
1055 virtual bool prepare_mode (machine_mode
, unsigned int) = 0;
1056 virtual void finish_mode (machine_mode
)
1061 op_by_pieces_d (rtx
, bool, rtx
, bool, by_pieces_constfn
, void *,
1062 unsigned HOST_WIDE_INT
, unsigned int);
1066 /* The constructor for an op_by_pieces_d structure. We require two
1067 objects named TO and FROM, which are identified as loads or stores
1068 by TO_LOAD and FROM_LOAD. If FROM is a load, the optional FROM_CFN
1069 and its associated FROM_CFN_DATA can be used to replace loads with
1070 constant values. LEN describes the length of the operation. */
1072 op_by_pieces_d::op_by_pieces_d (rtx to
, bool to_load
,
1073 rtx from
, bool from_load
,
1074 by_pieces_constfn from_cfn
,
1075 void *from_cfn_data
,
1076 unsigned HOST_WIDE_INT len
,
1078 : m_to (to
, to_load
, NULL
, NULL
),
1079 m_from (from
, from_load
, from_cfn
, from_cfn_data
),
1080 m_len (len
), m_max_size (MOVE_MAX_PIECES
+ 1)
1082 int toi
= m_to
.get_addr_inc ();
1083 int fromi
= m_from
.get_addr_inc ();
1084 if (toi
>= 0 && fromi
>= 0)
1086 else if (toi
<= 0 && fromi
<= 0)
1091 m_offset
= m_reverse
? len
: 0;
1092 align
= MIN (to
? MEM_ALIGN (to
) : align
,
1093 from
? MEM_ALIGN (from
) : align
);
1095 /* If copying requires more than two move insns,
1096 copy addresses to registers (to make displacements shorter)
1097 and use post-increment if available. */
1098 if (by_pieces_ninsns (len
, align
, m_max_size
, MOVE_BY_PIECES
) > 2)
1100 /* Find the mode of the largest comparison. */
1101 scalar_int_mode mode
= widest_int_mode_for_size (m_max_size
);
1103 m_from
.decide_autoinc (mode
, m_reverse
, len
);
1104 m_to
.decide_autoinc (mode
, m_reverse
, len
);
1107 align
= alignment_for_piecewise_move (MOVE_MAX_PIECES
, align
);
1111 /* This function contains the main loop used for expanding a block
1112 operation. First move what we can in the largest integer mode,
1113 then go to successively smaller modes. For every access, call
1114 GENFUN with the two operands and the EXTRA_DATA. */
1117 op_by_pieces_d::run ()
1119 while (m_max_size
> 1 && m_len
> 0)
1121 scalar_int_mode mode
= widest_int_mode_for_size (m_max_size
);
1123 if (prepare_mode (mode
, m_align
))
1125 unsigned int size
= GET_MODE_SIZE (mode
);
1126 rtx to1
= NULL_RTX
, from1
;
1128 while (m_len
>= size
)
1133 to1
= m_to
.adjust (mode
, m_offset
);
1134 from1
= m_from
.adjust (mode
, m_offset
);
1136 m_to
.maybe_predec (-(HOST_WIDE_INT
)size
);
1137 m_from
.maybe_predec (-(HOST_WIDE_INT
)size
);
1139 generate (to1
, from1
, mode
);
1141 m_to
.maybe_postinc (size
);
1142 m_from
.maybe_postinc (size
);
1153 m_max_size
= GET_MODE_SIZE (mode
);
1156 /* The code above should have handled everything. */
1157 gcc_assert (!m_len
);
1160 /* Derived class from op_by_pieces_d, providing support for block move
1163 class move_by_pieces_d
: public op_by_pieces_d
1165 insn_gen_fn m_gen_fun
;
1166 void generate (rtx
, rtx
, machine_mode
);
1167 bool prepare_mode (machine_mode
, unsigned int);
1170 move_by_pieces_d (rtx to
, rtx from
, unsigned HOST_WIDE_INT len
,
1172 : op_by_pieces_d (to
, false, from
, true, NULL
, NULL
, len
, align
)
1175 rtx
finish_retmode (memop_ret
);
1178 /* Return true if MODE can be used for a set of copies, given an
1179 alignment ALIGN. Prepare whatever data is necessary for later
1180 calls to generate. */
1183 move_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1185 insn_code icode
= optab_handler (mov_optab
, mode
);
1186 m_gen_fun
= GEN_FCN (icode
);
1187 return icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
);
1190 /* A callback used when iterating for a compare_by_pieces_operation.
1191 OP0 and OP1 are the values that have been loaded and should be
1192 compared in MODE. If OP0 is NULL, this means we should generate a
1193 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn
1194 gen function that should be used to generate the mode. */
1197 move_by_pieces_d::generate (rtx op0
, rtx op1
,
1198 machine_mode mode ATTRIBUTE_UNUSED
)
1200 #ifdef PUSH_ROUNDING
1201 if (op0
== NULL_RTX
)
1203 emit_single_push_insn (mode
, op1
, NULL
);
1207 emit_insn (m_gen_fun (op0
, op1
));
1210 /* Perform the final adjustment at the end of a string to obtain the
1211 correct return value for the block operation.
1212 Return value is based on RETMODE argument. */
1215 move_by_pieces_d::finish_retmode (memop_ret retmode
)
1217 gcc_assert (!m_reverse
);
1218 if (retmode
== RETURN_END_MINUS_ONE
)
1220 m_to
.maybe_postinc (-1);
1223 return m_to
.adjust (QImode
, m_offset
);
1226 /* Generate several move instructions to copy LEN bytes from block FROM to
1227 block TO. (These are MEM rtx's with BLKmode).
1229 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
1230 used to push FROM to the stack.
1232 ALIGN is maximum stack alignment we can assume.
1234 Return value is based on RETMODE argument. */
1237 move_by_pieces (rtx to
, rtx from
, unsigned HOST_WIDE_INT len
,
1238 unsigned int align
, memop_ret retmode
)
1240 #ifndef PUSH_ROUNDING
1245 move_by_pieces_d
data (to
, from
, len
, align
);
1249 if (retmode
!= RETURN_BEGIN
)
1250 return data
.finish_retmode (retmode
);
1255 /* Derived class from op_by_pieces_d, providing support for block move
1258 class store_by_pieces_d
: public op_by_pieces_d
1260 insn_gen_fn m_gen_fun
;
1261 void generate (rtx
, rtx
, machine_mode
);
1262 bool prepare_mode (machine_mode
, unsigned int);
1265 store_by_pieces_d (rtx to
, by_pieces_constfn cfn
, void *cfn_data
,
1266 unsigned HOST_WIDE_INT len
, unsigned int align
)
1267 : op_by_pieces_d (to
, false, NULL_RTX
, true, cfn
, cfn_data
, len
, align
)
1270 rtx
finish_retmode (memop_ret
);
1273 /* Return true if MODE can be used for a set of stores, given an
1274 alignment ALIGN. Prepare whatever data is necessary for later
1275 calls to generate. */
1278 store_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1280 insn_code icode
= optab_handler (mov_optab
, mode
);
1281 m_gen_fun
= GEN_FCN (icode
);
1282 return icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
);
1285 /* A callback used when iterating for a store_by_pieces_operation.
1286 OP0 and OP1 are the values that have been loaded and should be
1287 compared in MODE. If OP0 is NULL, this means we should generate a
1288 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn
1289 gen function that should be used to generate the mode. */
1292 store_by_pieces_d::generate (rtx op0
, rtx op1
, machine_mode
)
1294 emit_insn (m_gen_fun (op0
, op1
));
1297 /* Perform the final adjustment at the end of a string to obtain the
1298 correct return value for the block operation.
1299 Return value is based on RETMODE argument. */
1302 store_by_pieces_d::finish_retmode (memop_ret retmode
)
1304 gcc_assert (!m_reverse
);
1305 if (retmode
== RETURN_END_MINUS_ONE
)
1307 m_to
.maybe_postinc (-1);
1310 return m_to
.adjust (QImode
, m_offset
);
1313 /* Determine whether the LEN bytes generated by CONSTFUN can be
1314 stored to memory using several move instructions. CONSTFUNDATA is
1315 a pointer which will be passed as argument in every CONSTFUN call.
1316 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
1317 a memset operation and false if it's a copy of a constant string.
1318 Return nonzero if a call to store_by_pieces should succeed. */
1321 can_store_by_pieces (unsigned HOST_WIDE_INT len
,
1322 rtx (*constfun
) (void *, HOST_WIDE_INT
, scalar_int_mode
),
1323 void *constfundata
, unsigned int align
, bool memsetp
)
1325 unsigned HOST_WIDE_INT l
;
1326 unsigned int max_size
;
1327 HOST_WIDE_INT offset
= 0;
1328 enum insn_code icode
;
1330 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
1331 rtx cst ATTRIBUTE_UNUSED
;
1336 if (!targetm
.use_by_pieces_infrastructure_p (len
, align
,
1340 optimize_insn_for_speed_p ()))
1343 align
= alignment_for_piecewise_move (STORE_MAX_PIECES
, align
);
1345 /* We would first store what we can in the largest integer mode, then go to
1346 successively smaller modes. */
1349 reverse
<= (HAVE_PRE_DECREMENT
|| HAVE_POST_DECREMENT
);
1353 max_size
= STORE_MAX_PIECES
+ 1;
1354 while (max_size
> 1 && l
> 0)
1356 scalar_int_mode mode
= widest_int_mode_for_size (max_size
);
1358 icode
= optab_handler (mov_optab
, mode
);
1359 if (icode
!= CODE_FOR_nothing
1360 && align
>= GET_MODE_ALIGNMENT (mode
))
1362 unsigned int size
= GET_MODE_SIZE (mode
);
1369 cst
= (*constfun
) (constfundata
, offset
, mode
);
1370 if (!targetm
.legitimate_constant_p (mode
, cst
))
1380 max_size
= GET_MODE_SIZE (mode
);
1383 /* The code above should have handled everything. */
1390 /* Generate several move instructions to store LEN bytes generated by
1391 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
1392 pointer which will be passed as argument in every CONSTFUN call.
1393 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
1394 a memset operation and false if it's a copy of a constant string.
1395 Return value is based on RETMODE argument. */
1398 store_by_pieces (rtx to
, unsigned HOST_WIDE_INT len
,
1399 rtx (*constfun
) (void *, HOST_WIDE_INT
, scalar_int_mode
),
1400 void *constfundata
, unsigned int align
, bool memsetp
,
1405 gcc_assert (retmode
!= RETURN_END_MINUS_ONE
);
1409 gcc_assert (targetm
.use_by_pieces_infrastructure_p
1411 memsetp
? SET_BY_PIECES
: STORE_BY_PIECES
,
1412 optimize_insn_for_speed_p ()));
1414 store_by_pieces_d
data (to
, constfun
, constfundata
, len
, align
);
1417 if (retmode
!= RETURN_BEGIN
)
1418 return data
.finish_retmode (retmode
);
1423 /* Callback routine for clear_by_pieces.
1424 Return const0_rtx unconditionally. */
1427 clear_by_pieces_1 (void *, HOST_WIDE_INT
, scalar_int_mode
)
1432 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
1433 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
1436 clear_by_pieces (rtx to
, unsigned HOST_WIDE_INT len
, unsigned int align
)
1441 store_by_pieces_d
data (to
, clear_by_pieces_1
, NULL
, len
, align
);
1445 /* Context used by compare_by_pieces_genfn. It stores the fail label
1446 to jump to in case of miscomparison, and for branch ratios greater than 1,
1447 it stores an accumulator and the current and maximum counts before
1448 emitting another branch. */
1450 class compare_by_pieces_d
: public op_by_pieces_d
1452 rtx_code_label
*m_fail_label
;
1454 int m_count
, m_batch
;
1456 void generate (rtx
, rtx
, machine_mode
);
1457 bool prepare_mode (machine_mode
, unsigned int);
1458 void finish_mode (machine_mode
);
1460 compare_by_pieces_d (rtx op0
, rtx op1
, by_pieces_constfn op1_cfn
,
1461 void *op1_cfn_data
, HOST_WIDE_INT len
, int align
,
1462 rtx_code_label
*fail_label
)
1463 : op_by_pieces_d (op0
, true, op1
, true, op1_cfn
, op1_cfn_data
, len
, align
)
1465 m_fail_label
= fail_label
;
1469 /* A callback used when iterating for a compare_by_pieces_operation.
1470 OP0 and OP1 are the values that have been loaded and should be
1471 compared in MODE. DATA holds a pointer to the compare_by_pieces_data
1472 context structure. */
1475 compare_by_pieces_d::generate (rtx op0
, rtx op1
, machine_mode mode
)
1479 rtx temp
= expand_binop (mode
, sub_optab
, op0
, op1
, NULL_RTX
,
1480 true, OPTAB_LIB_WIDEN
);
1482 temp
= expand_binop (mode
, ior_optab
, m_accumulator
, temp
, temp
,
1483 true, OPTAB_LIB_WIDEN
);
1484 m_accumulator
= temp
;
1486 if (++m_count
< m_batch
)
1490 op0
= m_accumulator
;
1492 m_accumulator
= NULL_RTX
;
1494 do_compare_rtx_and_jump (op0
, op1
, NE
, true, mode
, NULL_RTX
, NULL
,
1495 m_fail_label
, profile_probability::uninitialized ());
1498 /* Return true if MODE can be used for a set of moves and comparisons,
1499 given an alignment ALIGN. Prepare whatever data is necessary for
1500 later calls to generate. */
1503 compare_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1505 insn_code icode
= optab_handler (mov_optab
, mode
);
1506 if (icode
== CODE_FOR_nothing
1507 || align
< GET_MODE_ALIGNMENT (mode
)
1508 || !can_compare_p (EQ
, mode
, ccp_jump
))
1510 m_batch
= targetm
.compare_by_pieces_branch_ratio (mode
);
1513 m_accumulator
= NULL_RTX
;
1518 /* Called after expanding a series of comparisons in MODE. If we have
1519 accumulated results for which we haven't emitted a branch yet, do
1523 compare_by_pieces_d::finish_mode (machine_mode mode
)
1525 if (m_accumulator
!= NULL_RTX
)
1526 do_compare_rtx_and_jump (m_accumulator
, const0_rtx
, NE
, true, mode
,
1527 NULL_RTX
, NULL
, m_fail_label
,
1528 profile_probability::uninitialized ());
1531 /* Generate several move instructions to compare LEN bytes from blocks
1532 ARG0 and ARG1. (These are MEM rtx's with BLKmode).
1534 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
1535 used to push FROM to the stack.
1537 ALIGN is maximum stack alignment we can assume.
1539 Optionally, the caller can pass a constfn and associated data in A1_CFN
1540 and A1_CFN_DATA. describing that the second operand being compared is a
1541 known constant and how to obtain its data. */
1544 compare_by_pieces (rtx arg0
, rtx arg1
, unsigned HOST_WIDE_INT len
,
1545 rtx target
, unsigned int align
,
1546 by_pieces_constfn a1_cfn
, void *a1_cfn_data
)
1548 rtx_code_label
*fail_label
= gen_label_rtx ();
1549 rtx_code_label
*end_label
= gen_label_rtx ();
1551 if (target
== NULL_RTX
1552 || !REG_P (target
) || REGNO (target
) < FIRST_PSEUDO_REGISTER
)
1553 target
= gen_reg_rtx (TYPE_MODE (integer_type_node
));
1555 compare_by_pieces_d
data (arg0
, arg1
, a1_cfn
, a1_cfn_data
, len
, align
,
1560 emit_move_insn (target
, const0_rtx
);
1561 emit_jump (end_label
);
1563 emit_label (fail_label
);
1564 emit_move_insn (target
, const1_rtx
);
1565 emit_label (end_label
);
1570 /* Emit code to move a block Y to a block X. This may be done with
1571 string-move instructions, with multiple scalar move instructions,
1572 or with a library call.
1574 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1575 SIZE is an rtx that says how long they are.
1576 ALIGN is the maximum alignment we can assume they have.
1577 METHOD describes what kind of copy this is, and what mechanisms may be used.
1578 MIN_SIZE is the minimal size of block to move
1579 MAX_SIZE is the maximal size of block to move, if it cannot be represented
1580 in unsigned HOST_WIDE_INT, than it is mask of all ones.
1582 Return the address of the new block, if memcpy is called and returns it,
1586 emit_block_move_hints (rtx x
, rtx y
, rtx size
, enum block_op_methods method
,
1587 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
1588 unsigned HOST_WIDE_INT min_size
,
1589 unsigned HOST_WIDE_INT max_size
,
1590 unsigned HOST_WIDE_INT probable_max_size
,
1591 bool bail_out_libcall
, bool *is_move_done
,
1599 *is_move_done
= true;
1602 if (CONST_INT_P (size
) && INTVAL (size
) == 0)
1607 case BLOCK_OP_NORMAL
:
1608 case BLOCK_OP_TAILCALL
:
1612 case BLOCK_OP_CALL_PARM
:
1613 may_use_call
= block_move_libcall_safe_for_call_parm ();
1615 /* Make inhibit_defer_pop nonzero around the library call
1616 to force it to pop the arguments right away. */
1620 case BLOCK_OP_NO_LIBCALL
:
1624 case BLOCK_OP_NO_LIBCALL_RET
:
1632 gcc_assert (MEM_P (x
) && MEM_P (y
));
1633 align
= MIN (MEM_ALIGN (x
), MEM_ALIGN (y
));
1634 gcc_assert (align
>= BITS_PER_UNIT
);
1636 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1637 block copy is more efficient for other large modes, e.g. DCmode. */
1638 x
= adjust_address (x
, BLKmode
, 0);
1639 y
= adjust_address (y
, BLKmode
, 0);
1641 /* If source and destination are the same, no need to copy anything. */
1642 if (rtx_equal_p (x
, y
)
1643 && !MEM_VOLATILE_P (x
)
1644 && !MEM_VOLATILE_P (y
))
1647 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1648 can be incorrect is coming from __builtin_memcpy. */
1649 poly_int64 const_size
;
1650 if (poly_int_rtx_p (size
, &const_size
))
1652 x
= shallow_copy_rtx (x
);
1653 y
= shallow_copy_rtx (y
);
1654 set_mem_size (x
, const_size
);
1655 set_mem_size (y
, const_size
);
1658 bool pieces_ok
= CONST_INT_P (size
)
1659 && can_move_by_pieces (INTVAL (size
), align
);
1660 bool pattern_ok
= false;
1662 if (!pieces_ok
|| might_overlap
)
1665 = emit_block_move_via_pattern (x
, y
, size
, align
,
1666 expected_align
, expected_size
,
1667 min_size
, max_size
, probable_max_size
,
1669 if (!pattern_ok
&& might_overlap
)
1671 /* Do not try any of the other methods below as they are not safe
1672 for overlapping moves. */
1673 *is_move_done
= false;
1681 move_by_pieces (x
, y
, INTVAL (size
), align
, RETURN_BEGIN
);
1682 else if (may_use_call
&& !might_overlap
1683 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x
))
1684 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y
)))
1686 if (bail_out_libcall
)
1689 *is_move_done
= false;
1693 if (may_use_call
< 0)
1696 retval
= emit_block_copy_via_libcall (x
, y
, size
,
1697 method
== BLOCK_OP_TAILCALL
);
1699 else if (might_overlap
)
1700 *is_move_done
= false;
1702 emit_block_move_via_loop (x
, y
, size
, align
);
1704 if (method
== BLOCK_OP_CALL_PARM
)
1711 emit_block_move (rtx x
, rtx y
, rtx size
, enum block_op_methods method
)
1713 unsigned HOST_WIDE_INT max
, min
= 0;
1714 if (GET_CODE (size
) == CONST_INT
)
1715 min
= max
= UINTVAL (size
);
1717 max
= GET_MODE_MASK (GET_MODE (size
));
1718 return emit_block_move_hints (x
, y
, size
, method
, 0, -1,
1722 /* A subroutine of emit_block_move. Returns true if calling the
1723 block move libcall will not clobber any parameters which may have
1724 already been placed on the stack. */
1727 block_move_libcall_safe_for_call_parm (void)
1731 /* If arguments are pushed on the stack, then they're safe. */
1735 /* If registers go on the stack anyway, any argument is sure to clobber
1736 an outgoing argument. */
1737 #if defined (REG_PARM_STACK_SPACE)
1738 fn
= builtin_decl_implicit (BUILT_IN_MEMCPY
);
1739 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1740 depend on its argument. */
1742 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn
? NULL_TREE
: TREE_TYPE (fn
)))
1743 && REG_PARM_STACK_SPACE (fn
) != 0)
1747 /* If any argument goes in memory, then it might clobber an outgoing
1750 CUMULATIVE_ARGS args_so_far_v
;
1751 cumulative_args_t args_so_far
;
1754 fn
= builtin_decl_implicit (BUILT_IN_MEMCPY
);
1755 INIT_CUMULATIVE_ARGS (args_so_far_v
, TREE_TYPE (fn
), NULL_RTX
, 0, 3);
1756 args_so_far
= pack_cumulative_args (&args_so_far_v
);
1758 arg
= TYPE_ARG_TYPES (TREE_TYPE (fn
));
1759 for ( ; arg
!= void_list_node
; arg
= TREE_CHAIN (arg
))
1761 machine_mode mode
= TYPE_MODE (TREE_VALUE (arg
));
1762 function_arg_info
arg_info (mode
, /*named=*/true);
1763 rtx tmp
= targetm
.calls
.function_arg (args_so_far
, arg_info
);
1764 if (!tmp
|| !REG_P (tmp
))
1766 if (targetm
.calls
.arg_partial_bytes (args_so_far
, arg_info
))
1768 targetm
.calls
.function_arg_advance (args_so_far
, arg_info
);
1774 /* A subroutine of emit_block_move. Expand a cpymem or movmem pattern;
1775 return true if successful.
1777 X is the destination of the copy or move.
1778 Y is the source of the copy or move.
1779 SIZE is the size of the block to be moved.
1781 MIGHT_OVERLAP indicates this originated with expansion of a
1782 builtin_memmove() and the source and destination blocks may
1787 emit_block_move_via_pattern (rtx x
, rtx y
, rtx size
, unsigned int align
,
1788 unsigned int expected_align
,
1789 HOST_WIDE_INT expected_size
,
1790 unsigned HOST_WIDE_INT min_size
,
1791 unsigned HOST_WIDE_INT max_size
,
1792 unsigned HOST_WIDE_INT probable_max_size
,
1795 if (expected_align
< align
)
1796 expected_align
= align
;
1797 if (expected_size
!= -1)
1799 if ((unsigned HOST_WIDE_INT
)expected_size
> probable_max_size
)
1800 expected_size
= probable_max_size
;
1801 if ((unsigned HOST_WIDE_INT
)expected_size
< min_size
)
1802 expected_size
= min_size
;
1805 /* Since this is a move insn, we don't care about volatility. */
1806 temporary_volatile_ok
v (true);
1808 /* Try the most limited insn first, because there's no point
1809 including more than one in the machine description unless
1810 the more limited one has some advantage. */
1812 opt_scalar_int_mode mode_iter
;
1813 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
1815 scalar_int_mode mode
= mode_iter
.require ();
1816 enum insn_code code
;
1818 code
= direct_optab_handler (movmem_optab
, mode
);
1820 code
= direct_optab_handler (cpymem_optab
, mode
);
1822 if (code
!= CODE_FOR_nothing
1823 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1824 here because if SIZE is less than the mode mask, as it is
1825 returned by the macro, it will definitely be less than the
1826 actual mode mask. Since SIZE is within the Pmode address
1827 space, we limit MODE to Pmode. */
1828 && ((CONST_INT_P (size
)
1829 && ((unsigned HOST_WIDE_INT
) INTVAL (size
)
1830 <= (GET_MODE_MASK (mode
) >> 1)))
1831 || max_size
<= (GET_MODE_MASK (mode
) >> 1)
1832 || GET_MODE_BITSIZE (mode
) >= GET_MODE_BITSIZE (Pmode
)))
1834 class expand_operand ops
[9];
1837 /* ??? When called via emit_block_move_for_call, it'd be
1838 nice if there were some way to inform the backend, so
1839 that it doesn't fail the expansion because it thinks
1840 emitting the libcall would be more efficient. */
1841 nops
= insn_data
[(int) code
].n_generator_args
;
1842 gcc_assert (nops
== 4 || nops
== 6 || nops
== 8 || nops
== 9);
1844 create_fixed_operand (&ops
[0], x
);
1845 create_fixed_operand (&ops
[1], y
);
1846 /* The check above guarantees that this size conversion is valid. */
1847 create_convert_operand_to (&ops
[2], size
, mode
, true);
1848 create_integer_operand (&ops
[3], align
/ BITS_PER_UNIT
);
1851 create_integer_operand (&ops
[4], expected_align
/ BITS_PER_UNIT
);
1852 create_integer_operand (&ops
[5], expected_size
);
1856 create_integer_operand (&ops
[6], min_size
);
1857 /* If we cannot represent the maximal size,
1858 make parameter NULL. */
1859 if ((HOST_WIDE_INT
) max_size
!= -1)
1860 create_integer_operand (&ops
[7], max_size
);
1862 create_fixed_operand (&ops
[7], NULL
);
1866 /* If we cannot represent the maximal size,
1867 make parameter NULL. */
1868 if ((HOST_WIDE_INT
) probable_max_size
!= -1)
1869 create_integer_operand (&ops
[8], probable_max_size
);
1871 create_fixed_operand (&ops
[8], NULL
);
1873 if (maybe_expand_insn (code
, nops
, ops
))
1881 /* A subroutine of emit_block_move. Copy the data via an explicit
1882 loop. This is used only when libcalls are forbidden. */
1883 /* ??? It'd be nice to copy in hunks larger than QImode. */
1886 emit_block_move_via_loop (rtx x
, rtx y
, rtx size
,
1887 unsigned int align ATTRIBUTE_UNUSED
)
1889 rtx_code_label
*cmp_label
, *top_label
;
1890 rtx iter
, x_addr
, y_addr
, tmp
;
1891 machine_mode x_addr_mode
= get_address_mode (x
);
1892 machine_mode y_addr_mode
= get_address_mode (y
);
1893 machine_mode iter_mode
;
1895 iter_mode
= GET_MODE (size
);
1896 if (iter_mode
== VOIDmode
)
1897 iter_mode
= word_mode
;
1899 top_label
= gen_label_rtx ();
1900 cmp_label
= gen_label_rtx ();
1901 iter
= gen_reg_rtx (iter_mode
);
1903 emit_move_insn (iter
, const0_rtx
);
1905 x_addr
= force_operand (XEXP (x
, 0), NULL_RTX
);
1906 y_addr
= force_operand (XEXP (y
, 0), NULL_RTX
);
1907 do_pending_stack_adjust ();
1909 emit_jump (cmp_label
);
1910 emit_label (top_label
);
1912 tmp
= convert_modes (x_addr_mode
, iter_mode
, iter
, true);
1913 x_addr
= simplify_gen_binary (PLUS
, x_addr_mode
, x_addr
, tmp
);
1915 if (x_addr_mode
!= y_addr_mode
)
1916 tmp
= convert_modes (y_addr_mode
, iter_mode
, iter
, true);
1917 y_addr
= simplify_gen_binary (PLUS
, y_addr_mode
, y_addr
, tmp
);
1919 x
= change_address (x
, QImode
, x_addr
);
1920 y
= change_address (y
, QImode
, y_addr
);
1922 emit_move_insn (x
, y
);
1924 tmp
= expand_simple_binop (iter_mode
, PLUS
, iter
, const1_rtx
, iter
,
1925 true, OPTAB_LIB_WIDEN
);
1927 emit_move_insn (iter
, tmp
);
1929 emit_label (cmp_label
);
1931 emit_cmp_and_jump_insns (iter
, size
, LT
, NULL_RTX
, iter_mode
,
1933 profile_probability::guessed_always ()
1934 .apply_scale (9, 10));
1937 /* Expand a call to memcpy or memmove or memcmp, and return the result.
1938 TAILCALL is true if this is a tail call. */
1941 emit_block_op_via_libcall (enum built_in_function fncode
, rtx dst
, rtx src
,
1942 rtx size
, bool tailcall
)
1944 rtx dst_addr
, src_addr
;
1945 tree call_expr
, dst_tree
, src_tree
, size_tree
;
1946 machine_mode size_mode
;
1948 /* Since dst and src are passed to a libcall, mark the corresponding
1949 tree EXPR as addressable. */
1950 tree dst_expr
= MEM_EXPR (dst
);
1951 tree src_expr
= MEM_EXPR (src
);
1953 mark_addressable (dst_expr
);
1955 mark_addressable (src_expr
);
1957 dst_addr
= copy_addr_to_reg (XEXP (dst
, 0));
1958 dst_addr
= convert_memory_address (ptr_mode
, dst_addr
);
1959 dst_tree
= make_tree (ptr_type_node
, dst_addr
);
1961 src_addr
= copy_addr_to_reg (XEXP (src
, 0));
1962 src_addr
= convert_memory_address (ptr_mode
, src_addr
);
1963 src_tree
= make_tree (ptr_type_node
, src_addr
);
1965 size_mode
= TYPE_MODE (sizetype
);
1966 size
= convert_to_mode (size_mode
, size
, 1);
1967 size
= copy_to_mode_reg (size_mode
, size
);
1968 size_tree
= make_tree (sizetype
, size
);
1970 /* It is incorrect to use the libcall calling conventions for calls to
1971 memcpy/memmove/memcmp because they can be provided by the user. */
1972 tree fn
= builtin_decl_implicit (fncode
);
1973 call_expr
= build_call_expr (fn
, 3, dst_tree
, src_tree
, size_tree
);
1974 CALL_EXPR_TAILCALL (call_expr
) = tailcall
;
1976 return expand_call (call_expr
, NULL_RTX
, false);
1979 /* Try to expand cmpstrn or cmpmem operation ICODE with the given operands.
1980 ARG3_TYPE is the type of ARG3_RTX. Return the result rtx on success,
1981 otherwise return null. */
1984 expand_cmpstrn_or_cmpmem (insn_code icode
, rtx target
, rtx arg1_rtx
,
1985 rtx arg2_rtx
, tree arg3_type
, rtx arg3_rtx
,
1986 HOST_WIDE_INT align
)
1988 machine_mode insn_mode
= insn_data
[icode
].operand
[0].mode
;
1990 if (target
&& (!REG_P (target
) || HARD_REGISTER_P (target
)))
1993 class expand_operand ops
[5];
1994 create_output_operand (&ops
[0], target
, insn_mode
);
1995 create_fixed_operand (&ops
[1], arg1_rtx
);
1996 create_fixed_operand (&ops
[2], arg2_rtx
);
1997 create_convert_operand_from (&ops
[3], arg3_rtx
, TYPE_MODE (arg3_type
),
1998 TYPE_UNSIGNED (arg3_type
));
1999 create_integer_operand (&ops
[4], align
);
2000 if (maybe_expand_insn (icode
, 5, ops
))
2001 return ops
[0].value
;
2005 /* Expand a block compare between X and Y with length LEN using the
2006 cmpmem optab, placing the result in TARGET. LEN_TYPE is the type
2007 of the expression that was used to calculate the length. ALIGN
2008 gives the known minimum common alignment. */
2011 emit_block_cmp_via_cmpmem (rtx x
, rtx y
, rtx len
, tree len_type
, rtx target
,
2014 /* Note: The cmpstrnsi pattern, if it exists, is not suitable for
2015 implementing memcmp because it will stop if it encounters two
2017 insn_code icode
= direct_optab_handler (cmpmem_optab
, SImode
);
2019 if (icode
== CODE_FOR_nothing
)
2022 return expand_cmpstrn_or_cmpmem (icode
, target
, x
, y
, len_type
, len
, align
);
2025 /* Emit code to compare a block Y to a block X. This may be done with
2026 string-compare instructions, with multiple scalar instructions,
2027 or with a library call.
2029 Both X and Y must be MEM rtx's. LEN is an rtx that says how long
2030 they are. LEN_TYPE is the type of the expression that was used to
2033 If EQUALITY_ONLY is true, it means we don't have to return the tri-state
2034 value of a normal memcmp call, instead we can just compare for equality.
2035 If FORCE_LIBCALL is true, we should emit a call to memcmp rather than
2038 Optionally, the caller can pass a constfn and associated data in Y_CFN
2039 and Y_CFN_DATA. describing that the second operand being compared is a
2040 known constant and how to obtain its data.
2041 Return the result of the comparison, or NULL_RTX if we failed to
2042 perform the operation. */
2045 emit_block_cmp_hints (rtx x
, rtx y
, rtx len
, tree len_type
, rtx target
,
2046 bool equality_only
, by_pieces_constfn y_cfn
,
2051 if (CONST_INT_P (len
) && INTVAL (len
) == 0)
2054 gcc_assert (MEM_P (x
) && MEM_P (y
));
2055 unsigned int align
= MIN (MEM_ALIGN (x
), MEM_ALIGN (y
));
2056 gcc_assert (align
>= BITS_PER_UNIT
);
2058 x
= adjust_address (x
, BLKmode
, 0);
2059 y
= adjust_address (y
, BLKmode
, 0);
2062 && CONST_INT_P (len
)
2063 && can_do_by_pieces (INTVAL (len
), align
, COMPARE_BY_PIECES
))
2064 result
= compare_by_pieces (x
, y
, INTVAL (len
), target
, align
,
2067 result
= emit_block_cmp_via_cmpmem (x
, y
, len
, len_type
, target
, align
);
2072 /* Copy all or part of a value X into registers starting at REGNO.
2073 The number of registers to be filled is NREGS. */
2076 move_block_to_reg (int regno
, rtx x
, int nregs
, machine_mode mode
)
2081 if (CONSTANT_P (x
) && !targetm
.legitimate_constant_p (mode
, x
))
2082 x
= validize_mem (force_const_mem (mode
, x
));
2084 /* See if the machine can do this with a load multiple insn. */
2085 if (targetm
.have_load_multiple ())
2087 rtx_insn
*last
= get_last_insn ();
2088 rtx first
= gen_rtx_REG (word_mode
, regno
);
2089 if (rtx_insn
*pat
= targetm
.gen_load_multiple (first
, x
,
2096 delete_insns_since (last
);
2099 for (int i
= 0; i
< nregs
; i
++)
2100 emit_move_insn (gen_rtx_REG (word_mode
, regno
+ i
),
2101 operand_subword_force (x
, i
, mode
));
2104 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
2105 The number of registers to be filled is NREGS. */
2108 move_block_from_reg (int regno
, rtx x
, int nregs
)
2113 /* See if the machine can do this with a store multiple insn. */
2114 if (targetm
.have_store_multiple ())
2116 rtx_insn
*last
= get_last_insn ();
2117 rtx first
= gen_rtx_REG (word_mode
, regno
);
2118 if (rtx_insn
*pat
= targetm
.gen_store_multiple (x
, first
,
2125 delete_insns_since (last
);
2128 for (int i
= 0; i
< nregs
; i
++)
2130 rtx tem
= operand_subword (x
, i
, 1, BLKmode
);
2134 emit_move_insn (tem
, gen_rtx_REG (word_mode
, regno
+ i
));
2138 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
2139 ORIG, where ORIG is a non-consecutive group of registers represented by
2140 a PARALLEL. The clone is identical to the original except in that the
2141 original set of registers is replaced by a new set of pseudo registers.
2142 The new set has the same modes as the original set. */
2145 gen_group_rtx (rtx orig
)
2150 gcc_assert (GET_CODE (orig
) == PARALLEL
);
2152 length
= XVECLEN (orig
, 0);
2153 tmps
= XALLOCAVEC (rtx
, length
);
2155 /* Skip a NULL entry in first slot. */
2156 i
= XEXP (XVECEXP (orig
, 0, 0), 0) ? 0 : 1;
2161 for (; i
< length
; i
++)
2163 machine_mode mode
= GET_MODE (XEXP (XVECEXP (orig
, 0, i
), 0));
2164 rtx offset
= XEXP (XVECEXP (orig
, 0, i
), 1);
2166 tmps
[i
] = gen_rtx_EXPR_LIST (VOIDmode
, gen_reg_rtx (mode
), offset
);
2169 return gen_rtx_PARALLEL (GET_MODE (orig
), gen_rtvec_v (length
, tmps
));
2172 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
2173 except that values are placed in TMPS[i], and must later be moved
2174 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
2177 emit_group_load_1 (rtx
*tmps
, rtx dst
, rtx orig_src
, tree type
,
2182 machine_mode m
= GET_MODE (orig_src
);
2184 gcc_assert (GET_CODE (dst
) == PARALLEL
);
2187 && !SCALAR_INT_MODE_P (m
)
2188 && !MEM_P (orig_src
)
2189 && GET_CODE (orig_src
) != CONCAT
)
2191 scalar_int_mode imode
;
2192 if (int_mode_for_mode (GET_MODE (orig_src
)).exists (&imode
))
2194 src
= gen_reg_rtx (imode
);
2195 emit_move_insn (gen_lowpart (GET_MODE (orig_src
), src
), orig_src
);
2199 src
= assign_stack_temp (GET_MODE (orig_src
), ssize
);
2200 emit_move_insn (src
, orig_src
);
2202 emit_group_load_1 (tmps
, dst
, src
, type
, ssize
);
2206 /* Check for a NULL entry, used to indicate that the parameter goes
2207 both on the stack and in registers. */
2208 if (XEXP (XVECEXP (dst
, 0, 0), 0))
2213 /* Process the pieces. */
2214 for (i
= start
; i
< XVECLEN (dst
, 0); i
++)
2216 machine_mode mode
= GET_MODE (XEXP (XVECEXP (dst
, 0, i
), 0));
2217 poly_int64 bytepos
= rtx_to_poly_int64 (XEXP (XVECEXP (dst
, 0, i
), 1));
2218 poly_int64 bytelen
= GET_MODE_SIZE (mode
);
2219 poly_int64 shift
= 0;
2221 /* Handle trailing fragments that run over the size of the struct.
2222 It's the target's responsibility to make sure that the fragment
2223 cannot be strictly smaller in some cases and strictly larger
2225 gcc_checking_assert (ordered_p (bytepos
+ bytelen
, ssize
));
2226 if (known_size_p (ssize
) && maybe_gt (bytepos
+ bytelen
, ssize
))
2228 /* Arrange to shift the fragment to where it belongs.
2229 extract_bit_field loads to the lsb of the reg. */
2231 #ifdef BLOCK_REG_PADDING
2232 BLOCK_REG_PADDING (GET_MODE (orig_src
), type
, i
== start
)
2233 == (BYTES_BIG_ENDIAN
? PAD_UPWARD
: PAD_DOWNWARD
)
2238 shift
= (bytelen
- (ssize
- bytepos
)) * BITS_PER_UNIT
;
2239 bytelen
= ssize
- bytepos
;
2240 gcc_assert (maybe_gt (bytelen
, 0));
2243 /* If we won't be loading directly from memory, protect the real source
2244 from strange tricks we might play; but make sure that the source can
2245 be loaded directly into the destination. */
2247 if (!MEM_P (orig_src
)
2248 && (!CONSTANT_P (orig_src
)
2249 || (GET_MODE (orig_src
) != mode
2250 && GET_MODE (orig_src
) != VOIDmode
)))
2252 if (GET_MODE (orig_src
) == VOIDmode
)
2253 src
= gen_reg_rtx (mode
);
2255 src
= gen_reg_rtx (GET_MODE (orig_src
));
2257 emit_move_insn (src
, orig_src
);
2260 /* Optimize the access just a bit. */
2262 && (! targetm
.slow_unaligned_access (mode
, MEM_ALIGN (src
))
2263 || MEM_ALIGN (src
) >= GET_MODE_ALIGNMENT (mode
))
2264 && multiple_p (bytepos
* BITS_PER_UNIT
, GET_MODE_ALIGNMENT (mode
))
2265 && known_eq (bytelen
, GET_MODE_SIZE (mode
)))
2267 tmps
[i
] = gen_reg_rtx (mode
);
2268 emit_move_insn (tmps
[i
], adjust_address (src
, mode
, bytepos
));
2270 else if (COMPLEX_MODE_P (mode
)
2271 && GET_MODE (src
) == mode
2272 && known_eq (bytelen
, GET_MODE_SIZE (mode
)))
2273 /* Let emit_move_complex do the bulk of the work. */
2275 else if (GET_CODE (src
) == CONCAT
)
2277 poly_int64 slen
= GET_MODE_SIZE (GET_MODE (src
));
2278 poly_int64 slen0
= GET_MODE_SIZE (GET_MODE (XEXP (src
, 0)));
2282 if (can_div_trunc_p (bytepos
, slen0
, &elt
, &subpos
)
2283 && known_le (subpos
+ bytelen
, slen0
))
2285 /* The following assumes that the concatenated objects all
2286 have the same size. In this case, a simple calculation
2287 can be used to determine the object and the bit field
2289 tmps
[i
] = XEXP (src
, elt
);
2290 if (maybe_ne (subpos
, 0)
2291 || maybe_ne (subpos
+ bytelen
, slen0
)
2292 || (!CONSTANT_P (tmps
[i
])
2293 && (!REG_P (tmps
[i
]) || GET_MODE (tmps
[i
]) != mode
)))
2294 tmps
[i
] = extract_bit_field (tmps
[i
], bytelen
* BITS_PER_UNIT
,
2295 subpos
* BITS_PER_UNIT
,
2296 1, NULL_RTX
, mode
, mode
, false,
2303 gcc_assert (known_eq (bytepos
, 0));
2304 mem
= assign_stack_temp (GET_MODE (src
), slen
);
2305 emit_move_insn (mem
, src
);
2306 tmps
[i
] = extract_bit_field (mem
, bytelen
* BITS_PER_UNIT
,
2307 0, 1, NULL_RTX
, mode
, mode
, false,
2311 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
2312 SIMD register, which is currently broken. While we get GCC
2313 to emit proper RTL for these cases, let's dump to memory. */
2314 else if (VECTOR_MODE_P (GET_MODE (dst
))
2317 poly_uint64 slen
= GET_MODE_SIZE (GET_MODE (src
));
2320 mem
= assign_stack_temp (GET_MODE (src
), slen
);
2321 emit_move_insn (mem
, src
);
2322 tmps
[i
] = adjust_address (mem
, mode
, bytepos
);
2324 else if (CONSTANT_P (src
) && GET_MODE (dst
) != BLKmode
2325 && XVECLEN (dst
, 0) > 1)
2326 tmps
[i
] = simplify_gen_subreg (mode
, src
, GET_MODE (dst
), bytepos
);
2327 else if (CONSTANT_P (src
))
2329 if (known_eq (bytelen
, ssize
))
2335 /* TODO: const_wide_int can have sizes other than this... */
2336 gcc_assert (known_eq (2 * bytelen
, ssize
));
2337 split_double (src
, &first
, &second
);
2344 else if (REG_P (src
) && GET_MODE (src
) == mode
)
2347 tmps
[i
] = extract_bit_field (src
, bytelen
* BITS_PER_UNIT
,
2348 bytepos
* BITS_PER_UNIT
, 1, NULL_RTX
,
2349 mode
, mode
, false, NULL
);
2351 if (maybe_ne (shift
, 0))
2352 tmps
[i
] = expand_shift (LSHIFT_EXPR
, mode
, tmps
[i
],
2357 /* Emit code to move a block SRC of type TYPE to a block DST,
2358 where DST is non-consecutive registers represented by a PARALLEL.
2359 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
2363 emit_group_load (rtx dst
, rtx src
, tree type
, poly_int64 ssize
)
2368 tmps
= XALLOCAVEC (rtx
, XVECLEN (dst
, 0));
2369 emit_group_load_1 (tmps
, dst
, src
, type
, ssize
);
2371 /* Copy the extracted pieces into the proper (probable) hard regs. */
2372 for (i
= 0; i
< XVECLEN (dst
, 0); i
++)
2374 rtx d
= XEXP (XVECEXP (dst
, 0, i
), 0);
2377 emit_move_insn (d
, tmps
[i
]);
2381 /* Similar, but load SRC into new pseudos in a format that looks like
2382 PARALLEL. This can later be fed to emit_group_move to get things
2383 in the right place. */
2386 emit_group_load_into_temps (rtx parallel
, rtx src
, tree type
, poly_int64 ssize
)
2391 vec
= rtvec_alloc (XVECLEN (parallel
, 0));
2392 emit_group_load_1 (&RTVEC_ELT (vec
, 0), parallel
, src
, type
, ssize
);
2394 /* Convert the vector to look just like the original PARALLEL, except
2395 with the computed values. */
2396 for (i
= 0; i
< XVECLEN (parallel
, 0); i
++)
2398 rtx e
= XVECEXP (parallel
, 0, i
);
2399 rtx d
= XEXP (e
, 0);
2403 d
= force_reg (GET_MODE (d
), RTVEC_ELT (vec
, i
));
2404 e
= alloc_EXPR_LIST (REG_NOTE_KIND (e
), d
, XEXP (e
, 1));
2406 RTVEC_ELT (vec
, i
) = e
;
2409 return gen_rtx_PARALLEL (GET_MODE (parallel
), vec
);
2412 /* Emit code to move a block SRC to block DST, where SRC and DST are
2413 non-consecutive groups of registers, each represented by a PARALLEL. */
2416 emit_group_move (rtx dst
, rtx src
)
2420 gcc_assert (GET_CODE (src
) == PARALLEL
2421 && GET_CODE (dst
) == PARALLEL
2422 && XVECLEN (src
, 0) == XVECLEN (dst
, 0));
2424 /* Skip first entry if NULL. */
2425 for (i
= XEXP (XVECEXP (src
, 0, 0), 0) ? 0 : 1; i
< XVECLEN (src
, 0); i
++)
2426 emit_move_insn (XEXP (XVECEXP (dst
, 0, i
), 0),
2427 XEXP (XVECEXP (src
, 0, i
), 0));
2430 /* Move a group of registers represented by a PARALLEL into pseudos. */
2433 emit_group_move_into_temps (rtx src
)
2435 rtvec vec
= rtvec_alloc (XVECLEN (src
, 0));
2438 for (i
= 0; i
< XVECLEN (src
, 0); i
++)
2440 rtx e
= XVECEXP (src
, 0, i
);
2441 rtx d
= XEXP (e
, 0);
2444 e
= alloc_EXPR_LIST (REG_NOTE_KIND (e
), copy_to_reg (d
), XEXP (e
, 1));
2445 RTVEC_ELT (vec
, i
) = e
;
2448 return gen_rtx_PARALLEL (GET_MODE (src
), vec
);
2451 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
2452 where SRC is non-consecutive registers represented by a PARALLEL.
2453 SSIZE represents the total size of block ORIG_DST, or -1 if not
2457 emit_group_store (rtx orig_dst
, rtx src
, tree type ATTRIBUTE_UNUSED
,
2461 int start
, finish
, i
;
2462 machine_mode m
= GET_MODE (orig_dst
);
2464 gcc_assert (GET_CODE (src
) == PARALLEL
);
2466 if (!SCALAR_INT_MODE_P (m
)
2467 && !MEM_P (orig_dst
) && GET_CODE (orig_dst
) != CONCAT
)
2469 scalar_int_mode imode
;
2470 if (int_mode_for_mode (GET_MODE (orig_dst
)).exists (&imode
))
2472 dst
= gen_reg_rtx (imode
);
2473 emit_group_store (dst
, src
, type
, ssize
);
2474 dst
= gen_lowpart (GET_MODE (orig_dst
), dst
);
2478 dst
= assign_stack_temp (GET_MODE (orig_dst
), ssize
);
2479 emit_group_store (dst
, src
, type
, ssize
);
2481 emit_move_insn (orig_dst
, dst
);
2485 /* Check for a NULL entry, used to indicate that the parameter goes
2486 both on the stack and in registers. */
2487 if (XEXP (XVECEXP (src
, 0, 0), 0))
2491 finish
= XVECLEN (src
, 0);
2493 tmps
= XALLOCAVEC (rtx
, finish
);
2495 /* Copy the (probable) hard regs into pseudos. */
2496 for (i
= start
; i
< finish
; i
++)
2498 rtx reg
= XEXP (XVECEXP (src
, 0, i
), 0);
2499 if (!REG_P (reg
) || REGNO (reg
) < FIRST_PSEUDO_REGISTER
)
2501 tmps
[i
] = gen_reg_rtx (GET_MODE (reg
));
2502 emit_move_insn (tmps
[i
], reg
);
2508 /* If we won't be storing directly into memory, protect the real destination
2509 from strange tricks we might play. */
2511 if (GET_CODE (dst
) == PARALLEL
)
2515 /* We can get a PARALLEL dst if there is a conditional expression in
2516 a return statement. In that case, the dst and src are the same,
2517 so no action is necessary. */
2518 if (rtx_equal_p (dst
, src
))
2521 /* It is unclear if we can ever reach here, but we may as well handle
2522 it. Allocate a temporary, and split this into a store/load to/from
2524 temp
= assign_stack_temp (GET_MODE (dst
), ssize
);
2525 emit_group_store (temp
, src
, type
, ssize
);
2526 emit_group_load (dst
, temp
, type
, ssize
);
2529 else if (!MEM_P (dst
) && GET_CODE (dst
) != CONCAT
)
2531 machine_mode outer
= GET_MODE (dst
);
2537 if (!REG_P (dst
) || REGNO (dst
) < FIRST_PSEUDO_REGISTER
)
2538 dst
= gen_reg_rtx (outer
);
2540 /* Make life a bit easier for combine. */
2541 /* If the first element of the vector is the low part
2542 of the destination mode, use a paradoxical subreg to
2543 initialize the destination. */
2546 inner
= GET_MODE (tmps
[start
]);
2547 bytepos
= subreg_lowpart_offset (inner
, outer
);
2548 if (known_eq (rtx_to_poly_int64 (XEXP (XVECEXP (src
, 0, start
), 1)),
2551 temp
= simplify_gen_subreg (outer
, tmps
[start
],
2555 emit_move_insn (dst
, temp
);
2562 /* If the first element wasn't the low part, try the last. */
2564 && start
< finish
- 1)
2566 inner
= GET_MODE (tmps
[finish
- 1]);
2567 bytepos
= subreg_lowpart_offset (inner
, outer
);
2568 if (known_eq (rtx_to_poly_int64 (XEXP (XVECEXP (src
, 0,
2572 temp
= simplify_gen_subreg (outer
, tmps
[finish
- 1],
2576 emit_move_insn (dst
, temp
);
2583 /* Otherwise, simply initialize the result to zero. */
2585 emit_move_insn (dst
, CONST0_RTX (outer
));
2588 /* Process the pieces. */
2589 for (i
= start
; i
< finish
; i
++)
2591 poly_int64 bytepos
= rtx_to_poly_int64 (XEXP (XVECEXP (src
, 0, i
), 1));
2592 machine_mode mode
= GET_MODE (tmps
[i
]);
2593 poly_int64 bytelen
= GET_MODE_SIZE (mode
);
2594 poly_uint64 adj_bytelen
;
2597 /* Handle trailing fragments that run over the size of the struct.
2598 It's the target's responsibility to make sure that the fragment
2599 cannot be strictly smaller in some cases and strictly larger
2601 gcc_checking_assert (ordered_p (bytepos
+ bytelen
, ssize
));
2602 if (known_size_p (ssize
) && maybe_gt (bytepos
+ bytelen
, ssize
))
2603 adj_bytelen
= ssize
- bytepos
;
2605 adj_bytelen
= bytelen
;
2607 if (GET_CODE (dst
) == CONCAT
)
2609 if (known_le (bytepos
+ adj_bytelen
,
2610 GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)))))
2611 dest
= XEXP (dst
, 0);
2612 else if (known_ge (bytepos
, GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)))))
2614 bytepos
-= GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)));
2615 dest
= XEXP (dst
, 1);
2619 machine_mode dest_mode
= GET_MODE (dest
);
2620 machine_mode tmp_mode
= GET_MODE (tmps
[i
]);
2622 gcc_assert (known_eq (bytepos
, 0) && XVECLEN (src
, 0));
2624 if (GET_MODE_ALIGNMENT (dest_mode
)
2625 >= GET_MODE_ALIGNMENT (tmp_mode
))
2627 dest
= assign_stack_temp (dest_mode
,
2628 GET_MODE_SIZE (dest_mode
));
2629 emit_move_insn (adjust_address (dest
,
2637 dest
= assign_stack_temp (tmp_mode
,
2638 GET_MODE_SIZE (tmp_mode
));
2639 emit_move_insn (dest
, tmps
[i
]);
2640 dst
= adjust_address (dest
, dest_mode
, bytepos
);
2646 /* Handle trailing fragments that run over the size of the struct. */
2647 if (known_size_p (ssize
) && maybe_gt (bytepos
+ bytelen
, ssize
))
2649 /* store_bit_field always takes its value from the lsb.
2650 Move the fragment to the lsb if it's not already there. */
2652 #ifdef BLOCK_REG_PADDING
2653 BLOCK_REG_PADDING (GET_MODE (orig_dst
), type
, i
== start
)
2654 == (BYTES_BIG_ENDIAN
? PAD_UPWARD
: PAD_DOWNWARD
)
2660 poly_int64 shift
= (bytelen
- (ssize
- bytepos
)) * BITS_PER_UNIT
;
2661 tmps
[i
] = expand_shift (RSHIFT_EXPR
, mode
, tmps
[i
],
2665 /* Make sure not to write past the end of the struct. */
2666 store_bit_field (dest
,
2667 adj_bytelen
* BITS_PER_UNIT
, bytepos
* BITS_PER_UNIT
,
2668 bytepos
* BITS_PER_UNIT
, ssize
* BITS_PER_UNIT
- 1,
2669 VOIDmode
, tmps
[i
], false);
2672 /* Optimize the access just a bit. */
2673 else if (MEM_P (dest
)
2674 && (!targetm
.slow_unaligned_access (mode
, MEM_ALIGN (dest
))
2675 || MEM_ALIGN (dest
) >= GET_MODE_ALIGNMENT (mode
))
2676 && multiple_p (bytepos
* BITS_PER_UNIT
,
2677 GET_MODE_ALIGNMENT (mode
))
2678 && known_eq (bytelen
, GET_MODE_SIZE (mode
)))
2679 emit_move_insn (adjust_address (dest
, mode
, bytepos
), tmps
[i
]);
2682 store_bit_field (dest
, bytelen
* BITS_PER_UNIT
, bytepos
* BITS_PER_UNIT
,
2683 0, 0, mode
, tmps
[i
], false);
2686 /* Copy from the pseudo into the (probable) hard reg. */
2687 if (orig_dst
!= dst
)
2688 emit_move_insn (orig_dst
, dst
);
2691 /* Return a form of X that does not use a PARALLEL. TYPE is the type
2692 of the value stored in X. */
2695 maybe_emit_group_store (rtx x
, tree type
)
2697 machine_mode mode
= TYPE_MODE (type
);
2698 gcc_checking_assert (GET_MODE (x
) == VOIDmode
|| GET_MODE (x
) == mode
);
2699 if (GET_CODE (x
) == PARALLEL
)
2701 rtx result
= gen_reg_rtx (mode
);
2702 emit_group_store (result
, x
, type
, int_size_in_bytes (type
));
2708 /* Copy a BLKmode object of TYPE out of a register SRCREG into TARGET.
2710 This is used on targets that return BLKmode values in registers. */
2713 copy_blkmode_from_reg (rtx target
, rtx srcreg
, tree type
)
2715 unsigned HOST_WIDE_INT bytes
= int_size_in_bytes (type
);
2716 rtx src
= NULL
, dst
= NULL
;
2717 unsigned HOST_WIDE_INT bitsize
= MIN (TYPE_ALIGN (type
), BITS_PER_WORD
);
2718 unsigned HOST_WIDE_INT bitpos
, xbitpos
, padding_correction
= 0;
2719 /* No current ABI uses variable-sized modes to pass a BLKmnode type. */
2720 fixed_size_mode mode
= as_a
<fixed_size_mode
> (GET_MODE (srcreg
));
2721 fixed_size_mode tmode
= as_a
<fixed_size_mode
> (GET_MODE (target
));
2722 fixed_size_mode copy_mode
;
2724 /* BLKmode registers created in the back-end shouldn't have survived. */
2725 gcc_assert (mode
!= BLKmode
);
2727 /* If the structure doesn't take up a whole number of words, see whether
2728 SRCREG is padded on the left or on the right. If it's on the left,
2729 set PADDING_CORRECTION to the number of bits to skip.
2731 In most ABIs, the structure will be returned at the least end of
2732 the register, which translates to right padding on little-endian
2733 targets and left padding on big-endian targets. The opposite
2734 holds if the structure is returned at the most significant
2735 end of the register. */
2736 if (bytes
% UNITS_PER_WORD
!= 0
2737 && (targetm
.calls
.return_in_msb (type
)
2739 : BYTES_BIG_ENDIAN
))
2741 = (BITS_PER_WORD
- ((bytes
% UNITS_PER_WORD
) * BITS_PER_UNIT
));
2743 /* We can use a single move if we have an exact mode for the size. */
2744 else if (MEM_P (target
)
2745 && (!targetm
.slow_unaligned_access (mode
, MEM_ALIGN (target
))
2746 || MEM_ALIGN (target
) >= GET_MODE_ALIGNMENT (mode
))
2747 && bytes
== GET_MODE_SIZE (mode
))
2749 emit_move_insn (adjust_address (target
, mode
, 0), srcreg
);
2753 /* And if we additionally have the same mode for a register. */
2754 else if (REG_P (target
)
2755 && GET_MODE (target
) == mode
2756 && bytes
== GET_MODE_SIZE (mode
))
2758 emit_move_insn (target
, srcreg
);
2762 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2763 into a new pseudo which is a full word. */
2764 if (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
2766 srcreg
= convert_to_mode (word_mode
, srcreg
, TYPE_UNSIGNED (type
));
2770 /* Copy the structure BITSIZE bits at a time. If the target lives in
2771 memory, take care of not reading/writing past its end by selecting
2772 a copy mode suited to BITSIZE. This should always be possible given
2775 If the target lives in register, make sure not to select a copy mode
2776 larger than the mode of the register.
2778 We could probably emit more efficient code for machines which do not use
2779 strict alignment, but it doesn't seem worth the effort at the current
2782 copy_mode
= word_mode
;
2785 opt_scalar_int_mode mem_mode
= int_mode_for_size (bitsize
, 1);
2786 if (mem_mode
.exists ())
2787 copy_mode
= mem_mode
.require ();
2789 else if (REG_P (target
) && GET_MODE_BITSIZE (tmode
) < BITS_PER_WORD
)
2792 for (bitpos
= 0, xbitpos
= padding_correction
;
2793 bitpos
< bytes
* BITS_PER_UNIT
;
2794 bitpos
+= bitsize
, xbitpos
+= bitsize
)
2796 /* We need a new source operand each time xbitpos is on a
2797 word boundary and when xbitpos == padding_correction
2798 (the first time through). */
2799 if (xbitpos
% BITS_PER_WORD
== 0 || xbitpos
== padding_correction
)
2800 src
= operand_subword_force (srcreg
, xbitpos
/ BITS_PER_WORD
, mode
);
2802 /* We need a new destination operand each time bitpos is on
2804 if (REG_P (target
) && GET_MODE_BITSIZE (tmode
) < BITS_PER_WORD
)
2806 else if (bitpos
% BITS_PER_WORD
== 0)
2807 dst
= operand_subword (target
, bitpos
/ BITS_PER_WORD
, 1, tmode
);
2809 /* Use xbitpos for the source extraction (right justified) and
2810 bitpos for the destination store (left justified). */
2811 store_bit_field (dst
, bitsize
, bitpos
% BITS_PER_WORD
, 0, 0, copy_mode
,
2812 extract_bit_field (src
, bitsize
,
2813 xbitpos
% BITS_PER_WORD
, 1,
2814 NULL_RTX
, copy_mode
, copy_mode
,
2820 /* Copy BLKmode value SRC into a register of mode MODE_IN. Return the
2821 register if it contains any data, otherwise return null.
2823 This is used on targets that return BLKmode values in registers. */
2826 copy_blkmode_to_reg (machine_mode mode_in
, tree src
)
2829 unsigned HOST_WIDE_INT bitpos
, xbitpos
, padding_correction
= 0, bytes
;
2830 unsigned int bitsize
;
2831 rtx
*dst_words
, dst
, x
, src_word
= NULL_RTX
, dst_word
= NULL_RTX
;
2832 /* No current ABI uses variable-sized modes to pass a BLKmnode type. */
2833 fixed_size_mode mode
= as_a
<fixed_size_mode
> (mode_in
);
2834 fixed_size_mode dst_mode
;
2835 scalar_int_mode min_mode
;
2837 gcc_assert (TYPE_MODE (TREE_TYPE (src
)) == BLKmode
);
2839 x
= expand_normal (src
);
2841 bytes
= arg_int_size_in_bytes (TREE_TYPE (src
));
2845 /* If the structure doesn't take up a whole number of words, see
2846 whether the register value should be padded on the left or on
2847 the right. Set PADDING_CORRECTION to the number of padding
2848 bits needed on the left side.
2850 In most ABIs, the structure will be returned at the least end of
2851 the register, which translates to right padding on little-endian
2852 targets and left padding on big-endian targets. The opposite
2853 holds if the structure is returned at the most significant
2854 end of the register. */
2855 if (bytes
% UNITS_PER_WORD
!= 0
2856 && (targetm
.calls
.return_in_msb (TREE_TYPE (src
))
2858 : BYTES_BIG_ENDIAN
))
2859 padding_correction
= (BITS_PER_WORD
- ((bytes
% UNITS_PER_WORD
)
2862 n_regs
= (bytes
+ UNITS_PER_WORD
- 1) / UNITS_PER_WORD
;
2863 dst_words
= XALLOCAVEC (rtx
, n_regs
);
2864 bitsize
= MIN (TYPE_ALIGN (TREE_TYPE (src
)), BITS_PER_WORD
);
2865 min_mode
= smallest_int_mode_for_size (bitsize
);
2867 /* Copy the structure BITSIZE bits at a time. */
2868 for (bitpos
= 0, xbitpos
= padding_correction
;
2869 bitpos
< bytes
* BITS_PER_UNIT
;
2870 bitpos
+= bitsize
, xbitpos
+= bitsize
)
2872 /* We need a new destination pseudo each time xbitpos is
2873 on a word boundary and when xbitpos == padding_correction
2874 (the first time through). */
2875 if (xbitpos
% BITS_PER_WORD
== 0
2876 || xbitpos
== padding_correction
)
2878 /* Generate an appropriate register. */
2879 dst_word
= gen_reg_rtx (word_mode
);
2880 dst_words
[xbitpos
/ BITS_PER_WORD
] = dst_word
;
2882 /* Clear the destination before we move anything into it. */
2883 emit_move_insn (dst_word
, CONST0_RTX (word_mode
));
2886 /* Find the largest integer mode that can be used to copy all or as
2887 many bits as possible of the structure if the target supports larger
2888 copies. There are too many corner cases here w.r.t to alignments on
2889 the read/writes. So if there is any padding just use single byte
2891 opt_scalar_int_mode mode_iter
;
2892 if (padding_correction
== 0 && !STRICT_ALIGNMENT
)
2894 FOR_EACH_MODE_FROM (mode_iter
, min_mode
)
2896 unsigned int msize
= GET_MODE_BITSIZE (mode_iter
.require ());
2897 if (msize
<= ((bytes
* BITS_PER_UNIT
) - bitpos
)
2898 && msize
<= BITS_PER_WORD
)
2905 /* We need a new source operand each time bitpos is on a word
2907 if (bitpos
% BITS_PER_WORD
== 0)
2908 src_word
= operand_subword_force (x
, bitpos
/ BITS_PER_WORD
, BLKmode
);
2910 /* Use bitpos for the source extraction (left justified) and
2911 xbitpos for the destination store (right justified). */
2912 store_bit_field (dst_word
, bitsize
, xbitpos
% BITS_PER_WORD
,
2914 extract_bit_field (src_word
, bitsize
,
2915 bitpos
% BITS_PER_WORD
, 1,
2916 NULL_RTX
, word_mode
, word_mode
,
2921 if (mode
== BLKmode
)
2923 /* Find the smallest integer mode large enough to hold the
2924 entire structure. */
2925 opt_scalar_int_mode mode_iter
;
2926 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
2927 if (GET_MODE_SIZE (mode_iter
.require ()) >= bytes
)
2930 /* A suitable mode should have been found. */
2931 mode
= mode_iter
.require ();
2934 if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (word_mode
))
2935 dst_mode
= word_mode
;
2938 dst
= gen_reg_rtx (dst_mode
);
2940 for (i
= 0; i
< n_regs
; i
++)
2941 emit_move_insn (operand_subword (dst
, i
, 0, dst_mode
), dst_words
[i
]);
2943 if (mode
!= dst_mode
)
2944 dst
= gen_lowpart (mode
, dst
);
2949 /* Add a USE expression for REG to the (possibly empty) list pointed
2950 to by CALL_FUSAGE. REG must denote a hard register. */
2953 use_reg_mode (rtx
*call_fusage
, rtx reg
, machine_mode mode
)
2955 gcc_assert (REG_P (reg
));
2957 if (!HARD_REGISTER_P (reg
))
2961 = gen_rtx_EXPR_LIST (mode
, gen_rtx_USE (VOIDmode
, reg
), *call_fusage
);
2964 /* Add a CLOBBER expression for REG to the (possibly empty) list pointed
2965 to by CALL_FUSAGE. REG must denote a hard register. */
2968 clobber_reg_mode (rtx
*call_fusage
, rtx reg
, machine_mode mode
)
2970 gcc_assert (REG_P (reg
) && REGNO (reg
) < FIRST_PSEUDO_REGISTER
);
2973 = gen_rtx_EXPR_LIST (mode
, gen_rtx_CLOBBER (VOIDmode
, reg
), *call_fusage
);
2976 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2977 starting at REGNO. All of these registers must be hard registers. */
2980 use_regs (rtx
*call_fusage
, int regno
, int nregs
)
2984 gcc_assert (regno
+ nregs
<= FIRST_PSEUDO_REGISTER
);
2986 for (i
= 0; i
< nregs
; i
++)
2987 use_reg (call_fusage
, regno_reg_rtx
[regno
+ i
]);
2990 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2991 PARALLEL REGS. This is for calls that pass values in multiple
2992 non-contiguous locations. The Irix 6 ABI has examples of this. */
2995 use_group_regs (rtx
*call_fusage
, rtx regs
)
2999 for (i
= 0; i
< XVECLEN (regs
, 0); i
++)
3001 rtx reg
= XEXP (XVECEXP (regs
, 0, i
), 0);
3003 /* A NULL entry means the parameter goes both on the stack and in
3004 registers. This can also be a MEM for targets that pass values
3005 partially on the stack and partially in registers. */
3006 if (reg
!= 0 && REG_P (reg
))
3007 use_reg (call_fusage
, reg
);
3011 /* Return the defining gimple statement for SSA_NAME NAME if it is an
3012 assigment and the code of the expresion on the RHS is CODE. Return
3016 get_def_for_expr (tree name
, enum tree_code code
)
3020 if (TREE_CODE (name
) != SSA_NAME
)
3023 def_stmt
= get_gimple_for_ssa_name (name
);
3025 || gimple_assign_rhs_code (def_stmt
) != code
)
3031 /* Return the defining gimple statement for SSA_NAME NAME if it is an
3032 assigment and the class of the expresion on the RHS is CLASS. Return
3036 get_def_for_expr_class (tree name
, enum tree_code_class tclass
)
3040 if (TREE_CODE (name
) != SSA_NAME
)
3043 def_stmt
= get_gimple_for_ssa_name (name
);
3045 || TREE_CODE_CLASS (gimple_assign_rhs_code (def_stmt
)) != tclass
)
3051 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
3052 its length in bytes. */
3055 clear_storage_hints (rtx object
, rtx size
, enum block_op_methods method
,
3056 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
3057 unsigned HOST_WIDE_INT min_size
,
3058 unsigned HOST_WIDE_INT max_size
,
3059 unsigned HOST_WIDE_INT probable_max_size
)
3061 machine_mode mode
= GET_MODE (object
);
3064 gcc_assert (method
== BLOCK_OP_NORMAL
|| method
== BLOCK_OP_TAILCALL
);
3066 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
3067 just move a zero. Otherwise, do this a piece at a time. */
3068 poly_int64 size_val
;
3070 && poly_int_rtx_p (size
, &size_val
)
3071 && known_eq (size_val
, GET_MODE_SIZE (mode
)))
3073 rtx zero
= CONST0_RTX (mode
);
3076 emit_move_insn (object
, zero
);
3080 if (COMPLEX_MODE_P (mode
))
3082 zero
= CONST0_RTX (GET_MODE_INNER (mode
));
3085 write_complex_part (object
, zero
, 0);
3086 write_complex_part (object
, zero
, 1);
3092 if (size
== const0_rtx
)
3095 align
= MEM_ALIGN (object
);
3097 if (CONST_INT_P (size
)
3098 && targetm
.use_by_pieces_infrastructure_p (INTVAL (size
), align
,
3100 optimize_insn_for_speed_p ()))
3101 clear_by_pieces (object
, INTVAL (size
), align
);
3102 else if (set_storage_via_setmem (object
, size
, const0_rtx
, align
,
3103 expected_align
, expected_size
,
3104 min_size
, max_size
, probable_max_size
))
3106 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object
)))
3107 return set_storage_via_libcall (object
, size
, const0_rtx
,
3108 method
== BLOCK_OP_TAILCALL
);
3116 clear_storage (rtx object
, rtx size
, enum block_op_methods method
)
3118 unsigned HOST_WIDE_INT max
, min
= 0;
3119 if (GET_CODE (size
) == CONST_INT
)
3120 min
= max
= UINTVAL (size
);
3122 max
= GET_MODE_MASK (GET_MODE (size
));
3123 return clear_storage_hints (object
, size
, method
, 0, -1, min
, max
, max
);
3127 /* A subroutine of clear_storage. Expand a call to memset.
3128 Return the return value of memset, 0 otherwise. */
3131 set_storage_via_libcall (rtx object
, rtx size
, rtx val
, bool tailcall
)
3133 tree call_expr
, fn
, object_tree
, size_tree
, val_tree
;
3134 machine_mode size_mode
;
3136 object
= copy_addr_to_reg (XEXP (object
, 0));
3137 object_tree
= make_tree (ptr_type_node
, object
);
3139 if (!CONST_INT_P (val
))
3140 val
= convert_to_mode (TYPE_MODE (integer_type_node
), val
, 1);
3141 val_tree
= make_tree (integer_type_node
, val
);
3143 size_mode
= TYPE_MODE (sizetype
);
3144 size
= convert_to_mode (size_mode
, size
, 1);
3145 size
= copy_to_mode_reg (size_mode
, size
);
3146 size_tree
= make_tree (sizetype
, size
);
3148 /* It is incorrect to use the libcall calling conventions for calls to
3149 memset because it can be provided by the user. */
3150 fn
= builtin_decl_implicit (BUILT_IN_MEMSET
);
3151 call_expr
= build_call_expr (fn
, 3, object_tree
, val_tree
, size_tree
);
3152 CALL_EXPR_TAILCALL (call_expr
) = tailcall
;
3154 return expand_call (call_expr
, NULL_RTX
, false);
3157 /* Expand a setmem pattern; return true if successful. */
3160 set_storage_via_setmem (rtx object
, rtx size
, rtx val
, unsigned int align
,
3161 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
3162 unsigned HOST_WIDE_INT min_size
,
3163 unsigned HOST_WIDE_INT max_size
,
3164 unsigned HOST_WIDE_INT probable_max_size
)
3166 /* Try the most limited insn first, because there's no point
3167 including more than one in the machine description unless
3168 the more limited one has some advantage. */
3170 if (expected_align
< align
)
3171 expected_align
= align
;
3172 if (expected_size
!= -1)
3174 if ((unsigned HOST_WIDE_INT
)expected_size
> max_size
)
3175 expected_size
= max_size
;
3176 if ((unsigned HOST_WIDE_INT
)expected_size
< min_size
)
3177 expected_size
= min_size
;
3180 opt_scalar_int_mode mode_iter
;
3181 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
3183 scalar_int_mode mode
= mode_iter
.require ();
3184 enum insn_code code
= direct_optab_handler (setmem_optab
, mode
);
3186 if (code
!= CODE_FOR_nothing
3187 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
3188 here because if SIZE is less than the mode mask, as it is
3189 returned by the macro, it will definitely be less than the
3190 actual mode mask. Since SIZE is within the Pmode address
3191 space, we limit MODE to Pmode. */
3192 && ((CONST_INT_P (size
)
3193 && ((unsigned HOST_WIDE_INT
) INTVAL (size
)
3194 <= (GET_MODE_MASK (mode
) >> 1)))
3195 || max_size
<= (GET_MODE_MASK (mode
) >> 1)
3196 || GET_MODE_BITSIZE (mode
) >= GET_MODE_BITSIZE (Pmode
)))
3198 class expand_operand ops
[9];
3201 nops
= insn_data
[(int) code
].n_generator_args
;
3202 gcc_assert (nops
== 4 || nops
== 6 || nops
== 8 || nops
== 9);
3204 create_fixed_operand (&ops
[0], object
);
3205 /* The check above guarantees that this size conversion is valid. */
3206 create_convert_operand_to (&ops
[1], size
, mode
, true);
3207 create_convert_operand_from (&ops
[2], val
, byte_mode
, true);
3208 create_integer_operand (&ops
[3], align
/ BITS_PER_UNIT
);
3211 create_integer_operand (&ops
[4], expected_align
/ BITS_PER_UNIT
);
3212 create_integer_operand (&ops
[5], expected_size
);
3216 create_integer_operand (&ops
[6], min_size
);
3217 /* If we cannot represent the maximal size,
3218 make parameter NULL. */
3219 if ((HOST_WIDE_INT
) max_size
!= -1)
3220 create_integer_operand (&ops
[7], max_size
);
3222 create_fixed_operand (&ops
[7], NULL
);
3226 /* If we cannot represent the maximal size,
3227 make parameter NULL. */
3228 if ((HOST_WIDE_INT
) probable_max_size
!= -1)
3229 create_integer_operand (&ops
[8], probable_max_size
);
3231 create_fixed_operand (&ops
[8], NULL
);
3233 if (maybe_expand_insn (code
, nops
, ops
))
3242 /* Write to one of the components of the complex value CPLX. Write VAL to
3243 the real part if IMAG_P is false, and the imaginary part if its true. */
3246 write_complex_part (rtx cplx
, rtx val
, bool imag_p
)
3252 if (GET_CODE (cplx
) == CONCAT
)
3254 emit_move_insn (XEXP (cplx
, imag_p
), val
);
3258 cmode
= GET_MODE (cplx
);
3259 imode
= GET_MODE_INNER (cmode
);
3260 ibitsize
= GET_MODE_BITSIZE (imode
);
3262 /* For MEMs simplify_gen_subreg may generate an invalid new address
3263 because, e.g., the original address is considered mode-dependent
3264 by the target, which restricts simplify_subreg from invoking
3265 adjust_address_nv. Instead of preparing fallback support for an
3266 invalid address, we call adjust_address_nv directly. */
3269 emit_move_insn (adjust_address_nv (cplx
, imode
,
3270 imag_p
? GET_MODE_SIZE (imode
) : 0),
3275 /* If the sub-object is at least word sized, then we know that subregging
3276 will work. This special case is important, since store_bit_field
3277 wants to operate on integer modes, and there's rarely an OImode to
3278 correspond to TCmode. */
3279 if (ibitsize
>= BITS_PER_WORD
3280 /* For hard regs we have exact predicates. Assume we can split
3281 the original object if it spans an even number of hard regs.
3282 This special case is important for SCmode on 64-bit platforms
3283 where the natural size of floating-point regs is 32-bit. */
3285 && REGNO (cplx
) < FIRST_PSEUDO_REGISTER
3286 && REG_NREGS (cplx
) % 2 == 0))
3288 rtx part
= simplify_gen_subreg (imode
, cplx
, cmode
,
3289 imag_p
? GET_MODE_SIZE (imode
) : 0);
3292 emit_move_insn (part
, val
);
3296 /* simplify_gen_subreg may fail for sub-word MEMs. */
3297 gcc_assert (MEM_P (cplx
) && ibitsize
< BITS_PER_WORD
);
3300 store_bit_field (cplx
, ibitsize
, imag_p
? ibitsize
: 0, 0, 0, imode
, val
,
3304 /* Extract one of the components of the complex value CPLX. Extract the
3305 real part if IMAG_P is false, and the imaginary part if it's true. */
3308 read_complex_part (rtx cplx
, bool imag_p
)
3314 if (GET_CODE (cplx
) == CONCAT
)
3315 return XEXP (cplx
, imag_p
);
3317 cmode
= GET_MODE (cplx
);
3318 imode
= GET_MODE_INNER (cmode
);
3319 ibitsize
= GET_MODE_BITSIZE (imode
);
3321 /* Special case reads from complex constants that got spilled to memory. */
3322 if (MEM_P (cplx
) && GET_CODE (XEXP (cplx
, 0)) == SYMBOL_REF
)
3324 tree decl
= SYMBOL_REF_DECL (XEXP (cplx
, 0));
3325 if (decl
&& TREE_CODE (decl
) == COMPLEX_CST
)
3327 tree part
= imag_p
? TREE_IMAGPART (decl
) : TREE_REALPART (decl
);
3328 if (CONSTANT_CLASS_P (part
))
3329 return expand_expr (part
, NULL_RTX
, imode
, EXPAND_NORMAL
);
3333 /* For MEMs simplify_gen_subreg may generate an invalid new address
3334 because, e.g., the original address is considered mode-dependent
3335 by the target, which restricts simplify_subreg from invoking
3336 adjust_address_nv. Instead of preparing fallback support for an
3337 invalid address, we call adjust_address_nv directly. */
3339 return adjust_address_nv (cplx
, imode
,
3340 imag_p
? GET_MODE_SIZE (imode
) : 0);
3342 /* If the sub-object is at least word sized, then we know that subregging
3343 will work. This special case is important, since extract_bit_field
3344 wants to operate on integer modes, and there's rarely an OImode to
3345 correspond to TCmode. */
3346 if (ibitsize
>= BITS_PER_WORD
3347 /* For hard regs we have exact predicates. Assume we can split
3348 the original object if it spans an even number of hard regs.
3349 This special case is important for SCmode on 64-bit platforms
3350 where the natural size of floating-point regs is 32-bit. */
3352 && REGNO (cplx
) < FIRST_PSEUDO_REGISTER
3353 && REG_NREGS (cplx
) % 2 == 0))
3355 rtx ret
= simplify_gen_subreg (imode
, cplx
, cmode
,
3356 imag_p
? GET_MODE_SIZE (imode
) : 0);
3360 /* simplify_gen_subreg may fail for sub-word MEMs. */
3361 gcc_assert (MEM_P (cplx
) && ibitsize
< BITS_PER_WORD
);
3364 return extract_bit_field (cplx
, ibitsize
, imag_p
? ibitsize
: 0,
3365 true, NULL_RTX
, imode
, imode
, false, NULL
);
3368 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
3369 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
3370 represented in NEW_MODE. If FORCE is true, this will never happen, as
3371 we'll force-create a SUBREG if needed. */
3374 emit_move_change_mode (machine_mode new_mode
,
3375 machine_mode old_mode
, rtx x
, bool force
)
3379 if (push_operand (x
, GET_MODE (x
)))
3381 ret
= gen_rtx_MEM (new_mode
, XEXP (x
, 0));
3382 MEM_COPY_ATTRIBUTES (ret
, x
);
3386 /* We don't have to worry about changing the address since the
3387 size in bytes is supposed to be the same. */
3388 if (reload_in_progress
)
3390 /* Copy the MEM to change the mode and move any
3391 substitutions from the old MEM to the new one. */
3392 ret
= adjust_address_nv (x
, new_mode
, 0);
3393 copy_replacements (x
, ret
);
3396 ret
= adjust_address (x
, new_mode
, 0);
3400 /* Note that we do want simplify_subreg's behavior of validating
3401 that the new mode is ok for a hard register. If we were to use
3402 simplify_gen_subreg, we would create the subreg, but would
3403 probably run into the target not being able to implement it. */
3404 /* Except, of course, when FORCE is true, when this is exactly what
3405 we want. Which is needed for CCmodes on some targets. */
3407 ret
= simplify_gen_subreg (new_mode
, x
, old_mode
, 0);
3409 ret
= simplify_subreg (new_mode
, x
, old_mode
, 0);
3415 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
3416 an integer mode of the same size as MODE. Returns the instruction
3417 emitted, or NULL if such a move could not be generated. */
3420 emit_move_via_integer (machine_mode mode
, rtx x
, rtx y
, bool force
)
3422 scalar_int_mode imode
;
3423 enum insn_code code
;
3425 /* There must exist a mode of the exact size we require. */
3426 if (!int_mode_for_mode (mode
).exists (&imode
))
3429 /* The target must support moves in this mode. */
3430 code
= optab_handler (mov_optab
, imode
);
3431 if (code
== CODE_FOR_nothing
)
3434 x
= emit_move_change_mode (imode
, mode
, x
, force
);
3437 y
= emit_move_change_mode (imode
, mode
, y
, force
);
3440 return emit_insn (GEN_FCN (code
) (x
, y
));
3443 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
3444 Return an equivalent MEM that does not use an auto-increment. */
3447 emit_move_resolve_push (machine_mode mode
, rtx x
)
3449 enum rtx_code code
= GET_CODE (XEXP (x
, 0));
3452 poly_int64 adjust
= GET_MODE_SIZE (mode
);
3453 #ifdef PUSH_ROUNDING
3454 adjust
= PUSH_ROUNDING (adjust
);
3456 if (code
== PRE_DEC
|| code
== POST_DEC
)
3458 else if (code
== PRE_MODIFY
|| code
== POST_MODIFY
)
3460 rtx expr
= XEXP (XEXP (x
, 0), 1);
3462 gcc_assert (GET_CODE (expr
) == PLUS
|| GET_CODE (expr
) == MINUS
);
3463 poly_int64 val
= rtx_to_poly_int64 (XEXP (expr
, 1));
3464 if (GET_CODE (expr
) == MINUS
)
3466 gcc_assert (known_eq (adjust
, val
) || known_eq (adjust
, -val
));
3470 /* Do not use anti_adjust_stack, since we don't want to update
3471 stack_pointer_delta. */
3472 temp
= expand_simple_binop (Pmode
, PLUS
, stack_pointer_rtx
,
3473 gen_int_mode (adjust
, Pmode
), stack_pointer_rtx
,
3474 0, OPTAB_LIB_WIDEN
);
3475 if (temp
!= stack_pointer_rtx
)
3476 emit_move_insn (stack_pointer_rtx
, temp
);
3483 temp
= stack_pointer_rtx
;
3488 temp
= plus_constant (Pmode
, stack_pointer_rtx
, -adjust
);
3494 return replace_equiv_address (x
, temp
);
3497 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3498 X is known to satisfy push_operand, and MODE is known to be complex.
3499 Returns the last instruction emitted. */
3502 emit_move_complex_push (machine_mode mode
, rtx x
, rtx y
)
3504 scalar_mode submode
= GET_MODE_INNER (mode
);
3507 #ifdef PUSH_ROUNDING
3508 poly_int64 submodesize
= GET_MODE_SIZE (submode
);
3510 /* In case we output to the stack, but the size is smaller than the
3511 machine can push exactly, we need to use move instructions. */
3512 if (maybe_ne (PUSH_ROUNDING (submodesize
), submodesize
))
3514 x
= emit_move_resolve_push (mode
, x
);
3515 return emit_move_insn (x
, y
);
3519 /* Note that the real part always precedes the imag part in memory
3520 regardless of machine's endianness. */
3521 switch (GET_CODE (XEXP (x
, 0)))
3535 emit_move_insn (gen_rtx_MEM (submode
, XEXP (x
, 0)),
3536 read_complex_part (y
, imag_first
));
3537 return emit_move_insn (gen_rtx_MEM (submode
, XEXP (x
, 0)),
3538 read_complex_part (y
, !imag_first
));
3541 /* A subroutine of emit_move_complex. Perform the move from Y to X
3542 via two moves of the parts. Returns the last instruction emitted. */
3545 emit_move_complex_parts (rtx x
, rtx y
)
3547 /* Show the output dies here. This is necessary for SUBREGs
3548 of pseudos since we cannot track their lifetimes correctly;
3549 hard regs shouldn't appear here except as return values. */
3550 if (!reload_completed
&& !reload_in_progress
3551 && REG_P (x
) && !reg_overlap_mentioned_p (x
, y
))
3554 write_complex_part (x
, read_complex_part (y
, false), false);
3555 write_complex_part (x
, read_complex_part (y
, true), true);
3557 return get_last_insn ();
3560 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3561 MODE is known to be complex. Returns the last instruction emitted. */
3564 emit_move_complex (machine_mode mode
, rtx x
, rtx y
)
3568 /* Need to take special care for pushes, to maintain proper ordering
3569 of the data, and possibly extra padding. */
3570 if (push_operand (x
, mode
))
3571 return emit_move_complex_push (mode
, x
, y
);
3573 /* See if we can coerce the target into moving both values at once, except
3574 for floating point where we favor moving as parts if this is easy. */
3575 if (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
3576 && optab_handler (mov_optab
, GET_MODE_INNER (mode
)) != CODE_FOR_nothing
3578 && HARD_REGISTER_P (x
)
3579 && REG_NREGS (x
) == 1)
3581 && HARD_REGISTER_P (y
)
3582 && REG_NREGS (y
) == 1))
3584 /* Not possible if the values are inherently not adjacent. */
3585 else if (GET_CODE (x
) == CONCAT
|| GET_CODE (y
) == CONCAT
)
3587 /* Is possible if both are registers (or subregs of registers). */
3588 else if (register_operand (x
, mode
) && register_operand (y
, mode
))
3590 /* If one of the operands is a memory, and alignment constraints
3591 are friendly enough, we may be able to do combined memory operations.
3592 We do not attempt this if Y is a constant because that combination is
3593 usually better with the by-parts thing below. */
3594 else if ((MEM_P (x
) ? !CONSTANT_P (y
) : MEM_P (y
))
3595 && (!STRICT_ALIGNMENT
3596 || get_mode_alignment (mode
) == BIGGEST_ALIGNMENT
))
3605 /* For memory to memory moves, optimal behavior can be had with the
3606 existing block move logic. But use normal expansion if optimizing
3608 if (MEM_P (x
) && MEM_P (y
))
3610 emit_block_move (x
, y
, gen_int_mode (GET_MODE_SIZE (mode
), Pmode
),
3611 (optimize_insn_for_speed_p()
3612 ? BLOCK_OP_NO_LIBCALL
: BLOCK_OP_NORMAL
));
3613 return get_last_insn ();
3616 ret
= emit_move_via_integer (mode
, x
, y
, true);
3621 return emit_move_complex_parts (x
, y
);
3624 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3625 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3628 emit_move_ccmode (machine_mode mode
, rtx x
, rtx y
)
3632 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3635 enum insn_code code
= optab_handler (mov_optab
, CCmode
);
3636 if (code
!= CODE_FOR_nothing
)
3638 x
= emit_move_change_mode (CCmode
, mode
, x
, true);
3639 y
= emit_move_change_mode (CCmode
, mode
, y
, true);
3640 return emit_insn (GEN_FCN (code
) (x
, y
));
3644 /* Otherwise, find the MODE_INT mode of the same width. */
3645 ret
= emit_move_via_integer (mode
, x
, y
, false);
3646 gcc_assert (ret
!= NULL
);
3650 /* Return true if word I of OP lies entirely in the
3651 undefined bits of a paradoxical subreg. */
3654 undefined_operand_subword_p (const_rtx op
, int i
)
3656 if (GET_CODE (op
) != SUBREG
)
3658 machine_mode innermostmode
= GET_MODE (SUBREG_REG (op
));
3659 poly_int64 offset
= i
* UNITS_PER_WORD
+ subreg_memory_offset (op
);
3660 return (known_ge (offset
, GET_MODE_SIZE (innermostmode
))
3661 || known_le (offset
, -UNITS_PER_WORD
));
3664 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3665 MODE is any multi-word or full-word mode that lacks a move_insn
3666 pattern. Note that you will get better code if you define such
3667 patterns, even if they must turn into multiple assembler instructions. */
3670 emit_move_multi_word (machine_mode mode
, rtx x
, rtx y
)
3672 rtx_insn
*last_insn
= 0;
3678 /* This function can only handle cases where the number of words is
3679 known at compile time. */
3680 mode_size
= GET_MODE_SIZE (mode
).to_constant ();
3681 gcc_assert (mode_size
>= UNITS_PER_WORD
);
3683 /* If X is a push on the stack, do the push now and replace
3684 X with a reference to the stack pointer. */
3685 if (push_operand (x
, mode
))
3686 x
= emit_move_resolve_push (mode
, x
);
3688 /* If we are in reload, see if either operand is a MEM whose address
3689 is scheduled for replacement. */
3690 if (reload_in_progress
&& MEM_P (x
)
3691 && (inner
= find_replacement (&XEXP (x
, 0))) != XEXP (x
, 0))
3692 x
= replace_equiv_address_nv (x
, inner
);
3693 if (reload_in_progress
&& MEM_P (y
)
3694 && (inner
= find_replacement (&XEXP (y
, 0))) != XEXP (y
, 0))
3695 y
= replace_equiv_address_nv (y
, inner
);
3699 need_clobber
= false;
3700 for (i
= 0; i
< CEIL (mode_size
, UNITS_PER_WORD
); i
++)
3702 /* Do not generate code for a move if it would go entirely
3703 to the non-existing bits of a paradoxical subreg. */
3704 if (undefined_operand_subword_p (x
, i
))
3707 rtx xpart
= operand_subword (x
, i
, 1, mode
);
3710 /* Do not generate code for a move if it would come entirely
3711 from the undefined bits of a paradoxical subreg. */
3712 if (undefined_operand_subword_p (y
, i
))
3715 ypart
= operand_subword (y
, i
, 1, mode
);
3717 /* If we can't get a part of Y, put Y into memory if it is a
3718 constant. Otherwise, force it into a register. Then we must
3719 be able to get a part of Y. */
3720 if (ypart
== 0 && CONSTANT_P (y
))
3722 y
= use_anchored_address (force_const_mem (mode
, y
));
3723 ypart
= operand_subword (y
, i
, 1, mode
);
3725 else if (ypart
== 0)
3726 ypart
= operand_subword_force (y
, i
, mode
);
3728 gcc_assert (xpart
&& ypart
);
3730 need_clobber
|= (GET_CODE (xpart
) == SUBREG
);
3732 last_insn
= emit_move_insn (xpart
, ypart
);
3738 /* Show the output dies here. This is necessary for SUBREGs
3739 of pseudos since we cannot track their lifetimes correctly;
3740 hard regs shouldn't appear here except as return values.
3741 We never want to emit such a clobber after reload. */
3743 && ! (reload_in_progress
|| reload_completed
)
3744 && need_clobber
!= 0)
3752 /* Low level part of emit_move_insn.
3753 Called just like emit_move_insn, but assumes X and Y
3754 are basically valid. */
3757 emit_move_insn_1 (rtx x
, rtx y
)
3759 machine_mode mode
= GET_MODE (x
);
3760 enum insn_code code
;
3762 gcc_assert ((unsigned int) mode
< (unsigned int) MAX_MACHINE_MODE
);
3764 code
= optab_handler (mov_optab
, mode
);
3765 if (code
!= CODE_FOR_nothing
)
3766 return emit_insn (GEN_FCN (code
) (x
, y
));
3768 /* Expand complex moves by moving real part and imag part. */
3769 if (COMPLEX_MODE_P (mode
))
3770 return emit_move_complex (mode
, x
, y
);
3772 if (GET_MODE_CLASS (mode
) == MODE_DECIMAL_FLOAT
3773 || ALL_FIXED_POINT_MODE_P (mode
))
3775 rtx_insn
*result
= emit_move_via_integer (mode
, x
, y
, true);
3777 /* If we can't find an integer mode, use multi words. */
3781 return emit_move_multi_word (mode
, x
, y
);
3784 if (GET_MODE_CLASS (mode
) == MODE_CC
)
3785 return emit_move_ccmode (mode
, x
, y
);
3787 /* Try using a move pattern for the corresponding integer mode. This is
3788 only safe when simplify_subreg can convert MODE constants into integer
3789 constants. At present, it can only do this reliably if the value
3790 fits within a HOST_WIDE_INT. */
3792 || known_le (GET_MODE_BITSIZE (mode
), HOST_BITS_PER_WIDE_INT
))
3794 rtx_insn
*ret
= emit_move_via_integer (mode
, x
, y
, lra_in_progress
);
3798 if (! lra_in_progress
|| recog (PATTERN (ret
), ret
, 0) >= 0)
3803 return emit_move_multi_word (mode
, x
, y
);
3806 /* Generate code to copy Y into X.
3807 Both Y and X must have the same mode, except that
3808 Y can be a constant with VOIDmode.
3809 This mode cannot be BLKmode; use emit_block_move for that.
3811 Return the last instruction emitted. */
3814 emit_move_insn (rtx x
, rtx y
)
3816 machine_mode mode
= GET_MODE (x
);
3817 rtx y_cst
= NULL_RTX
;
3818 rtx_insn
*last_insn
;
3821 gcc_assert (mode
!= BLKmode
3822 && (GET_MODE (y
) == mode
|| GET_MODE (y
) == VOIDmode
));
3824 /* If we have a copy that looks like one of the following patterns:
3825 (set (subreg:M1 (reg:M2 ...)) (subreg:M1 (reg:M2 ...)))
3826 (set (subreg:M1 (reg:M2 ...)) (mem:M1 ADDR))
3827 (set (mem:M1 ADDR) (subreg:M1 (reg:M2 ...)))
3828 (set (subreg:M1 (reg:M2 ...)) (constant C))
3829 where mode M1 is equal in size to M2, try to detect whether the
3830 mode change involves an implicit round trip through memory.
3831 If so, see if we can avoid that by removing the subregs and
3832 doing the move in mode M2 instead. */
3834 rtx x_inner
= NULL_RTX
;
3835 rtx y_inner
= NULL_RTX
;
3837 auto candidate_subreg_p
= [&](rtx subreg
) {
3838 return (REG_P (SUBREG_REG (subreg
))
3839 && known_eq (GET_MODE_SIZE (GET_MODE (SUBREG_REG (subreg
))),
3840 GET_MODE_SIZE (GET_MODE (subreg
)))
3841 && optab_handler (mov_optab
, GET_MODE (SUBREG_REG (subreg
)))
3842 != CODE_FOR_nothing
);
3845 auto candidate_mem_p
= [&](machine_mode innermode
, rtx mem
) {
3846 return (!targetm
.can_change_mode_class (innermode
, GET_MODE (mem
), ALL_REGS
)
3847 && !push_operand (mem
, GET_MODE (mem
))
3848 /* Not a candiate if innermode requires too much alignment. */
3849 && (MEM_ALIGN (mem
) >= GET_MODE_ALIGNMENT (innermode
)
3850 || targetm
.slow_unaligned_access (GET_MODE (mem
),
3852 || !targetm
.slow_unaligned_access (innermode
,
3856 if (SUBREG_P (x
) && candidate_subreg_p (x
))
3857 x_inner
= SUBREG_REG (x
);
3859 if (SUBREG_P (y
) && candidate_subreg_p (y
))
3860 y_inner
= SUBREG_REG (y
);
3862 if (x_inner
!= NULL_RTX
3863 && y_inner
!= NULL_RTX
3864 && GET_MODE (x_inner
) == GET_MODE (y_inner
)
3865 && !targetm
.can_change_mode_class (GET_MODE (x_inner
), mode
, ALL_REGS
))
3869 mode
= GET_MODE (x_inner
);
3871 else if (x_inner
!= NULL_RTX
3873 && candidate_mem_p (GET_MODE (x_inner
), y
))
3876 y
= adjust_address (y
, GET_MODE (x_inner
), 0);
3877 mode
= GET_MODE (x_inner
);
3879 else if (y_inner
!= NULL_RTX
3881 && candidate_mem_p (GET_MODE (y_inner
), x
))
3883 x
= adjust_address (x
, GET_MODE (y_inner
), 0);
3885 mode
= GET_MODE (y_inner
);
3887 else if (x_inner
!= NULL_RTX
3889 && !targetm
.can_change_mode_class (GET_MODE (x_inner
),
3891 && (y_inner
= simplify_subreg (GET_MODE (x_inner
), y
, mode
, 0)))
3895 mode
= GET_MODE (x_inner
);
3901 && SCALAR_FLOAT_MODE_P (GET_MODE (x
))
3902 && (last_insn
= compress_float_constant (x
, y
)))
3907 if (!targetm
.legitimate_constant_p (mode
, y
))
3909 y
= force_const_mem (mode
, y
);
3911 /* If the target's cannot_force_const_mem prevented the spill,
3912 assume that the target's move expanders will also take care
3913 of the non-legitimate constant. */
3917 y
= use_anchored_address (y
);
3921 /* If X or Y are memory references, verify that their addresses are valid
3924 && (! memory_address_addr_space_p (GET_MODE (x
), XEXP (x
, 0),
3926 && ! push_operand (x
, GET_MODE (x
))))
3927 x
= validize_mem (x
);
3930 && ! memory_address_addr_space_p (GET_MODE (y
), XEXP (y
, 0),
3931 MEM_ADDR_SPACE (y
)))
3932 y
= validize_mem (y
);
3934 gcc_assert (mode
!= BLKmode
);
3936 last_insn
= emit_move_insn_1 (x
, y
);
3938 if (y_cst
&& REG_P (x
)
3939 && (set
= single_set (last_insn
)) != NULL_RTX
3940 && SET_DEST (set
) == x
3941 && ! rtx_equal_p (y_cst
, SET_SRC (set
)))
3942 set_unique_reg_note (last_insn
, REG_EQUAL
, copy_rtx (y_cst
));
3947 /* Generate the body of an instruction to copy Y into X.
3948 It may be a list of insns, if one insn isn't enough. */
3951 gen_move_insn (rtx x
, rtx y
)
3956 emit_move_insn_1 (x
, y
);
3962 /* If Y is representable exactly in a narrower mode, and the target can
3963 perform the extension directly from constant or memory, then emit the
3964 move as an extension. */
3967 compress_float_constant (rtx x
, rtx y
)
3969 machine_mode dstmode
= GET_MODE (x
);
3970 machine_mode orig_srcmode
= GET_MODE (y
);
3971 machine_mode srcmode
;
3972 const REAL_VALUE_TYPE
*r
;
3973 int oldcost
, newcost
;
3974 bool speed
= optimize_insn_for_speed_p ();
3976 r
= CONST_DOUBLE_REAL_VALUE (y
);
3978 if (targetm
.legitimate_constant_p (dstmode
, y
))
3979 oldcost
= set_src_cost (y
, orig_srcmode
, speed
);
3981 oldcost
= set_src_cost (force_const_mem (dstmode
, y
), dstmode
, speed
);
3983 FOR_EACH_MODE_UNTIL (srcmode
, orig_srcmode
)
3987 rtx_insn
*last_insn
;
3989 /* Skip if the target can't extend this way. */
3990 ic
= can_extend_p (dstmode
, srcmode
, 0);
3991 if (ic
== CODE_FOR_nothing
)
3994 /* Skip if the narrowed value isn't exact. */
3995 if (! exact_real_truncate (srcmode
, r
))
3998 trunc_y
= const_double_from_real_value (*r
, srcmode
);
4000 if (targetm
.legitimate_constant_p (srcmode
, trunc_y
))
4002 /* Skip if the target needs extra instructions to perform
4004 if (!insn_operand_matches (ic
, 1, trunc_y
))
4006 /* This is valid, but may not be cheaper than the original. */
4007 newcost
= set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode
, trunc_y
),
4009 if (oldcost
< newcost
)
4012 else if (float_extend_from_mem
[dstmode
][srcmode
])
4014 trunc_y
= force_const_mem (srcmode
, trunc_y
);
4015 /* This is valid, but may not be cheaper than the original. */
4016 newcost
= set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode
, trunc_y
),
4018 if (oldcost
< newcost
)
4020 trunc_y
= validize_mem (trunc_y
);
4025 /* For CSE's benefit, force the compressed constant pool entry
4026 into a new pseudo. This constant may be used in different modes,
4027 and if not, combine will put things back together for us. */
4028 trunc_y
= force_reg (srcmode
, trunc_y
);
4030 /* If x is a hard register, perform the extension into a pseudo,
4031 so that e.g. stack realignment code is aware of it. */
4033 if (REG_P (x
) && HARD_REGISTER_P (x
))
4034 target
= gen_reg_rtx (dstmode
);
4036 emit_unop_insn (ic
, target
, trunc_y
, UNKNOWN
);
4037 last_insn
= get_last_insn ();
4040 set_unique_reg_note (last_insn
, REG_EQUAL
, y
);
4043 return emit_move_insn (x
, target
);
4050 /* Pushing data onto the stack. */
4052 /* Push a block of length SIZE (perhaps variable)
4053 and return an rtx to address the beginning of the block.
4054 The value may be virtual_outgoing_args_rtx.
4056 EXTRA is the number of bytes of padding to push in addition to SIZE.
4057 BELOW nonzero means this padding comes at low addresses;
4058 otherwise, the padding comes at high addresses. */
4061 push_block (rtx size
, poly_int64 extra
, int below
)
4065 size
= convert_modes (Pmode
, ptr_mode
, size
, 1);
4066 if (CONSTANT_P (size
))
4067 anti_adjust_stack (plus_constant (Pmode
, size
, extra
));
4068 else if (REG_P (size
) && known_eq (extra
, 0))
4069 anti_adjust_stack (size
);
4072 temp
= copy_to_mode_reg (Pmode
, size
);
4073 if (maybe_ne (extra
, 0))
4074 temp
= expand_binop (Pmode
, add_optab
, temp
,
4075 gen_int_mode (extra
, Pmode
),
4076 temp
, 0, OPTAB_LIB_WIDEN
);
4077 anti_adjust_stack (temp
);
4080 if (STACK_GROWS_DOWNWARD
)
4082 temp
= virtual_outgoing_args_rtx
;
4083 if (maybe_ne (extra
, 0) && below
)
4084 temp
= plus_constant (Pmode
, temp
, extra
);
4089 if (poly_int_rtx_p (size
, &csize
))
4090 temp
= plus_constant (Pmode
, virtual_outgoing_args_rtx
,
4091 -csize
- (below
? 0 : extra
));
4092 else if (maybe_ne (extra
, 0) && !below
)
4093 temp
= gen_rtx_PLUS (Pmode
, virtual_outgoing_args_rtx
,
4094 negate_rtx (Pmode
, plus_constant (Pmode
, size
,
4097 temp
= gen_rtx_PLUS (Pmode
, virtual_outgoing_args_rtx
,
4098 negate_rtx (Pmode
, size
));
4101 return memory_address (NARROWEST_INT_MODE
, temp
);
4104 /* A utility routine that returns the base of an auto-inc memory, or NULL. */
4107 mem_autoinc_base (rtx mem
)
4111 rtx addr
= XEXP (mem
, 0);
4112 if (GET_RTX_CLASS (GET_CODE (addr
)) == RTX_AUTOINC
)
4113 return XEXP (addr
, 0);
4118 /* A utility routine used here, in reload, and in try_split. The insns
4119 after PREV up to and including LAST are known to adjust the stack,
4120 with a final value of END_ARGS_SIZE. Iterate backward from LAST
4121 placing notes as appropriate. PREV may be NULL, indicating the
4122 entire insn sequence prior to LAST should be scanned.
4124 The set of allowed stack pointer modifications is small:
4125 (1) One or more auto-inc style memory references (aka pushes),
4126 (2) One or more addition/subtraction with the SP as destination,
4127 (3) A single move insn with the SP as destination,
4128 (4) A call_pop insn,
4129 (5) Noreturn call insns if !ACCUMULATE_OUTGOING_ARGS.
4131 Insns in the sequence that do not modify the SP are ignored,
4132 except for noreturn calls.
4134 The return value is the amount of adjustment that can be trivially
4135 verified, via immediate operand or auto-inc. If the adjustment
4136 cannot be trivially extracted, the return value is HOST_WIDE_INT_MIN. */
4139 find_args_size_adjust (rtx_insn
*insn
)
4144 pat
= PATTERN (insn
);
4147 /* Look for a call_pop pattern. */
4150 /* We have to allow non-call_pop patterns for the case
4151 of emit_single_push_insn of a TLS address. */
4152 if (GET_CODE (pat
) != PARALLEL
)
4155 /* All call_pop have a stack pointer adjust in the parallel.
4156 The call itself is always first, and the stack adjust is
4157 usually last, so search from the end. */
4158 for (i
= XVECLEN (pat
, 0) - 1; i
> 0; --i
)
4160 set
= XVECEXP (pat
, 0, i
);
4161 if (GET_CODE (set
) != SET
)
4163 dest
= SET_DEST (set
);
4164 if (dest
== stack_pointer_rtx
)
4167 /* We'd better have found the stack pointer adjust. */
4170 /* Fall through to process the extracted SET and DEST
4171 as if it was a standalone insn. */
4173 else if (GET_CODE (pat
) == SET
)
4175 else if ((set
= single_set (insn
)) != NULL
)
4177 else if (GET_CODE (pat
) == PARALLEL
)
4179 /* ??? Some older ports use a parallel with a stack adjust
4180 and a store for a PUSH_ROUNDING pattern, rather than a
4181 PRE/POST_MODIFY rtx. Don't force them to update yet... */
4182 /* ??? See h8300 and m68k, pushqi1. */
4183 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; --i
)
4185 set
= XVECEXP (pat
, 0, i
);
4186 if (GET_CODE (set
) != SET
)
4188 dest
= SET_DEST (set
);
4189 if (dest
== stack_pointer_rtx
)
4192 /* We do not expect an auto-inc of the sp in the parallel. */
4193 gcc_checking_assert (mem_autoinc_base (dest
) != stack_pointer_rtx
);
4194 gcc_checking_assert (mem_autoinc_base (SET_SRC (set
))
4195 != stack_pointer_rtx
);
4203 dest
= SET_DEST (set
);
4205 /* Look for direct modifications of the stack pointer. */
4206 if (REG_P (dest
) && REGNO (dest
) == STACK_POINTER_REGNUM
)
4208 /* Look for a trivial adjustment, otherwise assume nothing. */
4209 /* Note that the SPU restore_stack_block pattern refers to
4210 the stack pointer in V4SImode. Consider that non-trivial. */
4212 if (SCALAR_INT_MODE_P (GET_MODE (dest
))
4213 && strip_offset (SET_SRC (set
), &offset
) == stack_pointer_rtx
)
4215 /* ??? Reload can generate no-op moves, which will be cleaned
4216 up later. Recognize it and continue searching. */
4217 else if (rtx_equal_p (dest
, SET_SRC (set
)))
4220 return HOST_WIDE_INT_MIN
;
4226 /* Otherwise only think about autoinc patterns. */
4227 if (mem_autoinc_base (dest
) == stack_pointer_rtx
)
4230 gcc_checking_assert (mem_autoinc_base (SET_SRC (set
))
4231 != stack_pointer_rtx
);
4233 else if (mem_autoinc_base (SET_SRC (set
)) == stack_pointer_rtx
)
4234 mem
= SET_SRC (set
);
4238 addr
= XEXP (mem
, 0);
4239 switch (GET_CODE (addr
))
4243 return GET_MODE_SIZE (GET_MODE (mem
));
4246 return -GET_MODE_SIZE (GET_MODE (mem
));
4249 addr
= XEXP (addr
, 1);
4250 gcc_assert (GET_CODE (addr
) == PLUS
);
4251 gcc_assert (XEXP (addr
, 0) == stack_pointer_rtx
);
4252 return rtx_to_poly_int64 (XEXP (addr
, 1));
4260 fixup_args_size_notes (rtx_insn
*prev
, rtx_insn
*last
,
4261 poly_int64 end_args_size
)
4263 poly_int64 args_size
= end_args_size
;
4264 bool saw_unknown
= false;
4267 for (insn
= last
; insn
!= prev
; insn
= PREV_INSN (insn
))
4269 if (!NONDEBUG_INSN_P (insn
))
4272 /* We might have existing REG_ARGS_SIZE notes, e.g. when pushing
4273 a call argument containing a TLS address that itself requires
4274 a call to __tls_get_addr. The handling of stack_pointer_delta
4275 in emit_single_push_insn is supposed to ensure that any such
4276 notes are already correct. */
4277 rtx note
= find_reg_note (insn
, REG_ARGS_SIZE
, NULL_RTX
);
4278 gcc_assert (!note
|| known_eq (args_size
, get_args_size (note
)));
4280 poly_int64 this_delta
= find_args_size_adjust (insn
);
4281 if (known_eq (this_delta
, 0))
4284 || ACCUMULATE_OUTGOING_ARGS
4285 || find_reg_note (insn
, REG_NORETURN
, NULL_RTX
) == NULL_RTX
)
4289 gcc_assert (!saw_unknown
);
4290 if (known_eq (this_delta
, HOST_WIDE_INT_MIN
))
4294 add_args_size_note (insn
, args_size
);
4295 if (STACK_GROWS_DOWNWARD
)
4296 this_delta
= -poly_uint64 (this_delta
);
4299 args_size
= HOST_WIDE_INT_MIN
;
4301 args_size
-= this_delta
;
4307 #ifdef PUSH_ROUNDING
4308 /* Emit single push insn. */
4311 emit_single_push_insn_1 (machine_mode mode
, rtx x
, tree type
)
4314 poly_int64 rounded_size
= PUSH_ROUNDING (GET_MODE_SIZE (mode
));
4316 enum insn_code icode
;
4318 /* If there is push pattern, use it. Otherwise try old way of throwing
4319 MEM representing push operation to move expander. */
4320 icode
= optab_handler (push_optab
, mode
);
4321 if (icode
!= CODE_FOR_nothing
)
4323 class expand_operand ops
[1];
4325 create_input_operand (&ops
[0], x
, mode
);
4326 if (maybe_expand_insn (icode
, 1, ops
))
4329 if (known_eq (GET_MODE_SIZE (mode
), rounded_size
))
4330 dest_addr
= gen_rtx_fmt_e (STACK_PUSH_CODE
, Pmode
, stack_pointer_rtx
);
4331 /* If we are to pad downward, adjust the stack pointer first and
4332 then store X into the stack location using an offset. This is
4333 because emit_move_insn does not know how to pad; it does not have
4335 else if (targetm
.calls
.function_arg_padding (mode
, type
) == PAD_DOWNWARD
)
4337 emit_move_insn (stack_pointer_rtx
,
4338 expand_binop (Pmode
,
4339 STACK_GROWS_DOWNWARD
? sub_optab
4342 gen_int_mode (rounded_size
, Pmode
),
4343 NULL_RTX
, 0, OPTAB_LIB_WIDEN
));
4345 poly_int64 offset
= rounded_size
- GET_MODE_SIZE (mode
);
4346 if (STACK_GROWS_DOWNWARD
&& STACK_PUSH_CODE
== POST_DEC
)
4347 /* We have already decremented the stack pointer, so get the
4349 offset
+= rounded_size
;
4351 if (!STACK_GROWS_DOWNWARD
&& STACK_PUSH_CODE
== POST_INC
)
4352 /* We have already incremented the stack pointer, so get the
4354 offset
-= rounded_size
;
4356 dest_addr
= plus_constant (Pmode
, stack_pointer_rtx
, offset
);
4360 if (STACK_GROWS_DOWNWARD
)
4361 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
4362 dest_addr
= plus_constant (Pmode
, stack_pointer_rtx
, -rounded_size
);
4364 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
4365 dest_addr
= plus_constant (Pmode
, stack_pointer_rtx
, rounded_size
);
4367 dest_addr
= gen_rtx_PRE_MODIFY (Pmode
, stack_pointer_rtx
, dest_addr
);
4370 dest
= gen_rtx_MEM (mode
, dest_addr
);
4374 set_mem_attributes (dest
, type
, 1);
4376 if (cfun
->tail_call_marked
)
4377 /* Function incoming arguments may overlap with sibling call
4378 outgoing arguments and we cannot allow reordering of reads
4379 from function arguments with stores to outgoing arguments
4380 of sibling calls. */
4381 set_mem_alias_set (dest
, 0);
4383 emit_move_insn (dest
, x
);
4386 /* Emit and annotate a single push insn. */
4389 emit_single_push_insn (machine_mode mode
, rtx x
, tree type
)
4391 poly_int64 delta
, old_delta
= stack_pointer_delta
;
4392 rtx_insn
*prev
= get_last_insn ();
4395 emit_single_push_insn_1 (mode
, x
, type
);
4397 /* Adjust stack_pointer_delta to describe the situation after the push
4398 we just performed. Note that we must do this after the push rather
4399 than before the push in case calculating X needs pushes and pops of
4400 its own (e.g. if calling __tls_get_addr). The REG_ARGS_SIZE notes
4401 for such pushes and pops must not include the effect of the future
4403 stack_pointer_delta
+= PUSH_ROUNDING (GET_MODE_SIZE (mode
));
4405 last
= get_last_insn ();
4407 /* Notice the common case where we emitted exactly one insn. */
4408 if (PREV_INSN (last
) == prev
)
4410 add_args_size_note (last
, stack_pointer_delta
);
4414 delta
= fixup_args_size_notes (prev
, last
, stack_pointer_delta
);
4415 gcc_assert (known_eq (delta
, HOST_WIDE_INT_MIN
)
4416 || known_eq (delta
, old_delta
));
4420 /* If reading SIZE bytes from X will end up reading from
4421 Y return the number of bytes that overlap. Return -1
4422 if there is no overlap or -2 if we can't determine
4423 (for example when X and Y have different base registers). */
4426 memory_load_overlap (rtx x
, rtx y
, HOST_WIDE_INT size
)
4428 rtx tmp
= plus_constant (Pmode
, x
, size
);
4429 rtx sub
= simplify_gen_binary (MINUS
, Pmode
, tmp
, y
);
4431 if (!CONST_INT_P (sub
))
4434 HOST_WIDE_INT val
= INTVAL (sub
);
4436 return IN_RANGE (val
, 1, size
) ? val
: -1;
4439 /* Generate code to push X onto the stack, assuming it has mode MODE and
4441 MODE is redundant except when X is a CONST_INT (since they don't
4443 SIZE is an rtx for the size of data to be copied (in bytes),
4444 needed only if X is BLKmode.
4445 Return true if successful. May return false if asked to push a
4446 partial argument during a sibcall optimization (as specified by
4447 SIBCALL_P) and the incoming and outgoing pointers cannot be shown
4450 ALIGN (in bits) is maximum alignment we can assume.
4452 If PARTIAL and REG are both nonzero, then copy that many of the first
4453 bytes of X into registers starting with REG, and push the rest of X.
4454 The amount of space pushed is decreased by PARTIAL bytes.
4455 REG must be a hard register in this case.
4456 If REG is zero but PARTIAL is not, take any all others actions for an
4457 argument partially in registers, but do not actually load any
4460 EXTRA is the amount in bytes of extra space to leave next to this arg.
4461 This is ignored if an argument block has already been allocated.
4463 On a machine that lacks real push insns, ARGS_ADDR is the address of
4464 the bottom of the argument block for this call. We use indexing off there
4465 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
4466 argument block has not been preallocated.
4468 ARGS_SO_FAR is the size of args previously pushed for this call.
4470 REG_PARM_STACK_SPACE is nonzero if functions require stack space
4471 for arguments passed in registers. If nonzero, it will be the number
4472 of bytes required. */
4475 emit_push_insn (rtx x
, machine_mode mode
, tree type
, rtx size
,
4476 unsigned int align
, int partial
, rtx reg
, poly_int64 extra
,
4477 rtx args_addr
, rtx args_so_far
, int reg_parm_stack_space
,
4478 rtx alignment_pad
, bool sibcall_p
)
4481 pad_direction stack_direction
4482 = STACK_GROWS_DOWNWARD
? PAD_DOWNWARD
: PAD_UPWARD
;
4484 /* Decide where to pad the argument: PAD_DOWNWARD for below,
4485 PAD_UPWARD for above, or PAD_NONE for don't pad it.
4486 Default is below for small data on big-endian machines; else above. */
4487 pad_direction where_pad
= targetm
.calls
.function_arg_padding (mode
, type
);
4489 /* Invert direction if stack is post-decrement.
4491 if (STACK_PUSH_CODE
== POST_DEC
)
4492 if (where_pad
!= PAD_NONE
)
4493 where_pad
= (where_pad
== PAD_DOWNWARD
? PAD_UPWARD
: PAD_DOWNWARD
);
4497 int nregs
= partial
/ UNITS_PER_WORD
;
4498 rtx
*tmp_regs
= NULL
;
4499 int overlapping
= 0;
4502 || (STRICT_ALIGNMENT
&& align
< GET_MODE_ALIGNMENT (mode
)))
4504 /* Copy a block into the stack, entirely or partially. */
4511 offset
= partial
% (PARM_BOUNDARY
/ BITS_PER_UNIT
);
4512 used
= partial
- offset
;
4514 if (mode
!= BLKmode
)
4516 /* A value is to be stored in an insufficiently aligned
4517 stack slot; copy via a suitably aligned slot if
4519 size
= gen_int_mode (GET_MODE_SIZE (mode
), Pmode
);
4520 if (!MEM_P (xinner
))
4522 temp
= assign_temp (type
, 1, 1);
4523 emit_move_insn (temp
, xinner
);
4530 /* USED is now the # of bytes we need not copy to the stack
4531 because registers will take care of them. */
4534 xinner
= adjust_address (xinner
, BLKmode
, used
);
4536 /* If the partial register-part of the arg counts in its stack size,
4537 skip the part of stack space corresponding to the registers.
4538 Otherwise, start copying to the beginning of the stack space,
4539 by setting SKIP to 0. */
4540 skip
= (reg_parm_stack_space
== 0) ? 0 : used
;
4542 #ifdef PUSH_ROUNDING
4543 /* Do it with several push insns if that doesn't take lots of insns
4544 and if there is no difficulty with push insns that skip bytes
4545 on the stack for alignment purposes. */
4548 && CONST_INT_P (size
)
4550 && MEM_ALIGN (xinner
) >= align
4551 && can_move_by_pieces ((unsigned) INTVAL (size
) - used
, align
)
4552 /* Here we avoid the case of a structure whose weak alignment
4553 forces many pushes of a small amount of data,
4554 and such small pushes do rounding that causes trouble. */
4555 && ((!targetm
.slow_unaligned_access (word_mode
, align
))
4556 || align
>= BIGGEST_ALIGNMENT
4557 || known_eq (PUSH_ROUNDING (align
/ BITS_PER_UNIT
),
4558 align
/ BITS_PER_UNIT
))
4559 && known_eq (PUSH_ROUNDING (INTVAL (size
)), INTVAL (size
)))
4561 /* Push padding now if padding above and stack grows down,
4562 or if padding below and stack grows up.
4563 But if space already allocated, this has already been done. */
4564 if (maybe_ne (extra
, 0)
4566 && where_pad
!= PAD_NONE
4567 && where_pad
!= stack_direction
)
4568 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4570 move_by_pieces (NULL
, xinner
, INTVAL (size
) - used
, align
,
4574 #endif /* PUSH_ROUNDING */
4578 /* Otherwise make space on the stack and copy the data
4579 to the address of that space. */
4581 /* Deduct words put into registers from the size we must copy. */
4584 if (CONST_INT_P (size
))
4585 size
= GEN_INT (INTVAL (size
) - used
);
4587 size
= expand_binop (GET_MODE (size
), sub_optab
, size
,
4588 gen_int_mode (used
, GET_MODE (size
)),
4589 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
4592 /* Get the address of the stack space.
4593 In this case, we do not deal with EXTRA separately.
4594 A single stack adjust will do. */
4595 poly_int64 const_args_so_far
;
4598 temp
= push_block (size
, extra
, where_pad
== PAD_DOWNWARD
);
4601 else if (poly_int_rtx_p (args_so_far
, &const_args_so_far
))
4602 temp
= memory_address (BLKmode
,
4603 plus_constant (Pmode
, args_addr
,
4604 skip
+ const_args_so_far
));
4606 temp
= memory_address (BLKmode
,
4607 plus_constant (Pmode
,
4608 gen_rtx_PLUS (Pmode
,
4613 if (!ACCUMULATE_OUTGOING_ARGS
)
4615 /* If the source is referenced relative to the stack pointer,
4616 copy it to another register to stabilize it. We do not need
4617 to do this if we know that we won't be changing sp. */
4619 if (reg_mentioned_p (virtual_stack_dynamic_rtx
, temp
)
4620 || reg_mentioned_p (virtual_outgoing_args_rtx
, temp
))
4621 temp
= copy_to_reg (temp
);
4624 target
= gen_rtx_MEM (BLKmode
, temp
);
4626 /* We do *not* set_mem_attributes here, because incoming arguments
4627 may overlap with sibling call outgoing arguments and we cannot
4628 allow reordering of reads from function arguments with stores
4629 to outgoing arguments of sibling calls. We do, however, want
4630 to record the alignment of the stack slot. */
4631 /* ALIGN may well be better aligned than TYPE, e.g. due to
4632 PARM_BOUNDARY. Assume the caller isn't lying. */
4633 set_mem_align (target
, align
);
4635 /* If part should go in registers and pushing to that part would
4636 overwrite some of the values that need to go into regs, load the
4637 overlapping values into temporary pseudos to be moved into the hard
4638 regs at the end after the stack pushing has completed.
4639 We cannot load them directly into the hard regs here because
4640 they can be clobbered by the block move expansions.
4643 if (partial
> 0 && reg
!= 0 && mode
== BLKmode
4644 && GET_CODE (reg
) != PARALLEL
)
4646 overlapping
= memory_load_overlap (XEXP (x
, 0), temp
, partial
);
4647 if (overlapping
> 0)
4649 gcc_assert (overlapping
% UNITS_PER_WORD
== 0);
4650 overlapping
/= UNITS_PER_WORD
;
4652 tmp_regs
= XALLOCAVEC (rtx
, overlapping
);
4654 for (int i
= 0; i
< overlapping
; i
++)
4655 tmp_regs
[i
] = gen_reg_rtx (word_mode
);
4657 for (int i
= 0; i
< overlapping
; i
++)
4658 emit_move_insn (tmp_regs
[i
],
4659 operand_subword_force (target
, i
, mode
));
4661 else if (overlapping
== -1)
4663 /* Could not determine whether there is overlap.
4664 Fail the sibcall. */
4672 emit_block_move (target
, xinner
, size
, BLOCK_OP_CALL_PARM
);
4675 else if (partial
> 0)
4677 /* Scalar partly in registers. This case is only supported
4678 for fixed-wdth modes. */
4679 int num_words
= GET_MODE_SIZE (mode
).to_constant ();
4680 num_words
/= UNITS_PER_WORD
;
4683 /* # bytes of start of argument
4684 that we must make space for but need not store. */
4685 int offset
= partial
% (PARM_BOUNDARY
/ BITS_PER_UNIT
);
4686 int args_offset
= INTVAL (args_so_far
);
4689 /* Push padding now if padding above and stack grows down,
4690 or if padding below and stack grows up.
4691 But if space already allocated, this has already been done. */
4692 if (maybe_ne (extra
, 0)
4694 && where_pad
!= PAD_NONE
4695 && where_pad
!= stack_direction
)
4696 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4698 /* If we make space by pushing it, we might as well push
4699 the real data. Otherwise, we can leave OFFSET nonzero
4700 and leave the space uninitialized. */
4704 /* Now NOT_STACK gets the number of words that we don't need to
4705 allocate on the stack. Convert OFFSET to words too. */
4706 not_stack
= (partial
- offset
) / UNITS_PER_WORD
;
4707 offset
/= UNITS_PER_WORD
;
4709 /* If the partial register-part of the arg counts in its stack size,
4710 skip the part of stack space corresponding to the registers.
4711 Otherwise, start copying to the beginning of the stack space,
4712 by setting SKIP to 0. */
4713 skip
= (reg_parm_stack_space
== 0) ? 0 : not_stack
;
4715 if (CONSTANT_P (x
) && !targetm
.legitimate_constant_p (mode
, x
))
4716 x
= validize_mem (force_const_mem (mode
, x
));
4718 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
4719 SUBREGs of such registers are not allowed. */
4720 if ((REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
4721 && GET_MODE_CLASS (GET_MODE (x
)) != MODE_INT
))
4722 x
= copy_to_reg (x
);
4724 /* Loop over all the words allocated on the stack for this arg. */
4725 /* We can do it by words, because any scalar bigger than a word
4726 has a size a multiple of a word. */
4727 for (i
= num_words
- 1; i
>= not_stack
; i
--)
4728 if (i
>= not_stack
+ offset
)
4729 if (!emit_push_insn (operand_subword_force (x
, i
, mode
),
4730 word_mode
, NULL_TREE
, NULL_RTX
, align
, 0, NULL_RTX
,
4732 GEN_INT (args_offset
+ ((i
- not_stack
+ skip
)
4734 reg_parm_stack_space
, alignment_pad
, sibcall_p
))
4742 /* Push padding now if padding above and stack grows down,
4743 or if padding below and stack grows up.
4744 But if space already allocated, this has already been done. */
4745 if (maybe_ne (extra
, 0)
4747 && where_pad
!= PAD_NONE
4748 && where_pad
!= stack_direction
)
4749 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4751 #ifdef PUSH_ROUNDING
4752 if (args_addr
== 0 && PUSH_ARGS
)
4753 emit_single_push_insn (mode
, x
, type
);
4757 addr
= simplify_gen_binary (PLUS
, Pmode
, args_addr
, args_so_far
);
4758 dest
= gen_rtx_MEM (mode
, memory_address (mode
, addr
));
4760 /* We do *not* set_mem_attributes here, because incoming arguments
4761 may overlap with sibling call outgoing arguments and we cannot
4762 allow reordering of reads from function arguments with stores
4763 to outgoing arguments of sibling calls. We do, however, want
4764 to record the alignment of the stack slot. */
4765 /* ALIGN may well be better aligned than TYPE, e.g. due to
4766 PARM_BOUNDARY. Assume the caller isn't lying. */
4767 set_mem_align (dest
, align
);
4769 emit_move_insn (dest
, x
);
4773 /* Move the partial arguments into the registers and any overlapping
4774 values that we moved into the pseudos in tmp_regs. */
4775 if (partial
> 0 && reg
!= 0)
4777 /* Handle calls that pass values in multiple non-contiguous locations.
4778 The Irix 6 ABI has examples of this. */
4779 if (GET_CODE (reg
) == PARALLEL
)
4780 emit_group_load (reg
, x
, type
, -1);
4783 gcc_assert (partial
% UNITS_PER_WORD
== 0);
4784 move_block_to_reg (REGNO (reg
), x
, nregs
- overlapping
, mode
);
4786 for (int i
= 0; i
< overlapping
; i
++)
4787 emit_move_insn (gen_rtx_REG (word_mode
, REGNO (reg
)
4788 + nregs
- overlapping
+ i
),
4794 if (maybe_ne (extra
, 0) && args_addr
== 0 && where_pad
== stack_direction
)
4795 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4797 if (alignment_pad
&& args_addr
== 0)
4798 anti_adjust_stack (alignment_pad
);
4803 /* Return X if X can be used as a subtarget in a sequence of arithmetic
4807 get_subtarget (rtx x
)
4811 /* Only registers can be subtargets. */
4813 /* Don't use hard regs to avoid extending their life. */
4814 || REGNO (x
) < FIRST_PSEUDO_REGISTER
4818 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
4819 FIELD is a bitfield. Returns true if the optimization was successful,
4820 and there's nothing else to do. */
4823 optimize_bitfield_assignment_op (poly_uint64 pbitsize
,
4824 poly_uint64 pbitpos
,
4825 poly_uint64 pbitregion_start
,
4826 poly_uint64 pbitregion_end
,
4827 machine_mode mode1
, rtx str_rtx
,
4828 tree to
, tree src
, bool reverse
)
4830 /* str_mode is not guaranteed to be a scalar type. */
4831 machine_mode str_mode
= GET_MODE (str_rtx
);
4832 unsigned int str_bitsize
;
4837 enum tree_code code
;
4839 unsigned HOST_WIDE_INT bitsize
, bitpos
, bitregion_start
, bitregion_end
;
4840 if (mode1
!= VOIDmode
4841 || !pbitsize
.is_constant (&bitsize
)
4842 || !pbitpos
.is_constant (&bitpos
)
4843 || !pbitregion_start
.is_constant (&bitregion_start
)
4844 || !pbitregion_end
.is_constant (&bitregion_end
)
4845 || bitsize
>= BITS_PER_WORD
4846 || !GET_MODE_BITSIZE (str_mode
).is_constant (&str_bitsize
)
4847 || str_bitsize
> BITS_PER_WORD
4848 || TREE_SIDE_EFFECTS (to
)
4849 || TREE_THIS_VOLATILE (to
))
4853 if (TREE_CODE (src
) != SSA_NAME
)
4855 if (TREE_CODE (TREE_TYPE (src
)) != INTEGER_TYPE
)
4858 srcstmt
= get_gimple_for_ssa_name (src
);
4860 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt
)) != tcc_binary
)
4863 code
= gimple_assign_rhs_code (srcstmt
);
4865 op0
= gimple_assign_rhs1 (srcstmt
);
4867 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
4868 to find its initialization. Hopefully the initialization will
4869 be from a bitfield load. */
4870 if (TREE_CODE (op0
) == SSA_NAME
)
4872 gimple
*op0stmt
= get_gimple_for_ssa_name (op0
);
4874 /* We want to eventually have OP0 be the same as TO, which
4875 should be a bitfield. */
4877 || !is_gimple_assign (op0stmt
)
4878 || gimple_assign_rhs_code (op0stmt
) != TREE_CODE (to
))
4880 op0
= gimple_assign_rhs1 (op0stmt
);
4883 op1
= gimple_assign_rhs2 (srcstmt
);
4885 if (!operand_equal_p (to
, op0
, 0))
4888 if (MEM_P (str_rtx
))
4890 unsigned HOST_WIDE_INT offset1
;
4892 if (str_bitsize
== 0 || str_bitsize
> BITS_PER_WORD
)
4893 str_bitsize
= BITS_PER_WORD
;
4895 scalar_int_mode best_mode
;
4896 if (!get_best_mode (bitsize
, bitpos
, bitregion_start
, bitregion_end
,
4897 MEM_ALIGN (str_rtx
), str_bitsize
, false, &best_mode
))
4899 str_mode
= best_mode
;
4900 str_bitsize
= GET_MODE_BITSIZE (best_mode
);
4903 bitpos
%= str_bitsize
;
4904 offset1
= (offset1
- bitpos
) / BITS_PER_UNIT
;
4905 str_rtx
= adjust_address (str_rtx
, str_mode
, offset1
);
4907 else if (!REG_P (str_rtx
) && GET_CODE (str_rtx
) != SUBREG
)
4910 /* If the bit field covers the whole REG/MEM, store_field
4911 will likely generate better code. */
4912 if (bitsize
>= str_bitsize
)
4915 /* We can't handle fields split across multiple entities. */
4916 if (bitpos
+ bitsize
> str_bitsize
)
4919 if (reverse
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
)
4920 bitpos
= str_bitsize
- bitpos
- bitsize
;
4926 /* For now, just optimize the case of the topmost bitfield
4927 where we don't need to do any masking and also
4928 1 bit bitfields where xor can be used.
4929 We might win by one instruction for the other bitfields
4930 too if insv/extv instructions aren't used, so that
4931 can be added later. */
4932 if ((reverse
|| bitpos
+ bitsize
!= str_bitsize
)
4933 && (bitsize
!= 1 || TREE_CODE (op1
) != INTEGER_CST
))
4936 value
= expand_expr (op1
, NULL_RTX
, str_mode
, EXPAND_NORMAL
);
4937 value
= convert_modes (str_mode
,
4938 TYPE_MODE (TREE_TYPE (op1
)), value
,
4939 TYPE_UNSIGNED (TREE_TYPE (op1
)));
4941 /* We may be accessing data outside the field, which means
4942 we can alias adjacent data. */
4943 if (MEM_P (str_rtx
))
4945 str_rtx
= shallow_copy_rtx (str_rtx
);
4946 set_mem_alias_set (str_rtx
, 0);
4947 set_mem_expr (str_rtx
, 0);
4950 if (bitsize
== 1 && (reverse
|| bitpos
+ bitsize
!= str_bitsize
))
4952 value
= expand_and (str_mode
, value
, const1_rtx
, NULL
);
4956 binop
= code
== PLUS_EXPR
? add_optab
: sub_optab
;
4958 value
= expand_shift (LSHIFT_EXPR
, str_mode
, value
, bitpos
, NULL_RTX
, 1);
4960 value
= flip_storage_order (str_mode
, value
);
4961 result
= expand_binop (str_mode
, binop
, str_rtx
,
4962 value
, str_rtx
, 1, OPTAB_WIDEN
);
4963 if (result
!= str_rtx
)
4964 emit_move_insn (str_rtx
, result
);
4969 if (TREE_CODE (op1
) != INTEGER_CST
)
4971 value
= expand_expr (op1
, NULL_RTX
, str_mode
, EXPAND_NORMAL
);
4972 value
= convert_modes (str_mode
,
4973 TYPE_MODE (TREE_TYPE (op1
)), value
,
4974 TYPE_UNSIGNED (TREE_TYPE (op1
)));
4976 /* We may be accessing data outside the field, which means
4977 we can alias adjacent data. */
4978 if (MEM_P (str_rtx
))
4980 str_rtx
= shallow_copy_rtx (str_rtx
);
4981 set_mem_alias_set (str_rtx
, 0);
4982 set_mem_expr (str_rtx
, 0);
4985 binop
= code
== BIT_IOR_EXPR
? ior_optab
: xor_optab
;
4986 if (bitpos
+ bitsize
!= str_bitsize
)
4988 rtx mask
= gen_int_mode ((HOST_WIDE_INT_1U
<< bitsize
) - 1,
4990 value
= expand_and (str_mode
, value
, mask
, NULL_RTX
);
4992 value
= expand_shift (LSHIFT_EXPR
, str_mode
, value
, bitpos
, NULL_RTX
, 1);
4994 value
= flip_storage_order (str_mode
, value
);
4995 result
= expand_binop (str_mode
, binop
, str_rtx
,
4996 value
, str_rtx
, 1, OPTAB_WIDEN
);
4997 if (result
!= str_rtx
)
4998 emit_move_insn (str_rtx
, result
);
5008 /* In the C++ memory model, consecutive bit fields in a structure are
5009 considered one memory location.
5011 Given a COMPONENT_REF EXP at position (BITPOS, OFFSET), this function
5012 returns the bit range of consecutive bits in which this COMPONENT_REF
5013 belongs. The values are returned in *BITSTART and *BITEND. *BITPOS
5014 and *OFFSET may be adjusted in the process.
5016 If the access does not need to be restricted, 0 is returned in both
5017 *BITSTART and *BITEND. */
5020 get_bit_range (poly_uint64_pod
*bitstart
, poly_uint64_pod
*bitend
, tree exp
,
5021 poly_int64_pod
*bitpos
, tree
*offset
)
5023 poly_int64 bitoffset
;
5026 gcc_assert (TREE_CODE (exp
) == COMPONENT_REF
);
5028 field
= TREE_OPERAND (exp
, 1);
5029 repr
= DECL_BIT_FIELD_REPRESENTATIVE (field
);
5030 /* If we do not have a DECL_BIT_FIELD_REPRESENTATIVE there is no
5031 need to limit the range we can access. */
5034 *bitstart
= *bitend
= 0;
5038 /* If we have a DECL_BIT_FIELD_REPRESENTATIVE but the enclosing record is
5039 part of a larger bit field, then the representative does not serve any
5040 useful purpose. This can occur in Ada. */
5041 if (handled_component_p (TREE_OPERAND (exp
, 0)))
5044 poly_int64 rbitsize
, rbitpos
;
5046 int unsignedp
, reversep
, volatilep
= 0;
5047 get_inner_reference (TREE_OPERAND (exp
, 0), &rbitsize
, &rbitpos
,
5048 &roffset
, &rmode
, &unsignedp
, &reversep
,
5050 if (!multiple_p (rbitpos
, BITS_PER_UNIT
))
5052 *bitstart
= *bitend
= 0;
5057 /* Compute the adjustment to bitpos from the offset of the field
5058 relative to the representative. DECL_FIELD_OFFSET of field and
5059 repr are the same by construction if they are not constants,
5060 see finish_bitfield_layout. */
5061 poly_uint64 field_offset
, repr_offset
;
5062 if (poly_int_tree_p (DECL_FIELD_OFFSET (field
), &field_offset
)
5063 && poly_int_tree_p (DECL_FIELD_OFFSET (repr
), &repr_offset
))
5064 bitoffset
= (field_offset
- repr_offset
) * BITS_PER_UNIT
;
5067 bitoffset
+= (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field
))
5068 - tree_to_uhwi (DECL_FIELD_BIT_OFFSET (repr
)));
5070 /* If the adjustment is larger than bitpos, we would have a negative bit
5071 position for the lower bound and this may wreak havoc later. Adjust
5072 offset and bitpos to make the lower bound non-negative in that case. */
5073 if (maybe_gt (bitoffset
, *bitpos
))
5075 poly_int64 adjust_bits
= upper_bound (bitoffset
, *bitpos
) - *bitpos
;
5076 poly_int64 adjust_bytes
= exact_div (adjust_bits
, BITS_PER_UNIT
);
5078 *bitpos
+= adjust_bits
;
5079 if (*offset
== NULL_TREE
)
5080 *offset
= size_int (-adjust_bytes
);
5082 *offset
= size_binop (MINUS_EXPR
, *offset
, size_int (adjust_bytes
));
5086 *bitstart
= *bitpos
- bitoffset
;
5088 *bitend
= *bitstart
+ tree_to_poly_uint64 (DECL_SIZE (repr
)) - 1;
5091 /* Returns true if BASE is a DECL that does not reside in memory and
5092 has non-BLKmode. DECL_RTL must not be a MEM; if
5093 DECL_RTL was not set yet, return false. */
5096 non_mem_decl_p (tree base
)
5099 || TREE_ADDRESSABLE (base
)
5100 || DECL_MODE (base
) == BLKmode
)
5103 if (!DECL_RTL_SET_P (base
))
5106 return (!MEM_P (DECL_RTL (base
)));
5109 /* Returns true if REF refers to an object that does not
5110 reside in memory and has non-BLKmode. */
5113 mem_ref_refers_to_non_mem_p (tree ref
)
5117 if (TREE_CODE (ref
) == MEM_REF
5118 || TREE_CODE (ref
) == TARGET_MEM_REF
)
5120 tree addr
= TREE_OPERAND (ref
, 0);
5122 if (TREE_CODE (addr
) != ADDR_EXPR
)
5125 base
= TREE_OPERAND (addr
, 0);
5130 return non_mem_decl_p (base
);
5133 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
5134 is true, try generating a nontemporal store. */
5137 expand_assignment (tree to
, tree from
, bool nontemporal
)
5143 enum insn_code icode
;
5145 /* Don't crash if the lhs of the assignment was erroneous. */
5146 if (TREE_CODE (to
) == ERROR_MARK
)
5148 expand_normal (from
);
5152 /* Optimize away no-op moves without side-effects. */
5153 if (operand_equal_p (to
, from
, 0))
5156 /* Handle misaligned stores. */
5157 mode
= TYPE_MODE (TREE_TYPE (to
));
5158 if ((TREE_CODE (to
) == MEM_REF
5159 || TREE_CODE (to
) == TARGET_MEM_REF
5162 && !mem_ref_refers_to_non_mem_p (to
)
5163 && ((align
= get_object_alignment (to
))
5164 < GET_MODE_ALIGNMENT (mode
))
5165 && (((icode
= optab_handler (movmisalign_optab
, mode
))
5166 != CODE_FOR_nothing
)
5167 || targetm
.slow_unaligned_access (mode
, align
)))
5171 reg
= expand_expr (from
, NULL_RTX
, VOIDmode
, EXPAND_NORMAL
);
5172 /* Handle PARALLEL. */
5173 reg
= maybe_emit_group_store (reg
, TREE_TYPE (from
));
5174 reg
= force_not_mem (reg
);
5175 mem
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5176 if (TREE_CODE (to
) == MEM_REF
&& REF_REVERSE_STORAGE_ORDER (to
))
5177 reg
= flip_storage_order (mode
, reg
);
5179 if (icode
!= CODE_FOR_nothing
)
5181 class expand_operand ops
[2];
5183 create_fixed_operand (&ops
[0], mem
);
5184 create_input_operand (&ops
[1], reg
, mode
);
5185 /* The movmisalign<mode> pattern cannot fail, else the assignment
5186 would silently be omitted. */
5187 expand_insn (icode
, 2, ops
);
5190 store_bit_field (mem
, GET_MODE_BITSIZE (mode
), 0, 0, 0, mode
, reg
,
5195 /* Assignment of a structure component needs special treatment
5196 if the structure component's rtx is not simply a MEM.
5197 Assignment of an array element at a constant index, and assignment of
5198 an array element in an unaligned packed structure field, has the same
5199 problem. Same for (partially) storing into a non-memory object. */
5200 if (handled_component_p (to
)
5201 || (TREE_CODE (to
) == MEM_REF
5202 && (REF_REVERSE_STORAGE_ORDER (to
)
5203 || mem_ref_refers_to_non_mem_p (to
)))
5204 || TREE_CODE (TREE_TYPE (to
)) == ARRAY_TYPE
)
5207 poly_int64 bitsize
, bitpos
;
5208 poly_uint64 bitregion_start
= 0;
5209 poly_uint64 bitregion_end
= 0;
5211 int unsignedp
, reversep
, volatilep
= 0;
5215 tem
= get_inner_reference (to
, &bitsize
, &bitpos
, &offset
, &mode1
,
5216 &unsignedp
, &reversep
, &volatilep
);
5218 /* Make sure bitpos is not negative, it can wreak havoc later. */
5219 if (maybe_lt (bitpos
, 0))
5221 gcc_assert (offset
== NULL_TREE
);
5222 offset
= size_int (bits_to_bytes_round_down (bitpos
));
5223 bitpos
= num_trailing_bits (bitpos
);
5226 if (TREE_CODE (to
) == COMPONENT_REF
5227 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to
, 1)))
5228 get_bit_range (&bitregion_start
, &bitregion_end
, to
, &bitpos
, &offset
);
5229 /* The C++ memory model naturally applies to byte-aligned fields.
5230 However, if we do not have a DECL_BIT_FIELD_TYPE but BITPOS or
5231 BITSIZE are not byte-aligned, there is no need to limit the range
5232 we can access. This can occur with packed structures in Ada. */
5233 else if (maybe_gt (bitsize
, 0)
5234 && multiple_p (bitsize
, BITS_PER_UNIT
)
5235 && multiple_p (bitpos
, BITS_PER_UNIT
))
5237 bitregion_start
= bitpos
;
5238 bitregion_end
= bitpos
+ bitsize
- 1;
5241 to_rtx
= expand_expr (tem
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5243 /* If the field has a mode, we want to access it in the
5244 field's mode, not the computed mode.
5245 If a MEM has VOIDmode (external with incomplete type),
5246 use BLKmode for it instead. */
5249 if (mode1
!= VOIDmode
)
5250 to_rtx
= adjust_address (to_rtx
, mode1
, 0);
5251 else if (GET_MODE (to_rtx
) == VOIDmode
)
5252 to_rtx
= adjust_address (to_rtx
, BLKmode
, 0);
5257 machine_mode address_mode
;
5260 if (!MEM_P (to_rtx
))
5262 /* We can get constant negative offsets into arrays with broken
5263 user code. Translate this to a trap instead of ICEing. */
5264 gcc_assert (TREE_CODE (offset
) == INTEGER_CST
);
5265 expand_builtin_trap ();
5266 to_rtx
= gen_rtx_MEM (BLKmode
, const0_rtx
);
5269 offset_rtx
= expand_expr (offset
, NULL_RTX
, VOIDmode
, EXPAND_SUM
);
5270 address_mode
= get_address_mode (to_rtx
);
5271 if (GET_MODE (offset_rtx
) != address_mode
)
5273 /* We cannot be sure that the RTL in offset_rtx is valid outside
5274 of a memory address context, so force it into a register
5275 before attempting to convert it to the desired mode. */
5276 offset_rtx
= force_operand (offset_rtx
, NULL_RTX
);
5277 offset_rtx
= convert_to_mode (address_mode
, offset_rtx
, 0);
5280 /* If we have an expression in OFFSET_RTX and a non-zero
5281 byte offset in BITPOS, adding the byte offset before the
5282 OFFSET_RTX results in better intermediate code, which makes
5283 later rtl optimization passes perform better.
5285 We prefer intermediate code like this:
5287 r124:DI=r123:DI+0x18
5292 r124:DI=r123:DI+0x10
5293 [r124:DI+0x8]=r121:DI
5295 This is only done for aligned data values, as these can
5296 be expected to result in single move instructions. */
5298 if (mode1
!= VOIDmode
5299 && maybe_ne (bitpos
, 0)
5300 && maybe_gt (bitsize
, 0)
5301 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
5302 && multiple_p (bitpos
, bitsize
)
5303 && multiple_p (bitsize
, GET_MODE_ALIGNMENT (mode1
))
5304 && MEM_ALIGN (to_rtx
) >= GET_MODE_ALIGNMENT (mode1
))
5306 to_rtx
= adjust_address (to_rtx
, mode1
, bytepos
);
5307 bitregion_start
= 0;
5308 if (known_ge (bitregion_end
, poly_uint64 (bitpos
)))
5309 bitregion_end
-= bitpos
;
5313 to_rtx
= offset_address (to_rtx
, offset_rtx
,
5314 highest_pow2_factor_for_target (to
,
5318 /* No action is needed if the target is not a memory and the field
5319 lies completely outside that target. This can occur if the source
5320 code contains an out-of-bounds access to a small array. */
5322 && GET_MODE (to_rtx
) != BLKmode
5323 && known_ge (bitpos
, GET_MODE_PRECISION (GET_MODE (to_rtx
))))
5325 expand_normal (from
);
5328 /* Handle expand_expr of a complex value returning a CONCAT. */
5329 else if (GET_CODE (to_rtx
) == CONCAT
)
5331 machine_mode to_mode
= GET_MODE (to_rtx
);
5332 gcc_checking_assert (COMPLEX_MODE_P (to_mode
));
5333 poly_int64 mode_bitsize
= GET_MODE_BITSIZE (to_mode
);
5334 unsigned short inner_bitsize
= GET_MODE_UNIT_BITSIZE (to_mode
);
5335 if (TYPE_MODE (TREE_TYPE (from
)) == to_mode
5336 && known_eq (bitpos
, 0)
5337 && known_eq (bitsize
, mode_bitsize
))
5338 result
= store_expr (from
, to_rtx
, false, nontemporal
, reversep
);
5339 else if (TYPE_MODE (TREE_TYPE (from
)) == GET_MODE_INNER (to_mode
)
5340 && known_eq (bitsize
, inner_bitsize
)
5341 && (known_eq (bitpos
, 0)
5342 || known_eq (bitpos
, inner_bitsize
)))
5343 result
= store_expr (from
, XEXP (to_rtx
, maybe_ne (bitpos
, 0)),
5344 false, nontemporal
, reversep
);
5345 else if (known_le (bitpos
+ bitsize
, inner_bitsize
))
5346 result
= store_field (XEXP (to_rtx
, 0), bitsize
, bitpos
,
5347 bitregion_start
, bitregion_end
,
5348 mode1
, from
, get_alias_set (to
),
5349 nontemporal
, reversep
);
5350 else if (known_ge (bitpos
, inner_bitsize
))
5351 result
= store_field (XEXP (to_rtx
, 1), bitsize
,
5352 bitpos
- inner_bitsize
,
5353 bitregion_start
, bitregion_end
,
5354 mode1
, from
, get_alias_set (to
),
5355 nontemporal
, reversep
);
5356 else if (known_eq (bitpos
, 0) && known_eq (bitsize
, mode_bitsize
))
5358 result
= expand_normal (from
);
5359 if (GET_CODE (result
) == CONCAT
)
5361 to_mode
= GET_MODE_INNER (to_mode
);
5362 machine_mode from_mode
= GET_MODE_INNER (GET_MODE (result
));
5364 = simplify_gen_subreg (to_mode
, XEXP (result
, 0),
5367 = simplify_gen_subreg (to_mode
, XEXP (result
, 1),
5369 if (!from_real
|| !from_imag
)
5370 goto concat_store_slow
;
5371 emit_move_insn (XEXP (to_rtx
, 0), from_real
);
5372 emit_move_insn (XEXP (to_rtx
, 1), from_imag
);
5376 machine_mode from_mode
5377 = GET_MODE (result
) == VOIDmode
5378 ? TYPE_MODE (TREE_TYPE (from
))
5379 : GET_MODE (result
);
5382 from_rtx
= change_address (result
, to_mode
, NULL_RTX
);
5385 = simplify_gen_subreg (to_mode
, result
, from_mode
, 0);
5388 emit_move_insn (XEXP (to_rtx
, 0),
5389 read_complex_part (from_rtx
, false));
5390 emit_move_insn (XEXP (to_rtx
, 1),
5391 read_complex_part (from_rtx
, true));
5395 to_mode
= GET_MODE_INNER (to_mode
);
5397 = simplify_gen_subreg (to_mode
, result
, from_mode
, 0);
5399 = simplify_gen_subreg (to_mode
, result
, from_mode
,
5400 GET_MODE_SIZE (to_mode
));
5401 if (!from_real
|| !from_imag
)
5402 goto concat_store_slow
;
5403 emit_move_insn (XEXP (to_rtx
, 0), from_real
);
5404 emit_move_insn (XEXP (to_rtx
, 1), from_imag
);
5411 rtx temp
= assign_stack_temp (GET_MODE (to_rtx
),
5412 GET_MODE_SIZE (GET_MODE (to_rtx
)));
5413 write_complex_part (temp
, XEXP (to_rtx
, 0), false);
5414 write_complex_part (temp
, XEXP (to_rtx
, 1), true);
5415 result
= store_field (temp
, bitsize
, bitpos
,
5416 bitregion_start
, bitregion_end
,
5417 mode1
, from
, get_alias_set (to
),
5418 nontemporal
, reversep
);
5419 emit_move_insn (XEXP (to_rtx
, 0), read_complex_part (temp
, false));
5420 emit_move_insn (XEXP (to_rtx
, 1), read_complex_part (temp
, true));
5423 /* For calls to functions returning variable length structures, if TO_RTX
5424 is not a MEM, go through a MEM because we must not create temporaries
5426 else if (!MEM_P (to_rtx
)
5427 && TREE_CODE (from
) == CALL_EXPR
5428 && COMPLETE_TYPE_P (TREE_TYPE (from
))
5429 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from
))) != INTEGER_CST
)
5431 rtx temp
= assign_stack_temp (GET_MODE (to_rtx
),
5432 GET_MODE_SIZE (GET_MODE (to_rtx
)));
5433 result
= store_field (temp
, bitsize
, bitpos
, bitregion_start
,
5434 bitregion_end
, mode1
, from
, get_alias_set (to
),
5435 nontemporal
, reversep
);
5436 emit_move_insn (to_rtx
, temp
);
5442 /* If the field is at offset zero, we could have been given the
5443 DECL_RTX of the parent struct. Don't munge it. */
5444 to_rtx
= shallow_copy_rtx (to_rtx
);
5445 set_mem_attributes_minus_bitpos (to_rtx
, to
, 0, bitpos
);
5447 MEM_VOLATILE_P (to_rtx
) = 1;
5450 gcc_checking_assert (known_ge (bitpos
, 0));
5451 if (optimize_bitfield_assignment_op (bitsize
, bitpos
,
5452 bitregion_start
, bitregion_end
,
5453 mode1
, to_rtx
, to
, from
,
5456 else if (SUBREG_P (to_rtx
)
5457 && SUBREG_PROMOTED_VAR_P (to_rtx
))
5459 /* If to_rtx is a promoted subreg, we need to zero or sign
5460 extend the value afterwards. */
5461 if (TREE_CODE (to
) == MEM_REF
5462 && !REF_REVERSE_STORAGE_ORDER (to
)
5463 && known_eq (bitpos
, 0)
5464 && known_eq (bitsize
, GET_MODE_BITSIZE (GET_MODE (to_rtx
))))
5465 result
= store_expr (from
, to_rtx
, 0, nontemporal
, false);
5469 = lowpart_subreg (subreg_unpromoted_mode (to_rtx
),
5470 SUBREG_REG (to_rtx
),
5471 subreg_promoted_mode (to_rtx
));
5472 result
= store_field (to_rtx1
, bitsize
, bitpos
,
5473 bitregion_start
, bitregion_end
,
5474 mode1
, from
, get_alias_set (to
),
5475 nontemporal
, reversep
);
5476 convert_move (SUBREG_REG (to_rtx
), to_rtx1
,
5477 SUBREG_PROMOTED_SIGN (to_rtx
));
5481 result
= store_field (to_rtx
, bitsize
, bitpos
,
5482 bitregion_start
, bitregion_end
,
5483 mode1
, from
, get_alias_set (to
),
5484 nontemporal
, reversep
);
5488 preserve_temp_slots (result
);
5493 /* If the rhs is a function call and its value is not an aggregate,
5494 call the function before we start to compute the lhs.
5495 This is needed for correct code for cases such as
5496 val = setjmp (buf) on machines where reference to val
5497 requires loading up part of an address in a separate insn.
5499 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
5500 since it might be a promoted variable where the zero- or sign- extension
5501 needs to be done. Handling this in the normal way is safe because no
5502 computation is done before the call. The same is true for SSA names. */
5503 if (TREE_CODE (from
) == CALL_EXPR
&& ! aggregate_value_p (from
, from
)
5504 && COMPLETE_TYPE_P (TREE_TYPE (from
))
5505 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from
))) == INTEGER_CST
5507 || TREE_CODE (to
) == PARM_DECL
5508 || TREE_CODE (to
) == RESULT_DECL
)
5509 && REG_P (DECL_RTL (to
)))
5510 || TREE_CODE (to
) == SSA_NAME
))
5515 value
= expand_normal (from
);
5518 to_rtx
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5520 /* Handle calls that return values in multiple non-contiguous locations.
5521 The Irix 6 ABI has examples of this. */
5522 if (GET_CODE (to_rtx
) == PARALLEL
)
5524 if (GET_CODE (value
) == PARALLEL
)
5525 emit_group_move (to_rtx
, value
);
5527 emit_group_load (to_rtx
, value
, TREE_TYPE (from
),
5528 int_size_in_bytes (TREE_TYPE (from
)));
5530 else if (GET_CODE (value
) == PARALLEL
)
5531 emit_group_store (to_rtx
, value
, TREE_TYPE (from
),
5532 int_size_in_bytes (TREE_TYPE (from
)));
5533 else if (GET_MODE (to_rtx
) == BLKmode
)
5535 /* Handle calls that return BLKmode values in registers. */
5537 copy_blkmode_from_reg (to_rtx
, value
, TREE_TYPE (from
));
5539 emit_block_move (to_rtx
, value
, expr_size (from
), BLOCK_OP_NORMAL
);
5543 if (POINTER_TYPE_P (TREE_TYPE (to
)))
5544 value
= convert_memory_address_addr_space
5545 (as_a
<scalar_int_mode
> (GET_MODE (to_rtx
)), value
,
5546 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to
))));
5548 emit_move_insn (to_rtx
, value
);
5551 preserve_temp_slots (to_rtx
);
5556 /* Ordinary treatment. Expand TO to get a REG or MEM rtx. */
5557 to_rtx
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5559 /* Don't move directly into a return register. */
5560 if (TREE_CODE (to
) == RESULT_DECL
5561 && (REG_P (to_rtx
) || GET_CODE (to_rtx
) == PARALLEL
))
5567 /* If the source is itself a return value, it still is in a pseudo at
5568 this point so we can move it back to the return register directly. */
5570 && TYPE_MODE (TREE_TYPE (from
)) == BLKmode
5571 && TREE_CODE (from
) != CALL_EXPR
)
5572 temp
= copy_blkmode_to_reg (GET_MODE (to_rtx
), from
);
5574 temp
= expand_expr (from
, NULL_RTX
, GET_MODE (to_rtx
), EXPAND_NORMAL
);
5576 /* Handle calls that return values in multiple non-contiguous locations.
5577 The Irix 6 ABI has examples of this. */
5578 if (GET_CODE (to_rtx
) == PARALLEL
)
5580 if (GET_CODE (temp
) == PARALLEL
)
5581 emit_group_move (to_rtx
, temp
);
5583 emit_group_load (to_rtx
, temp
, TREE_TYPE (from
),
5584 int_size_in_bytes (TREE_TYPE (from
)));
5587 emit_move_insn (to_rtx
, temp
);
5589 preserve_temp_slots (to_rtx
);
5594 /* In case we are returning the contents of an object which overlaps
5595 the place the value is being stored, use a safe function when copying
5596 a value through a pointer into a structure value return block. */
5597 if (TREE_CODE (to
) == RESULT_DECL
5598 && TREE_CODE (from
) == INDIRECT_REF
5599 && ADDR_SPACE_GENERIC_P
5600 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from
, 0)))))
5601 && refs_may_alias_p (to
, from
)
5602 && cfun
->returns_struct
5603 && !cfun
->returns_pcc_struct
)
5608 size
= expr_size (from
);
5609 from_rtx
= expand_normal (from
);
5611 emit_block_move_via_libcall (XEXP (to_rtx
, 0), XEXP (from_rtx
, 0), size
);
5613 preserve_temp_slots (to_rtx
);
5618 /* Compute FROM and store the value in the rtx we got. */
5621 result
= store_expr (from
, to_rtx
, 0, nontemporal
, false);
5622 preserve_temp_slots (result
);
5627 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
5628 succeeded, false otherwise. */
5631 emit_storent_insn (rtx to
, rtx from
)
5633 class expand_operand ops
[2];
5634 machine_mode mode
= GET_MODE (to
);
5635 enum insn_code code
= optab_handler (storent_optab
, mode
);
5637 if (code
== CODE_FOR_nothing
)
5640 create_fixed_operand (&ops
[0], to
);
5641 create_input_operand (&ops
[1], from
, mode
);
5642 return maybe_expand_insn (code
, 2, ops
);
5645 /* Helper function for store_expr storing of STRING_CST. */
5648 string_cst_read_str (void *data
, HOST_WIDE_INT offset
, scalar_int_mode mode
)
5650 tree str
= (tree
) data
;
5652 gcc_assert (offset
>= 0);
5653 if (offset
>= TREE_STRING_LENGTH (str
))
5656 if ((unsigned HOST_WIDE_INT
) offset
+ GET_MODE_SIZE (mode
)
5657 > (unsigned HOST_WIDE_INT
) TREE_STRING_LENGTH (str
))
5659 char *p
= XALLOCAVEC (char, GET_MODE_SIZE (mode
));
5660 size_t l
= TREE_STRING_LENGTH (str
) - offset
;
5661 memcpy (p
, TREE_STRING_POINTER (str
) + offset
, l
);
5662 memset (p
+ l
, '\0', GET_MODE_SIZE (mode
) - l
);
5663 return c_readstr (p
, mode
, false);
5666 return c_readstr (TREE_STRING_POINTER (str
) + offset
, mode
, false);
5669 /* Generate code for computing expression EXP,
5670 and storing the value into TARGET.
5672 If the mode is BLKmode then we may return TARGET itself.
5673 It turns out that in BLKmode it doesn't cause a problem.
5674 because C has no operators that could combine two different
5675 assignments into the same BLKmode object with different values
5676 with no sequence point. Will other languages need this to
5679 If CALL_PARAM_P is nonzero, this is a store into a call param on the
5680 stack, and block moves may need to be treated specially.
5682 If NONTEMPORAL is true, try using a nontemporal store instruction.
5684 If REVERSE is true, the store is to be done in reverse order. */
5687 store_expr (tree exp
, rtx target
, int call_param_p
,
5688 bool nontemporal
, bool reverse
)
5691 rtx alt_rtl
= NULL_RTX
;
5692 location_t loc
= curr_insn_location ();
5693 bool shortened_string_cst
= false;
5695 if (VOID_TYPE_P (TREE_TYPE (exp
)))
5697 /* C++ can generate ?: expressions with a throw expression in one
5698 branch and an rvalue in the other. Here, we resolve attempts to
5699 store the throw expression's nonexistent result. */
5700 gcc_assert (!call_param_p
);
5701 expand_expr (exp
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
5704 if (TREE_CODE (exp
) == COMPOUND_EXPR
)
5706 /* Perform first part of compound expression, then assign from second
5708 expand_expr (TREE_OPERAND (exp
, 0), const0_rtx
, VOIDmode
,
5709 call_param_p
? EXPAND_STACK_PARM
: EXPAND_NORMAL
);
5710 return store_expr (TREE_OPERAND (exp
, 1), target
,
5711 call_param_p
, nontemporal
, reverse
);
5713 else if (TREE_CODE (exp
) == COND_EXPR
&& GET_MODE (target
) == BLKmode
)
5715 /* For conditional expression, get safe form of the target. Then
5716 test the condition, doing the appropriate assignment on either
5717 side. This avoids the creation of unnecessary temporaries.
5718 For non-BLKmode, it is more efficient not to do this. */
5720 rtx_code_label
*lab1
= gen_label_rtx (), *lab2
= gen_label_rtx ();
5722 do_pending_stack_adjust ();
5724 jumpifnot (TREE_OPERAND (exp
, 0), lab1
,
5725 profile_probability::uninitialized ());
5726 store_expr (TREE_OPERAND (exp
, 1), target
, call_param_p
,
5727 nontemporal
, reverse
);
5728 emit_jump_insn (targetm
.gen_jump (lab2
));
5731 store_expr (TREE_OPERAND (exp
, 2), target
, call_param_p
,
5732 nontemporal
, reverse
);
5738 else if (GET_CODE (target
) == SUBREG
&& SUBREG_PROMOTED_VAR_P (target
))
5739 /* If this is a scalar in a register that is stored in a wider mode
5740 than the declared mode, compute the result into its declared mode
5741 and then convert to the wider mode. Our value is the computed
5744 rtx inner_target
= 0;
5745 scalar_int_mode outer_mode
= subreg_unpromoted_mode (target
);
5746 scalar_int_mode inner_mode
= subreg_promoted_mode (target
);
5748 /* We can do the conversion inside EXP, which will often result
5749 in some optimizations. Do the conversion in two steps: first
5750 change the signedness, if needed, then the extend. But don't
5751 do this if the type of EXP is a subtype of something else
5752 since then the conversion might involve more than just
5753 converting modes. */
5754 if (INTEGRAL_TYPE_P (TREE_TYPE (exp
))
5755 && TREE_TYPE (TREE_TYPE (exp
)) == 0
5756 && GET_MODE_PRECISION (outer_mode
)
5757 == TYPE_PRECISION (TREE_TYPE (exp
)))
5759 if (!SUBREG_CHECK_PROMOTED_SIGN (target
,
5760 TYPE_UNSIGNED (TREE_TYPE (exp
))))
5762 /* Some types, e.g. Fortran's logical*4, won't have a signed
5763 version, so use the mode instead. */
5765 = (signed_or_unsigned_type_for
5766 (SUBREG_PROMOTED_SIGN (target
), TREE_TYPE (exp
)));
5768 ntype
= lang_hooks
.types
.type_for_mode
5769 (TYPE_MODE (TREE_TYPE (exp
)),
5770 SUBREG_PROMOTED_SIGN (target
));
5772 exp
= fold_convert_loc (loc
, ntype
, exp
);
5775 exp
= fold_convert_loc (loc
, lang_hooks
.types
.type_for_mode
5776 (inner_mode
, SUBREG_PROMOTED_SIGN (target
)),
5779 inner_target
= SUBREG_REG (target
);
5782 temp
= expand_expr (exp
, inner_target
, VOIDmode
,
5783 call_param_p
? EXPAND_STACK_PARM
: EXPAND_NORMAL
);
5786 /* If TEMP is a VOIDmode constant, use convert_modes to make
5787 sure that we properly convert it. */
5788 if (CONSTANT_P (temp
) && GET_MODE (temp
) == VOIDmode
)
5790 temp
= convert_modes (outer_mode
, TYPE_MODE (TREE_TYPE (exp
)),
5791 temp
, SUBREG_PROMOTED_SIGN (target
));
5792 temp
= convert_modes (inner_mode
, outer_mode
, temp
,
5793 SUBREG_PROMOTED_SIGN (target
));
5796 convert_move (SUBREG_REG (target
), temp
,
5797 SUBREG_PROMOTED_SIGN (target
));
5801 else if ((TREE_CODE (exp
) == STRING_CST
5802 || (TREE_CODE (exp
) == MEM_REF
5803 && TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
5804 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
5806 && integer_zerop (TREE_OPERAND (exp
, 1))))
5807 && !nontemporal
&& !call_param_p
5810 /* Optimize initialization of an array with a STRING_CST. */
5811 HOST_WIDE_INT exp_len
, str_copy_len
;
5813 tree str
= TREE_CODE (exp
) == STRING_CST
5814 ? exp
: TREE_OPERAND (TREE_OPERAND (exp
, 0), 0);
5816 exp_len
= int_expr_size (exp
);
5820 if (TREE_STRING_LENGTH (str
) <= 0)
5823 if (can_store_by_pieces (exp_len
, string_cst_read_str
, (void *) str
,
5824 MEM_ALIGN (target
), false))
5826 store_by_pieces (target
, exp_len
, string_cst_read_str
, (void *) str
,
5827 MEM_ALIGN (target
), false, RETURN_BEGIN
);
5831 str_copy_len
= TREE_STRING_LENGTH (str
);
5832 if ((STORE_MAX_PIECES
& (STORE_MAX_PIECES
- 1)) == 0)
5834 str_copy_len
+= STORE_MAX_PIECES
- 1;
5835 str_copy_len
&= ~(STORE_MAX_PIECES
- 1);
5837 if (str_copy_len
>= exp_len
)
5840 if (!can_store_by_pieces (str_copy_len
, string_cst_read_str
,
5841 (void *) str
, MEM_ALIGN (target
), false))
5844 dest_mem
= store_by_pieces (target
, str_copy_len
, string_cst_read_str
,
5845 (void *) str
, MEM_ALIGN (target
), false,
5847 clear_storage (adjust_address_1 (dest_mem
, BLKmode
, 0, 1, 1, 0,
5848 exp_len
- str_copy_len
),
5849 GEN_INT (exp_len
- str_copy_len
), BLOCK_OP_NORMAL
);
5857 /* If we want to use a nontemporal or a reverse order store, force the
5858 value into a register first. */
5859 tmp_target
= nontemporal
|| reverse
? NULL_RTX
: target
;
5861 if (TREE_CODE (exp
) == STRING_CST
5862 && tmp_target
== target
5863 && GET_MODE (target
) == BLKmode
5864 && TYPE_MODE (TREE_TYPE (exp
)) == BLKmode
)
5866 rtx size
= expr_size (exp
);
5867 if (CONST_INT_P (size
)
5868 && size
!= const0_rtx
5870 > ((unsigned HOST_WIDE_INT
) TREE_STRING_LENGTH (exp
) + 32)))
5872 /* If the STRING_CST has much larger array type than
5873 TREE_STRING_LENGTH, only emit the TREE_STRING_LENGTH part of
5874 it into the rodata section as the code later on will use
5875 memset zero for the remainder anyway. See PR95052. */
5876 tmp_target
= NULL_RTX
;
5877 rexp
= copy_node (exp
);
5879 = build_index_type (size_int (TREE_STRING_LENGTH (exp
) - 1));
5880 TREE_TYPE (rexp
) = build_array_type (TREE_TYPE (TREE_TYPE (exp
)),
5882 shortened_string_cst
= true;
5885 temp
= expand_expr_real (rexp
, tmp_target
, GET_MODE (target
),
5887 ? EXPAND_STACK_PARM
: EXPAND_NORMAL
),
5889 if (shortened_string_cst
)
5891 gcc_assert (MEM_P (temp
));
5892 temp
= change_address (temp
, BLKmode
, NULL_RTX
);
5896 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
5897 the same as that of TARGET, adjust the constant. This is needed, for
5898 example, in case it is a CONST_DOUBLE or CONST_WIDE_INT and we want
5899 only a word-sized value. */
5900 if (CONSTANT_P (temp
) && GET_MODE (temp
) == VOIDmode
5901 && TREE_CODE (exp
) != ERROR_MARK
5902 && GET_MODE (target
) != TYPE_MODE (TREE_TYPE (exp
)))
5904 gcc_assert (!shortened_string_cst
);
5905 if (GET_MODE_CLASS (GET_MODE (target
))
5906 != GET_MODE_CLASS (TYPE_MODE (TREE_TYPE (exp
)))
5907 && known_eq (GET_MODE_BITSIZE (GET_MODE (target
)),
5908 GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp
)))))
5910 rtx t
= simplify_gen_subreg (GET_MODE (target
), temp
,
5911 TYPE_MODE (TREE_TYPE (exp
)), 0);
5915 if (GET_MODE (temp
) == VOIDmode
)
5916 temp
= convert_modes (GET_MODE (target
), TYPE_MODE (TREE_TYPE (exp
)),
5917 temp
, TYPE_UNSIGNED (TREE_TYPE (exp
)));
5920 /* If value was not generated in the target, store it there.
5921 Convert the value to TARGET's type first if necessary and emit the
5922 pending incrementations that have been queued when expanding EXP.
5923 Note that we cannot emit the whole queue blindly because this will
5924 effectively disable the POST_INC optimization later.
5926 If TEMP and TARGET compare equal according to rtx_equal_p, but
5927 one or both of them are volatile memory refs, we have to distinguish
5929 - expand_expr has used TARGET. In this case, we must not generate
5930 another copy. This can be detected by TARGET being equal according
5932 - expand_expr has not used TARGET - that means that the source just
5933 happens to have the same RTX form. Since temp will have been created
5934 by expand_expr, it will compare unequal according to == .
5935 We must generate a copy in this case, to reach the correct number
5936 of volatile memory references. */
5938 if ((! rtx_equal_p (temp
, target
)
5939 || (temp
!= target
&& (side_effects_p (temp
)
5940 || side_effects_p (target
))))
5941 && TREE_CODE (exp
) != ERROR_MARK
5942 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
5943 but TARGET is not valid memory reference, TEMP will differ
5944 from TARGET although it is really the same location. */
5946 && rtx_equal_p (alt_rtl
, target
)
5947 && !side_effects_p (alt_rtl
)
5948 && !side_effects_p (target
))
5949 /* If there's nothing to copy, don't bother. Don't call
5950 expr_size unless necessary, because some front-ends (C++)
5951 expr_size-hook must not be given objects that are not
5952 supposed to be bit-copied or bit-initialized. */
5953 && expr_size (exp
) != const0_rtx
)
5955 if (GET_MODE (temp
) != GET_MODE (target
) && GET_MODE (temp
) != VOIDmode
)
5957 gcc_assert (!shortened_string_cst
);
5958 if (GET_MODE (target
) == BLKmode
)
5960 /* Handle calls that return BLKmode values in registers. */
5961 if (REG_P (temp
) && TREE_CODE (exp
) == CALL_EXPR
)
5962 copy_blkmode_from_reg (target
, temp
, TREE_TYPE (exp
));
5964 store_bit_field (target
,
5965 rtx_to_poly_int64 (expr_size (exp
))
5967 0, 0, 0, GET_MODE (temp
), temp
, reverse
);
5970 convert_move (target
, temp
, TYPE_UNSIGNED (TREE_TYPE (exp
)));
5973 else if (GET_MODE (temp
) == BLKmode
&& TREE_CODE (exp
) == STRING_CST
)
5975 /* Handle copying a string constant into an array. The string
5976 constant may be shorter than the array. So copy just the string's
5977 actual length, and clear the rest. First get the size of the data
5978 type of the string, which is actually the size of the target. */
5979 rtx size
= expr_size (exp
);
5981 if (CONST_INT_P (size
)
5982 && INTVAL (size
) < TREE_STRING_LENGTH (exp
))
5983 emit_block_move (target
, temp
, size
,
5985 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5988 machine_mode pointer_mode
5989 = targetm
.addr_space
.pointer_mode (MEM_ADDR_SPACE (target
));
5990 machine_mode address_mode
= get_address_mode (target
);
5992 /* Compute the size of the data to copy from the string. */
5994 = size_binop_loc (loc
, MIN_EXPR
,
5995 make_tree (sizetype
, size
),
5996 size_int (TREE_STRING_LENGTH (exp
)));
5998 = expand_expr (copy_size
, NULL_RTX
, VOIDmode
,
6000 ? EXPAND_STACK_PARM
: EXPAND_NORMAL
));
6001 rtx_code_label
*label
= 0;
6003 /* Copy that much. */
6004 copy_size_rtx
= convert_to_mode (pointer_mode
, copy_size_rtx
,
6005 TYPE_UNSIGNED (sizetype
));
6006 emit_block_move (target
, temp
, copy_size_rtx
,
6008 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
6010 /* Figure out how much is left in TARGET that we have to clear.
6011 Do all calculations in pointer_mode. */
6012 poly_int64 const_copy_size
;
6013 if (poly_int_rtx_p (copy_size_rtx
, &const_copy_size
))
6015 size
= plus_constant (address_mode
, size
, -const_copy_size
);
6016 target
= adjust_address (target
, BLKmode
, const_copy_size
);
6020 size
= expand_binop (TYPE_MODE (sizetype
), sub_optab
, size
,
6021 copy_size_rtx
, NULL_RTX
, 0,
6024 if (GET_MODE (copy_size_rtx
) != address_mode
)
6025 copy_size_rtx
= convert_to_mode (address_mode
,
6027 TYPE_UNSIGNED (sizetype
));
6029 target
= offset_address (target
, copy_size_rtx
,
6030 highest_pow2_factor (copy_size
));
6031 label
= gen_label_rtx ();
6032 emit_cmp_and_jump_insns (size
, const0_rtx
, LT
, NULL_RTX
,
6033 GET_MODE (size
), 0, label
);
6036 if (size
!= const0_rtx
)
6037 clear_storage (target
, size
, BLOCK_OP_NORMAL
);
6043 else if (shortened_string_cst
)
6045 /* Handle calls that return values in multiple non-contiguous locations.
6046 The Irix 6 ABI has examples of this. */
6047 else if (GET_CODE (target
) == PARALLEL
)
6049 if (GET_CODE (temp
) == PARALLEL
)
6050 emit_group_move (target
, temp
);
6052 emit_group_load (target
, temp
, TREE_TYPE (exp
),
6053 int_size_in_bytes (TREE_TYPE (exp
)));
6055 else if (GET_CODE (temp
) == PARALLEL
)
6056 emit_group_store (target
, temp
, TREE_TYPE (exp
),
6057 int_size_in_bytes (TREE_TYPE (exp
)));
6058 else if (GET_MODE (temp
) == BLKmode
)
6059 emit_block_move (target
, temp
, expr_size (exp
),
6061 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
6062 /* If we emit a nontemporal store, there is nothing else to do. */
6063 else if (nontemporal
&& emit_storent_insn (target
, temp
))
6068 temp
= flip_storage_order (GET_MODE (target
), temp
);
6069 temp
= force_operand (temp
, target
);
6071 emit_move_insn (target
, temp
);
6075 gcc_assert (!shortened_string_cst
);
6080 /* Return true if field F of structure TYPE is a flexible array. */
6083 flexible_array_member_p (const_tree f
, const_tree type
)
6088 return (DECL_CHAIN (f
) == NULL
6089 && TREE_CODE (tf
) == ARRAY_TYPE
6091 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf
))
6092 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf
)))
6093 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf
))
6094 && int_size_in_bytes (type
) >= 0);
6097 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
6098 must have in order for it to completely initialize a value of type TYPE.
6099 Return -1 if the number isn't known.
6101 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
6103 static HOST_WIDE_INT
6104 count_type_elements (const_tree type
, bool for_ctor_p
)
6106 switch (TREE_CODE (type
))
6112 nelts
= array_type_nelts (type
);
6113 if (nelts
&& tree_fits_uhwi_p (nelts
))
6115 unsigned HOST_WIDE_INT n
;
6117 n
= tree_to_uhwi (nelts
) + 1;
6118 if (n
== 0 || for_ctor_p
)
6121 return n
* count_type_elements (TREE_TYPE (type
), false);
6123 return for_ctor_p
? -1 : 1;
6128 unsigned HOST_WIDE_INT n
;
6132 for (f
= TYPE_FIELDS (type
); f
; f
= DECL_CHAIN (f
))
6133 if (TREE_CODE (f
) == FIELD_DECL
)
6136 n
+= count_type_elements (TREE_TYPE (f
), false);
6137 else if (!flexible_array_member_p (f
, type
))
6138 /* Don't count flexible arrays, which are not supposed
6139 to be initialized. */
6147 case QUAL_UNION_TYPE
:
6152 gcc_assert (!for_ctor_p
);
6153 /* Estimate the number of scalars in each field and pick the
6154 maximum. Other estimates would do instead; the idea is simply
6155 to make sure that the estimate is not sensitive to the ordering
6158 for (f
= TYPE_FIELDS (type
); f
; f
= DECL_CHAIN (f
))
6159 if (TREE_CODE (f
) == FIELD_DECL
)
6161 m
= count_type_elements (TREE_TYPE (f
), false);
6162 /* If the field doesn't span the whole union, add an extra
6163 scalar for the rest. */
6164 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f
)),
6165 TYPE_SIZE (type
)) != 1)
6178 unsigned HOST_WIDE_INT nelts
;
6179 if (TYPE_VECTOR_SUBPARTS (type
).is_constant (&nelts
))
6187 case FIXED_POINT_TYPE
:
6192 case REFERENCE_TYPE
:
6209 /* Helper for categorize_ctor_elements. Identical interface. */
6212 categorize_ctor_elements_1 (const_tree ctor
, HOST_WIDE_INT
*p_nz_elts
,
6213 HOST_WIDE_INT
*p_unique_nz_elts
,
6214 HOST_WIDE_INT
*p_init_elts
, bool *p_complete
)
6216 unsigned HOST_WIDE_INT idx
;
6217 HOST_WIDE_INT nz_elts
, unique_nz_elts
, init_elts
, num_fields
;
6218 tree value
, purpose
, elt_type
;
6220 /* Whether CTOR is a valid constant initializer, in accordance with what
6221 initializer_constant_valid_p does. If inferred from the constructor
6222 elements, true until proven otherwise. */
6223 bool const_from_elts_p
= constructor_static_from_elts_p (ctor
);
6224 bool const_p
= const_from_elts_p
? true : TREE_STATIC (ctor
);
6230 elt_type
= NULL_TREE
;
6232 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor
), idx
, purpose
, value
)
6234 HOST_WIDE_INT mult
= 1;
6236 if (purpose
&& TREE_CODE (purpose
) == RANGE_EXPR
)
6238 tree lo_index
= TREE_OPERAND (purpose
, 0);
6239 tree hi_index
= TREE_OPERAND (purpose
, 1);
6241 if (tree_fits_uhwi_p (lo_index
) && tree_fits_uhwi_p (hi_index
))
6242 mult
= (tree_to_uhwi (hi_index
)
6243 - tree_to_uhwi (lo_index
) + 1);
6246 elt_type
= TREE_TYPE (value
);
6248 switch (TREE_CODE (value
))
6252 HOST_WIDE_INT nz
= 0, unz
= 0, ic
= 0;
6254 bool const_elt_p
= categorize_ctor_elements_1 (value
, &nz
, &unz
,
6257 nz_elts
+= mult
* nz
;
6258 unique_nz_elts
+= unz
;
6259 init_elts
+= mult
* ic
;
6261 if (const_from_elts_p
&& const_p
)
6262 const_p
= const_elt_p
;
6269 if (!initializer_zerop (value
))
6278 nz_elts
+= mult
* TREE_STRING_LENGTH (value
);
6279 unique_nz_elts
+= TREE_STRING_LENGTH (value
);
6280 init_elts
+= mult
* TREE_STRING_LENGTH (value
);
6284 if (!initializer_zerop (TREE_REALPART (value
)))
6289 if (!initializer_zerop (TREE_IMAGPART (value
)))
6294 init_elts
+= 2 * mult
;
6299 /* We can only construct constant-length vectors using
6301 unsigned int nunits
= VECTOR_CST_NELTS (value
).to_constant ();
6302 for (unsigned int i
= 0; i
< nunits
; ++i
)
6304 tree v
= VECTOR_CST_ELT (value
, i
);
6305 if (!initializer_zerop (v
))
6317 HOST_WIDE_INT tc
= count_type_elements (elt_type
, false);
6318 nz_elts
+= mult
* tc
;
6319 unique_nz_elts
+= tc
;
6320 init_elts
+= mult
* tc
;
6322 if (const_from_elts_p
&& const_p
)
6324 = initializer_constant_valid_p (value
,
6326 TYPE_REVERSE_STORAGE_ORDER
6334 if (*p_complete
&& !complete_ctor_at_level_p (TREE_TYPE (ctor
),
6335 num_fields
, elt_type
))
6336 *p_complete
= false;
6338 *p_nz_elts
+= nz_elts
;
6339 *p_unique_nz_elts
+= unique_nz_elts
;
6340 *p_init_elts
+= init_elts
;
6345 /* Examine CTOR to discover:
6346 * how many scalar fields are set to nonzero values,
6347 and place it in *P_NZ_ELTS;
6348 * the same, but counting RANGE_EXPRs as multiplier of 1 instead of
6349 high - low + 1 (this can be useful for callers to determine ctors
6350 that could be cheaply initialized with - perhaps nested - loops
6351 compared to copied from huge read-only data),
6352 and place it in *P_UNIQUE_NZ_ELTS;
6353 * how many scalar fields in total are in CTOR,
6354 and place it in *P_ELT_COUNT.
6355 * whether the constructor is complete -- in the sense that every
6356 meaningful byte is explicitly given a value --
6357 and place it in *P_COMPLETE.
6359 Return whether or not CTOR is a valid static constant initializer, the same
6360 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
6363 categorize_ctor_elements (const_tree ctor
, HOST_WIDE_INT
*p_nz_elts
,
6364 HOST_WIDE_INT
*p_unique_nz_elts
,
6365 HOST_WIDE_INT
*p_init_elts
, bool *p_complete
)
6368 *p_unique_nz_elts
= 0;
6372 return categorize_ctor_elements_1 (ctor
, p_nz_elts
, p_unique_nz_elts
,
6373 p_init_elts
, p_complete
);
6376 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
6377 of which had type LAST_TYPE. Each element was itself a complete
6378 initializer, in the sense that every meaningful byte was explicitly
6379 given a value. Return true if the same is true for the constructor
6383 complete_ctor_at_level_p (const_tree type
, HOST_WIDE_INT num_elts
,
6384 const_tree last_type
)
6386 if (TREE_CODE (type
) == UNION_TYPE
6387 || TREE_CODE (type
) == QUAL_UNION_TYPE
)
6392 gcc_assert (num_elts
== 1 && last_type
);
6394 /* ??? We could look at each element of the union, and find the
6395 largest element. Which would avoid comparing the size of the
6396 initialized element against any tail padding in the union.
6397 Doesn't seem worth the effort... */
6398 return simple_cst_equal (TYPE_SIZE (type
), TYPE_SIZE (last_type
)) == 1;
6401 return count_type_elements (type
, true) == num_elts
;
6404 /* Return 1 if EXP contains mostly (3/4) zeros. */
6407 mostly_zeros_p (const_tree exp
)
6409 if (TREE_CODE (exp
) == CONSTRUCTOR
)
6411 HOST_WIDE_INT nz_elts
, unz_elts
, init_elts
;
6414 categorize_ctor_elements (exp
, &nz_elts
, &unz_elts
, &init_elts
,
6416 return !complete_p
|| nz_elts
< init_elts
/ 4;
6419 return initializer_zerop (exp
);
6422 /* Return 1 if EXP contains all zeros. */
6425 all_zeros_p (const_tree exp
)
6427 if (TREE_CODE (exp
) == CONSTRUCTOR
)
6429 HOST_WIDE_INT nz_elts
, unz_elts
, init_elts
;
6432 categorize_ctor_elements (exp
, &nz_elts
, &unz_elts
, &init_elts
,
6434 return nz_elts
== 0;
6437 return initializer_zerop (exp
);
6440 /* Helper function for store_constructor.
6441 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
6442 CLEARED is as for store_constructor.
6443 ALIAS_SET is the alias set to use for any stores.
6444 If REVERSE is true, the store is to be done in reverse order.
6446 This provides a recursive shortcut back to store_constructor when it isn't
6447 necessary to go through store_field. This is so that we can pass through
6448 the cleared field to let store_constructor know that we may not have to
6449 clear a substructure if the outer structure has already been cleared. */
6452 store_constructor_field (rtx target
, poly_uint64 bitsize
, poly_int64 bitpos
,
6453 poly_uint64 bitregion_start
,
6454 poly_uint64 bitregion_end
,
6456 tree exp
, int cleared
,
6457 alias_set_type alias_set
, bool reverse
)
6460 poly_uint64 bytesize
;
6461 if (TREE_CODE (exp
) == CONSTRUCTOR
6462 /* We can only call store_constructor recursively if the size and
6463 bit position are on a byte boundary. */
6464 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
6465 && maybe_ne (bitsize
, 0U)
6466 && multiple_p (bitsize
, BITS_PER_UNIT
, &bytesize
)
6467 /* If we have a nonzero bitpos for a register target, then we just
6468 let store_field do the bitfield handling. This is unlikely to
6469 generate unnecessary clear instructions anyways. */
6470 && (known_eq (bitpos
, 0) || MEM_P (target
)))
6474 machine_mode target_mode
= GET_MODE (target
);
6475 if (target_mode
!= BLKmode
6476 && !multiple_p (bitpos
, GET_MODE_ALIGNMENT (target_mode
)))
6477 target_mode
= BLKmode
;
6478 target
= adjust_address (target
, target_mode
, bytepos
);
6482 /* Update the alias set, if required. */
6483 if (MEM_P (target
) && ! MEM_KEEP_ALIAS_SET_P (target
)
6484 && MEM_ALIAS_SET (target
) != 0)
6486 target
= copy_rtx (target
);
6487 set_mem_alias_set (target
, alias_set
);
6490 store_constructor (exp
, target
, cleared
, bytesize
, reverse
);
6493 store_field (target
, bitsize
, bitpos
, bitregion_start
, bitregion_end
, mode
,
6494 exp
, alias_set
, false, reverse
);
6498 /* Returns the number of FIELD_DECLs in TYPE. */
6501 fields_length (const_tree type
)
6503 tree t
= TYPE_FIELDS (type
);
6506 for (; t
; t
= DECL_CHAIN (t
))
6507 if (TREE_CODE (t
) == FIELD_DECL
)
6514 /* Store the value of constructor EXP into the rtx TARGET.
6515 TARGET is either a REG or a MEM; we know it cannot conflict, since
6516 safe_from_p has been called.
6517 CLEARED is true if TARGET is known to have been zero'd.
6518 SIZE is the number of bytes of TARGET we are allowed to modify: this
6519 may not be the same as the size of EXP if we are assigning to a field
6520 which has been packed to exclude padding bits.
6521 If REVERSE is true, the store is to be done in reverse order. */
6524 store_constructor (tree exp
, rtx target
, int cleared
, poly_int64 size
,
6527 tree type
= TREE_TYPE (exp
);
6528 HOST_WIDE_INT exp_size
= int_size_in_bytes (type
);
6529 poly_int64 bitregion_end
= known_gt (size
, 0) ? size
* BITS_PER_UNIT
- 1 : 0;
6531 switch (TREE_CODE (type
))
6535 case QUAL_UNION_TYPE
:
6537 unsigned HOST_WIDE_INT idx
;
6540 /* The storage order is specified for every aggregate type. */
6541 reverse
= TYPE_REVERSE_STORAGE_ORDER (type
);
6543 /* If size is zero or the target is already cleared, do nothing. */
6544 if (known_eq (size
, 0) || cleared
)
6546 /* We either clear the aggregate or indicate the value is dead. */
6547 else if ((TREE_CODE (type
) == UNION_TYPE
6548 || TREE_CODE (type
) == QUAL_UNION_TYPE
)
6549 && ! CONSTRUCTOR_ELTS (exp
))
6550 /* If the constructor is empty, clear the union. */
6552 clear_storage (target
, expr_size (exp
), BLOCK_OP_NORMAL
);
6556 /* If we are building a static constructor into a register,
6557 set the initial value as zero so we can fold the value into
6558 a constant. But if more than one register is involved,
6559 this probably loses. */
6560 else if (REG_P (target
) && TREE_STATIC (exp
)
6561 && known_le (GET_MODE_SIZE (GET_MODE (target
)),
6562 REGMODE_NATURAL_SIZE (GET_MODE (target
))))
6564 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
6568 /* If the constructor has fewer fields than the structure or
6569 if we are initializing the structure to mostly zeros, clear
6570 the whole structure first. Don't do this if TARGET is a
6571 register whose mode size isn't equal to SIZE since
6572 clear_storage can't handle this case. */
6573 else if (known_size_p (size
)
6574 && (((int) CONSTRUCTOR_NELTS (exp
) != fields_length (type
))
6575 || mostly_zeros_p (exp
))
6577 || known_eq (GET_MODE_SIZE (GET_MODE (target
)), size
)))
6579 clear_storage (target
, gen_int_mode (size
, Pmode
),
6584 if (REG_P (target
) && !cleared
)
6585 emit_clobber (target
);
6587 /* Store each element of the constructor into the
6588 corresponding field of TARGET. */
6589 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), idx
, field
, value
)
6592 HOST_WIDE_INT bitsize
;
6593 HOST_WIDE_INT bitpos
= 0;
6595 rtx to_rtx
= target
;
6597 /* Just ignore missing fields. We cleared the whole
6598 structure, above, if any fields are missing. */
6602 if (cleared
&& initializer_zerop (value
))
6605 if (tree_fits_uhwi_p (DECL_SIZE (field
)))
6606 bitsize
= tree_to_uhwi (DECL_SIZE (field
));
6610 mode
= DECL_MODE (field
);
6611 if (DECL_BIT_FIELD (field
))
6614 offset
= DECL_FIELD_OFFSET (field
);
6615 if (tree_fits_shwi_p (offset
)
6616 && tree_fits_shwi_p (bit_position (field
)))
6618 bitpos
= int_bit_position (field
);
6624 /* If this initializes a field that is smaller than a
6625 word, at the start of a word, try to widen it to a full
6626 word. This special case allows us to output C++ member
6627 function initializations in a form that the optimizers
6629 if (WORD_REGISTER_OPERATIONS
6631 && bitsize
< BITS_PER_WORD
6632 && bitpos
% BITS_PER_WORD
== 0
6633 && GET_MODE_CLASS (mode
) == MODE_INT
6634 && TREE_CODE (value
) == INTEGER_CST
6636 && bitpos
+ BITS_PER_WORD
<= exp_size
* BITS_PER_UNIT
)
6638 type
= TREE_TYPE (value
);
6640 if (TYPE_PRECISION (type
) < BITS_PER_WORD
)
6642 type
= lang_hooks
.types
.type_for_mode
6643 (word_mode
, TYPE_UNSIGNED (type
));
6644 value
= fold_convert (type
, value
);
6645 /* Make sure the bits beyond the original bitsize are zero
6646 so that we can correctly avoid extra zeroing stores in
6647 later constructor elements. */
6649 = wide_int_to_tree (type
, wi::mask (bitsize
, false,
6651 value
= fold_build2 (BIT_AND_EXPR
, type
, value
, bitsize_mask
);
6654 if (BYTES_BIG_ENDIAN
)
6656 = fold_build2 (LSHIFT_EXPR
, type
, value
,
6657 build_int_cst (type
,
6658 BITS_PER_WORD
- bitsize
));
6659 bitsize
= BITS_PER_WORD
;
6663 if (MEM_P (to_rtx
) && !MEM_KEEP_ALIAS_SET_P (to_rtx
)
6664 && DECL_NONADDRESSABLE_P (field
))
6666 to_rtx
= copy_rtx (to_rtx
);
6667 MEM_KEEP_ALIAS_SET_P (to_rtx
) = 1;
6670 store_constructor_field (to_rtx
, bitsize
, bitpos
,
6671 0, bitregion_end
, mode
,
6673 get_alias_set (TREE_TYPE (field
)),
6681 unsigned HOST_WIDE_INT i
;
6684 tree elttype
= TREE_TYPE (type
);
6686 HOST_WIDE_INT minelt
= 0;
6687 HOST_WIDE_INT maxelt
= 0;
6689 /* The storage order is specified for every aggregate type. */
6690 reverse
= TYPE_REVERSE_STORAGE_ORDER (type
);
6692 domain
= TYPE_DOMAIN (type
);
6693 const_bounds_p
= (TYPE_MIN_VALUE (domain
)
6694 && TYPE_MAX_VALUE (domain
)
6695 && tree_fits_shwi_p (TYPE_MIN_VALUE (domain
))
6696 && tree_fits_shwi_p (TYPE_MAX_VALUE (domain
)));
6698 /* If we have constant bounds for the range of the type, get them. */
6701 minelt
= tree_to_shwi (TYPE_MIN_VALUE (domain
));
6702 maxelt
= tree_to_shwi (TYPE_MAX_VALUE (domain
));
6705 /* If the constructor has fewer elements than the array, clear
6706 the whole array first. Similarly if this is static
6707 constructor of a non-BLKmode object. */
6710 else if (REG_P (target
) && TREE_STATIC (exp
))
6714 unsigned HOST_WIDE_INT idx
;
6715 HOST_WIDE_INT count
= 0, zero_count
= 0;
6716 need_to_clear
= ! const_bounds_p
;
6718 /* This loop is a more accurate version of the loop in
6719 mostly_zeros_p (it handles RANGE_EXPR in an index). It
6720 is also needed to check for missing elements. */
6721 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), idx
, index
, value
)
6723 HOST_WIDE_INT this_node_count
;
6728 if (index
!= NULL_TREE
&& TREE_CODE (index
) == RANGE_EXPR
)
6730 tree lo_index
= TREE_OPERAND (index
, 0);
6731 tree hi_index
= TREE_OPERAND (index
, 1);
6733 if (! tree_fits_uhwi_p (lo_index
)
6734 || ! tree_fits_uhwi_p (hi_index
))
6740 this_node_count
= (tree_to_uhwi (hi_index
)
6741 - tree_to_uhwi (lo_index
) + 1);
6744 this_node_count
= 1;
6746 count
+= this_node_count
;
6747 if (mostly_zeros_p (value
))
6748 zero_count
+= this_node_count
;
6751 /* Clear the entire array first if there are any missing
6752 elements, or if the incidence of zero elements is >=
6755 && (count
< maxelt
- minelt
+ 1
6756 || 4 * zero_count
>= 3 * count
))
6760 if (need_to_clear
&& maybe_gt (size
, 0))
6763 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
6765 clear_storage (target
, gen_int_mode (size
, Pmode
),
6770 if (!cleared
&& REG_P (target
))
6771 /* Inform later passes that the old value is dead. */
6772 emit_clobber (target
);
6774 /* Store each element of the constructor into the
6775 corresponding element of TARGET, determined by counting the
6777 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), i
, index
, value
)
6781 HOST_WIDE_INT bitpos
;
6782 rtx xtarget
= target
;
6784 if (cleared
&& initializer_zerop (value
))
6787 mode
= TYPE_MODE (elttype
);
6788 if (mode
!= BLKmode
)
6789 bitsize
= GET_MODE_BITSIZE (mode
);
6790 else if (!poly_int_tree_p (TYPE_SIZE (elttype
), &bitsize
))
6793 if (index
!= NULL_TREE
&& TREE_CODE (index
) == RANGE_EXPR
)
6795 tree lo_index
= TREE_OPERAND (index
, 0);
6796 tree hi_index
= TREE_OPERAND (index
, 1);
6797 rtx index_r
, pos_rtx
;
6798 HOST_WIDE_INT lo
, hi
, count
;
6801 /* If the range is constant and "small", unroll the loop. */
6803 && tree_fits_shwi_p (lo_index
)
6804 && tree_fits_shwi_p (hi_index
)
6805 && (lo
= tree_to_shwi (lo_index
),
6806 hi
= tree_to_shwi (hi_index
),
6807 count
= hi
- lo
+ 1,
6810 || (tree_fits_uhwi_p (TYPE_SIZE (elttype
))
6811 && (tree_to_uhwi (TYPE_SIZE (elttype
)) * count
6814 lo
-= minelt
; hi
-= minelt
;
6815 for (; lo
<= hi
; lo
++)
6817 bitpos
= lo
* tree_to_shwi (TYPE_SIZE (elttype
));
6820 && !MEM_KEEP_ALIAS_SET_P (target
)
6821 && TREE_CODE (type
) == ARRAY_TYPE
6822 && TYPE_NONALIASED_COMPONENT (type
))
6824 target
= copy_rtx (target
);
6825 MEM_KEEP_ALIAS_SET_P (target
) = 1;
6828 store_constructor_field
6829 (target
, bitsize
, bitpos
, 0, bitregion_end
,
6830 mode
, value
, cleared
,
6831 get_alias_set (elttype
), reverse
);
6836 rtx_code_label
*loop_start
= gen_label_rtx ();
6837 rtx_code_label
*loop_end
= gen_label_rtx ();
6840 expand_normal (hi_index
);
6842 index
= build_decl (EXPR_LOCATION (exp
),
6843 VAR_DECL
, NULL_TREE
, domain
);
6844 index_r
= gen_reg_rtx (promote_decl_mode (index
, NULL
));
6845 SET_DECL_RTL (index
, index_r
);
6846 store_expr (lo_index
, index_r
, 0, false, reverse
);
6848 /* Build the head of the loop. */
6849 do_pending_stack_adjust ();
6850 emit_label (loop_start
);
6852 /* Assign value to element index. */
6854 fold_convert (ssizetype
,
6855 fold_build2 (MINUS_EXPR
,
6858 TYPE_MIN_VALUE (domain
)));
6861 size_binop (MULT_EXPR
, position
,
6862 fold_convert (ssizetype
,
6863 TYPE_SIZE_UNIT (elttype
)));
6865 pos_rtx
= expand_normal (position
);
6866 xtarget
= offset_address (target
, pos_rtx
,
6867 highest_pow2_factor (position
));
6868 xtarget
= adjust_address (xtarget
, mode
, 0);
6869 if (TREE_CODE (value
) == CONSTRUCTOR
)
6870 store_constructor (value
, xtarget
, cleared
,
6871 exact_div (bitsize
, BITS_PER_UNIT
),
6874 store_expr (value
, xtarget
, 0, false, reverse
);
6876 /* Generate a conditional jump to exit the loop. */
6877 exit_cond
= build2 (LT_EXPR
, integer_type_node
,
6879 jumpif (exit_cond
, loop_end
,
6880 profile_probability::uninitialized ());
6882 /* Update the loop counter, and jump to the head of
6884 expand_assignment (index
,
6885 build2 (PLUS_EXPR
, TREE_TYPE (index
),
6886 index
, integer_one_node
),
6889 emit_jump (loop_start
);
6891 /* Build the end of the loop. */
6892 emit_label (loop_end
);
6895 else if ((index
!= 0 && ! tree_fits_shwi_p (index
))
6896 || ! tree_fits_uhwi_p (TYPE_SIZE (elttype
)))
6901 index
= ssize_int (1);
6904 index
= fold_convert (ssizetype
,
6905 fold_build2 (MINUS_EXPR
,
6908 TYPE_MIN_VALUE (domain
)));
6911 size_binop (MULT_EXPR
, index
,
6912 fold_convert (ssizetype
,
6913 TYPE_SIZE_UNIT (elttype
)));
6914 xtarget
= offset_address (target
,
6915 expand_normal (position
),
6916 highest_pow2_factor (position
));
6917 xtarget
= adjust_address (xtarget
, mode
, 0);
6918 store_expr (value
, xtarget
, 0, false, reverse
);
6923 bitpos
= ((tree_to_shwi (index
) - minelt
)
6924 * tree_to_uhwi (TYPE_SIZE (elttype
)));
6926 bitpos
= (i
* tree_to_uhwi (TYPE_SIZE (elttype
)));
6928 if (MEM_P (target
) && !MEM_KEEP_ALIAS_SET_P (target
)
6929 && TREE_CODE (type
) == ARRAY_TYPE
6930 && TYPE_NONALIASED_COMPONENT (type
))
6932 target
= copy_rtx (target
);
6933 MEM_KEEP_ALIAS_SET_P (target
) = 1;
6935 store_constructor_field (target
, bitsize
, bitpos
, 0,
6936 bitregion_end
, mode
, value
,
6937 cleared
, get_alias_set (elttype
),
6946 unsigned HOST_WIDE_INT idx
;
6947 constructor_elt
*ce
;
6950 insn_code icode
= CODE_FOR_nothing
;
6952 tree elttype
= TREE_TYPE (type
);
6953 int elt_size
= vector_element_bits (type
);
6954 machine_mode eltmode
= TYPE_MODE (elttype
);
6955 HOST_WIDE_INT bitsize
;
6956 HOST_WIDE_INT bitpos
;
6957 rtvec vector
= NULL
;
6959 unsigned HOST_WIDE_INT const_n_elts
;
6960 alias_set_type alias
;
6961 bool vec_vec_init_p
= false;
6962 machine_mode mode
= GET_MODE (target
);
6964 gcc_assert (eltmode
!= BLKmode
);
6966 /* Try using vec_duplicate_optab for uniform vectors. */
6967 if (!TREE_SIDE_EFFECTS (exp
)
6968 && VECTOR_MODE_P (mode
)
6969 && eltmode
== GET_MODE_INNER (mode
)
6970 && ((icode
= optab_handler (vec_duplicate_optab
, mode
))
6971 != CODE_FOR_nothing
)
6972 && (elt
= uniform_vector_p (exp
)))
6974 class expand_operand ops
[2];
6975 create_output_operand (&ops
[0], target
, mode
);
6976 create_input_operand (&ops
[1], expand_normal (elt
), eltmode
);
6977 expand_insn (icode
, 2, ops
);
6978 if (!rtx_equal_p (target
, ops
[0].value
))
6979 emit_move_insn (target
, ops
[0].value
);
6983 n_elts
= TYPE_VECTOR_SUBPARTS (type
);
6985 && VECTOR_MODE_P (mode
)
6986 && n_elts
.is_constant (&const_n_elts
))
6988 machine_mode emode
= eltmode
;
6989 bool vector_typed_elts_p
= false;
6991 if (CONSTRUCTOR_NELTS (exp
)
6992 && (TREE_CODE (TREE_TYPE (CONSTRUCTOR_ELT (exp
, 0)->value
))
6995 tree etype
= TREE_TYPE (CONSTRUCTOR_ELT (exp
, 0)->value
);
6996 gcc_assert (known_eq (CONSTRUCTOR_NELTS (exp
)
6997 * TYPE_VECTOR_SUBPARTS (etype
),
6999 emode
= TYPE_MODE (etype
);
7000 vector_typed_elts_p
= true;
7002 icode
= convert_optab_handler (vec_init_optab
, mode
, emode
);
7003 if (icode
!= CODE_FOR_nothing
)
7005 unsigned int n
= const_n_elts
;
7007 if (vector_typed_elts_p
)
7009 n
= CONSTRUCTOR_NELTS (exp
);
7010 vec_vec_init_p
= true;
7012 vector
= rtvec_alloc (n
);
7013 for (unsigned int k
= 0; k
< n
; k
++)
7014 RTVEC_ELT (vector
, k
) = CONST0_RTX (emode
);
7018 /* Compute the size of the elements in the CTOR. It differs
7019 from the size of the vector type elements only when the
7020 CTOR elements are vectors themselves. */
7021 tree val_type
= TREE_TYPE (CONSTRUCTOR_ELT (exp
, 0)->value
);
7022 if (VECTOR_TYPE_P (val_type
))
7023 bitsize
= tree_to_uhwi (TYPE_SIZE (val_type
));
7027 /* If the constructor has fewer elements than the vector,
7028 clear the whole array first. Similarly if this is static
7029 constructor of a non-BLKmode object. */
7032 else if (REG_P (target
) && TREE_STATIC (exp
))
7036 unsigned HOST_WIDE_INT count
= 0, zero_count
= 0;
7039 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp
), idx
, value
)
7041 int n_elts_here
= bitsize
/ elt_size
;
7042 count
+= n_elts_here
;
7043 if (mostly_zeros_p (value
))
7044 zero_count
+= n_elts_here
;
7047 /* Clear the entire vector first if there are any missing elements,
7048 or if the incidence of zero elements is >= 75%. */
7049 need_to_clear
= (maybe_lt (count
, n_elts
)
7050 || 4 * zero_count
>= 3 * count
);
7053 if (need_to_clear
&& maybe_gt (size
, 0) && !vector
)
7056 emit_move_insn (target
, CONST0_RTX (mode
));
7058 clear_storage (target
, gen_int_mode (size
, Pmode
),
7063 /* Inform later passes that the old value is dead. */
7064 if (!cleared
&& !vector
&& REG_P (target
))
7065 emit_move_insn (target
, CONST0_RTX (mode
));
7068 alias
= MEM_ALIAS_SET (target
);
7070 alias
= get_alias_set (elttype
);
7072 /* Store each element of the constructor into the corresponding
7073 element of TARGET, determined by counting the elements. */
7074 for (idx
= 0, i
= 0;
7075 vec_safe_iterate (CONSTRUCTOR_ELTS (exp
), idx
, &ce
);
7076 idx
++, i
+= bitsize
/ elt_size
)
7078 HOST_WIDE_INT eltpos
;
7079 tree value
= ce
->value
;
7081 if (cleared
&& initializer_zerop (value
))
7085 eltpos
= tree_to_uhwi (ce
->index
);
7093 gcc_assert (ce
->index
== NULL_TREE
);
7094 gcc_assert (TREE_CODE (TREE_TYPE (value
)) == VECTOR_TYPE
);
7098 gcc_assert (TREE_CODE (TREE_TYPE (value
)) != VECTOR_TYPE
);
7099 RTVEC_ELT (vector
, eltpos
) = expand_normal (value
);
7103 machine_mode value_mode
7104 = (TREE_CODE (TREE_TYPE (value
)) == VECTOR_TYPE
7105 ? TYPE_MODE (TREE_TYPE (value
)) : eltmode
);
7106 bitpos
= eltpos
* elt_size
;
7107 store_constructor_field (target
, bitsize
, bitpos
, 0,
7108 bitregion_end
, value_mode
,
7109 value
, cleared
, alias
, reverse
);
7114 emit_insn (GEN_FCN (icode
) (target
,
7115 gen_rtx_PARALLEL (mode
, vector
)));
7124 /* Store the value of EXP (an expression tree)
7125 into a subfield of TARGET which has mode MODE and occupies
7126 BITSIZE bits, starting BITPOS bits from the start of TARGET.
7127 If MODE is VOIDmode, it means that we are storing into a bit-field.
7129 BITREGION_START is bitpos of the first bitfield in this region.
7130 BITREGION_END is the bitpos of the ending bitfield in this region.
7131 These two fields are 0, if the C++ memory model does not apply,
7132 or we are not interested in keeping track of bitfield regions.
7134 Always return const0_rtx unless we have something particular to
7137 ALIAS_SET is the alias set for the destination. This value will
7138 (in general) be different from that for TARGET, since TARGET is a
7139 reference to the containing structure.
7141 If NONTEMPORAL is true, try generating a nontemporal store.
7143 If REVERSE is true, the store is to be done in reverse order. */
7146 store_field (rtx target
, poly_int64 bitsize
, poly_int64 bitpos
,
7147 poly_uint64 bitregion_start
, poly_uint64 bitregion_end
,
7148 machine_mode mode
, tree exp
,
7149 alias_set_type alias_set
, bool nontemporal
, bool reverse
)
7151 if (TREE_CODE (exp
) == ERROR_MARK
)
7154 /* If we have nothing to store, do nothing unless the expression has
7155 side-effects. Don't do that for zero sized addressable lhs of
7157 if (known_eq (bitsize
, 0)
7158 && (!TREE_ADDRESSABLE (TREE_TYPE (exp
))
7159 || TREE_CODE (exp
) != CALL_EXPR
))
7160 return expand_expr (exp
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
7162 if (GET_CODE (target
) == CONCAT
)
7164 /* We're storing into a struct containing a single __complex. */
7166 gcc_assert (known_eq (bitpos
, 0));
7167 return store_expr (exp
, target
, 0, nontemporal
, reverse
);
7170 /* If the structure is in a register or if the component
7171 is a bit field, we cannot use addressing to access it.
7172 Use bit-field techniques or SUBREG to store in it. */
7174 poly_int64 decl_bitsize
;
7175 if (mode
== VOIDmode
7176 || (mode
!= BLKmode
&& ! direct_store
[(int) mode
]
7177 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
7178 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
)
7180 || GET_CODE (target
) == SUBREG
7181 /* If the field isn't aligned enough to store as an ordinary memref,
7182 store it as a bit field. */
7184 && ((((MEM_ALIGN (target
) < GET_MODE_ALIGNMENT (mode
))
7185 || !multiple_p (bitpos
, GET_MODE_ALIGNMENT (mode
)))
7186 && targetm
.slow_unaligned_access (mode
, MEM_ALIGN (target
)))
7187 || !multiple_p (bitpos
, BITS_PER_UNIT
)))
7188 || (known_size_p (bitsize
)
7190 && maybe_gt (GET_MODE_BITSIZE (mode
), bitsize
))
7191 /* If the RHS and field are a constant size and the size of the
7192 RHS isn't the same size as the bitfield, we must use bitfield
7194 || (known_size_p (bitsize
)
7195 && poly_int_tree_p (TYPE_SIZE (TREE_TYPE (exp
)))
7196 && maybe_ne (wi::to_poly_offset (TYPE_SIZE (TREE_TYPE (exp
))),
7198 /* Except for initialization of full bytes from a CONSTRUCTOR, which
7199 we will handle specially below. */
7200 && !(TREE_CODE (exp
) == CONSTRUCTOR
7201 && multiple_p (bitsize
, BITS_PER_UNIT
))
7202 /* And except for bitwise copying of TREE_ADDRESSABLE types,
7203 where the FIELD_DECL has the right bitsize, but TREE_TYPE (exp)
7204 includes some extra padding. store_expr / expand_expr will in
7205 that case call get_inner_reference that will have the bitsize
7206 we check here and thus the block move will not clobber the
7207 padding that shouldn't be clobbered. In the future we could
7208 replace the TREE_ADDRESSABLE check with a check that
7209 get_base_address needs to live in memory. */
7210 && (!TREE_ADDRESSABLE (TREE_TYPE (exp
))
7211 || TREE_CODE (exp
) != COMPONENT_REF
7212 || !multiple_p (bitsize
, BITS_PER_UNIT
)
7213 || !multiple_p (bitpos
, BITS_PER_UNIT
)
7214 || !poly_int_tree_p (DECL_SIZE (TREE_OPERAND (exp
, 1)),
7216 || maybe_ne (decl_bitsize
, bitsize
)))
7217 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
7218 decl we must use bitfield operations. */
7219 || (known_size_p (bitsize
)
7220 && TREE_CODE (exp
) == MEM_REF
7221 && TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
7222 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
7223 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
7224 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0)) != BLKmode
))
7229 /* If EXP is a NOP_EXPR of precision less than its mode, then that
7230 implies a mask operation. If the precision is the same size as
7231 the field we're storing into, that mask is redundant. This is
7232 particularly common with bit field assignments generated by the
7234 nop_def
= get_def_for_expr (exp
, NOP_EXPR
);
7237 tree type
= TREE_TYPE (exp
);
7238 if (INTEGRAL_TYPE_P (type
)
7239 && maybe_ne (TYPE_PRECISION (type
),
7240 GET_MODE_BITSIZE (TYPE_MODE (type
)))
7241 && known_eq (bitsize
, TYPE_PRECISION (type
)))
7243 tree op
= gimple_assign_rhs1 (nop_def
);
7244 type
= TREE_TYPE (op
);
7245 if (INTEGRAL_TYPE_P (type
)
7246 && known_ge (TYPE_PRECISION (type
), bitsize
))
7251 temp
= expand_normal (exp
);
7253 /* We don't support variable-sized BLKmode bitfields, since our
7254 handling of BLKmode is bound up with the ability to break
7255 things into words. */
7256 gcc_assert (mode
!= BLKmode
|| bitsize
.is_constant ());
7258 /* Handle calls that return values in multiple non-contiguous locations.
7259 The Irix 6 ABI has examples of this. */
7260 if (GET_CODE (temp
) == PARALLEL
)
7262 HOST_WIDE_INT size
= int_size_in_bytes (TREE_TYPE (exp
));
7263 machine_mode temp_mode
= GET_MODE (temp
);
7264 if (temp_mode
== BLKmode
|| temp_mode
== VOIDmode
)
7265 temp_mode
= smallest_int_mode_for_size (size
* BITS_PER_UNIT
);
7266 rtx temp_target
= gen_reg_rtx (temp_mode
);
7267 emit_group_store (temp_target
, temp
, TREE_TYPE (exp
), size
);
7271 /* Handle calls that return BLKmode values in registers. */
7272 else if (mode
== BLKmode
&& REG_P (temp
) && TREE_CODE (exp
) == CALL_EXPR
)
7274 rtx temp_target
= gen_reg_rtx (GET_MODE (temp
));
7275 copy_blkmode_from_reg (temp_target
, temp
, TREE_TYPE (exp
));
7279 /* If the value has aggregate type and an integral mode then, if BITSIZE
7280 is narrower than this mode and this is for big-endian data, we first
7281 need to put the value into the low-order bits for store_bit_field,
7282 except when MODE is BLKmode and BITSIZE larger than the word size
7283 (see the handling of fields larger than a word in store_bit_field).
7284 Moreover, the field may be not aligned on a byte boundary; in this
7285 case, if it has reverse storage order, it needs to be accessed as a
7286 scalar field with reverse storage order and we must first put the
7287 value into target order. */
7288 scalar_int_mode temp_mode
;
7289 if (AGGREGATE_TYPE_P (TREE_TYPE (exp
))
7290 && is_int_mode (GET_MODE (temp
), &temp_mode
))
7292 HOST_WIDE_INT size
= GET_MODE_BITSIZE (temp_mode
);
7294 reverse
= TYPE_REVERSE_STORAGE_ORDER (TREE_TYPE (exp
));
7297 temp
= flip_storage_order (temp_mode
, temp
);
7299 gcc_checking_assert (known_le (bitsize
, size
));
7300 if (maybe_lt (bitsize
, size
)
7301 && reverse
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
7302 /* Use of to_constant for BLKmode was checked above. */
7303 && !(mode
== BLKmode
&& bitsize
.to_constant () > BITS_PER_WORD
))
7304 temp
= expand_shift (RSHIFT_EXPR
, temp_mode
, temp
,
7305 size
- bitsize
, NULL_RTX
, 1);
7308 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to MODE. */
7309 if (mode
!= VOIDmode
&& mode
!= BLKmode
7310 && mode
!= TYPE_MODE (TREE_TYPE (exp
)))
7311 temp
= convert_modes (mode
, TYPE_MODE (TREE_TYPE (exp
)), temp
, 1);
7313 /* If the mode of TEMP and TARGET is BLKmode, both must be in memory
7314 and BITPOS must be aligned on a byte boundary. If so, we simply do
7315 a block copy. Likewise for a BLKmode-like TARGET. */
7316 if (GET_MODE (temp
) == BLKmode
7317 && (GET_MODE (target
) == BLKmode
7319 && GET_MODE_CLASS (GET_MODE (target
)) == MODE_INT
7320 && multiple_p (bitpos
, BITS_PER_UNIT
)
7321 && multiple_p (bitsize
, BITS_PER_UNIT
))))
7323 gcc_assert (MEM_P (target
) && MEM_P (temp
));
7324 poly_int64 bytepos
= exact_div (bitpos
, BITS_PER_UNIT
);
7325 poly_int64 bytesize
= bits_to_bytes_round_up (bitsize
);
7327 target
= adjust_address (target
, VOIDmode
, bytepos
);
7328 emit_block_move (target
, temp
,
7329 gen_int_mode (bytesize
, Pmode
),
7335 /* If the mode of TEMP is still BLKmode and BITSIZE not larger than the
7336 word size, we need to load the value (see again store_bit_field). */
7337 if (GET_MODE (temp
) == BLKmode
&& known_le (bitsize
, BITS_PER_WORD
))
7339 temp_mode
= smallest_int_mode_for_size (bitsize
);
7340 temp
= extract_bit_field (temp
, bitsize
, 0, 1, NULL_RTX
, temp_mode
,
7341 temp_mode
, false, NULL
);
7344 /* Store the value in the bitfield. */
7345 gcc_checking_assert (known_ge (bitpos
, 0));
7346 store_bit_field (target
, bitsize
, bitpos
,
7347 bitregion_start
, bitregion_end
,
7348 mode
, temp
, reverse
);
7354 /* Now build a reference to just the desired component. */
7355 rtx to_rtx
= adjust_address (target
, mode
,
7356 exact_div (bitpos
, BITS_PER_UNIT
));
7358 if (to_rtx
== target
)
7359 to_rtx
= copy_rtx (to_rtx
);
7361 if (!MEM_KEEP_ALIAS_SET_P (to_rtx
) && MEM_ALIAS_SET (to_rtx
) != 0)
7362 set_mem_alias_set (to_rtx
, alias_set
);
7364 /* Above we avoided using bitfield operations for storing a CONSTRUCTOR
7365 into a target smaller than its type; handle that case now. */
7366 if (TREE_CODE (exp
) == CONSTRUCTOR
&& known_size_p (bitsize
))
7368 poly_int64 bytesize
= exact_div (bitsize
, BITS_PER_UNIT
);
7369 store_constructor (exp
, to_rtx
, 0, bytesize
, reverse
);
7373 return store_expr (exp
, to_rtx
, 0, nontemporal
, reverse
);
7377 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
7378 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
7379 codes and find the ultimate containing object, which we return.
7381 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
7382 bit position, *PUNSIGNEDP to the signedness and *PREVERSEP to the
7383 storage order of the field.
7384 If the position of the field is variable, we store a tree
7385 giving the variable offset (in units) in *POFFSET.
7386 This offset is in addition to the bit position.
7387 If the position is not variable, we store 0 in *POFFSET.
7389 If any of the extraction expressions is volatile,
7390 we store 1 in *PVOLATILEP. Otherwise we don't change that.
7392 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
7393 Otherwise, it is a mode that can be used to access the field.
7395 If the field describes a variable-sized object, *PMODE is set to
7396 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
7397 this case, but the address of the object can be found. */
7400 get_inner_reference (tree exp
, poly_int64_pod
*pbitsize
,
7401 poly_int64_pod
*pbitpos
, tree
*poffset
,
7402 machine_mode
*pmode
, int *punsignedp
,
7403 int *preversep
, int *pvolatilep
)
7406 machine_mode mode
= VOIDmode
;
7407 bool blkmode_bitfield
= false;
7408 tree offset
= size_zero_node
;
7409 poly_offset_int bit_offset
= 0;
7411 /* First get the mode, signedness, storage order and size. We do this from
7412 just the outermost expression. */
7414 if (TREE_CODE (exp
) == COMPONENT_REF
)
7416 tree field
= TREE_OPERAND (exp
, 1);
7417 size_tree
= DECL_SIZE (field
);
7418 if (flag_strict_volatile_bitfields
> 0
7419 && TREE_THIS_VOLATILE (exp
)
7420 && DECL_BIT_FIELD_TYPE (field
)
7421 && DECL_MODE (field
) != BLKmode
)
7422 /* Volatile bitfields should be accessed in the mode of the
7423 field's type, not the mode computed based on the bit
7425 mode
= TYPE_MODE (DECL_BIT_FIELD_TYPE (field
));
7426 else if (!DECL_BIT_FIELD (field
))
7428 mode
= DECL_MODE (field
);
7429 /* For vector fields re-check the target flags, as DECL_MODE
7430 could have been set with different target flags than
7431 the current function has. */
7433 && VECTOR_TYPE_P (TREE_TYPE (field
))
7434 && VECTOR_MODE_P (TYPE_MODE_RAW (TREE_TYPE (field
))))
7435 mode
= TYPE_MODE (TREE_TYPE (field
));
7437 else if (DECL_MODE (field
) == BLKmode
)
7438 blkmode_bitfield
= true;
7440 *punsignedp
= DECL_UNSIGNED (field
);
7442 else if (TREE_CODE (exp
) == BIT_FIELD_REF
)
7444 size_tree
= TREE_OPERAND (exp
, 1);
7445 *punsignedp
= (! INTEGRAL_TYPE_P (TREE_TYPE (exp
))
7446 || TYPE_UNSIGNED (TREE_TYPE (exp
)));
7448 /* For vector element types with the correct size of access or for
7449 vector typed accesses use the mode of the access type. */
7450 if ((TREE_CODE (TREE_TYPE (TREE_OPERAND (exp
, 0))) == VECTOR_TYPE
7451 && TREE_TYPE (exp
) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0)))
7452 && tree_int_cst_equal (size_tree
, TYPE_SIZE (TREE_TYPE (exp
))))
7453 || VECTOR_TYPE_P (TREE_TYPE (exp
)))
7454 mode
= TYPE_MODE (TREE_TYPE (exp
));
7458 mode
= TYPE_MODE (TREE_TYPE (exp
));
7459 *punsignedp
= TYPE_UNSIGNED (TREE_TYPE (exp
));
7461 if (mode
== BLKmode
)
7462 size_tree
= TYPE_SIZE (TREE_TYPE (exp
));
7464 *pbitsize
= GET_MODE_BITSIZE (mode
);
7469 if (! tree_fits_uhwi_p (size_tree
))
7470 mode
= BLKmode
, *pbitsize
= -1;
7472 *pbitsize
= tree_to_uhwi (size_tree
);
7475 *preversep
= reverse_storage_order_for_component_p (exp
);
7477 /* Compute cumulative bit-offset for nested component-refs and array-refs,
7478 and find the ultimate containing object. */
7481 switch (TREE_CODE (exp
))
7484 bit_offset
+= wi::to_poly_offset (TREE_OPERAND (exp
, 2));
7489 tree field
= TREE_OPERAND (exp
, 1);
7490 tree this_offset
= component_ref_field_offset (exp
);
7492 /* If this field hasn't been filled in yet, don't go past it.
7493 This should only happen when folding expressions made during
7494 type construction. */
7495 if (this_offset
== 0)
7498 offset
= size_binop (PLUS_EXPR
, offset
, this_offset
);
7499 bit_offset
+= wi::to_poly_offset (DECL_FIELD_BIT_OFFSET (field
));
7501 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
7506 case ARRAY_RANGE_REF
:
7508 tree index
= TREE_OPERAND (exp
, 1);
7509 tree low_bound
= array_ref_low_bound (exp
);
7510 tree unit_size
= array_ref_element_size (exp
);
7512 /* We assume all arrays have sizes that are a multiple of a byte.
7513 First subtract the lower bound, if any, in the type of the
7514 index, then convert to sizetype and multiply by the size of
7515 the array element. */
7516 if (! integer_zerop (low_bound
))
7517 index
= fold_build2 (MINUS_EXPR
, TREE_TYPE (index
),
7520 offset
= size_binop (PLUS_EXPR
, offset
,
7521 size_binop (MULT_EXPR
,
7522 fold_convert (sizetype
, index
),
7531 bit_offset
+= *pbitsize
;
7534 case VIEW_CONVERT_EXPR
:
7538 /* Hand back the decl for MEM[&decl, off]. */
7539 if (TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
)
7541 tree off
= TREE_OPERAND (exp
, 1);
7542 if (!integer_zerop (off
))
7544 poly_offset_int boff
= mem_ref_offset (exp
);
7545 boff
<<= LOG2_BITS_PER_UNIT
;
7548 exp
= TREE_OPERAND (TREE_OPERAND (exp
, 0), 0);
7556 /* If any reference in the chain is volatile, the effect is volatile. */
7557 if (TREE_THIS_VOLATILE (exp
))
7560 exp
= TREE_OPERAND (exp
, 0);
7564 /* If OFFSET is constant, see if we can return the whole thing as a
7565 constant bit position. Make sure to handle overflow during
7567 if (poly_int_tree_p (offset
))
7569 poly_offset_int tem
= wi::sext (wi::to_poly_offset (offset
),
7570 TYPE_PRECISION (sizetype
));
7571 tem
<<= LOG2_BITS_PER_UNIT
;
7573 if (tem
.to_shwi (pbitpos
))
7574 *poffset
= offset
= NULL_TREE
;
7577 /* Otherwise, split it up. */
7580 /* Avoid returning a negative bitpos as this may wreak havoc later. */
7581 if (!bit_offset
.to_shwi (pbitpos
) || maybe_lt (*pbitpos
, 0))
7583 *pbitpos
= num_trailing_bits (bit_offset
.force_shwi ());
7584 poly_offset_int bytes
= bits_to_bytes_round_down (bit_offset
);
7585 offset
= size_binop (PLUS_EXPR
, offset
,
7586 build_int_cst (sizetype
, bytes
.force_shwi ()));
7592 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
7593 if (mode
== VOIDmode
7595 && multiple_p (*pbitpos
, BITS_PER_UNIT
)
7596 && multiple_p (*pbitsize
, BITS_PER_UNIT
))
7604 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
7606 static unsigned HOST_WIDE_INT
7607 target_align (const_tree target
)
7609 /* We might have a chain of nested references with intermediate misaligning
7610 bitfields components, so need to recurse to find out. */
7612 unsigned HOST_WIDE_INT this_align
, outer_align
;
7614 switch (TREE_CODE (target
))
7620 this_align
= DECL_ALIGN (TREE_OPERAND (target
, 1));
7621 outer_align
= target_align (TREE_OPERAND (target
, 0));
7622 return MIN (this_align
, outer_align
);
7625 case ARRAY_RANGE_REF
:
7626 this_align
= TYPE_ALIGN (TREE_TYPE (target
));
7627 outer_align
= target_align (TREE_OPERAND (target
, 0));
7628 return MIN (this_align
, outer_align
);
7631 case NON_LVALUE_EXPR
:
7632 case VIEW_CONVERT_EXPR
:
7633 this_align
= TYPE_ALIGN (TREE_TYPE (target
));
7634 outer_align
= target_align (TREE_OPERAND (target
, 0));
7635 return MAX (this_align
, outer_align
);
7638 return TYPE_ALIGN (TREE_TYPE (target
));
7643 /* Given an rtx VALUE that may contain additions and multiplications, return
7644 an equivalent value that just refers to a register, memory, or constant.
7645 This is done by generating instructions to perform the arithmetic and
7646 returning a pseudo-register containing the value.
7648 The returned value may be a REG, SUBREG, MEM or constant. */
7651 force_operand (rtx value
, rtx target
)
7654 /* Use subtarget as the target for operand 0 of a binary operation. */
7655 rtx subtarget
= get_subtarget (target
);
7656 enum rtx_code code
= GET_CODE (value
);
7658 /* Check for subreg applied to an expression produced by loop optimizer. */
7660 && !REG_P (SUBREG_REG (value
))
7661 && !MEM_P (SUBREG_REG (value
)))
7664 = simplify_gen_subreg (GET_MODE (value
),
7665 force_reg (GET_MODE (SUBREG_REG (value
)),
7666 force_operand (SUBREG_REG (value
),
7668 GET_MODE (SUBREG_REG (value
)),
7669 SUBREG_BYTE (value
));
7670 code
= GET_CODE (value
);
7673 /* Check for a PIC address load. */
7674 if ((code
== PLUS
|| code
== MINUS
)
7675 && XEXP (value
, 0) == pic_offset_table_rtx
7676 && (GET_CODE (XEXP (value
, 1)) == SYMBOL_REF
7677 || GET_CODE (XEXP (value
, 1)) == LABEL_REF
7678 || GET_CODE (XEXP (value
, 1)) == CONST
))
7681 subtarget
= gen_reg_rtx (GET_MODE (value
));
7682 emit_move_insn (subtarget
, value
);
7686 if (ARITHMETIC_P (value
))
7688 op2
= XEXP (value
, 1);
7689 if (!CONSTANT_P (op2
) && !(REG_P (op2
) && op2
!= subtarget
))
7691 if (code
== MINUS
&& CONST_INT_P (op2
))
7694 op2
= negate_rtx (GET_MODE (value
), op2
);
7697 /* Check for an addition with OP2 a constant integer and our first
7698 operand a PLUS of a virtual register and something else. In that
7699 case, we want to emit the sum of the virtual register and the
7700 constant first and then add the other value. This allows virtual
7701 register instantiation to simply modify the constant rather than
7702 creating another one around this addition. */
7703 if (code
== PLUS
&& CONST_INT_P (op2
)
7704 && GET_CODE (XEXP (value
, 0)) == PLUS
7705 && REG_P (XEXP (XEXP (value
, 0), 0))
7706 && REGNO (XEXP (XEXP (value
, 0), 0)) >= FIRST_VIRTUAL_REGISTER
7707 && REGNO (XEXP (XEXP (value
, 0), 0)) <= LAST_VIRTUAL_REGISTER
)
7709 rtx temp
= expand_simple_binop (GET_MODE (value
), code
,
7710 XEXP (XEXP (value
, 0), 0), op2
,
7711 subtarget
, 0, OPTAB_LIB_WIDEN
);
7712 return expand_simple_binop (GET_MODE (value
), code
, temp
,
7713 force_operand (XEXP (XEXP (value
,
7715 target
, 0, OPTAB_LIB_WIDEN
);
7718 op1
= force_operand (XEXP (value
, 0), subtarget
);
7719 op2
= force_operand (op2
, NULL_RTX
);
7723 return expand_mult (GET_MODE (value
), op1
, op2
, target
, 1);
7725 if (!INTEGRAL_MODE_P (GET_MODE (value
)))
7726 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7727 target
, 1, OPTAB_LIB_WIDEN
);
7729 return expand_divmod (0,
7730 FLOAT_MODE_P (GET_MODE (value
))
7731 ? RDIV_EXPR
: TRUNC_DIV_EXPR
,
7732 GET_MODE (value
), op1
, op2
, target
, 0);
7734 return expand_divmod (1, TRUNC_MOD_EXPR
, GET_MODE (value
), op1
, op2
,
7737 return expand_divmod (0, TRUNC_DIV_EXPR
, GET_MODE (value
), op1
, op2
,
7740 return expand_divmod (1, TRUNC_MOD_EXPR
, GET_MODE (value
), op1
, op2
,
7743 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7744 target
, 0, OPTAB_LIB_WIDEN
);
7746 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7747 target
, 1, OPTAB_LIB_WIDEN
);
7750 if (UNARY_P (value
))
7753 target
= gen_reg_rtx (GET_MODE (value
));
7754 op1
= force_operand (XEXP (value
, 0), NULL_RTX
);
7761 case FLOAT_TRUNCATE
:
7762 convert_move (target
, op1
, code
== ZERO_EXTEND
);
7767 expand_fix (target
, op1
, code
== UNSIGNED_FIX
);
7771 case UNSIGNED_FLOAT
:
7772 expand_float (target
, op1
, code
== UNSIGNED_FLOAT
);
7776 return expand_simple_unop (GET_MODE (value
), code
, op1
, target
, 0);
7780 #ifdef INSN_SCHEDULING
7781 /* On machines that have insn scheduling, we want all memory reference to be
7782 explicit, so we need to deal with such paradoxical SUBREGs. */
7783 if (paradoxical_subreg_p (value
) && MEM_P (SUBREG_REG (value
)))
7785 = simplify_gen_subreg (GET_MODE (value
),
7786 force_reg (GET_MODE (SUBREG_REG (value
)),
7787 force_operand (SUBREG_REG (value
),
7789 GET_MODE (SUBREG_REG (value
)),
7790 SUBREG_BYTE (value
));
7796 /* Subroutine of expand_expr: return nonzero iff there is no way that
7797 EXP can reference X, which is being modified. TOP_P is nonzero if this
7798 call is going to be used to determine whether we need a temporary
7799 for EXP, as opposed to a recursive call to this function.
7801 It is always safe for this routine to return zero since it merely
7802 searches for optimization opportunities. */
7805 safe_from_p (const_rtx x
, tree exp
, int top_p
)
7811 /* If EXP has varying size, we MUST use a target since we currently
7812 have no way of allocating temporaries of variable size
7813 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
7814 So we assume here that something at a higher level has prevented a
7815 clash. This is somewhat bogus, but the best we can do. Only
7816 do this when X is BLKmode and when we are at the top level. */
7817 || (top_p
&& TREE_TYPE (exp
) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp
))
7818 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp
))) != INTEGER_CST
7819 && (TREE_CODE (TREE_TYPE (exp
)) != ARRAY_TYPE
7820 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp
)) == NULL_TREE
7821 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp
)))
7823 && GET_MODE (x
) == BLKmode
)
7824 /* If X is in the outgoing argument area, it is always safe. */
7826 && (XEXP (x
, 0) == virtual_outgoing_args_rtx
7827 || (GET_CODE (XEXP (x
, 0)) == PLUS
7828 && XEXP (XEXP (x
, 0), 0) == virtual_outgoing_args_rtx
))))
7831 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
7832 find the underlying pseudo. */
7833 if (GET_CODE (x
) == SUBREG
)
7836 if (REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
7840 /* Now look at our tree code and possibly recurse. */
7841 switch (TREE_CODE_CLASS (TREE_CODE (exp
)))
7843 case tcc_declaration
:
7844 exp_rtl
= DECL_RTL_IF_SET (exp
);
7850 case tcc_exceptional
:
7851 if (TREE_CODE (exp
) == TREE_LIST
)
7855 if (TREE_VALUE (exp
) && !safe_from_p (x
, TREE_VALUE (exp
), 0))
7857 exp
= TREE_CHAIN (exp
);
7860 if (TREE_CODE (exp
) != TREE_LIST
)
7861 return safe_from_p (x
, exp
, 0);
7864 else if (TREE_CODE (exp
) == CONSTRUCTOR
)
7866 constructor_elt
*ce
;
7867 unsigned HOST_WIDE_INT idx
;
7869 FOR_EACH_VEC_SAFE_ELT (CONSTRUCTOR_ELTS (exp
), idx
, ce
)
7870 if ((ce
->index
!= NULL_TREE
&& !safe_from_p (x
, ce
->index
, 0))
7871 || !safe_from_p (x
, ce
->value
, 0))
7875 else if (TREE_CODE (exp
) == ERROR_MARK
)
7876 return 1; /* An already-visited SAVE_EXPR? */
7881 /* The only case we look at here is the DECL_INITIAL inside a
7883 return (TREE_CODE (exp
) != DECL_EXPR
7884 || TREE_CODE (DECL_EXPR_DECL (exp
)) != VAR_DECL
7885 || !DECL_INITIAL (DECL_EXPR_DECL (exp
))
7886 || safe_from_p (x
, DECL_INITIAL (DECL_EXPR_DECL (exp
)), 0));
7889 case tcc_comparison
:
7890 if (!safe_from_p (x
, TREE_OPERAND (exp
, 1), 0))
7895 return safe_from_p (x
, TREE_OPERAND (exp
, 0), 0);
7897 case tcc_expression
:
7900 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
7901 the expression. If it is set, we conflict iff we are that rtx or
7902 both are in memory. Otherwise, we check all operands of the
7903 expression recursively. */
7905 switch (TREE_CODE (exp
))
7908 /* If the operand is static or we are static, we can't conflict.
7909 Likewise if we don't conflict with the operand at all. */
7910 if (staticp (TREE_OPERAND (exp
, 0))
7911 || TREE_STATIC (exp
)
7912 || safe_from_p (x
, TREE_OPERAND (exp
, 0), 0))
7915 /* Otherwise, the only way this can conflict is if we are taking
7916 the address of a DECL a that address if part of X, which is
7918 exp
= TREE_OPERAND (exp
, 0);
7921 if (!DECL_RTL_SET_P (exp
)
7922 || !MEM_P (DECL_RTL (exp
)))
7925 exp_rtl
= XEXP (DECL_RTL (exp
), 0);
7931 && alias_sets_conflict_p (MEM_ALIAS_SET (x
),
7932 get_alias_set (exp
)))
7937 /* Assume that the call will clobber all hard registers and
7939 if ((REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
7944 case WITH_CLEANUP_EXPR
:
7945 case CLEANUP_POINT_EXPR
:
7946 /* Lowered by gimplify.c. */
7950 return safe_from_p (x
, TREE_OPERAND (exp
, 0), 0);
7956 /* If we have an rtx, we do not need to scan our operands. */
7960 nops
= TREE_OPERAND_LENGTH (exp
);
7961 for (i
= 0; i
< nops
; i
++)
7962 if (TREE_OPERAND (exp
, i
) != 0
7963 && ! safe_from_p (x
, TREE_OPERAND (exp
, i
), 0))
7969 /* Should never get a type here. */
7973 /* If we have an rtl, find any enclosed object. Then see if we conflict
7977 if (GET_CODE (exp_rtl
) == SUBREG
)
7979 exp_rtl
= SUBREG_REG (exp_rtl
);
7981 && REGNO (exp_rtl
) < FIRST_PSEUDO_REGISTER
)
7985 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
7986 are memory and they conflict. */
7987 return ! (rtx_equal_p (x
, exp_rtl
)
7988 || (MEM_P (x
) && MEM_P (exp_rtl
)
7989 && true_dependence (exp_rtl
, VOIDmode
, x
)));
7992 /* If we reach here, it is safe. */
7997 /* Return the highest power of two that EXP is known to be a multiple of.
7998 This is used in updating alignment of MEMs in array references. */
8000 unsigned HOST_WIDE_INT
8001 highest_pow2_factor (const_tree exp
)
8003 unsigned HOST_WIDE_INT ret
;
8004 int trailing_zeros
= tree_ctz (exp
);
8005 if (trailing_zeros
>= HOST_BITS_PER_WIDE_INT
)
8006 return BIGGEST_ALIGNMENT
;
8007 ret
= HOST_WIDE_INT_1U
<< trailing_zeros
;
8008 if (ret
> BIGGEST_ALIGNMENT
)
8009 return BIGGEST_ALIGNMENT
;
8013 /* Similar, except that the alignment requirements of TARGET are
8014 taken into account. Assume it is at least as aligned as its
8015 type, unless it is a COMPONENT_REF in which case the layout of
8016 the structure gives the alignment. */
8018 static unsigned HOST_WIDE_INT
8019 highest_pow2_factor_for_target (const_tree target
, const_tree exp
)
8021 unsigned HOST_WIDE_INT talign
= target_align (target
) / BITS_PER_UNIT
;
8022 unsigned HOST_WIDE_INT factor
= highest_pow2_factor (exp
);
8024 return MAX (factor
, talign
);
8027 /* Convert the tree comparison code TCODE to the rtl one where the
8028 signedness is UNSIGNEDP. */
8030 static enum rtx_code
8031 convert_tree_comp_to_rtx (enum tree_code tcode
, int unsignedp
)
8043 code
= unsignedp
? LTU
: LT
;
8046 code
= unsignedp
? LEU
: LE
;
8049 code
= unsignedp
? GTU
: GT
;
8052 code
= unsignedp
? GEU
: GE
;
8054 case UNORDERED_EXPR
:
8085 /* Subroutine of expand_expr. Expand the two operands of a binary
8086 expression EXP0 and EXP1 placing the results in OP0 and OP1.
8087 The value may be stored in TARGET if TARGET is nonzero. The
8088 MODIFIER argument is as documented by expand_expr. */
8091 expand_operands (tree exp0
, tree exp1
, rtx target
, rtx
*op0
, rtx
*op1
,
8092 enum expand_modifier modifier
)
8094 if (! safe_from_p (target
, exp1
, 1))
8096 if (operand_equal_p (exp0
, exp1
, 0))
8098 *op0
= expand_expr (exp0
, target
, VOIDmode
, modifier
);
8099 *op1
= copy_rtx (*op0
);
8103 *op0
= expand_expr (exp0
, target
, VOIDmode
, modifier
);
8104 *op1
= expand_expr (exp1
, NULL_RTX
, VOIDmode
, modifier
);
8109 /* Return a MEM that contains constant EXP. DEFER is as for
8110 output_constant_def and MODIFIER is as for expand_expr. */
8113 expand_expr_constant (tree exp
, int defer
, enum expand_modifier modifier
)
8117 mem
= output_constant_def (exp
, defer
);
8118 if (modifier
!= EXPAND_INITIALIZER
)
8119 mem
= use_anchored_address (mem
);
8123 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
8124 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
8127 expand_expr_addr_expr_1 (tree exp
, rtx target
, scalar_int_mode tmode
,
8128 enum expand_modifier modifier
, addr_space_t as
)
8130 rtx result
, subtarget
;
8132 poly_int64 bitsize
, bitpos
;
8133 int unsignedp
, reversep
, volatilep
= 0;
8136 /* If we are taking the address of a constant and are at the top level,
8137 we have to use output_constant_def since we can't call force_const_mem
8139 /* ??? This should be considered a front-end bug. We should not be
8140 generating ADDR_EXPR of something that isn't an LVALUE. The only
8141 exception here is STRING_CST. */
8142 if (CONSTANT_CLASS_P (exp
))
8144 result
= XEXP (expand_expr_constant (exp
, 0, modifier
), 0);
8145 if (modifier
< EXPAND_SUM
)
8146 result
= force_operand (result
, target
);
8150 /* Everything must be something allowed by is_gimple_addressable. */
8151 switch (TREE_CODE (exp
))
8154 /* This case will happen via recursion for &a->b. */
8155 return expand_expr (TREE_OPERAND (exp
, 0), target
, tmode
, modifier
);
8159 tree tem
= TREE_OPERAND (exp
, 0);
8160 if (!integer_zerop (TREE_OPERAND (exp
, 1)))
8161 tem
= fold_build_pointer_plus (tem
, TREE_OPERAND (exp
, 1));
8162 return expand_expr (tem
, target
, tmode
, modifier
);
8165 case TARGET_MEM_REF
:
8166 return addr_for_mem_ref (exp
, as
, true);
8169 /* Expand the initializer like constants above. */
8170 result
= XEXP (expand_expr_constant (DECL_INITIAL (exp
),
8172 if (modifier
< EXPAND_SUM
)
8173 result
= force_operand (result
, target
);
8177 /* The real part of the complex number is always first, therefore
8178 the address is the same as the address of the parent object. */
8181 inner
= TREE_OPERAND (exp
, 0);
8185 /* The imaginary part of the complex number is always second.
8186 The expression is therefore always offset by the size of the
8189 bitpos
= GET_MODE_BITSIZE (SCALAR_TYPE_MODE (TREE_TYPE (exp
)));
8190 inner
= TREE_OPERAND (exp
, 0);
8193 case COMPOUND_LITERAL_EXPR
:
8194 /* Allow COMPOUND_LITERAL_EXPR in initializers or coming from
8195 initializers, if e.g. rtl_for_decl_init is called on DECL_INITIAL
8196 with COMPOUND_LITERAL_EXPRs in it, or ARRAY_REF on a const static
8197 array with address of COMPOUND_LITERAL_EXPR in DECL_INITIAL;
8198 the initializers aren't gimplified. */
8199 if (COMPOUND_LITERAL_EXPR_DECL (exp
)
8200 && TREE_STATIC (COMPOUND_LITERAL_EXPR_DECL (exp
)))
8201 return expand_expr_addr_expr_1 (COMPOUND_LITERAL_EXPR_DECL (exp
),
8202 target
, tmode
, modifier
, as
);
8205 /* If the object is a DECL, then expand it for its rtl. Don't bypass
8206 expand_expr, as that can have various side effects; LABEL_DECLs for
8207 example, may not have their DECL_RTL set yet. Expand the rtl of
8208 CONSTRUCTORs too, which should yield a memory reference for the
8209 constructor's contents. Assume language specific tree nodes can
8210 be expanded in some interesting way. */
8211 gcc_assert (TREE_CODE (exp
) < LAST_AND_UNUSED_TREE_CODE
);
8213 || TREE_CODE (exp
) == CONSTRUCTOR
8214 || TREE_CODE (exp
) == COMPOUND_LITERAL_EXPR
)
8216 result
= expand_expr (exp
, target
, tmode
,
8217 modifier
== EXPAND_INITIALIZER
8218 ? EXPAND_INITIALIZER
: EXPAND_CONST_ADDRESS
);
8220 /* If the DECL isn't in memory, then the DECL wasn't properly
8221 marked TREE_ADDRESSABLE, which will be either a front-end
8222 or a tree optimizer bug. */
8224 gcc_assert (MEM_P (result
));
8225 result
= XEXP (result
, 0);
8227 /* ??? Is this needed anymore? */
8229 TREE_USED (exp
) = 1;
8231 if (modifier
!= EXPAND_INITIALIZER
8232 && modifier
!= EXPAND_CONST_ADDRESS
8233 && modifier
!= EXPAND_SUM
)
8234 result
= force_operand (result
, target
);
8238 /* Pass FALSE as the last argument to get_inner_reference although
8239 we are expanding to RTL. The rationale is that we know how to
8240 handle "aligning nodes" here: we can just bypass them because
8241 they won't change the final object whose address will be returned
8242 (they actually exist only for that purpose). */
8243 inner
= get_inner_reference (exp
, &bitsize
, &bitpos
, &offset
, &mode1
,
8244 &unsignedp
, &reversep
, &volatilep
);
8248 /* We must have made progress. */
8249 gcc_assert (inner
!= exp
);
8251 subtarget
= offset
|| maybe_ne (bitpos
, 0) ? NULL_RTX
: target
;
8252 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
8253 inner alignment, force the inner to be sufficiently aligned. */
8254 if (CONSTANT_CLASS_P (inner
)
8255 && TYPE_ALIGN (TREE_TYPE (inner
)) < TYPE_ALIGN (TREE_TYPE (exp
)))
8257 inner
= copy_node (inner
);
8258 TREE_TYPE (inner
) = copy_node (TREE_TYPE (inner
));
8259 SET_TYPE_ALIGN (TREE_TYPE (inner
), TYPE_ALIGN (TREE_TYPE (exp
)));
8260 TYPE_USER_ALIGN (TREE_TYPE (inner
)) = 1;
8262 result
= expand_expr_addr_expr_1 (inner
, subtarget
, tmode
, modifier
, as
);
8268 if (modifier
!= EXPAND_NORMAL
)
8269 result
= force_operand (result
, NULL
);
8270 tmp
= expand_expr (offset
, NULL_RTX
, tmode
,
8271 modifier
== EXPAND_INITIALIZER
8272 ? EXPAND_INITIALIZER
: EXPAND_NORMAL
);
8274 /* expand_expr is allowed to return an object in a mode other
8275 than TMODE. If it did, we need to convert. */
8276 if (GET_MODE (tmp
) != VOIDmode
&& tmode
!= GET_MODE (tmp
))
8277 tmp
= convert_modes (tmode
, GET_MODE (tmp
),
8278 tmp
, TYPE_UNSIGNED (TREE_TYPE (offset
)));
8279 result
= convert_memory_address_addr_space (tmode
, result
, as
);
8280 tmp
= convert_memory_address_addr_space (tmode
, tmp
, as
);
8282 if (modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
8283 result
= simplify_gen_binary (PLUS
, tmode
, result
, tmp
);
8286 subtarget
= maybe_ne (bitpos
, 0) ? NULL_RTX
: target
;
8287 result
= expand_simple_binop (tmode
, PLUS
, result
, tmp
, subtarget
,
8288 1, OPTAB_LIB_WIDEN
);
8292 if (maybe_ne (bitpos
, 0))
8294 /* Someone beforehand should have rejected taking the address
8295 of an object that isn't byte-aligned. */
8296 poly_int64 bytepos
= exact_div (bitpos
, BITS_PER_UNIT
);
8297 result
= convert_memory_address_addr_space (tmode
, result
, as
);
8298 result
= plus_constant (tmode
, result
, bytepos
);
8299 if (modifier
< EXPAND_SUM
)
8300 result
= force_operand (result
, target
);
8306 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
8307 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
8310 expand_expr_addr_expr (tree exp
, rtx target
, machine_mode tmode
,
8311 enum expand_modifier modifier
)
8313 addr_space_t as
= ADDR_SPACE_GENERIC
;
8314 scalar_int_mode address_mode
= Pmode
;
8315 scalar_int_mode pointer_mode
= ptr_mode
;
8319 /* Target mode of VOIDmode says "whatever's natural". */
8320 if (tmode
== VOIDmode
)
8321 tmode
= TYPE_MODE (TREE_TYPE (exp
));
8323 if (POINTER_TYPE_P (TREE_TYPE (exp
)))
8325 as
= TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp
)));
8326 address_mode
= targetm
.addr_space
.address_mode (as
);
8327 pointer_mode
= targetm
.addr_space
.pointer_mode (as
);
8330 /* We can get called with some Weird Things if the user does silliness
8331 like "(short) &a". In that case, convert_memory_address won't do
8332 the right thing, so ignore the given target mode. */
8333 scalar_int_mode new_tmode
= (tmode
== pointer_mode
8337 result
= expand_expr_addr_expr_1 (TREE_OPERAND (exp
, 0), target
,
8338 new_tmode
, modifier
, as
);
8340 /* Despite expand_expr claims concerning ignoring TMODE when not
8341 strictly convenient, stuff breaks if we don't honor it. Note
8342 that combined with the above, we only do this for pointer modes. */
8343 rmode
= GET_MODE (result
);
8344 if (rmode
== VOIDmode
)
8346 if (rmode
!= new_tmode
)
8347 result
= convert_memory_address_addr_space (new_tmode
, result
, as
);
8352 /* Generate code for computing CONSTRUCTOR EXP.
8353 An rtx for the computed value is returned. If AVOID_TEMP_MEM
8354 is TRUE, instead of creating a temporary variable in memory
8355 NULL is returned and the caller needs to handle it differently. */
8358 expand_constructor (tree exp
, rtx target
, enum expand_modifier modifier
,
8359 bool avoid_temp_mem
)
8361 tree type
= TREE_TYPE (exp
);
8362 machine_mode mode
= TYPE_MODE (type
);
8364 /* Try to avoid creating a temporary at all. This is possible
8365 if all of the initializer is zero.
8366 FIXME: try to handle all [0..255] initializers we can handle
8368 if (TREE_STATIC (exp
)
8369 && !TREE_ADDRESSABLE (exp
)
8370 && target
!= 0 && mode
== BLKmode
8371 && all_zeros_p (exp
))
8373 clear_storage (target
, expr_size (exp
), BLOCK_OP_NORMAL
);
8377 /* All elts simple constants => refer to a constant in memory. But
8378 if this is a non-BLKmode mode, let it store a field at a time
8379 since that should make a CONST_INT, CONST_WIDE_INT or
8380 CONST_DOUBLE when we fold. Likewise, if we have a target we can
8381 use, it is best to store directly into the target unless the type
8382 is large enough that memcpy will be used. If we are making an
8383 initializer and all operands are constant, put it in memory as
8386 FIXME: Avoid trying to fill vector constructors piece-meal.
8387 Output them with output_constant_def below unless we're sure
8388 they're zeros. This should go away when vector initializers
8389 are treated like VECTOR_CST instead of arrays. */
8390 if ((TREE_STATIC (exp
)
8391 && ((mode
== BLKmode
8392 && ! (target
!= 0 && safe_from_p (target
, exp
, 1)))
8393 || TREE_ADDRESSABLE (exp
)
8394 || (tree_fits_uhwi_p (TYPE_SIZE_UNIT (type
))
8395 && (! can_move_by_pieces
8396 (tree_to_uhwi (TYPE_SIZE_UNIT (type
)),
8398 && ! mostly_zeros_p (exp
))))
8399 || ((modifier
== EXPAND_INITIALIZER
|| modifier
== EXPAND_CONST_ADDRESS
)
8400 && TREE_CONSTANT (exp
)))
8407 constructor
= expand_expr_constant (exp
, 1, modifier
);
8409 if (modifier
!= EXPAND_CONST_ADDRESS
8410 && modifier
!= EXPAND_INITIALIZER
8411 && modifier
!= EXPAND_SUM
)
8412 constructor
= validize_mem (constructor
);
8417 /* Handle calls that pass values in multiple non-contiguous
8418 locations. The Irix 6 ABI has examples of this. */
8419 if (target
== 0 || ! safe_from_p (target
, exp
, 1)
8420 || GET_CODE (target
) == PARALLEL
|| modifier
== EXPAND_STACK_PARM
8421 /* Also make a temporary if the store is to volatile memory, to
8422 avoid individual accesses to aggregate members. */
8423 || (GET_CODE (target
) == MEM
8424 && MEM_VOLATILE_P (target
)
8425 && !TREE_ADDRESSABLE (TREE_TYPE (exp
))))
8430 target
= assign_temp (type
, TREE_ADDRESSABLE (exp
), 1);
8433 store_constructor (exp
, target
, 0, int_expr_size (exp
), false);
8438 /* expand_expr: generate code for computing expression EXP.
8439 An rtx for the computed value is returned. The value is never null.
8440 In the case of a void EXP, const0_rtx is returned.
8442 The value may be stored in TARGET if TARGET is nonzero.
8443 TARGET is just a suggestion; callers must assume that
8444 the rtx returned may not be the same as TARGET.
8446 If TARGET is CONST0_RTX, it means that the value will be ignored.
8448 If TMODE is not VOIDmode, it suggests generating the
8449 result in mode TMODE. But this is done only when convenient.
8450 Otherwise, TMODE is ignored and the value generated in its natural mode.
8451 TMODE is just a suggestion; callers must assume that
8452 the rtx returned may not have mode TMODE.
8454 Note that TARGET may have neither TMODE nor MODE. In that case, it
8455 probably will not be used.
8457 If MODIFIER is EXPAND_SUM then when EXP is an addition
8458 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
8459 or a nest of (PLUS ...) and (MINUS ...) where the terms are
8460 products as above, or REG or MEM, or constant.
8461 Ordinarily in such cases we would output mul or add instructions
8462 and then return a pseudo reg containing the sum.
8464 EXPAND_INITIALIZER is much like EXPAND_SUM except that
8465 it also marks a label as absolutely required (it can't be dead).
8466 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
8467 This is used for outputting expressions used in initializers.
8469 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
8470 with a constant address even if that address is not normally legitimate.
8471 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
8473 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
8474 a call parameter. Such targets require special care as we haven't yet
8475 marked TARGET so that it's safe from being trashed by libcalls. We
8476 don't want to use TARGET for anything but the final result;
8477 Intermediate values must go elsewhere. Additionally, calls to
8478 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
8480 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
8481 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
8482 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
8483 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
8485 If the result can be stored at TARGET, and ALT_RTL is non-NULL,
8486 then *ALT_RTL is set to TARGET (before legitimziation).
8488 If INNER_REFERENCE_P is true, we are expanding an inner reference.
8489 In this case, we don't adjust a returned MEM rtx that wouldn't be
8490 sufficiently aligned for its mode; instead, it's up to the caller
8491 to deal with it afterwards. This is used to make sure that unaligned
8492 base objects for which out-of-bounds accesses are supported, for
8493 example record types with trailing arrays, aren't realigned behind
8494 the back of the caller.
8495 The normal operating mode is to pass FALSE for this parameter. */
8498 expand_expr_real (tree exp
, rtx target
, machine_mode tmode
,
8499 enum expand_modifier modifier
, rtx
*alt_rtl
,
8500 bool inner_reference_p
)
8504 /* Handle ERROR_MARK before anybody tries to access its type. */
8505 if (TREE_CODE (exp
) == ERROR_MARK
8506 || (TREE_CODE (TREE_TYPE (exp
)) == ERROR_MARK
))
8508 ret
= CONST0_RTX (tmode
);
8509 return ret
? ret
: const0_rtx
;
8512 ret
= expand_expr_real_1 (exp
, target
, tmode
, modifier
, alt_rtl
,
8517 /* Try to expand the conditional expression which is represented by
8518 TREEOP0 ? TREEOP1 : TREEOP2 using conditonal moves. If it succeeds
8519 return the rtl reg which represents the result. Otherwise return
8523 expand_cond_expr_using_cmove (tree treeop0 ATTRIBUTE_UNUSED
,
8524 tree treeop1 ATTRIBUTE_UNUSED
,
8525 tree treeop2 ATTRIBUTE_UNUSED
)
8528 rtx op00
, op01
, op1
, op2
;
8529 enum rtx_code comparison_code
;
8530 machine_mode comparison_mode
;
8533 tree type
= TREE_TYPE (treeop1
);
8534 int unsignedp
= TYPE_UNSIGNED (type
);
8535 machine_mode mode
= TYPE_MODE (type
);
8536 machine_mode orig_mode
= mode
;
8537 static bool expanding_cond_expr_using_cmove
= false;
8539 /* Conditional move expansion can end up TERing two operands which,
8540 when recursively hitting conditional expressions can result in
8541 exponential behavior if the cmove expansion ultimatively fails.
8542 It's hardly profitable to TER a cmove into a cmove so avoid doing
8543 that by failing early if we end up recursing. */
8544 if (expanding_cond_expr_using_cmove
)
8547 /* If we cannot do a conditional move on the mode, try doing it
8548 with the promoted mode. */
8549 if (!can_conditionally_move_p (mode
))
8551 mode
= promote_mode (type
, mode
, &unsignedp
);
8552 if (!can_conditionally_move_p (mode
))
8554 temp
= assign_temp (type
, 0, 0); /* Use promoted mode for temp. */
8557 temp
= assign_temp (type
, 0, 1);
8559 expanding_cond_expr_using_cmove
= true;
8561 expand_operands (treeop1
, treeop2
,
8562 temp
, &op1
, &op2
, EXPAND_NORMAL
);
8564 if (TREE_CODE (treeop0
) == SSA_NAME
8565 && (srcstmt
= get_def_for_expr_class (treeop0
, tcc_comparison
)))
8567 type
= TREE_TYPE (gimple_assign_rhs1 (srcstmt
));
8568 enum tree_code cmpcode
= gimple_assign_rhs_code (srcstmt
);
8569 op00
= expand_normal (gimple_assign_rhs1 (srcstmt
));
8570 op01
= expand_normal (gimple_assign_rhs2 (srcstmt
));
8571 comparison_mode
= TYPE_MODE (type
);
8572 unsignedp
= TYPE_UNSIGNED (type
);
8573 comparison_code
= convert_tree_comp_to_rtx (cmpcode
, unsignedp
);
8575 else if (COMPARISON_CLASS_P (treeop0
))
8577 type
= TREE_TYPE (TREE_OPERAND (treeop0
, 0));
8578 enum tree_code cmpcode
= TREE_CODE (treeop0
);
8579 op00
= expand_normal (TREE_OPERAND (treeop0
, 0));
8580 op01
= expand_normal (TREE_OPERAND (treeop0
, 1));
8581 unsignedp
= TYPE_UNSIGNED (type
);
8582 comparison_mode
= TYPE_MODE (type
);
8583 comparison_code
= convert_tree_comp_to_rtx (cmpcode
, unsignedp
);
8587 op00
= expand_normal (treeop0
);
8589 comparison_code
= NE
;
8590 comparison_mode
= GET_MODE (op00
);
8591 if (comparison_mode
== VOIDmode
)
8592 comparison_mode
= TYPE_MODE (TREE_TYPE (treeop0
));
8594 expanding_cond_expr_using_cmove
= false;
8596 if (GET_MODE (op1
) != mode
)
8597 op1
= gen_lowpart (mode
, op1
);
8599 if (GET_MODE (op2
) != mode
)
8600 op2
= gen_lowpart (mode
, op2
);
8602 /* Try to emit the conditional move. */
8603 insn
= emit_conditional_move (temp
, comparison_code
,
8604 op00
, op01
, comparison_mode
,
8608 /* If we could do the conditional move, emit the sequence,
8612 rtx_insn
*seq
= get_insns ();
8615 return convert_modes (orig_mode
, mode
, temp
, 0);
8618 /* Otherwise discard the sequence and fall back to code with
8624 /* A helper function for expand_expr_real_2 to be used with a
8625 misaligned mem_ref TEMP. Assume an unsigned type if UNSIGNEDP
8626 is nonzero, with alignment ALIGN in bits.
8627 Store the value at TARGET if possible (if TARGET is nonzero).
8628 Regardless of TARGET, we return the rtx for where the value is placed.
8629 If the result can be stored at TARGET, and ALT_RTL is non-NULL,
8630 then *ALT_RTL is set to TARGET (before legitimziation). */
8633 expand_misaligned_mem_ref (rtx temp
, machine_mode mode
, int unsignedp
,
8634 unsigned int align
, rtx target
, rtx
*alt_rtl
)
8636 enum insn_code icode
;
8638 if ((icode
= optab_handler (movmisalign_optab
, mode
))
8639 != CODE_FOR_nothing
)
8641 class expand_operand ops
[2];
8643 /* We've already validated the memory, and we're creating a
8644 new pseudo destination. The predicates really can't fail,
8645 nor can the generator. */
8646 create_output_operand (&ops
[0], NULL_RTX
, mode
);
8647 create_fixed_operand (&ops
[1], temp
);
8648 expand_insn (icode
, 2, ops
);
8649 temp
= ops
[0].value
;
8651 else if (targetm
.slow_unaligned_access (mode
, align
))
8652 temp
= extract_bit_field (temp
, GET_MODE_BITSIZE (mode
),
8653 0, unsignedp
, target
,
8654 mode
, mode
, false, alt_rtl
);
8659 expand_expr_real_2 (sepops ops
, rtx target
, machine_mode tmode
,
8660 enum expand_modifier modifier
)
8662 rtx op0
, op1
, op2
, temp
;
8663 rtx_code_label
*lab
;
8667 scalar_int_mode int_mode
;
8668 enum tree_code code
= ops
->code
;
8670 rtx subtarget
, original_target
;
8672 bool reduce_bit_field
;
8673 location_t loc
= ops
->location
;
8674 tree treeop0
, treeop1
, treeop2
;
8675 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
8676 ? reduce_to_bit_field_precision ((expr), \
8682 mode
= TYPE_MODE (type
);
8683 unsignedp
= TYPE_UNSIGNED (type
);
8689 /* We should be called only on simple (binary or unary) expressions,
8690 exactly those that are valid in gimple expressions that aren't
8691 GIMPLE_SINGLE_RHS (or invalid). */
8692 gcc_assert (get_gimple_rhs_class (code
) == GIMPLE_UNARY_RHS
8693 || get_gimple_rhs_class (code
) == GIMPLE_BINARY_RHS
8694 || get_gimple_rhs_class (code
) == GIMPLE_TERNARY_RHS
);
8696 ignore
= (target
== const0_rtx
8697 || ((CONVERT_EXPR_CODE_P (code
)
8698 || code
== COND_EXPR
|| code
== VIEW_CONVERT_EXPR
)
8699 && TREE_CODE (type
) == VOID_TYPE
));
8701 /* We should be called only if we need the result. */
8702 gcc_assert (!ignore
);
8704 /* An operation in what may be a bit-field type needs the
8705 result to be reduced to the precision of the bit-field type,
8706 which is narrower than that of the type's mode. */
8707 reduce_bit_field
= (INTEGRAL_TYPE_P (type
)
8708 && !type_has_mode_precision_p (type
));
8710 if (reduce_bit_field
8711 && (modifier
== EXPAND_STACK_PARM
8712 || (target
&& GET_MODE (target
) != mode
)))
8715 /* Use subtarget as the target for operand 0 of a binary operation. */
8716 subtarget
= get_subtarget (target
);
8717 original_target
= target
;
8721 case NON_LVALUE_EXPR
:
8724 if (treeop0
== error_mark_node
)
8727 if (TREE_CODE (type
) == UNION_TYPE
)
8729 tree valtype
= TREE_TYPE (treeop0
);
8731 /* If both input and output are BLKmode, this conversion isn't doing
8732 anything except possibly changing memory attribute. */
8733 if (mode
== BLKmode
&& TYPE_MODE (valtype
) == BLKmode
)
8735 rtx result
= expand_expr (treeop0
, target
, tmode
,
8738 result
= copy_rtx (result
);
8739 set_mem_attributes (result
, type
, 0);
8745 if (TYPE_MODE (type
) != BLKmode
)
8746 target
= gen_reg_rtx (TYPE_MODE (type
));
8748 target
= assign_temp (type
, 1, 1);
8752 /* Store data into beginning of memory target. */
8753 store_expr (treeop0
,
8754 adjust_address (target
, TYPE_MODE (valtype
), 0),
8755 modifier
== EXPAND_STACK_PARM
,
8756 false, TYPE_REVERSE_STORAGE_ORDER (type
));
8760 gcc_assert (REG_P (target
)
8761 && !TYPE_REVERSE_STORAGE_ORDER (type
));
8763 /* Store this field into a union of the proper type. */
8764 poly_uint64 op0_size
8765 = tree_to_poly_uint64 (TYPE_SIZE (TREE_TYPE (treeop0
)));
8766 poly_uint64 union_size
= GET_MODE_BITSIZE (mode
);
8767 store_field (target
,
8768 /* The conversion must be constructed so that
8769 we know at compile time how many bits
8771 ordered_min (op0_size
, union_size
),
8772 0, 0, 0, TYPE_MODE (valtype
), treeop0
, 0,
8776 /* Return the entire union. */
8780 if (mode
== TYPE_MODE (TREE_TYPE (treeop0
)))
8782 op0
= expand_expr (treeop0
, target
, VOIDmode
,
8785 /* If the signedness of the conversion differs and OP0 is
8786 a promoted SUBREG, clear that indication since we now
8787 have to do the proper extension. */
8788 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)) != unsignedp
8789 && GET_CODE (op0
) == SUBREG
)
8790 SUBREG_PROMOTED_VAR_P (op0
) = 0;
8792 return REDUCE_BIT_FIELD (op0
);
8795 op0
= expand_expr (treeop0
, NULL_RTX
, mode
,
8796 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
);
8797 if (GET_MODE (op0
) == mode
)
8800 /* If OP0 is a constant, just convert it into the proper mode. */
8801 else if (CONSTANT_P (op0
))
8803 tree inner_type
= TREE_TYPE (treeop0
);
8804 machine_mode inner_mode
= GET_MODE (op0
);
8806 if (inner_mode
== VOIDmode
)
8807 inner_mode
= TYPE_MODE (inner_type
);
8809 if (modifier
== EXPAND_INITIALIZER
)
8810 op0
= lowpart_subreg (mode
, op0
, inner_mode
);
8812 op0
= convert_modes (mode
, inner_mode
, op0
,
8813 TYPE_UNSIGNED (inner_type
));
8816 else if (modifier
== EXPAND_INITIALIZER
)
8817 op0
= gen_rtx_fmt_e (TYPE_UNSIGNED (TREE_TYPE (treeop0
))
8818 ? ZERO_EXTEND
: SIGN_EXTEND
, mode
, op0
);
8820 else if (target
== 0)
8821 op0
= convert_to_mode (mode
, op0
,
8822 TYPE_UNSIGNED (TREE_TYPE
8826 convert_move (target
, op0
,
8827 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
8831 return REDUCE_BIT_FIELD (op0
);
8833 case ADDR_SPACE_CONVERT_EXPR
:
8835 tree treeop0_type
= TREE_TYPE (treeop0
);
8837 gcc_assert (POINTER_TYPE_P (type
));
8838 gcc_assert (POINTER_TYPE_P (treeop0_type
));
8840 addr_space_t as_to
= TYPE_ADDR_SPACE (TREE_TYPE (type
));
8841 addr_space_t as_from
= TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type
));
8843 /* Conversions between pointers to the same address space should
8844 have been implemented via CONVERT_EXPR / NOP_EXPR. */
8845 gcc_assert (as_to
!= as_from
);
8847 op0
= expand_expr (treeop0
, NULL_RTX
, VOIDmode
, modifier
);
8849 /* Ask target code to handle conversion between pointers
8850 to overlapping address spaces. */
8851 if (targetm
.addr_space
.subset_p (as_to
, as_from
)
8852 || targetm
.addr_space
.subset_p (as_from
, as_to
))
8854 op0
= targetm
.addr_space
.convert (op0
, treeop0_type
, type
);
8858 /* For disjoint address spaces, converting anything but a null
8859 pointer invokes undefined behavior. We truncate or extend the
8860 value as if we'd converted via integers, which handles 0 as
8861 required, and all others as the programmer likely expects. */
8862 #ifndef POINTERS_EXTEND_UNSIGNED
8863 const int POINTERS_EXTEND_UNSIGNED
= 1;
8865 op0
= convert_modes (mode
, TYPE_MODE (treeop0_type
),
8866 op0
, POINTERS_EXTEND_UNSIGNED
);
8872 case POINTER_PLUS_EXPR
:
8873 /* Even though the sizetype mode and the pointer's mode can be different
8874 expand is able to handle this correctly and get the correct result out
8875 of the PLUS_EXPR code. */
8876 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
8877 if sizetype precision is smaller than pointer precision. */
8878 if (TYPE_PRECISION (sizetype
) < TYPE_PRECISION (type
))
8879 treeop1
= fold_convert_loc (loc
, type
,
8880 fold_convert_loc (loc
, ssizetype
,
8882 /* If sizetype precision is larger than pointer precision, truncate the
8883 offset to have matching modes. */
8884 else if (TYPE_PRECISION (sizetype
) > TYPE_PRECISION (type
))
8885 treeop1
= fold_convert_loc (loc
, type
, treeop1
);
8889 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
8890 something else, make sure we add the register to the constant and
8891 then to the other thing. This case can occur during strength
8892 reduction and doing it this way will produce better code if the
8893 frame pointer or argument pointer is eliminated.
8895 fold-const.c will ensure that the constant is always in the inner
8896 PLUS_EXPR, so the only case we need to do anything about is if
8897 sp, ap, or fp is our second argument, in which case we must swap
8898 the innermost first argument and our second argument. */
8900 if (TREE_CODE (treeop0
) == PLUS_EXPR
8901 && TREE_CODE (TREE_OPERAND (treeop0
, 1)) == INTEGER_CST
8903 && (DECL_RTL (treeop1
) == frame_pointer_rtx
8904 || DECL_RTL (treeop1
) == stack_pointer_rtx
8905 || DECL_RTL (treeop1
) == arg_pointer_rtx
))
8910 /* If the result is to be ptr_mode and we are adding an integer to
8911 something, we might be forming a constant. So try to use
8912 plus_constant. If it produces a sum and we can't accept it,
8913 use force_operand. This allows P = &ARR[const] to generate
8914 efficient code on machines where a SYMBOL_REF is not a valid
8917 If this is an EXPAND_SUM call, always return the sum. */
8918 if (modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
8919 || (mode
== ptr_mode
&& (unsignedp
|| ! flag_trapv
)))
8921 if (modifier
== EXPAND_STACK_PARM
)
8923 if (TREE_CODE (treeop0
) == INTEGER_CST
8924 && HWI_COMPUTABLE_MODE_P (mode
)
8925 && TREE_CONSTANT (treeop1
))
8929 machine_mode wmode
= TYPE_MODE (TREE_TYPE (treeop1
));
8931 op1
= expand_expr (treeop1
, subtarget
, VOIDmode
,
8933 /* Use wi::shwi to ensure that the constant is
8934 truncated according to the mode of OP1, then sign extended
8935 to a HOST_WIDE_INT. Using the constant directly can result
8936 in non-canonical RTL in a 64x32 cross compile. */
8937 wc
= TREE_INT_CST_LOW (treeop0
);
8939 immed_wide_int_const (wi::shwi (wc
, wmode
), wmode
);
8940 op1
= plus_constant (mode
, op1
, INTVAL (constant_part
));
8941 if (modifier
!= EXPAND_SUM
&& modifier
!= EXPAND_INITIALIZER
)
8942 op1
= force_operand (op1
, target
);
8943 return REDUCE_BIT_FIELD (op1
);
8946 else if (TREE_CODE (treeop1
) == INTEGER_CST
8947 && HWI_COMPUTABLE_MODE_P (mode
)
8948 && TREE_CONSTANT (treeop0
))
8952 machine_mode wmode
= TYPE_MODE (TREE_TYPE (treeop0
));
8954 op0
= expand_expr (treeop0
, subtarget
, VOIDmode
,
8955 (modifier
== EXPAND_INITIALIZER
8956 ? EXPAND_INITIALIZER
: EXPAND_SUM
));
8957 if (! CONSTANT_P (op0
))
8959 op1
= expand_expr (treeop1
, NULL_RTX
,
8960 VOIDmode
, modifier
);
8961 /* Return a PLUS if modifier says it's OK. */
8962 if (modifier
== EXPAND_SUM
8963 || modifier
== EXPAND_INITIALIZER
)
8964 return simplify_gen_binary (PLUS
, mode
, op0
, op1
);
8967 /* Use wi::shwi to ensure that the constant is
8968 truncated according to the mode of OP1, then sign extended
8969 to a HOST_WIDE_INT. Using the constant directly can result
8970 in non-canonical RTL in a 64x32 cross compile. */
8971 wc
= TREE_INT_CST_LOW (treeop1
);
8973 = immed_wide_int_const (wi::shwi (wc
, wmode
), wmode
);
8974 op0
= plus_constant (mode
, op0
, INTVAL (constant_part
));
8975 if (modifier
!= EXPAND_SUM
&& modifier
!= EXPAND_INITIALIZER
)
8976 op0
= force_operand (op0
, target
);
8977 return REDUCE_BIT_FIELD (op0
);
8981 /* Use TER to expand pointer addition of a negated value
8982 as pointer subtraction. */
8983 if ((POINTER_TYPE_P (TREE_TYPE (treeop0
))
8984 || (TREE_CODE (TREE_TYPE (treeop0
)) == VECTOR_TYPE
8985 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0
)))))
8986 && TREE_CODE (treeop1
) == SSA_NAME
8987 && TYPE_MODE (TREE_TYPE (treeop0
))
8988 == TYPE_MODE (TREE_TYPE (treeop1
)))
8990 gimple
*def
= get_def_for_expr (treeop1
, NEGATE_EXPR
);
8993 treeop1
= gimple_assign_rhs1 (def
);
8999 /* No sense saving up arithmetic to be done
9000 if it's all in the wrong mode to form part of an address.
9001 And force_operand won't know whether to sign-extend or
9003 if (modifier
!= EXPAND_INITIALIZER
9004 && (modifier
!= EXPAND_SUM
|| mode
!= ptr_mode
))
9006 expand_operands (treeop0
, treeop1
,
9007 subtarget
, &op0
, &op1
, modifier
);
9008 if (op0
== const0_rtx
)
9010 if (op1
== const0_rtx
)
9015 expand_operands (treeop0
, treeop1
,
9016 subtarget
, &op0
, &op1
, modifier
);
9017 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS
, mode
, op0
, op1
));
9020 case POINTER_DIFF_EXPR
:
9022 /* For initializers, we are allowed to return a MINUS of two
9023 symbolic constants. Here we handle all cases when both operands
9025 /* Handle difference of two symbolic constants,
9026 for the sake of an initializer. */
9027 if ((modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
9028 && really_constant_p (treeop0
)
9029 && really_constant_p (treeop1
))
9031 expand_operands (treeop0
, treeop1
,
9032 NULL_RTX
, &op0
, &op1
, modifier
);
9033 return simplify_gen_binary (MINUS
, mode
, op0
, op1
);
9036 /* No sense saving up arithmetic to be done
9037 if it's all in the wrong mode to form part of an address.
9038 And force_operand won't know whether to sign-extend or
9040 if (modifier
!= EXPAND_INITIALIZER
9041 && (modifier
!= EXPAND_SUM
|| mode
!= ptr_mode
))
9044 expand_operands (treeop0
, treeop1
,
9045 subtarget
, &op0
, &op1
, modifier
);
9047 /* Convert A - const to A + (-const). */
9048 if (CONST_INT_P (op1
))
9050 op1
= negate_rtx (mode
, op1
);
9051 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS
, mode
, op0
, op1
));
9056 case WIDEN_MULT_PLUS_EXPR
:
9057 case WIDEN_MULT_MINUS_EXPR
:
9058 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9059 op2
= expand_normal (treeop2
);
9060 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
9064 case WIDEN_PLUS_EXPR
:
9065 case WIDEN_MINUS_EXPR
:
9066 case WIDEN_MULT_EXPR
:
9067 /* If first operand is constant, swap them.
9068 Thus the following special case checks need only
9069 check the second operand. */
9070 if (TREE_CODE (treeop0
) == INTEGER_CST
)
9071 std::swap (treeop0
, treeop1
);
9073 /* First, check if we have a multiplication of one signed and one
9074 unsigned operand. */
9075 if (TREE_CODE (treeop1
) != INTEGER_CST
9076 && (TYPE_UNSIGNED (TREE_TYPE (treeop0
))
9077 != TYPE_UNSIGNED (TREE_TYPE (treeop1
))))
9079 machine_mode innermode
= TYPE_MODE (TREE_TYPE (treeop0
));
9080 this_optab
= usmul_widen_optab
;
9081 if (find_widening_optab_handler (this_optab
, mode
, innermode
)
9082 != CODE_FOR_nothing
)
9084 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
9085 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
,
9088 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op1
, &op0
,
9090 /* op0 and op1 might still be constant, despite the above
9091 != INTEGER_CST check. Handle it. */
9092 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
9094 op0
= convert_modes (mode
, innermode
, op0
, true);
9095 op1
= convert_modes (mode
, innermode
, op1
, false);
9096 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
,
9097 target
, unsignedp
));
9102 /* Check for a multiplication with matching signedness. */
9103 else if ((TREE_CODE (treeop1
) == INTEGER_CST
9104 && int_fits_type_p (treeop1
, TREE_TYPE (treeop0
)))
9105 || (TYPE_UNSIGNED (TREE_TYPE (treeop1
))
9106 == TYPE_UNSIGNED (TREE_TYPE (treeop0
))))
9108 tree op0type
= TREE_TYPE (treeop0
);
9109 machine_mode innermode
= TYPE_MODE (op0type
);
9110 bool zextend_p
= TYPE_UNSIGNED (op0type
);
9111 optab other_optab
= zextend_p
? smul_widen_optab
: umul_widen_optab
;
9112 this_optab
= zextend_p
? umul_widen_optab
: smul_widen_optab
;
9114 if (TREE_CODE (treeop0
) != INTEGER_CST
)
9116 if (find_widening_optab_handler (this_optab
, mode
, innermode
)
9117 != CODE_FOR_nothing
)
9119 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
,
9121 /* op0 and op1 might still be constant, despite the above
9122 != INTEGER_CST check. Handle it. */
9123 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
9126 op0
= convert_modes (mode
, innermode
, op0
, zextend_p
);
9128 = convert_modes (mode
, innermode
, op1
,
9129 TYPE_UNSIGNED (TREE_TYPE (treeop1
)));
9130 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
,
9134 temp
= expand_widening_mult (mode
, op0
, op1
, target
,
9135 unsignedp
, this_optab
);
9136 return REDUCE_BIT_FIELD (temp
);
9138 if (find_widening_optab_handler (other_optab
, mode
, innermode
)
9140 && innermode
== word_mode
)
9143 op0
= expand_normal (treeop0
);
9144 op1
= expand_normal (treeop1
);
9145 /* op0 and op1 might be constants, despite the above
9146 != INTEGER_CST check. Handle it. */
9147 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
9148 goto widen_mult_const
;
9149 temp
= expand_binop (mode
, other_optab
, op0
, op1
, target
,
9150 unsignedp
, OPTAB_LIB_WIDEN
);
9151 hipart
= gen_highpart (word_mode
, temp
);
9152 htem
= expand_mult_highpart_adjust (word_mode
, hipart
,
9156 emit_move_insn (hipart
, htem
);
9157 return REDUCE_BIT_FIELD (temp
);
9161 treeop0
= fold_build1 (CONVERT_EXPR
, type
, treeop0
);
9162 treeop1
= fold_build1 (CONVERT_EXPR
, type
, treeop1
);
9163 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9164 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
, target
, unsignedp
));
9167 /* If this is a fixed-point operation, then we cannot use the code
9168 below because "expand_mult" doesn't support sat/no-sat fixed-point
9170 if (ALL_FIXED_POINT_MODE_P (mode
))
9173 /* If first operand is constant, swap them.
9174 Thus the following special case checks need only
9175 check the second operand. */
9176 if (TREE_CODE (treeop0
) == INTEGER_CST
)
9177 std::swap (treeop0
, treeop1
);
9179 /* Attempt to return something suitable for generating an
9180 indexed address, for machines that support that. */
9182 if (modifier
== EXPAND_SUM
&& mode
== ptr_mode
9183 && tree_fits_shwi_p (treeop1
))
9185 tree exp1
= treeop1
;
9187 op0
= expand_expr (treeop0
, subtarget
, VOIDmode
,
9191 op0
= force_operand (op0
, NULL_RTX
);
9193 op0
= copy_to_mode_reg (mode
, op0
);
9195 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode
, op0
,
9196 gen_int_mode (tree_to_shwi (exp1
),
9197 TYPE_MODE (TREE_TYPE (exp1
)))));
9200 if (modifier
== EXPAND_STACK_PARM
)
9203 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9204 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
, target
, unsignedp
));
9206 case TRUNC_MOD_EXPR
:
9207 case FLOOR_MOD_EXPR
:
9209 case ROUND_MOD_EXPR
:
9211 case TRUNC_DIV_EXPR
:
9212 case FLOOR_DIV_EXPR
:
9214 case ROUND_DIV_EXPR
:
9215 case EXACT_DIV_EXPR
:
9217 /* If this is a fixed-point operation, then we cannot use the code
9218 below because "expand_divmod" doesn't support sat/no-sat fixed-point
9220 if (ALL_FIXED_POINT_MODE_P (mode
))
9223 if (modifier
== EXPAND_STACK_PARM
)
9225 /* Possible optimization: compute the dividend with EXPAND_SUM
9226 then if the divisor is constant can optimize the case
9227 where some terms of the dividend have coeffs divisible by it. */
9228 expand_operands (treeop0
, treeop1
,
9229 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9230 bool mod_p
= code
== TRUNC_MOD_EXPR
|| code
== FLOOR_MOD_EXPR
9231 || code
== CEIL_MOD_EXPR
|| code
== ROUND_MOD_EXPR
;
9232 if (SCALAR_INT_MODE_P (mode
)
9234 && get_range_pos_neg (treeop0
) == 1
9235 && get_range_pos_neg (treeop1
) == 1)
9237 /* If both arguments are known to be positive when interpreted
9238 as signed, we can expand it as both signed and unsigned
9239 division or modulo. Choose the cheaper sequence in that case. */
9240 bool speed_p
= optimize_insn_for_speed_p ();
9241 do_pending_stack_adjust ();
9243 rtx uns_ret
= expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, 1);
9244 rtx_insn
*uns_insns
= get_insns ();
9247 rtx sgn_ret
= expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, 0);
9248 rtx_insn
*sgn_insns
= get_insns ();
9250 unsigned uns_cost
= seq_cost (uns_insns
, speed_p
);
9251 unsigned sgn_cost
= seq_cost (sgn_insns
, speed_p
);
9253 /* If costs are the same then use as tie breaker the other
9255 if (uns_cost
== sgn_cost
)
9257 uns_cost
= seq_cost (uns_insns
, !speed_p
);
9258 sgn_cost
= seq_cost (sgn_insns
, !speed_p
);
9261 if (uns_cost
< sgn_cost
|| (uns_cost
== sgn_cost
&& unsignedp
))
9263 emit_insn (uns_insns
);
9266 emit_insn (sgn_insns
);
9269 return expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, unsignedp
);
9274 case MULT_HIGHPART_EXPR
:
9275 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9276 temp
= expand_mult_highpart (mode
, op0
, op1
, target
, unsignedp
);
9280 case FIXED_CONVERT_EXPR
:
9281 op0
= expand_normal (treeop0
);
9282 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
9283 target
= gen_reg_rtx (mode
);
9285 if ((TREE_CODE (TREE_TYPE (treeop0
)) == INTEGER_TYPE
9286 && TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
9287 || (TREE_CODE (type
) == INTEGER_TYPE
&& TYPE_UNSIGNED (type
)))
9288 expand_fixed_convert (target
, op0
, 1, TYPE_SATURATING (type
));
9290 expand_fixed_convert (target
, op0
, 0, TYPE_SATURATING (type
));
9293 case FIX_TRUNC_EXPR
:
9294 op0
= expand_normal (treeop0
);
9295 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
9296 target
= gen_reg_rtx (mode
);
9297 expand_fix (target
, op0
, unsignedp
);
9301 op0
= expand_normal (treeop0
);
9302 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
9303 target
= gen_reg_rtx (mode
);
9304 /* expand_float can't figure out what to do if FROM has VOIDmode.
9305 So give it the correct mode. With -O, cse will optimize this. */
9306 if (GET_MODE (op0
) == VOIDmode
)
9307 op0
= copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0
)),
9309 expand_float (target
, op0
,
9310 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
9314 op0
= expand_expr (treeop0
, subtarget
,
9315 VOIDmode
, EXPAND_NORMAL
);
9316 if (modifier
== EXPAND_STACK_PARM
)
9318 temp
= expand_unop (mode
,
9319 optab_for_tree_code (NEGATE_EXPR
, type
,
9323 return REDUCE_BIT_FIELD (temp
);
9327 op0
= expand_expr (treeop0
, subtarget
,
9328 VOIDmode
, EXPAND_NORMAL
);
9329 if (modifier
== EXPAND_STACK_PARM
)
9332 /* ABS_EXPR is not valid for complex arguments. */
9333 gcc_assert (GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
9334 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
);
9336 /* Unsigned abs is simply the operand. Testing here means we don't
9337 risk generating incorrect code below. */
9338 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
9341 return expand_abs (mode
, op0
, target
, unsignedp
,
9342 safe_from_p (target
, treeop0
, 1));
9346 target
= original_target
;
9348 || modifier
== EXPAND_STACK_PARM
9349 || (MEM_P (target
) && MEM_VOLATILE_P (target
))
9350 || GET_MODE (target
) != mode
9352 && REGNO (target
) < FIRST_PSEUDO_REGISTER
))
9353 target
= gen_reg_rtx (mode
);
9354 expand_operands (treeop0
, treeop1
,
9355 target
, &op0
, &op1
, EXPAND_NORMAL
);
9357 /* First try to do it with a special MIN or MAX instruction.
9358 If that does not win, use a conditional jump to select the proper
9360 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9361 temp
= expand_binop (mode
, this_optab
, op0
, op1
, target
, unsignedp
,
9366 if (VECTOR_TYPE_P (type
))
9369 /* At this point, a MEM target is no longer useful; we will get better
9372 if (! REG_P (target
))
9373 target
= gen_reg_rtx (mode
);
9375 /* If op1 was placed in target, swap op0 and op1. */
9376 if (target
!= op0
&& target
== op1
)
9377 std::swap (op0
, op1
);
9379 /* We generate better code and avoid problems with op1 mentioning
9380 target by forcing op1 into a pseudo if it isn't a constant. */
9381 if (! CONSTANT_P (op1
))
9382 op1
= force_reg (mode
, op1
);
9385 enum rtx_code comparison_code
;
9388 if (code
== MAX_EXPR
)
9389 comparison_code
= unsignedp
? GEU
: GE
;
9391 comparison_code
= unsignedp
? LEU
: LE
;
9393 /* Canonicalize to comparisons against 0. */
9394 if (op1
== const1_rtx
)
9396 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
9397 or (a != 0 ? a : 1) for unsigned.
9398 For MIN we are safe converting (a <= 1 ? a : 1)
9399 into (a <= 0 ? a : 1) */
9400 cmpop1
= const0_rtx
;
9401 if (code
== MAX_EXPR
)
9402 comparison_code
= unsignedp
? NE
: GT
;
9404 if (op1
== constm1_rtx
&& !unsignedp
)
9406 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
9407 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
9408 cmpop1
= const0_rtx
;
9409 if (code
== MIN_EXPR
)
9410 comparison_code
= LT
;
9413 /* Use a conditional move if possible. */
9414 if (can_conditionally_move_p (mode
))
9420 /* Try to emit the conditional move. */
9421 insn
= emit_conditional_move (target
, comparison_code
,
9426 /* If we could do the conditional move, emit the sequence,
9430 rtx_insn
*seq
= get_insns ();
9436 /* Otherwise discard the sequence and fall back to code with
9442 emit_move_insn (target
, op0
);
9444 lab
= gen_label_rtx ();
9445 do_compare_rtx_and_jump (target
, cmpop1
, comparison_code
,
9446 unsignedp
, mode
, NULL_RTX
, NULL
, lab
,
9447 profile_probability::uninitialized ());
9449 emit_move_insn (target
, op1
);
9454 op0
= expand_expr (treeop0
, subtarget
,
9455 VOIDmode
, EXPAND_NORMAL
);
9456 if (modifier
== EXPAND_STACK_PARM
)
9458 /* In case we have to reduce the result to bitfield precision
9459 for unsigned bitfield expand this as XOR with a proper constant
9461 if (reduce_bit_field
&& TYPE_UNSIGNED (type
))
9463 int_mode
= SCALAR_INT_TYPE_MODE (type
);
9464 wide_int mask
= wi::mask (TYPE_PRECISION (type
),
9465 false, GET_MODE_PRECISION (int_mode
));
9467 temp
= expand_binop (int_mode
, xor_optab
, op0
,
9468 immed_wide_int_const (mask
, int_mode
),
9469 target
, 1, OPTAB_LIB_WIDEN
);
9472 temp
= expand_unop (mode
, one_cmpl_optab
, op0
, target
, 1);
9476 /* ??? Can optimize bitwise operations with one arg constant.
9477 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
9478 and (a bitwise1 b) bitwise2 b (etc)
9479 but that is probably not worth while. */
9488 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type
))
9489 || type_has_mode_precision_p (type
));
9495 /* If this is a fixed-point operation, then we cannot use the code
9496 below because "expand_shift" doesn't support sat/no-sat fixed-point
9498 if (ALL_FIXED_POINT_MODE_P (mode
))
9501 if (! safe_from_p (subtarget
, treeop1
, 1))
9503 if (modifier
== EXPAND_STACK_PARM
)
9505 op0
= expand_expr (treeop0
, subtarget
,
9506 VOIDmode
, EXPAND_NORMAL
);
9508 /* Left shift optimization when shifting across word_size boundary.
9510 If mode == GET_MODE_WIDER_MODE (word_mode), then normally
9511 there isn't native instruction to support this wide mode
9512 left shift. Given below scenario:
9514 Type A = (Type) B << C
9517 | dest_high | dest_low |
9521 If the shift amount C caused we shift B to across the word
9522 size boundary, i.e part of B shifted into high half of
9523 destination register, and part of B remains in the low
9524 half, then GCC will use the following left shift expand
9527 1. Initialize dest_low to B.
9528 2. Initialize every bit of dest_high to the sign bit of B.
9529 3. Logic left shift dest_low by C bit to finalize dest_low.
9530 The value of dest_low before this shift is kept in a temp D.
9531 4. Logic left shift dest_high by C.
9532 5. Logic right shift D by (word_size - C).
9533 6. Or the result of 4 and 5 to finalize dest_high.
9535 While, by checking gimple statements, if operand B is
9536 coming from signed extension, then we can simplify above
9539 1. dest_high = src_low >> (word_size - C).
9540 2. dest_low = src_low << C.
9542 We can use one arithmetic right shift to finish all the
9543 purpose of steps 2, 4, 5, 6, thus we reduce the steps
9544 needed from 6 into 2.
9546 The case is similar for zero extension, except that we
9547 initialize dest_high to zero rather than copies of the sign
9548 bit from B. Furthermore, we need to use a logical right shift
9551 The choice of sign-extension versus zero-extension is
9552 determined entirely by whether or not B is signed and is
9553 independent of the current setting of unsignedp. */
9556 if (code
== LSHIFT_EXPR
9559 && GET_MODE_2XWIDER_MODE (word_mode
).exists (&int_mode
)
9561 && TREE_CONSTANT (treeop1
)
9562 && TREE_CODE (treeop0
) == SSA_NAME
)
9564 gimple
*def
= SSA_NAME_DEF_STMT (treeop0
);
9565 if (is_gimple_assign (def
)
9566 && gimple_assign_rhs_code (def
) == NOP_EXPR
)
9568 scalar_int_mode rmode
= SCALAR_INT_TYPE_MODE
9569 (TREE_TYPE (gimple_assign_rhs1 (def
)));
9571 if (GET_MODE_SIZE (rmode
) < GET_MODE_SIZE (int_mode
)
9572 && TREE_INT_CST_LOW (treeop1
) < GET_MODE_BITSIZE (word_mode
)
9573 && ((TREE_INT_CST_LOW (treeop1
) + GET_MODE_BITSIZE (rmode
))
9574 >= GET_MODE_BITSIZE (word_mode
)))
9576 rtx_insn
*seq
, *seq_old
;
9577 poly_uint64 high_off
= subreg_highpart_offset (word_mode
,
9579 bool extend_unsigned
9580 = TYPE_UNSIGNED (TREE_TYPE (gimple_assign_rhs1 (def
)));
9581 rtx low
= lowpart_subreg (word_mode
, op0
, int_mode
);
9582 rtx dest_low
= lowpart_subreg (word_mode
, target
, int_mode
);
9583 rtx dest_high
= simplify_gen_subreg (word_mode
, target
,
9584 int_mode
, high_off
);
9585 HOST_WIDE_INT ramount
= (BITS_PER_WORD
9586 - TREE_INT_CST_LOW (treeop1
));
9587 tree rshift
= build_int_cst (TREE_TYPE (treeop1
), ramount
);
9590 /* dest_high = src_low >> (word_size - C). */
9591 temp
= expand_variable_shift (RSHIFT_EXPR
, word_mode
, low
,
9594 if (temp
!= dest_high
)
9595 emit_move_insn (dest_high
, temp
);
9597 /* dest_low = src_low << C. */
9598 temp
= expand_variable_shift (LSHIFT_EXPR
, word_mode
, low
,
9599 treeop1
, dest_low
, unsignedp
);
9600 if (temp
!= dest_low
)
9601 emit_move_insn (dest_low
, temp
);
9607 if (have_insn_for (ASHIFT
, int_mode
))
9609 bool speed_p
= optimize_insn_for_speed_p ();
9611 rtx ret_old
= expand_variable_shift (code
, int_mode
,
9616 seq_old
= get_insns ();
9618 if (seq_cost (seq
, speed_p
)
9619 >= seq_cost (seq_old
, speed_p
))
9630 if (temp
== NULL_RTX
)
9631 temp
= expand_variable_shift (code
, mode
, op0
, treeop1
, target
,
9633 if (code
== LSHIFT_EXPR
)
9634 temp
= REDUCE_BIT_FIELD (temp
);
9638 /* Could determine the answer when only additive constants differ. Also,
9639 the addition of one can be handled by changing the condition. */
9646 case UNORDERED_EXPR
:
9655 temp
= do_store_flag (ops
,
9656 modifier
!= EXPAND_STACK_PARM
? target
: NULL_RTX
,
9657 tmode
!= VOIDmode
? tmode
: mode
);
9661 /* Use a compare and a jump for BLKmode comparisons, or for function
9662 type comparisons is have_canonicalize_funcptr_for_compare. */
9665 || modifier
== EXPAND_STACK_PARM
9666 || ! safe_from_p (target
, treeop0
, 1)
9667 || ! safe_from_p (target
, treeop1
, 1)
9668 /* Make sure we don't have a hard reg (such as function's return
9669 value) live across basic blocks, if not optimizing. */
9670 || (!optimize
&& REG_P (target
)
9671 && REGNO (target
) < FIRST_PSEUDO_REGISTER
)))
9672 target
= gen_reg_rtx (tmode
!= VOIDmode
? tmode
: mode
);
9674 emit_move_insn (target
, const0_rtx
);
9676 rtx_code_label
*lab1
= gen_label_rtx ();
9677 jumpifnot_1 (code
, treeop0
, treeop1
, lab1
,
9678 profile_probability::uninitialized ());
9680 if (TYPE_PRECISION (type
) == 1 && !TYPE_UNSIGNED (type
))
9681 emit_move_insn (target
, constm1_rtx
);
9683 emit_move_insn (target
, const1_rtx
);
9689 /* Get the rtx code of the operands. */
9690 op0
= expand_normal (treeop0
);
9691 op1
= expand_normal (treeop1
);
9694 target
= gen_reg_rtx (TYPE_MODE (type
));
9696 /* If target overlaps with op1, then either we need to force
9697 op1 into a pseudo (if target also overlaps with op0),
9698 or write the complex parts in reverse order. */
9699 switch (GET_CODE (target
))
9702 if (reg_overlap_mentioned_p (XEXP (target
, 0), op1
))
9704 if (reg_overlap_mentioned_p (XEXP (target
, 1), op0
))
9706 complex_expr_force_op1
:
9707 temp
= gen_reg_rtx (GET_MODE_INNER (GET_MODE (target
)));
9708 emit_move_insn (temp
, op1
);
9712 complex_expr_swap_order
:
9713 /* Move the imaginary (op1) and real (op0) parts to their
9715 write_complex_part (target
, op1
, true);
9716 write_complex_part (target
, op0
, false);
9722 temp
= adjust_address_nv (target
,
9723 GET_MODE_INNER (GET_MODE (target
)), 0);
9724 if (reg_overlap_mentioned_p (temp
, op1
))
9726 scalar_mode imode
= GET_MODE_INNER (GET_MODE (target
));
9727 temp
= adjust_address_nv (target
, imode
,
9728 GET_MODE_SIZE (imode
));
9729 if (reg_overlap_mentioned_p (temp
, op0
))
9730 goto complex_expr_force_op1
;
9731 goto complex_expr_swap_order
;
9735 if (reg_overlap_mentioned_p (target
, op1
))
9737 if (reg_overlap_mentioned_p (target
, op0
))
9738 goto complex_expr_force_op1
;
9739 goto complex_expr_swap_order
;
9744 /* Move the real (op0) and imaginary (op1) parts to their location. */
9745 write_complex_part (target
, op0
, false);
9746 write_complex_part (target
, op1
, true);
9750 case WIDEN_SUM_EXPR
:
9752 tree oprnd0
= treeop0
;
9753 tree oprnd1
= treeop1
;
9755 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9756 target
= expand_widen_pattern_expr (ops
, op0
, NULL_RTX
, op1
,
9761 case VEC_UNPACK_HI_EXPR
:
9762 case VEC_UNPACK_LO_EXPR
:
9763 case VEC_UNPACK_FIX_TRUNC_HI_EXPR
:
9764 case VEC_UNPACK_FIX_TRUNC_LO_EXPR
:
9766 op0
= expand_normal (treeop0
);
9767 temp
= expand_widen_pattern_expr (ops
, op0
, NULL_RTX
, NULL_RTX
,
9773 case VEC_UNPACK_FLOAT_HI_EXPR
:
9774 case VEC_UNPACK_FLOAT_LO_EXPR
:
9776 op0
= expand_normal (treeop0
);
9777 /* The signedness is determined from input operand. */
9778 temp
= expand_widen_pattern_expr
9779 (ops
, op0
, NULL_RTX
, NULL_RTX
,
9780 target
, TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
9786 case VEC_WIDEN_PLUS_HI_EXPR
:
9787 case VEC_WIDEN_PLUS_LO_EXPR
:
9788 case VEC_WIDEN_MINUS_HI_EXPR
:
9789 case VEC_WIDEN_MINUS_LO_EXPR
:
9790 case VEC_WIDEN_MULT_HI_EXPR
:
9791 case VEC_WIDEN_MULT_LO_EXPR
:
9792 case VEC_WIDEN_MULT_EVEN_EXPR
:
9793 case VEC_WIDEN_MULT_ODD_EXPR
:
9794 case VEC_WIDEN_LSHIFT_HI_EXPR
:
9795 case VEC_WIDEN_LSHIFT_LO_EXPR
:
9796 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9797 target
= expand_widen_pattern_expr (ops
, op0
, op1
, NULL_RTX
,
9799 gcc_assert (target
);
9802 case VEC_PACK_SAT_EXPR
:
9803 case VEC_PACK_FIX_TRUNC_EXPR
:
9804 mode
= TYPE_MODE (TREE_TYPE (treeop0
));
9807 case VEC_PACK_TRUNC_EXPR
:
9808 if (VECTOR_BOOLEAN_TYPE_P (type
)
9809 && VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (treeop0
))
9810 && mode
== TYPE_MODE (TREE_TYPE (treeop0
))
9811 && SCALAR_INT_MODE_P (mode
))
9813 class expand_operand eops
[4];
9814 machine_mode imode
= TYPE_MODE (TREE_TYPE (treeop0
));
9815 expand_operands (treeop0
, treeop1
,
9816 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9817 this_optab
= vec_pack_sbool_trunc_optab
;
9818 enum insn_code icode
= optab_handler (this_optab
, imode
);
9819 create_output_operand (&eops
[0], target
, mode
);
9820 create_convert_operand_from (&eops
[1], op0
, imode
, false);
9821 create_convert_operand_from (&eops
[2], op1
, imode
, false);
9822 temp
= GEN_INT (TYPE_VECTOR_SUBPARTS (type
).to_constant ());
9823 create_input_operand (&eops
[3], temp
, imode
);
9824 expand_insn (icode
, 4, eops
);
9825 return eops
[0].value
;
9827 mode
= TYPE_MODE (TREE_TYPE (treeop0
));
9830 case VEC_PACK_FLOAT_EXPR
:
9831 mode
= TYPE_MODE (TREE_TYPE (treeop0
));
9832 expand_operands (treeop0
, treeop1
,
9833 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9834 this_optab
= optab_for_tree_code (code
, TREE_TYPE (treeop0
),
9836 target
= expand_binop (mode
, this_optab
, op0
, op1
, target
,
9837 TYPE_UNSIGNED (TREE_TYPE (treeop0
)),
9839 gcc_assert (target
);
9844 expand_operands (treeop0
, treeop1
, target
, &op0
, &op1
, EXPAND_NORMAL
);
9845 vec_perm_builder sel
;
9846 if (TREE_CODE (treeop2
) == VECTOR_CST
9847 && tree_to_vec_perm_builder (&sel
, treeop2
))
9849 machine_mode sel_mode
= TYPE_MODE (TREE_TYPE (treeop2
));
9850 temp
= expand_vec_perm_const (mode
, op0
, op1
, sel
,
9855 op2
= expand_normal (treeop2
);
9856 temp
= expand_vec_perm_var (mode
, op0
, op1
, op2
, target
);
9864 tree oprnd0
= treeop0
;
9865 tree oprnd1
= treeop1
;
9866 tree oprnd2
= treeop2
;
9868 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9869 op2
= expand_normal (oprnd2
);
9870 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
9877 tree oprnd0
= treeop0
;
9878 tree oprnd1
= treeop1
;
9879 tree oprnd2
= treeop2
;
9881 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9882 op2
= expand_normal (oprnd2
);
9883 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
9888 case REALIGN_LOAD_EXPR
:
9890 tree oprnd0
= treeop0
;
9891 tree oprnd1
= treeop1
;
9892 tree oprnd2
= treeop2
;
9894 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9895 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9896 op2
= expand_normal (oprnd2
);
9897 temp
= expand_ternary_op (mode
, this_optab
, op0
, op1
, op2
,
9905 /* A COND_EXPR with its type being VOID_TYPE represents a
9906 conditional jump and is handled in
9907 expand_gimple_cond_expr. */
9908 gcc_assert (!VOID_TYPE_P (type
));
9910 /* Note that COND_EXPRs whose type is a structure or union
9911 are required to be constructed to contain assignments of
9912 a temporary variable, so that we can evaluate them here
9913 for side effect only. If type is void, we must do likewise. */
9915 gcc_assert (!TREE_ADDRESSABLE (type
)
9917 && TREE_TYPE (treeop1
) != void_type_node
9918 && TREE_TYPE (treeop2
) != void_type_node
);
9920 temp
= expand_cond_expr_using_cmove (treeop0
, treeop1
, treeop2
);
9924 /* If we are not to produce a result, we have no target. Otherwise,
9925 if a target was specified use it; it will not be used as an
9926 intermediate target unless it is safe. If no target, use a
9929 if (modifier
!= EXPAND_STACK_PARM
9931 && safe_from_p (original_target
, treeop0
, 1)
9932 && GET_MODE (original_target
) == mode
9933 && !MEM_P (original_target
))
9934 temp
= original_target
;
9936 temp
= assign_temp (type
, 0, 1);
9938 do_pending_stack_adjust ();
9940 rtx_code_label
*lab0
= gen_label_rtx ();
9941 rtx_code_label
*lab1
= gen_label_rtx ();
9942 jumpifnot (treeop0
, lab0
,
9943 profile_probability::uninitialized ());
9944 store_expr (treeop1
, temp
,
9945 modifier
== EXPAND_STACK_PARM
,
9948 emit_jump_insn (targetm
.gen_jump (lab1
));
9951 store_expr (treeop2
, temp
,
9952 modifier
== EXPAND_STACK_PARM
,
9960 case VEC_DUPLICATE_EXPR
:
9961 op0
= expand_expr (treeop0
, NULL_RTX
, VOIDmode
, modifier
);
9962 target
= expand_vector_broadcast (mode
, op0
);
9963 gcc_assert (target
);
9966 case VEC_SERIES_EXPR
:
9967 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, modifier
);
9968 return expand_vec_series_expr (mode
, op0
, op1
, target
);
9970 case BIT_INSERT_EXPR
:
9972 unsigned bitpos
= tree_to_uhwi (treeop2
);
9974 if (INTEGRAL_TYPE_P (TREE_TYPE (treeop1
)))
9975 bitsize
= TYPE_PRECISION (TREE_TYPE (treeop1
));
9977 bitsize
= tree_to_uhwi (TYPE_SIZE (TREE_TYPE (treeop1
)));
9978 op0
= expand_normal (treeop0
);
9979 op1
= expand_normal (treeop1
);
9980 rtx dst
= gen_reg_rtx (mode
);
9981 emit_move_insn (dst
, op0
);
9982 store_bit_field (dst
, bitsize
, bitpos
, 0, 0,
9983 TYPE_MODE (TREE_TYPE (treeop1
)), op1
, false);
9991 /* Here to do an ordinary binary operator. */
9993 expand_operands (treeop0
, treeop1
,
9994 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9996 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9998 if (modifier
== EXPAND_STACK_PARM
)
10000 temp
= expand_binop (mode
, this_optab
, op0
, op1
, target
,
10001 unsignedp
, OPTAB_LIB_WIDEN
);
10003 /* Bitwise operations do not need bitfield reduction as we expect their
10004 operands being properly truncated. */
10005 if (code
== BIT_XOR_EXPR
10006 || code
== BIT_AND_EXPR
10007 || code
== BIT_IOR_EXPR
)
10009 return REDUCE_BIT_FIELD (temp
);
10011 #undef REDUCE_BIT_FIELD
10014 /* Return TRUE if expression STMT is suitable for replacement.
10015 Never consider memory loads as replaceable, because those don't ever lead
10016 into constant expressions. */
10019 stmt_is_replaceable_p (gimple
*stmt
)
10021 if (ssa_is_replaceable_p (stmt
))
10023 /* Don't move around loads. */
10024 if (!gimple_assign_single_p (stmt
)
10025 || is_gimple_val (gimple_assign_rhs1 (stmt
)))
10032 expand_expr_real_1 (tree exp
, rtx target
, machine_mode tmode
,
10033 enum expand_modifier modifier
, rtx
*alt_rtl
,
10034 bool inner_reference_p
)
10036 rtx op0
, op1
, temp
, decl_rtl
;
10039 machine_mode mode
, dmode
;
10040 enum tree_code code
= TREE_CODE (exp
);
10041 rtx subtarget
, original_target
;
10044 bool reduce_bit_field
;
10045 location_t loc
= EXPR_LOCATION (exp
);
10046 struct separate_ops ops
;
10047 tree treeop0
, treeop1
, treeop2
;
10048 tree ssa_name
= NULL_TREE
;
10051 type
= TREE_TYPE (exp
);
10052 mode
= TYPE_MODE (type
);
10053 unsignedp
= TYPE_UNSIGNED (type
);
10055 treeop0
= treeop1
= treeop2
= NULL_TREE
;
10056 if (!VL_EXP_CLASS_P (exp
))
10057 switch (TREE_CODE_LENGTH (code
))
10060 case 3: treeop2
= TREE_OPERAND (exp
, 2); /* FALLTHRU */
10061 case 2: treeop1
= TREE_OPERAND (exp
, 1); /* FALLTHRU */
10062 case 1: treeop0
= TREE_OPERAND (exp
, 0); /* FALLTHRU */
10070 ops
.location
= loc
;
10072 ignore
= (target
== const0_rtx
10073 || ((CONVERT_EXPR_CODE_P (code
)
10074 || code
== COND_EXPR
|| code
== VIEW_CONVERT_EXPR
)
10075 && TREE_CODE (type
) == VOID_TYPE
));
10077 /* An operation in what may be a bit-field type needs the
10078 result to be reduced to the precision of the bit-field type,
10079 which is narrower than that of the type's mode. */
10080 reduce_bit_field
= (!ignore
10081 && INTEGRAL_TYPE_P (type
)
10082 && !type_has_mode_precision_p (type
));
10084 /* If we are going to ignore this result, we need only do something
10085 if there is a side-effect somewhere in the expression. If there
10086 is, short-circuit the most common cases here. Note that we must
10087 not call expand_expr with anything but const0_rtx in case this
10088 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
10092 if (! TREE_SIDE_EFFECTS (exp
))
10095 /* Ensure we reference a volatile object even if value is ignored, but
10096 don't do this if all we are doing is taking its address. */
10097 if (TREE_THIS_VOLATILE (exp
)
10098 && TREE_CODE (exp
) != FUNCTION_DECL
10099 && mode
!= VOIDmode
&& mode
!= BLKmode
10100 && modifier
!= EXPAND_CONST_ADDRESS
)
10102 temp
= expand_expr (exp
, NULL_RTX
, VOIDmode
, modifier
);
10104 copy_to_reg (temp
);
10108 if (TREE_CODE_CLASS (code
) == tcc_unary
10109 || code
== BIT_FIELD_REF
10110 || code
== COMPONENT_REF
10111 || code
== INDIRECT_REF
)
10112 return expand_expr (treeop0
, const0_rtx
, VOIDmode
,
10115 else if (TREE_CODE_CLASS (code
) == tcc_binary
10116 || TREE_CODE_CLASS (code
) == tcc_comparison
10117 || code
== ARRAY_REF
|| code
== ARRAY_RANGE_REF
)
10119 expand_expr (treeop0
, const0_rtx
, VOIDmode
, modifier
);
10120 expand_expr (treeop1
, const0_rtx
, VOIDmode
, modifier
);
10127 if (reduce_bit_field
&& modifier
== EXPAND_STACK_PARM
)
10130 /* Use subtarget as the target for operand 0 of a binary operation. */
10131 subtarget
= get_subtarget (target
);
10132 original_target
= target
;
10138 tree function
= decl_function_context (exp
);
10140 temp
= label_rtx (exp
);
10141 temp
= gen_rtx_LABEL_REF (Pmode
, temp
);
10143 if (function
!= current_function_decl
10145 LABEL_REF_NONLOCAL_P (temp
) = 1;
10147 temp
= gen_rtx_MEM (FUNCTION_MODE
, temp
);
10152 /* ??? ivopts calls expander, without any preparation from
10153 out-of-ssa. So fake instructions as if this was an access to the
10154 base variable. This unnecessarily allocates a pseudo, see how we can
10155 reuse it, if partition base vars have it set already. */
10156 if (!currently_expanding_to_rtl
)
10158 tree var
= SSA_NAME_VAR (exp
);
10159 if (var
&& DECL_RTL_SET_P (var
))
10160 return DECL_RTL (var
);
10161 return gen_raw_REG (TYPE_MODE (TREE_TYPE (exp
)),
10162 LAST_VIRTUAL_REGISTER
+ 1);
10165 g
= get_gimple_for_ssa_name (exp
);
10166 /* For EXPAND_INITIALIZER try harder to get something simpler. */
10168 && modifier
== EXPAND_INITIALIZER
10169 && !SSA_NAME_IS_DEFAULT_DEF (exp
)
10170 && (optimize
|| !SSA_NAME_VAR (exp
)
10171 || DECL_IGNORED_P (SSA_NAME_VAR (exp
)))
10172 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp
)))
10173 g
= SSA_NAME_DEF_STMT (exp
);
10177 location_t saved_loc
= curr_insn_location ();
10178 loc
= gimple_location (g
);
10179 if (loc
!= UNKNOWN_LOCATION
)
10180 set_curr_insn_location (loc
);
10181 ops
.code
= gimple_assign_rhs_code (g
);
10182 switch (get_gimple_rhs_class (ops
.code
))
10184 case GIMPLE_TERNARY_RHS
:
10185 ops
.op2
= gimple_assign_rhs3 (g
);
10187 case GIMPLE_BINARY_RHS
:
10188 ops
.op1
= gimple_assign_rhs2 (g
);
10190 /* Try to expand conditonal compare. */
10191 if (targetm
.gen_ccmp_first
)
10193 gcc_checking_assert (targetm
.gen_ccmp_next
!= NULL
);
10194 r
= expand_ccmp_expr (g
, mode
);
10199 case GIMPLE_UNARY_RHS
:
10200 ops
.op0
= gimple_assign_rhs1 (g
);
10201 ops
.type
= TREE_TYPE (gimple_assign_lhs (g
));
10202 ops
.location
= loc
;
10203 r
= expand_expr_real_2 (&ops
, target
, tmode
, modifier
);
10205 case GIMPLE_SINGLE_RHS
:
10207 r
= expand_expr_real (gimple_assign_rhs1 (g
), target
,
10208 tmode
, modifier
, alt_rtl
,
10209 inner_reference_p
);
10213 gcc_unreachable ();
10215 set_curr_insn_location (saved_loc
);
10216 if (REG_P (r
) && !REG_EXPR (r
))
10217 set_reg_attrs_for_decl_rtl (SSA_NAME_VAR (exp
), r
);
10222 decl_rtl
= get_rtx_for_ssa_name (ssa_name
);
10223 exp
= SSA_NAME_VAR (ssa_name
);
10224 goto expand_decl_rtl
;
10228 /* If a static var's type was incomplete when the decl was written,
10229 but the type is complete now, lay out the decl now. */
10230 if (DECL_SIZE (exp
) == 0
10231 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp
))
10232 && (TREE_STATIC (exp
) || DECL_EXTERNAL (exp
)))
10233 layout_decl (exp
, 0);
10237 case FUNCTION_DECL
:
10239 decl_rtl
= DECL_RTL (exp
);
10241 gcc_assert (decl_rtl
);
10243 /* DECL_MODE might change when TYPE_MODE depends on attribute target
10244 settings for VECTOR_TYPE_P that might switch for the function. */
10245 if (currently_expanding_to_rtl
10246 && code
== VAR_DECL
&& MEM_P (decl_rtl
)
10247 && VECTOR_TYPE_P (type
) && exp
&& DECL_MODE (exp
) != mode
)
10248 decl_rtl
= change_address (decl_rtl
, TYPE_MODE (type
), 0);
10250 decl_rtl
= copy_rtx (decl_rtl
);
10252 /* Record writes to register variables. */
10253 if (modifier
== EXPAND_WRITE
10254 && REG_P (decl_rtl
)
10255 && HARD_REGISTER_P (decl_rtl
))
10256 add_to_hard_reg_set (&crtl
->asm_clobbers
,
10257 GET_MODE (decl_rtl
), REGNO (decl_rtl
));
10259 /* Ensure variable marked as used even if it doesn't go through
10260 a parser. If it hasn't be used yet, write out an external
10263 TREE_USED (exp
) = 1;
10265 /* Show we haven't gotten RTL for this yet. */
10268 /* Variables inherited from containing functions should have
10269 been lowered by this point. */
10271 context
= decl_function_context (exp
);
10273 || SCOPE_FILE_SCOPE_P (context
)
10274 || context
== current_function_decl
10275 || TREE_STATIC (exp
)
10276 || DECL_EXTERNAL (exp
)
10277 /* ??? C++ creates functions that are not TREE_STATIC. */
10278 || TREE_CODE (exp
) == FUNCTION_DECL
);
10280 /* This is the case of an array whose size is to be determined
10281 from its initializer, while the initializer is still being parsed.
10282 ??? We aren't parsing while expanding anymore. */
10284 if (MEM_P (decl_rtl
) && REG_P (XEXP (decl_rtl
, 0)))
10285 temp
= validize_mem (decl_rtl
);
10287 /* If DECL_RTL is memory, we are in the normal case and the
10288 address is not valid, get the address into a register. */
10290 else if (MEM_P (decl_rtl
) && modifier
!= EXPAND_INITIALIZER
)
10293 *alt_rtl
= decl_rtl
;
10294 decl_rtl
= use_anchored_address (decl_rtl
);
10295 if (modifier
!= EXPAND_CONST_ADDRESS
10296 && modifier
!= EXPAND_SUM
10297 && !memory_address_addr_space_p (exp
? DECL_MODE (exp
)
10298 : GET_MODE (decl_rtl
),
10299 XEXP (decl_rtl
, 0),
10300 MEM_ADDR_SPACE (decl_rtl
)))
10301 temp
= replace_equiv_address (decl_rtl
,
10302 copy_rtx (XEXP (decl_rtl
, 0)));
10305 /* If we got something, return it. But first, set the alignment
10306 if the address is a register. */
10309 if (exp
&& MEM_P (temp
) && REG_P (XEXP (temp
, 0)))
10310 mark_reg_pointer (XEXP (temp
, 0), DECL_ALIGN (exp
));
10312 else if (MEM_P (decl_rtl
))
10318 && modifier
!= EXPAND_WRITE
10319 && modifier
!= EXPAND_MEMORY
10320 && modifier
!= EXPAND_INITIALIZER
10321 && modifier
!= EXPAND_CONST_ADDRESS
10322 && modifier
!= EXPAND_SUM
10323 && !inner_reference_p
10325 && MEM_ALIGN (temp
) < GET_MODE_ALIGNMENT (mode
))
10326 temp
= expand_misaligned_mem_ref (temp
, mode
, unsignedp
,
10327 MEM_ALIGN (temp
), NULL_RTX
, NULL
);
10333 dmode
= DECL_MODE (exp
);
10335 dmode
= TYPE_MODE (TREE_TYPE (ssa_name
));
10337 /* If the mode of DECL_RTL does not match that of the decl,
10338 there are two cases: we are dealing with a BLKmode value
10339 that is returned in a register, or we are dealing with
10340 a promoted value. In the latter case, return a SUBREG
10341 of the wanted mode, but mark it so that we know that it
10342 was already extended. */
10343 if (REG_P (decl_rtl
)
10344 && dmode
!= BLKmode
10345 && GET_MODE (decl_rtl
) != dmode
)
10347 machine_mode pmode
;
10349 /* Get the signedness to be used for this variable. Ensure we get
10350 the same mode we got when the variable was declared. */
10351 if (code
!= SSA_NAME
)
10352 pmode
= promote_decl_mode (exp
, &unsignedp
);
10353 else if ((g
= SSA_NAME_DEF_STMT (ssa_name
))
10354 && gimple_code (g
) == GIMPLE_CALL
10355 && !gimple_call_internal_p (g
))
10356 pmode
= promote_function_mode (type
, mode
, &unsignedp
,
10357 gimple_call_fntype (g
),
10360 pmode
= promote_ssa_mode (ssa_name
, &unsignedp
);
10361 gcc_assert (GET_MODE (decl_rtl
) == pmode
);
10363 temp
= gen_lowpart_SUBREG (mode
, decl_rtl
);
10364 SUBREG_PROMOTED_VAR_P (temp
) = 1;
10365 SUBREG_PROMOTED_SET (temp
, unsignedp
);
10373 /* Given that TYPE_PRECISION (type) is not always equal to
10374 GET_MODE_PRECISION (TYPE_MODE (type)), we need to extend from
10375 the former to the latter according to the signedness of the
10377 scalar_int_mode int_mode
= SCALAR_INT_TYPE_MODE (type
);
10378 temp
= immed_wide_int_const
10379 (wi::to_wide (exp
, GET_MODE_PRECISION (int_mode
)), int_mode
);
10385 tree tmp
= NULL_TREE
;
10386 if (VECTOR_MODE_P (mode
))
10387 return const_vector_from_tree (exp
);
10388 scalar_int_mode int_mode
;
10389 if (is_int_mode (mode
, &int_mode
))
10391 tree type_for_mode
= lang_hooks
.types
.type_for_mode (int_mode
, 1);
10393 tmp
= fold_unary_loc (loc
, VIEW_CONVERT_EXPR
,
10394 type_for_mode
, exp
);
10398 vec
<constructor_elt
, va_gc
> *v
;
10399 /* Constructors need to be fixed-length. FIXME. */
10400 unsigned int nunits
= VECTOR_CST_NELTS (exp
).to_constant ();
10401 vec_alloc (v
, nunits
);
10402 for (unsigned int i
= 0; i
< nunits
; ++i
)
10403 CONSTRUCTOR_APPEND_ELT (v
, NULL_TREE
, VECTOR_CST_ELT (exp
, i
));
10404 tmp
= build_constructor (type
, v
);
10406 return expand_expr (tmp
, ignore
? const0_rtx
: target
,
10411 if (modifier
== EXPAND_WRITE
)
10413 /* Writing into CONST_DECL is always invalid, but handle it
10415 addr_space_t as
= TYPE_ADDR_SPACE (TREE_TYPE (exp
));
10416 scalar_int_mode address_mode
= targetm
.addr_space
.address_mode (as
);
10417 op0
= expand_expr_addr_expr_1 (exp
, NULL_RTX
, address_mode
,
10418 EXPAND_NORMAL
, as
);
10419 op0
= memory_address_addr_space (mode
, op0
, as
);
10420 temp
= gen_rtx_MEM (mode
, op0
);
10421 set_mem_addr_space (temp
, as
);
10424 return expand_expr (DECL_INITIAL (exp
), target
, VOIDmode
, modifier
);
10427 /* If optimized, generate immediate CONST_DOUBLE
10428 which will be turned into memory by reload if necessary.
10430 We used to force a register so that loop.c could see it. But
10431 this does not allow gen_* patterns to perform optimizations with
10432 the constants. It also produces two insns in cases like "x = 1.0;".
10433 On most machines, floating-point constants are not permitted in
10434 many insns, so we'd end up copying it to a register in any case.
10436 Now, we do the copying in expand_binop, if appropriate. */
10437 return const_double_from_real_value (TREE_REAL_CST (exp
),
10438 TYPE_MODE (TREE_TYPE (exp
)));
10441 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp
),
10442 TYPE_MODE (TREE_TYPE (exp
)));
10445 /* Handle evaluating a complex constant in a CONCAT target. */
10446 if (original_target
&& GET_CODE (original_target
) == CONCAT
)
10450 mode
= TYPE_MODE (TREE_TYPE (TREE_TYPE (exp
)));
10451 rtarg
= XEXP (original_target
, 0);
10452 itarg
= XEXP (original_target
, 1);
10454 /* Move the real and imaginary parts separately. */
10455 op0
= expand_expr (TREE_REALPART (exp
), rtarg
, mode
, EXPAND_NORMAL
);
10456 op1
= expand_expr (TREE_IMAGPART (exp
), itarg
, mode
, EXPAND_NORMAL
);
10459 emit_move_insn (rtarg
, op0
);
10461 emit_move_insn (itarg
, op1
);
10463 return original_target
;
10469 temp
= expand_expr_constant (exp
, 1, modifier
);
10471 /* temp contains a constant address.
10472 On RISC machines where a constant address isn't valid,
10473 make some insns to get that address into a register. */
10474 if (modifier
!= EXPAND_CONST_ADDRESS
10475 && modifier
!= EXPAND_INITIALIZER
10476 && modifier
!= EXPAND_SUM
10477 && ! memory_address_addr_space_p (mode
, XEXP (temp
, 0),
10478 MEM_ADDR_SPACE (temp
)))
10479 return replace_equiv_address (temp
,
10480 copy_rtx (XEXP (temp
, 0)));
10484 return immed_wide_int_const (poly_int_cst_value (exp
), mode
);
10488 tree val
= treeop0
;
10489 rtx ret
= expand_expr_real_1 (val
, target
, tmode
, modifier
, alt_rtl
,
10490 inner_reference_p
);
10492 if (!SAVE_EXPR_RESOLVED_P (exp
))
10494 /* We can indeed still hit this case, typically via builtin
10495 expanders calling save_expr immediately before expanding
10496 something. Assume this means that we only have to deal
10497 with non-BLKmode values. */
10498 gcc_assert (GET_MODE (ret
) != BLKmode
);
10500 val
= build_decl (curr_insn_location (),
10501 VAR_DECL
, NULL
, TREE_TYPE (exp
));
10502 DECL_ARTIFICIAL (val
) = 1;
10503 DECL_IGNORED_P (val
) = 1;
10505 TREE_OPERAND (exp
, 0) = treeop0
;
10506 SAVE_EXPR_RESOLVED_P (exp
) = 1;
10508 if (!CONSTANT_P (ret
))
10509 ret
= copy_to_reg (ret
);
10510 SET_DECL_RTL (val
, ret
);
10518 /* If we don't need the result, just ensure we evaluate any
10522 unsigned HOST_WIDE_INT idx
;
10525 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp
), idx
, value
)
10526 expand_expr (value
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
10531 return expand_constructor (exp
, target
, modifier
, false);
10533 case TARGET_MEM_REF
:
10536 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0))));
10537 unsigned int align
;
10539 op0
= addr_for_mem_ref (exp
, as
, true);
10540 op0
= memory_address_addr_space (mode
, op0
, as
);
10541 temp
= gen_rtx_MEM (mode
, op0
);
10542 set_mem_attributes (temp
, exp
, 0);
10543 set_mem_addr_space (temp
, as
);
10544 align
= get_object_alignment (exp
);
10545 if (modifier
!= EXPAND_WRITE
10546 && modifier
!= EXPAND_MEMORY
10548 && align
< GET_MODE_ALIGNMENT (mode
))
10549 temp
= expand_misaligned_mem_ref (temp
, mode
, unsignedp
,
10550 align
, NULL_RTX
, NULL
);
10556 const bool reverse
= REF_REVERSE_STORAGE_ORDER (exp
);
10558 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0))));
10559 machine_mode address_mode
;
10560 tree base
= TREE_OPERAND (exp
, 0);
10563 /* Handle expansion of non-aliased memory with non-BLKmode. That
10564 might end up in a register. */
10565 if (mem_ref_refers_to_non_mem_p (exp
))
10567 poly_int64 offset
= mem_ref_offset (exp
).force_shwi ();
10568 base
= TREE_OPERAND (base
, 0);
10569 poly_uint64 type_size
;
10570 if (known_eq (offset
, 0)
10572 && poly_int_tree_p (TYPE_SIZE (type
), &type_size
)
10573 && known_eq (GET_MODE_BITSIZE (DECL_MODE (base
)), type_size
))
10574 return expand_expr (build1 (VIEW_CONVERT_EXPR
, type
, base
),
10575 target
, tmode
, modifier
);
10576 if (TYPE_MODE (type
) == BLKmode
)
10578 temp
= assign_stack_temp (DECL_MODE (base
),
10579 GET_MODE_SIZE (DECL_MODE (base
)));
10580 store_expr (base
, temp
, 0, false, false);
10581 temp
= adjust_address (temp
, BLKmode
, offset
);
10582 set_mem_size (temp
, int_size_in_bytes (type
));
10585 exp
= build3 (BIT_FIELD_REF
, type
, base
, TYPE_SIZE (type
),
10586 bitsize_int (offset
* BITS_PER_UNIT
));
10587 REF_REVERSE_STORAGE_ORDER (exp
) = reverse
;
10588 return expand_expr (exp
, target
, tmode
, modifier
);
10590 address_mode
= targetm
.addr_space
.address_mode (as
);
10591 if ((def_stmt
= get_def_for_expr (base
, BIT_AND_EXPR
)))
10593 tree mask
= gimple_assign_rhs2 (def_stmt
);
10594 base
= build2 (BIT_AND_EXPR
, TREE_TYPE (base
),
10595 gimple_assign_rhs1 (def_stmt
), mask
);
10596 TREE_OPERAND (exp
, 0) = base
;
10598 align
= get_object_alignment (exp
);
10599 op0
= expand_expr (base
, NULL_RTX
, VOIDmode
, EXPAND_SUM
);
10600 op0
= memory_address_addr_space (mode
, op0
, as
);
10601 if (!integer_zerop (TREE_OPERAND (exp
, 1)))
10603 rtx off
= immed_wide_int_const (mem_ref_offset (exp
), address_mode
);
10604 op0
= simplify_gen_binary (PLUS
, address_mode
, op0
, off
);
10605 op0
= memory_address_addr_space (mode
, op0
, as
);
10607 temp
= gen_rtx_MEM (mode
, op0
);
10608 set_mem_attributes (temp
, exp
, 0);
10609 set_mem_addr_space (temp
, as
);
10610 if (TREE_THIS_VOLATILE (exp
))
10611 MEM_VOLATILE_P (temp
) = 1;
10612 if (modifier
!= EXPAND_WRITE
10613 && modifier
!= EXPAND_MEMORY
10614 && !inner_reference_p
10616 && align
< GET_MODE_ALIGNMENT (mode
))
10617 temp
= expand_misaligned_mem_ref (temp
, mode
, unsignedp
, align
,
10618 modifier
== EXPAND_STACK_PARM
10619 ? NULL_RTX
: target
, alt_rtl
);
10621 && modifier
!= EXPAND_MEMORY
10622 && modifier
!= EXPAND_WRITE
)
10623 temp
= flip_storage_order (mode
, temp
);
10630 tree array
= treeop0
;
10631 tree index
= treeop1
;
10634 /* Fold an expression like: "foo"[2].
10635 This is not done in fold so it won't happen inside &.
10636 Don't fold if this is for wide characters since it's too
10637 difficult to do correctly and this is a very rare case. */
10639 if (modifier
!= EXPAND_CONST_ADDRESS
10640 && modifier
!= EXPAND_INITIALIZER
10641 && modifier
!= EXPAND_MEMORY
)
10643 tree t
= fold_read_from_constant_string (exp
);
10646 return expand_expr (t
, target
, tmode
, modifier
);
10649 /* If this is a constant index into a constant array,
10650 just get the value from the array. Handle both the cases when
10651 we have an explicit constructor and when our operand is a variable
10652 that was declared const. */
10654 if (modifier
!= EXPAND_CONST_ADDRESS
10655 && modifier
!= EXPAND_INITIALIZER
10656 && modifier
!= EXPAND_MEMORY
10657 && TREE_CODE (array
) == CONSTRUCTOR
10658 && ! TREE_SIDE_EFFECTS (array
)
10659 && TREE_CODE (index
) == INTEGER_CST
)
10661 unsigned HOST_WIDE_INT ix
;
10664 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array
), ix
,
10666 if (tree_int_cst_equal (field
, index
))
10668 if (!TREE_SIDE_EFFECTS (value
))
10669 return expand_expr (fold (value
), target
, tmode
, modifier
);
10674 else if (optimize
>= 1
10675 && modifier
!= EXPAND_CONST_ADDRESS
10676 && modifier
!= EXPAND_INITIALIZER
10677 && modifier
!= EXPAND_MEMORY
10678 && TREE_READONLY (array
) && ! TREE_SIDE_EFFECTS (array
)
10679 && TREE_CODE (index
) == INTEGER_CST
10680 && (VAR_P (array
) || TREE_CODE (array
) == CONST_DECL
)
10681 && (init
= ctor_for_folding (array
)) != error_mark_node
)
10683 if (init
== NULL_TREE
)
10685 tree value
= build_zero_cst (type
);
10686 if (TREE_CODE (value
) == CONSTRUCTOR
)
10688 /* If VALUE is a CONSTRUCTOR, this optimization is only
10689 useful if this doesn't store the CONSTRUCTOR into
10690 memory. If it does, it is more efficient to just
10691 load the data from the array directly. */
10692 rtx ret
= expand_constructor (value
, target
,
10694 if (ret
== NULL_RTX
)
10699 return expand_expr (value
, target
, tmode
, modifier
);
10701 else if (TREE_CODE (init
) == CONSTRUCTOR
)
10703 unsigned HOST_WIDE_INT ix
;
10706 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init
), ix
,
10708 if (tree_int_cst_equal (field
, index
))
10710 if (TREE_SIDE_EFFECTS (value
))
10713 if (TREE_CODE (value
) == CONSTRUCTOR
)
10715 /* If VALUE is a CONSTRUCTOR, this
10716 optimization is only useful if
10717 this doesn't store the CONSTRUCTOR
10718 into memory. If it does, it is more
10719 efficient to just load the data from
10720 the array directly. */
10721 rtx ret
= expand_constructor (value
, target
,
10723 if (ret
== NULL_RTX
)
10728 expand_expr (fold (value
), target
, tmode
, modifier
);
10731 else if (TREE_CODE (init
) == STRING_CST
)
10733 tree low_bound
= array_ref_low_bound (exp
);
10734 tree index1
= fold_convert_loc (loc
, sizetype
, treeop1
);
10736 /* Optimize the special case of a zero lower bound.
10738 We convert the lower bound to sizetype to avoid problems
10739 with constant folding. E.g. suppose the lower bound is
10740 1 and its mode is QI. Without the conversion
10741 (ARRAY + (INDEX - (unsigned char)1))
10743 (ARRAY + (-(unsigned char)1) + INDEX)
10745 (ARRAY + 255 + INDEX). Oops! */
10746 if (!integer_zerop (low_bound
))
10747 index1
= size_diffop_loc (loc
, index1
,
10748 fold_convert_loc (loc
, sizetype
,
10751 if (tree_fits_uhwi_p (index1
)
10752 && compare_tree_int (index1
, TREE_STRING_LENGTH (init
)) < 0)
10754 tree char_type
= TREE_TYPE (TREE_TYPE (init
));
10755 scalar_int_mode char_mode
;
10757 if (is_int_mode (TYPE_MODE (char_type
), &char_mode
)
10758 && GET_MODE_SIZE (char_mode
) == 1)
10759 return gen_int_mode (TREE_STRING_POINTER (init
)
10760 [TREE_INT_CST_LOW (index1
)],
10766 goto normal_inner_ref
;
10768 case COMPONENT_REF
:
10769 /* If the operand is a CONSTRUCTOR, we can just extract the
10770 appropriate field if it is present. */
10771 if (TREE_CODE (treeop0
) == CONSTRUCTOR
)
10773 unsigned HOST_WIDE_INT idx
;
10775 scalar_int_mode field_mode
;
10777 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0
),
10779 if (field
== treeop1
10780 /* We can normally use the value of the field in the
10781 CONSTRUCTOR. However, if this is a bitfield in
10782 an integral mode that we can fit in a HOST_WIDE_INT,
10783 we must mask only the number of bits in the bitfield,
10784 since this is done implicitly by the constructor. If
10785 the bitfield does not meet either of those conditions,
10786 we can't do this optimization. */
10787 && (! DECL_BIT_FIELD (field
)
10788 || (is_int_mode (DECL_MODE (field
), &field_mode
)
10789 && (GET_MODE_PRECISION (field_mode
)
10790 <= HOST_BITS_PER_WIDE_INT
))))
10792 if (DECL_BIT_FIELD (field
)
10793 && modifier
== EXPAND_STACK_PARM
)
10795 op0
= expand_expr (value
, target
, tmode
, modifier
);
10796 if (DECL_BIT_FIELD (field
))
10798 HOST_WIDE_INT bitsize
= TREE_INT_CST_LOW (DECL_SIZE (field
));
10799 scalar_int_mode imode
10800 = SCALAR_INT_TYPE_MODE (TREE_TYPE (field
));
10802 if (TYPE_UNSIGNED (TREE_TYPE (field
)))
10804 op1
= gen_int_mode ((HOST_WIDE_INT_1
<< bitsize
) - 1,
10806 op0
= expand_and (imode
, op0
, op1
, target
);
10810 int count
= GET_MODE_PRECISION (imode
) - bitsize
;
10812 op0
= expand_shift (LSHIFT_EXPR
, imode
, op0
, count
,
10814 op0
= expand_shift (RSHIFT_EXPR
, imode
, op0
, count
,
10822 goto normal_inner_ref
;
10824 case BIT_FIELD_REF
:
10825 case ARRAY_RANGE_REF
:
10828 machine_mode mode1
, mode2
;
10829 poly_int64 bitsize
, bitpos
, bytepos
;
10831 int reversep
, volatilep
= 0, must_force_mem
;
10833 = get_inner_reference (exp
, &bitsize
, &bitpos
, &offset
, &mode1
,
10834 &unsignedp
, &reversep
, &volatilep
);
10835 rtx orig_op0
, memloc
;
10836 bool clear_mem_expr
= false;
10838 /* If we got back the original object, something is wrong. Perhaps
10839 we are evaluating an expression too early. In any event, don't
10840 infinitely recurse. */
10841 gcc_assert (tem
!= exp
);
10843 /* If TEM's type is a union of variable size, pass TARGET to the inner
10844 computation, since it will need a temporary and TARGET is known
10845 to have to do. This occurs in unchecked conversion in Ada. */
10847 = expand_expr_real (tem
,
10848 (TREE_CODE (TREE_TYPE (tem
)) == UNION_TYPE
10849 && COMPLETE_TYPE_P (TREE_TYPE (tem
))
10850 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem
)))
10852 && modifier
!= EXPAND_STACK_PARM
10853 ? target
: NULL_RTX
),
10855 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
,
10858 /* If the field has a mode, we want to access it in the
10859 field's mode, not the computed mode.
10860 If a MEM has VOIDmode (external with incomplete type),
10861 use BLKmode for it instead. */
10864 if (mode1
!= VOIDmode
)
10865 op0
= adjust_address (op0
, mode1
, 0);
10866 else if (GET_MODE (op0
) == VOIDmode
)
10867 op0
= adjust_address (op0
, BLKmode
, 0);
10871 = CONSTANT_P (op0
) ? TYPE_MODE (TREE_TYPE (tem
)) : GET_MODE (op0
);
10873 /* Make sure bitpos is not negative, it can wreak havoc later. */
10874 if (maybe_lt (bitpos
, 0))
10876 gcc_checking_assert (offset
== NULL_TREE
);
10877 offset
= size_int (bits_to_bytes_round_down (bitpos
));
10878 bitpos
= num_trailing_bits (bitpos
);
10881 /* If we have either an offset, a BLKmode result, or a reference
10882 outside the underlying object, we must force it to memory.
10883 Such a case can occur in Ada if we have unchecked conversion
10884 of an expression from a scalar type to an aggregate type or
10885 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
10886 passed a partially uninitialized object or a view-conversion
10887 to a larger size. */
10888 must_force_mem
= (offset
10889 || mode1
== BLKmode
10890 || (mode
== BLKmode
10891 && !int_mode_for_size (bitsize
, 1).exists ())
10892 || maybe_gt (bitpos
+ bitsize
,
10893 GET_MODE_BITSIZE (mode2
)));
10895 /* Handle CONCAT first. */
10896 if (GET_CODE (op0
) == CONCAT
&& !must_force_mem
)
10898 if (known_eq (bitpos
, 0)
10899 && known_eq (bitsize
, GET_MODE_BITSIZE (GET_MODE (op0
)))
10900 && COMPLEX_MODE_P (mode1
)
10901 && COMPLEX_MODE_P (GET_MODE (op0
))
10902 && (GET_MODE_PRECISION (GET_MODE_INNER (mode1
))
10903 == GET_MODE_PRECISION (GET_MODE_INNER (GET_MODE (op0
)))))
10906 op0
= flip_storage_order (GET_MODE (op0
), op0
);
10907 if (mode1
!= GET_MODE (op0
))
10910 for (int i
= 0; i
< 2; i
++)
10912 rtx op
= read_complex_part (op0
, i
!= 0);
10913 if (GET_CODE (op
) == SUBREG
)
10914 op
= force_reg (GET_MODE (op
), op
);
10915 temp
= gen_lowpart_common (GET_MODE_INNER (mode1
), op
);
10920 if (!REG_P (op
) && !MEM_P (op
))
10921 op
= force_reg (GET_MODE (op
), op
);
10922 op
= gen_lowpart (GET_MODE_INNER (mode1
), op
);
10926 op0
= gen_rtx_CONCAT (mode1
, parts
[0], parts
[1]);
10930 if (known_eq (bitpos
, 0)
10931 && known_eq (bitsize
,
10932 GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 0))))
10933 && maybe_ne (bitsize
, 0))
10935 op0
= XEXP (op0
, 0);
10936 mode2
= GET_MODE (op0
);
10938 else if (known_eq (bitpos
,
10939 GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 0))))
10940 && known_eq (bitsize
,
10941 GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 1))))
10942 && maybe_ne (bitpos
, 0)
10943 && maybe_ne (bitsize
, 0))
10945 op0
= XEXP (op0
, 1);
10947 mode2
= GET_MODE (op0
);
10950 /* Otherwise force into memory. */
10951 must_force_mem
= 1;
10954 /* If this is a constant, put it in a register if it is a legitimate
10955 constant and we don't need a memory reference. */
10956 if (CONSTANT_P (op0
)
10957 && mode2
!= BLKmode
10958 && targetm
.legitimate_constant_p (mode2
, op0
)
10959 && !must_force_mem
)
10960 op0
= force_reg (mode2
, op0
);
10962 /* Otherwise, if this is a constant, try to force it to the constant
10963 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
10964 is a legitimate constant. */
10965 else if (CONSTANT_P (op0
) && (memloc
= force_const_mem (mode2
, op0
)))
10966 op0
= validize_mem (memloc
);
10968 /* Otherwise, if this is a constant or the object is not in memory
10969 and need be, put it there. */
10970 else if (CONSTANT_P (op0
) || (!MEM_P (op0
) && must_force_mem
))
10972 memloc
= assign_temp (TREE_TYPE (tem
), 1, 1);
10973 emit_move_insn (memloc
, op0
);
10975 clear_mem_expr
= true;
10980 machine_mode address_mode
;
10981 rtx offset_rtx
= expand_expr (offset
, NULL_RTX
, VOIDmode
,
10984 gcc_assert (MEM_P (op0
));
10986 address_mode
= get_address_mode (op0
);
10987 if (GET_MODE (offset_rtx
) != address_mode
)
10989 /* We cannot be sure that the RTL in offset_rtx is valid outside
10990 of a memory address context, so force it into a register
10991 before attempting to convert it to the desired mode. */
10992 offset_rtx
= force_operand (offset_rtx
, NULL_RTX
);
10993 offset_rtx
= convert_to_mode (address_mode
, offset_rtx
, 0);
10996 /* See the comment in expand_assignment for the rationale. */
10997 if (mode1
!= VOIDmode
10998 && maybe_ne (bitpos
, 0)
10999 && maybe_gt (bitsize
, 0)
11000 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
11001 && multiple_p (bitpos
, bitsize
)
11002 && multiple_p (bitsize
, GET_MODE_ALIGNMENT (mode1
))
11003 && MEM_ALIGN (op0
) >= GET_MODE_ALIGNMENT (mode1
))
11005 op0
= adjust_address (op0
, mode1
, bytepos
);
11009 op0
= offset_address (op0
, offset_rtx
,
11010 highest_pow2_factor (offset
));
11013 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
11014 record its alignment as BIGGEST_ALIGNMENT. */
11016 && known_eq (bitpos
, 0)
11018 && is_aligning_offset (offset
, tem
))
11019 set_mem_align (op0
, BIGGEST_ALIGNMENT
);
11021 /* Don't forget about volatility even if this is a bitfield. */
11022 if (MEM_P (op0
) && volatilep
&& ! MEM_VOLATILE_P (op0
))
11024 if (op0
== orig_op0
)
11025 op0
= copy_rtx (op0
);
11027 MEM_VOLATILE_P (op0
) = 1;
11030 if (MEM_P (op0
) && TREE_CODE (tem
) == FUNCTION_DECL
)
11032 if (op0
== orig_op0
)
11033 op0
= copy_rtx (op0
);
11035 set_mem_align (op0
, BITS_PER_UNIT
);
11038 /* In cases where an aligned union has an unaligned object
11039 as a field, we might be extracting a BLKmode value from
11040 an integer-mode (e.g., SImode) object. Handle this case
11041 by doing the extract into an object as wide as the field
11042 (which we know to be the width of a basic mode), then
11043 storing into memory, and changing the mode to BLKmode. */
11044 if (mode1
== VOIDmode
11045 || REG_P (op0
) || GET_CODE (op0
) == SUBREG
11046 || (mode1
!= BLKmode
&& ! direct_load
[(int) mode1
]
11047 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
11048 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
11049 && modifier
!= EXPAND_CONST_ADDRESS
11050 && modifier
!= EXPAND_INITIALIZER
11051 && modifier
!= EXPAND_MEMORY
)
11052 /* If the bitfield is volatile and the bitsize
11053 is narrower than the access size of the bitfield,
11054 we need to extract bitfields from the access. */
11055 || (volatilep
&& TREE_CODE (exp
) == COMPONENT_REF
11056 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (exp
, 1))
11057 && mode1
!= BLKmode
11058 && maybe_lt (bitsize
, GET_MODE_SIZE (mode1
) * BITS_PER_UNIT
))
11059 /* If the field isn't aligned enough to fetch as a memref,
11060 fetch it as a bit field. */
11061 || (mode1
!= BLKmode
11063 ? MEM_ALIGN (op0
) < GET_MODE_ALIGNMENT (mode1
)
11064 || !multiple_p (bitpos
, GET_MODE_ALIGNMENT (mode1
))
11065 : TYPE_ALIGN (TREE_TYPE (tem
)) < GET_MODE_ALIGNMENT (mode
)
11066 || !multiple_p (bitpos
, GET_MODE_ALIGNMENT (mode
)))
11067 && modifier
!= EXPAND_MEMORY
11068 && ((modifier
== EXPAND_CONST_ADDRESS
11069 || modifier
== EXPAND_INITIALIZER
)
11071 : targetm
.slow_unaligned_access (mode1
,
11073 || !multiple_p (bitpos
, BITS_PER_UNIT
)))
11074 /* If the type and the field are a constant size and the
11075 size of the type isn't the same size as the bitfield,
11076 we must use bitfield operations. */
11077 || (known_size_p (bitsize
)
11078 && TYPE_SIZE (TREE_TYPE (exp
))
11079 && poly_int_tree_p (TYPE_SIZE (TREE_TYPE (exp
)))
11080 && maybe_ne (wi::to_poly_offset (TYPE_SIZE (TREE_TYPE (exp
))),
11083 machine_mode ext_mode
= mode
;
11085 if (ext_mode
== BLKmode
11086 && ! (target
!= 0 && MEM_P (op0
)
11088 && multiple_p (bitpos
, BITS_PER_UNIT
)))
11089 ext_mode
= int_mode_for_size (bitsize
, 1).else_blk ();
11091 if (ext_mode
== BLKmode
)
11094 target
= assign_temp (type
, 1, 1);
11096 /* ??? Unlike the similar test a few lines below, this one is
11097 very likely obsolete. */
11098 if (known_eq (bitsize
, 0))
11101 /* In this case, BITPOS must start at a byte boundary and
11102 TARGET, if specified, must be a MEM. */
11103 gcc_assert (MEM_P (op0
)
11104 && (!target
|| MEM_P (target
)));
11106 bytepos
= exact_div (bitpos
, BITS_PER_UNIT
);
11107 poly_int64 bytesize
= bits_to_bytes_round_up (bitsize
);
11108 emit_block_move (target
,
11109 adjust_address (op0
, VOIDmode
, bytepos
),
11110 gen_int_mode (bytesize
, Pmode
),
11111 (modifier
== EXPAND_STACK_PARM
11112 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
11117 /* If we have nothing to extract, the result will be 0 for targets
11118 with SHIFT_COUNT_TRUNCATED == 0 and garbage otherwise. Always
11119 return 0 for the sake of consistency, as reading a zero-sized
11120 bitfield is valid in Ada and the value is fully specified. */
11121 if (known_eq (bitsize
, 0))
11124 op0
= validize_mem (op0
);
11126 if (MEM_P (op0
) && REG_P (XEXP (op0
, 0)))
11127 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
11129 /* If the result has aggregate type and the extraction is done in
11130 an integral mode, then the field may be not aligned on a byte
11131 boundary; in this case, if it has reverse storage order, it
11132 needs to be extracted as a scalar field with reverse storage
11133 order and put back into memory order afterwards. */
11134 if (AGGREGATE_TYPE_P (type
)
11135 && GET_MODE_CLASS (ext_mode
) == MODE_INT
)
11136 reversep
= TYPE_REVERSE_STORAGE_ORDER (type
);
11138 gcc_checking_assert (known_ge (bitpos
, 0));
11139 op0
= extract_bit_field (op0
, bitsize
, bitpos
, unsignedp
,
11140 (modifier
== EXPAND_STACK_PARM
11141 ? NULL_RTX
: target
),
11142 ext_mode
, ext_mode
, reversep
, alt_rtl
);
11144 /* If the result has aggregate type and the mode of OP0 is an
11145 integral mode then, if BITSIZE is narrower than this mode
11146 and this is for big-endian data, we must put the field
11147 into the high-order bits. And we must also put it back
11148 into memory order if it has been previously reversed. */
11149 scalar_int_mode op0_mode
;
11150 if (AGGREGATE_TYPE_P (type
)
11151 && is_int_mode (GET_MODE (op0
), &op0_mode
))
11153 HOST_WIDE_INT size
= GET_MODE_BITSIZE (op0_mode
);
11155 gcc_checking_assert (known_le (bitsize
, size
));
11156 if (maybe_lt (bitsize
, size
)
11157 && reversep
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
)
11158 op0
= expand_shift (LSHIFT_EXPR
, op0_mode
, op0
,
11159 size
- bitsize
, op0
, 1);
11162 op0
= flip_storage_order (op0_mode
, op0
);
11165 /* If the result type is BLKmode, store the data into a temporary
11166 of the appropriate type, but with the mode corresponding to the
11167 mode for the data we have (op0's mode). */
11168 if (mode
== BLKmode
)
11171 = assign_stack_temp_for_type (ext_mode
,
11172 GET_MODE_BITSIZE (ext_mode
),
11174 emit_move_insn (new_rtx
, op0
);
11175 op0
= copy_rtx (new_rtx
);
11176 PUT_MODE (op0
, BLKmode
);
11182 /* If the result is BLKmode, use that to access the object
11184 if (mode
== BLKmode
)
11187 /* Get a reference to just this component. */
11188 bytepos
= bits_to_bytes_round_down (bitpos
);
11189 if (modifier
== EXPAND_CONST_ADDRESS
11190 || modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
11191 op0
= adjust_address_nv (op0
, mode1
, bytepos
);
11193 op0
= adjust_address (op0
, mode1
, bytepos
);
11195 if (op0
== orig_op0
)
11196 op0
= copy_rtx (op0
);
11198 /* Don't set memory attributes if the base expression is
11199 SSA_NAME that got expanded as a MEM or a CONSTANT. In that case,
11200 we should just honor its original memory attributes. */
11201 if (!(TREE_CODE (tem
) == SSA_NAME
11202 && (MEM_P (orig_op0
) || CONSTANT_P (orig_op0
))))
11203 set_mem_attributes (op0
, exp
, 0);
11205 if (REG_P (XEXP (op0
, 0)))
11206 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
11208 /* If op0 is a temporary because the original expressions was forced
11209 to memory, clear MEM_EXPR so that the original expression cannot
11210 be marked as addressable through MEM_EXPR of the temporary. */
11211 if (clear_mem_expr
)
11212 set_mem_expr (op0
, NULL_TREE
);
11214 MEM_VOLATILE_P (op0
) |= volatilep
;
11217 && modifier
!= EXPAND_MEMORY
11218 && modifier
!= EXPAND_WRITE
)
11219 op0
= flip_storage_order (mode1
, op0
);
11221 if (mode
== mode1
|| mode1
== BLKmode
|| mode1
== tmode
11222 || modifier
== EXPAND_CONST_ADDRESS
11223 || modifier
== EXPAND_INITIALIZER
)
11227 target
= gen_reg_rtx (tmode
!= VOIDmode
? tmode
: mode
);
11229 convert_move (target
, op0
, unsignedp
);
11234 return expand_expr (OBJ_TYPE_REF_EXPR (exp
), target
, tmode
, modifier
);
11237 /* All valid uses of __builtin_va_arg_pack () are removed during
11239 if (CALL_EXPR_VA_ARG_PACK (exp
))
11240 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp
);
11242 tree fndecl
= get_callee_fndecl (exp
), attr
;
11245 /* Don't diagnose the error attribute in thunks, those are
11246 artificially created. */
11247 && !CALL_FROM_THUNK_P (exp
)
11248 && (attr
= lookup_attribute ("error",
11249 DECL_ATTRIBUTES (fndecl
))) != NULL
)
11251 const char *ident
= lang_hooks
.decl_printable_name (fndecl
, 1);
11252 error ("%Kcall to %qs declared with attribute error: %s", exp
,
11253 identifier_to_locale (ident
),
11254 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr
))));
11257 /* Don't diagnose the warning attribute in thunks, those are
11258 artificially created. */
11259 && !CALL_FROM_THUNK_P (exp
)
11260 && (attr
= lookup_attribute ("warning",
11261 DECL_ATTRIBUTES (fndecl
))) != NULL
)
11263 const char *ident
= lang_hooks
.decl_printable_name (fndecl
, 1);
11264 warning_at (tree_nonartificial_location (exp
),
11265 OPT_Wattribute_warning
,
11266 "%Kcall to %qs declared with attribute warning: %s",
11267 exp
, identifier_to_locale (ident
),
11268 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr
))));
11271 /* Check for a built-in function. */
11272 if (fndecl
&& fndecl_built_in_p (fndecl
))
11274 gcc_assert (DECL_BUILT_IN_CLASS (fndecl
) != BUILT_IN_FRONTEND
);
11275 return expand_builtin (exp
, target
, subtarget
, tmode
, ignore
);
11278 return expand_call (exp
, target
, ignore
);
11280 case VIEW_CONVERT_EXPR
:
11283 /* If we are converting to BLKmode, try to avoid an intermediate
11284 temporary by fetching an inner memory reference. */
11285 if (mode
== BLKmode
11286 && poly_int_tree_p (TYPE_SIZE (type
))
11287 && TYPE_MODE (TREE_TYPE (treeop0
)) != BLKmode
11288 && handled_component_p (treeop0
))
11290 machine_mode mode1
;
11291 poly_int64 bitsize
, bitpos
, bytepos
;
11293 int reversep
, volatilep
= 0;
11295 = get_inner_reference (treeop0
, &bitsize
, &bitpos
, &offset
, &mode1
,
11296 &unsignedp
, &reversep
, &volatilep
);
11298 /* ??? We should work harder and deal with non-zero offsets. */
11300 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
11302 && known_size_p (bitsize
)
11303 && known_eq (wi::to_poly_offset (TYPE_SIZE (type
)), bitsize
))
11305 /* See the normal_inner_ref case for the rationale. */
11307 = expand_expr_real (tem
,
11308 (TREE_CODE (TREE_TYPE (tem
)) == UNION_TYPE
11309 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem
)))
11311 && modifier
!= EXPAND_STACK_PARM
11312 ? target
: NULL_RTX
),
11314 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
,
11317 if (MEM_P (orig_op0
))
11321 /* Get a reference to just this component. */
11322 if (modifier
== EXPAND_CONST_ADDRESS
11323 || modifier
== EXPAND_SUM
11324 || modifier
== EXPAND_INITIALIZER
)
11325 op0
= adjust_address_nv (op0
, mode
, bytepos
);
11327 op0
= adjust_address (op0
, mode
, bytepos
);
11329 if (op0
== orig_op0
)
11330 op0
= copy_rtx (op0
);
11332 set_mem_attributes (op0
, treeop0
, 0);
11333 if (REG_P (XEXP (op0
, 0)))
11334 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
11336 MEM_VOLATILE_P (op0
) |= volatilep
;
11342 op0
= expand_expr_real (treeop0
, NULL_RTX
, VOIDmode
, modifier
,
11343 NULL
, inner_reference_p
);
11345 /* If the input and output modes are both the same, we are done. */
11346 if (mode
== GET_MODE (op0
))
11348 /* If neither mode is BLKmode, and both modes are the same size
11349 then we can use gen_lowpart. */
11350 else if (mode
!= BLKmode
11351 && GET_MODE (op0
) != BLKmode
11352 && known_eq (GET_MODE_PRECISION (mode
),
11353 GET_MODE_PRECISION (GET_MODE (op0
)))
11354 && !COMPLEX_MODE_P (GET_MODE (op0
)))
11356 if (GET_CODE (op0
) == SUBREG
)
11357 op0
= force_reg (GET_MODE (op0
), op0
);
11358 temp
= gen_lowpart_common (mode
, op0
);
11363 if (!REG_P (op0
) && !MEM_P (op0
))
11364 op0
= force_reg (GET_MODE (op0
), op0
);
11365 op0
= gen_lowpart (mode
, op0
);
11368 /* If both types are integral, convert from one mode to the other. */
11369 else if (INTEGRAL_TYPE_P (type
) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0
)))
11370 op0
= convert_modes (mode
, GET_MODE (op0
), op0
,
11371 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
11372 /* If the output type is a bit-field type, do an extraction. */
11373 else if (reduce_bit_field
)
11374 return extract_bit_field (op0
, TYPE_PRECISION (type
), 0,
11375 TYPE_UNSIGNED (type
), NULL_RTX
,
11376 mode
, mode
, false, NULL
);
11377 /* As a last resort, spill op0 to memory, and reload it in a
11379 else if (!MEM_P (op0
))
11381 /* If the operand is not a MEM, force it into memory. Since we
11382 are going to be changing the mode of the MEM, don't call
11383 force_const_mem for constants because we don't allow pool
11384 constants to change mode. */
11385 tree inner_type
= TREE_TYPE (treeop0
);
11387 gcc_assert (!TREE_ADDRESSABLE (exp
));
11389 if (target
== 0 || GET_MODE (target
) != TYPE_MODE (inner_type
))
11391 = assign_stack_temp_for_type
11392 (TYPE_MODE (inner_type
),
11393 GET_MODE_SIZE (TYPE_MODE (inner_type
)), inner_type
);
11395 emit_move_insn (target
, op0
);
11399 /* If OP0 is (now) a MEM, we need to deal with alignment issues. If the
11400 output type is such that the operand is known to be aligned, indicate
11401 that it is. Otherwise, we need only be concerned about alignment for
11402 non-BLKmode results. */
11405 enum insn_code icode
;
11407 if (modifier
!= EXPAND_WRITE
11408 && modifier
!= EXPAND_MEMORY
11409 && !inner_reference_p
11411 && MEM_ALIGN (op0
) < GET_MODE_ALIGNMENT (mode
))
11413 /* If the target does have special handling for unaligned
11414 loads of mode then use them. */
11415 if ((icode
= optab_handler (movmisalign_optab
, mode
))
11416 != CODE_FOR_nothing
)
11420 op0
= adjust_address (op0
, mode
, 0);
11421 /* We've already validated the memory, and we're creating a
11422 new pseudo destination. The predicates really can't
11424 reg
= gen_reg_rtx (mode
);
11426 /* Nor can the insn generator. */
11427 rtx_insn
*insn
= GEN_FCN (icode
) (reg
, op0
);
11431 else if (STRICT_ALIGNMENT
)
11433 poly_uint64 mode_size
= GET_MODE_SIZE (mode
);
11434 poly_uint64 temp_size
= mode_size
;
11435 if (GET_MODE (op0
) != BLKmode
)
11436 temp_size
= upper_bound (temp_size
,
11437 GET_MODE_SIZE (GET_MODE (op0
)));
11439 = assign_stack_temp_for_type (mode
, temp_size
, type
);
11440 rtx new_with_op0_mode
11441 = adjust_address (new_rtx
, GET_MODE (op0
), 0);
11443 gcc_assert (!TREE_ADDRESSABLE (exp
));
11445 if (GET_MODE (op0
) == BLKmode
)
11447 rtx size_rtx
= gen_int_mode (mode_size
, Pmode
);
11448 emit_block_move (new_with_op0_mode
, op0
, size_rtx
,
11449 (modifier
== EXPAND_STACK_PARM
11450 ? BLOCK_OP_CALL_PARM
11451 : BLOCK_OP_NORMAL
));
11454 emit_move_insn (new_with_op0_mode
, op0
);
11460 op0
= adjust_address (op0
, mode
, 0);
11467 tree lhs
= treeop0
;
11468 tree rhs
= treeop1
;
11469 gcc_assert (ignore
);
11471 /* Check for |= or &= of a bitfield of size one into another bitfield
11472 of size 1. In this case, (unless we need the result of the
11473 assignment) we can do this more efficiently with a
11474 test followed by an assignment, if necessary.
11476 ??? At this point, we can't get a BIT_FIELD_REF here. But if
11477 things change so we do, this code should be enhanced to
11479 if (TREE_CODE (lhs
) == COMPONENT_REF
11480 && (TREE_CODE (rhs
) == BIT_IOR_EXPR
11481 || TREE_CODE (rhs
) == BIT_AND_EXPR
)
11482 && TREE_OPERAND (rhs
, 0) == lhs
11483 && TREE_CODE (TREE_OPERAND (rhs
, 1)) == COMPONENT_REF
11484 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs
, 1)))
11485 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs
, 1), 1))))
11487 rtx_code_label
*label
= gen_label_rtx ();
11488 int value
= TREE_CODE (rhs
) == BIT_IOR_EXPR
;
11489 profile_probability prob
= profile_probability::uninitialized ();
11491 jumpifnot (TREE_OPERAND (rhs
, 1), label
, prob
);
11493 jumpif (TREE_OPERAND (rhs
, 1), label
, prob
);
11494 expand_assignment (lhs
, build_int_cst (TREE_TYPE (rhs
), value
),
11496 do_pending_stack_adjust ();
11497 emit_label (label
);
11501 expand_assignment (lhs
, rhs
, false);
11506 return expand_expr_addr_expr (exp
, target
, tmode
, modifier
);
11508 case REALPART_EXPR
:
11509 op0
= expand_normal (treeop0
);
11510 return read_complex_part (op0
, false);
11512 case IMAGPART_EXPR
:
11513 op0
= expand_normal (treeop0
);
11514 return read_complex_part (op0
, true);
11521 /* Expanded in cfgexpand.c. */
11522 gcc_unreachable ();
11524 case TRY_CATCH_EXPR
:
11526 case EH_FILTER_EXPR
:
11527 case TRY_FINALLY_EXPR
:
11529 /* Lowered by tree-eh.c. */
11530 gcc_unreachable ();
11532 case WITH_CLEANUP_EXPR
:
11533 case CLEANUP_POINT_EXPR
:
11535 case CASE_LABEL_EXPR
:
11540 case COMPOUND_EXPR
:
11541 case PREINCREMENT_EXPR
:
11542 case PREDECREMENT_EXPR
:
11543 case POSTINCREMENT_EXPR
:
11544 case POSTDECREMENT_EXPR
:
11547 case COMPOUND_LITERAL_EXPR
:
11548 /* Lowered by gimplify.c. */
11549 gcc_unreachable ();
11552 /* Function descriptors are not valid except for as
11553 initialization constants, and should not be expanded. */
11554 gcc_unreachable ();
11556 case WITH_SIZE_EXPR
:
11557 /* WITH_SIZE_EXPR expands to its first argument. The caller should
11558 have pulled out the size to use in whatever context it needed. */
11559 return expand_expr_real (treeop0
, original_target
, tmode
,
11560 modifier
, alt_rtl
, inner_reference_p
);
11563 return expand_expr_real_2 (&ops
, target
, tmode
, modifier
);
11567 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
11568 signedness of TYPE), possibly returning the result in TARGET.
11569 TYPE is known to be a partial integer type. */
11571 reduce_to_bit_field_precision (rtx exp
, rtx target
, tree type
)
11573 scalar_int_mode mode
= SCALAR_INT_TYPE_MODE (type
);
11574 HOST_WIDE_INT prec
= TYPE_PRECISION (type
);
11575 gcc_assert ((GET_MODE (exp
) == VOIDmode
|| GET_MODE (exp
) == mode
)
11576 && (!target
|| GET_MODE (target
) == mode
));
11578 /* For constant values, reduce using wide_int_to_tree. */
11579 if (poly_int_rtx_p (exp
))
11581 auto value
= wi::to_poly_wide (exp
, mode
);
11582 tree t
= wide_int_to_tree (type
, value
);
11583 return expand_expr (t
, target
, VOIDmode
, EXPAND_NORMAL
);
11585 else if (TYPE_UNSIGNED (type
))
11587 rtx mask
= immed_wide_int_const
11588 (wi::mask (prec
, false, GET_MODE_PRECISION (mode
)), mode
);
11589 return expand_and (mode
, exp
, mask
, target
);
11593 int count
= GET_MODE_PRECISION (mode
) - prec
;
11594 exp
= expand_shift (LSHIFT_EXPR
, mode
, exp
, count
, target
, 0);
11595 return expand_shift (RSHIFT_EXPR
, mode
, exp
, count
, target
, 0);
11599 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
11600 when applied to the address of EXP produces an address known to be
11601 aligned more than BIGGEST_ALIGNMENT. */
11604 is_aligning_offset (const_tree offset
, const_tree exp
)
11606 /* Strip off any conversions. */
11607 while (CONVERT_EXPR_P (offset
))
11608 offset
= TREE_OPERAND (offset
, 0);
11610 /* We must now have a BIT_AND_EXPR with a constant that is one less than
11611 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
11612 if (TREE_CODE (offset
) != BIT_AND_EXPR
11613 || !tree_fits_uhwi_p (TREE_OPERAND (offset
, 1))
11614 || compare_tree_int (TREE_OPERAND (offset
, 1),
11615 BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
) <= 0
11616 || !pow2p_hwi (tree_to_uhwi (TREE_OPERAND (offset
, 1)) + 1))
11619 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
11620 It must be NEGATE_EXPR. Then strip any more conversions. */
11621 offset
= TREE_OPERAND (offset
, 0);
11622 while (CONVERT_EXPR_P (offset
))
11623 offset
= TREE_OPERAND (offset
, 0);
11625 if (TREE_CODE (offset
) != NEGATE_EXPR
)
11628 offset
= TREE_OPERAND (offset
, 0);
11629 while (CONVERT_EXPR_P (offset
))
11630 offset
= TREE_OPERAND (offset
, 0);
11632 /* This must now be the address of EXP. */
11633 return TREE_CODE (offset
) == ADDR_EXPR
&& TREE_OPERAND (offset
, 0) == exp
;
11636 /* Return a STRING_CST corresponding to ARG's constant initializer either
11637 if it's a string constant, or, when VALREP is set, any other constant,
11639 On success, set *PTR_OFFSET to the (possibly non-constant) byte offset
11640 within the byte string that ARG is references. If nonnull set *MEM_SIZE
11641 to the size of the byte string. If nonnull, set *DECL to the constant
11642 declaration ARG refers to. */
11645 constant_byte_string (tree arg
, tree
*ptr_offset
, tree
*mem_size
, tree
*decl
,
11646 bool valrep
= false)
11648 tree dummy
= NULL_TREE
;
11652 /* Store the type of the original expression before conversions
11653 via NOP_EXPR or POINTER_PLUS_EXPR to other types have been
11655 tree argtype
= TREE_TYPE (arg
);
11660 /* Non-constant index into the character array in an ARRAY_REF
11661 expression or null. */
11662 tree varidx
= NULL_TREE
;
11664 poly_int64 base_off
= 0;
11666 if (TREE_CODE (arg
) == ADDR_EXPR
)
11668 arg
= TREE_OPERAND (arg
, 0);
11670 if (TREE_CODE (arg
) == ARRAY_REF
)
11672 tree idx
= TREE_OPERAND (arg
, 1);
11673 if (TREE_CODE (idx
) != INTEGER_CST
)
11675 /* From a pointer (but not array) argument extract the variable
11676 index to prevent get_addr_base_and_unit_offset() from failing
11677 due to it. Use it later to compute the non-constant offset
11678 into the string and return it to the caller. */
11680 ref
= TREE_OPERAND (arg
, 0);
11682 if (TREE_CODE (TREE_TYPE (arg
)) == ARRAY_TYPE
)
11685 if (!integer_zerop (array_ref_low_bound (arg
)))
11688 if (!integer_onep (array_ref_element_size (arg
)))
11692 array
= get_addr_base_and_unit_offset (ref
, &base_off
);
11694 || (TREE_CODE (array
) != VAR_DECL
11695 && TREE_CODE (array
) != CONST_DECL
11696 && TREE_CODE (array
) != STRING_CST
))
11699 else if (TREE_CODE (arg
) == PLUS_EXPR
|| TREE_CODE (arg
) == POINTER_PLUS_EXPR
)
11701 tree arg0
= TREE_OPERAND (arg
, 0);
11702 tree arg1
= TREE_OPERAND (arg
, 1);
11705 tree str
= string_constant (arg0
, &offset
, mem_size
, decl
);
11708 str
= string_constant (arg1
, &offset
, mem_size
, decl
);
11714 /* Avoid pointers to arrays (see bug 86622). */
11715 if (POINTER_TYPE_P (TREE_TYPE (arg
))
11716 && TREE_CODE (TREE_TYPE (TREE_TYPE (arg
))) == ARRAY_TYPE
11717 && !(decl
&& !*decl
)
11718 && !(decl
&& tree_fits_uhwi_p (DECL_SIZE_UNIT (*decl
))
11719 && tree_fits_uhwi_p (*mem_size
)
11720 && tree_int_cst_equal (*mem_size
, DECL_SIZE_UNIT (*decl
))))
11723 tree type
= TREE_TYPE (offset
);
11724 arg1
= fold_convert (type
, arg1
);
11725 *ptr_offset
= fold_build2 (PLUS_EXPR
, type
, offset
, arg1
);
11730 else if (TREE_CODE (arg
) == SSA_NAME
)
11732 gimple
*stmt
= SSA_NAME_DEF_STMT (arg
);
11733 if (!is_gimple_assign (stmt
))
11736 tree rhs1
= gimple_assign_rhs1 (stmt
);
11737 tree_code code
= gimple_assign_rhs_code (stmt
);
11738 if (code
== ADDR_EXPR
)
11739 return string_constant (rhs1
, ptr_offset
, mem_size
, decl
);
11740 else if (code
!= POINTER_PLUS_EXPR
)
11744 if (tree str
= string_constant (rhs1
, &offset
, mem_size
, decl
))
11746 /* Avoid pointers to arrays (see bug 86622). */
11747 if (POINTER_TYPE_P (TREE_TYPE (rhs1
))
11748 && TREE_CODE (TREE_TYPE (TREE_TYPE (rhs1
))) == ARRAY_TYPE
11749 && !(decl
&& !*decl
)
11750 && !(decl
&& tree_fits_uhwi_p (DECL_SIZE_UNIT (*decl
))
11751 && tree_fits_uhwi_p (*mem_size
)
11752 && tree_int_cst_equal (*mem_size
, DECL_SIZE_UNIT (*decl
))))
11755 tree rhs2
= gimple_assign_rhs2 (stmt
);
11756 tree type
= TREE_TYPE (offset
);
11757 rhs2
= fold_convert (type
, rhs2
);
11758 *ptr_offset
= fold_build2 (PLUS_EXPR
, type
, offset
, rhs2
);
11763 else if (DECL_P (arg
))
11768 tree offset
= wide_int_to_tree (sizetype
, base_off
);
11771 if (TREE_CODE (TREE_TYPE (array
)) != ARRAY_TYPE
)
11774 gcc_assert (TREE_CODE (arg
) == ARRAY_REF
);
11775 tree chartype
= TREE_TYPE (TREE_TYPE (TREE_OPERAND (arg
, 0)));
11776 if (TREE_CODE (chartype
) != INTEGER_TYPE
)
11779 offset
= fold_convert (sizetype
, varidx
);
11782 if (TREE_CODE (array
) == STRING_CST
)
11784 *ptr_offset
= fold_convert (sizetype
, offset
);
11785 *mem_size
= TYPE_SIZE_UNIT (TREE_TYPE (array
));
11788 gcc_checking_assert (tree_to_shwi (TYPE_SIZE_UNIT (TREE_TYPE (array
)))
11789 >= TREE_STRING_LENGTH (array
));
11793 tree init
= ctor_for_folding (array
);
11794 if (!init
|| init
== error_mark_node
)
11799 HOST_WIDE_INT cstoff
;
11800 if (!base_off
.is_constant (&cstoff
))
11803 /* Check that the host and target are sane. */
11804 if (CHAR_BIT
!= 8 || BITS_PER_UNIT
!= 8)
11807 HOST_WIDE_INT typesz
= int_size_in_bytes (TREE_TYPE (init
));
11808 if (typesz
<= 0 || (int) typesz
!= typesz
)
11811 HOST_WIDE_INT size
= typesz
;
11813 && DECL_SIZE_UNIT (array
)
11814 && tree_fits_shwi_p (DECL_SIZE_UNIT (array
)))
11816 size
= tree_to_shwi (DECL_SIZE_UNIT (array
));
11817 gcc_checking_assert (size
>= typesz
);
11820 /* If value representation was requested convert the initializer
11821 for the whole array or object into a string of bytes forming
11822 its value representation and return it. */
11823 unsigned char *bytes
= XNEWVEC (unsigned char, size
);
11824 int r
= native_encode_initializer (init
, bytes
, size
);
11827 XDELETEVEC (bytes
);
11832 memset (bytes
+ r
, '\0', size
- r
);
11834 const char *p
= reinterpret_cast<const char *>(bytes
);
11835 init
= build_string_literal (size
, p
, char_type_node
);
11836 init
= TREE_OPERAND (init
, 0);
11837 init
= TREE_OPERAND (init
, 0);
11840 *mem_size
= size_int (TREE_STRING_LENGTH (init
));
11841 *ptr_offset
= wide_int_to_tree (ssizetype
, base_off
);
11849 if (TREE_CODE (init
) == CONSTRUCTOR
)
11851 /* Convert the 64-bit constant offset to a wider type to avoid
11852 overflow and use it to obtain the initializer for the subobject
11855 if (!base_off
.is_constant (&wioff
))
11858 wioff
*= BITS_PER_UNIT
;
11859 if (!wi::fits_uhwi_p (wioff
))
11862 base_off
= wioff
.to_uhwi ();
11863 unsigned HOST_WIDE_INT fieldoff
= 0;
11864 init
= fold_ctor_reference (TREE_TYPE (arg
), init
, base_off
, 0, array
,
11866 if (!init
|| init
== error_mark_node
)
11869 HOST_WIDE_INT cstoff
;
11870 if (!base_off
.is_constant (&cstoff
))
11873 cstoff
= (cstoff
- fieldoff
) / BITS_PER_UNIT
;
11874 tree off
= build_int_cst (sizetype
, cstoff
);
11876 offset
= fold_build2 (PLUS_EXPR
, TREE_TYPE (offset
), offset
, off
);
11881 *ptr_offset
= offset
;
11883 tree inittype
= TREE_TYPE (init
);
11885 if (TREE_CODE (init
) == INTEGER_CST
11886 && (TREE_CODE (TREE_TYPE (array
)) == INTEGER_TYPE
11887 || TYPE_MAIN_VARIANT (inittype
) == char_type_node
))
11889 /* Check that the host and target are sane. */
11890 if (CHAR_BIT
!= 8 || BITS_PER_UNIT
!= 8)
11893 /* For a reference to (address of) a single constant character,
11894 store the native representation of the character in CHARBUF.
11895 If the reference is to an element of an array or a member
11896 of a struct, only consider narrow characters until ctors
11897 for wide character arrays are transformed to STRING_CSTs
11898 like those for narrow arrays. */
11899 unsigned char charbuf
[MAX_BITSIZE_MODE_ANY_MODE
/ BITS_PER_UNIT
];
11900 int len
= native_encode_expr (init
, charbuf
, sizeof charbuf
, 0);
11903 /* Construct a string literal with elements of INITTYPE and
11904 the representation above. Then strip
11905 the ADDR_EXPR (ARRAY_REF (...)) around the STRING_CST. */
11906 init
= build_string_literal (len
, (char *)charbuf
, inittype
);
11907 init
= TREE_OPERAND (TREE_OPERAND (init
, 0), 0);
11911 tree initsize
= TYPE_SIZE_UNIT (inittype
);
11913 if (TREE_CODE (init
) == CONSTRUCTOR
&& initializer_zerop (init
))
11915 /* Fold an empty/zero constructor for an implicitly initialized
11916 object or subobject into the empty string. */
11918 /* Determine the character type from that of the original
11920 tree chartype
= argtype
;
11921 if (POINTER_TYPE_P (chartype
))
11922 chartype
= TREE_TYPE (chartype
);
11923 while (TREE_CODE (chartype
) == ARRAY_TYPE
)
11924 chartype
= TREE_TYPE (chartype
);
11926 if (INTEGRAL_TYPE_P (chartype
)
11927 && TYPE_PRECISION (chartype
) == TYPE_PRECISION (char_type_node
))
11929 /* Convert a char array to an empty STRING_CST having an array
11930 of the expected type and size. */
11932 initsize
= integer_zero_node
;
11934 unsigned HOST_WIDE_INT size
= tree_to_uhwi (initsize
);
11935 if (size
> (unsigned HOST_WIDE_INT
) INT_MAX
)
11938 init
= build_string_literal (size
, NULL
, chartype
, size
);
11939 init
= TREE_OPERAND (init
, 0);
11940 init
= TREE_OPERAND (init
, 0);
11942 *ptr_offset
= integer_zero_node
;
11949 if (TREE_CODE (init
) != STRING_CST
)
11952 *mem_size
= initsize
;
11954 gcc_checking_assert (tree_to_shwi (initsize
) >= TREE_STRING_LENGTH (init
));
11959 /* Return STRING_CST if an ARG corresponds to a string constant or zero
11960 if it doesn't. If we return nonzero, set *PTR_OFFSET to the (possibly
11961 non-constant) offset in bytes within the string that ARG is accessing.
11962 If MEM_SIZE is non-zero the storage size of the memory is returned.
11963 If DECL is non-zero the constant declaration is returned if available. */
11966 string_constant (tree arg
, tree
*ptr_offset
, tree
*mem_size
, tree
*decl
)
11968 return constant_byte_string (arg
, ptr_offset
, mem_size
, decl
, false);
11971 /* Similar to string_constant, return a STRING_CST corresponding
11972 to the value representation of the first argument if it's
11976 byte_representation (tree arg
, tree
*ptr_offset
, tree
*mem_size
, tree
*decl
)
11978 return constant_byte_string (arg
, ptr_offset
, mem_size
, decl
, true);
11981 /* Optimize x % C1 == C2 for signed modulo if C1 is a power of two and C2
11982 is non-zero and C3 ((1<<(prec-1)) | (C1 - 1)):
11983 for C2 > 0 to x & C3 == C2
11984 for C2 < 0 to x & C3 == (C2 & C3). */
11986 maybe_optimize_pow2p_mod_cmp (enum tree_code code
, tree
*arg0
, tree
*arg1
)
11988 gimple
*stmt
= get_def_for_expr (*arg0
, TRUNC_MOD_EXPR
);
11989 tree treeop0
= gimple_assign_rhs1 (stmt
);
11990 tree treeop1
= gimple_assign_rhs2 (stmt
);
11991 tree type
= TREE_TYPE (*arg0
);
11992 scalar_int_mode mode
;
11993 if (!is_a
<scalar_int_mode
> (TYPE_MODE (type
), &mode
))
11995 if (GET_MODE_BITSIZE (mode
) != TYPE_PRECISION (type
)
11996 || TYPE_PRECISION (type
) <= 1
11997 || TYPE_UNSIGNED (type
)
11998 /* Signed x % c == 0 should have been optimized into unsigned modulo
12000 || integer_zerop (*arg1
)
12001 /* If c is known to be non-negative, modulo will be expanded as unsigned
12003 || get_range_pos_neg (treeop0
) == 1)
12006 /* x % c == d where d < 0 && d <= -c should be always false. */
12007 if (tree_int_cst_sgn (*arg1
) == -1
12008 && -wi::to_widest (treeop1
) >= wi::to_widest (*arg1
))
12011 int prec
= TYPE_PRECISION (type
);
12012 wide_int w
= wi::to_wide (treeop1
) - 1;
12013 w
|= wi::shifted_mask (0, prec
- 1, true, prec
);
12014 tree c3
= wide_int_to_tree (type
, w
);
12016 if (tree_int_cst_sgn (*arg1
) == -1)
12017 c4
= wide_int_to_tree (type
, w
& wi::to_wide (*arg1
));
12019 rtx op0
= expand_normal (treeop0
);
12020 treeop0
= make_tree (TREE_TYPE (treeop0
), op0
);
12022 bool speed_p
= optimize_insn_for_speed_p ();
12024 do_pending_stack_adjust ();
12026 location_t loc
= gimple_location (stmt
);
12027 struct separate_ops ops
;
12028 ops
.code
= TRUNC_MOD_EXPR
;
12029 ops
.location
= loc
;
12030 ops
.type
= TREE_TYPE (treeop0
);
12033 ops
.op2
= NULL_TREE
;
12035 rtx mor
= expand_expr_real_2 (&ops
, NULL_RTX
, TYPE_MODE (ops
.type
),
12037 rtx_insn
*moinsns
= get_insns ();
12040 unsigned mocost
= seq_cost (moinsns
, speed_p
);
12041 mocost
+= rtx_cost (mor
, mode
, EQ
, 0, speed_p
);
12042 mocost
+= rtx_cost (expand_normal (*arg1
), mode
, EQ
, 1, speed_p
);
12044 ops
.code
= BIT_AND_EXPR
;
12045 ops
.location
= loc
;
12046 ops
.type
= TREE_TYPE (treeop0
);
12049 ops
.op2
= NULL_TREE
;
12051 rtx mur
= expand_expr_real_2 (&ops
, NULL_RTX
, TYPE_MODE (ops
.type
),
12053 rtx_insn
*muinsns
= get_insns ();
12056 unsigned mucost
= seq_cost (muinsns
, speed_p
);
12057 mucost
+= rtx_cost (mur
, mode
, EQ
, 0, speed_p
);
12058 mucost
+= rtx_cost (expand_normal (c4
), mode
, EQ
, 1, speed_p
);
12060 if (mocost
<= mucost
)
12062 emit_insn (moinsns
);
12063 *arg0
= make_tree (TREE_TYPE (*arg0
), mor
);
12067 emit_insn (muinsns
);
12068 *arg0
= make_tree (TREE_TYPE (*arg0
), mur
);
12073 /* Attempt to optimize unsigned (X % C1) == C2 (or (X % C1) != C2).
12075 (X - C2) * C3 <= C4 (or >), where
12076 C3 is modular multiplicative inverse of C1 and 1<<prec and
12077 C4 is ((1<<prec) - 1) / C1 or ((1<<prec) - 1) / C1 - 1 (the latter
12078 if C2 > ((1<<prec) - 1) % C1).
12079 If C1 is even, S = ctz (C1) and C2 is 0, use
12080 ((X * C3) r>> S) <= C4, where C3 is modular multiplicative
12081 inverse of C1>>S and 1<<prec and C4 is (((1<<prec) - 1) / (C1>>S)) >> S.
12083 For signed (X % C1) == 0 if C1 is odd to (all operations in it
12085 (X * C3) + C4 <= 2 * C4, where
12086 C3 is modular multiplicative inverse of (unsigned) C1 and 1<<prec and
12087 C4 is ((1<<(prec - 1) - 1) / C1).
12088 If C1 is even, S = ctz(C1), use
12089 ((X * C3) + C4) r>> S <= (C4 >> (S - 1))
12090 where C3 is modular multiplicative inverse of (unsigned)(C1>>S) and 1<<prec
12091 and C4 is ((1<<(prec - 1) - 1) / (C1>>S)) & (-1<<S).
12093 See the Hacker's Delight book, section 10-17. */
12095 maybe_optimize_mod_cmp (enum tree_code code
, tree
*arg0
, tree
*arg1
)
12097 gcc_checking_assert (code
== EQ_EXPR
|| code
== NE_EXPR
);
12098 gcc_checking_assert (TREE_CODE (*arg1
) == INTEGER_CST
);
12103 gimple
*stmt
= get_def_for_expr (*arg0
, TRUNC_MOD_EXPR
);
12107 tree treeop0
= gimple_assign_rhs1 (stmt
);
12108 tree treeop1
= gimple_assign_rhs2 (stmt
);
12109 if (TREE_CODE (treeop0
) != SSA_NAME
12110 || TREE_CODE (treeop1
) != INTEGER_CST
12111 /* Don't optimize the undefined behavior case x % 0;
12112 x % 1 should have been optimized into zero, punt if
12113 it makes it here for whatever reason;
12114 x % -c should have been optimized into x % c. */
12115 || compare_tree_int (treeop1
, 2) <= 0
12116 /* Likewise x % c == d where d >= c should be always false. */
12117 || tree_int_cst_le (treeop1
, *arg1
))
12120 /* Unsigned x % pow2 is handled right already, for signed
12121 modulo handle it in maybe_optimize_pow2p_mod_cmp. */
12122 if (integer_pow2p (treeop1
))
12123 return maybe_optimize_pow2p_mod_cmp (code
, arg0
, arg1
);
12125 tree type
= TREE_TYPE (*arg0
);
12126 scalar_int_mode mode
;
12127 if (!is_a
<scalar_int_mode
> (TYPE_MODE (type
), &mode
))
12129 if (GET_MODE_BITSIZE (mode
) != TYPE_PRECISION (type
)
12130 || TYPE_PRECISION (type
) <= 1)
12133 signop sgn
= UNSIGNED
;
12134 /* If both operands are known to have the sign bit clear, handle
12135 even the signed modulo case as unsigned. treeop1 is always
12136 positive >= 2, checked above. */
12137 if (!TYPE_UNSIGNED (type
) && get_range_pos_neg (treeop0
) != 1)
12140 if (!TYPE_UNSIGNED (type
))
12142 if (tree_int_cst_sgn (*arg1
) == -1)
12144 type
= unsigned_type_for (type
);
12145 if (!type
|| TYPE_MODE (type
) != TYPE_MODE (TREE_TYPE (*arg0
)))
12149 int prec
= TYPE_PRECISION (type
);
12150 wide_int w
= wi::to_wide (treeop1
);
12151 int shift
= wi::ctz (w
);
12152 /* Unsigned (X % C1) == C2 is equivalent to (X - C2) % C1 == 0 if
12153 C2 <= -1U % C1, because for any Z >= 0U - C2 in that case (Z % C1) != 0.
12154 If C1 is odd, we can handle all cases by subtracting
12155 C4 below. We could handle even the even C1 and C2 > -1U % C1 cases
12156 e.g. by testing for overflow on the subtraction, punt on that for now
12158 if ((sgn
== SIGNED
|| shift
) && !integer_zerop (*arg1
))
12162 wide_int x
= wi::umod_trunc (wi::mask (prec
, false, prec
), w
);
12163 if (wi::gtu_p (wi::to_wide (*arg1
), x
))
12167 imm_use_iterator imm_iter
;
12168 use_operand_p use_p
;
12169 FOR_EACH_IMM_USE_FAST (use_p
, imm_iter
, treeop0
)
12171 gimple
*use_stmt
= USE_STMT (use_p
);
12172 /* Punt if treeop0 is used in the same bb in a division
12173 or another modulo with the same divisor. We should expect
12174 the division and modulo combined together. */
12175 if (use_stmt
== stmt
12176 || gimple_bb (use_stmt
) != gimple_bb (stmt
))
12178 if (!is_gimple_assign (use_stmt
)
12179 || (gimple_assign_rhs_code (use_stmt
) != TRUNC_DIV_EXPR
12180 && gimple_assign_rhs_code (use_stmt
) != TRUNC_MOD_EXPR
))
12182 if (gimple_assign_rhs1 (use_stmt
) != treeop0
12183 || !operand_equal_p (gimple_assign_rhs2 (use_stmt
), treeop1
, 0))
12188 w
= wi::lrshift (w
, shift
);
12189 wide_int a
= wide_int::from (w
, prec
+ 1, UNSIGNED
);
12190 wide_int b
= wi::shifted_mask (prec
, 1, false, prec
+ 1);
12191 wide_int m
= wide_int::from (wi::mod_inv (a
, b
), prec
, UNSIGNED
);
12192 tree c3
= wide_int_to_tree (type
, m
);
12193 tree c5
= NULL_TREE
;
12195 if (sgn
== UNSIGNED
)
12197 d
= wi::divmod_trunc (wi::mask (prec
, false, prec
), w
, UNSIGNED
, &e
);
12198 /* Use <= floor ((1<<prec) - 1) / C1 only if C2 <= ((1<<prec) - 1) % C1,
12199 otherwise use < or subtract one from C4. E.g. for
12200 x % 3U == 0 we transform this into x * 0xaaaaaaab <= 0x55555555, but
12201 x % 3U == 1 already needs to be
12202 (x - 1) * 0xaaaaaaabU <= 0x55555554. */
12203 if (!shift
&& wi::gtu_p (wi::to_wide (*arg1
), e
))
12206 d
= wi::lrshift (d
, shift
);
12210 e
= wi::udiv_trunc (wi::mask (prec
- 1, false, prec
), w
);
12212 d
= wi::lshift (e
, 1);
12215 e
= wi::bit_and (e
, wi::mask (shift
, true, prec
));
12216 d
= wi::lrshift (e
, shift
- 1);
12218 c5
= wide_int_to_tree (type
, e
);
12220 tree c4
= wide_int_to_tree (type
, d
);
12222 rtx op0
= expand_normal (treeop0
);
12223 treeop0
= make_tree (TREE_TYPE (treeop0
), op0
);
12225 bool speed_p
= optimize_insn_for_speed_p ();
12227 do_pending_stack_adjust ();
12229 location_t loc
= gimple_location (stmt
);
12230 struct separate_ops ops
;
12231 ops
.code
= TRUNC_MOD_EXPR
;
12232 ops
.location
= loc
;
12233 ops
.type
= TREE_TYPE (treeop0
);
12236 ops
.op2
= NULL_TREE
;
12238 rtx mor
= expand_expr_real_2 (&ops
, NULL_RTX
, TYPE_MODE (ops
.type
),
12240 rtx_insn
*moinsns
= get_insns ();
12243 unsigned mocost
= seq_cost (moinsns
, speed_p
);
12244 mocost
+= rtx_cost (mor
, mode
, EQ
, 0, speed_p
);
12245 mocost
+= rtx_cost (expand_normal (*arg1
), mode
, EQ
, 1, speed_p
);
12247 tree t
= fold_convert_loc (loc
, type
, treeop0
);
12248 if (!integer_zerop (*arg1
))
12249 t
= fold_build2_loc (loc
, MINUS_EXPR
, type
, t
, fold_convert (type
, *arg1
));
12250 t
= fold_build2_loc (loc
, MULT_EXPR
, type
, t
, c3
);
12252 t
= fold_build2_loc (loc
, PLUS_EXPR
, type
, t
, c5
);
12255 tree s
= build_int_cst (NULL_TREE
, shift
);
12256 t
= fold_build2_loc (loc
, RROTATE_EXPR
, type
, t
, s
);
12260 rtx mur
= expand_normal (t
);
12261 rtx_insn
*muinsns
= get_insns ();
12264 unsigned mucost
= seq_cost (muinsns
, speed_p
);
12265 mucost
+= rtx_cost (mur
, mode
, LE
, 0, speed_p
);
12266 mucost
+= rtx_cost (expand_normal (c4
), mode
, LE
, 1, speed_p
);
12268 if (mocost
<= mucost
)
12270 emit_insn (moinsns
);
12271 *arg0
= make_tree (TREE_TYPE (*arg0
), mor
);
12275 emit_insn (muinsns
);
12276 *arg0
= make_tree (type
, mur
);
12278 return code
== EQ_EXPR
? LE_EXPR
: GT_EXPR
;
12281 /* Optimize x - y < 0 into x < 0 if x - y has undefined overflow. */
12284 maybe_optimize_sub_cmp_0 (enum tree_code code
, tree
*arg0
, tree
*arg1
)
12286 gcc_checking_assert (code
== GT_EXPR
|| code
== GE_EXPR
12287 || code
== LT_EXPR
|| code
== LE_EXPR
);
12288 gcc_checking_assert (integer_zerop (*arg1
));
12293 gimple
*stmt
= get_def_for_expr (*arg0
, MINUS_EXPR
);
12297 tree treeop0
= gimple_assign_rhs1 (stmt
);
12298 tree treeop1
= gimple_assign_rhs2 (stmt
);
12299 if (!TYPE_OVERFLOW_UNDEFINED (TREE_TYPE (treeop0
)))
12302 if (issue_strict_overflow_warning (WARN_STRICT_OVERFLOW_COMPARISON
))
12303 warning_at (gimple_location (stmt
), OPT_Wstrict_overflow
,
12304 "assuming signed overflow does not occur when "
12305 "simplifying %<X - Y %s 0%> to %<X %s Y%>",
12306 op_symbol_code (code
), op_symbol_code (code
));
12312 /* Generate code to calculate OPS, and exploded expression
12313 using a store-flag instruction and return an rtx for the result.
12314 OPS reflects a comparison.
12316 If TARGET is nonzero, store the result there if convenient.
12318 Return zero if there is no suitable set-flag instruction
12319 available on this machine.
12321 Once expand_expr has been called on the arguments of the comparison,
12322 we are committed to doing the store flag, since it is not safe to
12323 re-evaluate the expression. We emit the store-flag insn by calling
12324 emit_store_flag, but only expand the arguments if we have a reason
12325 to believe that emit_store_flag will be successful. If we think that
12326 it will, but it isn't, we have to simulate the store-flag with a
12327 set/jump/set sequence. */
12330 do_store_flag (sepops ops
, rtx target
, machine_mode mode
)
12332 enum rtx_code code
;
12333 tree arg0
, arg1
, type
;
12334 machine_mode operand_mode
;
12337 rtx subtarget
= target
;
12338 location_t loc
= ops
->location
;
12343 /* Don't crash if the comparison was erroneous. */
12344 if (arg0
== error_mark_node
|| arg1
== error_mark_node
)
12347 type
= TREE_TYPE (arg0
);
12348 operand_mode
= TYPE_MODE (type
);
12349 unsignedp
= TYPE_UNSIGNED (type
);
12351 /* We won't bother with BLKmode store-flag operations because it would mean
12352 passing a lot of information to emit_store_flag. */
12353 if (operand_mode
== BLKmode
)
12356 /* We won't bother with store-flag operations involving function pointers
12357 when function pointers must be canonicalized before comparisons. */
12358 if (targetm
.have_canonicalize_funcptr_for_compare ()
12359 && ((POINTER_TYPE_P (TREE_TYPE (arg0
))
12360 && FUNC_OR_METHOD_TYPE_P (TREE_TYPE (TREE_TYPE (arg0
))))
12361 || (POINTER_TYPE_P (TREE_TYPE (arg1
))
12362 && FUNC_OR_METHOD_TYPE_P (TREE_TYPE (TREE_TYPE (arg1
))))))
12368 /* For vector typed comparisons emit code to generate the desired
12369 all-ones or all-zeros mask. */
12370 if (TREE_CODE (ops
->type
) == VECTOR_TYPE
)
12372 tree ifexp
= build2 (ops
->code
, ops
->type
, arg0
, arg1
);
12373 if (VECTOR_BOOLEAN_TYPE_P (ops
->type
)
12374 && expand_vec_cmp_expr_p (TREE_TYPE (arg0
), ops
->type
, ops
->code
))
12375 return expand_vec_cmp_expr (ops
->type
, ifexp
, target
);
12377 gcc_unreachable ();
12380 /* Optimize (x % C1) == C2 or (x % C1) != C2 if it is beneficial
12381 into (x - C2) * C3 < C4. */
12382 if ((ops
->code
== EQ_EXPR
|| ops
->code
== NE_EXPR
)
12383 && TREE_CODE (arg0
) == SSA_NAME
12384 && TREE_CODE (arg1
) == INTEGER_CST
)
12386 enum tree_code new_code
= maybe_optimize_mod_cmp (ops
->code
,
12388 if (new_code
!= ops
->code
)
12390 struct separate_ops nops
= *ops
;
12391 nops
.code
= ops
->code
= new_code
;
12394 nops
.type
= TREE_TYPE (arg0
);
12395 return do_store_flag (&nops
, target
, mode
);
12399 /* Optimize (x - y) < 0 into x < y if x - y has undefined overflow. */
12401 && (ops
->code
== LT_EXPR
|| ops
->code
== LE_EXPR
12402 || ops
->code
== GT_EXPR
|| ops
->code
== GE_EXPR
)
12403 && integer_zerop (arg1
)
12404 && TREE_CODE (arg0
) == SSA_NAME
)
12405 maybe_optimize_sub_cmp_0 (ops
->code
, &arg0
, &arg1
);
12407 /* Get the rtx comparison code to use. We know that EXP is a comparison
12408 operation of some type. Some comparisons against 1 and -1 can be
12409 converted to comparisons with zero. Do so here so that the tests
12410 below will be aware that we have a comparison with zero. These
12411 tests will not catch constants in the first operand, but constants
12412 are rarely passed as the first operand. */
12423 if (integer_onep (arg1
))
12424 arg1
= integer_zero_node
, code
= unsignedp
? LEU
: LE
;
12426 code
= unsignedp
? LTU
: LT
;
12429 if (! unsignedp
&& integer_all_onesp (arg1
))
12430 arg1
= integer_zero_node
, code
= LT
;
12432 code
= unsignedp
? LEU
: LE
;
12435 if (! unsignedp
&& integer_all_onesp (arg1
))
12436 arg1
= integer_zero_node
, code
= GE
;
12438 code
= unsignedp
? GTU
: GT
;
12441 if (integer_onep (arg1
))
12442 arg1
= integer_zero_node
, code
= unsignedp
? GTU
: GT
;
12444 code
= unsignedp
? GEU
: GE
;
12447 case UNORDERED_EXPR
:
12473 gcc_unreachable ();
12476 /* Put a constant second. */
12477 if (TREE_CODE (arg0
) == REAL_CST
|| TREE_CODE (arg0
) == INTEGER_CST
12478 || TREE_CODE (arg0
) == FIXED_CST
)
12480 std::swap (arg0
, arg1
);
12481 code
= swap_condition (code
);
12484 /* If this is an equality or inequality test of a single bit, we can
12485 do this by shifting the bit being tested to the low-order bit and
12486 masking the result with the constant 1. If the condition was EQ,
12487 we xor it with 1. This does not require an scc insn and is faster
12488 than an scc insn even if we have it.
12490 The code to make this transformation was moved into fold_single_bit_test,
12491 so we just call into the folder and expand its result. */
12493 if ((code
== NE
|| code
== EQ
)
12494 && integer_zerop (arg1
)
12495 && (TYPE_PRECISION (ops
->type
) != 1 || TYPE_UNSIGNED (ops
->type
)))
12497 gimple
*srcstmt
= get_def_for_expr (arg0
, BIT_AND_EXPR
);
12499 && integer_pow2p (gimple_assign_rhs2 (srcstmt
)))
12501 enum tree_code tcode
= code
== NE
? NE_EXPR
: EQ_EXPR
;
12502 type
= lang_hooks
.types
.type_for_mode (mode
, unsignedp
);
12503 tree temp
= fold_build2_loc (loc
, BIT_AND_EXPR
, TREE_TYPE (arg1
),
12504 gimple_assign_rhs1 (srcstmt
),
12505 gimple_assign_rhs2 (srcstmt
));
12506 temp
= fold_single_bit_test (loc
, tcode
, temp
, arg1
, type
);
12508 return expand_expr (temp
, target
, VOIDmode
, EXPAND_NORMAL
);
12512 if (! get_subtarget (target
)
12513 || GET_MODE (subtarget
) != operand_mode
)
12516 expand_operands (arg0
, arg1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
12519 target
= gen_reg_rtx (mode
);
12521 /* Try a cstore if possible. */
12522 return emit_store_flag_force (target
, code
, op0
, op1
,
12523 operand_mode
, unsignedp
,
12524 (TYPE_PRECISION (ops
->type
) == 1
12525 && !TYPE_UNSIGNED (ops
->type
)) ? -1 : 1);
12528 /* Attempt to generate a casesi instruction. Returns 1 if successful,
12529 0 otherwise (i.e. if there is no casesi instruction).
12531 DEFAULT_PROBABILITY is the probability of jumping to the default
12534 try_casesi (tree index_type
, tree index_expr
, tree minval
, tree range
,
12535 rtx table_label
, rtx default_label
, rtx fallback_label
,
12536 profile_probability default_probability
)
12538 class expand_operand ops
[5];
12539 scalar_int_mode index_mode
= SImode
;
12540 rtx op1
, op2
, index
;
12542 if (! targetm
.have_casesi ())
12545 /* The index must be some form of integer. Convert it to SImode. */
12546 scalar_int_mode omode
= SCALAR_INT_TYPE_MODE (index_type
);
12547 if (GET_MODE_BITSIZE (omode
) > GET_MODE_BITSIZE (index_mode
))
12549 rtx rangertx
= expand_normal (range
);
12551 /* We must handle the endpoints in the original mode. */
12552 index_expr
= build2 (MINUS_EXPR
, index_type
,
12553 index_expr
, minval
);
12554 minval
= integer_zero_node
;
12555 index
= expand_normal (index_expr
);
12557 emit_cmp_and_jump_insns (rangertx
, index
, LTU
, NULL_RTX
,
12558 omode
, 1, default_label
,
12559 default_probability
);
12560 /* Now we can safely truncate. */
12561 index
= convert_to_mode (index_mode
, index
, 0);
12565 if (omode
!= index_mode
)
12567 index_type
= lang_hooks
.types
.type_for_mode (index_mode
, 0);
12568 index_expr
= fold_convert (index_type
, index_expr
);
12571 index
= expand_normal (index_expr
);
12574 do_pending_stack_adjust ();
12576 op1
= expand_normal (minval
);
12577 op2
= expand_normal (range
);
12579 create_input_operand (&ops
[0], index
, index_mode
);
12580 create_convert_operand_from_type (&ops
[1], op1
, TREE_TYPE (minval
));
12581 create_convert_operand_from_type (&ops
[2], op2
, TREE_TYPE (range
));
12582 create_fixed_operand (&ops
[3], table_label
);
12583 create_fixed_operand (&ops
[4], (default_label
12585 : fallback_label
));
12586 expand_jump_insn (targetm
.code_for_casesi
, 5, ops
);
12590 /* Attempt to generate a tablejump instruction; same concept. */
12591 /* Subroutine of the next function.
12593 INDEX is the value being switched on, with the lowest value
12594 in the table already subtracted.
12595 MODE is its expected mode (needed if INDEX is constant).
12596 RANGE is the length of the jump table.
12597 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
12599 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
12600 index value is out of range.
12601 DEFAULT_PROBABILITY is the probability of jumping to
12602 the default label. */
12605 do_tablejump (rtx index
, machine_mode mode
, rtx range
, rtx table_label
,
12606 rtx default_label
, profile_probability default_probability
)
12610 if (INTVAL (range
) > cfun
->cfg
->max_jumptable_ents
)
12611 cfun
->cfg
->max_jumptable_ents
= INTVAL (range
);
12613 /* Do an unsigned comparison (in the proper mode) between the index
12614 expression and the value which represents the length of the range.
12615 Since we just finished subtracting the lower bound of the range
12616 from the index expression, this comparison allows us to simultaneously
12617 check that the original index expression value is both greater than
12618 or equal to the minimum value of the range and less than or equal to
12619 the maximum value of the range. */
12622 emit_cmp_and_jump_insns (index
, range
, GTU
, NULL_RTX
, mode
, 1,
12623 default_label
, default_probability
);
12625 /* If index is in range, it must fit in Pmode.
12626 Convert to Pmode so we can index with it. */
12629 unsigned int width
;
12631 /* We know the value of INDEX is between 0 and RANGE. If we have a
12632 sign-extended subreg, and RANGE does not have the sign bit set, then
12633 we have a value that is valid for both sign and zero extension. In
12634 this case, we get better code if we sign extend. */
12635 if (GET_CODE (index
) == SUBREG
12636 && SUBREG_PROMOTED_VAR_P (index
)
12637 && SUBREG_PROMOTED_SIGNED_P (index
)
12638 && ((width
= GET_MODE_PRECISION (as_a
<scalar_int_mode
> (mode
)))
12639 <= HOST_BITS_PER_WIDE_INT
)
12640 && ! (UINTVAL (range
) & (HOST_WIDE_INT_1U
<< (width
- 1))))
12641 index
= convert_to_mode (Pmode
, index
, 0);
12643 index
= convert_to_mode (Pmode
, index
, 1);
12646 /* Don't let a MEM slip through, because then INDEX that comes
12647 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
12648 and break_out_memory_refs will go to work on it and mess it up. */
12649 #ifdef PIC_CASE_VECTOR_ADDRESS
12650 if (flag_pic
&& !REG_P (index
))
12651 index
= copy_to_mode_reg (Pmode
, index
);
12654 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
12655 GET_MODE_SIZE, because this indicates how large insns are. The other
12656 uses should all be Pmode, because they are addresses. This code
12657 could fail if addresses and insns are not the same size. */
12658 index
= simplify_gen_binary (MULT
, Pmode
, index
,
12659 gen_int_mode (GET_MODE_SIZE (CASE_VECTOR_MODE
),
12661 index
= simplify_gen_binary (PLUS
, Pmode
, index
,
12662 gen_rtx_LABEL_REF (Pmode
, table_label
));
12664 #ifdef PIC_CASE_VECTOR_ADDRESS
12666 index
= PIC_CASE_VECTOR_ADDRESS (index
);
12669 index
= memory_address (CASE_VECTOR_MODE
, index
);
12670 temp
= gen_reg_rtx (CASE_VECTOR_MODE
);
12671 vector
= gen_const_mem (CASE_VECTOR_MODE
, index
);
12672 convert_move (temp
, vector
, 0);
12674 emit_jump_insn (targetm
.gen_tablejump (temp
, table_label
));
12676 /* If we are generating PIC code or if the table is PC-relative, the
12677 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
12678 if (! CASE_VECTOR_PC_RELATIVE
&& ! flag_pic
)
12683 try_tablejump (tree index_type
, tree index_expr
, tree minval
, tree range
,
12684 rtx table_label
, rtx default_label
,
12685 profile_probability default_probability
)
12689 if (! targetm
.have_tablejump ())
12692 index_expr
= fold_build2 (MINUS_EXPR
, index_type
,
12693 fold_convert (index_type
, index_expr
),
12694 fold_convert (index_type
, minval
));
12695 index
= expand_normal (index_expr
);
12696 do_pending_stack_adjust ();
12698 do_tablejump (index
, TYPE_MODE (index_type
),
12699 convert_modes (TYPE_MODE (index_type
),
12700 TYPE_MODE (TREE_TYPE (range
)),
12701 expand_normal (range
),
12702 TYPE_UNSIGNED (TREE_TYPE (range
))),
12703 table_label
, default_label
, default_probability
);
12707 /* Return a CONST_VECTOR rtx representing vector mask for
12708 a VECTOR_CST of booleans. */
12710 const_vector_mask_from_tree (tree exp
)
12712 machine_mode mode
= TYPE_MODE (TREE_TYPE (exp
));
12713 machine_mode inner
= GET_MODE_INNER (mode
);
12715 rtx_vector_builder
builder (mode
, VECTOR_CST_NPATTERNS (exp
),
12716 VECTOR_CST_NELTS_PER_PATTERN (exp
));
12717 unsigned int count
= builder
.encoded_nelts ();
12718 for (unsigned int i
= 0; i
< count
; ++i
)
12720 tree elt
= VECTOR_CST_ELT (exp
, i
);
12721 gcc_assert (TREE_CODE (elt
) == INTEGER_CST
);
12722 if (integer_zerop (elt
))
12723 builder
.quick_push (CONST0_RTX (inner
));
12724 else if (integer_onep (elt
)
12725 || integer_minus_onep (elt
))
12726 builder
.quick_push (CONSTM1_RTX (inner
));
12728 gcc_unreachable ();
12730 return builder
.build ();
12733 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
12735 const_vector_from_tree (tree exp
)
12737 machine_mode mode
= TYPE_MODE (TREE_TYPE (exp
));
12739 if (initializer_zerop (exp
))
12740 return CONST0_RTX (mode
);
12742 if (VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (exp
)))
12743 return const_vector_mask_from_tree (exp
);
12745 machine_mode inner
= GET_MODE_INNER (mode
);
12747 rtx_vector_builder
builder (mode
, VECTOR_CST_NPATTERNS (exp
),
12748 VECTOR_CST_NELTS_PER_PATTERN (exp
));
12749 unsigned int count
= builder
.encoded_nelts ();
12750 for (unsigned int i
= 0; i
< count
; ++i
)
12752 tree elt
= VECTOR_CST_ELT (exp
, i
);
12753 if (TREE_CODE (elt
) == REAL_CST
)
12754 builder
.quick_push (const_double_from_real_value (TREE_REAL_CST (elt
),
12756 else if (TREE_CODE (elt
) == FIXED_CST
)
12757 builder
.quick_push (CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt
),
12760 builder
.quick_push (immed_wide_int_const (wi::to_poly_wide (elt
),
12763 return builder
.build ();
12766 /* Build a decl for a personality function given a language prefix. */
12769 build_personality_function (const char *lang
)
12771 const char *unwind_and_version
;
12775 switch (targetm_common
.except_unwind_info (&global_options
))
12780 unwind_and_version
= "_sj0";
12784 unwind_and_version
= "_v0";
12787 unwind_and_version
= "_seh0";
12790 gcc_unreachable ();
12793 name
= ACONCAT (("__", lang
, "_personality", unwind_and_version
, NULL
));
12795 type
= build_function_type_list (unsigned_type_node
,
12796 integer_type_node
, integer_type_node
,
12797 long_long_unsigned_type_node
,
12798 ptr_type_node
, ptr_type_node
, NULL_TREE
);
12799 decl
= build_decl (UNKNOWN_LOCATION
, FUNCTION_DECL
,
12800 get_identifier (name
), type
);
12801 DECL_ARTIFICIAL (decl
) = 1;
12802 DECL_EXTERNAL (decl
) = 1;
12803 TREE_PUBLIC (decl
) = 1;
12805 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
12806 are the flags assigned by targetm.encode_section_info. */
12807 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl
), 0), NULL
);
12812 /* Extracts the personality function of DECL and returns the corresponding
12816 get_personality_function (tree decl
)
12818 tree personality
= DECL_FUNCTION_PERSONALITY (decl
);
12819 enum eh_personality_kind pk
;
12821 pk
= function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl
));
12822 if (pk
== eh_personality_none
)
12826 && pk
== eh_personality_any
)
12827 personality
= lang_hooks
.eh_personality ();
12829 if (pk
== eh_personality_lang
)
12830 gcc_assert (personality
!= NULL_TREE
);
12832 return XEXP (DECL_RTL (personality
), 0);
12835 /* Returns a tree for the size of EXP in bytes. */
12838 tree_expr_size (const_tree exp
)
12841 && DECL_SIZE_UNIT (exp
) != 0)
12842 return DECL_SIZE_UNIT (exp
);
12844 return size_in_bytes (TREE_TYPE (exp
));
12847 /* Return an rtx for the size in bytes of the value of EXP. */
12850 expr_size (tree exp
)
12854 if (TREE_CODE (exp
) == WITH_SIZE_EXPR
)
12855 size
= TREE_OPERAND (exp
, 1);
12858 size
= tree_expr_size (exp
);
12860 gcc_assert (size
== SUBSTITUTE_PLACEHOLDER_IN_EXPR (size
, exp
));
12863 return expand_expr (size
, NULL_RTX
, TYPE_MODE (sizetype
), EXPAND_NORMAL
);
12866 /* Return a wide integer for the size in bytes of the value of EXP, or -1
12867 if the size can vary or is larger than an integer. */
12869 static HOST_WIDE_INT
12870 int_expr_size (tree exp
)
12874 if (TREE_CODE (exp
) == WITH_SIZE_EXPR
)
12875 size
= TREE_OPERAND (exp
, 1);
12878 size
= tree_expr_size (exp
);
12882 if (size
== 0 || !tree_fits_shwi_p (size
))
12885 return tree_to_shwi (size
);