1 # Copyright
(C
) 1999-2014 Free Software Foundation
, Inc.
3 # This
program is free software
; you can redistribute it and
/or modify
4 # it under the terms of the GNU General Public License as published by
5 # the Free Software Foundation
; either version
3 of the License
, or
6 #
(at your option
) any later version.
8 # This
program is distributed in the hope that it will be useful
,
9 # but WITHOUT
ANY WARRANTY
; without even the implied warranty of
10 # MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. See the
11 # GNU General Public License
for more details.
13 # You should have received a copy of the GNU General Public License
14 # along with GCC
; see the file COPYING3.
If not see
15 #
<http
://www.gnu.org
/licenses
/>.
17 # Please email
any bugs
, comments
, and
/or additions to this file to
:
18 # gcc
-patches@gcc.gnu.org
20 # This file defines procs
for determining features supported by the target.
22 # Try to
compile the code given by CONTENTS into an output file of
23 # type TYPE
, where TYPE is as
for target_compile.
Return a list
24 # whose first element contains the compiler messages and whose
25 # second element is the
name of the output file.
27 # BASENAME is a prefix to use
for source and output files.
28 #
If ARGS is not empty
, its first element is a string that
29 # should be added to the command line.
31 # Assume by default that CONTENTS is C code.
32 # Otherwise
, code should contain
:
34 #
"! Fortran" for Fortran code,
36 #
"// ObjC++" for ObjC++
38 #
If the tool is ObjC
/ObjC
++ then we overide the extension to .m
/.mm to
39 # allow
for ObjC
/ObjC
++ specific flags.
40 proc check_compile
{basename type contents
args} {
42 verbose
"check_compile tool: $tool for $basename"
44 if { [llength $
args] > 0 } {
45 set options
[list
"additional_flags=[lindex $args 0]"]
49 switch -glob
-- $contents
{
50 "*! Fortran*" { set src ${basename}[pid].f90 }
51 "*// C++*" { set src ${basename}[pid].cc }
52 "*// ObjC++*" { set src ${basename}[pid].mm }
53 "*/* ObjC*" { set src ${basename}[pid].m }
54 "*// Go*" { set src ${basename}[pid].go }
57 "objc" { set src ${basename}[pid].m }
58 "obj-c++" { set src ${basename}[pid].mm }
59 default
{ set src $
{basename
}[pid
].c
}
64 set compile_type $type
66 assembly
{ set output $
{basename
}[pid
].s
}
67 object
{ set output $
{basename
}[pid
].o
}
68 executable
{ set output $
{basename
}[pid
].exe
}
70 set output $
{basename
}[pid
].s
71 lappend options
"additional_flags=-fdump-$type"
72 set compile_type assembly
78 set lines
[$
{tool
}_target_compile $src $output $compile_type
"$options"]
81 set scan_output $output
82 # Don
't try folding this into the switch above; calling "glob" before the
83 # file is created won't work.
84 if [regexp
"rtl-(.*)" $type dummy rtl_type] {
85 set scan_output
"[glob $src.\[0-9\]\[0-9\]\[0-9\]r.$rtl_type]"
89 return [list $lines $scan_output
]
92 proc current_target_name
{ } {
94 if [info exists target_info
(target
,name)] {
95 set answer $target_info
(target
,name)
102 # Implement an effective
-target check
for property PROP by invoking
103 # the Tcl command
ARGS and seeing
if it returns true.
105 proc check_cached_effective_target
{ prop
args } {
108 set target
[current_target_name
]
109 if {![info exists et_cache
($prop
,target
)]
110 || $et_cache
($prop
,target
) != $target
} {
111 verbose
"check_cached_effective_target $prop: checking $target" 2
112 set et_cache
($prop
,target
) $target
113 set et_cache
($prop
,value
) [uplevel eval $
args]
115 set value $et_cache
($prop
,value
)
116 verbose
"check_cached_effective_target $prop: returning $value for $target" 2
120 # Like check_compile
, but
delete the output file and
return true
if the
121 # compiler printed no messages.
122 proc check_no_compiler_messages_nocache
{args} {
123 set result
[eval check_compile $
args]
124 set lines
[lindex $result
0]
125 set output
[lindex $result
1]
126 remote_file build
delete $output
127 return [string match
"" $lines]
130 # Like check_no_compiler_messages_nocache
, but
cache the result.
131 # PROP is the
property we
're checking, and doubles as a prefix for
132 # temporary filenames.
133 proc check_no_compiler_messages {prop args} {
134 return [check_cached_effective_target $prop {
135 eval [list check_no_compiler_messages_nocache $prop] $args
139 # Like check_compile, but return true if the compiler printed no
140 # messages and if the contents of the output file satisfy PATTERN.
141 # If PATTERN has the form "!REGEXP", the contents satisfy it if they
142 # don't match regular expression REGEXP
, otherwise they satisfy it
143 #
if they
do match regular expression PATTERN.
(PATTERN can start
144 # with something like
"[!]" if the regular expression needs to match
145 #
"!" as the first character.)
147 #
Delete the output file before returning. The other arguments are
148 # as
for check_compile.
149 proc check_no_messages_and_pattern_nocache
{basename pattern
args} {
152 set result
[eval
[list check_compile $basename
] $
args]
153 set lines
[lindex $result
0]
154 set output
[lindex $result
1]
157 if { [string match
"" $lines] } {
158 set chan
[open
"$output"]
159 set invert
[regexp
{^
!(.
*)} $pattern dummy pattern
]
160 set ok
[expr
{ [regexp $pattern
[read $chan
]] != $invert
}]
164 remote_file build
delete $output
168 # Like check_no_messages_and_pattern_nocache
, but
cache the result.
169 # PROP is the
property we
're checking, and doubles as a prefix for
170 # temporary filenames.
171 proc check_no_messages_and_pattern {prop pattern args} {
172 return [check_cached_effective_target $prop {
173 eval [list check_no_messages_and_pattern_nocache $prop $pattern] $args
177 # Try to compile and run an executable from code CONTENTS. Return true
178 # if the compiler reports no messages and if execution "passes" in the
179 # usual DejaGNU sense. The arguments are as for check_compile, with
180 # TYPE implicitly being "executable".
181 proc check_runtime_nocache {basename contents args} {
184 set result [eval [list check_compile $basename executable $contents] $args]
185 set lines [lindex $result 0]
186 set output [lindex $result 1]
189 if { [string match "" $lines] } {
190 # No error messages, everything is OK.
191 set result [remote_load target "./$output" "" ""]
192 set status [lindex $result 0]
193 verbose "check_runtime_nocache $basename: status is <$status>" 2
194 if { $status == "pass" } {
198 remote_file build delete $output
202 # Like check_runtime_nocache, but cache the result. PROP is the
203 # property we're checking
, and doubles as a prefix
for temporary
205 proc check_runtime
{prop
args} {
208 return [check_cached_effective_target $prop
{
209 eval
[list check_runtime_nocache $prop
] $
args
213 ###############################
214 # proc check_weak_available
{ }
215 ###############################
217 # weak symbols are only supported in some configs
/object formats
218 # this proc returns
1 if they
're supported, 0 if they're not
, or
-1 if unsure
220 proc check_weak_available
{ } {
223 # All mips targets should support it
225 if { [ string first
"mips" $target_cpu ] >= 0 } {
229 # All AIX targets should support it
231 if { [istarget
*-*-aix
*] } {
235 # All solaris2 targets should support it
237 if { [istarget
*-*-solaris2
*] } {
241 # Windows targets Cygwin and MingW32 support it
243 if { [istarget
*-*-cygwin
*] ||
[istarget
*-*-mingw
*] } {
247 # HP
-UX
10.X doesn
't support it
249 if { [istarget hppa*-*-hpux10*] } {
253 # ELF and ECOFF support it. a.out does with gas/gld but may also with
254 # other linkers, so we should try it
256 set objformat [gcc_target_object_format]
264 unknown { return -1 }
269 ###############################
270 # proc check_weak_override_available { }
271 ###############################
273 # Like check_weak_available, but return 0 if weak symbol definitions
274 # cannot be overridden.
276 proc check_weak_override_available { } {
277 if { [istarget *-*-mingw*] } {
280 return [check_weak_available]
283 ###############################
284 # proc check_visibility_available { what_kind }
285 ###############################
287 # The visibility attribute is only support in some object formats
288 # This proc returns 1 if it is supported, 0 if not.
289 # The argument is the kind of visibility, default/protected/hidden/internal.
291 proc check_visibility_available { what_kind } {
292 if [string match "" $what_kind] { set what_kind "hidden" }
294 return [check_no_compiler_messages visibility_available_$what_kind object "
295 void f() __attribute__((visibility(\"$what_kind\")));
300 ###############################
301 # proc check_alias_available { }
302 ###############################
304 # Determine if the target toolchain supports the alias attribute.
306 # Returns 2 if the target supports aliases. Returns 1 if the target
307 # only supports weak aliased. Returns 0 if the target does not
308 # support aliases at all. Returns -1 if support for aliases could not
311 proc check_alias_available { } {
312 global alias_available_saved
315 if [info exists alias_available_saved] {
316 verbose "check_alias_available returning saved $alias_available_saved" 2
320 verbose "check_alias_available compiling testfile $src" 2
321 set f [open $src "w"]
322 # Compile a small test program. The definition of "g" is
323 # necessary to keep the Solaris assembler from complaining
325 puts $f "#ifdef __cplusplus\nextern \"C\"\n#endif\n"
326 puts $f "void g() {} void f() __attribute__((alias(\"g\")));"
328 set lines [${tool}_target_compile $src $obj object ""]
330 remote_file build delete $obj
332 if [string match "" $lines] then {
333 # No error messages, everything is OK.
334 set alias_available_saved 2
336 if [regexp "alias definitions not supported" $lines] {
337 verbose "check_alias_available target does not support aliases" 2
339 set objformat [gcc_target_object_format]
341 if { $objformat == "elf" } {
342 verbose "check_alias_available but target uses ELF format, so it ought to" 2
343 set alias_available_saved -1
345 set alias_available_saved 0
348 if [regexp "only weak aliases are supported" $lines] {
349 verbose "check_alias_available target supports only weak aliases" 2
350 set alias_available_saved 1
352 set alias_available_saved -1
357 verbose "check_alias_available returning $alias_available_saved" 2
360 return $alias_available_saved
363 # Returns 1 if the target toolchain supports strong aliases, 0 otherwise.
365 proc check_effective_target_alias { } {
366 if { [check_alias_available] < 2 } {
373 # Returns 1 if the target toolchain supports ifunc, 0 otherwise.
375 proc check_ifunc_available { } {
376 return [check_no_compiler_messages ifunc_available object {
381 void f() __attribute__((ifunc("g")));
385 # Returns true if --gc-sections is supported on the target.
387 proc check_gc_sections_available { } {
388 global gc_sections_available_saved
391 if {![info exists gc_sections_available_saved]} {
392 # Some targets don't support gc
-sections despite whatever
's
393 # advertised by ld's options.
394 if { [istarget alpha
*-*-*]
395 ||
[istarget ia64
-*-*] } {
396 set gc_sections_available_saved
0
400 # elf2flt uses
-q
(--emit
-relocs
), which is incompatible with
402 if { [board_info target
exists ldflags
]
403 && [regexp
" -elf2flt\[ =\]" " [board_info target ldflags] "] } {
404 set gc_sections_available_saved
0
408 # VxWorks kernel modules are relocatable objects linked with
-r
,
409 #
while RTP executables are linked with
-q
(--emit
-relocs
).
410 # Both of these options are incompatible with
--gc
-sections.
411 if { [istarget
*-*-vxworks
*] } {
412 set gc_sections_available_saved
0
416 # Check
if the
ld used by gcc supports
--gc
-sections.
417 set gcc_spec
[$
{tool
}_target_compile
"-dumpspecs" "" "none" ""]
418 regsub
".*\n\\*linker:\[ \t\]*\n(\[^ \t\n\]*).*" "$gcc_spec" {\1} linker
419 set gcc_ld
[lindex
[$
{tool
}_target_compile
"-print-prog-name=$linker" "" "none" ""] 0]
420 set ld_output
[remote_exec host
"$gcc_ld" "--help"]
421 if { [ string first
"--gc-sections" $ld_output ] >= 0 } {
422 set gc_sections_available_saved
1
424 set gc_sections_available_saved
0
427 return $gc_sections_available_saved
430 #
Return 1 if according to target_info struct and explicit target list
431 # target is supposed to support trampolines.
433 proc check_effective_target_trampolines
{ } {
434 if [target_info
exists no_trampolines
] {
437 if { [istarget avr
-*-*]
438 ||
[istarget msp430
-*-*]
439 ||
[istarget nvptx
-*-*]
440 ||
[istarget hppa2.0w
-hp
-hpux11.23
]
441 ||
[istarget hppa64
-hp
-hpux11.23
] } {
447 #
Return 1 if according to target_info struct and explicit target list
448 # target is supposed to keep null pointer checks. This could be due to
449 # use of option fno
-delete-null
-pointer
-checks or hardwired in target.
451 proc check_effective_target_keeps_null_pointer_checks
{ } {
452 if [target_info
exists keeps_null_pointer_checks
] {
455 if { [istarget avr
-*-*] } {
461 #
Return true
if profiling is supported
on the target.
463 proc check_profiling_available
{ test_what
} {
464 global profiling_available_saved
466 verbose
"Profiling argument is <$test_what>" 1
468 # These conditions depend
on the
argument so examine them before
469 # looking at the
cache variable.
471 # Tree profiling requires TLS runtime support.
472 if { $test_what
== "-fprofile-generate" } {
473 if { ![check_effective_target_tls_runtime
] } {
478 # Support
for -p
on solaris2 relies
on mcrt1.o which comes with the
479 # vendor compiler. We cannot reliably predict the directory where the
480 # vendor compiler
(and thus mcrt1.o
) is installed so we can
't
481 # necessarily find mcrt1.o even if we have it.
482 if { [istarget *-*-solaris2*] && $test_what == "-p" } {
486 # We don't yet support profiling
for MIPS16.
487 if { [istarget mips
*-*-*]
488 && ![check_effective_target_nomips16
]
489 && ($test_what
== "-p" || $test_what == "-pg") } {
493 # MinGW does not support
-p.
494 if { [istarget
*-*-mingw
*] && $test_what
== "-p" } {
498 # cygwin does not support
-p.
499 if { [istarget
*-*-cygwin
*] && $test_what
== "-p" } {
503 # uClibc does not have gcrt1.o.
504 if { [check_effective_target_uclibc
]
505 && ($test_what
== "-p" || $test_what == "-pg") } {
509 # Now examine the
cache variable.
510 if {![info exists profiling_available_saved
]} {
511 # Some targets don
't have any implementation of __bb_init_func or are
512 # missing other needed machinery.
513 if {[istarget aarch64*-*-elf]
514 || [istarget am3*-*-linux*]
515 || [istarget arm*-*-eabi*]
516 || [istarget arm*-*-elf]
517 || [istarget arm*-*-symbianelf*]
518 || [istarget avr-*-*]
519 || [istarget bfin-*-*]
520 || [istarget cris-*-*]
521 || [istarget crisv32-*-*]
522 || [istarget fido-*-elf]
523 || [istarget h8300-*-*]
524 || [istarget lm32-*-*]
525 || [istarget m32c-*-elf]
526 || [istarget m68k-*-elf]
527 || [istarget m68k-*-uclinux*]
528 || [istarget mep-*-elf]
529 || [istarget mips*-*-elf*]
530 || [istarget mmix-*-*]
531 || [istarget mn10300-*-elf*]
532 || [istarget moxie-*-elf*]
533 || [istarget msp430-*-*]
534 || [istarget nds32*-*-elf]
535 || [istarget nios2-*-elf]
536 || [istarget nvptx-*-*]
537 || [istarget powerpc-*-eabi*]
538 || [istarget powerpc-*-elf]
540 || [istarget tic6x-*-elf]
541 || [istarget xstormy16-*]
542 || [istarget xtensa*-*-elf]
543 || [istarget *-*-rtems*]
544 || [istarget *-*-vxworks*] } {
545 set profiling_available_saved 0
547 set profiling_available_saved 1
551 return $profiling_available_saved
554 # Check to see if a target is "freestanding". This is as per the definition
555 # in Section 4 of C99 standard. Effectively, it is a target which supports no
556 # extra headers or libraries other than what is considered essential.
557 proc check_effective_target_freestanding { } {
561 # Return 1 if target has packed layout of structure members by
562 # default, 0 otherwise. Note that this is slightly different than
563 # whether the target has "natural alignment": both attributes may be
566 proc check_effective_target_default_packed { } {
567 return [check_no_compiler_messages default_packed assembly {
568 struct x { char a; long b; } c;
569 int s[sizeof (c) == sizeof (char) + sizeof (long) ? 1 : -1];
573 # Return 1 if target has PCC_BITFIELD_TYPE_MATTERS defined. See
574 # documentation, where the test also comes from.
576 proc check_effective_target_pcc_bitfield_type_matters { } {
577 # PCC_BITFIELD_TYPE_MATTERS isn't just about unnamed or empty
578 # bitfields
, but let
's stick to the example code from the docs.
579 return [check_no_compiler_messages pcc_bitfield_type_matters assembly {
580 struct foo1 { char x; char :0; char y; };
581 struct foo2 { char x; int :0; char y; };
582 int s[sizeof (struct foo1) != sizeof (struct foo2) ? 1 : -1];
586 # Add to FLAGS all the target-specific flags needed to use thread-local storage.
588 proc add_options_for_tls { flags } {
589 # On Solaris 9, __tls_get_addr/___tls_get_addr only lives in
590 # libthread, so always pass -pthread for native TLS. Same for AIX.
591 # Need to duplicate native TLS check from
592 # check_effective_target_tls_native to avoid recursion.
593 if { ([istarget powerpc-ibm-aix*]) &&
594 [check_no_messages_and_pattern tls_native "!emutls" assembly {
596 int f (void) { return i; }
597 void g (int j) { i = j; }
599 return "-pthread [g++_link_flags [get_multilibs "-pthread"] ] $flags "
604 # Return 1 if indirect jumps are supported, 0 otherwise.
606 proc check_effective_target_indirect_jumps {} {
607 if { [istarget nvptx-*-*] } {
613 # Return 1 if nonlocal goto is supported, 0 otherwise.
615 proc check_effective_target_nonlocal_goto {} {
616 if { [istarget nvptx-*-*] } {
622 # Return 1 if taking label values is supported, 0 otherwise.
624 proc check_effective_target_label_values {} {
625 if { [istarget nvptx-*-*] } {
628 return [check_no_compiler_messages label_values assembly {
629 #ifdef NO_LABEL_VALUES
635 # Return 1 if builtin_return_address and builtin_frame_address are
636 # supported, 0 otherwise.
638 proc check_effective_target_return_address {} {
639 if { [istarget nvptx-*-*] } {
645 # Return 1 if the assembler does not verify function types against
646 # calls, 0 otherwise. Such verification will typically show up problems
647 # with K&R C function declarations.
649 proc check_effective_target_untyped_assembly {} {
650 if { [istarget nvptx-*-*] } {
656 # Return 1 if alloca is supported, 0 otherwise.
658 proc check_effective_target_alloca {} {
659 if { [istarget nvptx-*-*] } {
665 # Return 1 if thread local storage (TLS) is supported, 0 otherwise.
667 proc check_effective_target_tls {} {
668 return [check_no_compiler_messages tls assembly {
670 int f (void) { return i; }
671 void g (int j) { i = j; }
675 # Return 1 if *native* thread local storage (TLS) is supported, 0 otherwise.
677 proc check_effective_target_tls_native {} {
678 # VxWorks uses emulated TLS machinery, but with non-standard helper
679 # functions, so we fail to automatically detect it.
680 if { [istarget *-*-vxworks*] } {
684 return [check_no_messages_and_pattern tls_native "!emutls" assembly {
686 int f (void) { return i; }
687 void g (int j) { i = j; }
691 # Return 1 if *emulated* thread local storage (TLS) is supported, 0 otherwise.
693 proc check_effective_target_tls_emulated {} {
694 # VxWorks uses emulated TLS machinery, but with non-standard helper
695 # functions, so we fail to automatically detect it.
696 if { [istarget *-*-vxworks*] } {
700 return [check_no_messages_and_pattern tls_emulated "emutls" assembly {
702 int f (void) { return i; }
703 void g (int j) { i = j; }
707 # Return 1 if TLS executables can run correctly, 0 otherwise.
709 proc check_effective_target_tls_runtime {} {
710 # MSP430 runtime does not have TLS support, but just
711 # running the test below is insufficient to show this.
712 if { [istarget msp430-*-*] } {
715 return [check_runtime tls_runtime {
716 __thread int thr = 0;
717 int main (void) { return thr; }
718 } [add_options_for_tls ""]]
721 # Return 1 if atomic compare-and-swap is supported on 'int'
723 proc check_effective_target_cas_char {} {
724 return [check_no_compiler_messages cas_char assembly {
725 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
731 proc check_effective_target_cas_int {} {
732 return [check_no_compiler_messages cas_int assembly {
733 #if __INT_MAX__ == 0x7fff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
735 #elif __INT_MAX__ == 0x7fffffff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
743 # Return 1 if -ffunction-sections is supported, 0 otherwise.
745 proc check_effective_target_function_sections {} {
746 # Darwin has its own scheme and silently accepts -ffunction-sections.
747 if { [istarget *-*-darwin*] } {
751 return [check_no_compiler_messages functionsections assembly {
753 } "-ffunction-sections"]
756 # Return 1 if instruction scheduling is available, 0 otherwise.
758 proc check_effective_target_scheduling {} {
759 return [check_no_compiler_messages scheduling object {
761 } "-fschedule-insns"]
764 # Return 1 if trapping arithmetic is available, 0 otherwise.
766 proc check_effective_target_trapping {} {
767 return [check_no_compiler_messages trapping object {
768 int add (int a, int b) { return a + b; }
772 # Return 1 if compilation with -fgraphite is error-free for trivial
775 proc check_effective_target_fgraphite {} {
776 return [check_no_compiler_messages fgraphite object {
781 # Return 1 if compilation with -fopenmp is error-free for trivial
784 proc check_effective_target_fopenmp {} {
785 return [check_no_compiler_messages fopenmp object {
790 # Return 1 if compilation with -fgnu-tm is error-free for trivial
793 proc check_effective_target_fgnu_tm {} {
794 return [check_no_compiler_messages fgnu_tm object {
799 # Return 1 if the target supports mmap, 0 otherwise.
801 proc check_effective_target_mmap {} {
802 return [check_function_available "mmap"]
805 # Return 1 if the target supports dlopen, 0 otherwise.
806 proc check_effective_target_dlopen {} {
807 return [check_no_compiler_messages dlopen executable {
809 int main(void) { dlopen ("dummy.so", RTLD_NOW); }
810 } [add_options_for_dlopen ""]]
813 proc add_options_for_dlopen { flags } {
817 # Return 1 if the target supports clone, 0 otherwise.
818 proc check_effective_target_clone {} {
819 return [check_function_available "clone"]
822 # Return 1 if the target supports setrlimit, 0 otherwise.
823 proc check_effective_target_setrlimit {} {
824 # Darwin has non-posix compliant RLIMIT_AS
825 if { [istarget *-*-darwin*] } {
828 return [check_function_available "setrlimit"]
831 # Return 1 if the target supports swapcontext, 0 otherwise.
832 proc check_effective_target_swapcontext {} {
833 return [check_no_compiler_messages swapcontext executable {
834 #include <ucontext.h>
837 ucontext_t orig_context,child_context;
838 if (swapcontext(&child_context, &orig_context) < 0) { }
843 # Return 1 if compilation with -pthread is error-free for trivial
846 proc check_effective_target_pthread {} {
847 return [check_no_compiler_messages pthread object {
852 # Return 1 if compilation with -mpe-aligned-commons is error-free
853 # for trivial code, 0 otherwise.
855 proc check_effective_target_pe_aligned_commons {} {
856 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
857 return [check_no_compiler_messages pe_aligned_commons object {
859 } "-mpe-aligned-commons"]
864 # Return 1 if the target supports -static
865 proc check_effective_target_static {} {
866 return [check_no_compiler_messages static executable {
867 int main (void) { return 0; }
871 # Return 1 if the target supports -fstack-protector
872 proc check_effective_target_fstack_protector {} {
873 return [check_runtime fstack_protector {
874 int main (void) { return 0; }
875 } "-fstack-protector"]
878 # Return 1 if compilation with -freorder-blocks-and-partition is error-free
879 # for trivial code, 0 otherwise.
881 proc check_effective_target_freorder {} {
882 return [check_no_compiler_messages freorder object {
884 } "-freorder-blocks-and-partition"]
887 # Return 1 if -fpic and -fPIC are supported, as in no warnings or errors
888 # emitted, 0 otherwise. Whether a shared library can actually be built is
889 # out of scope for this test.
891 proc check_effective_target_fpic { } {
892 # Note that M68K has a multilib that supports -fpic but not
893 # -fPIC, so we need to check both. We test with a program that
894 # requires GOT references.
895 foreach arg {fpic fPIC} {
896 if [check_no_compiler_messages $arg object {
897 extern int foo (void); extern int bar;
898 int baz (void) { return foo () + bar; }
906 # Return 1 if -shared is supported, as in no warnings or errors
907 # emitted, 0 otherwise.
909 proc check_effective_target_shared { } {
910 # Note that M68K has a multilib that supports -fpic but not
911 # -fPIC, so we need to check both. We test with a program that
912 # requires GOT references.
913 return [check_no_compiler_messages shared executable {
914 extern int foo (void); extern int bar;
915 int baz (void) { return foo () + bar; }
919 # Return 1 if -pie, -fpie and -fPIE are supported, 0 otherwise.
921 proc check_effective_target_pie { } {
922 if { [istarget *-*-darwin\[912\]*]
923 || [istarget *-*-linux*]
924 || [istarget *-*-gnu*] } {
930 # Return true if the target supports -mpaired-single (as used on MIPS).
932 proc check_effective_target_mpaired_single { } {
933 return [check_no_compiler_messages mpaired_single object {
938 # Return true if the target has access to FPU instructions.
940 proc check_effective_target_hard_float { } {
941 if { [istarget mips*-*-*] } {
942 return [check_no_compiler_messages hard_float assembly {
943 #if (defined __mips_soft_float || defined __mips16)
944 #error __mips_soft_float || __mips16
949 # This proc is actually checking the availabilty of FPU
950 # support for doubles, so on the RX we must fail if the
951 # 64-bit double multilib has been selected.
952 if { [istarget rx-*-*] } {
954 # return [check_no_compiler_messages hard_float assembly {
955 #if defined __RX_64_BIT_DOUBLES__
956 #error __RX_64_BIT_DOUBLES__
961 # The generic test equates hard_float with "no call for adding doubles".
962 return [check_no_messages_and_pattern hard_float "!\\(call" rtl-expand {
963 double a (double b, double c) { return b + c; }
967 # Return true if the target is a 64-bit MIPS target.
969 proc check_effective_target_mips64 { } {
970 return [check_no_compiler_messages mips64 assembly {
977 # Return true if the target is a MIPS target that does not produce
980 proc check_effective_target_nomips16 { } {
981 return [check_no_compiler_messages nomips16 object {
985 /* A cheap way of testing for -mflip-mips16. */
986 void foo (void) { asm ("addiu $20,$20,1"); }
987 void bar (void) { asm ("addiu $20,$20,1"); }
992 # Add the options needed for MIPS16 function attributes. At the moment,
993 # we don't support MIPS16 PIC.
995 proc add_options_for_mips16_attribute
{ flags
} {
996 return "$flags -mno-abicalls -fno-pic -DMIPS16=__attribute__((mips16))"
999 #
Return true
if we can force a
mode that allows MIPS16 code generation.
1000 # We don
't support MIPS16 PIC, and only support MIPS16 -mhard-float
1003 proc check_effective_target_mips16_attribute { } {
1004 return [check_no_compiler_messages mips16_attribute assembly {
1008 #if defined __mips_hard_float \
1009 && (!defined _ABIO32 || _MIPS_SIM != _ABIO32) \
1010 && (!defined _ABIO64 || _MIPS_SIM != _ABIO64)
1011 #error __mips_hard_float && (!_ABIO32 || !_ABIO64)
1013 } [add_options_for_mips16_attribute ""]]
1016 # Return 1 if the target supports long double larger than double when
1017 # using the new ABI, 0 otherwise.
1019 proc check_effective_target_mips_newabi_large_long_double { } {
1020 return [check_no_compiler_messages mips_newabi_large_long_double object {
1021 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
1025 # Return true if the target is a MIPS target that has access
1026 # to the LL and SC instructions.
1028 proc check_effective_target_mips_llsc { } {
1029 if { ![istarget mips*-*-*] } {
1032 # Assume that these instructions are always implemented for
1033 # non-elf* targets, via emulation if necessary.
1034 if { ![istarget *-*-elf*] } {
1037 # Otherwise assume LL/SC support for everything but MIPS I.
1038 return [check_no_compiler_messages mips_llsc assembly {
1045 # Return true if the target is a MIPS target that uses in-place relocations.
1047 proc check_effective_target_mips_rel { } {
1048 if { ![istarget mips*-*-*] } {
1051 return [check_no_compiler_messages mips_rel object {
1052 #if (defined _ABIN32 && _MIPS_SIM == _ABIN32) \
1053 || (defined _ABI64 && _MIPS_SIM == _ABI64)
1054 #error _ABIN32 && (_ABIN32 || _ABI64)
1059 # Return true if the target is a MIPS target that uses the EABI.
1061 proc check_effective_target_mips_eabi { } {
1062 if { ![istarget mips*-*-*] } {
1065 return [check_no_compiler_messages mips_eabi object {
1072 # Return 1 if the current multilib does not generate PIC by default.
1074 proc check_effective_target_nonpic { } {
1075 return [check_no_compiler_messages nonpic assembly {
1082 # Return 1 if the target does not use a status wrapper.
1084 proc check_effective_target_unwrapped { } {
1085 if { [target_info needs_status_wrapper] != "" \
1086 && [target_info needs_status_wrapper] != "0" } {
1092 # Return true if iconv is supported on the target. In particular IBM1047.
1094 proc check_iconv_available { test_what } {
1097 # If the tool configuration file has not set libiconv, try "-liconv"
1098 if { ![info exists libiconv] } {
1099 set libiconv "-liconv"
1101 set test_what [lindex $test_what 1]
1102 return [check_runtime_nocache $test_what [subst {
1108 cd = iconv_open ("$test_what", "UTF-8");
1109 if (cd == (iconv_t) -1)
1116 # Return true if Cilk Library is supported on the target.
1117 proc check_libcilkrts_available { } {
1118 return [ check_no_compiler_messages_nocache libcilkrts_available executable {
1122 int __cilkrts_set_param (const char *, const char *);
1124 int x = __cilkrts_set_param ("nworkers", "0");
1127 } "-fcilkplus -lcilkrts" ]
1130 # Return 1 if an ASCII locale is supported on this host, 0 otherwise.
1132 proc check_ascii_locale_available { } {
1136 # Return true if named sections are supported on this target.
1138 proc check_named_sections_available { } {
1139 return [check_no_compiler_messages named_sections assembly {
1140 int __attribute__ ((section("whatever"))) foo;
1144 # Return true if the "naked" function attribute is supported on this target.
1146 proc check_effective_target_naked_functions { } {
1147 return [check_no_compiler_messages naked_functions assembly {
1148 void f() __attribute__((naked));
1152 # Return 1 if the target supports Fortran real kinds larger than real(8),
1155 # When the target name changes, replace the cached result.
1157 proc check_effective_target_fortran_large_real { } {
1158 return [check_no_compiler_messages fortran_large_real executable {
1160 integer,parameter :: k = selected_real_kind (precision (0.0_8) + 1)
1167 # Return 1 if the target supports Fortran real kind real(16),
1168 # 0 otherwise. Contrary to check_effective_target_fortran_large_real
1169 # this checks for Real(16) only; the other returned real(10) if
1170 # both real(10) and real(16) are available.
1172 # When the target name changes, replace the cached result.
1174 proc check_effective_target_fortran_real_16 { } {
1175 return [check_no_compiler_messages fortran_real_16 executable {
1184 # Return 1 if the target supports Fortran's IEEE modules
,
1187 # When the target
name changes
, replace the cached result.
1189 proc check_effective_target_fortran_ieee
{ flags
} {
1190 return [check_no_compiler_messages fortran_ieee executable
{
1192 use
, intrinsic
:: ieee_features
1198 #
Return 1 if the target supports
SQRT for the
largest floating
-point
1199 # type.
(Some targets lack the libm support
for this FP type.
)
1200 #
On most targets
, this check effectively checks either whether sqrtl is
1201 # available or
on __float128 systems whether libquadmath is installed
,
1202 # which provides sqrtq.
1204 # When the target
name changes
, replace the cached result.
1206 proc check_effective_target_fortran_largest_fp_has_sqrt
{ } {
1207 return [check_no_compiler_messages fortran_largest_fp_has_sqrt executable
{
1209 use iso_fortran_env
, only
: real_kinds
1210 integer,parameter
:: maxFP
= real_kinds
(ubound
(real_kinds
,dim
=1))
1211 real
(kind
=maxFP
), volatile
:: x
1219 #
Return 1 if the target supports Fortran
integer kinds larger than
1220 #
integer(8), 0 otherwise.
1222 # When the target
name changes
, replace the cached result.
1224 proc check_effective_target_fortran_large_int
{ } {
1225 return [check_no_compiler_messages fortran_large_int executable
{
1227 integer,parameter
:: k
= selected_int_kind
(range
(0_8
) + 1)
1228 integer(kind
=k
) :: i
1233 #
Return 1 if the target supports Fortran
integer(16), 0 otherwise.
1235 # When the target
name changes
, replace the cached result.
1237 proc check_effective_target_fortran_integer_16
{ } {
1238 return [check_no_compiler_messages fortran_integer_16 executable
{
1245 #
Return 1 if we can statically link libgfortran
, 0 otherwise.
1247 # When the target
name changes
, replace the cached result.
1249 proc check_effective_target_static_libgfortran
{ } {
1250 return [check_no_compiler_messages static_libgfortran executable
{
1257 #
Return 1 if cilk
-plus is supported by the target
, 0 otherwise.
1259 proc check_effective_target_cilkplus
{ } {
1260 # Skip cilk
-plus tests
on int16 and size16 targets
for now.
1261 # The cilk
-plus tests are not generic enough to cover these
1262 # cases and would throw hundreds of FAILs.
1263 if { [check_effective_target_int16
]
1264 ||
![check_effective_target_size32plus
] } {
1268 # Skip AVR
, its RAM is too small and too many tests would fail.
1269 if { [istarget avr
-*-*] } {
1275 proc check_linker_plugin_available
{ } {
1276 return [check_no_compiler_messages_nocache linker_plugin executable
{
1277 int main
() { return 0; }
1278 } "-flto -fuse-linker-plugin"]
1281 #
Return 1 if the target supports executing
750CL paired
-single instructions
, 0
1282 # otherwise.
Cache the result.
1284 proc check_750cl_hw_available
{ } {
1285 return [check_cached_effective_target
750cl_hw_available
{
1286 #
If this is not the right target
then we can skip the test.
1287 if { ![istarget powerpc
-*paired
*] } {
1290 check_runtime_nocache
750cl_hw_available
{
1294 asm volatile
("ps_mul v0,v0,v0");
1296 asm volatile
("ps_mul 0,0,0");
1305 #
Return 1 if the target OS supports running SSE executables
, 0
1306 # otherwise.
Cache the result.
1308 proc check_sse_os_support_available
{ } {
1309 return [check_cached_effective_target sse_os_support_available
{
1310 #
If this is not the right target
then we can skip the test.
1311 if { !([istarget x86_64
-*-*] ||
[istarget i?
86-*-*]) } {
1313 } elseif
{ [istarget i?
86-*-solaris2
*] } {
1314 # The Solaris
2 kernel doesn
't save and restore SSE registers
1315 # before Solaris 9 4/04. Before that, executables die with SIGILL.
1316 check_runtime_nocache sse_os_support_available {
1319 asm volatile ("movaps %xmm0,%xmm0");
1329 # Return 1 if the target OS supports running AVX executables, 0
1330 # otherwise. Cache the result.
1332 proc check_avx_os_support_available { } {
1333 return [check_cached_effective_target avx_os_support_available {
1334 # If this is not the right target then we can skip the test.
1335 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1338 # Check that OS has AVX and SSE saving enabled.
1339 check_runtime_nocache avx_os_support_available {
1342 unsigned int eax, edx;
1344 asm ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1345 return (eax & 6) != 6;
1352 # Return 1 if the target supports executing SSE instructions, 0
1353 # otherwise. Cache the result.
1355 proc check_sse_hw_available { } {
1356 return [check_cached_effective_target sse_hw_available {
1357 # If this is not the right target then we can skip the test.
1358 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1361 check_runtime_nocache sse_hw_available {
1365 unsigned int eax, ebx, ecx, edx;
1366 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1367 return !(edx & bit_SSE);
1375 # Return 1 if the target supports executing SSE2 instructions, 0
1376 # otherwise. Cache the result.
1378 proc check_sse2_hw_available { } {
1379 return [check_cached_effective_target sse2_hw_available {
1380 # If this is not the right target then we can skip the test.
1381 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1384 check_runtime_nocache sse2_hw_available {
1388 unsigned int eax, ebx, ecx, edx;
1389 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1390 return !(edx & bit_SSE2);
1398 # Return 1 if the target supports executing AVX instructions, 0
1399 # otherwise. Cache the result.
1401 proc check_avx_hw_available { } {
1402 return [check_cached_effective_target avx_hw_available {
1403 # If this is not the right target then we can skip the test.
1404 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1407 check_runtime_nocache avx_hw_available {
1411 unsigned int eax, ebx, ecx, edx;
1412 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1413 return ((ecx & (bit_AVX | bit_OSXSAVE))
1414 != (bit_AVX | bit_OSXSAVE));
1422 # Return 1 if the target supports running SSE executables, 0 otherwise.
1424 proc check_effective_target_sse_runtime { } {
1425 if { [check_effective_target_sse]
1426 && [check_sse_hw_available]
1427 && [check_sse_os_support_available] } {
1433 # Return 1 if the target supports running SSE2 executables, 0 otherwise.
1435 proc check_effective_target_sse2_runtime { } {
1436 if { [check_effective_target_sse2]
1437 && [check_sse2_hw_available]
1438 && [check_sse_os_support_available] } {
1444 # Return 1 if the target supports running AVX executables, 0 otherwise.
1446 proc check_effective_target_avx_runtime { } {
1447 if { [check_effective_target_avx]
1448 && [check_avx_hw_available]
1449 && [check_avx_os_support_available] } {
1455 # Return 1 if the target supports executing power8 vector instructions, 0
1456 # otherwise. Cache the result.
1458 proc check_p8vector_hw_available { } {
1459 return [check_cached_effective_target p8vector_hw_available {
1460 # Some simulators are known to not support VSX/power8 instructions.
1461 # For now, disable on Darwin
1462 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
1465 set options "-mpower8-vector"
1466 check_runtime_nocache p8vector_hw_available {
1470 asm volatile ("xxlorc vs0,vs0,vs0");
1472 asm volatile ("xxlorc 0,0,0");
1481 # Return 1 if the target supports executing VSX instructions, 0
1482 # otherwise. Cache the result.
1484 proc check_vsx_hw_available { } {
1485 return [check_cached_effective_target vsx_hw_available {
1486 # Some simulators are known to not support VSX instructions.
1487 # For now, disable on Darwin
1488 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
1492 check_runtime_nocache vsx_hw_available {
1496 asm volatile ("xxlor vs0,vs0,vs0");
1498 asm volatile ("xxlor 0,0,0");
1507 # Return 1 if the target supports executing AltiVec instructions, 0
1508 # otherwise. Cache the result.
1510 proc check_vmx_hw_available { } {
1511 return [check_cached_effective_target vmx_hw_available {
1512 # Some simulators are known to not support VMX instructions.
1513 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] } {
1516 # Most targets don't require special flags
for this test case
, but
1517 # Darwin does. Just to be sure
, make sure VSX is not enabled
for
1518 # the altivec tests.
1519 if { [istarget
*-*-darwin
*]
1520 ||
[istarget
*-*-aix
*] } {
1521 set options
"-maltivec -mno-vsx"
1523 set options
"-mno-vsx"
1525 check_runtime_nocache vmx_hw_available
{
1529 asm volatile
("vor v0,v0,v0");
1531 asm volatile
("vor 0,0,0");
1540 proc check_ppc_recip_hw_available
{ } {
1541 return [check_cached_effective_target ppc_recip_hw_available
{
1542 # Some simulators may not support FRE
/FRES
/FRSQRTE
/FRSQRTES
1543 #
For now
, disable
on Darwin
1544 if { [istarget powerpc
-*-eabi
] ||
[istarget powerpc
*-*-eabispe
] ||
[istarget
*-*-darwin
*]} {
1547 set options
"-mpowerpc-gfxopt -mpowerpc-gpopt -mpopcntb"
1548 check_runtime_nocache ppc_recip_hw_available
{
1549 volatile double d_recip
, d_rsqrt
, d_four
= 4.0;
1550 volatile float f_recip
, f_rsqrt
, f_four
= 4.0f
;
1553 asm volatile
("fres %0,%1" : "=f" (f_recip) : "f" (f_four));
1554 asm volatile
("fre %0,%1" : "=d" (d_recip) : "d" (d_four));
1555 asm volatile
("frsqrtes %0,%1" : "=f" (f_rsqrt) : "f" (f_four));
1556 asm volatile
("frsqrte %0,%1" : "=f" (d_rsqrt) : "d" (d_four));
1564 #
Return 1 if the target supports executing AltiVec and Cell PPU
1565 # instructions
, 0 otherwise.
Cache the result.
1567 proc check_effective_target_cell_hw
{ } {
1568 return [check_cached_effective_target cell_hw_available
{
1569 # Some simulators are known to not support VMX and PPU instructions.
1570 if { [istarget powerpc
-*-eabi
*] } {
1573 # Most targets don
't require special flags for this test
1574 # case, but Darwin and AIX do.
1575 if { [istarget *-*-darwin*]
1576 || [istarget *-*-aix*] } {
1577 set options "-maltivec -mcpu=cell"
1579 set options "-mcpu=cell"
1581 check_runtime_nocache cell_hw_available {
1585 asm volatile ("vor v0,v0,v0");
1586 asm volatile ("lvlx v0,r0,r0");
1588 asm volatile ("vor 0,0,0");
1589 asm volatile ("lvlx 0,0,0");
1598 # Return 1 if the target supports executing 64-bit instructions, 0
1599 # otherwise. Cache the result.
1601 proc check_effective_target_powerpc64 { } {
1602 global powerpc64_available_saved
1605 if [info exists powerpc64_available_saved] {
1606 verbose "check_effective_target_powerpc64 returning saved $powerpc64_available_saved" 2
1608 set powerpc64_available_saved 0
1610 # Some simulators are known to not support powerpc64 instructions.
1611 if { [istarget powerpc-*-eabi*] || [istarget powerpc-ibm-aix*] } {
1612 verbose "check_effective_target_powerpc64 returning 0" 2
1613 return $powerpc64_available_saved
1616 # Set up, compile, and execute a test program containing a 64-bit
1617 # instruction. Include the current process ID in the file
1618 # names to prevent conflicts with invocations for multiple
1623 set f [open $src "w"]
1624 puts $f "int main() {"
1625 puts $f "#ifdef __MACH__"
1626 puts $f " asm volatile (\"extsw r0,r0\");"
1628 puts $f " asm volatile (\"extsw 0,0\");"
1630 puts $f " return 0; }"
1633 set opts "additional_flags=-mcpu=G5"
1635 verbose "check_effective_target_powerpc64 compiling testfile $src" 2
1636 set lines [${tool}_target_compile $src $exe executable "$opts"]
1639 if [string match "" $lines] then {
1640 # No error message, compilation succeeded.
1641 set result [${tool}_load "./$exe" "" ""]
1642 set status [lindex $result 0]
1643 remote_file build delete $exe
1644 verbose "check_effective_target_powerpc64 testfile status is <$status>" 2
1646 if { $status == "pass" } then {
1647 set powerpc64_available_saved 1
1650 verbose "check_effective_target_powerpc64 testfile compilation failed" 2
1654 return $powerpc64_available_saved
1657 # GCC 3.4.0 for powerpc64-*-linux* included an ABI fix for passing
1658 # complex float arguments. This affects gfortran tests that call cabsf
1659 # in libm built by an earlier compiler. Return 1 if libm uses the same
1660 # argument passing as the compiler under test, 0 otherwise.
1662 # When the target name changes, replace the cached result.
1664 proc check_effective_target_broken_cplxf_arg { } {
1665 return [check_cached_effective_target broken_cplxf_arg {
1666 # Skip the work for targets known not to be affected.
1667 if { ![istarget powerpc64-*-linux*] } {
1669 } elseif { ![is-effective-target lp64] } {
1672 check_runtime_nocache broken_cplxf_arg {
1673 #include <complex.h>
1674 extern void abort (void);
1675 float fabsf (float);
1676 float cabsf (_Complex float);
1683 if (fabsf (f - 5.0) > 0.0001)
1692 # Return 1 is this is a TI C6X target supporting C67X instructions
1693 proc check_effective_target_ti_c67x { } {
1694 return [check_no_compiler_messages ti_c67x assembly {
1695 #if !defined(_TMS320C6700)
1696 #error !_TMS320C6700
1701 # Return 1 is this is a TI C6X target supporting C64X+ instructions
1702 proc check_effective_target_ti_c64xp { } {
1703 return [check_no_compiler_messages ti_c64xp assembly {
1704 #if !defined(_TMS320C6400_PLUS)
1705 #error !_TMS320C6400_PLUS
1711 proc check_alpha_max_hw_available { } {
1712 return [check_runtime alpha_max_hw_available {
1713 int main() { return __builtin_alpha_amask(1<<8) != 0; }
1717 # Returns true iff the FUNCTION is available on the target system.
1718 # (This is essentially a Tcl implementation of Autoconf's
1721 proc check_function_available
{ function
} {
1722 return [check_no_compiler_messages $
{function
}_available \
1728 int main
() { $function
(); }
1732 # Returns true iff
"fork" is available on the target system.
1734 proc check_fork_available
{} {
1735 return [check_function_available
"fork"]
1738 # Returns true iff
"mkfifo" is available on the target system.
1740 proc check_mkfifo_available
{} {
1741 if { [istarget
*-*-cygwin
*] } {
1742 # Cygwin has mkfifo
, but support is incomplete.
1746 return [check_function_available
"mkfifo"]
1749 # Returns true iff
"__cxa_atexit" is used on the target system.
1751 proc check_cxa_atexit_available
{ } {
1752 return [check_cached_effective_target cxa_atexit_available
{
1753 if { [istarget hppa
*-*-hpux10
*] } {
1754 # HP
-UX
10 doesn
't have __cxa_atexit but subsequent test passes.
1756 } elseif { [istarget *-*-vxworks] } {
1757 # vxworks doesn't have __cxa_atexit but subsequent test passes.
1760 check_runtime_nocache cxa_atexit_available
{
1763 static unsigned
int count;
1780 Y
() { f
(); count = 2; }
1789 int main
() { return 0; }
1795 proc check_effective_target_objc2
{ } {
1796 return [check_no_compiler_messages objc2 object
{
1805 proc check_effective_target_next_runtime
{ } {
1806 return [check_no_compiler_messages objc2 object
{
1807 #ifdef __NEXT_RUNTIME__
1810 #error
!__NEXT_RUNTIME__
1815 #
Return 1 if we
're generating 32-bit code using default options, 0
1818 proc check_effective_target_ilp32 { } {
1819 return [check_no_compiler_messages ilp32 object {
1820 int dummy[sizeof (int) == 4
1821 && sizeof (void *) == 4
1822 && sizeof (long) == 4 ? 1 : -1];
1826 # Return 1 if we're generating ia32 code using default options
, 0
1829 proc check_effective_target_ia32
{ } {
1830 return [check_no_compiler_messages ia32 object
{
1831 int dummy
[sizeof
(int) == 4
1832 && sizeof
(void
*) == 4
1833 && sizeof
(long
) == 4 ?
1 : -1] = { __i386__
};
1837 #
Return 1 if we
're generating x32 code using default options, 0
1840 proc check_effective_target_x32 { } {
1841 return [check_no_compiler_messages x32 object {
1842 int dummy[sizeof (int) == 4
1843 && sizeof (void *) == 4
1844 && sizeof (long) == 4 ? 1 : -1] = { __x86_64__ };
1848 # Return 1 if we're generating
32-bit integers using default
1849 # options
, 0 otherwise.
1851 proc check_effective_target_int32
{ } {
1852 return [check_no_compiler_messages int32 object
{
1853 int dummy
[sizeof
(int) == 4 ?
1 : -1];
1857 #
Return 1 if we
're generating 32-bit or larger integers using default
1858 # options, 0 otherwise.
1860 proc check_effective_target_int32plus { } {
1861 return [check_no_compiler_messages int32plus object {
1862 int dummy[sizeof (int) >= 4 ? 1 : -1];
1866 # Return 1 if we're generating
32-bit or larger pointers using default
1867 # options
, 0 otherwise.
1869 proc check_effective_target_ptr32plus
{ } {
1870 # The msp430 has
16-bit or
20-bit pointers. The
20-bit pointer is stored
1871 # in a
32-bit slot when in memory
, so sizeof
(void
*) returns
4, but it
1872 # cannot really hold a
32-bit address
, so we always
return false here.
1873 if { [istarget msp430
-*-*] } {
1877 return [check_no_compiler_messages ptr32plus object
{
1878 int dummy
[sizeof
(void
*) >= 4 ?
1 : -1];
1882 #
Return 1 if we support
32-bit or larger array and structure sizes
1883 # using default options
, 0 otherwise. Avoid false positive
on
1884 # targets with
20 or
24 bit address spaces.
1886 proc check_effective_target_size32plus
{ } {
1887 return [check_no_compiler_messages size32plus object
{
1888 char dummy
[16777217L];
1892 # Returns
1 if we
're generating 16-bit or smaller integers with the
1893 # default options, 0 otherwise.
1895 proc check_effective_target_int16 { } {
1896 return [check_no_compiler_messages int16 object {
1897 int dummy[sizeof (int) < 4 ? 1 : -1];
1901 # Return 1 if we're generating
64-bit code using default options
, 0
1904 proc check_effective_target_lp64
{ } {
1905 return [check_no_compiler_messages lp64 object
{
1906 int dummy
[sizeof
(int) == 4
1907 && sizeof
(void
*) == 8
1908 && sizeof
(long
) == 8 ?
1 : -1];
1912 #
Return 1 if we
're generating 64-bit code using default llp64 options,
1915 proc check_effective_target_llp64 { } {
1916 return [check_no_compiler_messages llp64 object {
1917 int dummy[sizeof (int) == 4
1918 && sizeof (void *) == 8
1919 && sizeof (long long) == 8
1920 && sizeof (long) == 4 ? 1 : -1];
1924 # Return 1 if long and int have different sizes,
1927 proc check_effective_target_long_neq_int { } {
1928 return [check_no_compiler_messages long_ne_int object {
1929 int dummy[sizeof (int) != sizeof (long) ? 1 : -1];
1933 # Return 1 if the target supports long double larger than double,
1936 proc check_effective_target_large_long_double { } {
1937 return [check_no_compiler_messages large_long_double object {
1938 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
1942 # Return 1 if the target supports double larger than float,
1945 proc check_effective_target_large_double { } {
1946 return [check_no_compiler_messages large_double object {
1947 int dummy[sizeof(double) > sizeof(float) ? 1 : -1];
1951 # Return 1 if the target supports long double of 128 bits,
1954 proc check_effective_target_longdouble128 { } {
1955 return [check_no_compiler_messages longdouble128 object {
1956 int dummy[sizeof(long double) == 16 ? 1 : -1];
1960 # Return 1 if the target supports double of 64 bits,
1963 proc check_effective_target_double64 { } {
1964 return [check_no_compiler_messages double64 object {
1965 int dummy[sizeof(double) == 8 ? 1 : -1];
1969 # Return 1 if the target supports double of at least 64 bits,
1972 proc check_effective_target_double64plus { } {
1973 return [check_no_compiler_messages double64plus object {
1974 int dummy[sizeof(double) >= 8 ? 1 : -1];
1978 # Return 1 if the target supports 'w
' suffix on floating constant
1981 proc check_effective_target_has_w_floating_suffix { } {
1983 if [check_effective_target_c++] {
1984 append opts "-std=gnu++03"
1986 return [check_no_compiler_messages w_fp_suffix object {
1991 # Return 1 if the target supports 'q
' suffix on floating constant
1994 proc check_effective_target_has_q_floating_suffix { } {
1996 if [check_effective_target_c++] {
1997 append opts "-std=gnu++03"
1999 return [check_no_compiler_messages q_fp_suffix object {
2003 # Return 1 if the target supports compiling fixed-point,
2006 proc check_effective_target_fixed_point { } {
2007 return [check_no_compiler_messages fixed_point object {
2008 _Sat _Fract x; _Sat _Accum y;
2012 # Return 1 if the target supports compiling decimal floating point,
2015 proc check_effective_target_dfp_nocache { } {
2016 verbose "check_effective_target_dfp_nocache: compiling source" 2
2017 set ret [check_no_compiler_messages_nocache dfp object {
2018 float x __attribute__((mode(DD)));
2020 verbose "check_effective_target_dfp_nocache: returning $ret" 2
2024 proc check_effective_target_dfprt_nocache { } {
2025 return [check_runtime_nocache dfprt {
2026 typedef float d64 __attribute__((mode(DD)));
2027 d64 x = 1.2df, y = 2.3dd, z;
2028 int main () { z = x + y; return 0; }
2032 # Return 1 if the target supports compiling Decimal Floating Point,
2035 # This won't change
for different subtargets so
cache the result.
2037 proc check_effective_target_dfp
{ } {
2038 return [check_cached_effective_target dfp
{
2039 check_effective_target_dfp_nocache
2043 #
Return 1 if the target supports linking and executing Decimal Floating
2044 # Point
, 0 otherwise.
2046 # This won
't change for different subtargets so cache the result.
2048 proc check_effective_target_dfprt { } {
2049 return [check_cached_effective_target dfprt {
2050 check_effective_target_dfprt_nocache
2054 # Return 1 if the target supports executing DFP hardware instructions,
2055 # 0 otherwise. Cache the result.
2057 proc check_dfp_hw_available { } {
2058 return [check_cached_effective_target dfp_hw_available {
2059 # For now, disable on Darwin
2060 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2063 check_runtime_nocache dfp_hw_available {
2064 volatile _Decimal64 r;
2065 volatile _Decimal64 a = 4.0DD;
2066 volatile _Decimal64 b = 2.0DD;
2069 asm volatile ("dadd %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2070 asm volatile ("dsub %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2071 asm volatile ("dmul %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2072 asm volatile ("ddiv %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2075 } "-mcpu=power6 -mhard-float"
2080 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2082 proc check_effective_target_ucn_nocache { } {
2083 # -std=c99 is only valid for C
2084 if [check_effective_target_c] {
2085 set ucnopts "-std=c99"
2089 verbose "check_effective_target_ucn_nocache: compiling source" 2
2090 set ret [check_no_compiler_messages_nocache ucn object {
2093 verbose "check_effective_target_ucn_nocache: returning $ret" 2
2097 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2099 # This won't change
for different subtargets
, so
cache the result.
2101 proc check_effective_target_ucn
{ } {
2102 return [check_cached_effective_target ucn
{
2103 check_effective_target_ucn_nocache
2107 #
Return 1 if the target needs a command line
argument to enable a SIMD
2110 proc check_effective_target_vect_cmdline_needed
{ } {
2111 global et_vect_cmdline_needed_saved
2112 global et_vect_cmdline_needed_target_name
2114 if { ![info exists et_vect_cmdline_needed_target_name
] } {
2115 set et_vect_cmdline_needed_target_name
""
2118 #
If the target has changed since we
set the cached value
, clear it.
2119 set current_target
[current_target_name
]
2120 if { $current_target
!= $et_vect_cmdline_needed_target_name
} {
2121 verbose
"check_effective_target_vect_cmdline_needed: `$et_vect_cmdline_needed_target_name' `$current_target'" 2
2122 set et_vect_cmdline_needed_target_name $current_target
2123 if { [info exists et_vect_cmdline_needed_saved
] } {
2124 verbose
"check_effective_target_vect_cmdline_needed: removing cached result" 2
2125 unset et_vect_cmdline_needed_saved
2129 if [info exists et_vect_cmdline_needed_saved
] {
2130 verbose
"check_effective_target_vect_cmdline_needed: using cached result" 2
2132 set et_vect_cmdline_needed_saved
1
2133 if { [istarget alpha
*-*-*]
2134 ||
[istarget ia64
-*-*]
2135 ||
(([istarget x86_64
-*-*] ||
[istarget i?
86-*-*])
2136 && ([check_effective_target_x32
]
2137 ||
[check_effective_target_lp64
]))
2138 ||
([istarget powerpc
*-*-*]
2139 && ([check_effective_target_powerpc_spe
]
2140 ||
[check_effective_target_powerpc_altivec
]))
2141 ||
([istarget sparc
*-*-*] && [check_effective_target_sparc_vis
])
2142 ||
[istarget spu
-*-*]
2143 ||
([istarget arm
*-*-*] && [check_effective_target_arm_neon
])
2144 ||
[istarget aarch64
*-*-*] } {
2145 set et_vect_cmdline_needed_saved
0
2149 verbose
"check_effective_target_vect_cmdline_needed: returning $et_vect_cmdline_needed_saved" 2
2150 return $et_vect_cmdline_needed_saved
2153 #
Return 1 if the target supports hardware vectors of
int, 0 otherwise.
2155 # This won
't change for different subtargets so cache the result.
2157 proc check_effective_target_vect_int { } {
2158 global et_vect_int_saved
2160 if [info exists et_vect_int_saved] {
2161 verbose "check_effective_target_vect_int: using cached result" 2
2163 set et_vect_int_saved 0
2164 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2165 || ([istarget powerpc*-*-*]
2166 && ![istarget powerpc-*-linux*paired*])
2167 || [istarget spu-*-*]
2168 || [istarget sparc*-*-*]
2169 || [istarget alpha*-*-*]
2170 || [istarget ia64-*-*]
2171 || [istarget aarch64*-*-*]
2172 || [check_effective_target_arm32]
2173 || ([istarget mips*-*-*]
2174 && [check_effective_target_mips_loongson]) } {
2175 set et_vect_int_saved 1
2179 verbose "check_effective_target_vect_int: returning $et_vect_int_saved" 2
2180 return $et_vect_int_saved
2183 # Return 1 if the target supports signed int->float conversion
2186 proc check_effective_target_vect_intfloat_cvt { } {
2187 global et_vect_intfloat_cvt_saved
2189 if [info exists et_vect_intfloat_cvt_saved] {
2190 verbose "check_effective_target_vect_intfloat_cvt: using cached result" 2
2192 set et_vect_intfloat_cvt_saved 0
2193 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2194 || ([istarget powerpc*-*-*]
2195 && ![istarget powerpc-*-linux*paired*])
2196 || ([istarget arm*-*-*]
2197 && [check_effective_target_arm_neon_ok])} {
2198 set et_vect_intfloat_cvt_saved 1
2202 verbose "check_effective_target_vect_intfloat_cvt: returning $et_vect_intfloat_cvt_saved" 2
2203 return $et_vect_intfloat_cvt_saved
2206 #Return 1 if we're supporting __int128
for target
, 0 otherwise.
2208 proc check_effective_target_int128
{ } {
2209 return [check_no_compiler_messages int128 object
{
2211 #ifndef __SIZEOF_INT128__
2220 #
Return 1 if the target supports unsigned
int->float conversion
2223 proc check_effective_target_vect_uintfloat_cvt
{ } {
2224 global et_vect_uintfloat_cvt_saved
2226 if [info exists et_vect_uintfloat_cvt_saved
] {
2227 verbose
"check_effective_target_vect_uintfloat_cvt: using cached result" 2
2229 set et_vect_uintfloat_cvt_saved
0
2230 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
2231 ||
([istarget powerpc
*-*-*]
2232 && ![istarget powerpc
-*-linux
*paired
*])
2233 ||
[istarget aarch64
*-*-*]
2234 ||
([istarget arm
*-*-*]
2235 && [check_effective_target_arm_neon_ok
])} {
2236 set et_vect_uintfloat_cvt_saved
1
2240 verbose
"check_effective_target_vect_uintfloat_cvt: returning $et_vect_uintfloat_cvt_saved" 2
2241 return $et_vect_uintfloat_cvt_saved
2245 #
Return 1 if the target supports signed float
->int conversion
2248 proc check_effective_target_vect_floatint_cvt
{ } {
2249 global et_vect_floatint_cvt_saved
2251 if [info exists et_vect_floatint_cvt_saved
] {
2252 verbose
"check_effective_target_vect_floatint_cvt: using cached result" 2
2254 set et_vect_floatint_cvt_saved
0
2255 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
2256 ||
([istarget powerpc
*-*-*]
2257 && ![istarget powerpc
-*-linux
*paired
*])
2258 ||
([istarget arm
*-*-*]
2259 && [check_effective_target_arm_neon_ok
])} {
2260 set et_vect_floatint_cvt_saved
1
2264 verbose
"check_effective_target_vect_floatint_cvt: returning $et_vect_floatint_cvt_saved" 2
2265 return $et_vect_floatint_cvt_saved
2268 #
Return 1 if the target supports unsigned float
->int conversion
2271 proc check_effective_target_vect_floatuint_cvt
{ } {
2272 global et_vect_floatuint_cvt_saved
2274 if [info exists et_vect_floatuint_cvt_saved
] {
2275 verbose
"check_effective_target_vect_floatuint_cvt: using cached result" 2
2277 set et_vect_floatuint_cvt_saved
0
2278 if { ([istarget powerpc
*-*-*]
2279 && ![istarget powerpc
-*-linux
*paired
*])
2280 ||
([istarget arm
*-*-*]
2281 && [check_effective_target_arm_neon_ok
])} {
2282 set et_vect_floatuint_cvt_saved
1
2286 verbose
"check_effective_target_vect_floatuint_cvt: returning $et_vect_floatuint_cvt_saved" 2
2287 return $et_vect_floatuint_cvt_saved
2290 #
Return 1 if the target supports #pragma omp declare simd
, 0 otherwise.
2292 # This won
't change for different subtargets so cache the result.
2294 proc check_effective_target_vect_simd_clones { } {
2295 global et_vect_simd_clones_saved
2297 if [info exists et_vect_simd_clones_saved] {
2298 verbose "check_effective_target_vect_simd_clones: using cached result" 2
2300 set et_vect_simd_clones_saved 0
2301 if { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
2302 # On i?86/x86_64 #pragma omp declare simd builds a sse2, avx and
2303 # avx2 clone. Only the right clone for the specified arch will be
2304 # chosen, but still we need to at least be able to assemble
2306 if { [check_effective_target_avx2] } {
2307 set et_vect_simd_clones_saved 1
2312 verbose "check_effective_target_vect_simd_clones: returning $et_vect_simd_clones_saved" 2
2313 return $et_vect_simd_clones_saved
2316 # Return 1 if this is a AArch64 target supporting big endian
2317 proc check_effective_target_aarch64_big_endian { } {
2318 return [check_no_compiler_messages aarch64_big_endian assembly {
2319 #if !defined(__aarch64__) || !defined(__AARCH64EB__)
2320 #error !__aarch64__ || !__AARCH64EB__
2325 # Return 1 if this is a AArch64 target supporting little endian
2326 proc check_effective_target_aarch64_little_endian { } {
2327 return [check_no_compiler_messages aarch64_little_endian assembly {
2328 #if !defined(__aarch64__) || defined(__AARCH64EB__)
2334 # Return 1 if this is an arm target using 32-bit instructions
2335 proc check_effective_target_arm32 { } {
2336 return [check_no_compiler_messages arm32 assembly {
2337 #if !defined(__arm__) || (defined(__thumb__) && !defined(__thumb2__))
2338 #error !__arm || __thumb__ && !__thumb2__
2343 # Return 1 if this is an arm target not using Thumb
2344 proc check_effective_target_arm_nothumb { } {
2345 return [check_no_compiler_messages arm_nothumb assembly {
2346 #if !defined(__arm__) || (defined(__thumb__) || defined(__thumb2__))
2347 #error !__arm__ || __thumb || __thumb2__
2352 # Return 1 if this is a little-endian ARM target
2353 proc check_effective_target_arm_little_endian { } {
2354 return [check_no_compiler_messages arm_little_endian assembly {
2355 #if !defined(__arm__) || !defined(__ARMEL__)
2356 #error !__arm__ || !__ARMEL__
2361 # Return 1 if this is an ARM target that only supports aligned vector accesses
2362 proc check_effective_target_arm_vect_no_misalign { } {
2363 return [check_no_compiler_messages arm_vect_no_misalign assembly {
2364 #if !defined(__arm__) \
2365 || (defined(__ARM_FEATURE_UNALIGNED) \
2366 && defined(__ARMEL__))
2367 #error !__arm__ || (__ARMEL__ && __ARM_FEATURE_UNALIGNED)
2373 # Return 1 if this is an ARM target supporting -mfpu=vfp
2374 # -mfloat-abi=softfp. Some multilibs may be incompatible with these
2377 proc check_effective_target_arm_vfp_ok { } {
2378 if { [check_effective_target_arm32] } {
2379 return [check_no_compiler_messages arm_vfp_ok object {
2381 } "-mfpu=vfp -mfloat-abi=softfp"]
2387 # Return 1 if this is an ARM target supporting -mfpu=vfp3
2388 # -mfloat-abi=softfp.
2390 proc check_effective_target_arm_vfp3_ok { } {
2391 if { [check_effective_target_arm32] } {
2392 return [check_no_compiler_messages arm_vfp3_ok object {
2394 } "-mfpu=vfp3 -mfloat-abi=softfp"]
2400 # Return 1 if this is an ARM target supporting -mfpu=fp-armv8
2401 # -mfloat-abi=softfp.
2402 proc check_effective_target_arm_v8_vfp_ok {} {
2403 if { [check_effective_target_arm32] } {
2404 return [check_no_compiler_messages arm_v8_vfp_ok object {
2407 __asm__ volatile ("vrinta.f32.f32 s0, s0");
2410 } "-mfpu=fp-armv8 -mfloat-abi=softfp"]
2416 # Return 1 if this is an ARM target supporting -mfpu=vfp
2417 # -mfloat-abi=hard. Some multilibs may be incompatible with these
2420 proc check_effective_target_arm_hard_vfp_ok { } {
2421 if { [check_effective_target_arm32]
2422 && ! [check-flags [list "" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" }]] } {
2423 return [check_no_compiler_messages arm_hard_vfp_ok executable {
2424 int main() { return 0;}
2425 } "-mfpu=vfp -mfloat-abi=hard"]
2431 # Return 1 if this is an ARM target that supports DSP multiply with
2432 # current multilib flags.
2434 proc check_effective_target_arm_dsp { } {
2435 return [check_no_compiler_messages arm_dsp assembly {
2436 #ifndef __ARM_FEATURE_DSP
2443 # Return 1 if this is an ARM target that supports unaligned word/halfword
2444 # load/store instructions.
2446 proc check_effective_target_arm_unaligned { } {
2447 return [check_no_compiler_messages arm_unaligned assembly {
2448 #ifndef __ARM_FEATURE_UNALIGNED
2449 #error no unaligned support
2455 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
2456 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2457 # incompatible with these options. Also set et_arm_crypto_flags to the
2458 # best options to add.
2460 proc check_effective_target_arm_crypto_ok_nocache { } {
2461 global et_arm_crypto_flags
2462 set et_arm_crypto_flags ""
2463 if { [check_effective_target_arm32] } {
2464 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=crypto-neon-fp-armv8" "-mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp"} {
2465 if { [check_no_compiler_messages_nocache arm_crypto_ok object {
2466 #include "arm_neon.h"
2468 foo (uint8x16_t a, uint8x16_t b)
2470 return vaeseq_u8 (a, b);
2473 set et_arm_crypto_flags $flags
2482 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
2484 proc check_effective_target_arm_crypto_ok { } {
2485 return [check_cached_effective_target arm_crypto_ok \
2486 check_effective_target_arm_crypto_ok_nocache]
2489 # Add options for crypto extensions.
2490 proc add_options_for_arm_crypto { flags } {
2491 if { ! [check_effective_target_arm_crypto_ok] } {
2494 global et_arm_crypto_flags
2495 return "$flags $et_arm_crypto_flags"
2498 # Add the options needed for NEON. We need either -mfloat-abi=softfp
2499 # or -mfloat-abi=hard, but if one is already specified by the
2500 # multilib, use it. Similarly, if a -mfpu option already enables
2501 # NEON, do not add -mfpu=neon.
2503 proc add_options_for_arm_neon { flags } {
2504 if { ! [check_effective_target_arm_neon_ok] } {
2507 global et_arm_neon_flags
2508 return "$flags $et_arm_neon_flags"
2511 proc add_options_for_arm_v8_vfp { flags } {
2512 if { ! [check_effective_target_arm_v8_vfp_ok] } {
2515 return "$flags -mfpu=fp-armv8 -mfloat-abi=softfp"
2518 proc add_options_for_arm_v8_neon { flags } {
2519 if { ! [check_effective_target_arm_v8_neon_ok] } {
2522 global et_arm_v8_neon_flags
2523 return "$flags $et_arm_v8_neon_flags -march=armv8-a"
2526 proc add_options_for_arm_crc { flags } {
2527 if { ! [check_effective_target_arm_crc_ok] } {
2530 global et_arm_crc_flags
2531 return "$flags $et_arm_crc_flags"
2534 # Add the options needed for NEON. We need either -mfloat-abi=softfp
2535 # or -mfloat-abi=hard, but if one is already specified by the
2536 # multilib, use it. Similarly, if a -mfpu option already enables
2537 # NEON, do not add -mfpu=neon.
2539 proc add_options_for_arm_neonv2 { flags } {
2540 if { ! [check_effective_target_arm_neonv2_ok] } {
2543 global et_arm_neonv2_flags
2544 return "$flags $et_arm_neonv2_flags"
2547 # Add the options needed for vfp3.
2548 proc add_options_for_arm_vfp3 { flags } {
2549 if { ! [check_effective_target_arm_vfp3_ok] } {
2552 return "$flags -mfpu=vfp3 -mfloat-abi=softfp"
2555 # Return 1 if this is an ARM target supporting -mfpu=neon
2556 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2557 # incompatible with these options. Also set et_arm_neon_flags to the
2558 # best options to add.
2560 proc check_effective_target_arm_neon_ok_nocache { } {
2561 global et_arm_neon_flags
2562 set et_arm_neon_flags ""
2563 if { [check_effective_target_arm32] } {
2564 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon" "-mfpu=neon -mfloat-abi=softfp"} {
2565 if { [check_no_compiler_messages_nocache arm_neon_ok object {
2566 #include "arm_neon.h"
2569 set et_arm_neon_flags $flags
2578 proc check_effective_target_arm_neon_ok { } {
2579 return [check_cached_effective_target arm_neon_ok \
2580 check_effective_target_arm_neon_ok_nocache]
2583 proc check_effective_target_arm_crc_ok_nocache { } {
2584 global et_arm_crc_flags
2585 set et_arm_crc_flags "-march=armv8-a+crc"
2586 return [check_no_compiler_messages_nocache arm_crc_ok object {
2587 #if !defined (__ARM_FEATURE_CRC32)
2590 } "$et_arm_crc_flags"]
2593 proc check_effective_target_arm_crc_ok { } {
2594 return [check_cached_effective_target arm_crc_ok \
2595 check_effective_target_arm_crc_ok_nocache]
2598 # Return 1 if this is an ARM target supporting -mfpu=neon-fp16
2599 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2600 # incompatible with these options. Also set et_arm_neon_flags to the
2601 # best options to add.
2603 proc check_effective_target_arm_neon_fp16_ok_nocache { } {
2604 global et_arm_neon_fp16_flags
2605 set et_arm_neon_fp16_flags ""
2606 if { [check_effective_target_arm32] } {
2607 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
2608 "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
2609 if { [check_no_compiler_messages_nocache arm_neon_fp_16_ok object {
2610 #include "arm_neon.h"
2612 foo (float32x4_t arg)
2614 return vcvt_f16_f32 (arg);
2617 set et_arm_neon_fp16_flags $flags
2626 proc check_effective_target_arm_neon_fp16_ok { } {
2627 return [check_cached_effective_target arm_neon_fp16_ok \
2628 check_effective_target_arm_neon_fp16_ok_nocache]
2631 proc add_options_for_arm_neon_fp16 { flags } {
2632 if { ! [check_effective_target_arm_neon_fp16_ok] } {
2635 global et_arm_neon_fp16_flags
2636 return "$flags $et_arm_neon_fp16_flags"
2639 # Return 1 if this is an ARM target supporting -mfpu=neon-fp-armv8
2640 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2641 # incompatible with these options. Also set et_arm_v8_neon_flags to the
2642 # best options to add.
2644 proc check_effective_target_arm_v8_neon_ok_nocache { } {
2645 global et_arm_v8_neon_flags
2646 set et_arm_v8_neon_flags ""
2647 if { [check_effective_target_arm32] } {
2648 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp-armv8" "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
2649 if { [check_no_compiler_messages_nocache arm_v8_neon_ok object {
2651 #error not armv8 or later
2653 #include "arm_neon.h"
2657 __asm__ volatile ("vrintn.f32 q0, q0");
2659 } "$flags -march=armv8-a"] } {
2660 set et_arm_v8_neon_flags $flags
2669 proc check_effective_target_arm_v8_neon_ok { } {
2670 return [check_cached_effective_target arm_v8_neon_ok \
2671 check_effective_target_arm_v8_neon_ok_nocache]
2674 # Return 1 if this is an ARM target supporting -mfpu=neon-vfpv4
2675 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2676 # incompatible with these options. Also set et_arm_neonv2_flags to the
2677 # best options to add.
2679 proc check_effective_target_arm_neonv2_ok_nocache { } {
2680 global et_arm_neonv2_flags
2681 set et_arm_neonv2_flags ""
2682 if { [check_effective_target_arm32] } {
2683 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-vfpv4" "-mfpu=neon-vfpv4 -mfloat-abi=softfp"} {
2684 if { [check_no_compiler_messages_nocache arm_neonv2_ok object {
2685 #include "arm_neon.h"
2687 foo (float32x2_t a, float32x2_t b, float32x2_t c)
2689 return vfma_f32 (a, b, c);
2692 set et_arm_neonv2_flags $flags
2701 proc check_effective_target_arm_neonv2_ok { } {
2702 return [check_cached_effective_target arm_neonv2_ok \
2703 check_effective_target_arm_neonv2_ok_nocache]
2706 # Add the options needed for NEON. We need either -mfloat-abi=softfp
2707 # or -mfloat-abi=hard, but if one is already specified by the
2710 proc add_options_for_arm_fp16 { flags } {
2711 if { ! [check_effective_target_arm_fp16_ok] } {
2714 global et_arm_fp16_flags
2715 return "$flags $et_arm_fp16_flags"
2718 # Return 1 if this is an ARM target that can support a VFP fp16 variant.
2719 # Skip multilibs that are incompatible with these options and set
2720 # et_arm_fp16_flags to the best options to add.
2722 proc check_effective_target_arm_fp16_ok_nocache { } {
2723 global et_arm_fp16_flags
2724 set et_arm_fp16_flags ""
2725 if { ! [check_effective_target_arm32] } {
2728 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "-mfpu=*fp16*" "-mfpu=*fpv[4-9]*" "-mfpu=*fpv[1-9][0-9]*" } ]] {
2729 # Multilib flags would override -mfpu.
2732 if [check-flags [list "" { *-*-* } { "-mfloat-abi=soft" } { "" } ]] {
2733 # Must generate floating-point instructions.
2736 if [check_effective_target_arm_hf_eabi] {
2737 # Use existing float-abi and force an fpu which supports fp16
2738 set et_arm_fp16_flags "-mfpu=vfpv4"
2741 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "" } ]] {
2742 # The existing -mfpu value is OK; use it, but add softfp.
2743 set et_arm_fp16_flags "-mfloat-abi=softfp"
2746 # Add -mfpu for a VFP fp16 variant since there is no preprocessor
2747 # macro to check for this support.
2748 set flags "-mfpu=vfpv4 -mfloat-abi=softfp"
2749 if { [check_no_compiler_messages_nocache arm_fp16_ok assembly {
2752 set et_arm_fp16_flags "$flags"
2759 proc check_effective_target_arm_fp16_ok { } {
2760 return [check_cached_effective_target arm_fp16_ok \
2761 check_effective_target_arm_fp16_ok_nocache]
2764 # Creates a series of routines that return 1 if the given architecture
2765 # can be selected and a routine to give the flags to select that architecture
2766 # Note: Extra flags may be added to disable options from newer compilers
2767 # (Thumb in particular - but others may be added in the future)
2768 # Usage: /* { dg-require-effective-target arm_arch_v5_ok } */
2769 # /* { dg-add-options arm_arch_v5 } */
2770 # /* { dg-require-effective-target arm_arch_v5_multilib } */
2771 foreach { armfunc armflag armdef } { v4 "-march=armv4 -marm" __ARM_ARCH_4__
2772 v4t "-march=armv4t" __ARM_ARCH_4T__
2773 v5 "-march=armv5 -marm" __ARM_ARCH_5__
2774 v5t "-march=armv5t" __ARM_ARCH_5T__
2775 v5te "-march=armv5te" __ARM_ARCH_5TE__
2776 v6 "-march=armv6" __ARM_ARCH_6__
2777 v6k "-march=armv6k" __ARM_ARCH_6K__
2778 v6t2 "-march=armv6t2" __ARM_ARCH_6T2__
2779 v6z "-march=armv6z" __ARM_ARCH_6Z__
2780 v6m "-march=armv6-m -mthumb" __ARM_ARCH_6M__
2781 v7a "-march=armv7-a" __ARM_ARCH_7A__
2782 v7ve "-march=armv7ve" __ARM_ARCH_7A__
2783 v7r "-march=armv7-r" __ARM_ARCH_7R__
2784 v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__
2785 v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__
2786 v8a "-march=armv8-a" __ARM_ARCH_8A__ } {
2787 eval [string map [list FUNC $armfunc FLAG $armflag DEF $armdef ] {
2788 proc check_effective_target_arm_arch_FUNC_ok { } {
2789 if { [ string match "*-marm*" "FLAG" ] &&
2790 ![check_effective_target_arm_arm_ok] } {
2793 return [check_no_compiler_messages arm_arch_FUNC_ok assembly {
2800 proc add_options_for_arm_arch_FUNC { flags } {
2801 return "$flags FLAG"
2804 proc check_effective_target_arm_arch_FUNC_multilib { } {
2805 return [check_runtime arm_arch_FUNC_multilib {
2811 } [add_options_for_arm_arch_FUNC ""]]
2816 # Return 1 if this is an ARM target where -marm causes ARM to be
2819 proc check_effective_target_arm_arm_ok { } {
2820 return [check_no_compiler_messages arm_arm_ok assembly {
2821 #if !defined (__arm__) || defined (__thumb__) || defined (__thumb2__)
2822 #error !__arm__ || __thumb__ || __thumb2__
2828 # Return 1 is this is an ARM target where -mthumb causes Thumb-1 to be
2831 proc check_effective_target_arm_thumb1_ok { } {
2832 return [check_no_compiler_messages arm_thumb1_ok assembly {
2833 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
2834 #error !__arm__ || !__thumb__ || __thumb2__
2836 int foo (int i) { return i; }
2840 # Return 1 is this is an ARM target where -mthumb causes Thumb-2 to be
2843 proc check_effective_target_arm_thumb2_ok { } {
2844 return [check_no_compiler_messages arm_thumb2_ok assembly {
2845 #if !defined(__thumb2__)
2848 int foo (int i) { return i; }
2852 # Return 1 if this is an ARM target where Thumb-1 is used without options
2853 # added by the test.
2855 proc check_effective_target_arm_thumb1 { } {
2856 return [check_no_compiler_messages arm_thumb1 assembly {
2857 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
2858 #error !__arm__ || !__thumb__ || __thumb2__
2864 # Return 1 if this is an ARM target where Thumb-2 is used without options
2865 # added by the test.
2867 proc check_effective_target_arm_thumb2 { } {
2868 return [check_no_compiler_messages arm_thumb2 assembly {
2869 #if !defined(__thumb2__)
2876 # Return 1 if this is an ARM target where conditional execution is available.
2878 proc check_effective_target_arm_cond_exec { } {
2879 return [check_no_compiler_messages arm_cond_exec assembly {
2880 #if defined(__arm__) && defined(__thumb__) && !defined(__thumb2__)
2887 # Return 1 if this is an ARM cortex-M profile cpu
2889 proc check_effective_target_arm_cortex_m { } {
2890 if { ![istarget arm*-*-*] } {
2893 return [check_no_compiler_messages arm_cortex_m assembly {
2894 #if !defined(__ARM_ARCH_7M__) \
2895 && !defined (__ARM_ARCH_7EM__) \
2896 && !defined (__ARM_ARCH_6M__)
2897 #error !__ARM_ARCH_7M__ && !__ARM_ARCH_7EM__ && !__ARM_ARCH_6M__
2903 # Return 1 if the target supports executing NEON instructions, 0
2904 # otherwise. Cache the result.
2906 proc check_effective_target_arm_neon_hw { } {
2907 return [check_runtime arm_neon_hw_available {
2911 long long a = 0, b = 1;
2912 asm ("vorr %P0, %P1, %P2"
2914 : "0" (a), "w" (b));
2917 } [add_options_for_arm_neon ""]]
2920 proc check_effective_target_arm_neonv2_hw { } {
2921 return [check_runtime arm_neon_hwv2_available {
2922 #include "arm_neon.h"
2926 float32x2_t a, b, c;
2927 asm ("vfma.f32 %P0, %P1, %P2"
2929 : "w" (b), "w" (c));
2932 } [add_options_for_arm_neonv2 ""]]
2935 # Return 1 if the target supports executing ARMv8 NEON instructions, 0
2938 proc check_effective_target_arm_v8_neon_hw { } {
2939 return [check_runtime arm_v8_neon_hw_available {
2940 #include "arm_neon.h"
2945 asm ("vrinta.f32 %P0, %P1"
2950 } [add_options_for_arm_v8_neon ""]]
2953 # Return 1 if this is a ARM target with NEON enabled.
2955 proc check_effective_target_arm_neon { } {
2956 if { [check_effective_target_arm32] } {
2957 return [check_no_compiler_messages arm_neon object {
2958 #ifndef __ARM_NEON__
2969 proc check_effective_target_arm_neonv2 { } {
2970 if { [check_effective_target_arm32] } {
2971 return [check_no_compiler_messages arm_neon object {
2972 #ifndef __ARM_NEON__
2975 #ifndef __ARM_FEATURE_FMA
2987 # Return 1 if this a Loongson-2E or -2F target using an ABI that supports
2988 # the Loongson vector modes.
2990 proc check_effective_target_mips_loongson { } {
2991 return [check_no_compiler_messages loongson assembly {
2992 #if !defined(__mips_loongson_vector_rev)
2993 #error !__mips_loongson_vector_rev
2998 # Return 1 if this is an ARM target that adheres to the ABI for the ARM
3001 proc check_effective_target_arm_eabi { } {
3002 return [check_no_compiler_messages arm_eabi object {
3003 #ifndef __ARM_EABI__
3011 # Return 1 if this is an ARM target that adheres to the hard-float variant of
3012 # the ABI for the ARM Architecture (e.g. -mfloat-abi=hard).
3014 proc check_effective_target_arm_hf_eabi { } {
3015 return [check_no_compiler_messages arm_hf_eabi object {
3016 #if !defined(__ARM_EABI__) || !defined(__ARM_PCS_VFP)
3017 #error not hard-float EABI
3024 # Return 1 if this is an ARM target supporting -mcpu=iwmmxt.
3025 # Some multilibs may be incompatible with this option.
3027 proc check_effective_target_arm_iwmmxt_ok { } {
3028 if { [check_effective_target_arm32] } {
3029 return [check_no_compiler_messages arm_iwmmxt_ok object {
3037 # Return true if LDRD/STRD instructions are prefered over LDM/STM instructions
3038 # for an ARM target.
3039 proc check_effective_target_arm_prefer_ldrd_strd { } {
3040 if { ![check_effective_target_arm32] } {
3044 return [check_no_messages_and_pattern arm_prefer_ldrd_strd "strd\tr" assembly {
3045 void foo (int *p) { p[0] = 1; p[1] = 0;}
3049 # Return 1 if this is a PowerPC target supporting -meabi.
3051 proc check_effective_target_powerpc_eabi_ok { } {
3052 if { [istarget powerpc*-*-*] } {
3053 return [check_no_compiler_messages powerpc_eabi_ok object {
3061 # Return 1 if this is a PowerPC target with floating-point registers.
3063 proc check_effective_target_powerpc_fprs { } {
3064 if { [istarget powerpc*-*-*]
3065 || [istarget rs6000-*-*] } {
3066 return [check_no_compiler_messages powerpc_fprs object {
3078 # Return 1 if this is a PowerPC target with hardware double-precision
3081 proc check_effective_target_powerpc_hard_double { } {
3082 if { [istarget powerpc*-*-*]
3083 || [istarget rs6000-*-*] } {
3084 return [check_no_compiler_messages powerpc_hard_double object {
3096 # Return 1 if this is a PowerPC target supporting -maltivec.
3098 proc check_effective_target_powerpc_altivec_ok { } {
3099 if { ([istarget powerpc*-*-*]
3100 && ![istarget powerpc-*-linux*paired*])
3101 || [istarget rs6000-*-*] } {
3102 # AltiVec is not supported on AIX before 5.3.
3103 if { [istarget powerpc*-*-aix4*]
3104 || [istarget powerpc*-*-aix5.1*]
3105 || [istarget powerpc*-*-aix5.2*] } {
3108 return [check_no_compiler_messages powerpc_altivec_ok object {
3116 # Return 1 if this is a PowerPC target supporting -mpower8-vector
3118 proc check_effective_target_powerpc_p8vector_ok { } {
3119 if { ([istarget powerpc*-*-*]
3120 && ![istarget powerpc-*-linux*paired*])
3121 || [istarget rs6000-*-*] } {
3122 # AltiVec is not supported on AIX before 5.3.
3123 if { [istarget powerpc*-*-aix4*]
3124 || [istarget powerpc*-*-aix5.1*]
3125 || [istarget powerpc*-*-aix5.2*] } {
3128 return [check_no_compiler_messages powerpc_p8vector_ok object {
3131 asm volatile ("xxlorc vs0,vs0,vs0");
3133 asm volatile ("xxlorc 0,0,0");
3137 } "-mpower8-vector"]
3143 # Return 1 if this is a PowerPC target supporting -mvsx
3145 proc check_effective_target_powerpc_vsx_ok { } {
3146 if { ([istarget powerpc*-*-*]
3147 && ![istarget powerpc-*-linux*paired*])
3148 || [istarget rs6000-*-*] } {
3149 # VSX is not supported on AIX before 7.1.
3150 if { [istarget powerpc*-*-aix4*]
3151 || [istarget powerpc*-*-aix5*]
3152 || [istarget powerpc*-*-aix6*] } {
3155 return [check_no_compiler_messages powerpc_vsx_ok object {
3158 asm volatile ("xxlor vs0,vs0,vs0");
3160 asm volatile ("xxlor 0,0,0");
3170 # Return 1 if this is a PowerPC target supporting -mhtm
3172 proc check_effective_target_powerpc_htm_ok { } {
3173 if { ([istarget powerpc*-*-*]
3174 && ![istarget powerpc-*-linux*paired*])
3175 || [istarget rs6000-*-*] } {
3176 # HTM is not supported on AIX yet.
3177 if { [istarget powerpc*-*-aix*] } {
3180 return [check_no_compiler_messages powerpc_htm_ok object {
3182 asm volatile ("tbegin. 0");
3191 # Return 1 if this is a PowerPC target supporting -mcpu=cell.
3193 proc check_effective_target_powerpc_ppu_ok { } {
3194 if [check_effective_target_powerpc_altivec_ok] {
3195 return [check_no_compiler_messages cell_asm_available object {
3198 asm volatile ("lvlx v0,v0,v0");
3200 asm volatile ("lvlx 0,0,0");
3210 # Return 1 if this is a PowerPC target that supports SPU.
3212 proc check_effective_target_powerpc_spu { } {
3213 if { [istarget powerpc*-*-linux*] } {
3214 return [check_effective_target_powerpc_altivec_ok]
3220 # Return 1 if this is a PowerPC SPE target. The check includes options
3221 # specified by dg-options for this test, so don't
cache the result.
3223 proc check_effective_target_powerpc_spe_nocache
{ } {
3224 if { [istarget powerpc
*-*-*] } {
3225 return [check_no_compiler_messages_nocache powerpc_spe object
{
3231 } [current_compiler_flags
]]
3237 #
Return 1 if this is a PowerPC target with SPE enabled.
3239 proc check_effective_target_powerpc_spe
{ } {
3240 if { [istarget powerpc
*-*-*] } {
3241 return [check_no_compiler_messages powerpc_spe object
{
3253 #
Return 1 if this is a PowerPC target with Altivec enabled.
3255 proc check_effective_target_powerpc_altivec
{ } {
3256 if { [istarget powerpc
*-*-*] } {
3257 return [check_no_compiler_messages powerpc_altivec object
{
3269 #
Return 1 if this is a PowerPC
405 target. The check includes options
3270 # specified by dg
-options
for this test
, so don
't cache the result.
3272 proc check_effective_target_powerpc_405_nocache { } {
3273 if { [istarget powerpc*-*-*] || [istarget rs6000-*-*] } {
3274 return [check_no_compiler_messages_nocache powerpc_405 object {
3280 } [current_compiler_flags]]
3286 # Return 1 if this is a PowerPC target using the ELFv2 ABI.
3288 proc check_effective_target_powerpc_elfv2 { } {
3289 if { [istarget powerpc*-*-*] } {
3290 return [check_no_compiler_messages powerpc_elfv2 object {
3292 #error not ELF v2 ABI
3302 # Return 1 if this is a SPU target with a toolchain that
3303 # supports automatic overlay generation.
3305 proc check_effective_target_spu_auto_overlay { } {
3306 if { [istarget spu*-*-elf*] } {
3307 return [check_no_compiler_messages spu_auto_overlay executable {
3309 } "-Wl,--auto-overlay" ]
3315 # The VxWorks SPARC simulator accepts only EM_SPARC executables and
3316 # chokes on EM_SPARC32PLUS or EM_SPARCV9 executables. Return 1 if the
3317 # test environment appears to run executables on such a simulator.
3319 proc check_effective_target_ultrasparc_hw { } {
3320 return [check_runtime ultrasparc_hw {
3321 int main() { return 0; }
3322 } "-mcpu=ultrasparc"]
3325 # Return 1 if the test environment supports executing UltraSPARC VIS2
3326 # instructions. We check this by attempting: "bmask %g0, %g0, %g0"
3328 proc check_effective_target_ultrasparc_vis2_hw { } {
3329 return [check_runtime ultrasparc_vis2_hw {
3330 int main() { __asm__(".word 0x81b00320"); return 0; }
3331 } "-mcpu=ultrasparc3"]
3334 # Return 1 if the test environment supports executing UltraSPARC VIS3
3335 # instructions. We check this by attempting: "addxc %g0, %g0, %g0"
3337 proc check_effective_target_ultrasparc_vis3_hw { } {
3338 return [check_runtime ultrasparc_vis3_hw {
3339 int main() { __asm__(".word 0x81b00220"); return 0; }
3343 # Return 1 if this is a SPARC-V9 target.
3345 proc check_effective_target_sparc_v9 { } {
3346 if { [istarget sparc*-*-*] } {
3347 return [check_no_compiler_messages sparc_v9 object {
3349 asm volatile ("return %i7+8");
3358 # Return 1 if this is a SPARC target with VIS enabled.
3360 proc check_effective_target_sparc_vis { } {
3361 if { [istarget sparc*-*-*] } {
3362 return [check_no_compiler_messages sparc_vis object {
3374 # Return 1 if the target supports hardware vector shift operation.
3376 proc check_effective_target_vect_shift { } {
3377 global et_vect_shift_saved
3379 if [info exists et_vect_shift_saved] {
3380 verbose "check_effective_target_vect_shift: using cached result" 2
3382 set et_vect_shift_saved 0
3383 if { ([istarget powerpc*-*-*]
3384 && ![istarget powerpc-*-linux*paired*])
3385 || [istarget ia64-*-*]
3386 || [istarget i?86-*-*] || [istarget x86_64-*-*]
3387 || [istarget aarch64*-*-*]
3388 || [check_effective_target_arm32]
3389 || ([istarget mips*-*-*]
3390 && [check_effective_target_mips_loongson]) } {
3391 set et_vect_shift_saved 1
3395 verbose "check_effective_target_vect_shift: returning $et_vect_shift_saved" 2
3396 return $et_vect_shift_saved
3399 proc check_effective_target_whole_vector_shift { } {
3400 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
3401 || [istarget ia64-*-*]
3402 || [istarget aarch64*-*-*]
3403 || ([check_effective_target_arm32]
3404 && [check_effective_target_arm_little_endian])
3405 || ([istarget mips*-*-*]
3406 && [check_effective_target_mips_loongson]) } {
3412 verbose "check_effective_target_vect_long: returning $answer" 2
3416 # Return 1 if the target supports vector bswap operations.
3418 proc check_effective_target_vect_bswap { } {
3419 global et_vect_bswap_saved
3421 if [info exists et_vect_bswap_saved] {
3422 verbose "check_effective_target_vect_bswap: using cached result" 2
3424 set et_vect_bswap_saved 0
3425 if { [istarget aarch64*-*-*]
3426 || ([istarget arm*-*-*]
3427 && [check_effective_target_arm_neon])
3429 set et_vect_bswap_saved 1
3433 verbose "check_effective_target_vect_bswap: returning $et_vect_bswap_saved" 2
3434 return $et_vect_bswap_saved
3437 # Return 1 if the target supports hardware vector shift operation for char.
3439 proc check_effective_target_vect_shift_char { } {
3440 global et_vect_shift_char_saved
3442 if [info exists et_vect_shift_char_saved] {
3443 verbose "check_effective_target_vect_shift_char: using cached result" 2
3445 set et_vect_shift_char_saved 0
3446 if { ([istarget powerpc*-*-*]
3447 && ![istarget powerpc-*-linux*paired*])
3448 || [check_effective_target_arm32] } {
3449 set et_vect_shift_char_saved 1
3453 verbose "check_effective_target_vect_shift_char: returning $et_vect_shift_char_saved" 2
3454 return $et_vect_shift_char_saved
3457 # Return 1 if the target supports hardware vectors of long, 0 otherwise.
3459 # This can change for different subtargets so do not cache the result.
3461 proc check_effective_target_vect_long { } {
3462 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
3463 || (([istarget powerpc*-*-*]
3464 && ![istarget powerpc-*-linux*paired*])
3465 && [check_effective_target_ilp32])
3466 || [check_effective_target_arm32]
3467 || ([istarget sparc*-*-*] && [check_effective_target_ilp32]) } {
3473 verbose "check_effective_target_vect_long: returning $answer" 2
3477 # Return 1 if the target supports hardware vectors of float, 0 otherwise.
3479 # This won't change
for different subtargets so
cache the result.
3481 proc check_effective_target_vect_float
{ } {
3482 global et_vect_float_saved
3484 if [info exists et_vect_float_saved
] {
3485 verbose
"check_effective_target_vect_float: using cached result" 2
3487 set et_vect_float_saved
0
3488 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
3489 ||
[istarget powerpc
*-*-*]
3490 ||
[istarget spu
-*-*]
3491 ||
[istarget mips
-sde
-elf
]
3492 ||
[istarget mipsisa64
*-*-*]
3493 ||
[istarget ia64
-*-*]
3494 ||
[istarget aarch64
*-*-*]
3495 ||
[check_effective_target_arm32
] } {
3496 set et_vect_float_saved
1
3500 verbose
"check_effective_target_vect_float: returning $et_vect_float_saved" 2
3501 return $et_vect_float_saved
3504 #
Return 1 if the target supports hardware vectors of double
, 0 otherwise.
3506 # This won
't change for different subtargets so cache the result.
3508 proc check_effective_target_vect_double { } {
3509 global et_vect_double_saved
3511 if [info exists et_vect_double_saved] {
3512 verbose "check_effective_target_vect_double: using cached result" 2
3514 set et_vect_double_saved 0
3515 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
3516 || [istarget aarch64*-*-*] } {
3517 if { [check_no_compiler_messages vect_double assembly {
3518 #ifdef __tune_atom__
3519 # error No double vectorizer support.
3522 set et_vect_double_saved 1
3524 set et_vect_double_saved 0
3526 } elseif { [istarget spu-*-*] } {
3527 set et_vect_double_saved 1
3531 verbose "check_effective_target_vect_double: returning $et_vect_double_saved" 2
3532 return $et_vect_double_saved
3535 # Return 1 if the target supports hardware vectors of long long, 0 otherwise.
3537 # This won't change
for different subtargets so
cache the result.
3539 proc check_effective_target_vect_long_long
{ } {
3540 global et_vect_long_long_saved
3542 if [info exists et_vect_long_long_saved
] {
3543 verbose
"check_effective_target_vect_long_long: using cached result" 2
3545 set et_vect_long_long_saved
0
3546 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*] } {
3547 set et_vect_long_long_saved
1
3551 verbose
"check_effective_target_vect_long_long: returning $et_vect_long_long_saved" 2
3552 return $et_vect_long_long_saved
3556 #
Return 1 if the target plus current options does not support a vector
3557 #
max instruction
on "int", 0 otherwise.
3559 # This won
't change for different subtargets so cache the result.
3561 proc check_effective_target_vect_no_int_max { } {
3562 global et_vect_no_int_max_saved
3564 if [info exists et_vect_no_int_max_saved] {
3565 verbose "check_effective_target_vect_no_int_max: using cached result" 2
3567 set et_vect_no_int_max_saved 0
3568 if { [istarget sparc*-*-*]
3569 || [istarget spu-*-*]
3570 || [istarget alpha*-*-*]
3571 || ([istarget mips*-*-*]
3572 && [check_effective_target_mips_loongson]) } {
3573 set et_vect_no_int_max_saved 1
3576 verbose "check_effective_target_vect_no_int_max: returning $et_vect_no_int_max_saved" 2
3577 return $et_vect_no_int_max_saved
3580 # Return 1 if the target plus current options does not support a vector
3581 # add instruction on "int", 0 otherwise.
3583 # This won't change
for different subtargets so
cache the result.
3585 proc check_effective_target_vect_no_int_add
{ } {
3586 global et_vect_no_int_add_saved
3588 if [info exists et_vect_no_int_add_saved
] {
3589 verbose
"check_effective_target_vect_no_int_add: using cached result" 2
3591 set et_vect_no_int_add_saved
0
3592 # Alpha only supports vector add
on V8QI and V4HI.
3593 if { [istarget alpha
*-*-*] } {
3594 set et_vect_no_int_add_saved
1
3597 verbose
"check_effective_target_vect_no_int_add: returning $et_vect_no_int_add_saved" 2
3598 return $et_vect_no_int_add_saved
3601 #
Return 1 if the target plus current options does not support vector
3602 # bitwise instructions
, 0 otherwise.
3604 # This won
't change for different subtargets so cache the result.
3606 proc check_effective_target_vect_no_bitwise { } {
3607 global et_vect_no_bitwise_saved
3609 if [info exists et_vect_no_bitwise_saved] {
3610 verbose "check_effective_target_vect_no_bitwise: using cached result" 2
3612 set et_vect_no_bitwise_saved 0
3614 verbose "check_effective_target_vect_no_bitwise: returning $et_vect_no_bitwise_saved" 2
3615 return $et_vect_no_bitwise_saved
3618 # Return 1 if the target plus current options supports vector permutation,
3621 # This won't change
for different subtargets so
cache the result.
3623 proc check_effective_target_vect_perm
{ } {
3626 if [info exists et_vect_perm_saved
] {
3627 verbose
"check_effective_target_vect_perm: using cached result" 2
3629 set et_vect_perm_saved
0
3630 if { [is
-effective
-target arm_neon_ok
]
3631 ||
[istarget aarch64
*-*-*]
3632 ||
[istarget powerpc
*-*-*]
3633 ||
[istarget spu
-*-*]
3634 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
3635 ||
([istarget mips
*-*-*]
3636 && [check_effective_target_mpaired_single
]) } {
3637 set et_vect_perm_saved
1
3640 verbose
"check_effective_target_vect_perm: returning $et_vect_perm_saved" 2
3641 return $et_vect_perm_saved
3644 #
Return 1 if the target plus current options supports vector permutation
3645 #
on byte
-sized elements
, 0 otherwise.
3647 # This won
't change for different subtargets so cache the result.
3649 proc check_effective_target_vect_perm_byte { } {
3650 global et_vect_perm_byte
3652 if [info exists et_vect_perm_byte_saved] {
3653 verbose "check_effective_target_vect_perm_byte: using cached result" 2
3655 set et_vect_perm_byte_saved 0
3656 if { ([is-effective-target arm_neon_ok]
3657 && [is-effective-target arm_little_endian])
3658 || ([istarget aarch64*-*-*]
3659 && [is-effective-target aarch64_little_endian])
3660 || [istarget powerpc*-*-*]
3661 || [istarget spu-*-*] } {
3662 set et_vect_perm_byte_saved 1
3665 verbose "check_effective_target_vect_perm_byte: returning $et_vect_perm_byte_saved" 2
3666 return $et_vect_perm_byte_saved
3669 # Return 1 if the target plus current options supports vector permutation
3670 # on short-sized elements, 0 otherwise.
3672 # This won't change
for different subtargets so
cache the result.
3674 proc check_effective_target_vect_perm_short
{ } {
3675 global et_vect_perm_short
3677 if [info exists et_vect_perm_short_saved
] {
3678 verbose
"check_effective_target_vect_perm_short: using cached result" 2
3680 set et_vect_perm_short_saved
0
3681 if { ([is
-effective
-target arm_neon_ok
]
3682 && [is
-effective
-target arm_little_endian
])
3683 ||
([istarget aarch64
*-*-*]
3684 && [is
-effective
-target aarch64_little_endian
])
3685 ||
[istarget powerpc
*-*-*]
3686 ||
[istarget spu
-*-*] } {
3687 set et_vect_perm_short_saved
1
3690 verbose
"check_effective_target_vect_perm_short: returning $et_vect_perm_short_saved" 2
3691 return $et_vect_perm_short_saved
3694 #
Return 1 if the target plus current options supports a vector
3695 # widening summation of
*short
* args into
*int* result
, 0 otherwise.
3697 # This won
't change for different subtargets so cache the result.
3699 proc check_effective_target_vect_widen_sum_hi_to_si_pattern { } {
3700 global et_vect_widen_sum_hi_to_si_pattern
3702 if [info exists et_vect_widen_sum_hi_to_si_pattern_saved] {
3703 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern: using cached result" 2
3705 set et_vect_widen_sum_hi_to_si_pattern_saved 0
3706 if { [istarget powerpc*-*-*]
3707 || [istarget ia64-*-*] } {
3708 set et_vect_widen_sum_hi_to_si_pattern_saved 1
3711 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern: returning $et_vect_widen_sum_hi_to_si_pattern_saved" 2
3712 return $et_vect_widen_sum_hi_to_si_pattern_saved
3715 # Return 1 if the target plus current options supports a vector
3716 # widening summation of *short* args into *int* result, 0 otherwise.
3717 # A target can also support this widening summation if it can support
3718 # promotion (unpacking) from shorts to ints.
3720 # This won't change
for different subtargets so
cache the result.
3722 proc check_effective_target_vect_widen_sum_hi_to_si
{ } {
3723 global et_vect_widen_sum_hi_to_si
3725 if [info exists et_vect_widen_sum_hi_to_si_saved
] {
3726 verbose
"check_effective_target_vect_widen_sum_hi_to_si: using cached result" 2
3728 set et_vect_widen_sum_hi_to_si_saved
[check_effective_target_vect_unpack
]
3729 if { [istarget powerpc
*-*-*]
3730 ||
[istarget ia64
-*-*] } {
3731 set et_vect_widen_sum_hi_to_si_saved
1
3734 verbose
"check_effective_target_vect_widen_sum_hi_to_si: returning $et_vect_widen_sum_hi_to_si_saved" 2
3735 return $et_vect_widen_sum_hi_to_si_saved
3738 #
Return 1 if the target plus current options supports a vector
3739 # widening summation of
*char
* args into
*short
* result
, 0 otherwise.
3740 # A target can also support this widening summation
if it can support
3741 # promotion
(unpacking
) from chars to shorts.
3743 # This won
't change for different subtargets so cache the result.
3745 proc check_effective_target_vect_widen_sum_qi_to_hi { } {
3746 global et_vect_widen_sum_qi_to_hi
3748 if [info exists et_vect_widen_sum_qi_to_hi_saved] {
3749 verbose "check_effective_target_vect_widen_sum_qi_to_hi: using cached result" 2
3751 set et_vect_widen_sum_qi_to_hi_saved 0
3752 if { [check_effective_target_vect_unpack]
3753 || [check_effective_target_arm_neon_ok]
3754 || [istarget ia64-*-*] } {
3755 set et_vect_widen_sum_qi_to_hi_saved 1
3758 verbose "check_effective_target_vect_widen_sum_qi_to_hi: returning $et_vect_widen_sum_qi_to_hi_saved" 2
3759 return $et_vect_widen_sum_qi_to_hi_saved
3762 # Return 1 if the target plus current options supports a vector
3763 # widening summation of *char* args into *int* result, 0 otherwise.
3765 # This won't change
for different subtargets so
cache the result.
3767 proc check_effective_target_vect_widen_sum_qi_to_si
{ } {
3768 global et_vect_widen_sum_qi_to_si
3770 if [info exists et_vect_widen_sum_qi_to_si_saved
] {
3771 verbose
"check_effective_target_vect_widen_sum_qi_to_si: using cached result" 2
3773 set et_vect_widen_sum_qi_to_si_saved
0
3774 if { [istarget powerpc
*-*-*] } {
3775 set et_vect_widen_sum_qi_to_si_saved
1
3778 verbose
"check_effective_target_vect_widen_sum_qi_to_si: returning $et_vect_widen_sum_qi_to_si_saved" 2
3779 return $et_vect_widen_sum_qi_to_si_saved
3782 #
Return 1 if the target plus current options supports a vector
3783 # widening multiplication of
*char
* args into
*short
* result
, 0 otherwise.
3784 # A target can also support this widening multplication
if it can support
3785 # promotion
(unpacking
) from chars to shorts
, and vect_short_mult
(non
-widening
3786 # multiplication of shorts
).
3788 # This won
't change for different subtargets so cache the result.
3791 proc check_effective_target_vect_widen_mult_qi_to_hi { } {
3792 global et_vect_widen_mult_qi_to_hi
3794 if [info exists et_vect_widen_mult_qi_to_hi_saved] {
3795 verbose "check_effective_target_vect_widen_mult_qi_to_hi: using cached result" 2
3797 if { [check_effective_target_vect_unpack]
3798 && [check_effective_target_vect_short_mult] } {
3799 set et_vect_widen_mult_qi_to_hi_saved 1
3801 set et_vect_widen_mult_qi_to_hi_saved 0
3803 if { [istarget powerpc*-*-*]
3804 || [istarget aarch64*-*-*]
3805 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
3806 set et_vect_widen_mult_qi_to_hi_saved 1
3809 verbose "check_effective_target_vect_widen_mult_qi_to_hi: returning $et_vect_widen_mult_qi_to_hi_saved" 2
3810 return $et_vect_widen_mult_qi_to_hi_saved
3813 # Return 1 if the target plus current options supports a vector
3814 # widening multiplication of *short* args into *int* result, 0 otherwise.
3815 # A target can also support this widening multplication if it can support
3816 # promotion (unpacking) from shorts to ints, and vect_int_mult (non-widening
3817 # multiplication of ints).
3819 # This won't change
for different subtargets so
cache the result.
3822 proc check_effective_target_vect_widen_mult_hi_to_si
{ } {
3823 global et_vect_widen_mult_hi_to_si
3825 if [info exists et_vect_widen_mult_hi_to_si_saved
] {
3826 verbose
"check_effective_target_vect_widen_mult_hi_to_si: using cached result" 2
3828 if { [check_effective_target_vect_unpack
]
3829 && [check_effective_target_vect_int_mult
] } {
3830 set et_vect_widen_mult_hi_to_si_saved
1
3832 set et_vect_widen_mult_hi_to_si_saved
0
3834 if { [istarget powerpc
*-*-*]
3835 ||
[istarget spu
-*-*]
3836 ||
[istarget ia64
-*-*]
3837 ||
[istarget aarch64
*-*-*]
3838 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
3839 ||
([istarget arm
*-*-*] && [check_effective_target_arm_neon_ok
]) } {
3840 set et_vect_widen_mult_hi_to_si_saved
1
3843 verbose
"check_effective_target_vect_widen_mult_hi_to_si: returning $et_vect_widen_mult_hi_to_si_saved" 2
3844 return $et_vect_widen_mult_hi_to_si_saved
3847 #
Return 1 if the target plus current options supports a vector
3848 # widening multiplication of
*char
* args into
*short
* result
, 0 otherwise.
3850 # This won
't change for different subtargets so cache the result.
3852 proc check_effective_target_vect_widen_mult_qi_to_hi_pattern { } {
3853 global et_vect_widen_mult_qi_to_hi_pattern
3855 if [info exists et_vect_widen_mult_qi_to_hi_pattern_saved] {
3856 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern: using cached result" 2
3858 set et_vect_widen_mult_qi_to_hi_pattern_saved 0
3859 if { [istarget powerpc*-*-*]
3860 || ([istarget arm*-*-*]
3861 && [check_effective_target_arm_neon_ok]
3862 && [check_effective_target_arm_little_endian]) } {
3863 set et_vect_widen_mult_qi_to_hi_pattern_saved 1
3866 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern: returning $et_vect_widen_mult_qi_to_hi_pattern_saved" 2
3867 return $et_vect_widen_mult_qi_to_hi_pattern_saved
3870 # Return 1 if the target plus current options supports a vector
3871 # widening multiplication of *short* args into *int* result, 0 otherwise.
3873 # This won't change
for different subtargets so
cache the result.
3875 proc check_effective_target_vect_widen_mult_hi_to_si_pattern
{ } {
3876 global et_vect_widen_mult_hi_to_si_pattern
3878 if [info exists et_vect_widen_mult_hi_to_si_pattern_saved
] {
3879 verbose
"check_effective_target_vect_widen_mult_hi_to_si_pattern: using cached result" 2
3881 set et_vect_widen_mult_hi_to_si_pattern_saved
0
3882 if { [istarget powerpc
*-*-*]
3883 ||
[istarget spu
-*-*]
3884 ||
[istarget ia64
-*-*]
3885 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
3886 ||
([istarget arm
*-*-*]
3887 && [check_effective_target_arm_neon_ok
]
3888 && [check_effective_target_arm_little_endian
]) } {
3889 set et_vect_widen_mult_hi_to_si_pattern_saved
1
3892 verbose
"check_effective_target_vect_widen_mult_hi_to_si_pattern: returning $et_vect_widen_mult_hi_to_si_pattern_saved" 2
3893 return $et_vect_widen_mult_hi_to_si_pattern_saved
3896 #
Return 1 if the target plus current options supports a vector
3897 # widening multiplication of
*int* args into
*long
* result
, 0 otherwise.
3899 # This won
't change for different subtargets so cache the result.
3901 proc check_effective_target_vect_widen_mult_si_to_di_pattern { } {
3902 global et_vect_widen_mult_si_to_di_pattern
3904 if [info exists et_vect_widen_mult_si_to_di_pattern_saved] {
3905 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern: using cached result" 2
3907 set et_vect_widen_mult_si_to_di_pattern_saved 0
3908 if {[istarget ia64-*-*]
3909 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
3910 set et_vect_widen_mult_si_to_di_pattern_saved 1
3913 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern: returning $et_vect_widen_mult_si_to_di_pattern_saved" 2
3914 return $et_vect_widen_mult_si_to_di_pattern_saved
3917 # Return 1 if the target plus current options supports a vector
3918 # widening shift, 0 otherwise.
3920 # This won't change
for different subtargets so
cache the result.
3922 proc check_effective_target_vect_widen_shift
{ } {
3923 global et_vect_widen_shift_saved
3925 if [info exists et_vect_shift_saved
] {
3926 verbose
"check_effective_target_vect_widen_shift: using cached result" 2
3928 set et_vect_widen_shift_saved
0
3929 if { ([istarget arm
*-*-*] && [check_effective_target_arm_neon_ok
]) } {
3930 set et_vect_widen_shift_saved
1
3933 verbose
"check_effective_target_vect_widen_shift: returning $et_vect_widen_shift_saved" 2
3934 return $et_vect_widen_shift_saved
3937 #
Return 1 if the target plus current options supports a vector
3938 # dot
-product of signed chars
, 0 otherwise.
3940 # This won
't change for different subtargets so cache the result.
3942 proc check_effective_target_vect_sdot_qi { } {
3943 global et_vect_sdot_qi
3945 if [info exists et_vect_sdot_qi_saved] {
3946 verbose "check_effective_target_vect_sdot_qi: using cached result" 2
3948 set et_vect_sdot_qi_saved 0
3949 if { [istarget ia64-*-*] } {
3950 set et_vect_udot_qi_saved 1
3953 verbose "check_effective_target_vect_sdot_qi: returning $et_vect_sdot_qi_saved" 2
3954 return $et_vect_sdot_qi_saved
3957 # Return 1 if the target plus current options supports a vector
3958 # dot-product of unsigned chars, 0 otherwise.
3960 # This won't change
for different subtargets so
cache the result.
3962 proc check_effective_target_vect_udot_qi
{ } {
3963 global et_vect_udot_qi
3965 if [info exists et_vect_udot_qi_saved
] {
3966 verbose
"check_effective_target_vect_udot_qi: using cached result" 2
3968 set et_vect_udot_qi_saved
0
3969 if { [istarget powerpc
*-*-*]
3970 ||
[istarget ia64
-*-*] } {
3971 set et_vect_udot_qi_saved
1
3974 verbose
"check_effective_target_vect_udot_qi: returning $et_vect_udot_qi_saved" 2
3975 return $et_vect_udot_qi_saved
3978 #
Return 1 if the target plus current options supports a vector
3979 # dot
-product of signed shorts
, 0 otherwise.
3981 # This won
't change for different subtargets so cache the result.
3983 proc check_effective_target_vect_sdot_hi { } {
3984 global et_vect_sdot_hi
3986 if [info exists et_vect_sdot_hi_saved] {
3987 verbose "check_effective_target_vect_sdot_hi: using cached result" 2
3989 set et_vect_sdot_hi_saved 0
3990 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
3991 || [istarget ia64-*-*]
3992 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
3993 set et_vect_sdot_hi_saved 1
3996 verbose "check_effective_target_vect_sdot_hi: returning $et_vect_sdot_hi_saved" 2
3997 return $et_vect_sdot_hi_saved
4000 # Return 1 if the target plus current options supports a vector
4001 # dot-product of unsigned shorts, 0 otherwise.
4003 # This won't change
for different subtargets so
cache the result.
4005 proc check_effective_target_vect_udot_hi
{ } {
4006 global et_vect_udot_hi
4008 if [info exists et_vect_udot_hi_saved
] {
4009 verbose
"check_effective_target_vect_udot_hi: using cached result" 2
4011 set et_vect_udot_hi_saved
0
4012 if { ([istarget powerpc
*-*-*] && ![istarget powerpc
-*-linux
*paired
*]) } {
4013 set et_vect_udot_hi_saved
1
4016 verbose
"check_effective_target_vect_udot_hi: returning $et_vect_udot_hi_saved" 2
4017 return $et_vect_udot_hi_saved
4020 #
Return 1 if the target plus current options supports a vector
4021 # sad operation of unsigned chars
, 0 otherwise.
4023 # This won
't change for different subtargets so cache the result.
4025 proc check_effective_target_vect_usad_char { } {
4026 global et_vect_usad_char
4028 if [info exists et_vect_usad_char_saved] {
4029 verbose "check_effective_target_vect_usad_char: using cached result" 2
4031 set et_vect_usad_char_saved 0
4032 if { ([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
4033 set et_vect_usad_char_saved 1
4036 verbose "check_effective_target_vect_usad_char: returning $et_vect_usad_char_saved" 2
4037 return $et_vect_usad_char_saved
4040 # Return 1 if the target plus current options supports a vector
4041 # demotion (packing) of shorts (to chars) and ints (to shorts)
4042 # using modulo arithmetic, 0 otherwise.
4044 # This won't change
for different subtargets so
cache the result.
4046 proc check_effective_target_vect_pack_trunc
{ } {
4047 global et_vect_pack_trunc
4049 if [info exists et_vect_pack_trunc_saved
] {
4050 verbose
"check_effective_target_vect_pack_trunc: using cached result" 2
4052 set et_vect_pack_trunc_saved
0
4053 if { ([istarget powerpc
*-*-*] && ![istarget powerpc
-*-linux
*paired
*])
4054 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
4055 ||
[istarget aarch64
*-*-*]
4056 ||
[istarget spu
-*-*]
4057 ||
([istarget arm
*-*-*] && [check_effective_target_arm_neon_ok
]
4058 && [check_effective_target_arm_little_endian
]) } {
4059 set et_vect_pack_trunc_saved
1
4062 verbose
"check_effective_target_vect_pack_trunc: returning $et_vect_pack_trunc_saved" 2
4063 return $et_vect_pack_trunc_saved
4066 #
Return 1 if the target plus current options supports a vector
4067 # promotion
(unpacking
) of chars
(to shorts
) and shorts
(to ints
), 0 otherwise.
4069 # This won
't change for different subtargets so cache the result.
4071 proc check_effective_target_vect_unpack { } {
4072 global et_vect_unpack
4074 if [info exists et_vect_unpack_saved] {
4075 verbose "check_effective_target_vect_unpack: using cached result" 2
4077 set et_vect_unpack_saved 0
4078 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*paired*])
4079 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4080 || [istarget spu-*-*]
4081 || [istarget ia64-*-*]
4082 || [istarget aarch64*-*-*]
4083 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
4084 && [check_effective_target_arm_little_endian]) } {
4085 set et_vect_unpack_saved 1
4088 verbose "check_effective_target_vect_unpack: returning $et_vect_unpack_saved" 2
4089 return $et_vect_unpack_saved
4092 # Return 1 if the target plus current options does not guarantee
4093 # that its STACK_BOUNDARY is >= the reguired vector alignment.
4095 # This won't change
for different subtargets so
cache the result.
4097 proc check_effective_target_unaligned_stack
{ } {
4098 global et_unaligned_stack_saved
4100 if [info exists et_unaligned_stack_saved
] {
4101 verbose
"check_effective_target_unaligned_stack: using cached result" 2
4103 set et_unaligned_stack_saved
0
4105 verbose
"check_effective_target_unaligned_stack: returning $et_unaligned_stack_saved" 2
4106 return $et_unaligned_stack_saved
4109 #
Return 1 if the target plus current options does not support a vector
4110 # alignment mechanism
, 0 otherwise.
4112 # This won
't change for different subtargets so cache the result.
4114 proc check_effective_target_vect_no_align { } {
4115 global et_vect_no_align_saved
4117 if [info exists et_vect_no_align_saved] {
4118 verbose "check_effective_target_vect_no_align: using cached result" 2
4120 set et_vect_no_align_saved 0
4121 if { [istarget mipsisa64*-*-*]
4122 || [istarget mips-sde-elf]
4123 || [istarget sparc*-*-*]
4124 || [istarget ia64-*-*]
4125 || [check_effective_target_arm_vect_no_misalign]
4126 || ([istarget mips*-*-*]
4127 && [check_effective_target_mips_loongson]) } {
4128 set et_vect_no_align_saved 1
4131 verbose "check_effective_target_vect_no_align: returning $et_vect_no_align_saved" 2
4132 return $et_vect_no_align_saved
4135 # Return 1 if the target supports a vector misalign access, 0 otherwise.
4137 # This won't change
for different subtargets so
cache the result.
4139 proc check_effective_target_vect_hw_misalign
{ } {
4140 global et_vect_hw_misalign_saved
4142 if [info exists et_vect_hw_misalign_saved
] {
4143 verbose
"check_effective_target_vect_hw_misalign: using cached result" 2
4145 set et_vect_hw_misalign_saved
0
4146 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
4147 ||
[istarget aarch64
*-*-*] } {
4148 set et_vect_hw_misalign_saved
1
4151 verbose
"check_effective_target_vect_hw_misalign: returning $et_vect_hw_misalign_saved" 2
4152 return $et_vect_hw_misalign_saved
4156 #
Return 1 if arrays are aligned to the vector alignment
4157 # boundary
, 0 otherwise.
4159 # This won
't change for different subtargets so cache the result.
4161 proc check_effective_target_vect_aligned_arrays { } {
4162 global et_vect_aligned_arrays
4164 if [info exists et_vect_aligned_arrays_saved] {
4165 verbose "check_effective_target_vect_aligned_arrays: using cached result" 2
4167 set et_vect_aligned_arrays_saved 0
4168 if { ([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
4169 if { ([is-effective-target lp64]
4170 && ( ![check_avx_available]
4171 || [check_prefer_avx128])) } {
4172 set et_vect_aligned_arrays_saved 1
4175 if [istarget spu-*-*] {
4176 set et_vect_aligned_arrays_saved 1
4179 verbose "check_effective_target_vect_aligned_arrays: returning $et_vect_aligned_arrays_saved" 2
4180 return $et_vect_aligned_arrays_saved
4183 # Return 1 if types of size 32 bit or less are naturally aligned
4184 # (aligned to their type-size), 0 otherwise.
4186 # This won't change
for different subtargets so
cache the result.
4188 proc check_effective_target_natural_alignment_32
{ } {
4189 global et_natural_alignment_32
4191 if [info exists et_natural_alignment_32_saved
] {
4192 verbose
"check_effective_target_natural_alignment_32: using cached result" 2
4194 # FIXME
: 32bit powerpc
: guaranteed only
if MASK_ALIGN_NATURAL
/POWER.
4195 set et_natural_alignment_32_saved
1
4196 if { ([istarget
*-*-darwin
*] && [is
-effective
-target lp64
]) } {
4197 set et_natural_alignment_32_saved
0
4200 verbose
"check_effective_target_natural_alignment_32: returning $et_natural_alignment_32_saved" 2
4201 return $et_natural_alignment_32_saved
4204 #
Return 1 if types of size
64 bit or less are naturally aligned
(aligned to their
4205 # type
-size
), 0 otherwise.
4207 # This won
't change for different subtargets so cache the result.
4209 proc check_effective_target_natural_alignment_64 { } {
4210 global et_natural_alignment_64
4212 if [info exists et_natural_alignment_64_saved] {
4213 verbose "check_effective_target_natural_alignment_64: using cached result" 2
4215 set et_natural_alignment_64_saved 0
4216 if { ([is-effective-target lp64] && ![istarget *-*-darwin*])
4217 || [istarget spu-*-*] } {
4218 set et_natural_alignment_64_saved 1
4221 verbose "check_effective_target_natural_alignment_64: returning $et_natural_alignment_64_saved" 2
4222 return $et_natural_alignment_64_saved
4225 # Return 1 if all vector types are naturally aligned (aligned to their
4226 # type-size), 0 otherwise.
4228 # This won't change
for different subtargets so
cache the result.
4230 proc check_effective_target_vect_natural_alignment
{ } {
4231 global et_vect_natural_alignment
4233 if [info exists et_vect_natural_alignment_saved
] {
4234 verbose
"check_effective_target_vect_natural_alignment: using cached result" 2
4236 set et_vect_natural_alignment_saved
1
4237 if { [check_effective_target_arm_eabi
]
4238 ||
[istarget nvptx
-*-*] } {
4239 set et_vect_natural_alignment_saved
0
4242 verbose
"check_effective_target_vect_natural_alignment: returning $et_vect_natural_alignment_saved" 2
4243 return $et_vect_natural_alignment_saved
4246 #
Return 1 if vector alignment
(for types of size
32 bit or less
) is reachable
, 0 otherwise.
4248 # This won
't change for different subtargets so cache the result.
4250 proc check_effective_target_vector_alignment_reachable { } {
4251 global et_vector_alignment_reachable
4253 if [info exists et_vector_alignment_reachable_saved] {
4254 verbose "check_effective_target_vector_alignment_reachable: using cached result" 2
4256 if { [check_effective_target_vect_aligned_arrays]
4257 || [check_effective_target_natural_alignment_32] } {
4258 set et_vector_alignment_reachable_saved 1
4260 set et_vector_alignment_reachable_saved 0
4263 verbose "check_effective_target_vector_alignment_reachable: returning $et_vector_alignment_reachable_saved" 2
4264 return $et_vector_alignment_reachable_saved
4267 # Return 1 if vector alignment for 64 bit is reachable, 0 otherwise.
4269 # This won't change
for different subtargets so
cache the result.
4271 proc check_effective_target_vector_alignment_reachable_for_64bit
{ } {
4272 global et_vector_alignment_reachable_for_64bit
4274 if [info exists et_vector_alignment_reachable_for_64bit_saved
] {
4275 verbose
"check_effective_target_vector_alignment_reachable_for_64bit: using cached result" 2
4277 if { [check_effective_target_vect_aligned_arrays
]
4278 ||
[check_effective_target_natural_alignment_64
] } {
4279 set et_vector_alignment_reachable_for_64bit_saved
1
4281 set et_vector_alignment_reachable_for_64bit_saved
0
4284 verbose
"check_effective_target_vector_alignment_reachable_for_64bit: returning $et_vector_alignment_reachable_for_64bit_saved" 2
4285 return $et_vector_alignment_reachable_for_64bit_saved
4288 #
Return 1 if the target only requires element alignment
for vector accesses
4290 proc check_effective_target_vect_element_align
{ } {
4291 global et_vect_element_align
4293 if [info exists et_vect_element_align
] {
4294 verbose
"check_effective_target_vect_element_align: using cached result" 2
4296 set et_vect_element_align
0
4297 if { ([istarget arm
*-*-*]
4298 && ![check_effective_target_arm_vect_no_misalign
])
4299 ||
[check_effective_target_vect_hw_misalign
] } {
4300 set et_vect_element_align
1
4304 verbose
"check_effective_target_vect_element_align: returning $et_vect_element_align" 2
4305 return $et_vect_element_align
4308 #
Return 1 if the target supports vector conditional operations
, 0 otherwise.
4310 proc check_effective_target_vect_condition
{ } {
4311 global et_vect_cond_saved
4313 if [info exists et_vect_cond_saved
] {
4314 verbose
"check_effective_target_vect_cond: using cached result" 2
4316 set et_vect_cond_saved
0
4317 if { [istarget aarch64
*-*-*]
4318 ||
[istarget powerpc
*-*-*]
4319 ||
[istarget ia64
-*-*]
4320 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
4321 ||
[istarget spu
-*-*]
4322 ||
([istarget arm
*-*-*] && [check_effective_target_arm_neon_ok
]) } {
4323 set et_vect_cond_saved
1
4327 verbose
"check_effective_target_vect_cond: returning $et_vect_cond_saved" 2
4328 return $et_vect_cond_saved
4331 #
Return 1 if the target supports vector conditional operations where
4332 # the comparison has different type from the lhs
, 0 otherwise.
4334 proc check_effective_target_vect_cond_mixed
{ } {
4335 global et_vect_cond_mixed_saved
4337 if [info exists et_vect_cond_mixed_saved
] {
4338 verbose
"check_effective_target_vect_cond_mixed: using cached result" 2
4340 set et_vect_cond_mixed_saved
0
4341 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
4342 ||
[istarget powerpc
*-*-*] } {
4343 set et_vect_cond_mixed_saved
1
4347 verbose
"check_effective_target_vect_cond_mixed: returning $et_vect_cond_mixed_saved" 2
4348 return $et_vect_cond_mixed_saved
4351 #
Return 1 if the target supports vector char multiplication
, 0 otherwise.
4353 proc check_effective_target_vect_char_mult
{ } {
4354 global et_vect_char_mult_saved
4356 if [info exists et_vect_char_mult_saved
] {
4357 verbose
"check_effective_target_vect_char_mult: using cached result" 2
4359 set et_vect_char_mult_saved
0
4360 if { [istarget aarch64
*-*-*]
4361 ||
[istarget ia64
-*-*]
4362 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
4363 ||
[check_effective_target_arm32
] } {
4364 set et_vect_char_mult_saved
1
4368 verbose
"check_effective_target_vect_char_mult: returning $et_vect_char_mult_saved" 2
4369 return $et_vect_char_mult_saved
4372 #
Return 1 if the target supports vector short multiplication
, 0 otherwise.
4374 proc check_effective_target_vect_short_mult
{ } {
4375 global et_vect_short_mult_saved
4377 if [info exists et_vect_short_mult_saved
] {
4378 verbose
"check_effective_target_vect_short_mult: using cached result" 2
4380 set et_vect_short_mult_saved
0
4381 if { [istarget ia64
-*-*]
4382 ||
[istarget spu
-*-*]
4383 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
4384 ||
[istarget powerpc
*-*-*]
4385 ||
[istarget aarch64
*-*-*]
4386 ||
[check_effective_target_arm32
]
4387 ||
([istarget mips
*-*-*]
4388 && [check_effective_target_mips_loongson
]) } {
4389 set et_vect_short_mult_saved
1
4393 verbose
"check_effective_target_vect_short_mult: returning $et_vect_short_mult_saved" 2
4394 return $et_vect_short_mult_saved
4397 #
Return 1 if the target supports vector
int multiplication
, 0 otherwise.
4399 proc check_effective_target_vect_int_mult
{ } {
4400 global et_vect_int_mult_saved
4402 if [info exists et_vect_int_mult_saved
] {
4403 verbose
"check_effective_target_vect_int_mult: using cached result" 2
4405 set et_vect_int_mult_saved
0
4406 if { ([istarget powerpc
*-*-*] && ![istarget powerpc
-*-linux
*paired
*])
4407 ||
[istarget spu
-*-*]
4408 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
4409 ||
[istarget ia64
-*-*]
4410 ||
[istarget aarch64
*-*-*]
4411 ||
[check_effective_target_arm32
] } {
4412 set et_vect_int_mult_saved
1
4416 verbose
"check_effective_target_vect_int_mult: returning $et_vect_int_mult_saved" 2
4417 return $et_vect_int_mult_saved
4420 #
Return 1 if the target supports vector even
/odd elements extraction
, 0 otherwise.
4422 proc check_effective_target_vect_extract_even_odd
{ } {
4423 global et_vect_extract_even_odd_saved
4425 if [info exists et_vect_extract_even_odd_saved
] {
4426 verbose
"check_effective_target_vect_extract_even_odd: using cached result" 2
4428 set et_vect_extract_even_odd_saved
0
4429 if { [istarget aarch64
*-*-*]
4430 ||
[istarget powerpc
*-*-*]
4431 ||
[is
-effective
-target arm_neon_ok
]
4432 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
4433 ||
[istarget ia64
-*-*]
4434 ||
[istarget spu
-*-*]
4435 ||
([istarget mips
*-*-*]
4436 && [check_effective_target_mpaired_single
]) } {
4437 set et_vect_extract_even_odd_saved
1
4441 verbose
"check_effective_target_vect_extract_even_odd: returning $et_vect_extract_even_odd_saved" 2
4442 return $et_vect_extract_even_odd_saved
4445 #
Return 1 if the target supports vector interleaving
, 0 otherwise.
4447 proc check_effective_target_vect_interleave
{ } {
4448 global et_vect_interleave_saved
4450 if [info exists et_vect_interleave_saved
] {
4451 verbose
"check_effective_target_vect_interleave: using cached result" 2
4453 set et_vect_interleave_saved
0
4454 if { [istarget aarch64
*-*-*]
4455 ||
[istarget powerpc
*-*-*]
4456 ||
[is
-effective
-target arm_neon_ok
]
4457 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
4458 ||
[istarget ia64
-*-*]
4459 ||
[istarget spu
-*-*]
4460 ||
([istarget mips
*-*-*]
4461 && [check_effective_target_mpaired_single
]) } {
4462 set et_vect_interleave_saved
1
4466 verbose
"check_effective_target_vect_interleave: returning $et_vect_interleave_saved" 2
4467 return $et_vect_interleave_saved
4470 foreach N
{2 3 4 8} {
4471 eval
[string map
[list N $N
] {
4472 #
Return 1 if the target supports
2-vector interleaving
4473 proc check_effective_target_vect_stridedN
{ } {
4474 global et_vect_stridedN_saved
4476 if [info exists et_vect_stridedN_saved
] {
4477 verbose
"check_effective_target_vect_stridedN: using cached result" 2
4479 set et_vect_stridedN_saved
0
4481 && [check_effective_target_vect_interleave
]
4482 && [check_effective_target_vect_extract_even_odd
] } {
4483 set et_vect_stridedN_saved
1
4485 if { ([istarget arm
*-*-*]
4486 ||
[istarget aarch64
*-*-*]) && N
>= 2 && N
<= 4 } {
4487 set et_vect_stridedN_saved
1
4491 verbose
"check_effective_target_vect_stridedN: returning $et_vect_stridedN_saved" 2
4492 return $et_vect_stridedN_saved
4497 #
Return 1 if the target supports multiple vector sizes
4499 proc check_effective_target_vect_multiple_sizes
{ } {
4500 global et_vect_multiple_sizes_saved
4502 set et_vect_multiple_sizes_saved
0
4503 if { ([istarget aarch64
*-*-*]
4504 ||
([istarget arm
*-*-*] && [check_effective_target_arm_neon_ok
])) } {
4505 set et_vect_multiple_sizes_saved
1
4507 if { ([istarget x86_64
-*-*] ||
[istarget i?
86-*-*]) } {
4508 if { ([check_avx_available
] && ![check_prefer_avx128
]) } {
4509 set et_vect_multiple_sizes_saved
1
4513 verbose
"check_effective_target_vect_multiple_sizes: returning $et_vect_multiple_sizes_saved" 2
4514 return $et_vect_multiple_sizes_saved
4517 #
Return 1 if the target supports vectors of
64 bits.
4519 proc check_effective_target_vect64
{ } {
4520 global et_vect64_saved
4522 if [info exists et_vect64_saved
] {
4523 verbose
"check_effective_target_vect64: using cached result" 2
4525 set et_vect64_saved
0
4526 if { ([istarget arm
*-*-*]
4527 && [check_effective_target_arm_neon_ok
]
4528 && [check_effective_target_arm_little_endian
]) } {
4529 set et_vect64_saved
1
4533 verbose
"check_effective_target_vect64: returning $et_vect64_saved" 2
4534 return $et_vect64_saved
4537 #
Return 1 if the target supports vector copysignf calls.
4539 proc check_effective_target_vect_call_copysignf
{ } {
4540 global et_vect_call_copysignf_saved
4542 if [info exists et_vect_call_copysignf_saved
] {
4543 verbose
"check_effective_target_vect_call_copysignf: using cached result" 2
4545 set et_vect_call_copysignf_saved
0
4546 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
4547 ||
[istarget powerpc
*-*-*] } {
4548 set et_vect_call_copysignf_saved
1
4552 verbose
"check_effective_target_vect_call_copysignf: returning $et_vect_call_copysignf_saved" 2
4553 return $et_vect_call_copysignf_saved
4556 #
Return 1 if the target supports vector sqrtf calls.
4558 proc check_effective_target_vect_call_sqrtf
{ } {
4559 global et_vect_call_sqrtf_saved
4561 if [info exists et_vect_call_sqrtf_saved
] {
4562 verbose
"check_effective_target_vect_call_sqrtf: using cached result" 2
4564 set et_vect_call_sqrtf_saved
0
4565 if { [istarget aarch64
*-*-*]
4566 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
4567 ||
([istarget powerpc
*-*-*] && [check_vsx_hw_available
]) } {
4568 set et_vect_call_sqrtf_saved
1
4572 verbose
"check_effective_target_vect_call_sqrtf: returning $et_vect_call_sqrtf_saved" 2
4573 return $et_vect_call_sqrtf_saved
4576 #
Return 1 if the target supports vector lrint calls.
4578 proc check_effective_target_vect_call_lrint
{ } {
4579 set et_vect_call_lrint
0
4580 if { ([istarget i?
86-*-*] ||
[istarget x86_64
-*-*])
4581 && [check_effective_target_ilp32
] } {
4582 set et_vect_call_lrint
1
4585 verbose
"check_effective_target_vect_call_lrint: returning $et_vect_call_lrint" 2
4586 return $et_vect_call_lrint
4589 #
Return 1 if the target supports vector btrunc calls.
4591 proc check_effective_target_vect_call_btrunc
{ } {
4592 global et_vect_call_btrunc_saved
4594 if [info exists et_vect_call_btrunc_saved
] {
4595 verbose
"check_effective_target_vect_call_btrunc: using cached result" 2
4597 set et_vect_call_btrunc_saved
0
4598 if { [istarget aarch64
*-*-*] } {
4599 set et_vect_call_btrunc_saved
1
4603 verbose
"check_effective_target_vect_call_btrunc: returning $et_vect_call_btrunc_saved" 2
4604 return $et_vect_call_btrunc_saved
4607 #
Return 1 if the target supports vector btruncf calls.
4609 proc check_effective_target_vect_call_btruncf
{ } {
4610 global et_vect_call_btruncf_saved
4612 if [info exists et_vect_call_btruncf_saved
] {
4613 verbose
"check_effective_target_vect_call_btruncf: using cached result" 2
4615 set et_vect_call_btruncf_saved
0
4616 if { [istarget aarch64
*-*-*] } {
4617 set et_vect_call_btruncf_saved
1
4621 verbose
"check_effective_target_vect_call_btruncf: returning $et_vect_call_btruncf_saved" 2
4622 return $et_vect_call_btruncf_saved
4625 #
Return 1 if the target supports vector ceil calls.
4627 proc check_effective_target_vect_call_ceil
{ } {
4628 global et_vect_call_ceil_saved
4630 if [info exists et_vect_call_ceil_saved
] {
4631 verbose
"check_effective_target_vect_call_ceil: using cached result" 2
4633 set et_vect_call_ceil_saved
0
4634 if { [istarget aarch64
*-*-*] } {
4635 set et_vect_call_ceil_saved
1
4639 verbose
"check_effective_target_vect_call_ceil: returning $et_vect_call_ceil_saved" 2
4640 return $et_vect_call_ceil_saved
4643 #
Return 1 if the target supports vector ceilf calls.
4645 proc check_effective_target_vect_call_ceilf
{ } {
4646 global et_vect_call_ceilf_saved
4648 if [info exists et_vect_call_ceilf_saved
] {
4649 verbose
"check_effective_target_vect_call_ceilf: using cached result" 2
4651 set et_vect_call_ceilf_saved
0
4652 if { [istarget aarch64
*-*-*] } {
4653 set et_vect_call_ceilf_saved
1
4657 verbose
"check_effective_target_vect_call_ceilf: returning $et_vect_call_ceilf_saved" 2
4658 return $et_vect_call_ceilf_saved
4661 #
Return 1 if the target supports vector floor calls.
4663 proc check_effective_target_vect_call_floor
{ } {
4664 global et_vect_call_floor_saved
4666 if [info exists et_vect_call_floor_saved
] {
4667 verbose
"check_effective_target_vect_call_floor: using cached result" 2
4669 set et_vect_call_floor_saved
0
4670 if { [istarget aarch64
*-*-*] } {
4671 set et_vect_call_floor_saved
1
4675 verbose
"check_effective_target_vect_call_floor: returning $et_vect_call_floor_saved" 2
4676 return $et_vect_call_floor_saved
4679 #
Return 1 if the target supports vector floorf calls.
4681 proc check_effective_target_vect_call_floorf
{ } {
4682 global et_vect_call_floorf_saved
4684 if [info exists et_vect_call_floorf_saved
] {
4685 verbose
"check_effective_target_vect_call_floorf: using cached result" 2
4687 set et_vect_call_floorf_saved
0
4688 if { [istarget aarch64
*-*-*] } {
4689 set et_vect_call_floorf_saved
1
4693 verbose
"check_effective_target_vect_call_floorf: returning $et_vect_call_floorf_saved" 2
4694 return $et_vect_call_floorf_saved
4697 #
Return 1 if the target supports vector lceil calls.
4699 proc check_effective_target_vect_call_lceil
{ } {
4700 global et_vect_call_lceil_saved
4702 if [info exists et_vect_call_lceil_saved
] {
4703 verbose
"check_effective_target_vect_call_lceil: using cached result" 2
4705 set et_vect_call_lceil_saved
0
4706 if { [istarget aarch64
*-*-*] } {
4707 set et_vect_call_lceil_saved
1
4711 verbose
"check_effective_target_vect_call_lceil: returning $et_vect_call_lceil_saved" 2
4712 return $et_vect_call_lceil_saved
4715 #
Return 1 if the target supports vector lfloor calls.
4717 proc check_effective_target_vect_call_lfloor
{ } {
4718 global et_vect_call_lfloor_saved
4720 if [info exists et_vect_call_lfloor_saved
] {
4721 verbose
"check_effective_target_vect_call_lfloor: using cached result" 2
4723 set et_vect_call_lfloor_saved
0
4724 if { [istarget aarch64
*-*-*] } {
4725 set et_vect_call_lfloor_saved
1
4729 verbose
"check_effective_target_vect_call_lfloor: returning $et_vect_call_lfloor_saved" 2
4730 return $et_vect_call_lfloor_saved
4733 #
Return 1 if the target supports vector nearbyint calls.
4735 proc check_effective_target_vect_call_nearbyint
{ } {
4736 global et_vect_call_nearbyint_saved
4738 if [info exists et_vect_call_nearbyint_saved
] {
4739 verbose
"check_effective_target_vect_call_nearbyint: using cached result" 2
4741 set et_vect_call_nearbyint_saved
0
4742 if { [istarget aarch64
*-*-*] } {
4743 set et_vect_call_nearbyint_saved
1
4747 verbose
"check_effective_target_vect_call_nearbyint: returning $et_vect_call_nearbyint_saved" 2
4748 return $et_vect_call_nearbyint_saved
4751 #
Return 1 if the target supports vector nearbyintf calls.
4753 proc check_effective_target_vect_call_nearbyintf
{ } {
4754 global et_vect_call_nearbyintf_saved
4756 if [info exists et_vect_call_nearbyintf_saved
] {
4757 verbose
"check_effective_target_vect_call_nearbyintf: using cached result" 2
4759 set et_vect_call_nearbyintf_saved
0
4760 if { [istarget aarch64
*-*-*] } {
4761 set et_vect_call_nearbyintf_saved
1
4765 verbose
"check_effective_target_vect_call_nearbyintf: returning $et_vect_call_nearbyintf_saved" 2
4766 return $et_vect_call_nearbyintf_saved
4769 #
Return 1 if the target supports vector
round calls.
4771 proc check_effective_target_vect_call_round
{ } {
4772 global et_vect_call_round_saved
4774 if [info exists et_vect_call_round_saved
] {
4775 verbose
"check_effective_target_vect_call_round: using cached result" 2
4777 set et_vect_call_round_saved
0
4778 if { [istarget aarch64
*-*-*] } {
4779 set et_vect_call_round_saved
1
4783 verbose
"check_effective_target_vect_call_round: returning $et_vect_call_round_saved" 2
4784 return $et_vect_call_round_saved
4787 #
Return 1 if the target supports vector roundf calls.
4789 proc check_effective_target_vect_call_roundf
{ } {
4790 global et_vect_call_roundf_saved
4792 if [info exists et_vect_call_roundf_saved
] {
4793 verbose
"check_effective_target_vect_call_roundf: using cached result" 2
4795 set et_vect_call_roundf_saved
0
4796 if { [istarget aarch64
*-*-*] } {
4797 set et_vect_call_roundf_saved
1
4801 verbose
"check_effective_target_vect_call_roundf: returning $et_vect_call_roundf_saved" 2
4802 return $et_vect_call_roundf_saved
4805 #
Return 1 if the target supports section
-anchors
4807 proc check_effective_target_section_anchors
{ } {
4808 global et_section_anchors_saved
4810 if [info exists et_section_anchors_saved
] {
4811 verbose
"check_effective_target_section_anchors: using cached result" 2
4813 set et_section_anchors_saved
0
4814 if { [istarget powerpc
*-*-*]
4815 ||
[istarget arm
*-*-*] } {
4816 set et_section_anchors_saved
1
4820 verbose
"check_effective_target_section_anchors: returning $et_section_anchors_saved" 2
4821 return $et_section_anchors_saved
4824 #
Return 1 if the target supports atomic operations
on "int_128" values.
4826 proc check_effective_target_sync_int_128
{ } {
4827 if { ([istarget x86_64
-*-*] ||
[istarget i?
86-*-*])
4828 && ![is
-effective
-target ia32
] } {
4835 #
Return 1 if the target supports atomic operations
on "int_128" values
4836 # and can
execute them.
4838 proc check_effective_target_sync_int_128_runtime
{ } {
4839 if { ([istarget x86_64
-*-*] ||
[istarget i?
86-*-*])
4840 && ![is
-effective
-target ia32
] } {
4841 return [check_cached_effective_target sync_int_128_available
{
4842 check_runtime_nocache sync_int_128_available
{
4846 unsigned
int eax
, ebx
, ecx
, edx
;
4847 if (__get_cpuid
(1, &eax
, &ebx
, &ecx
, &edx
))
4848 return !(ecx
& bit_CMPXCHG16B
);
4858 #
Return 1 if the target supports atomic operations
on "long long".
4860 # Note
: 32bit x86 targets require
-march
=pentium in dg
-options.
4862 proc check_effective_target_sync_long_long
{ } {
4863 if { [istarget x86_64
-*-*] ||
[istarget i?
86-*-*])
4864 ||
[istarget aarch64
*-*-*]
4865 ||
[istarget arm
*-*-*]
4866 ||
[istarget alpha
*-*-*]
4867 ||
([istarget sparc
*-*-*] && [check_effective_target_lp64
]) } {
4874 #
Return 1 if the target supports atomic operations
on "long long"
4875 # and can
execute them.
4877 # Note
: 32bit x86 targets require
-march
=pentium in dg
-options.
4879 proc check_effective_target_sync_long_long_runtime
{ } {
4880 if { [istarget x86_64
-*-*] ||
[istarget i?
86-*-*] } {
4881 return [check_cached_effective_target sync_long_long_available
{
4882 check_runtime_nocache sync_long_long_available
{
4886 unsigned
int eax
, ebx
, ecx
, edx
;
4887 if (__get_cpuid
(1, &eax
, &ebx
, &ecx
, &edx
))
4888 return !(edx
& bit_CMPXCHG8B
);
4893 } elseif
{ [istarget aarch64
*-*-*] } {
4895 } elseif
{ [istarget arm
*-*-linux
-*] } {
4896 return [check_runtime sync_longlong_runtime
{
4902 if (sizeof
(long long
) != 8)
4905 /* Just check
for native
; checking
for kernel fallback is tricky.
*/
4906 asm volatile
("ldrexd r0,r1, [%0]" : : "r" (&l1) : "r0", "r1");
4911 } elseif
{ [istarget alpha
*-*-*] } {
4913 } elseif
{ ([istarget sparc
*-*-*]
4914 && [check_effective_target_lp64
]
4915 && [check_effective_target_ultrasparc_hw
]) } {
4917 } elseif
{ [istarget powerpc
*-*-*] && [check_effective_target_lp64
] } {
4924 #
Return 1 if the target supports byte swap instructions.
4926 proc check_effective_target_bswap
{ } {
4927 global et_bswap_saved
4929 if [info exists et_bswap_saved
] {
4930 verbose
"check_effective_target_bswap: using cached result" 2
4932 set et_bswap_saved
0
4933 if { [istarget aarch64
*-*-*]
4934 ||
[istarget alpha
*-*-*]
4935 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
4936 ||
[istarget m68k
-*-*]
4937 ||
[istarget powerpc
*-*-*]
4938 ||
[istarget rs6000
-*-*]
4939 ||
[istarget s390
*-*-*] } {
4940 set et_bswap_saved
1
4942 if { [istarget arm
*-*-*]
4943 && [check_no_compiler_messages_nocache arm_v6_or_later object
{
4945 #error not armv6 or later
4949 set et_bswap_saved
1
4954 verbose
"check_effective_target_bswap: returning $et_bswap_saved" 2
4955 return $et_bswap_saved
4958 #
Return 1 if the target supports
16-bit byte swap instructions.
4960 proc check_effective_target_bswap16
{ } {
4961 global et_bswap16_saved
4963 if [info exists et_bswap16_saved
] {
4964 verbose
"check_effective_target_bswap16: using cached result" 2
4966 set et_bswap16_saved
0
4967 if { [is
-effective
-target bswap
]
4968 && ![istarget alpha
*-*-*]
4969 && !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
4970 set et_bswap16_saved
1
4974 verbose
"check_effective_target_bswap16: returning $et_bswap16_saved" 2
4975 return $et_bswap16_saved
4978 #
Return 1 if the target supports
32-bit byte swap instructions.
4980 proc check_effective_target_bswap32
{ } {
4981 global et_bswap32_saved
4983 if [info exists et_bswap32_saved
] {
4984 verbose
"check_effective_target_bswap32: using cached result" 2
4986 set et_bswap32_saved
0
4987 if { [is
-effective
-target bswap
] } {
4988 set et_bswap32_saved
1
4992 verbose
"check_effective_target_bswap32: returning $et_bswap32_saved" 2
4993 return $et_bswap32_saved
4996 #
Return 1 if the target supports
64-bit byte swap instructions.
4998 proc check_effective_target_bswap64
{ } {
4999 global et_bswap64_saved
5001 if [info exists et_bswap64_saved
] {
5002 verbose
"check_effective_target_bswap64: using cached result" 2
5004 set et_bswap64_saved
0
5005 if { [is
-effective
-target bswap
]
5006 && [is
-effective
-target lp64
] } {
5007 set et_bswap64_saved
1
5011 verbose
"check_effective_target_bswap64: returning $et_bswap64_saved" 2
5012 return $et_bswap64_saved
5015 #
Return 1 if the target supports atomic operations
on "int" and "long".
5017 proc check_effective_target_sync_int_long
{ } {
5018 global et_sync_int_long_saved
5020 if [info exists et_sync_int_long_saved
] {
5021 verbose
"check_effective_target_sync_int_long: using cached result" 2
5023 set et_sync_int_long_saved
0
5024 # This is intentionally powerpc but not rs6000
, rs6000 doesn
't have the
5025 # load-reserved/store-conditional instructions.
5026 if { [istarget ia64-*-*]
5027 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5028 || [istarget aarch64*-*-*]
5029 || [istarget alpha*-*-*]
5030 || [istarget arm*-*-linux-*]
5031 || [istarget bfin*-*linux*]
5032 || [istarget hppa*-*linux*]
5033 || [istarget s390*-*-*]
5034 || [istarget powerpc*-*-*]
5035 || [istarget crisv32-*-*] || [istarget cris-*-*]
5036 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
5037 || [check_effective_target_mips_llsc] } {
5038 set et_sync_int_long_saved 1
5042 verbose "check_effective_target_sync_int_long: returning $et_sync_int_long_saved" 2
5043 return $et_sync_int_long_saved
5046 # Return 1 if the target supports atomic operations on "char" and "short".
5048 proc check_effective_target_sync_char_short { } {
5049 global et_sync_char_short_saved
5051 if [info exists et_sync_char_short_saved] {
5052 verbose "check_effective_target_sync_char_short: using cached result" 2
5054 set et_sync_char_short_saved 0
5055 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
5056 #
load-reserved/store
-conditional instructions.
5057 if { [istarget aarch64
*-*-*]
5058 ||
[istarget ia64
-*-*]
5059 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
5060 ||
[istarget alpha
*-*-*]
5061 ||
[istarget arm
*-*-linux
-*]
5062 ||
[istarget hppa
*-*linux
*]
5063 ||
[istarget s390
*-*-*]
5064 ||
[istarget powerpc
*-*-*]
5065 ||
[istarget crisv32
-*-*] ||
[istarget cris
-*-*]
5066 ||
([istarget sparc
*-*-*] && [check_effective_target_sparc_v9
])
5067 ||
[check_effective_target_mips_llsc
] } {
5068 set et_sync_char_short_saved
1
5072 verbose
"check_effective_target_sync_char_short: returning $et_sync_char_short_saved" 2
5073 return $et_sync_char_short_saved
5076 #
Return 1 if the target uses a ColdFire FPU.
5078 proc check_effective_target_coldfire_fpu
{ } {
5079 return [check_no_compiler_messages coldfire_fpu assembly
{
5086 #
Return true
if this is a uClibc target.
5088 proc check_effective_target_uclibc
{} {
5089 return [check_no_compiler_messages uclibc object
{
5090 #
include <features.h
>
5091 #
if !defined
(__UCLIBC__
)
5097 #
Return true
if this is a uclibc target and
if the uclibc feature
5098 # described by __$feature__ is not present.
5100 proc check_missing_uclibc_feature
{feature
} {
5101 return [check_no_compiler_messages $feature object
"
5102 #
include <features.h
>
5103 #
if !defined
(__UCLIBC
) || defined
(__$
{feature
}__
)
5109 #
Return true
if this is a Newlib target.
5111 proc check_effective_target_newlib
{} {
5112 return [check_no_compiler_messages newlib object
{
5117 #
Return true
if this is NOT a Bionic target.
5119 proc check_effective_target_non_bionic
{} {
5120 return [check_no_compiler_messages non_bionic object
{
5122 #
if defined
(__BIONIC__
)
5128 #
Return true
if this target has error.h header.
5130 proc check_effective_target_error_h
{} {
5131 return [check_no_compiler_messages error_h object
{
5136 #
Return true
if this target has tgmath.h header.
5138 proc check_effective_target_tgmath_h
{} {
5139 return [check_no_compiler_messages tgmath_h object
{
5144 #
Return true
if target
's libc supports complex functions.
5146 proc check_effective_target_libc_has_complex_functions {} {
5147 return [check_no_compiler_messages libc_has_complex_functions object {
5148 #include <complex.h>
5153 # (a) an error of a few ULP is expected in string to floating-point
5154 # conversion functions; and
5155 # (b) overflow is not always detected correctly by those functions.
5157 proc check_effective_target_lax_strtofp {} {
5158 # By default, assume that all uClibc targets suffer from this.
5159 return [check_effective_target_uclibc]
5162 # Return 1 if this is a target for which wcsftime is a dummy
5163 # function that always returns 0.
5165 proc check_effective_target_dummy_wcsftime {} {
5166 # By default, assume that all uClibc targets suffer from this.
5167 return [check_effective_target_uclibc]
5170 # Return 1 if constructors with initialization priority arguments are
5171 # supposed on this target.
5173 proc check_effective_target_init_priority {} {
5174 return [check_no_compiler_messages init_priority assembly "
5175 void f() __attribute__((constructor (1000)));
5180 # Return 1 if the target matches the effective target 'arg', 0 otherwise.
5181 # This can be used with any check_* proc that takes no argument and
5182 # returns only 1 or 0. It could be used with check_* procs that take
5183 # arguments with keywords that pass particular arguments.
5185 proc is-effective-target { arg } {
5187 if { [info procs check_effective_target_${arg}] != [list] } {
5188 set selected [check_effective_target_${arg}]
5191 "vmx_hw" { set selected [check_vmx_hw_available] }
5192 "vsx_hw" { set selected [check_vsx_hw_available] }
5193 "p8vector_hw" { set selected [check_p8vector_hw_available] }
5194 "ppc_recip_hw" { set selected [check_ppc_recip_hw_available] }
5195 "dfp_hw" { set selected [check_dfp_hw_available] }
5196 "named_sections" { set selected [check_named_sections_available] }
5197 "gc_sections" { set selected [check_gc_sections_available] }
5198 "cxa_atexit" { set selected [check_cxa_atexit_available] }
5199 default { error "unknown effective target keyword `$arg'" }
5202 verbose
"is-effective-target: $arg $selected" 2
5206 #
Return 1 if the
argument is an effective
-target keyword
, 0 otherwise.
5208 proc is
-effective
-target
-keyword
{ arg } {
5209 if { [info procs check_effective_target_$
{arg}] != [list
] } {
5212 # These have different names
for their check_
* procs.
5214 "vmx_hw" { return 1 }
5215 "vsx_hw" { return 1 }
5216 "p8vector_hw" { return 1 }
5217 "ppc_recip_hw" { return 1 }
5218 "dfp_hw" { return 1 }
5219 "named_sections" { return 1 }
5220 "gc_sections" { return 1 }
5221 "cxa_atexit" { return 1 }
5222 default
{ return 0 }
5227 #
Return 1 if target default to short enums
5229 proc check_effective_target_short_enums
{ } {
5230 return [check_no_compiler_messages short_enums assembly
{
5232 int s
[sizeof
(enum foo
) == 1 ?
1 : -1];
5236 #
Return 1 if target supports merging string constants at link time.
5238 proc check_effective_target_string_merging
{ } {
5239 return [check_no_messages_and_pattern string_merging \
5240 "rodata\\.str" assembly {
5241 const char
*var
= "String";
5245 #
Return 1 if target has the basic signed and unsigned types in
5246 #
<stdint.h
>, 0 otherwise. This will be obsolete when GCC ensures a
5247 # working
<stdint.h
> for all targets.
5249 proc check_effective_target_stdint_types
{ } {
5250 return [check_no_compiler_messages stdint_types assembly
{
5252 int8_t a
; int16_t b
; int32_t c
; int64_t d
;
5253 uint8_t e
; uint16_t f
; uint32_t g
; uint64_t h
;
5257 #
Return 1 if target has the basic signed and unsigned types in
5258 #
<inttypes.h
>, 0 otherwise. This is
for tests that GCC
's notions of
5259 # these types agree with those in the header, as some systems have
5260 # only <inttypes.h>.
5262 proc check_effective_target_inttypes_types { } {
5263 return [check_no_compiler_messages inttypes_types assembly {
5264 #include <inttypes.h>
5265 int8_t a; int16_t b; int32_t c; int64_t d;
5266 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
5270 # Return 1 if programs are intended to be run on a simulator
5271 # (i.e. slowly) rather than hardware (i.e. fast).
5273 proc check_effective_target_simulator { } {
5275 # All "src/sim" simulators set this one.
5276 if [board_info target exists is_simulator] {
5277 return [board_info target is_simulator]
5280 # The "sid" simulators don't
set that one
, but at least they
set
5282 if [board_info target
exists slow_simulator
] {
5283 return [board_info target slow_simulator
]
5289 #
Return 1 if programs are intended to be run
on hardware rather than
5292 proc check_effective_target_hw
{ } {
5294 # All
"src/sim" simulators set this one.
5295 if [board_info target
exists is_simulator
] {
5296 if [board_info target is_simulator
] {
5303 # The
"sid" simulators don't set that one, but at least they set
5305 if [board_info target
exists slow_simulator
] {
5306 if [board_info target slow_simulator
] {
5316 #
Return 1 if the target is a VxWorks kernel.
5318 proc check_effective_target_vxworks_kernel
{ } {
5319 return [check_no_compiler_messages vxworks_kernel assembly
{
5320 #
if !defined __vxworks || defined __RTP__
5326 #
Return 1 if the target is a VxWorks RTP.
5328 proc check_effective_target_vxworks_rtp
{ } {
5329 return [check_no_compiler_messages vxworks_rtp assembly
{
5330 #
if !defined __vxworks ||
!defined __RTP__
5336 #
Return 1 if the target is expected to provide wide character support.
5338 proc check_effective_target_wchar
{ } {
5339 if {[check_missing_uclibc_feature UCLIBC_HAS_WCHAR
]} {
5342 return [check_no_compiler_messages wchar assembly
{
5347 #
Return 1 if the target has
<pthread.h
>.
5349 proc check_effective_target_pthread_h
{ } {
5350 return [check_no_compiler_messages pthread_h assembly
{
5351 #
include <pthread.h
>
5355 #
Return 1 if the target can truncate a file from a file
-descriptor
,
5356 # as used by libgfortran
/io
/unix.c
:fd_truncate
; i.e. ftruncate or
5357 # chsize. We test
for a trivially functional truncation
; no stubs.
5358 # As libgfortran uses _FILE_OFFSET_BITS
64, we
do too
; it
'll cause a
5359 # different function to be used.
5361 proc check_effective_target_fd_truncate { } {
5363 #define _FILE_OFFSET_BITS 64
5370 FILE *f = fopen ("tst.tmp", "wb");
5372 const char t[] = "test writing more than ten characters";
5376 write (fd, t, sizeof (t) - 1);
5378 if (ftruncate (fd, 10) != 0)
5387 f = fopen ("tst.tmp", "rb");
5388 if (fread (s, 1, sizeof (s), f) != 10 || strncmp (s, t, 10) != 0)
5396 if { [check_runtime ftruncate $prog] } {
5400 regsub "ftruncate" $prog "chsize" prog
5401 return [check_runtime chsize $prog]
5404 # Add to FLAGS all the target-specific flags needed to access the c99 runtime.
5406 proc add_options_for_c99_runtime { flags } {
5407 if { [istarget *-*-solaris2*] } {
5408 return "$flags -std=c99"
5410 if { [istarget powerpc-*-darwin*] } {
5411 return "$flags -mmacosx-version-min=10.3"
5416 # Add to FLAGS all the target-specific flags needed to enable
5417 # full IEEE compliance mode.
5419 proc add_options_for_ieee { flags } {
5420 if { [istarget alpha*-*-*]
5421 || [istarget sh*-*-*] } {
5422 return "$flags -mieee"
5424 if { [istarget rx-*-*] } {
5425 return "$flags -mnofpu"
5430 if {![info exists flags_to_postpone]} {
5431 set flags_to_postpone ""
5434 # Add to FLAGS the flags needed to enable functions to bind locally
5435 # when using pic/PIC passes in the testsuite.
5436 proc add_options_for_bind_pic_locally { flags } {
5437 global flags_to_postpone
5439 # Instead of returning 'flags
' with the -fPIE or -fpie appended, we save it
5440 # in 'flags_to_postpone
' and append it later in gcc_target_compile procedure in
5441 # order to make sure that the multilib_flags doesn't override this.
5443 if {[check_no_compiler_messages using_pic2 assembly
{
5448 set flags_to_postpone
"-fPIE"
5451 if {[check_no_compiler_messages using_pic1 assembly
{
5456 set flags_to_postpone
"-fpie"
5462 # Add to FLAGS the flags needed to enable
64-bit vectors.
5464 proc add_options_for_double_vectors
{ flags
} {
5465 if [is
-effective
-target arm_neon_ok
] {
5466 return "$flags -mvectorize-with-neon-double"
5472 #
Return 1 if the target provides a full C99 runtime.
5474 proc check_effective_target_c99_runtime
{ } {
5475 return [check_cached_effective_target c99_runtime
{
5478 set file
[open
"$srcdir/gcc.dg/builtins-config.h"]
5479 set contents
[read $file
]
5482 #ifndef HAVE_C99_RUNTIME
5483 #error
!HAVE_C99_RUNTIME
5486 check_no_compiler_messages_nocache c99_runtime assembly \
5487 $contents
[add_options_for_c99_runtime
""]
5491 #
Return 1 if target wchar_t is at least
4 bytes.
5493 proc check_effective_target_4byte_wchar_t
{ } {
5494 return [check_no_compiler_messages
4byte_wchar_t object
{
5495 int dummy
[sizeof
(__WCHAR_TYPE__
) >= 4 ?
1 : -1];
5499 #
Return 1 if the target supports automatic stack alignment.
5501 proc check_effective_target_automatic_stack_alignment
{ } {
5502 # Ordinarily x86 supports automatic stack alignment ...
5503 if { [istarget i?
86*-*-*] ||
[istarget x86_64
-*-*] } then {
5504 if { [istarget
*-*-mingw
*] ||
[istarget
*-*-cygwin
*] } {
5505 # ... except Win64 SEH doesn
't. Succeed for Win32 though.
5506 return [check_effective_target_ilp32];
5513 # Return true if we are compiling for AVX target.
5515 proc check_avx_available { } {
5516 if { [check_no_compiler_messages avx_available assembly {
5526 # Return true if 32- and 16-bytes vectors are available.
5528 proc check_effective_target_vect_sizes_32B_16B { } {
5529 if { [check_avx_available] && ![check_prefer_avx128] } {
5536 # Return true if 128-bits vectors are preferred even if 256-bits vectors
5539 proc check_prefer_avx128 { } {
5540 if ![check_avx_available] {
5543 return [check_no_messages_and_pattern avx_explicit "xmm" assembly {
5544 float a[1024],b[1024],c[1024];
5545 void foo (void) { int i; for (i = 0; i < 1024; i++) a[i]=b[i]+c[i];}
5546 } "-O2 -ftree-vectorize"]
5550 # Return 1 if avx512f instructions can be compiled.
5552 proc check_effective_target_avx512f { } {
5553 return [check_no_compiler_messages avx512f object {
5554 typedef double __m512d __attribute__ ((__vector_size__ (64)));
5556 __m512d _mm512_add (__m512d a)
5558 return __builtin_ia32_addpd512_mask (a, a, a, 1, 4);
5563 # Return 1 if avx instructions can be compiled.
5565 proc check_effective_target_avx { } {
5566 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
5569 return [check_no_compiler_messages avx object {
5570 void _mm256_zeroall (void)
5572 __builtin_ia32_vzeroall ();
5577 # Return 1 if avx2 instructions can be compiled.
5578 proc check_effective_target_avx2 { } {
5579 return [check_no_compiler_messages avx2 object {
5580 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
5582 mm256_is32_andnotsi256 (__v4di __X, __v4di __Y)
5584 return __builtin_ia32_andnotsi256 (__X, __Y);
5589 # Return 1 if sse instructions can be compiled.
5590 proc check_effective_target_sse { } {
5591 return [check_no_compiler_messages sse object {
5594 __builtin_ia32_stmxcsr ();
5600 # Return 1 if sse2 instructions can be compiled.
5601 proc check_effective_target_sse2 { } {
5602 return [check_no_compiler_messages sse2 object {
5603 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
5605 __m128i _mm_srli_si128 (__m128i __A, int __N)
5607 return (__m128i)__builtin_ia32_psrldqi128 (__A, 8);
5612 # Return 1 if F16C instructions can be compiled.
5614 proc check_effective_target_f16c { } {
5615 return [check_no_compiler_messages f16c object {
5616 #include "immintrin.h"
5618 foo (unsigned short val)
5620 return _cvtsh_ss (val);
5625 # Return 1 if C wchar_t type is compatible with char16_t.
5627 proc check_effective_target_wchar_t_char16_t_compatible { } {
5628 return [check_no_compiler_messages wchar_t_char16_t object {
5630 __CHAR16_TYPE__ *p16 = &wc;
5631 char t[(((__CHAR16_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
5635 # Return 1 if C wchar_t type is compatible with char32_t.
5637 proc check_effective_target_wchar_t_char32_t_compatible { } {
5638 return [check_no_compiler_messages wchar_t_char32_t object {
5640 __CHAR32_TYPE__ *p32 = &wc;
5641 char t[(((__CHAR32_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
5645 # Return 1 if pow10 function exists.
5647 proc check_effective_target_pow10 { } {
5648 return [check_runtime pow10 {
5658 # Return 1 if current options generate DFP instructions, 0 otherwise.
5660 proc check_effective_target_hard_dfp {} {
5661 return [check_no_messages_and_pattern hard_dfp "!adddd3" assembly {
5662 typedef float d64 __attribute__((mode(DD)));
5664 void foo (void) { z = x + y; }
5668 # Return 1 if string.h and wchar.h headers provide C++ requires overloads
5669 # for strchr etc. functions.
5671 proc check_effective_target_correct_iso_cpp_string_wchar_protos { } {
5672 return [check_no_compiler_messages correct_iso_cpp_string_wchar_protos assembly {
5675 #if !defined(__cplusplus) \
5676 || !defined(__CORRECT_ISO_CPP_STRING_H_PROTO) \
5677 || !defined(__CORRECT_ISO_CPP_WCHAR_H_PROTO)
5678 ISO C++ correct string.h and wchar.h protos not supported.
5685 # Return 1 if GNU as is used.
5687 proc check_effective_target_gas { } {
5688 global use_gas_saved
5691 if {![info exists use_gas_saved]} {
5692 # Check if the as used by gcc is GNU as.
5693 set gcc_as [lindex [${tool}_target_compile "-print-prog-name=as" "" "none" ""] 0]
5694 # Provide /dev/null as input, otherwise gas times out reading from
5696 set status [remote_exec host "$gcc_as" "-v /dev/null"]
5697 set as_output [lindex $status 1]
5698 if { [ string first "GNU" $as_output ] >= 0 } {
5704 return $use_gas_saved
5707 # Return 1 if GNU ld is used.
5709 proc check_effective_target_gld { } {
5710 global use_gld_saved
5713 if {![info exists use_gld_saved]} {
5714 # Check if the ld used by gcc is GNU ld.
5715 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=ld" "" "none" ""] 0]
5716 set status [remote_exec host "$gcc_ld" "--version"]
5717 set ld_output [lindex $status 1]
5718 if { [ string first "GNU" $ld_output ] >= 0 } {
5724 return $use_gld_saved
5727 # Return 1 if the compiler has been configure with link-time optimization
5730 proc check_effective_target_lto { } {
5732 if { [istarget nvptx-*-*] } {
5735 return [info exists ENABLE_LTO]
5738 # Return 1 if -mx32 -maddress-mode=short can compile, 0 otherwise.
5740 proc check_effective_target_maybe_x32 { } {
5741 return [check_no_compiler_messages maybe_x32 object {
5743 } "-mx32 -maddress-mode=short"]
5746 # Return 1 if this target supports the -fsplit-stack option, 0
5749 proc check_effective_target_split_stack {} {
5750 return [check_no_compiler_messages split_stack object {
5755 # Return 1 if this target supports the -masm=intel option, 0
5758 proc check_effective_target_masm_intel {} {
5759 return [check_no_compiler_messages masm_intel object {
5760 extern void abort (void);
5764 # Return 1 if the language for the compiler under test is C.
5766 proc check_effective_target_c { } {
5768 if [string match $tool "gcc"] {
5774 # Return 1 if the language for the compiler under test is C++.
5776 proc check_effective_target_c++ { } {
5778 if [string match $tool "g++"] {
5784 # Check whether the current active language standard supports the features
5785 # of C++11/C++14 by checking for the presence of one of the -std
5786 # flags. This assumes that the default for the compiler is C++98, and that
5787 # there will never be multiple -std= arguments on the command line.
5788 proc check_effective_target_c++11_only { } {
5789 if ![check_effective_target_c++] {
5792 return [check-flags { { } { } { -std=c++0x -std=gnu++0x -std=c++11 -std=gnu++11 } }]
5794 proc check_effective_target_c++11 { } {
5795 if [check_effective_target_c++11_only] {
5798 return [check_effective_target_c++14]
5800 proc check_effective_target_c++11_down { } {
5801 if ![check_effective_target_c++] {
5804 return ![check_effective_target_c++14]
5807 proc check_effective_target_c++14_only { } {
5808 if ![check_effective_target_c++] {
5811 return [check-flags { { } { } { -std=c++14 -std=gnu++14 -std=c++14 -std=gnu++14 } }]
5814 proc check_effective_target_c++14 { } {
5815 if [check_effective_target_c++14_only] {
5818 return [check_effective_target_c++1z]
5820 proc check_effective_target_c++14_down { } {
5821 if ![check_effective_target_c++] {
5824 return ![check_effective_target_c++1z]
5827 proc check_effective_target_c++98_only { } {
5828 if ![check_effective_target_c++] {
5831 return ![check_effective_target_c++11]
5834 proc check_effective_target_c++1z_only { } {
5835 if ![check_effective_target_c++] {
5838 return [check-flags { { } { } { -std=c++1z -std=gnu++1z } }]
5840 proc check_effective_target_c++1z { } {
5841 return [check_effective_target_c++1z_only]
5844 # Return 1 if expensive testcases should be run.
5846 proc check_effective_target_run_expensive_tests { } {
5847 if { [getenv GCC_TEST_RUN_EXPENSIVE] != "" } {
5853 # Returns 1 if "mempcpy" is available on the target system.
5855 proc check_effective_target_mempcpy {} {
5856 return [check_function_available "mempcpy"]
5859 # Returns 1 if "stpcpy" is available on the target system.
5861 proc check_effective_target_stpcpy {} {
5862 return [check_function_available "stpcpy"]
5865 # Check whether the vectorizer tests are supported by the target and
5866 # append additional target-dependent compile flags to DEFAULT_VECTCFLAGS.
5867 # Set dg-do-what-default to either compile or run, depending on target
5868 # capabilities. Return 1 if vectorizer tests are supported by
5869 # target, 0 otherwise.
5871 proc check_vect_support_and_set_flags { } {
5872 global DEFAULT_VECTCFLAGS
5873 global dg-do-what-default
5875 if [istarget powerpc-*paired*] {
5876 lappend DEFAULT_VECTCFLAGS "-mpaired"
5877 if [check_750cl_hw_available] {
5878 set dg-do-what-default run
5880 set dg-do-what-default compile
5882 } elseif [istarget powerpc*-*-*] {
5883 # Skip targets not supporting -maltivec.
5884 if ![is-effective-target powerpc_altivec_ok] {
5888 lappend DEFAULT_VECTCFLAGS "-maltivec"
5889 if [check_p8vector_hw_available] {
5890 lappend DEFAULT_VECTCFLAGS "-mpower8-vector" "-mno-allow-movmisalign"
5891 } elseif [check_vsx_hw_available] {
5892 lappend DEFAULT_VECTCFLAGS "-mvsx" "-mno-allow-movmisalign"
5895 if [check_vmx_hw_available] {
5896 set dg-do-what-default run
5898 if [is-effective-target ilp32] {
5899 # Specify a cpu that supports VMX for compile-only tests.
5900 lappend DEFAULT_VECTCFLAGS "-mcpu=970"
5902 set dg-do-what-default compile
5904 } elseif { [istarget spu-*-*] } {
5905 set dg-do-what-default run
5906 } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
5907 lappend DEFAULT_VECTCFLAGS "-msse2"
5908 if { [check_effective_target_sse2_runtime] } {
5909 set dg-do-what-default run
5911 set dg-do-what-default compile
5913 } elseif { [istarget mips*-*-*]
5914 && ([check_effective_target_mpaired_single]
5915 || [check_effective_target_mips_loongson])
5916 && [check_effective_target_nomips16] } {
5917 if { [check_effective_target_mpaired_single] } {
5918 lappend DEFAULT_VECTCFLAGS "-mpaired-single"
5920 set dg-do-what-default run
5921 } elseif [istarget sparc*-*-*] {
5922 lappend DEFAULT_VECTCFLAGS "-mcpu=ultrasparc" "-mvis"
5923 if [check_effective_target_ultrasparc_hw] {
5924 set dg-do-what-default run
5926 set dg-do-what-default compile
5928 } elseif [istarget alpha*-*-*] {
5929 # Alpha's vectorization capabilities are extremely limited.
5930 # It
's more effort than its worth disabling all of the tests
5931 # that it cannot pass. But if you actually want to see what
5932 # does work, command out the return.
5935 lappend DEFAULT_VECTCFLAGS "-mmax"
5936 if [check_alpha_max_hw_available] {
5937 set dg-do-what-default run
5939 set dg-do-what-default compile
5941 } elseif [istarget ia64-*-*] {
5942 set dg-do-what-default run
5943 } elseif [is-effective-target arm_neon_ok] {
5944 eval lappend DEFAULT_VECTCFLAGS [add_options_for_arm_neon ""]
5945 # NEON does not support denormals, so is not used for vectorization by
5946 # default to avoid loss of precision. We must pass -ffast-math to test
5947 # vectorization of float operations.
5948 lappend DEFAULT_VECTCFLAGS "-ffast-math"
5949 if [is-effective-target arm_neon_hw] {
5950 set dg-do-what-default run
5952 set dg-do-what-default compile
5954 } elseif [istarget "aarch64*-*-*"] {
5955 set dg-do-what-default run
5963 # Return 1 if the target does *not* require strict alignment.
5965 proc check_effective_target_non_strict_align {} {
5966 return [check_no_compiler_messages non_strict_align assembly {
5968 typedef char __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__))) c;
5970 void foo(void) { z = (c *) y; }
5974 # Return 1 if the target has <ucontext.h>.
5976 proc check_effective_target_ucontext_h { } {
5977 return [check_no_compiler_messages ucontext_h assembly {
5978 #include <ucontext.h>
5982 proc check_effective_target_aarch64_tiny { } {
5983 if { [istarget aarch64*-*-*] } {
5984 return [check_no_compiler_messages aarch64_tiny object {
5985 #ifdef __AARCH64_CMODEL_TINY__
5988 #error target not AArch64 tiny code model
5996 proc check_effective_target_aarch64_small { } {
5997 if { [istarget aarch64*-*-*] } {
5998 return [check_no_compiler_messages aarch64_small object {
5999 #ifdef __AARCH64_CMODEL_SMALL__
6002 #error target not AArch64 small code model
6010 proc check_effective_target_aarch64_large { } {
6011 if { [istarget aarch64*-*-*] } {
6012 return [check_no_compiler_messages aarch64_large object {
6013 #ifdef __AARCH64_CMODEL_LARGE__
6016 #error target not AArch64 large code model
6024 # Return 1 if <fenv.h> is available with all the standard IEEE
6025 # exceptions and floating-point exceptions are raised by arithmetic
6026 # operations. (If the target requires special options for "inexact"
6027 # exceptions, those need to be specified in the testcases.)
6029 proc check_effective_target_fenv_exceptions {} {
6030 return [check_runtime fenv_exceptions {
6033 #ifndef FE_DIVBYZERO
6034 # error Missing FE_DIVBYZERO
6037 # error Missing FE_INEXACT
6040 # error Missing FE_INVALID
6043 # error Missing FE_OVERFLOW
6045 #ifndef FE_UNDERFLOW
6046 # error Missing FE_UNDERFLOW
6048 volatile float a = 0.0f, r;
6053 if (fetestexcept (FE_INVALID))
6058 } [add_options_for_ieee "-std=gnu99"]]
6061 proc check_effective_target_tiny {} {
6062 global et_target_tiny_saved
6064 if [info exists et_target_tine_saved] {
6065 verbose "check_effective_target_tiny: using cached result" 2
6067 set et_target_tiny_saved 0
6068 if { [istarget aarch64*-*-*]
6069 && [check_effective_target_aarch64_tiny] } {
6070 set et_target_tiny_saved 1
6074 return $et_target_tiny_saved
6077 # Return 1 if LOGICAL_OP_NON_SHORT_CIRCUIT is set to 0 for the current target.
6079 proc check_effective_target_logical_op_short_circuit {} {
6080 if { [istarget mips*-*-*]
6081 || [istarget arc*-*-*]
6082 || [istarget avr*-*-*]
6083 || [istarget crisv32-*-*] || [istarget cris-*-*]
6084 || [istarget mmix-*-*]
6085 || [istarget s390*-*-*]
6086 || [istarget powerpc*-*-*]
6087 || [istarget nios2*-*-*]
6088 || [check_effective_target_arm_cortex_m] } {
6094 # Record that dg-final test TEST requires convential compilation.
6096 proc force_conventional_output_for { test } {
6097 if { [info proc $test] == "" } {
6098 perror "$test does not exist"
6101 proc ${test}_required_options {} {
6102 global gcc_force_conventional_output
6103 return $gcc_force_conventional_output
6107 # Return 1 if the x86-64 target supports PIE with copy reloc, 0
6108 # otherwise. Cache the result.
6110 proc check_effective_target_pie_copyreloc { } {
6111 global pie_copyreloc_available_saved
6113 global GCC_UNDER_TEST
6115 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
6119 # Need auto-host.h to check linker support.
6120 if { ![file exists ../../auto-host.h ] } {
6124 if [info exists pie_copyreloc_available_saved] {
6125 verbose "check_effective_target_pie_copyreloc returning saved $pie_copyreloc_available_saved" 2
6127 # Set up and compile to see if linker supports PIE with copy
6128 # reloc. Include the current process ID in the file names to
6129 # prevent conflicts with invocations for multiple testsuites.
6134 set f [open $src "w"]
6135 puts $f "#include \"../../auto-host.h\""
6136 puts $f "#if HAVE_LD_PIE_COPYRELOC == 0"
6137 puts $f "# error Linker does not support PIE with copy reloc."
6141 verbose "check_effective_target_pie_copyreloc compiling testfile $src" 2
6142 set lines [${tool}_target_compile $src $obj object ""]
6147 if [string match "" $lines] then {
6148 verbose "check_effective_target_pie_copyreloc testfile compilation passed" 2
6149 set pie_copyreloc_available_saved 1
6151 verbose "check_effective_target_pie_copyreloc testfile compilation failed" 2
6152 set pie_copyreloc_available_saved 0
6156 return $pie_copyreloc_available_saved