1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010,
4 2011 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
24 #include "coretypes.h"
28 #include "hard-reg-set.h"
30 #include "basic-block.h"
32 #include "insn-config.h"
36 #include "diagnostic-core.h"
42 #include "rtlhooks-def.h"
43 #include "tree-pass.h"
46 #include "pointer-set.h"
48 /* The basic idea of common subexpression elimination is to go
49 through the code, keeping a record of expressions that would
50 have the same value at the current scan point, and replacing
51 expressions encountered with the cheapest equivalent expression.
53 It is too complicated to keep track of the different possibilities
54 when control paths merge in this code; so, at each label, we forget all
55 that is known and start fresh. This can be described as processing each
56 extended basic block separately. We have a separate pass to perform
59 Note CSE can turn a conditional or computed jump into a nop or
60 an unconditional jump. When this occurs we arrange to run the jump
61 optimizer after CSE to delete the unreachable code.
63 We use two data structures to record the equivalent expressions:
64 a hash table for most expressions, and a vector of "quantity
65 numbers" to record equivalent (pseudo) registers.
67 The use of the special data structure for registers is desirable
68 because it is faster. It is possible because registers references
69 contain a fairly small number, the register number, taken from
70 a contiguously allocated series, and two register references are
71 identical if they have the same number. General expressions
72 do not have any such thing, so the only way to retrieve the
73 information recorded on an expression other than a register
74 is to keep it in a hash table.
76 Registers and "quantity numbers":
78 At the start of each basic block, all of the (hardware and pseudo)
79 registers used in the function are given distinct quantity
80 numbers to indicate their contents. During scan, when the code
81 copies one register into another, we copy the quantity number.
82 When a register is loaded in any other way, we allocate a new
83 quantity number to describe the value generated by this operation.
84 `REG_QTY (N)' records what quantity register N is currently thought
87 All real quantity numbers are greater than or equal to zero.
88 If register N has not been assigned a quantity, `REG_QTY (N)' will
89 equal -N - 1, which is always negative.
91 Quantity numbers below zero do not exist and none of the `qty_table'
92 entries should be referenced with a negative index.
94 We also maintain a bidirectional chain of registers for each
95 quantity number. The `qty_table` members `first_reg' and `last_reg',
96 and `reg_eqv_table' members `next' and `prev' hold these chains.
98 The first register in a chain is the one whose lifespan is least local.
99 Among equals, it is the one that was seen first.
100 We replace any equivalent register with that one.
102 If two registers have the same quantity number, it must be true that
103 REG expressions with qty_table `mode' must be in the hash table for both
104 registers and must be in the same class.
106 The converse is not true. Since hard registers may be referenced in
107 any mode, two REG expressions might be equivalent in the hash table
108 but not have the same quantity number if the quantity number of one
109 of the registers is not the same mode as those expressions.
111 Constants and quantity numbers
113 When a quantity has a known constant value, that value is stored
114 in the appropriate qty_table `const_rtx'. This is in addition to
115 putting the constant in the hash table as is usual for non-regs.
117 Whether a reg or a constant is preferred is determined by the configuration
118 macro CONST_COSTS and will often depend on the constant value. In any
119 event, expressions containing constants can be simplified, by fold_rtx.
121 When a quantity has a known nearly constant value (such as an address
122 of a stack slot), that value is stored in the appropriate qty_table
125 Integer constants don't have a machine mode. However, cse
126 determines the intended machine mode from the destination
127 of the instruction that moves the constant. The machine mode
128 is recorded in the hash table along with the actual RTL
129 constant expression so that different modes are kept separate.
133 To record known equivalences among expressions in general
134 we use a hash table called `table'. It has a fixed number of buckets
135 that contain chains of `struct table_elt' elements for expressions.
136 These chains connect the elements whose expressions have the same
139 Other chains through the same elements connect the elements which
140 currently have equivalent values.
142 Register references in an expression are canonicalized before hashing
143 the expression. This is done using `reg_qty' and qty_table `first_reg'.
144 The hash code of a register reference is computed using the quantity
145 number, not the register number.
147 When the value of an expression changes, it is necessary to remove from the
148 hash table not just that expression but all expressions whose values
149 could be different as a result.
151 1. If the value changing is in memory, except in special cases
152 ANYTHING referring to memory could be changed. That is because
153 nobody knows where a pointer does not point.
154 The function `invalidate_memory' removes what is necessary.
156 The special cases are when the address is constant or is
157 a constant plus a fixed register such as the frame pointer
158 or a static chain pointer. When such addresses are stored in,
159 we can tell exactly which other such addresses must be invalidated
160 due to overlap. `invalidate' does this.
161 All expressions that refer to non-constant
162 memory addresses are also invalidated. `invalidate_memory' does this.
164 2. If the value changing is a register, all expressions
165 containing references to that register, and only those,
168 Because searching the entire hash table for expressions that contain
169 a register is very slow, we try to figure out when it isn't necessary.
170 Precisely, this is necessary only when expressions have been
171 entered in the hash table using this register, and then the value has
172 changed, and then another expression wants to be added to refer to
173 the register's new value. This sequence of circumstances is rare
174 within any one basic block.
176 `REG_TICK' and `REG_IN_TABLE', accessors for members of
177 cse_reg_info, are used to detect this case. REG_TICK (i) is
178 incremented whenever a value is stored in register i.
179 REG_IN_TABLE (i) holds -1 if no references to register i have been
180 entered in the table; otherwise, it contains the value REG_TICK (i)
181 had when the references were entered. If we want to enter a
182 reference and REG_IN_TABLE (i) != REG_TICK (i), we must scan and
183 remove old references. Until we want to enter a new entry, the
184 mere fact that the two vectors don't match makes the entries be
185 ignored if anyone tries to match them.
187 Registers themselves are entered in the hash table as well as in
188 the equivalent-register chains. However, `REG_TICK' and
189 `REG_IN_TABLE' do not apply to expressions which are simple
190 register references. These expressions are removed from the table
191 immediately when they become invalid, and this can be done even if
192 we do not immediately search for all the expressions that refer to
195 A CLOBBER rtx in an instruction invalidates its operand for further
196 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
197 invalidates everything that resides in memory.
201 Constant expressions that differ only by an additive integer
202 are called related. When a constant expression is put in
203 the table, the related expression with no constant term
204 is also entered. These are made to point at each other
205 so that it is possible to find out if there exists any
206 register equivalent to an expression related to a given expression. */
208 /* Length of qty_table vector. We know in advance we will not need
209 a quantity number this big. */
213 /* Next quantity number to be allocated.
214 This is 1 + the largest number needed so far. */
218 /* Per-qty information tracking.
220 `first_reg' and `last_reg' track the head and tail of the
221 chain of registers which currently contain this quantity.
223 `mode' contains the machine mode of this quantity.
225 `const_rtx' holds the rtx of the constant value of this
226 quantity, if known. A summations of the frame/arg pointer
227 and a constant can also be entered here. When this holds
228 a known value, `const_insn' is the insn which stored the
231 `comparison_{code,const,qty}' are used to track when a
232 comparison between a quantity and some constant or register has
233 been passed. In such a case, we know the results of the comparison
234 in case we see it again. These members record a comparison that
235 is known to be true. `comparison_code' holds the rtx code of such
236 a comparison, else it is set to UNKNOWN and the other two
237 comparison members are undefined. `comparison_const' holds
238 the constant being compared against, or zero if the comparison
239 is not against a constant. `comparison_qty' holds the quantity
240 being compared against when the result is known. If the comparison
241 is not with a register, `comparison_qty' is -1. */
243 struct qty_table_elem
247 rtx comparison_const
;
249 unsigned int first_reg
, last_reg
;
250 /* The sizes of these fields should match the sizes of the
251 code and mode fields of struct rtx_def (see rtl.h). */
252 ENUM_BITFIELD(rtx_code
) comparison_code
: 16;
253 ENUM_BITFIELD(machine_mode
) mode
: 8;
256 /* The table of all qtys, indexed by qty number. */
257 static struct qty_table_elem
*qty_table
;
259 /* Structure used to pass arguments via for_each_rtx to function
260 cse_change_cc_mode. */
261 struct change_cc_mode_args
268 /* For machines that have a CC0, we do not record its value in the hash
269 table since its use is guaranteed to be the insn immediately following
270 its definition and any other insn is presumed to invalidate it.
272 Instead, we store below the current and last value assigned to CC0.
273 If it should happen to be a constant, it is stored in preference
274 to the actual assigned value. In case it is a constant, we store
275 the mode in which the constant should be interpreted. */
277 static rtx this_insn_cc0
, prev_insn_cc0
;
278 static enum machine_mode this_insn_cc0_mode
, prev_insn_cc0_mode
;
281 /* Insn being scanned. */
283 static rtx this_insn
;
284 static bool optimize_this_for_speed_p
;
286 /* Index by register number, gives the number of the next (or
287 previous) register in the chain of registers sharing the same
290 Or -1 if this register is at the end of the chain.
292 If REG_QTY (N) == -N - 1, reg_eqv_table[N].next is undefined. */
294 /* Per-register equivalence chain. */
300 /* The table of all register equivalence chains. */
301 static struct reg_eqv_elem
*reg_eqv_table
;
305 /* The timestamp at which this register is initialized. */
306 unsigned int timestamp
;
308 /* The quantity number of the register's current contents. */
311 /* The number of times the register has been altered in the current
315 /* The REG_TICK value at which rtx's containing this register are
316 valid in the hash table. If this does not equal the current
317 reg_tick value, such expressions existing in the hash table are
321 /* The SUBREG that was set when REG_TICK was last incremented. Set
322 to -1 if the last store was to the whole register, not a subreg. */
323 unsigned int subreg_ticked
;
326 /* A table of cse_reg_info indexed by register numbers. */
327 static struct cse_reg_info
*cse_reg_info_table
;
329 /* The size of the above table. */
330 static unsigned int cse_reg_info_table_size
;
332 /* The index of the first entry that has not been initialized. */
333 static unsigned int cse_reg_info_table_first_uninitialized
;
335 /* The timestamp at the beginning of the current run of
336 cse_extended_basic_block. We increment this variable at the beginning of
337 the current run of cse_extended_basic_block. The timestamp field of a
338 cse_reg_info entry matches the value of this variable if and only
339 if the entry has been initialized during the current run of
340 cse_extended_basic_block. */
341 static unsigned int cse_reg_info_timestamp
;
343 /* A HARD_REG_SET containing all the hard registers for which there is
344 currently a REG expression in the hash table. Note the difference
345 from the above variables, which indicate if the REG is mentioned in some
346 expression in the table. */
348 static HARD_REG_SET hard_regs_in_table
;
350 /* True if CSE has altered the CFG. */
351 static bool cse_cfg_altered
;
353 /* True if CSE has altered conditional jump insns in such a way
354 that jump optimization should be redone. */
355 static bool cse_jumps_altered
;
357 /* True if we put a LABEL_REF into the hash table for an INSN
358 without a REG_LABEL_OPERAND, we have to rerun jump after CSE
359 to put in the note. */
360 static bool recorded_label_ref
;
362 /* canon_hash stores 1 in do_not_record
363 if it notices a reference to CC0, PC, or some other volatile
366 static int do_not_record
;
368 /* canon_hash stores 1 in hash_arg_in_memory
369 if it notices a reference to memory within the expression being hashed. */
371 static int hash_arg_in_memory
;
373 /* The hash table contains buckets which are chains of `struct table_elt's,
374 each recording one expression's information.
375 That expression is in the `exp' field.
377 The canon_exp field contains a canonical (from the point of view of
378 alias analysis) version of the `exp' field.
380 Those elements with the same hash code are chained in both directions
381 through the `next_same_hash' and `prev_same_hash' fields.
383 Each set of expressions with equivalent values
384 are on a two-way chain through the `next_same_value'
385 and `prev_same_value' fields, and all point with
386 the `first_same_value' field at the first element in
387 that chain. The chain is in order of increasing cost.
388 Each element's cost value is in its `cost' field.
390 The `in_memory' field is nonzero for elements that
391 involve any reference to memory. These elements are removed
392 whenever a write is done to an unidentified location in memory.
393 To be safe, we assume that a memory address is unidentified unless
394 the address is either a symbol constant or a constant plus
395 the frame pointer or argument pointer.
397 The `related_value' field is used to connect related expressions
398 (that differ by adding an integer).
399 The related expressions are chained in a circular fashion.
400 `related_value' is zero for expressions for which this
403 The `cost' field stores the cost of this element's expression.
404 The `regcost' field stores the value returned by approx_reg_cost for
405 this element's expression.
407 The `is_const' flag is set if the element is a constant (including
410 The `flag' field is used as a temporary during some search routines.
412 The `mode' field is usually the same as GET_MODE (`exp'), but
413 if `exp' is a CONST_INT and has no machine mode then the `mode'
414 field is the mode it was being used as. Each constant is
415 recorded separately for each mode it is used with. */
421 struct table_elt
*next_same_hash
;
422 struct table_elt
*prev_same_hash
;
423 struct table_elt
*next_same_value
;
424 struct table_elt
*prev_same_value
;
425 struct table_elt
*first_same_value
;
426 struct table_elt
*related_value
;
429 /* The size of this field should match the size
430 of the mode field of struct rtx_def (see rtl.h). */
431 ENUM_BITFIELD(machine_mode
) mode
: 8;
437 /* We don't want a lot of buckets, because we rarely have very many
438 things stored in the hash table, and a lot of buckets slows
439 down a lot of loops that happen frequently. */
441 #define HASH_SIZE (1 << HASH_SHIFT)
442 #define HASH_MASK (HASH_SIZE - 1)
444 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
445 register (hard registers may require `do_not_record' to be set). */
448 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
449 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
450 : canon_hash (X, M)) & HASH_MASK)
452 /* Like HASH, but without side-effects. */
453 #define SAFE_HASH(X, M) \
454 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
455 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
456 : safe_hash (X, M)) & HASH_MASK)
458 /* Determine whether register number N is considered a fixed register for the
459 purpose of approximating register costs.
460 It is desirable to replace other regs with fixed regs, to reduce need for
462 A reg wins if it is either the frame pointer or designated as fixed. */
463 #define FIXED_REGNO_P(N) \
464 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
465 || fixed_regs[N] || global_regs[N])
467 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
468 hard registers and pointers into the frame are the cheapest with a cost
469 of 0. Next come pseudos with a cost of one and other hard registers with
470 a cost of 2. Aside from these special cases, call `rtx_cost'. */
472 #define CHEAP_REGNO(N) \
473 (REGNO_PTR_FRAME_P(N) \
474 || (HARD_REGISTER_NUM_P (N) \
475 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
477 #define COST(X) (REG_P (X) ? 0 : notreg_cost (X, SET, 1))
478 #define COST_IN(X, OUTER, OPNO) (REG_P (X) ? 0 : notreg_cost (X, OUTER, OPNO))
480 /* Get the number of times this register has been updated in this
483 #define REG_TICK(N) (get_cse_reg_info (N)->reg_tick)
485 /* Get the point at which REG was recorded in the table. */
487 #define REG_IN_TABLE(N) (get_cse_reg_info (N)->reg_in_table)
489 /* Get the SUBREG set at the last increment to REG_TICK (-1 if not a
492 #define SUBREG_TICKED(N) (get_cse_reg_info (N)->subreg_ticked)
494 /* Get the quantity number for REG. */
496 #define REG_QTY(N) (get_cse_reg_info (N)->reg_qty)
498 /* Determine if the quantity number for register X represents a valid index
499 into the qty_table. */
501 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) >= 0)
503 /* Compare table_elt X and Y and return true iff X is cheaper than Y. */
505 #define CHEAPER(X, Y) \
506 (preferable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0)
508 static struct table_elt
*table
[HASH_SIZE
];
510 /* Chain of `struct table_elt's made so far for this function
511 but currently removed from the table. */
513 static struct table_elt
*free_element_chain
;
515 /* Set to the cost of a constant pool reference if one was found for a
516 symbolic constant. If this was found, it means we should try to
517 convert constants into constant pool entries if they don't fit in
520 static int constant_pool_entries_cost
;
521 static int constant_pool_entries_regcost
;
523 /* Trace a patch through the CFG. */
527 /* The basic block for this path entry. */
531 /* This data describes a block that will be processed by
532 cse_extended_basic_block. */
534 struct cse_basic_block_data
536 /* Total number of SETs in block. */
538 /* Size of current branch path, if any. */
540 /* Current path, indicating which basic_blocks will be processed. */
541 struct branch_path
*path
;
545 /* Pointers to the live in/live out bitmaps for the boundaries of the
547 static bitmap cse_ebb_live_in
, cse_ebb_live_out
;
549 /* A simple bitmap to track which basic blocks have been visited
550 already as part of an already processed extended basic block. */
551 static sbitmap cse_visited_basic_blocks
;
553 static bool fixed_base_plus_p (rtx x
);
554 static int notreg_cost (rtx
, enum rtx_code
, int);
555 static int approx_reg_cost_1 (rtx
*, void *);
556 static int approx_reg_cost (rtx
);
557 static int preferable (int, int, int, int);
558 static void new_basic_block (void);
559 static void make_new_qty (unsigned int, enum machine_mode
);
560 static void make_regs_eqv (unsigned int, unsigned int);
561 static void delete_reg_equiv (unsigned int);
562 static int mention_regs (rtx
);
563 static int insert_regs (rtx
, struct table_elt
*, int);
564 static void remove_from_table (struct table_elt
*, unsigned);
565 static void remove_pseudo_from_table (rtx
, unsigned);
566 static struct table_elt
*lookup (rtx
, unsigned, enum machine_mode
);
567 static struct table_elt
*lookup_for_remove (rtx
, unsigned, enum machine_mode
);
568 static rtx
lookup_as_function (rtx
, enum rtx_code
);
569 static struct table_elt
*insert_with_costs (rtx
, struct table_elt
*, unsigned,
570 enum machine_mode
, int, int);
571 static struct table_elt
*insert (rtx
, struct table_elt
*, unsigned,
573 static void merge_equiv_classes (struct table_elt
*, struct table_elt
*);
574 static void invalidate (rtx
, enum machine_mode
);
575 static void remove_invalid_refs (unsigned int);
576 static void remove_invalid_subreg_refs (unsigned int, unsigned int,
578 static void rehash_using_reg (rtx
);
579 static void invalidate_memory (void);
580 static void invalidate_for_call (void);
581 static rtx
use_related_value (rtx
, struct table_elt
*);
583 static inline unsigned canon_hash (rtx
, enum machine_mode
);
584 static inline unsigned safe_hash (rtx
, enum machine_mode
);
585 static inline unsigned hash_rtx_string (const char *);
587 static rtx
canon_reg (rtx
, rtx
);
588 static enum rtx_code
find_comparison_args (enum rtx_code
, rtx
*, rtx
*,
590 enum machine_mode
*);
591 static rtx
fold_rtx (rtx
, rtx
);
592 static rtx
equiv_constant (rtx
);
593 static void record_jump_equiv (rtx
, bool);
594 static void record_jump_cond (enum rtx_code
, enum machine_mode
, rtx
, rtx
,
596 static void cse_insn (rtx
);
597 static void cse_prescan_path (struct cse_basic_block_data
*);
598 static void invalidate_from_clobbers (rtx
);
599 static void invalidate_from_sets_and_clobbers (rtx
);
600 static rtx
cse_process_notes (rtx
, rtx
, bool *);
601 static void cse_extended_basic_block (struct cse_basic_block_data
*);
602 static int check_for_label_ref (rtx
*, void *);
603 extern void dump_class (struct table_elt
*);
604 static void get_cse_reg_info_1 (unsigned int regno
);
605 static struct cse_reg_info
* get_cse_reg_info (unsigned int regno
);
606 static int check_dependence (rtx
*, void *);
608 static void flush_hash_table (void);
609 static bool insn_live_p (rtx
, int *);
610 static bool set_live_p (rtx
, rtx
, int *);
611 static int cse_change_cc_mode (rtx
*, void *);
612 static void cse_change_cc_mode_insn (rtx
, rtx
);
613 static void cse_change_cc_mode_insns (rtx
, rtx
, rtx
);
614 static enum machine_mode
cse_cc_succs (basic_block
, basic_block
, rtx
, rtx
,
618 #undef RTL_HOOKS_GEN_LOWPART
619 #define RTL_HOOKS_GEN_LOWPART gen_lowpart_if_possible
621 static const struct rtl_hooks cse_rtl_hooks
= RTL_HOOKS_INITIALIZER
;
623 /* Nonzero if X has the form (PLUS frame-pointer integer). */
626 fixed_base_plus_p (rtx x
)
628 switch (GET_CODE (x
))
631 if (x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
)
633 if (x
== arg_pointer_rtx
&& fixed_regs
[ARG_POINTER_REGNUM
])
638 if (!CONST_INT_P (XEXP (x
, 1)))
640 return fixed_base_plus_p (XEXP (x
, 0));
647 /* Dump the expressions in the equivalence class indicated by CLASSP.
648 This function is used only for debugging. */
650 dump_class (struct table_elt
*classp
)
652 struct table_elt
*elt
;
654 fprintf (stderr
, "Equivalence chain for ");
655 print_rtl (stderr
, classp
->exp
);
656 fprintf (stderr
, ": \n");
658 for (elt
= classp
->first_same_value
; elt
; elt
= elt
->next_same_value
)
660 print_rtl (stderr
, elt
->exp
);
661 fprintf (stderr
, "\n");
665 /* Subroutine of approx_reg_cost; called through for_each_rtx. */
668 approx_reg_cost_1 (rtx
*xp
, void *data
)
671 int *cost_p
= (int *) data
;
675 unsigned int regno
= REGNO (x
);
677 if (! CHEAP_REGNO (regno
))
679 if (regno
< FIRST_PSEUDO_REGISTER
)
681 if (targetm
.small_register_classes_for_mode_p (GET_MODE (x
)))
693 /* Return an estimate of the cost of the registers used in an rtx.
694 This is mostly the number of different REG expressions in the rtx;
695 however for some exceptions like fixed registers we use a cost of
696 0. If any other hard register reference occurs, return MAX_COST. */
699 approx_reg_cost (rtx x
)
703 if (for_each_rtx (&x
, approx_reg_cost_1
, (void *) &cost
))
709 /* Return a negative value if an rtx A, whose costs are given by COST_A
710 and REGCOST_A, is more desirable than an rtx B.
711 Return a positive value if A is less desirable, or 0 if the two are
714 preferable (int cost_a
, int regcost_a
, int cost_b
, int regcost_b
)
716 /* First, get rid of cases involving expressions that are entirely
718 if (cost_a
!= cost_b
)
720 if (cost_a
== MAX_COST
)
722 if (cost_b
== MAX_COST
)
726 /* Avoid extending lifetimes of hardregs. */
727 if (regcost_a
!= regcost_b
)
729 if (regcost_a
== MAX_COST
)
731 if (regcost_b
== MAX_COST
)
735 /* Normal operation costs take precedence. */
736 if (cost_a
!= cost_b
)
737 return cost_a
- cost_b
;
738 /* Only if these are identical consider effects on register pressure. */
739 if (regcost_a
!= regcost_b
)
740 return regcost_a
- regcost_b
;
744 /* Internal function, to compute cost when X is not a register; called
745 from COST macro to keep it simple. */
748 notreg_cost (rtx x
, enum rtx_code outer
, int opno
)
750 return ((GET_CODE (x
) == SUBREG
751 && REG_P (SUBREG_REG (x
))
752 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_INT
753 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x
))) == MODE_INT
754 && (GET_MODE_SIZE (GET_MODE (x
))
755 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
756 && subreg_lowpart_p (x
)
757 && TRULY_NOOP_TRUNCATION_MODES_P (GET_MODE (x
),
758 GET_MODE (SUBREG_REG (x
))))
760 : rtx_cost (x
, outer
, opno
, optimize_this_for_speed_p
) * 2);
764 /* Initialize CSE_REG_INFO_TABLE. */
767 init_cse_reg_info (unsigned int nregs
)
769 /* Do we need to grow the table? */
770 if (nregs
> cse_reg_info_table_size
)
772 unsigned int new_size
;
774 if (cse_reg_info_table_size
< 2048)
776 /* Compute a new size that is a power of 2 and no smaller
777 than the large of NREGS and 64. */
778 new_size
= (cse_reg_info_table_size
779 ? cse_reg_info_table_size
: 64);
781 while (new_size
< nregs
)
786 /* If we need a big table, allocate just enough to hold
791 /* Reallocate the table with NEW_SIZE entries. */
792 free (cse_reg_info_table
);
793 cse_reg_info_table
= XNEWVEC (struct cse_reg_info
, new_size
);
794 cse_reg_info_table_size
= new_size
;
795 cse_reg_info_table_first_uninitialized
= 0;
798 /* Do we have all of the first NREGS entries initialized? */
799 if (cse_reg_info_table_first_uninitialized
< nregs
)
801 unsigned int old_timestamp
= cse_reg_info_timestamp
- 1;
804 /* Put the old timestamp on newly allocated entries so that they
805 will all be considered out of date. We do not touch those
806 entries beyond the first NREGS entries to be nice to the
808 for (i
= cse_reg_info_table_first_uninitialized
; i
< nregs
; i
++)
809 cse_reg_info_table
[i
].timestamp
= old_timestamp
;
811 cse_reg_info_table_first_uninitialized
= nregs
;
815 /* Given REGNO, initialize the cse_reg_info entry for REGNO. */
818 get_cse_reg_info_1 (unsigned int regno
)
820 /* Set TIMESTAMP field to CSE_REG_INFO_TIMESTAMP so that this
821 entry will be considered to have been initialized. */
822 cse_reg_info_table
[regno
].timestamp
= cse_reg_info_timestamp
;
824 /* Initialize the rest of the entry. */
825 cse_reg_info_table
[regno
].reg_tick
= 1;
826 cse_reg_info_table
[regno
].reg_in_table
= -1;
827 cse_reg_info_table
[regno
].subreg_ticked
= -1;
828 cse_reg_info_table
[regno
].reg_qty
= -regno
- 1;
831 /* Find a cse_reg_info entry for REGNO. */
833 static inline struct cse_reg_info
*
834 get_cse_reg_info (unsigned int regno
)
836 struct cse_reg_info
*p
= &cse_reg_info_table
[regno
];
838 /* If this entry has not been initialized, go ahead and initialize
840 if (p
->timestamp
!= cse_reg_info_timestamp
)
841 get_cse_reg_info_1 (regno
);
846 /* Clear the hash table and initialize each register with its own quantity,
847 for a new basic block. */
850 new_basic_block (void)
856 /* Invalidate cse_reg_info_table. */
857 cse_reg_info_timestamp
++;
859 /* Clear out hash table state for this pass. */
860 CLEAR_HARD_REG_SET (hard_regs_in_table
);
862 /* The per-quantity values used to be initialized here, but it is
863 much faster to initialize each as it is made in `make_new_qty'. */
865 for (i
= 0; i
< HASH_SIZE
; i
++)
867 struct table_elt
*first
;
872 struct table_elt
*last
= first
;
876 while (last
->next_same_hash
!= NULL
)
877 last
= last
->next_same_hash
;
879 /* Now relink this hash entire chain into
880 the free element list. */
882 last
->next_same_hash
= free_element_chain
;
883 free_element_chain
= first
;
892 /* Say that register REG contains a quantity in mode MODE not in any
893 register before and initialize that quantity. */
896 make_new_qty (unsigned int reg
, enum machine_mode mode
)
899 struct qty_table_elem
*ent
;
900 struct reg_eqv_elem
*eqv
;
902 gcc_assert (next_qty
< max_qty
);
904 q
= REG_QTY (reg
) = next_qty
++;
906 ent
->first_reg
= reg
;
909 ent
->const_rtx
= ent
->const_insn
= NULL_RTX
;
910 ent
->comparison_code
= UNKNOWN
;
912 eqv
= ®_eqv_table
[reg
];
913 eqv
->next
= eqv
->prev
= -1;
916 /* Make reg NEW equivalent to reg OLD.
917 OLD is not changing; NEW is. */
920 make_regs_eqv (unsigned int new_reg
, unsigned int old_reg
)
922 unsigned int lastr
, firstr
;
923 int q
= REG_QTY (old_reg
);
924 struct qty_table_elem
*ent
;
928 /* Nothing should become eqv until it has a "non-invalid" qty number. */
929 gcc_assert (REGNO_QTY_VALID_P (old_reg
));
931 REG_QTY (new_reg
) = q
;
932 firstr
= ent
->first_reg
;
933 lastr
= ent
->last_reg
;
935 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
936 hard regs. Among pseudos, if NEW will live longer than any other reg
937 of the same qty, and that is beyond the current basic block,
938 make it the new canonical replacement for this qty. */
939 if (! (firstr
< FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (firstr
))
940 /* Certain fixed registers might be of the class NO_REGS. This means
941 that not only can they not be allocated by the compiler, but
942 they cannot be used in substitutions or canonicalizations
944 && (new_reg
>= FIRST_PSEUDO_REGISTER
|| REGNO_REG_CLASS (new_reg
) != NO_REGS
)
945 && ((new_reg
< FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (new_reg
))
946 || (new_reg
>= FIRST_PSEUDO_REGISTER
947 && (firstr
< FIRST_PSEUDO_REGISTER
948 || (bitmap_bit_p (cse_ebb_live_out
, new_reg
)
949 && !bitmap_bit_p (cse_ebb_live_out
, firstr
))
950 || (bitmap_bit_p (cse_ebb_live_in
, new_reg
)
951 && !bitmap_bit_p (cse_ebb_live_in
, firstr
))))))
953 reg_eqv_table
[firstr
].prev
= new_reg
;
954 reg_eqv_table
[new_reg
].next
= firstr
;
955 reg_eqv_table
[new_reg
].prev
= -1;
956 ent
->first_reg
= new_reg
;
960 /* If NEW is a hard reg (known to be non-fixed), insert at end.
961 Otherwise, insert before any non-fixed hard regs that are at the
962 end. Registers of class NO_REGS cannot be used as an
963 equivalent for anything. */
964 while (lastr
< FIRST_PSEUDO_REGISTER
&& reg_eqv_table
[lastr
].prev
>= 0
965 && (REGNO_REG_CLASS (lastr
) == NO_REGS
|| ! FIXED_REGNO_P (lastr
))
966 && new_reg
>= FIRST_PSEUDO_REGISTER
)
967 lastr
= reg_eqv_table
[lastr
].prev
;
968 reg_eqv_table
[new_reg
].next
= reg_eqv_table
[lastr
].next
;
969 if (reg_eqv_table
[lastr
].next
>= 0)
970 reg_eqv_table
[reg_eqv_table
[lastr
].next
].prev
= new_reg
;
972 qty_table
[q
].last_reg
= new_reg
;
973 reg_eqv_table
[lastr
].next
= new_reg
;
974 reg_eqv_table
[new_reg
].prev
= lastr
;
978 /* Remove REG from its equivalence class. */
981 delete_reg_equiv (unsigned int reg
)
983 struct qty_table_elem
*ent
;
984 int q
= REG_QTY (reg
);
987 /* If invalid, do nothing. */
988 if (! REGNO_QTY_VALID_P (reg
))
993 p
= reg_eqv_table
[reg
].prev
;
994 n
= reg_eqv_table
[reg
].next
;
997 reg_eqv_table
[n
].prev
= p
;
1001 reg_eqv_table
[p
].next
= n
;
1005 REG_QTY (reg
) = -reg
- 1;
1008 /* Remove any invalid expressions from the hash table
1009 that refer to any of the registers contained in expression X.
1011 Make sure that newly inserted references to those registers
1012 as subexpressions will be considered valid.
1014 mention_regs is not called when a register itself
1015 is being stored in the table.
1017 Return 1 if we have done something that may have changed the hash code
1021 mention_regs (rtx x
)
1031 code
= GET_CODE (x
);
1034 unsigned int regno
= REGNO (x
);
1035 unsigned int endregno
= END_REGNO (x
);
1038 for (i
= regno
; i
< endregno
; i
++)
1040 if (REG_IN_TABLE (i
) >= 0 && REG_IN_TABLE (i
) != REG_TICK (i
))
1041 remove_invalid_refs (i
);
1043 REG_IN_TABLE (i
) = REG_TICK (i
);
1044 SUBREG_TICKED (i
) = -1;
1050 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1051 pseudo if they don't use overlapping words. We handle only pseudos
1052 here for simplicity. */
1053 if (code
== SUBREG
&& REG_P (SUBREG_REG (x
))
1054 && REGNO (SUBREG_REG (x
)) >= FIRST_PSEUDO_REGISTER
)
1056 unsigned int i
= REGNO (SUBREG_REG (x
));
1058 if (REG_IN_TABLE (i
) >= 0 && REG_IN_TABLE (i
) != REG_TICK (i
))
1060 /* If REG_IN_TABLE (i) differs from REG_TICK (i) by one, and
1061 the last store to this register really stored into this
1062 subreg, then remove the memory of this subreg.
1063 Otherwise, remove any memory of the entire register and
1064 all its subregs from the table. */
1065 if (REG_TICK (i
) - REG_IN_TABLE (i
) > 1
1066 || SUBREG_TICKED (i
) != REGNO (SUBREG_REG (x
)))
1067 remove_invalid_refs (i
);
1069 remove_invalid_subreg_refs (i
, SUBREG_BYTE (x
), GET_MODE (x
));
1072 REG_IN_TABLE (i
) = REG_TICK (i
);
1073 SUBREG_TICKED (i
) = REGNO (SUBREG_REG (x
));
1077 /* If X is a comparison or a COMPARE and either operand is a register
1078 that does not have a quantity, give it one. This is so that a later
1079 call to record_jump_equiv won't cause X to be assigned a different
1080 hash code and not found in the table after that call.
1082 It is not necessary to do this here, since rehash_using_reg can
1083 fix up the table later, but doing this here eliminates the need to
1084 call that expensive function in the most common case where the only
1085 use of the register is in the comparison. */
1087 if (code
== COMPARE
|| COMPARISON_P (x
))
1089 if (REG_P (XEXP (x
, 0))
1090 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0))))
1091 if (insert_regs (XEXP (x
, 0), NULL
, 0))
1093 rehash_using_reg (XEXP (x
, 0));
1097 if (REG_P (XEXP (x
, 1))
1098 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 1))))
1099 if (insert_regs (XEXP (x
, 1), NULL
, 0))
1101 rehash_using_reg (XEXP (x
, 1));
1106 fmt
= GET_RTX_FORMAT (code
);
1107 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1109 changed
|= mention_regs (XEXP (x
, i
));
1110 else if (fmt
[i
] == 'E')
1111 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1112 changed
|= mention_regs (XVECEXP (x
, i
, j
));
1117 /* Update the register quantities for inserting X into the hash table
1118 with a value equivalent to CLASSP.
1119 (If the class does not contain a REG, it is irrelevant.)
1120 If MODIFIED is nonzero, X is a destination; it is being modified.
1121 Note that delete_reg_equiv should be called on a register
1122 before insert_regs is done on that register with MODIFIED != 0.
1124 Nonzero value means that elements of reg_qty have changed
1125 so X's hash code may be different. */
1128 insert_regs (rtx x
, struct table_elt
*classp
, int modified
)
1132 unsigned int regno
= REGNO (x
);
1135 /* If REGNO is in the equivalence table already but is of the
1136 wrong mode for that equivalence, don't do anything here. */
1138 qty_valid
= REGNO_QTY_VALID_P (regno
);
1141 struct qty_table_elem
*ent
= &qty_table
[REG_QTY (regno
)];
1143 if (ent
->mode
!= GET_MODE (x
))
1147 if (modified
|| ! qty_valid
)
1150 for (classp
= classp
->first_same_value
;
1152 classp
= classp
->next_same_value
)
1153 if (REG_P (classp
->exp
)
1154 && GET_MODE (classp
->exp
) == GET_MODE (x
))
1156 unsigned c_regno
= REGNO (classp
->exp
);
1158 gcc_assert (REGNO_QTY_VALID_P (c_regno
));
1160 /* Suppose that 5 is hard reg and 100 and 101 are
1163 (set (reg:si 100) (reg:si 5))
1164 (set (reg:si 5) (reg:si 100))
1165 (set (reg:di 101) (reg:di 5))
1167 We would now set REG_QTY (101) = REG_QTY (5), but the
1168 entry for 5 is in SImode. When we use this later in
1169 copy propagation, we get the register in wrong mode. */
1170 if (qty_table
[REG_QTY (c_regno
)].mode
!= GET_MODE (x
))
1173 make_regs_eqv (regno
, c_regno
);
1177 /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
1178 than REG_IN_TABLE to find out if there was only a single preceding
1179 invalidation - for the SUBREG - or another one, which would be
1180 for the full register. However, if we find here that REG_TICK
1181 indicates that the register is invalid, it means that it has
1182 been invalidated in a separate operation. The SUBREG might be used
1183 now (then this is a recursive call), or we might use the full REG
1184 now and a SUBREG of it later. So bump up REG_TICK so that
1185 mention_regs will do the right thing. */
1187 && REG_IN_TABLE (regno
) >= 0
1188 && REG_TICK (regno
) == REG_IN_TABLE (regno
) + 1)
1190 make_new_qty (regno
, GET_MODE (x
));
1197 /* If X is a SUBREG, we will likely be inserting the inner register in the
1198 table. If that register doesn't have an assigned quantity number at
1199 this point but does later, the insertion that we will be doing now will
1200 not be accessible because its hash code will have changed. So assign
1201 a quantity number now. */
1203 else if (GET_CODE (x
) == SUBREG
&& REG_P (SUBREG_REG (x
))
1204 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x
))))
1206 insert_regs (SUBREG_REG (x
), NULL
, 0);
1211 return mention_regs (x
);
1215 /* Compute upper and lower anchors for CST. Also compute the offset of CST
1216 from these anchors/bases such that *_BASE + *_OFFS = CST. Return false iff
1217 CST is equal to an anchor. */
1220 compute_const_anchors (rtx cst
,
1221 HOST_WIDE_INT
*lower_base
, HOST_WIDE_INT
*lower_offs
,
1222 HOST_WIDE_INT
*upper_base
, HOST_WIDE_INT
*upper_offs
)
1224 HOST_WIDE_INT n
= INTVAL (cst
);
1226 *lower_base
= n
& ~(targetm
.const_anchor
- 1);
1227 if (*lower_base
== n
)
1231 (n
+ (targetm
.const_anchor
- 1)) & ~(targetm
.const_anchor
- 1);
1232 *upper_offs
= n
- *upper_base
;
1233 *lower_offs
= n
- *lower_base
;
1237 /* Insert the equivalence between ANCHOR and (REG + OFF) in mode MODE. */
1240 insert_const_anchor (HOST_WIDE_INT anchor
, rtx reg
, HOST_WIDE_INT offs
,
1241 enum machine_mode mode
)
1243 struct table_elt
*elt
;
1248 anchor_exp
= GEN_INT (anchor
);
1249 hash
= HASH (anchor_exp
, mode
);
1250 elt
= lookup (anchor_exp
, hash
, mode
);
1252 elt
= insert (anchor_exp
, NULL
, hash
, mode
);
1254 exp
= plus_constant (mode
, reg
, offs
);
1255 /* REG has just been inserted and the hash codes recomputed. */
1257 hash
= HASH (exp
, mode
);
1259 /* Use the cost of the register rather than the whole expression. When
1260 looking up constant anchors we will further offset the corresponding
1261 expression therefore it does not make sense to prefer REGs over
1262 reg-immediate additions. Prefer instead the oldest expression. Also
1263 don't prefer pseudos over hard regs so that we derive constants in
1264 argument registers from other argument registers rather than from the
1265 original pseudo that was used to synthesize the constant. */
1266 insert_with_costs (exp
, elt
, hash
, mode
, COST (reg
), 1);
1269 /* The constant CST is equivalent to the register REG. Create
1270 equivalences between the two anchors of CST and the corresponding
1271 register-offset expressions using REG. */
1274 insert_const_anchors (rtx reg
, rtx cst
, enum machine_mode mode
)
1276 HOST_WIDE_INT lower_base
, lower_offs
, upper_base
, upper_offs
;
1278 if (!compute_const_anchors (cst
, &lower_base
, &lower_offs
,
1279 &upper_base
, &upper_offs
))
1282 /* Ignore anchors of value 0. Constants accessible from zero are
1284 if (lower_base
!= 0)
1285 insert_const_anchor (lower_base
, reg
, -lower_offs
, mode
);
1287 if (upper_base
!= 0)
1288 insert_const_anchor (upper_base
, reg
, -upper_offs
, mode
);
1291 /* We need to express ANCHOR_ELT->exp + OFFS. Walk the equivalence list of
1292 ANCHOR_ELT and see if offsetting any of the entries by OFFS would create a
1293 valid expression. Return the cheapest and oldest of such expressions. In
1294 *OLD, return how old the resulting expression is compared to the other
1295 equivalent expressions. */
1298 find_reg_offset_for_const (struct table_elt
*anchor_elt
, HOST_WIDE_INT offs
,
1301 struct table_elt
*elt
;
1303 struct table_elt
*match_elt
;
1306 /* Find the cheapest and *oldest* expression to maximize the chance of
1307 reusing the same pseudo. */
1311 for (elt
= anchor_elt
->first_same_value
, idx
= 0;
1313 elt
= elt
->next_same_value
, idx
++)
1315 if (match_elt
&& CHEAPER (match_elt
, elt
))
1318 if (REG_P (elt
->exp
)
1319 || (GET_CODE (elt
->exp
) == PLUS
1320 && REG_P (XEXP (elt
->exp
, 0))
1321 && GET_CODE (XEXP (elt
->exp
, 1)) == CONST_INT
))
1325 /* Ignore expressions that are no longer valid. */
1326 if (!REG_P (elt
->exp
) && !exp_equiv_p (elt
->exp
, elt
->exp
, 1, false))
1329 x
= plus_constant (GET_MODE (elt
->exp
), elt
->exp
, offs
);
1331 || (GET_CODE (x
) == PLUS
1332 && IN_RANGE (INTVAL (XEXP (x
, 1)),
1333 -targetm
.const_anchor
,
1334 targetm
.const_anchor
- 1)))
1346 /* Try to express the constant SRC_CONST using a register+offset expression
1347 derived from a constant anchor. Return it if successful or NULL_RTX,
1351 try_const_anchors (rtx src_const
, enum machine_mode mode
)
1353 struct table_elt
*lower_elt
, *upper_elt
;
1354 HOST_WIDE_INT lower_base
, lower_offs
, upper_base
, upper_offs
;
1355 rtx lower_anchor_rtx
, upper_anchor_rtx
;
1356 rtx lower_exp
= NULL_RTX
, upper_exp
= NULL_RTX
;
1357 unsigned lower_old
, upper_old
;
1359 if (!compute_const_anchors (src_const
, &lower_base
, &lower_offs
,
1360 &upper_base
, &upper_offs
))
1363 lower_anchor_rtx
= GEN_INT (lower_base
);
1364 upper_anchor_rtx
= GEN_INT (upper_base
);
1365 lower_elt
= lookup (lower_anchor_rtx
, HASH (lower_anchor_rtx
, mode
), mode
);
1366 upper_elt
= lookup (upper_anchor_rtx
, HASH (upper_anchor_rtx
, mode
), mode
);
1369 lower_exp
= find_reg_offset_for_const (lower_elt
, lower_offs
, &lower_old
);
1371 upper_exp
= find_reg_offset_for_const (upper_elt
, upper_offs
, &upper_old
);
1378 /* Return the older expression. */
1379 return (upper_old
> lower_old
? upper_exp
: lower_exp
);
1382 /* Look in or update the hash table. */
1384 /* Remove table element ELT from use in the table.
1385 HASH is its hash code, made using the HASH macro.
1386 It's an argument because often that is known in advance
1387 and we save much time not recomputing it. */
1390 remove_from_table (struct table_elt
*elt
, unsigned int hash
)
1395 /* Mark this element as removed. See cse_insn. */
1396 elt
->first_same_value
= 0;
1398 /* Remove the table element from its equivalence class. */
1401 struct table_elt
*prev
= elt
->prev_same_value
;
1402 struct table_elt
*next
= elt
->next_same_value
;
1405 next
->prev_same_value
= prev
;
1408 prev
->next_same_value
= next
;
1411 struct table_elt
*newfirst
= next
;
1414 next
->first_same_value
= newfirst
;
1415 next
= next
->next_same_value
;
1420 /* Remove the table element from its hash bucket. */
1423 struct table_elt
*prev
= elt
->prev_same_hash
;
1424 struct table_elt
*next
= elt
->next_same_hash
;
1427 next
->prev_same_hash
= prev
;
1430 prev
->next_same_hash
= next
;
1431 else if (table
[hash
] == elt
)
1435 /* This entry is not in the proper hash bucket. This can happen
1436 when two classes were merged by `merge_equiv_classes'. Search
1437 for the hash bucket that it heads. This happens only very
1438 rarely, so the cost is acceptable. */
1439 for (hash
= 0; hash
< HASH_SIZE
; hash
++)
1440 if (table
[hash
] == elt
)
1445 /* Remove the table element from its related-value circular chain. */
1447 if (elt
->related_value
!= 0 && elt
->related_value
!= elt
)
1449 struct table_elt
*p
= elt
->related_value
;
1451 while (p
->related_value
!= elt
)
1452 p
= p
->related_value
;
1453 p
->related_value
= elt
->related_value
;
1454 if (p
->related_value
== p
)
1455 p
->related_value
= 0;
1458 /* Now add it to the free element chain. */
1459 elt
->next_same_hash
= free_element_chain
;
1460 free_element_chain
= elt
;
1463 /* Same as above, but X is a pseudo-register. */
1466 remove_pseudo_from_table (rtx x
, unsigned int hash
)
1468 struct table_elt
*elt
;
1470 /* Because a pseudo-register can be referenced in more than one
1471 mode, we might have to remove more than one table entry. */
1472 while ((elt
= lookup_for_remove (x
, hash
, VOIDmode
)))
1473 remove_from_table (elt
, hash
);
1476 /* Look up X in the hash table and return its table element,
1477 or 0 if X is not in the table.
1479 MODE is the machine-mode of X, or if X is an integer constant
1480 with VOIDmode then MODE is the mode with which X will be used.
1482 Here we are satisfied to find an expression whose tree structure
1485 static struct table_elt
*
1486 lookup (rtx x
, unsigned int hash
, enum machine_mode mode
)
1488 struct table_elt
*p
;
1490 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1491 if (mode
== p
->mode
&& ((x
== p
->exp
&& REG_P (x
))
1492 || exp_equiv_p (x
, p
->exp
, !REG_P (x
), false)))
1498 /* Like `lookup' but don't care whether the table element uses invalid regs.
1499 Also ignore discrepancies in the machine mode of a register. */
1501 static struct table_elt
*
1502 lookup_for_remove (rtx x
, unsigned int hash
, enum machine_mode mode
)
1504 struct table_elt
*p
;
1508 unsigned int regno
= REGNO (x
);
1510 /* Don't check the machine mode when comparing registers;
1511 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1512 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1514 && REGNO (p
->exp
) == regno
)
1519 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1521 && (x
== p
->exp
|| exp_equiv_p (x
, p
->exp
, 0, false)))
1528 /* Look for an expression equivalent to X and with code CODE.
1529 If one is found, return that expression. */
1532 lookup_as_function (rtx x
, enum rtx_code code
)
1535 = lookup (x
, SAFE_HASH (x
, VOIDmode
), GET_MODE (x
));
1540 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
1541 if (GET_CODE (p
->exp
) == code
1542 /* Make sure this is a valid entry in the table. */
1543 && exp_equiv_p (p
->exp
, p
->exp
, 1, false))
1549 /* Insert X in the hash table, assuming HASH is its hash code and
1550 CLASSP is an element of the class it should go in (or 0 if a new
1551 class should be made). COST is the code of X and reg_cost is the
1552 cost of registers in X. It is inserted at the proper position to
1553 keep the class in the order cheapest first.
1555 MODE is the machine-mode of X, or if X is an integer constant
1556 with VOIDmode then MODE is the mode with which X will be used.
1558 For elements of equal cheapness, the most recent one
1559 goes in front, except that the first element in the list
1560 remains first unless a cheaper element is added. The order of
1561 pseudo-registers does not matter, as canon_reg will be called to
1562 find the cheapest when a register is retrieved from the table.
1564 The in_memory field in the hash table element is set to 0.
1565 The caller must set it nonzero if appropriate.
1567 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1568 and if insert_regs returns a nonzero value
1569 you must then recompute its hash code before calling here.
1571 If necessary, update table showing constant values of quantities. */
1573 static struct table_elt
*
1574 insert_with_costs (rtx x
, struct table_elt
*classp
, unsigned int hash
,
1575 enum machine_mode mode
, int cost
, int reg_cost
)
1577 struct table_elt
*elt
;
1579 /* If X is a register and we haven't made a quantity for it,
1580 something is wrong. */
1581 gcc_assert (!REG_P (x
) || REGNO_QTY_VALID_P (REGNO (x
)));
1583 /* If X is a hard register, show it is being put in the table. */
1584 if (REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1585 add_to_hard_reg_set (&hard_regs_in_table
, GET_MODE (x
), REGNO (x
));
1587 /* Put an element for X into the right hash bucket. */
1589 elt
= free_element_chain
;
1591 free_element_chain
= elt
->next_same_hash
;
1593 elt
= XNEW (struct table_elt
);
1596 elt
->canon_exp
= NULL_RTX
;
1598 elt
->regcost
= reg_cost
;
1599 elt
->next_same_value
= 0;
1600 elt
->prev_same_value
= 0;
1601 elt
->next_same_hash
= table
[hash
];
1602 elt
->prev_same_hash
= 0;
1603 elt
->related_value
= 0;
1606 elt
->is_const
= (CONSTANT_P (x
) || fixed_base_plus_p (x
));
1609 table
[hash
]->prev_same_hash
= elt
;
1612 /* Put it into the proper value-class. */
1615 classp
= classp
->first_same_value
;
1616 if (CHEAPER (elt
, classp
))
1617 /* Insert at the head of the class. */
1619 struct table_elt
*p
;
1620 elt
->next_same_value
= classp
;
1621 classp
->prev_same_value
= elt
;
1622 elt
->first_same_value
= elt
;
1624 for (p
= classp
; p
; p
= p
->next_same_value
)
1625 p
->first_same_value
= elt
;
1629 /* Insert not at head of the class. */
1630 /* Put it after the last element cheaper than X. */
1631 struct table_elt
*p
, *next
;
1634 (next
= p
->next_same_value
) && CHEAPER (next
, elt
);
1638 /* Put it after P and before NEXT. */
1639 elt
->next_same_value
= next
;
1641 next
->prev_same_value
= elt
;
1643 elt
->prev_same_value
= p
;
1644 p
->next_same_value
= elt
;
1645 elt
->first_same_value
= classp
;
1649 elt
->first_same_value
= elt
;
1651 /* If this is a constant being set equivalent to a register or a register
1652 being set equivalent to a constant, note the constant equivalence.
1654 If this is a constant, it cannot be equivalent to a different constant,
1655 and a constant is the only thing that can be cheaper than a register. So
1656 we know the register is the head of the class (before the constant was
1659 If this is a register that is not already known equivalent to a
1660 constant, we must check the entire class.
1662 If this is a register that is already known equivalent to an insn,
1663 update the qtys `const_insn' to show that `this_insn' is the latest
1664 insn making that quantity equivalent to the constant. */
1666 if (elt
->is_const
&& classp
&& REG_P (classp
->exp
)
1669 int exp_q
= REG_QTY (REGNO (classp
->exp
));
1670 struct qty_table_elem
*exp_ent
= &qty_table
[exp_q
];
1672 exp_ent
->const_rtx
= gen_lowpart (exp_ent
->mode
, x
);
1673 exp_ent
->const_insn
= this_insn
;
1678 && ! qty_table
[REG_QTY (REGNO (x
))].const_rtx
1681 struct table_elt
*p
;
1683 for (p
= classp
; p
!= 0; p
= p
->next_same_value
)
1685 if (p
->is_const
&& !REG_P (p
->exp
))
1687 int x_q
= REG_QTY (REGNO (x
));
1688 struct qty_table_elem
*x_ent
= &qty_table
[x_q
];
1691 = gen_lowpart (GET_MODE (x
), p
->exp
);
1692 x_ent
->const_insn
= this_insn
;
1699 && qty_table
[REG_QTY (REGNO (x
))].const_rtx
1700 && GET_MODE (x
) == qty_table
[REG_QTY (REGNO (x
))].mode
)
1701 qty_table
[REG_QTY (REGNO (x
))].const_insn
= this_insn
;
1703 /* If this is a constant with symbolic value,
1704 and it has a term with an explicit integer value,
1705 link it up with related expressions. */
1706 if (GET_CODE (x
) == CONST
)
1708 rtx subexp
= get_related_value (x
);
1710 struct table_elt
*subelt
, *subelt_prev
;
1714 /* Get the integer-free subexpression in the hash table. */
1715 subhash
= SAFE_HASH (subexp
, mode
);
1716 subelt
= lookup (subexp
, subhash
, mode
);
1718 subelt
= insert (subexp
, NULL
, subhash
, mode
);
1719 /* Initialize SUBELT's circular chain if it has none. */
1720 if (subelt
->related_value
== 0)
1721 subelt
->related_value
= subelt
;
1722 /* Find the element in the circular chain that precedes SUBELT. */
1723 subelt_prev
= subelt
;
1724 while (subelt_prev
->related_value
!= subelt
)
1725 subelt_prev
= subelt_prev
->related_value
;
1726 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1727 This way the element that follows SUBELT is the oldest one. */
1728 elt
->related_value
= subelt_prev
->related_value
;
1729 subelt_prev
->related_value
= elt
;
1736 /* Wrap insert_with_costs by passing the default costs. */
1738 static struct table_elt
*
1739 insert (rtx x
, struct table_elt
*classp
, unsigned int hash
,
1740 enum machine_mode mode
)
1743 insert_with_costs (x
, classp
, hash
, mode
, COST (x
), approx_reg_cost (x
));
1747 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1748 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1749 the two classes equivalent.
1751 CLASS1 will be the surviving class; CLASS2 should not be used after this
1754 Any invalid entries in CLASS2 will not be copied. */
1757 merge_equiv_classes (struct table_elt
*class1
, struct table_elt
*class2
)
1759 struct table_elt
*elt
, *next
, *new_elt
;
1761 /* Ensure we start with the head of the classes. */
1762 class1
= class1
->first_same_value
;
1763 class2
= class2
->first_same_value
;
1765 /* If they were already equal, forget it. */
1766 if (class1
== class2
)
1769 for (elt
= class2
; elt
; elt
= next
)
1773 enum machine_mode mode
= elt
->mode
;
1775 next
= elt
->next_same_value
;
1777 /* Remove old entry, make a new one in CLASS1's class.
1778 Don't do this for invalid entries as we cannot find their
1779 hash code (it also isn't necessary). */
1780 if (REG_P (exp
) || exp_equiv_p (exp
, exp
, 1, false))
1782 bool need_rehash
= false;
1784 hash_arg_in_memory
= 0;
1785 hash
= HASH (exp
, mode
);
1789 need_rehash
= REGNO_QTY_VALID_P (REGNO (exp
));
1790 delete_reg_equiv (REGNO (exp
));
1793 if (REG_P (exp
) && REGNO (exp
) >= FIRST_PSEUDO_REGISTER
)
1794 remove_pseudo_from_table (exp
, hash
);
1796 remove_from_table (elt
, hash
);
1798 if (insert_regs (exp
, class1
, 0) || need_rehash
)
1800 rehash_using_reg (exp
);
1801 hash
= HASH (exp
, mode
);
1803 new_elt
= insert (exp
, class1
, hash
, mode
);
1804 new_elt
->in_memory
= hash_arg_in_memory
;
1809 /* Flush the entire hash table. */
1812 flush_hash_table (void)
1815 struct table_elt
*p
;
1817 for (i
= 0; i
< HASH_SIZE
; i
++)
1818 for (p
= table
[i
]; p
; p
= table
[i
])
1820 /* Note that invalidate can remove elements
1821 after P in the current hash chain. */
1823 invalidate (p
->exp
, VOIDmode
);
1825 remove_from_table (p
, i
);
1829 /* Function called for each rtx to check whether true dependence exist. */
1830 struct check_dependence_data
1832 enum machine_mode mode
;
1838 check_dependence (rtx
*x
, void *data
)
1840 struct check_dependence_data
*d
= (struct check_dependence_data
*) data
;
1841 if (*x
&& MEM_P (*x
))
1842 return canon_true_dependence (d
->exp
, d
->mode
, d
->addr
, *x
, NULL_RTX
);
1847 /* Remove from the hash table, or mark as invalid, all expressions whose
1848 values could be altered by storing in X. X is a register, a subreg, or
1849 a memory reference with nonvarying address (because, when a memory
1850 reference with a varying address is stored in, all memory references are
1851 removed by invalidate_memory so specific invalidation is superfluous).
1852 FULL_MODE, if not VOIDmode, indicates that this much should be
1853 invalidated instead of just the amount indicated by the mode of X. This
1854 is only used for bitfield stores into memory.
1856 A nonvarying address may be just a register or just a symbol reference,
1857 or it may be either of those plus a numeric offset. */
1860 invalidate (rtx x
, enum machine_mode full_mode
)
1863 struct table_elt
*p
;
1866 switch (GET_CODE (x
))
1870 /* If X is a register, dependencies on its contents are recorded
1871 through the qty number mechanism. Just change the qty number of
1872 the register, mark it as invalid for expressions that refer to it,
1873 and remove it itself. */
1874 unsigned int regno
= REGNO (x
);
1875 unsigned int hash
= HASH (x
, GET_MODE (x
));
1877 /* Remove REGNO from any quantity list it might be on and indicate
1878 that its value might have changed. If it is a pseudo, remove its
1879 entry from the hash table.
1881 For a hard register, we do the first two actions above for any
1882 additional hard registers corresponding to X. Then, if any of these
1883 registers are in the table, we must remove any REG entries that
1884 overlap these registers. */
1886 delete_reg_equiv (regno
);
1888 SUBREG_TICKED (regno
) = -1;
1890 if (regno
>= FIRST_PSEUDO_REGISTER
)
1891 remove_pseudo_from_table (x
, hash
);
1894 HOST_WIDE_INT in_table
1895 = TEST_HARD_REG_BIT (hard_regs_in_table
, regno
);
1896 unsigned int endregno
= END_HARD_REGNO (x
);
1897 unsigned int tregno
, tendregno
, rn
;
1898 struct table_elt
*p
, *next
;
1900 CLEAR_HARD_REG_BIT (hard_regs_in_table
, regno
);
1902 for (rn
= regno
+ 1; rn
< endregno
; rn
++)
1904 in_table
|= TEST_HARD_REG_BIT (hard_regs_in_table
, rn
);
1905 CLEAR_HARD_REG_BIT (hard_regs_in_table
, rn
);
1906 delete_reg_equiv (rn
);
1908 SUBREG_TICKED (rn
) = -1;
1912 for (hash
= 0; hash
< HASH_SIZE
; hash
++)
1913 for (p
= table
[hash
]; p
; p
= next
)
1915 next
= p
->next_same_hash
;
1918 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1921 tregno
= REGNO (p
->exp
);
1922 tendregno
= END_HARD_REGNO (p
->exp
);
1923 if (tendregno
> regno
&& tregno
< endregno
)
1924 remove_from_table (p
, hash
);
1931 invalidate (SUBREG_REG (x
), VOIDmode
);
1935 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; --i
)
1936 invalidate (XVECEXP (x
, 0, i
), VOIDmode
);
1940 /* This is part of a disjoint return value; extract the location in
1941 question ignoring the offset. */
1942 invalidate (XEXP (x
, 0), VOIDmode
);
1946 addr
= canon_rtx (get_addr (XEXP (x
, 0)));
1947 /* Calculate the canonical version of X here so that
1948 true_dependence doesn't generate new RTL for X on each call. */
1951 /* Remove all hash table elements that refer to overlapping pieces of
1953 if (full_mode
== VOIDmode
)
1954 full_mode
= GET_MODE (x
);
1956 for (i
= 0; i
< HASH_SIZE
; i
++)
1958 struct table_elt
*next
;
1960 for (p
= table
[i
]; p
; p
= next
)
1962 next
= p
->next_same_hash
;
1965 struct check_dependence_data d
;
1967 /* Just canonicalize the expression once;
1968 otherwise each time we call invalidate
1969 true_dependence will canonicalize the
1970 expression again. */
1972 p
->canon_exp
= canon_rtx (p
->exp
);
1976 if (for_each_rtx (&p
->canon_exp
, check_dependence
, &d
))
1977 remove_from_table (p
, i
);
1988 /* Remove all expressions that refer to register REGNO,
1989 since they are already invalid, and we are about to
1990 mark that register valid again and don't want the old
1991 expressions to reappear as valid. */
1994 remove_invalid_refs (unsigned int regno
)
1997 struct table_elt
*p
, *next
;
1999 for (i
= 0; i
< HASH_SIZE
; i
++)
2000 for (p
= table
[i
]; p
; p
= next
)
2002 next
= p
->next_same_hash
;
2004 && refers_to_regno_p (regno
, regno
+ 1, p
->exp
, (rtx
*) 0))
2005 remove_from_table (p
, i
);
2009 /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET,
2012 remove_invalid_subreg_refs (unsigned int regno
, unsigned int offset
,
2013 enum machine_mode mode
)
2016 struct table_elt
*p
, *next
;
2017 unsigned int end
= offset
+ (GET_MODE_SIZE (mode
) - 1);
2019 for (i
= 0; i
< HASH_SIZE
; i
++)
2020 for (p
= table
[i
]; p
; p
= next
)
2023 next
= p
->next_same_hash
;
2026 && (GET_CODE (exp
) != SUBREG
2027 || !REG_P (SUBREG_REG (exp
))
2028 || REGNO (SUBREG_REG (exp
)) != regno
2029 || (((SUBREG_BYTE (exp
)
2030 + (GET_MODE_SIZE (GET_MODE (exp
)) - 1)) >= offset
)
2031 && SUBREG_BYTE (exp
) <= end
))
2032 && refers_to_regno_p (regno
, regno
+ 1, p
->exp
, (rtx
*) 0))
2033 remove_from_table (p
, i
);
2037 /* Recompute the hash codes of any valid entries in the hash table that
2038 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
2040 This is called when we make a jump equivalence. */
2043 rehash_using_reg (rtx x
)
2046 struct table_elt
*p
, *next
;
2049 if (GET_CODE (x
) == SUBREG
)
2052 /* If X is not a register or if the register is known not to be in any
2053 valid entries in the table, we have no work to do. */
2056 || REG_IN_TABLE (REGNO (x
)) < 0
2057 || REG_IN_TABLE (REGNO (x
)) != REG_TICK (REGNO (x
)))
2060 /* Scan all hash chains looking for valid entries that mention X.
2061 If we find one and it is in the wrong hash chain, move it. */
2063 for (i
= 0; i
< HASH_SIZE
; i
++)
2064 for (p
= table
[i
]; p
; p
= next
)
2066 next
= p
->next_same_hash
;
2067 if (reg_mentioned_p (x
, p
->exp
)
2068 && exp_equiv_p (p
->exp
, p
->exp
, 1, false)
2069 && i
!= (hash
= SAFE_HASH (p
->exp
, p
->mode
)))
2071 if (p
->next_same_hash
)
2072 p
->next_same_hash
->prev_same_hash
= p
->prev_same_hash
;
2074 if (p
->prev_same_hash
)
2075 p
->prev_same_hash
->next_same_hash
= p
->next_same_hash
;
2077 table
[i
] = p
->next_same_hash
;
2079 p
->next_same_hash
= table
[hash
];
2080 p
->prev_same_hash
= 0;
2082 table
[hash
]->prev_same_hash
= p
;
2088 /* Remove from the hash table any expression that is a call-clobbered
2089 register. Also update their TICK values. */
2092 invalidate_for_call (void)
2094 unsigned int regno
, endregno
;
2097 struct table_elt
*p
, *next
;
2100 /* Go through all the hard registers. For each that is clobbered in
2101 a CALL_INSN, remove the register from quantity chains and update
2102 reg_tick if defined. Also see if any of these registers is currently
2105 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
2106 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, regno
))
2108 delete_reg_equiv (regno
);
2109 if (REG_TICK (regno
) >= 0)
2112 SUBREG_TICKED (regno
) = -1;
2115 in_table
|= (TEST_HARD_REG_BIT (hard_regs_in_table
, regno
) != 0);
2118 /* In the case where we have no call-clobbered hard registers in the
2119 table, we are done. Otherwise, scan the table and remove any
2120 entry that overlaps a call-clobbered register. */
2123 for (hash
= 0; hash
< HASH_SIZE
; hash
++)
2124 for (p
= table
[hash
]; p
; p
= next
)
2126 next
= p
->next_same_hash
;
2129 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
2132 regno
= REGNO (p
->exp
);
2133 endregno
= END_HARD_REGNO (p
->exp
);
2135 for (i
= regno
; i
< endregno
; i
++)
2136 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, i
))
2138 remove_from_table (p
, hash
);
2144 /* Given an expression X of type CONST,
2145 and ELT which is its table entry (or 0 if it
2146 is not in the hash table),
2147 return an alternate expression for X as a register plus integer.
2148 If none can be found, return 0. */
2151 use_related_value (rtx x
, struct table_elt
*elt
)
2153 struct table_elt
*relt
= 0;
2154 struct table_elt
*p
, *q
;
2155 HOST_WIDE_INT offset
;
2157 /* First, is there anything related known?
2158 If we have a table element, we can tell from that.
2159 Otherwise, must look it up. */
2161 if (elt
!= 0 && elt
->related_value
!= 0)
2163 else if (elt
== 0 && GET_CODE (x
) == CONST
)
2165 rtx subexp
= get_related_value (x
);
2167 relt
= lookup (subexp
,
2168 SAFE_HASH (subexp
, GET_MODE (subexp
)),
2175 /* Search all related table entries for one that has an
2176 equivalent register. */
2181 /* This loop is strange in that it is executed in two different cases.
2182 The first is when X is already in the table. Then it is searching
2183 the RELATED_VALUE list of X's class (RELT). The second case is when
2184 X is not in the table. Then RELT points to a class for the related
2187 Ensure that, whatever case we are in, that we ignore classes that have
2188 the same value as X. */
2190 if (rtx_equal_p (x
, p
->exp
))
2193 for (q
= p
->first_same_value
; q
; q
= q
->next_same_value
)
2200 p
= p
->related_value
;
2202 /* We went all the way around, so there is nothing to be found.
2203 Alternatively, perhaps RELT was in the table for some other reason
2204 and it has no related values recorded. */
2205 if (p
== relt
|| p
== 0)
2212 offset
= (get_integer_term (x
) - get_integer_term (p
->exp
));
2213 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2214 return plus_constant (q
->mode
, q
->exp
, offset
);
2218 /* Hash a string. Just add its bytes up. */
2219 static inline unsigned
2220 hash_rtx_string (const char *ps
)
2223 const unsigned char *p
= (const unsigned char *) ps
;
2232 /* Same as hash_rtx, but call CB on each rtx if it is not NULL.
2233 When the callback returns true, we continue with the new rtx. */
2236 hash_rtx_cb (const_rtx x
, enum machine_mode mode
,
2237 int *do_not_record_p
, int *hash_arg_in_memory_p
,
2238 bool have_reg_qty
, hash_rtx_callback_function cb
)
2244 enum machine_mode newmode
;
2247 /* Used to turn recursion into iteration. We can't rely on GCC's
2248 tail-recursion elimination since we need to keep accumulating values
2254 /* Invoke the callback first. */
2256 && ((*cb
) (x
, mode
, &newx
, &newmode
)))
2258 hash
+= hash_rtx_cb (newx
, newmode
, do_not_record_p
,
2259 hash_arg_in_memory_p
, have_reg_qty
, cb
);
2263 code
= GET_CODE (x
);
2268 unsigned int regno
= REGNO (x
);
2270 if (do_not_record_p
&& !reload_completed
)
2272 /* On some machines, we can't record any non-fixed hard register,
2273 because extending its life will cause reload problems. We
2274 consider ap, fp, sp, gp to be fixed for this purpose.
2276 We also consider CCmode registers to be fixed for this purpose;
2277 failure to do so leads to failure to simplify 0<100 type of
2280 On all machines, we can't record any global registers.
2281 Nor should we record any register that is in a small
2282 class, as defined by TARGET_CLASS_LIKELY_SPILLED_P. */
2285 if (regno
>= FIRST_PSEUDO_REGISTER
)
2287 else if (x
== frame_pointer_rtx
2288 || x
== hard_frame_pointer_rtx
2289 || x
== arg_pointer_rtx
2290 || x
== stack_pointer_rtx
2291 || x
== pic_offset_table_rtx
)
2293 else if (global_regs
[regno
])
2295 else if (fixed_regs
[regno
])
2297 else if (GET_MODE_CLASS (GET_MODE (x
)) == MODE_CC
)
2299 else if (targetm
.small_register_classes_for_mode_p (GET_MODE (x
)))
2301 else if (targetm
.class_likely_spilled_p (REGNO_REG_CLASS (regno
)))
2308 *do_not_record_p
= 1;
2313 hash
+= ((unsigned int) REG
<< 7);
2314 hash
+= (have_reg_qty
? (unsigned) REG_QTY (regno
) : regno
);
2318 /* We handle SUBREG of a REG specially because the underlying
2319 reg changes its hash value with every value change; we don't
2320 want to have to forget unrelated subregs when one subreg changes. */
2323 if (REG_P (SUBREG_REG (x
)))
2325 hash
+= (((unsigned int) SUBREG
<< 7)
2326 + REGNO (SUBREG_REG (x
))
2327 + (SUBREG_BYTE (x
) / UNITS_PER_WORD
));
2334 hash
+= (((unsigned int) CONST_INT
<< 7) + (unsigned int) mode
2335 + (unsigned int) INTVAL (x
));
2339 /* This is like the general case, except that it only counts
2340 the integers representing the constant. */
2341 hash
+= (unsigned int) code
+ (unsigned int) GET_MODE (x
);
2342 if (GET_MODE (x
) != VOIDmode
)
2343 hash
+= real_hash (CONST_DOUBLE_REAL_VALUE (x
));
2345 hash
+= ((unsigned int) CONST_DOUBLE_LOW (x
)
2346 + (unsigned int) CONST_DOUBLE_HIGH (x
));
2350 hash
+= (unsigned int) code
+ (unsigned int) GET_MODE (x
);
2351 hash
+= fixed_hash (CONST_FIXED_VALUE (x
));
2359 units
= CONST_VECTOR_NUNITS (x
);
2361 for (i
= 0; i
< units
; ++i
)
2363 elt
= CONST_VECTOR_ELT (x
, i
);
2364 hash
+= hash_rtx_cb (elt
, GET_MODE (elt
),
2365 do_not_record_p
, hash_arg_in_memory_p
,
2372 /* Assume there is only one rtx object for any given label. */
2374 /* We don't hash on the address of the CODE_LABEL to avoid bootstrap
2375 differences and differences between each stage's debugging dumps. */
2376 hash
+= (((unsigned int) LABEL_REF
<< 7)
2377 + CODE_LABEL_NUMBER (XEXP (x
, 0)));
2382 /* Don't hash on the symbol's address to avoid bootstrap differences.
2383 Different hash values may cause expressions to be recorded in
2384 different orders and thus different registers to be used in the
2385 final assembler. This also avoids differences in the dump files
2386 between various stages. */
2388 const unsigned char *p
= (const unsigned char *) XSTR (x
, 0);
2391 h
+= (h
<< 7) + *p
++; /* ??? revisit */
2393 hash
+= ((unsigned int) SYMBOL_REF
<< 7) + h
;
2398 /* We don't record if marked volatile or if BLKmode since we don't
2399 know the size of the move. */
2400 if (do_not_record_p
&& (MEM_VOLATILE_P (x
) || GET_MODE (x
) == BLKmode
))
2402 *do_not_record_p
= 1;
2405 if (hash_arg_in_memory_p
&& !MEM_READONLY_P (x
))
2406 *hash_arg_in_memory_p
= 1;
2408 /* Now that we have already found this special case,
2409 might as well speed it up as much as possible. */
2410 hash
+= (unsigned) MEM
;
2415 /* A USE that mentions non-volatile memory needs special
2416 handling since the MEM may be BLKmode which normally
2417 prevents an entry from being made. Pure calls are
2418 marked by a USE which mentions BLKmode memory.
2419 See calls.c:emit_call_1. */
2420 if (MEM_P (XEXP (x
, 0))
2421 && ! MEM_VOLATILE_P (XEXP (x
, 0)))
2423 hash
+= (unsigned) USE
;
2426 if (hash_arg_in_memory_p
&& !MEM_READONLY_P (x
))
2427 *hash_arg_in_memory_p
= 1;
2429 /* Now that we have already found this special case,
2430 might as well speed it up as much as possible. */
2431 hash
+= (unsigned) MEM
;
2446 case UNSPEC_VOLATILE
:
2447 if (do_not_record_p
) {
2448 *do_not_record_p
= 1;
2456 if (do_not_record_p
&& MEM_VOLATILE_P (x
))
2458 *do_not_record_p
= 1;
2463 /* We don't want to take the filename and line into account. */
2464 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
)
2465 + hash_rtx_string (ASM_OPERANDS_TEMPLATE (x
))
2466 + hash_rtx_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x
))
2467 + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x
);
2469 if (ASM_OPERANDS_INPUT_LENGTH (x
))
2471 for (i
= 1; i
< ASM_OPERANDS_INPUT_LENGTH (x
); i
++)
2473 hash
+= (hash_rtx_cb (ASM_OPERANDS_INPUT (x
, i
),
2474 GET_MODE (ASM_OPERANDS_INPUT (x
, i
)),
2475 do_not_record_p
, hash_arg_in_memory_p
,
2478 (ASM_OPERANDS_INPUT_CONSTRAINT (x
, i
)));
2481 hash
+= hash_rtx_string (ASM_OPERANDS_INPUT_CONSTRAINT (x
, 0));
2482 x
= ASM_OPERANDS_INPUT (x
, 0);
2483 mode
= GET_MODE (x
);
2495 i
= GET_RTX_LENGTH (code
) - 1;
2496 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
);
2497 fmt
= GET_RTX_FORMAT (code
);
2503 /* If we are about to do the last recursive call
2504 needed at this level, change it into iteration.
2505 This function is called enough to be worth it. */
2512 hash
+= hash_rtx_cb (XEXP (x
, i
), VOIDmode
, do_not_record_p
,
2513 hash_arg_in_memory_p
,
2518 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2519 hash
+= hash_rtx_cb (XVECEXP (x
, i
, j
), VOIDmode
, do_not_record_p
,
2520 hash_arg_in_memory_p
,
2525 hash
+= hash_rtx_string (XSTR (x
, i
));
2529 hash
+= (unsigned int) XINT (x
, i
);
2544 /* Hash an rtx. We are careful to make sure the value is never negative.
2545 Equivalent registers hash identically.
2546 MODE is used in hashing for CONST_INTs only;
2547 otherwise the mode of X is used.
2549 Store 1 in DO_NOT_RECORD_P if any subexpression is volatile.
2551 If HASH_ARG_IN_MEMORY_P is not NULL, store 1 in it if X contains
2552 a MEM rtx which does not have the RTX_UNCHANGING_P bit set.
2554 Note that cse_insn knows that the hash code of a MEM expression
2555 is just (int) MEM plus the hash code of the address. */
2558 hash_rtx (const_rtx x
, enum machine_mode mode
, int *do_not_record_p
,
2559 int *hash_arg_in_memory_p
, bool have_reg_qty
)
2561 return hash_rtx_cb (x
, mode
, do_not_record_p
,
2562 hash_arg_in_memory_p
, have_reg_qty
, NULL
);
2565 /* Hash an rtx X for cse via hash_rtx.
2566 Stores 1 in do_not_record if any subexpression is volatile.
2567 Stores 1 in hash_arg_in_memory if X contains a mem rtx which
2568 does not have the RTX_UNCHANGING_P bit set. */
2570 static inline unsigned
2571 canon_hash (rtx x
, enum machine_mode mode
)
2573 return hash_rtx (x
, mode
, &do_not_record
, &hash_arg_in_memory
, true);
2576 /* Like canon_hash but with no side effects, i.e. do_not_record
2577 and hash_arg_in_memory are not changed. */
2579 static inline unsigned
2580 safe_hash (rtx x
, enum machine_mode mode
)
2582 int dummy_do_not_record
;
2583 return hash_rtx (x
, mode
, &dummy_do_not_record
, NULL
, true);
2586 /* Return 1 iff X and Y would canonicalize into the same thing,
2587 without actually constructing the canonicalization of either one.
2588 If VALIDATE is nonzero,
2589 we assume X is an expression being processed from the rtl
2590 and Y was found in the hash table. We check register refs
2591 in Y for being marked as valid.
2593 If FOR_GCSE is true, we compare X and Y for equivalence for GCSE. */
2596 exp_equiv_p (const_rtx x
, const_rtx y
, int validate
, bool for_gcse
)
2602 /* Note: it is incorrect to assume an expression is equivalent to itself
2603 if VALIDATE is nonzero. */
2604 if (x
== y
&& !validate
)
2607 if (x
== 0 || y
== 0)
2610 code
= GET_CODE (x
);
2611 if (code
!= GET_CODE (y
))
2614 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2615 if (GET_MODE (x
) != GET_MODE (y
))
2618 /* MEMs referring to different address space are not equivalent. */
2619 if (code
== MEM
&& MEM_ADDR_SPACE (x
) != MEM_ADDR_SPACE (y
))
2632 return XEXP (x
, 0) == XEXP (y
, 0);
2635 return XSTR (x
, 0) == XSTR (y
, 0);
2639 return REGNO (x
) == REGNO (y
);
2642 unsigned int regno
= REGNO (y
);
2644 unsigned int endregno
= END_REGNO (y
);
2646 /* If the quantities are not the same, the expressions are not
2647 equivalent. If there are and we are not to validate, they
2648 are equivalent. Otherwise, ensure all regs are up-to-date. */
2650 if (REG_QTY (REGNO (x
)) != REG_QTY (regno
))
2656 for (i
= regno
; i
< endregno
; i
++)
2657 if (REG_IN_TABLE (i
) != REG_TICK (i
))
2666 /* A volatile mem should not be considered equivalent to any
2668 if (MEM_VOLATILE_P (x
) || MEM_VOLATILE_P (y
))
2671 /* Can't merge two expressions in different alias sets, since we
2672 can decide that the expression is transparent in a block when
2673 it isn't, due to it being set with the different alias set.
2675 Also, can't merge two expressions with different MEM_ATTRS.
2676 They could e.g. be two different entities allocated into the
2677 same space on the stack (see e.g. PR25130). In that case, the
2678 MEM addresses can be the same, even though the two MEMs are
2679 absolutely not equivalent.
2681 But because really all MEM attributes should be the same for
2682 equivalent MEMs, we just use the invariant that MEMs that have
2683 the same attributes share the same mem_attrs data structure. */
2684 if (MEM_ATTRS (x
) != MEM_ATTRS (y
))
2689 /* For commutative operations, check both orders. */
2697 return ((exp_equiv_p (XEXP (x
, 0), XEXP (y
, 0),
2699 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 1),
2700 validate
, for_gcse
))
2701 || (exp_equiv_p (XEXP (x
, 0), XEXP (y
, 1),
2703 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 0),
2704 validate
, for_gcse
)));
2707 /* We don't use the generic code below because we want to
2708 disregard filename and line numbers. */
2710 /* A volatile asm isn't equivalent to any other. */
2711 if (MEM_VOLATILE_P (x
) || MEM_VOLATILE_P (y
))
2714 if (GET_MODE (x
) != GET_MODE (y
)
2715 || strcmp (ASM_OPERANDS_TEMPLATE (x
), ASM_OPERANDS_TEMPLATE (y
))
2716 || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x
),
2717 ASM_OPERANDS_OUTPUT_CONSTRAINT (y
))
2718 || ASM_OPERANDS_OUTPUT_IDX (x
) != ASM_OPERANDS_OUTPUT_IDX (y
)
2719 || ASM_OPERANDS_INPUT_LENGTH (x
) != ASM_OPERANDS_INPUT_LENGTH (y
))
2722 if (ASM_OPERANDS_INPUT_LENGTH (x
))
2724 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
2725 if (! exp_equiv_p (ASM_OPERANDS_INPUT (x
, i
),
2726 ASM_OPERANDS_INPUT (y
, i
),
2728 || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x
, i
),
2729 ASM_OPERANDS_INPUT_CONSTRAINT (y
, i
)))
2739 /* Compare the elements. If any pair of corresponding elements
2740 fail to match, return 0 for the whole thing. */
2742 fmt
= GET_RTX_FORMAT (code
);
2743 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2748 if (! exp_equiv_p (XEXP (x
, i
), XEXP (y
, i
),
2749 validate
, for_gcse
))
2754 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2756 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2757 if (! exp_equiv_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
),
2758 validate
, for_gcse
))
2763 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
2768 if (XINT (x
, i
) != XINT (y
, i
))
2773 if (XWINT (x
, i
) != XWINT (y
, i
))
2789 /* Subroutine of canon_reg. Pass *XLOC through canon_reg, and validate
2790 the result if necessary. INSN is as for canon_reg. */
2793 validate_canon_reg (rtx
*xloc
, rtx insn
)
2797 rtx new_rtx
= canon_reg (*xloc
, insn
);
2799 /* If replacing pseudo with hard reg or vice versa, ensure the
2800 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2801 gcc_assert (insn
&& new_rtx
);
2802 validate_change (insn
, xloc
, new_rtx
, 1);
2806 /* Canonicalize an expression:
2807 replace each register reference inside it
2808 with the "oldest" equivalent register.
2810 If INSN is nonzero validate_change is used to ensure that INSN remains valid
2811 after we make our substitution. The calls are made with IN_GROUP nonzero
2812 so apply_change_group must be called upon the outermost return from this
2813 function (unless INSN is zero). The result of apply_change_group can
2814 generally be discarded since the changes we are making are optional. */
2817 canon_reg (rtx x
, rtx insn
)
2826 code
= GET_CODE (x
);
2846 struct qty_table_elem
*ent
;
2848 /* Never replace a hard reg, because hard regs can appear
2849 in more than one machine mode, and we must preserve the mode
2850 of each occurrence. Also, some hard regs appear in
2851 MEMs that are shared and mustn't be altered. Don't try to
2852 replace any reg that maps to a reg of class NO_REGS. */
2853 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
2854 || ! REGNO_QTY_VALID_P (REGNO (x
)))
2857 q
= REG_QTY (REGNO (x
));
2858 ent
= &qty_table
[q
];
2859 first
= ent
->first_reg
;
2860 return (first
>= FIRST_PSEUDO_REGISTER
? regno_reg_rtx
[first
]
2861 : REGNO_REG_CLASS (first
) == NO_REGS
? x
2862 : gen_rtx_REG (ent
->mode
, first
));
2869 fmt
= GET_RTX_FORMAT (code
);
2870 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2875 validate_canon_reg (&XEXP (x
, i
), insn
);
2876 else if (fmt
[i
] == 'E')
2877 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2878 validate_canon_reg (&XVECEXP (x
, i
, j
), insn
);
2884 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2885 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2886 what values are being compared.
2888 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2889 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2890 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2891 compared to produce cc0.
2893 The return value is the comparison operator and is either the code of
2894 A or the code corresponding to the inverse of the comparison. */
2896 static enum rtx_code
2897 find_comparison_args (enum rtx_code code
, rtx
*parg1
, rtx
*parg2
,
2898 enum machine_mode
*pmode1
, enum machine_mode
*pmode2
)
2901 struct pointer_set_t
*visited
= NULL
;
2902 /* Set nonzero when we find something of interest. */
2905 arg1
= *parg1
, arg2
= *parg2
;
2907 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2909 while (arg2
== CONST0_RTX (GET_MODE (arg1
)))
2911 int reverse_code
= 0;
2912 struct table_elt
*p
= 0;
2914 /* Remember state from previous iteration. */
2918 visited
= pointer_set_create ();
2919 pointer_set_insert (visited
, x
);
2923 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2924 On machines with CC0, this is the only case that can occur, since
2925 fold_rtx will return the COMPARE or item being compared with zero
2928 if (GET_CODE (arg1
) == COMPARE
&& arg2
== const0_rtx
)
2931 /* If ARG1 is a comparison operator and CODE is testing for
2932 STORE_FLAG_VALUE, get the inner arguments. */
2934 else if (COMPARISON_P (arg1
))
2936 #ifdef FLOAT_STORE_FLAG_VALUE
2937 REAL_VALUE_TYPE fsfv
;
2941 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
2942 && code
== LT
&& STORE_FLAG_VALUE
== -1)
2943 #ifdef FLOAT_STORE_FLAG_VALUE
2944 || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1
))
2945 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
2946 REAL_VALUE_NEGATIVE (fsfv
)))
2951 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
2952 && code
== GE
&& STORE_FLAG_VALUE
== -1)
2953 #ifdef FLOAT_STORE_FLAG_VALUE
2954 || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1
))
2955 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
2956 REAL_VALUE_NEGATIVE (fsfv
)))
2959 x
= arg1
, reverse_code
= 1;
2962 /* ??? We could also check for
2964 (ne (and (eq (...) (const_int 1))) (const_int 0))
2966 and related forms, but let's wait until we see them occurring. */
2969 /* Look up ARG1 in the hash table and see if it has an equivalence
2970 that lets us see what is being compared. */
2971 p
= lookup (arg1
, SAFE_HASH (arg1
, GET_MODE (arg1
)), GET_MODE (arg1
));
2974 p
= p
->first_same_value
;
2976 /* If what we compare is already known to be constant, that is as
2978 We need to break the loop in this case, because otherwise we
2979 can have an infinite loop when looking at a reg that is known
2980 to be a constant which is the same as a comparison of a reg
2981 against zero which appears later in the insn stream, which in
2982 turn is constant and the same as the comparison of the first reg
2988 for (; p
; p
= p
->next_same_value
)
2990 enum machine_mode inner_mode
= GET_MODE (p
->exp
);
2991 #ifdef FLOAT_STORE_FLAG_VALUE
2992 REAL_VALUE_TYPE fsfv
;
2995 /* If the entry isn't valid, skip it. */
2996 if (! exp_equiv_p (p
->exp
, p
->exp
, 1, false))
2999 /* If it's a comparison we've used before, skip it. */
3000 if (visited
&& pointer_set_contains (visited
, p
->exp
))
3003 if (GET_CODE (p
->exp
) == COMPARE
3004 /* Another possibility is that this machine has a compare insn
3005 that includes the comparison code. In that case, ARG1 would
3006 be equivalent to a comparison operation that would set ARG1 to
3007 either STORE_FLAG_VALUE or zero. If this is an NE operation,
3008 ORIG_CODE is the actual comparison being done; if it is an EQ,
3009 we must reverse ORIG_CODE. On machine with a negative value
3010 for STORE_FLAG_VALUE, also look at LT and GE operations. */
3013 && val_signbit_known_set_p (inner_mode
,
3015 #ifdef FLOAT_STORE_FLAG_VALUE
3017 && SCALAR_FLOAT_MODE_P (inner_mode
)
3018 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
3019 REAL_VALUE_NEGATIVE (fsfv
)))
3022 && COMPARISON_P (p
->exp
)))
3027 else if ((code
== EQ
3029 && val_signbit_known_set_p (inner_mode
,
3031 #ifdef FLOAT_STORE_FLAG_VALUE
3033 && SCALAR_FLOAT_MODE_P (inner_mode
)
3034 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
3035 REAL_VALUE_NEGATIVE (fsfv
)))
3038 && COMPARISON_P (p
->exp
))
3045 /* If this non-trapping address, e.g. fp + constant, the
3046 equivalent is a better operand since it may let us predict
3047 the value of the comparison. */
3048 else if (!rtx_addr_can_trap_p (p
->exp
))
3055 /* If we didn't find a useful equivalence for ARG1, we are done.
3056 Otherwise, set up for the next iteration. */
3060 /* If we need to reverse the comparison, make sure that that is
3061 possible -- we can't necessarily infer the value of GE from LT
3062 with floating-point operands. */
3065 enum rtx_code reversed
= reversed_comparison_code (x
, NULL_RTX
);
3066 if (reversed
== UNKNOWN
)
3071 else if (COMPARISON_P (x
))
3072 code
= GET_CODE (x
);
3073 arg1
= XEXP (x
, 0), arg2
= XEXP (x
, 1);
3076 /* Return our results. Return the modes from before fold_rtx
3077 because fold_rtx might produce const_int, and then it's too late. */
3078 *pmode1
= GET_MODE (arg1
), *pmode2
= GET_MODE (arg2
);
3079 *parg1
= fold_rtx (arg1
, 0), *parg2
= fold_rtx (arg2
, 0);
3082 pointer_set_destroy (visited
);
3086 /* If X is a nontrivial arithmetic operation on an argument for which
3087 a constant value can be determined, return the result of operating
3088 on that value, as a constant. Otherwise, return X, possibly with
3089 one or more operands changed to a forward-propagated constant.
3091 If X is a register whose contents are known, we do NOT return
3092 those contents here; equiv_constant is called to perform that task.
3093 For SUBREGs and MEMs, we do that both here and in equiv_constant.
3095 INSN is the insn that we may be modifying. If it is 0, make a copy
3096 of X before modifying it. */
3099 fold_rtx (rtx x
, rtx insn
)
3102 enum machine_mode mode
;
3108 /* Operands of X. */
3112 /* Constant equivalents of first three operands of X;
3113 0 when no such equivalent is known. */
3118 /* The mode of the first operand of X. We need this for sign and zero
3120 enum machine_mode mode_arg0
;
3125 /* Try to perform some initial simplifications on X. */
3126 code
= GET_CODE (x
);
3131 if ((new_rtx
= equiv_constant (x
)) != NULL_RTX
)
3144 /* No use simplifying an EXPR_LIST
3145 since they are used only for lists of args
3146 in a function call's REG_EQUAL note. */
3152 return prev_insn_cc0
;
3158 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
3159 validate_change (insn
, &ASM_OPERANDS_INPUT (x
, i
),
3160 fold_rtx (ASM_OPERANDS_INPUT (x
, i
), insn
), 0);
3164 #ifdef NO_FUNCTION_CSE
3166 if (CONSTANT_P (XEXP (XEXP (x
, 0), 0)))
3171 /* Anything else goes through the loop below. */
3176 mode
= GET_MODE (x
);
3180 mode_arg0
= VOIDmode
;
3182 /* Try folding our operands.
3183 Then see which ones have constant values known. */
3185 fmt
= GET_RTX_FORMAT (code
);
3186 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3189 rtx folded_arg
= XEXP (x
, i
), const_arg
;
3190 enum machine_mode mode_arg
= GET_MODE (folded_arg
);
3192 switch (GET_CODE (folded_arg
))
3197 const_arg
= equiv_constant (folded_arg
);
3207 const_arg
= folded_arg
;
3212 folded_arg
= prev_insn_cc0
;
3213 mode_arg
= prev_insn_cc0_mode
;
3214 const_arg
= equiv_constant (folded_arg
);
3219 folded_arg
= fold_rtx (folded_arg
, insn
);
3220 const_arg
= equiv_constant (folded_arg
);
3224 /* For the first three operands, see if the operand
3225 is constant or equivalent to a constant. */
3229 folded_arg0
= folded_arg
;
3230 const_arg0
= const_arg
;
3231 mode_arg0
= mode_arg
;
3234 folded_arg1
= folded_arg
;
3235 const_arg1
= const_arg
;
3238 const_arg2
= const_arg
;
3242 /* Pick the least expensive of the argument and an equivalent constant
3245 && const_arg
!= folded_arg
3246 && COST_IN (const_arg
, code
, i
) <= COST_IN (folded_arg
, code
, i
)
3248 /* It's not safe to substitute the operand of a conversion
3249 operator with a constant, as the conversion's identity
3250 depends upon the mode of its operand. This optimization
3251 is handled by the call to simplify_unary_operation. */
3252 && (GET_RTX_CLASS (code
) != RTX_UNARY
3253 || GET_MODE (const_arg
) == mode_arg0
3254 || (code
!= ZERO_EXTEND
3255 && code
!= SIGN_EXTEND
3257 && code
!= FLOAT_TRUNCATE
3258 && code
!= FLOAT_EXTEND
3261 && code
!= UNSIGNED_FLOAT
3262 && code
!= UNSIGNED_FIX
)))
3263 folded_arg
= const_arg
;
3265 if (folded_arg
== XEXP (x
, i
))
3268 if (insn
== NULL_RTX
&& !changed
)
3271 validate_unshare_change (insn
, &XEXP (x
, i
), folded_arg
, 1);
3276 /* Canonicalize X if necessary, and keep const_argN and folded_argN
3277 consistent with the order in X. */
3278 if (canonicalize_change_group (insn
, x
))
3281 tem
= const_arg0
, const_arg0
= const_arg1
, const_arg1
= tem
;
3282 tem
= folded_arg0
, folded_arg0
= folded_arg1
, folded_arg1
= tem
;
3285 apply_change_group ();
3288 /* If X is an arithmetic operation, see if we can simplify it. */
3290 switch (GET_RTX_CLASS (code
))
3294 /* We can't simplify extension ops unless we know the
3296 if ((code
== ZERO_EXTEND
|| code
== SIGN_EXTEND
)
3297 && mode_arg0
== VOIDmode
)
3300 new_rtx
= simplify_unary_operation (code
, mode
,
3301 const_arg0
? const_arg0
: folded_arg0
,
3307 case RTX_COMM_COMPARE
:
3308 /* See what items are actually being compared and set FOLDED_ARG[01]
3309 to those values and CODE to the actual comparison code. If any are
3310 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3311 do anything if both operands are already known to be constant. */
3313 /* ??? Vector mode comparisons are not supported yet. */
3314 if (VECTOR_MODE_P (mode
))
3317 if (const_arg0
== 0 || const_arg1
== 0)
3319 struct table_elt
*p0
, *p1
;
3320 rtx true_rtx
, false_rtx
;
3321 enum machine_mode mode_arg1
;
3323 if (SCALAR_FLOAT_MODE_P (mode
))
3325 #ifdef FLOAT_STORE_FLAG_VALUE
3326 true_rtx
= (CONST_DOUBLE_FROM_REAL_VALUE
3327 (FLOAT_STORE_FLAG_VALUE (mode
), mode
));
3329 true_rtx
= NULL_RTX
;
3331 false_rtx
= CONST0_RTX (mode
);
3335 true_rtx
= const_true_rtx
;
3336 false_rtx
= const0_rtx
;
3339 code
= find_comparison_args (code
, &folded_arg0
, &folded_arg1
,
3340 &mode_arg0
, &mode_arg1
);
3342 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3343 what kinds of things are being compared, so we can't do
3344 anything with this comparison. */
3346 if (mode_arg0
== VOIDmode
|| GET_MODE_CLASS (mode_arg0
) == MODE_CC
)
3349 const_arg0
= equiv_constant (folded_arg0
);
3350 const_arg1
= equiv_constant (folded_arg1
);
3352 /* If we do not now have two constants being compared, see
3353 if we can nevertheless deduce some things about the
3355 if (const_arg0
== 0 || const_arg1
== 0)
3357 if (const_arg1
!= NULL
)
3359 rtx cheapest_simplification
;
3362 struct table_elt
*p
;
3364 /* See if we can find an equivalent of folded_arg0
3365 that gets us a cheaper expression, possibly a
3366 constant through simplifications. */
3367 p
= lookup (folded_arg0
, SAFE_HASH (folded_arg0
, mode_arg0
),
3372 cheapest_simplification
= x
;
3373 cheapest_cost
= COST (x
);
3375 for (p
= p
->first_same_value
; p
!= NULL
; p
= p
->next_same_value
)
3379 /* If the entry isn't valid, skip it. */
3380 if (! exp_equiv_p (p
->exp
, p
->exp
, 1, false))
3383 /* Try to simplify using this equivalence. */
3385 = simplify_relational_operation (code
, mode
,
3390 if (simp_result
== NULL
)
3393 cost
= COST (simp_result
);
3394 if (cost
< cheapest_cost
)
3396 cheapest_cost
= cost
;
3397 cheapest_simplification
= simp_result
;
3401 /* If we have a cheaper expression now, use that
3402 and try folding it further, from the top. */
3403 if (cheapest_simplification
!= x
)
3404 return fold_rtx (copy_rtx (cheapest_simplification
),
3409 /* See if the two operands are the same. */
3411 if ((REG_P (folded_arg0
)
3412 && REG_P (folded_arg1
)
3413 && (REG_QTY (REGNO (folded_arg0
))
3414 == REG_QTY (REGNO (folded_arg1
))))
3415 || ((p0
= lookup (folded_arg0
,
3416 SAFE_HASH (folded_arg0
, mode_arg0
),
3418 && (p1
= lookup (folded_arg1
,
3419 SAFE_HASH (folded_arg1
, mode_arg0
),
3421 && p0
->first_same_value
== p1
->first_same_value
))
3422 folded_arg1
= folded_arg0
;
3424 /* If FOLDED_ARG0 is a register, see if the comparison we are
3425 doing now is either the same as we did before or the reverse
3426 (we only check the reverse if not floating-point). */
3427 else if (REG_P (folded_arg0
))
3429 int qty
= REG_QTY (REGNO (folded_arg0
));
3431 if (REGNO_QTY_VALID_P (REGNO (folded_arg0
)))
3433 struct qty_table_elem
*ent
= &qty_table
[qty
];
3435 if ((comparison_dominates_p (ent
->comparison_code
, code
)
3436 || (! FLOAT_MODE_P (mode_arg0
)
3437 && comparison_dominates_p (ent
->comparison_code
,
3438 reverse_condition (code
))))
3439 && (rtx_equal_p (ent
->comparison_const
, folded_arg1
)
3441 && rtx_equal_p (ent
->comparison_const
,
3443 || (REG_P (folded_arg1
)
3444 && (REG_QTY (REGNO (folded_arg1
)) == ent
->comparison_qty
))))
3446 if (comparison_dominates_p (ent
->comparison_code
, code
))
3461 /* If we are comparing against zero, see if the first operand is
3462 equivalent to an IOR with a constant. If so, we may be able to
3463 determine the result of this comparison. */
3464 if (const_arg1
== const0_rtx
&& !const_arg0
)
3466 rtx y
= lookup_as_function (folded_arg0
, IOR
);
3470 && (inner_const
= equiv_constant (XEXP (y
, 1))) != 0
3471 && CONST_INT_P (inner_const
)
3472 && INTVAL (inner_const
) != 0)
3473 folded_arg0
= gen_rtx_IOR (mode_arg0
, XEXP (y
, 0), inner_const
);
3477 rtx op0
= const_arg0
? const_arg0
: folded_arg0
;
3478 rtx op1
= const_arg1
? const_arg1
: folded_arg1
;
3479 new_rtx
= simplify_relational_operation (code
, mode
, mode_arg0
, op0
, op1
);
3484 case RTX_COMM_ARITH
:
3488 /* If the second operand is a LABEL_REF, see if the first is a MINUS
3489 with that LABEL_REF as its second operand. If so, the result is
3490 the first operand of that MINUS. This handles switches with an
3491 ADDR_DIFF_VEC table. */
3492 if (const_arg1
&& GET_CODE (const_arg1
) == LABEL_REF
)
3495 = GET_CODE (folded_arg0
) == MINUS
? folded_arg0
3496 : lookup_as_function (folded_arg0
, MINUS
);
3498 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
3499 && XEXP (XEXP (y
, 1), 0) == XEXP (const_arg1
, 0))
3502 /* Now try for a CONST of a MINUS like the above. */
3503 if ((y
= (GET_CODE (folded_arg0
) == CONST
? folded_arg0
3504 : lookup_as_function (folded_arg0
, CONST
))) != 0
3505 && GET_CODE (XEXP (y
, 0)) == MINUS
3506 && GET_CODE (XEXP (XEXP (y
, 0), 1)) == LABEL_REF
3507 && XEXP (XEXP (XEXP (y
, 0), 1), 0) == XEXP (const_arg1
, 0))
3508 return XEXP (XEXP (y
, 0), 0);
3511 /* Likewise if the operands are in the other order. */
3512 if (const_arg0
&& GET_CODE (const_arg0
) == LABEL_REF
)
3515 = GET_CODE (folded_arg1
) == MINUS
? folded_arg1
3516 : lookup_as_function (folded_arg1
, MINUS
);
3518 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
3519 && XEXP (XEXP (y
, 1), 0) == XEXP (const_arg0
, 0))
3522 /* Now try for a CONST of a MINUS like the above. */
3523 if ((y
= (GET_CODE (folded_arg1
) == CONST
? folded_arg1
3524 : lookup_as_function (folded_arg1
, CONST
))) != 0
3525 && GET_CODE (XEXP (y
, 0)) == MINUS
3526 && GET_CODE (XEXP (XEXP (y
, 0), 1)) == LABEL_REF
3527 && XEXP (XEXP (XEXP (y
, 0), 1), 0) == XEXP (const_arg0
, 0))
3528 return XEXP (XEXP (y
, 0), 0);
3531 /* If second operand is a register equivalent to a negative
3532 CONST_INT, see if we can find a register equivalent to the
3533 positive constant. Make a MINUS if so. Don't do this for
3534 a non-negative constant since we might then alternate between
3535 choosing positive and negative constants. Having the positive
3536 constant previously-used is the more common case. Be sure
3537 the resulting constant is non-negative; if const_arg1 were
3538 the smallest negative number this would overflow: depending
3539 on the mode, this would either just be the same value (and
3540 hence not save anything) or be incorrect. */
3541 if (const_arg1
!= 0 && CONST_INT_P (const_arg1
)
3542 && INTVAL (const_arg1
) < 0
3543 /* This used to test
3545 -INTVAL (const_arg1) >= 0
3547 But The Sun V5.0 compilers mis-compiled that test. So
3548 instead we test for the problematic value in a more direct
3549 manner and hope the Sun compilers get it correct. */
3550 && INTVAL (const_arg1
) !=
3551 ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
- 1))
3552 && REG_P (folded_arg1
))
3554 rtx new_const
= GEN_INT (-INTVAL (const_arg1
));
3556 = lookup (new_const
, SAFE_HASH (new_const
, mode
), mode
);
3559 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
3561 return simplify_gen_binary (MINUS
, mode
, folded_arg0
,
3562 canon_reg (p
->exp
, NULL_RTX
));
3567 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
3568 If so, produce (PLUS Z C2-C). */
3569 if (const_arg1
!= 0 && CONST_INT_P (const_arg1
))
3571 rtx y
= lookup_as_function (XEXP (x
, 0), PLUS
);
3572 if (y
&& CONST_INT_P (XEXP (y
, 1)))
3573 return fold_rtx (plus_constant (mode
, copy_rtx (y
),
3574 -INTVAL (const_arg1
)),
3581 case SMIN
: case SMAX
: case UMIN
: case UMAX
:
3582 case IOR
: case AND
: case XOR
:
3584 case ASHIFT
: case LSHIFTRT
: case ASHIFTRT
:
3585 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
3586 is known to be of similar form, we may be able to replace the
3587 operation with a combined operation. This may eliminate the
3588 intermediate operation if every use is simplified in this way.
3589 Note that the similar optimization done by combine.c only works
3590 if the intermediate operation's result has only one reference. */
3592 if (REG_P (folded_arg0
)
3593 && const_arg1
&& CONST_INT_P (const_arg1
))
3596 = (code
== ASHIFT
|| code
== ASHIFTRT
|| code
== LSHIFTRT
);
3597 rtx y
, inner_const
, new_const
;
3598 rtx canon_const_arg1
= const_arg1
;
3599 enum rtx_code associate_code
;
3602 && (INTVAL (const_arg1
) >= GET_MODE_PRECISION (mode
)
3603 || INTVAL (const_arg1
) < 0))
3605 if (SHIFT_COUNT_TRUNCATED
)
3606 canon_const_arg1
= GEN_INT (INTVAL (const_arg1
)
3607 & (GET_MODE_BITSIZE (mode
)
3613 y
= lookup_as_function (folded_arg0
, code
);
3617 /* If we have compiled a statement like
3618 "if (x == (x & mask1))", and now are looking at
3619 "x & mask2", we will have a case where the first operand
3620 of Y is the same as our first operand. Unless we detect
3621 this case, an infinite loop will result. */
3622 if (XEXP (y
, 0) == folded_arg0
)
3625 inner_const
= equiv_constant (fold_rtx (XEXP (y
, 1), 0));
3626 if (!inner_const
|| !CONST_INT_P (inner_const
))
3629 /* Don't associate these operations if they are a PLUS with the
3630 same constant and it is a power of two. These might be doable
3631 with a pre- or post-increment. Similarly for two subtracts of
3632 identical powers of two with post decrement. */
3634 if (code
== PLUS
&& const_arg1
== inner_const
3635 && ((HAVE_PRE_INCREMENT
3636 && exact_log2 (INTVAL (const_arg1
)) >= 0)
3637 || (HAVE_POST_INCREMENT
3638 && exact_log2 (INTVAL (const_arg1
)) >= 0)
3639 || (HAVE_PRE_DECREMENT
3640 && exact_log2 (- INTVAL (const_arg1
)) >= 0)
3641 || (HAVE_POST_DECREMENT
3642 && exact_log2 (- INTVAL (const_arg1
)) >= 0)))
3645 /* ??? Vector mode shifts by scalar
3646 shift operand are not supported yet. */
3647 if (is_shift
&& VECTOR_MODE_P (mode
))
3651 && (INTVAL (inner_const
) >= GET_MODE_PRECISION (mode
)
3652 || INTVAL (inner_const
) < 0))
3654 if (SHIFT_COUNT_TRUNCATED
)
3655 inner_const
= GEN_INT (INTVAL (inner_const
)
3656 & (GET_MODE_BITSIZE (mode
) - 1));
3661 /* Compute the code used to compose the constants. For example,
3662 A-C1-C2 is A-(C1 + C2), so if CODE == MINUS, we want PLUS. */
3664 associate_code
= (is_shift
|| code
== MINUS
? PLUS
: code
);
3666 new_const
= simplify_binary_operation (associate_code
, mode
,
3673 /* If we are associating shift operations, don't let this
3674 produce a shift of the size of the object or larger.
3675 This could occur when we follow a sign-extend by a right
3676 shift on a machine that does a sign-extend as a pair
3680 && CONST_INT_P (new_const
)
3681 && INTVAL (new_const
) >= GET_MODE_PRECISION (mode
))
3683 /* As an exception, we can turn an ASHIFTRT of this
3684 form into a shift of the number of bits - 1. */
3685 if (code
== ASHIFTRT
)
3686 new_const
= GEN_INT (GET_MODE_BITSIZE (mode
) - 1);
3687 else if (!side_effects_p (XEXP (y
, 0)))
3688 return CONST0_RTX (mode
);
3693 y
= copy_rtx (XEXP (y
, 0));
3695 /* If Y contains our first operand (the most common way this
3696 can happen is if Y is a MEM), we would do into an infinite
3697 loop if we tried to fold it. So don't in that case. */
3699 if (! reg_mentioned_p (folded_arg0
, y
))
3700 y
= fold_rtx (y
, insn
);
3702 return simplify_gen_binary (code
, mode
, y
, new_const
);
3706 case DIV
: case UDIV
:
3707 /* ??? The associative optimization performed immediately above is
3708 also possible for DIV and UDIV using associate_code of MULT.
3709 However, we would need extra code to verify that the
3710 multiplication does not overflow, that is, there is no overflow
3711 in the calculation of new_const. */
3718 new_rtx
= simplify_binary_operation (code
, mode
,
3719 const_arg0
? const_arg0
: folded_arg0
,
3720 const_arg1
? const_arg1
: folded_arg1
);
3724 /* (lo_sum (high X) X) is simply X. */
3725 if (code
== LO_SUM
&& const_arg0
!= 0
3726 && GET_CODE (const_arg0
) == HIGH
3727 && rtx_equal_p (XEXP (const_arg0
, 0), const_arg1
))
3732 case RTX_BITFIELD_OPS
:
3733 new_rtx
= simplify_ternary_operation (code
, mode
, mode_arg0
,
3734 const_arg0
? const_arg0
: folded_arg0
,
3735 const_arg1
? const_arg1
: folded_arg1
,
3736 const_arg2
? const_arg2
: XEXP (x
, 2));
3743 return new_rtx
? new_rtx
: x
;
3746 /* Return a constant value currently equivalent to X.
3747 Return 0 if we don't know one. */
3750 equiv_constant (rtx x
)
3753 && REGNO_QTY_VALID_P (REGNO (x
)))
3755 int x_q
= REG_QTY (REGNO (x
));
3756 struct qty_table_elem
*x_ent
= &qty_table
[x_q
];
3758 if (x_ent
->const_rtx
)
3759 x
= gen_lowpart (GET_MODE (x
), x_ent
->const_rtx
);
3762 if (x
== 0 || CONSTANT_P (x
))
3765 if (GET_CODE (x
) == SUBREG
)
3767 enum machine_mode mode
= GET_MODE (x
);
3768 enum machine_mode imode
= GET_MODE (SUBREG_REG (x
));
3771 /* See if we previously assigned a constant value to this SUBREG. */
3772 if ((new_rtx
= lookup_as_function (x
, CONST_INT
)) != 0
3773 || (new_rtx
= lookup_as_function (x
, CONST_DOUBLE
)) != 0
3774 || (new_rtx
= lookup_as_function (x
, CONST_FIXED
)) != 0)
3777 /* If we didn't and if doing so makes sense, see if we previously
3778 assigned a constant value to the enclosing word mode SUBREG. */
3779 if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (word_mode
)
3780 && GET_MODE_SIZE (word_mode
) < GET_MODE_SIZE (imode
))
3782 int byte
= SUBREG_BYTE (x
) - subreg_lowpart_offset (mode
, word_mode
);
3783 if (byte
>= 0 && (byte
% UNITS_PER_WORD
) == 0)
3785 rtx y
= gen_rtx_SUBREG (word_mode
, SUBREG_REG (x
), byte
);
3786 new_rtx
= lookup_as_function (y
, CONST_INT
);
3788 return gen_lowpart (mode
, new_rtx
);
3792 /* Otherwise see if we already have a constant for the inner REG,
3793 and if that is enough to calculate an equivalent constant for
3794 the subreg. Note that the upper bits of paradoxical subregs
3795 are undefined, so they cannot be said to equal anything. */
3796 if (REG_P (SUBREG_REG (x
))
3797 && GET_MODE_SIZE (mode
) <= GET_MODE_SIZE (imode
)
3798 && (new_rtx
= equiv_constant (SUBREG_REG (x
))) != 0)
3799 return simplify_subreg (mode
, new_rtx
, imode
, SUBREG_BYTE (x
));
3804 /* If X is a MEM, see if it is a constant-pool reference, or look it up in
3805 the hash table in case its value was seen before. */
3809 struct table_elt
*elt
;
3811 x
= avoid_constant_pool_reference (x
);
3815 elt
= lookup (x
, SAFE_HASH (x
, GET_MODE (x
)), GET_MODE (x
));
3819 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
3820 if (elt
->is_const
&& CONSTANT_P (elt
->exp
))
3827 /* Given INSN, a jump insn, TAKEN indicates if we are following the
3830 In certain cases, this can cause us to add an equivalence. For example,
3831 if we are following the taken case of
3833 we can add the fact that `i' and '2' are now equivalent.
3835 In any case, we can record that this comparison was passed. If the same
3836 comparison is seen later, we will know its value. */
3839 record_jump_equiv (rtx insn
, bool taken
)
3841 int cond_known_true
;
3844 enum machine_mode mode
, mode0
, mode1
;
3845 int reversed_nonequality
= 0;
3848 /* Ensure this is the right kind of insn. */
3849 gcc_assert (any_condjump_p (insn
));
3851 set
= pc_set (insn
);
3853 /* See if this jump condition is known true or false. */
3855 cond_known_true
= (XEXP (SET_SRC (set
), 2) == pc_rtx
);
3857 cond_known_true
= (XEXP (SET_SRC (set
), 1) == pc_rtx
);
3859 /* Get the type of comparison being done and the operands being compared.
3860 If we had to reverse a non-equality condition, record that fact so we
3861 know that it isn't valid for floating-point. */
3862 code
= GET_CODE (XEXP (SET_SRC (set
), 0));
3863 op0
= fold_rtx (XEXP (XEXP (SET_SRC (set
), 0), 0), insn
);
3864 op1
= fold_rtx (XEXP (XEXP (SET_SRC (set
), 0), 1), insn
);
3866 code
= find_comparison_args (code
, &op0
, &op1
, &mode0
, &mode1
);
3867 if (! cond_known_true
)
3869 code
= reversed_comparison_code_parts (code
, op0
, op1
, insn
);
3871 /* Don't remember if we can't find the inverse. */
3872 if (code
== UNKNOWN
)
3876 /* The mode is the mode of the non-constant. */
3878 if (mode1
!= VOIDmode
)
3881 record_jump_cond (code
, mode
, op0
, op1
, reversed_nonequality
);
3884 /* Yet another form of subreg creation. In this case, we want something in
3885 MODE, and we should assume OP has MODE iff it is naturally modeless. */
3888 record_jump_cond_subreg (enum machine_mode mode
, rtx op
)
3890 enum machine_mode op_mode
= GET_MODE (op
);
3891 if (op_mode
== mode
|| op_mode
== VOIDmode
)
3893 return lowpart_subreg (mode
, op
, op_mode
);
3896 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
3897 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
3898 Make any useful entries we can with that information. Called from
3899 above function and called recursively. */
3902 record_jump_cond (enum rtx_code code
, enum machine_mode mode
, rtx op0
,
3903 rtx op1
, int reversed_nonequality
)
3905 unsigned op0_hash
, op1_hash
;
3906 int op0_in_memory
, op1_in_memory
;
3907 struct table_elt
*op0_elt
, *op1_elt
;
3909 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
3910 we know that they are also equal in the smaller mode (this is also
3911 true for all smaller modes whether or not there is a SUBREG, but
3912 is not worth testing for with no SUBREG). */
3914 /* Note that GET_MODE (op0) may not equal MODE. */
3915 if (code
== EQ
&& paradoxical_subreg_p (op0
))
3917 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
3918 rtx tem
= record_jump_cond_subreg (inner_mode
, op1
);
3920 record_jump_cond (code
, mode
, SUBREG_REG (op0
), tem
,
3921 reversed_nonequality
);
3924 if (code
== EQ
&& paradoxical_subreg_p (op1
))
3926 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
3927 rtx tem
= record_jump_cond_subreg (inner_mode
, op0
);
3929 record_jump_cond (code
, mode
, SUBREG_REG (op1
), tem
,
3930 reversed_nonequality
);
3933 /* Similarly, if this is an NE comparison, and either is a SUBREG
3934 making a smaller mode, we know the whole thing is also NE. */
3936 /* Note that GET_MODE (op0) may not equal MODE;
3937 if we test MODE instead, we can get an infinite recursion
3938 alternating between two modes each wider than MODE. */
3940 if (code
== NE
&& GET_CODE (op0
) == SUBREG
3941 && subreg_lowpart_p (op0
)
3942 && (GET_MODE_SIZE (GET_MODE (op0
))
3943 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
)))))
3945 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
3946 rtx tem
= record_jump_cond_subreg (inner_mode
, op1
);
3948 record_jump_cond (code
, mode
, SUBREG_REG (op0
), tem
,
3949 reversed_nonequality
);
3952 if (code
== NE
&& GET_CODE (op1
) == SUBREG
3953 && subreg_lowpart_p (op1
)
3954 && (GET_MODE_SIZE (GET_MODE (op1
))
3955 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
)))))
3957 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
3958 rtx tem
= record_jump_cond_subreg (inner_mode
, op0
);
3960 record_jump_cond (code
, mode
, SUBREG_REG (op1
), tem
,
3961 reversed_nonequality
);
3964 /* Hash both operands. */
3967 hash_arg_in_memory
= 0;
3968 op0_hash
= HASH (op0
, mode
);
3969 op0_in_memory
= hash_arg_in_memory
;
3975 hash_arg_in_memory
= 0;
3976 op1_hash
= HASH (op1
, mode
);
3977 op1_in_memory
= hash_arg_in_memory
;
3982 /* Look up both operands. */
3983 op0_elt
= lookup (op0
, op0_hash
, mode
);
3984 op1_elt
= lookup (op1
, op1_hash
, mode
);
3986 /* If both operands are already equivalent or if they are not in the
3987 table but are identical, do nothing. */
3988 if ((op0_elt
!= 0 && op1_elt
!= 0
3989 && op0_elt
->first_same_value
== op1_elt
->first_same_value
)
3990 || op0
== op1
|| rtx_equal_p (op0
, op1
))
3993 /* If we aren't setting two things equal all we can do is save this
3994 comparison. Similarly if this is floating-point. In the latter
3995 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
3996 If we record the equality, we might inadvertently delete code
3997 whose intent was to change -0 to +0. */
3999 if (code
!= EQ
|| FLOAT_MODE_P (GET_MODE (op0
)))
4001 struct qty_table_elem
*ent
;
4004 /* If we reversed a floating-point comparison, if OP0 is not a
4005 register, or if OP1 is neither a register or constant, we can't
4009 op1
= equiv_constant (op1
);
4011 if ((reversed_nonequality
&& FLOAT_MODE_P (mode
))
4012 || !REG_P (op0
) || op1
== 0)
4015 /* Put OP0 in the hash table if it isn't already. This gives it a
4016 new quantity number. */
4019 if (insert_regs (op0
, NULL
, 0))
4021 rehash_using_reg (op0
);
4022 op0_hash
= HASH (op0
, mode
);
4024 /* If OP0 is contained in OP1, this changes its hash code
4025 as well. Faster to rehash than to check, except
4026 for the simple case of a constant. */
4027 if (! CONSTANT_P (op1
))
4028 op1_hash
= HASH (op1
,mode
);
4031 op0_elt
= insert (op0
, NULL
, op0_hash
, mode
);
4032 op0_elt
->in_memory
= op0_in_memory
;
4035 qty
= REG_QTY (REGNO (op0
));
4036 ent
= &qty_table
[qty
];
4038 ent
->comparison_code
= code
;
4041 /* Look it up again--in case op0 and op1 are the same. */
4042 op1_elt
= lookup (op1
, op1_hash
, mode
);
4044 /* Put OP1 in the hash table so it gets a new quantity number. */
4047 if (insert_regs (op1
, NULL
, 0))
4049 rehash_using_reg (op1
);
4050 op1_hash
= HASH (op1
, mode
);
4053 op1_elt
= insert (op1
, NULL
, op1_hash
, mode
);
4054 op1_elt
->in_memory
= op1_in_memory
;
4057 ent
->comparison_const
= NULL_RTX
;
4058 ent
->comparison_qty
= REG_QTY (REGNO (op1
));
4062 ent
->comparison_const
= op1
;
4063 ent
->comparison_qty
= -1;
4069 /* If either side is still missing an equivalence, make it now,
4070 then merge the equivalences. */
4074 if (insert_regs (op0
, NULL
, 0))
4076 rehash_using_reg (op0
);
4077 op0_hash
= HASH (op0
, mode
);
4080 op0_elt
= insert (op0
, NULL
, op0_hash
, mode
);
4081 op0_elt
->in_memory
= op0_in_memory
;
4086 if (insert_regs (op1
, NULL
, 0))
4088 rehash_using_reg (op1
);
4089 op1_hash
= HASH (op1
, mode
);
4092 op1_elt
= insert (op1
, NULL
, op1_hash
, mode
);
4093 op1_elt
->in_memory
= op1_in_memory
;
4096 merge_equiv_classes (op0_elt
, op1_elt
);
4099 /* CSE processing for one instruction.
4101 Most "true" common subexpressions are mostly optimized away in GIMPLE,
4102 but the few that "leak through" are cleaned up by cse_insn, and complex
4103 addressing modes are often formed here.
4105 The main function is cse_insn, and between here and that function
4106 a couple of helper functions is defined to keep the size of cse_insn
4107 within reasonable proportions.
4109 Data is shared between the main and helper functions via STRUCT SET,
4110 that contains all data related for every set in the instruction that
4113 Note that cse_main processes all sets in the instruction. Most
4114 passes in GCC only process simple SET insns or single_set insns, but
4115 CSE processes insns with multiple sets as well. */
4117 /* Data on one SET contained in the instruction. */
4121 /* The SET rtx itself. */
4123 /* The SET_SRC of the rtx (the original value, if it is changing). */
4125 /* The hash-table element for the SET_SRC of the SET. */
4126 struct table_elt
*src_elt
;
4127 /* Hash value for the SET_SRC. */
4129 /* Hash value for the SET_DEST. */
4131 /* The SET_DEST, with SUBREG, etc., stripped. */
4133 /* Nonzero if the SET_SRC is in memory. */
4135 /* Nonzero if the SET_SRC contains something
4136 whose value cannot be predicted and understood. */
4138 /* Original machine mode, in case it becomes a CONST_INT.
4139 The size of this field should match the size of the mode
4140 field of struct rtx_def (see rtl.h). */
4141 ENUM_BITFIELD(machine_mode
) mode
: 8;
4142 /* A constant equivalent for SET_SRC, if any. */
4144 /* Hash value of constant equivalent for SET_SRC. */
4145 unsigned src_const_hash
;
4146 /* Table entry for constant equivalent for SET_SRC, if any. */
4147 struct table_elt
*src_const_elt
;
4148 /* Table entry for the destination address. */
4149 struct table_elt
*dest_addr_elt
;
4152 /* Special handling for (set REG0 REG1) where REG0 is the
4153 "cheapest", cheaper than REG1. After cse, REG1 will probably not
4154 be used in the sequel, so (if easily done) change this insn to
4155 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
4156 that computed their value. Then REG1 will become a dead store
4157 and won't cloud the situation for later optimizations.
4159 Do not make this change if REG1 is a hard register, because it will
4160 then be used in the sequel and we may be changing a two-operand insn
4161 into a three-operand insn.
4163 This is the last transformation that cse_insn will try to do. */
4166 try_back_substitute_reg (rtx set
, rtx insn
)
4168 rtx dest
= SET_DEST (set
);
4169 rtx src
= SET_SRC (set
);
4172 && REG_P (src
) && ! HARD_REGISTER_P (src
)
4173 && REGNO_QTY_VALID_P (REGNO (src
)))
4175 int src_q
= REG_QTY (REGNO (src
));
4176 struct qty_table_elem
*src_ent
= &qty_table
[src_q
];
4178 if (src_ent
->first_reg
== REGNO (dest
))
4180 /* Scan for the previous nonnote insn, but stop at a basic
4183 rtx bb_head
= BB_HEAD (BLOCK_FOR_INSN (insn
));
4186 prev
= PREV_INSN (prev
);
4188 while (prev
!= bb_head
&& (NOTE_P (prev
) || DEBUG_INSN_P (prev
)));
4190 /* Do not swap the registers around if the previous instruction
4191 attaches a REG_EQUIV note to REG1.
4193 ??? It's not entirely clear whether we can transfer a REG_EQUIV
4194 from the pseudo that originally shadowed an incoming argument
4195 to another register. Some uses of REG_EQUIV might rely on it
4196 being attached to REG1 rather than REG2.
4198 This section previously turned the REG_EQUIV into a REG_EQUAL
4199 note. We cannot do that because REG_EQUIV may provide an
4200 uninitialized stack slot when REG_PARM_STACK_SPACE is used. */
4201 if (NONJUMP_INSN_P (prev
)
4202 && GET_CODE (PATTERN (prev
)) == SET
4203 && SET_DEST (PATTERN (prev
)) == src
4204 && ! find_reg_note (prev
, REG_EQUIV
, NULL_RTX
))
4208 validate_change (prev
, &SET_DEST (PATTERN (prev
)), dest
, 1);
4209 validate_change (insn
, &SET_DEST (set
), src
, 1);
4210 validate_change (insn
, &SET_SRC (set
), dest
, 1);
4211 apply_change_group ();
4213 /* If INSN has a REG_EQUAL note, and this note mentions
4214 REG0, then we must delete it, because the value in
4215 REG0 has changed. If the note's value is REG1, we must
4216 also delete it because that is now this insn's dest. */
4217 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
4219 && (reg_mentioned_p (dest
, XEXP (note
, 0))
4220 || rtx_equal_p (src
, XEXP (note
, 0))))
4221 remove_note (insn
, note
);
4227 /* Record all the SETs in this instruction into SETS_PTR,
4228 and return the number of recorded sets. */
4230 find_sets_in_insn (rtx insn
, struct set
**psets
)
4232 struct set
*sets
= *psets
;
4234 rtx x
= PATTERN (insn
);
4236 if (GET_CODE (x
) == SET
)
4238 /* Ignore SETs that are unconditional jumps.
4239 They never need cse processing, so this does not hurt.
4240 The reason is not efficiency but rather
4241 so that we can test at the end for instructions
4242 that have been simplified to unconditional jumps
4243 and not be misled by unchanged instructions
4244 that were unconditional jumps to begin with. */
4245 if (SET_DEST (x
) == pc_rtx
4246 && GET_CODE (SET_SRC (x
)) == LABEL_REF
)
4248 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4249 The hard function value register is used only once, to copy to
4250 someplace else, so it isn't worth cse'ing. */
4251 else if (GET_CODE (SET_SRC (x
)) == CALL
)
4254 sets
[n_sets
++].rtl
= x
;
4256 else if (GET_CODE (x
) == PARALLEL
)
4258 int i
, lim
= XVECLEN (x
, 0);
4260 /* Go over the epressions of the PARALLEL in forward order, to
4261 put them in the same order in the SETS array. */
4262 for (i
= 0; i
< lim
; i
++)
4264 rtx y
= XVECEXP (x
, 0, i
);
4265 if (GET_CODE (y
) == SET
)
4267 /* As above, we ignore unconditional jumps and call-insns and
4268 ignore the result of apply_change_group. */
4269 if (SET_DEST (y
) == pc_rtx
4270 && GET_CODE (SET_SRC (y
)) == LABEL_REF
)
4272 else if (GET_CODE (SET_SRC (y
)) == CALL
)
4275 sets
[n_sets
++].rtl
= y
;
4283 /* Where possible, substitute every register reference in the N_SETS
4284 number of SETS in INSN with the the canonical register.
4286 Register canonicalization propagatest the earliest register (i.e.
4287 one that is set before INSN) with the same value. This is a very
4288 useful, simple form of CSE, to clean up warts from expanding GIMPLE
4289 to RTL. For instance, a CONST for an address is usually expanded
4290 multiple times to loads into different registers, thus creating many
4291 subexpressions of the form:
4293 (set (reg1) (some_const))
4294 (set (mem (... reg1 ...) (thing)))
4295 (set (reg2) (some_const))
4296 (set (mem (... reg2 ...) (thing)))
4298 After canonicalizing, the code takes the following form:
4300 (set (reg1) (some_const))
4301 (set (mem (... reg1 ...) (thing)))
4302 (set (reg2) (some_const))
4303 (set (mem (... reg1 ...) (thing)))
4305 The set to reg2 is now trivially dead, and the memory reference (or
4306 address, or whatever) may be a candidate for further CSEing.
4308 In this function, the result of apply_change_group can be ignored;
4312 canonicalize_insn (rtx insn
, struct set
**psets
, int n_sets
)
4314 struct set
*sets
= *psets
;
4316 rtx x
= PATTERN (insn
);
4321 for (tem
= CALL_INSN_FUNCTION_USAGE (insn
); tem
; tem
= XEXP (tem
, 1))
4322 if (GET_CODE (XEXP (tem
, 0)) != SET
)
4323 XEXP (tem
, 0) = canon_reg (XEXP (tem
, 0), insn
);
4326 if (GET_CODE (x
) == SET
&& GET_CODE (SET_SRC (x
)) == CALL
)
4328 canon_reg (SET_SRC (x
), insn
);
4329 apply_change_group ();
4330 fold_rtx (SET_SRC (x
), insn
);
4332 else if (GET_CODE (x
) == CLOBBER
)
4334 /* If we clobber memory, canon the address.
4335 This does nothing when a register is clobbered
4336 because we have already invalidated the reg. */
4337 if (MEM_P (XEXP (x
, 0)))
4338 canon_reg (XEXP (x
, 0), insn
);
4340 else if (GET_CODE (x
) == USE
4341 && ! (REG_P (XEXP (x
, 0))
4342 && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
))
4343 /* Canonicalize a USE of a pseudo register or memory location. */
4344 canon_reg (x
, insn
);
4345 else if (GET_CODE (x
) == ASM_OPERANDS
)
4347 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
4349 rtx input
= ASM_OPERANDS_INPUT (x
, i
);
4350 if (!(REG_P (input
) && REGNO (input
) < FIRST_PSEUDO_REGISTER
))
4352 input
= canon_reg (input
, insn
);
4353 validate_change (insn
, &ASM_OPERANDS_INPUT (x
, i
), input
, 1);
4357 else if (GET_CODE (x
) == CALL
)
4359 canon_reg (x
, insn
);
4360 apply_change_group ();
4363 else if (DEBUG_INSN_P (insn
))
4364 canon_reg (PATTERN (insn
), insn
);
4365 else if (GET_CODE (x
) == PARALLEL
)
4367 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
4369 rtx y
= XVECEXP (x
, 0, i
);
4370 if (GET_CODE (y
) == SET
&& GET_CODE (SET_SRC (y
)) == CALL
)
4372 canon_reg (SET_SRC (y
), insn
);
4373 apply_change_group ();
4374 fold_rtx (SET_SRC (y
), insn
);
4376 else if (GET_CODE (y
) == CLOBBER
)
4378 if (MEM_P (XEXP (y
, 0)))
4379 canon_reg (XEXP (y
, 0), insn
);
4381 else if (GET_CODE (y
) == USE
4382 && ! (REG_P (XEXP (y
, 0))
4383 && REGNO (XEXP (y
, 0)) < FIRST_PSEUDO_REGISTER
))
4384 canon_reg (y
, insn
);
4385 else if (GET_CODE (y
) == CALL
)
4387 canon_reg (y
, insn
);
4388 apply_change_group ();
4394 if (n_sets
== 1 && REG_NOTES (insn
) != 0
4395 && (tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
)) != 0)
4397 /* We potentially will process this insn many times. Therefore,
4398 drop the REG_EQUAL note if it is equal to the SET_SRC of the
4401 Do not do so if the REG_EQUAL note is for a STRICT_LOW_PART,
4402 because cse_insn handles those specially. */
4403 if (GET_CODE (SET_DEST (sets
[0].rtl
)) != STRICT_LOW_PART
4404 && rtx_equal_p (XEXP (tem
, 0), SET_SRC (sets
[0].rtl
)))
4405 remove_note (insn
, tem
);
4408 canon_reg (XEXP (tem
, 0), insn
);
4409 apply_change_group ();
4410 XEXP (tem
, 0) = fold_rtx (XEXP (tem
, 0), insn
);
4411 df_notes_rescan (insn
);
4415 /* Canonicalize sources and addresses of destinations.
4416 We do this in a separate pass to avoid problems when a MATCH_DUP is
4417 present in the insn pattern. In that case, we want to ensure that
4418 we don't break the duplicate nature of the pattern. So we will replace
4419 both operands at the same time. Otherwise, we would fail to find an
4420 equivalent substitution in the loop calling validate_change below.
4422 We used to suppress canonicalization of DEST if it appears in SRC,
4423 but we don't do this any more. */
4425 for (i
= 0; i
< n_sets
; i
++)
4427 rtx dest
= SET_DEST (sets
[i
].rtl
);
4428 rtx src
= SET_SRC (sets
[i
].rtl
);
4429 rtx new_rtx
= canon_reg (src
, insn
);
4431 validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new_rtx
, 1);
4433 if (GET_CODE (dest
) == ZERO_EXTRACT
)
4435 validate_change (insn
, &XEXP (dest
, 1),
4436 canon_reg (XEXP (dest
, 1), insn
), 1);
4437 validate_change (insn
, &XEXP (dest
, 2),
4438 canon_reg (XEXP (dest
, 2), insn
), 1);
4441 while (GET_CODE (dest
) == SUBREG
4442 || GET_CODE (dest
) == ZERO_EXTRACT
4443 || GET_CODE (dest
) == STRICT_LOW_PART
)
4444 dest
= XEXP (dest
, 0);
4447 canon_reg (dest
, insn
);
4450 /* Now that we have done all the replacements, we can apply the change
4451 group and see if they all work. Note that this will cause some
4452 canonicalizations that would have worked individually not to be applied
4453 because some other canonicalization didn't work, but this should not
4456 The result of apply_change_group can be ignored; see canon_reg. */
4458 apply_change_group ();
4461 /* Main function of CSE.
4462 First simplify sources and addresses of all assignments
4463 in the instruction, using previously-computed equivalents values.
4464 Then install the new sources and destinations in the table
4465 of available values. */
4470 rtx x
= PATTERN (insn
);
4476 struct table_elt
*src_eqv_elt
= 0;
4477 int src_eqv_volatile
= 0;
4478 int src_eqv_in_memory
= 0;
4479 unsigned src_eqv_hash
= 0;
4481 struct set
*sets
= (struct set
*) 0;
4483 if (GET_CODE (x
) == SET
)
4484 sets
= XALLOCA (struct set
);
4485 else if (GET_CODE (x
) == PARALLEL
)
4486 sets
= XALLOCAVEC (struct set
, XVECLEN (x
, 0));
4490 /* Records what this insn does to set CC0. */
4492 this_insn_cc0_mode
= VOIDmode
;
4495 /* Find all regs explicitly clobbered in this insn,
4496 to ensure they are not replaced with any other regs
4497 elsewhere in this insn. */
4498 invalidate_from_sets_and_clobbers (insn
);
4500 /* Record all the SETs in this instruction. */
4501 n_sets
= find_sets_in_insn (insn
, &sets
);
4503 /* Substitute the canonical register where possible. */
4504 canonicalize_insn (insn
, &sets
, n_sets
);
4506 /* If this insn has a REG_EQUAL note, store the equivalent value in SRC_EQV,
4507 if different, or if the DEST is a STRICT_LOW_PART. The latter condition
4508 is necessary because SRC_EQV is handled specially for this case, and if
4509 it isn't set, then there will be no equivalence for the destination. */
4510 if (n_sets
== 1 && REG_NOTES (insn
) != 0
4511 && (tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
)) != 0
4512 && (! rtx_equal_p (XEXP (tem
, 0), SET_SRC (sets
[0].rtl
))
4513 || GET_CODE (SET_DEST (sets
[0].rtl
)) == STRICT_LOW_PART
))
4514 src_eqv
= copy_rtx (XEXP (tem
, 0));
4516 /* Set sets[i].src_elt to the class each source belongs to.
4517 Detect assignments from or to volatile things
4518 and set set[i] to zero so they will be ignored
4519 in the rest of this function.
4521 Nothing in this loop changes the hash table or the register chains. */
4523 for (i
= 0; i
< n_sets
; i
++)
4525 bool repeat
= false;
4528 struct table_elt
*elt
= 0, *p
;
4529 enum machine_mode mode
;
4532 rtx src_related
= 0;
4533 bool src_related_is_const_anchor
= false;
4534 struct table_elt
*src_const_elt
= 0;
4535 int src_cost
= MAX_COST
;
4536 int src_eqv_cost
= MAX_COST
;
4537 int src_folded_cost
= MAX_COST
;
4538 int src_related_cost
= MAX_COST
;
4539 int src_elt_cost
= MAX_COST
;
4540 int src_regcost
= MAX_COST
;
4541 int src_eqv_regcost
= MAX_COST
;
4542 int src_folded_regcost
= MAX_COST
;
4543 int src_related_regcost
= MAX_COST
;
4544 int src_elt_regcost
= MAX_COST
;
4545 /* Set nonzero if we need to call force_const_mem on with the
4546 contents of src_folded before using it. */
4547 int src_folded_force_flag
= 0;
4549 dest
= SET_DEST (sets
[i
].rtl
);
4550 src
= SET_SRC (sets
[i
].rtl
);
4552 /* If SRC is a constant that has no machine mode,
4553 hash it with the destination's machine mode.
4554 This way we can keep different modes separate. */
4556 mode
= GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
4557 sets
[i
].mode
= mode
;
4561 enum machine_mode eqvmode
= mode
;
4562 if (GET_CODE (dest
) == STRICT_LOW_PART
)
4563 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
4565 hash_arg_in_memory
= 0;
4566 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
4568 /* Find the equivalence class for the equivalent expression. */
4571 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, eqvmode
);
4573 src_eqv_volatile
= do_not_record
;
4574 src_eqv_in_memory
= hash_arg_in_memory
;
4577 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
4578 value of the INNER register, not the destination. So it is not
4579 a valid substitution for the source. But save it for later. */
4580 if (GET_CODE (dest
) == STRICT_LOW_PART
)
4583 src_eqv_here
= src_eqv
;
4585 /* Simplify and foldable subexpressions in SRC. Then get the fully-
4586 simplified result, which may not necessarily be valid. */
4587 src_folded
= fold_rtx (src
, insn
);
4590 /* ??? This caused bad code to be generated for the m68k port with -O2.
4591 Suppose src is (CONST_INT -1), and that after truncation src_folded
4592 is (CONST_INT 3). Suppose src_folded is then used for src_const.
4593 At the end we will add src and src_const to the same equivalence
4594 class. We now have 3 and -1 on the same equivalence class. This
4595 causes later instructions to be mis-optimized. */
4596 /* If storing a constant in a bitfield, pre-truncate the constant
4597 so we will be able to record it later. */
4598 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
)
4600 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
4602 if (CONST_INT_P (src
)
4603 && CONST_INT_P (width
)
4604 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
4605 && (INTVAL (src
) & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
4607 = GEN_INT (INTVAL (src
) & (((HOST_WIDE_INT
) 1
4608 << INTVAL (width
)) - 1));
4612 /* Compute SRC's hash code, and also notice if it
4613 should not be recorded at all. In that case,
4614 prevent any further processing of this assignment. */
4616 hash_arg_in_memory
= 0;
4619 sets
[i
].src_hash
= HASH (src
, mode
);
4620 sets
[i
].src_volatile
= do_not_record
;
4621 sets
[i
].src_in_memory
= hash_arg_in_memory
;
4623 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
4624 a pseudo, do not record SRC. Using SRC as a replacement for
4625 anything else will be incorrect in that situation. Note that
4626 this usually occurs only for stack slots, in which case all the
4627 RTL would be referring to SRC, so we don't lose any optimization
4628 opportunities by not having SRC in the hash table. */
4631 && find_reg_note (insn
, REG_EQUIV
, NULL_RTX
) != 0
4633 && REGNO (dest
) >= FIRST_PSEUDO_REGISTER
)
4634 sets
[i
].src_volatile
= 1;
4637 /* It is no longer clear why we used to do this, but it doesn't
4638 appear to still be needed. So let's try without it since this
4639 code hurts cse'ing widened ops. */
4640 /* If source is a paradoxical subreg (such as QI treated as an SI),
4641 treat it as volatile. It may do the work of an SI in one context
4642 where the extra bits are not being used, but cannot replace an SI
4644 if (paradoxical_subreg_p (src
))
4645 sets
[i
].src_volatile
= 1;
4648 /* Locate all possible equivalent forms for SRC. Try to replace
4649 SRC in the insn with each cheaper equivalent.
4651 We have the following types of equivalents: SRC itself, a folded
4652 version, a value given in a REG_EQUAL note, or a value related
4655 Each of these equivalents may be part of an additional class
4656 of equivalents (if more than one is in the table, they must be in
4657 the same class; we check for this).
4659 If the source is volatile, we don't do any table lookups.
4661 We note any constant equivalent for possible later use in a
4664 if (!sets
[i
].src_volatile
)
4665 elt
= lookup (src
, sets
[i
].src_hash
, mode
);
4667 sets
[i
].src_elt
= elt
;
4669 if (elt
&& src_eqv_here
&& src_eqv_elt
)
4671 if (elt
->first_same_value
!= src_eqv_elt
->first_same_value
)
4673 /* The REG_EQUAL is indicating that two formerly distinct
4674 classes are now equivalent. So merge them. */
4675 merge_equiv_classes (elt
, src_eqv_elt
);
4676 src_eqv_hash
= HASH (src_eqv
, elt
->mode
);
4677 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, elt
->mode
);
4683 else if (src_eqv_elt
)
4686 /* Try to find a constant somewhere and record it in `src_const'.
4687 Record its table element, if any, in `src_const_elt'. Look in
4688 any known equivalences first. (If the constant is not in the
4689 table, also set `sets[i].src_const_hash'). */
4691 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
4695 src_const_elt
= elt
;
4700 && (CONSTANT_P (src_folded
)
4701 /* Consider (minus (label_ref L1) (label_ref L2)) as
4702 "constant" here so we will record it. This allows us
4703 to fold switch statements when an ADDR_DIFF_VEC is used. */
4704 || (GET_CODE (src_folded
) == MINUS
4705 && GET_CODE (XEXP (src_folded
, 0)) == LABEL_REF
4706 && GET_CODE (XEXP (src_folded
, 1)) == LABEL_REF
)))
4707 src_const
= src_folded
, src_const_elt
= elt
;
4708 else if (src_const
== 0 && src_eqv_here
&& CONSTANT_P (src_eqv_here
))
4709 src_const
= src_eqv_here
, src_const_elt
= src_eqv_elt
;
4711 /* If we don't know if the constant is in the table, get its
4712 hash code and look it up. */
4713 if (src_const
&& src_const_elt
== 0)
4715 sets
[i
].src_const_hash
= HASH (src_const
, mode
);
4716 src_const_elt
= lookup (src_const
, sets
[i
].src_const_hash
, mode
);
4719 sets
[i
].src_const
= src_const
;
4720 sets
[i
].src_const_elt
= src_const_elt
;
4722 /* If the constant and our source are both in the table, mark them as
4723 equivalent. Otherwise, if a constant is in the table but the source
4724 isn't, set ELT to it. */
4725 if (src_const_elt
&& elt
4726 && src_const_elt
->first_same_value
!= elt
->first_same_value
)
4727 merge_equiv_classes (elt
, src_const_elt
);
4728 else if (src_const_elt
&& elt
== 0)
4729 elt
= src_const_elt
;
4731 /* See if there is a register linearly related to a constant
4732 equivalent of SRC. */
4734 && (GET_CODE (src_const
) == CONST
4735 || (src_const_elt
&& src_const_elt
->related_value
!= 0)))
4737 src_related
= use_related_value (src_const
, src_const_elt
);
4740 struct table_elt
*src_related_elt
4741 = lookup (src_related
, HASH (src_related
, mode
), mode
);
4742 if (src_related_elt
&& elt
)
4744 if (elt
->first_same_value
4745 != src_related_elt
->first_same_value
)
4746 /* This can occur when we previously saw a CONST
4747 involving a SYMBOL_REF and then see the SYMBOL_REF
4748 twice. Merge the involved classes. */
4749 merge_equiv_classes (elt
, src_related_elt
);
4752 src_related_elt
= 0;
4754 else if (src_related_elt
&& elt
== 0)
4755 elt
= src_related_elt
;
4759 /* See if we have a CONST_INT that is already in a register in a
4762 if (src_const
&& src_related
== 0 && CONST_INT_P (src_const
)
4763 && GET_MODE_CLASS (mode
) == MODE_INT
4764 && GET_MODE_PRECISION (mode
) < BITS_PER_WORD
)
4766 enum machine_mode wider_mode
;
4768 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
4769 wider_mode
!= VOIDmode
4770 && GET_MODE_PRECISION (wider_mode
) <= BITS_PER_WORD
4771 && src_related
== 0;
4772 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
4774 struct table_elt
*const_elt
4775 = lookup (src_const
, HASH (src_const
, wider_mode
), wider_mode
);
4780 for (const_elt
= const_elt
->first_same_value
;
4781 const_elt
; const_elt
= const_elt
->next_same_value
)
4782 if (REG_P (const_elt
->exp
))
4784 src_related
= gen_lowpart (mode
, const_elt
->exp
);
4790 /* Another possibility is that we have an AND with a constant in
4791 a mode narrower than a word. If so, it might have been generated
4792 as part of an "if" which would narrow the AND. If we already
4793 have done the AND in a wider mode, we can use a SUBREG of that
4796 if (flag_expensive_optimizations
&& ! src_related
4797 && GET_CODE (src
) == AND
&& CONST_INT_P (XEXP (src
, 1))
4798 && GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
4800 enum machine_mode tmode
;
4801 rtx new_and
= gen_rtx_AND (VOIDmode
, NULL_RTX
, XEXP (src
, 1));
4803 for (tmode
= GET_MODE_WIDER_MODE (mode
);
4804 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
4805 tmode
= GET_MODE_WIDER_MODE (tmode
))
4807 rtx inner
= gen_lowpart (tmode
, XEXP (src
, 0));
4808 struct table_elt
*larger_elt
;
4812 PUT_MODE (new_and
, tmode
);
4813 XEXP (new_and
, 0) = inner
;
4814 larger_elt
= lookup (new_and
, HASH (new_and
, tmode
), tmode
);
4815 if (larger_elt
== 0)
4818 for (larger_elt
= larger_elt
->first_same_value
;
4819 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
4820 if (REG_P (larger_elt
->exp
))
4823 = gen_lowpart (mode
, larger_elt
->exp
);
4833 #ifdef LOAD_EXTEND_OP
4834 /* See if a MEM has already been loaded with a widening operation;
4835 if it has, we can use a subreg of that. Many CISC machines
4836 also have such operations, but this is only likely to be
4837 beneficial on these machines. */
4839 if (flag_expensive_optimizations
&& src_related
== 0
4840 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
4841 && GET_MODE_CLASS (mode
) == MODE_INT
4842 && MEM_P (src
) && ! do_not_record
4843 && LOAD_EXTEND_OP (mode
) != UNKNOWN
)
4845 struct rtx_def memory_extend_buf
;
4846 rtx memory_extend_rtx
= &memory_extend_buf
;
4847 enum machine_mode tmode
;
4849 /* Set what we are trying to extend and the operation it might
4850 have been extended with. */
4851 memset (memory_extend_rtx
, 0, sizeof(*memory_extend_rtx
));
4852 PUT_CODE (memory_extend_rtx
, LOAD_EXTEND_OP (mode
));
4853 XEXP (memory_extend_rtx
, 0) = src
;
4855 for (tmode
= GET_MODE_WIDER_MODE (mode
);
4856 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
4857 tmode
= GET_MODE_WIDER_MODE (tmode
))
4859 struct table_elt
*larger_elt
;
4861 PUT_MODE (memory_extend_rtx
, tmode
);
4862 larger_elt
= lookup (memory_extend_rtx
,
4863 HASH (memory_extend_rtx
, tmode
), tmode
);
4864 if (larger_elt
== 0)
4867 for (larger_elt
= larger_elt
->first_same_value
;
4868 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
4869 if (REG_P (larger_elt
->exp
))
4871 src_related
= gen_lowpart (mode
, larger_elt
->exp
);
4879 #endif /* LOAD_EXTEND_OP */
4881 /* Try to express the constant using a register+offset expression
4882 derived from a constant anchor. */
4884 if (targetm
.const_anchor
4887 && GET_CODE (src_const
) == CONST_INT
)
4889 src_related
= try_const_anchors (src_const
, mode
);
4890 src_related_is_const_anchor
= src_related
!= NULL_RTX
;
4894 if (src
== src_folded
)
4897 /* At this point, ELT, if nonzero, points to a class of expressions
4898 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
4899 and SRC_RELATED, if nonzero, each contain additional equivalent
4900 expressions. Prune these latter expressions by deleting expressions
4901 already in the equivalence class.
4903 Check for an equivalent identical to the destination. If found,
4904 this is the preferred equivalent since it will likely lead to
4905 elimination of the insn. Indicate this by placing it in
4909 elt
= elt
->first_same_value
;
4910 for (p
= elt
; p
; p
= p
->next_same_value
)
4912 enum rtx_code code
= GET_CODE (p
->exp
);
4914 /* If the expression is not valid, ignore it. Then we do not
4915 have to check for validity below. In most cases, we can use
4916 `rtx_equal_p', since canonicalization has already been done. */
4917 if (code
!= REG
&& ! exp_equiv_p (p
->exp
, p
->exp
, 1, false))
4920 /* Also skip paradoxical subregs, unless that's what we're
4922 if (paradoxical_subreg_p (p
->exp
)
4924 && GET_CODE (src
) == SUBREG
4925 && GET_MODE (src
) == GET_MODE (p
->exp
)
4926 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))
4927 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p
->exp
))))))
4930 if (src
&& GET_CODE (src
) == code
&& rtx_equal_p (src
, p
->exp
))
4932 else if (src_folded
&& GET_CODE (src_folded
) == code
4933 && rtx_equal_p (src_folded
, p
->exp
))
4935 else if (src_eqv_here
&& GET_CODE (src_eqv_here
) == code
4936 && rtx_equal_p (src_eqv_here
, p
->exp
))
4938 else if (src_related
&& GET_CODE (src_related
) == code
4939 && rtx_equal_p (src_related
, p
->exp
))
4942 /* This is the same as the destination of the insns, we want
4943 to prefer it. Copy it to src_related. The code below will
4944 then give it a negative cost. */
4945 if (GET_CODE (dest
) == code
&& rtx_equal_p (p
->exp
, dest
))
4949 /* Find the cheapest valid equivalent, trying all the available
4950 possibilities. Prefer items not in the hash table to ones
4951 that are when they are equal cost. Note that we can never
4952 worsen an insn as the current contents will also succeed.
4953 If we find an equivalent identical to the destination, use it as best,
4954 since this insn will probably be eliminated in that case. */
4957 if (rtx_equal_p (src
, dest
))
4958 src_cost
= src_regcost
= -1;
4961 src_cost
= COST (src
);
4962 src_regcost
= approx_reg_cost (src
);
4968 if (rtx_equal_p (src_eqv_here
, dest
))
4969 src_eqv_cost
= src_eqv_regcost
= -1;
4972 src_eqv_cost
= COST (src_eqv_here
);
4973 src_eqv_regcost
= approx_reg_cost (src_eqv_here
);
4979 if (rtx_equal_p (src_folded
, dest
))
4980 src_folded_cost
= src_folded_regcost
= -1;
4983 src_folded_cost
= COST (src_folded
);
4984 src_folded_regcost
= approx_reg_cost (src_folded
);
4990 if (rtx_equal_p (src_related
, dest
))
4991 src_related_cost
= src_related_regcost
= -1;
4994 src_related_cost
= COST (src_related
);
4995 src_related_regcost
= approx_reg_cost (src_related
);
4997 /* If a const-anchor is used to synthesize a constant that
4998 normally requires multiple instructions then slightly prefer
4999 it over the original sequence. These instructions are likely
5000 to become redundant now. We can't compare against the cost
5001 of src_eqv_here because, on MIPS for example, multi-insn
5002 constants have zero cost; they are assumed to be hoisted from
5004 if (src_related_is_const_anchor
5005 && src_related_cost
== src_cost
5011 /* If this was an indirect jump insn, a known label will really be
5012 cheaper even though it looks more expensive. */
5013 if (dest
== pc_rtx
&& src_const
&& GET_CODE (src_const
) == LABEL_REF
)
5014 src_folded
= src_const
, src_folded_cost
= src_folded_regcost
= -1;
5016 /* Terminate loop when replacement made. This must terminate since
5017 the current contents will be tested and will always be valid. */
5022 /* Skip invalid entries. */
5023 while (elt
&& !REG_P (elt
->exp
)
5024 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, false))
5025 elt
= elt
->next_same_value
;
5027 /* A paradoxical subreg would be bad here: it'll be the right
5028 size, but later may be adjusted so that the upper bits aren't
5029 what we want. So reject it. */
5031 && paradoxical_subreg_p (elt
->exp
)
5032 /* It is okay, though, if the rtx we're trying to match
5033 will ignore any of the bits we can't predict. */
5035 && GET_CODE (src
) == SUBREG
5036 && GET_MODE (src
) == GET_MODE (elt
->exp
)
5037 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))
5038 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt
->exp
))))))
5040 elt
= elt
->next_same_value
;
5046 src_elt_cost
= elt
->cost
;
5047 src_elt_regcost
= elt
->regcost
;
5050 /* Find cheapest and skip it for the next time. For items
5051 of equal cost, use this order:
5052 src_folded, src, src_eqv, src_related and hash table entry. */
5054 && preferable (src_folded_cost
, src_folded_regcost
,
5055 src_cost
, src_regcost
) <= 0
5056 && preferable (src_folded_cost
, src_folded_regcost
,
5057 src_eqv_cost
, src_eqv_regcost
) <= 0
5058 && preferable (src_folded_cost
, src_folded_regcost
,
5059 src_related_cost
, src_related_regcost
) <= 0
5060 && preferable (src_folded_cost
, src_folded_regcost
,
5061 src_elt_cost
, src_elt_regcost
) <= 0)
5063 trial
= src_folded
, src_folded_cost
= MAX_COST
;
5064 if (src_folded_force_flag
)
5066 rtx forced
= force_const_mem (mode
, trial
);
5072 && preferable (src_cost
, src_regcost
,
5073 src_eqv_cost
, src_eqv_regcost
) <= 0
5074 && preferable (src_cost
, src_regcost
,
5075 src_related_cost
, src_related_regcost
) <= 0
5076 && preferable (src_cost
, src_regcost
,
5077 src_elt_cost
, src_elt_regcost
) <= 0)
5078 trial
= src
, src_cost
= MAX_COST
;
5079 else if (src_eqv_here
5080 && preferable (src_eqv_cost
, src_eqv_regcost
,
5081 src_related_cost
, src_related_regcost
) <= 0
5082 && preferable (src_eqv_cost
, src_eqv_regcost
,
5083 src_elt_cost
, src_elt_regcost
) <= 0)
5084 trial
= src_eqv_here
, src_eqv_cost
= MAX_COST
;
5085 else if (src_related
5086 && preferable (src_related_cost
, src_related_regcost
,
5087 src_elt_cost
, src_elt_regcost
) <= 0)
5088 trial
= src_related
, src_related_cost
= MAX_COST
;
5092 elt
= elt
->next_same_value
;
5093 src_elt_cost
= MAX_COST
;
5096 /* Avoid creation of overlapping memory moves. */
5097 if (MEM_P (trial
) && MEM_P (SET_DEST (sets
[i
].rtl
)))
5101 /* BLKmode moves are not handled by cse anyway. */
5102 if (GET_MODE (trial
) == BLKmode
)
5105 src
= canon_rtx (trial
);
5106 dest
= canon_rtx (SET_DEST (sets
[i
].rtl
));
5108 if (!MEM_P (src
) || !MEM_P (dest
)
5109 || !nonoverlapping_memrefs_p (src
, dest
, false))
5114 (set (reg:M N) (const_int A))
5115 (set (reg:M2 O) (const_int B))
5116 (set (zero_extract:M2 (reg:M N) (const_int C) (const_int D))
5118 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
5119 && CONST_INT_P (trial
)
5120 && CONST_INT_P (XEXP (SET_DEST (sets
[i
].rtl
), 1))
5121 && CONST_INT_P (XEXP (SET_DEST (sets
[i
].rtl
), 2))
5122 && REG_P (XEXP (SET_DEST (sets
[i
].rtl
), 0))
5123 && (GET_MODE_PRECISION (GET_MODE (SET_DEST (sets
[i
].rtl
)))
5124 >= INTVAL (XEXP (SET_DEST (sets
[i
].rtl
), 1)))
5125 && ((unsigned) INTVAL (XEXP (SET_DEST (sets
[i
].rtl
), 1))
5126 + (unsigned) INTVAL (XEXP (SET_DEST (sets
[i
].rtl
), 2))
5127 <= HOST_BITS_PER_WIDE_INT
))
5129 rtx dest_reg
= XEXP (SET_DEST (sets
[i
].rtl
), 0);
5130 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
5131 rtx pos
= XEXP (SET_DEST (sets
[i
].rtl
), 2);
5132 unsigned int dest_hash
= HASH (dest_reg
, GET_MODE (dest_reg
));
5133 struct table_elt
*dest_elt
5134 = lookup (dest_reg
, dest_hash
, GET_MODE (dest_reg
));
5135 rtx dest_cst
= NULL
;
5138 for (p
= dest_elt
->first_same_value
; p
; p
= p
->next_same_value
)
5139 if (p
->is_const
&& CONST_INT_P (p
->exp
))
5146 HOST_WIDE_INT val
= INTVAL (dest_cst
);
5149 if (BITS_BIG_ENDIAN
)
5150 shift
= GET_MODE_PRECISION (GET_MODE (dest_reg
))
5151 - INTVAL (pos
) - INTVAL (width
);
5153 shift
= INTVAL (pos
);
5154 if (INTVAL (width
) == HOST_BITS_PER_WIDE_INT
)
5155 mask
= ~(HOST_WIDE_INT
) 0;
5157 mask
= ((HOST_WIDE_INT
) 1 << INTVAL (width
)) - 1;
5158 val
&= ~(mask
<< shift
);
5159 val
|= (INTVAL (trial
) & mask
) << shift
;
5160 val
= trunc_int_for_mode (val
, GET_MODE (dest_reg
));
5161 validate_unshare_change (insn
, &SET_DEST (sets
[i
].rtl
),
5163 validate_unshare_change (insn
, &SET_SRC (sets
[i
].rtl
),
5165 if (apply_change_group ())
5167 rtx note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
5170 remove_note (insn
, note
);
5171 df_notes_rescan (insn
);
5175 src_eqv_volatile
= 0;
5176 src_eqv_in_memory
= 0;
5184 /* We don't normally have an insn matching (set (pc) (pc)), so
5185 check for this separately here. We will delete such an
5188 For other cases such as a table jump or conditional jump
5189 where we know the ultimate target, go ahead and replace the
5190 operand. While that may not make a valid insn, we will
5191 reemit the jump below (and also insert any necessary
5193 if (n_sets
== 1 && dest
== pc_rtx
5195 || (GET_CODE (trial
) == LABEL_REF
5196 && ! condjump_p (insn
))))
5198 /* Don't substitute non-local labels, this confuses CFG. */
5199 if (GET_CODE (trial
) == LABEL_REF
5200 && LABEL_REF_NONLOCAL_P (trial
))
5203 SET_SRC (sets
[i
].rtl
) = trial
;
5204 cse_jumps_altered
= true;
5208 /* Reject certain invalid forms of CONST that we create. */
5209 else if (CONSTANT_P (trial
)
5210 && GET_CODE (trial
) == CONST
5211 /* Reject cases that will cause decode_rtx_const to
5212 die. On the alpha when simplifying a switch, we
5213 get (const (truncate (minus (label_ref)
5215 && (GET_CODE (XEXP (trial
, 0)) == TRUNCATE
5216 /* Likewise on IA-64, except without the
5218 || (GET_CODE (XEXP (trial
, 0)) == MINUS
5219 && GET_CODE (XEXP (XEXP (trial
, 0), 0)) == LABEL_REF
5220 && GET_CODE (XEXP (XEXP (trial
, 0), 1)) == LABEL_REF
)))
5221 /* Do nothing for this case. */
5224 /* Look for a substitution that makes a valid insn. */
5225 else if (validate_unshare_change
5226 (insn
, &SET_SRC (sets
[i
].rtl
), trial
, 0))
5228 rtx new_rtx
= canon_reg (SET_SRC (sets
[i
].rtl
), insn
);
5230 /* The result of apply_change_group can be ignored; see
5233 validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new_rtx
, 1);
5234 apply_change_group ();
5239 /* If we previously found constant pool entries for
5240 constants and this is a constant, try making a
5241 pool entry. Put it in src_folded unless we already have done
5242 this since that is where it likely came from. */
5244 else if (constant_pool_entries_cost
5245 && CONSTANT_P (trial
)
5247 || (!MEM_P (src_folded
)
5248 && ! src_folded_force_flag
))
5249 && GET_MODE_CLASS (mode
) != MODE_CC
5250 && mode
!= VOIDmode
)
5252 src_folded_force_flag
= 1;
5254 src_folded_cost
= constant_pool_entries_cost
;
5255 src_folded_regcost
= constant_pool_entries_regcost
;
5259 /* If we changed the insn too much, handle this set from scratch. */
5266 src
= SET_SRC (sets
[i
].rtl
);
5268 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5269 However, there is an important exception: If both are registers
5270 that are not the head of their equivalence class, replace SET_SRC
5271 with the head of the class. If we do not do this, we will have
5272 both registers live over a portion of the basic block. This way,
5273 their lifetimes will likely abut instead of overlapping. */
5275 && REGNO_QTY_VALID_P (REGNO (dest
)))
5277 int dest_q
= REG_QTY (REGNO (dest
));
5278 struct qty_table_elem
*dest_ent
= &qty_table
[dest_q
];
5280 if (dest_ent
->mode
== GET_MODE (dest
)
5281 && dest_ent
->first_reg
!= REGNO (dest
)
5282 && REG_P (src
) && REGNO (src
) == REGNO (dest
)
5283 /* Don't do this if the original insn had a hard reg as
5284 SET_SRC or SET_DEST. */
5285 && (!REG_P (sets
[i
].src
)
5286 || REGNO (sets
[i
].src
) >= FIRST_PSEUDO_REGISTER
)
5287 && (!REG_P (dest
) || REGNO (dest
) >= FIRST_PSEUDO_REGISTER
))
5288 /* We can't call canon_reg here because it won't do anything if
5289 SRC is a hard register. */
5291 int src_q
= REG_QTY (REGNO (src
));
5292 struct qty_table_elem
*src_ent
= &qty_table
[src_q
];
5293 int first
= src_ent
->first_reg
;
5295 = (first
>= FIRST_PSEUDO_REGISTER
5296 ? regno_reg_rtx
[first
] : gen_rtx_REG (GET_MODE (src
), first
));
5298 /* We must use validate-change even for this, because this
5299 might be a special no-op instruction, suitable only to
5301 if (validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new_src
, 0))
5304 /* If we had a constant that is cheaper than what we are now
5305 setting SRC to, use that constant. We ignored it when we
5306 thought we could make this into a no-op. */
5307 if (src_const
&& COST (src_const
) < COST (src
)
5308 && validate_change (insn
, &SET_SRC (sets
[i
].rtl
),
5315 /* If we made a change, recompute SRC values. */
5316 if (src
!= sets
[i
].src
)
5319 hash_arg_in_memory
= 0;
5321 sets
[i
].src_hash
= HASH (src
, mode
);
5322 sets
[i
].src_volatile
= do_not_record
;
5323 sets
[i
].src_in_memory
= hash_arg_in_memory
;
5324 sets
[i
].src_elt
= lookup (src
, sets
[i
].src_hash
, mode
);
5327 /* If this is a single SET, we are setting a register, and we have an
5328 equivalent constant, we want to add a REG_NOTE. We don't want
5329 to write a REG_EQUAL note for a constant pseudo since verifying that
5330 that pseudo hasn't been eliminated is a pain. Such a note also
5331 won't help anything.
5333 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5334 which can be created for a reference to a compile time computable
5335 entry in a jump table. */
5337 if (n_sets
== 1 && src_const
&& REG_P (dest
)
5338 && !REG_P (src_const
)
5339 && ! (GET_CODE (src_const
) == CONST
5340 && GET_CODE (XEXP (src_const
, 0)) == MINUS
5341 && GET_CODE (XEXP (XEXP (src_const
, 0), 0)) == LABEL_REF
5342 && GET_CODE (XEXP (XEXP (src_const
, 0), 1)) == LABEL_REF
))
5344 /* We only want a REG_EQUAL note if src_const != src. */
5345 if (! rtx_equal_p (src
, src_const
))
5347 /* Make sure that the rtx is not shared. */
5348 src_const
= copy_rtx (src_const
);
5350 /* Record the actual constant value in a REG_EQUAL note,
5351 making a new one if one does not already exist. */
5352 set_unique_reg_note (insn
, REG_EQUAL
, src_const
);
5353 df_notes_rescan (insn
);
5357 /* Now deal with the destination. */
5360 /* Look within any ZERO_EXTRACT to the MEM or REG within it. */
5361 while (GET_CODE (dest
) == SUBREG
5362 || GET_CODE (dest
) == ZERO_EXTRACT
5363 || GET_CODE (dest
) == STRICT_LOW_PART
)
5364 dest
= XEXP (dest
, 0);
5366 sets
[i
].inner_dest
= dest
;
5370 #ifdef PUSH_ROUNDING
5371 /* Stack pushes invalidate the stack pointer. */
5372 rtx addr
= XEXP (dest
, 0);
5373 if (GET_RTX_CLASS (GET_CODE (addr
)) == RTX_AUTOINC
5374 && XEXP (addr
, 0) == stack_pointer_rtx
)
5375 invalidate (stack_pointer_rtx
, VOIDmode
);
5377 dest
= fold_rtx (dest
, insn
);
5380 /* Compute the hash code of the destination now,
5381 before the effects of this instruction are recorded,
5382 since the register values used in the address computation
5383 are those before this instruction. */
5384 sets
[i
].dest_hash
= HASH (dest
, mode
);
5386 /* Don't enter a bit-field in the hash table
5387 because the value in it after the store
5388 may not equal what was stored, due to truncation. */
5390 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
)
5392 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
5394 if (src_const
!= 0 && CONST_INT_P (src_const
)
5395 && CONST_INT_P (width
)
5396 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
5397 && ! (INTVAL (src_const
)
5398 & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
5399 /* Exception: if the value is constant,
5400 and it won't be truncated, record it. */
5404 /* This is chosen so that the destination will be invalidated
5405 but no new value will be recorded.
5406 We must invalidate because sometimes constant
5407 values can be recorded for bitfields. */
5408 sets
[i
].src_elt
= 0;
5409 sets
[i
].src_volatile
= 1;
5415 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5417 else if (n_sets
== 1 && dest
== pc_rtx
&& src
== pc_rtx
)
5419 /* One less use of the label this insn used to jump to. */
5420 delete_insn_and_edges (insn
);
5421 cse_jumps_altered
= true;
5422 /* No more processing for this set. */
5426 /* If this SET is now setting PC to a label, we know it used to
5427 be a conditional or computed branch. */
5428 else if (dest
== pc_rtx
&& GET_CODE (src
) == LABEL_REF
5429 && !LABEL_REF_NONLOCAL_P (src
))
5431 /* We reemit the jump in as many cases as possible just in
5432 case the form of an unconditional jump is significantly
5433 different than a computed jump or conditional jump.
5435 If this insn has multiple sets, then reemitting the
5436 jump is nontrivial. So instead we just force rerecognition
5437 and hope for the best. */
5442 new_rtx
= emit_jump_insn_before (gen_jump (XEXP (src
, 0)), insn
);
5443 JUMP_LABEL (new_rtx
) = XEXP (src
, 0);
5444 LABEL_NUSES (XEXP (src
, 0))++;
5446 /* Make sure to copy over REG_NON_LOCAL_GOTO. */
5447 note
= find_reg_note (insn
, REG_NON_LOCAL_GOTO
, 0);
5450 XEXP (note
, 1) = NULL_RTX
;
5451 REG_NOTES (new_rtx
) = note
;
5454 delete_insn_and_edges (insn
);
5458 INSN_CODE (insn
) = -1;
5460 /* Do not bother deleting any unreachable code, let jump do it. */
5461 cse_jumps_altered
= true;
5465 /* If destination is volatile, invalidate it and then do no further
5466 processing for this assignment. */
5468 else if (do_not_record
)
5470 if (REG_P (dest
) || GET_CODE (dest
) == SUBREG
)
5471 invalidate (dest
, VOIDmode
);
5472 else if (MEM_P (dest
))
5473 invalidate (dest
, VOIDmode
);
5474 else if (GET_CODE (dest
) == STRICT_LOW_PART
5475 || GET_CODE (dest
) == ZERO_EXTRACT
)
5476 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
5480 if (sets
[i
].rtl
!= 0 && dest
!= SET_DEST (sets
[i
].rtl
))
5481 sets
[i
].dest_hash
= HASH (SET_DEST (sets
[i
].rtl
), mode
);
5484 /* If setting CC0, record what it was set to, or a constant, if it
5485 is equivalent to a constant. If it is being set to a floating-point
5486 value, make a COMPARE with the appropriate constant of 0. If we
5487 don't do this, later code can interpret this as a test against
5488 const0_rtx, which can cause problems if we try to put it into an
5489 insn as a floating-point operand. */
5490 if (dest
== cc0_rtx
)
5492 this_insn_cc0
= src_const
&& mode
!= VOIDmode
? src_const
: src
;
5493 this_insn_cc0_mode
= mode
;
5494 if (FLOAT_MODE_P (mode
))
5495 this_insn_cc0
= gen_rtx_COMPARE (VOIDmode
, this_insn_cc0
,
5501 /* Now enter all non-volatile source expressions in the hash table
5502 if they are not already present.
5503 Record their equivalence classes in src_elt.
5504 This way we can insert the corresponding destinations into
5505 the same classes even if the actual sources are no longer in them
5506 (having been invalidated). */
5508 if (src_eqv
&& src_eqv_elt
== 0 && sets
[0].rtl
!= 0 && ! src_eqv_volatile
5509 && ! rtx_equal_p (src_eqv
, SET_DEST (sets
[0].rtl
)))
5511 struct table_elt
*elt
;
5512 struct table_elt
*classp
= sets
[0].src_elt
;
5513 rtx dest
= SET_DEST (sets
[0].rtl
);
5514 enum machine_mode eqvmode
= GET_MODE (dest
);
5516 if (GET_CODE (dest
) == STRICT_LOW_PART
)
5518 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
5521 if (insert_regs (src_eqv
, classp
, 0))
5523 rehash_using_reg (src_eqv
);
5524 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
5526 elt
= insert (src_eqv
, classp
, src_eqv_hash
, eqvmode
);
5527 elt
->in_memory
= src_eqv_in_memory
;
5530 /* Check to see if src_eqv_elt is the same as a set source which
5531 does not yet have an elt, and if so set the elt of the set source
5533 for (i
= 0; i
< n_sets
; i
++)
5534 if (sets
[i
].rtl
&& sets
[i
].src_elt
== 0
5535 && rtx_equal_p (SET_SRC (sets
[i
].rtl
), src_eqv
))
5536 sets
[i
].src_elt
= src_eqv_elt
;
5539 for (i
= 0; i
< n_sets
; i
++)
5540 if (sets
[i
].rtl
&& ! sets
[i
].src_volatile
5541 && ! rtx_equal_p (SET_SRC (sets
[i
].rtl
), SET_DEST (sets
[i
].rtl
)))
5543 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == STRICT_LOW_PART
)
5545 /* REG_EQUAL in setting a STRICT_LOW_PART
5546 gives an equivalent for the entire destination register,
5547 not just for the subreg being stored in now.
5548 This is a more interesting equivalence, so we arrange later
5549 to treat the entire reg as the destination. */
5550 sets
[i
].src_elt
= src_eqv_elt
;
5551 sets
[i
].src_hash
= src_eqv_hash
;
5555 /* Insert source and constant equivalent into hash table, if not
5557 struct table_elt
*classp
= src_eqv_elt
;
5558 rtx src
= sets
[i
].src
;
5559 rtx dest
= SET_DEST (sets
[i
].rtl
);
5560 enum machine_mode mode
5561 = GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
5563 /* It's possible that we have a source value known to be
5564 constant but don't have a REG_EQUAL note on the insn.
5565 Lack of a note will mean src_eqv_elt will be NULL. This
5566 can happen where we've generated a SUBREG to access a
5567 CONST_INT that is already in a register in a wider mode.
5568 Ensure that the source expression is put in the proper
5571 classp
= sets
[i
].src_const_elt
;
5573 if (sets
[i
].src_elt
== 0)
5575 struct table_elt
*elt
;
5577 /* Note that these insert_regs calls cannot remove
5578 any of the src_elt's, because they would have failed to
5579 match if not still valid. */
5580 if (insert_regs (src
, classp
, 0))
5582 rehash_using_reg (src
);
5583 sets
[i
].src_hash
= HASH (src
, mode
);
5585 elt
= insert (src
, classp
, sets
[i
].src_hash
, mode
);
5586 elt
->in_memory
= sets
[i
].src_in_memory
;
5587 sets
[i
].src_elt
= classp
= elt
;
5589 if (sets
[i
].src_const
&& sets
[i
].src_const_elt
== 0
5590 && src
!= sets
[i
].src_const
5591 && ! rtx_equal_p (sets
[i
].src_const
, src
))
5592 sets
[i
].src_elt
= insert (sets
[i
].src_const
, classp
,
5593 sets
[i
].src_const_hash
, mode
);
5596 else if (sets
[i
].src_elt
== 0)
5597 /* If we did not insert the source into the hash table (e.g., it was
5598 volatile), note the equivalence class for the REG_EQUAL value, if any,
5599 so that the destination goes into that class. */
5600 sets
[i
].src_elt
= src_eqv_elt
;
5602 /* Record destination addresses in the hash table. This allows us to
5603 check if they are invalidated by other sets. */
5604 for (i
= 0; i
< n_sets
; i
++)
5608 rtx x
= sets
[i
].inner_dest
;
5609 struct table_elt
*elt
;
5610 enum machine_mode mode
;
5616 mode
= GET_MODE (x
);
5617 hash
= HASH (x
, mode
);
5618 elt
= lookup (x
, hash
, mode
);
5621 if (insert_regs (x
, NULL
, 0))
5623 rtx dest
= SET_DEST (sets
[i
].rtl
);
5625 rehash_using_reg (x
);
5626 hash
= HASH (x
, mode
);
5627 sets
[i
].dest_hash
= HASH (dest
, GET_MODE (dest
));
5629 elt
= insert (x
, NULL
, hash
, mode
);
5632 sets
[i
].dest_addr_elt
= elt
;
5635 sets
[i
].dest_addr_elt
= NULL
;
5639 invalidate_from_clobbers (insn
);
5641 /* Some registers are invalidated by subroutine calls. Memory is
5642 invalidated by non-constant calls. */
5646 if (!(RTL_CONST_OR_PURE_CALL_P (insn
)))
5647 invalidate_memory ();
5648 invalidate_for_call ();
5651 /* Now invalidate everything set by this instruction.
5652 If a SUBREG or other funny destination is being set,
5653 sets[i].rtl is still nonzero, so here we invalidate the reg
5654 a part of which is being set. */
5656 for (i
= 0; i
< n_sets
; i
++)
5659 /* We can't use the inner dest, because the mode associated with
5660 a ZERO_EXTRACT is significant. */
5661 rtx dest
= SET_DEST (sets
[i
].rtl
);
5663 /* Needed for registers to remove the register from its
5664 previous quantity's chain.
5665 Needed for memory if this is a nonvarying address, unless
5666 we have just done an invalidate_memory that covers even those. */
5667 if (REG_P (dest
) || GET_CODE (dest
) == SUBREG
)
5668 invalidate (dest
, VOIDmode
);
5669 else if (MEM_P (dest
))
5670 invalidate (dest
, VOIDmode
);
5671 else if (GET_CODE (dest
) == STRICT_LOW_PART
5672 || GET_CODE (dest
) == ZERO_EXTRACT
)
5673 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
5676 /* A volatile ASM invalidates everything. */
5677 if (NONJUMP_INSN_P (insn
)
5678 && GET_CODE (PATTERN (insn
)) == ASM_OPERANDS
5679 && MEM_VOLATILE_P (PATTERN (insn
)))
5680 flush_hash_table ();
5682 /* Don't cse over a call to setjmp; on some machines (eg VAX)
5683 the regs restored by the longjmp come from a later time
5685 if (CALL_P (insn
) && find_reg_note (insn
, REG_SETJMP
, NULL
))
5687 flush_hash_table ();
5691 /* Make sure registers mentioned in destinations
5692 are safe for use in an expression to be inserted.
5693 This removes from the hash table
5694 any invalid entry that refers to one of these registers.
5696 We don't care about the return value from mention_regs because
5697 we are going to hash the SET_DEST values unconditionally. */
5699 for (i
= 0; i
< n_sets
; i
++)
5703 rtx x
= SET_DEST (sets
[i
].rtl
);
5709 /* We used to rely on all references to a register becoming
5710 inaccessible when a register changes to a new quantity,
5711 since that changes the hash code. However, that is not
5712 safe, since after HASH_SIZE new quantities we get a
5713 hash 'collision' of a register with its own invalid
5714 entries. And since SUBREGs have been changed not to
5715 change their hash code with the hash code of the register,
5716 it wouldn't work any longer at all. So we have to check
5717 for any invalid references lying around now.
5718 This code is similar to the REG case in mention_regs,
5719 but it knows that reg_tick has been incremented, and
5720 it leaves reg_in_table as -1 . */
5721 unsigned int regno
= REGNO (x
);
5722 unsigned int endregno
= END_REGNO (x
);
5725 for (i
= regno
; i
< endregno
; i
++)
5727 if (REG_IN_TABLE (i
) >= 0)
5729 remove_invalid_refs (i
);
5730 REG_IN_TABLE (i
) = -1;
5737 /* We may have just removed some of the src_elt's from the hash table.
5738 So replace each one with the current head of the same class.
5739 Also check if destination addresses have been removed. */
5741 for (i
= 0; i
< n_sets
; i
++)
5744 if (sets
[i
].dest_addr_elt
5745 && sets
[i
].dest_addr_elt
->first_same_value
== 0)
5747 /* The elt was removed, which means this destination is not
5748 valid after this instruction. */
5749 sets
[i
].rtl
= NULL_RTX
;
5751 else if (sets
[i
].src_elt
&& sets
[i
].src_elt
->first_same_value
== 0)
5752 /* If elt was removed, find current head of same class,
5753 or 0 if nothing remains of that class. */
5755 struct table_elt
*elt
= sets
[i
].src_elt
;
5757 while (elt
&& elt
->prev_same_value
)
5758 elt
= elt
->prev_same_value
;
5760 while (elt
&& elt
->first_same_value
== 0)
5761 elt
= elt
->next_same_value
;
5762 sets
[i
].src_elt
= elt
? elt
->first_same_value
: 0;
5766 /* Now insert the destinations into their equivalence classes. */
5768 for (i
= 0; i
< n_sets
; i
++)
5771 rtx dest
= SET_DEST (sets
[i
].rtl
);
5772 struct table_elt
*elt
;
5774 /* Don't record value if we are not supposed to risk allocating
5775 floating-point values in registers that might be wider than
5777 if ((flag_float_store
5779 && FLOAT_MODE_P (GET_MODE (dest
)))
5780 /* Don't record BLKmode values, because we don't know the
5781 size of it, and can't be sure that other BLKmode values
5782 have the same or smaller size. */
5783 || GET_MODE (dest
) == BLKmode
5784 /* If we didn't put a REG_EQUAL value or a source into the hash
5785 table, there is no point is recording DEST. */
5786 || sets
[i
].src_elt
== 0
5787 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
5788 or SIGN_EXTEND, don't record DEST since it can cause
5789 some tracking to be wrong.
5791 ??? Think about this more later. */
5792 || (paradoxical_subreg_p (dest
)
5793 && (GET_CODE (sets
[i
].src
) == SIGN_EXTEND
5794 || GET_CODE (sets
[i
].src
) == ZERO_EXTEND
)))
5797 /* STRICT_LOW_PART isn't part of the value BEING set,
5798 and neither is the SUBREG inside it.
5799 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
5800 if (GET_CODE (dest
) == STRICT_LOW_PART
)
5801 dest
= SUBREG_REG (XEXP (dest
, 0));
5803 if (REG_P (dest
) || GET_CODE (dest
) == SUBREG
)
5804 /* Registers must also be inserted into chains for quantities. */
5805 if (insert_regs (dest
, sets
[i
].src_elt
, 1))
5807 /* If `insert_regs' changes something, the hash code must be
5809 rehash_using_reg (dest
);
5810 sets
[i
].dest_hash
= HASH (dest
, GET_MODE (dest
));
5813 elt
= insert (dest
, sets
[i
].src_elt
,
5814 sets
[i
].dest_hash
, GET_MODE (dest
));
5816 /* If this is a constant, insert the constant anchors with the
5817 equivalent register-offset expressions using register DEST. */
5818 if (targetm
.const_anchor
5820 && SCALAR_INT_MODE_P (GET_MODE (dest
))
5821 && GET_CODE (sets
[i
].src_elt
->exp
) == CONST_INT
)
5822 insert_const_anchors (dest
, sets
[i
].src_elt
->exp
, GET_MODE (dest
));
5824 elt
->in_memory
= (MEM_P (sets
[i
].inner_dest
)
5825 && !MEM_READONLY_P (sets
[i
].inner_dest
));
5827 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
5828 narrower than M2, and both M1 and M2 are the same number of words,
5829 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
5830 make that equivalence as well.
5832 However, BAR may have equivalences for which gen_lowpart
5833 will produce a simpler value than gen_lowpart applied to
5834 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
5835 BAR's equivalences. If we don't get a simplified form, make
5836 the SUBREG. It will not be used in an equivalence, but will
5837 cause two similar assignments to be detected.
5839 Note the loop below will find SUBREG_REG (DEST) since we have
5840 already entered SRC and DEST of the SET in the table. */
5842 if (GET_CODE (dest
) == SUBREG
5843 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))) - 1)
5845 == (GET_MODE_SIZE (GET_MODE (dest
)) - 1) / UNITS_PER_WORD
)
5846 && (GET_MODE_SIZE (GET_MODE (dest
))
5847 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))))
5848 && sets
[i
].src_elt
!= 0)
5850 enum machine_mode new_mode
= GET_MODE (SUBREG_REG (dest
));
5851 struct table_elt
*elt
, *classp
= 0;
5853 for (elt
= sets
[i
].src_elt
->first_same_value
; elt
;
5854 elt
= elt
->next_same_value
)
5858 struct table_elt
*src_elt
;
5861 /* Ignore invalid entries. */
5862 if (!REG_P (elt
->exp
)
5863 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, false))
5866 /* We may have already been playing subreg games. If the
5867 mode is already correct for the destination, use it. */
5868 if (GET_MODE (elt
->exp
) == new_mode
)
5872 /* Calculate big endian correction for the SUBREG_BYTE.
5873 We have already checked that M1 (GET_MODE (dest))
5874 is not narrower than M2 (new_mode). */
5875 if (BYTES_BIG_ENDIAN
)
5876 byte
= (GET_MODE_SIZE (GET_MODE (dest
))
5877 - GET_MODE_SIZE (new_mode
));
5879 new_src
= simplify_gen_subreg (new_mode
, elt
->exp
,
5880 GET_MODE (dest
), byte
);
5883 /* The call to simplify_gen_subreg fails if the value
5884 is VOIDmode, yet we can't do any simplification, e.g.
5885 for EXPR_LISTs denoting function call results.
5886 It is invalid to construct a SUBREG with a VOIDmode
5887 SUBREG_REG, hence a zero new_src means we can't do
5888 this substitution. */
5892 src_hash
= HASH (new_src
, new_mode
);
5893 src_elt
= lookup (new_src
, src_hash
, new_mode
);
5895 /* Put the new source in the hash table is if isn't
5899 if (insert_regs (new_src
, classp
, 0))
5901 rehash_using_reg (new_src
);
5902 src_hash
= HASH (new_src
, new_mode
);
5904 src_elt
= insert (new_src
, classp
, src_hash
, new_mode
);
5905 src_elt
->in_memory
= elt
->in_memory
;
5907 else if (classp
&& classp
!= src_elt
->first_same_value
)
5908 /* Show that two things that we've seen before are
5909 actually the same. */
5910 merge_equiv_classes (src_elt
, classp
);
5912 classp
= src_elt
->first_same_value
;
5913 /* Ignore invalid entries. */
5915 && !REG_P (classp
->exp
)
5916 && ! exp_equiv_p (classp
->exp
, classp
->exp
, 1, false))
5917 classp
= classp
->next_same_value
;
5922 /* Special handling for (set REG0 REG1) where REG0 is the
5923 "cheapest", cheaper than REG1. After cse, REG1 will probably not
5924 be used in the sequel, so (if easily done) change this insn to
5925 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
5926 that computed their value. Then REG1 will become a dead store
5927 and won't cloud the situation for later optimizations.
5929 Do not make this change if REG1 is a hard register, because it will
5930 then be used in the sequel and we may be changing a two-operand insn
5931 into a three-operand insn.
5933 Also do not do this if we are operating on a copy of INSN. */
5935 if (n_sets
== 1 && sets
[0].rtl
)
5936 try_back_substitute_reg (sets
[0].rtl
, insn
);
5941 /* Remove from the hash table all expressions that reference memory. */
5944 invalidate_memory (void)
5947 struct table_elt
*p
, *next
;
5949 for (i
= 0; i
< HASH_SIZE
; i
++)
5950 for (p
= table
[i
]; p
; p
= next
)
5952 next
= p
->next_same_hash
;
5954 remove_from_table (p
, i
);
5958 /* Perform invalidation on the basis of everything about INSN,
5959 except for invalidating the actual places that are SET in it.
5960 This includes the places CLOBBERed, and anything that might
5961 alias with something that is SET or CLOBBERed. */
5964 invalidate_from_clobbers (rtx insn
)
5966 rtx x
= PATTERN (insn
);
5968 if (GET_CODE (x
) == CLOBBER
)
5970 rtx ref
= XEXP (x
, 0);
5973 if (REG_P (ref
) || GET_CODE (ref
) == SUBREG
5975 invalidate (ref
, VOIDmode
);
5976 else if (GET_CODE (ref
) == STRICT_LOW_PART
5977 || GET_CODE (ref
) == ZERO_EXTRACT
)
5978 invalidate (XEXP (ref
, 0), GET_MODE (ref
));
5981 else if (GET_CODE (x
) == PARALLEL
)
5984 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
5986 rtx y
= XVECEXP (x
, 0, i
);
5987 if (GET_CODE (y
) == CLOBBER
)
5989 rtx ref
= XEXP (y
, 0);
5990 if (REG_P (ref
) || GET_CODE (ref
) == SUBREG
5992 invalidate (ref
, VOIDmode
);
5993 else if (GET_CODE (ref
) == STRICT_LOW_PART
5994 || GET_CODE (ref
) == ZERO_EXTRACT
)
5995 invalidate (XEXP (ref
, 0), GET_MODE (ref
));
6001 /* Perform invalidation on the basis of everything about INSN.
6002 This includes the places CLOBBERed, and anything that might
6003 alias with something that is SET or CLOBBERed. */
6006 invalidate_from_sets_and_clobbers (rtx insn
)
6009 rtx x
= PATTERN (insn
);
6013 for (tem
= CALL_INSN_FUNCTION_USAGE (insn
); tem
; tem
= XEXP (tem
, 1))
6014 if (GET_CODE (XEXP (tem
, 0)) == CLOBBER
)
6015 invalidate (SET_DEST (XEXP (tem
, 0)), VOIDmode
);
6018 /* Ensure we invalidate the destination register of a CALL insn.
6019 This is necessary for machines where this register is a fixed_reg,
6020 because no other code would invalidate it. */
6021 if (GET_CODE (x
) == SET
&& GET_CODE (SET_SRC (x
)) == CALL
)
6022 invalidate (SET_DEST (x
), VOIDmode
);
6024 else if (GET_CODE (x
) == PARALLEL
)
6028 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
6030 rtx y
= XVECEXP (x
, 0, i
);
6031 if (GET_CODE (y
) == CLOBBER
)
6033 rtx clobbered
= XEXP (y
, 0);
6035 if (REG_P (clobbered
)
6036 || GET_CODE (clobbered
) == SUBREG
)
6037 invalidate (clobbered
, VOIDmode
);
6038 else if (GET_CODE (clobbered
) == STRICT_LOW_PART
6039 || GET_CODE (clobbered
) == ZERO_EXTRACT
)
6040 invalidate (XEXP (clobbered
, 0), GET_MODE (clobbered
));
6042 else if (GET_CODE (y
) == SET
&& GET_CODE (SET_SRC (y
)) == CALL
)
6043 invalidate (SET_DEST (y
), VOIDmode
);
6048 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
6049 and replace any registers in them with either an equivalent constant
6050 or the canonical form of the register. If we are inside an address,
6051 only do this if the address remains valid.
6053 OBJECT is 0 except when within a MEM in which case it is the MEM.
6055 Return the replacement for X. */
6058 cse_process_notes_1 (rtx x
, rtx object
, bool *changed
)
6060 enum rtx_code code
= GET_CODE (x
);
6061 const char *fmt
= GET_RTX_FORMAT (code
);
6079 validate_change (x
, &XEXP (x
, 0),
6080 cse_process_notes (XEXP (x
, 0), x
, changed
), 0);
6085 if (REG_NOTE_KIND (x
) == REG_EQUAL
)
6086 XEXP (x
, 0) = cse_process_notes (XEXP (x
, 0), NULL_RTX
, changed
);
6088 XEXP (x
, 1) = cse_process_notes (XEXP (x
, 1), NULL_RTX
, changed
);
6095 rtx new_rtx
= cse_process_notes (XEXP (x
, 0), object
, changed
);
6096 /* We don't substitute VOIDmode constants into these rtx,
6097 since they would impede folding. */
6098 if (GET_MODE (new_rtx
) != VOIDmode
)
6099 validate_change (object
, &XEXP (x
, 0), new_rtx
, 0);
6104 i
= REG_QTY (REGNO (x
));
6106 /* Return a constant or a constant register. */
6107 if (REGNO_QTY_VALID_P (REGNO (x
)))
6109 struct qty_table_elem
*ent
= &qty_table
[i
];
6111 if (ent
->const_rtx
!= NULL_RTX
6112 && (CONSTANT_P (ent
->const_rtx
)
6113 || REG_P (ent
->const_rtx
)))
6115 rtx new_rtx
= gen_lowpart (GET_MODE (x
), ent
->const_rtx
);
6117 return copy_rtx (new_rtx
);
6121 /* Otherwise, canonicalize this register. */
6122 return canon_reg (x
, NULL_RTX
);
6128 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
6130 validate_change (object
, &XEXP (x
, i
),
6131 cse_process_notes (XEXP (x
, i
), object
, changed
), 0);
6137 cse_process_notes (rtx x
, rtx object
, bool *changed
)
6139 rtx new_rtx
= cse_process_notes_1 (x
, object
, changed
);
6146 /* Find a path in the CFG, starting with FIRST_BB to perform CSE on.
6148 DATA is a pointer to a struct cse_basic_block_data, that is used to
6150 It is filled with a queue of basic blocks, starting with FIRST_BB
6151 and following a trace through the CFG.
6153 If all paths starting at FIRST_BB have been followed, or no new path
6154 starting at FIRST_BB can be constructed, this function returns FALSE.
6155 Otherwise, DATA->path is filled and the function returns TRUE indicating
6156 that a path to follow was found.
6158 If FOLLOW_JUMPS is false, the maximum path length is 1 and the only
6159 block in the path will be FIRST_BB. */
6162 cse_find_path (basic_block first_bb
, struct cse_basic_block_data
*data
,
6169 SET_BIT (cse_visited_basic_blocks
, first_bb
->index
);
6171 /* See if there is a previous path. */
6172 path_size
= data
->path_size
;
6174 /* There is a previous path. Make sure it started with FIRST_BB. */
6176 gcc_assert (data
->path
[0].bb
== first_bb
);
6178 /* There was only one basic block in the last path. Clear the path and
6179 return, so that paths starting at another basic block can be tried. */
6186 /* If the path was empty from the beginning, construct a new path. */
6188 data
->path
[path_size
++].bb
= first_bb
;
6191 /* Otherwise, path_size must be equal to or greater than 2, because
6192 a previous path exists that is at least two basic blocks long.
6194 Update the previous branch path, if any. If the last branch was
6195 previously along the branch edge, take the fallthrough edge now. */
6196 while (path_size
>= 2)
6198 basic_block last_bb_in_path
, previous_bb_in_path
;
6202 last_bb_in_path
= data
->path
[path_size
].bb
;
6203 previous_bb_in_path
= data
->path
[path_size
- 1].bb
;
6205 /* If we previously followed a path along the branch edge, try
6206 the fallthru edge now. */
6207 if (EDGE_COUNT (previous_bb_in_path
->succs
) == 2
6208 && any_condjump_p (BB_END (previous_bb_in_path
))
6209 && (e
= find_edge (previous_bb_in_path
, last_bb_in_path
))
6210 && e
== BRANCH_EDGE (previous_bb_in_path
))
6212 bb
= FALLTHRU_EDGE (previous_bb_in_path
)->dest
;
6213 if (bb
!= EXIT_BLOCK_PTR
6214 && single_pred_p (bb
)
6215 /* We used to assert here that we would only see blocks
6216 that we have not visited yet. But we may end up
6217 visiting basic blocks twice if the CFG has changed
6218 in this run of cse_main, because when the CFG changes
6219 the topological sort of the CFG also changes. A basic
6220 blocks that previously had more than two predecessors
6221 may now have a single predecessor, and become part of
6222 a path that starts at another basic block.
6224 We still want to visit each basic block only once, so
6225 halt the path here if we have already visited BB. */
6226 && !TEST_BIT (cse_visited_basic_blocks
, bb
->index
))
6228 SET_BIT (cse_visited_basic_blocks
, bb
->index
);
6229 data
->path
[path_size
++].bb
= bb
;
6234 data
->path
[path_size
].bb
= NULL
;
6237 /* If only one block remains in the path, bail. */
6245 /* Extend the path if possible. */
6248 bb
= data
->path
[path_size
- 1].bb
;
6249 while (bb
&& path_size
< PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH
))
6251 if (single_succ_p (bb
))
6252 e
= single_succ_edge (bb
);
6253 else if (EDGE_COUNT (bb
->succs
) == 2
6254 && any_condjump_p (BB_END (bb
)))
6256 /* First try to follow the branch. If that doesn't lead
6257 to a useful path, follow the fallthru edge. */
6258 e
= BRANCH_EDGE (bb
);
6259 if (!single_pred_p (e
->dest
))
6260 e
= FALLTHRU_EDGE (bb
);
6266 && !((e
->flags
& EDGE_ABNORMAL_CALL
) && cfun
->has_nonlocal_label
)
6267 && e
->dest
!= EXIT_BLOCK_PTR
6268 && single_pred_p (e
->dest
)
6269 /* Avoid visiting basic blocks twice. The large comment
6270 above explains why this can happen. */
6271 && !TEST_BIT (cse_visited_basic_blocks
, e
->dest
->index
))
6273 basic_block bb2
= e
->dest
;
6274 SET_BIT (cse_visited_basic_blocks
, bb2
->index
);
6275 data
->path
[path_size
++].bb
= bb2
;
6284 data
->path_size
= path_size
;
6285 return path_size
!= 0;
6288 /* Dump the path in DATA to file F. NSETS is the number of sets
6292 cse_dump_path (struct cse_basic_block_data
*data
, int nsets
, FILE *f
)
6296 fprintf (f
, ";; Following path with %d sets: ", nsets
);
6297 for (path_entry
= 0; path_entry
< data
->path_size
; path_entry
++)
6298 fprintf (f
, "%d ", (data
->path
[path_entry
].bb
)->index
);
6299 fputc ('\n', dump_file
);
6304 /* Return true if BB has exception handling successor edges. */
6307 have_eh_succ_edges (basic_block bb
)
6312 FOR_EACH_EDGE (e
, ei
, bb
->succs
)
6313 if (e
->flags
& EDGE_EH
)
6320 /* Scan to the end of the path described by DATA. Return an estimate of
6321 the total number of SETs of all insns in the path. */
6324 cse_prescan_path (struct cse_basic_block_data
*data
)
6327 int path_size
= data
->path_size
;
6330 /* Scan to end of each basic block in the path. */
6331 for (path_entry
= 0; path_entry
< path_size
; path_entry
++)
6336 bb
= data
->path
[path_entry
].bb
;
6338 FOR_BB_INSNS (bb
, insn
)
6343 /* A PARALLEL can have lots of SETs in it,
6344 especially if it is really an ASM_OPERANDS. */
6345 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
6346 nsets
+= XVECLEN (PATTERN (insn
), 0);
6352 data
->nsets
= nsets
;
6355 /* Process a single extended basic block described by EBB_DATA. */
6358 cse_extended_basic_block (struct cse_basic_block_data
*ebb_data
)
6360 int path_size
= ebb_data
->path_size
;
6364 /* Allocate the space needed by qty_table. */
6365 qty_table
= XNEWVEC (struct qty_table_elem
, max_qty
);
6368 cse_ebb_live_in
= df_get_live_in (ebb_data
->path
[0].bb
);
6369 cse_ebb_live_out
= df_get_live_out (ebb_data
->path
[path_size
- 1].bb
);
6370 for (path_entry
= 0; path_entry
< path_size
; path_entry
++)
6375 bb
= ebb_data
->path
[path_entry
].bb
;
6377 /* Invalidate recorded information for eh regs if there is an EH
6378 edge pointing to that bb. */
6379 if (bb_has_eh_pred (bb
))
6383 for (def_rec
= df_get_artificial_defs (bb
->index
); *def_rec
; def_rec
++)
6385 df_ref def
= *def_rec
;
6386 if (DF_REF_FLAGS (def
) & DF_REF_AT_TOP
)
6387 invalidate (DF_REF_REG (def
), GET_MODE (DF_REF_REG (def
)));
6391 optimize_this_for_speed_p
= optimize_bb_for_speed_p (bb
);
6392 FOR_BB_INSNS (bb
, insn
)
6394 /* If we have processed 1,000 insns, flush the hash table to
6395 avoid extreme quadratic behavior. We must not include NOTEs
6396 in the count since there may be more of them when generating
6397 debugging information. If we clear the table at different
6398 times, code generated with -g -O might be different than code
6399 generated with -O but not -g.
6401 FIXME: This is a real kludge and needs to be done some other
6403 if (NONDEBUG_INSN_P (insn
)
6404 && num_insns
++ > PARAM_VALUE (PARAM_MAX_CSE_INSNS
))
6406 flush_hash_table ();
6412 /* Process notes first so we have all notes in canonical forms
6413 when looking for duplicate operations. */
6414 if (REG_NOTES (insn
))
6416 bool changed
= false;
6417 REG_NOTES (insn
) = cse_process_notes (REG_NOTES (insn
),
6418 NULL_RTX
, &changed
);
6420 df_notes_rescan (insn
);
6425 /* If we haven't already found an insn where we added a LABEL_REF,
6427 if (INSN_P (insn
) && !recorded_label_ref
6428 && for_each_rtx (&PATTERN (insn
), check_for_label_ref
,
6430 recorded_label_ref
= true;
6433 if (NONDEBUG_INSN_P (insn
))
6435 /* If the previous insn sets CC0 and this insn no
6436 longer references CC0, delete the previous insn.
6437 Here we use fact that nothing expects CC0 to be
6438 valid over an insn, which is true until the final
6442 prev_insn
= prev_nonnote_nondebug_insn (insn
);
6443 if (prev_insn
&& NONJUMP_INSN_P (prev_insn
)
6444 && (tem
= single_set (prev_insn
)) != NULL_RTX
6445 && SET_DEST (tem
) == cc0_rtx
6446 && ! reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
6447 delete_insn (prev_insn
);
6449 /* If this insn is not the last insn in the basic
6450 block, it will be PREV_INSN(insn) in the next
6451 iteration. If we recorded any CC0-related
6452 information for this insn, remember it. */
6453 if (insn
!= BB_END (bb
))
6455 prev_insn_cc0
= this_insn_cc0
;
6456 prev_insn_cc0_mode
= this_insn_cc0_mode
;
6463 /* With non-call exceptions, we are not always able to update
6464 the CFG properly inside cse_insn. So clean up possibly
6465 redundant EH edges here. */
6466 if (cfun
->can_throw_non_call_exceptions
&& have_eh_succ_edges (bb
))
6467 cse_cfg_altered
|= purge_dead_edges (bb
);
6469 /* If we changed a conditional jump, we may have terminated
6470 the path we are following. Check that by verifying that
6471 the edge we would take still exists. If the edge does
6472 not exist anymore, purge the remainder of the path.
6473 Note that this will cause us to return to the caller. */
6474 if (path_entry
< path_size
- 1)
6476 basic_block next_bb
= ebb_data
->path
[path_entry
+ 1].bb
;
6477 if (!find_edge (bb
, next_bb
))
6483 /* If we truncate the path, we must also reset the
6484 visited bit on the remaining blocks in the path,
6485 or we will never visit them at all. */
6486 RESET_BIT (cse_visited_basic_blocks
,
6487 ebb_data
->path
[path_size
].bb
->index
);
6488 ebb_data
->path
[path_size
].bb
= NULL
;
6490 while (path_size
- 1 != path_entry
);
6491 ebb_data
->path_size
= path_size
;
6495 /* If this is a conditional jump insn, record any known
6496 equivalences due to the condition being tested. */
6498 if (path_entry
< path_size
- 1
6500 && single_set (insn
)
6501 && any_condjump_p (insn
))
6503 basic_block next_bb
= ebb_data
->path
[path_entry
+ 1].bb
;
6504 bool taken
= (next_bb
== BRANCH_EDGE (bb
)->dest
);
6505 record_jump_equiv (insn
, taken
);
6509 /* Clear the CC0-tracking related insns, they can't provide
6510 useful information across basic block boundaries. */
6515 gcc_assert (next_qty
<= max_qty
);
6521 /* Perform cse on the instructions of a function.
6522 F is the first instruction.
6523 NREGS is one plus the highest pseudo-reg number used in the instruction.
6525 Return 2 if jump optimizations should be redone due to simplifications
6526 in conditional jump instructions.
6527 Return 1 if the CFG should be cleaned up because it has been modified.
6528 Return 0 otherwise. */
6531 cse_main (rtx f ATTRIBUTE_UNUSED
, int nregs
)
6533 struct cse_basic_block_data ebb_data
;
6535 int *rc_order
= XNEWVEC (int, last_basic_block
);
6538 df_set_flags (DF_LR_RUN_DCE
);
6540 df_set_flags (DF_DEFER_INSN_RESCAN
);
6542 reg_scan (get_insns (), max_reg_num ());
6543 init_cse_reg_info (nregs
);
6545 ebb_data
.path
= XNEWVEC (struct branch_path
,
6546 PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH
));
6548 cse_cfg_altered
= false;
6549 cse_jumps_altered
= false;
6550 recorded_label_ref
= false;
6551 constant_pool_entries_cost
= 0;
6552 constant_pool_entries_regcost
= 0;
6553 ebb_data
.path_size
= 0;
6555 rtl_hooks
= cse_rtl_hooks
;
6558 init_alias_analysis ();
6560 reg_eqv_table
= XNEWVEC (struct reg_eqv_elem
, nregs
);
6562 /* Set up the table of already visited basic blocks. */
6563 cse_visited_basic_blocks
= sbitmap_alloc (last_basic_block
);
6564 sbitmap_zero (cse_visited_basic_blocks
);
6566 /* Loop over basic blocks in reverse completion order (RPO),
6567 excluding the ENTRY and EXIT blocks. */
6568 n_blocks
= pre_and_rev_post_order_compute (NULL
, rc_order
, false);
6570 while (i
< n_blocks
)
6572 /* Find the first block in the RPO queue that we have not yet
6573 processed before. */
6576 bb
= BASIC_BLOCK (rc_order
[i
++]);
6578 while (TEST_BIT (cse_visited_basic_blocks
, bb
->index
)
6581 /* Find all paths starting with BB, and process them. */
6582 while (cse_find_path (bb
, &ebb_data
, flag_cse_follow_jumps
))
6584 /* Pre-scan the path. */
6585 cse_prescan_path (&ebb_data
);
6587 /* If this basic block has no sets, skip it. */
6588 if (ebb_data
.nsets
== 0)
6591 /* Get a reasonable estimate for the maximum number of qty's
6592 needed for this path. For this, we take the number of sets
6593 and multiply that by MAX_RECOG_OPERANDS. */
6594 max_qty
= ebb_data
.nsets
* MAX_RECOG_OPERANDS
;
6596 /* Dump the path we're about to process. */
6598 cse_dump_path (&ebb_data
, ebb_data
.nsets
, dump_file
);
6600 cse_extended_basic_block (&ebb_data
);
6605 end_alias_analysis ();
6606 free (reg_eqv_table
);
6607 free (ebb_data
.path
);
6608 sbitmap_free (cse_visited_basic_blocks
);
6610 rtl_hooks
= general_rtl_hooks
;
6612 if (cse_jumps_altered
|| recorded_label_ref
)
6614 else if (cse_cfg_altered
)
6620 /* Called via for_each_rtx to see if an insn is using a LABEL_REF for
6621 which there isn't a REG_LABEL_OPERAND note.
6622 Return one if so. DATA is the insn. */
6625 check_for_label_ref (rtx
*rtl
, void *data
)
6627 rtx insn
= (rtx
) data
;
6629 /* If this insn uses a LABEL_REF and there isn't a REG_LABEL_OPERAND
6630 note for it, we must rerun jump since it needs to place the note. If
6631 this is a LABEL_REF for a CODE_LABEL that isn't in the insn chain,
6632 don't do this since no REG_LABEL_OPERAND will be added. */
6633 return (GET_CODE (*rtl
) == LABEL_REF
6634 && ! LABEL_REF_NONLOCAL_P (*rtl
)
6636 || !label_is_jump_target_p (XEXP (*rtl
, 0), insn
))
6637 && LABEL_P (XEXP (*rtl
, 0))
6638 && INSN_UID (XEXP (*rtl
, 0)) != 0
6639 && ! find_reg_note (insn
, REG_LABEL_OPERAND
, XEXP (*rtl
, 0)));
6642 /* Count the number of times registers are used (not set) in X.
6643 COUNTS is an array in which we accumulate the count, INCR is how much
6644 we count each register usage.
6646 Don't count a usage of DEST, which is the SET_DEST of a SET which
6647 contains X in its SET_SRC. This is because such a SET does not
6648 modify the liveness of DEST.
6649 DEST is set to pc_rtx for a trapping insn, or for an insn with side effects.
6650 We must then count uses of a SET_DEST regardless, because the insn can't be
6654 count_reg_usage (rtx x
, int *counts
, rtx dest
, int incr
)
6664 switch (code
= GET_CODE (x
))
6668 counts
[REGNO (x
)] += incr
;
6683 /* If we are clobbering a MEM, mark any registers inside the address
6685 if (MEM_P (XEXP (x
, 0)))
6686 count_reg_usage (XEXP (XEXP (x
, 0), 0), counts
, NULL_RTX
, incr
);
6690 /* Unless we are setting a REG, count everything in SET_DEST. */
6691 if (!REG_P (SET_DEST (x
)))
6692 count_reg_usage (SET_DEST (x
), counts
, NULL_RTX
, incr
);
6693 count_reg_usage (SET_SRC (x
), counts
,
6694 dest
? dest
: SET_DEST (x
),
6704 /* We expect dest to be NULL_RTX here. If the insn may throw,
6705 or if it cannot be deleted due to side-effects, mark this fact
6706 by setting DEST to pc_rtx. */
6707 if ((!cfun
->can_delete_dead_exceptions
&& !insn_nothrow_p (x
))
6708 || side_effects_p (PATTERN (x
)))
6710 if (code
== CALL_INSN
)
6711 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x
), counts
, dest
, incr
);
6712 count_reg_usage (PATTERN (x
), counts
, dest
, incr
);
6714 /* Things used in a REG_EQUAL note aren't dead since loop may try to
6717 note
= find_reg_equal_equiv_note (x
);
6720 rtx eqv
= XEXP (note
, 0);
6722 if (GET_CODE (eqv
) == EXPR_LIST
)
6723 /* This REG_EQUAL note describes the result of a function call.
6724 Process all the arguments. */
6727 count_reg_usage (XEXP (eqv
, 0), counts
, dest
, incr
);
6728 eqv
= XEXP (eqv
, 1);
6730 while (eqv
&& GET_CODE (eqv
) == EXPR_LIST
);
6732 count_reg_usage (eqv
, counts
, dest
, incr
);
6737 if (REG_NOTE_KIND (x
) == REG_EQUAL
6738 || (REG_NOTE_KIND (x
) != REG_NONNEG
&& GET_CODE (XEXP (x
,0)) == USE
)
6739 /* FUNCTION_USAGE expression lists may include (CLOBBER (mem /u)),
6740 involving registers in the address. */
6741 || GET_CODE (XEXP (x
, 0)) == CLOBBER
)
6742 count_reg_usage (XEXP (x
, 0), counts
, NULL_RTX
, incr
);
6744 count_reg_usage (XEXP (x
, 1), counts
, NULL_RTX
, incr
);
6748 /* Iterate over just the inputs, not the constraints as well. */
6749 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
6750 count_reg_usage (ASM_OPERANDS_INPUT (x
, i
), counts
, dest
, incr
);
6760 fmt
= GET_RTX_FORMAT (code
);
6761 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6764 count_reg_usage (XEXP (x
, i
), counts
, dest
, incr
);
6765 else if (fmt
[i
] == 'E')
6766 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6767 count_reg_usage (XVECEXP (x
, i
, j
), counts
, dest
, incr
);
6771 /* Return true if X is a dead register. */
6774 is_dead_reg (rtx x
, int *counts
)
6777 && REGNO (x
) >= FIRST_PSEUDO_REGISTER
6778 && counts
[REGNO (x
)] == 0);
6781 /* Return true if set is live. */
6783 set_live_p (rtx set
, rtx insn ATTRIBUTE_UNUSED
, /* Only used with HAVE_cc0. */
6790 if (set_noop_p (set
))
6794 else if (GET_CODE (SET_DEST (set
)) == CC0
6795 && !side_effects_p (SET_SRC (set
))
6796 && ((tem
= next_nonnote_nondebug_insn (insn
)) == NULL_RTX
6798 || !reg_referenced_p (cc0_rtx
, PATTERN (tem
))))
6801 else if (!is_dead_reg (SET_DEST (set
), counts
)
6802 || side_effects_p (SET_SRC (set
)))
6807 /* Return true if insn is live. */
6810 insn_live_p (rtx insn
, int *counts
)
6813 if (!cfun
->can_delete_dead_exceptions
&& !insn_nothrow_p (insn
))
6815 else if (GET_CODE (PATTERN (insn
)) == SET
)
6816 return set_live_p (PATTERN (insn
), insn
, counts
);
6817 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
6819 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
6821 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
6823 if (GET_CODE (elt
) == SET
)
6825 if (set_live_p (elt
, insn
, counts
))
6828 else if (GET_CODE (elt
) != CLOBBER
&& GET_CODE (elt
) != USE
)
6833 else if (DEBUG_INSN_P (insn
))
6837 for (next
= NEXT_INSN (insn
); next
; next
= NEXT_INSN (next
))
6840 else if (!DEBUG_INSN_P (next
))
6842 else if (INSN_VAR_LOCATION_DECL (insn
) == INSN_VAR_LOCATION_DECL (next
))
6851 /* Count the number of stores into pseudo. Callback for note_stores. */
6854 count_stores (rtx x
, const_rtx set ATTRIBUTE_UNUSED
, void *data
)
6856 int *counts
= (int *) data
;
6857 if (REG_P (x
) && REGNO (x
) >= FIRST_PSEUDO_REGISTER
)
6858 counts
[REGNO (x
)]++;
6861 struct dead_debug_insn_data
6868 /* Return if a DEBUG_INSN needs to be reset because some dead
6869 pseudo doesn't have a replacement. Callback for for_each_rtx. */
6872 is_dead_debug_insn (rtx
*loc
, void *data
)
6875 struct dead_debug_insn_data
*ddid
= (struct dead_debug_insn_data
*) data
;
6877 if (is_dead_reg (x
, ddid
->counts
))
6879 if (ddid
->replacements
&& ddid
->replacements
[REGNO (x
)] != NULL_RTX
)
6880 ddid
->seen_repl
= true;
6887 /* Replace a dead pseudo in a DEBUG_INSN with replacement DEBUG_EXPR.
6888 Callback for simplify_replace_fn_rtx. */
6891 replace_dead_reg (rtx x
, const_rtx old_rtx ATTRIBUTE_UNUSED
, void *data
)
6893 rtx
*replacements
= (rtx
*) data
;
6896 && REGNO (x
) >= FIRST_PSEUDO_REGISTER
6897 && replacements
[REGNO (x
)] != NULL_RTX
)
6899 if (GET_MODE (x
) == GET_MODE (replacements
[REGNO (x
)]))
6900 return replacements
[REGNO (x
)];
6901 return lowpart_subreg (GET_MODE (x
), replacements
[REGNO (x
)],
6902 GET_MODE (replacements
[REGNO (x
)]));
6907 /* Scan all the insns and delete any that are dead; i.e., they store a register
6908 that is never used or they copy a register to itself.
6910 This is used to remove insns made obviously dead by cse, loop or other
6911 optimizations. It improves the heuristics in loop since it won't try to
6912 move dead invariants out of loops or make givs for dead quantities. The
6913 remaining passes of the compilation are also sped up. */
6916 delete_trivially_dead_insns (rtx insns
, int nreg
)
6920 rtx
*replacements
= NULL
;
6923 timevar_push (TV_DELETE_TRIVIALLY_DEAD
);
6924 /* First count the number of times each register is used. */
6925 if (MAY_HAVE_DEBUG_INSNS
)
6927 counts
= XCNEWVEC (int, nreg
* 3);
6928 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
6929 if (DEBUG_INSN_P (insn
))
6930 count_reg_usage (INSN_VAR_LOCATION_LOC (insn
), counts
+ nreg
,
6932 else if (INSN_P (insn
))
6934 count_reg_usage (insn
, counts
, NULL_RTX
, 1);
6935 note_stores (PATTERN (insn
), count_stores
, counts
+ nreg
* 2);
6937 /* If there can be debug insns, COUNTS are 3 consecutive arrays.
6938 First one counts how many times each pseudo is used outside
6939 of debug insns, second counts how many times each pseudo is
6940 used in debug insns and third counts how many times a pseudo
6945 counts
= XCNEWVEC (int, nreg
);
6946 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
6948 count_reg_usage (insn
, counts
, NULL_RTX
, 1);
6949 /* If no debug insns can be present, COUNTS is just an array
6950 which counts how many times each pseudo is used. */
6952 /* Go from the last insn to the first and delete insns that only set unused
6953 registers or copy a register to itself. As we delete an insn, remove
6954 usage counts for registers it uses.
6956 The first jump optimization pass may leave a real insn as the last
6957 insn in the function. We must not skip that insn or we may end
6958 up deleting code that is not really dead.
6960 If some otherwise unused register is only used in DEBUG_INSNs,
6961 try to create a DEBUG_EXPR temporary and emit a DEBUG_INSN before
6962 the setter. Then go through DEBUG_INSNs and if a DEBUG_EXPR
6963 has been created for the unused register, replace it with
6964 the DEBUG_EXPR, otherwise reset the DEBUG_INSN. */
6965 for (insn
= get_last_insn (); insn
; insn
= prev
)
6969 prev
= PREV_INSN (insn
);
6973 live_insn
= insn_live_p (insn
, counts
);
6975 /* If this is a dead insn, delete it and show registers in it aren't
6978 if (! live_insn
&& dbg_cnt (delete_trivial_dead
))
6980 if (DEBUG_INSN_P (insn
))
6981 count_reg_usage (INSN_VAR_LOCATION_LOC (insn
), counts
+ nreg
,
6986 if (MAY_HAVE_DEBUG_INSNS
6987 && (set
= single_set (insn
)) != NULL_RTX
6988 && is_dead_reg (SET_DEST (set
), counts
)
6989 /* Used at least once in some DEBUG_INSN. */
6990 && counts
[REGNO (SET_DEST (set
)) + nreg
] > 0
6991 /* And set exactly once. */
6992 && counts
[REGNO (SET_DEST (set
)) + nreg
* 2] == 1
6993 && !side_effects_p (SET_SRC (set
))
6994 && asm_noperands (PATTERN (insn
)) < 0)
6998 /* Create DEBUG_EXPR (and DEBUG_EXPR_DECL). */
6999 dval
= make_debug_expr_from_rtl (SET_DEST (set
));
7001 /* Emit a debug bind insn before the insn in which
7003 bind
= gen_rtx_VAR_LOCATION (GET_MODE (SET_DEST (set
)),
7004 DEBUG_EXPR_TREE_DECL (dval
),
7006 VAR_INIT_STATUS_INITIALIZED
);
7007 count_reg_usage (bind
, counts
+ nreg
, NULL_RTX
, 1);
7009 bind
= emit_debug_insn_before (bind
, insn
);
7010 df_insn_rescan (bind
);
7012 if (replacements
== NULL
)
7013 replacements
= XCNEWVEC (rtx
, nreg
);
7014 replacements
[REGNO (SET_DEST (set
))] = dval
;
7017 count_reg_usage (insn
, counts
, NULL_RTX
, -1);
7020 delete_insn_and_edges (insn
);
7024 if (MAY_HAVE_DEBUG_INSNS
)
7026 struct dead_debug_insn_data ddid
;
7027 ddid
.counts
= counts
;
7028 ddid
.replacements
= replacements
;
7029 for (insn
= get_last_insn (); insn
; insn
= PREV_INSN (insn
))
7030 if (DEBUG_INSN_P (insn
))
7032 /* If this debug insn references a dead register that wasn't replaced
7033 with an DEBUG_EXPR, reset the DEBUG_INSN. */
7034 ddid
.seen_repl
= false;
7035 if (for_each_rtx (&INSN_VAR_LOCATION_LOC (insn
),
7036 is_dead_debug_insn
, &ddid
))
7038 INSN_VAR_LOCATION_LOC (insn
) = gen_rtx_UNKNOWN_VAR_LOC ();
7039 df_insn_rescan (insn
);
7041 else if (ddid
.seen_repl
)
7043 INSN_VAR_LOCATION_LOC (insn
)
7044 = simplify_replace_fn_rtx (INSN_VAR_LOCATION_LOC (insn
),
7045 NULL_RTX
, replace_dead_reg
,
7047 df_insn_rescan (insn
);
7050 free (replacements
);
7053 if (dump_file
&& ndead
)
7054 fprintf (dump_file
, "Deleted %i trivially dead insns\n",
7058 timevar_pop (TV_DELETE_TRIVIALLY_DEAD
);
7062 /* This function is called via for_each_rtx. The argument, NEWREG, is
7063 a condition code register with the desired mode. If we are looking
7064 at the same register in a different mode, replace it with
7068 cse_change_cc_mode (rtx
*loc
, void *data
)
7070 struct change_cc_mode_args
* args
= (struct change_cc_mode_args
*)data
;
7074 && REGNO (*loc
) == REGNO (args
->newreg
)
7075 && GET_MODE (*loc
) != GET_MODE (args
->newreg
))
7077 validate_change (args
->insn
, loc
, args
->newreg
, 1);
7084 /* Change the mode of any reference to the register REGNO (NEWREG) to
7085 GET_MODE (NEWREG) in INSN. */
7088 cse_change_cc_mode_insn (rtx insn
, rtx newreg
)
7090 struct change_cc_mode_args args
;
7097 args
.newreg
= newreg
;
7099 for_each_rtx (&PATTERN (insn
), cse_change_cc_mode
, &args
);
7100 for_each_rtx (®_NOTES (insn
), cse_change_cc_mode
, &args
);
7102 /* If the following assertion was triggered, there is most probably
7103 something wrong with the cc_modes_compatible back end function.
7104 CC modes only can be considered compatible if the insn - with the mode
7105 replaced by any of the compatible modes - can still be recognized. */
7106 success
= apply_change_group ();
7107 gcc_assert (success
);
7110 /* Change the mode of any reference to the register REGNO (NEWREG) to
7111 GET_MODE (NEWREG), starting at START. Stop before END. Stop at
7112 any instruction which modifies NEWREG. */
7115 cse_change_cc_mode_insns (rtx start
, rtx end
, rtx newreg
)
7119 for (insn
= start
; insn
!= end
; insn
= NEXT_INSN (insn
))
7121 if (! INSN_P (insn
))
7124 if (reg_set_p (newreg
, insn
))
7127 cse_change_cc_mode_insn (insn
, newreg
);
7131 /* BB is a basic block which finishes with CC_REG as a condition code
7132 register which is set to CC_SRC. Look through the successors of BB
7133 to find blocks which have a single predecessor (i.e., this one),
7134 and look through those blocks for an assignment to CC_REG which is
7135 equivalent to CC_SRC. CAN_CHANGE_MODE indicates whether we are
7136 permitted to change the mode of CC_SRC to a compatible mode. This
7137 returns VOIDmode if no equivalent assignments were found.
7138 Otherwise it returns the mode which CC_SRC should wind up with.
7139 ORIG_BB should be the same as BB in the outermost cse_cc_succs call,
7140 but is passed unmodified down to recursive calls in order to prevent
7143 The main complexity in this function is handling the mode issues.
7144 We may have more than one duplicate which we can eliminate, and we
7145 try to find a mode which will work for multiple duplicates. */
7147 static enum machine_mode
7148 cse_cc_succs (basic_block bb
, basic_block orig_bb
, rtx cc_reg
, rtx cc_src
,
7149 bool can_change_mode
)
7152 enum machine_mode mode
;
7153 unsigned int insn_count
;
7156 enum machine_mode modes
[2];
7162 /* We expect to have two successors. Look at both before picking
7163 the final mode for the comparison. If we have more successors
7164 (i.e., some sort of table jump, although that seems unlikely),
7165 then we require all beyond the first two to use the same
7168 found_equiv
= false;
7169 mode
= GET_MODE (cc_src
);
7171 FOR_EACH_EDGE (e
, ei
, bb
->succs
)
7176 if (e
->flags
& EDGE_COMPLEX
)
7179 if (EDGE_COUNT (e
->dest
->preds
) != 1
7180 || e
->dest
== EXIT_BLOCK_PTR
7181 /* Avoid endless recursion on unreachable blocks. */
7182 || e
->dest
== orig_bb
)
7185 end
= NEXT_INSN (BB_END (e
->dest
));
7186 for (insn
= BB_HEAD (e
->dest
); insn
!= end
; insn
= NEXT_INSN (insn
))
7190 if (! INSN_P (insn
))
7193 /* If CC_SRC is modified, we have to stop looking for
7194 something which uses it. */
7195 if (modified_in_p (cc_src
, insn
))
7198 /* Check whether INSN sets CC_REG to CC_SRC. */
7199 set
= single_set (insn
);
7201 && REG_P (SET_DEST (set
))
7202 && REGNO (SET_DEST (set
)) == REGNO (cc_reg
))
7205 enum machine_mode set_mode
;
7206 enum machine_mode comp_mode
;
7209 set_mode
= GET_MODE (SET_SRC (set
));
7210 comp_mode
= set_mode
;
7211 if (rtx_equal_p (cc_src
, SET_SRC (set
)))
7213 else if (GET_CODE (cc_src
) == COMPARE
7214 && GET_CODE (SET_SRC (set
)) == COMPARE
7216 && rtx_equal_p (XEXP (cc_src
, 0),
7217 XEXP (SET_SRC (set
), 0))
7218 && rtx_equal_p (XEXP (cc_src
, 1),
7219 XEXP (SET_SRC (set
), 1)))
7222 comp_mode
= targetm
.cc_modes_compatible (mode
, set_mode
);
7223 if (comp_mode
!= VOIDmode
7224 && (can_change_mode
|| comp_mode
== mode
))
7231 if (insn_count
< ARRAY_SIZE (insns
))
7233 insns
[insn_count
] = insn
;
7234 modes
[insn_count
] = set_mode
;
7235 last_insns
[insn_count
] = end
;
7238 if (mode
!= comp_mode
)
7240 gcc_assert (can_change_mode
);
7243 /* The modified insn will be re-recognized later. */
7244 PUT_MODE (cc_src
, mode
);
7249 if (set_mode
!= mode
)
7251 /* We found a matching expression in the
7252 wrong mode, but we don't have room to
7253 store it in the array. Punt. This case
7257 /* INSN sets CC_REG to a value equal to CC_SRC
7258 with the right mode. We can simply delete
7263 /* We found an instruction to delete. Keep looking,
7264 in the hopes of finding a three-way jump. */
7268 /* We found an instruction which sets the condition
7269 code, so don't look any farther. */
7273 /* If INSN sets CC_REG in some other way, don't look any
7275 if (reg_set_p (cc_reg
, insn
))
7279 /* If we fell off the bottom of the block, we can keep looking
7280 through successors. We pass CAN_CHANGE_MODE as false because
7281 we aren't prepared to handle compatibility between the
7282 further blocks and this block. */
7285 enum machine_mode submode
;
7287 submode
= cse_cc_succs (e
->dest
, orig_bb
, cc_reg
, cc_src
, false);
7288 if (submode
!= VOIDmode
)
7290 gcc_assert (submode
== mode
);
7292 can_change_mode
= false;
7300 /* Now INSN_COUNT is the number of instructions we found which set
7301 CC_REG to a value equivalent to CC_SRC. The instructions are in
7302 INSNS. The modes used by those instructions are in MODES. */
7305 for (i
= 0; i
< insn_count
; ++i
)
7307 if (modes
[i
] != mode
)
7309 /* We need to change the mode of CC_REG in INSNS[i] and
7310 subsequent instructions. */
7313 if (GET_MODE (cc_reg
) == mode
)
7316 newreg
= gen_rtx_REG (mode
, REGNO (cc_reg
));
7318 cse_change_cc_mode_insns (NEXT_INSN (insns
[i
]), last_insns
[i
],
7322 delete_insn_and_edges (insns
[i
]);
7328 /* If we have a fixed condition code register (or two), walk through
7329 the instructions and try to eliminate duplicate assignments. */
7332 cse_condition_code_reg (void)
7334 unsigned int cc_regno_1
;
7335 unsigned int cc_regno_2
;
7340 if (! targetm
.fixed_condition_code_regs (&cc_regno_1
, &cc_regno_2
))
7343 cc_reg_1
= gen_rtx_REG (CCmode
, cc_regno_1
);
7344 if (cc_regno_2
!= INVALID_REGNUM
)
7345 cc_reg_2
= gen_rtx_REG (CCmode
, cc_regno_2
);
7347 cc_reg_2
= NULL_RTX
;
7356 enum machine_mode mode
;
7357 enum machine_mode orig_mode
;
7359 /* Look for blocks which end with a conditional jump based on a
7360 condition code register. Then look for the instruction which
7361 sets the condition code register. Then look through the
7362 successor blocks for instructions which set the condition
7363 code register to the same value. There are other possible
7364 uses of the condition code register, but these are by far the
7365 most common and the ones which we are most likely to be able
7368 last_insn
= BB_END (bb
);
7369 if (!JUMP_P (last_insn
))
7372 if (reg_referenced_p (cc_reg_1
, PATTERN (last_insn
)))
7374 else if (cc_reg_2
&& reg_referenced_p (cc_reg_2
, PATTERN (last_insn
)))
7379 cc_src_insn
= NULL_RTX
;
7381 for (insn
= PREV_INSN (last_insn
);
7382 insn
&& insn
!= PREV_INSN (BB_HEAD (bb
));
7383 insn
= PREV_INSN (insn
))
7387 if (! INSN_P (insn
))
7389 set
= single_set (insn
);
7391 && REG_P (SET_DEST (set
))
7392 && REGNO (SET_DEST (set
)) == REGNO (cc_reg
))
7395 cc_src
= SET_SRC (set
);
7398 else if (reg_set_p (cc_reg
, insn
))
7405 if (modified_between_p (cc_src
, cc_src_insn
, NEXT_INSN (last_insn
)))
7408 /* Now CC_REG is a condition code register used for a
7409 conditional jump at the end of the block, and CC_SRC, in
7410 CC_SRC_INSN, is the value to which that condition code
7411 register is set, and CC_SRC is still meaningful at the end of
7414 orig_mode
= GET_MODE (cc_src
);
7415 mode
= cse_cc_succs (bb
, bb
, cc_reg
, cc_src
, true);
7416 if (mode
!= VOIDmode
)
7418 gcc_assert (mode
== GET_MODE (cc_src
));
7419 if (mode
!= orig_mode
)
7421 rtx newreg
= gen_rtx_REG (mode
, REGNO (cc_reg
));
7423 cse_change_cc_mode_insn (cc_src_insn
, newreg
);
7425 /* Do the same in the following insns that use the
7426 current value of CC_REG within BB. */
7427 cse_change_cc_mode_insns (NEXT_INSN (cc_src_insn
),
7428 NEXT_INSN (last_insn
),
7436 /* Perform common subexpression elimination. Nonzero value from
7437 `cse_main' means that jumps were simplified and some code may now
7438 be unreachable, so do jump optimization again. */
7440 gate_handle_cse (void)
7442 return optimize
> 0;
7446 rest_of_handle_cse (void)
7451 dump_flow_info (dump_file
, dump_flags
);
7453 tem
= cse_main (get_insns (), max_reg_num ());
7455 /* If we are not running more CSE passes, then we are no longer
7456 expecting CSE to be run. But always rerun it in a cheap mode. */
7457 cse_not_expected
= !flag_rerun_cse_after_loop
&& !flag_gcse
;
7461 timevar_push (TV_JUMP
);
7462 rebuild_jump_labels (get_insns ());
7463 cleanup_cfg (CLEANUP_CFG_CHANGED
);
7464 timevar_pop (TV_JUMP
);
7466 else if (tem
== 1 || optimize
> 1)
7472 struct rtl_opt_pass pass_cse
=
7477 gate_handle_cse
, /* gate */
7478 rest_of_handle_cse
, /* execute */
7481 0, /* static_pass_number */
7483 0, /* properties_required */
7484 0, /* properties_provided */
7485 0, /* properties_destroyed */
7486 0, /* todo_flags_start */
7487 TODO_df_finish
| TODO_verify_rtl_sharing
|
7489 TODO_verify_flow
, /* todo_flags_finish */
7495 gate_handle_cse2 (void)
7497 return optimize
> 0 && flag_rerun_cse_after_loop
;
7500 /* Run second CSE pass after loop optimizations. */
7502 rest_of_handle_cse2 (void)
7507 dump_flow_info (dump_file
, dump_flags
);
7509 tem
= cse_main (get_insns (), max_reg_num ());
7511 /* Run a pass to eliminate duplicated assignments to condition code
7512 registers. We have to run this after bypass_jumps, because it
7513 makes it harder for that pass to determine whether a jump can be
7515 cse_condition_code_reg ();
7517 delete_trivially_dead_insns (get_insns (), max_reg_num ());
7521 timevar_push (TV_JUMP
);
7522 rebuild_jump_labels (get_insns ());
7523 cleanup_cfg (CLEANUP_CFG_CHANGED
);
7524 timevar_pop (TV_JUMP
);
7529 cse_not_expected
= 1;
7534 struct rtl_opt_pass pass_cse2
=
7539 gate_handle_cse2
, /* gate */
7540 rest_of_handle_cse2
, /* execute */
7543 0, /* static_pass_number */
7544 TV_CSE2
, /* tv_id */
7545 0, /* properties_required */
7546 0, /* properties_provided */
7547 0, /* properties_destroyed */
7548 0, /* todo_flags_start */
7549 TODO_df_finish
| TODO_verify_rtl_sharing
|
7551 TODO_verify_flow
/* todo_flags_finish */
7556 gate_handle_cse_after_global_opts (void)
7558 return optimize
> 0 && flag_rerun_cse_after_global_opts
;
7561 /* Run second CSE pass after loop optimizations. */
7563 rest_of_handle_cse_after_global_opts (void)
7568 /* We only want to do local CSE, so don't follow jumps. */
7569 save_cfj
= flag_cse_follow_jumps
;
7570 flag_cse_follow_jumps
= 0;
7572 rebuild_jump_labels (get_insns ());
7573 tem
= cse_main (get_insns (), max_reg_num ());
7574 purge_all_dead_edges ();
7575 delete_trivially_dead_insns (get_insns (), max_reg_num ());
7577 cse_not_expected
= !flag_rerun_cse_after_loop
;
7579 /* If cse altered any jumps, rerun jump opts to clean things up. */
7582 timevar_push (TV_JUMP
);
7583 rebuild_jump_labels (get_insns ());
7584 cleanup_cfg (CLEANUP_CFG_CHANGED
);
7585 timevar_pop (TV_JUMP
);
7590 flag_cse_follow_jumps
= save_cfj
;
7594 struct rtl_opt_pass pass_cse_after_global_opts
=
7598 "cse_local", /* name */
7599 gate_handle_cse_after_global_opts
, /* gate */
7600 rest_of_handle_cse_after_global_opts
, /* execute */
7603 0, /* static_pass_number */
7605 0, /* properties_required */
7606 0, /* properties_provided */
7607 0, /* properties_destroyed */
7608 0, /* todo_flags_start */
7609 TODO_df_finish
| TODO_verify_rtl_sharing
|
7611 TODO_verify_flow
/* todo_flags_finish */