1 /* Support functions for the unwinder.
2 Copyright (C) 2003, 2004, 2005, 2007 Free Software Foundation, Inc.
3 Contributed by Paul Brook
5 This file is free software; you can redistribute it and/or modify it
6 under the terms of the GNU General Public License as published by the
7 Free Software Foundation; either version 2, or (at your option) any
10 In addition to the permissions in the GNU General Public License, the
11 Free Software Foundation gives you unlimited permission to link the
12 compiled version of this file into combinations with other programs,
13 and to distribute those combinations without any restriction coming
14 from the use of this file. (The General Public License restrictions
15 do apply in other respects; for example, they cover modification of
16 the file, and distribution when not linked into a combine
19 This file is distributed in the hope that it will be useful, but
20 WITHOUT ANY WARRANTY; without even the implied warranty of
21 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22 General Public License for more details.
24 You should have received a copy of the GNU General Public License
25 along with this program; see the file COPYING. If not, write to
26 the Free Software Foundation, 51 Franklin Street, Fifth Floor,
27 Boston, MA 02110-1301, USA. */
29 /* An executable stack is *not* required for these functions. */
30 #if defined(__ELF__) && defined(__linux__)
31 .section .note.GNU-stack,"",%progbits
37 #include "lib1funcs.asm"
41 EQUIV SYM (\name), SYM (__\name)
44 /* r0 points to a 16-word block. Upload these values to the actual core
46 ARM_FUNC_START restore_core_regs
47 /* We must use sp as the base register when restoring sp. Push the
48 last 3 registers onto the top of the current stack to achieve
51 ldmia r1, {r3, r4, r5} /* {sp, lr, pc}. */
52 #if defined(__thumb2__)
53 /* Thumb-2 doesn't allow sp in a load-multiple instruction, so push
54 the target address onto the target stack. This is safe as
55 we're always returning to somewhere further up the call stack. */
59 #elif defined(__INTERWORKING__)
60 /* Restore pc into ip. */
62 stmfd sp!, {r2, r3, r4}
64 stmfd sp!, {r3, r4, r5}
66 /* Don't bother restoring ip. */
67 ldmia r0, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp}
68 #if defined(__thumb2__)
69 /* Pop the return address off the target stack. */
72 #elif defined(__INTERWORKING__)
73 /* Pop the three registers we pushed earlier. */
74 ldmfd sp, {ip, sp, lr}
77 ldmfd sp, {sp, lr, pc}
79 FUNC_END restore_core_regs
80 UNPREFIX restore_core_regs
82 /* Load VFP registers d0-d15 from the address in r0.
83 Use this to load from FSTMX format. */
84 ARM_FUNC_START gnu_Unwind_Restore_VFP
85 /* Use the generic coprocessor form so that gas doesn't complain
86 on soft-float targets. */
87 ldc p11,cr0,[r0],{0x21} /* fldmiax r0, {d0-d15} */
90 /* Store VFP registers d0-d15 to the address in r0.
91 Use this to store in FSTMX format. */
92 ARM_FUNC_START gnu_Unwind_Save_VFP
93 /* Use the generic coprocessor form so that gas doesn't complain
94 on soft-float targets. */
95 stc p11,cr0,[r0],{0x21} /* fstmiax r0, {d0-d15} */
98 /* Load VFP registers d0-d15 from the address in r0.
99 Use this to load from FSTMD format. */
100 ARM_FUNC_START gnu_Unwind_Restore_VFP_D
101 ldc p11,cr0,[r0],{0x20} /* fldmiad r0, {d0-d15} */
104 /* Store VFP registers d0-d15 to the address in r0.
105 Use this to store in FLDMD format. */
106 ARM_FUNC_START gnu_Unwind_Save_VFP_D
107 stc p11,cr0,[r0],{0x20} /* fstmiad r0, {d0-d15} */
110 /* Load VFP registers d16-d31 from the address in r0.
111 Use this to load from FSTMD (=VSTM) format. Needs VFPv3. */
112 ARM_FUNC_START gnu_Unwind_Restore_VFP_D_16_to_31
113 ldcl p11,cr0,[r0],{0x20} /* vldm r0, {d16-d31} */
116 /* Store VFP registers d16-d31 to the address in r0.
117 Use this to store in FLDMD (=VLDM) format. Needs VFPv3. */
118 ARM_FUNC_START gnu_Unwind_Save_VFP_D_16_to_31
119 stcl p11,cr0,[r0],{0x20} /* vstm r0, {d16-d31} */
122 /* Wrappers to save core registers, then call the real routine. */
124 .macro UNWIND_WRAPPER name nargs
126 /* Create a phase2_vrs structure. */
127 /* Split reg push in two to ensure the correct value for sp. */
128 #if defined(__thumb2__)
130 push {lr} /* PC is ignored. */
131 push {ip, lr} /* Push original SP and LR. */
133 stmfd sp!, {sp, lr, pc}
135 stmfd sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip}
137 /* Demand-save flags, plus an extra word for alignment. */
141 /* Point r1 at the block. Pass r[0..nargs) unchanged. */
143 #if defined(__thumb__) && !defined(__thumb2__)
144 /* Switch back to thumb mode to avoid interworking hassle. */
150 bl SYM (__gnu\name) __PLT__
155 bl SYM (__gnu\name) __PLT__
164 UNWIND_WRAPPER _Unwind_RaiseException 1
165 UNWIND_WRAPPER _Unwind_Resume 1
166 UNWIND_WRAPPER _Unwind_Resume_or_Rethrow 1
167 UNWIND_WRAPPER _Unwind_ForcedUnwind 3
169 #endif /* __symbian__ */