1 /* If-conversion support.
2 Copyright (C) 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2010,
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it
9 under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
13 GCC is distributed in the hope that it will be useful, but WITHOUT
14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
16 License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
24 #include "coretypes.h"
31 #include "insn-config.h"
34 #include "hard-reg-set.h"
35 #include "basic-block.h"
39 #include "diagnostic-core.h"
44 #include "tree-pass.h"
50 #ifndef HAVE_conditional_move
51 #define HAVE_conditional_move 0
63 #ifndef MAX_CONDITIONAL_EXECUTE
64 #define MAX_CONDITIONAL_EXECUTE \
65 (BRANCH_COST (optimize_function_for_speed_p (cfun), false) \
69 #define IFCVT_MULTIPLE_DUMPS 1
71 #define NULL_BLOCK ((basic_block) NULL)
73 /* # of IF-THEN or IF-THEN-ELSE blocks we looked at */
74 static int num_possible_if_blocks
;
76 /* # of IF-THEN or IF-THEN-ELSE blocks were converted to conditional
78 static int num_updated_if_blocks
;
80 /* # of changes made. */
81 static int num_true_changes
;
83 /* Whether conditional execution changes were made. */
84 static int cond_exec_changed_p
;
86 /* Forward references. */
87 static int count_bb_insns (const_basic_block
);
88 static bool cheap_bb_rtx_cost_p (const_basic_block
, int, int);
89 static rtx
first_active_insn (basic_block
);
90 static rtx
last_active_insn (basic_block
, int);
91 static rtx
find_active_insn_before (basic_block
, rtx
);
92 static rtx
find_active_insn_after (basic_block
, rtx
);
93 static basic_block
block_fallthru (basic_block
);
94 static int cond_exec_process_insns (ce_if_block_t
*, rtx
, rtx
, rtx
, rtx
, int);
95 static rtx
cond_exec_get_condition (rtx
);
96 static rtx
noce_get_condition (rtx
, rtx
*, bool);
97 static int noce_operand_ok (const_rtx
);
98 static void merge_if_block (ce_if_block_t
*);
99 static int find_cond_trap (basic_block
, edge
, edge
);
100 static basic_block
find_if_header (basic_block
, int);
101 static int block_jumps_and_fallthru_p (basic_block
, basic_block
);
102 static int noce_find_if_block (basic_block
, edge
, edge
, int);
103 static int cond_exec_find_if_block (ce_if_block_t
*);
104 static int find_if_case_1 (basic_block
, edge
, edge
);
105 static int find_if_case_2 (basic_block
, edge
, edge
);
106 static int dead_or_predicable (basic_block
, basic_block
, basic_block
,
108 static void noce_emit_move_insn (rtx
, rtx
);
109 static rtx
block_has_only_trap (basic_block
);
111 /* Count the number of non-jump active insns in BB. */
114 count_bb_insns (const_basic_block bb
)
117 rtx insn
= BB_HEAD (bb
);
121 if (CALL_P (insn
) || NONJUMP_INSN_P (insn
))
124 if (insn
== BB_END (bb
))
126 insn
= NEXT_INSN (insn
);
132 /* Determine whether the total insn_rtx_cost on non-jump insns in
133 basic block BB is less than MAX_COST. This function returns
134 false if the cost of any instruction could not be estimated.
136 The cost of the non-jump insns in BB is scaled by REG_BR_PROB_BASE
137 as those insns are being speculated. MAX_COST is scaled with SCALE
138 plus a small fudge factor. */
141 cheap_bb_rtx_cost_p (const_basic_block bb
, int scale
, int max_cost
)
144 rtx insn
= BB_HEAD (bb
);
145 bool speed
= optimize_bb_for_speed_p (bb
);
147 /* Our branch probability/scaling factors are just estimates and don't
148 account for cases where we can get speculation for free and other
149 secondary benefits. So we fudge the scale factor to make speculating
150 appear a little more profitable. */
151 scale
+= REG_BR_PROB_BASE
/ 8;
156 if (NONJUMP_INSN_P (insn
))
158 int cost
= insn_rtx_cost (PATTERN (insn
), speed
) * REG_BR_PROB_BASE
;
162 /* If this instruction is the load or set of a "stack" register,
163 such as a floating point register on x87, then the cost of
164 speculatively executing this insn may need to include
165 the additional cost of popping its result off of the
166 register stack. Unfortunately, correctly recognizing and
167 accounting for this additional overhead is tricky, so for
168 now we simply prohibit such speculative execution. */
171 rtx set
= single_set (insn
);
172 if (set
&& STACK_REG_P (SET_DEST (set
)))
178 if (count
>= max_cost
)
181 else if (CALL_P (insn
))
184 if (insn
== BB_END (bb
))
186 insn
= NEXT_INSN (insn
);
192 /* Return the first non-jump active insn in the basic block. */
195 first_active_insn (basic_block bb
)
197 rtx insn
= BB_HEAD (bb
);
201 if (insn
== BB_END (bb
))
203 insn
= NEXT_INSN (insn
);
206 while (NOTE_P (insn
) || DEBUG_INSN_P (insn
))
208 if (insn
== BB_END (bb
))
210 insn
= NEXT_INSN (insn
);
219 /* Return the last non-jump active (non-jump) insn in the basic block. */
222 last_active_insn (basic_block bb
, int skip_use_p
)
224 rtx insn
= BB_END (bb
);
225 rtx head
= BB_HEAD (bb
);
229 || DEBUG_INSN_P (insn
)
231 && NONJUMP_INSN_P (insn
)
232 && GET_CODE (PATTERN (insn
)) == USE
))
236 insn
= PREV_INSN (insn
);
245 /* Return the active insn before INSN inside basic block CURR_BB. */
248 find_active_insn_before (basic_block curr_bb
, rtx insn
)
250 if (!insn
|| insn
== BB_HEAD (curr_bb
))
253 while ((insn
= PREV_INSN (insn
)) != NULL_RTX
)
255 if (NONJUMP_INSN_P (insn
) || JUMP_P (insn
) || CALL_P (insn
))
258 /* No other active insn all the way to the start of the basic block. */
259 if (insn
== BB_HEAD (curr_bb
))
266 /* Return the active insn after INSN inside basic block CURR_BB. */
269 find_active_insn_after (basic_block curr_bb
, rtx insn
)
271 if (!insn
|| insn
== BB_END (curr_bb
))
274 while ((insn
= NEXT_INSN (insn
)) != NULL_RTX
)
276 if (NONJUMP_INSN_P (insn
) || JUMP_P (insn
) || CALL_P (insn
))
279 /* No other active insn all the way to the end of the basic block. */
280 if (insn
== BB_END (curr_bb
))
287 /* Return the basic block reached by falling though the basic block BB. */
290 block_fallthru (basic_block bb
)
292 edge e
= find_fallthru_edge (bb
->succs
);
294 return (e
) ? e
->dest
: NULL_BLOCK
;
297 /* Go through a bunch of insns, converting them to conditional
298 execution format if possible. Return TRUE if all of the non-note
299 insns were processed. */
302 cond_exec_process_insns (ce_if_block_t
*ce_info ATTRIBUTE_UNUSED
,
303 /* if block information */rtx start
,
304 /* first insn to look at */rtx end
,
305 /* last insn to look at */rtx test
,
306 /* conditional execution test */rtx prob_val
,
307 /* probability of branch taken. */int mod_ok
)
309 int must_be_last
= FALSE
;
317 for (insn
= start
; ; insn
= NEXT_INSN (insn
))
319 /* dwarf2out can't cope with conditional prologues. */
320 if (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_PROLOGUE_END
)
323 if (NOTE_P (insn
) || DEBUG_INSN_P (insn
))
326 gcc_assert(NONJUMP_INSN_P (insn
) || CALL_P (insn
));
328 /* Remove USE insns that get in the way. */
329 if (reload_completed
&& GET_CODE (PATTERN (insn
)) == USE
)
331 /* ??? Ug. Actually unlinking the thing is problematic,
332 given what we'd have to coordinate with our callers. */
333 SET_INSN_DELETED (insn
);
337 /* Last insn wasn't last? */
341 if (modified_in_p (test
, insn
))
348 /* Now build the conditional form of the instruction. */
349 pattern
= PATTERN (insn
);
350 xtest
= copy_rtx (test
);
352 /* If this is already a COND_EXEC, rewrite the test to be an AND of the
354 if (GET_CODE (pattern
) == COND_EXEC
)
356 if (GET_MODE (xtest
) != GET_MODE (COND_EXEC_TEST (pattern
)))
359 xtest
= gen_rtx_AND (GET_MODE (xtest
), xtest
,
360 COND_EXEC_TEST (pattern
));
361 pattern
= COND_EXEC_CODE (pattern
);
364 pattern
= gen_rtx_COND_EXEC (VOIDmode
, xtest
, pattern
);
366 /* If the machine needs to modify the insn being conditionally executed,
367 say for example to force a constant integer operand into a temp
368 register, do so here. */
369 #ifdef IFCVT_MODIFY_INSN
370 IFCVT_MODIFY_INSN (ce_info
, pattern
, insn
);
375 validate_change (insn
, &PATTERN (insn
), pattern
, 1);
377 if (CALL_P (insn
) && prob_val
)
378 validate_change (insn
, ®_NOTES (insn
),
379 alloc_EXPR_LIST (REG_BR_PROB
, prob_val
,
380 REG_NOTES (insn
)), 1);
390 /* Return the condition for a jump. Do not do any special processing. */
393 cond_exec_get_condition (rtx jump
)
397 if (any_condjump_p (jump
))
398 test_if
= SET_SRC (pc_set (jump
));
401 cond
= XEXP (test_if
, 0);
403 /* If this branches to JUMP_LABEL when the condition is false,
404 reverse the condition. */
405 if (GET_CODE (XEXP (test_if
, 2)) == LABEL_REF
406 && XEXP (XEXP (test_if
, 2), 0) == JUMP_LABEL (jump
))
408 enum rtx_code rev
= reversed_comparison_code (cond
, jump
);
412 cond
= gen_rtx_fmt_ee (rev
, GET_MODE (cond
), XEXP (cond
, 0),
419 /* Given a simple IF-THEN or IF-THEN-ELSE block, attempt to convert it
420 to conditional execution. Return TRUE if we were successful at
421 converting the block. */
424 cond_exec_process_if_block (ce_if_block_t
* ce_info
,
425 /* if block information */int do_multiple_p
)
427 basic_block test_bb
= ce_info
->test_bb
; /* last test block */
428 basic_block then_bb
= ce_info
->then_bb
; /* THEN */
429 basic_block else_bb
= ce_info
->else_bb
; /* ELSE or NULL */
430 rtx test_expr
; /* expression in IF_THEN_ELSE that is tested */
431 rtx then_start
; /* first insn in THEN block */
432 rtx then_end
; /* last insn + 1 in THEN block */
433 rtx else_start
= NULL_RTX
; /* first insn in ELSE block or NULL */
434 rtx else_end
= NULL_RTX
; /* last insn + 1 in ELSE block */
435 int max
; /* max # of insns to convert. */
436 int then_mod_ok
; /* whether conditional mods are ok in THEN */
437 rtx true_expr
; /* test for else block insns */
438 rtx false_expr
; /* test for then block insns */
439 rtx true_prob_val
; /* probability of else block */
440 rtx false_prob_val
; /* probability of then block */
441 rtx then_last_head
= NULL_RTX
; /* Last match at the head of THEN */
442 rtx else_last_head
= NULL_RTX
; /* Last match at the head of ELSE */
443 rtx then_first_tail
= NULL_RTX
; /* First match at the tail of THEN */
444 rtx else_first_tail
= NULL_RTX
; /* First match at the tail of ELSE */
445 int then_n_insns
, else_n_insns
, n_insns
;
446 enum rtx_code false_code
;
448 /* If test is comprised of && or || elements, and we've failed at handling
449 all of them together, just use the last test if it is the special case of
450 && elements without an ELSE block. */
451 if (!do_multiple_p
&& ce_info
->num_multiple_test_blocks
)
453 if (else_bb
|| ! ce_info
->and_and_p
)
456 ce_info
->test_bb
= test_bb
= ce_info
->last_test_bb
;
457 ce_info
->num_multiple_test_blocks
= 0;
458 ce_info
->num_and_and_blocks
= 0;
459 ce_info
->num_or_or_blocks
= 0;
462 /* Find the conditional jump to the ELSE or JOIN part, and isolate
464 test_expr
= cond_exec_get_condition (BB_END (test_bb
));
468 /* If the conditional jump is more than just a conditional jump,
469 then we can not do conditional execution conversion on this block. */
470 if (! onlyjump_p (BB_END (test_bb
)))
473 /* Collect the bounds of where we're to search, skipping any labels, jumps
474 and notes at the beginning and end of the block. Then count the total
475 number of insns and see if it is small enough to convert. */
476 then_start
= first_active_insn (then_bb
);
477 then_end
= last_active_insn (then_bb
, TRUE
);
478 then_n_insns
= ce_info
->num_then_insns
= count_bb_insns (then_bb
);
479 n_insns
= then_n_insns
;
480 max
= MAX_CONDITIONAL_EXECUTE
;
487 else_start
= first_active_insn (else_bb
);
488 else_end
= last_active_insn (else_bb
, TRUE
);
489 else_n_insns
= ce_info
->num_else_insns
= count_bb_insns (else_bb
);
490 n_insns
+= else_n_insns
;
492 /* Look for matching sequences at the head and tail of the two blocks,
493 and limit the range of insns to be converted if possible. */
494 n_matching
= flow_find_cross_jump (then_bb
, else_bb
,
495 &then_first_tail
, &else_first_tail
,
497 if (then_first_tail
== BB_HEAD (then_bb
))
498 then_start
= then_end
= NULL_RTX
;
499 if (else_first_tail
== BB_HEAD (else_bb
))
500 else_start
= else_end
= NULL_RTX
;
505 then_end
= find_active_insn_before (then_bb
, then_first_tail
);
507 else_end
= find_active_insn_before (else_bb
, else_first_tail
);
508 n_insns
-= 2 * n_matching
;
511 if (then_start
&& else_start
)
513 int longest_match
= MIN (then_n_insns
- n_matching
,
514 else_n_insns
- n_matching
);
516 = flow_find_head_matching_sequence (then_bb
, else_bb
,
525 /* We won't pass the insns in the head sequence to
526 cond_exec_process_insns, so we need to test them here
527 to make sure that they don't clobber the condition. */
528 for (insn
= BB_HEAD (then_bb
);
529 insn
!= NEXT_INSN (then_last_head
);
530 insn
= NEXT_INSN (insn
))
531 if (!LABEL_P (insn
) && !NOTE_P (insn
)
532 && !DEBUG_INSN_P (insn
)
533 && modified_in_p (test_expr
, insn
))
537 if (then_last_head
== then_end
)
538 then_start
= then_end
= NULL_RTX
;
539 if (else_last_head
== else_end
)
540 else_start
= else_end
= NULL_RTX
;
545 then_start
= find_active_insn_after (then_bb
, then_last_head
);
547 else_start
= find_active_insn_after (else_bb
, else_last_head
);
548 n_insns
-= 2 * n_matching
;
556 /* Map test_expr/test_jump into the appropriate MD tests to use on
557 the conditionally executed code. */
559 true_expr
= test_expr
;
561 false_code
= reversed_comparison_code (true_expr
, BB_END (test_bb
));
562 if (false_code
!= UNKNOWN
)
563 false_expr
= gen_rtx_fmt_ee (false_code
, GET_MODE (true_expr
),
564 XEXP (true_expr
, 0), XEXP (true_expr
, 1));
566 false_expr
= NULL_RTX
;
568 #ifdef IFCVT_MODIFY_TESTS
569 /* If the machine description needs to modify the tests, such as setting a
570 conditional execution register from a comparison, it can do so here. */
571 IFCVT_MODIFY_TESTS (ce_info
, true_expr
, false_expr
);
573 /* See if the conversion failed. */
574 if (!true_expr
|| !false_expr
)
578 true_prob_val
= find_reg_note (BB_END (test_bb
), REG_BR_PROB
, NULL_RTX
);
581 true_prob_val
= XEXP (true_prob_val
, 0);
582 false_prob_val
= GEN_INT (REG_BR_PROB_BASE
- INTVAL (true_prob_val
));
585 false_prob_val
= NULL_RTX
;
587 /* If we have && or || tests, do them here. These tests are in the adjacent
588 blocks after the first block containing the test. */
589 if (ce_info
->num_multiple_test_blocks
> 0)
591 basic_block bb
= test_bb
;
592 basic_block last_test_bb
= ce_info
->last_test_bb
;
601 enum rtx_code f_code
;
603 bb
= block_fallthru (bb
);
604 start
= first_active_insn (bb
);
605 end
= last_active_insn (bb
, TRUE
);
607 && ! cond_exec_process_insns (ce_info
, start
, end
, false_expr
,
608 false_prob_val
, FALSE
))
611 /* If the conditional jump is more than just a conditional jump, then
612 we can not do conditional execution conversion on this block. */
613 if (! onlyjump_p (BB_END (bb
)))
616 /* Find the conditional jump and isolate the test. */
617 t
= cond_exec_get_condition (BB_END (bb
));
621 f_code
= reversed_comparison_code (t
, BB_END (bb
));
622 if (f_code
== UNKNOWN
)
625 f
= gen_rtx_fmt_ee (f_code
, GET_MODE (t
), XEXP (t
, 0), XEXP (t
, 1));
626 if (ce_info
->and_and_p
)
628 t
= gen_rtx_AND (GET_MODE (t
), true_expr
, t
);
629 f
= gen_rtx_IOR (GET_MODE (t
), false_expr
, f
);
633 t
= gen_rtx_IOR (GET_MODE (t
), true_expr
, t
);
634 f
= gen_rtx_AND (GET_MODE (t
), false_expr
, f
);
637 /* If the machine description needs to modify the tests, such as
638 setting a conditional execution register from a comparison, it can
640 #ifdef IFCVT_MODIFY_MULTIPLE_TESTS
641 IFCVT_MODIFY_MULTIPLE_TESTS (ce_info
, bb
, t
, f
);
643 /* See if the conversion failed. */
651 while (bb
!= last_test_bb
);
654 /* For IF-THEN-ELSE blocks, we don't allow modifications of the test
655 on then THEN block. */
656 then_mod_ok
= (else_bb
== NULL_BLOCK
);
658 /* Go through the THEN and ELSE blocks converting the insns if possible
659 to conditional execution. */
663 || ! cond_exec_process_insns (ce_info
, then_start
, then_end
,
664 false_expr
, false_prob_val
,
668 if (else_bb
&& else_end
669 && ! cond_exec_process_insns (ce_info
, else_start
, else_end
,
670 true_expr
, true_prob_val
, TRUE
))
673 /* If we cannot apply the changes, fail. Do not go through the normal fail
674 processing, since apply_change_group will call cancel_changes. */
675 if (! apply_change_group ())
677 #ifdef IFCVT_MODIFY_CANCEL
678 /* Cancel any machine dependent changes. */
679 IFCVT_MODIFY_CANCEL (ce_info
);
684 #ifdef IFCVT_MODIFY_FINAL
685 /* Do any machine dependent final modifications. */
686 IFCVT_MODIFY_FINAL (ce_info
);
689 /* Conversion succeeded. */
691 fprintf (dump_file
, "%d insn%s converted to conditional execution.\n",
692 n_insns
, (n_insns
== 1) ? " was" : "s were");
694 /* Merge the blocks! If we had matching sequences, make sure to delete one
695 copy at the appropriate location first: delete the copy in the THEN branch
696 for a tail sequence so that the remaining one is executed last for both
697 branches, and delete the copy in the ELSE branch for a head sequence so
698 that the remaining one is executed first for both branches. */
701 rtx from
= then_first_tail
;
703 from
= find_active_insn_after (then_bb
, from
);
704 delete_insn_chain (from
, BB_END (then_bb
), false);
707 delete_insn_chain (first_active_insn (else_bb
), else_last_head
, false);
709 merge_if_block (ce_info
);
710 cond_exec_changed_p
= TRUE
;
714 #ifdef IFCVT_MODIFY_CANCEL
715 /* Cancel any machine dependent changes. */
716 IFCVT_MODIFY_CANCEL (ce_info
);
723 /* Used by noce_process_if_block to communicate with its subroutines.
725 The subroutines know that A and B may be evaluated freely. They
726 know that X is a register. They should insert new instructions
727 before cond_earliest. */
731 /* The basic blocks that make up the IF-THEN-{ELSE-,}JOIN block. */
732 basic_block test_bb
, then_bb
, else_bb
, join_bb
;
734 /* The jump that ends TEST_BB. */
737 /* The jump condition. */
740 /* New insns should be inserted before this one. */
743 /* Insns in the THEN and ELSE block. There is always just this
744 one insns in those blocks. The insns are single_set insns.
745 If there was no ELSE block, INSN_B is the last insn before
746 COND_EARLIEST, or NULL_RTX. In the former case, the insn
747 operands are still valid, as if INSN_B was moved down below
751 /* The SET_SRC of INSN_A and INSN_B. */
754 /* The SET_DEST of INSN_A. */
757 /* True if this if block is not canonical. In the canonical form of
758 if blocks, the THEN_BB is the block reached via the fallthru edge
759 from TEST_BB. For the noce transformations, we allow the symmetric
761 bool then_else_reversed
;
763 /* Estimated cost of the particular branch instruction. */
767 static rtx
noce_emit_store_flag (struct noce_if_info
*, rtx
, int, int);
768 static int noce_try_move (struct noce_if_info
*);
769 static int noce_try_store_flag (struct noce_if_info
*);
770 static int noce_try_addcc (struct noce_if_info
*);
771 static int noce_try_store_flag_constants (struct noce_if_info
*);
772 static int noce_try_store_flag_mask (struct noce_if_info
*);
773 static rtx
noce_emit_cmove (struct noce_if_info
*, rtx
, enum rtx_code
, rtx
,
775 static int noce_try_cmove (struct noce_if_info
*);
776 static int noce_try_cmove_arith (struct noce_if_info
*);
777 static rtx
noce_get_alt_condition (struct noce_if_info
*, rtx
, rtx
*);
778 static int noce_try_minmax (struct noce_if_info
*);
779 static int noce_try_abs (struct noce_if_info
*);
780 static int noce_try_sign_mask (struct noce_if_info
*);
782 /* Helper function for noce_try_store_flag*. */
785 noce_emit_store_flag (struct noce_if_info
*if_info
, rtx x
, int reversep
,
788 rtx cond
= if_info
->cond
;
792 cond_complex
= (! general_operand (XEXP (cond
, 0), VOIDmode
)
793 || ! general_operand (XEXP (cond
, 1), VOIDmode
));
795 /* If earliest == jump, or when the condition is complex, try to
796 build the store_flag insn directly. */
800 rtx set
= pc_set (if_info
->jump
);
801 cond
= XEXP (SET_SRC (set
), 0);
802 if (GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
803 && XEXP (XEXP (SET_SRC (set
), 2), 0) == JUMP_LABEL (if_info
->jump
))
804 reversep
= !reversep
;
805 if (if_info
->then_else_reversed
)
806 reversep
= !reversep
;
810 code
= reversed_comparison_code (cond
, if_info
->jump
);
812 code
= GET_CODE (cond
);
814 if ((if_info
->cond_earliest
== if_info
->jump
|| cond_complex
)
815 && (normalize
== 0 || STORE_FLAG_VALUE
== normalize
))
819 tmp
= gen_rtx_fmt_ee (code
, GET_MODE (x
), XEXP (cond
, 0),
821 tmp
= gen_rtx_SET (VOIDmode
, x
, tmp
);
824 tmp
= emit_insn (tmp
);
826 if (recog_memoized (tmp
) >= 0)
832 if_info
->cond_earliest
= if_info
->jump
;
840 /* Don't even try if the comparison operands or the mode of X are weird. */
841 if (cond_complex
|| !SCALAR_INT_MODE_P (GET_MODE (x
)))
844 return emit_store_flag (x
, code
, XEXP (cond
, 0),
845 XEXP (cond
, 1), VOIDmode
,
846 (code
== LTU
|| code
== LEU
847 || code
== GEU
|| code
== GTU
), normalize
);
850 /* Emit instruction to move an rtx, possibly into STRICT_LOW_PART.
851 X is the destination/target and Y is the value to copy. */
854 noce_emit_move_insn (rtx x
, rtx y
)
856 enum machine_mode outmode
;
860 if (GET_CODE (x
) != STRICT_LOW_PART
)
862 rtx seq
, insn
, target
;
866 /* Check that the SET_SRC is reasonable before calling emit_move_insn,
867 otherwise construct a suitable SET pattern ourselves. */
868 insn
= (OBJECT_P (y
) || CONSTANT_P (y
) || GET_CODE (y
) == SUBREG
)
869 ? emit_move_insn (x
, y
)
870 : emit_insn (gen_rtx_SET (VOIDmode
, x
, y
));
874 if (recog_memoized (insn
) <= 0)
876 if (GET_CODE (x
) == ZERO_EXTRACT
)
878 rtx op
= XEXP (x
, 0);
879 unsigned HOST_WIDE_INT size
= INTVAL (XEXP (x
, 1));
880 unsigned HOST_WIDE_INT start
= INTVAL (XEXP (x
, 2));
882 /* store_bit_field expects START to be relative to
883 BYTES_BIG_ENDIAN and adjusts this value for machines with
884 BITS_BIG_ENDIAN != BYTES_BIG_ENDIAN. In order to be able to
885 invoke store_bit_field again it is necessary to have the START
886 value from the first call. */
887 if (BITS_BIG_ENDIAN
!= BYTES_BIG_ENDIAN
)
890 start
= BITS_PER_UNIT
- start
- size
;
893 gcc_assert (REG_P (op
));
894 start
= BITS_PER_WORD
- start
- size
;
898 gcc_assert (start
< (MEM_P (op
) ? BITS_PER_UNIT
: BITS_PER_WORD
));
899 store_bit_field (op
, size
, start
, 0, 0, GET_MODE (x
), y
);
903 switch (GET_RTX_CLASS (GET_CODE (y
)))
906 ot
= code_to_optab
[GET_CODE (y
)];
910 target
= expand_unop (GET_MODE (y
), ot
, XEXP (y
, 0), x
, 0);
911 if (target
!= NULL_RTX
)
914 emit_move_insn (x
, target
);
923 ot
= code_to_optab
[GET_CODE (y
)];
927 target
= expand_binop (GET_MODE (y
), ot
,
928 XEXP (y
, 0), XEXP (y
, 1),
930 if (target
!= NULL_RTX
)
933 emit_move_insn (x
, target
);
950 inner
= XEXP (outer
, 0);
951 outmode
= GET_MODE (outer
);
952 bitpos
= SUBREG_BYTE (outer
) * BITS_PER_UNIT
;
953 store_bit_field (inner
, GET_MODE_BITSIZE (outmode
), bitpos
,
957 /* Return sequence of instructions generated by if conversion. This
958 function calls end_sequence() to end the current stream, ensures
959 that are instructions are unshared, recognizable non-jump insns.
960 On failure, this function returns a NULL_RTX. */
963 end_ifcvt_sequence (struct noce_if_info
*if_info
)
966 rtx seq
= get_insns ();
968 set_used_flags (if_info
->x
);
969 set_used_flags (if_info
->cond
);
970 unshare_all_rtl_in_chain (seq
);
973 /* Make sure that all of the instructions emitted are recognizable,
974 and that we haven't introduced a new jump instruction.
975 As an exercise for the reader, build a general mechanism that
976 allows proper placement of required clobbers. */
977 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
979 || recog_memoized (insn
) == -1)
985 /* Convert "if (a != b) x = a; else x = b" into "x = a" and
986 "if (a == b) x = a; else x = b" into "x = b". */
989 noce_try_move (struct noce_if_info
*if_info
)
991 rtx cond
= if_info
->cond
;
992 enum rtx_code code
= GET_CODE (cond
);
995 if (code
!= NE
&& code
!= EQ
)
998 /* This optimization isn't valid if either A or B could be a NaN
1000 if (HONOR_NANS (GET_MODE (if_info
->x
))
1001 || HONOR_SIGNED_ZEROS (GET_MODE (if_info
->x
)))
1004 /* Check whether the operands of the comparison are A and in
1006 if ((rtx_equal_p (if_info
->a
, XEXP (cond
, 0))
1007 && rtx_equal_p (if_info
->b
, XEXP (cond
, 1)))
1008 || (rtx_equal_p (if_info
->a
, XEXP (cond
, 1))
1009 && rtx_equal_p (if_info
->b
, XEXP (cond
, 0))))
1011 y
= (code
== EQ
) ? if_info
->a
: if_info
->b
;
1013 /* Avoid generating the move if the source is the destination. */
1014 if (! rtx_equal_p (if_info
->x
, y
))
1017 noce_emit_move_insn (if_info
->x
, y
);
1018 seq
= end_ifcvt_sequence (if_info
);
1022 emit_insn_before_setloc (seq
, if_info
->jump
,
1023 INSN_LOCATOR (if_info
->insn_a
));
1030 /* Convert "if (test) x = 1; else x = 0".
1032 Only try 0 and STORE_FLAG_VALUE here. Other combinations will be
1033 tried in noce_try_store_flag_constants after noce_try_cmove has had
1034 a go at the conversion. */
1037 noce_try_store_flag (struct noce_if_info
*if_info
)
1042 if (CONST_INT_P (if_info
->b
)
1043 && INTVAL (if_info
->b
) == STORE_FLAG_VALUE
1044 && if_info
->a
== const0_rtx
)
1046 else if (if_info
->b
== const0_rtx
1047 && CONST_INT_P (if_info
->a
)
1048 && INTVAL (if_info
->a
) == STORE_FLAG_VALUE
1049 && (reversed_comparison_code (if_info
->cond
, if_info
->jump
)
1057 target
= noce_emit_store_flag (if_info
, if_info
->x
, reversep
, 0);
1060 if (target
!= if_info
->x
)
1061 noce_emit_move_insn (if_info
->x
, target
);
1063 seq
= end_ifcvt_sequence (if_info
);
1067 emit_insn_before_setloc (seq
, if_info
->jump
,
1068 INSN_LOCATOR (if_info
->insn_a
));
1078 /* Convert "if (test) x = a; else x = b", for A and B constant. */
1081 noce_try_store_flag_constants (struct noce_if_info
*if_info
)
1085 HOST_WIDE_INT itrue
, ifalse
, diff
, tmp
;
1086 int normalize
, can_reverse
;
1087 enum machine_mode mode
;
1089 if (CONST_INT_P (if_info
->a
)
1090 && CONST_INT_P (if_info
->b
))
1092 mode
= GET_MODE (if_info
->x
);
1093 ifalse
= INTVAL (if_info
->a
);
1094 itrue
= INTVAL (if_info
->b
);
1096 /* Make sure we can represent the difference between the two values. */
1097 if ((itrue
- ifalse
> 0)
1098 != ((ifalse
< 0) != (itrue
< 0) ? ifalse
< 0 : ifalse
< itrue
))
1101 diff
= trunc_int_for_mode (itrue
- ifalse
, mode
);
1103 can_reverse
= (reversed_comparison_code (if_info
->cond
, if_info
->jump
)
1107 if (diff
== STORE_FLAG_VALUE
|| diff
== -STORE_FLAG_VALUE
)
1109 else if (ifalse
== 0 && exact_log2 (itrue
) >= 0
1110 && (STORE_FLAG_VALUE
== 1
1111 || if_info
->branch_cost
>= 2))
1113 else if (itrue
== 0 && exact_log2 (ifalse
) >= 0 && can_reverse
1114 && (STORE_FLAG_VALUE
== 1 || if_info
->branch_cost
>= 2))
1115 normalize
= 1, reversep
= 1;
1116 else if (itrue
== -1
1117 && (STORE_FLAG_VALUE
== -1
1118 || if_info
->branch_cost
>= 2))
1120 else if (ifalse
== -1 && can_reverse
1121 && (STORE_FLAG_VALUE
== -1 || if_info
->branch_cost
>= 2))
1122 normalize
= -1, reversep
= 1;
1123 else if ((if_info
->branch_cost
>= 2 && STORE_FLAG_VALUE
== -1)
1124 || if_info
->branch_cost
>= 3)
1131 tmp
= itrue
; itrue
= ifalse
; ifalse
= tmp
;
1132 diff
= trunc_int_for_mode (-diff
, mode
);
1136 target
= noce_emit_store_flag (if_info
, if_info
->x
, reversep
, normalize
);
1143 /* if (test) x = 3; else x = 4;
1144 => x = 3 + (test == 0); */
1145 if (diff
== STORE_FLAG_VALUE
|| diff
== -STORE_FLAG_VALUE
)
1147 target
= expand_simple_binop (mode
,
1148 (diff
== STORE_FLAG_VALUE
1150 GEN_INT (ifalse
), target
, if_info
->x
, 0,
1154 /* if (test) x = 8; else x = 0;
1155 => x = (test != 0) << 3; */
1156 else if (ifalse
== 0 && (tmp
= exact_log2 (itrue
)) >= 0)
1158 target
= expand_simple_binop (mode
, ASHIFT
,
1159 target
, GEN_INT (tmp
), if_info
->x
, 0,
1163 /* if (test) x = -1; else x = b;
1164 => x = -(test != 0) | b; */
1165 else if (itrue
== -1)
1167 target
= expand_simple_binop (mode
, IOR
,
1168 target
, GEN_INT (ifalse
), if_info
->x
, 0,
1172 /* if (test) x = a; else x = b;
1173 => x = (-(test != 0) & (b - a)) + a; */
1176 target
= expand_simple_binop (mode
, AND
,
1177 target
, GEN_INT (diff
), if_info
->x
, 0,
1180 target
= expand_simple_binop (mode
, PLUS
,
1181 target
, GEN_INT (ifalse
),
1182 if_info
->x
, 0, OPTAB_WIDEN
);
1191 if (target
!= if_info
->x
)
1192 noce_emit_move_insn (if_info
->x
, target
);
1194 seq
= end_ifcvt_sequence (if_info
);
1198 emit_insn_before_setloc (seq
, if_info
->jump
,
1199 INSN_LOCATOR (if_info
->insn_a
));
1206 /* Convert "if (test) foo++" into "foo += (test != 0)", and
1207 similarly for "foo--". */
1210 noce_try_addcc (struct noce_if_info
*if_info
)
1213 int subtract
, normalize
;
1215 if (GET_CODE (if_info
->a
) == PLUS
1216 && rtx_equal_p (XEXP (if_info
->a
, 0), if_info
->b
)
1217 && (reversed_comparison_code (if_info
->cond
, if_info
->jump
)
1220 rtx cond
= if_info
->cond
;
1221 enum rtx_code code
= reversed_comparison_code (cond
, if_info
->jump
);
1223 /* First try to use addcc pattern. */
1224 if (general_operand (XEXP (cond
, 0), VOIDmode
)
1225 && general_operand (XEXP (cond
, 1), VOIDmode
))
1228 target
= emit_conditional_add (if_info
->x
, code
,
1233 XEXP (if_info
->a
, 1),
1234 GET_MODE (if_info
->x
),
1235 (code
== LTU
|| code
== GEU
1236 || code
== LEU
|| code
== GTU
));
1239 if (target
!= if_info
->x
)
1240 noce_emit_move_insn (if_info
->x
, target
);
1242 seq
= end_ifcvt_sequence (if_info
);
1246 emit_insn_before_setloc (seq
, if_info
->jump
,
1247 INSN_LOCATOR (if_info
->insn_a
));
1253 /* If that fails, construct conditional increment or decrement using
1255 if (if_info
->branch_cost
>= 2
1256 && (XEXP (if_info
->a
, 1) == const1_rtx
1257 || XEXP (if_info
->a
, 1) == constm1_rtx
))
1260 if (STORE_FLAG_VALUE
== INTVAL (XEXP (if_info
->a
, 1)))
1261 subtract
= 0, normalize
= 0;
1262 else if (-STORE_FLAG_VALUE
== INTVAL (XEXP (if_info
->a
, 1)))
1263 subtract
= 1, normalize
= 0;
1265 subtract
= 0, normalize
= INTVAL (XEXP (if_info
->a
, 1));
1268 target
= noce_emit_store_flag (if_info
,
1269 gen_reg_rtx (GET_MODE (if_info
->x
)),
1273 target
= expand_simple_binop (GET_MODE (if_info
->x
),
1274 subtract
? MINUS
: PLUS
,
1275 if_info
->b
, target
, if_info
->x
,
1279 if (target
!= if_info
->x
)
1280 noce_emit_move_insn (if_info
->x
, target
);
1282 seq
= end_ifcvt_sequence (if_info
);
1286 emit_insn_before_setloc (seq
, if_info
->jump
,
1287 INSN_LOCATOR (if_info
->insn_a
));
1297 /* Convert "if (test) x = 0;" to "x &= -(test == 0);" */
1300 noce_try_store_flag_mask (struct noce_if_info
*if_info
)
1306 if ((if_info
->branch_cost
>= 2
1307 || STORE_FLAG_VALUE
== -1)
1308 && ((if_info
->a
== const0_rtx
1309 && rtx_equal_p (if_info
->b
, if_info
->x
))
1310 || ((reversep
= (reversed_comparison_code (if_info
->cond
,
1313 && if_info
->b
== const0_rtx
1314 && rtx_equal_p (if_info
->a
, if_info
->x
))))
1317 target
= noce_emit_store_flag (if_info
,
1318 gen_reg_rtx (GET_MODE (if_info
->x
)),
1321 target
= expand_simple_binop (GET_MODE (if_info
->x
), AND
,
1323 target
, if_info
->x
, 0,
1328 if (target
!= if_info
->x
)
1329 noce_emit_move_insn (if_info
->x
, target
);
1331 seq
= end_ifcvt_sequence (if_info
);
1335 emit_insn_before_setloc (seq
, if_info
->jump
,
1336 INSN_LOCATOR (if_info
->insn_a
));
1346 /* Helper function for noce_try_cmove and noce_try_cmove_arith. */
1349 noce_emit_cmove (struct noce_if_info
*if_info
, rtx x
, enum rtx_code code
,
1350 rtx cmp_a
, rtx cmp_b
, rtx vfalse
, rtx vtrue
)
1352 rtx target ATTRIBUTE_UNUSED
;
1353 int unsignedp ATTRIBUTE_UNUSED
;
1355 /* If earliest == jump, try to build the cmove insn directly.
1356 This is helpful when combine has created some complex condition
1357 (like for alpha's cmovlbs) that we can't hope to regenerate
1358 through the normal interface. */
1360 if (if_info
->cond_earliest
== if_info
->jump
)
1364 tmp
= gen_rtx_fmt_ee (code
, GET_MODE (if_info
->cond
), cmp_a
, cmp_b
);
1365 tmp
= gen_rtx_IF_THEN_ELSE (GET_MODE (x
), tmp
, vtrue
, vfalse
);
1366 tmp
= gen_rtx_SET (VOIDmode
, x
, tmp
);
1369 tmp
= emit_insn (tmp
);
1371 if (recog_memoized (tmp
) >= 0)
1383 /* Don't even try if the comparison operands are weird. */
1384 if (! general_operand (cmp_a
, GET_MODE (cmp_a
))
1385 || ! general_operand (cmp_b
, GET_MODE (cmp_b
)))
1388 #if HAVE_conditional_move
1389 unsignedp
= (code
== LTU
|| code
== GEU
1390 || code
== LEU
|| code
== GTU
);
1392 target
= emit_conditional_move (x
, code
, cmp_a
, cmp_b
, VOIDmode
,
1393 vtrue
, vfalse
, GET_MODE (x
),
1398 /* We might be faced with a situation like:
1401 vtrue = (subreg:M (reg:N VTRUE) BYTE)
1402 vfalse = (subreg:M (reg:N VFALSE) BYTE)
1404 We can't do a conditional move in mode M, but it's possible that we
1405 could do a conditional move in mode N instead and take a subreg of
1408 If we can't create new pseudos, though, don't bother. */
1409 if (reload_completed
)
1412 if (GET_CODE (vtrue
) == SUBREG
&& GET_CODE (vfalse
) == SUBREG
)
1414 rtx reg_vtrue
= SUBREG_REG (vtrue
);
1415 rtx reg_vfalse
= SUBREG_REG (vfalse
);
1416 unsigned int byte_vtrue
= SUBREG_BYTE (vtrue
);
1417 unsigned int byte_vfalse
= SUBREG_BYTE (vfalse
);
1418 rtx promoted_target
;
1420 if (GET_MODE (reg_vtrue
) != GET_MODE (reg_vfalse
)
1421 || byte_vtrue
!= byte_vfalse
1422 || (SUBREG_PROMOTED_VAR_P (vtrue
)
1423 != SUBREG_PROMOTED_VAR_P (vfalse
))
1424 || (SUBREG_PROMOTED_UNSIGNED_P (vtrue
)
1425 != SUBREG_PROMOTED_UNSIGNED_P (vfalse
)))
1428 promoted_target
= gen_reg_rtx (GET_MODE (reg_vtrue
));
1430 target
= emit_conditional_move (promoted_target
, code
, cmp_a
, cmp_b
,
1431 VOIDmode
, reg_vtrue
, reg_vfalse
,
1432 GET_MODE (reg_vtrue
), unsignedp
);
1433 /* Nope, couldn't do it in that mode either. */
1437 target
= gen_rtx_SUBREG (GET_MODE (vtrue
), promoted_target
, byte_vtrue
);
1438 SUBREG_PROMOTED_VAR_P (target
) = SUBREG_PROMOTED_VAR_P (vtrue
);
1439 SUBREG_PROMOTED_UNSIGNED_SET (target
, SUBREG_PROMOTED_UNSIGNED_P (vtrue
));
1440 emit_move_insn (x
, target
);
1446 /* We'll never get here, as noce_process_if_block doesn't call the
1447 functions involved. Ifdef code, however, should be discouraged
1448 because it leads to typos in the code not selected. However,
1449 emit_conditional_move won't exist either. */
1454 /* Try only simple constants and registers here. More complex cases
1455 are handled in noce_try_cmove_arith after noce_try_store_flag_arith
1456 has had a go at it. */
1459 noce_try_cmove (struct noce_if_info
*if_info
)
1464 if ((CONSTANT_P (if_info
->a
) || register_operand (if_info
->a
, VOIDmode
))
1465 && (CONSTANT_P (if_info
->b
) || register_operand (if_info
->b
, VOIDmode
)))
1469 code
= GET_CODE (if_info
->cond
);
1470 target
= noce_emit_cmove (if_info
, if_info
->x
, code
,
1471 XEXP (if_info
->cond
, 0),
1472 XEXP (if_info
->cond
, 1),
1473 if_info
->a
, if_info
->b
);
1477 if (target
!= if_info
->x
)
1478 noce_emit_move_insn (if_info
->x
, target
);
1480 seq
= end_ifcvt_sequence (if_info
);
1484 emit_insn_before_setloc (seq
, if_info
->jump
,
1485 INSN_LOCATOR (if_info
->insn_a
));
1498 /* Try more complex cases involving conditional_move. */
1501 noce_try_cmove_arith (struct noce_if_info
*if_info
)
1513 /* A conditional move from two memory sources is equivalent to a
1514 conditional on their addresses followed by a load. Don't do this
1515 early because it'll screw alias analysis. Note that we've
1516 already checked for no side effects. */
1517 /* ??? FIXME: Magic number 5. */
1518 if (cse_not_expected
1519 && MEM_P (a
) && MEM_P (b
)
1520 && MEM_ADDR_SPACE (a
) == MEM_ADDR_SPACE (b
)
1521 && if_info
->branch_cost
>= 5)
1523 enum machine_mode address_mode
= get_address_mode (a
);
1527 x
= gen_reg_rtx (address_mode
);
1531 /* ??? We could handle this if we knew that a load from A or B could
1532 not trap or fault. This is also true if we've already loaded
1533 from the address along the path from ENTRY. */
1534 else if (may_trap_or_fault_p (a
) || may_trap_or_fault_p (b
))
1537 /* if (test) x = a + b; else x = c - d;
1544 code
= GET_CODE (if_info
->cond
);
1545 insn_a
= if_info
->insn_a
;
1546 insn_b
= if_info
->insn_b
;
1548 /* Total insn_rtx_cost should be smaller than branch cost. Exit
1549 if insn_rtx_cost can't be estimated. */
1553 = insn_rtx_cost (PATTERN (insn_a
),
1554 optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn_a
)));
1555 if (insn_cost
== 0 || insn_cost
> COSTS_N_INSNS (if_info
->branch_cost
))
1564 += insn_rtx_cost (PATTERN (insn_b
),
1565 optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn_b
)));
1566 if (insn_cost
== 0 || insn_cost
> COSTS_N_INSNS (if_info
->branch_cost
))
1570 /* Possibly rearrange operands to make things come out more natural. */
1571 if (reversed_comparison_code (if_info
->cond
, if_info
->jump
) != UNKNOWN
)
1574 if (rtx_equal_p (b
, x
))
1576 else if (general_operand (b
, GET_MODE (b
)))
1581 code
= reversed_comparison_code (if_info
->cond
, if_info
->jump
);
1582 tmp
= a
, a
= b
, b
= tmp
;
1583 tmp
= insn_a
, insn_a
= insn_b
, insn_b
= tmp
;
1592 /* If either operand is complex, load it into a register first.
1593 The best way to do this is to copy the original insn. In this
1594 way we preserve any clobbers etc that the insn may have had.
1595 This is of course not possible in the IS_MEM case. */
1596 if (! general_operand (a
, GET_MODE (a
)))
1602 tmp
= gen_reg_rtx (GET_MODE (a
));
1603 tmp
= emit_insn (gen_rtx_SET (VOIDmode
, tmp
, a
));
1606 goto end_seq_and_fail
;
1609 a
= gen_reg_rtx (GET_MODE (a
));
1610 tmp
= copy_rtx (insn_a
);
1611 set
= single_set (tmp
);
1613 tmp
= emit_insn (PATTERN (tmp
));
1615 if (recog_memoized (tmp
) < 0)
1616 goto end_seq_and_fail
;
1618 if (! general_operand (b
, GET_MODE (b
)))
1624 tmp
= gen_reg_rtx (GET_MODE (b
));
1625 tmp
= gen_rtx_SET (VOIDmode
, tmp
, b
);
1628 goto end_seq_and_fail
;
1631 b
= gen_reg_rtx (GET_MODE (b
));
1632 tmp
= copy_rtx (insn_b
);
1633 set
= single_set (tmp
);
1635 tmp
= PATTERN (tmp
);
1638 /* If insn to set up A clobbers any registers B depends on, try to
1639 swap insn that sets up A with the one that sets up B. If even
1640 that doesn't help, punt. */
1641 last
= get_last_insn ();
1642 if (last
&& modified_in_p (orig_b
, last
))
1644 tmp
= emit_insn_before (tmp
, get_insns ());
1645 if (modified_in_p (orig_a
, tmp
))
1646 goto end_seq_and_fail
;
1649 tmp
= emit_insn (tmp
);
1651 if (recog_memoized (tmp
) < 0)
1652 goto end_seq_and_fail
;
1655 target
= noce_emit_cmove (if_info
, x
, code
, XEXP (if_info
->cond
, 0),
1656 XEXP (if_info
->cond
, 1), a
, b
);
1659 goto end_seq_and_fail
;
1661 /* If we're handling a memory for above, emit the load now. */
1664 tmp
= gen_rtx_MEM (GET_MODE (if_info
->x
), target
);
1666 /* Copy over flags as appropriate. */
1667 if (MEM_VOLATILE_P (if_info
->a
) || MEM_VOLATILE_P (if_info
->b
))
1668 MEM_VOLATILE_P (tmp
) = 1;
1669 if (MEM_ALIAS_SET (if_info
->a
) == MEM_ALIAS_SET (if_info
->b
))
1670 set_mem_alias_set (tmp
, MEM_ALIAS_SET (if_info
->a
));
1672 MIN (MEM_ALIGN (if_info
->a
), MEM_ALIGN (if_info
->b
)));
1674 gcc_assert (MEM_ADDR_SPACE (if_info
->a
) == MEM_ADDR_SPACE (if_info
->b
));
1675 set_mem_addr_space (tmp
, MEM_ADDR_SPACE (if_info
->a
));
1677 noce_emit_move_insn (if_info
->x
, tmp
);
1679 else if (target
!= x
)
1680 noce_emit_move_insn (x
, target
);
1682 tmp
= end_ifcvt_sequence (if_info
);
1686 emit_insn_before_setloc (tmp
, if_info
->jump
, INSN_LOCATOR (if_info
->insn_a
));
1694 /* For most cases, the simplified condition we found is the best
1695 choice, but this is not the case for the min/max/abs transforms.
1696 For these we wish to know that it is A or B in the condition. */
1699 noce_get_alt_condition (struct noce_if_info
*if_info
, rtx target
,
1702 rtx cond
, set
, insn
;
1705 /* If target is already mentioned in the known condition, return it. */
1706 if (reg_mentioned_p (target
, if_info
->cond
))
1708 *earliest
= if_info
->cond_earliest
;
1709 return if_info
->cond
;
1712 set
= pc_set (if_info
->jump
);
1713 cond
= XEXP (SET_SRC (set
), 0);
1715 = GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
1716 && XEXP (XEXP (SET_SRC (set
), 2), 0) == JUMP_LABEL (if_info
->jump
);
1717 if (if_info
->then_else_reversed
)
1720 /* If we're looking for a constant, try to make the conditional
1721 have that constant in it. There are two reasons why it may
1722 not have the constant we want:
1724 1. GCC may have needed to put the constant in a register, because
1725 the target can't compare directly against that constant. For
1726 this case, we look for a SET immediately before the comparison
1727 that puts a constant in that register.
1729 2. GCC may have canonicalized the conditional, for example
1730 replacing "if x < 4" with "if x <= 3". We can undo that (or
1731 make equivalent types of changes) to get the constants we need
1732 if they're off by one in the right direction. */
1734 if (CONST_INT_P (target
))
1736 enum rtx_code code
= GET_CODE (if_info
->cond
);
1737 rtx op_a
= XEXP (if_info
->cond
, 0);
1738 rtx op_b
= XEXP (if_info
->cond
, 1);
1741 /* First, look to see if we put a constant in a register. */
1742 prev_insn
= prev_nonnote_insn (if_info
->cond_earliest
);
1744 && BLOCK_FOR_INSN (prev_insn
)
1745 == BLOCK_FOR_INSN (if_info
->cond_earliest
)
1746 && INSN_P (prev_insn
)
1747 && GET_CODE (PATTERN (prev_insn
)) == SET
)
1749 rtx src
= find_reg_equal_equiv_note (prev_insn
);
1751 src
= SET_SRC (PATTERN (prev_insn
));
1752 if (CONST_INT_P (src
))
1754 if (rtx_equal_p (op_a
, SET_DEST (PATTERN (prev_insn
))))
1756 else if (rtx_equal_p (op_b
, SET_DEST (PATTERN (prev_insn
))))
1759 if (CONST_INT_P (op_a
))
1764 code
= swap_condition (code
);
1769 /* Now, look to see if we can get the right constant by
1770 adjusting the conditional. */
1771 if (CONST_INT_P (op_b
))
1773 HOST_WIDE_INT desired_val
= INTVAL (target
);
1774 HOST_WIDE_INT actual_val
= INTVAL (op_b
);
1779 if (actual_val
== desired_val
+ 1)
1782 op_b
= GEN_INT (desired_val
);
1786 if (actual_val
== desired_val
- 1)
1789 op_b
= GEN_INT (desired_val
);
1793 if (actual_val
== desired_val
- 1)
1796 op_b
= GEN_INT (desired_val
);
1800 if (actual_val
== desired_val
+ 1)
1803 op_b
= GEN_INT (desired_val
);
1811 /* If we made any changes, generate a new conditional that is
1812 equivalent to what we started with, but has the right
1814 if (code
!= GET_CODE (if_info
->cond
)
1815 || op_a
!= XEXP (if_info
->cond
, 0)
1816 || op_b
!= XEXP (if_info
->cond
, 1))
1818 cond
= gen_rtx_fmt_ee (code
, GET_MODE (cond
), op_a
, op_b
);
1819 *earliest
= if_info
->cond_earliest
;
1824 cond
= canonicalize_condition (if_info
->jump
, cond
, reverse
,
1825 earliest
, target
, false, true);
1826 if (! cond
|| ! reg_mentioned_p (target
, cond
))
1829 /* We almost certainly searched back to a different place.
1830 Need to re-verify correct lifetimes. */
1832 /* X may not be mentioned in the range (cond_earliest, jump]. */
1833 for (insn
= if_info
->jump
; insn
!= *earliest
; insn
= PREV_INSN (insn
))
1834 if (INSN_P (insn
) && reg_overlap_mentioned_p (if_info
->x
, PATTERN (insn
)))
1837 /* A and B may not be modified in the range [cond_earliest, jump). */
1838 for (insn
= *earliest
; insn
!= if_info
->jump
; insn
= NEXT_INSN (insn
))
1840 && (modified_in_p (if_info
->a
, insn
)
1841 || modified_in_p (if_info
->b
, insn
)))
1847 /* Convert "if (a < b) x = a; else x = b;" to "x = min(a, b);", etc. */
1850 noce_try_minmax (struct noce_if_info
*if_info
)
1852 rtx cond
, earliest
, target
, seq
;
1853 enum rtx_code code
, op
;
1856 /* ??? Reject modes with NaNs or signed zeros since we don't know how
1857 they will be resolved with an SMIN/SMAX. It wouldn't be too hard
1858 to get the target to tell us... */
1859 if (HONOR_SIGNED_ZEROS (GET_MODE (if_info
->x
))
1860 || HONOR_NANS (GET_MODE (if_info
->x
)))
1863 cond
= noce_get_alt_condition (if_info
, if_info
->a
, &earliest
);
1867 /* Verify the condition is of the form we expect, and canonicalize
1868 the comparison code. */
1869 code
= GET_CODE (cond
);
1870 if (rtx_equal_p (XEXP (cond
, 0), if_info
->a
))
1872 if (! rtx_equal_p (XEXP (cond
, 1), if_info
->b
))
1875 else if (rtx_equal_p (XEXP (cond
, 1), if_info
->a
))
1877 if (! rtx_equal_p (XEXP (cond
, 0), if_info
->b
))
1879 code
= swap_condition (code
);
1884 /* Determine what sort of operation this is. Note that the code is for
1885 a taken branch, so the code->operation mapping appears backwards. */
1918 target
= expand_simple_binop (GET_MODE (if_info
->x
), op
,
1919 if_info
->a
, if_info
->b
,
1920 if_info
->x
, unsignedp
, OPTAB_WIDEN
);
1926 if (target
!= if_info
->x
)
1927 noce_emit_move_insn (if_info
->x
, target
);
1929 seq
= end_ifcvt_sequence (if_info
);
1933 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATOR (if_info
->insn_a
));
1934 if_info
->cond
= cond
;
1935 if_info
->cond_earliest
= earliest
;
1940 /* Convert "if (a < 0) x = -a; else x = a;" to "x = abs(a);",
1941 "if (a < 0) x = ~a; else x = a;" to "x = one_cmpl_abs(a);",
1945 noce_try_abs (struct noce_if_info
*if_info
)
1947 rtx cond
, earliest
, target
, seq
, a
, b
, c
;
1949 bool one_cmpl
= false;
1951 /* Reject modes with signed zeros. */
1952 if (HONOR_SIGNED_ZEROS (GET_MODE (if_info
->x
)))
1955 /* Recognize A and B as constituting an ABS or NABS. The canonical
1956 form is a branch around the negation, taken when the object is the
1957 first operand of a comparison against 0 that evaluates to true. */
1960 if (GET_CODE (a
) == NEG
&& rtx_equal_p (XEXP (a
, 0), b
))
1962 else if (GET_CODE (b
) == NEG
&& rtx_equal_p (XEXP (b
, 0), a
))
1964 c
= a
; a
= b
; b
= c
;
1967 else if (GET_CODE (a
) == NOT
&& rtx_equal_p (XEXP (a
, 0), b
))
1972 else if (GET_CODE (b
) == NOT
&& rtx_equal_p (XEXP (b
, 0), a
))
1974 c
= a
; a
= b
; b
= c
;
1981 cond
= noce_get_alt_condition (if_info
, b
, &earliest
);
1985 /* Verify the condition is of the form we expect. */
1986 if (rtx_equal_p (XEXP (cond
, 0), b
))
1988 else if (rtx_equal_p (XEXP (cond
, 1), b
))
1996 /* Verify that C is zero. Search one step backward for a
1997 REG_EQUAL note or a simple source if necessary. */
2000 rtx set
, insn
= prev_nonnote_insn (earliest
);
2002 && BLOCK_FOR_INSN (insn
) == BLOCK_FOR_INSN (earliest
)
2003 && (set
= single_set (insn
))
2004 && rtx_equal_p (SET_DEST (set
), c
))
2006 rtx note
= find_reg_equal_equiv_note (insn
);
2016 && GET_CODE (XEXP (c
, 0)) == SYMBOL_REF
2017 && CONSTANT_POOL_ADDRESS_P (XEXP (c
, 0)))
2018 c
= get_pool_constant (XEXP (c
, 0));
2020 /* Work around funny ideas get_condition has wrt canonicalization.
2021 Note that these rtx constants are known to be CONST_INT, and
2022 therefore imply integer comparisons. */
2023 if (c
== constm1_rtx
&& GET_CODE (cond
) == GT
)
2025 else if (c
== const1_rtx
&& GET_CODE (cond
) == LT
)
2027 else if (c
!= CONST0_RTX (GET_MODE (b
)))
2030 /* Determine what sort of operation this is. */
2031 switch (GET_CODE (cond
))
2050 target
= expand_one_cmpl_abs_nojump (GET_MODE (if_info
->x
), b
,
2053 target
= expand_abs_nojump (GET_MODE (if_info
->x
), b
, if_info
->x
, 1);
2055 /* ??? It's a quandary whether cmove would be better here, especially
2056 for integers. Perhaps combine will clean things up. */
2057 if (target
&& negate
)
2060 target
= expand_simple_unop (GET_MODE (target
), NOT
, target
,
2063 target
= expand_simple_unop (GET_MODE (target
), NEG
, target
,
2073 if (target
!= if_info
->x
)
2074 noce_emit_move_insn (if_info
->x
, target
);
2076 seq
= end_ifcvt_sequence (if_info
);
2080 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATOR (if_info
->insn_a
));
2081 if_info
->cond
= cond
;
2082 if_info
->cond_earliest
= earliest
;
2087 /* Convert "if (m < 0) x = b; else x = 0;" to "x = (m >> C) & b;". */
2090 noce_try_sign_mask (struct noce_if_info
*if_info
)
2092 rtx cond
, t
, m
, c
, seq
;
2093 enum machine_mode mode
;
2095 bool t_unconditional
;
2097 cond
= if_info
->cond
;
2098 code
= GET_CODE (cond
);
2103 if (if_info
->a
== const0_rtx
)
2105 if ((code
== LT
&& c
== const0_rtx
)
2106 || (code
== LE
&& c
== constm1_rtx
))
2109 else if (if_info
->b
== const0_rtx
)
2111 if ((code
== GE
&& c
== const0_rtx
)
2112 || (code
== GT
&& c
== constm1_rtx
))
2116 if (! t
|| side_effects_p (t
))
2119 /* We currently don't handle different modes. */
2120 mode
= GET_MODE (t
);
2121 if (GET_MODE (m
) != mode
)
2124 /* This is only profitable if T is unconditionally executed/evaluated in the
2125 original insn sequence or T is cheap. The former happens if B is the
2126 non-zero (T) value and if INSN_B was taken from TEST_BB, or there was no
2127 INSN_B which can happen for e.g. conditional stores to memory. For the
2128 cost computation use the block TEST_BB where the evaluation will end up
2129 after the transformation. */
2132 && (if_info
->insn_b
== NULL_RTX
2133 || BLOCK_FOR_INSN (if_info
->insn_b
) == if_info
->test_bb
));
2134 if (!(t_unconditional
2135 || (set_src_cost (t
, optimize_bb_for_speed_p (if_info
->test_bb
))
2136 < COSTS_N_INSNS (2))))
2140 /* Use emit_store_flag to generate "m < 0 ? -1 : 0" instead of expanding
2141 "(signed) m >> 31" directly. This benefits targets with specialized
2142 insns to obtain the signmask, but still uses ashr_optab otherwise. */
2143 m
= emit_store_flag (gen_reg_rtx (mode
), LT
, m
, const0_rtx
, mode
, 0, -1);
2144 t
= m
? expand_binop (mode
, and_optab
, m
, t
, NULL_RTX
, 0, OPTAB_DIRECT
)
2153 noce_emit_move_insn (if_info
->x
, t
);
2155 seq
= end_ifcvt_sequence (if_info
);
2159 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATOR (if_info
->insn_a
));
2164 /* Optimize away "if (x & C) x |= C" and similar bit manipulation
2168 noce_try_bitop (struct noce_if_info
*if_info
)
2170 rtx cond
, x
, a
, result
, seq
;
2171 enum machine_mode mode
;
2176 cond
= if_info
->cond
;
2177 code
= GET_CODE (cond
);
2179 /* Check for no else condition. */
2180 if (! rtx_equal_p (x
, if_info
->b
))
2183 /* Check for a suitable condition. */
2184 if (code
!= NE
&& code
!= EQ
)
2186 if (XEXP (cond
, 1) != const0_rtx
)
2188 cond
= XEXP (cond
, 0);
2190 /* ??? We could also handle AND here. */
2191 if (GET_CODE (cond
) == ZERO_EXTRACT
)
2193 if (XEXP (cond
, 1) != const1_rtx
2194 || !CONST_INT_P (XEXP (cond
, 2))
2195 || ! rtx_equal_p (x
, XEXP (cond
, 0)))
2197 bitnum
= INTVAL (XEXP (cond
, 2));
2198 mode
= GET_MODE (x
);
2199 if (BITS_BIG_ENDIAN
)
2200 bitnum
= GET_MODE_BITSIZE (mode
) - 1 - bitnum
;
2201 if (bitnum
< 0 || bitnum
>= HOST_BITS_PER_WIDE_INT
)
2208 if (GET_CODE (a
) == IOR
|| GET_CODE (a
) == XOR
)
2210 /* Check for "if (X & C) x = x op C". */
2211 if (! rtx_equal_p (x
, XEXP (a
, 0))
2212 || !CONST_INT_P (XEXP (a
, 1))
2213 || (INTVAL (XEXP (a
, 1)) & GET_MODE_MASK (mode
))
2214 != (unsigned HOST_WIDE_INT
) 1 << bitnum
)
2217 /* if ((x & C) == 0) x |= C; is transformed to x |= C. */
2218 /* if ((x & C) != 0) x |= C; is transformed to nothing. */
2219 if (GET_CODE (a
) == IOR
)
2220 result
= (code
== NE
) ? a
: NULL_RTX
;
2221 else if (code
== NE
)
2223 /* if ((x & C) == 0) x ^= C; is transformed to x |= C. */
2224 result
= gen_int_mode ((HOST_WIDE_INT
) 1 << bitnum
, mode
);
2225 result
= simplify_gen_binary (IOR
, mode
, x
, result
);
2229 /* if ((x & C) != 0) x ^= C; is transformed to x &= ~C. */
2230 result
= gen_int_mode (~((HOST_WIDE_INT
) 1 << bitnum
), mode
);
2231 result
= simplify_gen_binary (AND
, mode
, x
, result
);
2234 else if (GET_CODE (a
) == AND
)
2236 /* Check for "if (X & C) x &= ~C". */
2237 if (! rtx_equal_p (x
, XEXP (a
, 0))
2238 || !CONST_INT_P (XEXP (a
, 1))
2239 || (INTVAL (XEXP (a
, 1)) & GET_MODE_MASK (mode
))
2240 != (~((HOST_WIDE_INT
) 1 << bitnum
) & GET_MODE_MASK (mode
)))
2243 /* if ((x & C) == 0) x &= ~C; is transformed to nothing. */
2244 /* if ((x & C) != 0) x &= ~C; is transformed to x &= ~C. */
2245 result
= (code
== EQ
) ? a
: NULL_RTX
;
2253 noce_emit_move_insn (x
, result
);
2254 seq
= end_ifcvt_sequence (if_info
);
2258 emit_insn_before_setloc (seq
, if_info
->jump
,
2259 INSN_LOCATOR (if_info
->insn_a
));
2265 /* Similar to get_condition, only the resulting condition must be
2266 valid at JUMP, instead of at EARLIEST.
2268 If THEN_ELSE_REVERSED is true, the fallthrough does not go to the
2269 THEN block of the caller, and we have to reverse the condition. */
2272 noce_get_condition (rtx jump
, rtx
*earliest
, bool then_else_reversed
)
2277 if (! any_condjump_p (jump
))
2280 set
= pc_set (jump
);
2282 /* If this branches to JUMP_LABEL when the condition is false,
2283 reverse the condition. */
2284 reverse
= (GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
2285 && XEXP (XEXP (SET_SRC (set
), 2), 0) == JUMP_LABEL (jump
));
2287 /* We may have to reverse because the caller's if block is not canonical,
2288 i.e. the THEN block isn't the fallthrough block for the TEST block
2289 (see find_if_header). */
2290 if (then_else_reversed
)
2293 /* If the condition variable is a register and is MODE_INT, accept it. */
2295 cond
= XEXP (SET_SRC (set
), 0);
2296 tmp
= XEXP (cond
, 0);
2297 if (REG_P (tmp
) && GET_MODE_CLASS (GET_MODE (tmp
)) == MODE_INT
2298 && (GET_MODE (tmp
) != BImode
2299 || !targetm
.small_register_classes_for_mode_p (BImode
)))
2304 cond
= gen_rtx_fmt_ee (reverse_condition (GET_CODE (cond
)),
2305 GET_MODE (cond
), tmp
, XEXP (cond
, 1));
2309 /* Otherwise, fall back on canonicalize_condition to do the dirty
2310 work of manipulating MODE_CC values and COMPARE rtx codes. */
2311 tmp
= canonicalize_condition (jump
, cond
, reverse
, earliest
,
2312 NULL_RTX
, false, true);
2314 /* We don't handle side-effects in the condition, like handling
2315 REG_INC notes and making sure no duplicate conditions are emitted. */
2316 if (tmp
!= NULL_RTX
&& side_effects_p (tmp
))
2322 /* Return true if OP is ok for if-then-else processing. */
2325 noce_operand_ok (const_rtx op
)
2327 if (side_effects_p (op
))
2330 /* We special-case memories, so handle any of them with
2331 no address side effects. */
2333 return ! side_effects_p (XEXP (op
, 0));
2335 return ! may_trap_p (op
);
2338 /* Return true if a write into MEM may trap or fault. */
2341 noce_mem_write_may_trap_or_fault_p (const_rtx mem
)
2345 if (MEM_READONLY_P (mem
))
2348 if (may_trap_or_fault_p (mem
))
2351 addr
= XEXP (mem
, 0);
2353 /* Call target hook to avoid the effects of -fpic etc.... */
2354 addr
= targetm
.delegitimize_address (addr
);
2357 switch (GET_CODE (addr
))
2365 addr
= XEXP (addr
, 0);
2369 addr
= XEXP (addr
, 1);
2372 if (CONST_INT_P (XEXP (addr
, 1)))
2373 addr
= XEXP (addr
, 0);
2380 if (SYMBOL_REF_DECL (addr
)
2381 && decl_readonly_section (SYMBOL_REF_DECL (addr
), 0))
2391 /* Return whether we can use store speculation for MEM. TOP_BB is the
2392 basic block above the conditional block where we are considering
2393 doing the speculative store. We look for whether MEM is set
2394 unconditionally later in the function. */
2397 noce_can_store_speculate_p (basic_block top_bb
, const_rtx mem
)
2399 basic_block dominator
;
2401 for (dominator
= get_immediate_dominator (CDI_POST_DOMINATORS
, top_bb
);
2403 dominator
= get_immediate_dominator (CDI_POST_DOMINATORS
, dominator
))
2407 FOR_BB_INSNS (dominator
, insn
)
2409 /* If we see something that might be a memory barrier, we
2410 have to stop looking. Even if the MEM is set later in
2411 the function, we still don't want to set it
2412 unconditionally before the barrier. */
2414 && (volatile_insn_p (PATTERN (insn
))
2415 || (CALL_P (insn
) && (!RTL_CONST_CALL_P (insn
)))))
2418 if (memory_modified_in_insn_p (mem
, insn
))
2420 if (modified_in_p (XEXP (mem
, 0), insn
))
2429 /* Given a simple IF-THEN-JOIN or IF-THEN-ELSE-JOIN block, attempt to convert
2430 it without using conditional execution. Return TRUE if we were successful
2431 at converting the block. */
2434 noce_process_if_block (struct noce_if_info
*if_info
)
2436 basic_block test_bb
= if_info
->test_bb
; /* test block */
2437 basic_block then_bb
= if_info
->then_bb
; /* THEN */
2438 basic_block else_bb
= if_info
->else_bb
; /* ELSE or NULL */
2439 basic_block join_bb
= if_info
->join_bb
; /* JOIN */
2440 rtx jump
= if_info
->jump
;
2441 rtx cond
= if_info
->cond
;
2444 rtx orig_x
, x
, a
, b
;
2446 /* We're looking for patterns of the form
2448 (1) if (...) x = a; else x = b;
2449 (2) x = b; if (...) x = a;
2450 (3) if (...) x = a; // as if with an initial x = x.
2452 The later patterns require jumps to be more expensive.
2454 ??? For future expansion, look for multiple X in such patterns. */
2456 /* Look for one of the potential sets. */
2457 insn_a
= first_active_insn (then_bb
);
2459 || insn_a
!= last_active_insn (then_bb
, FALSE
)
2460 || (set_a
= single_set (insn_a
)) == NULL_RTX
)
2463 x
= SET_DEST (set_a
);
2464 a
= SET_SRC (set_a
);
2466 /* Look for the other potential set. Make sure we've got equivalent
2468 /* ??? This is overconservative. Storing to two different mems is
2469 as easy as conditionally computing the address. Storing to a
2470 single mem merely requires a scratch memory to use as one of the
2471 destination addresses; often the memory immediately below the
2472 stack pointer is available for this. */
2476 insn_b
= first_active_insn (else_bb
);
2478 || insn_b
!= last_active_insn (else_bb
, FALSE
)
2479 || (set_b
= single_set (insn_b
)) == NULL_RTX
2480 || ! rtx_equal_p (x
, SET_DEST (set_b
)))
2485 insn_b
= prev_nonnote_nondebug_insn (if_info
->cond_earliest
);
2486 /* We're going to be moving the evaluation of B down from above
2487 COND_EARLIEST to JUMP. Make sure the relevant data is still
2490 || BLOCK_FOR_INSN (insn_b
) != BLOCK_FOR_INSN (if_info
->cond_earliest
)
2491 || !NONJUMP_INSN_P (insn_b
)
2492 || (set_b
= single_set (insn_b
)) == NULL_RTX
2493 || ! rtx_equal_p (x
, SET_DEST (set_b
))
2494 || ! noce_operand_ok (SET_SRC (set_b
))
2495 || reg_overlap_mentioned_p (x
, SET_SRC (set_b
))
2496 || modified_between_p (SET_SRC (set_b
), insn_b
, jump
)
2497 /* Likewise with X. In particular this can happen when
2498 noce_get_condition looks farther back in the instruction
2499 stream than one might expect. */
2500 || reg_overlap_mentioned_p (x
, cond
)
2501 || reg_overlap_mentioned_p (x
, a
)
2502 || modified_between_p (x
, insn_b
, jump
))
2503 insn_b
= set_b
= NULL_RTX
;
2506 /* If x has side effects then only the if-then-else form is safe to
2507 convert. But even in that case we would need to restore any notes
2508 (such as REG_INC) at then end. That can be tricky if
2509 noce_emit_move_insn expands to more than one insn, so disable the
2510 optimization entirely for now if there are side effects. */
2511 if (side_effects_p (x
))
2514 b
= (set_b
? SET_SRC (set_b
) : x
);
2516 /* Only operate on register destinations, and even then avoid extending
2517 the lifetime of hard registers on small register class machines. */
2520 || (HARD_REGISTER_P (x
)
2521 && targetm
.small_register_classes_for_mode_p (GET_MODE (x
))))
2523 if (GET_MODE (x
) == BLKmode
)
2526 if (GET_CODE (x
) == ZERO_EXTRACT
2527 && (!CONST_INT_P (XEXP (x
, 1))
2528 || !CONST_INT_P (XEXP (x
, 2))))
2531 x
= gen_reg_rtx (GET_MODE (GET_CODE (x
) == STRICT_LOW_PART
2532 ? XEXP (x
, 0) : x
));
2535 /* Don't operate on sources that may trap or are volatile. */
2536 if (! noce_operand_ok (a
) || ! noce_operand_ok (b
))
2540 /* Set up the info block for our subroutines. */
2541 if_info
->insn_a
= insn_a
;
2542 if_info
->insn_b
= insn_b
;
2547 /* Try optimizations in some approximation of a useful order. */
2548 /* ??? Should first look to see if X is live incoming at all. If it
2549 isn't, we don't need anything but an unconditional set. */
2551 /* Look and see if A and B are really the same. Avoid creating silly
2552 cmove constructs that no one will fix up later. */
2553 if (rtx_equal_p (a
, b
))
2555 /* If we have an INSN_B, we don't have to create any new rtl. Just
2556 move the instruction that we already have. If we don't have an
2557 INSN_B, that means that A == X, and we've got a noop move. In
2558 that case don't do anything and let the code below delete INSN_A. */
2559 if (insn_b
&& else_bb
)
2563 if (else_bb
&& insn_b
== BB_END (else_bb
))
2564 BB_END (else_bb
) = PREV_INSN (insn_b
);
2565 reorder_insns (insn_b
, insn_b
, PREV_INSN (jump
));
2567 /* If there was a REG_EQUAL note, delete it since it may have been
2568 true due to this insn being after a jump. */
2569 if ((note
= find_reg_note (insn_b
, REG_EQUAL
, NULL_RTX
)) != 0)
2570 remove_note (insn_b
, note
);
2574 /* If we have "x = b; if (...) x = a;", and x has side-effects, then
2575 x must be executed twice. */
2576 else if (insn_b
&& side_effects_p (orig_x
))
2583 if (!set_b
&& MEM_P (orig_x
))
2585 /* Disallow the "if (...) x = a;" form (implicit "else x = x;")
2586 for optimizations if writing to x may trap or fault,
2587 i.e. it's a memory other than a static var or a stack slot,
2588 is misaligned on strict aligned machines or is read-only. If
2589 x is a read-only memory, then the program is valid only if we
2590 avoid the store into it. If there are stores on both the
2591 THEN and ELSE arms, then we can go ahead with the conversion;
2592 either the program is broken, or the condition is always
2593 false such that the other memory is selected. */
2594 if (noce_mem_write_may_trap_or_fault_p (orig_x
))
2597 /* Avoid store speculation: given "if (...) x = a" where x is a
2598 MEM, we only want to do the store if x is always set
2599 somewhere in the function. This avoids cases like
2600 if (pthread_mutex_trylock(mutex))
2602 where we only want global_variable to be changed if the mutex
2603 is held. FIXME: This should ideally be expressed directly in
2605 if (!noce_can_store_speculate_p (test_bb
, orig_x
))
2609 if (noce_try_move (if_info
))
2611 if (noce_try_store_flag (if_info
))
2613 if (noce_try_bitop (if_info
))
2615 if (noce_try_minmax (if_info
))
2617 if (noce_try_abs (if_info
))
2619 if (HAVE_conditional_move
2620 && noce_try_cmove (if_info
))
2622 if (! targetm
.have_conditional_execution ())
2624 if (noce_try_store_flag_constants (if_info
))
2626 if (noce_try_addcc (if_info
))
2628 if (noce_try_store_flag_mask (if_info
))
2630 if (HAVE_conditional_move
2631 && noce_try_cmove_arith (if_info
))
2633 if (noce_try_sign_mask (if_info
))
2637 if (!else_bb
&& set_b
)
2639 insn_b
= set_b
= NULL_RTX
;
2648 /* If we used a temporary, fix it up now. */
2654 noce_emit_move_insn (orig_x
, x
);
2656 set_used_flags (orig_x
);
2657 unshare_all_rtl_in_chain (seq
);
2660 emit_insn_before_setloc (seq
, BB_END (test_bb
), INSN_LOCATOR (insn_a
));
2663 /* The original THEN and ELSE blocks may now be removed. The test block
2664 must now jump to the join block. If the test block and the join block
2665 can be merged, do so. */
2668 delete_basic_block (else_bb
);
2672 remove_edge (find_edge (test_bb
, join_bb
));
2674 remove_edge (find_edge (then_bb
, join_bb
));
2675 redirect_edge_and_branch_force (single_succ_edge (test_bb
), join_bb
);
2676 delete_basic_block (then_bb
);
2679 if (can_merge_blocks_p (test_bb
, join_bb
))
2681 merge_blocks (test_bb
, join_bb
);
2685 num_updated_if_blocks
++;
2689 /* Check whether a block is suitable for conditional move conversion.
2690 Every insn must be a simple set of a register to a constant or a
2691 register. For each assignment, store the value in the array VALS,
2692 indexed by register number, then store the register number in
2693 REGS. COND is the condition we will test. */
2696 check_cond_move_block (basic_block bb
, rtx
*vals
, VEC (int, heap
) **regs
,
2701 /* We can only handle simple jumps at the end of the basic block.
2702 It is almost impossible to update the CFG otherwise. */
2704 if (JUMP_P (insn
) && !onlyjump_p (insn
))
2707 FOR_BB_INSNS (bb
, insn
)
2711 if (!NONDEBUG_INSN_P (insn
) || JUMP_P (insn
))
2713 set
= single_set (insn
);
2717 dest
= SET_DEST (set
);
2718 src
= SET_SRC (set
);
2720 || (HARD_REGISTER_P (dest
)
2721 && targetm
.small_register_classes_for_mode_p (GET_MODE (dest
))))
2724 if (!CONSTANT_P (src
) && !register_operand (src
, VOIDmode
))
2727 if (side_effects_p (src
) || side_effects_p (dest
))
2730 if (may_trap_p (src
) || may_trap_p (dest
))
2733 /* Don't try to handle this if the source register was
2734 modified earlier in the block. */
2736 && vals
[REGNO (src
)] != NULL
)
2737 || (GET_CODE (src
) == SUBREG
&& REG_P (SUBREG_REG (src
))
2738 && vals
[REGNO (SUBREG_REG (src
))] != NULL
))
2741 /* Don't try to handle this if the destination register was
2742 modified earlier in the block. */
2743 if (vals
[REGNO (dest
)] != NULL
)
2746 /* Don't try to handle this if the condition uses the
2747 destination register. */
2748 if (reg_overlap_mentioned_p (dest
, cond
))
2751 /* Don't try to handle this if the source register is modified
2752 later in the block. */
2753 if (!CONSTANT_P (src
)
2754 && modified_between_p (src
, insn
, NEXT_INSN (BB_END (bb
))))
2757 vals
[REGNO (dest
)] = src
;
2759 VEC_safe_push (int, heap
, *regs
, REGNO (dest
));
2765 /* Given a basic block BB suitable for conditional move conversion,
2766 a condition COND, and arrays THEN_VALS and ELSE_VALS containing the
2767 register values depending on COND, emit the insns in the block as
2768 conditional moves. If ELSE_BLOCK is true, THEN_BB was already
2769 processed. The caller has started a sequence for the conversion.
2770 Return true if successful, false if something goes wrong. */
2773 cond_move_convert_if_block (struct noce_if_info
*if_infop
,
2774 basic_block bb
, rtx cond
,
2775 rtx
*then_vals
, rtx
*else_vals
,
2779 rtx insn
, cond_arg0
, cond_arg1
;
2781 code
= GET_CODE (cond
);
2782 cond_arg0
= XEXP (cond
, 0);
2783 cond_arg1
= XEXP (cond
, 1);
2785 FOR_BB_INSNS (bb
, insn
)
2787 rtx set
, target
, dest
, t
, e
;
2790 /* ??? Maybe emit conditional debug insn? */
2791 if (!NONDEBUG_INSN_P (insn
) || JUMP_P (insn
))
2793 set
= single_set (insn
);
2794 gcc_assert (set
&& REG_P (SET_DEST (set
)));
2796 dest
= SET_DEST (set
);
2797 regno
= REGNO (dest
);
2799 t
= then_vals
[regno
];
2800 e
= else_vals
[regno
];
2804 /* If this register was set in the then block, we already
2805 handled this case there. */
2818 target
= noce_emit_cmove (if_infop
, dest
, code
, cond_arg0
, cond_arg1
,
2824 noce_emit_move_insn (dest
, target
);
2830 /* Given a simple IF-THEN-JOIN or IF-THEN-ELSE-JOIN block, attempt to convert
2831 it using only conditional moves. Return TRUE if we were successful at
2832 converting the block. */
2835 cond_move_process_if_block (struct noce_if_info
*if_info
)
2837 basic_block test_bb
= if_info
->test_bb
;
2838 basic_block then_bb
= if_info
->then_bb
;
2839 basic_block else_bb
= if_info
->else_bb
;
2840 basic_block join_bb
= if_info
->join_bb
;
2841 rtx jump
= if_info
->jump
;
2842 rtx cond
= if_info
->cond
;
2844 int max_reg
, size
, c
, reg
;
2847 VEC (int, heap
) *then_regs
= NULL
;
2848 VEC (int, heap
) *else_regs
= NULL
;
2851 /* Build a mapping for each block to the value used for each
2853 max_reg
= max_reg_num ();
2854 size
= (max_reg
+ 1) * sizeof (rtx
);
2855 then_vals
= (rtx
*) alloca (size
);
2856 else_vals
= (rtx
*) alloca (size
);
2857 memset (then_vals
, 0, size
);
2858 memset (else_vals
, 0, size
);
2860 /* Make sure the blocks are suitable. */
2861 if (!check_cond_move_block (then_bb
, then_vals
, &then_regs
, cond
)
2863 && !check_cond_move_block (else_bb
, else_vals
, &else_regs
, cond
)))
2865 VEC_free (int, heap
, then_regs
);
2866 VEC_free (int, heap
, else_regs
);
2870 /* Make sure the blocks can be used together. If the same register
2871 is set in both blocks, and is not set to a constant in both
2872 cases, then both blocks must set it to the same register. We
2873 have already verified that if it is set to a register, that the
2874 source register does not change after the assignment. Also count
2875 the number of registers set in only one of the blocks. */
2877 FOR_EACH_VEC_ELT (int, then_regs
, i
, reg
)
2879 if (!then_vals
[reg
] && !else_vals
[reg
])
2882 if (!else_vals
[reg
])
2886 if (!CONSTANT_P (then_vals
[reg
])
2887 && !CONSTANT_P (else_vals
[reg
])
2888 && !rtx_equal_p (then_vals
[reg
], else_vals
[reg
]))
2890 VEC_free (int, heap
, then_regs
);
2891 VEC_free (int, heap
, else_regs
);
2897 /* Finish off c for MAX_CONDITIONAL_EXECUTE. */
2898 FOR_EACH_VEC_ELT (int, else_regs
, i
, reg
)
2899 if (!then_vals
[reg
])
2902 /* Make sure it is reasonable to convert this block. What matters
2903 is the number of assignments currently made in only one of the
2904 branches, since if we convert we are going to always execute
2906 if (c
> MAX_CONDITIONAL_EXECUTE
)
2908 VEC_free (int, heap
, then_regs
);
2909 VEC_free (int, heap
, else_regs
);
2913 /* Try to emit the conditional moves. First do the then block,
2914 then do anything left in the else blocks. */
2916 if (!cond_move_convert_if_block (if_info
, then_bb
, cond
,
2917 then_vals
, else_vals
, false)
2919 && !cond_move_convert_if_block (if_info
, else_bb
, cond
,
2920 then_vals
, else_vals
, true)))
2923 VEC_free (int, heap
, then_regs
);
2924 VEC_free (int, heap
, else_regs
);
2927 seq
= end_ifcvt_sequence (if_info
);
2930 VEC_free (int, heap
, then_regs
);
2931 VEC_free (int, heap
, else_regs
);
2935 loc_insn
= first_active_insn (then_bb
);
2938 loc_insn
= first_active_insn (else_bb
);
2939 gcc_assert (loc_insn
);
2941 emit_insn_before_setloc (seq
, jump
, INSN_LOCATOR (loc_insn
));
2945 delete_basic_block (else_bb
);
2949 remove_edge (find_edge (test_bb
, join_bb
));
2951 remove_edge (find_edge (then_bb
, join_bb
));
2952 redirect_edge_and_branch_force (single_succ_edge (test_bb
), join_bb
);
2953 delete_basic_block (then_bb
);
2956 if (can_merge_blocks_p (test_bb
, join_bb
))
2958 merge_blocks (test_bb
, join_bb
);
2962 num_updated_if_blocks
++;
2964 VEC_free (int, heap
, then_regs
);
2965 VEC_free (int, heap
, else_regs
);
2970 /* Determine if a given basic block heads a simple IF-THEN-JOIN or an
2971 IF-THEN-ELSE-JOIN block.
2973 If so, we'll try to convert the insns to not require the branch,
2974 using only transformations that do not require conditional execution.
2976 Return TRUE if we were successful at converting the block. */
2979 noce_find_if_block (basic_block test_bb
, edge then_edge
, edge else_edge
,
2982 basic_block then_bb
, else_bb
, join_bb
;
2983 bool then_else_reversed
= false;
2986 struct noce_if_info if_info
;
2988 /* We only ever should get here before reload. */
2989 gcc_assert (!reload_completed
);
2991 /* Recognize an IF-THEN-ELSE-JOIN block. */
2992 if (single_pred_p (then_edge
->dest
)
2993 && single_succ_p (then_edge
->dest
)
2994 && single_pred_p (else_edge
->dest
)
2995 && single_succ_p (else_edge
->dest
)
2996 && single_succ (then_edge
->dest
) == single_succ (else_edge
->dest
))
2998 then_bb
= then_edge
->dest
;
2999 else_bb
= else_edge
->dest
;
3000 join_bb
= single_succ (then_bb
);
3002 /* Recognize an IF-THEN-JOIN block. */
3003 else if (single_pred_p (then_edge
->dest
)
3004 && single_succ_p (then_edge
->dest
)
3005 && single_succ (then_edge
->dest
) == else_edge
->dest
)
3007 then_bb
= then_edge
->dest
;
3008 else_bb
= NULL_BLOCK
;
3009 join_bb
= else_edge
->dest
;
3011 /* Recognize an IF-ELSE-JOIN block. We can have those because the order
3012 of basic blocks in cfglayout mode does not matter, so the fallthrough
3013 edge can go to any basic block (and not just to bb->next_bb, like in
3015 else if (single_pred_p (else_edge
->dest
)
3016 && single_succ_p (else_edge
->dest
)
3017 && single_succ (else_edge
->dest
) == then_edge
->dest
)
3019 /* The noce transformations do not apply to IF-ELSE-JOIN blocks.
3020 To make this work, we have to invert the THEN and ELSE blocks
3021 and reverse the jump condition. */
3022 then_bb
= else_edge
->dest
;
3023 else_bb
= NULL_BLOCK
;
3024 join_bb
= single_succ (then_bb
);
3025 then_else_reversed
= true;
3028 /* Not a form we can handle. */
3031 /* The edges of the THEN and ELSE blocks cannot have complex edges. */
3032 if (single_succ_edge (then_bb
)->flags
& EDGE_COMPLEX
)
3035 && single_succ_edge (else_bb
)->flags
& EDGE_COMPLEX
)
3038 num_possible_if_blocks
++;
3043 "\nIF-THEN%s-JOIN block found, pass %d, test %d, then %d",
3044 (else_bb
) ? "-ELSE" : "",
3045 pass
, test_bb
->index
, then_bb
->index
);
3048 fprintf (dump_file
, ", else %d", else_bb
->index
);
3050 fprintf (dump_file
, ", join %d\n", join_bb
->index
);
3053 /* If the conditional jump is more than just a conditional
3054 jump, then we can not do if-conversion on this block. */
3055 jump
= BB_END (test_bb
);
3056 if (! onlyjump_p (jump
))
3059 /* If this is not a standard conditional jump, we can't parse it. */
3060 cond
= noce_get_condition (jump
, &cond_earliest
, then_else_reversed
);
3064 /* We must be comparing objects whose modes imply the size. */
3065 if (GET_MODE (XEXP (cond
, 0)) == BLKmode
)
3068 /* Initialize an IF_INFO struct to pass around. */
3069 memset (&if_info
, 0, sizeof if_info
);
3070 if_info
.test_bb
= test_bb
;
3071 if_info
.then_bb
= then_bb
;
3072 if_info
.else_bb
= else_bb
;
3073 if_info
.join_bb
= join_bb
;
3074 if_info
.cond
= cond
;
3075 if_info
.cond_earliest
= cond_earliest
;
3076 if_info
.jump
= jump
;
3077 if_info
.then_else_reversed
= then_else_reversed
;
3078 if_info
.branch_cost
= BRANCH_COST (optimize_bb_for_speed_p (test_bb
),
3079 predictable_edge_p (then_edge
));
3081 /* Do the real work. */
3083 if (noce_process_if_block (&if_info
))
3086 if (HAVE_conditional_move
3087 && cond_move_process_if_block (&if_info
))
3094 /* Merge the blocks and mark for local life update. */
3097 merge_if_block (struct ce_if_block
* ce_info
)
3099 basic_block test_bb
= ce_info
->test_bb
; /* last test block */
3100 basic_block then_bb
= ce_info
->then_bb
; /* THEN */
3101 basic_block else_bb
= ce_info
->else_bb
; /* ELSE or NULL */
3102 basic_block join_bb
= ce_info
->join_bb
; /* join block */
3103 basic_block combo_bb
;
3105 /* All block merging is done into the lower block numbers. */
3108 df_set_bb_dirty (test_bb
);
3110 /* Merge any basic blocks to handle && and || subtests. Each of
3111 the blocks are on the fallthru path from the predecessor block. */
3112 if (ce_info
->num_multiple_test_blocks
> 0)
3114 basic_block bb
= test_bb
;
3115 basic_block last_test_bb
= ce_info
->last_test_bb
;
3116 basic_block fallthru
= block_fallthru (bb
);
3121 fallthru
= block_fallthru (bb
);
3122 merge_blocks (combo_bb
, bb
);
3125 while (bb
!= last_test_bb
);
3128 /* Merge TEST block into THEN block. Normally the THEN block won't have a
3129 label, but it might if there were || tests. That label's count should be
3130 zero, and it normally should be removed. */
3134 merge_blocks (combo_bb
, then_bb
);
3138 /* The ELSE block, if it existed, had a label. That label count
3139 will almost always be zero, but odd things can happen when labels
3140 get their addresses taken. */
3143 merge_blocks (combo_bb
, else_bb
);
3147 /* If there was no join block reported, that means it was not adjacent
3148 to the others, and so we cannot merge them. */
3152 rtx last
= BB_END (combo_bb
);
3154 /* The outgoing edge for the current COMBO block should already
3155 be correct. Verify this. */
3156 if (EDGE_COUNT (combo_bb
->succs
) == 0)
3157 gcc_assert (find_reg_note (last
, REG_NORETURN
, NULL
)
3158 || (NONJUMP_INSN_P (last
)
3159 && GET_CODE (PATTERN (last
)) == TRAP_IF
3160 && (TRAP_CONDITION (PATTERN (last
))
3161 == const_true_rtx
)));
3164 /* There should still be something at the end of the THEN or ELSE
3165 blocks taking us to our final destination. */
3166 gcc_assert (JUMP_P (last
)
3167 || (EDGE_SUCC (combo_bb
, 0)->dest
== EXIT_BLOCK_PTR
3169 && SIBLING_CALL_P (last
))
3170 || ((EDGE_SUCC (combo_bb
, 0)->flags
& EDGE_EH
)
3171 && can_throw_internal (last
)));
3174 /* The JOIN block may have had quite a number of other predecessors too.
3175 Since we've already merged the TEST, THEN and ELSE blocks, we should
3176 have only one remaining edge from our if-then-else diamond. If there
3177 is more than one remaining edge, it must come from elsewhere. There
3178 may be zero incoming edges if the THEN block didn't actually join
3179 back up (as with a call to a non-return function). */
3180 else if (EDGE_COUNT (join_bb
->preds
) < 2
3181 && join_bb
!= EXIT_BLOCK_PTR
)
3183 /* We can merge the JOIN cleanly and update the dataflow try
3184 again on this pass.*/
3185 merge_blocks (combo_bb
, join_bb
);
3190 /* We cannot merge the JOIN. */
3192 /* The outgoing edge for the current COMBO block should already
3193 be correct. Verify this. */
3194 gcc_assert (single_succ_p (combo_bb
)
3195 && single_succ (combo_bb
) == join_bb
);
3197 /* Remove the jump and cruft from the end of the COMBO block. */
3198 if (join_bb
!= EXIT_BLOCK_PTR
)
3199 tidy_fallthru_edge (single_succ_edge (combo_bb
));
3202 num_updated_if_blocks
++;
3205 /* Find a block ending in a simple IF condition and try to transform it
3206 in some way. When converting a multi-block condition, put the new code
3207 in the first such block and delete the rest. Return a pointer to this
3208 first block if some transformation was done. Return NULL otherwise. */
3211 find_if_header (basic_block test_bb
, int pass
)
3213 ce_if_block_t ce_info
;
3217 /* The kind of block we're looking for has exactly two successors. */
3218 if (EDGE_COUNT (test_bb
->succs
) != 2)
3221 then_edge
= EDGE_SUCC (test_bb
, 0);
3222 else_edge
= EDGE_SUCC (test_bb
, 1);
3224 if (df_get_bb_dirty (then_edge
->dest
))
3226 if (df_get_bb_dirty (else_edge
->dest
))
3229 /* Neither edge should be abnormal. */
3230 if ((then_edge
->flags
& EDGE_COMPLEX
)
3231 || (else_edge
->flags
& EDGE_COMPLEX
))
3234 /* Nor exit the loop. */
3235 if ((then_edge
->flags
& EDGE_LOOP_EXIT
)
3236 || (else_edge
->flags
& EDGE_LOOP_EXIT
))
3239 /* The THEN edge is canonically the one that falls through. */
3240 if (then_edge
->flags
& EDGE_FALLTHRU
)
3242 else if (else_edge
->flags
& EDGE_FALLTHRU
)
3245 else_edge
= then_edge
;
3249 /* Otherwise this must be a multiway branch of some sort. */
3252 memset (&ce_info
, 0, sizeof (ce_info
));
3253 ce_info
.test_bb
= test_bb
;
3254 ce_info
.then_bb
= then_edge
->dest
;
3255 ce_info
.else_bb
= else_edge
->dest
;
3256 ce_info
.pass
= pass
;
3258 #ifdef IFCVT_INIT_EXTRA_FIELDS
3259 IFCVT_INIT_EXTRA_FIELDS (&ce_info
);
3262 if (!reload_completed
3263 && noce_find_if_block (test_bb
, then_edge
, else_edge
, pass
))
3266 if (reload_completed
3267 && targetm
.have_conditional_execution ()
3268 && cond_exec_find_if_block (&ce_info
))
3272 && optab_handler (ctrap_optab
, word_mode
) != CODE_FOR_nothing
3273 && find_cond_trap (test_bb
, then_edge
, else_edge
))
3276 if (dom_info_state (CDI_POST_DOMINATORS
) >= DOM_NO_FAST_QUERY
3277 && (reload_completed
|| !targetm
.have_conditional_execution ()))
3279 if (find_if_case_1 (test_bb
, then_edge
, else_edge
))
3281 if (find_if_case_2 (test_bb
, then_edge
, else_edge
))
3289 fprintf (dump_file
, "Conversion succeeded on pass %d.\n", pass
);
3290 /* Set this so we continue looking. */
3291 cond_exec_changed_p
= TRUE
;
3292 return ce_info
.test_bb
;
3295 /* Return true if a block has two edges, one of which falls through to the next
3296 block, and the other jumps to a specific block, so that we can tell if the
3297 block is part of an && test or an || test. Returns either -1 or the number
3298 of non-note, non-jump, non-USE/CLOBBER insns in the block. */
3301 block_jumps_and_fallthru_p (basic_block cur_bb
, basic_block target_bb
)
3304 int fallthru_p
= FALSE
;
3311 if (!cur_bb
|| !target_bb
)
3314 /* If no edges, obviously it doesn't jump or fallthru. */
3315 if (EDGE_COUNT (cur_bb
->succs
) == 0)
3318 FOR_EACH_EDGE (cur_edge
, ei
, cur_bb
->succs
)
3320 if (cur_edge
->flags
& EDGE_COMPLEX
)
3321 /* Anything complex isn't what we want. */
3324 else if (cur_edge
->flags
& EDGE_FALLTHRU
)
3327 else if (cur_edge
->dest
== target_bb
)
3334 if ((jump_p
& fallthru_p
) == 0)
3337 /* Don't allow calls in the block, since this is used to group && and ||
3338 together for conditional execution support. ??? we should support
3339 conditional execution support across calls for IA-64 some day, but
3340 for now it makes the code simpler. */
3341 end
= BB_END (cur_bb
);
3342 insn
= BB_HEAD (cur_bb
);
3344 while (insn
!= NULL_RTX
)
3351 && !DEBUG_INSN_P (insn
)
3352 && GET_CODE (PATTERN (insn
)) != USE
3353 && GET_CODE (PATTERN (insn
)) != CLOBBER
)
3359 insn
= NEXT_INSN (insn
);
3365 /* Determine if a given basic block heads a simple IF-THEN or IF-THEN-ELSE
3366 block. If so, we'll try to convert the insns to not require the branch.
3367 Return TRUE if we were successful at converting the block. */
3370 cond_exec_find_if_block (struct ce_if_block
* ce_info
)
3372 basic_block test_bb
= ce_info
->test_bb
;
3373 basic_block then_bb
= ce_info
->then_bb
;
3374 basic_block else_bb
= ce_info
->else_bb
;
3375 basic_block join_bb
= NULL_BLOCK
;
3380 ce_info
->last_test_bb
= test_bb
;
3382 /* We only ever should get here after reload,
3383 and if we have conditional execution. */
3384 gcc_assert (reload_completed
&& targetm
.have_conditional_execution ());
3386 /* Discover if any fall through predecessors of the current test basic block
3387 were && tests (which jump to the else block) or || tests (which jump to
3389 if (single_pred_p (test_bb
)
3390 && single_pred_edge (test_bb
)->flags
== EDGE_FALLTHRU
)
3392 basic_block bb
= single_pred (test_bb
);
3393 basic_block target_bb
;
3394 int max_insns
= MAX_CONDITIONAL_EXECUTE
;
3397 /* Determine if the preceding block is an && or || block. */
3398 if ((n_insns
= block_jumps_and_fallthru_p (bb
, else_bb
)) >= 0)
3400 ce_info
->and_and_p
= TRUE
;
3401 target_bb
= else_bb
;
3403 else if ((n_insns
= block_jumps_and_fallthru_p (bb
, then_bb
)) >= 0)
3405 ce_info
->and_and_p
= FALSE
;
3406 target_bb
= then_bb
;
3409 target_bb
= NULL_BLOCK
;
3411 if (target_bb
&& n_insns
<= max_insns
)
3413 int total_insns
= 0;
3416 ce_info
->last_test_bb
= test_bb
;
3418 /* Found at least one && or || block, look for more. */
3421 ce_info
->test_bb
= test_bb
= bb
;
3422 total_insns
+= n_insns
;
3425 if (!single_pred_p (bb
))
3428 bb
= single_pred (bb
);
3429 n_insns
= block_jumps_and_fallthru_p (bb
, target_bb
);
3431 while (n_insns
>= 0 && (total_insns
+ n_insns
) <= max_insns
);
3433 ce_info
->num_multiple_test_blocks
= blocks
;
3434 ce_info
->num_multiple_test_insns
= total_insns
;
3436 if (ce_info
->and_and_p
)
3437 ce_info
->num_and_and_blocks
= blocks
;
3439 ce_info
->num_or_or_blocks
= blocks
;
3443 /* The THEN block of an IF-THEN combo must have exactly one predecessor,
3444 other than any || blocks which jump to the THEN block. */
3445 if ((EDGE_COUNT (then_bb
->preds
) - ce_info
->num_or_or_blocks
) != 1)
3448 /* The edges of the THEN and ELSE blocks cannot have complex edges. */
3449 FOR_EACH_EDGE (cur_edge
, ei
, then_bb
->preds
)
3451 if (cur_edge
->flags
& EDGE_COMPLEX
)
3455 FOR_EACH_EDGE (cur_edge
, ei
, else_bb
->preds
)
3457 if (cur_edge
->flags
& EDGE_COMPLEX
)
3461 /* The THEN block of an IF-THEN combo must have zero or one successors. */
3462 if (EDGE_COUNT (then_bb
->succs
) > 0
3463 && (!single_succ_p (then_bb
)
3464 || (single_succ_edge (then_bb
)->flags
& EDGE_COMPLEX
)
3465 || (epilogue_completed
3466 && tablejump_p (BB_END (then_bb
), NULL
, NULL
))))
3469 /* If the THEN block has no successors, conditional execution can still
3470 make a conditional call. Don't do this unless the ELSE block has
3471 only one incoming edge -- the CFG manipulation is too ugly otherwise.
3472 Check for the last insn of the THEN block being an indirect jump, which
3473 is listed as not having any successors, but confuses the rest of the CE
3474 code processing. ??? we should fix this in the future. */
3475 if (EDGE_COUNT (then_bb
->succs
) == 0)
3477 if (single_pred_p (else_bb
))
3479 rtx last_insn
= BB_END (then_bb
);
3482 && NOTE_P (last_insn
)
3483 && last_insn
!= BB_HEAD (then_bb
))
3484 last_insn
= PREV_INSN (last_insn
);
3487 && JUMP_P (last_insn
)
3488 && ! simplejump_p (last_insn
))
3492 else_bb
= NULL_BLOCK
;
3498 /* If the THEN block's successor is the other edge out of the TEST block,
3499 then we have an IF-THEN combo without an ELSE. */
3500 else if (single_succ (then_bb
) == else_bb
)
3503 else_bb
= NULL_BLOCK
;
3506 /* If the THEN and ELSE block meet in a subsequent block, and the ELSE
3507 has exactly one predecessor and one successor, and the outgoing edge
3508 is not complex, then we have an IF-THEN-ELSE combo. */
3509 else if (single_succ_p (else_bb
)
3510 && single_succ (then_bb
) == single_succ (else_bb
)
3511 && single_pred_p (else_bb
)
3512 && !(single_succ_edge (else_bb
)->flags
& EDGE_COMPLEX
)
3513 && !(epilogue_completed
3514 && tablejump_p (BB_END (else_bb
), NULL
, NULL
)))
3515 join_bb
= single_succ (else_bb
);
3517 /* Otherwise it is not an IF-THEN or IF-THEN-ELSE combination. */
3521 num_possible_if_blocks
++;
3526 "\nIF-THEN%s block found, pass %d, start block %d "
3527 "[insn %d], then %d [%d]",
3528 (else_bb
) ? "-ELSE" : "",
3531 BB_HEAD (test_bb
) ? (int)INSN_UID (BB_HEAD (test_bb
)) : -1,
3533 BB_HEAD (then_bb
) ? (int)INSN_UID (BB_HEAD (then_bb
)) : -1);
3536 fprintf (dump_file
, ", else %d [%d]",
3538 BB_HEAD (else_bb
) ? (int)INSN_UID (BB_HEAD (else_bb
)) : -1);
3540 fprintf (dump_file
, ", join %d [%d]",
3542 BB_HEAD (join_bb
) ? (int)INSN_UID (BB_HEAD (join_bb
)) : -1);
3544 if (ce_info
->num_multiple_test_blocks
> 0)
3545 fprintf (dump_file
, ", %d %s block%s last test %d [%d]",
3546 ce_info
->num_multiple_test_blocks
,
3547 (ce_info
->and_and_p
) ? "&&" : "||",
3548 (ce_info
->num_multiple_test_blocks
== 1) ? "" : "s",
3549 ce_info
->last_test_bb
->index
,
3550 ((BB_HEAD (ce_info
->last_test_bb
))
3551 ? (int)INSN_UID (BB_HEAD (ce_info
->last_test_bb
))
3554 fputc ('\n', dump_file
);
3557 /* Make sure IF, THEN, and ELSE, blocks are adjacent. Actually, we get the
3558 first condition for free, since we've already asserted that there's a
3559 fallthru edge from IF to THEN. Likewise for the && and || blocks, since
3560 we checked the FALLTHRU flag, those are already adjacent to the last IF
3562 /* ??? As an enhancement, move the ELSE block. Have to deal with
3563 BLOCK notes, if by no other means than backing out the merge if they
3564 exist. Sticky enough I don't want to think about it now. */
3566 if (else_bb
&& (next
= next
->next_bb
) != else_bb
)
3568 if ((next
= next
->next_bb
) != join_bb
&& join_bb
!= EXIT_BLOCK_PTR
)
3576 /* Do the real work. */
3578 ce_info
->else_bb
= else_bb
;
3579 ce_info
->join_bb
= join_bb
;
3581 /* If we have && and || tests, try to first handle combining the && and ||
3582 tests into the conditional code, and if that fails, go back and handle
3583 it without the && and ||, which at present handles the && case if there
3584 was no ELSE block. */
3585 if (cond_exec_process_if_block (ce_info
, TRUE
))
3588 if (ce_info
->num_multiple_test_blocks
)
3592 if (cond_exec_process_if_block (ce_info
, FALSE
))
3599 /* Convert a branch over a trap, or a branch
3600 to a trap, into a conditional trap. */
3603 find_cond_trap (basic_block test_bb
, edge then_edge
, edge else_edge
)
3605 basic_block then_bb
= then_edge
->dest
;
3606 basic_block else_bb
= else_edge
->dest
;
3607 basic_block other_bb
, trap_bb
;
3608 rtx trap
, jump
, cond
, cond_earliest
, seq
;
3611 /* Locate the block with the trap instruction. */
3612 /* ??? While we look for no successors, we really ought to allow
3613 EH successors. Need to fix merge_if_block for that to work. */
3614 if ((trap
= block_has_only_trap (then_bb
)) != NULL
)
3615 trap_bb
= then_bb
, other_bb
= else_bb
;
3616 else if ((trap
= block_has_only_trap (else_bb
)) != NULL
)
3617 trap_bb
= else_bb
, other_bb
= then_bb
;
3623 fprintf (dump_file
, "\nTRAP-IF block found, start %d, trap %d\n",
3624 test_bb
->index
, trap_bb
->index
);
3627 /* If this is not a standard conditional jump, we can't parse it. */
3628 jump
= BB_END (test_bb
);
3629 cond
= noce_get_condition (jump
, &cond_earliest
, false);
3633 /* If the conditional jump is more than just a conditional jump, then
3634 we can not do if-conversion on this block. */
3635 if (! onlyjump_p (jump
))
3638 /* We must be comparing objects whose modes imply the size. */
3639 if (GET_MODE (XEXP (cond
, 0)) == BLKmode
)
3642 /* Reverse the comparison code, if necessary. */
3643 code
= GET_CODE (cond
);
3644 if (then_bb
== trap_bb
)
3646 code
= reversed_comparison_code (cond
, jump
);
3647 if (code
== UNKNOWN
)
3651 /* Attempt to generate the conditional trap. */
3652 seq
= gen_cond_trap (code
, copy_rtx (XEXP (cond
, 0)),
3653 copy_rtx (XEXP (cond
, 1)),
3654 TRAP_CODE (PATTERN (trap
)));
3658 /* Emit the new insns before cond_earliest. */
3659 emit_insn_before_setloc (seq
, cond_earliest
, INSN_LOCATOR (trap
));
3661 /* Delete the trap block if possible. */
3662 remove_edge (trap_bb
== then_bb
? then_edge
: else_edge
);
3663 df_set_bb_dirty (test_bb
);
3664 df_set_bb_dirty (then_bb
);
3665 df_set_bb_dirty (else_bb
);
3667 if (EDGE_COUNT (trap_bb
->preds
) == 0)
3669 delete_basic_block (trap_bb
);
3673 /* Wire together the blocks again. */
3674 if (current_ir_type () == IR_RTL_CFGLAYOUT
)
3675 single_succ_edge (test_bb
)->flags
|= EDGE_FALLTHRU
;
3680 lab
= JUMP_LABEL (jump
);
3681 newjump
= emit_jump_insn_after (gen_jump (lab
), jump
);
3682 LABEL_NUSES (lab
) += 1;
3683 JUMP_LABEL (newjump
) = lab
;
3684 emit_barrier_after (newjump
);
3688 if (can_merge_blocks_p (test_bb
, other_bb
))
3690 merge_blocks (test_bb
, other_bb
);
3694 num_updated_if_blocks
++;
3698 /* Subroutine of find_cond_trap: if BB contains only a trap insn,
3702 block_has_only_trap (basic_block bb
)
3706 /* We're not the exit block. */
3707 if (bb
== EXIT_BLOCK_PTR
)
3710 /* The block must have no successors. */
3711 if (EDGE_COUNT (bb
->succs
) > 0)
3714 /* The only instruction in the THEN block must be the trap. */
3715 trap
= first_active_insn (bb
);
3716 if (! (trap
== BB_END (bb
)
3717 && GET_CODE (PATTERN (trap
)) == TRAP_IF
3718 && TRAP_CONDITION (PATTERN (trap
)) == const_true_rtx
))
3724 /* Look for IF-THEN-ELSE cases in which one of THEN or ELSE is
3725 transformable, but not necessarily the other. There need be no
3728 Return TRUE if we were successful at converting the block.
3730 Cases we'd like to look at:
3733 if (test) goto over; // x not live
3741 if (! test) goto label;
3744 if (test) goto E; // x not live
3758 (3) // This one's really only interesting for targets that can do
3759 // multiway branching, e.g. IA-64 BBB bundles. For other targets
3760 // it results in multiple branches on a cache line, which often
3761 // does not sit well with predictors.
3763 if (test1) goto E; // predicted not taken
3779 (A) Don't do (2) if the branch is predicted against the block we're
3780 eliminating. Do it anyway if we can eliminate a branch; this requires
3781 that the sole successor of the eliminated block postdominate the other
3784 (B) With CE, on (3) we can steal from both sides of the if, creating
3793 Again, this is most useful if J postdominates.
3795 (C) CE substitutes for helpful life information.
3797 (D) These heuristics need a lot of work. */
3799 /* Tests for case 1 above. */
3802 find_if_case_1 (basic_block test_bb
, edge then_edge
, edge else_edge
)
3804 basic_block then_bb
= then_edge
->dest
;
3805 basic_block else_bb
= else_edge
->dest
;
3807 int then_bb_index
, then_prob
;
3808 rtx else_target
= NULL_RTX
;
3810 /* If we are partitioning hot/cold basic blocks, we don't want to
3811 mess up unconditional or indirect jumps that cross between hot
3814 Basic block partitioning may result in some jumps that appear to
3815 be optimizable (or blocks that appear to be mergeable), but which really
3816 must be left untouched (they are required to make it safely across
3817 partition boundaries). See the comments at the top of
3818 bb-reorder.c:partition_hot_cold_basic_blocks for complete details. */
3820 if ((BB_END (then_bb
)
3821 && find_reg_note (BB_END (then_bb
), REG_CROSSING_JUMP
, NULL_RTX
))
3822 || (BB_END (test_bb
)
3823 && find_reg_note (BB_END (test_bb
), REG_CROSSING_JUMP
, NULL_RTX
))
3824 || (BB_END (else_bb
)
3825 && find_reg_note (BB_END (else_bb
), REG_CROSSING_JUMP
,
3829 /* THEN has one successor. */
3830 if (!single_succ_p (then_bb
))
3833 /* THEN does not fall through, but is not strange either. */
3834 if (single_succ_edge (then_bb
)->flags
& (EDGE_COMPLEX
| EDGE_FALLTHRU
))
3837 /* THEN has one predecessor. */
3838 if (!single_pred_p (then_bb
))
3841 /* THEN must do something. */
3842 if (forwarder_block_p (then_bb
))
3845 num_possible_if_blocks
++;
3848 "\nIF-CASE-1 found, start %d, then %d\n",
3849 test_bb
->index
, then_bb
->index
);
3851 if (then_edge
->probability
)
3852 then_prob
= REG_BR_PROB_BASE
- then_edge
->probability
;
3854 then_prob
= REG_BR_PROB_BASE
/ 2;
3856 /* We're speculating from the THEN path, we want to make sure the cost
3857 of speculation is within reason. */
3858 if (! cheap_bb_rtx_cost_p (then_bb
, then_prob
,
3859 COSTS_N_INSNS (BRANCH_COST (optimize_bb_for_speed_p (then_edge
->src
),
3860 predictable_edge_p (then_edge
)))))
3863 if (else_bb
== EXIT_BLOCK_PTR
)
3865 rtx jump
= BB_END (else_edge
->src
);
3866 gcc_assert (JUMP_P (jump
));
3867 else_target
= JUMP_LABEL (jump
);
3870 /* Registers set are dead, or are predicable. */
3871 if (! dead_or_predicable (test_bb
, then_bb
, else_bb
,
3872 single_succ_edge (then_bb
), 1))
3875 /* Conversion went ok, including moving the insns and fixing up the
3876 jump. Adjust the CFG to match. */
3878 /* We can avoid creating a new basic block if then_bb is immediately
3879 followed by else_bb, i.e. deleting then_bb allows test_bb to fall
3882 if (then_bb
->next_bb
== else_bb
3883 && then_bb
->prev_bb
== test_bb
3884 && else_bb
!= EXIT_BLOCK_PTR
)
3886 redirect_edge_succ (FALLTHRU_EDGE (test_bb
), else_bb
);
3889 else if (else_bb
== EXIT_BLOCK_PTR
)
3890 new_bb
= force_nonfallthru_and_redirect (FALLTHRU_EDGE (test_bb
),
3891 else_bb
, else_target
);
3893 new_bb
= redirect_edge_and_branch_force (FALLTHRU_EDGE (test_bb
),
3896 df_set_bb_dirty (test_bb
);
3897 df_set_bb_dirty (else_bb
);
3899 then_bb_index
= then_bb
->index
;
3900 delete_basic_block (then_bb
);
3902 /* Make rest of code believe that the newly created block is the THEN_BB
3903 block we removed. */
3906 df_bb_replace (then_bb_index
, new_bb
);
3907 /* Since the fallthru edge was redirected from test_bb to new_bb,
3908 we need to ensure that new_bb is in the same partition as
3909 test bb (you can not fall through across section boundaries). */
3910 BB_COPY_PARTITION (new_bb
, test_bb
);
3914 num_updated_if_blocks
++;
3919 /* Test for case 2 above. */
3922 find_if_case_2 (basic_block test_bb
, edge then_edge
, edge else_edge
)
3924 basic_block then_bb
= then_edge
->dest
;
3925 basic_block else_bb
= else_edge
->dest
;
3927 int then_prob
, else_prob
;
3929 /* We do not want to speculate (empty) loop latches. */
3931 && else_bb
->loop_father
->latch
== else_bb
)
3934 /* If we are partitioning hot/cold basic blocks, we don't want to
3935 mess up unconditional or indirect jumps that cross between hot
3938 Basic block partitioning may result in some jumps that appear to
3939 be optimizable (or blocks that appear to be mergeable), but which really
3940 must be left untouched (they are required to make it safely across
3941 partition boundaries). See the comments at the top of
3942 bb-reorder.c:partition_hot_cold_basic_blocks for complete details. */
3944 if ((BB_END (then_bb
)
3945 && find_reg_note (BB_END (then_bb
), REG_CROSSING_JUMP
, NULL_RTX
))
3946 || (BB_END (test_bb
)
3947 && find_reg_note (BB_END (test_bb
), REG_CROSSING_JUMP
, NULL_RTX
))
3948 || (BB_END (else_bb
)
3949 && find_reg_note (BB_END (else_bb
), REG_CROSSING_JUMP
,
3953 /* ELSE has one successor. */
3954 if (!single_succ_p (else_bb
))
3957 else_succ
= single_succ_edge (else_bb
);
3959 /* ELSE outgoing edge is not complex. */
3960 if (else_succ
->flags
& EDGE_COMPLEX
)
3963 /* ELSE has one predecessor. */
3964 if (!single_pred_p (else_bb
))
3967 /* THEN is not EXIT. */
3968 if (then_bb
->index
< NUM_FIXED_BLOCKS
)
3971 if (else_edge
->probability
)
3973 else_prob
= else_edge
->probability
;
3974 then_prob
= REG_BR_PROB_BASE
- else_prob
;
3978 else_prob
= REG_BR_PROB_BASE
/ 2;
3979 then_prob
= REG_BR_PROB_BASE
/ 2;
3982 /* ELSE is predicted or SUCC(ELSE) postdominates THEN. */
3983 if (else_prob
> then_prob
)
3985 else if (else_succ
->dest
->index
< NUM_FIXED_BLOCKS
3986 || dominated_by_p (CDI_POST_DOMINATORS
, then_bb
,
3992 num_possible_if_blocks
++;
3995 "\nIF-CASE-2 found, start %d, else %d\n",
3996 test_bb
->index
, else_bb
->index
);
3998 /* We're speculating from the ELSE path, we want to make sure the cost
3999 of speculation is within reason. */
4000 if (! cheap_bb_rtx_cost_p (else_bb
, else_prob
,
4001 COSTS_N_INSNS (BRANCH_COST (optimize_bb_for_speed_p (else_edge
->src
),
4002 predictable_edge_p (else_edge
)))))
4005 /* Registers set are dead, or are predicable. */
4006 if (! dead_or_predicable (test_bb
, else_bb
, then_bb
, else_succ
, 0))
4009 /* Conversion went ok, including moving the insns and fixing up the
4010 jump. Adjust the CFG to match. */
4012 df_set_bb_dirty (test_bb
);
4013 df_set_bb_dirty (then_bb
);
4014 delete_basic_block (else_bb
);
4017 num_updated_if_blocks
++;
4019 /* ??? We may now fallthru from one of THEN's successors into a join
4020 block. Rerun cleanup_cfg? Examine things manually? Wait? */
4025 /* Used by the code above to perform the actual rtl transformations.
4026 Return TRUE if successful.
4028 TEST_BB is the block containing the conditional branch. MERGE_BB
4029 is the block containing the code to manipulate. DEST_EDGE is an
4030 edge representing a jump to the join block; after the conversion,
4031 TEST_BB should be branching to its destination.
4032 REVERSEP is true if the sense of the branch should be reversed. */
4035 dead_or_predicable (basic_block test_bb
, basic_block merge_bb
,
4036 basic_block other_bb
, edge dest_edge
, int reversep
)
4038 basic_block new_dest
= dest_edge
->dest
;
4039 rtx head
, end
, jump
, earliest
= NULL_RTX
, old_dest
;
4040 bitmap merge_set
= NULL
;
4041 /* Number of pending changes. */
4042 int n_validated_changes
= 0;
4043 rtx new_dest_label
= NULL_RTX
;
4045 jump
= BB_END (test_bb
);
4047 /* Find the extent of the real code in the merge block. */
4048 head
= BB_HEAD (merge_bb
);
4049 end
= BB_END (merge_bb
);
4051 while (DEBUG_INSN_P (end
) && end
!= head
)
4052 end
= PREV_INSN (end
);
4054 /* If merge_bb ends with a tablejump, predicating/moving insn's
4055 into test_bb and then deleting merge_bb will result in the jumptable
4056 that follows merge_bb being removed along with merge_bb and then we
4057 get an unresolved reference to the jumptable. */
4058 if (tablejump_p (end
, NULL
, NULL
))
4062 head
= NEXT_INSN (head
);
4063 while (DEBUG_INSN_P (head
) && head
!= end
)
4064 head
= NEXT_INSN (head
);
4069 head
= end
= NULL_RTX
;
4072 head
= NEXT_INSN (head
);
4073 while (DEBUG_INSN_P (head
) && head
!= end
)
4074 head
= NEXT_INSN (head
);
4081 head
= end
= NULL_RTX
;
4084 end
= PREV_INSN (end
);
4085 while (DEBUG_INSN_P (end
) && end
!= head
)
4086 end
= PREV_INSN (end
);
4089 /* Disable handling dead code by conditional execution if the machine needs
4090 to do anything funny with the tests, etc. */
4091 #ifndef IFCVT_MODIFY_TESTS
4092 if (targetm
.have_conditional_execution ())
4094 /* In the conditional execution case, we have things easy. We know
4095 the condition is reversible. We don't have to check life info
4096 because we're going to conditionally execute the code anyway.
4097 All that's left is making sure the insns involved can actually
4102 cond
= cond_exec_get_condition (jump
);
4106 prob_val
= find_reg_note (jump
, REG_BR_PROB
, NULL_RTX
);
4108 prob_val
= XEXP (prob_val
, 0);
4112 enum rtx_code rev
= reversed_comparison_code (cond
, jump
);
4115 cond
= gen_rtx_fmt_ee (rev
, GET_MODE (cond
), XEXP (cond
, 0),
4118 prob_val
= GEN_INT (REG_BR_PROB_BASE
- INTVAL (prob_val
));
4121 if (cond_exec_process_insns (NULL
, head
, end
, cond
, prob_val
, 0)
4122 && verify_changes (0))
4123 n_validated_changes
= num_validated_changes ();
4131 /* If we allocated new pseudos (e.g. in the conditional move
4132 expander called from noce_emit_cmove), we must resize the
4134 if (max_regno
< max_reg_num ())
4135 max_regno
= max_reg_num ();
4137 /* Try the NCE path if the CE path did not result in any changes. */
4138 if (n_validated_changes
== 0)
4144 /* In the non-conditional execution case, we have to verify that there
4145 are no trapping operations, no calls, no references to memory, and
4146 that any registers modified are dead at the branch site. */
4148 if (!any_condjump_p (jump
))
4151 /* Find the extent of the conditional. */
4152 cond
= noce_get_condition (jump
, &earliest
, false);
4156 live
= BITMAP_ALLOC (®_obstack
);
4157 simulate_backwards_to_point (merge_bb
, live
, end
);
4158 success
= can_move_insns_across (head
, end
, earliest
, jump
,
4160 df_get_live_in (other_bb
), NULL
);
4165 /* Collect the set of registers set in MERGE_BB. */
4166 merge_set
= BITMAP_ALLOC (®_obstack
);
4168 FOR_BB_INSNS (merge_bb
, insn
)
4169 if (NONDEBUG_INSN_P (insn
))
4170 df_simulate_find_defs (insn
, merge_set
);
4172 #ifdef HAVE_simple_return
4173 /* If shrink-wrapping, disable this optimization when test_bb is
4174 the first basic block and merge_bb exits. The idea is to not
4175 move code setting up a return register as that may clobber a
4176 register used to pass function parameters, which then must be
4177 saved in caller-saved regs. A caller-saved reg requires the
4178 prologue, killing a shrink-wrap opportunity. */
4179 if ((flag_shrink_wrap
&& HAVE_simple_return
&& !epilogue_completed
)
4180 && ENTRY_BLOCK_PTR
->next_bb
== test_bb
4181 && single_succ_p (new_dest
)
4182 && single_succ (new_dest
) == EXIT_BLOCK_PTR
4183 && bitmap_intersect_p (df_get_live_in (new_dest
), merge_set
))
4188 return_regs
= BITMAP_ALLOC (®_obstack
);
4190 /* Start off with the intersection of regs used to pass
4191 params and regs used to return values. */
4192 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
4193 if (FUNCTION_ARG_REGNO_P (i
)
4194 && targetm
.calls
.function_value_regno_p (i
))
4195 bitmap_set_bit (return_regs
, INCOMING_REGNO (i
));
4197 bitmap_and_into (return_regs
, df_get_live_out (ENTRY_BLOCK_PTR
));
4198 bitmap_and_into (return_regs
, df_get_live_in (EXIT_BLOCK_PTR
));
4199 if (!bitmap_empty_p (return_regs
))
4201 FOR_BB_INSNS_REVERSE (new_dest
, insn
)
4202 if (NONDEBUG_INSN_P (insn
))
4205 unsigned int uid
= INSN_UID (insn
);
4207 /* If this insn sets any reg in return_regs.. */
4208 for (def_rec
= DF_INSN_UID_DEFS (uid
); *def_rec
; def_rec
++)
4210 df_ref def
= *def_rec
;
4211 unsigned r
= DF_REF_REGNO (def
);
4213 if (bitmap_bit_p (return_regs
, r
))
4216 /* ..then add all reg uses to the set of regs
4217 we're interested in. */
4219 df_simulate_uses (insn
, return_regs
);
4221 if (bitmap_intersect_p (merge_set
, return_regs
))
4223 BITMAP_FREE (return_regs
);
4224 BITMAP_FREE (merge_set
);
4228 BITMAP_FREE (return_regs
);
4234 /* We don't want to use normal invert_jump or redirect_jump because
4235 we don't want to delete_insn called. Also, we want to do our own
4236 change group management. */
4238 old_dest
= JUMP_LABEL (jump
);
4239 if (other_bb
!= new_dest
)
4241 if (JUMP_P (BB_END (dest_edge
->src
)))
4242 new_dest_label
= JUMP_LABEL (BB_END (dest_edge
->src
));
4243 else if (new_dest
== EXIT_BLOCK_PTR
)
4244 new_dest_label
= ret_rtx
;
4246 new_dest_label
= block_label (new_dest
);
4249 ? ! invert_jump_1 (jump
, new_dest_label
)
4250 : ! redirect_jump_1 (jump
, new_dest_label
))
4254 if (verify_changes (n_validated_changes
))
4255 confirm_change_group ();
4259 if (other_bb
!= new_dest
)
4261 redirect_jump_2 (jump
, old_dest
, new_dest_label
, 0, reversep
);
4263 redirect_edge_succ (BRANCH_EDGE (test_bb
), new_dest
);
4266 gcov_type count
, probability
;
4267 count
= BRANCH_EDGE (test_bb
)->count
;
4268 BRANCH_EDGE (test_bb
)->count
= FALLTHRU_EDGE (test_bb
)->count
;
4269 FALLTHRU_EDGE (test_bb
)->count
= count
;
4270 probability
= BRANCH_EDGE (test_bb
)->probability
;
4271 BRANCH_EDGE (test_bb
)->probability
4272 = FALLTHRU_EDGE (test_bb
)->probability
;
4273 FALLTHRU_EDGE (test_bb
)->probability
= probability
;
4274 update_br_prob_note (test_bb
);
4278 /* Move the insns out of MERGE_BB to before the branch. */
4283 if (end
== BB_END (merge_bb
))
4284 BB_END (merge_bb
) = PREV_INSN (head
);
4286 /* PR 21767: when moving insns above a conditional branch, the REG_EQUAL
4287 notes being moved might become invalid. */
4293 if (! INSN_P (insn
))
4295 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
4298 set
= single_set (insn
);
4299 if (!set
|| !function_invariant_p (SET_SRC (set
))
4300 || !function_invariant_p (XEXP (note
, 0)))
4301 remove_note (insn
, note
);
4302 } while (insn
!= end
&& (insn
= NEXT_INSN (insn
)));
4304 /* PR46315: when moving insns above a conditional branch, the REG_EQUAL
4305 notes referring to the registers being set might become invalid. */
4311 EXECUTE_IF_SET_IN_BITMAP (merge_set
, 0, i
, bi
)
4312 remove_reg_equal_equiv_notes_for_regno (i
);
4314 BITMAP_FREE (merge_set
);
4317 reorder_insns (head
, end
, PREV_INSN (earliest
));
4320 /* Remove the jump and edge if we can. */
4321 if (other_bb
== new_dest
)
4324 remove_edge (BRANCH_EDGE (test_bb
));
4325 /* ??? Can't merge blocks here, as then_bb is still in use.
4326 At minimum, the merge will get done just before bb-reorder. */
4335 BITMAP_FREE (merge_set
);
4340 /* Main entry point for all if-conversion. */
4350 df_live_add_problem ();
4351 df_live_set_all_dirty ();
4354 num_possible_if_blocks
= 0;
4355 num_updated_if_blocks
= 0;
4356 num_true_changes
= 0;
4358 loop_optimizer_init (AVOID_CFG_MODIFICATIONS
);
4359 mark_loop_exit_edges ();
4360 loop_optimizer_finalize ();
4361 free_dominance_info (CDI_DOMINATORS
);
4363 /* Compute postdominators. */
4364 calculate_dominance_info (CDI_POST_DOMINATORS
);
4366 df_set_flags (DF_LR_RUN_DCE
);
4368 /* Go through each of the basic blocks looking for things to convert. If we
4369 have conditional execution, we make multiple passes to allow us to handle
4370 IF-THEN{-ELSE} blocks within other IF-THEN{-ELSE} blocks. */
4375 /* Only need to do dce on the first pass. */
4376 df_clear_flags (DF_LR_RUN_DCE
);
4377 cond_exec_changed_p
= FALSE
;
4380 #ifdef IFCVT_MULTIPLE_DUMPS
4381 if (dump_file
&& pass
> 1)
4382 fprintf (dump_file
, "\n\n========== Pass %d ==========\n", pass
);
4388 while (!df_get_bb_dirty (bb
)
4389 && (new_bb
= find_if_header (bb
, pass
)) != NULL
)
4393 #ifdef IFCVT_MULTIPLE_DUMPS
4394 if (dump_file
&& cond_exec_changed_p
)
4396 if (dump_flags
& TDF_SLIM
)
4397 print_rtl_slim_with_bb (dump_file
, get_insns (), dump_flags
);
4399 print_rtl_with_bb (dump_file
, get_insns ());
4403 while (cond_exec_changed_p
);
4405 #ifdef IFCVT_MULTIPLE_DUMPS
4407 fprintf (dump_file
, "\n\n========== no more changes\n");
4410 free_dominance_info (CDI_POST_DOMINATORS
);
4415 clear_aux_for_blocks ();
4417 /* If we allocated new pseudos, we must resize the array for sched1. */
4418 if (max_regno
< max_reg_num ())
4419 max_regno
= max_reg_num ();
4421 /* Write the final stats. */
4422 if (dump_file
&& num_possible_if_blocks
> 0)
4425 "\n%d possible IF blocks searched.\n",
4426 num_possible_if_blocks
);
4428 "%d IF blocks converted.\n",
4429 num_updated_if_blocks
);
4431 "%d true changes made.\n\n\n",
4436 df_remove_problem (df_live
);
4438 #ifdef ENABLE_CHECKING
4439 verify_flow_info ();
4444 gate_handle_if_conversion (void)
4446 return (optimize
> 0)
4447 && dbg_cnt (if_conversion
);
4450 /* If-conversion and CFG cleanup. */
4452 rest_of_handle_if_conversion (void)
4454 if (flag_if_conversion
)
4457 dump_flow_info (dump_file
, dump_flags
);
4458 cleanup_cfg (CLEANUP_EXPENSIVE
);
4466 struct rtl_opt_pass pass_rtl_ifcvt
=
4471 gate_handle_if_conversion
, /* gate */
4472 rest_of_handle_if_conversion
, /* execute */
4475 0, /* static_pass_number */
4476 TV_IFCVT
, /* tv_id */
4477 0, /* properties_required */
4478 0, /* properties_provided */
4479 0, /* properties_destroyed */
4480 0, /* todo_flags_start */
4481 TODO_df_finish
| TODO_verify_rtl_sharing
|
4482 0 /* todo_flags_finish */
4487 gate_handle_if_after_combine (void)
4489 return optimize
> 0 && flag_if_conversion
4490 && dbg_cnt (if_after_combine
);
4494 /* Rerun if-conversion, as combine may have simplified things enough
4495 to now meet sequence length restrictions. */
4497 rest_of_handle_if_after_combine (void)
4503 struct rtl_opt_pass pass_if_after_combine
=
4508 gate_handle_if_after_combine
, /* gate */
4509 rest_of_handle_if_after_combine
, /* execute */
4512 0, /* static_pass_number */
4513 TV_IFCVT
, /* tv_id */
4514 0, /* properties_required */
4515 0, /* properties_provided */
4516 0, /* properties_destroyed */
4517 0, /* todo_flags_start */
4518 TODO_df_finish
| TODO_verify_rtl_sharing
|
4519 TODO_ggc_collect
/* todo_flags_finish */
4525 gate_handle_if_after_reload (void)
4527 return optimize
> 0 && flag_if_conversion2
4528 && dbg_cnt (if_after_reload
);
4532 rest_of_handle_if_after_reload (void)
4539 struct rtl_opt_pass pass_if_after_reload
=
4544 gate_handle_if_after_reload
, /* gate */
4545 rest_of_handle_if_after_reload
, /* execute */
4548 0, /* static_pass_number */
4549 TV_IFCVT2
, /* tv_id */
4550 0, /* properties_required */
4551 0, /* properties_provided */
4552 0, /* properties_destroyed */
4553 0, /* todo_flags_start */
4554 TODO_df_finish
| TODO_verify_rtl_sharing
|
4555 TODO_ggc_collect
/* todo_flags_finish */