From 573aea590e2eb6d0cb4116c10a2a8fbdecf6a80f Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin" Date: Thu, 7 Jul 2011 15:29:14 -0700 Subject: [PATCH] insns.dat: Clean up and fix the BMI instruction patterns Clean up the formatting of the BMI instruction patterns, and fix: a) X64,FUTURE is wrong - it needs to be LONG,FUTURE b) Fix the BLSI, BLSMSK, BLSR instruction patterns c) Use a bracket pattern for TZCNT Signed-off-by: H. Peter Anvin --- insns.dat | 61 +++++++++++++++++++++++++++++-------------------------------- 1 file changed, 29 insertions(+), 32 deletions(-) diff --git a/insns.dat b/insns.dat index c69be4c6..da1db922 100644 --- a/insns.dat +++ b/insns.dat @@ -3128,38 +3128,35 @@ VGATHERQPD ymmreg,mem64,ymmreg [rmv: vm64y vex.dds.256.66.0f38.w1 92 /r] FUTURE ; ; based on pub number 319433-011 dated July 2011 ; -TZCNT reg16,rm16 \320\333\2\x0F\xBC\110 FUTURE,BMI1 -TZCNT reg32,rm32 \321\333\2\x0F\xBC\110 FUTURE,BMI1 -TZCNT reg64,rm64 \324\333\2\x0F\xBC\110 X64,FUTURE,BMI1 -ANDN reg32,reg32,rm32 [rvm: vex.nds.lz.0f38.w0 f2 /r] FUTURE,BMI1 -ANDN reg64,reg64,rm64 [rvm: vex.nds.lz.0f38.w1 f2 /r] X64,FUTURE,BMI1 -BEXTR reg32,rm32,reg32 [rmv: vex.nds.lz.0f38.w0 f7 /r] FUTURE,BMI1 -BEXTR reg64,rm64,reg64 [rmv: vex.nds.lz.0f38.w1 f7 /r] X64,FUTURE,BMI1 - -; there's something strange with the BLS commands... -; BLSI reg32,rm32 [rmv: vex.ndd.lz.0f38.w0 f3 /3] FUTURE,BMI1 -; BLSI reg64,rm64 [rmv: vex.ndd.lz.0f38.w1 f3 /3] X64,FUTURE,BMI1 -; BLSMSK reg32,rm32 [rmv: vex.ndd.lz.0f38.w0 f3 /2] FUTURE,BMI1 -; BLSMSK reg64,rm64 [rmv: vex.ndd.lz.0f38.w1 f3 /2] X64,FUTURE,BMI1 -; BLSR reg32,rm32 [rmv: vex.ndd.lz.0f38.w0 f3 /1] FUTURE,BMI1 -; BLSR reg64,rm64 [rmv: vex.ndd.lz.0f38.w1 f3 /1] X64,FUTURE,BMI1 - -BZHI reg32,rm32,reg32 [rmv: vex.nds.lz.0f38.w0 f5 /r] FUTURE,BMI2 -BZHI reg64,rm64,reg64 [rmv: vex.nds.lz.0f38.w1 f5 /r] X64,FUTURE,BMI2 -MULX reg32,reg32,rm32 [rvm: vex.ndd.lz.f2.0f38.w0 f6 /r] FUTURE,BMI2 -MULX reg64,reg64,rm64 [rvm: vex.ndd.lz.f2.0f38.w1 f6 /r] X64,FUTURE,BMI2 -PDEP reg32,reg32,rm32 [rvm: vex.nds.lz.f2.0f38.w0 f5 /r] FUTURE,BMI2 -PDEP reg64,reg64,rm64 [rvm: vex.nds.lz.f2.0f38.w1 f5 /r] X64,FUTURE,BMI2 -PEXT reg32,reg32,rm32 [rvm: vex.nds.lz.f3.0f38.w0 f5 /r] FUTURE,BMI2 -PEXT reg64,reg64,rm64 [rvm: vex.nds.lz.f3.0f38.w1 f5 /r] X64,FUTURE,BMI2 -RORX reg32,rm32,imm8 [rmi: vex.lz.f2.0f3a.w0 f0 /r ib] FUTURE,BMI2 -RORX reg64,rm64,imm8 [rmi: vex.lz.f2.0f3a.w1 f0 /r ib] X64,FUTURE,BMI2 -SARX reg32,rm32,reg32 [rmv: vex.nds.lz.f3.0f38.w0 f7 /r] FUTURE,BMI2 -SARX reg64,rm64,reg64 [rmv: vex.nds.lz.f3.0f38.w1 f7 /r] X64,FUTURE,BMI2 -SHLX reg32,rm32,reg32 [rmv: vex.nds.lz.66.0f38.w0 f7 /r] FUTURE,BMI2 -SHLX reg64,rm64,reg64 [rmv: vex.nds.lz.66.0f38.w1 f7 /r] X64,FUTURE,BMI2 -SHRX reg32,rm32,reg32 [rmv: vex.nds.lz.f2.0f38.w0 f7 /r] FUTURE,BMI2 -SHRX reg64,rm64,reg64 [rmv: vex.nds.lz.f2.0f38.w1 f7 /r] X64,FUTURE,BMI2 +TZCNT reg16,rm16 [rm: o16 f3 0f bc /r] FUTURE,BMI1 +TZCNT reg32,rm32 [rm: o32 f3 0f bc /r] FUTURE,BMI1 +TZCNT reg64,rm64 [rm: o64 f3 0f bc /r] LONG,FUTURE,BMI1 +ANDN reg32,reg32,rm32 [rvm: vex.nds.lz.0f38.w0 f2 /r] FUTURE,BMI1 +ANDN reg64,reg64,rm64 [rvm: vex.nds.lz.0f38.w1 f2 /r] LONG,FUTURE,BMI1 +BEXTR reg32,rm32,reg32 [rmv: vex.nds.lz.0f38.w0 f7 /r] FUTURE,BMI1 +BEXTR reg64,rm64,reg64 [rmv: vex.nds.lz.0f38.w1 f7 /r] LONG,FUTURE,BMI1 +BLSI reg32,rm32 [vm: vex.ndd.lz.0f38.w0 f3 /3] FUTURE,BMI1 +BLSI reg64,rm64 [vm: vex.ndd.lz.0f38.w1 f3 /3] LONG,FUTURE,BMI1 +BLSMSK reg32,rm32 [vm: vex.ndd.lz.0f38.w0 f3 /2] FUTURE,BMI1 +BLSMSK reg64,rm64 [vm: vex.ndd.lz.0f38.w1 f3 /2] LONG,FUTURE,BMI1 +BLSR reg32,rm32 [vm: vex.ndd.lz.0f38.w0 f3 /1] FUTURE,BMI1 +BLSR reg64,rm64 [vm: vex.ndd.lz.0f38.w1 f3 /1] LONG,FUTURE,BMI1 +BZHI reg32,rm32,reg32 [rmv: vex.nds.lz.0f38.w0 f5 /r] FUTURE,BMI2 +BZHI reg64,rm64,reg64 [rmv: vex.nds.lz.0f38.w1 f5 /r] LONG,FUTURE,BMI2 +MULX reg32,reg32,rm32 [rvm: vex.ndd.lz.f2.0f38.w0 f6 /r] FUTURE,BMI2 +MULX reg64,reg64,rm64 [rvm: vex.ndd.lz.f2.0f38.w1 f6 /r] LONG,FUTURE,BMI2 +PDEP reg32,reg32,rm32 [rvm: vex.nds.lz.f2.0f38.w0 f5 /r] FUTURE,BMI2 +PDEP reg64,reg64,rm64 [rvm: vex.nds.lz.f2.0f38.w1 f5 /r] LONG,FUTURE,BMI2 +PEXT reg32,reg32,rm32 [rvm: vex.nds.lz.f3.0f38.w0 f5 /r] FUTURE,BMI2 +PEXT reg64,reg64,rm64 [rvm: vex.nds.lz.f3.0f38.w1 f5 /r] LONG,FUTURE,BMI2 +RORX reg32,rm32,imm8 [rmi: vex.lz.f2.0f3a.w0 f0 /r ib] FUTURE,BMI2 +RORX reg64,rm64,imm8 [rmi: vex.lz.f2.0f3a.w1 f0 /r ib] LONG,FUTURE,BMI2 +SARX reg32,rm32,reg32 [rmv: vex.nds.lz.f3.0f38.w0 f7 /r] FUTURE,BMI2 +SARX reg64,rm64,reg64 [rmv: vex.nds.lz.f3.0f38.w1 f7 /r] LONG,FUTURE,BMI2 +SHLX reg32,rm32,reg32 [rmv: vex.nds.lz.66.0f38.w0 f7 /r] FUTURE,BMI2 +SHLX reg64,rm64,reg64 [rmv: vex.nds.lz.66.0f38.w1 f7 /r] LONG,FUTURE,BMI2 +SHRX reg32,rm32,reg32 [rmv: vex.nds.lz.f2.0f38.w0 f7 /r] FUTURE,BMI2 +SHRX reg64,rm64,reg64 [rmv: vex.nds.lz.f2.0f38.w1 f7 /r] LONG,FUTURE,BMI2 ;# Systematic names for the hinting nop instructions ; These should be last in the file -- 2.11.4.GIT