1 # S/390 cpu description file
2 # this file is read by genmdesc to pruduce a table with all the relevant information
3 # about the cpu instructions that may be used by the regsiter allocator, the scheduler
4 # and other parts of the arch-dependent part of mini.
6 # An opcode name is followed by a colon and optional specifiers.
7 # A specifier has a name, a colon and a value. Specifiers are separated by white space.
8 # Here is a description of the specifiers valid for this file and their possible values.
10 # dest:register describes the destination register of an instruction
11 # src1:register describes the first source register of an instruction
12 # src2:register describes the second source register of an instruction
14 # register may have the following values:
16 # a r3 register (output from calls)
17 # b base register (used in address references)
18 # f floating point register
20 # len:number describe the maximun length in bytes of the instruction
21 # number is a positive integer
23 # cost:number describe how many cycles are needed to complete the instruction (unused)
25 # clob:spec describe if the instruction clobbers registers or has special needs
27 # spec can be one of the following characters:
28 # c clobbers caller-save registers
29 # r 'reserves' the destination register until a later instruction unreserves it
30 # used mostly to set output registers in function calls
32 # flags:spec describe if the instruction uses or sets the flags (unused)
34 # spec can be one of the following chars:
37 # m uses and modifies the flags
39 # res:spec describe what units are used in the processor (unused)
41 # delay: describe delay slots (unused)
43 # the required specifiers are: len, clob (if registers are clobbered), the registers
44 # specifiers if the registers are actually used, flags (when scheduling is implemented).
46 # See the code in mini-x86.c for more details on how the specifiers are used.
49 adc: dest:i src1:i src2:i len:6
50 adc_imm: dest:i src1:i len:14
51 add.ovf.un: len:18 dest:i src1:i src2:i
52 add.ovf: len: 28 dest:i src1:i src2:i
53 add: dest:i src1:i src2:i len:12
54 add_imm: dest:i src1:i len:24
55 add_ovf_carry: dest:i src1:1 src2:i len:28
56 add_ovf_un_carry: dest:i src1:1 src2:i len:12
57 addcc: dest:i src1:i src2:i len:12
58 and: dest:i src1:i src2:i len:8
59 and_imm: dest:i src1:i len:24
60 aot_const: dest:i len:8
63 atomic_add_i4: src1:b src2:i dest:i len:28
64 atomic_add_i8: src1:b src2:i dest:i len:30
65 atomic_add_new_i4: src1:b src2:i dest:i len:28
66 atomic_add_new_i8: src1:b src2:i dest:i len:30
67 atomic_exchange_i4: src1:b src2:i dest:i len:18
68 atomic_exchange_i8: src1:b src2:i dest:i len:24
98 call: dest:o clob:c len:26
100 call_membase: dest:o src1:b len:12 clob:c
101 call_reg: dest:o src1:i len:8 clob:c
106 cgt.un: dest:i len:12
108 checkthis: src1:b len:10
109 ckfinite: dest:f src1:f len:22
110 clt.un: dest:i len:12
112 compare: src1:i src2:i len:4
113 compare_imm: src1:i len:20
117 cond_exc_ge_un: len:8
119 cond_exc_gt_un: len:8
121 cond_exc_le_un: len:8
123 cond_exc_lt_un: len:8
125 cond_exc_ne_un: len:8
128 conv.i1: dest:i src1:i len:30
129 conv.i2: dest:i src1:i len:36
130 conv.i4: dest:i src1:i len:4
131 conv.i8: dest:i src1:i len:4
132 conv.i: dest:i src1:i len:2
138 conv.ovf.i4.un: dest:i src1:i len:50
149 conv.ovf.u4: dest:i src1:i len:48
150 conv.ovf.u8.un: dest:i src1:i len:4
153 conv.r.un: dest:f src1:i len:32
154 conv.r4: dest:f src1:i len:4
155 conv.r8: dest:f src1:i len:4
156 conv.u1: dest:i src1:i len:14
157 conv.u2: dest:i src1:i len:24
158 conv.u4: dest:i src1:i len:4
159 conv.u8: dest:i src1:i len:4
160 conv.u: dest:i src1:i len:4
163 div.un: dest:a src1:i src2:i len:12
164 div: dest:a src1:i src2:i len:10
165 div_imm: dest:i src1:i src2:i len:24
166 div_un_imm: dest:i src1:i src2:i len:24
171 fcall: dest:g len:26 clob:c
172 fcall_membase: dest:g src1:b len:14 clob:c
173 fcall_reg: dest:g src1:i len:10 clob:c
174 fcompare: src1:f src2:f len:14
175 float_add: dest:f src1:f src2:f len:6
188 float_ceq: dest:i src1:f src2:f len:16
189 float_cgt: dest:i src1:f src2:f len:16
190 float_cgt_un: dest:i src1:f src2:f len:16
191 float_clt: dest:i src1:f src2:f len:16
192 float_clt_un: dest:i src1:f src2:f len:16
193 float_conv_to_i1: dest:i src1:f len:50
194 float_conv_to_i2: dest:i src1:f len:50
195 float_conv_to_i4: dest:i src1:f len:50
196 float_conv_to_i8: dest:l src1:f len:50
197 float_conv_to_i: dest:i src1:f len:52
199 float_conv_to_ovf_i1:
200 float_conv_to_ovf_i1_un:
201 float_conv_to_ovf_i2:
202 float_conv_to_ovf_i2_un:
203 float_conv_to_ovf_i4:
204 float_conv_to_ovf_i4_un:
205 float_conv_to_ovf_i8:
206 float_conv_to_ovf_i8_un:
208 float_conv_to_ovf_i_un:
209 float_conv_to_ovf_u1:
210 float_conv_to_ovf_u1_un:
211 float_conv_to_ovf_u2:
212 float_conv_to_ovf_u2_un:
213 float_conv_to_ovf_u4:
214 float_conv_to_ovf_u4_un:
215 float_conv_to_ovf_u8:
216 float_conv_to_ovf_u8_un:
217 float_conv_to_ovf_u_un:
218 float_conv_to_r4: dest:f src1:f len:4
220 float_conv_to_u1: dest:i src1:f len:66
221 float_conv_to_u2: dest:i src1:f len:66
222 float_conv_to_u4: dest:i src1:f len:66
223 float_conv_to_u8: dest:i src1:f len:66
224 float_conv_to_u: dest:i src1:f len:36
225 float_div: dest:f src1:f src2:f len:6
226 float_div_un: dest:f src1:f src2:f len:6
227 float_mul: dest:f src1:f src2:f len:6
230 float_neg: dest:f src1:f len:6
231 float_not: dest:f src1:f len:6
232 float_rem: dest:f src1:f src2:f len:16
233 float_rem_un: dest:f src1:f src2:f len:16
234 float_sub: dest:f src1:f src2:f len:6
237 fmove: dest:f src1:f len:4
238 i8const: dest:i len:20
239 icompare: src1:i src2:i len:4
240 icompare_imm: src1:i src2:i len:14
241 iconst: dest:i len:40
245 int_adc: dest:i src1:i src2:i len:12
246 int_adc_imm: dest:i src1:i len:14
247 int_addcc: dest:i src1:i src2:i len:12
248 int_add: dest:i src1:i src2:i len:12
249 int_add_imm: dest:i src1:i len:20
250 int_and: dest:i src1:i src2:i len:12
251 int_and_imm: dest:i src1:i len:24
262 int_ceq: dest:i len:12
263 int_cgt: dest:i len:12
264 int_cgt_un: dest:i len:12
265 int_clt: dest:i len:12
266 int_clt_un: dest:i len:12
267 int_div: dest:a src1:i src2:i len:16
268 int_div_imm: dest:a src1:i len:24
269 int_div_un: dest:a src1:i src2:i len:16
270 int_div_un_imm: dest:a src1:i len:24
271 int_mul: dest:i src1:i src2:i len:16
272 int_mul_imm: dest:i src1:i len:24
273 int_mul_ovf: dest:i src1:i src2:i len:44
274 int_mul_ovf_un: dest:i src1:i src2:i len:22
275 int_neg: dest:i src1:i len:12
276 int_not: dest:i src1:i len:12
277 int_or: dest:i src1:i src2:i len:12
278 int_or_imm: dest:i src1:i len:24
279 int_rem: dest:d src1:i src2:i len:16
280 int_rem_imm: dest:d src1:i len:24
281 int_rem_un: dest:d src1:i src2:i len:16
282 int_rem_un_imm: dest:d src1:i len:24
283 int_sbb: dest:i src1:i src2:i len:6
284 int_sbb_imm: dest:i src1:i len:14
285 int_shl: dest:i src1:i src2:i clob:s len:10
286 int_shl_imm: dest:i src1:i len:10
287 int_shr: dest:i src1:i src2:i clob:s len:10
288 int_shr_imm: dest:i src1:i len:10
289 int_shr_un: dest:i src1:i src2:i clob:s len:10
290 int_shr_un_imm: dest:i src1:i len:10
291 int_subcc: dest:i src1:i src2:i len:12
292 int_sub: dest:i src1:i src2:i len:12
293 int_sub_imm: dest:i src1:i len:18
294 int_xor: dest:i src1:i src2:i len:12
295 int_xor_imm: dest:i src1:i len:24
299 lcall: dest:o len:22 clob:c
300 lcall_membase: dest:o src1:b len:12 clob:c
301 lcall_reg: dest:o src1:i len:8 clob:c
302 lcompare: src1:i src2:i len:4
342 ldind.i1: dest:i len:8
343 ldind.i2: dest:i len:8
344 ldind.i4: dest:i len:8
346 ldind.i: dest:i len:8
349 ldind.ref: dest:i len:8
350 ldind.u1: dest:i len:8
351 ldind.u2: dest:i len:8
352 ldind.u4: dest:i len:8
372 load_membase: dest:i src1:b len:26
373 loadi1_membase: dest:i src1:b len:40
374 loadi2_membase: dest:i src1:b len:26
375 loadi4_membase: dest:i src1:b len:26
376 loadi8_membase: dest:i src1:b len:26
377 loadr4_membase: dest:f src1:b len:28
378 loadr8_membase: dest:f src1:b len:28
379 loadu1_membase: dest:i src1:b len:26
380 loadu2_membase: dest:i src1:b len:26
381 loadu4_mem: dest:i len:8
382 loadu4_membase: dest:i src1:b len:26
384 localloc: dest:i src1:i len:106
387 long_add_ovf: len:14 dest:i src1:i src2:i
388 long_add_ovf_un: len:14 dest:i src1:i src2:i
411 long_conv_to_ovf_i1_un:
413 long_conv_to_ovf_i2_un:
415 long_conv_to_ovf_i4_un:
417 long_conv_to_ovf_i8_un:
418 long_conv_to_ovf_i: dest:i src1:i src2:i len:44
419 long_conv_to_ovf_i_un:
421 long_conv_to_ovf_u1_un:
423 long_conv_to_ovf_u2_un:
425 long_conv_to_ovf_u4_un:
427 long_conv_to_ovf_u8_un:
429 long_conv_to_ovf_u_un:
430 long_conv_to_r4: dest:f src1:i len:16
431 long_conv_to_r8: dest:f src1:i len:16
432 long_conv_to_r_un: dest:f src1:i src2:i len:37
438 long_div: dest:i src1:i src2:i len:12
439 long_div_un: dest:i src1:i src2:i len:16
440 long_mul: dest:i src1:i src2:i len:12
441 long_mul_imm: dest:i src1:i src2:i len:20
442 long_mul_ovf: dest:i src1:i src2:i len:56
443 long_mul_ovf_un: dest:i src1:i src2:i len:64
444 long_neg: dest:i src1:i len:6
445 long_not: dest:i src1:i len:6
446 long_or: dest:i src1:i src2:i len:6
447 long_rem: dest:i src1:i src2:i len:12
448 long_rem_un: dest:i src1:i src2:i len:16
449 long_shl: dest:i src1:i src2:i len:14
450 long_shl_imm: dest:i src1:i len:14
451 long_shr_un: dest:i src1:i src2:i len:14
452 long_shr: dest:i src1:i src2:i len:14
453 long_shr_imm: dest:i src1:i len:14
454 long_shr_un_imm: dest:i src1:i len:14
455 long_sub: dest:i src1:i src2:i len:12
456 long_sub_imm: dest:i src1:i len:16
457 long_sub_ovf: len:14 dest:i src1:i src2:i
458 long_sub_ovf_un: len:14 dest:i src1:i src2:i
459 long_xor: dest:i src1:i len:6
460 memory_barrier: len: 10
467 move: dest:i src1:i len:4
468 mul.ovf.un: dest:i src1:i src2:i len:20
469 mul.ovf: dest:i src1:i src2:i len:42
470 mul: dest:i src1:i src2:i len:6
471 mul_imm: dest:i src1:i len:24
472 neg: dest:i src1:i len:6
476 not: dest:i src1:i len:12
477 oparglist: src1:i len:28
478 op_bigmul: len:2 dest:i src1:a src2:i
479 op_bigmul_un: len:2 dest:i src1:a src2:i
480 op_endfilter: src1:i len:28
481 op_rethrow: src1:i len:26
482 or: dest:i src1:i src2:i len:8
483 or_imm: dest:i src1:i len:24
496 r4const: dest:f len:26
497 r8const: dest:f len:24
503 rem.un: dest:d src1:i src2:i len:12
504 rem: dest:d src1:i src2:i len:10
505 rem_imm: dest:i src1:i src2:i len:24
506 rem_un_imm: dest:i src1:i src2:i len:24
511 s390_bkchain: len: 8 dest:i src1:i
512 s390_move: len:48 dest:b src1:b
513 s390_setf4ret: dest:f src1:f len:4
514 sbb: dest:i src1:i src2:i len:6
515 sbb_imm: dest:i src1:i len:14
516 setfreg: dest:f src1:f len:4
517 setreg: dest:i src1:i len:4
518 setregimm: dest:i len:20
519 setret: dest:a src1:i len:4
520 shl: dest:i src1:i src2:i clob:s len:6
521 shl_imm: dest:i src1:i len:8
522 shr.un: dest:i src1:i src2:i clob:s len:6
523 shr: dest:i src1:i src2:i clob:s len:6
524 shr_imm: dest:i src1:i len:8
525 shr_un_imm: dest:i src1:i len:8
527 sqrt: dest:f src1:f len:4
530 start_handler: len:26
540 stind.i1: src1:b src2:i
541 stind.i2: src1:b src2:i
542 stind.i4: src1:b src2:i
545 stind.r4: src1:b src2:f
546 stind.r8: src1:b src2:f
547 stind.ref: src1:b src2:i
556 store_membase_imm: dest:b len:46
557 store_membase_reg: dest:b src1:i len:26
558 storei1_membase_imm: dest:b len:46
559 storei1_membase_reg: dest:b src1:i len:26
560 storei2_membase_imm: dest:b len:46
561 storei2_membase_reg: dest:b src1:i len:26
562 storei4_membase_imm: dest:b len:46
563 storei4_membase_reg: dest:b src1:i len:26
564 storei8_membase_imm: dest:b len:46
565 storei8_membase_reg: dest:b src1:i len:26
566 storer4_membase_reg: dest:b src1:f len:28
567 storer8_membase_reg: dest:b src1:f len:24
569 sub.ovf.un: len:16 dest:i src1:i src2:i
570 sub.ovf: len:28 dest:i src1:i src2:i
571 sub: dest:i src1:i src2:i len:12
572 sub_imm: dest:i src1:i len:18
573 sub_ovf_carry: dest:i src1:1 src2:i len:28
574 sub_ovf_un_carry: dest:i src1:1 src2:i len:12
575 subcc: dest:i src1:i src2:i len:12
583 vcall_membase: src1:b len:12 clob:c
584 vcall_reg: src1:i len:8 clob:c
585 voidcall: len:22 clob:c
586 voidcall_membase: src1:b len:12 clob:c
587 voidcall_reg: src1:i len:8 clob:c
589 xor: dest:i src1:i src2:i len:8
590 xor_imm: dest:i src1:i len:20