1 # powerpc cpu description file
2 # this file is read by genmdesc to pruduce a table with all the relevant information
3 # about the cpu instructions that may be used by the regsiter allocator, the scheduler
4 # and other parts of the arch-dependent part of mini.
6 # An opcode name is followed by a colon and optional specifiers.
7 # A specifier has a name, a colon and a value. Specifiers are separated by white space.
8 # Here is a description of the specifiers valid for this file and their possible values.
10 # dest:register describes the destination register of an instruction
11 # src1:register describes the first source register of an instruction
12 # src2:register describes the second source register of an instruction
14 # register may have the following values:
16 # a r3 register (output from calls)
17 # b base register (used in address references)
18 # f floating point register
20 # len:number describe the maximun length in bytes of the instruction
21 # number is a positive integer
23 # cost:number describe how many cycles are needed to complete the instruction (unused)
25 # clob:spec describe if the instruction clobbers registers or has special needs
27 # spec can be one of the following characters:
28 # c clobbers caller-save registers
29 # r 'reserves' the destination register until a later instruction unreserves it
30 # used mostly to set output registers in function calls
32 # flags:spec describe if the instruction uses or sets the flags (unused)
34 # spec can be one of the following chars:
37 # m uses and modifies the flags
39 # res:spec describe what units are used in the processor (unused)
41 # delay: describe delay slots (unused)
43 # the required specifiers are: len, clob (if registers are clobbered), the registers
44 # specifiers if the registers are actually used, flags (when scheduling is implemented).
46 # See the code in mini-x86.c for more details on how the specifiers are used.
54 tailcall: len:120 clob:c
55 call: dest:a clob:c len:16
58 rethrow: src1:i len:20
59 ckfinite: dest:f src1:f
60 ppc_check_finite: src1:i len:16
61 add_ovf_carry: dest:i src1:i src2:i len:16
62 sub_ovf_carry: dest:i src1:i src2:i len:16
63 add_ovf_un_carry: dest:i src1:i src2:i len:16
64 sub_ovf_un_carry: dest:i src1:i src2:i len:16
72 localloc: dest:i src1:i len:60
73 compare: src1:i src2:i len:4
74 compare_imm: src1:i len:12
75 fcompare: src1:f src2:f len:12
76 oparglist: src1:i len:12
77 setlret: src1:i src2:i len:12
78 checkthis: src1:b len:4
79 voidcall: len:16 clob:c
80 voidcall_reg: src1:i len:16 clob:c
81 voidcall_membase: src1:b len:16 clob:c
82 fcall: dest:g len:16 clob:c
83 fcall_reg: dest:g src1:i len:16 clob:c
84 fcall_membase: dest:g src1:b len:16 clob:c
85 lcall: dest:l len:16 clob:c
86 lcall_reg: dest:l src1:i len:16 clob:c
87 lcall_membase: dest:l src1:b len:16 clob:c
89 vcall_reg: src1:i len:16 clob:c
90 vcall_membase: src1:b len:16 clob:c
91 call_reg: dest:a src1:i len:16 clob:c
92 call_membase: dest:a src1:b len:16 clob:c
94 r4const: dest:f len:12
95 r8const: dest:f len:24
97 store_membase_reg: dest:b src1:i len:12
98 storei1_membase_reg: dest:b src1:i len:12
99 storei2_membase_reg: dest:b src1:i len:12
100 storei4_membase_reg: dest:b src1:i len:12
101 storer4_membase_reg: dest:b src1:f len:16
102 storer8_membase_reg: dest:b src1:f len:12
103 load_membase: dest:i src1:b len:12
104 loadi1_membase: dest:i src1:b len:16
105 loadu1_membase: dest:i src1:b len:12
106 loadi2_membase: dest:i src1:b len:12
107 loadu2_membase: dest:i src1:b len:12
108 loadi4_membase: dest:i src1:b len:12
109 loadu4_membase: dest:i src1:b len:12
110 loadr4_membase: dest:f src1:b len:12
111 loadr8_membase: dest:f src1:b len:12
112 load_memindex: dest:i src1:b src2:i len:4
113 loadi1_memindex: dest:i src1:b src2:i len:8
114 loadu1_memindex: dest:i src1:b src2:i len:4
115 loadi2_memindex: dest:i src1:b src2:i len:4
116 loadu2_memindex: dest:i src1:b src2:i len:4
117 loadi4_memindex: dest:i src1:b src2:i len:4
118 loadu4_memindex: dest:i src1:b src2:i len:4
119 loadr4_memindex: dest:f src1:b src2:i len:4
120 loadr8_memindex: dest:f src1:b src2:i len:4
121 store_memindex: dest:b src1:i src2:i len:4
122 storei1_memindex: dest:b src1:i src2:i len:4
123 storei2_memindex: dest:b src1:i src2:i len:4
124 storei4_memindex: dest:b src1:i src2:i len:4
125 storer4_memindex: dest:b src1:i src2:i len:8
126 storer8_memindex: dest:b src1:i src2:i len:4
127 loadu4_mem: dest:i len:8
128 move: dest:i src1:i len:4
129 fmove: dest:f src1:f len:4
130 add_imm: dest:i src1:i len:4
131 sub_imm: dest:i src1:i len:4
132 mul_imm: dest:i src1:i len:4
133 # there is no actual support for division or reminder by immediate
134 # we simulate them, though (but we need to change the burg rules
135 # to allocate a symbolic reg for src2)
136 div_imm: dest:i src1:i src2:i len:20
137 div_un_imm: dest:i src1:i src2:i len:12
138 rem_imm: dest:i src1:i src2:i len:28
139 rem_un_imm: dest:i src1:i src2:i len:16
140 and_imm: dest:i src1:i len:4
141 or_imm: dest:i src1:i len:4
142 xor_imm: dest:i src1:i len:4
143 shl_imm: dest:i src1:i len:4
144 shr_imm: dest:i src1:i len:4
145 shr_un_imm: dest:i src1:i len:4
147 cond_exc_ne_un: len:8
149 cond_exc_lt_un: len:8
151 cond_exc_gt_un: len:8
153 cond_exc_ge_un: len:8
155 cond_exc_le_un: len:8
160 long_conv_to_ovf_i: dest:i src1:i src2:i len:32
162 long_conv_to_r_un: dest:f src1:i src2:i len:37
173 float_add: dest:f src1:f src2:f len:4
174 float_sub: dest:f src1:f src2:f len:4
175 float_mul: dest:f src1:f src2:f len:4
176 float_div: dest:f src1:f src2:f len:4
177 float_div_un: dest:f src1:f src2:f len:4
178 float_rem: dest:f src1:f src2:f len:16
179 float_rem_un: dest:f src1:f src2:f len:16
180 float_neg: dest:f src1:f len:4
181 float_not: dest:f src1:f len:4
182 float_conv_to_i1: dest:i src1:f len:40
183 float_conv_to_i2: dest:i src1:f len:40
184 float_conv_to_i4: dest:i src1:f len:40
185 float_conv_to_i8: dest:l src1:f len:40
186 float_conv_to_r4: dest:f src1:f len:4
187 float_conv_to_u4: dest:i src1:f len:40
188 float_conv_to_u8: dest:l src1:f len:40
189 float_conv_to_u2: dest:i src1:f len:40
190 float_conv_to_u1: dest:i src1:f len:40
191 float_conv_to_i: dest:i src1:f len:40
192 float_ceq: dest:i src1:f src2:f len:16
193 float_cgt: dest:i src1:f src2:f len:16
194 float_cgt_un: dest:i src1:f src2:f len:20
195 float_clt: dest:i src1:f src2:f len:16
196 float_clt_un: dest:i src1:f src2:f len:20
197 float_conv_to_u: dest:i src1:f len:36
198 call_handler: len:12 clob:c
199 endfilter: src1:i len:32
200 aot_const: dest:i len:8
201 load_gotaddr: dest:i len:32
202 got_entry: dest:i src1:b len:32
203 sqrt: dest:f src1:f len:4
204 adc: dest:i src1:i src2:i len:4
205 addcc: dest:i src1:i src2:i len:4
206 subcc: dest:i src1:i src2:i len:4
207 addcc_imm: dest:i src1:i len:4
208 sbb: dest:i src1:i src2:i len:4
210 ppc_subfic: dest:i src1:i len:4
211 ppc_subfze: dest:i src1:i len:4
212 bigmul: len:12 dest:l src1:i src2:i
213 bigmul_un: len:12 dest:l src1:i src2:i
214 tls_get: len:20 dest:i
217 dummy_use: src1:i len:0
220 not_null: src1:i len:0
223 int_add: dest:i src1:i src2:i len:4
224 int_sub: dest:i src1:i src2:i len:4
225 int_mul: dest:i src1:i src2:i len:4
226 int_div: dest:i src1:i src2:i len:40
227 int_div_un: dest:i src1:i src2:i len:16
228 int_rem: dest:i src1:i src2:i len:48
229 int_rem_un: dest:i src1:i src2:i len:24
230 int_and: dest:i src1:i src2:i len:4
231 int_or: dest:i src1:i src2:i len:4
232 int_xor: dest:i src1:i src2:i len:4
233 int_shl: dest:i src1:i src2:i len:4
234 int_shr: dest:i src1:i src2:i len:4
235 int_shr_un: dest:i src1:i src2:i len:4
236 int_neg: dest:i src1:i len:4
237 int_not: dest:i src1:i len:4
238 int_conv_to_i1: dest:i src1:i len:8
239 int_conv_to_i2: dest:i src1:i len:8
240 int_conv_to_i4: dest:i src1:i len:4
241 int_conv_to_r4: dest:f src1:i len:36
242 int_conv_to_r8: dest:f src1:i len:36
243 int_conv_to_u4: dest:i src1:i
244 int_conv_to_u2: dest:i src1:i len:8
245 int_conv_to_u1: dest:i src1:i len:4
256 int_add_ovf: dest:i src1:i src2:i len:16
257 int_add_ovf_un: dest:i src1:i src2:i len:16
258 int_mul_ovf: dest:i src1:i src2:i len:16
259 int_mul_ovf_un: dest:i src1:i src2:i len:16
260 int_sub_ovf: dest:i src1:i src2:i len:16
261 int_sub_ovf_un: dest:i src1:i src2:i len:16
263 int_adc: dest:i src1:i src2:i len:4
264 int_addcc: dest:i src1:i src2:i len:4
265 int_subcc: dest:i src1:i src2:i len:4
266 int_sbb: dest:i src1:i src2:i len:4
267 int_adc_imm: dest:i src1:i len:12
268 int_sbb_imm: dest:i src1:i len:12
270 int_add_imm: dest:i src1:i len:12
271 int_sub_imm: dest:i src1:i len:12
272 int_mul_imm: dest:i src1:i len:12
273 int_div_imm: dest:i src1:i len:20
274 int_div_un_imm: dest:i src1:i len:12
275 int_rem_imm: dest:i src1:i len:28
276 int_rem_un_imm: dest:i src1:i len:16
277 int_and_imm: dest:i src1:i len:12
278 int_or_imm: dest:i src1:i len:12
279 int_xor_imm: dest:i src1:i len:12
280 int_shl_imm: dest:i src1:i len:8
281 int_shr_imm: dest:i src1:i len:8
282 int_shr_un_imm: dest:i src1:i len:8
284 int_ceq: dest:i len:12
285 int_cgt: dest:i len:12
286 int_cgt_un: dest:i len:12
287 int_clt: dest:i len:12
288 int_clt_un: dest:i len:12
291 cond_exc_ine_un: len:8
293 cond_exc_ilt_un: len:8
295 cond_exc_igt_un: len:8
297 cond_exc_ige_un: len:8
299 cond_exc_ile_un: len:8
305 icompare: src1:i src2:i len:4
306 icompare_imm: src1:i len:12
308 long_conv_to_ovf_i4_2: dest:i src1:i src2:i len:32
310 vcall2: len:20 clob:c
311 vcall2_reg: src1:i len:8 clob:c
312 vcall2_membase: src1:b len:16 clob:c
314 jump_table: dest:i len:8
316 atomic_cas_i4: src1:b src2:i src3:i dest:i len:30