i386/i386.reference/CMPS.htm

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   4 <TITLE>80386 Programmer's Reference Manual -- Opcode CMPS</TITLE>
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   8 Chapter 17 -- 80386 Instruction Set</A><BR>
   9 <B>prev:</B><A HREF="CMP.htm"> CMP Compare Two Operands</A><BR>
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  12 <P>
  13 <HR>
  14 <P>
  15 <H1>CMPS/CMPSB/CMPSW/CMPSD -- Compare String Operands</H1>
  16
  17 <PRE>
  18 Opcode    Instruction        Clocks   Description
  19
  20 A6        CMPS m8,m8         10       Compare bytes ES:[(E)DI] (second
  21                                       operand) with   [(E)SI] (first
  22                                       operand)
  23 A7        CMPS m16,m16       10       Compare words ES:[(E)DI] (second
  24                                       operand) with   [(E)SI] (first
  25                                       operand)
  26 A7        CMPS m32,m32       10       Compare dwords ES:[(E)DI]
  27                                       (second operand) with [(E)SI]
  28                                       (first operand)
  29 A6        CMPSB              10       Compare bytes ES:[(E)DI] with
  30                                       DS:[SI]
  31 A7        CMPSW              10       Compare words ES:[(E)DI] with
  32                                       DS:[SI]
  33 A7        CMPSD              10       Compare dwords ES:[(E)DI] with
  34                                       DS:[SI]
  35 </PRE>
  36
  37 <H2>Operation</H2>
  38
  39 <PRE>
  40 IF (instruction = CMPSD) OR
  41    (instruction has operands of type DWORD)
  42 THEN OperandSize := 32;
  43 ELSE OperandSize := 16;
  44 FI;
  45 IF AddressSize = 16
  46 THEN
  47    use SI for source-index and DI for destination-index
  48 ELSE (* AddressSize = 32 *)
  49    use ESI for source-index and EDI for destination-index;
  50 FI;
  51 IF byte type of instruction
  52 THEN
  53    [source-index] - [destination-index]; (* byte comparison *)
  54    IF DF = 0 THEN IncDec := 1 ELSE IncDec := -1; FI;
  55 ELSE
  56    IF OperandSize = 16
  57    THEN
  58       [source-index] - [destination-index]; (* word comparison *)
  59       IF DF = 0 THEN IncDec := 2 ELSE IncDec := -2; FI;
  60    ELSE (* OperandSize = 32 *)
  61       [source-index] - [destination-index]; (* dword comparison *)
  62       IF DF = 0 THEN IncDec := 4 ELSE IncDec := -4; FI;
  63    FI;
  64 FI;
  65 source-index := source-index + IncDec;
  66 destination-index := destination-index + IncDec;
  67 </PRE>
  68
  69 <H2>Description</H2>
  70
  71 CMPS compares the byte, word, or doubleword pointed to by the source-index
  72 register with the byte, word, or doubleword pointed to by the
  73 destination-index register.
  74 <P>
  75 If the address-size attribute of this instruction is 16 bits, SI and DI
  76 will be used for source- and destination-index registers; otherwise ESI and
  77 EDI will be used. Load the correct index values into SI and DI (or ESI and
  78 EDI) before executing CMPS.
  79 <P>
  80 The comparison is done by subtracting the operand indexed by
  81 the destination-index register from the operand indexed by the source-index
  82 register.
  83 <P>
  84 Note that the direction of subtraction for CMPS is [SI] - [DI] or
  85 [ESI] - [EDI]. The left operand (SI or ESI) is the source and the right
  86 operand (DI or EDI) is the destination. This is the reverse of the usual
  87 Intel convention in which the left operand is the destination and the right
  88 operand is the source.
  89 <P>
  90 The result of the subtraction is not stored; only the flags reflect the
  91 change. The types of the operands determine whether bytes, words, or
  92 doublewords are compared. For the first operand (SI or ESI), the DS register
  93 is used, unless a segment override byte is present. The second operand (DI
  94 or EDI) must be addressable from the ES register; no segment override is
  95 possible.
  96 <P>
  97 After the comparison is made, both the source-index register and
  98 destination-index register are automatically advanced. If the direction flag
  99 is 0 (<A HREF="CLD.htm">CLD</A> was executed), the registers increment; if the direction flag is 1
 100 (<A HREF="STD.htm">STD</A> was executed),
 101 the registers decrement. The registers increment or
 102 decrement by 1 if a byte is compared, by 2 if a word is compared, or by 4 if
 103 a doubleword is compared.
 104 <P>
 105 CMPSB, CMPSW and CMPSD are synonyms for the byte, word, and
 106 doubleword CMPS instructions, respectively.
 107 <P>
 108 CMPS can be preceded by the
 109 <A HREF="REP.htm">REPE</A> or <A HREF="REP.htm">REPNE</A>
 110 prefix for block comparison of CX
 111 or ECX bytes, words, or doublewords. Refer to the description of the
 112 <A HREF="REP.htm">REP</A>
 113 instruction for more information on this operation.
 114
 115 <H2>Flags Affected</H2>
 116
 117 OF, SF, ZF, AF, PF, and CF as described in <A HREF="appc.htm">Appendix C</A>
 118
 119 <H2>Protected Mode Exceptions</H2>
 120
 121 #GP(0) for an illegal memory operand effective address in the CS, DS, ES,
 122 FS, or GS segments; #SS(0) for an illegal address in the SS segment;
 123 #PF(fault-code) for a page fault
 124
 125 <H2>Real Address Mode Exceptions</H2>
 126
 127 Interrupt 13 if any part of the operand would lie outside of the effective
 128 address space from 0 to 0FFFFH
 129
 130 <H2>Virtual 8086 Mode Exceptions</H2>
 131
 132 Same exceptions as in Real Address Mode; #PF (fault-code) for a page fault
 133
 134
 135 <P>
 136 <HR>
 137 <P>
 138 <B>up:</B> <A HREF="c17.htm">
 139 Chapter 17 -- 80386 Instruction Set</A><BR>
 140 <B>prev:</B><A HREF="CMP.htm"> CMP Compare Two Operands</A><BR>
 141 <B>next:</B><A HREF="CWD.htm"> CWD/CDQ  Convert Word to Doubleword/Convert Doubleword to Quadword</A>
 142
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