i386/i386.reference/BTR.htm

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   4 <TITLE>80386 Programmer's Reference Manual -- Opcode BTR</TITLE>
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  13 <P>
  14 <H1>BTR -- Bit Test and Reset</H1>
  15 <PRE>
  16 Opcode        Instruction     Clocks  Description
  17
  18 0F  B3        BTR r/m16,r16   6/13    Save bit in carry flag and reset
  19 0F  B3        BTR r/m32,r32   6/13    Save bit in carry flag and reset
  20 0F  BA /6 ib  BTR r/m16,imm8  6/8     Save bit in carry flag and reset
  21 0F  BA /6 ib  BTR r/m32,imm8  6/8     Save bit in carry flag and reset
  22 </PRE>
  23
  24 <H2>Operation</H2>
  25 <PRE>
  26 CF := BIT[LeftSRC, RightSRC];
  27 BIT[LeftSRC, RightSRC] := 0;
  28 </PRE>
  29
  30 <H2>Description</H2>
  31
  32 BTR saves the value of the bit indicated by the base (first operand) and the
  33 bit offset (second operand) into the carry flag and then stores 0 in the
  34 bit.
  35
  36 <H2>Flags Affected</H2>
  37
  38 CF as described above
  39
  40 <H2>Protected Mode Exceptions</H2>
  41
  42 #GP(0) if the result is in a nonwritable segment; #GP(0) for an illegal
  43 memory operand effective address in the CS, DS, ES, FS, or GS segments;
  44 #SS(0) for an illegal address in the SS segment; #PF(fault-code) for a page
  45 fault
  46
  47 <H2>Real Address Mode Exceptions</H2>
  48
  49 Interrupt 13 if any part of the operand would lie outside of the effective
  50 address space from 0 to 0FFFFH
  51
  52 <H2>Virtual 8086 Mode Exceptions</H2>
  53
  54 Same exceptions as in Real Address Mode; #PF(fault-code) for a page fault
  55
  56 <H2>Notes</H2>
  57
  58 The index of the selected bit can be given by the immediate constant in the
  59 instruction or by a value in a general register. Only an 8-bit immediate
  60 value is used in the instruction. This operand is taken modulo 32, so the
  61 range of immediate bit offsets is 0..31. This allows any bit within a
  62 register to be selected. For memory bit strings, this immediate field gives
  63 only the bit offset within a word or doubleword. Immediate bit offsets
  64 larger than 31 (or 15) are supported by using the immediate bit offset field
  65 in combination with the displacement field of the memory operand. The
  66 low-order 3 to 5 bits of the immediate bit offset are stored in the
  67 immediate bit offset field, and the high-order 27 to 29 bits are shifted and
  68 combined with the byte displacement in the addressing mode.
  69 <P>
  70 When accessing a bit in memory, the 80386 may access four bytes starting
  71 from the memory address given by:
  72 <PRE>
  73    Effective Address + 4 * (BitOffset DIV 32)
  74 </PRE>
  75 for a 32-bit operand size, or two bytes starting from the memory address
  76 given by:
  77 <PRE>
  78    Effective Address + 2 * (BitOffset DIV 16)
  79 </PRE>
  80 for a 16-bit operand size. It may do so even when only a single byte needs
  81 to be accessed in order to reach the given bit. You must therefore avoid
  82 referencing areas of memory close to address space holes. In particular,
  83 avoid references to memory-mapped I/O registers. Instead, use the
  84 <A HREF="MOV.htm">MOV</A>
  85 instructions to load from or store to these addresses, and use the register
  86 form of these instructions to manipulate the data.
  87
  88
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  92 <B>up:</B> <A HREF="c17.htm">
  93 Chapter 17 -- 80386 Instruction Set</A><BR>
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