From 3c5a72b146ed6f9942a456d653b594db34c6284f Mon Sep 17 00:00:00 2001 From: Rafael Espindola Date: Sun, 28 Nov 2010 21:16:39 +0000 Subject: [PATCH] Move lowering of TLS_addr32 and TLS_addr64 to X86MCInstLower. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120263 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86ISelLowering.cpp | 41 ----------------------- lib/Target/X86/X86InstrCompiler.td | 6 ++-- lib/Target/X86/X86MCInstLower.cpp | 66 +++++++++++++++++++++++++++++++++++++- 3 files changed, 67 insertions(+), 46 deletions(-) diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 91768d4b9e..6793b70dd5 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -9923,44 +9923,6 @@ X86TargetLowering::EmitLoweredTLSCall(MachineInstr *MI, } MachineBasicBlock * -X86TargetLowering::emitLoweredTLSAddr(MachineInstr *MI, - MachineBasicBlock *BB) const { - const X86InstrInfo *TII - = static_cast(getTargetMachine().getInstrInfo()); - DebugLoc DL = MI->getDebugLoc(); - if (Subtarget->is64Bit()) { - BuildMI(*BB, MI, DL, TII->get(X86::DATA16_PREFIX)); - MachineInstrBuilder MIB = BuildMI(*BB, MI, DL, TII->get(X86::LEA64r), - X86::RDI); - X86AddressMode Addr; - Addr.GV = MI->getOperand(3).getGlobal(); - Addr.GVOpFlags = MI->getOperand(3).getTargetFlags(); - Addr.Base.Reg = X86::RIP; - addFullAddress(MIB, Addr); - BuildMI(*BB, MI, DL, TII->get(X86::DATA16_PREFIX)); - BuildMI(*BB, MI, DL, TII->get(X86::DATA16_PREFIX)); - BuildMI(*BB, MI, DL, TII->get(X86::REX64_PREFIX)); - BuildMI(*BB, MI, DL, TII->get(X86::CALL64pcrel32)) - .addExternalSymbol("__tls_get_addr", X86II::MO_PLT) - .addReg(X86::RDI, RegState::Implicit); - } else { - MachineInstrBuilder MIB = BuildMI(*BB, MI, DL, TII->get(X86::LEA32r), - X86::EAX); - X86AddressMode Addr; - Addr.GV = MI->getOperand(3).getGlobal(); - Addr.GVOpFlags = MI->getOperand(3).getTargetFlags(); - Addr.IndexReg = X86::EBX; - addFullAddress(MIB, Addr); - BuildMI(*BB, MI, DL, TII->get(X86::CALLpcrel32)) - .addExternalSymbol("___tls_get_addr", X86II::MO_PLT) - .addReg(X86::EAX, RegState::Implicit); - } - - MI->eraseFromParent(); // The pseudo instruction is gone now. - return BB; -} - -MachineBasicBlock * X86TargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI, MachineBasicBlock *BB) const { switch (MI->getOpcode()) { @@ -9970,9 +9932,6 @@ X86TargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI, case X86::TLSCall_32: case X86::TLSCall_64: return EmitLoweredTLSCall(MI, BB); - case X86::TLS_addr32: - case X86::TLS_addr64: - return emitLoweredTLSAddr(MI, BB); case X86::CMOV_GR8: case X86::CMOV_FR32: case X86::CMOV_FR64: diff --git a/lib/Target/X86/X86InstrCompiler.td b/lib/Target/X86/X86InstrCompiler.td index 447ac815ca..26a763e71e 100644 --- a/lib/Target/X86/X86InstrCompiler.td +++ b/lib/Target/X86/X86InstrCompiler.td @@ -242,8 +242,7 @@ let Defs = [EAX, ECX, EDX, FP0, FP1, FP2, FP3, FP4, FP5, FP6, ST0, MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7, XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7, XMM8, XMM9, XMM10, XMM11, XMM12, XMM13, XMM14, XMM15, EFLAGS], - Uses = [ESP], - usesCustomInserter = 1 in + Uses = [ESP] in def TLS_addr32 : I<0, Pseudo, (outs), (ins i32mem:$sym), "# TLS_addr32", [(X86tlsaddr tls32addr:$sym)]>, @@ -257,8 +256,7 @@ let Defs = [RAX, RCX, RDX, RSI, RDI, R8, R9, R10, R11, MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7, XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7, XMM8, XMM9, XMM10, XMM11, XMM12, XMM13, XMM14, XMM15, EFLAGS], - Uses = [RSP], - usesCustomInserter = 1 in + Uses = [RSP] in def TLS_addr64 : I<0, Pseudo, (outs), (ins i64mem:$sym), "# TLS_addr64", [(X86tlsaddr tls64addr:$sym)]>, diff --git a/lib/Target/X86/X86MCInstLower.cpp b/lib/Target/X86/X86MCInstLower.cpp index 05a5de6ea6..3ca87ed877 100644 --- a/lib/Target/X86/X86MCInstLower.cpp +++ b/lib/Target/X86/X86MCInstLower.cpp @@ -525,6 +525,66 @@ ReSimplify: } } +static void LowerTlsAddr(MCStreamer &OutStreamer, + X86MCInstLower &MCInstLowering, + const MachineInstr &MI) { + bool is64Bits = MI.getOpcode() == X86::TLS_addr64; + MCContext &context = OutStreamer.getContext(); + + if (is64Bits) { + MCInst prefix; + prefix.setOpcode(X86::DATA16_PREFIX); + OutStreamer.EmitInstruction(prefix); + } + MCSymbol *sym = MCInstLowering.GetSymbolFromOperand(MI.getOperand(3)); + const MCSymbolRefExpr *symRef = + MCSymbolRefExpr::Create(sym, MCSymbolRefExpr::VK_TLSGD, context); + + MCInst LEA; + if (is64Bits) { + LEA.setOpcode(X86::LEA64r); + LEA.addOperand(MCOperand::CreateReg(X86::RDI)); // dest + LEA.addOperand(MCOperand::CreateReg(X86::RIP)); // base + LEA.addOperand(MCOperand::CreateImm(1)); // scale + LEA.addOperand(MCOperand::CreateReg(0)); // index + LEA.addOperand(MCOperand::CreateExpr(symRef)); // disp + LEA.addOperand(MCOperand::CreateReg(0)); // seg + } else { + LEA.setOpcode(X86::LEA32r); + LEA.addOperand(MCOperand::CreateReg(X86::EAX)); // dest + LEA.addOperand(MCOperand::CreateReg(0)); // base + LEA.addOperand(MCOperand::CreateImm(1)); // scale + LEA.addOperand(MCOperand::CreateReg(X86::EBX)); // index + LEA.addOperand(MCOperand::CreateExpr(symRef)); // disp + LEA.addOperand(MCOperand::CreateReg(0)); // seg + } + OutStreamer.EmitInstruction(LEA); + + if (is64Bits) { + MCInst prefix; + prefix.setOpcode(X86::DATA16_PREFIX); + OutStreamer.EmitInstruction(prefix); + prefix.setOpcode(X86::DATA16_PREFIX); + OutStreamer.EmitInstruction(prefix); + prefix.setOpcode(X86::REX64_PREFIX); + OutStreamer.EmitInstruction(prefix); + } + + MCInst call; + if (is64Bits) + call.setOpcode(X86::CALL64pcrel32); + else + call.setOpcode(X86::CALLpcrel32); + StringRef name = is64Bits ? "__tls_get_addr" : "___tls_get_addr"; + MCSymbol *tlsGetAddr = context.GetOrCreateSymbol(name); + const MCSymbolRefExpr *tlsRef = + MCSymbolRefExpr::Create(tlsGetAddr, + MCSymbolRefExpr::VK_PLT, + context); + + call.addOperand(MCOperand::CreateExpr(tlsRef)); + OutStreamer.EmitInstruction(call); +} void X86AsmPrinter::EmitInstruction(const MachineInstr *MI) { X86MCInstLower MCInstLowering(Mang, *MF, *this); @@ -559,7 +619,11 @@ void X86AsmPrinter::EmitInstruction(const MachineInstr *MI) { // Lower these as normal, but add some comments. OutStreamer.AddComment("TAILCALL"); break; - + + case X86::TLS_addr32: + case X86::TLS_addr64: + return LowerTlsAddr(OutStreamer, MCInstLowering, *MI); + case X86::MOVPC32r: { MCInst TmpInst; // This is a pseudo op for a two instruction sequence with a label, which -- 2.11.4.GIT