Set instruction encoding bits 4 and 7 for ARM register-register and
commitcfb46c5a762f118fbe73fb50eec5be56a1fcd247
authorBob Wilson <bob.wilson@apple.com>
Wed, 14 Oct 2009 19:00:24 +0000 (14 19:00 +0000)
committerBob Wilson <bob.wilson@apple.com>
Wed, 14 Oct 2009 19:00:24 +0000 (14 19:00 +0000)
tree746446b5be9f293dd46d5a44d174543324906df9
parente4ff1a619f2a68222def8d30406ceb9f768ad410
Set instruction encoding bits 4 and 7 for ARM register-register and
register-shifted-register instructions.  Patch by Johnny Chen.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84124 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM/ARMInstrInfo.td