[Thumb-1] Synthesize TBB/TBH instructions to make use of compressed jump tables
commit9b12d6a515fb4d0ea205d590e229ee636422056f
authorJames Molloy <james.molloy@arm.com>
Tue, 1 Nov 2016 13:37:41 +0000 (1 13:37 +0000)
committerJames Molloy <james.molloy@arm.com>
Tue, 1 Nov 2016 13:37:41 +0000 (1 13:37 +0000)
tree27368717f26c25c896444ba797e5375648fdf765
parenta66e032afa93483908be19cce9b43d3240454653
[Thumb-1] Synthesize TBB/TBH instructions to make use of compressed jump tables

[Reapplying r284580 and r285917 with fix and testing to ensure emitted jump tables for Thumb-1 have 4-byte alignment]

The TBB and TBH instructions in Thumb-2 allow jump tables to be compressed into sequences of bytes or shorts respectively. These instructions do not exist in Thumb-1, however it is possible to synthesize them out of a sequence of other instructions.

It turns out this sequence is so short that it's almost never a lose for performance and is ALWAYS a significant win for code size.

TBB example:
Before: lsls r0, r0, #2    After: add  r0, pc
        adr  r1, .LJTI0_0         ldrb r0, [r0, #6]
        ldr  r0, [r0, r1]         lsls r0, r0, #1
        mov  pc, r0               add  pc, r0
  => No change in prologue code size or dynamic instruction count. Jump table shrunk by a factor of 4.

The only case that can increase dynamic instruction count is the TBH case:

Before: lsls r0, r4, #2    After: lsls r4, r4, #1
        adr  r1, .LJTI0_0         add  r4, pc
        ldr  r0, [r0, r1]         ldrh r4, [r4, #6]
        mov  pc, r0               lsls r4, r4, #1
                                  add  pc, r4
  => 1 more instruction in prologue. Jump table shrunk by a factor of 2.

So there is an argument that this should be disabled when optimizing for performance (and a TBH needs to be generated). I'm not so sure about that in practice, because on small cores with Thumb-1 performance is often tied to code size. But I'm willing to turn it off when optimizing for performance if people want (also note that TBHs are fairly rare in practice!)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@285690 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM/ARMAsmPrinter.cpp
lib/Target/ARM/ARMConstantIslandPass.cpp
lib/Target/ARM/ARMInstrThumb.td
test/CodeGen/ARM/arm-position-independence-jump-table.ll
test/CodeGen/ARM/constant-island-crash.ll [new file with mode: 0644]
test/CodeGen/ARM/jump-table-tbh.ll [new file with mode: 0644]
test/CodeGen/Thumb2/thumb2-jtb.ll
test/CodeGen/Thumb2/thumb2-tbb.ll
test/CodeGen/Thumb2/thumb2-tbh.ll