| commit | 87f50aafbc14baf74a23c7b9f060df315ca66fea | |
| author | James Molloy <james.molloy@arm.com> | |
| Tue, 7 Jun 2016 12:13:34 +0000 (7 12:13 +0000) | ||
| committer | James Molloy <james.molloy@arm.com> | |
| Tue, 7 Jun 2016 12:13:34 +0000 (7 12:13 +0000) | ||
| tree | f8ad9c95322e98f47dbcaa94d79a9cc0fcc9e2ba | treesnapshot (tar.gz zip) |
| parent | d5127f42734f9808ec9012def67674ea5d421efd | commitdiff |
[ARM] Shrink post-indexed LDR and STR to LDM/STM
A Thumb-2 post-indexed LDR instruction such as:
ldr.w r0, [r1], #4
Can be rewritten as:
ldm.n r1!, {r0}
LDMs can be more expensive than LDRs on some cores, so this has been enabled only in minsize mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@272002 91177308-0d34-0410-b5e6-96231b3b80d8
A Thumb-2 post-indexed LDR instruction such as:
ldr.w r0, [r1], #4
Can be rewritten as:
ldm.n r1!, {r0}
LDMs can be more expensive than LDRs on some cores, so this has been enabled only in minsize mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@272002 91177308-0d34-0410-b5e6-96231b3b80d8
| lib/Target/ARM/Thumb2SizeReduction.cpp | diffblobblamehistory | |
| test/CodeGen/ARM/t2-shrink-ldrpost.ll | [new file with mode: 0644] | blob |