| commit | 72375211067ec21ec0aee977482a239eb98b747e | |
| author | David Green <david.green@arm.com> | |
| Wed, 28 Aug 2019 10:13:23 +0000 (28 10:13 +0000) | ||
| committer | David Green <david.green@arm.com> | |
| Wed, 28 Aug 2019 10:13:23 +0000 (28 10:13 +0000) | ||
| tree | affc545e15d63128db6436f56229f0d4547ebce0 | treesnapshot (tar.gz zip) |
| parent | 55fd6ec301489bbcdc1c9a9a3ea68d125db0fda8 | commitdiff |
[MVE] VMOVX patterns
This adds fp16 VMOVX patterns, using the same patterns as rL362482 with some
adjustments for MVE. It allows us to move fp16 registers without going into and
out of gprs.
VMOVX is able to move the top bits from a fp16 in a fp reg into the bottom bits
of another register, zeroing the rest. This can be used for odd MVE register
lanes. The top bits are not read by fp16 instructions, so no move is required
there if we are dealing with even lanes.
Differential revision: https://reviews.llvm.org/D66793
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@370184 91177308-0d34-0410-b5e6-96231b3b80d8
This adds fp16 VMOVX patterns, using the same patterns as rL362482 with some
adjustments for MVE. It allows us to move fp16 registers without going into and
out of gprs.
VMOVX is able to move the top bits from a fp16 in a fp reg into the bottom bits
of another register, zeroing the rest. This can be used for odd MVE register
lanes. The top bits are not read by fp16 instructions, so no move is required
there if we are dealing with even lanes.
Differential revision: https://reviews.llvm.org/D66793
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@370184 91177308-0d34-0410-b5e6-96231b3b80d8
14 files changed: