| commit | 6ede5aa716b10e7a4c8f9babb22c043139d61bac | |
| author | James Molloy <james.molloy@arm.com> | |
| Mon, 13 Feb 2017 14:07:39 +0000 (13 14:07 +0000) | ||
| committer | James Molloy <james.molloy@arm.com> | |
| Mon, 13 Feb 2017 14:07:39 +0000 (13 14:07 +0000) | ||
| tree | 7cb54b8c6a403a7d9572cbfbb823c9e0935e9887 | treesnapshot (tar.gz zip) |
| parent | 6283084264af077479b7fd1f01c0baaab4a6540b | commitdiff |
[Thumb-1] TBB generation: spot redefinitions of index register
We match a sequence of 3-4 instructions into a tTBB pseudo. One of our checks is that
a particular register in that sequence is killed (so it can be clobbered by the pseudo).
We weren't noticing if an errant MOV or other instruction had infiltrated the
sequence we were walking. If it had, and it defined the register we've already
identified as killed, it makes it live across the tBR_JT and thus unclobberable.
Notice this case and bail out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294949 91177308-0d34-0410-b5e6-96231b3b80d8
We match a sequence of 3-4 instructions into a tTBB pseudo. One of our checks is that
a particular register in that sequence is killed (so it can be clobbered by the pseudo).
We weren't noticing if an errant MOV or other instruction had infiltrated the
sequence we were walking. If it had, and it defined the register we've already
identified as killed, it makes it live across the tBR_JT and thus unclobberable.
Notice this case and bail out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294949 91177308-0d34-0410-b5e6-96231b3b80d8
| lib/Target/ARM/ARMConstantIslandPass.cpp | diffblobblamehistory | |
| test/CodeGen/Thumb/tbb-reuse.mir | [new file with mode: 0644] | blob |