[ARM] Generate 8.1-m CSINC, CSNEG and CSINV instructions.
commit6d35d1e60c2be9612b64eda7194b1131ab7d8d2d
authorDavid Green <david.green@arm.com>
Tue, 3 Sep 2019 10:53:07 +0000 (3 10:53 +0000)
committerDavid Green <david.green@arm.com>
Tue, 3 Sep 2019 10:53:07 +0000 (3 10:53 +0000)
treecfea8c2acb1d9cf2c5d9dbbbfcbf4fcce8444877
parent080a37afd8a3c36daf6948aa5bd83ad1528988fb
[ARM] Generate 8.1-m CSINC, CSNEG and CSINV instructions.

Arm 8.1-M adds a number of related CSEL instructions, including CSINC, CSNEG and CSINV. These choose between two values given the content in CPSR and a condition, performing an increment, negation or inverse of the false value.

This adds some selection for them, either from constant values or patterns. It does not include CSEL directly, which is currently not always making code better. It is still useful, but we will have to check more carefully where it should and shouldn't be used.

Code by Ranjeet Singh and Simon Tatham, with some modifications from me.

Differential revision: https://reviews.llvm.org/D66483

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@370739 91177308-0d34-0410-b5e6-96231b3b80d8
24 files changed:
lib/Target/ARM/ARMBaseInstrInfo.cpp
lib/Target/ARM/ARMISelLowering.cpp
lib/Target/ARM/ARMISelLowering.h
lib/Target/ARM/ARMInstrFormats.td
lib/Target/ARM/ARMInstrInfo.td
lib/Target/ARM/ARMInstrThumb2.td
test/CodeGen/Thumb2/csel.ll
test/CodeGen/Thumb2/mve-abs.ll
test/CodeGen/Thumb2/mve-fmath.ll
test/CodeGen/Thumb2/mve-minmax.ll
test/CodeGen/Thumb2/mve-pred-and.ll
test/CodeGen/Thumb2/mve-pred-bitcast.ll
test/CodeGen/Thumb2/mve-pred-build-var.ll
test/CodeGen/Thumb2/mve-pred-ext.ll
test/CodeGen/Thumb2/mve-pred-loadstore.ll
test/CodeGen/Thumb2/mve-pred-not.ll
test/CodeGen/Thumb2/mve-pred-or.ll
test/CodeGen/Thumb2/mve-pred-xor.ll
test/CodeGen/Thumb2/mve-vcmp.ll
test/CodeGen/Thumb2/mve-vcmpf.ll
test/CodeGen/Thumb2/mve-vcmpfr.ll
test/CodeGen/Thumb2/mve-vcmpfz.ll
test/CodeGen/Thumb2/mve-vcmpr.ll
test/CodeGen/Thumb2/mve-vcmpz.ll