[ARM] MVE predicate register support
commit510ed947ffb78446a3c6d673e1216b731fae53c3
authorDavid Green <david.green@arm.com>
Wed, 24 Jul 2019 11:51:36 +0000 (24 11:51 +0000)
committerDavid Green <david.green@arm.com>
Wed, 24 Jul 2019 11:51:36 +0000 (24 11:51 +0000)
treed653a530b9ae238d849bbc3411f9ba044a123b79
parentae40b5742156d1ad91733522af49ba5b5ebae99b
[ARM] MVE predicate register support

This adds support code for building and shuffling i1 predicate registers. It
generally uses two basic principles, either converting the predicate into an
scalar (through a PREDICATE_CAST) and doing scalar operations on it there, or
by converting the register to an full vector register and back.

Some of the code here is a not super efficient but will hopefully cover most
cases of moving i1 vectors around and can be improved in subsequent patches.

Some code by David Sherwood.

Differential Revision: https://reviews.llvm.org/D65052

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@366890 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM/ARMISelLowering.cpp
lib/Target/ARM/ARMISelLowering.h
lib/Target/ARM/ARMInstrMVE.td
test/CodeGen/Thumb2/mve-pred-build-const.ll [new file with mode: 0644]
test/CodeGen/Thumb2/mve-pred-build-var.ll [new file with mode: 0644]
test/CodeGen/Thumb2/mve-pred-ext.ll [new file with mode: 0644]
test/CodeGen/Thumb2/mve-pred-shuffle.ll [new file with mode: 0644]
test/CodeGen/Thumb2/mve-pred-spill.ll [new file with mode: 0644]
test/CodeGen/Thumb2/mve-vcmp.ll