perf/x86/amd/uncore: Update sysfs attributes for Family17h processors
commitda6adaea2b7ef658c61a557c28508668eac29fe1
authorJanakarajan Natarajan <Janakarajan.Natarajan@amd.com>
Mon, 16 Jan 2017 23:36:23 +0000 (16 17:36 -0600)
committerIngo Molnar <mingo@kernel.org>
Mon, 30 Jan 2017 11:01:18 +0000 (30 12:01 +0100)
tree150a42e3a1dda2e98cb04afeb19cba4b7b487bdd
parentbc1daef6b5da574bca0a2ec7f9b4d0c5fe0c7d11
perf/x86/amd/uncore: Update sysfs attributes for Family17h processors

This patch updates the sysfs attributes for AMD Family17h processors. In
Family17h, the event bit position is changed for both the NorthBridge
and Last level cache counters.

The sysfs attributes are assigned based on the family and the type of
the counter.

Signed-off-by: Janakarajan Natarajan <Janakarajan.Natarajan@amd.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Arnaldo Carvalho de Melo <acme@kernel.org>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Vince Weaver <vincent.weaver@maine.edu>
Link: http://lkml.kernel.org/r/617570ed3634e804991f95db62c3cf3856a9d2a7.1484598705.git.Janakarajan.Natarajan@amd.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
arch/x86/events/amd/uncore.c