| commit | ad58d4d4a274e9290725188c557d16e7d0cd1b3d | |
| author | James Hogan <james.hogan@imgtec.com> | |
| Mon, 2 Feb 2015 22:55:17 +0000 (2 22:55 +0000) | ||
| committer | James Hogan <james.hogan@imgtec.com> | |
| Fri, 3 Feb 2017 15:21:33 +0000 (3 15:21 +0000) | ||
| tree | a5a4afc16d129f58d94c6af4c18a2252cb05508d | treesnapshot (tar.gz zip) |
| parent | 013044cc65f8661c5fa2b59da5e134b3453d975d | commitdiff |
KVM: MIPS/T&E: Expose read-only CP0_IntCtl register
Expose the CP0_IntCtl register through the KVM register access API,
which is a required register since MIPS32r2. It is currently read-only
since the VS field isn't implemented due to lack of Config3.VInt or
Config3.VEIC.
It is implemented in trap_emul.c so that a VZ implementation can allow
writes.
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: "Radim Krčmář" <rkrcmar@redhat.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: kvm@vger.kernel.org
Expose the CP0_IntCtl register through the KVM register access API,
which is a required register since MIPS32r2. It is currently read-only
since the VS field isn't implemented due to lack of Config3.VInt or
Config3.VEIC.
It is implemented in trap_emul.c so that a VZ implementation can allow
writes.
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: "Radim Krčmář" <rkrcmar@redhat.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: kvm@vger.kernel.org
| Documentation/virtual/kvm/api.txt | diffblobblamehistory | |
| arch/mips/include/asm/kvm_host.h | diffblobblamehistory | |
| arch/mips/kvm/trap_emul.c | diffblobblamehistory |