| commit | 1dee3a3efdb877419639f3cafb1f91cfcf9c11ab | |
| author | Roger Quadros <rogerq@ti.com> | |
| Wed, 5 Dec 2018 17:27:44 +0000 (5 19:27 +0200) | ||
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | |
| Sun, 24 Nov 2019 07:23:33 +0000 (24 08:23 +0100) | ||
| tree | 1b118fdc68cb9b147c56c435269c6ae7c7ecdb52 | treesnapshot (tar.gz zip) |
| parent | 75f10bdb5595455425d6c5a0381379d89967c40b | commitdiff |
ARM: dts: omap5: Fix dual-role mode on Super-Speed port
[ Upstream commit a763ecc15d0e37c3a15ff6825183061209832685 ]
OMAP5's Super-Speed USB port has a software mailbox register
that needs to be fed with VBUS and ID events from an external
VBUS/ID comparator.
Without this, Host role will not work correctly.
Fixes: 656c1a65ab55 ("ARM: dts: omap5: enable OTG role for DWC3 controller")
Reported-by: H. Nikolaus Schaller <hns@goldelico.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
[ Upstream commit a763ecc15d0e37c3a15ff6825183061209832685 ]
OMAP5's Super-Speed USB port has a software mailbox register
that needs to be fed with VBUS and ID events from an external
VBUS/ID comparator.
Without this, Host role will not work correctly.
Fixes: 656c1a65ab55 ("ARM: dts: omap5: enable OTG role for DWC3 controller")
Reported-by: H. Nikolaus Schaller <hns@goldelico.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
| arch/arm/boot/dts/omap5-board-common.dtsi | diffblobblamehistory |