2 * Copyright (C) 2004-2007 Freescale Semicondutor, Inc. All rights reserved.
4 * Author: Li Yang <leoli@freescale.com>
5 * Jiang Bo <tanya.jiang@freescale.com>
8 * Freescale high-speed USB SOC DR module device controller driver.
9 * This can be found on MPC8349E/MPC8313E cpus.
10 * The driver is previously named as mpc_udc. Based on bare board
11 * code from Dave Liu and Shlomi Gridish.
13 * This program is free software; you can redistribute it and/or modify it
14 * under the terms of the GNU General Public License as published by the
15 * Free Software Foundation; either version 2 of the License, or (at your
16 * option) any later version.
21 #include <linux/module.h>
22 #include <linux/kernel.h>
23 #include <linux/ioport.h>
24 #include <linux/types.h>
25 #include <linux/errno.h>
26 #include <linux/slab.h>
27 #include <linux/init.h>
28 #include <linux/list.h>
29 #include <linux/interrupt.h>
30 #include <linux/proc_fs.h>
32 #include <linux/moduleparam.h>
33 #include <linux/device.h>
34 #include <linux/usb/ch9.h>
35 #include <linux/usb/gadget.h>
36 #include <linux/usb/otg.h>
37 #include <linux/dma-mapping.h>
38 #include <linux/platform_device.h>
39 #include <linux/fsl_devices.h>
40 #include <linux/dmapool.h>
42 #include <asm/byteorder.h>
44 #include <asm/system.h>
45 #include <asm/unaligned.h>
48 #include "fsl_usb2_udc.h"
50 #define DRIVER_DESC "Freescale High-Speed USB SOC Device Controller driver"
51 #define DRIVER_AUTHOR "Li Yang/Jiang Bo"
52 #define DRIVER_VERSION "Apr 20, 2007"
54 #define DMA_ADDR_INVALID (~(dma_addr_t)0)
56 static const char driver_name
[] = "fsl-usb2-udc";
57 static const char driver_desc
[] = DRIVER_DESC
;
59 static struct usb_dr_device
*dr_regs
;
60 static struct usb_sys_interface
*usb_sys_regs
;
62 /* it is initialized in probe() */
63 static struct fsl_udc
*udc_controller
= NULL
;
65 static const struct usb_endpoint_descriptor
67 .bLength
= USB_DT_ENDPOINT_SIZE
,
68 .bDescriptorType
= USB_DT_ENDPOINT
,
69 .bEndpointAddress
= 0,
70 .bmAttributes
= USB_ENDPOINT_XFER_CONTROL
,
71 .wMaxPacketSize
= USB_MAX_CTRL_PAYLOAD
,
74 static void fsl_ep_fifo_flush(struct usb_ep
*_ep
);
77 #define fsl_readl(addr) in_le32(addr)
78 #define fsl_writel(val32, addr) out_le32(addr, val32)
80 #define fsl_readl(addr) readl(addr)
81 #define fsl_writel(val32, addr) writel(val32, addr)
84 /********************************************************************
85 * Internal Used Function
86 ********************************************************************/
87 /*-----------------------------------------------------------------
88 * done() - retire a request; caller blocked irqs
89 * @status : request status to be set, only works when
90 * request is still in progress.
91 *--------------------------------------------------------------*/
92 static void done(struct fsl_ep
*ep
, struct fsl_req
*req
, int status
)
94 struct fsl_udc
*udc
= NULL
;
95 unsigned char stopped
= ep
->stopped
;
96 struct ep_td_struct
*curr_td
, *next_td
;
99 udc
= (struct fsl_udc
*)ep
->udc
;
100 /* Removed the req from fsl_ep->queue */
101 list_del_init(&req
->queue
);
103 /* req.status should be set as -EINPROGRESS in ep_queue() */
104 if (req
->req
.status
== -EINPROGRESS
)
105 req
->req
.status
= status
;
107 status
= req
->req
.status
;
109 /* Free dtd for the request */
111 for (j
= 0; j
< req
->dtd_count
; j
++) {
113 if (j
!= req
->dtd_count
- 1) {
114 next_td
= curr_td
->next_td_virt
;
116 dma_pool_free(udc
->td_pool
, curr_td
, curr_td
->td_dma
);
120 dma_unmap_single(ep
->udc
->gadget
.dev
.parent
,
121 req
->req
.dma
, req
->req
.length
,
125 req
->req
.dma
= DMA_ADDR_INVALID
;
128 dma_sync_single_for_cpu(ep
->udc
->gadget
.dev
.parent
,
129 req
->req
.dma
, req
->req
.length
,
134 if (status
&& (status
!= -ESHUTDOWN
))
135 VDBG("complete %s req %p stat %d len %u/%u",
136 ep
->ep
.name
, &req
->req
, status
,
137 req
->req
.actual
, req
->req
.length
);
141 spin_unlock(&ep
->udc
->lock
);
142 /* complete() is from gadget layer,
143 * eg fsg->bulk_in_complete() */
144 if (req
->req
.complete
)
145 req
->req
.complete(&ep
->ep
, &req
->req
);
147 spin_lock(&ep
->udc
->lock
);
148 ep
->stopped
= stopped
;
151 /*-----------------------------------------------------------------
152 * nuke(): delete all requests related to this ep
153 * called with spinlock held
154 *--------------------------------------------------------------*/
155 static void nuke(struct fsl_ep
*ep
, int status
)
160 fsl_ep_fifo_flush(&ep
->ep
);
162 /* Whether this eq has request linked */
163 while (!list_empty(&ep
->queue
)) {
164 struct fsl_req
*req
= NULL
;
166 req
= list_entry(ep
->queue
.next
, struct fsl_req
, queue
);
167 done(ep
, req
, status
);
171 /*------------------------------------------------------------------
172 Internal Hardware related function
173 ------------------------------------------------------------------*/
175 static int dr_controller_setup(struct fsl_udc
*udc
)
177 unsigned int tmp
= 0, portctrl
= 0, ctrl
= 0;
178 unsigned long timeout
;
179 #define FSL_UDC_RESET_TIMEOUT 1000
181 /* Stop and reset the usb controller */
182 tmp
= fsl_readl(&dr_regs
->usbcmd
);
183 tmp
&= ~USB_CMD_RUN_STOP
;
184 fsl_writel(tmp
, &dr_regs
->usbcmd
);
186 tmp
= fsl_readl(&dr_regs
->usbcmd
);
187 tmp
|= USB_CMD_CTRL_RESET
;
188 fsl_writel(tmp
, &dr_regs
->usbcmd
);
190 /* Wait for reset to complete */
191 timeout
= jiffies
+ FSL_UDC_RESET_TIMEOUT
;
192 while (fsl_readl(&dr_regs
->usbcmd
) & USB_CMD_CTRL_RESET
) {
193 if (time_after(jiffies
, timeout
)) {
194 ERR("udc reset timeout!\n");
200 /* Set the controller as device mode */
201 tmp
= fsl_readl(&dr_regs
->usbmode
);
202 tmp
|= USB_MODE_CTRL_MODE_DEVICE
;
203 /* Disable Setup Lockout */
204 tmp
|= USB_MODE_SETUP_LOCK_OFF
;
205 fsl_writel(tmp
, &dr_regs
->usbmode
);
207 /* Clear the setup status */
208 fsl_writel(0, &dr_regs
->usbsts
);
210 tmp
= udc
->ep_qh_dma
;
211 tmp
&= USB_EP_LIST_ADDRESS_MASK
;
212 fsl_writel(tmp
, &dr_regs
->endpointlistaddr
);
214 VDBG("vir[qh_base] is %p phy[qh_base] is 0x%8x reg is 0x%8x",
215 udc
->ep_qh
, (int)tmp
,
216 fsl_readl(&dr_regs
->endpointlistaddr
));
218 /* Config PHY interface */
219 portctrl
= fsl_readl(&dr_regs
->portsc1
);
220 portctrl
&= ~(PORTSCX_PHY_TYPE_SEL
| PORTSCX_PORT_WIDTH
);
221 switch (udc
->phy_mode
) {
222 case FSL_USB2_PHY_ULPI
:
223 portctrl
|= PORTSCX_PTS_ULPI
;
225 case FSL_USB2_PHY_UTMI_WIDE
:
226 portctrl
|= PORTSCX_PTW_16BIT
;
228 case FSL_USB2_PHY_UTMI
:
229 portctrl
|= PORTSCX_PTS_UTMI
;
231 case FSL_USB2_PHY_SERIAL
:
232 portctrl
|= PORTSCX_PTS_FSLS
;
237 fsl_writel(portctrl
, &dr_regs
->portsc1
);
239 /* Config control enable i/o output, cpu endian register */
240 ctrl
= __raw_readl(&usb_sys_regs
->control
);
241 ctrl
|= USB_CTRL_IOENB
;
242 __raw_writel(ctrl
, &usb_sys_regs
->control
);
244 #if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
245 /* Turn on cache snooping hardware, since some PowerPC platforms
246 * wholly rely on hardware to deal with cache coherent. */
248 /* Setup Snooping for all the 4GB space */
249 tmp
= SNOOP_SIZE_2GB
; /* starts from 0x0, size 2G */
250 __raw_writel(tmp
, &usb_sys_regs
->snoop1
);
251 tmp
|= 0x80000000; /* starts from 0x8000000, size 2G */
252 __raw_writel(tmp
, &usb_sys_regs
->snoop2
);
258 /* Enable DR irq and set controller to run state */
259 static void dr_controller_run(struct fsl_udc
*udc
)
263 /* Enable DR irq reg */
264 temp
= USB_INTR_INT_EN
| USB_INTR_ERR_INT_EN
265 | USB_INTR_PTC_DETECT_EN
| USB_INTR_RESET_EN
266 | USB_INTR_DEVICE_SUSPEND
| USB_INTR_SYS_ERR_EN
;
268 fsl_writel(temp
, &dr_regs
->usbintr
);
270 /* Clear stopped bit */
273 /* Set the controller as device mode */
274 temp
= fsl_readl(&dr_regs
->usbmode
);
275 temp
|= USB_MODE_CTRL_MODE_DEVICE
;
276 fsl_writel(temp
, &dr_regs
->usbmode
);
278 /* Set controller to Run */
279 temp
= fsl_readl(&dr_regs
->usbcmd
);
280 temp
|= USB_CMD_RUN_STOP
;
281 fsl_writel(temp
, &dr_regs
->usbcmd
);
286 static void dr_controller_stop(struct fsl_udc
*udc
)
290 /* disable all INTR */
291 fsl_writel(0, &dr_regs
->usbintr
);
293 /* Set stopped bit for isr */
296 /* disable IO output */
297 /* usb_sys_regs->control = 0; */
299 /* set controller to Stop */
300 tmp
= fsl_readl(&dr_regs
->usbcmd
);
301 tmp
&= ~USB_CMD_RUN_STOP
;
302 fsl_writel(tmp
, &dr_regs
->usbcmd
);
307 static void dr_ep_setup(unsigned char ep_num
, unsigned char dir
,
308 unsigned char ep_type
)
310 unsigned int tmp_epctrl
= 0;
312 tmp_epctrl
= fsl_readl(&dr_regs
->endptctrl
[ep_num
]);
315 tmp_epctrl
|= EPCTRL_TX_DATA_TOGGLE_RST
;
316 tmp_epctrl
|= EPCTRL_TX_ENABLE
;
317 tmp_epctrl
|= ((unsigned int)(ep_type
)
318 << EPCTRL_TX_EP_TYPE_SHIFT
);
321 tmp_epctrl
|= EPCTRL_RX_DATA_TOGGLE_RST
;
322 tmp_epctrl
|= EPCTRL_RX_ENABLE
;
323 tmp_epctrl
|= ((unsigned int)(ep_type
)
324 << EPCTRL_RX_EP_TYPE_SHIFT
);
327 fsl_writel(tmp_epctrl
, &dr_regs
->endptctrl
[ep_num
]);
331 dr_ep_change_stall(unsigned char ep_num
, unsigned char dir
, int value
)
335 tmp_epctrl
= fsl_readl(&dr_regs
->endptctrl
[ep_num
]);
338 /* set the stall bit */
340 tmp_epctrl
|= EPCTRL_TX_EP_STALL
;
342 tmp_epctrl
|= EPCTRL_RX_EP_STALL
;
344 /* clear the stall bit and reset data toggle */
346 tmp_epctrl
&= ~EPCTRL_TX_EP_STALL
;
347 tmp_epctrl
|= EPCTRL_TX_DATA_TOGGLE_RST
;
349 tmp_epctrl
&= ~EPCTRL_RX_EP_STALL
;
350 tmp_epctrl
|= EPCTRL_RX_DATA_TOGGLE_RST
;
353 fsl_writel(tmp_epctrl
, &dr_regs
->endptctrl
[ep_num
]);
356 /* Get stall status of a specific ep
357 Return: 0: not stalled; 1:stalled */
358 static int dr_ep_get_stall(unsigned char ep_num
, unsigned char dir
)
362 epctrl
= fsl_readl(&dr_regs
->endptctrl
[ep_num
]);
364 return (epctrl
& EPCTRL_TX_EP_STALL
) ? 1 : 0;
366 return (epctrl
& EPCTRL_RX_EP_STALL
) ? 1 : 0;
369 /********************************************************************
370 Internal Structure Build up functions
371 ********************************************************************/
373 /*------------------------------------------------------------------
374 * struct_ep_qh_setup(): set the Endpoint Capabilites field of QH
375 * @zlt: Zero Length Termination Select (1: disable; 0: enable)
377 ------------------------------------------------------------------*/
378 static void struct_ep_qh_setup(struct fsl_udc
*udc
, unsigned char ep_num
,
379 unsigned char dir
, unsigned char ep_type
,
380 unsigned int max_pkt_len
,
381 unsigned int zlt
, unsigned char mult
)
383 struct ep_queue_head
*p_QH
= &udc
->ep_qh
[2 * ep_num
+ dir
];
384 unsigned int tmp
= 0;
386 /* set the Endpoint Capabilites in QH */
388 case USB_ENDPOINT_XFER_CONTROL
:
389 /* Interrupt On Setup (IOS). for control ep */
390 tmp
= (max_pkt_len
<< EP_QUEUE_HEAD_MAX_PKT_LEN_POS
)
393 case USB_ENDPOINT_XFER_ISOC
:
394 tmp
= (max_pkt_len
<< EP_QUEUE_HEAD_MAX_PKT_LEN_POS
)
395 | (mult
<< EP_QUEUE_HEAD_MULT_POS
);
397 case USB_ENDPOINT_XFER_BULK
:
398 case USB_ENDPOINT_XFER_INT
:
399 tmp
= max_pkt_len
<< EP_QUEUE_HEAD_MAX_PKT_LEN_POS
;
402 VDBG("error ep type is %d", ep_type
);
406 tmp
|= EP_QUEUE_HEAD_ZLT_SEL
;
407 p_QH
->max_pkt_length
= cpu_to_le32(tmp
);
412 /* Setup qh structure and ep register for ep0. */
413 static void ep0_setup(struct fsl_udc
*udc
)
415 /* the intialization of an ep includes: fields in QH, Regs,
417 struct_ep_qh_setup(udc
, 0, USB_RECV
, USB_ENDPOINT_XFER_CONTROL
,
418 USB_MAX_CTRL_PAYLOAD
, 0, 0);
419 struct_ep_qh_setup(udc
, 0, USB_SEND
, USB_ENDPOINT_XFER_CONTROL
,
420 USB_MAX_CTRL_PAYLOAD
, 0, 0);
421 dr_ep_setup(0, USB_RECV
, USB_ENDPOINT_XFER_CONTROL
);
422 dr_ep_setup(0, USB_SEND
, USB_ENDPOINT_XFER_CONTROL
);
428 /***********************************************************************
429 Endpoint Management Functions
430 ***********************************************************************/
432 /*-------------------------------------------------------------------------
433 * when configurations are set, or when interface settings change
434 * for example the do_set_interface() in gadget layer,
435 * the driver will enable or disable the relevant endpoints
436 * ep0 doesn't use this routine. It is always enabled.
437 -------------------------------------------------------------------------*/
438 static int fsl_ep_enable(struct usb_ep
*_ep
,
439 const struct usb_endpoint_descriptor
*desc
)
441 struct fsl_udc
*udc
= NULL
;
442 struct fsl_ep
*ep
= NULL
;
443 unsigned short max
= 0;
444 unsigned char mult
= 0, zlt
;
445 int retval
= -EINVAL
;
446 unsigned long flags
= 0;
448 ep
= container_of(_ep
, struct fsl_ep
, ep
);
450 /* catch various bogus parameters */
451 if (!_ep
|| !desc
|| ep
->desc
452 || (desc
->bDescriptorType
!= USB_DT_ENDPOINT
))
457 if (!udc
->driver
|| (udc
->gadget
.speed
== USB_SPEED_UNKNOWN
))
460 max
= le16_to_cpu(desc
->wMaxPacketSize
);
462 /* Disable automatic zlp generation. Driver is reponsible to indicate
463 * explicitly through req->req.zero. This is needed to enable multi-td
467 /* Assume the max packet size from gadget is always correct */
468 switch (desc
->bmAttributes
& 0x03) {
469 case USB_ENDPOINT_XFER_CONTROL
:
470 case USB_ENDPOINT_XFER_BULK
:
471 case USB_ENDPOINT_XFER_INT
:
472 /* mult = 0. Execute N Transactions as demonstrated by
473 * the USB variable length packet protocol where N is
474 * computed using the Maximum Packet Length (dQH) and
475 * the Total Bytes field (dTD) */
478 case USB_ENDPOINT_XFER_ISOC
:
479 /* Calculate transactions needed for high bandwidth iso */
480 mult
= (unsigned char)(1 + ((max
>> 11) & 0x03));
481 max
= max
& 0x8ff; /* bit 0~10 */
482 /* 3 transactions at most */
490 spin_lock_irqsave(&udc
->lock
, flags
);
491 ep
->ep
.maxpacket
= max
;
495 /* Controller related setup */
496 /* Init EPx Queue Head (Ep Capabilites field in QH
497 * according to max, zlt, mult) */
498 struct_ep_qh_setup(udc
, (unsigned char) ep_index(ep
),
499 (unsigned char) ((desc
->bEndpointAddress
& USB_DIR_IN
)
500 ? USB_SEND
: USB_RECV
),
501 (unsigned char) (desc
->bmAttributes
502 & USB_ENDPOINT_XFERTYPE_MASK
),
505 /* Init endpoint ctrl register */
506 dr_ep_setup((unsigned char) ep_index(ep
),
507 (unsigned char) ((desc
->bEndpointAddress
& USB_DIR_IN
)
508 ? USB_SEND
: USB_RECV
),
509 (unsigned char) (desc
->bmAttributes
510 & USB_ENDPOINT_XFERTYPE_MASK
));
512 spin_unlock_irqrestore(&udc
->lock
, flags
);
515 VDBG("enabled %s (ep%d%s) maxpacket %d",ep
->ep
.name
,
516 ep
->desc
->bEndpointAddress
& 0x0f,
517 (desc
->bEndpointAddress
& USB_DIR_IN
)
518 ? "in" : "out", max
);
523 /*---------------------------------------------------------------------
524 * @ep : the ep being unconfigured. May not be ep0
525 * Any pending and uncomplete req will complete with status (-ESHUTDOWN)
526 *---------------------------------------------------------------------*/
527 static int fsl_ep_disable(struct usb_ep
*_ep
)
529 struct fsl_udc
*udc
= NULL
;
530 struct fsl_ep
*ep
= NULL
;
531 unsigned long flags
= 0;
535 ep
= container_of(_ep
, struct fsl_ep
, ep
);
536 if (!_ep
|| !ep
->desc
) {
537 VDBG("%s not enabled", _ep
? ep
->ep
.name
: NULL
);
541 /* disable ep on controller */
542 ep_num
= ep_index(ep
);
543 epctrl
= fsl_readl(&dr_regs
->endptctrl
[ep_num
]);
545 epctrl
&= ~EPCTRL_TX_ENABLE
;
547 epctrl
&= ~EPCTRL_RX_ENABLE
;
548 fsl_writel(epctrl
, &dr_regs
->endptctrl
[ep_num
]);
550 udc
= (struct fsl_udc
*)ep
->udc
;
551 spin_lock_irqsave(&udc
->lock
, flags
);
553 /* nuke all pending requests (does flush) */
554 nuke(ep
, -ESHUTDOWN
);
558 spin_unlock_irqrestore(&udc
->lock
, flags
);
560 VDBG("disabled %s OK", _ep
->name
);
564 /*---------------------------------------------------------------------
565 * allocate a request object used by this endpoint
566 * the main operation is to insert the req->queue to the eq->queue
567 * Returns the request, or null if one could not be allocated
568 *---------------------------------------------------------------------*/
569 static struct usb_request
*
570 fsl_alloc_request(struct usb_ep
*_ep
, gfp_t gfp_flags
)
572 struct fsl_req
*req
= NULL
;
574 req
= kzalloc(sizeof *req
, gfp_flags
);
578 req
->req
.dma
= DMA_ADDR_INVALID
;
579 INIT_LIST_HEAD(&req
->queue
);
584 static void fsl_free_request(struct usb_ep
*_ep
, struct usb_request
*_req
)
586 struct fsl_req
*req
= NULL
;
588 req
= container_of(_req
, struct fsl_req
, req
);
594 /*-------------------------------------------------------------------------*/
595 static void fsl_queue_td(struct fsl_ep
*ep
, struct fsl_req
*req
)
597 int i
= ep_index(ep
) * 2 + ep_is_in(ep
);
598 u32 temp
, bitmask
, tmp_stat
;
599 struct ep_queue_head
*dQH
= &ep
->udc
->ep_qh
[i
];
601 /* VDBG("QH addr Register 0x%8x", dr_regs->endpointlistaddr);
602 VDBG("ep_qh[%d] addr is 0x%8x", i, (u32)&(ep->udc->ep_qh[i])); */
604 bitmask
= ep_is_in(ep
)
605 ? (1 << (ep_index(ep
) + 16))
606 : (1 << (ep_index(ep
)));
608 /* check if the pipe is empty */
609 if (!(list_empty(&ep
->queue
))) {
610 /* Add td to the end */
611 struct fsl_req
*lastreq
;
612 lastreq
= list_entry(ep
->queue
.prev
, struct fsl_req
, queue
);
613 lastreq
->tail
->next_td_ptr
=
614 cpu_to_le32(req
->head
->td_dma
& DTD_ADDR_MASK
);
615 /* Read prime bit, if 1 goto done */
616 if (fsl_readl(&dr_regs
->endpointprime
) & bitmask
)
620 /* Set ATDTW bit in USBCMD */
621 temp
= fsl_readl(&dr_regs
->usbcmd
);
622 fsl_writel(temp
| USB_CMD_ATDTW
, &dr_regs
->usbcmd
);
624 /* Read correct status bit */
625 tmp_stat
= fsl_readl(&dr_regs
->endptstatus
) & bitmask
;
627 } while (!(fsl_readl(&dr_regs
->usbcmd
) & USB_CMD_ATDTW
));
629 /* Write ATDTW bit to 0 */
630 temp
= fsl_readl(&dr_regs
->usbcmd
);
631 fsl_writel(temp
& ~USB_CMD_ATDTW
, &dr_regs
->usbcmd
);
637 /* Write dQH next pointer and terminate bit to 0 */
638 temp
= req
->head
->td_dma
& EP_QUEUE_HEAD_NEXT_POINTER_MASK
;
639 dQH
->next_dtd_ptr
= cpu_to_le32(temp
);
641 /* Clear active and halt bit */
642 temp
= cpu_to_le32(~(EP_QUEUE_HEAD_STATUS_ACTIVE
643 | EP_QUEUE_HEAD_STATUS_HALT
));
644 dQH
->size_ioc_int_sts
&= temp
;
646 /* Ensure that updates to the QH will occure before priming. */
649 /* Prime endpoint by writing 1 to ENDPTPRIME */
651 ? (1 << (ep_index(ep
) + 16))
652 : (1 << (ep_index(ep
)));
653 fsl_writel(temp
, &dr_regs
->endpointprime
);
658 /* Fill in the dTD structure
659 * @req: request that the transfer belongs to
660 * @length: return actually data length of the dTD
661 * @dma: return dma address of the dTD
662 * @is_last: return flag if it is the last dTD of the request
663 * return: pointer to the built dTD */
664 static struct ep_td_struct
*fsl_build_dtd(struct fsl_req
*req
, unsigned *length
,
665 dma_addr_t
*dma
, int *is_last
)
668 struct ep_td_struct
*dtd
;
670 /* how big will this transfer be? */
671 *length
= min(req
->req
.length
- req
->req
.actual
,
672 (unsigned)EP_MAX_LENGTH_TRANSFER
);
674 dtd
= dma_pool_alloc(udc_controller
->td_pool
, GFP_KERNEL
, dma
);
679 /* Clear reserved field */
680 swap_temp
= cpu_to_le32(dtd
->size_ioc_sts
);
681 swap_temp
&= ~DTD_RESERVED_FIELDS
;
682 dtd
->size_ioc_sts
= cpu_to_le32(swap_temp
);
684 /* Init all of buffer page pointers */
685 swap_temp
= (u32
) (req
->req
.dma
+ req
->req
.actual
);
686 dtd
->buff_ptr0
= cpu_to_le32(swap_temp
);
687 dtd
->buff_ptr1
= cpu_to_le32(swap_temp
+ 0x1000);
688 dtd
->buff_ptr2
= cpu_to_le32(swap_temp
+ 0x2000);
689 dtd
->buff_ptr3
= cpu_to_le32(swap_temp
+ 0x3000);
690 dtd
->buff_ptr4
= cpu_to_le32(swap_temp
+ 0x4000);
692 req
->req
.actual
+= *length
;
694 /* zlp is needed if req->req.zero is set */
696 if (*length
== 0 || (*length
% req
->ep
->ep
.maxpacket
) != 0)
700 } else if (req
->req
.length
== req
->req
.actual
)
706 VDBG("multi-dtd request!");
707 /* Fill in the transfer size; set active bit */
708 swap_temp
= ((*length
<< DTD_LENGTH_BIT_POS
) | DTD_STATUS_ACTIVE
);
710 /* Enable interrupt for the last dtd of a request */
711 if (*is_last
&& !req
->req
.no_interrupt
)
712 swap_temp
|= DTD_IOC
;
714 dtd
->size_ioc_sts
= cpu_to_le32(swap_temp
);
718 VDBG("length = %d address= 0x%x", *length
, (int)*dma
);
723 /* Generate dtd chain for a request */
724 static int fsl_req_to_dtd(struct fsl_req
*req
)
729 struct ep_td_struct
*last_dtd
= NULL
, *dtd
;
733 dtd
= fsl_build_dtd(req
, &count
, &dma
, &is_last
);
741 last_dtd
->next_td_ptr
= cpu_to_le32(dma
);
742 last_dtd
->next_td_virt
= dtd
;
749 dtd
->next_td_ptr
= cpu_to_le32(DTD_NEXT_TERMINATE
);
756 /* queues (submits) an I/O request to an endpoint */
758 fsl_ep_queue(struct usb_ep
*_ep
, struct usb_request
*_req
, gfp_t gfp_flags
)
760 struct fsl_ep
*ep
= container_of(_ep
, struct fsl_ep
, ep
);
761 struct fsl_req
*req
= container_of(_req
, struct fsl_req
, req
);
766 /* catch various bogus parameters */
767 if (!_req
|| !req
->req
.complete
|| !req
->req
.buf
768 || !list_empty(&req
->queue
)) {
769 VDBG("%s, bad params", __func__
);
772 if (unlikely(!_ep
|| !ep
->desc
)) {
773 VDBG("%s, bad ep", __func__
);
776 if (ep
->desc
->bmAttributes
== USB_ENDPOINT_XFER_ISOC
) {
777 if (req
->req
.length
> ep
->ep
.maxpacket
)
783 if (!udc
->driver
|| udc
->gadget
.speed
== USB_SPEED_UNKNOWN
)
788 /* map virtual address to hardware */
789 if (req
->req
.dma
== DMA_ADDR_INVALID
) {
790 req
->req
.dma
= dma_map_single(ep
->udc
->gadget
.dev
.parent
,
792 req
->req
.length
, ep_is_in(ep
)
797 dma_sync_single_for_device(ep
->udc
->gadget
.dev
.parent
,
798 req
->req
.dma
, req
->req
.length
,
805 req
->req
.status
= -EINPROGRESS
;
809 spin_lock_irqsave(&udc
->lock
, flags
);
811 /* build dtds and push them to device queue */
812 if (!fsl_req_to_dtd(req
)) {
813 fsl_queue_td(ep
, req
);
815 spin_unlock_irqrestore(&udc
->lock
, flags
);
819 /* Update ep0 state */
820 if ((ep_index(ep
) == 0))
821 udc
->ep0_state
= DATA_STATE_XMIT
;
823 /* irq handler advances the queue */
825 list_add_tail(&req
->queue
, &ep
->queue
);
826 spin_unlock_irqrestore(&udc
->lock
, flags
);
831 /* dequeues (cancels, unlinks) an I/O request from an endpoint */
832 static int fsl_ep_dequeue(struct usb_ep
*_ep
, struct usb_request
*_req
)
834 struct fsl_ep
*ep
= container_of(_ep
, struct fsl_ep
, ep
);
837 int ep_num
, stopped
, ret
= 0;
843 spin_lock_irqsave(&ep
->udc
->lock
, flags
);
844 stopped
= ep
->stopped
;
846 /* Stop the ep before we deal with the queue */
848 ep_num
= ep_index(ep
);
849 epctrl
= fsl_readl(&dr_regs
->endptctrl
[ep_num
]);
851 epctrl
&= ~EPCTRL_TX_ENABLE
;
853 epctrl
&= ~EPCTRL_RX_ENABLE
;
854 fsl_writel(epctrl
, &dr_regs
->endptctrl
[ep_num
]);
856 /* make sure it's actually queued on this endpoint */
857 list_for_each_entry(req
, &ep
->queue
, queue
) {
858 if (&req
->req
== _req
)
861 if (&req
->req
!= _req
) {
866 /* The request is in progress, or completed but not dequeued */
867 if (ep
->queue
.next
== &req
->queue
) {
868 _req
->status
= -ECONNRESET
;
869 fsl_ep_fifo_flush(_ep
); /* flush current transfer */
871 /* The request isn't the last request in this ep queue */
872 if (req
->queue
.next
!= &ep
->queue
) {
873 struct ep_queue_head
*qh
;
874 struct fsl_req
*next_req
;
877 next_req
= list_entry(req
->queue
.next
, struct fsl_req
,
880 /* Point the QH to the first TD of next request */
881 fsl_writel((u32
) next_req
->head
, &qh
->curr_dtd_ptr
);
884 /* The request hasn't been processed, patch up the TD chain */
886 struct fsl_req
*prev_req
;
888 prev_req
= list_entry(req
->queue
.prev
, struct fsl_req
, queue
);
889 fsl_writel(fsl_readl(&req
->tail
->next_td_ptr
),
890 &prev_req
->tail
->next_td_ptr
);
894 done(ep
, req
, -ECONNRESET
);
897 out
: epctrl
= fsl_readl(&dr_regs
->endptctrl
[ep_num
]);
899 epctrl
|= EPCTRL_TX_ENABLE
;
901 epctrl
|= EPCTRL_RX_ENABLE
;
902 fsl_writel(epctrl
, &dr_regs
->endptctrl
[ep_num
]);
903 ep
->stopped
= stopped
;
905 spin_unlock_irqrestore(&ep
->udc
->lock
, flags
);
909 /*-------------------------------------------------------------------------*/
911 /*-----------------------------------------------------------------
912 * modify the endpoint halt feature
913 * @ep: the non-isochronous endpoint being stalled
914 * @value: 1--set halt 0--clear halt
915 * Returns zero, or a negative error code.
916 *----------------------------------------------------------------*/
917 static int fsl_ep_set_halt(struct usb_ep
*_ep
, int value
)
919 struct fsl_ep
*ep
= NULL
;
920 unsigned long flags
= 0;
921 int status
= -EOPNOTSUPP
; /* operation not supported */
922 unsigned char ep_dir
= 0, ep_num
= 0;
923 struct fsl_udc
*udc
= NULL
;
925 ep
= container_of(_ep
, struct fsl_ep
, ep
);
927 if (!_ep
|| !ep
->desc
) {
932 if (ep
->desc
->bmAttributes
== USB_ENDPOINT_XFER_ISOC
) {
933 status
= -EOPNOTSUPP
;
937 /* Attempt to halt IN ep will fail if any transfer requests
939 if (value
&& ep_is_in(ep
) && !list_empty(&ep
->queue
)) {
945 ep_dir
= ep_is_in(ep
) ? USB_SEND
: USB_RECV
;
946 ep_num
= (unsigned char)(ep_index(ep
));
947 spin_lock_irqsave(&ep
->udc
->lock
, flags
);
948 dr_ep_change_stall(ep_num
, ep_dir
, value
);
949 spin_unlock_irqrestore(&ep
->udc
->lock
, flags
);
951 if (ep_index(ep
) == 0) {
952 udc
->ep0_state
= WAIT_FOR_SETUP
;
956 VDBG(" %s %s halt stat %d", ep
->ep
.name
,
957 value
? "set" : "clear", status
);
962 static void fsl_ep_fifo_flush(struct usb_ep
*_ep
)
967 unsigned long timeout
;
968 #define FSL_UDC_FLUSH_TIMEOUT 1000
973 ep
= container_of(_ep
, struct fsl_ep
, ep
);
977 ep_num
= ep_index(ep
);
978 ep_dir
= ep_is_in(ep
) ? USB_SEND
: USB_RECV
;
981 bits
= (1 << 16) | 1;
982 else if (ep_dir
== USB_SEND
)
983 bits
= 1 << (16 + ep_num
);
987 timeout
= jiffies
+ FSL_UDC_FLUSH_TIMEOUT
;
989 fsl_writel(bits
, &dr_regs
->endptflush
);
991 /* Wait until flush complete */
992 while (fsl_readl(&dr_regs
->endptflush
)) {
993 if (time_after(jiffies
, timeout
)) {
994 ERR("ep flush timeout\n");
999 /* See if we need to flush again */
1000 } while (fsl_readl(&dr_regs
->endptstatus
) & bits
);
1003 static struct usb_ep_ops fsl_ep_ops
= {
1004 .enable
= fsl_ep_enable
,
1005 .disable
= fsl_ep_disable
,
1007 .alloc_request
= fsl_alloc_request
,
1008 .free_request
= fsl_free_request
,
1010 .queue
= fsl_ep_queue
,
1011 .dequeue
= fsl_ep_dequeue
,
1013 .set_halt
= fsl_ep_set_halt
,
1014 .fifo_flush
= fsl_ep_fifo_flush
, /* flush fifo */
1017 /*-------------------------------------------------------------------------
1018 Gadget Driver Layer Operations
1019 -------------------------------------------------------------------------*/
1021 /*----------------------------------------------------------------------
1022 * Get the current frame number (from DR frame_index Reg )
1023 *----------------------------------------------------------------------*/
1024 static int fsl_get_frame(struct usb_gadget
*gadget
)
1026 return (int)(fsl_readl(&dr_regs
->frindex
) & USB_FRINDEX_MASKS
);
1029 /*-----------------------------------------------------------------------
1030 * Tries to wake up the host connected to this gadget
1031 -----------------------------------------------------------------------*/
1032 static int fsl_wakeup(struct usb_gadget
*gadget
)
1034 struct fsl_udc
*udc
= container_of(gadget
, struct fsl_udc
, gadget
);
1037 /* Remote wakeup feature not enabled by host */
1038 if (!udc
->remote_wakeup
)
1041 portsc
= fsl_readl(&dr_regs
->portsc1
);
1042 /* not suspended? */
1043 if (!(portsc
& PORTSCX_PORT_SUSPEND
))
1045 /* trigger force resume */
1046 portsc
|= PORTSCX_PORT_FORCE_RESUME
;
1047 fsl_writel(portsc
, &dr_regs
->portsc1
);
1051 static int can_pullup(struct fsl_udc
*udc
)
1053 return udc
->driver
&& udc
->softconnect
&& udc
->vbus_active
;
1056 /* Notify controller that VBUS is powered, Called by whatever
1057 detects VBUS sessions */
1058 static int fsl_vbus_session(struct usb_gadget
*gadget
, int is_active
)
1060 struct fsl_udc
*udc
;
1061 unsigned long flags
;
1063 udc
= container_of(gadget
, struct fsl_udc
, gadget
);
1064 spin_lock_irqsave(&udc
->lock
, flags
);
1065 VDBG("VBUS %s", is_active
? "on" : "off");
1066 udc
->vbus_active
= (is_active
!= 0);
1067 if (can_pullup(udc
))
1068 fsl_writel((fsl_readl(&dr_regs
->usbcmd
) | USB_CMD_RUN_STOP
),
1071 fsl_writel((fsl_readl(&dr_regs
->usbcmd
) & ~USB_CMD_RUN_STOP
),
1073 spin_unlock_irqrestore(&udc
->lock
, flags
);
1077 /* constrain controller's VBUS power usage
1078 * This call is used by gadget drivers during SET_CONFIGURATION calls,
1079 * reporting how much power the device may consume. For example, this
1080 * could affect how quickly batteries are recharged.
1082 * Returns zero on success, else negative errno.
1084 static int fsl_vbus_draw(struct usb_gadget
*gadget
, unsigned mA
)
1086 struct fsl_udc
*udc
;
1088 udc
= container_of(gadget
, struct fsl_udc
, gadget
);
1089 if (udc
->transceiver
)
1090 return otg_set_power(udc
->transceiver
, mA
);
1094 /* Change Data+ pullup status
1095 * this func is used by usb_gadget_connect/disconnet
1097 static int fsl_pullup(struct usb_gadget
*gadget
, int is_on
)
1099 struct fsl_udc
*udc
;
1101 udc
= container_of(gadget
, struct fsl_udc
, gadget
);
1102 udc
->softconnect
= (is_on
!= 0);
1103 if (can_pullup(udc
))
1104 fsl_writel((fsl_readl(&dr_regs
->usbcmd
) | USB_CMD_RUN_STOP
),
1107 fsl_writel((fsl_readl(&dr_regs
->usbcmd
) & ~USB_CMD_RUN_STOP
),
1113 /* defined in gadget.h */
1114 static struct usb_gadget_ops fsl_gadget_ops
= {
1115 .get_frame
= fsl_get_frame
,
1116 .wakeup
= fsl_wakeup
,
1117 /* .set_selfpowered = fsl_set_selfpowered, */ /* Always selfpowered */
1118 .vbus_session
= fsl_vbus_session
,
1119 .vbus_draw
= fsl_vbus_draw
,
1120 .pullup
= fsl_pullup
,
1123 /* Set protocol stall on ep0, protocol stall will automatically be cleared
1124 on new transaction */
1125 static void ep0stall(struct fsl_udc
*udc
)
1129 /* must set tx and rx to stall at the same time */
1130 tmp
= fsl_readl(&dr_regs
->endptctrl
[0]);
1131 tmp
|= EPCTRL_TX_EP_STALL
| EPCTRL_RX_EP_STALL
;
1132 fsl_writel(tmp
, &dr_regs
->endptctrl
[0]);
1133 udc
->ep0_state
= WAIT_FOR_SETUP
;
1137 /* Prime a status phase for ep0 */
1138 static int ep0_prime_status(struct fsl_udc
*udc
, int direction
)
1140 struct fsl_req
*req
= udc
->status_req
;
1143 if (direction
== EP_DIR_IN
)
1144 udc
->ep0_dir
= USB_DIR_IN
;
1146 udc
->ep0_dir
= USB_DIR_OUT
;
1149 udc
->ep0_state
= WAIT_FOR_OUT_STATUS
;
1152 req
->req
.length
= 0;
1153 req
->req
.status
= -EINPROGRESS
;
1154 req
->req
.actual
= 0;
1155 req
->req
.complete
= NULL
;
1158 if (fsl_req_to_dtd(req
) == 0)
1159 fsl_queue_td(ep
, req
);
1163 list_add_tail(&req
->queue
, &ep
->queue
);
1168 static void udc_reset_ep_queue(struct fsl_udc
*udc
, u8 pipe
)
1170 struct fsl_ep
*ep
= get_ep_by_pipe(udc
, pipe
);
1173 nuke(ep
, -ESHUTDOWN
);
1179 static void ch9setaddress(struct fsl_udc
*udc
, u16 value
, u16 index
, u16 length
)
1181 /* Save the new address to device struct */
1182 udc
->device_address
= (u8
) value
;
1183 /* Update usb state */
1184 udc
->usb_state
= USB_STATE_ADDRESS
;
1186 if (ep0_prime_status(udc
, EP_DIR_IN
))
1193 static void ch9getstatus(struct fsl_udc
*udc
, u8 request_type
, u16 value
,
1194 u16 index
, u16 length
)
1196 u16 tmp
= 0; /* Status, cpu endian */
1197 struct fsl_req
*req
;
1202 if ((request_type
& USB_RECIP_MASK
) == USB_RECIP_DEVICE
) {
1203 /* Get device status */
1204 tmp
= 1 << USB_DEVICE_SELF_POWERED
;
1205 tmp
|= udc
->remote_wakeup
<< USB_DEVICE_REMOTE_WAKEUP
;
1206 } else if ((request_type
& USB_RECIP_MASK
) == USB_RECIP_INTERFACE
) {
1207 /* Get interface status */
1208 /* We don't have interface information in udc driver */
1210 } else if ((request_type
& USB_RECIP_MASK
) == USB_RECIP_ENDPOINT
) {
1211 /* Get endpoint status */
1212 struct fsl_ep
*target_ep
;
1214 target_ep
= get_ep_by_pipe(udc
, get_pipe_by_windex(index
));
1216 /* stall if endpoint doesn't exist */
1217 if (!target_ep
->desc
)
1219 tmp
= dr_ep_get_stall(ep_index(target_ep
), ep_is_in(target_ep
))
1220 << USB_ENDPOINT_HALT
;
1223 udc
->ep0_dir
= USB_DIR_IN
;
1224 /* Borrow the per device status_req */
1225 req
= udc
->status_req
;
1226 /* Fill in the reqest structure */
1227 *((u16
*) req
->req
.buf
) = cpu_to_le16(tmp
);
1229 req
->req
.length
= 2;
1230 req
->req
.status
= -EINPROGRESS
;
1231 req
->req
.actual
= 0;
1232 req
->req
.complete
= NULL
;
1235 /* prime the data phase */
1236 if ((fsl_req_to_dtd(req
) == 0))
1237 fsl_queue_td(ep
, req
);
1241 list_add_tail(&req
->queue
, &ep
->queue
);
1242 udc
->ep0_state
= DATA_STATE_XMIT
;
1248 static void setup_received_irq(struct fsl_udc
*udc
,
1249 struct usb_ctrlrequest
*setup
)
1251 u16 wValue
= le16_to_cpu(setup
->wValue
);
1252 u16 wIndex
= le16_to_cpu(setup
->wIndex
);
1253 u16 wLength
= le16_to_cpu(setup
->wLength
);
1255 udc_reset_ep_queue(udc
, 0);
1257 /* We process some stardard setup requests here */
1258 switch (setup
->bRequest
) {
1259 case USB_REQ_GET_STATUS
:
1260 /* Data+Status phase from udc */
1261 if ((setup
->bRequestType
& (USB_DIR_IN
| USB_TYPE_MASK
))
1262 != (USB_DIR_IN
| USB_TYPE_STANDARD
))
1264 ch9getstatus(udc
, setup
->bRequestType
, wValue
, wIndex
, wLength
);
1267 case USB_REQ_SET_ADDRESS
:
1268 /* Status phase from udc */
1269 if (setup
->bRequestType
!= (USB_DIR_OUT
| USB_TYPE_STANDARD
1270 | USB_RECIP_DEVICE
))
1272 ch9setaddress(udc
, wValue
, wIndex
, wLength
);
1275 case USB_REQ_CLEAR_FEATURE
:
1276 case USB_REQ_SET_FEATURE
:
1277 /* Status phase from udc */
1279 int rc
= -EOPNOTSUPP
;
1281 if ((setup
->bRequestType
& (USB_RECIP_MASK
| USB_TYPE_MASK
))
1282 == (USB_RECIP_ENDPOINT
| USB_TYPE_STANDARD
)) {
1283 int pipe
= get_pipe_by_windex(wIndex
);
1286 if (wValue
!= 0 || wLength
!= 0 || pipe
> udc
->max_ep
)
1288 ep
= get_ep_by_pipe(udc
, pipe
);
1290 spin_unlock(&udc
->lock
);
1291 rc
= fsl_ep_set_halt(&ep
->ep
,
1292 (setup
->bRequest
== USB_REQ_SET_FEATURE
)
1294 spin_lock(&udc
->lock
);
1296 } else if ((setup
->bRequestType
& (USB_RECIP_MASK
1297 | USB_TYPE_MASK
)) == (USB_RECIP_DEVICE
1298 | USB_TYPE_STANDARD
)) {
1299 /* Note: The driver has not include OTG support yet.
1300 * This will be set when OTG support is added */
1301 if (!gadget_is_otg(&udc
->gadget
))
1303 else if (setup
->bRequest
== USB_DEVICE_B_HNP_ENABLE
)
1304 udc
->gadget
.b_hnp_enable
= 1;
1305 else if (setup
->bRequest
== USB_DEVICE_A_HNP_SUPPORT
)
1306 udc
->gadget
.a_hnp_support
= 1;
1307 else if (setup
->bRequest
==
1308 USB_DEVICE_A_ALT_HNP_SUPPORT
)
1309 udc
->gadget
.a_alt_hnp_support
= 1;
1317 if (ep0_prime_status(udc
, EP_DIR_IN
))
1327 /* Requests handled by gadget */
1329 /* Data phase from gadget, status phase from udc */
1330 udc
->ep0_dir
= (setup
->bRequestType
& USB_DIR_IN
)
1331 ? USB_DIR_IN
: USB_DIR_OUT
;
1332 spin_unlock(&udc
->lock
);
1333 if (udc
->driver
->setup(&udc
->gadget
,
1334 &udc
->local_setup_buff
) < 0)
1336 spin_lock(&udc
->lock
);
1337 udc
->ep0_state
= (setup
->bRequestType
& USB_DIR_IN
)
1338 ? DATA_STATE_XMIT
: DATA_STATE_RECV
;
1340 /* No data phase, IN status from gadget */
1341 udc
->ep0_dir
= USB_DIR_IN
;
1342 spin_unlock(&udc
->lock
);
1343 if (udc
->driver
->setup(&udc
->gadget
,
1344 &udc
->local_setup_buff
) < 0)
1346 spin_lock(&udc
->lock
);
1347 udc
->ep0_state
= WAIT_FOR_OUT_STATUS
;
1351 /* Process request for Data or Status phase of ep0
1352 * prime status phase if needed */
1353 static void ep0_req_complete(struct fsl_udc
*udc
, struct fsl_ep
*ep0
,
1354 struct fsl_req
*req
)
1356 if (udc
->usb_state
== USB_STATE_ADDRESS
) {
1357 /* Set the new address */
1358 u32 new_address
= (u32
) udc
->device_address
;
1359 fsl_writel(new_address
<< USB_DEVICE_ADDRESS_BIT_POS
,
1360 &dr_regs
->deviceaddr
);
1365 switch (udc
->ep0_state
) {
1366 case DATA_STATE_XMIT
:
1367 /* receive status phase */
1368 if (ep0_prime_status(udc
, EP_DIR_OUT
))
1371 case DATA_STATE_RECV
:
1372 /* send status phase */
1373 if (ep0_prime_status(udc
, EP_DIR_IN
))
1376 case WAIT_FOR_OUT_STATUS
:
1377 udc
->ep0_state
= WAIT_FOR_SETUP
;
1379 case WAIT_FOR_SETUP
:
1380 ERR("Unexpect ep0 packets\n");
1388 /* Tripwire mechanism to ensure a setup packet payload is extracted without
1389 * being corrupted by another incoming setup packet */
1390 static void tripwire_handler(struct fsl_udc
*udc
, u8 ep_num
, u8
*buffer_ptr
)
1393 struct ep_queue_head
*qh
;
1395 qh
= &udc
->ep_qh
[ep_num
* 2 + EP_DIR_OUT
];
1397 /* Clear bit in ENDPTSETUPSTAT */
1398 temp
= fsl_readl(&dr_regs
->endptsetupstat
);
1399 fsl_writel(temp
| (1 << ep_num
), &dr_regs
->endptsetupstat
);
1401 /* while a hazard exists when setup package arrives */
1403 /* Set Setup Tripwire */
1404 temp
= fsl_readl(&dr_regs
->usbcmd
);
1405 fsl_writel(temp
| USB_CMD_SUTW
, &dr_regs
->usbcmd
);
1407 /* Copy the setup packet to local buffer */
1408 memcpy(buffer_ptr
, (u8
*) qh
->setup_buffer
, 8);
1409 } while (!(fsl_readl(&dr_regs
->usbcmd
) & USB_CMD_SUTW
));
1411 /* Clear Setup Tripwire */
1412 temp
= fsl_readl(&dr_regs
->usbcmd
);
1413 fsl_writel(temp
& ~USB_CMD_SUTW
, &dr_regs
->usbcmd
);
1416 /* process-ep_req(): free the completed Tds for this req */
1417 static int process_ep_req(struct fsl_udc
*udc
, int pipe
,
1418 struct fsl_req
*curr_req
)
1420 struct ep_td_struct
*curr_td
;
1421 int td_complete
, actual
, remaining_length
, j
, tmp
;
1424 struct ep_queue_head
*curr_qh
= &udc
->ep_qh
[pipe
];
1425 int direction
= pipe
% 2;
1427 curr_td
= curr_req
->head
;
1429 actual
= curr_req
->req
.length
;
1431 for (j
= 0; j
< curr_req
->dtd_count
; j
++) {
1432 remaining_length
= (le32_to_cpu(curr_td
->size_ioc_sts
)
1434 >> DTD_LENGTH_BIT_POS
;
1435 actual
-= remaining_length
;
1437 if ((errors
= le32_to_cpu(curr_td
->size_ioc_sts
) &
1439 if (errors
& DTD_STATUS_HALTED
) {
1440 ERR("dTD error %08x QH=%d\n", errors
, pipe
);
1441 /* Clear the errors and Halt condition */
1442 tmp
= le32_to_cpu(curr_qh
->size_ioc_int_sts
);
1444 curr_qh
->size_ioc_int_sts
= cpu_to_le32(tmp
);
1446 /* FIXME: continue with next queued TD? */
1450 if (errors
& DTD_STATUS_DATA_BUFF_ERR
) {
1451 VDBG("Transfer overflow");
1454 } else if (errors
& DTD_STATUS_TRANSACTION_ERR
) {
1459 ERR("Unknown error has occured (0x%x)!\n",
1462 } else if (le32_to_cpu(curr_td
->size_ioc_sts
)
1463 & DTD_STATUS_ACTIVE
) {
1464 VDBG("Request not complete");
1465 status
= REQ_UNCOMPLETE
;
1467 } else if (remaining_length
) {
1469 VDBG("Transmit dTD remaining length not zero");
1478 VDBG("dTD transmitted successful");
1481 if (j
!= curr_req
->dtd_count
- 1)
1482 curr_td
= (struct ep_td_struct
*)curr_td
->next_td_virt
;
1488 curr_req
->req
.actual
= actual
;
1493 /* Process a DTD completion interrupt */
1494 static void dtd_complete_irq(struct fsl_udc
*udc
)
1497 int i
, ep_num
, direction
, bit_mask
, status
;
1498 struct fsl_ep
*curr_ep
;
1499 struct fsl_req
*curr_req
, *temp_req
;
1501 /* Clear the bits in the register */
1502 bit_pos
= fsl_readl(&dr_regs
->endptcomplete
);
1503 fsl_writel(bit_pos
, &dr_regs
->endptcomplete
);
1508 for (i
= 0; i
< udc
->max_ep
* 2; i
++) {
1512 bit_mask
= 1 << (ep_num
+ 16 * direction
);
1514 if (!(bit_pos
& bit_mask
))
1517 curr_ep
= get_ep_by_pipe(udc
, i
);
1519 /* If the ep is configured */
1520 if (curr_ep
->name
== NULL
) {
1521 WARNING("Invalid EP?");
1525 /* process the req queue until an uncomplete request */
1526 list_for_each_entry_safe(curr_req
, temp_req
, &curr_ep
->queue
,
1528 status
= process_ep_req(udc
, i
, curr_req
);
1530 VDBG("status of process_ep_req= %d, ep = %d",
1532 if (status
== REQ_UNCOMPLETE
)
1534 /* write back status to req */
1535 curr_req
->req
.status
= status
;
1538 ep0_req_complete(udc
, curr_ep
, curr_req
);
1541 done(curr_ep
, curr_req
, status
);
1546 /* Process a port change interrupt */
1547 static void port_change_irq(struct fsl_udc
*udc
)
1551 /* Bus resetting is finished */
1552 if (!(fsl_readl(&dr_regs
->portsc1
) & PORTSCX_PORT_RESET
)) {
1554 speed
= (fsl_readl(&dr_regs
->portsc1
)
1555 & PORTSCX_PORT_SPEED_MASK
);
1557 case PORTSCX_PORT_SPEED_HIGH
:
1558 udc
->gadget
.speed
= USB_SPEED_HIGH
;
1560 case PORTSCX_PORT_SPEED_FULL
:
1561 udc
->gadget
.speed
= USB_SPEED_FULL
;
1563 case PORTSCX_PORT_SPEED_LOW
:
1564 udc
->gadget
.speed
= USB_SPEED_LOW
;
1567 udc
->gadget
.speed
= USB_SPEED_UNKNOWN
;
1572 /* Update USB state */
1573 if (!udc
->resume_state
)
1574 udc
->usb_state
= USB_STATE_DEFAULT
;
1577 /* Process suspend interrupt */
1578 static void suspend_irq(struct fsl_udc
*udc
)
1580 udc
->resume_state
= udc
->usb_state
;
1581 udc
->usb_state
= USB_STATE_SUSPENDED
;
1583 /* report suspend to the driver, serial.c does not support this */
1584 if (udc
->driver
->suspend
)
1585 udc
->driver
->suspend(&udc
->gadget
);
1588 static void bus_resume(struct fsl_udc
*udc
)
1590 udc
->usb_state
= udc
->resume_state
;
1591 udc
->resume_state
= 0;
1593 /* report resume to the driver, serial.c does not support this */
1594 if (udc
->driver
->resume
)
1595 udc
->driver
->resume(&udc
->gadget
);
1598 /* Clear up all ep queues */
1599 static int reset_queues(struct fsl_udc
*udc
)
1603 for (pipe
= 0; pipe
< udc
->max_pipes
; pipe
++)
1604 udc_reset_ep_queue(udc
, pipe
);
1606 /* report disconnect; the driver is already quiesced */
1607 spin_unlock(&udc
->lock
);
1608 udc
->driver
->disconnect(&udc
->gadget
);
1609 spin_lock(&udc
->lock
);
1614 /* Process reset interrupt */
1615 static void reset_irq(struct fsl_udc
*udc
)
1618 unsigned long timeout
;
1620 /* Clear the device address */
1621 temp
= fsl_readl(&dr_regs
->deviceaddr
);
1622 fsl_writel(temp
& ~USB_DEVICE_ADDRESS_MASK
, &dr_regs
->deviceaddr
);
1624 udc
->device_address
= 0;
1626 /* Clear usb state */
1627 udc
->resume_state
= 0;
1629 udc
->ep0_state
= WAIT_FOR_SETUP
;
1630 udc
->remote_wakeup
= 0; /* default to 0 on reset */
1631 udc
->gadget
.b_hnp_enable
= 0;
1632 udc
->gadget
.a_hnp_support
= 0;
1633 udc
->gadget
.a_alt_hnp_support
= 0;
1635 /* Clear all the setup token semaphores */
1636 temp
= fsl_readl(&dr_regs
->endptsetupstat
);
1637 fsl_writel(temp
, &dr_regs
->endptsetupstat
);
1639 /* Clear all the endpoint complete status bits */
1640 temp
= fsl_readl(&dr_regs
->endptcomplete
);
1641 fsl_writel(temp
, &dr_regs
->endptcomplete
);
1643 timeout
= jiffies
+ 100;
1644 while (fsl_readl(&dr_regs
->endpointprime
)) {
1645 /* Wait until all endptprime bits cleared */
1646 if (time_after(jiffies
, timeout
)) {
1647 ERR("Timeout for reset\n");
1653 /* Write 1s to the flush register */
1654 fsl_writel(0xffffffff, &dr_regs
->endptflush
);
1656 if (fsl_readl(&dr_regs
->portsc1
) & PORTSCX_PORT_RESET
) {
1658 /* Reset all the queues, include XD, dTD, EP queue
1659 * head and TR Queue */
1661 udc
->usb_state
= USB_STATE_DEFAULT
;
1663 VDBG("Controller reset");
1664 /* initialize usb hw reg except for regs for EP, not
1665 * touch usbintr reg */
1666 dr_controller_setup(udc
);
1668 /* Reset all internal used Queues */
1673 /* Enable DR IRQ reg, Set Run bit, change udc state */
1674 dr_controller_run(udc
);
1675 udc
->usb_state
= USB_STATE_ATTACHED
;
1680 * USB device controller interrupt handler
1682 static irqreturn_t
fsl_udc_irq(int irq
, void *_udc
)
1684 struct fsl_udc
*udc
= _udc
;
1686 irqreturn_t status
= IRQ_NONE
;
1687 unsigned long flags
;
1689 /* Disable ISR for OTG host mode */
1692 spin_lock_irqsave(&udc
->lock
, flags
);
1693 irq_src
= fsl_readl(&dr_regs
->usbsts
) & fsl_readl(&dr_regs
->usbintr
);
1694 /* Clear notification bits */
1695 fsl_writel(irq_src
, &dr_regs
->usbsts
);
1697 /* VDBG("irq_src [0x%8x]", irq_src); */
1699 /* Need to resume? */
1700 if (udc
->usb_state
== USB_STATE_SUSPENDED
)
1701 if ((fsl_readl(&dr_regs
->portsc1
) & PORTSCX_PORT_SUSPEND
) == 0)
1705 if (irq_src
& USB_STS_INT
) {
1707 /* Setup package, we only support ep0 as control ep */
1708 if (fsl_readl(&dr_regs
->endptsetupstat
) & EP_SETUP_STATUS_EP0
) {
1709 tripwire_handler(udc
, 0,
1710 (u8
*) (&udc
->local_setup_buff
));
1711 setup_received_irq(udc
, &udc
->local_setup_buff
);
1712 status
= IRQ_HANDLED
;
1715 /* completion of dtd */
1716 if (fsl_readl(&dr_regs
->endptcomplete
)) {
1717 dtd_complete_irq(udc
);
1718 status
= IRQ_HANDLED
;
1722 /* SOF (for ISO transfer) */
1723 if (irq_src
& USB_STS_SOF
) {
1724 status
= IRQ_HANDLED
;
1728 if (irq_src
& USB_STS_PORT_CHANGE
) {
1729 port_change_irq(udc
);
1730 status
= IRQ_HANDLED
;
1733 /* Reset Received */
1734 if (irq_src
& USB_STS_RESET
) {
1736 status
= IRQ_HANDLED
;
1739 /* Sleep Enable (Suspend) */
1740 if (irq_src
& USB_STS_SUSPEND
) {
1742 status
= IRQ_HANDLED
;
1745 if (irq_src
& (USB_STS_ERR
| USB_STS_SYS_ERR
)) {
1746 VDBG("Error IRQ %x", irq_src
);
1749 spin_unlock_irqrestore(&udc
->lock
, flags
);
1753 /*----------------------------------------------------------------*
1754 * Hook to gadget drivers
1755 * Called by initialization code of gadget drivers
1756 *----------------------------------------------------------------*/
1757 int usb_gadget_register_driver(struct usb_gadget_driver
*driver
)
1759 int retval
= -ENODEV
;
1760 unsigned long flags
= 0;
1762 if (!udc_controller
)
1765 if (!driver
|| (driver
->speed
!= USB_SPEED_FULL
1766 && driver
->speed
!= USB_SPEED_HIGH
)
1767 || !driver
->bind
|| !driver
->disconnect
1771 if (udc_controller
->driver
)
1774 /* lock is needed but whether should use this lock or another */
1775 spin_lock_irqsave(&udc_controller
->lock
, flags
);
1777 driver
->driver
.bus
= NULL
;
1778 /* hook up the driver */
1779 udc_controller
->driver
= driver
;
1780 udc_controller
->gadget
.dev
.driver
= &driver
->driver
;
1781 spin_unlock_irqrestore(&udc_controller
->lock
, flags
);
1783 /* bind udc driver to gadget driver */
1784 retval
= driver
->bind(&udc_controller
->gadget
);
1786 VDBG("bind to %s --> %d", driver
->driver
.name
, retval
);
1787 udc_controller
->gadget
.dev
.driver
= NULL
;
1788 udc_controller
->driver
= NULL
;
1792 /* Enable DR IRQ reg and Set usbcmd reg Run bit */
1793 dr_controller_run(udc_controller
);
1794 udc_controller
->usb_state
= USB_STATE_ATTACHED
;
1795 udc_controller
->ep0_state
= WAIT_FOR_SETUP
;
1796 udc_controller
->ep0_dir
= 0;
1797 printk(KERN_INFO
"%s: bind to driver %s\n",
1798 udc_controller
->gadget
.name
, driver
->driver
.name
);
1802 printk("gadget driver register failed %d\n", retval
);
1805 EXPORT_SYMBOL(usb_gadget_register_driver
);
1807 /* Disconnect from gadget driver */
1808 int usb_gadget_unregister_driver(struct usb_gadget_driver
*driver
)
1810 struct fsl_ep
*loop_ep
;
1811 unsigned long flags
;
1813 if (!udc_controller
)
1816 if (!driver
|| driver
!= udc_controller
->driver
|| !driver
->unbind
)
1819 if (udc_controller
->transceiver
)
1820 otg_set_peripheral(udc_controller
->transceiver
, NULL
);
1822 /* stop DR, disable intr */
1823 dr_controller_stop(udc_controller
);
1825 /* in fact, no needed */
1826 udc_controller
->usb_state
= USB_STATE_ATTACHED
;
1827 udc_controller
->ep0_state
= WAIT_FOR_SETUP
;
1828 udc_controller
->ep0_dir
= 0;
1830 /* stand operation */
1831 spin_lock_irqsave(&udc_controller
->lock
, flags
);
1832 udc_controller
->gadget
.speed
= USB_SPEED_UNKNOWN
;
1833 nuke(&udc_controller
->eps
[0], -ESHUTDOWN
);
1834 list_for_each_entry(loop_ep
, &udc_controller
->gadget
.ep_list
,
1836 nuke(loop_ep
, -ESHUTDOWN
);
1837 spin_unlock_irqrestore(&udc_controller
->lock
, flags
);
1839 /* unbind gadget and unhook driver. */
1840 driver
->unbind(&udc_controller
->gadget
);
1841 udc_controller
->gadget
.dev
.driver
= NULL
;
1842 udc_controller
->driver
= NULL
;
1844 printk("unregistered gadget driver '%s'\n", driver
->driver
.name
);
1847 EXPORT_SYMBOL(usb_gadget_unregister_driver
);
1849 /*-------------------------------------------------------------------------
1850 PROC File System Support
1851 -------------------------------------------------------------------------*/
1852 #ifdef CONFIG_USB_GADGET_DEBUG_FILES
1854 #include <linux/seq_file.h>
1856 static const char proc_filename
[] = "driver/fsl_usb2_udc";
1858 static int fsl_proc_read(char *page
, char **start
, off_t off
, int count
,
1859 int *eof
, void *_dev
)
1863 unsigned size
= count
;
1864 unsigned long flags
;
1867 struct fsl_ep
*ep
= NULL
;
1868 struct fsl_req
*req
;
1870 struct fsl_udc
*udc
= udc_controller
;
1874 spin_lock_irqsave(&udc
->lock
, flags
);
1876 /* ------basic driver information ---- */
1877 t
= scnprintf(next
, size
,
1880 "Gadget driver: %s\n\n",
1881 driver_name
, DRIVER_VERSION
,
1882 udc
->driver
? udc
->driver
->driver
.name
: "(none)");
1886 /* ------ DR Registers ----- */
1887 tmp_reg
= fsl_readl(&dr_regs
->usbcmd
);
1888 t
= scnprintf(next
, size
,
1892 (tmp_reg
& USB_CMD_SUTW
) ? 1 : 0,
1893 (tmp_reg
& USB_CMD_RUN_STOP
) ? "Run" : "Stop");
1897 tmp_reg
= fsl_readl(&dr_regs
->usbsts
);
1898 t
= scnprintf(next
, size
,
1900 "Dr Suspend: %d Reset Received: %d System Error: %s "
1901 "USB Error Interrupt: %s\n\n",
1902 (tmp_reg
& USB_STS_SUSPEND
) ? 1 : 0,
1903 (tmp_reg
& USB_STS_RESET
) ? 1 : 0,
1904 (tmp_reg
& USB_STS_SYS_ERR
) ? "Err" : "Normal",
1905 (tmp_reg
& USB_STS_ERR
) ? "Err detected" : "No err");
1909 tmp_reg
= fsl_readl(&dr_regs
->usbintr
);
1910 t
= scnprintf(next
, size
,
1911 "USB Intrrupt Enable Reg:\n"
1912 "Sleep Enable: %d SOF Received Enable: %d "
1913 "Reset Enable: %d\n"
1914 "System Error Enable: %d "
1915 "Port Change Dectected Enable: %d\n"
1916 "USB Error Intr Enable: %d USB Intr Enable: %d\n\n",
1917 (tmp_reg
& USB_INTR_DEVICE_SUSPEND
) ? 1 : 0,
1918 (tmp_reg
& USB_INTR_SOF_EN
) ? 1 : 0,
1919 (tmp_reg
& USB_INTR_RESET_EN
) ? 1 : 0,
1920 (tmp_reg
& USB_INTR_SYS_ERR_EN
) ? 1 : 0,
1921 (tmp_reg
& USB_INTR_PTC_DETECT_EN
) ? 1 : 0,
1922 (tmp_reg
& USB_INTR_ERR_INT_EN
) ? 1 : 0,
1923 (tmp_reg
& USB_INTR_INT_EN
) ? 1 : 0);
1927 tmp_reg
= fsl_readl(&dr_regs
->frindex
);
1928 t
= scnprintf(next
, size
,
1929 "USB Frame Index Reg: Frame Number is 0x%x\n\n",
1930 (tmp_reg
& USB_FRINDEX_MASKS
));
1934 tmp_reg
= fsl_readl(&dr_regs
->deviceaddr
);
1935 t
= scnprintf(next
, size
,
1936 "USB Device Address Reg: Device Addr is 0x%x\n\n",
1937 (tmp_reg
& USB_DEVICE_ADDRESS_MASK
));
1941 tmp_reg
= fsl_readl(&dr_regs
->endpointlistaddr
);
1942 t
= scnprintf(next
, size
,
1943 "USB Endpoint List Address Reg: "
1944 "Device Addr is 0x%x\n\n",
1945 (tmp_reg
& USB_EP_LIST_ADDRESS_MASK
));
1949 tmp_reg
= fsl_readl(&dr_regs
->portsc1
);
1950 t
= scnprintf(next
, size
,
1951 "USB Port Status&Control Reg:\n"
1952 "Port Transceiver Type : %s Port Speed: %s\n"
1953 "PHY Low Power Suspend: %s Port Reset: %s "
1954 "Port Suspend Mode: %s\n"
1955 "Over-current Change: %s "
1956 "Port Enable/Disable Change: %s\n"
1957 "Port Enabled/Disabled: %s "
1958 "Current Connect Status: %s\n\n", ( {
1960 switch (tmp_reg
& PORTSCX_PTS_FSLS
) {
1961 case PORTSCX_PTS_UTMI
:
1963 case PORTSCX_PTS_ULPI
:
1965 case PORTSCX_PTS_FSLS
:
1966 s
= "FS/LS Serial"; break;
1972 switch (tmp_reg
& PORTSCX_PORT_SPEED_UNDEF
) {
1973 case PORTSCX_PORT_SPEED_FULL
:
1974 s
= "Full Speed"; break;
1975 case PORTSCX_PORT_SPEED_LOW
:
1976 s
= "Low Speed"; break;
1977 case PORTSCX_PORT_SPEED_HIGH
:
1978 s
= "High Speed"; break;
1980 s
= "Undefined"; break;
1984 (tmp_reg
& PORTSCX_PHY_LOW_POWER_SPD
) ?
1985 "Normal PHY mode" : "Low power mode",
1986 (tmp_reg
& PORTSCX_PORT_RESET
) ? "In Reset" :
1988 (tmp_reg
& PORTSCX_PORT_SUSPEND
) ? "In " : "Not in",
1989 (tmp_reg
& PORTSCX_OVER_CURRENT_CHG
) ? "Dected" :
1991 (tmp_reg
& PORTSCX_PORT_EN_DIS_CHANGE
) ? "Disable" :
1993 (tmp_reg
& PORTSCX_PORT_ENABLE
) ? "Enable" :
1995 (tmp_reg
& PORTSCX_CURRENT_CONNECT_STATUS
) ?
1996 "Attached" : "Not-Att");
2000 tmp_reg
= fsl_readl(&dr_regs
->usbmode
);
2001 t
= scnprintf(next
, size
,
2002 "USB Mode Reg: Controller Mode is: %s\n\n", ( {
2004 switch (tmp_reg
& USB_MODE_CTRL_MODE_HOST
) {
2005 case USB_MODE_CTRL_MODE_IDLE
:
2007 case USB_MODE_CTRL_MODE_DEVICE
:
2008 s
= "Device Controller"; break;
2009 case USB_MODE_CTRL_MODE_HOST
:
2010 s
= "Host Controller"; break;
2019 tmp_reg
= fsl_readl(&dr_regs
->endptsetupstat
);
2020 t
= scnprintf(next
, size
,
2021 "Endpoint Setup Status Reg: SETUP on ep 0x%x\n\n",
2022 (tmp_reg
& EP_SETUP_STATUS_MASK
));
2026 for (i
= 0; i
< udc
->max_ep
/ 2; i
++) {
2027 tmp_reg
= fsl_readl(&dr_regs
->endptctrl
[i
]);
2028 t
= scnprintf(next
, size
, "EP Ctrl Reg [0x%x]: = [0x%x]\n",
2033 tmp_reg
= fsl_readl(&dr_regs
->endpointprime
);
2034 t
= scnprintf(next
, size
, "EP Prime Reg = [0x%x]\n\n", tmp_reg
);
2038 tmp_reg
= usb_sys_regs
->snoop1
;
2039 t
= scnprintf(next
, size
, "Snoop1 Reg : = [0x%x]\n\n", tmp_reg
);
2043 tmp_reg
= usb_sys_regs
->control
;
2044 t
= scnprintf(next
, size
, "General Control Reg : = [0x%x]\n\n",
2049 /* ------fsl_udc, fsl_ep, fsl_request structure information ----- */
2051 t
= scnprintf(next
, size
, "For %s Maxpkt is 0x%x index is 0x%x\n",
2052 ep
->ep
.name
, ep_maxpacket(ep
), ep_index(ep
));
2056 if (list_empty(&ep
->queue
)) {
2057 t
= scnprintf(next
, size
, "its req queue is empty\n\n");
2061 list_for_each_entry(req
, &ep
->queue
, queue
) {
2062 t
= scnprintf(next
, size
,
2063 "req %p actual 0x%x length 0x%x buf %p\n",
2064 &req
->req
, req
->req
.actual
,
2065 req
->req
.length
, req
->req
.buf
);
2070 /* other gadget->eplist ep */
2071 list_for_each_entry(ep
, &udc
->gadget
.ep_list
, ep
.ep_list
) {
2073 t
= scnprintf(next
, size
,
2074 "\nFor %s Maxpkt is 0x%x "
2076 ep
->ep
.name
, ep_maxpacket(ep
),
2081 if (list_empty(&ep
->queue
)) {
2082 t
= scnprintf(next
, size
,
2083 "its req queue is empty\n\n");
2087 list_for_each_entry(req
, &ep
->queue
, queue
) {
2088 t
= scnprintf(next
, size
,
2089 "req %p actual 0x%x length "
2091 &req
->req
, req
->req
.actual
,
2092 req
->req
.length
, req
->req
.buf
);
2095 } /* end for each_entry of ep req */
2096 } /* end for else */
2097 } /* end for if(ep->queue) */
2098 } /* end (ep->desc) */
2100 spin_unlock_irqrestore(&udc
->lock
, flags
);
2103 return count
- size
;
2106 #define create_proc_file() create_proc_read_entry(proc_filename, \
2107 0, NULL, fsl_proc_read, NULL)
2109 #define remove_proc_file() remove_proc_entry(proc_filename, NULL)
2111 #else /* !CONFIG_USB_GADGET_DEBUG_FILES */
2113 #define create_proc_file() do {} while (0)
2114 #define remove_proc_file() do {} while (0)
2116 #endif /* CONFIG_USB_GADGET_DEBUG_FILES */
2118 /*-------------------------------------------------------------------------*/
2120 /* Release udc structures */
2121 static void fsl_udc_release(struct device
*dev
)
2123 complete(udc_controller
->done
);
2124 dma_free_coherent(dev
, udc_controller
->ep_qh_size
,
2125 udc_controller
->ep_qh
, udc_controller
->ep_qh_dma
);
2126 kfree(udc_controller
);
2129 /******************************************************************
2130 Internal structure setup functions
2131 *******************************************************************/
2132 /*------------------------------------------------------------------
2133 * init resource for globle controller
2134 * Return the udc handle on success or NULL on failure
2135 ------------------------------------------------------------------*/
2136 static int __init
struct_udc_setup(struct fsl_udc
*udc
,
2137 struct platform_device
*pdev
)
2139 struct fsl_usb2_platform_data
*pdata
;
2142 pdata
= pdev
->dev
.platform_data
;
2143 udc
->phy_mode
= pdata
->phy_mode
;
2145 udc
->eps
= kzalloc(sizeof(struct fsl_ep
) * udc
->max_ep
, GFP_KERNEL
);
2147 ERR("malloc fsl_ep failed\n");
2151 /* initialized QHs, take care of alignment */
2152 size
= udc
->max_ep
* sizeof(struct ep_queue_head
);
2153 if (size
< QH_ALIGNMENT
)
2154 size
= QH_ALIGNMENT
;
2155 else if ((size
% QH_ALIGNMENT
) != 0) {
2156 size
+= QH_ALIGNMENT
+ 1;
2157 size
&= ~(QH_ALIGNMENT
- 1);
2159 udc
->ep_qh
= dma_alloc_coherent(&pdev
->dev
, size
,
2160 &udc
->ep_qh_dma
, GFP_KERNEL
);
2162 ERR("malloc QHs for udc failed\n");
2167 udc
->ep_qh_size
= size
;
2169 /* Initialize ep0 status request structure */
2170 /* FIXME: fsl_alloc_request() ignores ep argument */
2171 udc
->status_req
= container_of(fsl_alloc_request(NULL
, GFP_KERNEL
),
2172 struct fsl_req
, req
);
2173 /* allocate a small amount of memory to get valid address */
2174 udc
->status_req
->req
.buf
= kmalloc(8, GFP_KERNEL
);
2175 udc
->status_req
->req
.dma
= virt_to_phys(udc
->status_req
->req
.buf
);
2177 udc
->resume_state
= USB_STATE_NOTATTACHED
;
2178 udc
->usb_state
= USB_STATE_POWERED
;
2180 udc
->remote_wakeup
= 0; /* default to 0 on reset */
2185 /*----------------------------------------------------------------
2186 * Setup the fsl_ep struct for eps
2187 * Link fsl_ep->ep to gadget->ep_list
2188 * ep0out is not used so do nothing here
2189 * ep0in should be taken care
2190 *--------------------------------------------------------------*/
2191 static int __init
struct_ep_setup(struct fsl_udc
*udc
, unsigned char index
,
2192 char *name
, int link
)
2194 struct fsl_ep
*ep
= &udc
->eps
[index
];
2197 strcpy(ep
->name
, name
);
2198 ep
->ep
.name
= ep
->name
;
2200 ep
->ep
.ops
= &fsl_ep_ops
;
2203 /* for ep0: maxP defined in desc
2204 * for other eps, maxP is set by epautoconfig() called by gadget layer
2206 ep
->ep
.maxpacket
= (unsigned short) ~0;
2208 /* the queue lists any req for this ep */
2209 INIT_LIST_HEAD(&ep
->queue
);
2211 /* gagdet.ep_list used for ep_autoconfig so no ep0 */
2213 list_add_tail(&ep
->ep
.ep_list
, &udc
->gadget
.ep_list
);
2214 ep
->gadget
= &udc
->gadget
;
2215 ep
->qh
= &udc
->ep_qh
[index
];
2220 /* Driver probe function
2221 * all intialization operations implemented here except enabling usb_intr reg
2222 * board setup should have been done in the platform code
2224 static int __init
fsl_udc_probe(struct platform_device
*pdev
)
2226 struct resource
*res
;
2231 if (strcmp(pdev
->name
, driver_name
)) {
2232 VDBG("Wrong device");
2236 udc_controller
= kzalloc(sizeof(struct fsl_udc
), GFP_KERNEL
);
2237 if (udc_controller
== NULL
) {
2238 ERR("malloc udc failed\n");
2242 spin_lock_init(&udc_controller
->lock
);
2243 udc_controller
->stopped
= 1;
2245 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
2247 kfree(udc_controller
);
2251 if (!request_mem_region(res
->start
, res
->end
- res
->start
+ 1,
2253 ERR("request mem region for %s failed\n", pdev
->name
);
2254 kfree(udc_controller
);
2258 dr_regs
= ioremap(res
->start
, res
->end
- res
->start
+ 1);
2264 usb_sys_regs
= (struct usb_sys_interface
*)
2265 ((u32
)dr_regs
+ USB_DR_SYS_OFFSET
);
2267 /* Read Device Controller Capability Parameters register */
2268 dccparams
= fsl_readl(&dr_regs
->dccparams
);
2269 if (!(dccparams
& DCCPARAMS_DC
)) {
2270 ERR("This SOC doesn't support device role\n");
2274 /* Get max device endpoints */
2275 /* DEN is bidirectional ep number, max_ep doubles the number */
2276 udc_controller
->max_ep
= (dccparams
& DCCPARAMS_DEN_MASK
) * 2;
2278 udc_controller
->irq
= platform_get_irq(pdev
, 0);
2279 if (!udc_controller
->irq
) {
2284 ret
= request_irq(udc_controller
->irq
, fsl_udc_irq
, IRQF_SHARED
,
2285 driver_name
, udc_controller
);
2287 ERR("cannot request irq %d err %d\n",
2288 udc_controller
->irq
, ret
);
2292 /* Initialize the udc structure including QH member and other member */
2293 if (struct_udc_setup(udc_controller
, pdev
)) {
2294 ERR("Can't initialize udc data structure\n");
2299 /* initialize usb hw reg except for regs for EP,
2300 * leave usbintr reg untouched */
2301 dr_controller_setup(udc_controller
);
2303 /* Setup gadget structure */
2304 udc_controller
->gadget
.ops
= &fsl_gadget_ops
;
2305 udc_controller
->gadget
.is_dualspeed
= 1;
2306 udc_controller
->gadget
.ep0
= &udc_controller
->eps
[0].ep
;
2307 INIT_LIST_HEAD(&udc_controller
->gadget
.ep_list
);
2308 udc_controller
->gadget
.speed
= USB_SPEED_UNKNOWN
;
2309 udc_controller
->gadget
.name
= driver_name
;
2311 /* Setup gadget.dev and register with kernel */
2312 dev_set_name(&udc_controller
->gadget
.dev
, "gadget");
2313 udc_controller
->gadget
.dev
.release
= fsl_udc_release
;
2314 udc_controller
->gadget
.dev
.parent
= &pdev
->dev
;
2315 ret
= device_register(&udc_controller
->gadget
.dev
);
2319 /* setup QH and epctrl for ep0 */
2320 ep0_setup(udc_controller
);
2322 /* setup udc->eps[] for ep0 */
2323 struct_ep_setup(udc_controller
, 0, "ep0", 0);
2324 /* for ep0: the desc defined here;
2325 * for other eps, gadget layer called ep_enable with defined desc
2327 udc_controller
->eps
[0].desc
= &fsl_ep0_desc
;
2328 udc_controller
->eps
[0].ep
.maxpacket
= USB_MAX_CTRL_PAYLOAD
;
2330 /* setup the udc->eps[] for non-control endpoints and link
2331 * to gadget.ep_list */
2332 for (i
= 1; i
< (int)(udc_controller
->max_ep
/ 2); i
++) {
2335 sprintf(name
, "ep%dout", i
);
2336 struct_ep_setup(udc_controller
, i
* 2, name
, 1);
2337 sprintf(name
, "ep%din", i
);
2338 struct_ep_setup(udc_controller
, i
* 2 + 1, name
, 1);
2341 /* use dma_pool for TD management */
2342 udc_controller
->td_pool
= dma_pool_create("udc_td", &pdev
->dev
,
2343 sizeof(struct ep_td_struct
),
2344 DTD_ALIGNMENT
, UDC_DMA_BOUNDARY
);
2345 if (udc_controller
->td_pool
== NULL
) {
2353 device_unregister(&udc_controller
->gadget
.dev
);
2355 free_irq(udc_controller
->irq
, udc_controller
);
2359 release_mem_region(res
->start
, res
->end
- res
->start
+ 1);
2360 kfree(udc_controller
);
2364 /* Driver removal function
2365 * Free resources and finish pending transactions
2367 static int __exit
fsl_udc_remove(struct platform_device
*pdev
)
2369 struct resource
*res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
2371 DECLARE_COMPLETION(done
);
2373 if (!udc_controller
)
2375 udc_controller
->done
= &done
;
2377 /* DR has been stopped in usb_gadget_unregister_driver() */
2380 /* Free allocated memory */
2381 kfree(udc_controller
->status_req
->req
.buf
);
2382 kfree(udc_controller
->status_req
);
2383 kfree(udc_controller
->eps
);
2385 dma_pool_destroy(udc_controller
->td_pool
);
2386 free_irq(udc_controller
->irq
, udc_controller
);
2388 release_mem_region(res
->start
, res
->end
- res
->start
+ 1);
2390 device_unregister(&udc_controller
->gadget
.dev
);
2391 /* free udc --wait for the release() finished */
2392 wait_for_completion(&done
);
2397 /*-----------------------------------------------------------------
2398 * Modify Power management attributes
2399 * Used by OTG statemachine to disable gadget temporarily
2400 -----------------------------------------------------------------*/
2401 static int fsl_udc_suspend(struct platform_device
*pdev
, pm_message_t state
)
2403 dr_controller_stop(udc_controller
);
2407 /*-----------------------------------------------------------------
2408 * Invoked on USB resume. May be called in_interrupt.
2409 * Here we start the DR controller and enable the irq
2410 *-----------------------------------------------------------------*/
2411 static int fsl_udc_resume(struct platform_device
*pdev
)
2413 /* Enable DR irq reg and set controller Run */
2414 if (udc_controller
->stopped
) {
2415 dr_controller_setup(udc_controller
);
2416 dr_controller_run(udc_controller
);
2418 udc_controller
->usb_state
= USB_STATE_ATTACHED
;
2419 udc_controller
->ep0_state
= WAIT_FOR_SETUP
;
2420 udc_controller
->ep0_dir
= 0;
2424 /*-------------------------------------------------------------------------
2425 Register entry point for the peripheral controller driver
2426 --------------------------------------------------------------------------*/
2428 static struct platform_driver udc_driver
= {
2429 .remove
= __exit_p(fsl_udc_remove
),
2430 /* these suspend and resume are not usb suspend and resume */
2431 .suspend
= fsl_udc_suspend
,
2432 .resume
= fsl_udc_resume
,
2434 .name
= (char *)driver_name
,
2435 .owner
= THIS_MODULE
,
2439 static int __init
udc_init(void)
2441 printk(KERN_INFO
"%s (%s)\n", driver_desc
, DRIVER_VERSION
);
2442 return platform_driver_probe(&udc_driver
, fsl_udc_probe
);
2445 module_init(udc_init
);
2447 static void __exit
udc_exit(void)
2449 platform_driver_unregister(&udc_driver
);
2450 printk("%s unregistered\n", driver_desc
);
2453 module_exit(udc_exit
);
2455 MODULE_DESCRIPTION(DRIVER_DESC
);
2456 MODULE_AUTHOR(DRIVER_AUTHOR
);
2457 MODULE_LICENSE("GPL");
2458 MODULE_ALIAS("platform:fsl-usb2-udc");