| 2007-11-12 |
Siddha, Suresh B | x86: fix taking DNA during 64bit sigreturn
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2007-10-19 |
Siddha, Suresh B | x86, vsyscall: fix the oops crash with __pa_vsymbol()
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2007-10-17 |
Siddha, Suresh B | i386: fix 4 bit apicid assumption of mach-default
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2007-09-05 |
Suresh Siddha | sched: fix MC/HT scheduler optimization, without breaking...
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2007-08-23 |
Suresh Siddha | sched: skip updating rq's next_balance under null SD
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2007-08-23 |
Suresh Siddha | sched: fix broken SMT/MC optimizations
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2007-08-23 |
Siddha, Suresh B | slab: skip calling cache_free_alien() when the platform...
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2007-07-19 |
Suresh Siddha | [PATCH] sched: fix the all pinned logic in load_balance_newi...
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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commit | commitdiff | tree |
| 2007-07-19 |
Suresh Siddha | [PATCH] sched: fix newly idle load balance in case...
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2007-06-26 |
Siddha, Suresh B | x86_64 irq: use mask/unmask and proper locking in fixup_irqs()
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2007-06-26 |
Suresh Siddha | x86_64: set the irq_chip name for lapic
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2007-05-08 |
Siddha, Suresh B | sched: align rq to cacheline boundary
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2007-05-08 |
Siddha, Suresh B | sched: optimize siblings status check logic in wake_idle()
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2007-05-08 |
Siddha, Suresh B | sched: dynticks idle load balancing
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2007-05-08 |
Siddha, Suresh B | sched: fix idle load balancing in softirqd context
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2007-05-08 |
Siddha, Suresh B | [IA64] save and restore cpus_allowed in cpu_idle_wait
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2007-05-02 |
Suresh Siddha | [PATCH] x86-64: set node_possible_map at runtime -...
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2007-05-02 |
Siddha, Suresh B | [PATCH] x86-64: skip cache_free_alien() on non NUMA
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2006-12-10 |
Siddha, Suresh B | [PATCH] sched: decrease number of load balances
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2006-12-10 |
Siddha, Suresh B | [PATCH] sched domain: increase the SMT busy rebalance...
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2006-12-10 |
Siddha, Suresh B | [PATCH] ched domain: move sched group allocations to...
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2006-12-07 |
Siddha, Suresh B | [PATCH] suspend: don't change cpus_allowed for task...
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2006-12-07 |
Siddha, Suresh B | [PATCH] x86: fix the irqbalance quirk for E7320/E7520...
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2006-12-07 |
Siddha, Suresh B | [PATCH] x86-64: add genapic_force
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2006-12-07 |
Siddha, Suresh B | [PATCH] i386: change the 'no_control' field to 'hotpluggable...
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2006-12-07 |
Siddha, Suresh B | [PATCH] i386: introduce the mechanism of disabling...
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2006-12-07 |
Siddha, Suresh B | [PATCH] x86: add write_pci_config_byte() to direct...
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2006-10-03 |
Siddha, Suresh B | [PATCH] sched: cleanup sched_group cpu_power setup
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2006-10-03 |
Siddha, Suresh B | [PATCH] sched: introduce child field in sched_domain
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2006-10-03 |
Siddha, Suresh B | [PATCH] sched: remove unnecessary sched group allocations
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2006-09-29 |
Siddha, Suresh B | [PATCH] mm: fix a race condition under SMC + COW
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2006-09-26 |
Siddha, Suresh B | [PATCH] fix potential stack overflow in mm/slab.c
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2006-08-17 |
Suresh Siddha | [NET]: Fix potential stack overflow in net/core/utils.c
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2006-07-31 |
Siddha, Suresh B | [PATCH] sched: build_sched_domains() fix
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2006-06-28 |
Siddha, Suresh B | [PATCH] sched: mc/smt power savings sched policy
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2006-06-26 |
Siddha, Suresh B | [PATCH] x86_64: fix apic error on bootup
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2006-04-11 |
Siddha, Suresh B | [PATCH] x86_64: fix sync before RDTSC on Intel cpus
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2006-03-27 |
Siddha, Suresh B | [PATCH] sched: fix group power for allnodes_domains
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2006-03-27 |
Siddha, Suresh B | [PATCH] sched: new sched domain for representing multi...
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2006-02-26 |
Suresh Siddha | [PATCH] x86_64: Check for bad elf entry address.
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2005-11-15 |
Siddha, Suresh B | [PATCH] x86_64: x86_64/i386 fix Intel cache detection...
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2005-11-15 |
Siddha, Suresh B | [PATCH] x86-64/i386: Intel HT, Multi core detection...
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2005-11-15 |
Siddha, Suresh B | [PATCH] x86_64: Unmap NULL during early bootup
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2005-11-15 |
Suresh Siddha | [PATCH] x86-64/i386: Fix CPU model for family 6
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2005-11-14 |
Siddha, Suresh B | [PATCH] x86_64: fix tss limit
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2005-10-31 |
Siddha, Suresh B | [PATCH] intel_cacheinfo: remove MAX_CACHE_LEAVES limit
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2005-10-25 |
Siddha, Suresh B | [IA64] fix siblings field value in /proc/cpuinfo
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2005-09-10 |
Siddha, Suresh B | [PATCH] sched: allow the load to grow upto its cpu_power
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2005-09-10 |
Siddha, Suresh B | [PATCH] sched: don't kick ALB in the presence of pinned...
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2005-07-16 |
Siddha, Suresh B | [PATCH] x86_64: TASK_SIZE fixes for compatibility mode...
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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commit | commitdiff | tree |
| 2005-06-25 |
Suresh Siddha | [PATCH] sched: remove degenerate domains
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2005-06-22 |
Suresh Siddha | [PATCH] x86_64: TASK_SIZE fixes for compatibility mode...
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2005-05-28 |
Siddha, Suresh B | [PATCH] x86: fix smp_num_siblings on buggy BIOSes
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2005-05-17 |
Suresh Siddha | [PATCH] x86_64: Fix OEM hpet check
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2005-05-03 |
Suresh Siddha | [IA64] Add config SCHED_SMT
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2005-04-25 |
Suresh Siddha | [IA64] multi-core/multi-thread identification
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2005-04-16 |
Siddha, Suresh B | [PATCH] x86, x86_64: dual core proc-cpuinfo and sibling...
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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| 2005-04-16 |
Siddha, Suresh B | [PATCH] x86_64-always-use-cpuid-80000008-to-figure...
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
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