| commit | 865be7a81071a77014c83cd01536c989eed362b4 | |
| author | Ondrej Zary <linux@rainbow-software.org> | |
| Mon, 16 May 2011 19:38:08 +0000 (16 21:38 +0200) | ||
| committer | H. Peter Anvin <hpa@linux.intel.com> | |
| Mon, 16 May 2011 20:24:21 +0000 (16 13:24 -0700) | ||
| tree | 4fd71b4c50c40b174ea728f79a4301d765c4b88c | treesnapshot (tar.gz zip) |
| parent | eecaaba5b2e4ae762b4726fae2e3b22630e137ec | commitdiff |
x86, cpu: Fix detection of Celeron Covington stepping A1 and B0
Steppings A1 and B0 of Celeron Covington are currently misdetected as
Pentium II (Dixon). Fix it by removing the stepping check.
[ hpa: this fixes this specific bug... the CPUID documentation
specifies that the L2 cache size can disambiguate additional CPUs;
this patch does not fix that. ]
Signed-off-by: Ondrej Zary <linux@rainbow-software.org>
Link: http://lkml.kernel.org/r/201105162138.15416.linux@rainbow-software.org
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Steppings A1 and B0 of Celeron Covington are currently misdetected as
Pentium II (Dixon). Fix it by removing the stepping check.
[ hpa: this fixes this specific bug... the CPUID documentation
specifies that the L2 cache size can disambiguate additional CPUs;
this patch does not fix that. ]
Signed-off-by: Ondrej Zary <linux@rainbow-software.org>
Link: http://lkml.kernel.org/r/201105162138.15416.linux@rainbow-software.org
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
| arch/x86/kernel/cpu/intel.c | diffblobblamehistory |