2 * Low-Level PCI Access for i386 machines
4 * Copyright 1993, 1994 Drew Eckhardt
6 * (Unix and Linux consulting and custom programming)
10 * Drew's work was sponsored by:
11 * iX Multiuser Multitasking Magazine
15 * Copyright 1997--2000 Martin Mares <mj@ucw.cz>
17 * For more information, please consult the following manuals (look at
18 * http://www.pcisig.com/ for how to get them):
20 * PCI BIOS Specification
21 * PCI Local Bus Specification
22 * PCI to PCI Bridge Specification
23 * PCI System Design Guide
27 #include <linux/types.h>
28 #include <linux/kernel.h>
29 #include <linux/pci.h>
30 #include <linux/init.h>
31 #include <linux/ioport.h>
32 #include <linux/errno.h>
33 #include <linux/bootmem.h>
37 #include <asm/pci_x86.h>
41 skip_isa_ioresource_align(struct pci_dev
*dev
) {
43 if ((pci_probe
& PCI_CAN_SKIP_ISA_ALIGN
) &&
44 !(dev
->bus
->bridge_ctl
& PCI_BRIDGE_CTL_ISA
))
50 * We need to avoid collisions with `mirrored' VGA ports
51 * and other strange ISA hardware, so we always want the
52 * addresses to be allocated in the 0x000-0x0ff region
55 * Why? Because some silly external IO cards only decode
56 * the low 10 bits of the IO address. The 0x00-0xff region
57 * is reserved for motherboard devices that decode all 16
58 * bits, so it's ok to allocate at, say, 0x2800-0x28ff,
59 * but we want to try to avoid allocating at 0x2900-0x2bff
60 * which might have be mirrored at 0x0100-0x03ff..
63 pcibios_align_resource(void *data
, struct resource
*res
,
64 resource_size_t size
, resource_size_t align
)
66 struct pci_dev
*dev
= data
;
68 if (res
->flags
& IORESOURCE_IO
) {
69 resource_size_t start
= res
->start
;
71 if (skip_isa_ioresource_align(dev
))
74 start
= (start
+ 0x3ff) & ~0x3ff;
79 EXPORT_SYMBOL(pcibios_align_resource
);
82 * Handle resources of PCI devices. If the world were perfect, we could
83 * just allocate all the resource regions and do nothing more. It isn't.
84 * On the other hand, we cannot just re-allocate all devices, as it would
85 * require us to know lots of host bridge internals. So we attempt to
86 * keep as much of the original configuration as possible, but tweak it
87 * when it's found to be wrong.
89 * Known BIOS problems we have to work around:
90 * - I/O or memory regions not configured
91 * - regions configured, but not enabled in the command register
92 * - bogus I/O addresses above 64K used
93 * - expansion ROMs left enabled (this may sound harmless, but given
94 * the fact the PCI specs explicitly allow address decoders to be
95 * shared between expansion ROMs and other resource regions, it's
99 * (1) Allocate resources for all buses behind PCI-to-PCI bridges.
100 * This gives us fixed barriers on where we can allocate.
101 * (2) Allocate resources for all enabled devices. If there is
102 * a collision, just mark the resource as unallocated. Also
103 * disable expansion ROMs during this step.
104 * (3) Try to allocate resources for disabled devices. If the
105 * resources were assigned correctly, everything goes well,
106 * if they weren't, they won't disturb allocation of other
108 * (4) Assign new addresses to resources which were either
109 * not configured at all or misconfigured. If explicitly
110 * requested by the user, configure expansion ROM address
114 static void __init
pcibios_allocate_bus_resources(struct list_head
*bus_list
)
121 /* Depth-First Search on bus tree */
122 list_for_each_entry(bus
, bus_list
, node
) {
123 if ((dev
= bus
->self
)) {
124 for (idx
= PCI_BRIDGE_RESOURCES
;
125 idx
< PCI_NUM_RESOURCES
; idx
++) {
126 r
= &dev
->resource
[idx
];
130 pci_claim_resource(dev
, idx
) < 0) {
131 dev_info(&dev
->dev
, "BAR %d: can't allocate resource\n", idx
);
133 * Something is wrong with the region.
134 * Invalidate the resource to prevent
135 * child resource allocations in this
142 pcibios_allocate_bus_resources(&bus
->children
);
146 static void __init
pcibios_allocate_resources(int pass
)
148 struct pci_dev
*dev
= NULL
;
153 for_each_pci_dev(dev
) {
154 pci_read_config_word(dev
, PCI_COMMAND
, &command
);
155 for (idx
= 0; idx
< PCI_ROM_RESOURCE
; idx
++) {
156 r
= &dev
->resource
[idx
];
157 if (r
->parent
) /* Already allocated */
159 if (!r
->start
) /* Address not assigned at all */
161 if (r
->flags
& IORESOURCE_IO
)
162 disabled
= !(command
& PCI_COMMAND_IO
);
164 disabled
= !(command
& PCI_COMMAND_MEMORY
);
165 if (pass
== disabled
) {
166 dev_dbg(&dev
->dev
, "resource %#08llx-%#08llx (f=%lx, d=%d, p=%d)\n",
167 (unsigned long long) r
->start
,
168 (unsigned long long) r
->end
,
169 r
->flags
, disabled
, pass
);
170 if (pci_claim_resource(dev
, idx
) < 0) {
171 dev_info(&dev
->dev
, "BAR %d: can't allocate resource\n", idx
);
172 /* We'll assign a new address later */
179 r
= &dev
->resource
[PCI_ROM_RESOURCE
];
180 if (r
->flags
& IORESOURCE_ROM_ENABLE
) {
181 /* Turn the ROM off, leave the resource region,
182 * but keep it unregistered. */
184 dev_dbg(&dev
->dev
, "disabling ROM\n");
185 r
->flags
&= ~IORESOURCE_ROM_ENABLE
;
186 pci_read_config_dword(dev
,
187 dev
->rom_base_reg
, ®
);
188 pci_write_config_dword(dev
, dev
->rom_base_reg
,
189 reg
& ~PCI_ROM_ADDRESS_ENABLE
);
195 static int __init
pcibios_assign_resources(void)
197 struct pci_dev
*dev
= NULL
;
200 if (!(pci_probe
& PCI_ASSIGN_ROMS
)) {
202 * Try to use BIOS settings for ROMs, otherwise let
203 * pci_assign_unassigned_resources() allocate the new
206 for_each_pci_dev(dev
) {
207 r
= &dev
->resource
[PCI_ROM_RESOURCE
];
208 if (!r
->flags
|| !r
->start
)
210 if (pci_claim_resource(dev
, PCI_ROM_RESOURCE
) < 0) {
217 pci_assign_unassigned_resources();
222 void __init
pcibios_resource_survey(void)
224 DBG("PCI: Allocating resources\n");
225 pcibios_allocate_bus_resources(&pci_root_buses
);
226 pcibios_allocate_resources(0);
227 pcibios_allocate_resources(1);
229 e820_reserve_resources_late();
233 * called in fs_initcall (one below subsys_initcall),
234 * give a chance for motherboard reserve resources
236 fs_initcall(pcibios_assign_resources
);
238 void __weak
x86_pci_root_bus_res_quirks(struct pci_bus
*b
)
243 * If we set up a device for bus mastering, we need to check the latency
244 * timer as certain crappy BIOSes forget to set it properly.
246 unsigned int pcibios_max_latency
= 255;
248 void pcibios_set_master(struct pci_dev
*dev
)
251 pci_read_config_byte(dev
, PCI_LATENCY_TIMER
, &lat
);
253 lat
= (64 <= pcibios_max_latency
) ? 64 : pcibios_max_latency
;
254 else if (lat
> pcibios_max_latency
)
255 lat
= pcibios_max_latency
;
258 dev_printk(KERN_DEBUG
, &dev
->dev
, "setting latency timer to %d\n", lat
);
259 pci_write_config_byte(dev
, PCI_LATENCY_TIMER
, lat
);
262 static struct vm_operations_struct pci_mmap_ops
= {
263 .access
= generic_access_phys
,
266 int pci_mmap_page_range(struct pci_dev
*dev
, struct vm_area_struct
*vma
,
267 enum pci_mmap_state mmap_state
, int write_combine
)
271 /* I/O space cannot be accessed via normal processor loads and
272 * stores on this platform.
274 if (mmap_state
== pci_mmap_io
)
277 prot
= pgprot_val(vma
->vm_page_prot
);
278 if (pat_enabled
&& write_combine
)
279 prot
|= _PAGE_CACHE_WC
;
280 else if (pat_enabled
|| boot_cpu_data
.x86
> 3)
282 * ioremap() and ioremap_nocache() defaults to UC MINUS for now.
283 * To avoid attribute conflicts, request UC MINUS here
286 prot
|= _PAGE_CACHE_UC_MINUS
;
288 vma
->vm_page_prot
= __pgprot(prot
);
290 if (io_remap_pfn_range(vma
, vma
->vm_start
, vma
->vm_pgoff
,
291 vma
->vm_end
- vma
->vm_start
,
295 vma
->vm_ops
= &pci_mmap_ops
;