| commit | 48797ebd9e8b16fddcd4ef062f792314a6b9219a | |
| author | Linus Torvalds <torvalds@merom.osdl.org> | |
| Wed, 8 Nov 2006 18:27:54 +0000 (8 10:27 -0800) | ||
| committer | Linus Torvalds <torvalds@merom.osdl.org> | |
| Wed, 8 Nov 2006 18:27:54 +0000 (8 10:27 -0800) | ||
| tree | a192a4d6d2158da763def73627362169963dc4d0 | treesnapshot (tar.gz zip) |
| parent | 6c0ffb9d2fd987c79c6cbb81c3f3011c63749b1a | commitdiff |
x86-64: write IO APIC irq routing entries in correct order
This is the x86-64 version of f9dadfa71bc594df09044da61d1c72701121d802
that did the same thing on i386.
Since the "mask" bit is in the low word, when we write a new entry, we
need to write the high word first, before we potentially unmask it.
The exception is when we actually want to mask the interrupt, in which
case we want to write the low word first to make sure that the high word
doesn't change while the interrupt routing is still active.
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This is the x86-64 version of f9dadfa71bc594df09044da61d1c72701121d802
that did the same thing on i386.
Since the "mask" bit is in the low word, when we write a new entry, we
need to write the high word first, before we potentially unmask it.
The exception is when we actually want to mask the interrupt, in which
case we want to write the low word first to make sure that the high word
doesn't change while the interrupt routing is still active.
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
| arch/x86_64/kernel/io_apic.c | diffblobblamehistory |