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[MIPS] Separate performance counter interrupts
2007-06-14
Chri
s
Dearman
[MIPS]
S
ep
a
r
ate performance counter interrupts
Signed-off-by:
Chris Dearman
<chris@mips.com>
commit
|
commitdiff
|
tree
2007-06-14
Chris Dea
r
man
[MIPS] Malta: Fix
f
or S
O
CitSC b
a
sed Malt
a
s
Signed-off-by:
Chris Dearman
<chris@mips.com>
commit
|
commitdiff
|
tree
2007-06-11
C
hr
i
s
D
e
a
rm
a
n
[MIPS] S
M
TC:
Fix buil
d
error caused
b
y nonsense code
.
Signed-off-by:
Chris Dearman
<chris@mips.com>
commit
|
commitdiff
|
tree
2007-06-11
C
h
ris Dearman
[MIPS]
A
lways inst
a
ll
the D
S
P
e
xception
h
andler
.
Signed-off-by:
Chris Dearman
<chris@mips.com>
commit
|
commitdiff
|
tree
2007-06-06
Chris Dearman
[MIPS]
R
e
m
ove dupl
i
cate fpu ena
b
le h
a
zard
code
.
Signed-off-by:
Chris Dearman
<chris@mips.com>
commit
|
commitdiff
|
tree
2007-05-11
Ch
r
is Dearman
[MIPS] FPU ha
z
ard
ha
n
dl
i
ng
Signed-off-by:
Chris Dearman
<chris@mips.com>
commit
|
commitdiff
|
tree
2007-05-11
Chris Dearman
[MIPS] MT: Reenable EIC support and ad
d
su
p
po
r
t for
.
.
.
Signed-off-by:
Chris Dearman
<chris@mips.com>
commit
|
commitdiff
|
tree
2007-03-29
Chris
Dearma
n
[
MIPS
]
lockdep: D
e
al wi
t
h interrupt dis
a
b
le haz
a
rd
.
.
.
Signed-off-by:
Chris Dearman
<chris@mips.com>
commit
|
commitdiff
|
tree
2007-03-29
Chris Dearman
[MIPS] l
o
ckdep: Handle int
e
rrupt
s
in R3000 style c
0
_s
t
a
t
us
.
.
.
Signed-off-by:
Chris Dearman
<chris@mips.com>
commit
|
commitdiff
|
tree
2007-03-13
Chris Dearman
[MIPS] Opr
o
file: Reset all performan
c
e
register
s
for
.
.
.
Signed-off-by:
Chris Dearman
<chris@mips.com>
commit
|
commitdiff
|
tree
2007-02-06
Chr
i
s Dearman
[MI
P
S
] Comment
fix
Signed-off-by:
Chris Dearman
<chris@mips.com>
commit
|
commitdiff
|
tree
2007-02-06
Ch
r
is Dearman
[MIPS]
M
ove
.
se
t
reorder out of
conditional code
Signed-off-by:
Chris Dearman
<chris@mips.com>
commit
|
commitdiff
|
tree
2007-02-06
Chr
i
s D
e
arman
[MIPS] Check FCSR
f
o
r
pending interrupts be
f
o
re resto
r
ing
.
.
.
Signed-off-by:
Chris Dearman
<chris@mips.com>
commit
|
commitdiff
|
tree
2006-09-27
Chris Dearman
[M
I
PS]
M
T: Initia
l
ise
all writable bits in
Caus
e
register
.
.
.
Signed-off-by:
Chris Dearman
<chris@mips.com>
commit
|
commitdiff
|
tree
2006-07-13
Chri
s
Dearman
[MI
P
S] Pan
i
c on fp exce
p
t
ion in ke
r
nel mode
.
Signed-off-by:
Chris Dearman
<chris@mips.com>
commit
|
commitdiff
|
tree
2006-07-13
Chris Dearman
[MIPS
]
Default cpu_has_mipsmt to a
r
unt
i
m
e check
Signed-off-by:
Chris Dearman
<chris@mips.com>
commit
|
commitdiff
|
tree
2006-07-13
Chris Dearman
[
M
I
PS] Use KE
R
N_DEBU
G
to log the SDBBP mes
s
a
ges
Signed-off-by:
Chris Dearman
<chris@mips.com>
commit
|
commitdiff
|
tree
2006-07-13
Chris Dear
m
an
[M
I
P
S
] Less noise on
m
u
ltithrea
d
ing
exceptions
.
Signed-off-by:
Chris Dearman
<chris@mips.com>
commit
|
commitdiff
|
tree
2006-06-29
C
h
ris D
e
arm
a
n
[MIPS] Fix handling of 0 length I & D c
a
ches
.
Signed-off-by:
Chris Dearman
<chris@mips.com>
commit
|
commitdiff
|
tree
2006-06-29
Chris Dearman
[MIPS] Typo fi
x
es
.
Signed-off-by:
Chris Dearman
<chris@mips.com>
commit
|
commitdiff
|
tree
2006-06-29
Chri
s
De
a
r
m
a
n
[MIPS] MI
P
S32/M
I
PS64 secondary cache management
Signed-off-by:
Chris Dearman
<chris@mips.com>
commit
|
commitdiff
|
tree
2006-05-31
C
hris Dearman
[MIPS]
F
ix detect
i
on
and
h
andling of t
h
e 74K processor
.
Signed-off-by:
Chris Dearman
<chris@mips.com>
commit
|
commitdiff
|
tree
2006-04-27
Chris Dea
r
man
[M
I
PS]
24K LV: Add core card id
.
commit
|
commitdiff
|
tree